From caed24ed62350562fde70f9ec6f0c077fb850357 Mon Sep 17 00:00:00 2001 From: athulms22 Date: Thu, 28 Jun 2018 19:52:38 +0530 Subject: Add files via upload --- .../Shunt_Clipper/Shunt_Clipper-cache.lib | 73 +++++++++++++ analog circuits/Shunt_Clipper/Shunt_Clipper.bak | 96 +++++++++++++++++ analog circuits/Shunt_Clipper/Shunt_Clipper.cir | 7 ++ .../Shunt_Clipper/Shunt_Clipper.kicad_pcb | 1 + analog circuits/Shunt_Clipper/Shunt_Clipper.pro | 33 ++++++ analog circuits/Shunt_Clipper/Shunt_Clipper.sch | 117 +++++++++++++++++++++ 6 files changed, 327 insertions(+) create mode 100644 analog circuits/Shunt_Clipper/Shunt_Clipper-cache.lib create mode 100644 analog circuits/Shunt_Clipper/Shunt_Clipper.bak create mode 100644 analog circuits/Shunt_Clipper/Shunt_Clipper.cir create mode 100644 analog circuits/Shunt_Clipper/Shunt_Clipper.kicad_pcb create mode 100644 analog circuits/Shunt_Clipper/Shunt_Clipper.pro create mode 100644 analog circuits/Shunt_Clipper/Shunt_Clipper.sch diff --git a/analog circuits/Shunt_Clipper/Shunt_Clipper-cache.lib b/analog circuits/Shunt_Clipper/Shunt_Clipper-cache.lib new file mode 100644 index 0000000..c8836ff --- /dev/null +++ b/analog circuits/Shunt_Clipper/Shunt_Clipper-cache.lib @@ -0,0 +1,73 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# Device:D +# +DEF Device:D D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "Device:D" 0 -100 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + TO-???* + *_Diode_* + *SingleDiode* + D_* +$ENDFPLIST +DRAW +P 2 0 1 8 -50 50 -50 -50 N +P 2 0 1 0 50 0 -50 0 N +P 4 0 1 8 50 50 50 -50 -50 0 50 50 N +X K 1 -150 0 100 R 50 50 1 1 P +X A 2 150 0 100 L 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device:R +# +DEF Device:R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "Device:R" 0 0 50 V V C CNN +F2 "" -70 0 50 V I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + R_* +$ENDFPLIST +DRAW +S -40 -100 40 100 0 1 10 N +X ~ 1 0 150 50 D 50 50 1 1 P +X ~ 2 0 -150 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# power:GND +# +DEF power:GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "power:GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# pspice:VSOURCE +# +DEF pspice:VSOURCE V 0 40 Y Y 1 F N +F0 "V" -250 300 50 H V C CNN +F1 "pspice:VSOURCE" 0 0 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C 0 0 200 0 1 0 N +T 0 -320 -10 50 0 0 1 V Normal 0 C C +P 2 0 1 0 -250 -250 -250 150 F +P 3 0 1 0 -300 150 -250 250 -200 150 F +X E1 1 0 300 100 D 50 50 1 1 I +X E2 2 0 -300 100 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/analog circuits/Shunt_Clipper/Shunt_Clipper.bak b/analog circuits/Shunt_Clipper/Shunt_Clipper.bak new file mode 100644 index 0000000..4251b61 --- /dev/null +++ b/analog circuits/Shunt_Clipper/Shunt_Clipper.bak @@ -0,0 +1,96 @@ +EESchema Schematic File Version 4 +EELAYER 26 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L pspice:VSOURCE V1 +U 1 1 5B1017A0 +P 4300 3450 +F 0 "V1" H 4528 3496 50 0000 L CNN +F 1 "VSOURCE" H 4528 3405 50 0000 L CNN +F 2 "" H 4300 3450 50 0001 C CNN +F 3 "" H 4300 3450 50 0001 C CNN +F 4 "V" H 4300 3450 50 0001 C CNN "Spice_Primitive" +F 5 "sin(0 5 50)" H 4300 3450 50 0001 C CNN "Spice_Model" +F 6 "Y" H 4300 3450 50 0001 C CNN "Spice_Netlist_Enabled" + 1 4300 3450 + 1 0 0 -1 +$EndComp +$Comp +L Device:R R1 +U 1 1 5B1017E1 +P 4950 2800 +F 0 "R1" V 4743 2800 50 0000 C CNN +F 1 "1k" V 4834 2800 50 0000 C CNN +F 2 "" V 4880 2800 50 0001 C CNN +F 3 "~" H 4950 2800 50 0001 C CNN + 1 4950 2800 + 0 1 1 0 +$EndComp +$Comp +L Device:D D1 +U 1 1 5B101997 +P 5850 3250 +F 0 "D1" V 5896 3171 50 0000 R CNN +F 1 "D" V 5805 3171 50 0000 R CNN +F 2 "" H 5850 3250 50 0001 C CNN +F 3 "~" H 5850 3250 50 0001 C CNN + 1 5850 3250 + 0 -1 -1 0 +$EndComp +$Comp +L pspice:VSOURCE V2 +U 1 1 5B101AAA +P 5850 3950 +F 0 "V2" H 5484 3904 50 0000 R CNN +F 1 "VSOURCE" H 5484 3995 50 0000 R CNN +F 2 "" H 5850 3950 50 0001 C CNN +F 3 "" H 5850 3950 50 0001 C CNN +F 4 "V" H 5850 3950 50 0001 C CNN "Spice_Primitive" +F 5 "dc 2.4" H 5850 3950 50 0001 C CNN "Spice_Model" +F 6 "Y" H 5850 3950 50 0001 C CNN "Spice_Netlist_Enabled" + 1 5850 3950 + -1 0 0 1 +$EndComp +Wire Wire Line + 4300 3150 4300 2800 +Wire Wire Line + 4300 2800 4800 2800 +Wire Wire Line + 5100 2800 5850 2800 +Wire Wire Line + 5850 2800 5850 3100 +Wire Wire Line + 5850 3400 5850 3650 +Wire Wire Line + 5850 4250 5150 4250 +Wire Wire Line + 4300 4250 4300 3750 +$Comp +L power:GND #PWR01 +U 1 1 5B101BE6 +P 5150 4350 +F 0 "#PWR01" H 5150 4100 50 0001 C CNN +F 1 "GND" H 5155 4177 50 0000 C CNN +F 2 "" H 5150 4350 50 0001 C CNN +F 3 "" H 5150 4350 50 0001 C CNN + 1 5150 4350 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5150 4350 5150 4250 +Connection ~ 5150 4250 +Wire Wire Line + 5150 4250 4300 4250 +$EndSCHEMATC diff --git a/analog circuits/Shunt_Clipper/Shunt_Clipper.cir b/analog circuits/Shunt_Clipper/Shunt_Clipper.cir new file mode 100644 index 0000000..870827c --- /dev/null +++ b/analog circuits/Shunt_Clipper/Shunt_Clipper.cir @@ -0,0 +1,7 @@ +.title KiCad schematic +V1 Net-_R1-Pad2_ GND sin(0 5 50) +R1 Net-_D1-Pad2_ Net-_R1-Pad2_ 1k +D1 Net-_D1-Pad1_ Net-_D1-Pad2_ D +V2 GND Net-_D1-Pad1_ dc 2.4 +.tran 5m 100m +.end diff --git a/analog circuits/Shunt_Clipper/Shunt_Clipper.kicad_pcb b/analog circuits/Shunt_Clipper/Shunt_Clipper.kicad_pcb new file mode 100644 index 0000000..02c8ecb --- /dev/null +++ b/analog circuits/Shunt_Clipper/Shunt_Clipper.kicad_pcb @@ -0,0 +1 @@ +(kicad_pcb (version 4) (host kicad "dummy file") ) diff --git a/analog circuits/Shunt_Clipper/Shunt_Clipper.pro b/analog circuits/Shunt_Clipper/Shunt_Clipper.pro new file mode 100644 index 0000000..152769c --- /dev/null +++ b/analog circuits/Shunt_Clipper/Shunt_Clipper.pro @@ -0,0 +1,33 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] diff --git a/analog circuits/Shunt_Clipper/Shunt_Clipper.sch b/analog circuits/Shunt_Clipper/Shunt_Clipper.sch new file mode 100644 index 0000000..fa85f6a --- /dev/null +++ b/analog circuits/Shunt_Clipper/Shunt_Clipper.sch @@ -0,0 +1,117 @@ +EESchema Schematic File Version 4 +LIBS:Shunt_Clipper-cache +EELAYER 26 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L pspice:VSOURCE V1 +U 1 1 5B1017A0 +P 4300 3450 +F 0 "V1" H 4528 3496 50 0000 L CNN +F 1 "VSOURCE" H 4528 3405 50 0000 L CNN +F 2 "" H 4300 3450 50 0001 C CNN +F 3 "" H 4300 3450 50 0001 C CNN +F 4 "V" H 4300 3450 50 0001 C CNN "Spice_Primitive" +F 5 "sin(0 5 50)" H 4300 3450 50 0001 C CNN "Spice_Model" +F 6 "Y" H 4300 3450 50 0001 C CNN "Spice_Netlist_Enabled" + 1 4300 3450 + 1 0 0 -1 +$EndComp +$Comp +L Device:R R1 +U 1 1 5B1017E1 +P 4950 2800 +F 0 "R1" V 4743 2800 50 0000 C CNN +F 1 "1k" V 4834 2800 50 0000 C CNN +F 2 "" V 4880 2800 50 0001 C CNN +F 3 "~" H 4950 2800 50 0001 C CNN + 1 4950 2800 + 0 1 1 0 +$EndComp +$Comp +L Device:D D1 +U 1 1 5B101997 +P 5850 3250 +F 0 "D1" V 5896 3171 50 0000 R CNN +F 1 "D" V 5805 3171 50 0000 R CNN +F 2 "" H 5850 3250 50 0001 C CNN +F 3 "~" H 5850 3250 50 0001 C CNN + 1 5850 3250 + 0 -1 -1 0 +$EndComp +$Comp +L pspice:VSOURCE V2 +U 1 1 5B101AAA +P 5850 3950 +F 0 "V2" H 5484 3904 50 0000 R CNN +F 1 "VSOURCE" H 5484 3995 50 0000 R CNN +F 2 "" H 5850 3950 50 0001 C CNN +F 3 "" H 5850 3950 50 0001 C CNN +F 4 "V" H 5850 3950 50 0001 C CNN "Spice_Primitive" +F 5 "dc 2.4" H 5850 3950 50 0001 C CNN "Spice_Model" +F 6 "Y" H 5850 3950 50 0001 C CNN "Spice_Netlist_Enabled" + 1 5850 3950 + -1 0 0 1 +$EndComp +Wire Wire Line + 4300 3150 4300 2800 +Wire Wire Line + 4300 2800 4550 2800 +Wire Wire Line + 5100 2800 5700 2800 +Wire Wire Line + 5850 2800 5850 3100 +Wire Wire Line + 5850 3400 5850 3650 +Wire Wire Line + 5850 4250 5150 4250 +Wire Wire Line + 4300 4250 4300 3750 +$Comp +L power:GND #PWR01 +U 1 1 5B101BE6 +P 5150 4350 +F 0 "#PWR01" H 5150 4100 50 0001 C CNN +F 1 "GND" H 5155 4177 50 0000 C CNN +F 2 "" H 5150 4350 50 0001 C CNN +F 3 "" H 5150 4350 50 0001 C CNN + 1 5150 4350 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5150 4350 5150 4250 +Connection ~ 5150 4250 +Wire Wire Line + 5150 4250 4300 4250 +Text Notes 3300 5100 0 50 ~ 0 +.tran 5m 100m +Text GLabel 5600 2600 0 50 Output ~ 0 +out +Wire Wire Line + 5600 2600 5700 2600 +Wire Wire Line + 5700 2600 5700 2800 +Connection ~ 5700 2800 +Wire Wire Line + 5700 2800 5850 2800 +Text GLabel 4500 2650 0 50 Input ~ 0 +in +Wire Wire Line + 4500 2650 4550 2650 +Wire Wire Line + 4550 2650 4550 2800 +Connection ~ 4550 2800 +Wire Wire Line + 4550 2800 4800 2800 +$EndSCHEMATC -- cgit