From 476705d693c7122d34f9b049fa79b935405c9b49 Mon Sep 17 00:00:00 2001
From: prashantsinalkar
Date: Tue, 14 Apr 2020 10:19:27 +0530
Subject: Initial commit

---
 .../10-D_to_A_and_A_to_D_Converters.ipynb          | 32 ++++++++++++++++++++++
 .../2-Operational_Amplifier.ipynb                  | 32 ++++++++++++++++++++++
 .../3-Operational_Amplifier_Characteristics.ipynb  | 32 ++++++++++++++++++++++
 .../4-Operational_Amplifier_Circuits.ipynb         | 32 ++++++++++++++++++++++
 .../5-Comparators_and_Waveform_Generators.ipynb    | 32 ++++++++++++++++++++++
 .../6-Voltage_Regulator.ipynb                      | 32 ++++++++++++++++++++++
 .../7-Active_Filters.ipynb                         | 32 ++++++++++++++++++++++
 .../8-555_Timer.ipynb                              | 32 ++++++++++++++++++++++
 8 files changed, 256 insertions(+)
 create mode 100644 Linear_Integrated_Circuits_by_D_R_Choudhury/10-D_to_A_and_A_to_D_Converters.ipynb
 create mode 100644 Linear_Integrated_Circuits_by_D_R_Choudhury/2-Operational_Amplifier.ipynb
 create mode 100644 Linear_Integrated_Circuits_by_D_R_Choudhury/3-Operational_Amplifier_Characteristics.ipynb
 create mode 100644 Linear_Integrated_Circuits_by_D_R_Choudhury/4-Operational_Amplifier_Circuits.ipynb
 create mode 100644 Linear_Integrated_Circuits_by_D_R_Choudhury/5-Comparators_and_Waveform_Generators.ipynb
 create mode 100644 Linear_Integrated_Circuits_by_D_R_Choudhury/6-Voltage_Regulator.ipynb
 create mode 100644 Linear_Integrated_Circuits_by_D_R_Choudhury/7-Active_Filters.ipynb
 create mode 100644 Linear_Integrated_Circuits_by_D_R_Choudhury/8-555_Timer.ipynb

(limited to 'Linear_Integrated_Circuits_by_D_R_Choudhury')

diff --git a/Linear_Integrated_Circuits_by_D_R_Choudhury/10-D_to_A_and_A_to_D_Converters.ipynb b/Linear_Integrated_Circuits_by_D_R_Choudhury/10-D_to_A_and_A_to_D_Converters.ipynb
new file mode 100644
index 0000000..70e8234
--- /dev/null
+++ b/Linear_Integrated_Circuits_by_D_R_Choudhury/10-D_to_A_and_A_to_D_Converters.ipynb
@@ -0,0 +1,32 @@
+{
+"cells": [
+ {
+		   "cell_type": "markdown",
+	   "metadata": {},
+	   "source": [
+       "# Chapter 10: D to A and A to D Converters"
+	   ]
+	},
+],
+"metadata": {
+		  "kernelspec": {
+		   "display_name": "Scilab",
+		   "language": "scilab",
+		   "name": "scilab"
+		  },
+		  "language_info": {
+		   "file_extension": ".sce",
+		   "help_links": [
+			{
+			 "text": "MetaKernel Magics",
+			 "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+			}
+		   ],
+		   "mimetype": "text/x-octave",
+		   "name": "scilab",
+		   "version": "0.7.1"
+		  }
+		 },
+		 "nbformat": 4,
+		 "nbformat_minor": 0
+}
diff --git a/Linear_Integrated_Circuits_by_D_R_Choudhury/2-Operational_Amplifier.ipynb b/Linear_Integrated_Circuits_by_D_R_Choudhury/2-Operational_Amplifier.ipynb
new file mode 100644
index 0000000..f7e9ef3
--- /dev/null
+++ b/Linear_Integrated_Circuits_by_D_R_Choudhury/2-Operational_Amplifier.ipynb
@@ -0,0 +1,32 @@
+{
+"cells": [
+ {
+		   "cell_type": "markdown",
+	   "metadata": {},
+	   "source": [
+       "# Chapter 2: Operational Amplifier"
+	   ]
+	},
+],
+"metadata": {
+		  "kernelspec": {
+		   "display_name": "Scilab",
+		   "language": "scilab",
+		   "name": "scilab"
+		  },
+		  "language_info": {
+		   "file_extension": ".sce",
+		   "help_links": [
+			{
+			 "text": "MetaKernel Magics",
+			 "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+			}
+		   ],
+		   "mimetype": "text/x-octave",
+		   "name": "scilab",
+		   "version": "0.7.1"
+		  }
+		 },
+		 "nbformat": 4,
+		 "nbformat_minor": 0
+}
diff --git a/Linear_Integrated_Circuits_by_D_R_Choudhury/3-Operational_Amplifier_Characteristics.ipynb b/Linear_Integrated_Circuits_by_D_R_Choudhury/3-Operational_Amplifier_Characteristics.ipynb
new file mode 100644
index 0000000..dc4b76e
--- /dev/null
+++ b/Linear_Integrated_Circuits_by_D_R_Choudhury/3-Operational_Amplifier_Characteristics.ipynb
@@ -0,0 +1,32 @@
+{
+"cells": [
+ {
+		   "cell_type": "markdown",
+	   "metadata": {},
+	   "source": [
+       "# Chapter 3: Operational Amplifier Characteristics"
+	   ]
+	},
+],
+"metadata": {
+		  "kernelspec": {
+		   "display_name": "Scilab",
+		   "language": "scilab",
+		   "name": "scilab"
+		  },
+		  "language_info": {
+		   "file_extension": ".sce",
+		   "help_links": [
+			{
+			 "text": "MetaKernel Magics",
+			 "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+			}
+		   ],
+		   "mimetype": "text/x-octave",
+		   "name": "scilab",
+		   "version": "0.7.1"
+		  }
+		 },
+		 "nbformat": 4,
+		 "nbformat_minor": 0
+}
diff --git a/Linear_Integrated_Circuits_by_D_R_Choudhury/4-Operational_Amplifier_Circuits.ipynb b/Linear_Integrated_Circuits_by_D_R_Choudhury/4-Operational_Amplifier_Circuits.ipynb
new file mode 100644
index 0000000..a235118
--- /dev/null
+++ b/Linear_Integrated_Circuits_by_D_R_Choudhury/4-Operational_Amplifier_Circuits.ipynb
@@ -0,0 +1,32 @@
+{
+"cells": [
+ {
+		   "cell_type": "markdown",
+	   "metadata": {},
+	   "source": [
+       "# Chapter 4: Operational Amplifier Circuits"
+	   ]
+	},
+],
+"metadata": {
+		  "kernelspec": {
+		   "display_name": "Scilab",
+		   "language": "scilab",
+		   "name": "scilab"
+		  },
+		  "language_info": {
+		   "file_extension": ".sce",
+		   "help_links": [
+			{
+			 "text": "MetaKernel Magics",
+			 "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+			}
+		   ],
+		   "mimetype": "text/x-octave",
+		   "name": "scilab",
+		   "version": "0.7.1"
+		  }
+		 },
+		 "nbformat": 4,
+		 "nbformat_minor": 0
+}
diff --git a/Linear_Integrated_Circuits_by_D_R_Choudhury/5-Comparators_and_Waveform_Generators.ipynb b/Linear_Integrated_Circuits_by_D_R_Choudhury/5-Comparators_and_Waveform_Generators.ipynb
new file mode 100644
index 0000000..9e93d39
--- /dev/null
+++ b/Linear_Integrated_Circuits_by_D_R_Choudhury/5-Comparators_and_Waveform_Generators.ipynb
@@ -0,0 +1,32 @@
+{
+"cells": [
+ {
+		   "cell_type": "markdown",
+	   "metadata": {},
+	   "source": [
+       "# Chapter 5: Comparators and Waveform Generators"
+	   ]
+	},
+],
+"metadata": {
+		  "kernelspec": {
+		   "display_name": "Scilab",
+		   "language": "scilab",
+		   "name": "scilab"
+		  },
+		  "language_info": {
+		   "file_extension": ".sce",
+		   "help_links": [
+			{
+			 "text": "MetaKernel Magics",
+			 "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+			}
+		   ],
+		   "mimetype": "text/x-octave",
+		   "name": "scilab",
+		   "version": "0.7.1"
+		  }
+		 },
+		 "nbformat": 4,
+		 "nbformat_minor": 0
+}
diff --git a/Linear_Integrated_Circuits_by_D_R_Choudhury/6-Voltage_Regulator.ipynb b/Linear_Integrated_Circuits_by_D_R_Choudhury/6-Voltage_Regulator.ipynb
new file mode 100644
index 0000000..e785a23
--- /dev/null
+++ b/Linear_Integrated_Circuits_by_D_R_Choudhury/6-Voltage_Regulator.ipynb
@@ -0,0 +1,32 @@
+{
+"cells": [
+ {
+		   "cell_type": "markdown",
+	   "metadata": {},
+	   "source": [
+       "# Chapter 6: Voltage Regulator"
+	   ]
+	},
+],
+"metadata": {
+		  "kernelspec": {
+		   "display_name": "Scilab",
+		   "language": "scilab",
+		   "name": "scilab"
+		  },
+		  "language_info": {
+		   "file_extension": ".sce",
+		   "help_links": [
+			{
+			 "text": "MetaKernel Magics",
+			 "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+			}
+		   ],
+		   "mimetype": "text/x-octave",
+		   "name": "scilab",
+		   "version": "0.7.1"
+		  }
+		 },
+		 "nbformat": 4,
+		 "nbformat_minor": 0
+}
diff --git a/Linear_Integrated_Circuits_by_D_R_Choudhury/7-Active_Filters.ipynb b/Linear_Integrated_Circuits_by_D_R_Choudhury/7-Active_Filters.ipynb
new file mode 100644
index 0000000..cb18fa6
--- /dev/null
+++ b/Linear_Integrated_Circuits_by_D_R_Choudhury/7-Active_Filters.ipynb
@@ -0,0 +1,32 @@
+{
+"cells": [
+ {
+		   "cell_type": "markdown",
+	   "metadata": {},
+	   "source": [
+       "# Chapter 7: Active Filters"
+	   ]
+	},
+],
+"metadata": {
+		  "kernelspec": {
+		   "display_name": "Scilab",
+		   "language": "scilab",
+		   "name": "scilab"
+		  },
+		  "language_info": {
+		   "file_extension": ".sce",
+		   "help_links": [
+			{
+			 "text": "MetaKernel Magics",
+			 "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+			}
+		   ],
+		   "mimetype": "text/x-octave",
+		   "name": "scilab",
+		   "version": "0.7.1"
+		  }
+		 },
+		 "nbformat": 4,
+		 "nbformat_minor": 0
+}
diff --git a/Linear_Integrated_Circuits_by_D_R_Choudhury/8-555_Timer.ipynb b/Linear_Integrated_Circuits_by_D_R_Choudhury/8-555_Timer.ipynb
new file mode 100644
index 0000000..eab1457
--- /dev/null
+++ b/Linear_Integrated_Circuits_by_D_R_Choudhury/8-555_Timer.ipynb
@@ -0,0 +1,32 @@
+{
+"cells": [
+ {
+		   "cell_type": "markdown",
+	   "metadata": {},
+	   "source": [
+       "# Chapter 8: 555 Timer"
+	   ]
+	},
+],
+"metadata": {
+		  "kernelspec": {
+		   "display_name": "Scilab",
+		   "language": "scilab",
+		   "name": "scilab"
+		  },
+		  "language_info": {
+		   "file_extension": ".sce",
+		   "help_links": [
+			{
+			 "text": "MetaKernel Magics",
+			 "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+			}
+		   ],
+		   "mimetype": "text/x-octave",
+		   "name": "scilab",
+		   "version": "0.7.1"
+		  }
+		 },
+		 "nbformat": 4,
+		 "nbformat_minor": 0
+}
-- 
cgit