From 9e506f48291533cba7b4c555b0d2e98f234bfbe3 Mon Sep 17 00:00:00 2001
From: siddhu8990
Date: Wed, 19 Apr 2017 14:28:34 +0530
Subject: Merged Ashish's work

---
 src/c/hardware/avr/pwm/u8AVRPWM0Setups.c | 50 ++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)
 create mode 100644 src/c/hardware/avr/pwm/u8AVRPWM0Setups.c

(limited to 'src/c/hardware/avr/pwm/u8AVRPWM0Setups.c')

diff --git a/src/c/hardware/avr/pwm/u8AVRPWM0Setups.c b/src/c/hardware/avr/pwm/u8AVRPWM0Setups.c
new file mode 100644
index 0000000..131ee68
--- /dev/null
+++ b/src/c/hardware/avr/pwm/u8AVRPWM0Setups.c
@@ -0,0 +1,50 @@
+/* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution.  The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Ashish Kamble
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+*/ 
+//Function to Setup PWM output for OC0 pin.
+
+
+#include "AVRPeripheralPWM.h"
+
+
+uint8 u8AVRPWM0Setups(uint8 waveform_mode, uint8 output_mode)
+{
+ switch(waveform_mode)
+ {
+  case 0:
+         TCCR0 |= (1<<WGM00);
+         break;
+ 
+  case 1:
+         TCCR0 |= (1<<WGM00)|(1<<WGM01);
+         break;
+ 
+  case 2:
+         TCCR0 |= (1<<WGM01);
+         break;
+ }
+ switch(output_mode)
+ {
+  case 0:
+         TCCR0 |= (1<<COM01);
+         break;
+  
+  case 1:
+         TCCR0 |= (1<<COM00)|(1<<COM01);
+         break;
+ 
+  case 2:
+         TCCR0 |= (1<<COM00);
+         break;        
+ }
+ return 0;
+}
+
-- 
cgit