From 9e5793a7b05b23e6044a6d7a9ddd5db39ba375f0 Mon Sep 17 00:00:00 2001 From: yash1112 Date: Fri, 7 Jul 2017 21:20:49 +0530 Subject: sci2c arduino updated --- 2.3-1/src/c/CACSD/interfaces/int_syslin.h | 78 +++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 2.3-1/src/c/CACSD/interfaces/int_syslin.h (limited to '2.3-1/src/c/CACSD/interfaces/int_syslin.h') diff --git a/2.3-1/src/c/CACSD/interfaces/int_syslin.h b/2.3-1/src/c/CACSD/interfaces/int_syslin.h new file mode 100644 index 00000000..3f74ea6e --- /dev/null +++ b/2.3-1/src/c/CACSD/interfaces/int_syslin.h @@ -0,0 +1,78 @@ +/* Copyright (C) 2017 - IIT Bombay - FOSSEE + + This file must be used under the terms of the CeCILL. + This source file is licensed as described in the file COPYING, which + you should have received as part of this distribution. The terms + are also available at + http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt + Author: Siddhesh Wani + Organization: FOSSEE, IIT Bombay + Email: toolbox@scilab.in +*/ + +#ifndef __INT_SYSLIN_H__ +#define __INT_SYSLIN_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define g2d2d2d2syslinss2(in1,size1,in2,size2,in3,size3,in4,size4,out) \ + dsyslina(in1,in2,size2[0],in3,size3[1],in4,size4[0],NULL,NULL,out) + +#define g2d2d2d2d2syslinss2(in1,size1,in2,size2,in3,size3,in4,size4,in5, \ + size5,out) dsyslina(in1,in2,size2[0],in3,size3[1],in4,size4[0],in5,NULL,out) + +#define g2d2d2d2d2d2syslinss2(in1,size1,in2,size2,in3,size3,in4,size4, \ + in5,size5,in6,size6,out) dsyslina(in1,in2,size2[0],in3,size3[1],in4, \ + size4[0],in5,in6,out) +// +#define g2d0d0d0syslinss2(in1,size1,in2,in3,in4,out) \ + dsyslina(in1,&in2,1,&in3,1,&in4,1,NULL,NULL,out) + +#define g2d0d2d0syslinss2(in1,size1,in2,in3,size3,in4,out) \ + dsyslina(in1,&in2,1,in3,size3[1],&in4,1,NULL,NULL,out) + +#define g2d0d0d2syslinss2(in1,size1,in2,in3,in4,size4,out) \ + dsyslina(in1,&in2,1,&in3,1,in4,size4[0],NULL,NULL,out) + +#define g2d0d2d2syslinss2(in1,size1,in2,in3,size3,in4,size4,out) \ + dsyslina(in1,&in2,1,in3,size3[1],in4,size4[0],NULL,NULL,out) +// +#define g2d0d0d0d0syslinss2(in1,size1,in2,in3,in4,in5,out) \ + dsyslina(in1,&in2,1,&in3,1,&in4,1,&in5,NULL,out) + +#define g2d0d2d0d2syslinss2(in1,size1,in2,in3,size3,in4,in5,size5, \ + out) dsyslina(in1,&in2,1,in3,size3[1],&in4,1,&in5,NULL,out) + +#define g2d0d0d2d2syslinss2(in1,size1,in2,in3,in4,size4,in5,size5, \ + out) dsyslina(in1,&in2,1,&in3,1,in4,size4[0],in5,NULL,out) + +#define g2d0d2d2d2syslinss2(in1,size1,in2,in3,size3,in4,size4,in5, \ + size5, out) dsyslina(in1,&in2,1,in3,size3[1],in4,size4[0],in5,NULL,out) + +#define g2d2d2d2d0syslinss2(in1,size1,in2,size2,in3,size3,in4,size4, \ + in5,out) dsyslina(in1,in2,size2[0],in3,size3[1],in4,size4[0],&in5,NULL,out) +// +#define g2d0d0d0d0d0syslinss2(in1,size1,in2,in3,in4,in5,in6,out) \ + dsyslina(in1,&in2,1,&in3,1,&in4,1,&in5,&in6,out) + +#define g2d0d2d0d2d0syslinss2(in1,size1,in2,in3,size3,in4,in5,size5, \ + in6,out) dsyslina(in1,&in2,1,in3,size3[1],in4,1,in5,&in6,out) + +#define g2d0d0d2d2d0syslinss2(in1,size1,in2,in3,in4,size4,in5,size5, \ + in6,out) dsyslina(in1,&in2,1,in3,1,in4,size4[0],in5,&in6,out) + +#define g2d0d2d2d2d0syslinss2(in1,size1,in2,in3,size3,in4,size4,in5, \ + size5,in6,out) dsyslina(in1,&in2,1,in3,size3[1],in4,size4[0],in5,&in6,out) + +#define g2d2d2d2d0d2syslinss2(in1,size1,in2,size2,in3,size3,in4,size4, \ + in5,in6,size6,out) dsyslina(in1,in2,size2[0],in3,size3[1],in4,size4[0], \ + &in5,in6,out) + +#ifdef __cplusplus +} /* extern "C" */ +#endif + + +#endif /*__INT_SYSLIN_H__*/ \ No newline at end of file -- cgit