From b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b Mon Sep 17 00:00:00 2001
From: priyanka
Date: Wed, 24 Jun 2015 15:03:17 +0530
Subject: initial commit / add all books

---
 68/CH10/EX10.1/ex1.sce | 29 +++++++++++++++++++++++++++++
 68/CH10/EX10.2/ex2.sce | 15 +++++++++++++++
 68/CH10/EX10.3/ex3.sce | 44 ++++++++++++++++++++++++++++++++++++++++++++
 68/CH10/EX10.4/ex4.sce | 47 +++++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 135 insertions(+)
 create mode 100755 68/CH10/EX10.1/ex1.sce
 create mode 100755 68/CH10/EX10.2/ex2.sce
 create mode 100755 68/CH10/EX10.3/ex3.sce
 create mode 100755 68/CH10/EX10.4/ex4.sce

(limited to '68/CH10')

diff --git a/68/CH10/EX10.1/ex1.sce b/68/CH10/EX10.1/ex1.sce
new file mode 100755
index 000000000..4dbb60c5c
--- /dev/null
+++ b/68/CH10/EX10.1/ex1.sce
@@ -0,0 +1,29 @@
+// Example 10.1 : To determine t_PHL, t_PLH and t_P
+// Consider CMOS inverter
+C_ox=6*10^-15; // (F/um^2)
+uC_n=115*10^-6; //uC_n=u_n*C_ox (A/V^2)
+uC_p=30*10^-6; //uC_p=u_p*C_ox (A/V^2)
+V_tn=0.4; // (V)
+V_tp=-0.4; // (V)
+V_DD=2.5; // (V)
+W_n=0.375*10^-6; // W for Q_N
+L_n=0.25*10^-6; // L for Q_N
+W_p=1.125*10^-6; // W for Q_P
+L_p=0.25*10^-6; // L for Q_P
+C_gd1=0.3*W_n*10^-9; // (F)
+C_gd2=0.3*W_p*10^-9; // (F)
+C_db1=10^-15; // (F)
+C_db2=10^-15; // (F)
+C_g3= 0.375*0.25*6*10^-15+2*0.3*0.375*10^-15; // (F)
+C_g4=1.125*0.25*6*10^-15+2*0.3*1.125*10^-15; // (F)
+C_w=0.2*10^-15; // (F)
+C=2*C_gd1+2*C_gd2+C_db1+C_db2+C_g3+C_g4+C_w; // (F)
+i_DN0=uC_n*W_n*(V_DD-V_tn)^2/(2*L_n); // i_DN0 = i_DN(0) (A)
+i_DNtPHL=uC_n*W_n*((V_DD-V_tn)*V_DD/2-((V_DD/2)^2)/2)/L_n; // i_DNtPHL = i_DN(t_PHL) (A)
+i_DNav=(i_DN0+i_DNtPHL)/2; // i_DN|av (A)
+t_PHL=C*(V_DD/2)/i_DNav;
+disp(t_PHL,"t_PHL (s)")
+t_PLH=1.3*t_PHL; // Since W_p/W_n=3 and u_n/u_p=3.83 thus t_PLH is greater than t_PHL by 3.83/3
+disp(t_PLH,"t_PLH (s)")
+t_P=(t_PHL+t_PLH)/2; 
+disp(t_P,"t_P (s)")
\ No newline at end of file
diff --git a/68/CH10/EX10.2/ex2.sce b/68/CH10/EX10.2/ex2.sce
new file mode 100755
index 000000000..21340b2fc
--- /dev/null
+++ b/68/CH10/EX10.2/ex2.sce
@@ -0,0 +1,15 @@
+// Example 10.2 : W/L ratios for the logic circuit
+//For basic inverter
+n=1.5;
+p=5;
+L=0.25*10^-6; // (m)
+WbyL=2*n; // W/L for Q_NB , Q_NC , Q_ND
+disp(WbyL,"W/L ratio for Q_NB")
+disp(WbyL,"W/L ratio for Q_NC")
+disp(WbyL,"W/L ratio for Q_ND")
+WbyL=n; // W/L ratio for Q_NA
+disp(WbyL,"W/L ratio for Q_NA")
+WbyL=3*p; // W/L for Q_PA, Q_PC , Q_PD
+disp(WbyL,"W/L ratio for Q_PA") 
+disp(WbyL,"W/L ratio for Q_PC")
+disp(WbyL,"W/L ratio for Q_PD")
\ No newline at end of file
diff --git a/68/CH10/EX10.3/ex3.sce b/68/CH10/EX10.3/ex3.sce
new file mode 100755
index 000000000..fb94ebc10
--- /dev/null
+++ b/68/CH10/EX10.3/ex3.sce
@@ -0,0 +1,44 @@
+// Example 10.3 : To determine the parameters of pseudo NMOS inverter
+// Consider a pseudo NMOS inverter
+uC_n=115*10^-6; //uC_n=u_n*C_ox (A/V^2)
+uC_p=30*10^-6; //uC_p=u_p*C_ox (A/V^2)
+V_tn=0.4; // (V)
+V_tp=-0.4; // (V)
+V_DD=2.5; // (V)
+W_n=0.375*10^-6; // W for Q_N (m)
+L_n=0.25*10^-6; // L for Q_N (m)
+r=9;
+
+// 10.3a
+V_OH=V_DD;
+disp(V_OH,"V_OH (V)")
+V_OL=(V_DD-V_tn)*(1-sqrt(1-1/r));
+disp(V_OL,"V_OL (V)")
+V_IL=V_tn+(V_DD-V_tn)/sqrt(r*(r+1));
+disp(V_IL,"V_IL (V)")
+V_IH=V_tn+2*(V_DD-V_tn)/(sqrt(3*r));
+disp(V_IH,"V_IH (V)")
+V_M=V_tn+(V_DD-V_tn)/sqrt(r+1);
+disp(V_M,"V_M (V)")
+NM_H=V_OH-V_IH;
+NM_L=V_IL-V_OL;
+disp(NM_L,NM_H,"The highest and the lowest values of allowable noise margin (V)")
+
+// 10.3b
+WbyL_p=uC_n*(W_n/L_n)/(uC_p*r); // WbyL_p=(W/L)_p
+disp(WbyL_p,"(W/L)_p")
+
+//10.3c
+I_stat=(uC_p*WbyL_p*(V_DD-V_tn)^2)/2;
+disp(I_stat,"I_stat (A)")
+P_D=I_stat*V_DD;
+disp(P_D,"Static power dissipation P_D (W)")
+
+//10.3d
+C=7*10^-15;
+t_PLH=1.7*C/(uC_p*WbyL_p*V_DD);
+disp(t_PLH,"t_PLH (s)")
+t_PHL=1.7*C/(uC_n*(W_n/L_n)*sqrt(1-0.46/r)*V_DD);
+disp(t_PHL,("t_PHL (s)"))
+t_p=(t_PHL+t_PLH)/2;
+disp(t_p,"t_p (s)")
\ No newline at end of file
diff --git a/68/CH10/EX10.4/ex4.sce b/68/CH10/EX10.4/ex4.sce
new file mode 100755
index 000000000..c44e54cf0
--- /dev/null
+++ b/68/CH10/EX10.4/ex4.sce
@@ -0,0 +1,47 @@
+// Example 10.4 : To determine parameters for NMOS transistor
+// Consider NMOS transistor switch
+uC_n=50*10^-6; //uC_n=u_n*C_ox (A/V^2)
+uC_p=20*10^-6; //uC_px    `=u_p*C_ox (A/V^2)
+V_tO=1; // (V)
+y=0.5; // (V^1/2)
+fie_f=0.6/2; // (V)
+V_DD=5; // (V)
+W_n=4*10^-6; // (m)
+L_n=2*10^-6; // (m)
+C=50*10^-15; // (F)
+
+// 10.4a
+V_t=1.6; // (V)
+V_OH=V_DD-V_t; // V_OH is the value of v_O at which Q stops conducting (V)
+disp(V_OH,"V_OH (V)")
+ 
+// 10.4b
+W_p=10*10^-6; // (m)
+L_p=2*10^-6; // (m)
+i_DP=uC_p*W_p*((V_DD-V_OH-V_tO)^2)/(2*L_p);
+disp(i_DP,"Static current of the inverter (A)")
+P_D=V_DD*i_DP;
+disp(P_D,"Power dissipated (W)")
+V_O=0.08; // Output voltage (V) found by equating the current of Q_N=18uA
+disp(V_O," The output voltage of the inverter (V) ")
+
+// 10.4c
+i_D0=uC_n*W_n*((V_DD-V_tO)^2)/(2*2*10^-6); // i_D0=i_D(0) (A) current i_D at t=0
+v_O=2.5; // (V)
+V_t=V_tO+0.5*(sqrt(v_O+2*fie_f)-sqrt(2*fie_f)); // at v_O=2.5V
+i_DtPLH=(uC_n*W_n*(V_DD-v_O-V_t)^2)/(2*L_n); // i_DtPLH=i_D(t_PLH) (A) current i_D at t=t_PLH
+i_Dav=(i_D0+i_DtPLH)/2; // i_Dav=i_D|av (A) average discharge current
+t_PLH=C*(V_DD/2)/i_Dav;
+disp(t_PLH,"t_PHL (s)")
+
+// 10.4d
+// Case with v_t going low
+i_D0=uC_n*W_n*((V_DD-V_tO)^2)/(2*2*10^-6); // i_D0=i_D(0) (A) current i_D at t=0
+i_DtPHL=uC_n*W_n*((V_DD-V_tO)*v_O-(v_O^2)/2)/(L_n); // i_DtPHL=i_D(t_PHL) (A) current i_D at t=T_PHL
+i_Dav=(i_D0+i_DtPHL)/2; // i_Dav=i_D|av (A) average discarge current
+t_PHL=C*(V_DD/2)/i_Dav;
+disp(t_PHL,"t_PHL (s)")
+
+// 10.4e
+t_P=(t_PHL+t_PLH)/2;
+disp(t_P,"t_P (s)")
\ No newline at end of file
-- 
cgit