From b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b Mon Sep 17 00:00:00 2001 From: priyanka Date: Wed, 24 Jun 2015 15:03:17 +0530 Subject: initial commit / add all books --- 506/CH6/EX6.5.d/Example6_5d.sce | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100755 506/CH6/EX6.5.d/Example6_5d.sce (limited to '506/CH6/EX6.5.d') diff --git a/506/CH6/EX6.5.d/Example6_5d.sce b/506/CH6/EX6.5.d/Example6_5d.sce new file mode 100755 index 000000000..64b6a32c8 --- /dev/null +++ b/506/CH6/EX6.5.d/Example6_5d.sce @@ -0,0 +1,26 @@ +clear; +clc; + +//Caption:If input is low in NAND gate +//Given Data +//For transistor +Vbesat=0.8;//in V +Vy=0.5;//in V +R = 5;//in K +Rc = 2.2;//in K + +//The logic levels are Vcesato=0.2V for 0 state +Vcesato=0.2;//in V +//For diode + +Vyd=0.6;//in V +Vdrop=0.7;//in V + +Vp = Vcesato + Vdrop;//Voltage at point P +disp('V',Vp,'Vp='); +Vbe = Vy;//Voltage at base emitter will be same as Vgamma +vp = Vbe + Vyd +Vyd;//The level to which vp should increase +Vn = vp - Vp;//Noise Margin +disp('V',Vn,'Noise Margin = '); + +//end \ No newline at end of file -- cgit