From b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b Mon Sep 17 00:00:00 2001
From: priyanka
Date: Wed, 24 Jun 2015 15:03:17 +0530
Subject: initial commit / add all books

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 2300/CH14/EX14.12.4/Ex14_4.sce | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100755 2300/CH14/EX14.12.4/Ex14_4.sce

(limited to '2300/CH14/EX14.12.4')

diff --git a/2300/CH14/EX14.12.4/Ex14_4.sce b/2300/CH14/EX14.12.4/Ex14_4.sce
new file mode 100755
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+++ b/2300/CH14/EX14.12.4/Ex14_4.sce
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+//scilab 5.4.1
+//Windows 7 operating system
+//chapter 14 Integrated Circuits and Operational Amplifiers
+clc
+clear
+R1=1*1000//R1=input resistance in ohms in the inverting terminal of the amplifier circuit
+R2=200//R2=input resistance in ohms in the inverting terminal of the amplifier circuit
+R3=400//R3=input resistance in ohms in the inverting terminal of the amplifier circuit
+Rf=500//Rf=feedback resistance in ohms
+v1=-5//v1=input voltage in the inverting terminal of an amplifier circuit at R1 resistor
+v2=3//v2=input voltage in the inverting terminal of an amplifier circuit at R2 resistor
+v3=4//v3=input voltage in the inverting terminal of an amplifier circuit at R3 resistor
+vo=-(((Rf/R1)*v1)+((Rf/R2)*v2)+((Rf/R3)*v3))//vo=output voltage for inverting summing summing amplifier circuit
+disp("V",vo,"Output voltage of the 3-input summing amplifier circuit is =")
+disp("Output voltage is negative as it the circuit of inverting summing amplifier")
+
-- 
cgit