From b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b Mon Sep 17 00:00:00 2001
From: priyanka
Date: Wed, 24 Jun 2015 15:03:17 +0530
Subject: initial commit / add all books

---
 1757/CH9/EX9.1/EX9_1.sce | 24 ++++++++++++++++++++++++
 1757/CH9/EX9.2/EX9_2.sce | 19 +++++++++++++++++++
 1757/CH9/EX9.3/EX9_3.sce | 38 ++++++++++++++++++++++++++++++++++++++
 1757/CH9/EX9.4/EX9_4.sce | 24 ++++++++++++++++++++++++
 1757/CH9/EX9.5/EX9_5.sce | 34 ++++++++++++++++++++++++++++++++++
 1757/CH9/EX9.6/EX9_6.sce | 20 ++++++++++++++++++++
 1757/CH9/EX9.7/EX9_7.sce | 32 ++++++++++++++++++++++++++++++++
 7 files changed, 191 insertions(+)
 create mode 100755 1757/CH9/EX9.1/EX9_1.sce
 create mode 100755 1757/CH9/EX9.2/EX9_2.sce
 create mode 100755 1757/CH9/EX9.3/EX9_3.sce
 create mode 100755 1757/CH9/EX9.4/EX9_4.sce
 create mode 100755 1757/CH9/EX9.5/EX9_5.sce
 create mode 100755 1757/CH9/EX9.6/EX9_6.sce
 create mode 100755 1757/CH9/EX9.7/EX9_7.sce

(limited to '1757/CH9')

diff --git a/1757/CH9/EX9.1/EX9_1.sce b/1757/CH9/EX9.1/EX9_1.sce
new file mode 100755
index 000000000..5d555344c
--- /dev/null
+++ b/1757/CH9/EX9.1/EX9_1.sce
@@ -0,0 +1,24 @@
+//Example9.1  // to find output voltage for a constant input signal frequency of 200 KHz
+clc;
+clear;
+close;
+fo = 2*%pi*1*10^3 ; // KHz/V  // VCO sensitivity range 4.1
+fc = 500  ; // Hz a free running frequency
+f1 = 200 ; // Hz  input frequency
+f2 = 2*10^3 ; // Hz  input frequency
+
+// the output voltage of PLL is defined as
+//Vo = (wo-wc)/ko
+ko = fo ;
+// when i/p locked with o/p wo=wi
+// Vo = (wi-wc)/ko ;
+
+//for the i/p frequency fi = 200 Hz
+fi = 200 ;  // Hz
+Vo = (((2*%pi*fi)-(2*%pi*fc))/ko);
+disp('The output voltage of switching regulator circuit is = '+string(Vo)+' V '); 
+
+//for the i/p frequency fi = 200 Hz
+fi = 2*10^3 ;  // Hz
+Vo = (((2*%pi*fi)-(2*%pi*fc))/ko);
+disp('The output voltage of switching regulator circuit is = '+string(Vo)+' V '); 
diff --git a/1757/CH9/EX9.2/EX9_2.sce b/1757/CH9/EX9.2/EX9_2.sce
new file mode 100755
index 000000000..dfb6d4233
--- /dev/null
+++ b/1757/CH9/EX9.2/EX9_2.sce
@@ -0,0 +1,19 @@
+//Example9.2  // to find VCO output frequency
+clc;
+clear;
+close;
+fc = 400  ; // KHz a free running frequency
+f = 10 ;  // KHz  low pass filter bandwidth
+fi = 500 ; // KHz  input frequency
+
+// In PLL a phase detector produces the sum and difference frequencies are defined as
+
+sum = fi+fc ;
+disp('The sum frequency produce by phase detector is = '+string(sum)+' KHz '); 
+
+difference = fi-fc ;
+disp('The difference frequency produce by phase detector is = '+string(difference)+' KHz '); 
+
+disp('The phase detector frequencies are outside of the low pass filter');
+
+disp('The VCO will be in its free running frequency ');
diff --git a/1757/CH9/EX9.3/EX9_3.sce b/1757/CH9/EX9.3/EX9_3.sce
new file mode 100755
index 000000000..f1efa28ad
--- /dev/null
+++ b/1757/CH9/EX9.3/EX9_3.sce
@@ -0,0 +1,38 @@
+//Example9.3   // to determine the lock range of PLL
+clc;
+clear;
+close;
+Ko = 25 ; // KHz
+fo = 50 ; // KHz
+A = 2 ;
+Vd = 0.7 ;
+AL = 1 ;
+
+// the amximum output swing of phase detector 
+// Vd = Kd*(%pi/2) ;
+
+// the sensitivity of phase detector Kd is
+Kd = Vd*(2/%pi) ;
+disp('The sensitivity of phase detector Kd is = '+string(Kd)+''); 
+
+// The maximum control voltage of VCO Vfmax
+Vfmax = (%pi/2)*Kd*A ;
+disp('The maximum control voltage of VCO Vfmax = '+string(Vfmax)+' V'); 
+
+// the maximum frequency swing of VCO
+fL = (Ko*Vfmax);
+disp('The maximum frequency swing of VCO = '+string(fL)+' KHz'); 
+
+// The maximum range of frequency which lock a PLL are
+fi = fo-fL ;
+disp('The maximum range of frequency which lock a PLL is = '+string(fi)+ ' KHz ');
+
+fi = fo+fL ;
+disp('The maximum range of frequency which lock a PLL is = '+string(fi)+ ' KHz ');
+
+disp('The maximum and minimum rage between 15 KHz to 85 KHZ ')
+
+
+// the lock range is
+fLock = 2*fL ;
+disp('The lock range is = '+string(fLock)+ ' KHz ');
diff --git a/1757/CH9/EX9.4/EX9_4.sce b/1757/CH9/EX9.4/EX9_4.sce
new file mode 100755
index 000000000..c69a7d36d
--- /dev/null
+++ b/1757/CH9/EX9.4/EX9_4.sce
@@ -0,0 +1,24 @@
+//Example9.4   // to determine the output frequency capacitor charging time of VCO
+clc;
+clear;
+close;
+Vcc = 12 ;
+Vcs = 6
+R = 10 ; // K ohm
+C = 1 ; // uF
+
+// the current through the control resistor R
+i =(Vcc-Vcs)/R ;
+disp('The current through the control resistor R is = '+string(i)+ ' mA ');
+
+// The charging time of capacitor 
+t = (0.25*Vcc*C)/i ;
+disp('The charging time of capacitor is = '+string(t)+ ' msec ');
+
+// In VCO the capacitor charging and discharging time period are equal ,so the total time period of tringular and square wave forms can be written as 2*t ;
+t = ((0.5*Vcc*C)/i);
+disp('The total time period of tringular and square wave is = '+string(t)+ ' msec ');
+
+// the output frequency of VCO is
+fo = 1/t ;
+disp('The output frequency of VCO is = '+string(fo)+ ' KHz ');
diff --git a/1757/CH9/EX9.5/EX9_5.sce b/1757/CH9/EX9.5/EX9_5.sce
new file mode 100755
index 000000000..7bccce153
--- /dev/null
+++ b/1757/CH9/EX9.5/EX9_5.sce
@@ -0,0 +1,34 @@
+//Example9.5  // to design VCO with output square wave pulse time of 50 msec
+clc;
+clear;
+close;
+Vcc =6 ;
+Vcs = 5 ;
+R = 22 ; //K ohm
+C = 0.02 ; // uF
+t = 50*10^-3 ; // sec   output square wave pluse
+
+// In VCO the capacitor charging and discharging time period are equal ,so the total time period of tringular and square wave forms can be written as 2*t ;
+
+
+// the charging or discharging time of capacitor 
+tcap = t/2 ;
+disp('The charging or discharging time of capacitor is = '+string(tcap)+ ' msec ');
+
+// the output frequency of VCO is
+fo = 1/t ;
+disp('The output frequency of VCO is is = '+string(fo)+ ' Hz ');
+
+// the output frequency of VCO
+ // fo = (1/4*R*C);
+ R = 1/(4*fo*C) ;
+disp('The output frequency of VCO is = '+string(R)+ ' ohm');
+
+// the current through the control resistor R
+i =(Vcc-Vcs)/R ;
+disp('The current through the control resistor R is = '+string(i)+ ' uA ');
+
+// the capacitor charging current 
+// (V/t)=(i/C) ;
+V = (i/C)*tcap ;
+disp('The capacitor charging current is = '+string(V)+ ' V = 0.33Vcc ');
diff --git a/1757/CH9/EX9.6/EX9_6.sce b/1757/CH9/EX9.6/EX9_6.sce
new file mode 100755
index 000000000..d54896a8a
--- /dev/null
+++ b/1757/CH9/EX9.6/EX9_6.sce
@@ -0,0 +1,20 @@
+//Example9.6  // to determine the center frequency of VCO lock and capture range of PLL
+clc;
+clear;
+close;
+R = 15 ; // K ohm
+C = 0.12 ; // uF
+Vcc = 12 ;
+
+// the center frequency of VCO fo
+fo = (1.2/4*R*C);
+disp('The center frequency of VCO is is = '+string(fo)+ ' Hz ');
+
+fo = 4 ; // KHz
+// the lock range of PLL
+fL = (8*fo/Vcc) ;
+disp('The lock range of PLL is = '+string(fL)+ ' KHz/V ');
+
+// the capture range of PLL
+fc = ((fo-fL)/(2*%pi*3.6*10^3*C)^(1/2)) ;
+disp('The lock range of PLL is = '+string(fc)+ ' Hz/V ');
diff --git a/1757/CH9/EX9.7/EX9_7.sce b/1757/CH9/EX9.7/EX9_7.sce
new file mode 100755
index 000000000..bae8d8c67
--- /dev/null
+++ b/1757/CH9/EX9.7/EX9_7.sce
@@ -0,0 +1,32 @@
+//Example9.7  // determine the lock range of the FSK demodulator
+clc;
+clear;
+close;
+Vcc = 12 ;
+Fvco = 0.25*Vcc ;
+f = 200*10^3 ; // KHz
+
+
+// the total time period of VCO 
+t = 1/f ;
+disp('The total time period of VCO is = '+string(t)+ ' sec ');
+
+// In VCO the capacitor charging and discharging time period are equal ,so the total time period of tringular and square wave forms can be written as 2*t ;
+
+
+// the charging or discharging time of capacitor 
+tcap = t/2 ;
+disp('The charging or discharging time of capacitor is = '+string(tcap)+ ' sec ');
+
+// the voltage swing of VCO for 12 V supply
+Fvco = 0.25*Vcc ;
+disp('The voltage swing of VCO for 12 V supply is = '+string(Fvco)+ ' V ');
+
+// The lock range of PLL 
+//FL = (1/2*%pi*f)*(Fvco/tcap);
+FL = (3/(2*%pi*f*tcap));
+disp('The lock range of PLL FL is = '+string(FL)+ ' Hz ');
+
+// the capture range 
+fcap = sqrt(f*FL);
+disp('The capture range is = '+string(fcap)+ ' Hz ');
-- 
cgit