From b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b Mon Sep 17 00:00:00 2001
From: priyanka
Date: Wed, 24 Jun 2015 15:03:17 +0530
Subject: initial commit / add all books

---
 1583/CH8/EX8.1/PLL_Ex_8_1.sce | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100755 1583/CH8/EX8.1/PLL_Ex_8_1.sce

(limited to '1583/CH8/EX8.1/PLL_Ex_8_1.sce')

diff --git a/1583/CH8/EX8.1/PLL_Ex_8_1.sce b/1583/CH8/EX8.1/PLL_Ex_8_1.sce
new file mode 100755
index 000000000..58b0b5257
--- /dev/null
+++ b/1583/CH8/EX8.1/PLL_Ex_8_1.sce
@@ -0,0 +1,16 @@
+clc
+//Chapter 8:Linear model of phase locked loop
+//example 8.1 page no 314
+//given
+fo=1*10^6//output frequency
+fr=25*10^3//reference frequency
+N=fo/fr
+Kd=2//phase detector gain factor
+Ko=100//VCO gain factor
+thetao=(2*100*2*%pi)//output phase
+s=poly(0,"s")
+thetar=s+(2*100*2*%pi)/N//input phase
+Tf=thetao/thetar
+disp(Tf,'the closed loop transfer function is ')
+Kv=Kd*Ko/N//bandwidth
+mprintf('the synthesizer bandwidth will be %d Hz',Kv)
-- 
cgit