From b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b Mon Sep 17 00:00:00 2001
From: priyanka
Date: Wed, 24 Jun 2015 15:03:17 +0530
Subject: initial commit / add all books

---
 1583/CH2/EX2.8/Result_of_Chapter_2_Ex2_8.jpg | Bin 0 -> 156809 bytes
 1583/CH2/EX2.8/SSA_Ex_2_8.sce                |  13 +++++++++++++
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 create mode 100755 1583/CH2/EX2.8/Result_of_Chapter_2_Ex2_8.jpg
 create mode 100755 1583/CH2/EX2.8/SSA_Ex_2_8.sce

(limited to '1583/CH2/EX2.8')

diff --git a/1583/CH2/EX2.8/Result_of_Chapter_2_Ex2_8.jpg b/1583/CH2/EX2.8/Result_of_Chapter_2_Ex2_8.jpg
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diff --git a/1583/CH2/EX2.8/SSA_Ex_2_8.sce b/1583/CH2/EX2.8/SSA_Ex_2_8.sce
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+clc
+//Chapter 2:Small Signal Amplifiers
+//example 2.8 page no 42
+//given
+disp('Assuming Vi (input voltage)=1')
+V1=(5+10^6)/(5+2*10^6)//voltage on the positive terminal
+V2=10^6/(5+2*10^6)//the voltage on the inverting terminal
+ed=V1-V2//differential voltage
+ec=(V1+V2)/2//common-mode voltage
+Ad=2*10^3//differentail gain
+Ac=2*10^-3//common mode gain (here 20% of differentail gain)
+Vo=Ad*ed+Ac*ec//actual amplifier output
+mprintf('the voltage gain is %3.2e Volts',Vo)
-- 
cgit