From b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b Mon Sep 17 00:00:00 2001
From: priyanka
Date: Wed, 24 Jun 2015 15:03:17 +0530
Subject: initial commit / add all books

---
 1223/CH3/EX3.6/Ex3_6.sce | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100755 1223/CH3/EX3.6/Ex3_6.sce

(limited to '1223/CH3/EX3.6')

diff --git a/1223/CH3/EX3.6/Ex3_6.sce b/1223/CH3/EX3.6/Ex3_6.sce
new file mode 100755
index 000000000..548fa58fe
--- /dev/null
+++ b/1223/CH3/EX3.6/Ex3_6.sce
@@ -0,0 +1,32 @@
+clear;
+clc;
+//Example 3.6
+Vbe=0.7;
+b=75;
+//Q point values::
+//using KVL eq around the B-E loop
+//Vbb=Ib*Re+Vbe+Ie*Re
+//assuming transistor is in forward biased mode we can write Ie=(1+b)*Ib
+Vbb=6;
+Rb=25;//KOhm
+Re=0.6;//KOhm
+Ib=(Vbb-Vbe)/(Rb+(1+b)*Re);
+printf('\nbase current=%f mA\n',Ib)
+Ic=b*Ib;
+printf('\ncollector current=%0.2f mA\n',Ic)
+Ie=(1+b)*Ib;
+printf('\nemitter current=%0.2f mA\n',Ie)
+Vcc=12;
+Rc=0.4;
+Vce=Vcc-Ic*Rc-Ie*Re;
+printf('\ncollector emitter voltage=%0.2f V\n',Vce)
+//load line::
+//using KVL law around C-E loop
+//Vce=Vcc-(Ic*(Rc+((1+B)/B)*Re));
+Ic=[0,12,5.63]
+Vce=12-Ic*1;
+xset('window',1)
+plot2d(Vce,Ic,style=3)
+title("load line")
+xlabel("Vce")
+ylabel("Ic")
-- 
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