{ "metadata": { "name": "" }, "nbformat": 3, "nbformat_minor": 0, "worksheets": [ { "cells": [ { "cell_type": "heading", "level": 1, "metadata": {}, "source": [ "Chapter 06 : Digital Circuits" ] }, { "cell_type": "heading", "level": 2, "metadata": {}, "source": [ "Example 6.1, Page No 165" ] }, { "cell_type": "code", "collapsed": false, "input": [ "import math\n", "#initialisation of variables\n", "\n", "R1=15.0 #in K\n", "R2=100.0 #in K\n", "#R1 and R2 are voltages at base which acts as potential divider\n", "Rc=2.2 #voltage at collector in K\n", "hfe=30.0\n", "\n", "\n", "\n", "#Calculations\n", "#For vi=0\n", "Vb = (R1/(R1+R2))*(-12) #Voltage at base in V\n", "\n", "print(\"Vb= %.2f V \" %Vb)\n", "#A bias of 0V is required to cut off a silicon emitter junction transistor given in table\n", "Vo = 0 #in V\n", "print(\"Vo = %.2f V \" %Vo)\n", "\n", "#For vi=12\n", "vi=12 #in V\n", "#Few standard values for silicon transistor\n", "Vbesat=0.8 #in V\n", "Vcesat=0.2 #in V\n", "\n", "#Assumption: Q is in saturation region\n", "Ic = (vi-Vcesat)/Rc #Collector Current\n", "print(\"Ic=%.2f v \" %Ic)\n", "Ibmin=(Ic/hfe) #Mininmum current at the base\n", "print(\"Ibmin=%.2f mA\" %Ibmin)\n", "I1=(vi-Vbesat)/R1 #Current in R1\n", "I2=(Vbesat-(-12))/100 #Current in R2\n", "Ib = I1-I2 #Base current\n", "print(\"Ib = %.2f mA \" %Ib)\n", "\n", "#Results\n", "if Ib>Ibmin :\n", " print('Since Ib>Ibmin , The transistor is in saturation region and drop is Vcesat')\n", " vo=Vcesat\n", " print(\"vo = %.2f V \" %vo)" ], "language": "python", "metadata": {}, "outputs": [ { "output_type": "stream", "stream": "stdout", "text": [ "Vb= -1.57 V \n", "Vo = 0.00 V \n", "Ic=5.36 v \n", "Ibmin=0.18 mA\n", "Ib = 0.62 mA \n", "Since Ib>Ibmin , The transistor is in saturation region and drop is Vcesat\n", "vo = 0.20 V \n" ] } ], "prompt_number": 1 }, { "cell_type": "heading", "level": 2, "metadata": {}, "source": [ "Example 6.2, Page No 167" ] }, { "cell_type": "code", "collapsed": false, "input": [ "import math\n", "\n", "#initialisation of variables\n", "#Caption: To verify given equation\n", "\n", "print('NOTE: We will write A with a bar on its top as a ')\n", "print('To verify')\n", "print(' A + aB = A + B')\n", "\n", "print('We know that B + 1 = 1 and A1 = A')\n", "print('A + aB = A(B+1) + aB = AB + A + aB =')\n", "print('(A + a)B + A = B + A')\n", "print('which is equal to RHS')\n" ], "language": "python", "metadata": {}, "outputs": [ { "output_type": "stream", "stream": "stdout", "text": [ "NOTE: We will write A with a bar on its top as a \n", "To verify\n", " A + aB = A + B\n", "We know that B + 1 = 1 and A1 = A\n", "A + aB = A(B+1) + aB = AB + A + aB =\n", "(A + a)B + A = B + A\n", "which is equal to RHS\n" ] } ], "prompt_number": 2 }, { "cell_type": "heading", "level": 2, "metadata": {}, "source": [ "Example 6.3a Page No 167" ] }, { "cell_type": "code", "collapsed": false, "input": [ "import math\n", "\n", "#initialisation of variables\n", "\n", "R=15.0 #in K\n", "R1=15.0 #in K\n", "R2=100.0 #in K\n", "R3=2.2 #in K\n", "V0=0 #in V\n", "V1=12.0 #in V\n", "Vcc=12.0 #in V\n", "\n", "#If input is at V0=0V\n", "Vb = -Vcc*(R1/(R1+R2)) #The base voltage of the transistor\n", "\n", "#Calculations\n", "print(\"The base voltage of transistor Vb= %.2f v \" %Vb)\n", "if Vb<0 :\n", " print('Q is cutoff and Y is at 12V')\n", " print('The result confirms the first three rows of truth table')\n", "\n", "\n", "#If input is at V1 = 12V\n", "#Assumption:All the diodes are reversed biased and transistor is in saturation\n", "#If Q is in saturation\n", "Vbe=0 #in V\n", "Vp = V1*(R/(R+R1)) #voltage at point P in front of all diodes\n", "print(\"All diodes are reversed biased by %.2f V \" %Vp)\n", "Iq = (V1/(R+R1)-(V1/R2)) #The base current of Q\n", "Ic=V1/R3 #Current in the collector junction\n", "print(\"Ic= %.2f mA \" %Ic)\n", "hFEmin = Ic/Iq\n", "\n", "#Results\n", "print(\"hFEmin=%.2f \" %hFEmin)\n", "print(\"When hFE > %.2f \" %hFEmin)\n", "print('Under these condition the output is at ground and this satisfies the first three rows of truth table')" ], "language": "python", "metadata": {}, "outputs": [ { "output_type": "stream", "stream": "stdout", "text": [ "The base voltage of transistor Vb= -1.57 v \n", "Q is cutoff and Y is at 12V\n", "The result confirms the first three rows of truth table\n", "All diodes are reversed biased by 6.00 V \n", "Ic= 5.45 mA \n", "hFEmin=19.48 \n", "When hFE > 19.48 \n", "Under these condition the output is at ground and this satisfies the first three rows of truth table\n" ] } ], "prompt_number": 3 }, { "cell_type": "heading", "level": 2, "metadata": {}, "source": [ "Example 6.3b, Page No 167" ] }, { "cell_type": "code", "collapsed": false, "input": [ "import math\n", "#initialisation of variables\n", "\n", "R=15.0 #in K\n", "R1=15.0 #in K\n", "R2=100.0 #in K\n", "R3=2.2 #in K\n", "V0=0 #in V\n", "V1=12.0 #in V\n", "Vcc=12.0 #in V\n", "\n", "#Calculations\n", "#If input is at V0=0V\n", "Vb = -Vcc*(R1/(R1+R2)) #Base Current in V\n", "\n", "#Finding thevenin equivallent fom P to ground\n", "Rd = 1.0 #in K\n", "Vd=0.7 #in v\n", "Vr=1.0 #in K\n", "#Thevenin Equivallent Voltage and resistance from P to ground\n", "v = (Vcc*(Rd/(Rd+R)))+(Vd*(R/(R+Rd)))\n", "rs = Rd*(R/(R+Rd))\n", "#Open Circuit Voltage at base of the transistor\n", "Vb1 = (-Vcc*((R1+rs)/(R1+R2+rs))) + (v*(R2/(R1+R2+rs)))\n", "\n", "#Results\n", "print(\"Vb1 = %.2f v \" %Vb1)\n", "\n", "if Vb1>Vb :\n", " print('The voltage is adequate to reverse bias Q')" ], "language": "python", "metadata": {}, "outputs": [ { "output_type": "stream", "stream": "stdout", "text": [ "Vb1 = -0.44 v \n", "The voltage is adequate to reverse bias Q\n" ] } ], "prompt_number": 4 }, { "cell_type": "heading", "level": 2, "metadata": {}, "source": [ "Example 6.3c Page No 168" ] }, { "cell_type": "code", "collapsed": false, "input": [ "import math\n", "#initialisation of variables\n", "R=15.0 #in K\n", "R1=15.0 #in K\n", "R2=100.0 #in K\n", "R3=2.2 #in K\n", "V0=0 #in V\n", "V1=12.0 #in V\n", "Vcc=12.0 #in V\n", "\n", "#Calculations\n", "#To find wether with given conditions NANAD gate is satisfied\n", "#Finding thevenin equivallent from P to ground\n", "Rd = 1 #in K\n", "Vd=0.7 #in v\n", "Vr=1.0 #in K\n", "v = (Vcc*(Rd/(Rd+R)))+(Vd*(R/(R+Rd)))\n", "rs = Rd*(R/(R+Rd))\n", "\n", "#If the inputs are high\n", "\n", "Vcesat = 0.2 #in V\n", "Vb2 = (-Vcc*(R1/(R1+R2)) + ((Vd+Vcesat)*R2/(R1+R2)))\n", "\n", "#Results\n", "print(\"Vb2= %.2f V \" %Vb2)\n", "print('It cuts off Q Y=1 ')" ], "language": "python", "metadata": {}, "outputs": [ { "output_type": "stream", "stream": "stdout", "text": [ "Vb2= -0.78 V \n", "It cuts off Q Y=1 \n" ] } ], "prompt_number": 5 }, { "cell_type": "heading", "level": 2, "metadata": {}, "source": [ "Example 6.4 Page No 169" ] }, { "cell_type": "code", "collapsed": false, "input": [ "import math\n", "\n", "#initialisation of variables\n", "#Caption: To verify that AND-OR topology is equivallent to NAND-NAND system\n", "\n", "print('In digital electronics we have to come across situations where we need to use an inpout with a bar but here we will denote as')\n", "print('X with a bar = Xb and X with two bars = Xbb')\n", "\n", "#Solution\n", "print('We know that X =Xbb')\n", "print('For AND OR logic the output of AND and simultaneously neglecting the input to following OR does not change the logic')\n", "print('We have also neglected the output of the OR gate and at the same time have added an INVERTER so that logic is once again unaffected')\n", "print('AN OR gate neglected at each terminal is an an AND circuit')\n", "print('Since AND followed by an inverter is NAND ')\n", "print('Hencee the NAND NAND is equivallent to AND OR')\n" ], "language": "python", "metadata": {}, "outputs": [ { "output_type": "stream", "stream": "stdout", "text": [ "In digital electronics we have to come across situations where we need to use an inpout with a bar but here we will denote as\n", "X with a bar = Xb and X with two bars = Xbb\n", "We know that X =Xbb\n", "For AND OR logic the output of AND and simultaneously neglecting the input to following OR does not change the logic\n", "We have also neglected the output of the OR gate and at the same time have added an INVERTER so that logic is once again unaffected\n", "AN OR gate neglected at each terminal is an an AND circuit\n", "Since AND followed by an inverter is NAND \n", "Hencee the NAND NAND is equivallent to AND OR\n" ] } ], "prompt_number": 6 }, { "cell_type": "heading", "level": 2, "metadata": {}, "source": [ "Example 6.5a, Page No 179 " ] }, { "cell_type": "code", "collapsed": false, "input": [ "import math\n", "#initialisation of variables\n", "#Caption:To find hFEmin\n", "#Given Data\n", "#For transistor\n", "Vbesat=0.8#Vgamma of diode in V\n", "Vy=0.5#in V\n", "Vcesat=0.2#in V\n", "R = 5#in K\n", "Rc = 2.2#in K\n", "\n", "#For diode\n", "Vyd=0.6#in V\n", "Vdrop=0.7#in V\n", "\n", "#Calculations\n", "#The logic levels are Vcesato=0.2V for 0 state\n", "Vcesato=0.2#in V\n", "#The logic levels are Vcc=5V for 1 state\n", "Vcc=5#in V\n", "print('If atleast one input is in 0 state')\n", "Vp = Vcesato + Vy#Potential at point P\n", "print(\"Vp= %.2f V \" %Vp)\n", "#For diodes D1 and D2 to be conducting\n", "v = 2*Vdrop\n", "print('For diodes D1 and D2 to be conducting')\n", "print(\"required voltage = %.2f V \" %v)\n", "#These diodes cutoff\n", "Vbe = 0\n", "if VbeVy :\n", " print('Q is ON')" ], "language": "python", "metadata": {}, "outputs": [ { "output_type": "stream", "stream": "stdout", "text": [ "If atleast one input is in 0 state\n", "Vp= 0.90 v \n", "Vbe = 0.30 v \n", "Q is cutoff\n" ] } ], "prompt_number": 8 }, { "cell_type": "heading", "level": 2, "metadata": {}, "source": [ "Example 6.5c Page No 179" ] }, { "cell_type": "code", "collapsed": false, "input": [ "import math\n", "#initialisation of variables\n", "\n", "Vbesat=0.8#in V\n", "Vy=0.5#in V\n", "R = 5#in K\n", "Rc = 2.2#in K\n", "\n", "#Calculations\n", "#For diode\n", "Vyd=0.6#in V\n", "Vdrop=0.7#in V\n", "\n", "#Calculations\n", "#The logic levels are Vcesato=0.2V for 0 state\n", "Vcesato=0.2#in V\n", "Vp = Vdrop + Vdrop + Vbesat#Voltage at point P\n", "\n", "#Results\n", "print(\"Vp= %.2f v \" %Vp)\n", "print(\"Each diode is reversed biased by %.2f v \" %(Vcc-Vp))\n", "print(\"A diode starts to conduct when it is forward bias by %.2f v \" %Vyd)\n", "vn = (Vcc-Vp) + Vyd #Noise Spike which will cause the malfunction\n", "print(\"A noise spike which will cause malfunction is %.2f v \" %vn)" ], "language": "python", "metadata": {}, "outputs": [ { "output_type": "stream", "stream": "stdout", "text": [ "Vp= 2.20 v \n", "Each diode is reversed biased by 2.80 v \n", "A diode starts to conduct when it is forward bias by 0.60 v \n", "A noise spike which will cause malfunction is 3.40 v \n" ] } ], "prompt_number": 9 }, { "cell_type": "heading", "level": 2, "metadata": {}, "source": [ "Example 6.5d Page No 180" ] }, { "cell_type": "code", "collapsed": false, "input": [ "import math\n", "\n", "#initialisation of variables\n", "\n", "#For transistor\n", "Vbesat=0.8#in V\n", "Vy=0.5#in V\n", "R = 5#in K\n", "Rc = 2.2#in K\n", "\n", "#The logic levels are Vcesato=0.2V for 0 state\n", "Vcesato=0.2#in V\n", "#For diode\n", "\n", "#Calculations\n", "Vyd=0.6#in V\n", "Vdrop=0.7#in V\n", "\n", "Vp = Vcesato + Vdrop#Voltage at point P\n", "print(\"Vp= %.2f v \" %Vp)\n", "Vbe = Vy#Voltage at base emitter will be same as Vgamma\n", "vp = Vbe + Vyd +Vyd#The level to which vp should increase\n", "Vn = vp - Vp#Noise Margin\n", "\n", "#Results\n", "print(\"Noise Margin = %.2f v \" %Vn)" ], "language": "python", "metadata": {}, "outputs": [ { "output_type": "stream", "stream": "stdout", "text": [ "Vp= 0.90 v \n", "Noise Margin = 0.80 v \n" ] } ], "prompt_number": 10 }, { "cell_type": "heading", "level": 2, "metadata": {}, "source": [ "Example 6.6, Page No 92" ] }, { "cell_type": "code", "collapsed": false, "input": [ "import math\n", "\n", "#initialisation of variables\n", "\n", "hFE=30\n", "Vbe1active=0.7#in V\n", "Vd2=0.7#in V\n", "Vbe2sat=0.8#in V\n", "Vcc=5#in V\n", "R1=1.75#in K\n", "R2=2#in K\n", "R3=2.2#in K\n", "R4=5#in K\n", "\n", "\n", "#Calculations\n", "Vp = Vbe1active + Vd2 + Vbe2sat#Voltage at point P\n", "#The current in 2K resistor is Ib1\n", "#In active region\n", "#Ic1=hFE*Ib1\n", "#I1 = Ib1+Ic1=(1+hFE)*Ib1.... Now applying KVL between Vcc and Vp\n", "#Vcc-Vp = R1*(1+hFE)*Ib1 + 2*Ib1\n", "Ib1 = (Vcc-Vp)/(R1*(1+hFE)+2)#Base current in transistor 1\n", "print(\"Ib1= %.2f mA \" %Ib1)\n", "Ic1=hFE*Ib1#Collector Current in transistor 1\n", "print(\"Ic1= %.2f mA \" %Ic1)\n", "I1 = Ib1 + Ic1#in mA\n", "I2=Vbe2sat/R4#in mA\n", "Ib2 = I1-I2#Base Current in Transistor 2\n", "#The unloaded current of Q2\n", "Iq2=(Vcc-0.2)/R3\n", "#For each gate which it drive ,Q2 must sink a standard load of\n", "I=(Vcc-Vd2-0.2)/(R1+R2)\n", "#To Calculate the FAN OUT\n", "#The maximum current is hFE*Ib2\n", "#hFE*Ib2 = (I*N) + Iq2\n", "N=((hFE*Ib2)-Iq2)/I#FAN OUT\n", "\n", "#Results\n", "print(\"N = %.2f v \" %N)\n" ], "language": "python", "metadata": {}, "outputs": [ { "output_type": "stream", "stream": "stdout", "text": [ "Ib1= 0.05 mA \n", "Ic1= 1.49 mA \n", "N = 35.96 v \n" ] } ], "prompt_number": 11 } ], "metadata": {} } ] }