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path: root/demos/test_xil_95108/carte_test.pro
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update=30/10/2015 11:04:44
version=1
last_client=kicad
[pcbnew]
version=1
LibDir=
Sel_Mod=1
NetType=0
PadDril=320
PadDimH=550
PadDimV=550
PadOfDH=0
PadOfDV=0
PadForm=1
PadMask=14745599
PadAttr=0
PadOrie=0
ViaDiam=450
ViaDril=250
Isol=100
Mlayer=536838151
Lpiste=250
RouteTo=15
RouteBo=0
TypeVia=3
Segm45=1
Racc45=1
Unite=0
SegFill=1
SegAffG=0
NewAffG=1
PadFill=1
PadAffG=1
PadSNum=1
ModAffC=0
ModAffT=0
PcbAffT=0
SgPcb45=1
TxtPcbV=600
TxtPcbH=600
GridX=500
GridY=500
TxtModV=500
TxtModH=500
TxtModW=80
HPGLnum=1
Pltmarg=300
HPGdiam=15
HPGLSpd=20
HPGLrec=2
HPGLorg=0
GERBmin=15
GERBfmt=1
VEgarde=100
DrawLar=120
EdgeLar=120
TxtLar=80
MSegLar=120
ForPlot=1
WpenSer=10
UserGrX=500
UserGrY=500
UserGrU=1
DivGrPc=1
TimeOut=600
ShowRat=0
ShowMRa=0
[pcbnew/libraries]
LibName1=connect
LibName2=discret
LibName3=pin_array
LibName4=divers
LibName5=libcms
LibName6=dip_sockets
LibDir=
[cvpcb]
version=1
NetIExt=.net
[cvpcb/libraries]
EquName1=devcms
[general]
version=1
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=device
LibName2=carte_test_schlib
LibName3=power