Merge pull request #4 from FOSSEE/develop

merging dev into master

4 files changed, 695 insertions, 0 deletions

diff --git a/demos/pspice/pspice-cache.lib b/demos/pspice/pspice-cache.lib
new file mode 100644
index 0000000..06bcb9c
--- /dev/null
+++ b/demos/pspice/pspice-cache.lib
@@ -0,0 +1,115 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# +12V
+#
+DEF +12V #PWR 0 0 N Y 1 F N
+F0 "#PWR" 0 200 40 H I C CNN
+F1 "+12V" 0 150 40 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+X +12V 1 0 0 0 R 40 40 0 0 W N
+C 0 80 20 0 1 0 N
+P 2 0 1 0  0 60  0 0 N
+ENDDRAW
+ENDDEF
+#
+# 0
+#
+DEF 0 #GND 0 0 Y Y 1 F P
+F0 "#GND" 0 -100 40 H I C CNN
+F1 "0" 0 -70 40 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0  -50 0  0 -50  50 0  -50 0 N
+X 0 1 0 0 0 R 40 40 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# CAP
+#
+DEF CAP C 0 10 Y Y 1 F N
+F0 "C" 100 150 50 V V C CNN
+F1 "CAP" 100 -150 50 V V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS C
+DRAW
+P 2 0 1 0  -150 -50  150 -50 N
+P 2 0 1 0  -150 50  150 50 N
+X ~ 1 0 250 200 D 40 40 1 1 P
+X ~ 2 0 -250 200 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# INDUCTOR
+#
+DEF INDUCTOR L 0 0 N Y 1 F N
+F0 "L" 0 100 50 H V C CNN
+F1 "INDUCTOR" 0 -50 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A -150 0 50 1 1799 0 1 0 N -100 0 -200 0
+A -50 0 50 1 1799 0 1 0 N 0 0 -100 0
+A 50 0 50 1 1799 0 1 0 N 100 0 0 0
+A 150 0 50 1 1799 0 1 0 N 200 0 100 0
+X 1 1 -250 0 50 R 30 30 1 1 I
+X 2 2 250 0 50 L 30 30 1 1 I
+ENDDRAW
+ENDDEF
+#
+# QNPN
+#
+DEF QNPN Q 0 0 Y Y 1 F N
+F0 "Q" -100 300 50 H V C CNN
+F1 "QNPN" -100 200 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 2 0 0 0  0 0  150 -150 N
+P 4 0 0 0  150 -150  150 -50  50 -150  150 -150 F
+P 2 0 1 0  0 -150  0 150 N
+P 2 0 1 0  0 0  150 150 N
+P 4 0 1 0  -100 -150  0 -150  0 -150  0 -150 N
+X C 1 150 350 200 D 40 40 1 1 P
+X B 2 -300 0 300 R 40 40 1 1 I
+X E 3 150 -350 200 U 40 40 1 1 P
+X Substrat 4 -100 -350 200 U 50 20 1 1 I
+ENDDRAW
+ENDDEF
+#
+# R
+#
+DEF R R 0 0 N Y 1 F N
+F0 "R" 80 0 50 V V C CNN
+F1 "R" 0 0 50 V V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -40 150 40 -150 0 1 0 N
+X ~ 1 0 250 100 D 60 60 1 1 P
+X ~ 2 0 -250 100 U 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# VSOURCE
+#
+DEF VSOURCE V 0 40 Y Y 1 F N
+F0 "V" 0 -100 60 H V C CNN
+F1 "VSOURCE" 0 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 0 0 400 0 1 0 N
+T 0 -320 -10 100 0 0 1 V  Normal 0 C C
+P 2 0 1 0  -250 -250  -250 150 F
+P 3 0 1 0  -300 150  -250 250  -200 150 F
+X E1 1 0 700 300 D 60 60 1 1 I
+X E2 2 0 -700 300 U 60 60 1 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/demos/pspice/pspice.cir b/demos/pspice/pspice.cir
new file mode 100644
index 0000000..0c78a13
--- /dev/null
+++ b/demos/pspice/pspice.cir
@@ -0,0 +1,33 @@
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/01/2014 19:00:38
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+*Sheet Name:/
+R12  /VOUT Net-_L1-Pad1_ 22K		
+R11  +12V Net-_L1-Pad1_ 100		
+L1  Net-_L1-Pad1_ /VOUT 100mH		
+R10  Net-_C3-Pad1_ Net-_Q3-Pad3_ 220		
+C3  Net-_C3-Pad1_ 0 10uF		
+C2  Net-_C2-Pad1_ 0 1nF		
+R8  Net-_Q3-Pad3_ 0 2.2K		
+Q3  /VOUT Net-_C2-Pad1_ Net-_Q3-Pad3_ Net-_Q3-Pad3_ Q2N2222		
+V2  Net-_C1-Pad2_ 0 AC 0.1		
+C1  /VIN Net-_C1-Pad2_ 1UF		
+V1  +12V 0 DC 12V		
+R2  /VIN 0 10K		
+R6  +12V /VIN 22K		
+R5  +12V Net-_Q2-Pad2_ 22K		
+R1  Net-_Q2-Pad2_ 0 10K		
+R7  Net-_Q1-Pad3_ 0 470		
+R4  +12V Net-_C2-Pad1_ 1K		
+R3  +12V Net-_Q1-Pad1_ 1K		
+Q2  Net-_C2-Pad1_ Net-_Q2-Pad2_ Net-_Q1-Pad3_ Net-_Q1-Pad3_ Q2N2222		
+Q1  Net-_Q1-Pad1_ /VIN Net-_Q1-Pad3_ Net-_Q1-Pad3_ Q2N2222		
+
+.model Q2N2222 npn (bf=200)
+.print tran v(nodes)
+.print dc v(nodes)
+.tran 10 10000 10 > pspice.dat
+
+.end
diff --git a/demos/pspice/pspice.pro b/demos/pspice/pspice.pro
new file mode 100644
index 0000000..3151f0d
--- /dev/null
+++ b/demos/pspice/pspice.pro
@@ -0,0 +1,49 @@
+update=05/01/2014 19:00:46
+last_client=eeschema
+[general]
+version=1
+RootSch=pspice.sch
+BoardNm=pspice.brd
+[pcbnew]
+version=1
+PadDrlX=320
+PadDimH=600
+PadDimV=600
+BoardThickness=630
+SgPcb45=1
+TxtPcbV=800
+TxtPcbH=600
+TxtModV=600
+TxtModH=600
+TxtModW=120
+VEgarde=100
+DrawLar=150
+EdgeLar=150
+TxtLar=120
+MSegLar=150
+LastNetListRead=
+[pcbnew/libraries]
+LibDir=
+LibName1=sockets
+LibName2=connect
+LibName3=discret
+LibName4=pin_array
+LibName5=divers
+LibName6=libcms
+LibName7=display
+LibName8=valves
+LibName9=led
+LibName10=dip_sockets
+[eeschema]
+version=1
+PageLayoutDescrFile=
+SubpartIdSeparator=0
+SubpartFirstId=65
+LibDir=
+NetFmtName=Spice
+RptD_X=0
+RptD_Y=100
+RptLab=1
+LabSize=60
+[eeschema/libraries]
+LibName1=pspice
diff --git a/demos/pspice/pspice.sch b/demos/pspice/pspice.sch
new file mode 100644
index 0000000..9e64a24
--- /dev/null
+++ b/demos/pspice/pspice.sch
@@ -0,0 +1,498 @@
+EESchema Schematic File Version 2
+LIBS:pspice
+LIBS:pspice-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date "Sun 22 Mar 2015"
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+Text Label 4550 2800 0    60   ~ 0
+VIN
+Text Label 8650 2100 0    60   ~ 0
+VOUT
+Wire Notes Line
+	1100 7100 1100 6200
+Wire Notes Line
+	1100 7100 3900 7100
+Wire Notes Line
+	3900 7100 3900 6200
+Wire Notes Line
+	3900 6200 1100 6200
+Wire Wire Line
+	4400 2800 5300 2800
+Connection ~ 9200 1800
+Wire Wire Line
+	8700 1800 9200 1800
+Wire Wire Line
+	7800 1800 8200 1800
+Wire Wire Line
+	7800 1450 7800 1800
+Wire Wire Line
+	7800 1500 8250 1500
+Wire Wire Line
+	9200 1500 9200 2100
+Wire Wire Line
+	8250 2900 8400 2900
+Connection ~ 7050 2450
+Wire Wire Line
+	7050 2600 7050 2450
+Connection ~ 5750 3200
+Connection ~ 6100 3200
+Wire Wire Line
+	6350 3200 6350 3150
+Wire Wire Line
+	5500 3200 6350 3200
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 5100 2800
+Connection ~ 6700 2800
+Wire Wire Line
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+Wire Wire Line
+	6700 2300 6700 3300
+Wire Wire Line
+	5100 2300 5100 3300
+Wire Wire Line
+	9200 2100 7700 2100
+Text Notes 1150 6600 0    60   ~ 0
++gnucap .model Q2N2222 npn (bf=200)\n.print tran v(nodes)\n.print dc v(nodes)\n.tran 10 10000 10 > pspice.dat\n
+Text Notes 1100 6200 0    60   ~ 0
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+	7700 2850 7450 2850
+Wire Wire Line
+	7450 2850 7450 2800
+Connection ~ 7700 2850
+Wire Wire Line
+	6700 1750 6700 1800
+Wire Wire Line
+	6100 1750 6100 1800
+Wire Wire Line
+	5750 1750 5750 1800
+Wire Wire Line
+	5100 1750 5100 1800
+Wire Wire Line
+	7800 900  7800 950 
+$EndSCHEMATC