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FreeEDA/.git
master
Tool for circuit design, simulation, analysis and PCB design (previously known as Oscad)
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path:
root
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OSCAD
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LPCSim
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backup
Mode
Name
Size
-rw-r--r--
LPCSim_1.0_030912.tgz
18856
log
plain
-rw-r--r--
LPCSim_1.0_300812.tgz
17273
log
plain
-rw-r--r--
Readme
248
log
plain