| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | ids.cpp | 9700 | logplain |
| -rw-r--r-- | ids.o | 16212 | logplain |
| -rw-r--r-- | ids.sce | 300 | logplain |
| -rw-r--r-- | libids.so | 20781 | logplain |
| -rw-r--r-- | script.sh | 94 | logplain |
| -rw-r--r-- | spice_vbs_0p0.txt | 16506 | logplain |
| -rw-r--r-- | spice_vbs_0p2.txt | 16499 | logplain |
| -rw-r--r-- | spice_vbs_0p4.txt | 16500 | logplain |
| -rw-r--r-- | spice_vbs_0p6.txt | 16500 | logplain |
| -rw-r--r-- | spice_vbs_0p8.txt | 16500 | logplain |
| -rw-r--r-- | spice_vbs_1p0.txt | 16501 | logplain |
| -rw-r--r-- | spice_vbs_1p2.txt | 16500 | logplain |
| -rw-r--r-- | spice_vbs_1p4.txt | 16500 | logplain |
| -rw-r--r-- | spice_vbs_1p6.txt | 16498 | logplain |
| -rw-r--r-- | spice_vbs_1p8.txt | 16500 | logplain |
| -rw-r--r-- | vbs_files.txt | 270 | logplain |
 |
index : FreeEDA/.git | |
| Tool for circuit design, simulation, analysis and PCB design (previously known as Oscad) |
| summaryrefslogtreecommitdiff |