From c632c1009c9e095135220c809d7c799841f160b3 Mon Sep 17 00:00:00 2001 From: Fahim Date: Tue, 9 Sep 2014 16:11:17 +0530 Subject: Subject: Changing all content and name of directory and file to FreeEDA Description: The content of file,name of directory and file has been changed in the below format. 1. Oscad to FreeEDA 2. OSCAD to FreeEDA 3. oscad to freeeda --- .../Examples/BJT_amplifier/BJT_amplifier-cache.bak | 133 + .../Examples/BJT_amplifier/BJT_amplifier-cache.lib | 133 + FreeEDA/Examples/BJT_amplifier/BJT_amplifier.bak | 240 + FreeEDA/Examples/BJT_amplifier/BJT_amplifier.cir | 21 + .../Examples/BJT_amplifier/BJT_amplifier.cir.ckt | 20 + .../Examples/BJT_amplifier/BJT_amplifier.cir.out | 25 + FreeEDA/Examples/BJT_amplifier/BJT_amplifier.pro | 74 + FreeEDA/Examples/BJT_amplifier/BJT_amplifier.proj | 1 + FreeEDA/Examples/BJT_amplifier/BJT_amplifier.sch | 240 + FreeEDA/Examples/BJT_amplifier/analysis | 2 + FreeEDA/Examples/BJT_amplifier/npn.lib | 6 + FreeEDA/Examples/BasicGates/$savepcb.brd | 84 + FreeEDA/Examples/BasicGates/BasicGates-cache.bak | 324 + FreeEDA/Examples/BasicGates/BasicGates-cache.lib | 331 + FreeEDA/Examples/BasicGates/BasicGates.bak | 347 + FreeEDA/Examples/BasicGates/BasicGates.cir | 20 + FreeEDA/Examples/BasicGates/BasicGates.cir.ckt | 59 + FreeEDA/Examples/BasicGates/BasicGates.cir.out | 64 + FreeEDA/Examples/BasicGates/BasicGates.cmp | 101 + FreeEDA/Examples/BasicGates/BasicGates.net | 112 + FreeEDA/Examples/BasicGates/BasicGates.pro | 71 + FreeEDA/Examples/BasicGates/BasicGates.proj | 1 + FreeEDA/Examples/BasicGates/BasicGates.sch | 347 + FreeEDA/Examples/BasicGates/analysis | 1 + FreeEDA/Examples/FlipFlops/FlipFlops-cache.bak | 140 + FreeEDA/Examples/FlipFlops/FlipFlops-cache.lib | 147 + FreeEDA/Examples/FlipFlops/FlipFlops.bak | 303 + FreeEDA/Examples/FlipFlops/FlipFlops.cir | 18 + FreeEDA/Examples/FlipFlops/FlipFlops.cir.ckt | 25 + FreeEDA/Examples/FlipFlops/FlipFlops.cir.out | 30 + FreeEDA/Examples/FlipFlops/FlipFlops.cir.out1 | 34 + FreeEDA/Examples/FlipFlops/FlipFlops.pro | 70 + FreeEDA/Examples/FlipFlops/FlipFlops.proj | 1 + FreeEDA/Examples/FlipFlops/FlipFlops.sch | 303 + FreeEDA/Examples/FlipFlops/analysis | 1 + .../IC555AstableMultivibrator-cache.bak | 145 + .../IC555AstableMultivibrator-cache.lib | 145 + .../IC555AstableMultivibrator.bak | 252 + .../IC555AstableMultivibrator.brd | 84 + .../IC555AstableMultivibrator.cir | 17 + .../IC555AstableMultivibrator.cir.ckt | 18 + .../IC555AstableMultivibrator.cir.out | 23 + .../IC555AstableMultivibrator.net | 110 + .../IC555AstableMultivibrator.pro | 71 + .../IC555AstableMultivibrator.proj | 1 + .../IC555AstableMultivibrator.sch | 244 + .../Examples/IC555AstableMultivibrator/analysis | 2 + .../IC555AstableMultivibrator/lm555n-cache.bak | 207 + .../IC555AstableMultivibrator/lm555n-cache.lib | 207 + .../Examples/IC555AstableMultivibrator/lm555n.bak | 435 ++ .../Examples/IC555AstableMultivibrator/lm555n.cir | 25 + .../IC555AstableMultivibrator/lm555n.cir.ckt | 35 + .../IC555AstableMultivibrator/lm555n.cir.out | 35 + .../Examples/IC555AstableMultivibrator/lm555n.pro | 73 + .../Examples/IC555AstableMultivibrator/lm555n.sch | 435 ++ .../Examples/IC555AstableMultivibrator/lm555n.sub | 37 + .../InvertingAmplifier-cache.bak | 97 + .../InvertingAmplifier-cache.lib | 97 + .../InvertingAmplifier/InvertingAmplifier.bak | 194 + .../InvertingAmplifier/InvertingAmplifier.cir | 14 + .../InvertingAmplifier/InvertingAmplifier.cir.ckt | 13 + .../InvertingAmplifier/InvertingAmplifier.cir.out | 18 + .../InvertingAmplifier/InvertingAmplifier.cmp | 38 + .../InvertingAmplifier/InvertingAmplifier.net | 70 + .../InvertingAmplifier/InvertingAmplifier.pro | 72 + .../InvertingAmplifier/InvertingAmplifier.proj | 1 + .../InvertingAmplifier/InvertingAmplifier.sch | 194 + FreeEDA/Examples/InvertingAmplifier/analysis | 1 + .../Examples/InvertingAmplifier/ua741-cache.bak | 100 + .../Examples/InvertingAmplifier/ua741-cache.lib | 100 + FreeEDA/Examples/InvertingAmplifier/ua741.bak | 208 + FreeEDA/Examples/InvertingAmplifier/ua741.cir | 15 + FreeEDA/Examples/InvertingAmplifier/ua741.cir.ckt | 9 + FreeEDA/Examples/InvertingAmplifier/ua741.cir.out | 9 + FreeEDA/Examples/InvertingAmplifier/ua741.pro | 72 + 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FreeEDA/Examples/RC_pcb/RC-SilkS_Back.gbo | 12 + FreeEDA/Examples/RC_pcb/RC-SilkS_Front.gto | 113 + FreeEDA/Examples/RC_pcb/RC_pcb-Back.gbl | 30 + FreeEDA/Examples/RC_pcb/RC_pcb-Front.gtl | 22 + FreeEDA/Examples/RC_pcb/RC_pcb-cache.bak | 75 + FreeEDA/Examples/RC_pcb/RC_pcb-cache.lib | 75 + FreeEDA/Examples/RC_pcb/RC_pcb.bak | 125 + FreeEDA/Examples/RC_pcb/RC_pcb.brd | 225 + FreeEDA/Examples/RC_pcb/RC_pcb.cir.ckt.sol | 6 + FreeEDA/Examples/RC_pcb/RC_pcb.cmp | 24 + FreeEDA/Examples/RC_pcb/RC_pcb.net | 30 + FreeEDA/Examples/RC_pcb/RC_pcb.pro | 74 + FreeEDA/Examples/RC_pcb/RC_pcb.proj | 1 + FreeEDA/Examples/RC_pcb/RC_pcb.sch | 123 + FreeEDA/Examples/bridgeRectifier/$savepcb.000 | 366 + FreeEDA/Examples/bridgeRectifier/$savepcb.brd | 374 + FreeEDA/Examples/bridgeRectifier/1n4007.lib | 2 + FreeEDA/Examples/bridgeRectifier/1n4148.lib | 2 + FreeEDA/Examples/bridgeRectifier/analysis | 1 + .../bridgeRectifier/bridgeRectifier-cache.bak | 106 + .../bridgeRectifier/bridgeRectifier-cache.lib | 106 + .../Examples/bridgeRectifier/bridgeRectifier.bak | 203 + .../Examples/bridgeRectifier/bridgeRectifier.brd | 374 + .../Examples/bridgeRectifier/bridgeRectifier.cir | 15 + .../bridgeRectifier/bridgeRectifier.cir.ckt | 13 + .../bridgeRectifier/bridgeRectifier.cir.ckt.sol | 8 + .../bridgeRectifier/bridgeRectifier.cir.out | 20 + .../Examples/bridgeRectifier/bridgeRectifier.cmp | 45 + .../Examples/bridgeRectifier/bridgeRectifier.lst | 25 + .../Examples/bridgeRectifier/bridgeRectifier.net | 56 + .../Examples/bridgeRectifier/bridgeRectifier.pdf | Bin 0 -> 11367 bytes .../Examples/bridgeRectifier/bridgeRectifier.pro | 71 + .../Examples/bridgeRectifier/bridgeRectifier.proj | 1 + .../Examples/bridgeRectifier/bridgeRectifier.ps | 2726 +++++++ .../Examples/bridgeRectifier/bridgeRectifier.sch | 203 + FreeEDA/Examples/bridgeRectifier/diode_D1.eps | 1362 ++++ FreeEDA/Examples/bridgeRectifier/diode_D1.pstex | 187 + FreeEDA/Examples/bridgeRectifier/diode_D1.pstex_t | 19 + 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.../bridgeRectifierFilter.bak | 209 + .../bridgeRectifierFilter.cir | 17 + .../bridgeRectifierFilter.cir.ckt | 17 + .../bridgeRectifierFilter.cir.ckt.sol | 10 + .../bridgeRectifierFilter.cir.out | 22 + .../bridgeRectifierFilter.net | 96 + .../bridgeRectifierFilter.pro | 71 + .../bridgeRectifierFilter.proj | 1 + .../bridgeRectifierFilter.sch | 213 + FreeEDA/Examples/frequencyDivider/analysis | 1 + .../frequencyDivider/frequencyDivider-cache.bak | 171 + .../frequencyDivider/frequencyDivider-cache.lib | 171 + .../Examples/frequencyDivider/frequencyDivider.bak | 280 + .../Examples/frequencyDivider/frequencyDivider.cir | 18 + .../frequencyDivider/frequencyDivider.cir.ckt | 23 + .../frequencyDivider/frequencyDivider.cir.out | 28 + .../Examples/frequencyDivider/frequencyDivider.pro | 71 + .../frequencyDivider/frequencyDivider.proj | 1 + .../Examples/frequencyDivider/frequencyDivider.sch | 280 + FreeEDA/Examples/frequencyDivider/lm555n-cache.bak | 207 + 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| 13 + FreeEDA/Examples/mixMode/mixMode.cir.ckt | 17 + FreeEDA/Examples/mixMode/mixMode.cir.out | 22 + FreeEDA/Examples/mixMode/mixMode.cmp | 52 + FreeEDA/Examples/mixMode/mixMode.net | 77 + FreeEDA/Examples/mixMode/mixMode.pro | 71 + FreeEDA/Examples/mixMode/mixMode.proj | 1 + FreeEDA/Examples/mixMode/mixMode.sch | 165 + FreeEDA/Examples/modifiedNodalExample/$savepcb.brd | 366 + FreeEDA/Examples/modifiedNodalExample/analysis | 1 + .../modifiedNodalExample/modifiedNodal.proj | 1 + .../modifiedNodalExample-cache.bak | 72 + .../modifiedNodalExample-cache.lib | 72 + .../modifiedNodalExample/modifiedNodalExample.000 | 326 + .../modifiedNodalExample/modifiedNodalExample.bak | 169 + .../modifiedNodalExample/modifiedNodalExample.brd | 386 + .../modifiedNodalExample/modifiedNodalExample.cir | 15 + .../modifiedNodalExample.cir.ckt | 13 + .../modifiedNodalExample.cir.ckt.sol | 8 + .../modifiedNodalExample.cir.out | 18 + .../modifiedNodalExample/modifiedNodalExample.cmp | 45 + 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b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier-cache.bak new file mode 100644 index 0000000..a2c3051 --- /dev/null +++ b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier-cache.bak @@ -0,0 +1,133 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 04 June 2013 10:39:51 PM IST +#encoding utf-8 +# +# AC +# +DEF AC v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "AC" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/BJT_amplifier/BJT_amplifier-cache.lib b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier-cache.lib new file mode 100644 index 0000000..b7e5592 --- /dev/null +++ b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier-cache.lib @@ -0,0 +1,133 @@ +EESchema-LIBRARY Version 2.3 Date: Thursday 06 June 2013 05:14:30 PM IST +#encoding utf-8 +# +# AC +# +DEF AC v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "AC" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.bak b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.bak new file mode 100644 index 0000000..ad03361 --- /dev/null +++ b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.bak @@ -0,0 +1,240 @@ +EESchema Schematic File Version 2 date Tuesday 04 June 2013 10:39:51 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:BJT_amplifier-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "4 jun 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 7050 4450 +Wire Wire Line + 7600 4450 5100 4450 +Wire Wire Line + 7600 4450 7600 4050 +Wire Wire Line + 5100 4450 5100 4500 +Wire Wire Line + 5100 4500 3700 4500 +Connection ~ 6300 4450 +Connection ~ 6800 3300 +Wire Wire Line + 3800 3600 3700 3600 +Wire Wire Line + 7050 3950 7050 3300 +Wire Wire Line + 7050 3300 6700 3300 +Connection ~ 5100 3600 +Connection ~ 6100 3300 +Wire Wire Line + 6300 3300 5850 3300 +Wire Wire Line + 5850 3800 5850 3950 +Wire Wire Line + 5850 3300 5850 3400 +Wire Wire Line + 5100 3300 5100 3950 +Wire Wire Line + 5550 3600 4950 3600 +Wire Wire Line + 6300 4050 6300 3900 +Wire Wire Line + 6300 3900 5850 3900 +Connection ~ 5850 3900 +Connection ~ 5850 4450 +Wire Wire Line + 4550 3600 4300 3600 +Connection ~ 5100 4450 +Wire Wire Line + 5650 4450 5650 4850 +Connection ~ 5650 4450 +Wire Wire Line + 5100 2800 7600 2800 +Wire Wire Line + 7600 2800 7600 3150 +Connection ~ 6100 2800 +$Comp +L DC v1 +U 1 1 51A5D97E +P 7600 3600 +F 0 "v1" H 7400 3700 60 0000 C CNN +F 1 "DC" H 7400 3550 60 0000 C CNN +F 2 "R1" H 7300 3600 60 0000 C CNN + 1 7600 3600 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 51A5D42D +P 6800 3000 +F 0 "U1" H 6650 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 6950 3100 50 0000 C CNN + 1 6800 3000 + 1 0 0 -1 +$EndComp +$Comp +L AC v2 +U 1 1 51A486A5 +P 3700 4050 +F 0 "v2" H 3500 4150 60 0000 C CNN +F 1 "AC" H 3500 4000 60 0000 C CNN +F 2 "R1" H 3400 4050 60 0000 C CNN + 1 3700 4050 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 51A48298 +P 5650 4450 +F 0 "#FLG01" H 5650 4720 30 0001 C CNN +F 1 "PWR_FLAG" H 5650 4680 30 0000 C CNN + 1 5650 4450 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 51A47FCD +P 5650 4850 +F 0 "#PWR02" H 5650 4850 30 0001 C CNN +F 1 "GND" H 5650 4780 30 0001 C CNN + 1 5650 4850 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 51A47FBC +P 4050 3600 +F 0 "R1" V 4130 3600 50 0000 C CNN +F 1 "50" V 4050 3600 50 0000 C CNN + 1 4050 3600 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 51A47FAB +P 5100 3050 +F 0 "R2" V 5180 3050 50 0000 C CNN +F 1 "200k" V 5100 3050 50 0000 C CNN + 1 5100 3050 + 1 0 0 -1 +$EndComp +$Comp +L C C1 +U 1 1 51A47FA0 +P 4750 3600 +F 0 "C1" H 4800 3700 50 0000 L CNN +F 1 "40u" H 4800 3500 50 0000 L CNN + 1 4750 3600 + 0 -1 -1 0 +$EndComp +$Comp +L R R3 +U 1 1 51A47F97 +P 5100 4200 +F 0 "R3" V 5180 4200 50 0000 C CNN +F 1 "50k" V 5100 4200 50 0000 C CNN + 1 5100 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R6 +U 1 1 51A47F8B +P 7050 4200 +F 0 "R6" V 7130 4200 50 0000 C CNN +F 1 "1k" V 7050 4200 50 0000 C CNN + 1 7050 4200 + 1 0 0 -1 +$EndComp +$Comp +L C C2 +U 1 1 51A47F80 +P 6300 4250 +F 0 "C2" H 6350 4350 50 0000 L CNN +F 1 "100u" H 6350 4150 50 0000 L CNN + 1 6300 4250 + -1 0 0 1 +$EndComp +$Comp +L C C3 +U 1 1 51A47F75 +P 6500 3300 +F 0 "C3" H 6550 3400 50 0000 L CNN +F 1 "40u" H 6550 3200 50 0000 L CNN + 1 6500 3300 + 0 1 1 0 +$EndComp +$Comp +L R R5 +U 1 1 51A47F5C +P 6100 3050 +F 0 "R5" V 6180 3050 50 0000 C CNN +F 1 "2k" V 6100 3050 50 0000 C CNN + 1 6100 3050 + 1 0 0 -1 +$EndComp +$Comp +L R R4 +U 1 1 51A47F50 +P 5850 4200 +F 0 "R4" V 5930 4200 50 0000 C CNN +F 1 "1.5k" V 5850 4200 50 0000 C CNN + 1 5850 4200 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 51A47F29 +P 5750 3600 +F 0 "Q1" H 5750 3450 50 0000 R CNN +F 1 "NPN" H 5750 3750 50 0000 R CNN + 1 5750 3600 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.cir b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.cir new file mode 100644 index 0000000..5000496 --- /dev/null +++ b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.cir @@ -0,0 +1,21 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 29 May 2013 04:04:50 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v1 6 0 DC +U1 4 VPLOT8_1 +v2 2 0 AC +R1 3 2 50 +R2 6 8 200k +C1 3 8 40u +R3 8 0 50k +R6 4 0 1k +C2 0 5 100u +C3 4 7 40u +R5 6 7 2k +R4 5 0 1.5k +Q1 5 8 7 NPN + +.end diff --git a/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.cir.ckt b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.cir.ckt new file mode 100644 index 0000000..281db0e --- /dev/null +++ b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.cir.ckt @@ -0,0 +1,20 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 29 may 2013 04:04:50 pm ist +.include npn.lib + +v1 6 0 dc 10 +* Plotting option vplot8_1 +v2 2 0 ac 0.5 +r1 3 2 50 +r2 6 8 200k +c1 3 8 40u +r3 8 0 50k +r6 4 0 1k +c2 0 5 100u +c3 4 7 40u +r5 6 7 2k +r4 5 0 1.5k +q1 7 8 5 npn + +.ac dec 100 100Hz 10KHz +.plot v(4) +.end diff --git a/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.cir.out b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.cir.out new file mode 100644 index 0000000..13bbb55 --- /dev/null +++ b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.cir.out @@ -0,0 +1,25 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 29 may 2013 04:04:50 pm ist +.include npn.lib + +v1 6 0 dc 10 +* Plotting option vplot8_1 +v2 2 0 ac 0.5 +r1 3 2 50 +r2 6 8 200k +c1 3 8 40u +r3 8 0 50k +r6 4 0 1k +c2 0 5 100u +c3 4 7 40u +r5 6 7 2k +r4 5 0 1.5k +q1 7 8 5 npn + +.ac dec 100 100Hz 10KHz + +* Control Statements +.control +run +plot v(4) +.endc +.end diff --git a/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.pro b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.pro new file mode 100644 index 0000000..2ca68f1 --- /dev/null +++ b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.pro @@ -0,0 +1,74 @@ +update=Tuesday 28 May 2013 03:25:45 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.proj b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.proj new file mode 100644 index 0000000..79be1da --- /dev/null +++ b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.proj @@ -0,0 +1 @@ +schematicFile tp.sch diff --git a/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.sch b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.sch new file mode 100644 index 0000000..68e94c5 --- /dev/null +++ b/FreeEDA/Examples/BJT_amplifier/BJT_amplifier.sch @@ -0,0 +1,240 @@ +EESchema Schematic File Version 2 date Thursday 06 June 2013 05:14:30 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:BJT_amplifier-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "6 jun 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 7050 4450 +Wire Wire Line + 7600 4450 5100 4450 +Wire Wire Line + 7600 4450 7600 4050 +Wire Wire Line + 5100 4450 5100 4500 +Wire Wire Line + 5100 4500 3700 4500 +Connection ~ 6300 4450 +Connection ~ 6800 3300 +Wire Wire Line + 3800 3600 3700 3600 +Wire Wire Line + 7050 3950 7050 3300 +Wire Wire Line + 7050 3300 6700 3300 +Connection ~ 5100 3600 +Connection ~ 6100 3300 +Wire Wire Line + 6300 3300 5850 3300 +Wire Wire Line + 5850 3800 5850 3950 +Wire Wire Line + 5850 3300 5850 3400 +Wire Wire Line + 5100 3300 5100 3950 +Wire Wire Line + 5550 3600 4950 3600 +Wire Wire Line + 6300 4050 6300 3900 +Wire Wire Line + 6300 3900 5850 3900 +Connection ~ 5850 3900 +Connection ~ 5850 4450 +Wire Wire Line + 4550 3600 4300 3600 +Connection ~ 5100 4450 +Wire Wire Line + 5650 4450 5650 4850 +Connection ~ 5650 4450 +Wire Wire Line + 5100 2800 7600 2800 +Wire Wire Line + 7600 2800 7600 3150 +Connection ~ 6100 2800 +$Comp +L DC v1 +U 1 1 51A5D97E +P 7600 3600 +F 0 "v1" H 7400 3700 60 0000 C CNN +F 1 "DC" H 7400 3550 60 0000 C CNN +F 2 "R1" H 7300 3600 60 0000 C CNN + 1 7600 3600 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 51A5D42D +P 6800 3000 +F 0 "U1" H 6650 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 6950 3100 50 0000 C CNN + 1 6800 3000 + 1 0 0 -1 +$EndComp +$Comp +L AC v2 +U 1 1 51A486A5 +P 3700 4050 +F 0 "v2" H 3500 4150 60 0000 C CNN +F 1 "AC" H 3500 4000 60 0000 C CNN +F 2 "R1" H 3400 4050 60 0000 C CNN + 1 3700 4050 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 51A48298 +P 5650 4450 +F 0 "#FLG01" H 5650 4720 30 0001 C CNN +F 1 "PWR_FLAG" H 5650 4680 30 0000 C CNN + 1 5650 4450 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 51A47FCD +P 5650 4850 +F 0 "#PWR02" H 5650 4850 30 0001 C CNN +F 1 "GND" H 5650 4780 30 0001 C CNN + 1 5650 4850 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 51A47FBC +P 4050 3600 +F 0 "R1" V 4130 3600 50 0000 C CNN +F 1 "50" V 4050 3600 50 0000 C CNN + 1 4050 3600 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 51A47FAB +P 5100 3050 +F 0 "R2" V 5180 3050 50 0000 C CNN +F 1 "200k" V 5100 3050 50 0000 C CNN + 1 5100 3050 + 1 0 0 -1 +$EndComp +$Comp +L C C1 +U 1 1 51A47FA0 +P 4750 3600 +F 0 "C1" H 4800 3700 50 0000 L CNN +F 1 "40u" H 4800 3500 50 0000 L CNN + 1 4750 3600 + 0 -1 -1 0 +$EndComp +$Comp +L R R3 +U 1 1 51A47F97 +P 5100 4200 +F 0 "R3" V 5180 4200 50 0000 C CNN +F 1 "50k" V 5100 4200 50 0000 C CNN + 1 5100 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R6 +U 1 1 51A47F8B +P 7050 4200 +F 0 "R6" V 7130 4200 50 0000 C CNN +F 1 "1k" V 7050 4200 50 0000 C CNN + 1 7050 4200 + 1 0 0 -1 +$EndComp +$Comp +L C C2 +U 1 1 51A47F80 +P 6300 4250 +F 0 "C2" H 6350 4350 50 0000 L CNN +F 1 "100u" H 6350 4150 50 0000 L CNN + 1 6300 4250 + -1 0 0 1 +$EndComp +$Comp +L C C3 +U 1 1 51A47F75 +P 6500 3300 +F 0 "C3" H 6550 3400 50 0000 L CNN +F 1 "40u" H 6550 3200 50 0000 L CNN + 1 6500 3300 + 0 1 1 0 +$EndComp +$Comp +L R R5 +U 1 1 51A47F5C +P 6100 3050 +F 0 "R5" V 6180 3050 50 0000 C CNN +F 1 "2k" V 6100 3050 50 0000 C CNN + 1 6100 3050 + 1 0 0 -1 +$EndComp +$Comp +L R R4 +U 1 1 51A47F50 +P 5850 4200 +F 0 "R4" V 5930 4200 50 0000 C CNN +F 1 "1.5k" V 5850 4200 50 0000 C CNN + 1 5850 4200 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 51A47F29 +P 5750 3600 +F 0 "Q1" H 5750 3450 50 0000 R CNN +F 1 "NPN" H 5750 3750 50 0000 R CNN + 1 5750 3600 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/BJT_amplifier/analysis b/FreeEDA/Examples/BJT_amplifier/analysis new file mode 100644 index 0000000..b49cde4 --- /dev/null +++ b/FreeEDA/Examples/BJT_amplifier/analysis @@ -0,0 +1,2 @@ + +.ac dec 100 100Hz 10KHz diff --git a/FreeEDA/Examples/BJT_amplifier/npn.lib b/FreeEDA/Examples/BJT_amplifier/npn.lib new file mode 100644 index 0000000..abc5bd0 --- /dev/null +++ b/FreeEDA/Examples/BJT_amplifier/npn.lib @@ -0,0 +1,6 @@ +.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 ++ Cje=4.493p Vjc=.75 Xtb=1.5 Rb=10 Rc=1 ++ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 ++ Ikf=66.78m Br=.7371 Mje=.2593 Mjc=.3085 Vaf=74.03 ++ Isc=0 Ise=6.734f Xtf=2 Vje=.75 Is=6.734f ++ Itf=.4 Eg=1.11 ) \ No newline at end of file diff --git a/FreeEDA/Examples/BasicGates/$savepcb.brd b/FreeEDA/Examples/BasicGates/$savepcb.brd new file mode 100644 index 0000000..c5b62f8 --- /dev/null +++ b/FreeEDA/Examples/BasicGates/$savepcb.brd @@ -0,0 +1,84 @@ +PCBNEW-BOARD Version 1 date 6/7/2013 11:31:39 AM + +# Created by Pcbnew(2011-04-29 BZR 2986)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 0 +NoConn 0 +Di 0 0 117000 82670 +Ndraw 0 +Ntrack 0 +Nzone 0 +BoardThickness 630 +Nmodule 0 +Nnets 1 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "7 jun 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +$EndNCLASS +$TRACK +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/BasicGates/BasicGates-cache.bak b/FreeEDA/Examples/BasicGates/BasicGates-cache.bak new file mode 100644 index 0000000..ba5e5f2 --- /dev/null +++ b/FreeEDA/Examples/BasicGates/BasicGates-cache.bak @@ -0,0 +1,324 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 08:00:09 AM IST +#encoding utf-8 +# +# 74HCT04 +# +DEF 74HCT04 U 0 30 Y Y 6 F N +F0 "U" 150 100 40 H V C CNN +F1 "74HCT04" 200 -100 40 H V C CNN +ALIAS 74HC14 74HC04 74LS14 +DRAW +P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N +X GND 7 -50 -100 0 U 30 20 0 0 W N +X VCC 14 -50 100 0 D 30 20 0 0 W N +X ~ 1 -450 0 300 R 60 60 1 1 I +X ~ 2 450 0 300 L 60 60 1 1 O I +X ~ 3 -450 0 300 R 60 60 2 1 I +X ~ 4 450 0 300 L 60 60 2 1 O I +X ~ 5 -450 0 300 R 60 60 3 1 I +X ~ 6 450 0 300 L 60 60 3 1 O I +X ~ 8 450 0 300 L 60 60 4 1 O I +X ~ 9 -450 0 300 R 60 60 4 1 I +X ~ 10 450 0 300 L 60 60 5 1 O I +X ~ 11 -450 0 300 R 60 60 5 1 I +X ~ 12 450 0 300 L 60 60 6 1 O I +X ~ 13 -450 0 300 R 60 60 6 1 I +X ~ 1 -450 0 300 R 60 60 1 2 I I +X ~ 2 450 0 300 L 60 60 1 2 O +X ~ 3 -450 0 300 R 60 60 2 2 I I +X ~ 4 450 0 300 L 60 60 2 2 O +X ~ 5 -450 0 300 R 60 60 3 2 I I +X ~ 6 450 0 300 L 60 60 3 2 O +X ~ 8 450 0 300 L 60 60 4 2 O +X ~ 9 -450 0 300 R 60 60 4 2 I I +X ~ 10 450 0 300 L 60 60 5 2 O +X ~ 11 -450 0 300 R 60 60 5 2 I I +X ~ 12 450 0 300 L 60 60 6 2 O +X ~ 13 -450 0 300 R 60 60 6 2 I I +ENDDRAW +ENDDEF +# +# 74LS00 +# +DEF 74LS00 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS00" 0 -100 60 H V C CNN +ALIAS 74LS37 7400 74HCT00 74HC00 +$FPLIST + 14DIP300* + SO14* +$ENDFPLIST +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O I +X ~ 4 -600 100 300 R 60 60 2 1 I +X ~ 5 -600 -100 300 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O I +X ~ 8 600 0 300 L 60 60 3 1 O I +X ~ 9 -600 100 300 R 60 60 3 1 I +X ~ 10 -600 -100 300 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O I +X ~ 12 -600 100 300 R 60 60 4 1 I +X ~ 13 -600 -100 300 R 60 60 4 1 I +A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 +A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 +A -10 -141 340 244 883 0 2 0 N 300 0 0 200 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O +X ~ 4 -600 100 370 R 60 60 2 2 I I +X ~ 5 -600 -100 370 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O +X ~ 8 600 0 300 L 60 60 3 2 O +X ~ 9 -600 100 370 R 60 60 3 2 I I +X ~ 10 -600 -100 370 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O +X ~ 12 -600 100 370 R 60 60 4 2 I I +X ~ 13 -600 -100 370 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# 74LS02 +# +DEF 74LS02 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS02" 50 -50 60 H V C CNN +ALIAS 74HC02 74HCT02 7402 74LS28 +$FPLIST + SO14* + 14DIP* +$ENDFPLIST +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 +A -1 -127 327 898 228 0 1 8 N 0 200 300 0 +A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 +P 2 0 1 8 -300 -200 0 -200 N +P 2 0 1 8 -300 200 0 200 N +X ~ 1 600 0 300 L 60 60 1 1 O I +X ~ 2 -600 100 370 R 60 60 1 1 I +X ~ 3 -600 -100 370 R 60 60 1 1 I +X ~ 4 600 0 300 L 60 60 2 1 O I +X ~ 5 -600 100 370 R 60 60 2 1 I +X ~ 6 -600 -100 370 R 60 60 2 1 I +X ~ 8 -600 100 370 R 60 60 3 1 I +X ~ 9 -600 -100 370 R 60 60 3 1 I +X ~ 10 600 0 300 L 60 60 3 1 O I +X ~ 11 -600 100 370 R 60 60 4 1 I +X ~ 12 -600 -100 370 R 60 60 4 1 I +X ~ 13 600 0 300 L 60 60 4 1 O I +A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 +P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 600 0 300 L 60 60 1 2 O +X ~ 2 -600 100 300 R 60 60 1 2 I I +X ~ 3 -600 -100 300 R 60 60 1 2 I I +X ~ 4 600 0 300 L 60 60 2 2 O +X ~ 5 -600 100 300 R 60 60 2 2 I I +X ~ 6 -600 -100 300 R 60 60 2 2 I I +X ~ 8 -600 100 300 R 60 60 3 2 I I +X ~ 9 -600 -100 300 R 60 60 3 2 I I +X ~ 10 600 0 300 L 60 60 3 2 O +X ~ 11 -600 100 300 R 60 60 4 2 I I +X ~ 12 -600 -100 300 R 60 60 4 2 I I +X ~ 13 600 0 300 L 60 60 4 2 O +ENDDRAW +ENDDEF +# +# 74LS08 +# +DEF 74LS08 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS08" 0 -50 60 H V C CNN +ALIAS 74LS09 +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 U 40 40 0 0 W N +A 100 0 200 896 -896 0 1 0 N 101 200 101 -199 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O +X ~ 4 -600 100 300 R 60 60 2 1 I +X ~ 5 -600 -100 300 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O +X ~ 8 600 0 300 L 60 60 3 1 O +X ~ 9 -600 100 300 R 60 60 3 1 I +X ~ 10 -600 -100 300 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O +X ~ 12 -600 100 300 R 60 60 4 1 I +X ~ 13 -600 -100 300 R 60 60 4 1 I +A -470 0 262 495 -495 0 2 0 N -300 199 -300 -198 +A -2 126 326 -897 -225 0 2 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 2 0 N 2 200 300 0 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O I +X ~ 4 -600 100 370 R 60 60 2 2 I I +X ~ 5 -600 -100 370 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O I +X ~ 8 600 0 300 L 60 60 3 2 O I +X ~ 9 -600 100 370 R 60 60 3 2 I I +X ~ 10 -600 -100 370 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O I +X ~ 12 -600 100 370 R 60 60 4 2 I I +X ~ 13 -600 -100 370 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# 74LS32 +# +DEF 74LS32 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS32" 0 -50 60 H V C CNN +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 U 40 40 0 0 W N +A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 +A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 1 0 N 2 200 300 0 +P 2 0 1 0 -300 -200 0 -200 N +P 2 0 1 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 1 I +X ~ 2 -600 -100 370 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O +X ~ 4 -600 100 370 R 60 60 2 1 I +X ~ 5 -600 -100 370 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O +X ~ 8 600 0 300 L 60 60 3 1 O +X ~ 9 -600 100 370 R 60 60 3 1 I +X ~ 10 -600 -100 370 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O +X ~ 12 -600 100 370 R 60 60 4 1 I +X ~ 13 -600 -100 370 R 60 60 4 1 I +A 100 0 200 896 -896 0 2 0 N 101 200 101 -199 +P 4 0 2 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 2 I I +X ~ 2 -600 -100 300 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O I +X ~ 4 -600 100 300 R 60 60 2 2 I I +X ~ 5 -600 -100 300 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O I +X ~ 8 600 0 300 L 60 60 3 2 O I +X ~ 9 -600 100 300 R 60 60 3 2 I I +X ~ 10 -600 -100 300 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O I +X ~ 12 -600 100 300 R 60 60 4 2 I I +X ~ 13 -600 -100 300 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# 74LS86 +# +DEF 74LS86 U 0 30 Y N 4 F N +F0 "U" 50 50 50 H V C CNN +F1 "74LS86" 50 -50 40 H V C CNN +ALIAS 74HC86 +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 +A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 +A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 1 0 N 2 200 300 0 +P 2 0 1 0 -200 -200 0 -200 N +P 2 0 1 0 -200 200 0 200 N +X IN1 1 -600 100 370 R 60 60 1 1 I +X IN2 2 -600 -100 370 R 60 60 1 1 I +X OUT 3 600 0 300 L 60 60 1 1 O +X IN1 4 -600 100 370 R 60 60 2 1 I +X IN2 5 -600 -100 370 R 60 60 2 1 I +X OUT 6 600 0 300 L 60 60 2 1 O +X OUT 8 600 0 300 L 60 60 3 1 O +X IN1 9 -600 100 370 R 60 60 3 1 I +X IN2 10 -600 -100 370 R 60 60 3 1 I +X OUT 11 600 0 300 L 60 60 4 1 O +X IN1 12 -600 100 370 R 60 60 4 1 I +X IN2 13 -600 -100 370 R 60 60 4 1 I +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot1 +# +DEF vplot1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/BasicGates/BasicGates-cache.lib b/FreeEDA/Examples/BasicGates/BasicGates-cache.lib new file mode 100644 index 0000000..90be75b --- /dev/null +++ b/FreeEDA/Examples/BasicGates/BasicGates-cache.lib @@ -0,0 +1,331 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 08:37:05 AM IST +#encoding utf-8 +# +# 74HCT04 +# +DEF 74HCT04 U 0 30 Y Y 6 F N +F0 "U" 150 100 40 H V C CNN +F1 "74HCT04" 200 -100 40 H V C CNN +ALIAS 74HC14 74HC04 74LS14 +DRAW +P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N +X GND 7 -50 -100 0 U 30 20 0 0 W N +X VCC 14 -50 100 0 D 30 20 0 0 W N +X ~ 1 -450 0 300 R 60 60 1 1 I +X ~ 2 450 0 300 L 60 60 1 1 O I +X ~ 3 -450 0 300 R 60 60 2 1 I +X ~ 4 450 0 300 L 60 60 2 1 O I +X ~ 5 -450 0 300 R 60 60 3 1 I +X ~ 6 450 0 300 L 60 60 3 1 O I +X ~ 8 450 0 300 L 60 60 4 1 O I +X ~ 9 -450 0 300 R 60 60 4 1 I +X ~ 10 450 0 300 L 60 60 5 1 O I +X ~ 11 -450 0 300 R 60 60 5 1 I +X ~ 12 450 0 300 L 60 60 6 1 O I +X ~ 13 -450 0 300 R 60 60 6 1 I +X ~ 1 -450 0 300 R 60 60 1 2 I I +X ~ 2 450 0 300 L 60 60 1 2 O +X ~ 3 -450 0 300 R 60 60 2 2 I I +X ~ 4 450 0 300 L 60 60 2 2 O +X ~ 5 -450 0 300 R 60 60 3 2 I I +X ~ 6 450 0 300 L 60 60 3 2 O +X ~ 8 450 0 300 L 60 60 4 2 O +X ~ 9 -450 0 300 R 60 60 4 2 I I +X ~ 10 450 0 300 L 60 60 5 2 O +X ~ 11 -450 0 300 R 60 60 5 2 I I +X ~ 12 450 0 300 L 60 60 6 2 O +X ~ 13 -450 0 300 R 60 60 6 2 I I +ENDDRAW +ENDDEF +# +# 74LS00 +# +DEF 74LS00 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS00" 0 -100 60 H V C CNN +ALIAS 74LS37 7400 74HCT00 74HC00 +$FPLIST + 14DIP300* + SO14* +$ENDFPLIST +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O I +X ~ 4 -600 100 300 R 60 60 2 1 I +X ~ 5 -600 -100 300 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O I +X ~ 8 600 0 300 L 60 60 3 1 O I +X ~ 9 -600 100 300 R 60 60 3 1 I +X ~ 10 -600 -100 300 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O I +X ~ 12 -600 100 300 R 60 60 4 1 I +X ~ 13 -600 -100 300 R 60 60 4 1 I +A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 +A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 +A -10 -141 340 244 883 0 2 0 N 300 0 0 200 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O +X ~ 4 -600 100 370 R 60 60 2 2 I I +X ~ 5 -600 -100 370 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O +X ~ 8 600 0 300 L 60 60 3 2 O +X ~ 9 -600 100 370 R 60 60 3 2 I I +X ~ 10 -600 -100 370 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O +X ~ 12 -600 100 370 R 60 60 4 2 I I +X ~ 13 -600 -100 370 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# 74LS02 +# +DEF 74LS02 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS02" 50 -50 60 H V C CNN +ALIAS 74HC02 74HCT02 7402 74LS28 +$FPLIST + SO14* + 14DIP* +$ENDFPLIST +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 +A -1 -127 327 898 228 0 1 8 N 0 200 300 0 +A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 +P 2 0 1 8 -300 -200 0 -200 N +P 2 0 1 8 -300 200 0 200 N +X ~ 1 600 0 300 L 60 60 1 1 O I +X ~ 2 -600 100 370 R 60 60 1 1 I +X ~ 3 -600 -100 370 R 60 60 1 1 I +X ~ 4 600 0 300 L 60 60 2 1 O I +X ~ 5 -600 100 370 R 60 60 2 1 I +X ~ 6 -600 -100 370 R 60 60 2 1 I +X ~ 8 -600 100 370 R 60 60 3 1 I +X ~ 9 -600 -100 370 R 60 60 3 1 I +X ~ 10 600 0 300 L 60 60 3 1 O I +X ~ 11 -600 100 370 R 60 60 4 1 I +X ~ 12 -600 -100 370 R 60 60 4 1 I +X ~ 13 600 0 300 L 60 60 4 1 O I +A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 +P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 600 0 300 L 60 60 1 2 O +X ~ 2 -600 100 300 R 60 60 1 2 I I +X ~ 3 -600 -100 300 R 60 60 1 2 I I +X ~ 4 600 0 300 L 60 60 2 2 O +X ~ 5 -600 100 300 R 60 60 2 2 I I +X ~ 6 -600 -100 300 R 60 60 2 2 I I +X ~ 8 -600 100 300 R 60 60 3 2 I I +X ~ 9 -600 -100 300 R 60 60 3 2 I I +X ~ 10 600 0 300 L 60 60 3 2 O +X ~ 11 -600 100 300 R 60 60 4 2 I I +X ~ 12 -600 -100 300 R 60 60 4 2 I I +X ~ 13 600 0 300 L 60 60 4 2 O +ENDDRAW +ENDDEF +# +# 74LS08 +# +DEF 74LS08 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS08" 0 -50 60 H V C CNN +ALIAS 74LS09 +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 U 40 40 0 0 W N +A 100 0 200 896 -896 0 1 0 N 101 200 101 -199 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O +X ~ 4 -600 100 300 R 60 60 2 1 I +X ~ 5 -600 -100 300 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O +X ~ 8 600 0 300 L 60 60 3 1 O +X ~ 9 -600 100 300 R 60 60 3 1 I +X ~ 10 -600 -100 300 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O +X ~ 12 -600 100 300 R 60 60 4 1 I +X ~ 13 -600 -100 300 R 60 60 4 1 I +A -470 0 262 495 -495 0 2 0 N -300 199 -300 -198 +A -2 126 326 -897 -225 0 2 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 2 0 N 2 200 300 0 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O I +X ~ 4 -600 100 370 R 60 60 2 2 I I +X ~ 5 -600 -100 370 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O I +X ~ 8 600 0 300 L 60 60 3 2 O I +X ~ 9 -600 100 370 R 60 60 3 2 I I +X ~ 10 -600 -100 370 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O I +X ~ 12 -600 100 370 R 60 60 4 2 I I +X ~ 13 -600 -100 370 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# 74LS32 +# +DEF 74LS32 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS32" 0 -50 60 H V C CNN +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 U 40 40 0 0 W N +A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 +A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 1 0 N 2 200 300 0 +P 2 0 1 0 -300 -200 0 -200 N +P 2 0 1 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 1 I +X ~ 2 -600 -100 370 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O +X ~ 4 -600 100 370 R 60 60 2 1 I +X ~ 5 -600 -100 370 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O +X ~ 8 600 0 300 L 60 60 3 1 O +X ~ 9 -600 100 370 R 60 60 3 1 I +X ~ 10 -600 -100 370 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O +X ~ 12 -600 100 370 R 60 60 4 1 I +X ~ 13 -600 -100 370 R 60 60 4 1 I +A 100 0 200 896 -896 0 2 0 N 101 200 101 -199 +P 4 0 2 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 2 I I +X ~ 2 -600 -100 300 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O I +X ~ 4 -600 100 300 R 60 60 2 2 I I +X ~ 5 -600 -100 300 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O I +X ~ 8 600 0 300 L 60 60 3 2 O I +X ~ 9 -600 100 300 R 60 60 3 2 I I +X ~ 10 -600 -100 300 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O I +X ~ 12 -600 100 300 R 60 60 4 2 I I +X ~ 13 -600 -100 300 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# 74LS86 +# +DEF 74LS86 U 0 30 Y N 4 F N +F0 "U" 50 50 50 H V C CNN +F1 "74LS86" 50 -50 40 H V C CNN +ALIAS 74HC86 +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 +A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 +A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 1 0 N 2 200 300 0 +P 2 0 1 0 -200 -200 0 -200 N +P 2 0 1 0 -200 200 0 200 N +X IN1 1 -600 100 370 R 60 60 1 1 I +X IN2 2 -600 -100 370 R 60 60 1 1 I +X OUT 3 600 0 300 L 60 60 1 1 O +X IN1 4 -600 100 370 R 60 60 2 1 I +X IN2 5 -600 -100 370 R 60 60 2 1 I +X OUT 6 600 0 300 L 60 60 2 1 O +X OUT 8 600 0 300 L 60 60 3 1 O +X IN1 9 -600 100 370 R 60 60 3 1 I +X IN2 10 -600 -100 370 R 60 60 3 1 I +X OUT 11 600 0 300 L 60 60 4 1 O +X IN1 12 -600 100 370 R 60 60 4 1 I +X IN2 13 -600 -100 370 R 60 60 4 1 I +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/BasicGates/BasicGates.bak b/FreeEDA/Examples/BasicGates/BasicGates.bak new file mode 100644 index 0000000..b0c177c --- /dev/null +++ b/FreeEDA/Examples/BasicGates/BasicGates.bak @@ -0,0 +1,347 @@ +EESchema Schematic File Version 2 date Sunday 09 December 2012 08:00:09 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:BasicGates-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "30 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 9700 3000 +Wire Wire Line + 9700 3000 9700 2800 +Wire Wire Line + 9900 3100 9900 3000 +Wire Wire Line + 9900 3000 9100 3000 +Wire Wire Line + 1700 3800 3750 3800 +Wire Wire Line + 7900 3100 7850 3100 +Wire Wire Line + 7850 3100 7850 3400 +Wire Wire Line + 7850 3400 7750 3400 +Connection ~ 5300 2300 +Wire Wire Line + 5300 2300 5300 3300 +Wire Wire Line + 5300 3300 5500 3300 +Wire Wire Line + 5100 3500 5500 3500 +Wire Wire Line + 7900 2900 7350 2900 +Wire Wire Line + 7350 2900 7350 2400 +Wire Wire Line + 7350 2400 7000 2400 +Connection ~ 3750 2200 +Wire Wire Line + 3900 3400 3750 3400 +Wire Wire Line + 3750 3400 3750 2200 +Wire Wire Line + 3850 2200 3650 2200 +Wire Wire Line + 3650 2200 3650 1700 +Connection ~ 2400 1700 +Wire Wire Line + 2400 1700 2400 1550 +Connection ~ 2250 1700 +Connection ~ 2000 2900 +Wire Wire Line + 2000 2900 2000 2700 +Wire Wire Line + 2250 3800 2250 4150 +Wire Wire Line + 1700 3800 1700 3950 +Wire Wire Line + 2250 2500 2250 2900 +Wire Wire Line + 2250 2900 1750 2900 +Connection ~ 1700 5050 +Wire Wire Line + 1700 5050 2250 5050 +Wire Wire Line + 2250 5050 2250 4650 +Wire Wire Line + 1700 4850 1700 5200 +Wire Wire Line + 1750 1800 1750 1700 +Wire Wire Line + 2250 1700 2250 2000 +Wire Wire Line + 1750 3150 1750 2700 +Connection ~ 1750 2900 +Connection ~ 2250 3800 +Wire Wire Line + 2400 3800 2400 3600 +Connection ~ 2400 3800 +Wire Wire Line + 3900 3600 3750 3600 +Wire Wire Line + 3750 3600 3750 3800 +Wire Wire Line + 3500 3800 3500 2400 +Wire Wire Line + 3500 2400 3850 2400 +Connection ~ 3500 3800 +Wire Wire Line + 5050 2300 5800 2300 +Wire Wire Line + 6200 2200 6200 1900 +Wire Wire Line + 5800 2500 5200 2500 +Wire Wire Line + 5200 2500 5200 3500 +Connection ~ 5200 3500 +Wire Wire Line + 6700 3400 6850 3400 +Wire Wire Line + 1750 1700 3650 1700 +Wire Wire Line + 9900 3600 9900 3900 +Text Notes 9150 2850 0 60 ~ 0 +~A.B +Text Notes 9050 2850 0 60 ~ 0 ++ +Text Notes 8900 2850 0 60 ~ 0 +A.B +Text Notes 8000 2300 0 60 ~ 0 +~B +Text Notes 7900 2300 0 60 ~ 0 ++ +Text Notes 7750 2300 0 60 ~ 0 +=~A +Text Notes 7900 3650 0 60 ~ 0 +=A+B +Text Notes 7850 3500 0 60 ~ 0 +A.B+A+B +Text Notes 6450 3600 0 60 ~ 0 +~((A.B)+(A+B)) +Text Notes 7100 2300 0 60 ~ 0 +~((A.B).(A+B)) +$Comp +L 74HC86 U12 +U 1 1 507253B2 +P 8500 3000 +F 0 "U12" H 8550 3050 50 0000 C CNN +F 1 "74HC86" H 8550 2950 40 0000 C CNN + 1 8500 3000 + 1 0 0 -1 +$EndComp +Text Notes 5150 3650 0 60 ~ 0 +A+B +Text Notes 5100 2250 0 60 ~ 0 +A.B +Text Notes 3600 3950 0 60 ~ 0 +B +Text Notes 3500 1650 0 60 ~ 0 +A +$Comp +L 74LS32 U8 +U 1 1 50725446 +P 4500 3500 +F 0 "U8" H 4500 3550 60 0000 C CNN +F 1 "74LS32" H 4500 3450 60 0000 C CNN + 1 4500 3500 + 1 0 0 -1 +$EndComp +$Comp +L 74LS08 U7 +U 1 1 50725428 +P 4450 2300 +F 0 "U7" H 4450 2350 60 0000 C CNN +F 1 "74LS08" H 4450 2250 60 0000 C CNN + 1 4450 2300 + 1 0 0 -1 +$EndComp +$Comp +L 74HC02 U9 +U 1 1 50725415 +P 6100 3400 +F 0 "U9" H 6100 3450 60 0000 C CNN +F 1 "74HC02" H 6150 3350 60 0000 C CNN + 1 6100 3400 + 1 0 0 -1 +$EndComp +$Comp +L 74HC04 U11 +U 1 1 507253DF +P 7300 3400 +F 0 "U11" H 7450 3500 40 0000 C CNN +F 1 "74HC04" H 7500 3300 40 0000 C CNN + 1 7300 3400 + 1 0 0 -1 +$EndComp +$Comp +L 7400 U10 +U 1 1 5072539F +P 6400 2400 +F 0 "U10" H 6400 2450 60 0000 C CNN +F 1 "7400" H 6400 2300 60 0000 C CNN + 1 6400 2400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 5072534B +P 9900 3900 +F 0 "#PWR01" H 9900 3900 30 0001 C CNN +F 1 "GND" H 9900 3830 30 0001 C CNN + 1 9900 3900 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT1 U1 +U 1 1 50725278 +P 2400 1250 +F 0 "U1" H 2250 1350 50 0000 C CNN +F 1 "VPLOT1" H 2550 1350 50 0000 C CNN + 1 2400 1250 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 507251F2 +P 2000 2700 +F 0 "#FLG02" H 2000 2970 30 0001 C CNN +F 1 "PWR_FLAG" H 2000 2930 30 0000 C CNN + 1 2000 2700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 507251E5 +P 1750 3150 +F 0 "#PWR03" H 1750 3150 30 0001 C CNN +F 1 "GND" H 1750 3080 30 0001 C CNN + 1 1750 3150 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 507251A7 +P 2250 2250 +F 0 "R3" V 2330 2250 50 0000 C CNN +F 1 "1000" V 2250 2250 50 0000 C CNN + 1 2250 2250 + 1 0 0 -1 +$EndComp +$Comp +L PULSE v2 +U 1 1 50725192 +P 1750 2250 +F 0 "v2" H 1550 2350 60 0000 C CNN +F 1 "PULSE" H 1550 2200 60 0000 C CNN + 1 1750 2250 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT1 U5 +U 1 1 50653344 +P 9700 2500 +F 0 "U5" H 9550 2600 50 0000 C CNN +F 1 "VPLOT1" H 9850 2600 50 0000 C CNN + 1 9700 2500 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG04 +U 1 1 50653022 +P 6200 1900 +F 0 "#FLG04" H 6200 2170 30 0001 C CNN +F 1 "PWR_FLAG" H 6200 2130 30 0000 C CNN + 1 6200 1900 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50652FB6 +P 9900 3350 +F 0 "R2" V 9980 3350 50 0000 C CNN +F 1 "1000" V 9900 3350 50 0000 C CNN + 1 9900 3350 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT1 U2 +U 1 1 5061678B +P 2400 3300 +F 0 "U2" H 2250 3400 50 0000 C CNN +F 1 "VPLOT1" H 2550 3400 50 0000 C CNN + 1 2400 3300 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 505C9F25 +P 2250 4400 +F 0 "R1" V 2330 4400 50 0000 C CNN +F 1 "1000" V 2250 4400 50 0000 C CNN + 1 2250 4400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR05 +U 1 1 505C9EE8 +P 1700 5200 +F 0 "#PWR05" H 1700 5200 30 0001 C CNN +F 1 "GND" H 1700 5130 30 0001 C CNN + 1 1700 5200 + 1 0 0 -1 +$EndComp +$Comp +L PULSE v1 +U 1 1 505C9ECF +P 1700 4400 +F 0 "v1" H 1500 4500 60 0000 C CNN +F 1 "PULSE" H 1500 4350 60 0000 C CNN + 1 1700 4400 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/BasicGates/BasicGates.cir b/FreeEDA/Examples/BasicGates/BasicGates.cir new file mode 100644 index 0000000..839fbc6 --- /dev/null +++ b/FreeEDA/Examples/BasicGates/BasicGates.cir @@ -0,0 +1,20 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Sunday 09 December 2012 08:37:15 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 8 4 9 VPLOT8_1 +U12 5 6 9 0 3 74HC86 +U8 8 4 10 0 3 74LS32 +U7 8 4 2 0 3 74LS08 +U9 7 2 10 0 3 74HC02 +U11 7 6 0 3 74HC04 +U10 2 10 5 0 3 7400 +R3 8 0 1000 +v2 8 0 PULSE +R2 9 0 1000 +R1 4 0 1000 +v1 4 0 PULSE + +.end diff --git a/FreeEDA/Examples/BasicGates/BasicGates.cir.ckt b/FreeEDA/Examples/BasicGates/BasicGates.cir.ckt new file mode 100644 index 0000000..857c283 --- /dev/null +++ b/FreeEDA/Examples/BasicGates/BasicGates.cir.ckt @@ -0,0 +1,59 @@ +* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 08:37:15 am ist + +* Plotting option vplot8_1 +* 74hc86 +* 74ls32 +* 74ls08 +* 74hc02 +* 74hc04 +* 7400 +r3 8 0 1000 +v2 8 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) +r2 9 0 1000 +r1 4 0 1000 +v1 4 0 pulse(0 5 0 0 0 0.125e-6 0.5e-6) +a1 [5] [5_in] u12adc +a2 [6] [6_in] u12adc +a3 [5_in 6_in] 9_out u12 +a4 [9_out] [9] u12dac +.model u12 d_xor +.model u12adc adc_bridge(in_low=0.8 in_high=2.0) +.model u12dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) +a5 [8] [8_in] u8adc +a6 [4] [4_in] u8adc +a7 [8_in 4_in] 10_out u8 +a8 [10_out] [10] u8dac +.model u8 d_or +.model u8adc adc_bridge(in_low=0.8 in_high=2.0) +.model u8dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) +a9 [8] [8_in] u7adc +a10 [4] [4_in] u7adc +a11 [8_in 4_in] 2_out u7 +a12 [2_out] [2] u7dac +.model u7 d_and +.model u7adc adc_bridge(in_low=0.8 in_high=2.0) +.model u7dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) +a13 [2] [2_in] u9adc +a14 [10] [10_in] u9adc +a15 [2_in 10_in] 7_out u9 +a16 [7_out] [7] u9dac +.model u9 d_nor +.model u9adc adc_bridge(in_low=0.8 in_high=2.0) +.model u9dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) +a17 [7] [7_in] u11adc +a18 7_in 6_out u11 +a19 [6_out] [6] u11dac +.model u11 d_inverter +.model u11adc adc_bridge(in_low=0.8 in_high=2.0) +.model u11dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) +a20 [2] [2_in] u10adc +a21 [10] [10_in] u10adc +a22 [2_in 10_in] 5_out u10 +a23 [5_out] [5] u10dac +.model u10 d_nand +.model u10adc adc_bridge(in_low=0.8 in_high=2.0) +.model u10dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) + +.tran 10e-09 1e-06 0e-00 +.plot .v(8) .v(4) .v(9) . +.end diff --git a/FreeEDA/Examples/BasicGates/BasicGates.cir.out b/FreeEDA/Examples/BasicGates/BasicGates.cir.out new file mode 100644 index 0000000..4e7ccde --- /dev/null +++ b/FreeEDA/Examples/BasicGates/BasicGates.cir.out @@ -0,0 +1,64 @@ +* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 08:37:15 am ist + +* Plotting option vplot8_1 +* 74hc86 +* 74ls32 +* 74ls08 +* 74hc02 +* 74hc04 +* 7400 +r3 8 0 1000 +v2 8 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) +r2 9 0 1000 +r1 4 0 1000 +v1 4 0 pulse(0 5 0 0 0 0.125e-6 0.5e-6) +a1 [5] [5_in] u12adc +a2 [6] [6_in] u12adc +a3 [5_in 6_in] 9_out u12 +a4 [9_out] [9] u12dac +.model u12 d_xor +.model u12adc adc_bridge(in_low=0.8 in_high=2.0) +.model u12dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) +a5 [8] [8_in] u8adc +a6 [4] [4_in] u8adc +a7 [8_in 4_in] 10_out u8 +a8 [10_out] [10] u8dac +.model u8 d_or +.model u8adc adc_bridge(in_low=0.8 in_high=2.0) +.model u8dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) +a9 [8] [8_in] u7adc +a10 [4] [4_in] u7adc +a11 [8_in 4_in] 2_out u7 +a12 [2_out] [2] u7dac +.model u7 d_and +.model u7adc adc_bridge(in_low=0.8 in_high=2.0) +.model u7dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) +a13 [2] [2_in] u9adc +a14 [10] [10_in] u9adc +a15 [2_in 10_in] 7_out u9 +a16 [7_out] [7] u9dac +.model u9 d_nor +.model u9adc adc_bridge(in_low=0.8 in_high=2.0) +.model u9dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) +a17 [7] [7_in] u11adc +a18 7_in 6_out u11 +a19 [6_out] [6] u11dac +.model u11 d_inverter +.model u11adc adc_bridge(in_low=0.8 in_high=2.0) +.model u11dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) +a20 [2] [2_in] u10adc +a21 [10] [10_in] u10adc +a22 [2_in 10_in] 5_out u10 +a23 [5_out] [5] u10dac +.model u10 d_nand +.model u10adc adc_bridge(in_low=0.8 in_high=2.0) +.model u10dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) + +.tran 10e-09 1e-06 0e-00 + +* Control Statements +.control +run +plot v(8) v(4) v(9) +.endc +.end diff --git a/FreeEDA/Examples/BasicGates/BasicGates.cmp b/FreeEDA/Examples/BasicGates/BasicGates.cmp new file mode 100644 index 0000000..70877a7 --- /dev/null +++ b/FreeEDA/Examples/BasicGates/BasicGates.cmp @@ -0,0 +1,101 @@ +Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Monday 22 October 2012 05:06:15 PM IST + +BeginCmp +TimeStamp = /505C9F25; +Reference = R1; +ValeurCmp = 1000; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /50652FB6; +Reference = R2; +ValeurCmp = 1000; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /507251A7; +Reference = R3; +ValeurCmp = 1000; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /505FD8A0; +Reference = U3; +ValeurCmp = ADC; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /505FDC21; +Reference = U4; +ValeurCmp = DAC; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50725212; +Reference = U6; +ValeurCmp = ADC; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50725428; +Reference = U7; +ValeurCmp = 74LS08; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50725446; +Reference = U8; +ValeurCmp = 74LS32; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50725415; +Reference = U9; +ValeurCmp = 74HC02; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /5072539F; +Reference = U10; +ValeurCmp = 7400; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /507253DF; +Reference = U11; +ValeurCmp = 74HC04; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /507253B2; +Reference = U12; +ValeurCmp = 74HC86; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /505C9ECF; +Reference = v1; +ValeurCmp = PULSE; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50725192; +Reference = v2; +ValeurCmp = PULSE; +IdModule = ; +EndCmp + +EndListe diff --git a/FreeEDA/Examples/BasicGates/BasicGates.net b/FreeEDA/Examples/BasicGates/BasicGates.net new file mode 100644 index 0000000..e5b57d3 --- /dev/null +++ b/FreeEDA/Examples/BasicGates/BasicGates.net @@ -0,0 +1,112 @@ +# EESchema Netlist Version 1.1 created Monday 22 October 2012 05:06:15 PM IST +( + ( /505C9F25 R3 R1 1000 + ( 1 N-000006 ) + ( 2 GND ) + ) + ( /50652FB6 R3 R2 1000 + ( 1 N-000007 ) + ( 2 GND ) + ) + ( /507251A7 R3 R3 1000 + ( 1 N-000009 ) + ( 2 GND ) + ) + ( /505FD8A0 $noname$ U3 ADC + ( 1 N-000006 ) + ( 2 N-000005 ) + ) + ( /505FDC21 $noname$ U4 DAC + ( 1 N-000008 ) + ( 2 N-000007 ) + ) + ( /50725212 $noname$ U6 ADC + ( 1 N-000009 ) + ( 2 N-000011 ) + ) + ( /50725428 $noname$ U7 74LS08 + ( 1 N-000011 ) + ( 2 N-000005 ) + ( 3 N-000003 ) + ( 7 GND ) + ( 14 VCC ) + ) + ( /50725446 $noname$ U8 74LS32 + ( 1 N-000011 ) + ( 2 N-000005 ) + ( 3 N-000013 ) + ( 7 GND ) + ( 14 VCC ) + ) + ( /50725415 $noname$ U9 74HC02 + ( 1 N-000004 ) + ( 2 N-000003 ) + ( 3 N-000013 ) + ( 7 GND ) + ( 14 VCC ) + ) + ( /5072539F $noname$ U10 7400 + ( 1 N-000003 ) + ( 2 N-000013 ) + ( 3 N-000010 ) + ( 7 GND ) + ( 14 VCC ) + ) + ( /507253DF $noname$ U11 74HC04 + ( 1 N-000004 ) + ( 2 N-000012 ) + ( 7 GND ) + ( 14 VCC ) + ) + ( /507253B2 $noname$ U12 74HC86 + ( 1 N-000010 ) + ( 2 N-000012 ) + ( 3 N-000008 ) + ( 7 GND ) + ( 14 VCC ) + ) + ( /505C9ECF $noname$ v1 PULSE + ( 1 N-000006 ) + ( 2 GND ) + ) + ( /50725192 $noname$ v2 PULSE + ( 1 N-000009 ) + ( 2 GND ) + ) +) +* +{ Allowed footprints by component: +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R2 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R3 + R? + SM0603 + SM0805 + R?-* +$endlist +$component U9 + SO14* + 14DIP* +$endlist +$component U10 + 14DIP300* + SO14* +$endlist +$component v1 + 1_pin +$endlist +$component v2 + 1_pin +$endlist +$endfootprintlist +} diff --git a/FreeEDA/Examples/BasicGates/BasicGates.pro b/FreeEDA/Examples/BasicGates/BasicGates.pro new file mode 100644 index 0000000..a98d4af --- /dev/null +++ b/FreeEDA/Examples/BasicGates/BasicGates.pro @@ -0,0 +1,71 @@ +update=Monday 22 October 2012 05:04:10 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice diff --git a/FreeEDA/Examples/BasicGates/BasicGates.proj b/FreeEDA/Examples/BasicGates/BasicGates.proj new file mode 100644 index 0000000..f8a0441 --- /dev/null +++ b/FreeEDA/Examples/BasicGates/BasicGates.proj @@ -0,0 +1 @@ +schematicFile BasicGates.sch diff --git a/FreeEDA/Examples/BasicGates/BasicGates.sch b/FreeEDA/Examples/BasicGates/BasicGates.sch new file mode 100644 index 0000000..050f6d4 --- /dev/null +++ b/FreeEDA/Examples/BasicGates/BasicGates.sch @@ -0,0 +1,347 @@ +EESchema Schematic File Version 2 date Sunday 09 December 2012 08:37:05 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:BasicGates-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "9 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L VPLOT8_1 U1 +U 3 1 50C3FFE2 +P 9700 2500 +F 0 "U1" H 9550 2600 50 0000 C CNN +F 1 "VPLOT8_1" H 9850 2600 50 0000 C CNN + 3 9700 2500 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 50C3FFDB +P 2400 3300 +F 0 "U1" H 2250 3400 50 0000 C CNN +F 1 "VPLOT8_1" H 2550 3400 50 0000 C CNN + 2 2400 3300 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50C3FFD3 +P 2400 1250 +F 0 "U1" H 2250 1350 50 0000 C CNN +F 1 "VPLOT8_1" H 2550 1350 50 0000 C CNN + 1 2400 1250 + 1 0 0 -1 +$EndComp +Connection ~ 9700 3000 +Wire Wire Line + 9700 3000 9700 2800 +Wire Wire Line + 9900 3100 9900 3000 +Wire Wire Line + 9900 3000 9100 3000 +Wire Wire Line + 1700 3800 3750 3800 +Wire Wire Line + 7900 3100 7850 3100 +Wire Wire Line + 7850 3100 7850 3400 +Wire Wire Line + 7850 3400 7750 3400 +Connection ~ 5300 2300 +Wire Wire Line + 5300 2300 5300 3300 +Wire Wire Line + 5300 3300 5500 3300 +Wire Wire Line + 5100 3500 5500 3500 +Wire Wire Line + 7900 2900 7350 2900 +Wire Wire Line + 7350 2900 7350 2400 +Wire Wire Line + 7350 2400 7000 2400 +Connection ~ 3750 2200 +Wire Wire Line + 3900 3400 3750 3400 +Wire Wire Line + 3750 3400 3750 2200 +Wire Wire Line + 3850 2200 3650 2200 +Wire Wire Line + 3650 2200 3650 1700 +Connection ~ 2400 1700 +Wire Wire Line + 2400 1700 2400 1550 +Connection ~ 2250 1700 +Connection ~ 2000 2900 +Wire Wire Line + 2000 2900 2000 2700 +Wire Wire Line + 2250 3800 2250 4150 +Wire Wire Line + 1700 3800 1700 3950 +Wire Wire Line + 2250 2500 2250 2900 +Wire Wire Line + 2250 2900 1750 2900 +Connection ~ 1700 5050 +Wire Wire Line + 1700 5050 2250 5050 +Wire Wire Line + 2250 5050 2250 4650 +Wire Wire Line + 1700 4850 1700 5200 +Wire Wire Line + 1750 1800 1750 1700 +Wire Wire Line + 2250 1700 2250 2000 +Wire Wire Line + 1750 3150 1750 2700 +Connection ~ 1750 2900 +Connection ~ 2250 3800 +Wire Wire Line + 2400 3800 2400 3600 +Connection ~ 2400 3800 +Wire Wire Line + 3900 3600 3750 3600 +Wire Wire Line + 3750 3600 3750 3800 +Wire Wire Line + 3500 3800 3500 2400 +Wire Wire Line + 3500 2400 3850 2400 +Connection ~ 3500 3800 +Wire Wire Line + 5050 2300 5800 2300 +Wire Wire Line + 6200 2200 6200 1900 +Wire Wire Line + 5800 2500 5200 2500 +Wire Wire Line + 5200 2500 5200 3500 +Connection ~ 5200 3500 +Wire Wire Line + 6700 3400 6850 3400 +Wire Wire Line + 1750 1700 3650 1700 +Wire Wire Line + 9900 3600 9900 3900 +Text Notes 9150 2850 0 60 ~ 0 +~A.B +Text Notes 9050 2850 0 60 ~ 0 ++ +Text Notes 8900 2850 0 60 ~ 0 +A.B +Text Notes 8000 2300 0 60 ~ 0 +~B +Text Notes 7900 2300 0 60 ~ 0 ++ +Text Notes 7750 2300 0 60 ~ 0 +=~A +Text Notes 7900 3650 0 60 ~ 0 +=A+B +Text Notes 7850 3500 0 60 ~ 0 +A.B+A+B +Text Notes 6450 3600 0 60 ~ 0 +~((A.B)+(A+B)) +Text Notes 7100 2300 0 60 ~ 0 +~((A.B).(A+B)) +$Comp +L 74HC86 U12 +U 1 1 507253B2 +P 8500 3000 +F 0 "U12" H 8550 3050 50 0000 C CNN +F 1 "74HC86" H 8550 2950 40 0000 C CNN + 1 8500 3000 + 1 0 0 -1 +$EndComp +Text Notes 5150 3650 0 60 ~ 0 +A+B +Text Notes 5100 2250 0 60 ~ 0 +A.B +Text Notes 3600 3950 0 60 ~ 0 +B +Text Notes 3500 1650 0 60 ~ 0 +A +$Comp +L 74LS32 U8 +U 1 1 50725446 +P 4500 3500 +F 0 "U8" H 4500 3550 60 0000 C CNN +F 1 "74LS32" H 4500 3450 60 0000 C CNN + 1 4500 3500 + 1 0 0 -1 +$EndComp +$Comp +L 74LS08 U7 +U 1 1 50725428 +P 4450 2300 +F 0 "U7" H 4450 2350 60 0000 C CNN +F 1 "74LS08" H 4450 2250 60 0000 C CNN + 1 4450 2300 + 1 0 0 -1 +$EndComp +$Comp +L 74HC02 U9 +U 1 1 50725415 +P 6100 3400 +F 0 "U9" H 6100 3450 60 0000 C CNN +F 1 "74HC02" H 6150 3350 60 0000 C CNN + 1 6100 3400 + 1 0 0 -1 +$EndComp +$Comp +L 74HC04 U11 +U 1 1 507253DF +P 7300 3400 +F 0 "U11" H 7450 3500 40 0000 C CNN +F 1 "74HC04" H 7500 3300 40 0000 C CNN + 1 7300 3400 + 1 0 0 -1 +$EndComp +$Comp +L 7400 U10 +U 1 1 5072539F +P 6400 2400 +F 0 "U10" H 6400 2450 60 0000 C CNN +F 1 "7400" H 6400 2300 60 0000 C CNN + 1 6400 2400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 5072534B +P 9900 3900 +F 0 "#PWR01" H 9900 3900 30 0001 C CNN +F 1 "GND" H 9900 3830 30 0001 C CNN + 1 9900 3900 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 507251F2 +P 2000 2700 +F 0 "#FLG02" H 2000 2970 30 0001 C CNN +F 1 "PWR_FLAG" H 2000 2930 30 0000 C CNN + 1 2000 2700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 507251E5 +P 1750 3150 +F 0 "#PWR03" H 1750 3150 30 0001 C CNN +F 1 "GND" H 1750 3080 30 0001 C CNN + 1 1750 3150 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 507251A7 +P 2250 2250 +F 0 "R3" V 2330 2250 50 0000 C CNN +F 1 "1000" V 2250 2250 50 0000 C CNN + 1 2250 2250 + 1 0 0 -1 +$EndComp +$Comp +L PULSE v2 +U 1 1 50725192 +P 1750 2250 +F 0 "v2" H 1550 2350 60 0000 C CNN +F 1 "PULSE" H 1550 2200 60 0000 C CNN + 1 1750 2250 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG04 +U 1 1 50653022 +P 6200 1900 +F 0 "#FLG04" H 6200 2170 30 0001 C CNN +F 1 "PWR_FLAG" H 6200 2130 30 0000 C CNN + 1 6200 1900 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50652FB6 +P 9900 3350 +F 0 "R2" V 9980 3350 50 0000 C CNN +F 1 "1000" V 9900 3350 50 0000 C CNN + 1 9900 3350 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 505C9F25 +P 2250 4400 +F 0 "R1" V 2330 4400 50 0000 C CNN +F 1 "1000" V 2250 4400 50 0000 C CNN + 1 2250 4400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR05 +U 1 1 505C9EE8 +P 1700 5200 +F 0 "#PWR05" H 1700 5200 30 0001 C CNN +F 1 "GND" H 1700 5130 30 0001 C CNN + 1 1700 5200 + 1 0 0 -1 +$EndComp +$Comp +L PULSE v1 +U 1 1 505C9ECF +P 1700 4400 +F 0 "v1" H 1500 4500 60 0000 C CNN +F 1 "PULSE" H 1500 4350 60 0000 C CNN + 1 1700 4400 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/BasicGates/analysis b/FreeEDA/Examples/BasicGates/analysis new file mode 100644 index 0000000..bf5e632 --- /dev/null +++ b/FreeEDA/Examples/BasicGates/analysis @@ -0,0 +1 @@ +.tran 10e-09 1e-06 0e-00 diff --git a/FreeEDA/Examples/FlipFlops/FlipFlops-cache.bak b/FreeEDA/Examples/FlipFlops/FlipFlops-cache.bak new file mode 100644 index 0000000..71dbe1a --- /dev/null +++ b/FreeEDA/Examples/FlipFlops/FlipFlops-cache.bak @@ -0,0 +1,140 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 04:03:52 PM IST +#encoding utf-8 +# +# 74LS74 +# +DEF 74LS74 U 0 40 Y Y 2 F N +F0 "U" 150 300 60 H V C CNN +F1 "74LS74" 300 -295 60 H V C CNN +ALIAS 74HC74 +DRAW +X GND 7 -200 -250 0 U 30 30 0 0 W N +X VCC 14 -200 250 0 D 30 30 0 0 W N +S -300 250 300 -250 0 1 0 N +X Cd 1 0 -550 300 U 60 60 1 1 I I +X D 2 -600 200 300 R 60 60 1 1 I +X Cp 3 -600 0 300 R 60 60 1 1 I C +X Sd 4 0 550 300 D 60 60 1 1 I I +X Q 5 600 200 300 L 60 60 1 1 O +X ~Q 6 600 -200 300 L 60 60 1 1 O I +X ~Q 8 600 -200 300 L 60 60 2 1 O I +X Q 9 600 200 300 L 60 60 2 1 O +X Sd 10 0 550 300 D 60 60 2 1 I I +X Cp 11 -600 0 300 R 60 60 2 1 I C +X D 12 -600 200 300 R 60 60 2 1 I +X Cd 13 0 -550 300 U 60 60 2 1 I I +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# pwl +# +DEF pwl v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pwl" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50 +A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50 +A -75 -700 750 919 880 0 1 0 N -100 50 -50 50 +A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50 +A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot1 +# +DEF vplot1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/FlipFlops/FlipFlops-cache.lib b/FreeEDA/Examples/FlipFlops/FlipFlops-cache.lib new file mode 100644 index 0000000..dc46d4f --- /dev/null +++ b/FreeEDA/Examples/FlipFlops/FlipFlops-cache.lib @@ -0,0 +1,147 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 04:06:09 PM IST +#encoding utf-8 +# +# 74LS74 +# +DEF 74LS74 U 0 40 Y Y 2 F N +F0 "U" 150 300 60 H V C CNN +F1 "74LS74" 300 -295 60 H V C CNN +ALIAS 74HC74 +DRAW +X GND 7 -200 -250 0 U 30 30 0 0 W N +X VCC 14 -200 250 0 D 30 30 0 0 W N +S -300 250 300 -250 0 1 0 N +X Cd 1 0 -550 300 U 60 60 1 1 I I +X D 2 -600 200 300 R 60 60 1 1 I +X Cp 3 -600 0 300 R 60 60 1 1 I C +X Sd 4 0 550 300 D 60 60 1 1 I I +X Q 5 600 200 300 L 60 60 1 1 O +X ~Q 6 600 -200 300 L 60 60 1 1 O I +X ~Q 8 600 -200 300 L 60 60 2 1 O I +X Q 9 600 200 300 L 60 60 2 1 O +X Sd 10 0 550 300 D 60 60 2 1 I I +X Cp 11 -600 0 300 R 60 60 2 1 I C +X D 12 -600 200 300 R 60 60 2 1 I +X Cd 13 0 -550 300 U 60 60 2 1 I I +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# pwl +# +DEF pwl v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pwl" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50 +A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50 +A -75 -700 750 919 880 0 1 0 N -100 50 -50 50 +A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50 +A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/FlipFlops/FlipFlops.bak b/FreeEDA/Examples/FlipFlops/FlipFlops.bak new file mode 100644 index 0000000..e821e8b --- /dev/null +++ b/FreeEDA/Examples/FlipFlops/FlipFlops.bak @@ -0,0 +1,303 @@ +EESchema Schematic File Version 2 date Sunday 09 December 2012 04:03:52 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:FlipFlops-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "9 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 2800 4400 +Wire Wire Line + 2800 4400 2800 4050 +Wire Wire Line + 6000 2900 6000 3400 +Wire Wire Line + 3950 5200 3950 5450 +Wire Wire Line + 3950 5450 4500 5450 +Wire Wire Line + 2150 3200 4000 3200 +Connection ~ 6000 3400 +Connection ~ 2350 5300 +Wire Wire Line + 2350 5300 2350 5150 +Connection ~ 6950 4550 +Wire Wire Line + 5100 4550 5100 4150 +Connection ~ 9150 4550 +Wire Wire Line + 5700 3400 6350 3400 +Connection ~ 5100 2050 +Wire Wire Line + 6950 3050 6950 2050 +Wire Wire Line + 4000 3200 4000 3400 +Wire Wire Line + 4000 3400 4500 3400 +Connection ~ 2500 4400 +Connection ~ 2500 4100 +Wire Wire Line + 2500 4250 2500 3950 +Wire Wire Line + 2500 3200 2500 3450 +Wire Wire Line + 2500 2950 2150 2950 +Wire Wire Line + 2500 3050 2500 2750 +Connection ~ 2500 2950 +Wire Wire Line + 2500 4100 2150 4100 +Wire Wire Line + 2500 4400 2500 4550 +Wire Wire Line + 2500 5450 2500 5050 +Connection ~ 2500 5300 +Connection ~ 2500 3200 +Wire Wire Line + 4500 3600 4000 3600 +Wire Wire Line + 4000 3600 4000 4400 +Wire Wire Line + 5100 2050 5100 3050 +Wire Wire Line + 6100 3600 6100 4400 +Wire Wire Line + 6100 3600 6350 3600 +Connection ~ 4000 4400 +Wire Wire Line + 6950 4150 6950 4550 +Wire Wire Line + 4900 3200 4900 3350 +Wire Wire Line + 2500 2050 2500 2250 +Connection ~ 2500 2050 +Wire Wire Line + 6950 2050 2150 2050 +Wire Wire Line + 6100 4400 2150 4400 +Wire Wire Line + 3950 4700 3950 4550 +Wire Wire Line + 3950 4550 6950 4550 +Connection ~ 4500 4550 +Connection ~ 5100 4550 +Wire Wire Line + 3950 5300 2150 5300 +Connection ~ 3950 5300 +Wire Wire Line + 2800 3200 2800 2850 +Connection ~ 2800 3200 +NoConn ~ 7550 3800 +NoConn ~ 7550 3400 +NoConn ~ 5700 3800 +$Comp +L PWR_FLAG #FLG01 +U 1 1 507305F9 +P 2350 5150 +F 0 "#FLG01" H 2350 5420 30 0001 C CNN +F 1 "PWR_FLAG" H 2350 5380 30 0000 C CNN + 1 2350 5150 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 507305F3 +P 4900 3200 +F 0 "#FLG02" H 4900 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 4900 3430 30 0000 C CNN + 1 4900 3200 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT1 U4 +U 1 1 50730491 +P 2800 3750 +F 0 "U4" H 2650 3850 50 0000 C CNN +F 1 "VPLOT1" H 2950 3850 50 0000 C CNN + 1 2800 3750 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT1 U3 +U 1 1 50730484 +P 2800 2550 +F 0 "U3" H 2650 2650 50 0000 C CNN +F 1 "VPLOT1" H 2950 2650 50 0000 C CNN + 1 2800 2550 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT1 U2 +U 1 1 50730477 +P 6000 2600 +F 0 "U2" H 5850 2700 50 0000 C CNN +F 1 "VPLOT1" H 6150 2700 50 0000 C CNN + 1 6000 2600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 5073005A +P 2500 5450 +F 0 "#PWR03" H 2500 5450 30 0001 C CNN +F 1 "GND" H 2500 5380 30 0001 C CNN + 1 2500 5450 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 5073006C +P 2500 3050 +F 0 "#PWR04" H 2500 3050 30 0001 C CNN +F 1 "GND" H 2500 2980 30 0001 C CNN + 1 2500 3050 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR06 +U 1 1 50730061 +P 2500 4250 +F 0 "#PWR06" H 2500 4250 30 0001 C CNN +F 1 "GND" H 2500 4180 30 0001 C CNN + 1 2500 4250 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 5072FFF1 +P 2500 3700 +F 0 "R2" V 2580 3700 50 0000 C CNN +F 1 "1000" V 2500 3700 50 0000 C CNN + 1 2500 3700 + 1 0 0 -1 +$EndComp +$Comp +L PWL v2 +U 1 1 5072FFEC +P 2150 3650 +F 0 "v2" H 1950 3750 60 0000 C CNN +F 1 "PWL" H 1950 3600 60 0000 C CNN +F 2 "R1" H 1850 3650 60 0000 C CNN + 1 2150 3650 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 5072FFBC +P 2500 4800 +F 0 "R3" V 2580 4800 50 0000 C CNN +F 1 "1000" V 2500 4800 50 0000 C CNN + 1 2500 4800 + 1 0 0 -1 +$EndComp +$Comp +L PULSE v3 +U 1 1 5072FFAC +P 2150 4850 +F 0 "v3" H 1950 4950 60 0000 C CNN +F 1 "PULSE" H 1950 4800 60 0000 C CNN +F 2 "R1" H 1850 4850 60 0000 C CNN + 1 2150 4850 + 1 0 0 -1 +$EndComp +$Comp +L R R4 +U 1 1 5072FF51 +P 3950 4950 +F 0 "R4" V 4030 4950 50 0000 C CNN +F 1 "1000" V 3950 4950 50 0000 C CNN + 1 3950 4950 + 1 0 0 -1 +$EndComp +$Comp +L DC v4 +U 1 1 5072FF43 +P 4500 5000 +F 0 "v4" H 4300 5100 60 0000 C CNN +F 1 "5" H 4300 4950 60 0000 C CNN +F 2 "R1" H 4200 5000 60 0000 C CNN + 1 4500 5000 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 5072FEED +P 2150 2500 +F 0 "v1" H 1950 2600 60 0000 C CNN +F 1 "5" H 1950 2450 60 0000 C CNN +F 2 "R1" H 1850 2500 60 0000 C CNN + 1 2150 2500 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5072FE04 +P 2500 2500 +F 0 "R1" V 2580 2500 50 0000 C CNN +F 1 "1000" V 2500 2500 50 0000 C CNN + 1 2500 2500 + 1 0 0 -1 +$EndComp +$Comp +L 74HC74 U1 +U 2 1 50727541 +P 6950 3600 +F 0 "U1" H 7100 3900 60 0000 C CNN +F 1 "74HC74" H 7250 3305 60 0000 C CNN + 2 6950 3600 + 1 0 0 -1 +$EndComp +$Comp +L 74HC74 U1 +U 1 1 507274E2 +P 5100 3600 +F 0 "U1" H 5250 3900 60 0000 C CNN +F 1 "74HC74" H 5400 3305 60 0000 C CNN + 1 5100 3600 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/FlipFlops/FlipFlops.cir b/FreeEDA/Examples/FlipFlops/FlipFlops.cir new file mode 100644 index 0000000..92a4982 --- /dev/null +++ b/FreeEDA/Examples/FlipFlops/FlipFlops.cir @@ -0,0 +1,18 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Sunday 09 December 2012 04:06:26 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U2 6 2 10 VPLOT8_1 +R2 2 0 1000 +v2 2 0 PWL +R3 6 0 1000 +v3 6 0 PULSE +R4 1 0 1000 +v4 1 0 5 +v1 11 0 5 +R1 11 0 1000 +U1 1 2 6 11 10 3 0 5 4 11 6 10 1 7 74HC74 + +.end diff --git a/FreeEDA/Examples/FlipFlops/FlipFlops.cir.ckt b/FreeEDA/Examples/FlipFlops/FlipFlops.cir.ckt new file mode 100644 index 0000000..5f457bc --- /dev/null +++ b/FreeEDA/Examples/FlipFlops/FlipFlops.cir.ckt @@ -0,0 +1,25 @@ +* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 04:06:26 pm ist + +* Plotting option vplot8_1 +r2 2 0 1000 +v2 2 0 pwl(0 0 2.6 0 2.60000000001 5 3 5 ) +r3 6 0 1000 +v3 6 0 pulse(0 5 0 0 0 0.5 1) +r4 1 0 1000 +v4 1 0 5 +v1 11 0 5 +r1 11 0 1000 +* 74hc74 +a1 [2 6 11 1] [2_in 6_in 11_in 1_in] u1adc +a2 2_in 6_in ~11_in ~1_in 10_out 3_out u1 +a3 [10_out 3_out] [10 3] u1dac +a4 [10 6 11 1] [10_in 6_in 11_in 1_in] u1adc +a5 10_in 6_in ~11_in ~1_in 4_out 5_out u1 +a6 [4_out 5_out] [4 5] u1dac +.model u1 d_dff +.model u1adc adc_bridge(in_low=0.8 in_high=2.0) +.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) + +.tran 10e-03 4e-00 0e-00 +.plot v(6) v(2) v(10) +.end diff --git a/FreeEDA/Examples/FlipFlops/FlipFlops.cir.out b/FreeEDA/Examples/FlipFlops/FlipFlops.cir.out new file mode 100644 index 0000000..9410f5b --- /dev/null +++ b/FreeEDA/Examples/FlipFlops/FlipFlops.cir.out @@ -0,0 +1,30 @@ +* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 04:06:26 pm ist + +* Plotting option vplot8_1 +r2 2 0 1000 +v2 2 0 pwl(0 0 2.6 0 2.60000000001 5 3 5 ) +r3 6 0 1000 +v3 6 0 pulse(0 5 0 0 0 0.5 1) +r4 1 0 1000 +v4 1 0 5 +v1 11 0 5 +r1 11 0 1000 +* 74hc74 +a1 [2 6 11 1] [2_in 6_in 11_in 1_in] u1adc +a2 2_in 6_in ~11_in ~1_in 10_out 3_out u1 +a3 [10_out 3_out] [10 3] u1dac +a4 [10 6 11 1] [10_in 6_in 11_in 1_in] u1adc +a5 10_in 6_in ~11_in ~1_in 4_out 5_out u1 +a6 [4_out 5_out] [4 5] u1dac +.model u1 d_dff +.model u1adc adc_bridge(in_low=0.8 in_high=2.0) +.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) + +.tran 10e-03 4e-00 0e-00 + +* Control Statements +.control +run +plot v(6) v(2) v(10) +.endc +.end diff --git a/FreeEDA/Examples/FlipFlops/FlipFlops.cir.out1 b/FreeEDA/Examples/FlipFlops/FlipFlops.cir.out1 new file mode 100644 index 0000000..c855d5e --- /dev/null +++ b/FreeEDA/Examples/FlipFlops/FlipFlops.cir.out1 @@ -0,0 +1,34 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 30 october 2012 07:12:51 pm ist + +* Plotting option vplot1 +* Plotting option vplot1 +* Plotting option vplot1 +r2 1 0 1000 +v2 1 0 pwl(0 0 2.6 0 2.6000000000001 5 3 5 ) +r3 4 0 1000 +v3 4 0 pulse(0 5 0 0 0 0.5 1) +r4 9 0 1000 +v4 9 0 dc 5 +v1 10 0 dc 5 +r1 10 0 1000 +* 74hc74 +a1 [1 4 10 9] [1_in 4_in 10_in 9_in] u1adc +a2 1_in 4_in ~10_in ~9_in 2_out 3_out u1 +a3 [2_out 3_out] [2 3] u1dac +a4 [2 4 10 9] [2_in 4_in 10_in 9_in] u1adc +a5 2_in 4_in ~10_in ~9_in 6_out 7_out u1 +a6 [6_out 7_out] [6 7] dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) +.model u1 d_dff +.model u1adc adc_bridge(in_low=0.8 in_high=2.0) +.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) + +.tran 10e-03 4e-00 0e-00 + +* Control Statements +.control +run +plot v(4) +plot v(1) +plot v(2) +.endc +.end diff --git a/FreeEDA/Examples/FlipFlops/FlipFlops.pro b/FreeEDA/Examples/FlipFlops/FlipFlops.pro new file mode 100644 index 0000000..a47819b --- /dev/null +++ b/FreeEDA/Examples/FlipFlops/FlipFlops.pro @@ -0,0 +1,70 @@ +update=Monday 22 October 2012 05:17:18 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=cmos4000 +LibName8=adc-dac +LibName9=memory +LibName10=xilinx +LibName11=special +LibName12=microcontrollers +LibName13=dsp +LibName14=microchip +LibName15=analog_switches +LibName16=motorola +LibName17=texas +LibName18=intel +LibName19=audio +LibName20=interface +LibName21=digital-audio +LibName22=philips +LibName23=display +LibName24=cypress +LibName25=siliconi +LibName26=opto +LibName27=atmel +LibName28=contrib +LibName29=valves +LibName30=analogSpice +LibName31=converterSpice +LibName32=digitalSpice +LibName33=linearSpice +LibName34=measurementSpice +LibName35=portSpice +LibName36=sourcesSpice diff --git a/FreeEDA/Examples/FlipFlops/FlipFlops.proj b/FreeEDA/Examples/FlipFlops/FlipFlops.proj new file mode 100644 index 0000000..cc7b7c9 --- /dev/null +++ b/FreeEDA/Examples/FlipFlops/FlipFlops.proj @@ -0,0 +1 @@ +schematicFile FlipFlops.sch diff --git a/FreeEDA/Examples/FlipFlops/FlipFlops.sch b/FreeEDA/Examples/FlipFlops/FlipFlops.sch new file mode 100644 index 0000000..d8fbb5e --- /dev/null +++ b/FreeEDA/Examples/FlipFlops/FlipFlops.sch @@ -0,0 +1,303 @@ +EESchema Schematic File Version 2 date Sunday 09 December 2012 04:06:09 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:FlipFlops-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "9 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L VPLOT8_1 U2 +U 3 1 50C4695B +P 6000 2600 +F 0 "U2" H 5850 2700 50 0000 C CNN +F 1 "VPLOT8_1" H 6150 2700 50 0000 C CNN + 3 6000 2600 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 50C46950 +P 2800 2550 +F 0 "U2" H 2650 2650 50 0000 C CNN +F 1 "VPLOT8_1" H 2950 2650 50 0000 C CNN + 2 2800 2550 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 50C46944 +P 2800 3750 +F 0 "U2" H 2650 3850 50 0000 C CNN +F 1 "VPLOT8_1" H 2950 3850 50 0000 C CNN + 1 2800 3750 + 1 0 0 -1 +$EndComp +Connection ~ 2800 4400 +Wire Wire Line + 2800 4400 2800 4050 +Wire Wire Line + 6000 2900 6000 3400 +Wire Wire Line + 3950 5200 3950 5450 +Wire Wire Line + 3950 5450 4500 5450 +Wire Wire Line + 2150 3200 4000 3200 +Connection ~ 6000 3400 +Connection ~ 2350 5300 +Wire Wire Line + 2350 5300 2350 5150 +Connection ~ 6950 4550 +Wire Wire Line + 5100 4550 5100 4150 +Connection ~ 9150 4550 +Wire Wire Line + 5700 3400 6350 3400 +Connection ~ 5100 2050 +Wire Wire Line + 6950 3050 6950 2050 +Wire Wire Line + 4000 3200 4000 3400 +Wire Wire Line + 4000 3400 4500 3400 +Connection ~ 2500 4400 +Connection ~ 2500 4100 +Wire Wire Line + 2500 4250 2500 3950 +Wire Wire Line + 2500 3200 2500 3450 +Wire Wire Line + 2500 2950 2150 2950 +Wire Wire Line + 2500 3050 2500 2750 +Connection ~ 2500 2950 +Wire Wire Line + 2500 4100 2150 4100 +Wire Wire Line + 2500 4400 2500 4550 +Wire Wire Line + 2500 5450 2500 5050 +Connection ~ 2500 5300 +Connection ~ 2500 3200 +Wire Wire Line + 4500 3600 4000 3600 +Wire Wire Line + 4000 3600 4000 4400 +Wire Wire Line + 5100 2050 5100 3050 +Wire Wire Line + 6100 3600 6100 4400 +Wire Wire Line + 6100 3600 6350 3600 +Connection ~ 4000 4400 +Wire Wire Line + 6950 4150 6950 4550 +Wire Wire Line + 4900 3200 4900 3350 +Wire Wire Line + 2500 2050 2500 2250 +Connection ~ 2500 2050 +Wire Wire Line + 6950 2050 2150 2050 +Wire Wire Line + 6100 4400 2150 4400 +Wire Wire Line + 3950 4700 3950 4550 +Wire Wire Line + 3950 4550 6950 4550 +Connection ~ 4500 4550 +Connection ~ 5100 4550 +Wire Wire Line + 3950 5300 2150 5300 +Connection ~ 3950 5300 +Wire Wire Line + 2800 3200 2800 2850 +Connection ~ 2800 3200 +NoConn ~ 7550 3800 +NoConn ~ 7550 3400 +NoConn ~ 5700 3800 +$Comp +L PWR_FLAG #FLG01 +U 1 1 507305F9 +P 2350 5150 +F 0 "#FLG01" H 2350 5420 30 0001 C CNN +F 1 "PWR_FLAG" H 2350 5380 30 0000 C CNN + 1 2350 5150 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 507305F3 +P 4900 3200 +F 0 "#FLG02" H 4900 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 4900 3430 30 0000 C CNN + 1 4900 3200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 5073005A +P 2500 5450 +F 0 "#PWR03" H 2500 5450 30 0001 C CNN +F 1 "GND" H 2500 5380 30 0001 C CNN + 1 2500 5450 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 5073006C +P 2500 3050 +F 0 "#PWR04" H 2500 3050 30 0001 C CNN +F 1 "GND" H 2500 2980 30 0001 C CNN + 1 2500 3050 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR05 +U 1 1 50730061 +P 2500 4250 +F 0 "#PWR05" H 2500 4250 30 0001 C CNN +F 1 "GND" H 2500 4180 30 0001 C CNN + 1 2500 4250 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 5072FFF1 +P 2500 3700 +F 0 "R2" V 2580 3700 50 0000 C CNN +F 1 "1000" V 2500 3700 50 0000 C CNN + 1 2500 3700 + 1 0 0 -1 +$EndComp +$Comp +L PWL v2 +U 1 1 5072FFEC +P 2150 3650 +F 0 "v2" H 1950 3750 60 0000 C CNN +F 1 "PWL" H 1950 3600 60 0000 C CNN +F 2 "R1" H 1850 3650 60 0000 C CNN + 1 2150 3650 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 5072FFBC +P 2500 4800 +F 0 "R3" V 2580 4800 50 0000 C CNN +F 1 "1000" V 2500 4800 50 0000 C CNN + 1 2500 4800 + 1 0 0 -1 +$EndComp +$Comp +L PULSE v3 +U 1 1 5072FFAC +P 2150 4850 +F 0 "v3" H 1950 4950 60 0000 C CNN +F 1 "PULSE" H 1950 4800 60 0000 C CNN +F 2 "R1" H 1850 4850 60 0000 C CNN + 1 2150 4850 + 1 0 0 -1 +$EndComp +$Comp +L R R4 +U 1 1 5072FF51 +P 3950 4950 +F 0 "R4" V 4030 4950 50 0000 C CNN +F 1 "1000" V 3950 4950 50 0000 C CNN + 1 3950 4950 + 1 0 0 -1 +$EndComp +$Comp +L DC v4 +U 1 1 5072FF43 +P 4500 5000 +F 0 "v4" H 4300 5100 60 0000 C CNN +F 1 "5" H 4300 4950 60 0000 C CNN +F 2 "R1" H 4200 5000 60 0000 C CNN + 1 4500 5000 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 5072FEED +P 2150 2500 +F 0 "v1" H 1950 2600 60 0000 C CNN +F 1 "5" H 1950 2450 60 0000 C CNN +F 2 "R1" H 1850 2500 60 0000 C CNN + 1 2150 2500 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5072FE04 +P 2500 2500 +F 0 "R1" V 2580 2500 50 0000 C CNN +F 1 "1000" V 2500 2500 50 0000 C CNN + 1 2500 2500 + 1 0 0 -1 +$EndComp +$Comp +L 74HC74 U1 +U 2 1 50727541 +P 6950 3600 +F 0 "U1" H 7100 3900 60 0000 C CNN +F 1 "74HC74" H 7250 3305 60 0000 C CNN + 2 6950 3600 + 1 0 0 -1 +$EndComp +$Comp +L 74HC74 U1 +U 1 1 507274E2 +P 5100 3600 +F 0 "U1" H 5250 3900 60 0000 C CNN +F 1 "74HC74" H 5400 3305 60 0000 C CNN + 1 5100 3600 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/FlipFlops/analysis b/FreeEDA/Examples/FlipFlops/analysis new file mode 100644 index 0000000..df1e38d --- /dev/null +++ b/FreeEDA/Examples/FlipFlops/analysis @@ -0,0 +1 @@ +.tran 10e-03 4e-00 0e-00 diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.bak b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.bak new file mode 100644 index 0000000..6b90b1a --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.bak @@ -0,0 +1,145 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 10 December 2012 10:40:22 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# CP +# +DEF CP C 0 10 N N 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "CP" 50 -100 50 H V L CNN +ALIAS CAPAPOL +$FPLIST + CP* + SM* +$ENDFPLIST +DRAW +P 4 0 1 8 -100 50 -100 -50 100 -50 100 50 N +P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F +X ~ 1 0 200 150 D 40 40 1 1 P +X ~ 2 0 -200 150 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# IC +# +DEF IC U? 0 0 Y N 1 F N +F0 "U?" 0 270 30 H V C CNN +F1 "IC" 0 230 30 H V C CNN +DRAW +X ic 1 0 0 0 U 20 20 0 0 P +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# LM555N +# +DEF LM555N X 0 40 Y Y 1 F N +F0 "X" 0 100 70 H V C CNN +F1 "LM555N" 0 -100 70 H V C CNN +DRAW +X GND 1 0 -400 0 U 60 60 0 0 W N +X VCC 8 0 400 0 D 60 60 0 0 W N +S -400 -400 400 400 0 1 0 N +X TR 2 -700 200 300 R 60 60 1 1 I +X Q 3 700 200 300 L 60 60 1 1 O +X R 4 -700 -300 300 R 60 60 1 1 I I +X CV 5 -700 -50 300 R 60 60 1 1 I +X THR 6 700 -200 300 L 60 60 1 1 I +X DIS 7 700 0 300 L 60 60 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.lib b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.lib new file mode 100644 index 0000000..65c560c --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.lib @@ -0,0 +1,145 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 02 April 2013 02:52:17 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# CP +# +DEF CP C 0 10 N N 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "CP" 50 -100 50 H V L CNN +ALIAS CAPAPOL +$FPLIST + CP* + SM* +$ENDFPLIST +DRAW +P 4 0 1 8 -100 50 -100 -50 100 -50 100 50 N +P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F +X ~ 1 0 200 150 D 40 40 1 1 P +X ~ 2 0 -200 150 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# IC +# +DEF IC U? 0 0 Y N 1 F N +F0 "U?" 0 270 30 H V C CNN +F1 "IC" 0 230 30 H V C CNN +DRAW +X ic 1 0 0 0 U 20 20 0 0 P +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# LM555N +# +DEF LM555N X 0 40 Y Y 1 F N +F0 "X" 0 100 70 H V C CNN +F1 "LM555N" 0 -100 70 H V C CNN +DRAW +X GND 1 0 -400 0 U 60 60 0 0 W N +X VCC 8 0 400 0 D 60 60 0 0 W N +S -400 -400 400 400 0 1 0 N +X TR 2 -700 200 300 R 60 60 1 1 I +X Q 3 700 200 300 L 60 60 1 1 O +X R 4 -700 -300 300 R 60 60 1 1 I I +X CV 5 -700 -50 300 R 60 60 1 1 I +X THR 6 700 -200 300 L 60 60 1 1 I +X DIS 7 700 0 300 L 60 60 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.bak b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.bak new file mode 100644 index 0000000..93f021b --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.bak @@ -0,0 +1,252 @@ +EESchema Schematic File Version 2 date Monday 10 December 2012 10:40:22 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:convergenceAidSpice +LIBS:IC555AstableMultivibrator-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "10 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L IC U2 +U 1 1 50C55B25 +P 4450 4050 +F 0 "U2" H 4450 4320 30 0000 C CNN +F 1 "IC" H 4450 4280 30 0000 C CNN + 1 4450 4050 + 1 0 0 -1 +$EndComp +Connection ~ 4450 4100 +Wire Wire Line + 4450 4050 4450 4100 +Connection ~ 6300 3350 +Wire Wire Line + 6300 3150 6300 3550 +Connection ~ 5700 4550 +Wire Wire Line + 5700 4550 5700 4300 +Wire Wire Line + 2650 4050 2650 4700 +Wire Wire Line + 2650 4700 4850 4700 +Connection ~ 4850 4550 +Wire Wire Line + 4850 4700 4850 4550 +Connection ~ 5200 4550 +Wire Wire Line + 3500 4550 6300 4550 +Wire Wire Line + 6300 4550 6300 4050 +Connection ~ 5200 4400 +Wire Wire Line + 4150 4400 5200 4400 +Connection ~ 4250 2850 +Wire Wire Line + 4250 2850 4250 3850 +Wire Wire Line + 4250 3850 4500 3850 +Wire Wire Line + 5900 3550 6100 3550 +Wire Wire Line + 6100 3550 6100 3000 +Wire Wire Line + 6100 3000 3750 3000 +Wire Wire Line + 3750 3000 3750 3450 +Connection ~ 3500 3450 +Wire Wire Line + 3750 3450 3500 3450 +Connection ~ 3500 4100 +Wire Wire Line + 3950 4100 3950 3350 +Wire Wire Line + 3950 3350 4500 3350 +Wire Wire Line + 3500 4150 3500 4000 +Wire Wire Line + 3500 3500 3500 3350 +Wire Wire Line + 5200 4550 5200 3950 +Wire Wire Line + 5900 3750 5900 4100 +Wire Wire Line + 5900 4100 3500 4100 +Connection ~ 3950 4100 +Wire Wire Line + 5200 2850 3500 2850 +Wire Wire Line + 4150 4000 4150 3600 +Wire Wire Line + 4150 3600 4500 3600 +Wire Wire Line + 6300 3350 5900 3350 +Wire Wire Line + 4450 2850 4450 2700 +Connection ~ 4450 2850 +Wire Wire Line + 4450 2700 2650 2700 +Wire Wire Line + 2650 2700 2650 3150 +Wire Wire Line + 5200 2650 5200 3150 +Connection ~ 5200 2850 +Wire Wire Line + 5900 4550 5900 4800 +Connection ~ 5900 4550 +Wire Wire Line + 3750 4100 3750 4000 +Connection ~ 3750 4100 +$Comp +L VPLOT8_1 U1 +U 2 1 50C4B392 +P 6300 2850 +F 0 "U1" H 6150 2950 50 0000 C CNN +F 1 "VPLOT8_1" H 6450 2950 50 0000 C CNN + 2 6300 2850 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50C4B386 +P 3750 3700 +F 0 "U1" H 3600 3800 50 0000 C CNN +F 1 "VPLOT8_1" H 3900 3800 50 0000 C CNN + 1 3750 3700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 50A93D02 +P 5900 4800 +F 0 "#PWR01" H 5900 4800 30 0001 C CNN +F 1 "GND" H 5900 4730 30 0001 C CNN + 1 5900 4800 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 50A93CC0 +P 5700 4300 +F 0 "#FLG02" H 5700 4570 30 0001 C CNN +F 1 "PWR_FLAG" H 5700 4530 30 0000 C CNN + 1 5700 4300 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG03 +U 1 1 50A93CB7 +P 5200 2650 +F 0 "#FLG03" H 5200 2920 30 0001 C CNN +F 1 "PWR_FLAG" H 5200 2880 30 0000 C CNN + 1 5200 2650 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 50A93C56 +P 2650 3600 +F 0 "v1" H 2450 3700 60 0000 C CNN +F 1 "5" H 2450 3550 60 0000 C CNN +F 2 "R1" H 2350 3600 60 0000 C CNN + 1 2650 3600 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50A93BFE +P 6300 3800 +F 0 "R3" V 6380 3800 50 0000 C CNN +F 1 "1000" V 6300 3800 50 0000 C CNN + 1 6300 3800 + 1 0 0 -1 +$EndComp +$Comp +L C C2 +U 1 1 50A93ACA +P 4150 4200 +F 0 "C2" H 4200 4300 50 0000 L CNN +F 1 "0.01e-6" H 4200 4100 50 0000 L CNN + 1 4150 4200 + 1 0 0 -1 +$EndComp +$Comp +L CP C1 +U 1 1 50A93893 +P 3500 4350 +F 0 "C1" H 3550 4450 50 0000 L CNN +F 1 "100e-12" H 3550 4250 50 0000 L CNN + 1 3500 4350 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50A93858 +P 3500 3750 +F 0 "R2" V 3580 3750 50 0000 C CNN +F 1 "10000" V 3500 3750 50 0000 C CNN + 1 3500 3750 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50A93852 +P 3500 3100 +F 0 "R1" V 3580 3100 50 0000 C CNN +F 1 "1000" V 3500 3100 50 0000 C CNN + 1 3500 3100 + 1 0 0 -1 +$EndComp +$Comp +L LM555N X1 +U 1 1 50A937B9 +P 5200 3550 +F 0 "X1" H 5200 3650 70 0000 C CNN +F 1 "LM555N" H 5200 3450 70 0000 C CNN + 1 5200 3550 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.brd b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.brd new file mode 100644 index 0000000..fce068e --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.brd @@ -0,0 +1,84 @@ +PCBNEW-BOARD Version 1 date Tuesday 02 April 2013 02:48:05 PM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 0 +NoConn 0 +Di 0 0 117000 82670 +Ndraw 0 +Ntrack 0 +Nzone 0 +BoardThickness 630 +Nmodule 0 +Nnets 1 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "2 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +$EndNCLASS +$TRACK +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir new file mode 100644 index 0000000..b1689e6 --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir @@ -0,0 +1,17 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 06 June 2013 11:44:39 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U2 4 IC +U1 4 5 VPLOT8_1 +v1 3 0 5 +R3 5 0 1000 +C2 2 0 0.01e-6 +C1 4 0 100e-12 +R2 6 4 10000 +R1 3 6 1000 +X1 0 4 5 3 2 4 6 3 LM555N + +.end diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.ckt b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.ckt new file mode 100644 index 0000000..58dd7f4 --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.ckt @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 06 june 2013 11:44:39 pm ist +.include lm555n.sub + +.ic v(3)=0 + +.ic v(4)=0 +* Plotting option vplot8_1 +v1 3 0 5 +r3 5 0 1000 +c2 2 0 0.01e-6 +c1 4 0 100e-12 +r2 6 4 10000 +r1 3 6 1000 +x1 0 4 5 3 2 4 6 3 lm555n + +.tran 50e-09 5e-06 0e-00 +.plot v(4) v(5) +.end diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.out b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.out new file mode 100644 index 0000000..06e4c85 --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.out @@ -0,0 +1,23 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 06 june 2013 11:44:39 pm ist +.include lm555n.sub + +.ic v(3)=0 + +.ic v(4)=0 +* Plotting option vplot8_1 +v1 3 0 5 +r3 5 0 1000 +c2 2 0 0.01e-6 +c1 4 0 100e-12 +r2 6 4 10000 +r1 3 6 1000 +x1 0 4 5 3 2 4 6 3 lm555n + +.tran 50e-09 5e-06 0e-00 + +* Control Statements +.control +run +plot v(4) v(5) +.endc +.end diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.net b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.net new file mode 100644 index 0000000..ed060b3 --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.net @@ -0,0 +1,110 @@ +# EESchema Netlist Version 1.1 created Tuesday 02 April 2013 02:47:19 PM IST +( + ( /50C55B25 $noname U2 IC {Lib=IC} + ( 1 N-000004 ) + ) + ( /50C4B392 $noname U1 VPLOT8_1 {Lib=VPLOT8_1} + ( 1 N-000004 ) + ( 2 N-000005 ) + ) + ( /50A93C56 R1 v1 5 {Lib=DC} + ( 1 VCC ) + ( 2 GND ) + ) + ( /50A93BFE $noname R3 1000 {Lib=R} + ( 1 N-000005 ) + ( 2 GND ) + ) + ( /50A93ACA $noname C2 0.01e-6 {Lib=C} + ( 1 N-000002 ) + ( 2 GND ) + ) + ( /50A93893 $noname C1 100e-12 {Lib=CP} + ( 1 N-000004 ) + ( 2 GND ) + ) + ( /50A93858 $noname R2 10000 {Lib=R} + ( 1 N-000006 ) + ( 2 N-000004 ) + ) + ( /50A93852 $noname R1 1000 {Lib=R} + ( 1 VCC ) + ( 2 N-000006 ) + ) + ( /50A937B9 $noname X1 LM555N {Lib=LM555N} + ( 1 GND ) + ( 2 N-000004 ) + ( 3 N-000005 ) + ( 4 VCC ) + ( 5 N-000002 ) + ( 6 N-000004 ) + ( 7 N-000006 ) + ( 8 VCC ) + ) +) +* +{ Allowed footprints by component: +$component v1 + 1_pin +$endlist +$component R3 + R? + SM0603 + SM0805 + R?-* +$endlist +$component C2 + SM* + C? + C1-1 +$endlist +$component C1 + CP* + SM* +$endlist +$component R2 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$endfootprintlist +} +{ Pin List by Nets +Net 1 "GND" "GND" + C1 2 + C2 2 + X1 1 + R3 2 + v1 2 +Net 2 "" "" + X1 5 + C2 1 +Net 3 "VCC" "VCC" + X1 4 + R1 1 + X1 8 + v1 1 +Net 4 "" "" + U2 1 + U1 1 + C1 1 + X1 6 + R2 2 + X1 2 +Net 5 "" "" + R3 1 + U1 2 + X1 3 +Net 6 "" "" + X1 7 + R1 2 + R2 1 +} +#End diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.pro b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.pro new file mode 100644 index 0000000..89b931e --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.pro @@ -0,0 +1,71 @@ +update=Monday 10 December 2012 09:07:41 AM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=regul +LibName6=74xx +LibName7=cmos4000 +LibName8=adc-dac +LibName9=memory +LibName10=xilinx +LibName11=special +LibName12=microcontrollers +LibName13=dsp +LibName14=microchip +LibName15=analog_switches +LibName16=motorola +LibName17=texas +LibName18=intel +LibName19=audio +LibName20=interface +LibName21=digital-audio +LibName22=philips +LibName23=display +LibName24=cypress +LibName25=siliconi +LibName26=opto +LibName27=atmel +LibName28=contrib +LibName29=valves +LibName30=analogSpice +LibName31=converterSpice +LibName32=digitalSpice +LibName33=linearSpice +LibName34=measurementSpice +LibName35=portSpice +LibName36=sourcesSpice +LibName37=convergenceAidSpice diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.proj b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.proj new file mode 100644 index 0000000..0a193f0 --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.proj @@ -0,0 +1 @@ +schematicFile IC555AstableMultivibrator.sch diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.sch b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.sch new file mode 100644 index 0000000..9d4e53b --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.sch @@ -0,0 +1,244 @@ +EESchema Schematic File Version 2 date Tuesday 02 April 2013 02:52:17 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:IC555AstableMultivibrator-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "2 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L IC U2 +U 1 1 50C55B25 +P 4450 4050 +F 0 "U2" H 4450 4320 30 0000 C CNN +F 1 "IC" H 4450 4280 30 0000 C CNN + 1 4450 4050 + 1 0 0 -1 +$EndComp +Connection ~ 4450 4100 +Wire Wire Line + 4450 4050 4450 4100 +Connection ~ 6300 3350 +Wire Wire Line + 6300 3150 6300 3550 +Connection ~ 5700 4550 +Wire Wire Line + 5700 4550 5700 4300 +Wire Wire Line + 2650 4050 2650 4700 +Wire Wire Line + 2650 4700 4850 4700 +Connection ~ 4850 4550 +Wire Wire Line + 4850 4700 4850 4550 +Connection ~ 5200 4550 +Wire Wire Line + 3500 4550 6300 4550 +Wire Wire Line + 6300 4550 6300 4050 +Connection ~ 5200 4400 +Wire Wire Line + 4150 4400 5200 4400 +Connection ~ 4250 2850 +Wire Wire Line + 4250 2850 4250 3850 +Wire Wire Line + 4250 3850 4500 3850 +Wire Wire Line + 5900 3550 6100 3550 +Wire Wire Line + 6100 3550 6100 3000 +Wire Wire Line + 6100 3000 3750 3000 +Wire Wire Line + 3750 3000 3750 3450 +Connection ~ 3500 3450 +Wire Wire Line + 3750 3450 3500 3450 +Connection ~ 3500 4100 +Wire Wire Line + 3950 4100 3950 3350 +Wire Wire Line + 3950 3350 4500 3350 +Wire Wire Line + 3500 4150 3500 4000 +Wire Wire Line + 3500 3500 3500 3350 +Wire Wire Line + 5200 4550 5200 3950 +Wire Wire Line + 5900 3750 5900 4100 +Wire Wire Line + 5900 4100 3500 4100 +Connection ~ 3950 4100 +Wire Wire Line + 5200 2850 3500 2850 +Wire Wire Line + 4150 4000 4150 3600 +Wire Wire Line + 4150 3600 4500 3600 +Wire Wire Line + 6300 3350 5900 3350 +Wire Wire Line + 4450 2850 4450 2700 +Connection ~ 4450 2850 +Wire Wire Line + 4450 2700 2650 2700 +Wire Wire Line + 2650 2700 2650 3150 +Wire Wire Line + 5200 2650 5200 3150 +Connection ~ 5200 2850 +Wire Wire Line + 5900 4550 5900 4800 +Connection ~ 5900 4550 +Wire Wire Line + 3750 4100 3750 4000 +Connection ~ 3750 4100 +$Comp +L VPLOT8_1 U1 +U 2 1 50C4B392 +P 6300 2850 +F 0 "U1" H 6150 2950 50 0000 C CNN +F 1 "VPLOT8_1" H 6450 2950 50 0000 C CNN + 2 6300 2850 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50C4B386 +P 3750 3700 +F 0 "U1" H 3600 3800 50 0000 C CNN +F 1 "VPLOT8_1" H 3900 3800 50 0000 C CNN + 1 3750 3700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 50A93D02 +P 5900 4800 +F 0 "#PWR01" H 5900 4800 30 0001 C CNN +F 1 "GND" H 5900 4730 30 0001 C CNN + 1 5900 4800 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 50A93CC0 +P 5700 4300 +F 0 "#FLG02" H 5700 4570 30 0001 C CNN +F 1 "PWR_FLAG" H 5700 4530 30 0000 C CNN + 1 5700 4300 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG03 +U 1 1 50A93CB7 +P 5200 2650 +F 0 "#FLG03" H 5200 2920 30 0001 C CNN +F 1 "PWR_FLAG" H 5200 2880 30 0000 C CNN + 1 5200 2650 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 50A93C56 +P 2650 3600 +F 0 "v1" H 2450 3700 60 0000 C CNN +F 1 "5" H 2450 3550 60 0000 C CNN +F 2 "R1" H 2350 3600 60 0000 C CNN + 1 2650 3600 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50A93BFE +P 6300 3800 +F 0 "R3" V 6380 3800 50 0000 C CNN +F 1 "1000" V 6300 3800 50 0000 C CNN + 1 6300 3800 + 1 0 0 -1 +$EndComp +$Comp +L C C2 +U 1 1 50A93ACA +P 4150 4200 +F 0 "C2" H 4200 4300 50 0000 L CNN +F 1 "0.01e-6" H 4200 4100 50 0000 L CNN + 1 4150 4200 + 1 0 0 -1 +$EndComp +$Comp +L CP C1 +U 1 1 50A93893 +P 3500 4350 +F 0 "C1" H 3550 4450 50 0000 L CNN +F 1 "100e-12" H 3550 4250 50 0000 L CNN + 1 3500 4350 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50A93858 +P 3500 3750 +F 0 "R2" V 3580 3750 50 0000 C CNN +F 1 "10000" V 3500 3750 50 0000 C CNN + 1 3500 3750 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50A93852 +P 3500 3100 +F 0 "R1" V 3580 3100 50 0000 C CNN +F 1 "1000" V 3500 3100 50 0000 C CNN + 1 3500 3100 + 1 0 0 -1 +$EndComp +$Comp +L LM555N X1 +U 1 1 50A937B9 +P 5200 3550 +F 0 "X1" H 5200 3650 70 0000 C CNN +F 1 "LM555N" H 5200 3450 70 0000 C CNN + 1 5200 3550 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/analysis b/FreeEDA/Examples/IC555AstableMultivibrator/analysis new file mode 100644 index 0000000..a715127 --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/analysis @@ -0,0 +1,2 @@ +.tran 50e-09 5e-06 0e-00 +.ic v(3)=0 diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/lm555n-cache.bak b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n-cache.bak new file mode 100644 index 0000000..29460f2 --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n-cache.bak @@ -0,0 +1,207 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:00:30 AM IST +#encoding utf-8 +# +# ADC8 +# +DEF ADC8 U 0 10 Y Y 8 L N +F0 "U" -100 100 40 H V C CNN +F1 "ADC8" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in1 1 -300 0 150 R 25 25 1 1 I +X out1 9 300 0 150 L 25 25 1 1 O +X in2 2 -300 0 150 R 25 25 2 1 I +X out2 10 300 0 150 L 25 25 2 1 O +X in3 3 -300 0 150 R 25 25 3 1 I +X out3 11 300 0 150 L 25 25 3 1 O +X in4 4 -300 0 150 R 25 25 4 1 I +X out4 12 300 0 150 L 25 25 4 1 O +X in5 5 -300 0 150 R 25 25 5 1 I +X out5 13 300 0 150 L 25 25 5 1 O +X in6 6 -300 0 150 R 25 25 6 1 I +X out6 14 300 0 150 L 25 25 6 1 O +X in7 7 -300 0 150 R 25 25 7 1 I +X out7 15 300 0 150 L 25 25 7 1 O +X in8 8 -300 0 150 R 25 25 8 1 I +X out8 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# d_inverter +# +DEF d_inverter U 0 40 Y Y 1 F N +F0 "U" -150 100 40 H V C CNN +F1 "d_inverter" 100 100 40 H V C CNN +DRAW +P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N +X in 1 -250 0 150 R 25 25 1 1 I +X out 2 250 0 150 L 25 25 1 1 O I +ENDDRAW +ENDDEF +# +# D_SRLatch +# +DEF D_SRLatch U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_SRLatch" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X S 1 -600 150 300 R 50 50 1 1 I +X R 2 -600 -150 300 R 50 50 1 1 I +X Enable 3 -600 0 300 R 50 50 1 1 I +X Set 4 150 -500 300 U 50 50 1 1 I +X Reset 5 -150 -500 300 U 50 50 1 1 I +X Q 6 600 150 300 L 50 50 1 1 O +X ~Q 7 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# DAC8 +# +DEF DAC8 U 0 10 Y Y 8 L N +F0 "U" -100 100 40 H V C CNN +F1 "DAC8" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in1 1 -300 0 150 R 25 25 1 1 I +X out1 9 300 0 150 L 25 25 1 1 O +X in2 2 -300 0 150 R 25 25 2 1 I +X out2 10 300 0 150 L 25 25 2 1 O +X in3 3 -300 0 150 R 25 25 3 1 I +X out3 11 300 0 150 L 25 25 3 1 O +X in4 4 -300 0 150 R 25 25 4 1 I +X out4 12 300 0 150 L 25 25 4 1 O +X in5 5 -300 0 150 R 25 25 5 1 I +X out5 13 300 0 150 L 25 25 5 1 O +X in6 6 -300 0 150 R 25 25 6 1 I +X out6 14 300 0 150 L 25 25 6 1 O +X in7 7 -300 0 150 R 25 25 7 1 I +X out7 15 300 0 150 L 25 25 7 1 O +X in8 8 -300 0 150 R 25 25 8 1 I +X out8 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# LIMIT8 +# +DEF LIMIT8 U 0 40 Y Y 8 F N +F0 "U" 0 100 30 H V C CNN +F1 "LIMIT8" 0 0 30 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in 1 -300 0 150 R 25 25 1 1 I +X out 9 300 0 150 L 25 25 1 1 O +X in 2 -300 0 150 R 25 25 2 1 I +X out 10 300 0 150 L 25 25 2 1 O +X in 3 -300 0 150 R 25 25 3 1 I +X out 11 300 0 150 L 25 25 3 1 O +X in 4 -300 0 150 R 25 25 4 1 I +X out 12 300 0 150 L 25 25 4 1 O +X in 5 -300 0 150 R 25 25 5 1 I +X out 13 300 0 150 L 25 25 5 1 O +X in 6 -300 0 150 R 25 25 6 1 I +X out 14 300 0 150 L 25 25 6 1 O +X in 7 -300 0 150 R 25 25 7 1 I +X out 15 300 0 150 L 25 25 7 1 O +X in 8 -300 0 150 R 25 25 8 1 I +X out 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/lm555n-cache.lib b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n-cache.lib new file mode 100644 index 0000000..421c114 --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n-cache.lib @@ -0,0 +1,207 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:00:43 AM IST +#encoding utf-8 +# +# ADC8 +# +DEF ADC8 U 0 10 Y Y 8 L N +F0 "U" -100 100 40 H V C CNN +F1 "ADC8" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in1 1 -300 0 150 R 25 25 1 1 I +X out1 9 300 0 150 L 25 25 1 1 O +X in2 2 -300 0 150 R 25 25 2 1 I +X out2 10 300 0 150 L 25 25 2 1 O +X in3 3 -300 0 150 R 25 25 3 1 I +X out3 11 300 0 150 L 25 25 3 1 O +X in4 4 -300 0 150 R 25 25 4 1 I +X out4 12 300 0 150 L 25 25 4 1 O +X in5 5 -300 0 150 R 25 25 5 1 I +X out5 13 300 0 150 L 25 25 5 1 O +X in6 6 -300 0 150 R 25 25 6 1 I +X out6 14 300 0 150 L 25 25 6 1 O +X in7 7 -300 0 150 R 25 25 7 1 I +X out7 15 300 0 150 L 25 25 7 1 O +X in8 8 -300 0 150 R 25 25 8 1 I +X out8 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# d_inverter +# +DEF d_inverter U 0 40 Y Y 1 F N +F0 "U" -150 100 40 H V C CNN +F1 "d_inverter" 100 100 40 H V C CNN +DRAW +P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N +X in 1 -250 0 150 R 25 25 1 1 I +X out 2 250 0 150 L 25 25 1 1 O I +ENDDRAW +ENDDEF +# +# D_SRLatch +# +DEF D_SRLatch U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_SRLatch" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X S 1 -600 150 300 R 50 50 1 1 I +X R 2 -600 -150 300 R 50 50 1 1 I +X Enable 3 -600 0 300 R 50 50 1 1 I +X Set 4 150 -500 300 U 50 50 1 1 I +X Reset 5 -150 -500 300 U 50 50 1 1 I +X Q 6 600 150 300 L 50 50 1 1 O +X ~Q 7 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# DAC8 +# +DEF DAC8 U 0 10 Y Y 8 L N +F0 "U" -100 100 40 H V C CNN +F1 "DAC8" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in1 1 -300 0 150 R 25 25 1 1 I +X out1 9 300 0 150 L 25 25 1 1 O +X in2 2 -300 0 150 R 25 25 2 1 I +X out2 10 300 0 150 L 25 25 2 1 O +X in3 3 -300 0 150 R 25 25 3 1 I +X out3 11 300 0 150 L 25 25 3 1 O +X in4 4 -300 0 150 R 25 25 4 1 I +X out4 12 300 0 150 L 25 25 4 1 O +X in5 5 -300 0 150 R 25 25 5 1 I +X out5 13 300 0 150 L 25 25 5 1 O +X in6 6 -300 0 150 R 25 25 6 1 I +X out6 14 300 0 150 L 25 25 6 1 O +X in7 7 -300 0 150 R 25 25 7 1 I +X out7 15 300 0 150 L 25 25 7 1 O +X in8 8 -300 0 150 R 25 25 8 1 I +X out8 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# LIMIT8 +# +DEF LIMIT8 U 0 40 Y Y 8 F N +F0 "U" 0 100 30 H V C CNN +F1 "LIMIT8" 0 0 30 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in 1 -300 0 150 R 25 25 1 1 I +X out 9 300 0 150 L 25 25 1 1 O +X in 2 -300 0 150 R 25 25 2 1 I +X out 10 300 0 150 L 25 25 2 1 O +X in 3 -300 0 150 R 25 25 3 1 I +X out 11 300 0 150 L 25 25 3 1 O +X in 4 -300 0 150 R 25 25 4 1 I +X out 12 300 0 150 L 25 25 4 1 O +X in 5 -300 0 150 R 25 25 5 1 I +X out 13 300 0 150 L 25 25 5 1 O +X in 6 -300 0 150 R 25 25 6 1 I +X out 14 300 0 150 L 25 25 6 1 O +X in 7 -300 0 150 R 25 25 7 1 I +X out 15 300 0 150 L 25 25 7 1 O +X in 8 -300 0 150 R 25 25 8 1 I +X out 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.bak b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.bak new file mode 100644 index 0000000..6b8426e --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.bak @@ -0,0 +1,435 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:00:30 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:digitalXSpice +LIBS:lm555n-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L D_INVERTER U5 +U 1 1 50CEA9C5 +P 6700 4050 +F 0 "U5" H 6550 4150 40 0000 C CNN +F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN + 1 6700 4050 + 1 0 0 -1 +$EndComp +$Comp +L D_SRLATCH U6 +U 1 1 50CEA9AE +P 7100 3400 +F 0 "U6" H 6900 3650 60 0000 C CNN +F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN + 1 7100 3400 + 1 0 0 -1 +$EndComp +Text Notes 5750 3050 0 60 ~ 0 +IC 555 +Wire Wire Line + 4700 3000 4900 3000 +Wire Wire Line + 4700 4750 4700 4650 +Connection ~ 4400 3550 +Connection ~ 4400 4900 +Wire Wire Line + 4300 4900 7700 4900 +Wire Wire Line + 4400 4200 4400 4100 +Wire Wire Line + 7700 4900 7700 4800 +Wire Wire Line + 7700 3250 7850 3250 +Wire Wire Line + 7400 4600 7100 4600 +Wire Wire Line + 7100 4600 7100 4250 +Wire Wire Line + 7700 3650 7700 3550 +Wire Wire Line + 6350 4050 6450 4050 +Wire Wire Line + 6950 3900 6950 4000 +Wire Wire Line + 7150 4000 7150 4050 +Wire Wire Line + 7150 4050 6950 4050 +Wire Wire Line + 6500 3550 6200 3550 +Wire Wire Line + 6350 3250 6500 3250 +Wire Wire Line + 5400 3250 5100 3250 +Wire Wire Line + 5100 3250 5100 3750 +Wire Wire Line + 5550 4500 5550 4350 +Wire Wire Line + 5700 3550 5800 3550 +Wire Wire Line + 5900 3250 6000 3250 +Wire Wire Line + 6000 3850 6350 3850 +Wire Wire Line + 5800 4150 6200 4150 +Wire Wire Line + 5200 3550 5200 3700 +Wire Wire Line + 5200 3700 5550 3700 +Wire Wire Line + 5550 3700 5550 3750 +Connection ~ 5550 4450 +Wire Wire Line + 5750 4400 5750 4450 +Wire Wire Line + 5100 4350 5100 4450 +Wire Wire Line + 5100 4450 5750 4450 +Wire Wire Line + 6500 3400 6450 3400 +Wire Wire Line + 6450 3400 6450 4050 +Wire Wire Line + 6950 4000 7250 4000 +Wire Wire Line + 7250 4000 7250 3900 +Connection ~ 7150 4000 +Wire Wire Line + 7600 4250 7700 4250 +Wire Wire Line + 7700 4400 7700 4350 +Wire Wire Line + 7700 4350 7800 4350 +Wire Wire Line + 7850 3850 7900 3850 +Wire Wire Line + 4400 4900 4400 4700 +Wire Wire Line + 4400 3600 4400 3500 +Wire Wire Line + 4300 3000 4400 3000 +Wire Wire Line + 4400 4150 4700 4150 +Connection ~ 4400 4150 +Wire Wire Line + 4300 3550 4700 3550 +Wire Wire Line + 4700 3550 4700 3500 +Wire Wire Line + 6350 4750 6350 4650 +Text Label 4850 4100 0 60 ~ 0 +d +$Comp +L VCVS E2 +U 1 1 50AA12FF +P 5050 4050 +F 0 "E2" H 4850 4150 50 0000 C CNN +F 1 "10000" H 4850 4000 50 0000 C CNN + 1 5050 4050 + 0 1 1 0 +$EndComp +$Comp +L LIMIT8 U4 +U 2 1 50B4E21B +P 6000 3550 +F 0 "U4" H 6000 3650 30 0000 C CNN +F 1 "LIMIT8" H 6000 3550 30 0000 C CNN + 2 6000 3550 + 0 1 1 0 +$EndComp +$Comp +L LIMIT8 U4 +U 1 1 50B4E215 +P 5800 3850 +F 0 "U4" H 5800 3950 30 0000 C CNN +F 1 "LIMIT8" H 5800 3850 30 0000 C CNN + 1 5800 3850 + 0 1 1 0 +$EndComp +$Comp +L DAC8 U3 +U 2 1 50AAFCE7 +P 7700 3950 +F 0 "U3" H 7600 4050 40 0000 C CNN +F 1 "DAC8" H 7700 3950 40 0000 C CNN + 2 7700 3950 + 0 1 1 0 +$EndComp +$Comp +L DAC8 U3 +U 1 1 50AAFC9A +P 7850 3550 +F 0 "U3" H 7750 3650 40 0000 C CNN +F 1 "DAC8" H 7850 3550 40 0000 C CNN + 1 7850 3550 + 0 1 1 0 +$EndComp +$Comp +L ADC8 U2 +U 3 1 50AAFB76 +P 6350 4350 +F 0 "U2" H 6250 4450 40 0000 C CNN +F 1 "ADC8" H 6350 4350 40 0000 C CNN + 3 6350 4350 + 0 -1 -1 0 +$EndComp +$Comp +L ADC8 U2 +U 2 1 50AAFB64 +P 6350 3550 +F 0 "U2" H 6250 3650 40 0000 C CNN +F 1 "ADC8" H 6350 3550 40 0000 C CNN + 2 6350 3550 + 0 -1 -1 0 +$EndComp +$Comp +L ADC8 U2 +U 1 1 50AAFB55 +P 6200 3850 +F 0 "U2" H 6100 3950 40 0000 C CNN +F 1 "ADC8" H 6200 3850 40 0000 C CNN + 1 6200 3850 + 0 -1 -1 0 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 50AA39A3 +P 5750 4400 +F 0 "#FLG01" H 5750 4670 30 0001 C CNN +F 1 "PWR_FLAG" H 5750 4630 30 0000 C CNN + 1 5750 4400 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 5 1 50AA2210 +P 4050 3550 +F 0 "U1" H 4050 3500 30 0000 C CNN +F 1 "PORT" H 4050 3550 30 0000 C CNN + 5 4050 3550 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 1 1 50AA21C7 +P 4050 4900 +F 0 "U1" H 4050 4850 30 0000 C CNN +F 1 "PORT" H 4050 4900 30 0000 C CNN + 1 4050 4900 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 50AA21BC +P 4700 5000 +F 0 "U1" H 4700 4950 30 0000 C CNN +F 1 "PORT" H 4700 5000 30 0000 C CNN + 2 4700 5000 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 4 1 50AA21A9 +P 6350 5000 +F 0 "U1" H 6350 4950 30 0000 C CNN +F 1 "PORT" H 6350 5000 30 0000 C CNN + 4 6350 5000 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 7 1 50AA21A0 +P 8050 4350 +F 0 "U1" H 8050 4300 30 0000 C CNN +F 1 "PORT" H 8050 4350 30 0000 C CNN + 7 8050 4350 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 3 1 50AA2181 +P 8150 3850 +F 0 "U1" H 8150 3800 30 0000 C CNN +F 1 "PORT" H 8150 3850 30 0000 C CNN + 3 8150 3850 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 6 1 50AA2171 +P 5150 3000 +F 0 "U1" H 5150 2950 30 0000 C CNN +F 1 "PORT" H 5150 3000 30 0000 C CNN + 6 5150 3000 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 8 1 50AA2162 +P 4050 3000 +F 0 "U1" H 4050 2950 30 0000 C CNN +F 1 "PORT" H 4050 3000 30 0000 C CNN + 8 4050 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R8 +U 1 1 50AA20DA +P 7350 4250 +F 0 "R8" V 7430 4250 50 0000 C CNN +F 1 "1500" V 7350 4250 50 0000 C CNN + 1 7350 4250 + 0 1 1 0 +$EndComp +$Comp +L NPN Q1 +U 1 1 50AA2050 +P 7600 4600 +F 0 "Q1" H 7600 4450 50 0000 R CNN +F 1 "QNOM" H 7600 4750 50 0000 R CNN + 1 7600 4600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50AA140C +P 5550 4500 +F 0 "#PWR02" H 5550 4500 30 0001 C CNN +F 1 "GND" H 5550 4430 30 0001 C CNN + 1 5550 4500 + 1 0 0 -1 +$EndComp +Text Label 4850 4000 0 60 ~ 0 +c +Text Label 4700 4650 0 60 ~ 0 +d +Text Label 4700 4150 0 60 ~ 0 +c +$Comp +L R R7 +U 1 1 50AA12F7 +P 5650 3250 +F 0 "R7" V 5730 3250 50 0000 C CNN +F 1 "25" V 5650 3250 50 0000 C CNN + 1 5650 3250 + 0 -1 -1 0 +$EndComp +$Comp +L R R6 +U 1 1 50AA12B0 +P 5450 3550 +F 0 "R6" V 5530 3550 50 0000 C CNN +F 1 "25" V 5450 3550 50 0000 C CNN + 1 5450 3550 + 0 -1 -1 0 +$EndComp +Text Label 5300 4000 0 60 ~ 0 +b +Text Label 5300 4100 0 60 ~ 0 +a +Text Label 4700 3000 0 60 ~ 0 +b +Text Label 4700 3500 0 60 ~ 0 +a +$Comp +L VCVS E1 +U 1 1 50AA11B6 +P 5500 4050 +F 0 "E1" H 5300 4150 50 0000 C CNN +F 1 "10000" H 5300 4000 50 0000 C CNN + 1 5500 4050 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 50A9E00B +P 4700 3250 +F 0 "R4" V 4780 3250 50 0000 C CNN +F 1 "2E6" V 4700 3250 50 0000 C CNN + 1 4700 3250 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 50A9E001 +P 4700 4400 +F 0 "R5" V 4780 4400 50 0000 C CNN +F 1 "2E6" V 4700 4400 50 0000 C CNN + 1 4700 4400 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50A9DF09 +P 4400 4450 +F 0 "R3" V 4480 4450 50 0000 C CNN +F 1 "5000" V 4400 4450 50 0000 C CNN + 1 4400 4450 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50A9DF03 +P 4400 3850 +F 0 "R2" V 4480 3850 50 0000 C CNN +F 1 "5000" V 4400 3850 50 0000 C CNN + 1 4400 3850 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50A9DEFE +P 4400 3250 +F 0 "R1" V 4480 3250 50 0000 C CNN +F 1 "5000" V 4400 3250 50 0000 C CNN + 1 4400 3250 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.cir b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.cir new file mode 100644 index 0000000..144b715 --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.cir @@ -0,0 +1,25 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:00:36 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U5 5 21 D_INVERTER +U6 1 4 5 21 21 8 10 D_SRLATCH +E2 18 0 23 14 10000 +U4 19 20 11 12 LIMIT8 +U3 8 10 7 9 DAC8 +U2 11 12 6 4 1 5 ADC8 +U1 22 14 7 6 15 16 3 13 PORT +R8 9 2 1500 +Q1 22 2 3 QNOM +R7 18 20 25 +R6 17 19 25 +E1 17 0 16 15 10000 +R4 16 15 2E6 +R5 23 14 2E6 +R3 23 22 5000 +R2 15 23 5000 +R1 13 15 5000 + +.end diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.cir.ckt b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.cir.ckt new file mode 100644 index 0000000..f45920f --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.cir.ckt @@ -0,0 +1,35 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:00:36 am ist + +* Inverter d_inverter +* SR Latch d_srlatch +e2 18 0 23 14 10000 +* Limiter limit8 +* Digital to Analog converter dac8 +* Analog to Digital converter adc8 +u1 22 14 7 6 15 16 3 13 port +r8 9 2 1500 +q1 3 2 22 qnom +r7 18 20 25 +r6 17 19 25 +e1 17 0 16 15 10000 +r4 16 15 2e6 +r5 23 14 2e6 +r3 23 22 5000 +r2 15 23 5000 +r1 13 15 5000 +a1 5 21 u5 +.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) +a2 1 4 5 21 21 8 10 u6 +.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 ++sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 ++sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) +a3 19 11 u4 +a4 20 12 u4 +.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0 in_offset=0.0 gain=1.0) +a5 [8] [7] u3 +a6 [10] [9] u3 +.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) +a7 [11] [4] u2 +a8 [12] [1] u2 +a9 [6] [5] u2 +.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.cir.out b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.cir.out new file mode 100644 index 0000000..f45920f --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.cir.out @@ -0,0 +1,35 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:00:36 am ist + +* Inverter d_inverter +* SR Latch d_srlatch +e2 18 0 23 14 10000 +* Limiter limit8 +* Digital to Analog converter dac8 +* Analog to Digital converter adc8 +u1 22 14 7 6 15 16 3 13 port +r8 9 2 1500 +q1 3 2 22 qnom +r7 18 20 25 +r6 17 19 25 +e1 17 0 16 15 10000 +r4 16 15 2e6 +r5 23 14 2e6 +r3 23 22 5000 +r2 15 23 5000 +r1 13 15 5000 +a1 5 21 u5 +.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) +a2 1 4 5 21 21 8 10 u6 +.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 ++sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 ++sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) +a3 19 11 u4 +a4 20 12 u4 +.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0 in_offset=0.0 gain=1.0) +a5 [8] [7] u3 +a6 [10] [9] u3 +.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) +a7 [11] [4] u2 +a8 [12] [1] u2 +a9 [6] [5] u2 +.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.pro b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.pro new file mode 100644 index 0000000..c8e151f --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.pro @@ -0,0 +1,73 @@ +update=Monday 19 November 2012 04:56:38 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=analogXSpice +LibName33=converterSpice +LibName34=digitalSpice +LibName35=linearSpice +LibName36=measurementSpice +LibName37=portSpice +LibName38=sourcesSpice +LibName39=digitalXSpice diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.sch b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.sch new file mode 100644 index 0000000..417063b --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.sch @@ -0,0 +1,435 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:00:43 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:digitalXSpice +LIBS:lm555n-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L D_INVERTER U5 +U 1 1 50CEA9C5 +P 6700 4050 +F 0 "U5" H 6550 4150 40 0000 C CNN +F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN + 1 6700 4050 + 1 0 0 -1 +$EndComp +$Comp +L D_SRLATCH U6 +U 1 1 50CEA9AE +P 7100 3400 +F 0 "U6" H 6900 3650 60 0000 C CNN +F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN + 1 7100 3400 + 1 0 0 -1 +$EndComp +Text Notes 5750 3050 0 60 ~ 0 +IC 555 +Wire Wire Line + 4700 3000 4900 3000 +Wire Wire Line + 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PWR_FLAG #FLG01 +U 1 1 50AA39A3 +P 5750 4400 +F 0 "#FLG01" H 5750 4670 30 0001 C CNN +F 1 "PWR_FLAG" H 5750 4630 30 0000 C CNN + 1 5750 4400 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 5 1 50AA2210 +P 4050 3550 +F 0 "U1" H 4050 3500 30 0000 C CNN +F 1 "PORT" H 4050 3550 30 0000 C CNN + 5 4050 3550 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 1 1 50AA21C7 +P 4050 4900 +F 0 "U1" H 4050 4850 30 0000 C CNN +F 1 "PORT" H 4050 4900 30 0000 C CNN + 1 4050 4900 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 50AA21BC +P 4700 5000 +F 0 "U1" H 4700 4950 30 0000 C CNN +F 1 "PORT" H 4700 5000 30 0000 C CNN + 2 4700 5000 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 4 1 50AA21A9 +P 6350 5000 +F 0 "U1" H 6350 4950 30 0000 C CNN +F 1 "PORT" H 6350 5000 30 0000 C CNN + 4 6350 5000 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 7 1 50AA21A0 +P 8050 4350 +F 0 "U1" H 8050 4300 30 0000 C CNN +F 1 "PORT" H 8050 4350 30 0000 C CNN + 7 8050 4350 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 3 1 50AA2181 +P 8150 3850 +F 0 "U1" H 8150 3800 30 0000 C CNN +F 1 "PORT" H 8150 3850 30 0000 C CNN + 3 8150 3850 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 6 1 50AA2171 +P 5150 3000 +F 0 "U1" H 5150 2950 30 0000 C CNN +F 1 "PORT" H 5150 3000 30 0000 C CNN + 6 5150 3000 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 8 1 50AA2162 +P 4050 3000 +F 0 "U1" H 4050 2950 30 0000 C CNN +F 1 "PORT" H 4050 3000 30 0000 C CNN + 8 4050 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R8 +U 1 1 50AA20DA +P 7350 4250 +F 0 "R8" V 7430 4250 50 0000 C CNN +F 1 "1500" V 7350 4250 50 0000 C CNN + 1 7350 4250 + 0 1 1 0 +$EndComp +$Comp +L NPN Q1 +U 1 1 50AA2050 +P 7600 4600 +F 0 "Q1" H 7600 4450 50 0000 R CNN +F 1 "QNOM" H 7600 4750 50 0000 R CNN + 1 7600 4600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50AA140C +P 5550 4500 +F 0 "#PWR02" H 5550 4500 30 0001 C CNN +F 1 "GND" H 5550 4430 30 0001 C CNN + 1 5550 4500 + 1 0 0 -1 +$EndComp +Text Label 4850 4000 0 60 ~ 0 +c +Text Label 4700 4650 0 60 ~ 0 +d +Text Label 4700 4150 0 60 ~ 0 +c +$Comp +L R R7 +U 1 1 50AA12F7 +P 5650 3250 +F 0 "R7" V 5730 3250 50 0000 C CNN +F 1 "25" V 5650 3250 50 0000 C CNN + 1 5650 3250 + 0 -1 -1 0 +$EndComp +$Comp +L R R6 +U 1 1 50AA12B0 +P 5450 3550 +F 0 "R6" V 5530 3550 50 0000 C CNN +F 1 "25" V 5450 3550 50 0000 C CNN + 1 5450 3550 + 0 -1 -1 0 +$EndComp +Text Label 5300 4000 0 60 ~ 0 +b +Text Label 5300 4100 0 60 ~ 0 +a +Text Label 4700 3000 0 60 ~ 0 +b +Text Label 4700 3500 0 60 ~ 0 +a +$Comp +L VCVS E1 +U 1 1 50AA11B6 +P 5500 4050 +F 0 "E1" H 5300 4150 50 0000 C CNN +F 1 "10000" H 5300 4000 50 0000 C CNN + 1 5500 4050 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 50A9E00B +P 4700 3250 +F 0 "R4" V 4780 3250 50 0000 C CNN +F 1 "2E6" V 4700 3250 50 0000 C CNN + 1 4700 3250 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 50A9E001 +P 4700 4400 +F 0 "R5" V 4780 4400 50 0000 C CNN +F 1 "2E6" V 4700 4400 50 0000 C CNN + 1 4700 4400 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50A9DF09 +P 4400 4450 +F 0 "R3" V 4480 4450 50 0000 C CNN +F 1 "5000" V 4400 4450 50 0000 C CNN + 1 4400 4450 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50A9DF03 +P 4400 3850 +F 0 "R2" V 4480 3850 50 0000 C CNN +F 1 "5000" V 4400 3850 50 0000 C CNN + 1 4400 3850 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50A9DEFE +P 4400 3250 +F 0 "R1" V 4480 3250 50 0000 C CNN +F 1 "5000" V 4400 3250 50 0000 C CNN + 1 4400 3250 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.sub b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.sub new file mode 100644 index 0000000..beeefc4 --- /dev/null +++ b/FreeEDA/Examples/IC555AstableMultivibrator/lm555n.sub @@ -0,0 +1,37 @@ +* Subcircuit lm555n +.subckt lm555n 22 14 7 6 15 16 3 13 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:00:36 am ist +* Inverter d_inverter +* SR Latch d_srlatch +e2 18 0 23 14 10000 +* Limiter limit8 +* Digital to Analog converter dac8 +* Analog to Digital converter adc8 +r8 9 2 1500 +q1 3 2 22 qnom +r7 18 20 25 +r6 17 19 25 +e1 17 0 16 15 10000 +r4 16 15 2e6 +r5 23 14 2e6 +r3 23 22 5000 +r2 15 23 5000 +r1 13 15 5000 +a1 5 21 u5 +.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) +a2 1 4 5 21 21 8 10 u6 +.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 ++sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 ++sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) +a3 19 11 u4 +a4 20 12 u4 +.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0 in_offset=0.0 gain=1.0) +a5 [8] [7] u3 +a6 [10] [9] u3 +.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) +a7 [11] [4] u2 +a8 [12] [1] u2 +a9 [6] [5] u2 +.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) + +.ends lm555n \ No newline at end of file diff --git a/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier-cache.bak b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier-cache.bak new file mode 100644 index 0000000..0c195d8 --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier-cache.bak @@ -0,0 +1,97 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:09:30 AM IST +#encoding utf-8 +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier-cache.lib b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier-cache.lib new file mode 100644 index 0000000..fbea033 --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier-cache.lib @@ -0,0 +1,97 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:36:39 AM IST +#encoding utf-8 +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.bak b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.bak new file mode 100644 index 0000000..54b3539 --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.bak @@ -0,0 +1,194 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:09:30 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:InvertingAmplifier-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 4300 3550 +Wire Wire Line + 4300 3550 3400 3550 +Wire Wire Line + 3400 3550 3400 3100 +Wire Wire Line + 6550 3400 6550 4050 +Wire Wire Line + 6550 4050 6050 4050 +Wire Wire Line + 6850 4150 6850 4400 +Connection ~ 5150 3500 +Wire Wire Line + 5550 4050 5150 4050 +Wire Wire Line + 5150 4050 5150 3500 +Wire Wire Line + 4300 3400 4300 3300 +Wire Wire Line + 4300 3300 5300 3300 +Wire Wire Line + 4400 3500 4300 3500 +Wire Wire Line + 4300 3500 4300 3650 +Wire Wire Line + 4900 3500 5300 3500 +Wire Wire Line + 4300 4550 4300 4700 +Wire Wire Line + 4600 4400 4600 4650 +Wire Wire Line + 4600 4650 4300 4650 +Connection ~ 4300 4650 +Connection ~ 6850 3400 +Wire Wire Line + 6850 3100 6850 3650 +Wire Wire Line + 6300 3400 6850 3400 +Connection ~ 6550 3400 +$Comp +L GND #PWR01 +U 1 1 508240AD +P 6850 4400 +F 0 "#PWR01" H 6850 4400 30 0001 C CNN +F 1 "GND" H 6850 4330 30 0001 C CNN + 1 6850 4400 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 50CEB089 +P 6850 2800 +F 0 "U1" H 6700 2900 50 0000 C CNN +F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN + 2 6850 2800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50CEB075 +P 3400 2800 +F 0 "U1" H 3250 2900 50 0000 C CNN +F 1 "VPLOT8_1" H 3550 2900 50 0000 C CNN + 1 3400 2800 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 508245D2 +P 4600 4400 +F 0 "#FLG02" H 4600 4670 30 0001 C CNN +F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN + 1 4600 4400 + 1 0 0 -1 +$EndComp +$Comp +L UA741 X1 +U 1 1 50824595 +P 5800 3400 +F 0 "X1" H 5950 3550 60 0000 C CNN +F 1 "UA741" H 5950 3650 60 0000 C CNN + 1 5800 3400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 508240CB +P 4300 3400 +F 0 "#PWR03" H 4300 3400 30 0001 C CNN +F 1 "GND" H 4300 3330 30 0001 C CNN + 1 4300 3400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 508240B7 +P 4300 4700 +F 0 "#PWR04" H 4300 4700 30 0001 C CNN +F 1 "GND" H 4300 4630 30 0001 C CNN + 1 4300 4700 + 1 0 0 -1 +$EndComp +$Comp +L SINE v1 +U 1 1 50824091 +P 4300 4100 +F 0 "v1" H 4100 4200 60 0000 C CNN +F 1 "SINE" H 4100 4050 60 0000 C CNN +F 2 "R1" H 4000 4100 60 0000 C CNN + 1 4300 4100 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50824073 +P 6850 3900 +F 0 "R3" V 6930 3900 50 0000 C CNN +F 1 "10000" V 6850 3900 50 0000 C CNN + 1 6850 3900 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50824062 +P 4650 3500 +F 0 "R1" V 4730 3500 50 0000 C CNN +F 1 "1000" V 4650 3500 50 0000 C CNN + 1 4650 3500 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 50824045 +P 5800 4050 +F 0 "R2" V 5880 4050 50 0000 C CNN +F 1 "2000" V 5800 4050 50 0000 C CNN + 1 5800 4050 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.cir b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.cir new file mode 100644 index 0000000..f995c1d --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.cir @@ -0,0 +1,14 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 19 December 2012 10:36:45 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 3 4 VPLOT8_1 +X1 2 0 4 UA741 +v1 3 0 SINE +R3 4 0 10000 +R1 2 3 1000 +R2 4 2 2000 + +.end diff --git a/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt new file mode 100644 index 0000000..543e15f --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt @@ -0,0 +1,13 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:36:45 am ist +.include ua741.sub + +* Plotting option vplot8_1 +x1 2 0 4 ua741 +v1 3 0 sine(0 5 50 0 0) +r3 4 0 10000 +r1 2 3 1000 +r2 4 2 2000 + +.tran 100e-06 40e-03 0e-00 +.plot v(3) v(4) +.end diff --git a/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.cir.out b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.cir.out new file mode 100644 index 0000000..e67a64a --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.cir.out @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:36:45 am ist +.include ua741.sub + +* Plotting option vplot8_1 +x1 2 0 4 ua741 +v1 3 0 sine(0 5 50 0 0) +r3 4 0 10000 +r1 2 3 1000 +r2 4 2 2000 + +.tran 100e-06 40e-03 0e-00 + +* Control Statements +.control +run +plot v(3) v(4) +.endc +.end diff --git a/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.cmp b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.cmp new file mode 100644 index 0000000..c3e04af --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.cmp @@ -0,0 +1,38 @@ +Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Saturday 20 October 2012 11:59:17 AM IST + +BeginCmp +TimeStamp = /50824062; +Reference = R1; +ValeurCmp = 1000; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50824045; +Reference = R2; +ValeurCmp = 2000; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50824073; +Reference = R3; +ValeurCmp = 10000; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50824091; +Reference = v1; +ValeurCmp = SINE; +IdModule = R1; +EndCmp + +BeginCmp +TimeStamp = /50823E96; +Reference = X1; +ValeurCmp = LM741; +IdModule = DIP-8__300; +EndCmp + +EndListe diff --git a/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.net b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.net new file mode 100644 index 0000000..938591e --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.net @@ -0,0 +1,70 @@ +# EESchema Netlist Version 1.1 created Saturday 20 October 2012 12:03:26 PM IST +( + ( /50824595 $noname X1 UA741 {Lib=UA741} + ( 2 N-000004 ) + ( 3 GND ) + ( 6 N-000001 ) + ) + ( /50824091 R1 v1 SINE {Lib=SINE} + ( 1 N-000002 ) + ( 2 GND ) + ) + ( /50824073 $noname R3 10000 {Lib=R} + ( 1 N-000001 ) + ( 2 GND ) + ) + ( /50824062 $noname R1 1000 {Lib=R} + ( 1 N-000004 ) + ( 2 N-000002 ) + ) + ( /50824045 $noname R2 2000 {Lib=R} + ( 1 N-000001 ) + ( 2 N-000004 ) + ) +) +* +{ Allowed footprints by component: +$component X1 + DIP-8__300 +$endlist +$component v1 + 1_pin +$endlist +$component R3 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R2 + R? + SM0603 + SM0805 + R?-* +$endlist +$endfootprintlist +} +{ Pin List by Nets +Net 1 "" "" + R2 1 + X1 6 + R3 1 +Net 2 "" "" + R1 2 + v1 1 +Net 3 "GND" "GND" + X1 3 + v1 2 + R3 2 +Net 4 "" "" + X1 2 + R1 1 + R2 2 +} +#End diff --git a/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.pro b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.pro new file mode 100644 index 0000000..79ab0d5 --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.pro @@ -0,0 +1,72 @@ +update=Monday 17 December 2012 06:16:29 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice diff --git a/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.proj b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.proj new file mode 100644 index 0000000..c78c533 --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.proj @@ -0,0 +1 @@ +schematicFile InvertingAmplifier.sch diff --git a/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.sch b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.sch new file mode 100644 index 0000000..9b6032d --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/InvertingAmplifier.sch @@ -0,0 +1,194 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:36:39 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:InvertingAmplifier-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 4300 3550 +Wire Wire Line + 4300 3550 3400 3550 +Wire Wire Line + 3400 3550 3400 3100 +Wire Wire Line + 6550 3400 6550 4050 +Wire Wire Line + 6550 4050 6050 4050 +Wire Wire Line + 6850 4150 6850 4400 +Connection ~ 5150 3500 +Wire Wire Line + 5550 4050 5150 4050 +Wire Wire Line + 5150 4050 5150 3500 +Wire Wire Line + 4300 3400 4300 3300 +Wire Wire Line + 4300 3300 5300 3300 +Wire Wire Line + 4400 3500 4300 3500 +Wire Wire Line + 4300 3500 4300 3650 +Wire Wire Line + 4900 3500 5300 3500 +Wire Wire Line + 4300 4550 4300 4700 +Wire Wire Line + 4600 4400 4600 4650 +Wire Wire Line + 4600 4650 4300 4650 +Connection ~ 4300 4650 +Connection ~ 6850 3400 +Wire Wire Line + 6850 3100 6850 3650 +Wire Wire Line + 6300 3400 6850 3400 +Connection ~ 6550 3400 +$Comp +L GND #PWR01 +U 1 1 508240AD +P 6850 4400 +F 0 "#PWR01" H 6850 4400 30 0001 C CNN +F 1 "GND" H 6850 4330 30 0001 C CNN + 1 6850 4400 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 50CEB089 +P 6850 2800 +F 0 "U1" H 6700 2900 50 0000 C CNN +F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN + 2 6850 2800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50CEB075 +P 3400 2800 +F 0 "U1" H 3250 2900 50 0000 C CNN +F 1 "VPLOT8_1" H 3550 2900 50 0000 C CNN + 1 3400 2800 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 508245D2 +P 4600 4400 +F 0 "#FLG02" H 4600 4670 30 0001 C CNN +F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN + 1 4600 4400 + 1 0 0 -1 +$EndComp +$Comp +L UA741 X1 +U 1 1 50824595 +P 5800 3400 +F 0 "X1" H 5950 3550 60 0000 C CNN +F 1 "UA741" H 5950 3650 60 0000 C CNN + 1 5800 3400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 508240CB +P 4300 3400 +F 0 "#PWR03" H 4300 3400 30 0001 C CNN +F 1 "GND" H 4300 3330 30 0001 C CNN + 1 4300 3400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 508240B7 +P 4300 4700 +F 0 "#PWR04" H 4300 4700 30 0001 C CNN +F 1 "GND" H 4300 4630 30 0001 C CNN + 1 4300 4700 + 1 0 0 -1 +$EndComp +$Comp +L SINE v1 +U 1 1 50824091 +P 4300 4100 +F 0 "v1" H 4100 4200 60 0000 C CNN +F 1 "SINE" H 4100 4050 60 0000 C CNN +F 2 "R1" H 4000 4100 60 0000 C CNN + 1 4300 4100 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50824073 +P 6850 3900 +F 0 "R3" V 6930 3900 50 0000 C CNN +F 1 "10000" V 6850 3900 50 0000 C CNN + 1 6850 3900 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50824062 +P 4650 3500 +F 0 "R1" V 4730 3500 50 0000 C CNN +F 1 "1000" V 4650 3500 50 0000 C CNN + 1 4650 3500 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 50824045 +P 5800 4050 +F 0 "R2" V 5880 4050 50 0000 C CNN +F 1 "2000" V 5800 4050 50 0000 C CNN + 1 5800 4050 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/InvertingAmplifier/analysis b/FreeEDA/Examples/InvertingAmplifier/analysis new file mode 100644 index 0000000..888b3aa --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/analysis @@ -0,0 +1 @@ +.tran 100e-06 40e-03 0e-00 diff --git a/FreeEDA/Examples/InvertingAmplifier/ua741-cache.bak b/FreeEDA/Examples/InvertingAmplifier/ua741-cache.bak new file mode 100644 index 0000000..e2ece32 --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/ua741-cache.bak @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:17:01 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/InvertingAmplifier/ua741-cache.lib b/FreeEDA/Examples/InvertingAmplifier/ua741-cache.lib new file mode 100644 index 0000000..cbec3a5 --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/ua741-cache.lib @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:15:16 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/InvertingAmplifier/ua741.bak b/FreeEDA/Examples/InvertingAmplifier/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/InvertingAmplifier/ua741.cir b/FreeEDA/Examples/InvertingAmplifier/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/Examples/InvertingAmplifier/ua741.cir.ckt b/FreeEDA/Examples/InvertingAmplifier/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/InvertingAmplifier/ua741.cir.out b/FreeEDA/Examples/InvertingAmplifier/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/InvertingAmplifier/ua741.pro b/FreeEDA/Examples/InvertingAmplifier/ua741.pro new file mode 100644 index 0000000..5dbb81a --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/ua741.pro @@ -0,0 +1,72 @@ +update=Monday 17 December 2012 06:14:06 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice diff --git a/FreeEDA/Examples/InvertingAmplifier/ua741.sch b/FreeEDA/Examples/InvertingAmplifier/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/InvertingAmplifier/ua741.sub b/FreeEDA/Examples/InvertingAmplifier/ua741.sub new file mode 100644 index 0000000..1edba9f --- /dev/null +++ b/FreeEDA/Examples/InvertingAmplifier/ua741.sub @@ -0,0 +1,11 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 + +.ends ua741 \ No newline at end of file diff --git a/FreeEDA/Examples/RC/RC-cache.bak b/FreeEDA/Examples/RC/RC-cache.bak new file mode 100644 index 0000000..65af569 --- /dev/null +++ b/FreeEDA/Examples/RC/RC-cache.bak @@ -0,0 +1,99 @@ +EESchema-LIBRARY Version 2.3 Date: Friday 24 May 2013 02:53:57 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/RC/RC-cache.lib b/FreeEDA/Examples/RC/RC-cache.lib new file mode 100644 index 0000000..e808d27 --- /dev/null +++ b/FreeEDA/Examples/RC/RC-cache.lib @@ -0,0 +1,99 @@ +EESchema-LIBRARY Version 2.3 Date: Friday 24 May 2013 02:54:22 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/RC/RC.bak b/FreeEDA/Examples/RC/RC.bak new file mode 100644 index 0000000..4b41a9e --- /dev/null +++ b/FreeEDA/Examples/RC/RC.bak @@ -0,0 +1,136 @@ +EESchema Schematic File Version 2 date Friday 24 May 2013 02:53:57 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:RC-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "24 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 4650 2650 +Connection ~ 5900 2650 +$Comp +L SINE v1 +U 1 1 519F2A93 +P 4650 3100 +F 0 "v1" H 4450 3200 60 0000 C CNN +F 1 "SINE" H 4450 3050 60 0000 C CNN +F 2 "R1" H 4350 3100 60 0000 C CNN + 1 4650 3100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5900 3300 5900 3550 +Wire Wire Line + 5600 2650 5900 2650 +Connection ~ 5400 3550 +Wire Wire Line + 5400 3550 5400 3800 +Wire Wire Line + 5900 3550 4650 3550 +Wire Wire Line + 4650 2650 5100 2650 +Wire Wire Line + 5900 2650 5900 2900 +$Comp +L VPLOT8_1 U1 +U 2 1 519F22B7 +P 5900 2350 +F 0 "U1" H 5750 2450 50 0000 C CNN +F 1 "VPLOT8_1" H 6050 2450 50 0000 C CNN + 2 5900 2350 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG1 +U 1 1 519F229B +P 5400 3550 +F 0 "#FLG1" H 5400 3820 30 0001 C CNN +F 1 "PWR_FLAG" H 5400 3780 30 0000 C CNN + 1 5400 3550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR1 +U 1 1 519F2294 +P 5400 3800 +F 0 "#PWR1" H 5400 3800 30 0001 C CNN +F 1 "GND" H 5400 3730 30 0001 C CNN + 1 5400 3800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 519F228E +P 4650 2350 +F 0 "U1" H 4500 2450 50 0000 C CNN +F 1 "VPLOT8_1" H 4800 2450 50 0000 C CNN + 1 4650 2350 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 519F2283 +P 5350 2650 +F 0 "R1" V 5430 2650 50 0000 C CNN +F 1 "1k" V 5350 2650 50 0000 C CNN + 1 5350 2650 + 0 1 1 0 +$EndComp +$Comp +L C C1 +U 1 1 519F227E +P 5900 3100 +F 0 "C1" H 5950 3200 50 0000 L CNN +F 1 "1u" H 5950 3000 50 0000 L CNN + 1 5900 3100 + -1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/RC/RC.cir b/FreeEDA/Examples/RC/RC.cir new file mode 100644 index 0000000..17738ac --- /dev/null +++ b/FreeEDA/Examples/RC/RC.cir @@ -0,0 +1,12 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 24 May 2013 02:23:51 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v1 1 0 SINE +U1 1 3 VPLOT8_1 +R1 3 1 1k +C1 0 3 1u + +.end diff --git a/FreeEDA/Examples/RC/RC.cir.ckt b/FreeEDA/Examples/RC/RC.cir.ckt new file mode 100644 index 0000000..7a8138f --- /dev/null +++ b/FreeEDA/Examples/RC/RC.cir.ckt @@ -0,0 +1,10 @@ +* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 02:23:51 pm ist + +v1 1 0 sine(0 5 300 0 0) +* Plotting option vplot8_1 +r1 3 1 1k +c1 0 3 1u + +.tran 5e-03 30e-03 0e-00 +.plot v(1) v(3) +.end diff --git a/FreeEDA/Examples/RC/RC.cir.out b/FreeEDA/Examples/RC/RC.cir.out new file mode 100644 index 0000000..01e68ad --- /dev/null +++ b/FreeEDA/Examples/RC/RC.cir.out @@ -0,0 +1,15 @@ +* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 02:23:51 pm ist + +v1 1 0 sine(0 5 300 0 0) +* Plotting option vplot8_1 +r1 3 1 1k +c1 0 3 1u + +.tran 5e-03 30e-03 0e-00 + +* Control Statements +.control +run +plot v(1) v(3) +.endc +.end diff --git a/FreeEDA/Examples/RC/RC.pro b/FreeEDA/Examples/RC/RC.pro new file mode 100644 index 0000000..1ae51d1 --- /dev/null +++ b/FreeEDA/Examples/RC/RC.pro @@ -0,0 +1,74 @@ +update=Friday 24 May 2013 02:22:07 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/RC/RC.proj b/FreeEDA/Examples/RC/RC.proj new file mode 100644 index 0000000..396e6d0 --- /dev/null +++ b/FreeEDA/Examples/RC/RC.proj @@ -0,0 +1 @@ +schematicFile RC.sch diff --git a/FreeEDA/Examples/RC/RC.sch b/FreeEDA/Examples/RC/RC.sch new file mode 100644 index 0000000..6afd4fa --- /dev/null +++ b/FreeEDA/Examples/RC/RC.sch @@ -0,0 +1,137 @@ +EESchema Schematic File Version 2 date Friday 24 May 2013 02:54:22 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:RC-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "24 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5200 3550 +Connection ~ 4650 2650 +Connection ~ 5900 2650 +$Comp +L SINE v1 +U 1 1 519F2A93 +P 4650 3100 +F 0 "v1" H 4450 3200 60 0000 C CNN +F 1 "SINE" H 4450 3050 60 0000 C CNN +F 2 "R1" H 4350 3100 60 0000 C CNN + 1 4650 3100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5900 3300 5900 3550 +Wire Wire Line + 5600 2650 5900 2650 +Connection ~ 5400 3550 +Wire Wire Line + 5400 3550 5400 3800 +Wire Wire Line + 5900 3550 4650 3550 +Wire Wire Line + 4650 2650 5100 2650 +Wire Wire Line + 5900 2650 5900 2900 +$Comp +L VPLOT8_1 U1 +U 2 1 519F22B7 +P 5900 2350 +F 0 "U1" H 5750 2450 50 0000 C CNN +F 1 "VPLOT8_1" H 6050 2450 50 0000 C CNN + 2 5900 2350 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG1 +U 1 1 519F229B +P 5200 3550 +F 0 "#FLG1" H 5200 3820 30 0001 C CNN +F 1 "PWR_FLAG" H 5200 3780 30 0000 C CNN + 1 5200 3550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR1 +U 1 1 519F2294 +P 5400 3800 +F 0 "#PWR1" H 5400 3800 30 0001 C CNN +F 1 "GND" H 5400 3730 30 0001 C CNN + 1 5400 3800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 519F228E +P 4650 2350 +F 0 "U1" H 4500 2450 50 0000 C CNN +F 1 "VPLOT8_1" H 4800 2450 50 0000 C CNN + 1 4650 2350 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 519F2283 +P 5350 2650 +F 0 "R1" V 5430 2650 50 0000 C CNN +F 1 "1k" V 5350 2650 50 0000 C CNN + 1 5350 2650 + 0 1 1 0 +$EndComp +$Comp +L C C1 +U 1 1 519F227E +P 5900 3100 +F 0 "C1" H 5950 3200 50 0000 L CNN +F 1 "1u" H 5950 3000 50 0000 L CNN + 1 5900 3100 + -1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/RC/analysis b/FreeEDA/Examples/RC/analysis new file mode 100644 index 0000000..4d26811 --- /dev/null +++ b/FreeEDA/Examples/RC/analysis @@ -0,0 +1 @@ +.tran 5e-03 30e-03 0e-00 diff --git a/FreeEDA/Examples/RC_ac/RC_ac-cache.bak b/FreeEDA/Examples/RC_ac/RC_ac-cache.bak new file mode 100644 index 0000000..8073555 --- /dev/null +++ b/FreeEDA/Examples/RC_ac/RC_ac-cache.bak @@ -0,0 +1,99 @@ +EESchema-LIBRARY Version 2.3 Date: Friday 24 May 2013 01:55:44 PM IST +#encoding utf-8 +# +# AC +# +DEF AC AC 0 40 Y Y 1 F N +F0 "AC" -200 100 60 H V C CNN +F1 "AC" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/RC_ac/RC_ac-cache.lib b/FreeEDA/Examples/RC_ac/RC_ac-cache.lib new file mode 100644 index 0000000..0dca988 --- /dev/null +++ b/FreeEDA/Examples/RC_ac/RC_ac-cache.lib @@ -0,0 +1,99 @@ +EESchema-LIBRARY Version 2.3 Date: Friday 24 May 2013 01:59:22 PM IST +#encoding utf-8 +# +# AC +# +DEF AC AC 0 40 Y Y 1 F N +F0 "AC" -200 100 60 H V C CNN +F1 "AC" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/RC_ac/RC_ac.bak b/FreeEDA/Examples/RC_ac/RC_ac.bak new file mode 100644 index 0000000..037cb21 --- /dev/null +++ b/FreeEDA/Examples/RC_ac/RC_ac.bak @@ -0,0 +1,136 @@ +EESchema Schematic File Version 2 date Friday 24 May 2013 01:55:44 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:RC_ac-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "24 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5900 3300 5900 3550 +Wire Wire Line + 5600 2650 5900 2650 +Connection ~ 4900 2650 +Connection ~ 5750 2650 +Connection ~ 5400 3550 +Wire Wire Line + 5400 3550 5400 3800 +Wire Wire Line + 5900 3550 4650 3550 +Wire Wire Line + 4650 2650 5100 2650 +Wire Wire Line + 5900 2650 5900 2900 +$Comp +L VPLOT8_1 U1 +U 2 1 519F22B7 +P 5750 2350 +F 0 "U1" H 5600 2450 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 2450 50 0000 C CNN + 2 5750 2350 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 519F229B +P 5400 3550 +F 0 "#FLG01" H 5400 3820 30 0001 C CNN +F 1 "PWR_FLAG" H 5400 3780 30 0000 C CNN + 1 5400 3550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 519F2294 +P 5400 3800 +F 0 "#PWR02" H 5400 3800 30 0001 C CNN +F 1 "GND" H 5400 3730 30 0001 C CNN + 1 5400 3800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 519F228E +P 4900 2350 +F 0 "U1" H 4750 2450 50 0000 C CNN +F 1 "VPLOT8_1" H 5050 2450 50 0000 C CNN + 1 4900 2350 + 1 0 0 -1 +$EndComp +$Comp +L AC v1 +U 1 1 519F2287 +P 4650 3100 +F 0 "v1" H 4450 3200 60 0000 C CNN +F 1 "AC" H 4450 3050 60 0000 C CNN +F 2 "R1" H 4350 3100 60 0000 C CNN + 1 4650 3100 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 519F2283 +P 5350 2650 +F 0 "R1" V 5430 2650 50 0000 C CNN +F 1 "R" V 5350 2650 50 0000 C CNN + 1 5350 2650 + 0 1 1 0 +$EndComp +$Comp +L C C1 +U 1 1 519F227E +P 5900 3100 +F 0 "C1" H 5950 3200 50 0000 L CNN +F 1 "C" H 5950 3000 50 0000 L CNN + 1 5900 3100 + -1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/RC_ac/RC_ac.cir b/FreeEDA/Examples/RC_ac/RC_ac.cir new file mode 100644 index 0000000..5393d72 --- /dev/null +++ b/FreeEDA/Examples/RC_ac/RC_ac.cir @@ -0,0 +1,12 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 24 May 2013 01:58:56 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 1 3 VPLOT8_1 +v1 1 0 AC +R1 3 1 1k +C1 0 3 1u + +.end diff --git a/FreeEDA/Examples/RC_ac/RC_ac.cir.ckt b/FreeEDA/Examples/RC_ac/RC_ac.cir.ckt new file mode 100644 index 0000000..8cbaa41 --- /dev/null +++ b/FreeEDA/Examples/RC_ac/RC_ac.cir.ckt @@ -0,0 +1,10 @@ +* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 01:58:56 pm ist + +* Plotting option vplot8_1 +v1 1 0 ac 2 +r1 3 1 1k +c1 0 3 1u + +.ac lin 10 1Hz 10Meg +.plot v(1) v(3) +.end diff --git a/FreeEDA/Examples/RC_ac/RC_ac.cir.out b/FreeEDA/Examples/RC_ac/RC_ac.cir.out new file mode 100644 index 0000000..ad45dbf --- /dev/null +++ b/FreeEDA/Examples/RC_ac/RC_ac.cir.out @@ -0,0 +1,15 @@ +* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 01:58:56 pm ist + +* Plotting option vplot8_1 +v1 1 0 ac 2 +r1 3 1 1k +c1 0 3 1u + +.ac lin 10 1Hz 10Meg + +* Control Statements +.control +run +plot v(1) v(3) +.endc +.end diff --git a/FreeEDA/Examples/RC_ac/RC_ac.pro b/FreeEDA/Examples/RC_ac/RC_ac.pro new file mode 100644 index 0000000..4b474f9 --- /dev/null +++ b/FreeEDA/Examples/RC_ac/RC_ac.pro @@ -0,0 +1,74 @@ +update=Friday 24 May 2013 01:49:03 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/RC_ac/RC_ac.proj b/FreeEDA/Examples/RC_ac/RC_ac.proj new file mode 100644 index 0000000..3b990b8 --- /dev/null +++ b/FreeEDA/Examples/RC_ac/RC_ac.proj @@ -0,0 +1 @@ +schematicFile RC_ac.sch diff --git a/FreeEDA/Examples/RC_ac/RC_ac.sch b/FreeEDA/Examples/RC_ac/RC_ac.sch new file mode 100644 index 0000000..8d14d8e --- /dev/null +++ b/FreeEDA/Examples/RC_ac/RC_ac.sch @@ -0,0 +1,136 @@ +EESchema Schematic File Version 2 date Friday 24 May 2013 01:59:22 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:RC_ac-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "24 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5900 3300 5900 3550 +Wire Wire Line + 5600 2650 5900 2650 +Connection ~ 4900 2650 +Connection ~ 5750 2650 +Connection ~ 5400 3550 +Wire Wire Line + 5400 3550 5400 3800 +Wire Wire Line + 5900 3550 4650 3550 +Wire Wire Line + 4650 2650 5100 2650 +Wire Wire Line + 5900 2650 5900 2900 +$Comp +L VPLOT8_1 U1 +U 2 1 519F22B7 +P 5750 2350 +F 0 "U1" H 5600 2450 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 2450 50 0000 C CNN + 2 5750 2350 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 519F229B +P 5400 3550 +F 0 "#FLG01" H 5400 3820 30 0001 C CNN +F 1 "PWR_FLAG" H 5400 3780 30 0000 C CNN + 1 5400 3550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 519F2294 +P 5400 3800 +F 0 "#PWR02" H 5400 3800 30 0001 C CNN +F 1 "GND" H 5400 3730 30 0001 C CNN + 1 5400 3800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 519F228E +P 4900 2350 +F 0 "U1" H 4750 2450 50 0000 C CNN +F 1 "VPLOT8_1" H 5050 2450 50 0000 C CNN + 1 4900 2350 + 1 0 0 -1 +$EndComp +$Comp +L AC v1 +U 1 1 519F2287 +P 4650 3100 +F 0 "v1" H 4450 3200 60 0000 C CNN +F 1 "AC" H 4450 3050 60 0000 C CNN +F 2 "R1" H 4350 3100 60 0000 C CNN + 1 4650 3100 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 519F2283 +P 5350 2650 +F 0 "R1" V 5430 2650 50 0000 C CNN +F 1 "1k" V 5350 2650 50 0000 C CNN + 1 5350 2650 + 0 1 1 0 +$EndComp +$Comp +L C C1 +U 1 1 519F227E +P 5900 3100 +F 0 "C1" H 5950 3200 50 0000 L CNN +F 1 "1u" H 5950 3000 50 0000 L CNN + 1 5900 3100 + -1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/RC_ac/analysis b/FreeEDA/Examples/RC_ac/analysis new file mode 100644 index 0000000..2f4e6f2 --- /dev/null +++ b/FreeEDA/Examples/RC_ac/analysis @@ -0,0 +1,2 @@ + +.ac lin 10 1Hz 10Meg diff --git a/FreeEDA/Examples/RC_pcb/$savepcb.000 b/FreeEDA/Examples/RC_pcb/$savepcb.000 new file mode 100644 index 0000000..8c07ce1 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/$savepcb.000 @@ -0,0 +1,203 @@ +PCBNEW-BOARD Version 1 date Thursday 16 May 2013 12:19:27 PM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 3 +NoConn 3 +Di -1875 -1494 1875 721 +Ndraw 0 +Ntrack 0 +Nzone 0 +BoardThickness 630 +Nmodule 3 +Nnets 4 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "16 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 315 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000001" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000003" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 315 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "GND" +AddNet "N-000001" +AddNet "N-000003" +$EndNCLASS +$MODULE SIL-2 +Po 0 0 0 15 00200000 51947CAE ~~ +Li SIL-2 +Cd Connecteurs 2 pins +Kw CONN DEV +Sc 51947CAE +AR /51868B92 +Op 0 0 0 +T0 0 -1000 681 428 0 107 N V 21 N "P1" +T1 0 -1000 600 400 0 100 N I 21 N "CONN_2" +DS -1000 500 -1000 -500 120 21 +DS -1000 -500 1000 -500 120 21 +DS 1000 -500 1000 500 120 21 +DS 1000 500 -1000 500 120 21 +$PAD +Sh "1" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 500 0 +$EndPAD +$EndMODULE SIL-2 +$MODULE R3 +Po 0 0 0 15 00200000 51947CAF ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 51947CAF +AR /51863417 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R1" +T1 0 0 550 500 0 80 N I 21 N "1k" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000001" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE C1 +Po 0 0 0 15 3F92C496 51947CB0 ~~ +Li C1 +Cd Condensateur e = 1 pas +Kw C +Sc 51947CB0 +AR /5186342E +Op 0 0 0 +T0 100 -900 400 400 0 80 N V 21 N "C1" +T1 0 -900 400 400 0 80 N I 21 N "1u" +DS -980 -500 1000 -500 120 21 +DS 1000 -500 1000 500 120 21 +DS 1000 500 -1000 500 120 21 +DS -1000 500 -1000 -500 120 21 +DS -1000 -250 -750 -500 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000001" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/capa_1_pas.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE C1 +$TRACK +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/RC_pcb/$savepcb.brd b/FreeEDA/Examples/RC_pcb/$savepcb.brd new file mode 100644 index 0000000..22858c3 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/$savepcb.brd @@ -0,0 +1,203 @@ +PCBNEW-BOARD Version 1 date Thursday 16 May 2013 12:56:45 PM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 3 +NoConn 3 +Di -1875 -1494 1875 721 +Ndraw 0 +Ntrack 0 +Nzone 0 +BoardThickness 630 +Nmodule 3 +Nnets 4 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "16 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 315 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000001" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000003" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 315 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "GND" +AddNet "N-000001" +AddNet "N-000003" +$EndNCLASS +$MODULE SIL-2 +Po 0 0 0 15 00200000 51947CAE ~~ +Li SIL-2 +Cd Connecteurs 2 pins +Kw CONN DEV +Sc 51947CAE +AR /51868B92 +Op 0 0 0 +T0 0 -1000 681 428 0 107 N V 21 N "P1" +T1 0 -1000 600 400 0 100 N I 21 N "CONN_2" +DS -1000 500 -1000 -500 120 21 +DS -1000 -500 1000 -500 120 21 +DS 1000 -500 1000 500 120 21 +DS 1000 500 -1000 500 120 21 +$PAD +Sh "1" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 500 0 +$EndPAD +$EndMODULE SIL-2 +$MODULE R3 +Po 0 0 0 15 00200000 51947CAF ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 51947CAF +AR /51863417 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R1" +T1 0 0 550 500 0 80 N I 21 N "1k" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000001" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE C1 +Po 0 0 0 15 3F92C496 51947CB0 ~~ +Li C1 +Cd Condensateur e = 1 pas +Kw C +Sc 51947CB0 +AR /5186342E +Op 0 0 0 +T0 100 -900 400 400 0 80 N V 21 N "C1" +T1 0 -900 400 400 0 80 N I 21 N "1u" +DS -980 -500 1000 -500 120 21 +DS 1000 -500 1000 500 120 21 +DS 1000 500 -1000 500 120 21 +DS -1000 500 -1000 -500 120 21 +DS -1000 -250 -750 -500 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000001" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/capa_1_pas.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE C1 +$TRACK +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/RC_pcb/RC-SilkS_Back.gbo b/FreeEDA/Examples/RC_pcb/RC-SilkS_Back.gbo new file mode 100644 index 0000000..9f1f35b --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC-SilkS_Back.gbo @@ -0,0 +1,12 @@ +G04 (created by PCBNEW-RS274X (2011-05-25)-stable) date Sunday 05 May 2013 10:21:02 PM IST* +G01* +G70* +G90* +%MOIN*% +G04 Gerber Fmt 3.4, Leading zero omitted, Abs format* +%FSLAX34Y34*% +G04 APERTURE LIST* +%ADD10C,0.006000*% +G04 APERTURE END LIST* +G54D10* +M02* diff --git a/FreeEDA/Examples/RC_pcb/RC-SilkS_Front.gto b/FreeEDA/Examples/RC_pcb/RC-SilkS_Front.gto new file mode 100644 index 0000000..95cd1a3 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC-SilkS_Front.gto @@ -0,0 +1,113 @@ +G04 (created by PCBNEW-RS274X (2011-05-25)-stable) date Sunday 05 May 2013 10:21:02 PM IST* +G01* +G70* +G90* +%MOIN*% +G04 Gerber Fmt 3.4, Leading zero omitted, Abs format* +%FSLAX34Y34*% +G04 APERTURE LIST* +%ADD10C,0.006000*% +%ADD11C,0.012000*% +%ADD12C,0.010700*% +%ADD13C,0.008000*% +G04 APERTURE END LIST* +G54D10* +G54D11* +X61500Y-38000D02* +X60500Y-38000D01* +X60500Y-38000D02* +X60500Y-36000D01* +X60500Y-36000D02* +X61500Y-36000D01* +X61500Y-36000D02* +X61500Y-38000D01* +X57000Y-35500D02* +X57200Y-35500D01* +X60000Y-35500D02* +X59800Y-35500D01* +X59800Y-35500D02* +X59800Y-35100D01* +X59800Y-35100D02* +X57200Y-35100D01* +X57200Y-35100D02* +X57200Y-35900D01* +X57200Y-35900D02* +X59800Y-35900D01* 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+X58607Y-35330D01* +X57534Y-36724D02* +X57515Y-36743D01* +X57458Y-36762D01* +X57420Y-36762D01* +X57362Y-36743D01* +X57324Y-36705D01* +X57305Y-36667D01* +X57286Y-36590D01* +X57286Y-36533D01* +X57305Y-36457D01* +X57324Y-36419D01* +X57362Y-36381D01* +X57420Y-36362D01* +X57458Y-36362D01* +X57515Y-36381D01* +X57534Y-36400D01* +X57915Y-36762D02* +X57686Y-36762D01* +X57800Y-36762D02* +X57800Y-36362D01* +X57762Y-36419D01* +X57724Y-36457D01* +X57686Y-36476D01* +M02* diff --git a/FreeEDA/Examples/RC_pcb/RC_pcb-Back.gbl b/FreeEDA/Examples/RC_pcb/RC_pcb-Back.gbl new file mode 100644 index 0000000..020cb57 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC_pcb-Back.gbl @@ -0,0 +1,30 @@ +G04 (created by PCBNEW-RS274X (2011-05-25)-stable) date Sunday 05 May 2013 10:21:02 PM IST* +G01* +G70* +G90* +%MOIN*% +G04 Gerber Fmt 3.4, Leading zero omitted, Abs format* +%FSLAX34Y34*% +G04 APERTURE LIST* +%ADD10C,0.006000*% +%ADD11R,0.055000X0.055000*% +%ADD12C,0.055000*% +%ADD13C,0.031500*% +G04 APERTURE END LIST* +G54D10* +G54D11* +X61000Y-37500D03* +G54D12* +X61000Y-36500D03* +X57000Y-35500D03* +X60000Y-35500D03* +X57000Y-37500D03* +X58000Y-37500D03* +G54D13* +X58000Y-37500D02* +X61000Y-37500D01* +X57000Y-35500D02* +X57000Y-37500D01* +X60000Y-35500D02* +X61000Y-36500D01* +M02* diff --git a/FreeEDA/Examples/RC_pcb/RC_pcb-Front.gtl b/FreeEDA/Examples/RC_pcb/RC_pcb-Front.gtl new file mode 100644 index 0000000..3f06326 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC_pcb-Front.gtl @@ -0,0 +1,22 @@ +G04 (created by PCBNEW-RS274X (2011-05-25)-stable) date Sunday 05 May 2013 10:21:02 PM IST* +G01* +G70* +G90* +%MOIN*% +G04 Gerber Fmt 3.4, Leading zero omitted, Abs format* +%FSLAX34Y34*% +G04 APERTURE LIST* +%ADD10C,0.006000*% +%ADD11R,0.055000X0.055000*% +%ADD12C,0.055000*% +G04 APERTURE END LIST* +G54D10* +G54D11* +X61000Y-37500D03* +G54D12* +X61000Y-36500D03* +X57000Y-35500D03* +X60000Y-35500D03* +X57000Y-37500D03* +X58000Y-37500D03* +M02* diff --git a/FreeEDA/Examples/RC_pcb/RC_pcb-cache.bak b/FreeEDA/Examples/RC_pcb/RC_pcb-cache.bak new file mode 100644 index 0000000..3b20495 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC_pcb-cache.bak @@ -0,0 +1,75 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 12:09:45 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# CONN_2 +# +DEF CONN_2 P 0 40 Y N 1 F N +F0 "P" -50 0 40 V V C CNN +F1 "CONN_2" 50 0 40 V V C CNN +DRAW +S -100 150 100 -150 0 1 0 N +X P1 1 -350 100 250 R 60 60 1 1 P I +X PM 2 -350 -100 250 R 60 60 1 1 P I +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/RC_pcb/RC_pcb-cache.lib b/FreeEDA/Examples/RC_pcb/RC_pcb-cache.lib new file mode 100644 index 0000000..a8a529e --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC_pcb-cache.lib @@ -0,0 +1,75 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 06:47:37 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# CONN_2 +# +DEF CONN_2 P 0 40 Y N 1 F N +F0 "P" -50 0 40 V V C CNN +F1 "CONN_2" 50 0 40 V V C CNN +DRAW +S -100 150 100 -150 0 1 0 N +X P1 1 -350 100 250 R 60 60 1 1 P I +X PM 2 -350 -100 250 R 60 60 1 1 P I +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/RC_pcb/RC_pcb.bak b/FreeEDA/Examples/RC_pcb/RC_pcb.bak new file mode 100644 index 0000000..7ad2473 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC_pcb.bak @@ -0,0 +1,125 @@ +EESchema Schematic File Version 2 date Tuesday 14 May 2013 12:09:45 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:RC-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "13 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 6100 2200 6100 2050 +Wire Wire Line + 4900 2600 4900 3050 +Connection ~ 6100 2050 +Connection ~ 5550 3050 +Wire Wire Line + 5550 3050 5550 3200 +Wire Wire Line + 6100 2600 6100 3050 +Wire Wire Line + 6100 3050 4900 3050 +Wire Wire Line + 5400 2050 5400 2000 +Wire Wire Line + 5400 2000 4900 2000 +Wire Wire Line + 6100 2050 5900 2050 +Wire Wire Line + 5400 2900 5400 3050 +Connection ~ 5400 3050 +Wire Wire Line + 4900 2000 4900 2400 +$Comp +L CONN_2 P1 +U 1 1 51868B92 +P 4550 2500 +F 0 "P1" V 4500 2500 40 0000 C CNN +F 1 "CONN_2" V 4600 2500 40 0000 C CNN + 1 4550 2500 + -1 0 0 1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 51863585 +P 5400 2900 +F 0 "#FLG01" H 5400 3170 30 0001 C CNN +F 1 "PWR_FLAG" H 5400 3130 30 0000 C CNN + 1 5400 2900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5186344D +P 5550 3200 +F 0 "#PWR02" H 5550 3200 30 0001 C CNN +F 1 "GND" H 5550 3130 30 0001 C CNN + 1 5550 3200 + 1 0 0 -1 +$EndComp +$Comp +L C C1 +U 1 1 5186342E +P 6100 2400 +F 0 "C1" H 6150 2500 50 0000 L CNN +F 1 "1u" H 6150 2300 50 0000 L CNN + 1 6100 2400 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 51863417 +P 5650 2050 +F 0 "R1" V 5730 2050 50 0000 C CNN +F 1 "1k" V 5650 2050 50 0000 C CNN + 1 5650 2050 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/RC_pcb/RC_pcb.brd b/FreeEDA/Examples/RC_pcb/RC_pcb.brd new file mode 100644 index 0000000..335c0b9 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC_pcb.brd @@ -0,0 +1,225 @@ +PCBNEW-BOARD Version 1 date Sunday 05 May 2013 10:20:45 PM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 3 +NoConn 0 +Di 55424 33924 63076 39076 +Ndraw 4 +Ntrack 3 +Nzone 0 +BoardThickness 630 +Nmodule 3 +Nnets 4 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "5 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 315 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000001" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000003" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 315 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "GND" +AddNet "N-000001" +AddNet "N-000003" +$EndNCLASS +$MODULE SIL-2 +Po 61000 37000 900 15 00200000 51868CE1 ~~ +Li SIL-2 +Cd Connecteurs 2 pins +Kw CONN DEV +Sc 51868CE1 +AR /51868B92 +Op 0 0 0 +T0 0 -1000 681 428 900 107 N V 21 N "P1" +T1 0 -1000 600 400 900 100 N I 21 N "CONN_2" +DS -1000 500 -1000 -500 120 21 +DS -1000 -500 1000 -500 120 21 +DS 1000 -500 1000 500 120 21 +DS 1000 500 -1000 500 120 21 +$PAD +Sh "1" R 550 550 0 0 900 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 900 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 500 0 +$EndPAD +$EndMODULE SIL-2 +$MODULE R3 +Po 58500 35500 0 15 00200000 51868CE2 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 51868CE2 +AR /51863417 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R1" +T1 0 0 550 500 0 80 N I 21 N "1k" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000001" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE C1 +Po 57500 37500 0 15 3F92C496 51868CE3 ~~ +Li C1 +Cd Condensateur e = 1 pas +Kw C +Sc 51868CE3 +AR /5186342E +Op 0 0 0 +T0 100 -900 400 400 0 80 N V 21 N "C1" +T1 0 -900 400 400 0 80 N I 21 N "1u" +DS -980 -500 1000 -500 120 21 +DS 1000 -500 1000 500 120 21 +DS 1000 500 -1000 500 120 21 +DS -1000 500 -1000 -500 120 21 +DS -1000 -250 -750 -500 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000001" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/capa_1_pas.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE C1 +$DRAWSEGMENT +Po 0 55500 39000 55500 34000 150 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$DRAWSEGMENT +Po 0 63000 39000 55500 39000 150 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$DRAWSEGMENT +Po 0 63000 34000 63000 39000 150 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$DRAWSEGMENT +Po 0 55500 34000 63000 34000 150 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$TRACK +Po 0 58000 37500 61000 37500 315 -1 +De 0 0 1 0 C00000 +Po 0 57000 35500 57000 37500 315 -1 +De 0 0 2 0 C00000 +Po 0 60000 35500 61000 36500 315 -1 +De 0 0 3 0 C00000 +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/RC_pcb/RC_pcb.cir.ckt.sol b/FreeEDA/Examples/RC_pcb/RC_pcb.cir.ckt.sol new file mode 100644 index 0000000..29b1351 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC_pcb.cir.ckt.sol @@ -0,0 +1,6 @@ +Name Source Sink Voltage Current +---------------------------------------------------------- +V 1 0 0.0000000000 0.0000000000 +C 3 0 0.0000000000 0.0000000000 +I 0 3 -0.0000000000 0.0000000000 +R 3 1 0.0000000000 0.0000000000 diff --git a/FreeEDA/Examples/RC_pcb/RC_pcb.cmp b/FreeEDA/Examples/RC_pcb/RC_pcb.cmp new file mode 100644 index 0000000..14cc046 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC_pcb.cmp @@ -0,0 +1,24 @@ +Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Thursday 16 May 2013 01:22:40 AM IST + +BeginCmp +TimeStamp = /5186342E; +Reference = C1; +ValeurCmp = 1u; +IdModule = C1; +EndCmp + +BeginCmp +TimeStamp = /51868B92; +Reference = P1; +ValeurCmp = CONN_2; +IdModule = SIL-2; +EndCmp + +BeginCmp +TimeStamp = /51863417; +Reference = R1; +ValeurCmp = 1k; +IdModule = R3; +EndCmp + +EndListe diff --git a/FreeEDA/Examples/RC_pcb/RC_pcb.net b/FreeEDA/Examples/RC_pcb/RC_pcb.net new file mode 100644 index 0000000..1cda301 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC_pcb.net @@ -0,0 +1,30 @@ +# EESchema Netlist Version 1.1 created Thursday 16 May 2013 01:22:40 AM IST +( + ( /5186342E C1 C1 1u + ( 1 N-000001 ) + ( 2 GND ) + ) + ( /51868B92 SIL-2 P1 CONN_2 + ( 1 GND ) + ( 2 N-000003 ) + ) + ( /51863417 R3 R1 1k + ( 1 N-000001 ) + ( 2 N-000003 ) + ) +) +* +{ Allowed footprints by component: +$component C1 + SM* + C? + C1-1 +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$endfootprintlist +} diff --git a/FreeEDA/Examples/RC_pcb/RC_pcb.pro b/FreeEDA/Examples/RC_pcb/RC_pcb.pro new file mode 100644 index 0000000..31bc4d4 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC_pcb.pro @@ -0,0 +1,74 @@ +update=Monday 13 May 2013 07:10:16 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/rakhi/FreeEDA/library/analogSpice +LibName32=/home/rakhi/FreeEDA/library/analogXSpice +LibName33=/home/rakhi/FreeEDA/library/convergenceAidSpice +LibName34=/home/rakhi/FreeEDA/library/converterSpice +LibName35=/home/rakhi/FreeEDA/library/digitalSpice +LibName36=/home/rakhi/FreeEDA/library/digitalXSpice +LibName37=/home/rakhi/FreeEDA/library/linearSpice +LibName38=/home/rakhi/FreeEDA/library/measurementSpice +LibName39=/home/rakhi/FreeEDA/library/portSpice +LibName40=/home/rakhi/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/RC_pcb/RC_pcb.proj b/FreeEDA/Examples/RC_pcb/RC_pcb.proj new file mode 100644 index 0000000..396e6d0 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC_pcb.proj @@ -0,0 +1 @@ +schematicFile RC.sch diff --git a/FreeEDA/Examples/RC_pcb/RC_pcb.sch b/FreeEDA/Examples/RC_pcb/RC_pcb.sch new file mode 100644 index 0000000..8661fb3 --- /dev/null +++ b/FreeEDA/Examples/RC_pcb/RC_pcb.sch @@ -0,0 +1,123 @@ +EESchema Schematic File Version 2 date Wednesday 15 May 2013 06:47:37 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:RC-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 4900 2050 5400 2050 +Wire Wire Line + 4900 2050 4900 2400 +Connection ~ 5400 3050 +Wire Wire Line + 5400 2900 5400 3050 +Wire Wire Line + 5900 2050 6100 2050 +Wire Wire Line + 6100 3050 4900 3050 +Wire Wire Line + 6100 3050 6100 2600 +Wire Wire Line + 5550 3050 5550 3200 +Connection ~ 5550 3050 +Connection ~ 6100 2050 +Wire Wire Line + 4900 3050 4900 2600 +Wire Wire Line + 6100 2050 6100 2200 +$Comp +L CONN_2 P1 +U 1 1 51868B92 +P 4550 2500 +F 0 "P1" V 4500 2500 40 0000 C CNN +F 1 "CONN_2" V 4600 2500 40 0000 C CNN + 1 4550 2500 + -1 0 0 1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 51863585 +P 5400 2900 +F 0 "#FLG01" H 5400 3170 30 0001 C CNN +F 1 "PWR_FLAG" H 5400 3130 30 0000 C CNN + 1 5400 2900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5186344D +P 5550 3200 +F 0 "#PWR02" H 5550 3200 30 0001 C CNN +F 1 "GND" H 5550 3130 30 0001 C CNN + 1 5550 3200 + 1 0 0 -1 +$EndComp +$Comp +L C C1 +U 1 1 5186342E +P 6100 2400 +F 0 "C1" H 6150 2500 50 0000 L CNN +F 1 "1u" H 6150 2300 50 0000 L CNN + 1 6100 2400 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 51863417 +P 5650 2050 +F 0 "R1" V 5730 2050 50 0000 C CNN +F 1 "1k" V 5650 2050 50 0000 C CNN + 1 5650 2050 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/bridgeRectifier/$savepcb.000 b/FreeEDA/Examples/bridgeRectifier/$savepcb.000 new file mode 100644 index 0000000..5b76389 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/$savepcb.000 @@ -0,0 +1,366 @@ +PCBNEW-BOARD Version 1 date Thursday 04 October 2012 12:22:20 PM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 8 +NoConn 2 +Di 39125 25379 49041 30735 +Ndraw 0 +Ntrack 13 +Nzone 0 +BoardThickness 630 +Nmodule 6 +Nnets 5 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "4 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000002" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000003" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 4 "N-000004" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "GND" +AddNet "N-000002" +AddNet "N-000003" +AddNet "N-000004" +$EndNCLASS +$MODULE R3 +Po 46500 30000 1800 15 00200000 506D2FD9 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 506D2FD9 +AR /506BDD54 +Op 0 A 0 +T0 0 0 550 500 1800 80 N V 21 N "R1" +T1 0 0 550 500 1800 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R1 +Po 41500 30000 1800 15 00200000 506D2FDA ~~ +Li R1 +Cd Resistance verticale +Kw R +Sc 506D2FDA +AR /506BDD71 +Op A A 0 +T0 -400 1000 550 500 1800 80 N V 21 N "V1" +T1 -450 1000 550 500 1800 80 N I 21 N "SINE" +DS -500 0 500 0 150 21 +DC -500 0 -250 500 150 21 +$PAD +Sh "1" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/verti_resistor.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R1 +$MODULE D3 +Po 46500 28000 0 15 00200000 506D2FDB ~~ +Li D3 +Cd Diode 3 pas +Kw DIODE DEV +Sc 506D2FDB +AR /506BDD23 +Op 0 0 0 +T0 0 0 400 400 0 80 N V 21 N "D1" +T1 0 0 400 400 0 80 N I 21 N "DIODE" +DS 1500 0 1200 0 120 21 +DS 1200 0 1200 -400 120 21 +DS 1200 -400 -1200 -400 120 21 +DS -1200 -400 -1200 0 120 21 +DS -1200 0 -1500 0 120 21 +DS -1200 0 -1200 400 120 21 +DS -1200 400 1200 400 120 21 +DS 1200 400 1200 0 120 21 +DS 1000 -400 1000 400 120 21 +DS 900 400 900 -400 120 21 +$PAD +Sh "2" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po 1500 0 +$EndPAD +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po -1500 0 +$EndPAD +$SHAPE3D +Na "discret/diode.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE D3 +$MODULE D3 +Po 46500 26000 0 15 00200000 506D2FDD ~~ +Li D3 +Cd Diode 3 pas +Kw DIODE DEV +Sc 506D2FDD +AR /506BDD29 +Op 0 0 0 +T0 0 0 400 400 0 80 N V 21 N "D2" +T1 0 0 400 400 0 80 N I 21 N "DIODE" +DS 1500 0 1200 0 120 21 +DS 1200 0 1200 -400 120 21 +DS 1200 -400 -1200 -400 120 21 +DS -1200 -400 -1200 0 120 21 +DS -1200 0 -1500 0 120 21 +DS -1200 0 -1200 400 120 21 +DS -1200 400 1200 400 120 21 +DS 1200 400 1200 0 120 21 +DS 1000 -400 1000 400 120 21 +DS 900 400 900 -400 120 21 +$PAD +Sh "2" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po 1500 0 +$EndPAD +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po -1500 0 +$EndPAD +$SHAPE3D +Na "discret/diode.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE D3 +$MODULE D3 +Po 41000 28000 0 15 00200000 506D2FDF ~~ +Li D3 +Cd Diode 3 pas +Kw DIODE DEV +Sc 506D2FDF +AR /506BDD38 +Op 0 0 0 +T0 0 0 400 400 0 80 N V 21 N "D3" +T1 0 0 400 400 0 80 N I 21 N "DIODE" +DS 1500 0 1200 0 120 21 +DS 1200 0 1200 -400 120 21 +DS 1200 -400 -1200 -400 120 21 +DS -1200 -400 -1200 0 120 21 +DS -1200 0 -1500 0 120 21 +DS -1200 0 -1200 400 120 21 +DS -1200 400 1200 400 120 21 +DS 1200 400 1200 0 120 21 +DS 1000 -400 1000 400 120 21 +DS 900 400 900 -400 120 21 +$PAD +Sh "2" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 1500 0 +$EndPAD +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po -1500 0 +$EndPAD +$SHAPE3D +Na "discret/diode.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE D3 +$MODULE D3 +Po 41000 26000 0 15 00200000 506D31A5 ~~ +Li D3 +Cd Diode 3 pas +Kw DIODE DEV +Sc 506D31A5 +AR /506BDD2F +Op 0 0 0 +T0 0 0 400 400 0 80 N V 21 N "D4" +T1 0 0 400 400 0 80 N I 21 N "DIODE" +DS 1500 0 1200 0 120 21 +DS 1200 0 1200 -400 120 21 +DS 1200 -400 -1200 -400 120 21 +DS -1200 -400 -1200 0 120 21 +DS -1200 0 -1500 0 120 21 +DS -1200 0 -1200 400 120 21 +DS -1200 400 1200 400 120 21 +DS 1200 400 1200 0 120 21 +DS 1000 -400 1000 400 120 21 +DS 900 400 900 -400 120 21 +$PAD +Sh "2" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po 1500 0 +$EndPAD +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po -1500 0 +$EndPAD +$SHAPE3D +Na "discret/diode.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE D3 +$TRACK +Po 0 39500 28000 39500 26000 80 -1 +De 0 0 1 0 C00000 +Po 0 42500 26000 45000 26000 80 -1 +De 0 0 2 0 C00000 +Po 0 42500 28000 45000 28000 80 -1 +De 0 0 3 0 C00000 +Po 0 42000 30000 42500 30000 80 -1 +De 0 0 3 0 400000 +Po 0 43000 28500 42500 28000 80 -1 +De 0 0 3 0 800000 +Po 0 43000 29500 43000 28500 80 -1 +De 0 0 3 0 0 +Po 0 42500 30000 43000 29500 80 -1 +De 0 0 3 0 0 +Po 0 49000 27000 49000 29000 80 -1 +De 0 0 4 0 0 +Po 0 49000 29000 48000 30000 80 -1 +De 0 0 4 0 800000 +Po 0 48000 26000 48500 26000 80 -1 +De 0 0 4 0 400000 +Po 0 49000 27000 48000 28000 80 -1 +De 0 0 4 0 800000 +Po 0 49000 26500 49000 27000 80 -1 +De 0 0 4 0 0 +Po 0 48500 26000 49000 26500 80 -1 +De 0 0 4 0 0 +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/bridgeRectifier/$savepcb.brd b/FreeEDA/Examples/bridgeRectifier/$savepcb.brd new file mode 100644 index 0000000..309f60a --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/$savepcb.brd @@ -0,0 +1,374 @@ +PCBNEW-BOARD Version 1 date Wednesday 21 November 2012 12:10:28 AM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 8 +NoConn 0 +Di 39125 25379 48489 31041 +Ndraw 0 +Ntrack 17 +Nzone 0 +BoardThickness 630 +Nmodule 6 +Nnets 5 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "20 nov 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 38500 31500 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000002" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000003" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 4 "N-000004" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "GND" +AddNet "N-000002" +AddNet "N-000003" +AddNet "N-000004" +$EndNCLASS +$MODULE R3 +Po 46500 30000 1800 15 00200000 506D2FD9 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 506D2FD9 +AR /506BDD54 +Op 0 A 0 +T0 0 0 550 500 1800 80 N V 21 N "R1" +T1 0 0 550 500 1800 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R1 +Po 41500 30000 1800 15 00200000 506D2FDA ~~ +Li R1 +Cd Resistance verticale +Kw R +Sc 506D2FDA +AR /506BDD71 +Op A A 0 +T0 -400 1000 550 500 1800 80 N V 21 N "V1" +T1 -450 1000 550 500 1800 80 N I 21 N "SINE" +DS -500 0 500 0 150 21 +DC -500 0 -250 500 150 21 +$PAD +Sh "1" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/verti_resistor.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R1 +$MODULE D3 +Po 46500 28000 0 15 00200000 506D2FDB ~~ +Li D3 +Cd Diode 3 pas +Kw DIODE DEV +Sc 506D2FDB +AR /506BDD23 +Op 0 0 0 +T0 0 0 400 400 0 80 N V 21 N "D1" +T1 0 0 400 400 0 80 N I 21 N "DIODE" +DS 1500 0 1200 0 120 21 +DS 1200 0 1200 -400 120 21 +DS 1200 -400 -1200 -400 120 21 +DS -1200 -400 -1200 0 120 21 +DS -1200 0 -1500 0 120 21 +DS -1200 0 -1200 400 120 21 +DS -1200 400 1200 400 120 21 +DS 1200 400 1200 0 120 21 +DS 1000 -400 1000 400 120 21 +DS 900 400 900 -400 120 21 +$PAD +Sh "2" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po 1500 0 +$EndPAD +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po -1500 0 +$EndPAD +$SHAPE3D +Na "discret/diode.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE D3 +$MODULE D3 +Po 46500 26000 0 15 00200000 506D2FDD ~~ +Li D3 +Cd Diode 3 pas +Kw DIODE DEV +Sc 506D2FDD +AR /506BDD29 +Op 0 0 0 +T0 0 0 400 400 0 80 N V 21 N "D2" +T1 0 0 400 400 0 80 N I 21 N "DIODE" +DS 1500 0 1200 0 120 21 +DS 1200 0 1200 -400 120 21 +DS 1200 -400 -1200 -400 120 21 +DS -1200 -400 -1200 0 120 21 +DS -1200 0 -1500 0 120 21 +DS -1200 0 -1200 400 120 21 +DS -1200 400 1200 400 120 21 +DS 1200 400 1200 0 120 21 +DS 1000 -400 1000 400 120 21 +DS 900 400 900 -400 120 21 +$PAD +Sh "2" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po 1500 0 +$EndPAD +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po -1500 0 +$EndPAD +$SHAPE3D +Na "discret/diode.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE D3 +$MODULE D3 +Po 41000 28000 0 15 00200000 506D2FDF ~~ +Li D3 +Cd Diode 3 pas +Kw DIODE DEV +Sc 506D2FDF +AR /506BDD38 +Op 0 0 0 +T0 0 0 400 400 0 80 N V 21 N "D3" +T1 0 0 400 400 0 80 N I 21 N "DIODE" +DS 1500 0 1200 0 120 21 +DS 1200 0 1200 -400 120 21 +DS 1200 -400 -1200 -400 120 21 +DS -1200 -400 -1200 0 120 21 +DS -1200 0 -1500 0 120 21 +DS -1200 0 -1200 400 120 21 +DS -1200 400 1200 400 120 21 +DS 1200 400 1200 0 120 21 +DS 1000 -400 1000 400 120 21 +DS 900 400 900 -400 120 21 +$PAD +Sh "2" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 1500 0 +$EndPAD +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po -1500 0 +$EndPAD +$SHAPE3D +Na "discret/diode.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE D3 +$MODULE D3 +Po 41000 26000 0 15 00200000 506D31A5 F~ +Li D3 +Cd Diode 3 pas +Kw DIODE DEV +Sc 506D31A5 +AR /506BDD2F +Op 0 0 0 +T0 0 0 400 400 0 80 N V 21 N "D4" +T1 0 0 400 400 0 80 N I 21 N "DIODE" +DS 1500 0 1200 0 120 21 +DS 1200 0 1200 -400 120 21 +DS 1200 -400 -1200 -400 120 21 +DS -1200 -400 -1200 0 120 21 +DS -1200 0 -1500 0 120 21 +DS -1200 0 -1200 400 120 21 +DS -1200 400 1200 400 120 21 +DS 1200 400 1200 0 120 21 +DS 1000 -400 1000 400 120 21 +DS 900 400 900 -400 120 21 +$PAD +Sh "2" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po 1500 0 +$EndPAD +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po -1500 0 +$EndPAD +$SHAPE3D +Na "discret/diode.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE D3 +$TRACK +Po 0 39500 28000 39500 26000 80 -1 +De 0 0 1 0 C00000 +Po 0 45000 30000 44000 30000 80 -1 +De 0 0 1 0 400000 +Po 0 44000 30000 43000 31000 80 -1 +De 0 0 1 0 0 +Po 0 43000 31000 40500 31000 80 -1 +De 0 0 1 0 0 +Po 0 40500 31000 39500 30000 80 -1 +De 0 0 1 0 0 +Po 0 39500 30000 39500 28000 80 -1 +De 0 0 1 0 800000 +Po 0 41000 30000 41000 27000 80 -1 +De 0 0 2 0 400000 +Po 0 42000 26000 42500 26000 80 -1 +De 0 0 2 0 800000 +Po 0 41000 27000 42000 26000 80 -1 +De 0 0 2 0 0 +Po 0 42500 26000 45000 26000 80 -1 +De 0 0 2 0 C00000 +Po 0 42500 28000 45000 28000 80 -1 +De 0 0 3 0 C00000 +Po 0 42000 30000 42500 30000 80 -1 +De 0 0 3 0 400000 +Po 0 43000 28500 42500 28000 80 -1 +De 0 0 3 0 800000 +Po 0 43000 29500 43000 28500 80 -1 +De 0 0 3 0 0 +Po 0 42500 30000 43000 29500 80 -1 +De 0 0 3 0 0 +Po 0 48000 28000 48000 30000 80 -1 +De 0 0 4 0 C00000 +Po 0 48000 26000 48000 28000 80 -1 +De 0 0 4 0 C00000 +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/bridgeRectifier/1n4007.lib b/FreeEDA/Examples/bridgeRectifier/1n4007.lib new file mode 100644 index 0000000..89d421d --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/1n4007.lib @@ -0,0 +1,2 @@ +.model 1n4007 D( IS=7.02767e-09 RS=0.0341512 N=1.80803 EG=1.05743 XTI=5 BV=1000 IBV=5e-08 CJO=1E-11 ++VJ=0.7 M=0.5 FC=0.5 TT=1E-07 KF=0 AF=1 ) diff --git a/FreeEDA/Examples/bridgeRectifier/1n4148.lib b/FreeEDA/Examples/bridgeRectifier/1n4148.lib new file mode 100755 index 0000000..b32fdf8 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/1n4148.lib @@ -0,0 +1,2 @@ +.model 1n4148 D( Is=2.495E-09 Rs=4.755E-01 n=1.679 tt=3.030E-09 Cjo=1.700E-12 M=1.959E-01 ++ Vj=1 Bv=1.000E+02 ibv=1.000E-04 ) diff --git a/FreeEDA/Examples/bridgeRectifier/analysis b/FreeEDA/Examples/bridgeRectifier/analysis new file mode 100644 index 0000000..888b3aa --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/analysis @@ -0,0 +1 @@ +.tran 100e-06 40e-03 0e-00 diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier-cache.bak b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier-cache.bak new file mode 100644 index 0000000..0103c9f --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier-cache.bak @@ -0,0 +1,106 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 10:56:29 AM IST +#encoding utf-8 +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot8 +# +DEF vplot8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier-cache.lib b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier-cache.lib new file mode 100644 index 0000000..0e9344f --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier-cache.lib @@ -0,0 +1,106 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 12:01:58 PM IST +#encoding utf-8 +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot8 +# +DEF vplot8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.bak b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.bak new file mode 100644 index 0000000..542665c --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.bak @@ -0,0 +1,203 @@ +EESchema Schematic File Version 2 date Sunday 09 December 2012 10:56:29 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:bridgeRectifier-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "9 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 6600 4000 4900 4000 +Wire Wire Line + 6600 4000 6600 3550 +Connection ~ 6300 2600 +Wire Wire Line + 6600 2950 6600 2600 +Wire Wire Line + 6600 2600 4900 2600 +Connection ~ 5150 3350 +Wire Wire Line + 5150 2450 5150 3350 +Connection ~ 5950 4000 +Wire Wire Line + 5950 4000 5950 3700 +Connection ~ 4900 3200 +Wire Wire Line + 4900 3200 4650 3200 +Wire Wire Line + 4650 3200 4650 2650 +Wire Wire Line + 4650 2650 4400 2650 +Wire Wire Line + 4400 2650 4400 2850 +Connection ~ 5500 2600 +Wire Wire Line + 5500 3150 5500 3400 +Wire Wire Line + 4900 3400 4900 3150 +Wire Wire Line + 4900 2600 4900 2750 +Wire Wire Line + 5500 2600 5500 2750 +Wire Wire Line + 4900 4000 4900 3800 +Wire Wire Line + 5500 4000 5500 3800 +Wire Wire Line + 6300 4000 6300 3500 +Connection ~ 5500 4000 +Wire Wire Line + 4400 3750 4400 3950 +Wire Wire Line + 4400 3950 4650 3950 +Wire Wire Line + 4650 3950 4650 3350 +Wire Wire Line + 4650 3350 5500 3350 +Connection ~ 5500 3350 +Wire Wire Line + 5650 4000 5650 4200 +Connection ~ 5650 4000 +Wire Wire Line + 6300 2600 6300 3000 +Wire Wire Line + 4550 2450 4550 2650 +Connection ~ 4550 2650 +Connection ~ 6300 4000 +$Comp +L VPLOT8 U1 +U 2 1 50C41A9A +P 6600 3250 +F 0 "U1" H 6450 3350 50 0000 C CNN +F 1 "VPLOT8" H 6750 3350 50 0000 C CNN + 2 6600 3250 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8 U1 +U 1 1 50C41A90 +P 4850 2450 +F 0 "U1" H 4700 2550 50 0000 C CNN +F 1 "VPLOT8" H 5000 2550 50 0000 C CNN + 1 4850 2450 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 506BDF52 +P 5950 3700 +F 0 "#FLG01" H 5950 3970 30 0001 C CNN +F 1 "PWR_FLAG" H 5950 3930 30 0000 C CNN + 1 5950 3700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 506BDF42 +P 5650 4200 +F 0 "#PWR02" H 5650 4200 30 0001 C CNN +F 1 "GND" H 5650 4130 30 0001 C CNN + 1 5650 4200 + 1 0 0 -1 +$EndComp +$Comp +L SINE V1 +U 1 1 506BDD71 +P 4400 3300 +F 0 "V1" H 4200 3400 60 0000 C CNN +F 1 "SINE" H 4200 3250 60 0000 C CNN +F 2 "R1" H 4100 3300 60 0000 C CNN + 1 4400 3300 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 506BDD54 +P 6300 3250 +F 0 "R1" V 6380 3250 50 0000 C CNN +F 1 "1000" V 6300 3250 50 0000 C CNN + 1 6300 3250 + 1 0 0 -1 +$EndComp +$Comp +L DIODE D3 +U 1 1 506BDD38 +P 4900 3600 +F 0 "D3" H 4900 3700 40 0000 C CNN +F 1 "1n4007" H 4900 3500 40 0000 C CNN + 1 4900 3600 + 0 -1 -1 0 +$EndComp +$Comp +L DIODE D4 +U 1 1 506BDD2F +P 5500 3600 +F 0 "D4" H 5500 3700 40 0000 C CNN +F 1 "1n4007" H 5500 3500 40 0000 C CNN + 1 5500 3600 + 0 -1 -1 0 +$EndComp +$Comp +L DIODE D2 +U 1 1 506BDD29 +P 5500 2950 +F 0 "D2" H 5500 3050 40 0000 C CNN +F 1 "1n4007" H 5500 2850 40 0000 C CNN + 1 5500 2950 + 0 -1 -1 0 +$EndComp +$Comp +L DIODE D1 +U 1 1 506BDD23 +P 4900 2950 +F 0 "D1" H 4900 3050 40 0000 C CNN +F 1 "1n4007" H 4900 2850 40 0000 C CNN + 1 4900 2950 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.brd b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.brd new file mode 100644 index 0000000..1f56fcf --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.brd @@ -0,0 +1,374 @@ +PCBNEW-BOARD Version 1 date Thursday 04 October 2012 12:24:14 PM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 8 +NoConn 0 +Di 39125 25379 48489 31041 +Ndraw 0 +Ntrack 17 +Nzone 0 +BoardThickness 630 +Nmodule 6 +Nnets 5 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "4 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000002" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000003" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 4 "N-000004" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "GND" +AddNet "N-000002" +AddNet "N-000003" +AddNet "N-000004" +$EndNCLASS +$MODULE R3 +Po 46500 30000 1800 15 00200000 506D2FD9 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 506D2FD9 +AR /506BDD54 +Op 0 A 0 +T0 0 0 550 500 1800 80 N V 21 N "R1" +T1 0 0 550 500 1800 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R1 +Po 41500 30000 1800 15 00200000 506D2FDA ~~ +Li R1 +Cd Resistance verticale +Kw R +Sc 506D2FDA +AR /506BDD71 +Op A A 0 +T0 -400 1000 550 500 1800 80 N V 21 N "V1" +T1 -450 1000 550 500 1800 80 N I 21 N "SINE" +DS -500 0 500 0 150 21 +DC -500 0 -250 500 150 21 +$PAD +Sh "1" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/verti_resistor.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R1 +$MODULE D3 +Po 46500 28000 0 15 00200000 506D2FDB ~~ +Li D3 +Cd Diode 3 pas +Kw DIODE DEV +Sc 506D2FDB +AR /506BDD23 +Op 0 0 0 +T0 0 0 400 400 0 80 N V 21 N "D1" +T1 0 0 400 400 0 80 N I 21 N "DIODE" +DS 1500 0 1200 0 120 21 +DS 1200 0 1200 -400 120 21 +DS 1200 -400 -1200 -400 120 21 +DS -1200 -400 -1200 0 120 21 +DS -1200 0 -1500 0 120 21 +DS -1200 0 -1200 400 120 21 +DS -1200 400 1200 400 120 21 +DS 1200 400 1200 0 120 21 +DS 1000 -400 1000 400 120 21 +DS 900 400 900 -400 120 21 +$PAD +Sh "2" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po 1500 0 +$EndPAD +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po -1500 0 +$EndPAD +$SHAPE3D +Na "discret/diode.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE D3 +$MODULE D3 +Po 46500 26000 0 15 00200000 506D2FDD ~~ +Li D3 +Cd Diode 3 pas +Kw DIODE DEV +Sc 506D2FDD +AR /506BDD29 +Op 0 0 0 +T0 0 0 400 400 0 80 N V 21 N "D2" +T1 0 0 400 400 0 80 N I 21 N "DIODE" +DS 1500 0 1200 0 120 21 +DS 1200 0 1200 -400 120 21 +DS 1200 -400 -1200 -400 120 21 +DS -1200 -400 -1200 0 120 21 +DS -1200 0 -1500 0 120 21 +DS -1200 0 -1200 400 120 21 +DS -1200 400 1200 400 120 21 +DS 1200 400 1200 0 120 21 +DS 1000 -400 1000 400 120 21 +DS 900 400 900 -400 120 21 +$PAD +Sh "2" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po 1500 0 +$EndPAD +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po -1500 0 +$EndPAD +$SHAPE3D +Na "discret/diode.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE D3 +$MODULE D3 +Po 41000 28000 0 15 00200000 506D2FDF ~~ +Li D3 +Cd Diode 3 pas +Kw DIODE DEV +Sc 506D2FDF +AR /506BDD38 +Op 0 0 0 +T0 0 0 400 400 0 80 N V 21 N "D3" +T1 0 0 400 400 0 80 N I 21 N "DIODE" +DS 1500 0 1200 0 120 21 +DS 1200 0 1200 -400 120 21 +DS 1200 -400 -1200 -400 120 21 +DS -1200 -400 -1200 0 120 21 +DS -1200 0 -1500 0 120 21 +DS -1200 0 -1200 400 120 21 +DS -1200 400 1200 400 120 21 +DS 1200 400 1200 0 120 21 +DS 1000 -400 1000 400 120 21 +DS 900 400 900 -400 120 21 +$PAD +Sh "2" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 1500 0 +$EndPAD +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po -1500 0 +$EndPAD +$SHAPE3D +Na "discret/diode.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE D3 +$MODULE D3 +Po 41000 26000 0 15 00200000 506D31A5 ~~ +Li D3 +Cd Diode 3 pas +Kw DIODE DEV +Sc 506D31A5 +AR /506BDD2F +Op 0 0 0 +T0 0 0 400 400 0 80 N V 21 N "D4" +T1 0 0 400 400 0 80 N I 21 N "DIODE" +DS 1500 0 1200 0 120 21 +DS 1200 0 1200 -400 120 21 +DS 1200 -400 -1200 -400 120 21 +DS -1200 -400 -1200 0 120 21 +DS -1200 0 -1500 0 120 21 +DS -1200 0 -1200 400 120 21 +DS -1200 400 1200 400 120 21 +DS 1200 400 1200 0 120 21 +DS 1000 -400 1000 400 120 21 +DS 900 400 900 -400 120 21 +$PAD +Sh "2" R 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po 1500 0 +$EndPAD +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po -1500 0 +$EndPAD +$SHAPE3D +Na "discret/diode.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE D3 +$TRACK +Po 0 45000 30000 44000 30000 80 -1 +De 0 0 1 0 400000 +Po 0 39500 30000 39500 28000 80 -1 +De 0 0 1 0 800000 +Po 0 40500 31000 39500 30000 80 -1 +De 0 0 1 0 0 +Po 0 43000 31000 40500 31000 80 -1 +De 0 0 1 0 0 +Po 0 44000 30000 43000 31000 80 -1 +De 0 0 1 0 0 +Po 0 39500 28000 39500 26000 80 -1 +De 0 0 1 0 C00000 +Po 0 41000 30000 41000 27000 80 -1 +De 0 0 2 0 400000 +Po 0 42000 26000 42500 26000 80 -1 +De 0 0 2 0 800000 +Po 0 41000 27000 42000 26000 80 -1 +De 0 0 2 0 0 +Po 0 42500 26000 45000 26000 80 -1 +De 0 0 2 0 C00000 +Po 0 42500 28000 45000 28000 80 -1 +De 0 0 3 0 C00000 +Po 0 42000 30000 42500 30000 80 -1 +De 0 0 3 0 400000 +Po 0 43000 28500 42500 28000 80 -1 +De 0 0 3 0 800000 +Po 0 43000 29500 43000 28500 80 -1 +De 0 0 3 0 0 +Po 0 42500 30000 43000 29500 80 -1 +De 0 0 3 0 0 +Po 0 48000 28000 48000 30000 80 -1 +De 0 0 4 0 C00000 +Po 0 48000 26000 48000 28000 80 -1 +De 0 0 4 0 C00000 +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cir b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cir new file mode 100644 index 0000000..4eab418 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 12:01:55 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 3 4 1 0 VPLOT8 +V1 3 1 SINE +R1 4 0 1000 +D3 0 3 1n4007 +D4 0 1 1n4007 +D2 1 4 1n4007 +D1 3 4 1n4007 + +.end diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cir.ckt b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cir.ckt new file mode 100644 index 0000000..2ac10e3 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cir.ckt @@ -0,0 +1,13 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 12:01:55 pm ist +.include 1n4007.lib + +v1 3 1 sine(0 5 50 0 0) +r1 4 0 1000 +d3 0 3 1n4007 +d4 0 1 1n4007 +d2 1 4 1n4007 +d1 3 4 1n4007 + +.tran 100e-06 40e-03 0e-00 +.plot v(3)-v(1) v(4) +.end diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cir.ckt.sol b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cir.ckt.sol new file mode 100644 index 0000000..d25e686 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cir.ckt.sol @@ -0,0 +1,8 @@ +Name Source Sink Voltage Current +---------------------------------------------------------- +V 3 1 0.0000000000 0.0000000000 +R 4 0 0.0000000000 0.0000000000 +D 0 3 -0.0000000000 0.0000000000 +D 0 1 -0.0000000000 0.0000000000 +D 1 4 0.0000000000 0.0000000000 +D 3 4 0.0000000000 0.0000000000 diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cir.out b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cir.out new file mode 100644 index 0000000..367e3ee --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cir.out @@ -0,0 +1,20 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 12:01:55 pm ist +.include 1n4007.lib + +v1 3 1 sine(0 5 50 0 0) +r1 4 0 1000 +d3 0 3 1n4007 +d4 0 1 1n4007 +d2 1 4 1n4007 +d1 3 4 1n4007 + +.tran 100e-06 40e-03 0e-00 + +* Control Statements +.control +run +plot v(3)-v(1) v(4) +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cmp b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cmp new file mode 100644 index 0000000..2420597 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.cmp @@ -0,0 +1,45 @@ +Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Monday 22 October 2012 04:28:50 PM IST + +BeginCmp +TimeStamp = /506BDD23; +Reference = D1; +ValeurCmp = 1n4007; +IdModule = D3; +EndCmp + +BeginCmp +TimeStamp = /506BDD29; +Reference = D2; +ValeurCmp = 1n4007; +IdModule = D3; +EndCmp + +BeginCmp +TimeStamp = /506BDD38; +Reference = D3; +ValeurCmp = 1n4007; +IdModule = D3; +EndCmp + +BeginCmp +TimeStamp = /506BDD2F; +Reference = D4; +ValeurCmp = 1n4007; +IdModule = D3; +EndCmp + +BeginCmp +TimeStamp = /506BDD54; +Reference = R1; +ValeurCmp = 1000; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /506BDD71; +Reference = V1; +ValeurCmp = SINE; +IdModule = R1; +EndCmp + +EndListe diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.lst b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.lst new file mode 100644 index 0000000..a966a95 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.lst @@ -0,0 +1,25 @@ +eeschema (2011-05-25)-stable >> Creation date: Monday 15 October 2012 02:40:18 PM IST + +#Cmp ( order = Reference ) +| D1 DIODE +| D2 DIODE +| D3 DIODE +| D4 DIODE +| R1 1000 +| U1 VPLOT1 +| U2 VPLOT +| V1 SINE +#End Cmp + +#Cmp ( order = Value ) +| 1000 R1 +| DIODE D1 +| DIODE D2 +| DIODE D3 +| DIODE D4 +| SINE V1 +| VPLOT U2 +| VPLOT1 U1 +#End Cmp + +#End List diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.net b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.net new file mode 100644 index 0000000..94b1097 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.net @@ -0,0 +1,56 @@ +# EESchema Netlist Version 1.1 created Monday 22 October 2012 04:28:50 PM IST +( + ( /506BDD23 D3 D1 1n4007 + ( 1 N-000003 ) + ( 2 N-000004 ) + ) + ( /506BDD29 D3 D2 1n4007 + ( 1 N-000001 ) + ( 2 N-000004 ) + ) + ( /506BDD38 D3 D3 1n4007 + ( 1 GND ) + ( 2 N-000003 ) + ) + ( /506BDD2F D3 D4 1n4007 + ( 1 GND ) + ( 2 N-000001 ) + ) + ( /506BDD54 R3 R1 1000 + ( 1 N-000004 ) + ( 2 GND ) + ) + ( /506BDD71 R1 V1 SINE + ( 1 N-000003 ) + ( 2 N-000001 ) + ) +) +* +{ Allowed footprints by component: +$component D1 + D? + S* +$endlist +$component D2 + D? + S* +$endlist +$component D3 + D? + S* +$endlist +$component D4 + D? + S* +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$component V1 + 1_pin +$endlist +$endfootprintlist +} diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.pdf b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.pdf new file mode 100644 index 0000000..4500c18 Binary files /dev/null and b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.pdf differ diff --git a/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.pro b/FreeEDA/Examples/bridgeRectifier/bridgeRectifier.pro new file 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col0 s gr +% Polyline +n 2100 2400 m + 2100 2475 l gs col0 s gr +% here ends figure; +% +% here starts figure with depth 0 +% Ellipse +7.500 slw +n 4200 1800 165 165 0 360 DrawEllipse gs col-1 s gr + +% Polyline +0 slj +0 slc +n 4125 1800 m + 4200 1875 l gs col-1 s gr +% Polyline +n 4275 1800 m + 4200 1875 l gs col-1 s gr +% Polyline +n 4200 1725 m + 4200 1875 l gs col-1 s gr +% Polyline +n 4200 1500 m + 4200 1650 l gs col-1 s gr +% Polyline +n 4200 1950 m + 4200 2100 l gs col-1 s gr +% Polyline +n 2101 2250 m + 2101 1950 l gs col-1 s gr +% Polyline +n 2101 1652 m + 2101 1352 l gs col-1 s gr +% Polyline +n 2250 1950 m + 1950 1950 l gs 0.00 setgray ef gr gs col-1 s gr +% Polyline +n 2101 1950 m 2250 1652 l 1950 1652 l + cp gs col7 1.00 shd ef gr gs col0 s gr +% here ends figure; +$F2psEnd +rs +showpage +%%Trailer +%EOF diff --git a/FreeEDA/Examples/bridgeRectifier/diode_Dref.pstex_t b/FreeEDA/Examples/bridgeRectifier/diode_Dref.pstex_t new file mode 100644 index 0000000..65c5d99 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/diode_Dref.pstex_t @@ -0,0 +1,19 @@ +\begin{picture}(0,0)% +\includegraphics{diode_Dref.pstex}% +\end{picture}% +\setlength{\unitlength}{3947sp}% +% +\begingroup\makeatletter\ifx\SetFigFont\undefined% +\gdef\SetFigFont#1#2#3#4#5{% + \reset@font\fontsize{#1}{#2pt}% + \fontfamily{#3}\fontseries{#4}\fontshape{#5}% + \selectfont}% +\fi\endgroup% +\begin{picture}(2435,1374)(1939,-1648) +\put(2251,-661){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$D_{dnumber}$}% +}}}} +\put(3076,-961){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$R_{D_{dnumber}}$}% +}}}} +\put(4351,-886){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$I_{D_{dnumber}}$}% +}}}} +\end{picture}% diff --git a/FreeEDA/Examples/bridgeRectifier/latfont b/FreeEDA/Examples/bridgeRectifier/latfont new file mode 100644 index 0000000..90e1eb3 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/latfont @@ -0,0 +1,8 @@ +echo {\\input{$*.pstex_t}} >& dummy_font.tex +cat latfont1.tex dummy_font.tex latfont2.tex >& dummy_fig.tex +latex dummy_fig.tex +dvips -E -o dummy_fig.eps dummy_fig.dvi +mv dummy_fig.eps $*.eps +rm dummy_fig.* +rm -rf dummy_font.tex +evince $1.eps & diff --git a/FreeEDA/Examples/bridgeRectifier/latfont1.tex b/FreeEDA/Examples/bridgeRectifier/latfont1.tex new file mode 100644 index 0000000..e6301a4 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/latfont1.tex @@ -0,0 +1,20 @@ +\documentclass[12pt]{book} +\textwidth 6.5in +\textheight 9.0in +\topmargin 0.0in +\oddsidemargin 0.2in +\evensidemargin 0.2in +\textfloatsep 0.6cm +\abovecaptionskip 0.1cm +\usepackage[dvips]{graphicx} +\usepackage{makeidx} +\usepackage{epsfig} +\usepackage{color} +\setlength{\textwidth}{50cm} +\setlength{\textheight}{50cm} +\begin{document} +\pagestyle{empty} + +\begin{center} +%\resizebox{!}{5cm}{\input{cap_trns.pstex_t}} + diff --git a/FreeEDA/Examples/bridgeRectifier/latfont2.tex b/FreeEDA/Examples/bridgeRectifier/latfont2.tex new file mode 100644 index 0000000..3f4cd92 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifier/latfont2.tex @@ -0,0 +1,2 @@ +\end{center} +\end{document} \ No newline at end of file diff --git a/FreeEDA/Examples/bridgeRectifierFilter/1n4007.lib b/FreeEDA/Examples/bridgeRectifierFilter/1n4007.lib new file mode 100644 index 0000000..e95f7ea --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/1n4007.lib @@ -0,0 +1,3 @@ +.model 1n4007 D( VJ=0.7 CJO=1E-11 RS=0.0341512 IS=7.02767e-09 AF=1 ++ M=0.5 N=1.80803 BV=1000 FC=0.5 IBV=5e-08 ++ TT=1E-07 EG=1.05743 XTI=5 KF=0 ) \ No newline at end of file diff --git a/FreeEDA/Examples/bridgeRectifierFilter/analysis b/FreeEDA/Examples/bridgeRectifierFilter/analysis new file mode 100644 index 0000000..888b3aa --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/analysis @@ -0,0 +1 @@ +.tran 100e-06 40e-03 0e-00 diff --git a/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.bak b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.bak new file mode 100644 index 0000000..0708079 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.bak @@ -0,0 +1,121 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 20 November 2012 11:18:10 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot +# +DEF vplot U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -400 0 300 R 50 50 1 1 O +X - 2 400 0 300 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# vplot1 +# +DEF vplot1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.lib b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.lib new file mode 100644 index 0000000..c2529f8 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.lib @@ -0,0 +1,121 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 03:22:19 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot +# +DEF vplot U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 2 300 0 200 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot1 +# +DEF vplot1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.bak b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.bak new file mode 100644 index 0000000..acc6cf8 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.bak @@ -0,0 +1,209 @@ +EESchema Schematic File Version 2 date Tuesday 20 November 2012 11:18:10 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:bridgeRectifierFilter-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 nov 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3750 4400 0 80 Italic 0 +Bridge Rectifier with Capacitor Filter +Wire Wire Line + 5850 2900 5850 2850 +Wire Wire Line + 3700 2950 3700 2650 +Connection ~ 5350 4100 +Wire Wire Line + 5350 4100 5350 3900 +Connection ~ 5850 2900 +Connection ~ 5650 2900 +Wire Wire Line + 6200 3300 6200 2900 +Wire Wire Line + 6200 2900 4250 2900 +Connection ~ 3700 2950 +Connection ~ 4250 3400 +Wire Wire Line + 4250 3400 3850 3400 +Wire Wire Line + 3850 3400 3850 2950 +Wire Wire Line + 3850 2950 3400 2950 +Wire Wire Line + 3400 2950 3400 3000 +Connection ~ 4850 2900 +Wire Wire Line + 5650 2900 5650 3300 +Wire Wire Line + 4250 3700 4250 3300 +Wire Wire Line + 4850 3700 4850 3300 +Wire Wire Line + 5650 4100 5650 3800 +Connection ~ 4850 4100 +Wire Wire Line + 3400 3900 3400 4000 +Wire Wire Line + 3400 4000 3850 4000 +Wire Wire Line + 3850 4000 3850 3600 +Wire Wire Line + 3850 3600 4850 3600 +Connection ~ 4850 3600 +Connection ~ 4500 3600 +Wire Wire Line + 4250 4100 6200 4100 +Wire Wire Line + 6200 4100 6200 3700 +Connection ~ 5650 4100 +Connection ~ 5200 4100 +Wire Wire Line + 5200 4100 5200 4200 +Wire Wire Line + 4500 3600 4500 2650 +$Comp +L PWR_FLAG #FLG01 +U 1 1 50852DDA +P 5350 3900 +F 0 "#FLG01" H 5350 4170 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 4130 30 0000 C CNN + 1 5350 3900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5070FDD5 +P 5200 4200 +F 0 "#PWR02" H 5200 4200 30 0001 C CNN +F 1 "GND" H 5200 4130 30 0001 C CNN + 1 5200 4200 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT1 U2 +U 1 1 5070F9F8 +P 5850 2550 +F 0 "U2" H 5700 2650 50 0000 C CNN +F 1 "VPLOT1" H 6000 2650 50 0000 C CNN + 1 5850 2550 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT U1 +U 1 1 5070F9E6 +P 4100 2650 +F 0 "U1" H 3950 2750 50 0000 C CNN +F 1 "VPLOT" H 4250 2750 50 0000 C CNN + 1 4100 2650 + 1 0 0 -1 +$EndComp +$Comp +L SINE V1 +U 1 1 5070F9A6 +P 3400 3450 +F 0 "V1" H 3200 3550 60 0000 C CNN +F 1 "SINE" H 3200 3400 60 0000 C CNN +F 2 "R1" H 3100 3450 60 0000 C CNN + 1 3400 3450 + 1 0 0 -1 +$EndComp +$Comp +L C C1 +U 1 1 5070F977 +P 6200 3500 +F 0 "C1" H 6250 3600 50 0000 L CNN +F 1 "1e-06" H 6250 3400 50 0000 L CNN + 1 6200 3500 + 1 0 0 -1 +$EndComp +$Comp +L DIODE D4 +U 1 1 5070F878 +P 4850 3900 +F 0 "D4" H 4850 4000 40 0000 C CNN +F 1 "1n4007" H 4850 3800 40 0000 C CNN + 1 4850 3900 + 0 -1 -1 0 +$EndComp +$Comp +L DIODE D2 +U 1 1 5070F85B +P 4850 3100 +F 0 "D2" H 4850 3200 40 0000 C CNN +F 1 "1n4007" H 4850 3000 40 0000 C CNN + 1 4850 3100 + 0 -1 -1 0 +$EndComp +$Comp +L DIODE D3 +U 1 1 5070F84B +P 4250 3900 +F 0 "D3" H 4250 4000 40 0000 C CNN +F 1 "1n4007" H 4250 3800 40 0000 C CNN + 1 4250 3900 + 0 -1 -1 0 +$EndComp +$Comp +L DIODE D1 +U 1 1 5070F83D +P 4250 3100 +F 0 "D1" H 4250 3200 40 0000 C CNN +F 1 "1n4007" H 4250 3000 40 0000 C CNN + 1 4250 3100 + 0 -1 -1 0 +$EndComp +$Comp +L R R1 +U 1 1 5070F82C +P 5650 3550 +F 0 "R1" V 5730 3550 50 0000 C CNN +F 1 "100000" V 5650 3550 50 0000 C CNN + 1 5650 3550 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir new file mode 100644 index 0000000..4597fee --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir @@ -0,0 +1,17 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Sunday 09 December 2012 03:22:39 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U2 3 VPLOT1 +U1 4 1 VPLOT +V1 4 1 SINE +C1 3 0 1e-06 +D4 0 1 1n4007 +D2 1 3 1n4007 +D3 0 4 1n4007 +D1 4 3 1n4007 +R1 3 0 100000 + +.end diff --git a/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt new file mode 100644 index 0000000..f6731c0 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt @@ -0,0 +1,17 @@ +* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 03:22:39 pm ist +.include 1n4007.lib + +* Plotting option vplot1 +* Plotting option vplot +v1 4 1 sine(0 5 50 0 0) +c1 3 0 1e-06 +d4 0 1 1n4007 +d2 1 3 1n4007 +d3 0 4 1n4007 +d1 4 3 1n4007 +r1 3 0 100000 + +.tran 100e-06 40e-03 0e-00 +.plot v(3) +.plot v(4)-v(1) +.end diff --git a/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt.sol b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt.sol new file mode 100644 index 0000000..6403344 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt.sol @@ -0,0 +1,10 @@ +Name Source Sink Voltage Current +---------------------------------------------------------- +V 4 1 0.0000000000 0.0000000000 +C 3 0 0.0000000000 0.0000000000 +I 0 3 -0.0000000000 0.0000000000 +D 0 1 -0.0000000000 0.0000000000 +D 1 3 0.0000000000 0.0000000000 +D 0 4 -0.0000000000 0.0000000000 +D 4 3 0.0000000000 0.0000000000 +R 3 0 0.0000000000 0.0000000000 diff --git a/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.out b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.out new file mode 100644 index 0000000..f4a26cd --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.out @@ -0,0 +1,22 @@ +* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 03:22:39 pm ist +.include 1n4007.lib + +* Plotting option vplot1 +* Plotting option vplot +v1 4 1 sine(0 5 50 0 0) +c1 3 0 1e-06 +d4 0 1 1n4007 +d2 1 3 1n4007 +d3 0 4 1n4007 +d1 4 3 1n4007 +r1 3 0 100000 + +.tran 100e-06 40e-03 0e-00 + +* Control Statements +.control +run +plot v(3) +plot v(4)-v(1) +.endc +.end diff --git a/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.net b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.net new file mode 100644 index 0000000..5ff5b10 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.net @@ -0,0 +1,96 @@ +# EESchema Netlist Version 1.1 created Tuesday 02 April 2013 03:03:04 PM IST +( + ( /5070F9F8 $noname U2 VPLOT1 {Lib=VPLOT1} + ( 1 N-000003 ) + ) + ( /5070F9E6 $noname U1 VPLOT {Lib=VPLOT} + ( 1 N-000004 ) + ( 2 N-000001 ) + ) + ( /5070F9A6 R1 V1 SINE {Lib=SINE} + ( 1 N-000004 ) + ( 2 N-000001 ) + ) + ( /5070F977 $noname C1 1e-06 {Lib=C} + ( 1 N-000003 ) + ( 2 GND ) + ) + ( /5070F878 $noname D4 1n4007 {Lib=DIODE} + ( 1 GND ) + ( 2 N-000001 ) + ) + ( /5070F85B $noname D2 1n4007 {Lib=DIODE} + ( 1 N-000001 ) + ( 2 N-000003 ) + ) + ( /5070F84B $noname D3 1n4007 {Lib=DIODE} + ( 1 GND ) + ( 2 N-000004 ) + ) + ( /5070F83D $noname D1 1n4007 {Lib=DIODE} + ( 1 N-000004 ) + ( 2 N-000003 ) + ) + ( /5070F82C $noname R1 100000 {Lib=R} + ( 1 N-000003 ) + ( 2 GND ) + ) +) +* +{ Allowed footprints by component: +$component V1 + 1_pin +$endlist +$component C1 + SM* + C? + C1-1 +$endlist +$component D4 + D? + S* +$endlist +$component D2 + D? + S* +$endlist +$component D3 + D? + S* +$endlist +$component D1 + D? + S* +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$endfootprintlist +} +{ Pin List by Nets +Net 1 "" "" + V1 2 + D2 1 + D4 2 + U1 2 +Net 2 "GND" "GND" + R1 2 + D3 1 + D4 1 + C1 2 +Net 3 "" "" + C1 1 + U2 1 + D2 2 + D1 2 + R1 1 +Net 4 "" "" + V1 1 + D3 2 + D1 1 + U1 1 +} +#End diff --git a/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.pro b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.pro new file mode 100644 index 0000000..08b1891 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.pro @@ -0,0 +1,71 @@ +update=Monday 22 October 2012 04:57:56 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice diff --git a/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.proj b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.proj new file mode 100644 index 0000000..ec5c563 --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.proj @@ -0,0 +1 @@ +schematicFile bridgeRectifierFilter.sch diff --git a/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.sch b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.sch new file mode 100644 index 0000000..725f87a --- /dev/null +++ b/FreeEDA/Examples/bridgeRectifierFilter/bridgeRectifierFilter.sch @@ -0,0 +1,213 @@ +EESchema Schematic File Version 2 date Sunday 09 December 2012 03:22:19 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:bridgeRectifierFilter-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "9 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 4400 2650 4500 2650 +Wire Wire Line + 5850 2900 5850 2850 +Wire Wire Line + 3700 2950 3700 2650 +Connection ~ 5350 4100 +Wire Wire Line + 5350 4100 5350 3900 +Connection ~ 5850 2900 +Connection ~ 5650 2900 +Wire Wire Line + 6200 3300 6200 2900 +Wire Wire Line + 6200 2900 4250 2900 +Connection ~ 3700 2950 +Connection ~ 4250 3400 +Wire Wire Line + 4250 3400 3850 3400 +Wire Wire Line + 3850 3400 3850 2950 +Wire Wire Line + 3850 2950 3400 2950 +Wire Wire Line + 3400 2950 3400 3000 +Connection ~ 4850 2900 +Wire Wire Line + 5650 2900 5650 3300 +Wire Wire Line + 4250 3700 4250 3300 +Wire Wire Line + 4850 3700 4850 3300 +Wire Wire Line + 5650 4100 5650 3800 +Connection ~ 4850 4100 +Wire Wire Line + 3400 3900 3400 4000 +Wire Wire Line + 3400 4000 3850 4000 +Wire Wire Line + 3850 4000 3850 3600 +Wire Wire Line + 3850 3600 4850 3600 +Connection ~ 4850 3600 +Connection ~ 4500 3600 +Wire Wire Line + 4250 4100 6200 4100 +Wire Wire Line + 6200 4100 6200 3700 +Connection ~ 5650 4100 +Connection ~ 5200 4100 +Wire Wire Line + 5200 4100 5200 4200 +Wire Wire Line + 4500 2650 4500 3600 +Wire Wire Line + 3700 2650 3800 2650 +Text Notes 3750 4400 0 80 Italic 0 +Bridge Rectifier with Capacitor Filter +$Comp +L PWR_FLAG #FLG01 +U 1 1 50852DDA +P 5350 3900 +F 0 "#FLG01" H 5350 4170 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 4130 30 0000 C CNN + 1 5350 3900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5070FDD5 +P 5200 4200 +F 0 "#PWR02" H 5200 4200 30 0001 C CNN +F 1 "GND" H 5200 4130 30 0001 C CNN + 1 5200 4200 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT1 U2 +U 1 1 5070F9F8 +P 5850 2550 +F 0 "U2" H 5700 2650 50 0000 C CNN +F 1 "VPLOT1" H 6000 2650 50 0000 C CNN + 1 5850 2550 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT U1 +U 1 1 5070F9E6 +P 4100 2650 +F 0 "U1" H 3950 2750 50 0000 C CNN +F 1 "VPLOT" H 4250 2750 50 0000 C CNN + 1 4100 2650 + 1 0 0 -1 +$EndComp +$Comp +L SINE V1 +U 1 1 5070F9A6 +P 3400 3450 +F 0 "V1" H 3200 3550 60 0000 C CNN +F 1 "SINE" H 3200 3400 60 0000 C CNN +F 2 "R1" H 3100 3450 60 0000 C CNN + 1 3400 3450 + 1 0 0 -1 +$EndComp +$Comp +L C C1 +U 1 1 5070F977 +P 6200 3500 +F 0 "C1" H 6250 3600 50 0000 L CNN +F 1 "1e-06" H 6250 3400 50 0000 L CNN + 1 6200 3500 + 1 0 0 -1 +$EndComp +$Comp +L DIODE D4 +U 1 1 5070F878 +P 4850 3900 +F 0 "D4" H 4850 4000 40 0000 C CNN +F 1 "1n4007" H 4850 3800 40 0000 C CNN + 1 4850 3900 + 0 -1 -1 0 +$EndComp +$Comp +L DIODE D2 +U 1 1 5070F85B +P 4850 3100 +F 0 "D2" H 4850 3200 40 0000 C CNN +F 1 "1n4007" H 4850 3000 40 0000 C CNN + 1 4850 3100 + 0 -1 -1 0 +$EndComp +$Comp +L DIODE D3 +U 1 1 5070F84B +P 4250 3900 +F 0 "D3" H 4250 4000 40 0000 C CNN +F 1 "1n4007" H 4250 3800 40 0000 C CNN + 1 4250 3900 + 0 -1 -1 0 +$EndComp +$Comp +L DIODE D1 +U 1 1 5070F83D +P 4250 3100 +F 0 "D1" H 4250 3200 40 0000 C CNN +F 1 "1n4007" H 4250 3000 40 0000 C CNN + 1 4250 3100 + 0 -1 -1 0 +$EndComp +$Comp +L R R1 +U 1 1 5070F82C +P 5650 3550 +F 0 "R1" V 5730 3550 50 0000 C CNN +F 1 "100000" V 5650 3550 50 0000 C CNN + 1 5650 3550 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/frequencyDivider/analysis b/FreeEDA/Examples/frequencyDivider/analysis new file mode 100644 index 0000000..1f89c69 --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/analysis @@ -0,0 +1 @@ +.tran 50e-09 5e-06 0e-00 diff --git a/FreeEDA/Examples/frequencyDivider/frequencyDivider-cache.bak b/FreeEDA/Examples/frequencyDivider/frequencyDivider-cache.bak new file mode 100644 index 0000000..1434b97 --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/frequencyDivider-cache.bak @@ -0,0 +1,171 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 09:00:05 AM IST +#encoding utf-8 +# +# 74LS109 +# +DEF 74LS109 U 0 30 Y Y 2 F N +F0 "U" 0 100 60 H V C CNN +F1 "74LS109" 0 -100 60 H V C CNN +DRAW +S -350 -400 350 400 0 0 0 N +X GND 8 -250 -400 0 U 60 60 0 0 W N +X VCC 16 -250 400 0 U 60 60 0 0 W N +X Cd 1 0 -700 300 U 60 60 1 1 I I +X J 2 -650 250 300 R 60 60 1 1 I +X K 3 -650 -250 300 R 60 60 1 1 I I +X Cp 4 -650 0 300 R 60 60 1 1 I C +X Sd 5 0 700 300 D 60 60 1 1 I I +X Q 6 650 250 300 L 60 60 1 1 O +X ~Q 7 650 -250 300 L 60 60 1 1 O I +X ~Q 9 750 -250 400 L 60 60 2 1 I I +X Q 10 750 250 400 L 60 60 2 1 I +X Sd 11 0 800 400 D 60 60 2 1 I I +X Cp 12 -750 0 400 R 60 60 2 1 I C +X K 13 -750 -250 400 R 60 60 2 1 I I +X J 14 -750 250 400 R 60 60 2 1 I +X Cd 15 0 -800 400 U 60 60 2 1 I I +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# CP +# +DEF CP C 0 10 N N 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "CP" 50 -100 50 H V L CNN +ALIAS CAPAPOL +$FPLIST + CP* + SM* +$ENDFPLIST +DRAW +P 4 0 1 8 -100 50 -100 -50 100 -50 100 50 N +P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F +X ~ 1 0 200 150 D 40 40 1 1 P +X ~ 2 0 -200 150 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# IC +# +DEF IC U? 0 0 Y N 1 F N +F0 "U?" 0 270 30 H V C CNN +F1 "IC" 0 230 30 H V C CNN +DRAW +X ic 1 0 0 0 U 20 20 0 0 P +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# LM555N +# +DEF LM555N X 0 40 Y Y 1 F N +F0 "X" 0 100 70 H V C CNN +F1 "LM555N" 0 -100 70 H V C CNN +DRAW +X GND 1 0 -400 0 U 60 60 0 0 W N +X VCC 8 0 400 0 D 60 60 0 0 W N +S -400 -400 400 400 0 1 0 N +X TR 2 -700 200 300 R 60 60 1 1 I +X Q 3 700 200 300 L 60 60 1 1 O +X R 4 -700 -300 300 R 60 60 1 1 I I +X CV 5 -700 -50 300 R 60 60 1 1 I +X THR 6 700 -200 300 L 60 60 1 1 I +X DIS 7 700 0 300 L 60 60 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/frequencyDivider/frequencyDivider-cache.lib b/FreeEDA/Examples/frequencyDivider/frequencyDivider-cache.lib new file mode 100644 index 0000000..497025f --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/frequencyDivider-cache.lib @@ -0,0 +1,171 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 10:57:17 AM IST +#encoding utf-8 +# +# 74LS109 +# +DEF 74LS109 U 0 30 Y Y 2 F N +F0 "U" 0 100 60 H V C CNN +F1 "74LS109" 0 -100 60 H V C CNN +DRAW +S -350 -400 350 400 0 0 0 N +X GND 8 -250 -400 0 U 60 60 0 0 W N +X VCC 16 -250 400 0 U 60 60 0 0 W N +X Cd 1 0 -700 300 U 60 60 1 1 I I +X J 2 -650 250 300 R 60 60 1 1 I +X K 3 -650 -250 300 R 60 60 1 1 I I +X Cp 4 -650 0 300 R 60 60 1 1 I C +X Sd 5 0 700 300 D 60 60 1 1 I I +X Q 6 650 250 300 L 60 60 1 1 O +X ~Q 7 650 -250 300 L 60 60 1 1 O I +X ~Q 9 750 -250 400 L 60 60 2 1 I I +X Q 10 750 250 400 L 60 60 2 1 I +X Sd 11 0 800 400 D 60 60 2 1 I I +X Cp 12 -750 0 400 R 60 60 2 1 I C +X K 13 -750 -250 400 R 60 60 2 1 I I +X J 14 -750 250 400 R 60 60 2 1 I +X Cd 15 0 -800 400 U 60 60 2 1 I I +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# CP +# +DEF CP C 0 10 N N 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "CP" 50 -100 50 H V L CNN +ALIAS CAPAPOL +$FPLIST + CP* + SM* +$ENDFPLIST +DRAW +P 4 0 1 8 -100 50 -100 -50 100 -50 100 50 N +P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F +X ~ 1 0 200 150 D 40 40 1 1 P +X ~ 2 0 -200 150 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# IC +# +DEF IC U? 0 0 Y N 1 F N +F0 "U?" 0 270 30 H V C CNN +F1 "IC" 0 230 30 H V C CNN +DRAW +X ic 1 0 0 0 U 20 20 0 0 P +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# LM555N +# +DEF LM555N X 0 40 Y Y 1 F N +F0 "X" 0 100 70 H V C CNN +F1 "LM555N" 0 -100 70 H V C CNN +DRAW +X GND 1 0 -400 0 U 60 60 0 0 W N +X VCC 8 0 400 0 D 60 60 0 0 W N +S -400 -400 400 400 0 1 0 N +X TR 2 -700 200 300 R 60 60 1 1 I +X Q 3 700 200 300 L 60 60 1 1 O +X R 4 -700 -300 300 R 60 60 1 1 I I +X CV 5 -700 -50 300 R 60 60 1 1 I +X THR 6 700 -200 300 L 60 60 1 1 I +X DIS 7 700 0 300 L 60 60 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/frequencyDivider/frequencyDivider.bak b/FreeEDA/Examples/frequencyDivider/frequencyDivider.bak new file mode 100644 index 0000000..48303d3 --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/frequencyDivider.bak @@ -0,0 +1,280 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 09:00:05 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:convergenceAidSpice +LIBS:frequencyDivider-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L VPLOT8_1 U1 +U 2 1 50CE9193 +P 7700 3000 +F 0 "U1" H 7550 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 7850 3100 50 0000 C CNN + 2 7700 3000 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50CE918C +P 6300 3000 +F 0 "U1" H 6150 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 6450 3100 50 0000 C CNN + 1 6300 3000 + 1 0 0 -1 +$EndComp +Connection ~ 4650 4100 +Wire Wire Line + 4650 4100 4650 4050 +Connection ~ 6600 2850 +Wire Wire Line + 7050 4600 6600 4600 +Wire Wire Line + 6600 4600 6600 2850 +Connection ~ 6300 3350 +Wire Wire Line + 6300 3300 6300 3900 +Connection ~ 6100 3350 +Wire Wire Line + 6300 3900 6400 3900 +Wire Wire Line + 6300 3350 5900 3350 +Wire Wire Line + 6400 2850 6400 3650 +Wire Wire Line + 6100 4550 6100 4100 +Wire Wire Line + 3650 4700 4850 4700 +Wire Wire Line + 3650 4700 3650 4050 +Wire Wire Line + 3650 2700 4450 2700 +Wire Wire Line + 3650 2700 3650 3150 +Wire Wire Line + 5900 3550 6000 3550 +Wire Wire Line + 6000 3550 6000 3000 +Wire Wire Line + 6000 3000 4150 3000 +Wire Wire Line + 4150 3000 4150 3400 +Connection ~ 4000 3400 +Wire Wire Line + 4150 3400 4000 3400 +Wire Wire Line + 4000 4150 4000 4000 +Connection ~ 4200 4100 +Wire Wire Line + 4500 3350 4200 3350 +Wire Wire Line + 4200 3350 4200 4100 +Wire Wire Line + 4300 4400 5200 4400 +Connection ~ 5700 4550 +Wire Wire Line + 5700 4550 5700 4300 +Connection ~ 4850 4550 +Wire Wire Line + 4850 4700 4850 4550 +Connection ~ 5200 4550 +Connection ~ 5200 4400 +Wire Wire Line + 5200 4550 5200 3950 +Wire Wire Line + 5900 3750 5900 4100 +Wire Wire Line + 4450 2700 4450 2850 +Connection ~ 4450 2850 +Connection ~ 5200 2850 +Wire Wire Line + 5900 4550 5900 4800 +Connection ~ 5900 4550 +Connection ~ 4450 2700 +Wire Wire Line + 4500 3850 4400 3850 +Wire Wire Line + 4400 3850 4400 2850 +Connection ~ 4400 2850 +Wire Wire Line + 4300 4000 4300 3600 +Wire Wire Line + 4300 3600 4500 3600 +Wire Wire Line + 4000 3350 4000 3500 +Wire Wire Line + 5900 4100 4000 4100 +Connection ~ 4000 4100 +Wire Wire Line + 6100 3350 6100 3600 +Wire Wire Line + 4000 4550 6400 4550 +Wire Wire Line + 6400 4550 6400 4150 +Connection ~ 6100 4550 +Wire Wire Line + 5200 2850 5200 3150 +Wire Wire Line + 4000 2850 7050 2850 +Wire Wire Line + 7050 2850 7050 3200 +Connection ~ 6400 2850 +Wire Wire Line + 7700 3650 7700 3300 +$Comp +L IC U2 +U 1 1 50CE8F30 +P 4650 4050 +F 0 "U2" H 4650 4320 30 0000 C CNN +F 1 "IC" H 4650 4280 30 0000 C CNN + 1 4650 4050 + 1 0 0 -1 +$EndComp +NoConn ~ 7700 4150 +$Comp +L 74LS109 U3 +U 1 1 50C1C9BA +P 7050 3900 +F 0 "U3" H 7050 4000 60 0000 C CNN +F 1 "74LS109" H 7050 3800 60 0000 C CNN + 1 7050 3900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 50A93D02 +P 5900 4800 +F 0 "#PWR01" H 5900 4800 30 0001 C CNN +F 1 "GND" H 5900 4730 30 0001 C CNN + 1 5900 4800 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 50A93CC0 +P 5700 4300 +F 0 "#FLG02" H 5700 4570 30 0001 C CNN +F 1 "PWR_FLAG" H 5700 4530 30 0000 C CNN + 1 5700 4300 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG03 +U 1 1 50A93CB7 +P 5200 2850 +F 0 "#FLG03" H 5200 3120 30 0001 C CNN +F 1 "PWR_FLAG" H 5200 3080 30 0000 C CNN + 1 5200 2850 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 50A93C56 +P 3650 3600 +F 0 "v1" H 3450 3700 60 0000 C CNN +F 1 "5" H 3450 3550 60 0000 C CNN +F 2 "R1" H 3350 3600 60 0000 C CNN + 1 3650 3600 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50A93BFE +P 6100 3850 +F 0 "R3" V 6180 3850 50 0000 C CNN +F 1 "1000" V 6100 3850 50 0000 C CNN + 1 6100 3850 + 1 0 0 -1 +$EndComp +$Comp +L C C2 +U 1 1 50A93ACA +P 4300 4200 +F 0 "C2" H 4350 4300 50 0000 L CNN +F 1 "0.01e-6" H 4350 4100 50 0000 L CNN + 1 4300 4200 + 1 0 0 -1 +$EndComp +$Comp +L CP C1 +U 1 1 50A93893 +P 4000 4350 +F 0 "C1" H 4050 4450 50 0000 L CNN +F 1 "100e-12" H 4050 4250 50 0000 L CNN + 1 4000 4350 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50A93858 +P 4000 3750 +F 0 "R2" V 4080 3750 50 0000 C CNN +F 1 "10000" V 4000 3750 50 0000 C CNN + 1 4000 3750 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50A93852 +P 4000 3100 +F 0 "R1" V 4080 3100 50 0000 C CNN +F 1 "1000" V 4000 3100 50 0000 C CNN + 1 4000 3100 + 1 0 0 -1 +$EndComp +$Comp +L LM555N X1 +U 1 1 50A937B9 +P 5200 3550 +F 0 "X1" H 5200 3650 70 0000 C CNN +F 1 "LM555N" H 5200 3450 70 0000 C CNN + 1 5200 3550 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/frequencyDivider/frequencyDivider.cir b/FreeEDA/Examples/frequencyDivider/frequencyDivider.cir new file mode 100644 index 0000000..5989740 --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/frequencyDivider.cir @@ -0,0 +1,18 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 10:57:14 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 2 VPLOT8_1 +U2 5 IC +U3 3 3 0 6 3 2 1 0 3 74LS109 +v1 3 0 5 +R3 6 0 1000 +C2 7 0 0.01e-6 +C1 5 0 100e-12 +R2 8 5 10000 +R1 3 8 1000 +X1 0 5 6 3 7 5 8 3 LM555N + +.end diff --git a/FreeEDA/Examples/frequencyDivider/frequencyDivider.cir.ckt b/FreeEDA/Examples/frequencyDivider/frequencyDivider.cir.ckt new file mode 100644 index 0000000..293ca2e --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/frequencyDivider.cir.ckt @@ -0,0 +1,23 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:14 am ist +.include lm555n.sub + +* Plotting option vplot8_1 +.ic v(5)=0 +* 74ls109 +v1 3 0 5 +r3 6 0 1000 +c2 7 0 0.01e-6 +c1 5 0 100e-12 +r2 8 5 10000 +r1 3 8 1000 +x1 0 5 6 3 7 5 8 3 lm555n +a1 [3 0 6 3 3] [3_in 0_in 6_in 3_in 3_in] u3adc +a2 3_in ~0_in 6_in ~3_in ~3_in 2_out 1_out u3 +a3 [2_out 1_out] [2 1] u3dac +.model u3 d_jkff +.model u3adc adc_bridge(in_low=0.8 in_high=2.0) +.model u3dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) + +.tran 50e-09 5e-06 0e-00 +.plot v(6) v(2) +.end diff --git a/FreeEDA/Examples/frequencyDivider/frequencyDivider.cir.out b/FreeEDA/Examples/frequencyDivider/frequencyDivider.cir.out new file mode 100644 index 0000000..97db1fc --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/frequencyDivider.cir.out @@ -0,0 +1,28 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:14 am ist +.include lm555n.sub + +* Plotting option vplot8_1 +.ic v(5)=0 +* 74ls109 +v1 3 0 5 +r3 6 0 1000 +c2 7 0 0.01e-6 +c1 5 0 100e-12 +r2 8 5 10000 +r1 3 8 1000 +x1 0 5 6 3 7 5 8 3 lm555n +a1 [3 0 6 3 3] [3_in 0_in 6_in 3_in 3_in] u3adc +a2 3_in ~0_in 6_in ~3_in ~3_in 2_out 1_out u3 +a3 [2_out 1_out] [2 1] u3dac +.model u3 d_jkff +.model u3adc adc_bridge(in_low=0.8 in_high=2.0) +.model u3dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) + +.tran 50e-09 5e-06 0e-00 + +* Control Statements +.control +run +plot v(6) v(2) +.endc +.end diff --git a/FreeEDA/Examples/frequencyDivider/frequencyDivider.pro b/FreeEDA/Examples/frequencyDivider/frequencyDivider.pro new file mode 100644 index 0000000..7de1269 --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/frequencyDivider.pro @@ -0,0 +1,71 @@ +update=Monday 17 December 2012 08:48:56 AM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=regul +LibName6=74xx +LibName7=cmos4000 +LibName8=adc-dac +LibName9=memory +LibName10=xilinx +LibName11=special +LibName12=microcontrollers +LibName13=dsp +LibName14=microchip +LibName15=analog_switches +LibName16=motorola +LibName17=texas +LibName18=intel +LibName19=audio +LibName20=interface +LibName21=digital-audio +LibName22=philips +LibName23=display +LibName24=cypress +LibName25=siliconi +LibName26=opto +LibName27=atmel +LibName28=contrib +LibName29=valves +LibName30=analogSpice +LibName31=converterSpice +LibName32=digitalSpice +LibName33=linearSpice +LibName34=measurementSpice +LibName35=portSpice +LibName36=sourcesSpice +LibName37=convergenceAidSpice diff --git a/FreeEDA/Examples/frequencyDivider/frequencyDivider.proj b/FreeEDA/Examples/frequencyDivider/frequencyDivider.proj new file mode 100644 index 0000000..0a193f0 --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/frequencyDivider.proj @@ -0,0 +1 @@ +schematicFile IC555AstableMultivibrator.sch diff --git a/FreeEDA/Examples/frequencyDivider/frequencyDivider.sch b/FreeEDA/Examples/frequencyDivider/frequencyDivider.sch new file mode 100644 index 0000000..3f76d3a --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/frequencyDivider.sch @@ -0,0 +1,280 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 10:57:17 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:convergenceAidSpice +LIBS:frequencyDivider-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L VPLOT8_1 U1 +U 2 1 50CE9193 +P 7700 3000 +F 0 "U1" H 7550 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 7850 3100 50 0000 C CNN + 2 7700 3000 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50CE918C +P 6300 3000 +F 0 "U1" H 6150 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 6450 3100 50 0000 C CNN + 1 6300 3000 + 1 0 0 -1 +$EndComp +Connection ~ 4650 4100 +Wire Wire Line + 4650 4100 4650 4050 +Connection ~ 6600 2850 +Wire Wire Line + 7050 4600 6600 4600 +Wire Wire Line + 6600 4600 6600 2850 +Connection ~ 6300 3350 +Wire Wire Line + 6300 3300 6300 3900 +Connection ~ 6100 3350 +Wire Wire Line + 6300 3900 6400 3900 +Wire Wire Line + 6300 3350 5900 3350 +Wire Wire Line + 6400 2850 6400 3650 +Wire Wire Line + 6100 4550 6100 4100 +Wire Wire Line + 3650 4700 4850 4700 +Wire Wire Line + 3650 4700 3650 4050 +Wire Wire Line + 3650 2700 4450 2700 +Wire Wire Line + 3650 2700 3650 3150 +Wire Wire Line + 5900 3550 6000 3550 +Wire Wire Line + 6000 3550 6000 3000 +Wire Wire Line + 6000 3000 4150 3000 +Wire Wire Line + 4150 3000 4150 3400 +Connection ~ 4000 3400 +Wire Wire Line + 4150 3400 4000 3400 +Wire Wire Line + 4000 4150 4000 4000 +Connection ~ 4200 4100 +Wire Wire Line + 4500 3350 4200 3350 +Wire Wire Line + 4200 3350 4200 4100 +Wire Wire Line + 4300 4400 5200 4400 +Connection ~ 5700 4550 +Wire Wire Line + 5700 4550 5700 4300 +Connection ~ 4850 4550 +Wire Wire Line + 4850 4700 4850 4550 +Connection ~ 5200 4550 +Connection ~ 5200 4400 +Wire Wire Line + 5200 4550 5200 3950 +Wire Wire Line + 5900 3750 5900 4100 +Wire Wire Line + 4450 2700 4450 2850 +Connection ~ 4450 2850 +Connection ~ 5200 2850 +Wire Wire Line + 5900 4550 5900 4800 +Connection ~ 5900 4550 +Connection ~ 4450 2700 +Wire Wire Line + 4500 3850 4400 3850 +Wire Wire Line + 4400 3850 4400 2850 +Connection ~ 4400 2850 +Wire Wire Line + 4300 4000 4300 3600 +Wire Wire Line + 4300 3600 4500 3600 +Wire Wire Line + 4000 3350 4000 3500 +Wire Wire Line + 5900 4100 4000 4100 +Connection ~ 4000 4100 +Wire Wire Line + 6100 3350 6100 3600 +Wire Wire Line + 4000 4550 6400 4550 +Wire Wire Line + 6400 4550 6400 4150 +Connection ~ 6100 4550 +Wire Wire Line + 5200 2850 5200 3150 +Wire Wire Line + 4000 2850 7050 2850 +Wire Wire Line + 7050 2850 7050 3200 +Connection ~ 6400 2850 +Wire Wire Line + 7700 3650 7700 3300 +$Comp +L IC U2 +U 1 1 50CE8F30 +P 4650 4050 +F 0 "U2" H 4650 4320 30 0000 C CNN +F 1 "IC" H 4650 4280 30 0000 C CNN + 1 4650 4050 + 1 0 0 -1 +$EndComp +NoConn ~ 7700 4150 +$Comp +L 74LS109 U3 +U 1 1 50C1C9BA +P 7050 3900 +F 0 "U3" H 7050 4000 60 0000 C CNN +F 1 "74LS109" H 7050 3800 60 0000 C CNN + 1 7050 3900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 50A93D02 +P 5900 4800 +F 0 "#PWR01" H 5900 4800 30 0001 C CNN +F 1 "GND" H 5900 4730 30 0001 C CNN + 1 5900 4800 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 50A93CC0 +P 5700 4300 +F 0 "#FLG02" H 5700 4570 30 0001 C CNN +F 1 "PWR_FLAG" H 5700 4530 30 0000 C CNN + 1 5700 4300 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG03 +U 1 1 50A93CB7 +P 5200 2850 +F 0 "#FLG03" H 5200 3120 30 0001 C CNN +F 1 "PWR_FLAG" H 5200 3080 30 0000 C CNN + 1 5200 2850 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 50A93C56 +P 3650 3600 +F 0 "v1" H 3450 3700 60 0000 C CNN +F 1 "5" H 3450 3550 60 0000 C CNN +F 2 "R1" H 3350 3600 60 0000 C CNN + 1 3650 3600 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50A93BFE +P 6100 3850 +F 0 "R3" V 6180 3850 50 0000 C CNN +F 1 "1000" V 6100 3850 50 0000 C CNN + 1 6100 3850 + 1 0 0 -1 +$EndComp +$Comp +L C C2 +U 1 1 50A93ACA +P 4300 4200 +F 0 "C2" H 4350 4300 50 0000 L CNN +F 1 "0.01e-6" H 4350 4100 50 0000 L CNN + 1 4300 4200 + 1 0 0 -1 +$EndComp +$Comp +L CP C1 +U 1 1 50A93893 +P 4000 4350 +F 0 "C1" H 4050 4450 50 0000 L CNN +F 1 "100e-12" H 4050 4250 50 0000 L CNN + 1 4000 4350 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50A93858 +P 4000 3750 +F 0 "R2" V 4080 3750 50 0000 C CNN +F 1 "10000" V 4000 3750 50 0000 C CNN + 1 4000 3750 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50A93852 +P 4000 3100 +F 0 "R1" V 4080 3100 50 0000 C CNN +F 1 "1000" V 4000 3100 50 0000 C CNN + 1 4000 3100 + 1 0 0 -1 +$EndComp +$Comp +L LM555N X1 +U 1 1 50A937B9 +P 5200 3550 +F 0 "X1" H 5200 3650 70 0000 C CNN +F 1 "LM555N" H 5200 3450 70 0000 C CNN + 1 5200 3550 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/frequencyDivider/lm555n-cache.bak b/FreeEDA/Examples/frequencyDivider/lm555n-cache.bak new file mode 100644 index 0000000..2cfdb3a --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/lm555n-cache.bak @@ -0,0 +1,207 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 10:48:46 AM IST +#encoding utf-8 +# +# ADC8 +# +DEF ADC8 U 0 10 Y Y 8 L N +F0 "U" -100 100 40 H V C CNN +F1 "ADC8" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in1 1 -300 0 150 R 25 25 1 1 I +X out1 9 300 0 150 L 25 25 1 1 O +X in2 2 -300 0 150 R 25 25 2 1 I +X out2 10 300 0 150 L 25 25 2 1 O +X in3 3 -300 0 150 R 25 25 3 1 I +X out3 11 300 0 150 L 25 25 3 1 O +X in4 4 -300 0 150 R 25 25 4 1 I +X out4 12 300 0 150 L 25 25 4 1 O +X in5 5 -300 0 150 R 25 25 5 1 I +X out5 13 300 0 150 L 25 25 5 1 O +X in6 6 -300 0 150 R 25 25 6 1 I +X out6 14 300 0 150 L 25 25 6 1 O +X in7 7 -300 0 150 R 25 25 7 1 I +X out7 15 300 0 150 L 25 25 7 1 O +X in8 8 -300 0 150 R 25 25 8 1 I +X out8 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# d_inverter +# +DEF d_inverter U 0 40 Y Y 1 F N +F0 "U" -150 100 40 H V C CNN +F1 "d_inverter" 100 100 40 H V C CNN +DRAW +P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N +X in 1 -250 0 150 R 25 25 1 1 I +X out 2 250 0 150 L 25 25 1 1 O I +ENDDRAW +ENDDEF +# +# D_SRLatch +# +DEF D_SRLatch U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_SRLatch" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X S 1 -600 150 300 R 50 50 1 1 I +X R 2 -600 -150 300 R 50 50 1 1 I +X Enable 3 -600 0 300 R 50 50 1 1 I +X Set 4 150 -500 300 U 50 50 1 1 I +X Reset 5 -150 -500 300 U 50 50 1 1 I +X Q 6 600 150 300 L 50 50 1 1 O +X ~Q 7 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# DAC8 +# +DEF DAC8 U 0 10 Y Y 8 L N +F0 "U" -100 100 40 H V C CNN +F1 "DAC8" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in1 1 -300 0 150 R 25 25 1 1 I +X out1 9 300 0 150 L 25 25 1 1 O +X in2 2 -300 0 150 R 25 25 2 1 I +X out2 10 300 0 150 L 25 25 2 1 O +X in3 3 -300 0 150 R 25 25 3 1 I +X out3 11 300 0 150 L 25 25 3 1 O +X in4 4 -300 0 150 R 25 25 4 1 I +X out4 12 300 0 150 L 25 25 4 1 O +X in5 5 -300 0 150 R 25 25 5 1 I +X out5 13 300 0 150 L 25 25 5 1 O +X in6 6 -300 0 150 R 25 25 6 1 I +X out6 14 300 0 150 L 25 25 6 1 O +X in7 7 -300 0 150 R 25 25 7 1 I +X out7 15 300 0 150 L 25 25 7 1 O +X in8 8 -300 0 150 R 25 25 8 1 I +X out8 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# LIMIT8 +# +DEF LIMIT8 U 0 40 Y Y 8 F N +F0 "U" 0 100 30 H V C CNN +F1 "LIMIT8" 0 0 30 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in 1 -300 0 150 R 25 25 1 1 I +X out 9 300 0 150 L 25 25 1 1 O +X in 2 -300 0 150 R 25 25 2 1 I +X out 10 300 0 150 L 25 25 2 1 O +X in 3 -300 0 150 R 25 25 3 1 I +X out 11 300 0 150 L 25 25 3 1 O +X in 4 -300 0 150 R 25 25 4 1 I +X out 12 300 0 150 L 25 25 4 1 O +X in 5 -300 0 150 R 25 25 5 1 I +X out 13 300 0 150 L 25 25 5 1 O +X in 6 -300 0 150 R 25 25 6 1 I +X out 14 300 0 150 L 25 25 6 1 O +X in 7 -300 0 150 R 25 25 7 1 I +X out 15 300 0 150 L 25 25 7 1 O +X in 8 -300 0 150 R 25 25 8 1 I +X out 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/frequencyDivider/lm555n-cache.lib b/FreeEDA/Examples/frequencyDivider/lm555n-cache.lib new file mode 100644 index 0000000..1f8bfd1 --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/lm555n-cache.lib @@ -0,0 +1,207 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 10:57:52 AM IST +#encoding utf-8 +# +# ADC8 +# +DEF ADC8 U 0 10 Y Y 8 L N +F0 "U" -100 100 40 H V C CNN +F1 "ADC8" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in1 1 -300 0 150 R 25 25 1 1 I +X out1 9 300 0 150 L 25 25 1 1 O +X in2 2 -300 0 150 R 25 25 2 1 I +X out2 10 300 0 150 L 25 25 2 1 O +X in3 3 -300 0 150 R 25 25 3 1 I +X out3 11 300 0 150 L 25 25 3 1 O +X in4 4 -300 0 150 R 25 25 4 1 I +X out4 12 300 0 150 L 25 25 4 1 O +X in5 5 -300 0 150 R 25 25 5 1 I +X out5 13 300 0 150 L 25 25 5 1 O +X in6 6 -300 0 150 R 25 25 6 1 I +X out6 14 300 0 150 L 25 25 6 1 O +X in7 7 -300 0 150 R 25 25 7 1 I +X out7 15 300 0 150 L 25 25 7 1 O +X in8 8 -300 0 150 R 25 25 8 1 I +X out8 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# d_inverter +# +DEF d_inverter U 0 40 Y Y 1 F N +F0 "U" -150 100 40 H V C CNN +F1 "d_inverter" 100 100 40 H V C CNN +DRAW +P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N +X in 1 -250 0 150 R 25 25 1 1 I +X out 2 250 0 150 L 25 25 1 1 O I +ENDDRAW +ENDDEF +# +# D_SRLatch +# +DEF D_SRLatch U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_SRLatch" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X S 1 -600 150 300 R 50 50 1 1 I +X R 2 -600 -150 300 R 50 50 1 1 I +X Enable 3 -600 0 300 R 50 50 1 1 I +X Set 4 150 -500 300 U 50 50 1 1 I +X Reset 5 -150 -500 300 U 50 50 1 1 I +X Q 6 600 150 300 L 50 50 1 1 O +X ~Q 7 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# DAC8 +# +DEF DAC8 U 0 10 Y Y 8 L N +F0 "U" -100 100 40 H V C CNN +F1 "DAC8" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in1 1 -300 0 150 R 25 25 1 1 I +X out1 9 300 0 150 L 25 25 1 1 O +X in2 2 -300 0 150 R 25 25 2 1 I +X out2 10 300 0 150 L 25 25 2 1 O +X in3 3 -300 0 150 R 25 25 3 1 I +X out3 11 300 0 150 L 25 25 3 1 O +X in4 4 -300 0 150 R 25 25 4 1 I +X out4 12 300 0 150 L 25 25 4 1 O +X in5 5 -300 0 150 R 25 25 5 1 I +X out5 13 300 0 150 L 25 25 5 1 O +X in6 6 -300 0 150 R 25 25 6 1 I +X out6 14 300 0 150 L 25 25 6 1 O +X in7 7 -300 0 150 R 25 25 7 1 I +X out7 15 300 0 150 L 25 25 7 1 O +X in8 8 -300 0 150 R 25 25 8 1 I +X out8 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# LIMIT8 +# +DEF LIMIT8 U 0 40 Y Y 8 F N +F0 "U" 0 100 30 H V C CNN +F1 "LIMIT8" 0 0 30 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in 1 -300 0 150 R 25 25 1 1 I +X out 9 300 0 150 L 25 25 1 1 O +X in 2 -300 0 150 R 25 25 2 1 I +X out 10 300 0 150 L 25 25 2 1 O +X in 3 -300 0 150 R 25 25 3 1 I +X out 11 300 0 150 L 25 25 3 1 O +X in 4 -300 0 150 R 25 25 4 1 I +X out 12 300 0 150 L 25 25 4 1 O +X in 5 -300 0 150 R 25 25 5 1 I +X out 13 300 0 150 L 25 25 5 1 O +X in 6 -300 0 150 R 25 25 6 1 I +X out 14 300 0 150 L 25 25 6 1 O +X in 7 -300 0 150 R 25 25 7 1 I +X out 15 300 0 150 L 25 25 7 1 O +X in 8 -300 0 150 R 25 25 8 1 I +X out 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/frequencyDivider/lm555n.bak b/FreeEDA/Examples/frequencyDivider/lm555n.bak new file mode 100644 index 0000000..92d1f7a --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/lm555n.bak @@ -0,0 +1,435 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 10:48:46 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:digitalXSpice +LIBS:lm555n-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L D_INVERTER U5 +U 1 1 50CEA9C5 +P 6700 4050 +F 0 "U5" H 6550 4150 40 0000 C CNN +F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN + 1 6700 4050 + 1 0 0 -1 +$EndComp +$Comp +L D_SRLATCH U6 +U 1 1 50CEA9AE +P 7100 3400 +F 0 "U6" H 6900 3650 60 0000 C CNN +F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN + 1 7100 3400 + 1 0 0 -1 +$EndComp +Text Notes 5750 3050 0 60 ~ 0 +IC 555 +Wire Wire Line + 4700 3000 4900 3000 +Wire Wire Line + 4700 4750 4700 4650 +Connection ~ 4400 3550 +Connection ~ 4400 4900 +Wire Wire Line + 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"PWR_FLAG" H 5750 4630 30 0000 C CNN + 1 5750 4400 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 5 1 50AA2210 +P 4050 3550 +F 0 "U1" H 4050 3500 30 0000 C CNN +F 1 "PORT" H 4050 3550 30 0000 C CNN + 5 4050 3550 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 1 1 50AA21C7 +P 4050 4900 +F 0 "U1" H 4050 4850 30 0000 C CNN +F 1 "PORT" H 4050 4900 30 0000 C CNN + 1 4050 4900 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 50AA21BC +P 4700 5000 +F 0 "U1" H 4700 4950 30 0000 C CNN +F 1 "PORT" H 4700 5000 30 0000 C CNN + 2 4700 5000 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 4 1 50AA21A9 +P 6350 5000 +F 0 "U1" H 6350 4950 30 0000 C CNN +F 1 "PORT" H 6350 5000 30 0000 C CNN + 4 6350 5000 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 7 1 50AA21A0 +P 8050 4350 +F 0 "U1" H 8050 4300 30 0000 C CNN +F 1 "PORT" H 8050 4350 30 0000 C CNN + 7 8050 4350 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 3 1 50AA2181 +P 8150 3850 +F 0 "U1" H 8150 3800 30 0000 C CNN +F 1 "PORT" H 8150 3850 30 0000 C CNN + 3 8150 3850 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 6 1 50AA2171 +P 5150 3000 +F 0 "U1" H 5150 2950 30 0000 C CNN +F 1 "PORT" H 5150 3000 30 0000 C CNN + 6 5150 3000 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 8 1 50AA2162 +P 4050 3000 +F 0 "U1" H 4050 2950 30 0000 C CNN +F 1 "PORT" H 4050 3000 30 0000 C CNN + 8 4050 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R8 +U 1 1 50AA20DA +P 7350 4250 +F 0 "R8" V 7430 4250 50 0000 C CNN +F 1 "1500" V 7350 4250 50 0000 C CNN + 1 7350 4250 + 0 1 1 0 +$EndComp +$Comp +L NPN Q1 +U 1 1 50AA2050 +P 7600 4600 +F 0 "Q1" H 7600 4450 50 0000 R CNN +F 1 "QNOM" H 7600 4750 50 0000 R CNN + 1 7600 4600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50AA140C +P 5550 4500 +F 0 "#PWR02" H 5550 4500 30 0001 C CNN +F 1 "GND" H 5550 4430 30 0001 C CNN + 1 5550 4500 + 1 0 0 -1 +$EndComp +Text Label 4850 4000 0 60 ~ 0 +c +Text Label 4700 4650 0 60 ~ 0 +d +Text Label 4700 4150 0 60 ~ 0 +c +$Comp +L R R7 +U 1 1 50AA12F7 +P 5650 3250 +F 0 "R7" V 5730 3250 50 0000 C CNN +F 1 "25" V 5650 3250 50 0000 C CNN + 1 5650 3250 + 0 -1 -1 0 +$EndComp +$Comp +L R R6 +U 1 1 50AA12B0 +P 5450 3550 +F 0 "R6" V 5530 3550 50 0000 C CNN +F 1 "25" V 5450 3550 50 0000 C CNN + 1 5450 3550 + 0 -1 -1 0 +$EndComp +Text Label 5300 4000 0 60 ~ 0 +b +Text Label 5300 4100 0 60 ~ 0 +a +Text Label 4700 3000 0 60 ~ 0 +b +Text Label 4700 3500 0 60 ~ 0 +a +$Comp +L VCVS E1 +U 1 1 50AA11B6 +P 5500 4050 +F 0 "E1" H 5300 4150 50 0000 C CNN +F 1 "10000" H 5300 4000 50 0000 C CNN + 1 5500 4050 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 50A9E00B +P 4700 3250 +F 0 "R4" V 4780 3250 50 0000 C CNN +F 1 "2E6" V 4700 3250 50 0000 C CNN + 1 4700 3250 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 50A9E001 +P 4700 4400 +F 0 "R5" V 4780 4400 50 0000 C CNN +F 1 "2E6" V 4700 4400 50 0000 C CNN + 1 4700 4400 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50A9DF09 +P 4400 4450 +F 0 "R3" V 4480 4450 50 0000 C CNN +F 1 "5000" V 4400 4450 50 0000 C CNN + 1 4400 4450 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50A9DF03 +P 4400 3850 +F 0 "R2" V 4480 3850 50 0000 C CNN +F 1 "5000" V 4400 3850 50 0000 C CNN + 1 4400 3850 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50A9DEFE +P 4400 3250 +F 0 "R1" V 4480 3250 50 0000 C CNN +F 1 "5000" V 4400 3250 50 0000 C CNN + 1 4400 3250 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/frequencyDivider/lm555n.cir b/FreeEDA/Examples/frequencyDivider/lm555n.cir new file mode 100644 index 0000000..9483a64 --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/lm555n.cir @@ -0,0 +1,25 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 10:57:49 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U5 5 21 D_INVERTER +U6 1 4 5 21 21 8 10 D_SRLATCH +E2 18 0 23 14 10000 +U4 19 20 11 12 LIMIT8 +U3 8 10 7 9 DAC8 +U2 11 12 6 4 1 5 ADC8 +U1 22 14 7 6 15 16 3 13 PORT +R8 9 2 1500 +Q1 22 2 3 QNOM +R7 18 20 25 +R6 17 19 25 +E1 17 0 16 15 10000 +R4 16 15 2E6 +R5 23 14 2E6 +R3 23 22 5000 +R2 15 23 5000 +R1 13 15 5000 + +.end diff --git a/FreeEDA/Examples/frequencyDivider/lm555n.cir.ckt b/FreeEDA/Examples/frequencyDivider/lm555n.cir.ckt new file mode 100644 index 0000000..90f04a3 --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/lm555n.cir.ckt @@ -0,0 +1,35 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist + +* Inverter d_inverter +* SR Latch d_srlatch +e2 18 0 23 14 10000 +* Limiter limit8 +* Digital to Analog converter dac8 +* Analog to Digital converter adc8 +u1 22 14 7 6 15 16 3 13 port +r8 9 2 1500 +q1 3 2 22 qnom +r7 18 20 25 +r6 17 19 25 +e1 17 0 16 15 10000 +r4 16 15 2e6 +r5 23 14 2e6 +r3 23 22 5000 +r2 15 23 5000 +r1 13 15 5000 +a1 5 21 u5 +.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) +a2 1 4 5 21 21 8 10 u6 +.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 ++sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 ++sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) +a3 19 11 u4 +a4 20 12 u4 +.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) +a5 [8] [7] u3 +a6 [10] [9] u3 +.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) +a7 [11] [4] u2 +a8 [12] [1] u2 +a9 [6] [5] u2 +.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/FreeEDA/Examples/frequencyDivider/lm555n.cir.out b/FreeEDA/Examples/frequencyDivider/lm555n.cir.out new file mode 100644 index 0000000..90f04a3 --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/lm555n.cir.out @@ -0,0 +1,35 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist + +* Inverter d_inverter +* SR Latch d_srlatch +e2 18 0 23 14 10000 +* Limiter limit8 +* Digital to Analog converter dac8 +* Analog to Digital converter adc8 +u1 22 14 7 6 15 16 3 13 port +r8 9 2 1500 +q1 3 2 22 qnom +r7 18 20 25 +r6 17 19 25 +e1 17 0 16 15 10000 +r4 16 15 2e6 +r5 23 14 2e6 +r3 23 22 5000 +r2 15 23 5000 +r1 13 15 5000 +a1 5 21 u5 +.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) +a2 1 4 5 21 21 8 10 u6 +.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 ++sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 ++sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) +a3 19 11 u4 +a4 20 12 u4 +.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) +a5 [8] [7] u3 +a6 [10] [9] u3 +.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) +a7 [11] [4] u2 +a8 [12] [1] u2 +a9 [6] [5] u2 +.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/FreeEDA/Examples/frequencyDivider/lm555n.pro b/FreeEDA/Examples/frequencyDivider/lm555n.pro new file mode 100644 index 0000000..c8e151f --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/lm555n.pro @@ -0,0 +1,73 @@ +update=Monday 19 November 2012 04:56:38 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=analogXSpice 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CNN +F 1 "5000" V 4400 3250 50 0000 C CNN + 1 4400 3250 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/frequencyDivider/lm555n.sub b/FreeEDA/Examples/frequencyDivider/lm555n.sub new file mode 100644 index 0000000..254c530 --- /dev/null +++ b/FreeEDA/Examples/frequencyDivider/lm555n.sub @@ -0,0 +1,37 @@ +* Subcircuit lm555n +.subckt lm555n 22 14 7 6 15 16 3 13 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist +* Inverter d_inverter +* SR Latch d_srlatch +e2 18 0 23 14 10000 +* Limiter limit8 +* Digital to Analog converter dac8 +* Analog to Digital converter adc8 +r8 9 2 1500 +q1 3 2 22 qnom +r7 18 20 25 +r6 17 19 25 +e1 17 0 16 15 10000 +r4 16 15 2e6 +r5 23 14 2e6 +r3 23 22 5000 +r2 15 23 5000 +r1 13 15 5000 +a1 5 21 u5 +.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) +a2 1 4 5 21 21 8 10 u6 +.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 ++sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 ++sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) +a3 19 11 u4 +a4 20 12 u4 +.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) +a5 [8] [7] u3 +a6 [10] [9] u3 +.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) +a7 [11] [4] u2 +a8 [12] [1] u2 +a9 [6] [5] u2 +.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) + +.ends lm555n \ No newline at end of file diff --git a/FreeEDA/Examples/linear1/analysis b/FreeEDA/Examples/linear1/analysis new file mode 100644 index 0000000..162ad08 --- /dev/null +++ b/FreeEDA/Examples/linear1/analysis @@ -0,0 +1 @@ +.op \ No newline at end of file diff --git a/FreeEDA/Examples/linear1/linear1-cache.bak b/FreeEDA/Examples/linear1/linear1-cache.bak new file mode 100644 index 0000000..b2b47b7 --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1-cache.bak @@ -0,0 +1,106 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:21:41 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCCS +# +DEF VCCS G 0 40 Y Y 1 F N +F0 "G" -200 100 50 H V C CNN +F1 "VCCS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# vprint1 +# +DEF vprint1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/linear1/linear1-cache.lib b/FreeEDA/Examples/linear1/linear1-cache.lib new file mode 100644 index 0000000..55c3d03 --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1-cache.lib @@ -0,0 +1,106 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:24:11 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCCS +# +DEF VCCS G 0 40 Y Y 1 F N +F0 "G" -200 100 50 H V C CNN +F1 "VCCS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# vprint1 +# +DEF vprint1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/linear1/linear1.bak b/FreeEDA/Examples/linear1/linear1.bak new file mode 100644 index 0000000..2be3d0e --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1.bak @@ -0,0 +1,233 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:21:41 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:linear1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 6100 2500 5650 2500 +Wire Wire Line + 5650 2500 5650 2900 +Connection ~ 5650 2900 +Wire Wire Line + 5350 2900 5750 2900 +Connection ~ 6850 3800 +Wire Wire Line + 6850 3800 6850 3600 +Connection ~ 7300 2900 +Wire Wire Line + 7300 3000 7300 2500 +Connection ~ 6400 3800 +Wire Wire Line + 6400 3500 6400 3800 +Connection ~ 5500 3800 +Wire Wire Line + 7300 3500 7300 3800 +Wire Wire Line + 7300 3800 3750 3800 +Connection ~ 4600 2900 +Wire Wire Line + 4600 3000 4600 2900 +Connection ~ 6400 2900 +Wire Wire Line + 6550 2900 6250 2900 +Wire Wire Line + 4750 2900 4450 2900 +Wire Wire Line + 3750 2900 3950 2900 +Wire Wire Line + 6400 2900 6400 3000 +Wire Wire Line + 7300 2900 7050 2900 +Wire Wire Line + 4600 3500 4600 3800 +Connection ~ 4600 3800 +Wire Wire Line + 5800 3800 5800 4000 +Connection ~ 5800 3800 +Wire Wire Line + 7300 2500 6700 2500 +Wire Wire Line + 7300 2750 7700 2750 +Connection ~ 7300 2750 +$Comp +L VPRINT1 U1 +U 1 1 506964BE +P 7700 2450 +F 0 "U1" H 7550 2550 50 0001 C CNN +F 1 "VPRINT1" H 7850 2550 50 0000 C CNN + 1 7700 2450 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 50695F5E +P 6850 3600 +F 0 "#FLG01" H 6850 3870 30 0001 C CNN +F 1 "PWR_FLAG" H 6850 3830 30 0000 C CNN + 1 6850 3600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50695EE6 +P 5800 4000 +F 0 "#PWR02" H 5800 4000 30 0001 C CNN +F 1 "GND" H 5800 3930 30 0001 C CNN + 1 5800 4000 + 1 0 0 -1 +$EndComp +Text Label 6100 3800 0 60 ~ 0 +c +Text Label 6350 2750 0 60 ~ 0 +c +Text Label 6450 2750 0 60 ~ 0 +b +Text Label 6550 2900 0 60 ~ 0 +b +Text Label 5100 3150 0 60 ~ 0 +b +Text Label 5000 3150 0 60 ~ 0 +a +Text Label 7150 2900 0 60 ~ 0 +a +$Comp +L VCVS E1 +U 1 1 50695730 +P 5050 2950 +F 0 "E1" H 4850 3050 50 0000 C CNN +F 1 "0.5" H 4850 2900 50 0000 C CNN + 1 5050 2950 + 1 0 0 -1 +$EndComp +$Comp +L DC I1 +U 1 1 506956A6 +P 5500 3350 +F 0 "I1" H 5300 3450 60 0000 C CNN +F 1 "1" H 5300 3300 60 0000 C CNN +F 2 "R1" H 5200 3350 60 0000 C CNN + 1 5500 3350 + -1 0 0 1 +$EndComp +$Comp +L DC V1 +U 1 1 50695694 +P 3750 3350 +F 0 "V1" H 3550 3450 60 0000 C CNN +F 1 "1" H 3550 3300 60 0000 C CNN +F 2 "R1" H 3450 3350 60 0000 C CNN + 1 3750 3350 + 1 0 0 -1 +$EndComp +$Comp +L VCCS G1 +U 1 1 5069566A +P 6400 2550 +F 0 "G1" H 6200 2650 50 0000 C CNN +F 1 "0.5" H 6200 2500 50 0000 C CNN + 1 6400 2550 + 1 0 0 -1 +$EndComp +$Comp +L R R6 +U 1 1 506955DC +P 7300 3250 +F 0 "R6" V 7380 3250 50 0000 C CNN +F 1 "1" V 7300 3250 50 0000 C CNN + 1 7300 3250 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 506955D8 +P 6400 3250 +F 0 "R3" V 6480 3250 50 0000 C CNN +F 1 "1" V 6400 3250 50 0000 C CNN + 1 6400 3250 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 506955D1 +P 6800 2900 +F 0 "R5" V 6880 2900 50 0000 C CNN +F 1 "0.5" V 6800 2900 50 0000 C CNN + 1 6800 2900 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 506955CC +P 6000 2900 +F 0 "R4" V 6080 2900 50 0000 C CNN +F 1 "1" V 6000 2900 50 0000 C CNN + 1 6000 2900 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 506955C7 +P 4600 3250 +F 0 "R2" V 4680 3250 50 0000 C CNN +F 1 "1" V 4600 3250 50 0000 C CNN + 1 4600 3250 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 506955C2 +P 4200 2900 +F 0 "R1" V 4280 2900 50 0000 C CNN +F 1 "1" V 4200 2900 50 0000 C CNN + 1 4200 2900 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/linear1/linear1.brd b/FreeEDA/Examples/linear1/linear1.brd new file mode 100644 index 0000000..a04a203 --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1.brd @@ -0,0 +1,84 @@ +PCBNEW-BOARD Version 1 date Thursday 04 October 2012 03:56:07 PM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 0 +NoConn 0 +Di 0 0 117000 82670 +Ndraw 0 +Ntrack 0 +Nzone 0 +BoardThickness 630 +Nmodule 0 +Nnets 1 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "4 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +$EndNCLASS +$TRACK +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/linear1/linear1.cir b/FreeEDA/Examples/linear1/linear1.cir new file mode 100644 index 0000000..349f95a --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1.cir @@ -0,0 +1,19 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:24:34 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 1 VPRINT1 +E1 4 6 1 2 0.5 +I1 0 6 1 +V1 3 0 1 +G1 6 1 0 2 0.5 +R6 1 0 1 +R3 2 0 1 +R5 1 2 0.5 +R4 2 6 1 +R2 4 0 1 +R1 4 3 1 + +.end diff --git a/FreeEDA/Examples/linear1/linear1.cir.ckt b/FreeEDA/Examples/linear1/linear1.cir.ckt new file mode 100644 index 0000000..6738a45 --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1.cir.ckt @@ -0,0 +1,17 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:24:34 am ist + +* Printing option vprint1 +e1 4 6 1 2 0.5 +i1 0 6 1 +v1 3 0 1 +g1 6 1 0 2 0.5 +r6 1 0 1 +r3 2 0 1 +r5 1 2 0.5 +r4 2 6 1 +r2 4 0 1 +r1 4 3 1 + +.op +.print v(1) +.end diff --git a/FreeEDA/Examples/linear1/linear1.cir.ckt.sol b/FreeEDA/Examples/linear1/linear1.cir.ckt.sol new file mode 100644 index 0000000..5727235 --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1.cir.ckt.sol @@ -0,0 +1,14 @@ +Name Source Sink Voltage Current +---------------------------------------------------------- +E 4 6 0.0000000000 0.0000000000 +I 1 2 0.0000000000 0.0000000000 +I 0 6 -0.0000000000 0.0000000000 +V 3 0 0.0000000000 0.0000000000 +G 6 1 0.0000000000 -0.0000000000 +I 0 2 -0.0000000000 0.0000000000 +R 1 0 0.0000000000 0.0000000000 +R 2 0 0.0000000000 0.0000000000 +R 1 2 0.0000000000 0.0000000000 +R 2 6 0.0000000000 0.0000000000 +R 4 0 0.0000000000 0.0000000000 +R 4 3 0.0000000000 0.0000000000 diff --git a/FreeEDA/Examples/linear1/linear1.cir.out b/FreeEDA/Examples/linear1/linear1.cir.out new file mode 100644 index 0000000..b996360 --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1.cir.out @@ -0,0 +1,22 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:24:34 am ist + +* Printing option vprint1 +e1 4 6 1 2 0.5 +i1 0 6 1 +v1 3 0 1 +g1 6 1 0 2 0.5 +r6 1 0 1 +r3 2 0 1 +r5 1 2 0.5 +r4 2 6 1 +r2 4 0 1 +r1 4 3 1 + +.op + +* Control Statements +.control +run +print v(1) +.endc +.end diff --git a/FreeEDA/Examples/linear1/linear1.cmp b/FreeEDA/Examples/linear1/linear1.cmp new file mode 100644 index 0000000..84671d7 --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1.cmp @@ -0,0 +1,73 @@ +Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Monday 22 October 2012 04:10:55 PM IST + +BeginCmp +TimeStamp = /50695730; +Reference = E1; +ValeurCmp = 0.5; +IdModule = bornier4; +EndCmp + +BeginCmp +TimeStamp = /5069566A; +Reference = G1; +ValeurCmp = 0.5; +IdModule = bornier4; +EndCmp + +BeginCmp +TimeStamp = /506956A6; +Reference = I1; +ValeurCmp = DC; +IdModule = R1; +EndCmp + +BeginCmp +TimeStamp = /506955C2; +Reference = R1; +ValeurCmp = 1; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /506955C7; +Reference = R2; +ValeurCmp = 1; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /506955D8; +Reference = R3; +ValeurCmp = 1; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /506955CC; +Reference = R4; +ValeurCmp = 1; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /506955D1; +Reference = R5; +ValeurCmp = 0.5; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /506955DC; +Reference = R6; +ValeurCmp = 1; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /50695694; +Reference = V1; +ValeurCmp = DC; +IdModule = R1; +EndCmp + +EndListe diff --git a/FreeEDA/Examples/linear1/linear1.net b/FreeEDA/Examples/linear1/linear1.net new file mode 100644 index 0000000..c615a65 --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1.net @@ -0,0 +1,99 @@ +# EESchema Netlist Version 1.1 created Monday 22 October 2012 04:10:55 PM IST +( + ( /50695730 bornier4 E1 0.5 + ( 1 N-000005 ) + ( 2 N-000006 ) + ( 3 /a ) + ( 4 /b ) + ) + ( /5069566A bornier4 G1 0.5 + ( 1 N-000006 ) + ( 2 /a ) + ( 3 GND ) + ( 4 /b ) + ) + ( /506956A6 R1 I1 DC + ( 1 GND ) + ( 2 N-000006 ) + ) + ( /506955C2 R3 R1 1 + ( 1 N-000005 ) + ( 2 N-000004 ) + ) + ( /506955C7 R3 R2 1 + ( 1 N-000005 ) + ( 2 GND ) + ) + ( /506955D8 R3 R3 1 + ( 1 /b ) + ( 2 GND ) + ) + ( /506955CC R3 R4 1 + ( 1 /b ) + ( 2 N-000006 ) + ) + ( /506955D1 R3 R5 0.5 + ( 1 /a ) + ( 2 /b ) + ) + ( /506955DC R3 R6 1 + ( 1 /a ) + ( 2 GND ) + ) + ( /50695694 R1 V1 DC + ( 1 N-000004 ) + ( 2 GND ) + ) +) +* +{ Allowed footprints by component: +$component E1 + 1_pin +$endlist +$component G1 + 1_pin +$endlist +$component I1 + 1_pin +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R2 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R3 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R4 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R5 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R6 + R? + SM0603 + SM0805 + R?-* +$endlist +$component V1 + 1_pin +$endlist +$endfootprintlist +} diff --git a/FreeEDA/Examples/linear1/linear1.pro b/FreeEDA/Examples/linear1/linear1.pro new file mode 100644 index 0000000..7e6c961 --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1.pro @@ -0,0 +1,71 @@ +update=Monday 22 October 2012 04:08:41 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice diff --git a/FreeEDA/Examples/linear1/linear1.proj b/FreeEDA/Examples/linear1/linear1.proj new file mode 100644 index 0000000..e532113 --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1.proj @@ -0,0 +1 @@ +schematicFile linear1.sch diff --git a/FreeEDA/Examples/linear1/linear1.sch b/FreeEDA/Examples/linear1/linear1.sch new file mode 100644 index 0000000..452dbd0 --- /dev/null +++ b/FreeEDA/Examples/linear1/linear1.sch @@ -0,0 +1,234 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:24:11 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:linear1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5500 2900 +Wire Wire Line + 5350 2900 5750 2900 +Connection ~ 7300 2750 +Wire Wire Line + 7300 2750 7700 2750 +Wire Wire Line + 6700 2500 7300 2500 +Connection ~ 5800 3800 +Wire Wire Line + 5800 3800 5800 4000 +Connection ~ 4600 3800 +Wire Wire Line + 4600 3500 4600 3800 +Wire Wire Line + 7300 2900 7050 2900 +Wire Wire Line + 6400 2900 6400 3000 +Wire Wire Line + 3750 2900 3950 2900 +Wire Wire Line + 4750 2900 4450 2900 +Wire Wire Line + 6550 2900 6250 2900 +Connection ~ 6400 2900 +Wire Wire Line + 4600 3000 4600 2900 +Connection ~ 4600 2900 +Wire Wire Line + 3750 3800 7300 3800 +Wire Wire Line + 7300 3800 7300 3500 +Connection ~ 5500 3800 +Wire Wire Line + 6400 3500 6400 3800 +Connection ~ 6400 3800 +Wire Wire Line + 7300 2500 7300 3000 +Connection ~ 7300 2900 +Wire Wire Line + 6850 3800 6850 3600 +Connection ~ 6850 3800 +Connection ~ 5650 2900 +Wire Wire Line + 5650 2900 5650 2500 +Wire Wire Line + 5650 2500 6100 2500 +$Comp +L VPRINT1 U1 +U 1 1 506964BE +P 7700 2450 +F 0 "U1" H 7550 2550 50 0001 C CNN +F 1 "VPRINT1" H 7850 2550 50 0000 C CNN + 1 7700 2450 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 50695F5E +P 6850 3600 +F 0 "#FLG01" H 6850 3870 30 0001 C CNN +F 1 "PWR_FLAG" H 6850 3830 30 0000 C CNN + 1 6850 3600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50695EE6 +P 5800 4000 +F 0 "#PWR02" H 5800 4000 30 0001 C CNN +F 1 "GND" H 5800 3930 30 0001 C CNN + 1 5800 4000 + 1 0 0 -1 +$EndComp +Text Label 6100 3800 0 60 ~ 0 +c +Text Label 6350 2750 0 60 ~ 0 +c +Text Label 6450 2750 0 60 ~ 0 +b +Text Label 6550 2900 0 60 ~ 0 +b +Text Label 5100 3150 0 60 ~ 0 +b +Text Label 5000 3150 0 60 ~ 0 +a +Text Label 7150 2900 0 60 ~ 0 +a +$Comp +L VCVS E1 +U 1 1 50695730 +P 5050 2950 +F 0 "E1" H 4850 3050 50 0000 C CNN +F 1 "0.5" H 4850 2900 50 0000 C CNN + 1 5050 2950 + 1 0 0 -1 +$EndComp +$Comp +L DC I1 +U 1 1 506956A6 +P 5500 3350 +F 0 "I1" H 5300 3450 60 0000 C CNN +F 1 "1" H 5300 3300 60 0000 C CNN +F 2 "R1" H 5200 3350 60 0000 C CNN + 1 5500 3350 + -1 0 0 1 +$EndComp +$Comp +L DC V1 +U 1 1 50695694 +P 3750 3350 +F 0 "V1" H 3550 3450 60 0000 C CNN +F 1 "1" H 3550 3300 60 0000 C CNN +F 2 "R1" H 3450 3350 60 0000 C CNN + 1 3750 3350 + 1 0 0 -1 +$EndComp +$Comp +L VCCS G1 +U 1 1 5069566A +P 6400 2550 +F 0 "G1" H 6200 2650 50 0000 C CNN +F 1 "0.5" H 6200 2500 50 0000 C CNN + 1 6400 2550 + 1 0 0 -1 +$EndComp +$Comp +L R R6 +U 1 1 506955DC +P 7300 3250 +F 0 "R6" V 7380 3250 50 0000 C CNN +F 1 "1" V 7300 3250 50 0000 C CNN + 1 7300 3250 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 506955D8 +P 6400 3250 +F 0 "R3" V 6480 3250 50 0000 C CNN +F 1 "1" V 6400 3250 50 0000 C CNN + 1 6400 3250 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 506955D1 +P 6800 2900 +F 0 "R5" V 6880 2900 50 0000 C CNN +F 1 "0.5" V 6800 2900 50 0000 C CNN + 1 6800 2900 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 506955CC +P 6000 2900 +F 0 "R4" V 6080 2900 50 0000 C CNN +F 1 "1" V 6000 2900 50 0000 C CNN + 1 6000 2900 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 506955C7 +P 4600 3250 +F 0 "R2" V 4680 3250 50 0000 C CNN +F 1 "1" V 4600 3250 50 0000 C CNN + 1 4600 3250 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 506955C2 +P 4200 2900 +F 0 "R1" V 4280 2900 50 0000 C CNN +F 1 "1" V 4200 2900 50 0000 C CNN + 1 4200 2900 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/linear2/analysis b/FreeEDA/Examples/linear2/analysis new file mode 100644 index 0000000..162ad08 --- /dev/null +++ b/FreeEDA/Examples/linear2/analysis @@ -0,0 +1 @@ +.op \ No newline at end of file diff --git a/FreeEDA/Examples/linear2/linear2-cache.bak b/FreeEDA/Examples/linear2/linear2-cache.bak new file mode 100644 index 0000000..df2206b --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2-cache.bak @@ -0,0 +1,89 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:32:27 AM IST +#encoding utf-8 +# +# CCVS +# +DEF CCVS H 0 40 Y Y 1 F N +F0 "H" -200 100 50 H V C CNN +F1 "CCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vprint1 +# +DEF vprint1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/linear2/linear2-cache.lib b/FreeEDA/Examples/linear2/linear2-cache.lib new file mode 100644 index 0000000..79f9376 --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2-cache.lib @@ -0,0 +1,89 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:32:49 AM IST +#encoding utf-8 +# +# CCVS +# +DEF CCVS H 0 40 Y Y 1 F N +F0 "H" -200 100 50 H V C CNN +F1 "CCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vprint1 +# +DEF vprint1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/linear2/linear2.bak b/FreeEDA/Examples/linear2/linear2.bak new file mode 100644 index 0000000..e9d9386 --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2.bak @@ -0,0 +1,181 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:32:27 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:linear2-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "22 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 6450 4000 +Wire Wire Line + 6450 4000 6450 3800 +Connection ~ 6750 3000 +Wire Wire Line + 6750 3000 6750 2850 +Connection ~ 6000 4000 +Wire Wire Line + 6000 3800 6000 4000 +Connection ~ 5300 3000 +Wire Wire Line + 5300 3300 5300 3000 +Wire Wire Line + 6850 3800 6850 4000 +Wire Wire Line + 6850 4000 4800 4000 +Wire Wire Line + 4800 4000 4800 3950 +Wire Wire Line + 5850 3000 6100 3000 +Wire Wire Line + 4800 3050 4800 3000 +Wire Wire Line + 4800 3000 5350 3000 +Wire Wire Line + 6600 3000 6850 3000 +Wire Wire Line + 6850 3000 6850 3200 +Wire Wire Line + 5300 3800 5300 4000 +Connection ~ 5300 4000 +Wire Wire Line + 6000 3000 6000 3150 +Connection ~ 6000 3000 +Wire Wire Line + 5600 4000 5600 4150 +Connection ~ 5600 4000 +$Comp +L PWR_FLAG #FLG01 +U 1 1 5069EA51 +P 6450 3800 +F 0 "#FLG01" H 6450 4070 30 0001 C CNN +F 1 "PWR_FLAG" H 6450 4030 30 0000 C CNN + 1 6450 3800 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5069EA30 +P 5600 4150 +F 0 "#PWR02" H 5600 4150 30 0001 C CNN +F 1 "GND" H 5600 4080 30 0001 C CNN + 1 5600 4150 + 1 0 0 -1 +$EndComp +$Comp +L VPRINT1 U1 +U 1 1 5069E9D3 +P 6750 2550 +F 0 "U1" H 6600 2650 50 0001 C CNN +F 1 "VPRINT1" H 6900 2650 50 0000 C CNN + 1 6750 2550 + 1 0 0 -1 +$EndComp +Text Label 6600 3550 0 60 ~ 0 +b +Text Label 6600 3450 0 60 ~ 0 +a +Text Label 6000 3300 0 60 ~ 0 +b +Text Label 6000 3150 0 60 ~ 0 +a +$Comp +L R R4 +U 1 1 5069E7B0 +P 6350 3000 +F 0 "R4" V 6430 3000 50 0000 C CNN +F 1 "0.1" V 6350 3000 50 0000 C CNN + 1 6350 3000 + 0 1 1 0 +$EndComp +$Comp +L R R1 +U 1 1 5069E7AC +P 5300 3550 +F 0 "R1" V 5380 3550 50 0000 C CNN +F 1 "0.2" V 5300 3550 50 0000 C CNN + 1 5300 3550 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 5069E7A9 +P 5600 3000 +F 0 "R2" V 5680 3000 50 0000 C CNN +F 1 "0.1" V 5600 3000 50 0000 C CNN + 1 5600 3000 + 0 1 1 0 +$EndComp +$Comp +L R R3 +U 1 1 5069E7A6 +P 6000 3550 +F 0 "R3" V 6080 3550 50 0000 C CNN +F 1 "0.2" V 6000 3550 50 0000 C CNN + 1 6000 3550 + 1 0 0 -1 +$EndComp +$Comp +L CCVS H1 +U 1 1 5069E78C +P 6800 3500 +F 0 "H1" H 6600 3600 50 0000 C CNN +F 1 "2" H 6600 3450 50 0000 C CNN + 1 6800 3500 + 0 1 1 0 +$EndComp +$Comp +L DC I1 +U 1 1 5069E6DB +P 4800 3500 +F 0 "I1" H 4600 3600 60 0000 C CNN +F 1 "1" H 4600 3450 60 0000 C CNN +F 2 "R1" H 4500 3500 60 0000 C CNN + 1 4800 3500 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/linear2/linear2.brd b/FreeEDA/Examples/linear2/linear2.brd new file mode 100644 index 0000000..ab9dee7 --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2.brd @@ -0,0 +1,398 @@ +PCBNEW-BOARD Version 1 date Tuesday 02 October 2012 12:48:38 AM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 9 +NoConn 0 +Di 48825 32959 59875 43721 +Ndraw 0 +Ntrack 25 +Nzone 0 +BoardThickness 630 +Nmodule 6 +Nnets 6 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "1 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "/a" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "/b" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 4 "N-000004" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 5 "N-000005" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "/a" +AddNet "/b" +AddNet "GND" +AddNet "N-000004" +AddNet "N-000005" +$EndNCLASS +$MODULE R3 +Po 58000 34500 0 15 00200000 5069EAF6 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 5069EAF6 +AR /5069E7AC +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R1" +T1 0 0 550 500 0 80 N I 21 N "0.2" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "GND" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 58000 39500 0 15 00200000 5069EAF8 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 5069EAF8 +AR /5069E7A9 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R2" +T1 0 0 550 500 0 80 N I 21 N "0.1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "/a" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 58000 37000 0 15 00200000 5069EAFA ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 5069EAFA +AR /5069E7A6 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R3" +T1 0 0 550 500 0 80 N I 21 N "0.2" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "/b" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "GND" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 58000 42500 0 15 00200000 5069EAFC ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 5069EAFC +AR /5069E7B0 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R4" +T1 0 0 550 500 0 80 N I 21 N "0.1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 5 "N-000005" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "/a" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R1 +Po 52000 34000 0 15 00200000 5069EAFD ~~ +Li R1 +Cd Resistance verticale +Kw R +Sc 5069EAFD +AR /5069E6DB +Op A A 0 +T0 -400 1000 550 500 0 80 N V 21 N "I1" +T1 -450 1000 550 500 0 80 N I 21 N "DC" +DS -500 0 500 0 150 21 +DC -500 0 -250 500 150 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "GND" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/verti_resistor.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R1 +$MODULE bornier4 +Po 52000 39500 900 15 3EC0ED29 5069EAFE ~~ +Li bornier4 +Cd Bornier d'alimentation 4 pins +Kw DEV +Sc 5069EAFE +AR /5069E78C +Op 0 0 0 +T0 0 -2500 1030 629 900 120 N V 21 N "H1" +T1 0 2000 600 600 900 120 N V 21 N "2" +DS -4000 -1500 -4000 1500 120 21 +DS 4000 1500 4000 -1500 120 21 +DS 4000 1000 -4000 1000 120 21 +DS -4000 -1500 4000 -1500 120 21 +DS -4000 1500 4000 1500 120 21 +$PAD +Sh "2" C 1500 1500 0 0 900 +Dr 600 0 0 +At STD N 00E0FFFF +Ne 3 "GND" +Po -1000 0 +$EndPAD +$PAD +Sh "3" C 1500 1500 0 0 900 +Dr 600 0 0 +At STD N 00E0FFFF +Ne 1 "/a" +Po 1000 0 +$EndPAD +$PAD +Sh "1" R 1500 1500 0 0 900 +Dr 600 0 0 +At STD N 00E0FFFF +Ne 5 "N-000005" +Po -3000 0 +$EndPAD +$PAD +Sh "4" C 1500 1500 0 0 900 +Dr 600 0 0 +At STD N 00E0FFFF +Ne 2 "/b" +Po 3000 0 +$EndPAD +$SHAPE3D +Na "device/bornier_4.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE bornier4 +$TRACK +Po 0 56500 39500 58000 39500 80 -1 +De 0 0 1 0 400000 +Po 0 59500 41000 59500 42500 80 -1 +De 0 0 1 0 800000 +Po 0 58000 39500 59500 41000 80 -1 +De 0 0 1 0 0 +Po 0 52000 38500 55500 38500 80 -1 +De 0 0 1 0 400000 +Po 0 55500 38500 56500 39500 80 -1 +De 0 0 1 0 800000 +Po 0 52000 36500 56000 36500 80 -1 +De 0 0 2 0 400000 +Po 0 56000 36500 56500 37000 80 -1 +De 0 0 2 0 800000 +Po 0 52000 40500 50500 39000 80 -1 +De 0 0 3 0 400000 +Po 0 52500 33500 52500 34000 80 -1 +De 0 0 3 0 800000 +Po 0 52000 33000 52500 33500 80 -1 +De 0 0 3 0 0 +Po 0 51000 33000 52000 33000 80 -1 +De 0 0 3 0 0 +Po 0 50500 33500 51000 33000 80 -1 +De 0 0 3 0 0 +Po 0 50500 39000 50500 33500 80 -1 +De 0 0 3 0 0 +Po 0 59500 34500 59500 37000 80 -1 +De 0 0 3 0 C00000 +Po 0 52500 34000 55000 34000 80 -1 +De 0 0 3 0 400000 +Po 0 58500 33500 59500 34500 80 -1 +De 0 0 3 0 800000 +Po 0 55500 33500 58500 33500 80 -1 +De 0 0 3 0 0 +Po 0 55000 34000 55500 33500 80 -1 +De 0 0 3 0 0 +Po 0 56500 34500 57500 34500 80 -1 +De 0 0 4 0 400000 +Po 0 58500 38500 59500 39500 80 -1 +De 0 0 4 0 800000 +Po 0 58500 35500 58500 38500 80 -1 +De 0 0 4 0 0 +Po 0 57500 34500 58500 35500 80 -1 +De 0 0 4 0 0 +Po 0 51500 34000 52000 34500 80 -1 +De 0 0 4 0 400000 +Po 0 52000 34500 56500 34500 80 -1 +De 0 0 4 0 800000 +Po 0 52000 42500 56500 42500 80 -1 +De 0 0 5 0 C00000 +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/linear2/linear2.cir b/FreeEDA/Examples/linear2/linear2.cir new file mode 100644 index 0000000..f3a43b2 --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:32:43 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 5 VPRINT1 +R4 5 2 0.1 +R1 4 0 0.2 +R2 2 4 0.1 +R3 3 0 0.2 +H1 5 0 2 3 2 +I1 4 0 1 + +.end diff --git a/FreeEDA/Examples/linear2/linear2.cir.ckt b/FreeEDA/Examples/linear2/linear2.cir.ckt new file mode 100644 index 0000000..04d0eb4 --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2.cir.ckt @@ -0,0 +1,15 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:32:43 am ist + +* Printing option vprint1 +r4 5 2 0.1 +r1 4 0 0.2 +r2 2 4 0.1 +r3 3 0 0.2 +* h1 +i1 4 0 1 +Vh1 2 3 0 +h1 5 0 Vh1 2 + +.op +.print v(5) +.end diff --git a/FreeEDA/Examples/linear2/linear2.cir.ckt.sol b/FreeEDA/Examples/linear2/linear2.cir.ckt.sol new file mode 100644 index 0000000..924ce9b --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2.cir.ckt.sol @@ -0,0 +1,9 @@ +Name Source Sink Voltage Current +---------------------------------------------------------- +R 5 2 0.0000000000 0.0000000000 +R 4 0 0.0000000000 0.0000000000 +R 2 4 0.0000000000 0.0000000000 +R 3 0 0.0000000000 0.0000000000 +I 4 0 0.0000000000 0.0000000000 +V 2 3 0.0000000000 0.0000000000 +H 5 0 0.0000000000 0.0000000000 diff --git a/FreeEDA/Examples/linear2/linear2.cir.out b/FreeEDA/Examples/linear2/linear2.cir.out new file mode 100644 index 0000000..e0328e7 --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2.cir.out @@ -0,0 +1,20 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:32:43 am ist + +* Printing option vprint1 +r4 5 2 0.1 +r1 4 0 0.2 +r2 2 4 0.1 +r3 3 0 0.2 +* h1 +i1 4 0 1 +Vh1 2 3 0 +h1 5 0 Vh1 2 + +.op + +* Control Statements +.control +run +print v(5) +.endc +.end diff --git a/FreeEDA/Examples/linear2/linear2.cmp b/FreeEDA/Examples/linear2/linear2.cmp new file mode 100644 index 0000000..3d50822 --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2.cmp @@ -0,0 +1,45 @@ +Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Tuesday 02 October 2012 12:41:01 AM IST + +BeginCmp +TimeStamp = /5069E78C; +Reference = H1; +ValeurCmp = 2; +IdModule = bornier4; +EndCmp + +BeginCmp +TimeStamp = /5069E6DB; +Reference = I1; +ValeurCmp = DC; +IdModule = R1; +EndCmp + +BeginCmp +TimeStamp = /5069E7AC; +Reference = R1; +ValeurCmp = 0.2; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /5069E7A9; +Reference = R2; +ValeurCmp = 0.1; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /5069E7A6; +Reference = R3; +ValeurCmp = 0.2; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /5069E7B0; +Reference = R4; +ValeurCmp = 0.1; +IdModule = R3; +EndCmp + +EndListe diff --git a/FreeEDA/Examples/linear2/linear2.net b/FreeEDA/Examples/linear2/linear2.net new file mode 100644 index 0000000..11706cb --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2.net @@ -0,0 +1,63 @@ +# EESchema Netlist Version 1.1 created Tuesday 02 October 2012 12:41:01 AM IST +( + ( /5069E78C bornier4 H1 2 + ( 1 N-000005 ) + ( 2 GND ) + ( 3 /a ) + ( 4 /b ) + ) + ( /5069E6DB R1 I1 DC + ( 1 N-000004 ) + ( 2 GND ) + ) + ( /5069E7AC R3 R1 0.2 + ( 1 N-000004 ) + ( 2 GND ) + ) + ( /5069E7A9 R3 R2 0.1 + ( 1 /a ) + ( 2 N-000004 ) + ) + ( /5069E7A6 R3 R3 0.2 + ( 1 /b ) + ( 2 GND ) + ) + ( /5069E7B0 R3 R4 0.1 + ( 1 N-000005 ) + ( 2 /a ) + ) +) +* +{ Allowed footprints by component: +$component H1 + 1_pin +$endlist +$component I1 + 1_pin +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R2 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R3 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R4 + R? + SM0603 + SM0805 + R?-* +$endlist +$endfootprintlist +} diff --git a/FreeEDA/Examples/linear2/linear2.pro b/FreeEDA/Examples/linear2/linear2.pro new file mode 100644 index 0000000..9452331 --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2.pro @@ -0,0 +1,71 @@ +update=Monday 22 October 2012 04:17:19 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice diff --git a/FreeEDA/Examples/linear2/linear2.proj b/FreeEDA/Examples/linear2/linear2.proj new file mode 100644 index 0000000..8bb7fa3 --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2.proj @@ -0,0 +1 @@ +schematicFile linear2.sch diff --git a/FreeEDA/Examples/linear2/linear2.sch b/FreeEDA/Examples/linear2/linear2.sch new file mode 100644 index 0000000..c85a06a --- /dev/null +++ b/FreeEDA/Examples/linear2/linear2.sch @@ -0,0 +1,181 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:32:49 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:linear2-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "22 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 6450 4000 +Wire Wire Line + 6450 4000 6450 3800 +Connection ~ 6750 3000 +Wire Wire Line + 6750 3000 6750 2850 +Connection ~ 6000 4000 +Wire Wire Line + 6000 3800 6000 4000 +Connection ~ 5300 3000 +Wire Wire Line + 5300 3300 5300 3000 +Wire Wire Line + 6850 3800 6850 4000 +Wire Wire Line + 6850 4000 4800 4000 +Wire Wire Line + 4800 4000 4800 3950 +Wire Wire Line + 5850 3000 6100 3000 +Wire Wire Line + 4800 3050 4800 3000 +Wire Wire Line + 4800 3000 5350 3000 +Wire Wire Line + 6600 3000 6850 3000 +Wire Wire Line + 6850 3000 6850 3200 +Wire Wire Line + 5300 3800 5300 4000 +Connection ~ 5300 4000 +Wire Wire Line + 6000 3000 6000 3150 +Connection ~ 6000 3000 +Wire Wire Line + 5600 4000 5600 4150 +Connection ~ 5600 4000 +$Comp +L PWR_FLAG #FLG01 +U 1 1 5069EA51 +P 6450 3800 +F 0 "#FLG01" H 6450 4070 30 0001 C CNN +F 1 "PWR_FLAG" H 6450 4030 30 0000 C CNN + 1 6450 3800 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5069EA30 +P 5600 4150 +F 0 "#PWR02" H 5600 4150 30 0001 C CNN +F 1 "GND" H 5600 4080 30 0001 C CNN + 1 5600 4150 + 1 0 0 -1 +$EndComp +$Comp +L VPRINT1 U1 +U 1 1 5069E9D3 +P 6750 2550 +F 0 "U1" H 6600 2650 50 0001 C CNN +F 1 "VPRINT1" H 6900 2650 50 0000 C CNN + 1 6750 2550 + 1 0 0 -1 +$EndComp +Text Label 6600 3550 0 60 ~ 0 +b +Text Label 6600 3450 0 60 ~ 0 +a +Text Label 6000 3300 0 60 ~ 0 +b +Text Label 6000 3150 0 60 ~ 0 +a +$Comp +L R R4 +U 1 1 5069E7B0 +P 6350 3000 +F 0 "R4" V 6430 3000 50 0000 C CNN +F 1 "0.1" V 6350 3000 50 0000 C CNN + 1 6350 3000 + 0 1 1 0 +$EndComp +$Comp +L R R1 +U 1 1 5069E7AC +P 5300 3550 +F 0 "R1" V 5380 3550 50 0000 C CNN +F 1 "0.2" V 5300 3550 50 0000 C CNN + 1 5300 3550 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 5069E7A9 +P 5600 3000 +F 0 "R2" V 5680 3000 50 0000 C CNN +F 1 "0.1" V 5600 3000 50 0000 C CNN + 1 5600 3000 + 0 1 1 0 +$EndComp +$Comp +L R R3 +U 1 1 5069E7A6 +P 6000 3550 +F 0 "R3" V 6080 3550 50 0000 C CNN +F 1 "0.2" V 6000 3550 50 0000 C CNN + 1 6000 3550 + 1 0 0 -1 +$EndComp +$Comp +L CCVS H1 +U 1 1 5069E78C +P 6800 3500 +F 0 "H1" H 6600 3600 50 0000 C CNN +F 1 "2" H 6600 3450 50 0000 C CNN + 1 6800 3500 + 0 1 1 0 +$EndComp +$Comp +L DC I1 +U 1 1 5069E6DB +P 4800 3500 +F 0 "I1" H 4600 3600 60 0000 C CNN +F 1 "1" H 4600 3450 60 0000 C CNN +F 2 "R1" H 4500 3500 60 0000 C CNN + 1 4800 3500 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/mixMode/analysis b/FreeEDA/Examples/mixMode/analysis new file mode 100644 index 0000000..bf5e632 --- /dev/null +++ b/FreeEDA/Examples/mixMode/analysis @@ -0,0 +1 @@ +.tran 10e-09 1e-06 0e-00 diff --git a/FreeEDA/Examples/mixMode/mixMode-cache.bak b/FreeEDA/Examples/mixMode/mixMode-cache.bak new file mode 100644 index 0000000..9e5fbb3 --- /dev/null +++ b/FreeEDA/Examples/mixMode/mixMode-cache.bak @@ -0,0 +1,122 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:40:24 AM IST +#encoding utf-8 +# +# 74HCT04 +# +DEF 74HCT04 U 0 30 Y Y 6 F N +F0 "U" 150 100 40 H V C CNN +F1 "74HCT04" 200 -100 40 H V C CNN +ALIAS 74HC14 74HC04 74LS14 +DRAW +P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N +X GND 7 -50 -100 0 U 30 20 0 0 W N +X VCC 14 -50 100 0 D 30 20 0 0 W N +X ~ 1 -450 0 300 R 60 60 1 1 I +X ~ 2 450 0 300 L 60 60 1 1 O I +X ~ 3 -450 0 300 R 60 60 2 1 I +X ~ 4 450 0 300 L 60 60 2 1 O I +X ~ 5 -450 0 300 R 60 60 3 1 I +X ~ 6 450 0 300 L 60 60 3 1 O I +X ~ 8 450 0 300 L 60 60 4 1 O I +X ~ 9 -450 0 300 R 60 60 4 1 I +X ~ 10 450 0 300 L 60 60 5 1 O I +X ~ 11 -450 0 300 R 60 60 5 1 I +X ~ 12 450 0 300 L 60 60 6 1 O I +X ~ 13 -450 0 300 R 60 60 6 1 I +X ~ 1 -450 0 300 R 60 60 1 2 I I +X ~ 2 450 0 300 L 60 60 1 2 O +X ~ 3 -450 0 300 R 60 60 2 2 I I +X ~ 4 450 0 300 L 60 60 2 2 O +X ~ 5 -450 0 300 R 60 60 3 2 I I +X ~ 6 450 0 300 L 60 60 3 2 O +X ~ 8 450 0 300 L 60 60 4 2 O +X ~ 9 -450 0 300 R 60 60 4 2 I I +X ~ 10 450 0 300 L 60 60 5 2 O +X ~ 11 -450 0 300 R 60 60 5 2 I I +X ~ 12 450 0 300 L 60 60 6 2 O +X ~ 13 -450 0 300 R 60 60 6 2 I I +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/mixMode/mixMode-cache.lib b/FreeEDA/Examples/mixMode/mixMode-cache.lib new file mode 100644 index 0000000..ab75e8e --- /dev/null +++ b/FreeEDA/Examples/mixMode/mixMode-cache.lib @@ -0,0 +1,122 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:41:04 AM IST +#encoding utf-8 +# +# 74HCT04 +# +DEF 74HCT04 U 0 30 Y Y 6 F N +F0 "U" 150 100 40 H V C CNN +F1 "74HCT04" 200 -100 40 H V C CNN +ALIAS 74HC14 74HC04 74LS14 +DRAW +P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N +X GND 7 -50 -100 0 U 30 20 0 0 W N +X VCC 14 -50 100 0 D 30 20 0 0 W N +X ~ 1 -450 0 300 R 60 60 1 1 I +X ~ 2 450 0 300 L 60 60 1 1 O I +X ~ 3 -450 0 300 R 60 60 2 1 I +X ~ 4 450 0 300 L 60 60 2 1 O I +X ~ 5 -450 0 300 R 60 60 3 1 I +X ~ 6 450 0 300 L 60 60 3 1 O I +X ~ 8 450 0 300 L 60 60 4 1 O I +X ~ 9 -450 0 300 R 60 60 4 1 I +X ~ 10 450 0 300 L 60 60 5 1 O I +X ~ 11 -450 0 300 R 60 60 5 1 I +X ~ 12 450 0 300 L 60 60 6 1 O I +X ~ 13 -450 0 300 R 60 60 6 1 I +X ~ 1 -450 0 300 R 60 60 1 2 I I +X ~ 2 450 0 300 L 60 60 1 2 O +X ~ 3 -450 0 300 R 60 60 2 2 I I +X ~ 4 450 0 300 L 60 60 2 2 O +X ~ 5 -450 0 300 R 60 60 3 2 I I +X ~ 6 450 0 300 L 60 60 3 2 O +X ~ 8 450 0 300 L 60 60 4 2 O +X ~ 9 -450 0 300 R 60 60 4 2 I I +X ~ 10 450 0 300 L 60 60 5 2 O +X ~ 11 -450 0 300 R 60 60 5 2 I I +X ~ 12 450 0 300 L 60 60 6 2 O +X ~ 13 -450 0 300 R 60 60 6 2 I I +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/mixMode/mixMode.bak b/FreeEDA/Examples/mixMode/mixMode.bak new file mode 100644 index 0000000..1f9d2dd --- /dev/null +++ b/FreeEDA/Examples/mixMode/mixMode.bak @@ -0,0 +1,165 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:40:24 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:mixMode-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L VPLOT8_1 U1 +U 2 1 50CEB729 +P 7150 2900 +F 0 "U1" H 7000 3000 50 0000 C CNN +F 1 "VPLOT8_1" H 7300 3000 50 0000 C CNN + 2 7150 2900 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50CEB722 +P 5600 2950 +F 0 "U1" H 5450 3050 50 0000 C CNN +F 1 "VPLOT8_1" H 5750 3050 50 0000 C CNN + 1 5600 2950 + 1 0 0 -1 +$EndComp +Connection ~ 5750 4400 +Wire Wire Line + 5750 4400 5750 4300 +Connection ~ 7150 3350 +Wire Wire Line + 7150 3350 7150 3200 +Wire Wire Line + 5950 3350 4800 3350 +Wire Wire Line + 7350 4000 7350 4400 +Wire Wire Line + 7350 4400 4800 4400 +Connection ~ 5600 3350 +Wire Wire Line + 5600 3250 5600 3350 +Wire Wire Line + 5350 3350 5350 3650 +Wire Wire Line + 4800 4550 4800 4250 +Connection ~ 4800 4400 +Connection ~ 5350 3350 +Wire Wire Line + 6850 3350 7350 3350 +Wire Wire Line + 7350 3350 7350 3500 +Wire Wire Line + 6350 3000 6350 3250 +Wire Wire Line + 5350 4400 5350 4150 +Connection ~ 5350 4400 +$Comp +L PWR_FLAG #FLG01 +U 1 1 50653022 +P 6350 3000 +F 0 "#FLG01" H 6350 3270 30 0001 C CNN +F 1 "PWR_FLAG" H 6350 3230 30 0000 C CNN + 1 6350 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50652FB6 +P 7350 3750 +F 0 "R2" V 7430 3750 50 0000 C CNN +F 1 "1000" V 7350 3750 50 0000 C CNN + 1 7350 3750 + 1 0 0 -1 +$EndComp +$Comp +L 74HC04 U2 +U 1 1 505FDE5C +P 6400 3350 +F 0 "U2" H 6550 3450 40 0000 C CNN +F 1 "74HC04" H 6600 3250 40 0000 C CNN + 1 6400 3350 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 505CA177 +P 5750 4300 +F 0 "#FLG02" H 5750 4570 30 0001 C CNN +F 1 "PWR_FLAG" H 5750 4530 30 0000 C CNN + 1 5750 4300 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 505C9F25 +P 5350 3900 +F 0 "R1" V 5430 3900 50 0000 C CNN +F 1 "1000" V 5350 3900 50 0000 C CNN + 1 5350 3900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 505C9EE8 +P 4800 4550 +F 0 "#PWR03" H 4800 4550 30 0001 C CNN +F 1 "GND" H 4800 4480 30 0001 C CNN + 1 4800 4550 + 1 0 0 -1 +$EndComp +$Comp +L PULSE v1 +U 1 1 505C9ECF +P 4800 3800 +F 0 "v1" H 4600 3900 60 0000 C CNN +F 1 "PULSE" H 4600 3750 60 0000 C CNN + 1 4800 3800 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/mixMode/mixMode.brd b/FreeEDA/Examples/mixMode/mixMode.brd new file mode 100644 index 0000000..a68ce3f --- /dev/null +++ b/FreeEDA/Examples/mixMode/mixMode.brd @@ -0,0 +1,400 @@ +PCBNEW-BOARD Version 1 date Friday 28 September 2012 10:42:25 AM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 7 +NoConn 7 +Di 40017 31950 63751 53251 +Ndraw 0 +Ntrack 0 +Nzone 0 +BoardThickness 630 +Nmodule 7 +Nnets 7 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "28 sep 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000001" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000004" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 4 "N-000005" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 5 "N-000006" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 6 "VCC" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "GND" +AddNet "N-000001" +AddNet "N-000004" +AddNet "N-000005" +AddNet "N-000006" +AddNet "VCC" +$EndNCLASS +$MODULE R1 +Po 47000 39000 0 15 00200000 50653175 ~~ +Li R1 +Cd Resistance verticale +Kw R +Sc 50653175 +AR /505C9F25 +Op A A 0 +T0 -400 1000 550 500 0 80 N V 21 N "R1" +T1 -450 1000 550 500 0 80 N I 21 N "1000" +DS -500 0 500 0 150 21 +DC -500 0 -250 500 150 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 5 "N-000006" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/verti_resistor.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R1 +$MODULE R1 +Po 46000 43000 0 15 00200000 50653177 ~~ +Li R1 +Cd Resistance verticale +Kw R +Sc 50653177 +AR /50652FB6 +Op A A 0 +T0 -400 1000 550 500 0 80 N V 21 N "R2" +T1 -450 1000 550 500 0 80 N I 21 N "R" +DS -500 0 500 0 150 21 +DC -500 0 -250 500 150 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000001" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/verti_resistor.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R1 +$MODULE DIP-14__300_ELL +Po 52500 34000 0 15 00200000 50653178 ~~ +Li DIP-14__300_ELL +Cd 14 pins DIL package, elliptical pads +Kw DIL +Sc 50653178 +AR /505FDE5C +Op 0 0 0 +T0 -2000 -500 600 450 0 113 N V 21 N "U2" +T1 500 500 600 450 0 113 N V 21 N "74HC04" +DS -4000 -1000 4000 -1000 150 21 +DS 4000 1000 -4000 1000 150 21 +DS -4000 1000 -4000 -1000 150 21 +DS -4000 -500 -3500 -500 150 21 +DS -3500 -500 -3500 500 150 21 +DS -3500 500 -4000 500 150 21 +DS 4000 -1000 4000 1000 150 21 +$PAD +Sh "1" R 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000005" +Po -3000 1500 +$EndPAD +$PAD +Sh "2" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000004" +Po -2000 1500 +$EndPAD +$PAD +Sh "3" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po -1000 1500 +$EndPAD +$PAD +Sh "4" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po 0 1500 +$EndPAD +$PAD +Sh "5" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po 1000 1500 +$EndPAD +$PAD +Sh "6" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po 2000 1500 +$EndPAD +$PAD +Sh "7" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 3000 1500 +$EndPAD +$PAD +Sh "8" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po 3000 -1500 +$EndPAD +$PAD +Sh "9" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po 2000 -1500 +$EndPAD +$PAD +Sh "10" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po 1000 -1500 +$EndPAD +$PAD +Sh "11" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po 0 -1500 +$EndPAD +$PAD +Sh "12" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po -1000 -1500 +$EndPAD +$PAD +Sh "13" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po -2000 -1500 +$EndPAD +$PAD +Sh "14" O 620 900 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 6 "VCC" +Po -3000 -1500 +$EndPAD +$SHAPE3D +Na "dil/dil_14.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE DIP-14__300_ELL +$MODULE 2PIN_6mm +Po 55000 50500 0 15 00200000 50653179 ~~ +Li 2PIN_6mm +Cd module 2 pin (trou 6 mm) +Kw DEV +Sc 50653179 +AR /505C9ECF +Op 0 0 0 +T0 0 500 600 600 0 120 N V 21 N "v1" +T1 0 -500 600 600 0 120 N V 21 N "PULSE" +DS -8500 -2500 8500 -2500 150 21 +DS 8500 -2500 8500 2500 150 21 +DS 8500 2500 -8500 2500 150 21 +DS -8500 2500 -8500 -2500 150 21 +$PAD +Sh "1" C 4000 4000 0 0 0 +Dr 2400 0 0 +At STD N 00E0FFFF +Ne 5 "N-000006" +Po -5900 0 +$EndPAD +$PAD +Sh "2" C 4000 4000 0 0 0 +Dr 2400 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 5900 0 +$EndPAD +$SHAPE3D +Na "device/douille_4mm(red).wrl" +Sc 1.800000 1.800000 1.800000 +Of -0.590000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$SHAPE3D +Na "device/douille_4mm(red).wrl" +Sc 1.800000 1.800000 1.800000 +Of 0.590000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE 2PIN_6mm +$MODULE 1pin +Po 50000 44000 0 15 00200000 5065317A ~~ +Li 1pin +Cd module 1 pin (ou trou mecanique de percage) +Kw DEV +Sc 5065317A +AR /505FD8A0 +Op 0 0 0 +T0 0 -1200 400 400 0 100 N V 21 N "U1" +T1 0 1100 400 400 0 100 N I 21 N "ADC" +DC 0 0 0 -900 150 21 +$PAD +Sh "1" C 1600 1600 0 0 0 +Dr 1200 0 0 +At STD N 00E0FFFF +Ne 5 "N-000006" +Po 0 0 +$EndPAD +$EndMODULE 1pin +$MODULE 1pin +Po 59500 43500 0 15 00200000 5065317C ~~ +Li 1pin +Cd module 1 pin (ou trou mecanique de percage) +Kw DEV +Sc 5065317C +AR /505FDC21 +Op 0 0 0 +T0 0 -1200 400 400 0 100 N V 21 N "U3" +T1 0 1100 400 400 0 100 N I 21 N "DAC" +DC 0 0 0 -900 150 21 +$PAD +Sh "1" C 1600 1600 0 0 0 +Dr 1200 0 0 +At STD N 00E0FFFF +Ne 3 "N-000004" +Po 0 0 +$EndPAD +$EndMODULE 1pin +$MODULE 1pin +Po 41500 45500 0 15 00200000 5065317E ~~ +Li 1pin +Cd module 1 pin (ou trou mecanique de percage) +Kw DEV +Sc 5065317E +AR /5061678B +Op 0 0 0 +T0 0 -1200 400 400 0 100 N V 21 N "U4" +T1 0 1100 400 400 0 100 N I 21 N "VPLOT1" +DC 0 0 0 -900 150 21 +$PAD +Sh "1" C 1600 1600 0 0 0 +Dr 1200 0 0 +At STD N 00E0FFFF +Ne 5 "N-000006" +Po 0 0 +$EndPAD +$EndMODULE 1pin +$TRACK +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/mixMode/mixMode.cir b/FreeEDA/Examples/mixMode/mixMode.cir new file mode 100644 index 0000000..3db9950 --- /dev/null +++ b/FreeEDA/Examples/mixMode/mixMode.cir @@ -0,0 +1,13 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:41:09 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 3 4 VPLOT8_1 +R2 4 0 1000 +U2 3 4 0 2 74HC04 +R1 3 0 1000 +v1 3 0 PULSE + +.end diff --git a/FreeEDA/Examples/mixMode/mixMode.cir.ckt b/FreeEDA/Examples/mixMode/mixMode.cir.ckt new file mode 100644 index 0000000..590cf66 --- /dev/null +++ b/FreeEDA/Examples/mixMode/mixMode.cir.ckt @@ -0,0 +1,17 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:41:09 am ist + +* Plotting option vplot8_1 +r2 4 0 1000 +* 74hc04 +r1 3 0 1000 +v1 3 0 pulse(0 5 0 1e-8 1e-8 0.25e-6 0.5e-6) +a1 [3] [3_in] u2adc +a2 3_in 4_out u2 +a3 [4_out] [4] u2dac +.model u2 d_inverter +.model u2adc adc_bridge(in_low=0.8 in_high=2.0) +.model u2dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) + +.tran 10e-09 1e-06 0e-00 +.plot v(3) v(4) +.end diff --git a/FreeEDA/Examples/mixMode/mixMode.cir.out b/FreeEDA/Examples/mixMode/mixMode.cir.out new file mode 100644 index 0000000..27f8a8c --- /dev/null +++ b/FreeEDA/Examples/mixMode/mixMode.cir.out @@ -0,0 +1,22 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:41:09 am ist + +* Plotting option vplot8_1 +r2 4 0 1000 +* 74hc04 +r1 3 0 1000 +v1 3 0 pulse(0 5 0 1e-8 1e-8 0.25e-6 0.5e-6) +a1 [3] [3_in] u2adc +a2 3_in 4_out u2 +a3 [4_out] [4] u2dac +.model u2 d_inverter +.model u2adc adc_bridge(in_low=0.8 in_high=2.0) +.model u2dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) + +.tran 10e-09 1e-06 0e-00 + +* Control Statements +.control +run +plot v(3) v(4) +.endc +.end diff --git a/FreeEDA/Examples/mixMode/mixMode.cmp b/FreeEDA/Examples/mixMode/mixMode.cmp new file mode 100644 index 0000000..8a56a56 --- /dev/null +++ b/FreeEDA/Examples/mixMode/mixMode.cmp @@ -0,0 +1,52 @@ +Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Friday 28 September 2012 10:41:02 AM IST + +BeginCmp +TimeStamp = /505C9F25; +Reference = R1; +ValeurCmp = 1000; +IdModule = R1; +EndCmp + +BeginCmp +TimeStamp = /50652FB6; +Reference = R2; +ValeurCmp = R; +IdModule = R1; +EndCmp + +BeginCmp +TimeStamp = /505FD8A0; +Reference = U1; +ValeurCmp = ADC; +IdModule = 1pin; +EndCmp + +BeginCmp +TimeStamp = /505FDE5C; +Reference = U2; +ValeurCmp = 74HC04; +IdModule = DIP-14__300_ELL; +EndCmp + +BeginCmp +TimeStamp = /505FDC21; +Reference = U3; +ValeurCmp = DAC; +IdModule = 1pin; +EndCmp + +BeginCmp +TimeStamp = /5061678B; +Reference = U4; +ValeurCmp = VPLOT1; +IdModule = 1pin; +EndCmp + +BeginCmp +TimeStamp = /505C9ECF; +Reference = v1; +ValeurCmp = PULSE; +IdModule = 2PIN_6mm; +EndCmp + +EndListe diff --git a/FreeEDA/Examples/mixMode/mixMode.net b/FreeEDA/Examples/mixMode/mixMode.net new file mode 100644 index 0000000..0175d5c --- /dev/null +++ b/FreeEDA/Examples/mixMode/mixMode.net @@ -0,0 +1,77 @@ +# EESchema Netlist Version 1.1 created Friday 28 September 2012 12:26:55 PM IST +( + ( /50653344 $noname U5 VPLOT1 {Lib=VPLOT1} + ( 1 N-000005 ) + ) + ( /50652FB6 $noname R2 1000 {Lib=R} + ( 1 N-000005 ) + ( 2 GND ) + ) + ( /5061678B $noname U4 VPLOT1 {Lib=VPLOT1} + ( 1 N-000001 ) + ) + ( /505FDE5C $noname U2 74HC04 {Lib=74HC04} + ( 1 N-000006 ) + ( 2 N-000004 ) + ( 7 GND ) + ( 14 VCC ) + ) + ( /505FDC21 $noname U3 DAC {Lib=DAC} + ( 1 N-000004 ) + ( 2 N-000005 ) + ) + ( /505FD8A0 $noname U1 ADC {Lib=ADC} + ( 1 N-000001 ) + ( 2 N-000006 ) + ) + ( /505C9F25 $noname R1 1000 {Lib=R} + ( 1 N-000001 ) + ( 2 GND ) + ) + ( /505C9ECF $noname v1 PULSE {Lib=PULSE} + ( 1 N-000001 ) + ( 2 GND ) + ) +) +* +{ Allowed footprints by component: +$component R2 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$component v1 + 1_pin +$endlist +$endfootprintlist +} +{ Pin List by Nets +Net 1 "" "" + U1 1 + v1 1 + R1 1 + U4 1 +Net 2 "GND" "GND" + v1 2 + R2 2 + R1 2 + U2 7 +Net 4 "" "" + U2 2 + U3 1 +Net 5 "" "" + U3 2 + U5 1 + R2 1 +Net 6 "" "" + U1 2 + U2 1 +} +#End diff --git a/FreeEDA/Examples/mixMode/mixMode.pro b/FreeEDA/Examples/mixMode/mixMode.pro new file mode 100644 index 0000000..3e24a6b --- /dev/null +++ b/FreeEDA/Examples/mixMode/mixMode.pro @@ -0,0 +1,71 @@ +update=Tuesday 30 October 2012 11:12:31 AM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice diff --git a/FreeEDA/Examples/mixMode/mixMode.proj b/FreeEDA/Examples/mixMode/mixMode.proj new file mode 100644 index 0000000..465ba2d --- /dev/null +++ b/FreeEDA/Examples/mixMode/mixMode.proj @@ -0,0 +1 @@ +schematicFile mixMode.sch diff --git a/FreeEDA/Examples/mixMode/mixMode.sch b/FreeEDA/Examples/mixMode/mixMode.sch new file mode 100644 index 0000000..493dc4e --- /dev/null +++ b/FreeEDA/Examples/mixMode/mixMode.sch @@ -0,0 +1,165 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:41:04 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:mixMode-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L VPLOT8_1 U1 +U 2 1 50CEB729 +P 7150 2900 +F 0 "U1" H 7000 3000 50 0000 C CNN +F 1 "VPLOT8_1" H 7300 3000 50 0000 C CNN + 2 7150 2900 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50CEB722 +P 5600 2950 +F 0 "U1" H 5450 3050 50 0000 C CNN +F 1 "VPLOT8_1" H 5750 3050 50 0000 C CNN + 1 5600 2950 + 1 0 0 -1 +$EndComp +Connection ~ 5750 4400 +Wire Wire Line + 5750 4400 5750 4300 +Connection ~ 7150 3350 +Wire Wire Line + 7150 3350 7150 3200 +Wire Wire Line + 5950 3350 4800 3350 +Wire Wire Line + 7350 4000 7350 4400 +Wire Wire Line + 7350 4400 4800 4400 +Connection ~ 5600 3350 +Wire Wire Line + 5600 3250 5600 3350 +Wire Wire Line + 5350 3350 5350 3650 +Wire Wire Line + 4800 4550 4800 4250 +Connection ~ 4800 4400 +Connection ~ 5350 3350 +Wire Wire Line + 6850 3350 7350 3350 +Wire Wire Line + 7350 3350 7350 3500 +Wire Wire Line + 6350 3000 6350 3250 +Wire Wire Line + 5350 4400 5350 4150 +Connection ~ 5350 4400 +$Comp +L PWR_FLAG #FLG01 +U 1 1 50653022 +P 6350 3000 +F 0 "#FLG01" H 6350 3270 30 0001 C CNN +F 1 "PWR_FLAG" H 6350 3230 30 0000 C CNN + 1 6350 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50652FB6 +P 7350 3750 +F 0 "R2" V 7430 3750 50 0000 C CNN +F 1 "1000" V 7350 3750 50 0000 C CNN + 1 7350 3750 + 1 0 0 -1 +$EndComp +$Comp +L 74HC04 U2 +U 1 1 505FDE5C +P 6400 3350 +F 0 "U2" H 6550 3450 40 0000 C CNN +F 1 "74HC04" H 6600 3250 40 0000 C CNN + 1 6400 3350 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 505CA177 +P 5750 4300 +F 0 "#FLG02" H 5750 4570 30 0001 C CNN +F 1 "PWR_FLAG" H 5750 4530 30 0000 C CNN + 1 5750 4300 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 505C9F25 +P 5350 3900 +F 0 "R1" V 5430 3900 50 0000 C CNN +F 1 "1000" V 5350 3900 50 0000 C CNN + 1 5350 3900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 505C9EE8 +P 4800 4550 +F 0 "#PWR03" H 4800 4550 30 0001 C CNN +F 1 "GND" H 4800 4480 30 0001 C CNN + 1 4800 4550 + 1 0 0 -1 +$EndComp +$Comp +L PULSE v1 +U 1 1 505C9ECF +P 4800 3800 +F 0 "v1" H 4600 3900 60 0000 C CNN +F 1 "PULSE" H 4600 3750 60 0000 C CNN + 1 4800 3800 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/modifiedNodalExample/$savepcb.brd b/FreeEDA/Examples/modifiedNodalExample/$savepcb.brd new file mode 100644 index 0000000..d688470 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/$savepcb.brd @@ -0,0 +1,366 @@ +PCBNEW-BOARD Version 1 date Monday 01 October 2012 11:13:48 AM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 8 +NoConn 2 +Di 48625 31085 56375 36121 +Ndraw 0 +Ntrack 20 +Nzone 0 +BoardThickness 630 +Nmodule 6 +Nnets 5 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "1 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000002" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000003" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 4 "N-000004" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "GND" +AddNet "N-000002" +AddNet "N-000003" +AddNet "N-000004" +$EndNCLASS +$MODULE R3 +Po 54500 32500 1800 15 50692D16 50692991 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 50692991 +AR /50692613 +Op 0 A 0 +T0 0 0 550 500 2700 80 N V 21 N "R1" +T1 0 0 550 500 1800 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po 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+$EndBOARD diff --git a/FreeEDA/Examples/modifiedNodalExample/analysis b/FreeEDA/Examples/modifiedNodalExample/analysis new file mode 100644 index 0000000..162ad08 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/analysis @@ -0,0 +1 @@ +.op \ No newline at end of file diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodal.proj b/FreeEDA/Examples/modifiedNodalExample/modifiedNodal.proj new file mode 100644 index 0000000..7b01bfb --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodal.proj @@ -0,0 +1 @@ +schematicFile modifiedNodal.sch diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample-cache.bak b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample-cache.bak new file mode 100644 index 0000000..35c96a0 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample-cache.bak @@ -0,0 +1,72 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 22 October 2012 03:59:40 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 I +X - 2 0 -450 300 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vprint1 +# +DEF vprint1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -400 300 U 50 50 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample-cache.lib b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample-cache.lib new file mode 100644 index 0000000..7d128f1 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample-cache.lib @@ -0,0 +1,72 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:46:55 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vprint1 +# +DEF vprint1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.000 b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.000 new file mode 100644 index 0000000..8be4d3d --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.000 @@ -0,0 +1,326 @@ +PCBNEW-BOARD Version 1 date Monday 01 October 2012 10:59:42 AM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 8 +NoConn 8 +Di 48125 31765 56375 38121 +Ndraw 0 +Ntrack 0 +Nzone 0 +BoardThickness 630 +Nmodule 6 +Nnets 5 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "1 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000002" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000003" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 4 "N-000004" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "GND" +AddNet "N-000002" +AddNet "N-000003" +AddNet "N-000004" +$EndNCLASS +$MODULE R3 +Po 54500 32500 0 15 00200000 50692991 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 50692991 +AR /50692613 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R1" +T1 0 0 550 500 0 80 N I 21 N "R" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 50000 37500 0 15 00200000 50692993 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 50692993 +AR /5069261E +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R2" +T1 0 0 550 500 0 80 N I 21 N "R" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 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0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 54500 35000 0 15 00200000 50692997 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 50692997 +AR /50692628 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R4" +T1 0 0 550 500 0 80 N I 21 N "R" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R1 +Po 49500 32500 0 15 00200000 50692998 ~~ +Li R1 +Cd Resistance verticale +Kw R +Sc 50692998 +AR /5067FE8A +Op A A 0 +T0 -400 1000 550 500 0 80 N V 21 N "v1" +T1 -450 1000 550 500 0 80 N I 21 N "DC" +DS -500 0 500 0 150 21 +DC -500 0 -250 500 150 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/verti_resistor.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R1 +$MODULE R1 +Po 49500 35000 0 15 00200000 5069299A ~~ +Li R1 +Cd Resistance verticale +Kw R +Sc 5069299A +AR /5067FE8E +Op A A 0 +T0 -400 1000 550 500 0 80 N V 21 N "v2" +T1 -450 1000 550 500 0 80 N I 21 N "DC" +DS -500 0 500 0 150 21 +DC -500 0 -250 500 150 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/verti_resistor.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R1 +$TRACK +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.bak b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.bak new file mode 100644 index 0000000..0917845 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.bak @@ -0,0 +1,169 @@ +EESchema Schematic File Version 2 date Monday 22 October 2012 03:59:40 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:modifiedNodalExample-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "22 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5300 2650 5300 3250 +Wire Wire Line + 5300 3250 4950 3250 +Wire Wire Line + 4950 3250 4950 3550 +Connection ~ 4750 4250 +Wire Wire Line + 4750 4250 4750 4400 +Wire Wire Line + 4650 3050 4100 3050 +Wire Wire Line + 4100 3050 4100 3350 +Wire Wire Line + 4100 4250 5800 4250 +Wire Wire Line + 5550 3350 5800 3350 +Wire Wire Line + 4100 3350 4350 3350 +Wire Wire Line + 4850 3350 5050 3350 +Connection ~ 4950 3350 +Wire Wire Line + 4950 4050 4950 4250 +Connection ~ 4950 4250 +Wire Wire Line + 5800 3350 5800 3050 +Wire Wire Line + 5800 3050 5150 3050 +Wire Wire Line + 5300 4250 5300 4100 +Connection ~ 5300 4250 +$Comp +L VPRINT1 U1 +U 1 1 50692E86 +P 5300 2250 +F 0 "U1" H 5150 2350 50 0001 C CNN +F 1 "VPRINT1" H 5450 2350 50 0000 C CNN + 1 5300 2250 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 5069279A +P 5300 4100 +F 0 "#FLG01" H 5300 4370 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 4330 30 0000 C CNN + 1 5300 4100 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50692771 +P 4750 4400 +F 0 "#PWR02" H 4750 4400 30 0001 C CNN +F 1 "GND" H 4750 4330 30 0001 C CNN + 1 4750 4400 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50692628 +P 5300 3350 +F 0 "R3" V 5380 3350 50 0000 C CNN +F 1 "1" V 5300 3350 50 0000 C CNN + 1 5300 3350 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 5069261E +P 4900 3050 +F 0 "R4" V 4980 3050 50 0000 C CNN +F 1 "1" V 4900 3050 50 0000 C CNN + 1 4900 3050 + 0 1 1 0 +$EndComp +$Comp +L R R1 +U 1 1 50692613 +P 4600 3350 +F 0 "R1" V 4680 3350 50 0000 C CNN +F 1 "1" V 4600 3350 50 0000 C CNN + 1 4600 3350 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 5067FEAC +P 4950 3800 +F 0 "R2" V 5030 3800 50 0000 C CNN +F 1 "1" V 4950 3800 50 0000 C CNN + 1 4950 3800 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 5067FE8E +P 5800 3800 +F 0 "v2" H 5600 3900 60 0000 C CNN +F 1 "10" H 5600 3750 60 0000 C CNN +F 2 "R3" H 5500 3800 60 0000 C CNN + 1 5800 3800 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 5067FE8A +P 4100 3800 +F 0 "v1" H 3900 3900 60 0000 C CNN +F 1 "5" H 3900 3750 60 0000 C CNN +F 2 "R3" H 3800 3800 60 0000 C CNN + 1 4100 3800 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.brd b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.brd new file mode 100644 index 0000000..0eb5ac6 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.brd @@ -0,0 +1,386 @@ +PCBNEW-BOARD Version 1 date Monday 01 October 2012 11:15:23 AM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 8 +NoConn 0 +Di 48625 31085 57041 36121 +Ndraw 0 +Ntrack 30 +Nzone 0 +BoardThickness 630 +Nmodule 6 +Nnets 5 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "1 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000002" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000003" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 4 "N-000004" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "GND" +AddNet "N-000002" +AddNet "N-000003" +AddNet "N-000004" +$EndNCLASS +$MODULE R3 +Po 54500 32500 1800 15 50692D16 50692991 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 50692991 +AR /50692613 +Op 0 A 0 +T0 0 0 550 500 2700 80 N V 21 N "R1" +T1 0 0 550 500 1800 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 50500 35500 1800 15 00200000 50692993 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 50692993 +AR /5067FEAC +Op 0 A 0 +T0 0 0 550 500 1800 80 N V 21 N "R2" +T1 0 0 550 500 1800 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 54500 34000 0 15 00200000 50692995 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 50692995 +AR /50692628 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R3" +T1 0 0 550 500 0 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000002" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 54500 35500 0 15 00200000 50692997 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 50692997 +AR /5069261E +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R4" +T1 0 0 550 500 0 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R1 +Po 49500 32500 1800 15 00200000 50692998 ~~ +Li R1 +Cd Resistance verticale +Kw R +Sc 50692998 +AR /5067FE8A +Op A A 0 +T0 -400 1000 550 500 1800 80 N V 21 N "v1" +T1 -450 1000 550 500 1800 80 N I 21 N "DC" +DS -500 0 500 0 150 21 +DC -500 0 -250 500 150 21 +$PAD +Sh "1" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/verti_resistor.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R1 +$MODULE R1 +Po 49500 34000 1800 15 00200000 5069299A ~~ +Li R1 +Cd Resistance verticale +Kw R +Sc 5069299A +AR /5067FE8E +Op A A 0 +T0 -400 1000 550 500 1800 80 N V 21 N "v2" +T1 -450 1000 550 500 1800 80 N I 21 N "DC" +DS -500 0 500 0 150 21 +DC -500 0 -250 500 150 21 +$PAD +Sh "1" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 1800 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/verti_resistor.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R1 +$TRACK +Po 0 49000 34000 49500 33500 80 -1 +De 0 0 1 0 400000 +Po 0 49500 33000 49000 32500 80 -1 +De 0 0 1 0 800000 +Po 0 49500 33500 49500 33000 80 -1 +De 0 0 1 0 0 +Po 0 49000 35500 49500 35000 80 -1 +De 0 0 1 0 400000 +Po 0 49500 34500 49000 34000 80 -1 +De 0 0 1 0 800000 +Po 0 49500 35000 49500 34500 80 -1 +De 0 0 1 0 0 +Po 0 52000 35500 52500 36000 80 -1 +De 0 0 2 0 400000 +Po 0 57000 35000 56000 34000 80 -1 +De 0 0 2 0 800000 +Po 0 57000 35500 57000 35000 80 -1 +De 0 0 2 0 0 +Po 0 56500 36000 57000 35500 80 -1 +De 0 0 2 0 0 +Po 0 56000 36000 56500 36000 80 -1 +De 0 0 2 0 0 +Po 0 52500 36000 56000 36000 80 -1 +De 0 0 2 0 0 +Po 0 56000 32500 55500 33000 80 -1 +De 0 0 2 0 400000 +Po 0 55500 33500 56000 34000 80 -1 +De 0 0 2 0 800000 +Po 0 55500 33000 55500 33500 80 -1 +De 0 0 2 0 0 +Po 0 53000 32500 53500 33000 80 -1 +De 0 0 3 0 400000 +Po 0 54000 35500 56000 35500 80 -1 +De 0 0 3 0 800000 +Po 0 53500 35000 54000 35500 80 -1 +De 0 0 3 0 0 +Po 0 53500 33000 53500 35000 80 -1 +De 0 0 3 0 0 +Po 0 50000 32500 50500 32500 80 -1 +De 0 0 3 0 400000 +Po 0 52500 33000 53000 32500 80 -1 +De 0 0 3 0 800000 +Po 0 51000 33000 52500 33000 80 -1 +De 0 0 3 0 0 +Po 0 50500 32500 51000 33000 80 -1 +De 0 0 3 0 0 +Po 0 50000 34000 50500 34000 80 -1 +De 0 0 4 0 400000 +Po 0 52500 33500 53000 34000 80 -1 +De 0 0 4 0 800000 +Po 0 51000 33500 52500 33500 80 -1 +De 0 0 4 0 0 +Po 0 50500 34000 51000 33500 80 -1 +De 0 0 4 0 0 +Po 0 53000 35500 52500 35000 80 -1 +De 0 0 4 0 400000 +Po 0 52500 34500 53000 34000 80 -1 +De 0 0 4 0 800000 +Po 0 52500 35000 52500 34500 80 -1 +De 0 0 4 0 0 +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cir b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cir new file mode 100644 index 0000000..e2ac261 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:47:07 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 4 VPRINT1 +R3 2 4 1 +R4 2 3 1 +R1 4 3 1 +R2 4 0 1 +v2 2 0 10 +v1 3 0 5 + +.end diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt new file mode 100644 index 0000000..3a980a1 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt @@ -0,0 +1,13 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:47:07 am ist + +* Printing option vprint1 +r3 2 4 1 +r4 2 3 1 +r1 4 3 1 +r2 4 0 1 +v2 2 0 10 +v1 3 0 5 + +.op +.print v(4) +.end diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt.sol b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt.sol new file mode 100644 index 0000000..9332aad --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt.sol @@ -0,0 +1,8 @@ +Name Source Sink Voltage Current +---------------------------------------------------------- +R 2 4 0.0000000000 0.0000000000 +R 2 3 0.0000000000 0.0000000000 +R 4 3 0.0000000000 0.0000000000 +R 4 0 0.0000000000 0.0000000000 +V 2 0 0.0000000000 0.0000000000 +V 3 0 0.0000000000 0.0000000000 diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cir.out b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cir.out new file mode 100644 index 0000000..8ee50f6 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cir.out @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:47:07 am ist + +* Printing option vprint1 +r3 2 4 1 +r4 2 3 1 +r1 4 3 1 +r2 4 0 1 +v2 2 0 10 +v1 3 0 5 + +.op + +* Control Statements +.control +run +print v(4) +.endc +.end diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cmp b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cmp new file mode 100644 index 0000000..8d4d327 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.cmp @@ -0,0 +1,45 @@ +Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Monday 01 October 2012 11:03:36 AM IST + +BeginCmp +TimeStamp = /50692613; +Reference = R1; +ValeurCmp = 1; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /5067FEAC; +Reference = R2; +ValeurCmp = 1; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /50692628; +Reference = R3; +ValeurCmp = 1; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /5069261E; +Reference = R4; +ValeurCmp = 1; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /5067FE8A; +Reference = v1; +ValeurCmp = DC; +IdModule = R1; +EndCmp + +BeginCmp +TimeStamp = /5067FE8E; +Reference = v2; +ValeurCmp = DC; +IdModule = R1; +EndCmp + +EndListe diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.net b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.net new file mode 100644 index 0000000..997296f --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.net @@ -0,0 +1,80 @@ +# EESchema Netlist Version 1.1 created Monday 01 October 2012 11:23:34 AM IST +( + ( /50692628 $noname R3 1 {Lib=R} + ( 1 N-000003 ) + ( 2 N-000004 ) + ) + ( /5069261E $noname R4 1 {Lib=R} + ( 1 N-000003 ) + ( 2 N-000001 ) + ) + ( /50692613 $noname R1 1 {Lib=R} + ( 1 N-000004 ) + ( 2 N-000001 ) + ) + ( /5067FEAC $noname R2 1 {Lib=R} + ( 1 N-000004 ) + ( 2 GND ) + ) + ( /5067FE8E R3 v2 DC {Lib=DC} + ( 1 N-000003 ) + ( 2 GND ) + ) + ( /5067FE8A R3 v1 DC {Lib=DC} + ( 1 N-000001 ) + ( 2 GND ) + ) +) +* +{ Allowed footprints by component: +$component R3 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R4 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R2 + R? + SM0603 + SM0805 + R?-* +$endlist +$component v2 + 1_pin +$endlist +$component v1 + 1_pin +$endlist +$endfootprintlist +} +{ Pin List by Nets +Net 1 "" "" + R4 2 + R1 2 + v1 1 +Net 2 "GND" "GND" + v1 2 + v2 2 + R2 2 +Net 3 "" "" + v2 1 + R3 1 + R4 1 +Net 4 "" "" + R3 2 + R2 1 + R1 1 +} +#End diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.pro b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.pro new file mode 100644 index 0000000..fbe0707 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.pro @@ -0,0 +1,71 @@ +update=Monday 22 October 2012 03:55:41 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.proj b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.proj new file mode 100644 index 0000000..a5a0162 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.proj @@ -0,0 +1 @@ +schematicFile modifiedNodalExample.sch diff --git a/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.sch b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.sch new file mode 100644 index 0000000..634ee69 --- /dev/null +++ b/FreeEDA/Examples/modifiedNodalExample/modifiedNodalExample.sch @@ -0,0 +1,169 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:46:55 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:modifiedNodalExample-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5300 3200 5300 3250 +Connection ~ 5300 4250 +Wire Wire Line + 5300 4250 5300 4100 +Wire Wire Line + 5150 3050 5800 3050 +Wire Wire Line + 5800 3050 5800 3350 +Connection ~ 4950 4250 +Wire Wire Line + 4950 4050 4950 4250 +Connection ~ 4950 3350 +Wire Wire Line + 4850 3350 5050 3350 +Wire Wire Line + 4350 3350 4100 3350 +Wire Wire Line + 5800 3350 5550 3350 +Wire Wire Line + 4100 4250 5800 4250 +Wire Wire Line + 4100 3350 4100 3050 +Wire Wire Line + 4100 3050 4650 3050 +Wire Wire Line + 4750 4250 4750 4400 +Connection ~ 4750 4250 +Wire Wire Line + 4950 3550 4950 3250 +Wire Wire Line + 4950 3250 5300 3250 +$Comp +L VPRINT1 U1 +U 1 1 50692E86 +P 5300 2900 +F 0 "U1" H 5150 3000 50 0001 C CNN +F 1 "VPRINT1" H 5450 3000 50 0000 C CNN + 1 5300 2900 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 5069279A +P 5300 4100 +F 0 "#FLG01" H 5300 4370 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 4330 30 0000 C CNN + 1 5300 4100 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50692771 +P 4750 4400 +F 0 "#PWR02" H 4750 4400 30 0001 C CNN +F 1 "GND" H 4750 4330 30 0001 C CNN + 1 4750 4400 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50692628 +P 5300 3350 +F 0 "R3" V 5380 3350 50 0000 C CNN +F 1 "1" V 5300 3350 50 0000 C CNN + 1 5300 3350 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 5069261E +P 4900 3050 +F 0 "R4" V 4980 3050 50 0000 C CNN +F 1 "1" V 4900 3050 50 0000 C CNN + 1 4900 3050 + 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IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 10 +NoConn 8 +Di 35879 32459 45375 39121 +Ndraw 0 +Ntrack 7 +Nzone 0 +BoardThickness 630 +Nmodule 7 +Nnets 5 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "27 sep 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) 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b/FreeEDA/Examples/nodalExample/analysis @@ -0,0 +1 @@ +.op \ No newline at end of file diff --git a/FreeEDA/Examples/nodalExample/nodalExample-cache.bak b/FreeEDA/Examples/nodalExample/nodalExample-cache.bak new file mode 100644 index 0000000..f0c5c5f --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample-cache.bak @@ -0,0 +1,72 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:49:30 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vprint1 +# +DEF vprint1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/nodalExample/nodalExample-cache.lib b/FreeEDA/Examples/nodalExample/nodalExample-cache.lib new file mode 100644 index 0000000..e1bdb6e --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample-cache.lib @@ -0,0 +1,72 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:49:49 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vprint1 +# +DEF vprint1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/nodalExample/nodalExample.000 b/FreeEDA/Examples/nodalExample/nodalExample.000 new file mode 100644 index 0000000..d9787a7 --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample.000 @@ -0,0 +1,439 @@ +PCBNEW-BOARD Version 1 date Thursday 27 September 2012 03:41:37 PM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 10 +NoConn 0 +Di 37379 32459 45541 39121 +Ndraw 0 +Ntrack 31 +Nzone 0 +BoardThickness 630 +Nmodule 7 +Nnets 5 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "27 sep 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 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-1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000001" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 43500 36500 0 15 00200000 5064155D ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 5064155D +AR /50640DA8 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R3" +T1 0 0 550 500 0 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 39500 38500 0 15 00200000 5064259E ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 5064259E +AR /50640DAA +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R4" +T1 0 0 550 500 0 80 N I 21 N "2" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 43500 38500 0 15 00200000 50641561 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 50641561 +AR /50641261 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R5" +T1 0 0 550 500 0 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$TRACK +Po 0 38000 33500 38500 33000 80 -1 +De 0 0 1 0 400000 +Po 0 39000 33000 39500 33500 80 -1 +De 0 0 1 0 800000 +Po 0 38500 33000 39000 33000 80 -1 +De 0 0 1 0 0 +Po 0 45000 36500 45500 37000 80 -1 +De 0 0 1 0 400000 +Po 0 45500 38000 45000 38500 80 -1 +De 0 0 1 0 800000 +Po 0 45500 37000 45500 38000 80 -1 +De 0 0 1 0 0 +Po 0 45000 33500 45500 34000 80 -1 +De 0 0 1 0 400000 +Po 0 45500 36000 45000 36500 80 -1 +De 0 0 1 0 800000 +Po 0 45500 34000 45500 36000 80 -1 +De 0 0 1 0 0 +Po 0 39500 33500 40000 33500 80 -1 +De 0 0 1 0 400000 +Po 0 44000 32500 45000 33500 80 -1 +De 0 0 1 0 800000 +Po 0 41000 32500 44000 32500 80 -1 +De 0 0 1 0 0 +Po 0 40000 33500 41000 32500 80 -1 +De 0 0 1 0 0 +Po 0 42000 33500 43000 33500 80 -1 +De 0 0 2 0 400000 +Po 0 44500 35000 45000 35000 80 -1 +De 0 0 2 0 800000 +Po 0 43000 33500 44500 35000 80 -1 +De 0 0 2 0 0 +Po 0 39500 36500 40500 36500 80 -1 +De 0 0 2 0 400000 +Po 0 41000 34500 42000 33500 80 -1 +De 0 0 2 0 800000 +Po 0 41000 36000 41000 34500 80 -1 +De 0 0 2 0 0 +Po 0 40500 36500 41000 36000 80 -1 +De 0 0 2 0 0 +Po 0 41000 38500 41000 37500 80 -1 +De 0 0 3 0 400000 +Po 0 41000 37500 42000 36500 80 -1 +De 0 0 3 0 800000 +Po 0 42000 35000 41500 35500 80 -1 +De 0 0 3 0 400000 +Po 0 41500 36000 42000 36500 80 -1 +De 0 0 3 0 800000 +Po 0 41500 35500 41500 36000 80 -1 +De 0 0 3 0 0 +Po 0 42000 38500 41500 39000 80 -1 +De 0 0 4 0 400000 +Po 0 38500 39000 38000 38500 80 -1 +De 0 0 4 0 800000 +Po 0 41500 39000 38500 39000 80 -1 +De 0 0 4 0 0 +Po 0 38000 36500 37500 37000 80 -1 +De 0 0 4 0 400000 +Po 0 37500 38000 38000 38500 80 -1 +De 0 0 4 0 800000 +Po 0 37500 37000 37500 38000 80 -1 +De 0 0 4 0 0 +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/nodalExample/nodalExample.bak b/FreeEDA/Examples/nodalExample/nodalExample.bak new file mode 100644 index 0000000..60ad6aa --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample.bak @@ -0,0 +1,184 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:49:30 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:nodalExample-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "22 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 6100 2850 6100 3250 +Connection ~ 5600 4000 +Wire Wire Line + 5600 3900 5600 4000 +Connection ~ 6100 4000 +Wire Wire Line + 6100 3750 6100 4000 +Wire Wire Line + 7850 3900 7850 4000 +Wire Wire Line + 7850 4000 4700 4000 +Wire Wire Line + 4700 4000 4700 3950 +Connection ~ 5250 3000 +Wire Wire Line + 5250 3300 5250 3000 +Wire Wire Line + 5850 3000 6350 3000 +Wire Wire Line + 4700 3050 4700 3000 +Wire Wire Line + 4700 3000 5350 3000 +Wire Wire Line + 6850 3000 7850 3000 +Wire Wire Line + 7100 3200 7100 3000 +Connection ~ 7100 3000 +Connection ~ 6100 3000 +Wire Wire Line + 7100 3700 7100 4000 +Connection ~ 7100 4000 +Wire Wire Line + 5250 3800 5250 4000 +Connection ~ 5250 4000 +Wire Wire Line + 5450 4100 5450 4000 +Connection ~ 5450 4000 +$Comp +L VPRINT1 U1 +U 1 1 506489B3 +P 6100 2550 +F 0 "U1" H 5950 2650 50 0000 C CNN +F 1 "VPRINT1" H 6250 2650 50 0000 C CNN + 1 6100 2550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 50641423 +P 5450 4100 +F 0 "#PWR01" H 5450 4100 30 0001 C CNN +F 1 "GND" H 5450 4030 30 0001 C CNN + 1 5450 4100 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 506413F9 +P 5600 3900 +F 0 "#FLG02" H 5600 4170 30 0001 C CNN +F 1 "PWR_FLAG" H 5600 4130 30 0000 C CNN + 1 5600 3900 + 1 0 0 -1 +$EndComp +$Comp +L DC i2 +U 1 1 50641279 +P 7850 3450 +F 0 "i2" H 7650 3550 60 0000 C CNN +F 1 "1" H 7650 3400 60 0000 C CNN +F 2 "R3" H 7550 3450 60 0000 C CNN + 1 7850 3450 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 50641261 +P 7100 3450 +F 0 "R5" V 7180 3450 50 0000 C CNN +F 1 "1" V 7100 3450 50 0000 C CNN + 1 7100 3450 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50640DC3 +P 5600 3000 +F 0 "R2" V 5680 3000 50 0000 C CNN +F 1 "1" V 5600 3000 50 0000 C CNN + 1 5600 3000 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 50640DAA +P 6600 3000 +F 0 "R4" V 6680 3000 50 0000 C CNN +F 1 "2" V 6600 3000 50 0000 C CNN + 1 6600 3000 + 0 1 1 0 +$EndComp +$Comp +L R R3 +U 1 1 50640DA8 +P 6100 3500 +F 0 "R3" V 6180 3500 50 0000 C CNN +F 1 "1" V 6100 3500 50 0000 C CNN + 1 6100 3500 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50640DA0 +P 5250 3550 +F 0 "R1" V 5330 3550 50 0000 C CNN +F 1 "1" V 5250 3550 50 0000 C CNN + 1 5250 3550 + 1 0 0 -1 +$EndComp +$Comp +L DC i1 +U 1 1 5063F506 +P 4700 3500 +F 0 "i1" H 4500 3600 60 0000 C CNN +F 1 "1" H 4500 3450 60 0000 C CNN +F 2 "R3" H 4400 3500 60 0000 C CNN + 1 4700 3500 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/nodalExample/nodalExample.brd b/FreeEDA/Examples/nodalExample/nodalExample.brd new file mode 100644 index 0000000..375772b --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample.brd @@ -0,0 +1,423 @@ +PCBNEW-BOARD Version 1 date Sunday 30 September 2012 12:21:31 PM IST + +# Created by Pcbnew(2011-05-25)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 10 +NoConn 0 +Di 36959 32379 45541 37621 +Ndraw 0 +Ntrack 29 +Nzone 0 +BoardThickness 630 +Nmodule 7 +Nnets 5 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "30 sep 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000001" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000003" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 4 "N-000004" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "GND" +AddNet "N-000001" +AddNet "N-000003" +AddNet "N-000004" +$EndNCLASS +$MODULE R3 +Po 43500 33000 0 15 00200000 50641559 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 50641559 +AR /50640DA0 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R1" +T1 0 0 550 500 0 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000001" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 43500 35000 0 15 00200000 5064155B ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 5064155B +AR /50640DC3 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R2" +T1 0 0 550 500 0 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000001" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 43500 37000 0 15 00200000 5064155D ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 5064155D +AR /50640DA8 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R3" +T1 0 0 550 500 0 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 39000 35500 0 15 00200000 5064259E ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 5064259E +AR /50640DAA +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R4" +T1 0 0 550 500 0 80 N I 21 N "2" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 3 "N-000003" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R3 +Po 39000 37000 0 15 00200000 50641561 ~~ +Li R3 +Cd Resitance 3 pas +Kw R +Sc 50641561 +AR /50641261 +Op 0 A 0 +T0 0 0 550 500 0 80 N V 21 N "R5" +T1 0 0 550 500 0 80 N I 21 N "1" +DS -1500 0 -1300 0 120 21 +DS 1500 0 1300 0 120 21 +DS 1300 0 1300 -400 120 21 +DS 1300 -400 -1300 -400 120 21 +DS -1300 -400 -1300 400 120 21 +DS -1300 400 1300 400 120 21 +DS 1300 400 1300 0 120 21 +DS -1300 -200 -1100 -400 120 21 +$PAD +Sh "1" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -1500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 0 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 1500 0 +$EndPAD +$SHAPE3D +Na "discret/resistor.wrl" +Sc 0.300000 0.300000 0.300000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R3 +$MODULE R1 +Po 40000 33500 900 15 00200000 50641555 ~~ +Li R1 +Cd Resistance verticale +Kw R +Sc 50641555 +AR /5063F506 +Op A A 0 +T0 -400 1000 550 500 900 80 N V 21 N "i1" +T1 -450 1000 550 500 900 80 N I 21 N "DC" +DS -500 0 500 0 150 21 +DC -500 0 -250 500 150 21 +$PAD +Sh "1" C 550 550 0 0 900 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 2 "N-000001" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 900 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/verti_resistor.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R1 +$MODULE R1 +Po 38000 33500 900 15 00200000 50641557 ~~ +Li R1 +Cd Resistance verticale +Kw R +Sc 50641557 +AR /50641279 +Op A A 0 +T0 -400 1000 550 500 900 80 N V 21 N "i2" +T1 -450 1000 550 500 900 80 N I 21 N "DC" +DS -500 0 500 0 150 21 +DC -500 0 -250 500 150 21 +$PAD +Sh "1" C 550 550 0 0 900 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 4 "N-000004" +Po -500 0 +$EndPAD +$PAD +Sh "2" C 550 550 0 0 900 +Dr 320 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 500 0 +$EndPAD +$SHAPE3D +Na "discret/verti_resistor.wrl" +Sc 1.000000 1.000000 1.000000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE R1 +$TRACK +Po 0 40000 33000 40500 32500 80 -1 +De 0 0 1 0 400000 +Po 0 44500 32500 45000 33000 80 -1 +De 0 0 1 0 800000 +Po 0 40500 32500 44500 32500 80 -1 +De 0 0 1 0 0 +Po 0 38000 33000 38500 32500 80 -1 +De 0 0 1 0 400000 +Po 0 39500 32500 40000 33000 80 -1 +De 0 0 1 0 800000 +Po 0 38500 32500 39500 32500 80 -1 +De 0 0 1 0 0 +Po 0 40500 37000 41000 37000 80 -1 +De 0 0 1 0 400000 +Po 0 44500 37500 45000 37000 80 -1 +De 0 0 1 0 800000 +Po 0 41500 37500 44500 37500 80 -1 +De 0 0 1 0 0 +Po 0 41000 37000 41500 37500 80 -1 +De 0 0 1 0 0 +Po 0 45000 33000 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0 +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/nodalExample/nodalExample.cir b/FreeEDA/Examples/nodalExample/nodalExample.cir new file mode 100644 index 0000000..73cd5c1 --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample.cir @@ -0,0 +1,16 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:49:47 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 4 VPRINT1 +i2 1 0 1 +R5 1 0 1 +R2 4 3 1 +R4 1 4 2 +R3 4 0 1 +R1 3 0 1 +i1 3 0 1 + +.end diff --git a/FreeEDA/Examples/nodalExample/nodalExample.cir.ckt b/FreeEDA/Examples/nodalExample/nodalExample.cir.ckt new file mode 100644 index 0000000..84ba089 --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample.cir.ckt @@ -0,0 +1,14 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:49:47 am ist + +* Printing option vprint1 +i2 1 0 1 +r5 1 0 1 +r2 4 3 1 +r4 1 4 2 +r3 4 0 1 +r1 3 0 1 +i1 3 0 1 + +.op +.print v(4) +.end diff --git a/FreeEDA/Examples/nodalExample/nodalExample.cir.ckt.sol b/FreeEDA/Examples/nodalExample/nodalExample.cir.ckt.sol new file mode 100644 index 0000000..5c5bae8 --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample.cir.ckt.sol @@ -0,0 +1,9 @@ +Name Source Sink Voltage Current +---------------------------------------------------------- +I 1 0 0.0000000000 0.0000000000 +R 1 0 0.0000000000 0.0000000000 +R 4 3 0.0000000000 0.0000000000 +R 1 4 0.0000000000 0.0000000000 +R 4 0 0.0000000000 0.0000000000 +R 3 0 0.0000000000 0.0000000000 +I 3 0 0.0000000000 0.0000000000 diff --git a/FreeEDA/Examples/nodalExample/nodalExample.cir.out b/FreeEDA/Examples/nodalExample/nodalExample.cir.out new file mode 100644 index 0000000..c1fe81b --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample.cir.out @@ -0,0 +1,19 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:49:47 am ist + +* Printing option vprint1 +i2 1 0 1 +r5 1 0 1 +r2 4 3 1 +r4 1 4 2 +r3 4 0 1 +r1 3 0 1 +i1 3 0 1 + +.op + +* Control Statements +.control +run +print v(4) +.endc +.end diff --git a/FreeEDA/Examples/nodalExample/nodalExample.ckt b/FreeEDA/Examples/nodalExample/nodalExample.ckt new file mode 100644 index 0000000..41347f6 --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample.ckt @@ -0,0 +1,13 @@ +* eeschema netlist version 1.1 (spice format) +* creation date: thursday 27 september 2012 02:26:44 pm ist + +i2 4 0 dc 1 +r5 4 0 1 +r2 3 1 1 +r4 4 3 2 +r3 3 0 1 +r1 1 0 1 +i1 1 0 dc 1 +.op +.end + diff --git a/FreeEDA/Examples/nodalExample/nodalExample.ckt.sol b/FreeEDA/Examples/nodalExample/nodalExample.ckt.sol new file mode 100644 index 0000000..f7eb9ba --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample.ckt.sol @@ -0,0 +1,9 @@ +Name Source Sink Voltage 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R3; +EndCmp + +BeginCmp +TimeStamp = /50640DA8; +Reference = R3; +ValeurCmp = 1; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /50640DAA; +Reference = R4; +ValeurCmp = 2; +IdModule = R3; +EndCmp + +BeginCmp +TimeStamp = /50641261; +Reference = R5; +ValeurCmp = 1; +IdModule = R3; +EndCmp + +EndListe diff --git a/FreeEDA/Examples/nodalExample/nodalExample.net b/FreeEDA/Examples/nodalExample/nodalExample.net new file mode 100644 index 0000000..14f7e3f --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample.net @@ -0,0 +1,71 @@ +# EESchema Netlist Version 1.1 created Sunday 30 September 2012 12:14:32 PM IST +( + ( /5063F506 R1 i1 DC + ( 1 N-000001 ) + ( 2 GND ) + ) + ( /50641279 R1 i2 DC + ( 1 N-000004 ) + ( 2 GND ) + ) + ( /50640DA0 R3 R1 1 + ( 1 N-000001 ) + ( 2 GND ) + ) + ( /50640DC3 R3 R2 1 + ( 1 N-000003 ) + ( 2 N-000001 ) + ) + ( /50640DA8 R3 R3 1 + ( 1 N-000003 ) + ( 2 GND ) + ) + ( /50640DAA R3 R4 2 + ( 1 N-000004 ) + ( 2 N-000003 ) + ) + ( /50641261 R3 R5 1 + ( 1 N-000004 ) + ( 2 GND ) + ) +) +* +{ Allowed footprints by component: +$component i1 + 1_pin +$endlist +$component i2 + 1_pin +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R2 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R3 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R4 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R5 + R? + SM0603 + SM0805 + R?-* +$endlist +$endfootprintlist +} diff --git a/FreeEDA/Examples/nodalExample/nodalExample.pdf b/FreeEDA/Examples/nodalExample/nodalExample.pdf new file mode 100644 index 0000000..c5c0762 Binary files /dev/null and b/FreeEDA/Examples/nodalExample/nodalExample.pdf differ diff --git a/FreeEDA/Examples/nodalExample/nodalExample.pro b/FreeEDA/Examples/nodalExample/nodalExample.pro new file mode 100644 index 0000000..0a062dd --- /dev/null +++ b/FreeEDA/Examples/nodalExample/nodalExample.pro @@ -0,0 +1,71 @@ +update=Sunday 21 October 2012 11:22:58 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice 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Schematic File Version 2 date Monday 17 December 2012 11:49:49 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:nodalExample-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "22 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 6100 2850 6100 3250 +Connection ~ 5600 4000 +Wire Wire Line + 5600 3900 5600 4000 +Connection ~ 6100 4000 +Wire Wire Line + 6100 3750 6100 4000 +Wire Wire Line + 7850 3900 7850 4000 +Wire Wire Line + 7850 4000 4700 4000 +Wire Wire Line + 4700 4000 4700 3950 +Connection ~ 5250 3000 +Wire Wire Line + 5250 3300 5250 3000 +Wire Wire Line + 5850 3000 6350 3000 +Wire Wire Line + 4700 3050 4700 3000 +Wire Wire Line + 4700 3000 5350 3000 +Wire Wire Line + 6850 3000 7850 3000 +Wire Wire Line + 7100 3200 7100 3000 +Connection ~ 7100 3000 +Connection ~ 6100 3000 +Wire Wire Line + 7100 3700 7100 4000 +Connection ~ 7100 4000 +Wire Wire Line + 5250 3800 5250 4000 +Connection ~ 5250 4000 +Wire Wire Line + 5450 4100 5450 4000 +Connection ~ 5450 4000 +$Comp +L VPRINT1 U1 +U 1 1 506489B3 +P 6100 2550 +F 0 "U1" H 5950 2650 50 0000 C CNN +F 1 "VPRINT1" H 6250 2650 50 0000 C CNN + 1 6100 2550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 50641423 +P 5450 4100 +F 0 "#PWR01" H 5450 4100 30 0001 C CNN +F 1 "GND" H 5450 4030 30 0001 C CNN + 1 5450 4100 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 506413F9 +P 5600 3900 +F 0 "#FLG02" H 5600 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5250 3550 + 1 0 0 -1 +$EndComp +$Comp +L DC i1 +U 1 1 5063F506 +P 4700 3500 +F 0 "i1" H 4500 3600 60 0000 C CNN +F 1 "1" H 4500 3450 60 0000 C CNN +F 2 "R3" H 4400 3500 60 0000 C CNN + 1 4700 3500 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/nodalExample_plot/analysis b/FreeEDA/Examples/nodalExample_plot/analysis new file mode 100644 index 0000000..7dd51c6 --- /dev/null +++ b/FreeEDA/Examples/nodalExample_plot/analysis @@ -0,0 +1 @@ +.dc i1 0e-00 10e-00 1e-00 diff --git a/FreeEDA/Examples/nodalExample_plot/nodalExample_plot-cache.lib b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot-cache.lib new file mode 100644 index 0000000..532ca7e --- /dev/null +++ b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot-cache.lib @@ -0,0 +1,79 @@ +EESchema-LIBRARY Version 2.3 Date: Friday 24 May 2013 02:15:51 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.bak b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.bak new file mode 100644 index 0000000..c19435c --- /dev/null +++ b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.bak @@ -0,0 +1,187 @@ +EESchema Schematic File Version 2 date Friday 24 May 2013 02:14:17 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:nodalExample-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "24 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 6100 2850 6100 3250 +Connection ~ 5600 4000 +Wire Wire Line + 5600 3900 5600 4000 +Connection ~ 6100 4000 +Wire Wire Line + 6100 3750 6100 4000 +Wire Wire Line + 7850 3900 7850 4000 +Wire Wire Line + 7850 4000 4700 4000 +Wire Wire Line + 4700 4000 4700 3950 +Connection ~ 5250 3000 +Wire Wire Line + 5250 3300 5250 3000 +Wire Wire Line + 5850 3000 6350 3000 +Wire Wire Line + 4700 3050 4700 3000 +Wire Wire Line + 4700 3000 5350 3000 +Wire Wire Line + 6850 3000 7850 3000 +Wire Wire Line + 7100 3200 7100 3000 +Connection ~ 7100 3000 +Connection ~ 6100 3000 +Wire Wire Line + 7100 3700 7100 4000 +Connection ~ 7100 4000 +Wire Wire Line + 5250 3800 5250 4000 +Connection ~ 5250 4000 +Wire Wire Line + 5450 4100 5450 4000 +Connection ~ 5450 4000 +$Comp +L VPRINT1 U1 +U 1 1 506489B3 +P 6100 2550 +F 0 "U1" H 5950 2650 50 0000 C CNN +F 1 "VPRINT1" H 6250 2650 50 0000 C CNN + 1 6100 2550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 50641423 +P 5450 4100 +F 0 "#PWR01" H 5450 4100 30 0001 C CNN +F 1 "GND" H 5450 4030 30 0001 C CNN + 1 5450 4100 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 506413F9 +P 5600 3900 +F 0 "#FLG02" H 5600 4170 30 0001 C CNN +F 1 "PWR_FLAG" H 5600 4130 30 0000 C CNN + 1 5600 3900 + 1 0 0 -1 +$EndComp +$Comp +L DC i2 +U 1 1 50641279 +P 7850 3450 +F 0 "i2" H 7650 3550 60 0000 C CNN +F 1 "1" H 7650 3400 60 0000 C CNN +F 2 "R3" H 7550 3450 60 0000 C CNN + 1 7850 3450 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 50641261 +P 7100 3450 +F 0 "R5" V 7180 3450 50 0000 C CNN +F 1 "1" V 7100 3450 50 0000 C CNN + 1 7100 3450 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50640DC3 +P 5600 3000 +F 0 "R2" V 5680 3000 50 0000 C CNN +F 1 "1" V 5600 3000 50 0000 C CNN + 1 5600 3000 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 50640DAA +P 6600 3000 +F 0 "R4" V 6680 3000 50 0000 C CNN +F 1 "2" V 6600 3000 50 0000 C CNN + 1 6600 3000 + 0 1 1 0 +$EndComp +$Comp +L R R3 +U 1 1 50640DA8 +P 6100 3500 +F 0 "R3" V 6180 3500 50 0000 C CNN +F 1 "1" V 6100 3500 50 0000 C CNN + 1 6100 3500 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50640DA0 +P 5250 3550 +F 0 "R1" V 5330 3550 50 0000 C CNN +F 1 "1" V 5250 3550 50 0000 C CNN + 1 5250 3550 + 1 0 0 -1 +$EndComp +$Comp +L DC i1 +U 1 1 5063F506 +P 4700 3500 +F 0 "i1" H 4500 3600 60 0000 C CNN +F 1 "1" H 4500 3450 60 0000 C CNN +F 2 "R3" H 4400 3500 60 0000 C CNN + 1 4700 3500 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.cir b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.cir new file mode 100644 index 0000000..f2dda85 --- /dev/null +++ b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.cir @@ -0,0 +1,16 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 24 May 2013 02:18:18 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 4 VPLOT8_1 +i2 1 0 1 +R5 1 0 1 +R2 4 3 1 +R4 1 4 2 +R3 4 0 1 +R1 3 0 1 +i1 3 0 1 + +.end diff --git a/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.cir.ckt b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.cir.ckt new file mode 100644 index 0000000..219dd07 --- /dev/null +++ b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.cir.ckt @@ -0,0 +1,14 @@ +* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 02:18:18 pm ist + +* Plotting option vplot8_1 +i2 1 0 1 +r5 1 0 1 +r2 4 3 1 +r4 1 4 2 +r3 4 0 1 +r1 3 0 1 +i1 3 0 1 + +.dc i1 0e-00 10e-00 1e-00 +.plot v(4) +.end diff --git a/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.cir.out b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.cir.out new file mode 100644 index 0000000..a7809b6 --- /dev/null +++ b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.cir.out @@ -0,0 +1,19 @@ +* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 02:18:18 pm ist + +* Plotting option vplot8_1 +i2 1 0 1 +r5 1 0 1 +r2 4 3 1 +r4 1 4 2 +r3 4 0 1 +r1 3 0 1 +i1 3 0 1 + +.dc i1 0e-00 10e-00 1e-00 + +* Control Statements +.control +run +plot v(4) +.endc +.end diff --git a/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.pro b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.pro new file mode 100644 index 0000000..2ddb73c --- /dev/null +++ b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.pro @@ -0,0 +1,74 @@ +update=Friday 24 May 2013 02:15:07 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.proj b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.proj new file mode 100644 index 0000000..0f13a25 --- /dev/null +++ b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.proj @@ -0,0 +1 @@ +schematicFile nodalExample_plot.sch diff --git a/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.sch b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.sch new file mode 100644 index 0000000..4ac9466 --- /dev/null +++ b/FreeEDA/Examples/nodalExample_plot/nodalExample_plot.sch @@ -0,0 +1,186 @@ +EESchema Schematic File Version 2 date Friday 24 May 2013 02:15:51 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "24 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L VPLOT8_1 U1 +U 1 1 519F28A8 +P 6100 2550 +F 0 "U1" H 5950 2650 50 0000 C CNN +F 1 "VPLOT8_1" H 6250 2650 50 0000 C CNN + 1 6100 2550 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6100 2850 6100 3250 +Connection ~ 5600 4000 +Wire Wire Line + 5600 3900 5600 4000 +Connection ~ 6100 4000 +Wire Wire Line + 6100 3750 6100 4000 +Wire Wire Line + 7850 3900 7850 4000 +Wire Wire Line + 7850 4000 4700 4000 +Wire Wire Line + 4700 4000 4700 3950 +Connection ~ 5250 3000 +Wire Wire Line + 5250 3300 5250 3000 +Wire Wire Line + 5850 3000 6350 3000 +Wire Wire Line + 4700 3050 4700 3000 +Wire Wire Line + 4700 3000 5350 3000 +Wire Wire Line + 6850 3000 7850 3000 +Wire Wire Line + 7100 3200 7100 3000 +Connection ~ 7100 3000 +Connection ~ 6100 3000 +Wire Wire Line + 7100 3700 7100 4000 +Connection ~ 7100 4000 +Wire Wire Line + 5250 3800 5250 4000 +Connection ~ 5250 4000 +Wire Wire Line + 5450 4100 5450 4000 +Connection ~ 5450 4000 +$Comp +L GND #PWR1 +U 1 1 50641423 +P 5450 4100 +F 0 "#PWR1" H 5450 4100 30 0001 C CNN +F 1 "GND" H 5450 4030 30 0001 C CNN + 1 5450 4100 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG1 +U 1 1 506413F9 +P 5600 3900 +F 0 "#FLG1" H 5600 4170 30 0001 C CNN +F 1 "PWR_FLAG" H 5600 4130 30 0000 C CNN + 1 5600 3900 + 1 0 0 -1 +$EndComp +$Comp +L DC i2 +U 1 1 50641279 +P 7850 3450 +F 0 "i2" H 7650 3550 60 0000 C CNN +F 1 "1" H 7650 3400 60 0000 C CNN +F 2 "R3" H 7550 3450 60 0000 C CNN + 1 7850 3450 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 50641261 +P 7100 3450 +F 0 "R5" V 7180 3450 50 0000 C CNN +F 1 "1" V 7100 3450 50 0000 C CNN + 1 7100 3450 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50640DC3 +P 5600 3000 +F 0 "R2" V 5680 3000 50 0000 C CNN +F 1 "1" V 5600 3000 50 0000 C CNN + 1 5600 3000 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 50640DAA +P 6600 3000 +F 0 "R4" V 6680 3000 50 0000 C CNN +F 1 "2" V 6600 3000 50 0000 C CNN + 1 6600 3000 + 0 1 1 0 +$EndComp +$Comp +L R R3 +U 1 1 50640DA8 +P 6100 3500 +F 0 "R3" V 6180 3500 50 0000 C CNN +F 1 "1" V 6100 3500 50 0000 C CNN + 1 6100 3500 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50640DA0 +P 5250 3550 +F 0 "R1" V 5330 3550 50 0000 C CNN +F 1 "1" V 5250 3550 50 0000 C CNN + 1 5250 3550 + 1 0 0 -1 +$EndComp +$Comp +L DC i1 +U 1 1 5063F506 +P 4700 3500 +F 0 "i1" H 4500 3600 60 0000 C CNN +F 1 "1" H 4500 3450 60 0000 C CNN +F 2 "R3" H 4400 3500 60 0000 C CNN + 1 4700 3500 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/nonInvertingAmplifier/analysis b/FreeEDA/Examples/nonInvertingAmplifier/analysis new file mode 100644 index 0000000..888b3aa --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/analysis @@ -0,0 +1 @@ +.tran 100e-06 40e-03 0e-00 diff --git a/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier-cache.bak b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier-cache.bak new file mode 100644 index 0000000..036ee3a --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier-cache.bak @@ -0,0 +1,97 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:47:24 AM IST +#encoding utf-8 +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier-cache.lib b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier-cache.lib new file mode 100644 index 0000000..8835104 --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier-cache.lib @@ -0,0 +1,97 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:47:58 AM IST +#encoding utf-8 +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.bak b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.bak new file mode 100644 index 0000000..695fcbc --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.bak @@ -0,0 +1,199 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:47:24 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:nonInvertingAmplifier-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 4300 3300 +Wire Wire Line + 4300 3200 4300 3650 +Wire Wire Line + 5100 3300 5300 3300 +Wire Wire Line + 4600 3500 4600 3700 +Wire Wire Line + 5100 3500 5300 3500 +Connection ~ 6550 3400 +Wire Wire Line + 6300 3400 6850 3400 +Wire Wire Line + 6850 3100 6850 3650 +Connection ~ 6850 3400 +Connection ~ 4300 4650 +Wire Wire Line + 4300 4650 4600 4650 +Wire Wire Line + 4600 4650 4600 4400 +Wire Wire Line + 4300 4550 4300 4700 +Wire Wire Line + 6850 4150 6850 4400 +Wire Wire Line + 6050 4050 6550 4050 +Wire Wire Line + 6550 4050 6550 3400 +Wire Wire Line + 5200 3500 5200 4050 +Wire Wire Line + 5200 4050 5550 4050 +Connection ~ 5200 3500 +Wire Wire Line + 4300 3300 4600 3300 +$Comp +L R R? +U 1 1 50D14DC5 +P 4850 3300 +F 0 "R?" V 4930 3300 50 0000 C CNN +F 1 "1000" V 4850 3300 50 0000 C CNN + 1 4850 3300 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR01 +U 1 1 508240AD +P 6850 4400 +F 0 "#PWR01" H 6850 4400 30 0001 C CNN +F 1 "GND" H 6850 4330 30 0001 C CNN + 1 6850 4400 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 50CEB089 +P 6850 2800 +F 0 "U1" H 6700 2900 50 0000 C CNN +F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN + 2 6850 2800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50CEB075 +P 4300 2900 +F 0 "U1" H 4150 3000 50 0000 C CNN +F 1 "VPLOT8_1" H 4450 3000 50 0000 C CNN + 1 4300 2900 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 508245D2 +P 4600 4400 +F 0 "#FLG02" H 4600 4670 30 0001 C CNN +F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN + 1 4600 4400 + 1 0 0 -1 +$EndComp +$Comp +L UA741 X1 +U 1 1 50824595 +P 5800 3400 +F 0 "X1" H 5950 3550 60 0000 C CNN +F 1 "UA741" H 5950 3650 60 0000 C CNN + 1 5800 3400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 508240CB +P 4600 3700 +F 0 "#PWR03" H 4600 3700 30 0001 C CNN +F 1 "GND" H 4600 3630 30 0001 C CNN + 1 4600 3700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 508240B7 +P 4300 4700 +F 0 "#PWR04" H 4300 4700 30 0001 C CNN +F 1 "GND" H 4300 4630 30 0001 C CNN + 1 4300 4700 + 1 0 0 -1 +$EndComp +$Comp +L SINE v1 +U 1 1 50824091 +P 4300 4100 +F 0 "v1" H 4100 4200 60 0000 C CNN +F 1 "SINE" H 4100 4050 60 0000 C CNN +F 2 "R1" H 4000 4100 60 0000 C CNN + 1 4300 4100 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50824073 +P 6850 3900 +F 0 "R3" V 6930 3900 50 0000 C CNN +F 1 "10000" V 6850 3900 50 0000 C CNN + 1 6850 3900 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50824062 +P 4850 3500 +F 0 "R1" V 4930 3500 50 0000 C CNN +F 1 "1000" V 4850 3500 50 0000 C CNN + 1 4850 3500 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 50824045 +P 5800 4050 +F 0 "R2" V 5880 4050 50 0000 C CNN +F 1 "2000" V 5800 4050 50 0000 C CNN + 1 5800 4050 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir new file mode 100644 index 0000000..99dd1d0 --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 19 December 2012 10:47:55 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +R4 1 4 1000 +U1 4 3 VPLOT8_1 +X1 5 1 3 UA741 +v1 4 0 SINE +R3 3 0 10000 +R1 5 0 1000 +R2 3 5 2000 + +.end diff --git a/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.ckt b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.ckt new file mode 100644 index 0000000..1aac163 --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.ckt @@ -0,0 +1,14 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:47:55 am ist +.include ua741.sub + +r4 1 4 1000 +* Plotting option vplot8_1 +x1 5 1 3 ua741 +v1 4 0 sine(0 5 50 0 0) +r3 3 0 10000 +r1 5 0 1000 +r2 3 5 2000 + +.tran 100e-06 40e-03 0e-00 +.plot v(4) v(3) +.end diff --git a/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.out b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.out new file mode 100644 index 0000000..6417831 --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.out @@ -0,0 +1,19 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:47:55 am ist +.include ua741.sub + +r4 1 4 1000 +* Plotting option vplot8_1 +x1 5 1 3 ua741 +v1 4 0 sine(0 5 50 0 0) +r3 3 0 10000 +r1 5 0 1000 +r2 3 5 2000 + +.tran 100e-06 40e-03 0e-00 + +* Control Statements +.control +run +plot v(4) v(3) +.endc +.end diff --git a/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cmp b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cmp new file mode 100644 index 0000000..c3e04af --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cmp @@ -0,0 +1,38 @@ +Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Saturday 20 October 2012 11:59:17 AM IST + +BeginCmp +TimeStamp = /50824062; +Reference = R1; +ValeurCmp = 1000; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50824045; +Reference = R2; +ValeurCmp = 2000; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50824073; +Reference = R3; +ValeurCmp = 10000; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50824091; +Reference = v1; +ValeurCmp = SINE; +IdModule = R1; +EndCmp + +BeginCmp +TimeStamp = /50823E96; +Reference = X1; +ValeurCmp = LM741; +IdModule = DIP-8__300; +EndCmp + +EndListe diff --git a/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.net b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.net new file mode 100644 index 0000000..938591e --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.net @@ -0,0 +1,70 @@ +# EESchema Netlist Version 1.1 created Saturday 20 October 2012 12:03:26 PM IST +( + ( /50824595 $noname X1 UA741 {Lib=UA741} + ( 2 N-000004 ) + ( 3 GND ) + ( 6 N-000001 ) + ) + ( /50824091 R1 v1 SINE {Lib=SINE} + ( 1 N-000002 ) + ( 2 GND ) + ) + ( /50824073 $noname R3 10000 {Lib=R} + ( 1 N-000001 ) + ( 2 GND ) + ) + ( /50824062 $noname R1 1000 {Lib=R} + ( 1 N-000004 ) + ( 2 N-000002 ) + ) + ( /50824045 $noname R2 2000 {Lib=R} + ( 1 N-000001 ) + ( 2 N-000004 ) + ) +) +* +{ Allowed footprints by component: +$component X1 + DIP-8__300 +$endlist +$component v1 + 1_pin +$endlist +$component R3 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R2 + R? + SM0603 + SM0805 + R?-* +$endlist +$endfootprintlist +} +{ Pin List by Nets +Net 1 "" "" + R2 1 + X1 6 + R3 1 +Net 2 "" "" + R1 2 + v1 1 +Net 3 "GND" "GND" + X1 3 + v1 2 + R3 2 +Net 4 "" "" + X1 2 + R1 1 + R2 2 +} +#End diff --git a/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.pro b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.pro new file mode 100644 index 0000000..79ab0d5 --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.pro @@ -0,0 +1,72 @@ +update=Monday 17 December 2012 06:16:29 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice diff --git a/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.proj b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.proj new file mode 100644 index 0000000..c78c533 --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.proj @@ -0,0 +1 @@ +schematicFile InvertingAmplifier.sch diff --git a/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.sch b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.sch new file mode 100644 index 0000000..df340bb --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/nonInvertingAmplifier.sch @@ -0,0 +1,199 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:47:58 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:nonInvertingAmplifier-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 4300 3300 +Wire Wire Line + 4300 3200 4300 3650 +Wire Wire Line + 5100 3300 5300 3300 +Wire Wire Line + 4600 3500 4600 3700 +Wire Wire Line + 5100 3500 5300 3500 +Connection ~ 6550 3400 +Wire Wire Line + 6300 3400 6850 3400 +Wire Wire Line + 6850 3100 6850 3650 +Connection ~ 6850 3400 +Connection ~ 4300 4650 +Wire Wire Line + 4300 4650 4600 4650 +Wire Wire Line + 4600 4650 4600 4400 +Wire Wire Line + 4300 4550 4300 4700 +Wire Wire Line + 6850 4150 6850 4400 +Wire Wire Line + 6050 4050 6550 4050 +Wire Wire Line + 6550 4050 6550 3400 +Wire Wire Line + 5200 3500 5200 4050 +Wire Wire Line + 5200 4050 5550 4050 +Connection ~ 5200 3500 +Wire Wire Line + 4300 3300 4600 3300 +$Comp +L R R4 +U 1 1 50D14DC5 +P 4850 3300 +F 0 "R4" V 4930 3300 50 0000 C CNN +F 1 "1000" V 4850 3300 50 0000 C CNN + 1 4850 3300 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR01 +U 1 1 508240AD +P 6850 4400 +F 0 "#PWR01" H 6850 4400 30 0001 C CNN +F 1 "GND" H 6850 4330 30 0001 C CNN + 1 6850 4400 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 50CEB089 +P 6850 2800 +F 0 "U1" H 6700 2900 50 0000 C CNN +F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN + 2 6850 2800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50CEB075 +P 4300 2900 +F 0 "U1" H 4150 3000 50 0000 C CNN +F 1 "VPLOT8_1" H 4450 3000 50 0000 C CNN + 1 4300 2900 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 508245D2 +P 4600 4400 +F 0 "#FLG02" H 4600 4670 30 0001 C CNN +F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN + 1 4600 4400 + 1 0 0 -1 +$EndComp +$Comp +L UA741 X1 +U 1 1 50824595 +P 5800 3400 +F 0 "X1" H 5950 3550 60 0000 C CNN +F 1 "UA741" H 5950 3650 60 0000 C CNN + 1 5800 3400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 508240CB +P 4600 3700 +F 0 "#PWR03" H 4600 3700 30 0001 C CNN +F 1 "GND" H 4600 3630 30 0001 C CNN + 1 4600 3700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 508240B7 +P 4300 4700 +F 0 "#PWR04" H 4300 4700 30 0001 C CNN +F 1 "GND" H 4300 4630 30 0001 C CNN + 1 4300 4700 + 1 0 0 -1 +$EndComp +$Comp +L SINE v1 +U 1 1 50824091 +P 4300 4100 +F 0 "v1" H 4100 4200 60 0000 C CNN +F 1 "SINE" H 4100 4050 60 0000 C CNN +F 2 "R1" H 4000 4100 60 0000 C CNN + 1 4300 4100 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50824073 +P 6850 3900 +F 0 "R3" V 6930 3900 50 0000 C CNN +F 1 "10000" V 6850 3900 50 0000 C CNN + 1 6850 3900 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50824062 +P 4850 3500 +F 0 "R1" V 4930 3500 50 0000 C CNN +F 1 "1000" V 4850 3500 50 0000 C CNN + 1 4850 3500 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 50824045 +P 5800 4050 +F 0 "R2" V 5880 4050 50 0000 C CNN +F 1 "2000" V 5800 4050 50 0000 C CNN + 1 5800 4050 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/nonInvertingAmplifier/ua741-cache.bak b/FreeEDA/Examples/nonInvertingAmplifier/ua741-cache.bak new file mode 100644 index 0000000..e2ece32 --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/ua741-cache.bak @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:17:01 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/nonInvertingAmplifier/ua741-cache.lib b/FreeEDA/Examples/nonInvertingAmplifier/ua741-cache.lib new file mode 100644 index 0000000..cbec3a5 --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/ua741-cache.lib @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:15:16 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/nonInvertingAmplifier/ua741.bak b/FreeEDA/Examples/nonInvertingAmplifier/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/nonInvertingAmplifier/ua741.cir b/FreeEDA/Examples/nonInvertingAmplifier/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/Examples/nonInvertingAmplifier/ua741.cir.ckt b/FreeEDA/Examples/nonInvertingAmplifier/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/nonInvertingAmplifier/ua741.cir.out b/FreeEDA/Examples/nonInvertingAmplifier/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/nonInvertingAmplifier/ua741.pro b/FreeEDA/Examples/nonInvertingAmplifier/ua741.pro new file mode 100644 index 0000000..5dbb81a --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/ua741.pro @@ -0,0 +1,72 @@ +update=Monday 17 December 2012 06:14:06 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice diff --git a/FreeEDA/Examples/nonInvertingAmplifier/ua741.sch b/FreeEDA/Examples/nonInvertingAmplifier/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/nonInvertingAmplifier/ua741.sub b/FreeEDA/Examples/nonInvertingAmplifier/ua741.sub new file mode 100644 index 0000000..1edba9f --- /dev/null +++ b/FreeEDA/Examples/nonInvertingAmplifier/ua741.sub @@ -0,0 +1,11 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 + +.ends ua741 \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/analysis b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/analysis new file mode 100644 index 0000000..ea22c29 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/analysis @@ -0,0 +1 @@ +.tran 1e-00 3e-00 0e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.bak new file mode 100644 index 0000000..c0bd60e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.bak @@ -0,0 +1,145 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 07 May 2013 12:28:25 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PNP +# +DEF PNP Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 60 H V R CNN +F1 "PNP" 0 150 60 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 F +P 3 0 1 0 25 -25 0 0 0 0 N +P 3 0 1 0 100 -100 65 -65 65 -65 N +P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.lib new file mode 100644 index 0000000..dfad98c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.lib @@ -0,0 +1,145 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 02:05:36 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PNP +# +DEF PNP Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 60 H V R CNN +F1 "PNP" 0 150 60 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 F +P 3 0 1 0 25 -25 0 0 0 0 N +P 3 0 1 0 100 -100 65 -65 65 -65 N +P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.bak b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.bak new file mode 100644 index 0000000..025172a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.bak @@ -0,0 +1,193 @@ +EESchema Schematic File Version 2 date Tuesday 07 May 2013 12:28:25 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_12.8-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "7 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 8250 2800 8400 2800 +Connection ~ 7000 2750 +Wire Wire Line + 8600 2250 8600 2000 +Wire Wire Line + 8600 2000 7500 2000 +Wire Wire Line + 6900 3650 7900 3650 +Wire Wire Line + 7750 3650 7750 3300 +Wire Wire Line + 7500 2000 7500 2200 +Connection ~ 7200 2750 +Wire Wire Line + 7200 2750 6900 2750 +Wire Wire Line + 7750 2800 7750 2750 +Connection ~ 7500 2750 +Wire Wire Line + 7750 2750 7500 2750 +Wire Wire Line + 7500 2600 7500 2850 +Wire Wire Line + 7200 2400 7200 3050 +Connection ~ 7750 2750 +Wire Wire Line + 7500 3250 7500 3450 +Connection ~ 7750 3650 +Wire Wire Line + 7500 3450 8600 3450 +Wire Wire Line + 8600 3450 8600 3150 +Wire Wire Line + 7750 3300 8400 3300 +$Comp +L IPLOT U1 +U 1 1 5188A5F5 +P 8000 2800 +F 0 "U1" H 7850 2900 50 0000 C CNN +F 1 "IPLOT" H 8150 2900 50 0000 C CNN + 1 8000 2800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 5188A185 +P 7750 2450 +F 0 "U2" H 7600 2550 50 0000 C CNN +F 1 "VPLOT8_1" H 7900 2550 50 0000 C CNN + 2 7750 2450 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 51889CD8 +P 7000 2450 +F 0 "U2" H 6850 2550 50 0000 C CNN +F 1 "VPLOT8_1" H 7150 2550 50 0000 C CNN + 1 7000 2450 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 518897EF +P 7200 2750 +F 0 "#FLG01" H 7200 3020 30 0001 C CNN +F 1 "PWR_FLAG" H 7200 2980 30 0000 C CNN + 1 7200 2750 + 1 0 0 -1 +$EndComp +$Comp +L SINE v1 +U 1 1 51889574 +P 6900 3200 +F 0 "v1" H 6700 3300 60 0000 C CNN +F 1 "SINE" H 6700 3150 60 0000 C CNN +F 2 "R1" H 6600 3200 60 0000 C CNN + 1 6900 3200 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 51889502 +P 7750 3650 +F 0 "#FLG02" H 7750 3920 30 0001 C CNN +F 1 "PWR_FLAG" H 7750 3880 30 0000 C CNN + 1 7750 3650 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 518894F5 +P 7900 3650 +F 0 "#PWR03" H 7900 3650 30 0001 C CNN +F 1 "GND" H 7900 3580 30 0001 C CNN + 1 7900 3650 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 518894AB +P 8600 2700 +F 0 "v2" H 8400 2800 60 0000 C CNN +F 1 "23" H 8400 2650 60 0000 C CNN +F 2 "R1" H 8300 2700 60 0000 C CNN + 1 8600 2700 + -1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5188943C +P 8400 3050 +F 0 "R1" V 8480 3050 50 0000 C CNN +F 1 "8" V 8400 3050 50 0000 C CNN + 1 8400 3050 + 1 0 0 -1 +$EndComp +$Comp +L PNP Q2 +U 1 1 518893FC +P 7400 3050 +F 0 "Q2" H 7400 2900 60 0000 R CNN +F 1 "PNP" H 7400 3200 60 0000 R CNN + 1 7400 3050 + 1 0 0 1 +$EndComp +$Comp +L NPN Q1 +U 1 1 518893F7 +P 7400 2400 +F 0 "Q1" H 7400 2250 50 0000 R CNN +F 1 "NPN" H 7400 2550 50 0000 R CNN + 1 7400 2400 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir new file mode 100644 index 0000000..93fe4d6 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir @@ -0,0 +1,16 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 02:05:33 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v3 0 5 23 +U1 6 4 IPLOT +U2 2 6 VPLOT8_1 +v1 2 0 SINE +v2 1 0 23 +R1 4 0 8 +Q2 6 2 5 PNP +Q1 6 2 1 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.ckt new file mode 100644 index 0000000..903850c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.ckt @@ -0,0 +1,15 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 02:05:33 pm ist + +v3 0 5 23 +V_u1 6 4 0 +* Plotting option vplot8_1 +v1 2 0 sine( 17.9 1000 ) +v2 1 0 23 +r1 4 0 8 +q2 5 2 6 pnp +q1 1 2 6 npn + +.tran 1e-00 3e-00 0e-00 +.plot i(V_u1) +.plot v(2) v(6) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.out b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.out new file mode 100644 index 0000000..061ce43 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.out @@ -0,0 +1,20 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 02:05:33 pm ist + +v3 0 5 23 +V_u1 6 4 0 +* Plotting option vplot8_1 +v1 2 0 sine( 17.9 1000 ) +v2 1 0 23 +r1 4 0 8 +q2 5 2 6 pnp +q1 1 2 6 npn + +.tran 1e-00 3e-00 0e-00 + +* Control Statements +.control +run +plot i(V_u1) +plot v(2) v(6) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.pro b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.pro new file mode 100644 index 0000000..f7e6c3e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.pro @@ -0,0 +1,74 @@ +update=Tuesday 07 May 2013 11:10:57 AM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.proj b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.proj new file mode 100644 index 0000000..fdaaf23 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.proj @@ -0,0 +1 @@ +schematicFile example_12.8.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.sch b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.sch new file mode 100644 index 0000000..15b79e2 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.sch @@ -0,0 +1,221 @@ +EESchema Schematic File Version 2 date Monday 13 May 2013 02:05:36 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_12.8-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "13 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L GND #PWR01 +U 1 1 5190A5AD +P 9250 2600 +F 0 "#PWR01" H 9250 2600 30 0001 C CNN +F 1 "GND" H 9250 2530 30 0001 C CNN + 1 9250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 8950 2600 +Wire Wire Line + 8950 2600 9250 2600 +Wire Wire Line + 8950 3600 8600 3600 +Wire Wire Line + 8600 3600 8600 3450 +Wire Wire Line + 8250 2800 8400 2800 +Connection ~ 7000 2750 +Wire Wire Line + 7500 2000 8600 2000 +Wire Wire Line + 6900 3650 7900 3650 +Wire Wire Line + 7750 3650 7750 3300 +Wire Wire Line + 7500 2000 7500 2200 +Connection ~ 7200 2750 +Wire Wire Line + 7200 2750 6900 2750 +Wire Wire Line + 7750 2800 7750 2750 +Connection ~ 7500 2750 +Wire Wire Line + 7750 2750 7500 2750 +Wire Wire Line + 7500 2600 7500 2850 +Wire Wire Line + 7200 2400 7200 3050 +Connection ~ 7750 2750 +Wire Wire Line + 7500 3250 7500 3450 +Connection ~ 7750 3650 +Wire Wire Line + 7500 3450 8600 3450 +Wire Wire Line + 7750 3300 8400 3300 +Wire Wire Line + 8600 2000 8600 1600 +Wire Wire Line + 8600 1600 8950 1600 +Wire Wire Line + 8950 2500 8950 2700 +$Comp +L DC v3 +U 1 1 5190A59B +P 8950 3150 +F 0 "v3" H 8750 3250 60 0000 C CNN +F 1 "23" H 8750 3100 60 0000 C CNN +F 2 "R1" H 8650 3150 60 0000 C CNN + 1 8950 3150 + -1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 5188A5F5 +P 8000 2800 +F 0 "U1" H 7850 2900 50 0000 C CNN +F 1 "IPLOT" H 8150 2900 50 0000 C CNN + 1 8000 2800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 5188A185 +P 7750 2450 +F 0 "U2" H 7600 2550 50 0000 C CNN +F 1 "VPLOT8_1" H 7900 2550 50 0000 C CNN + 2 7750 2450 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 51889CD8 +P 7000 2450 +F 0 "U2" H 6850 2550 50 0000 C CNN +F 1 "VPLOT8_1" H 7150 2550 50 0000 C CNN + 1 7000 2450 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 518897EF +P 7200 2750 +F 0 "#FLG02" H 7200 3020 30 0001 C CNN +F 1 "PWR_FLAG" H 7200 2980 30 0000 C CNN + 1 7200 2750 + 1 0 0 -1 +$EndComp +$Comp +L SINE v1 +U 1 1 51889574 +P 6900 3200 +F 0 "v1" H 6700 3300 60 0000 C CNN +F 1 "SINE" H 6700 3150 60 0000 C CNN +F 2 "R1" H 6600 3200 60 0000 C CNN + 1 6900 3200 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG03 +U 1 1 51889502 +P 7750 3650 +F 0 "#FLG03" H 7750 3920 30 0001 C CNN +F 1 "PWR_FLAG" H 7750 3880 30 0000 C CNN + 1 7750 3650 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 518894F5 +P 7900 3650 +F 0 "#PWR04" H 7900 3650 30 0001 C CNN +F 1 "GND" H 7900 3580 30 0001 C CNN + 1 7900 3650 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 518894AB +P 8950 2050 +F 0 "v2" H 8750 2150 60 0000 C CNN +F 1 "23" H 8750 2000 60 0000 C CNN +F 2 "R1" H 8650 2050 60 0000 C CNN + 1 8950 2050 + -1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5188943C +P 8400 3050 +F 0 "R1" V 8480 3050 50 0000 C CNN +F 1 "8" V 8400 3050 50 0000 C CNN + 1 8400 3050 + 1 0 0 -1 +$EndComp +$Comp +L PNP Q2 +U 1 1 518893FC +P 7400 3050 +F 0 "Q2" H 7400 2900 60 0000 R CNN +F 1 "PNP" H 7400 3200 60 0000 R CNN + 1 7400 3050 + 1 0 0 1 +$EndComp +$Comp +L NPN Q1 +U 1 1 518893F7 +P 7400 2400 +F 0 "Q1" H 7400 2250 50 0000 R CNN +F 1 "NPN" H 7400 2550 50 0000 R CNN + 1 7400 2400 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/1n4007.lib b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/1n4007.lib new file mode 100644 index 0000000..89d421d --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/1n4007.lib @@ -0,0 +1,2 @@ +.model 1n4007 D( IS=7.02767e-09 RS=0.0341512 N=1.80803 EG=1.05743 XTI=5 BV=1000 IBV=5e-08 CJO=1E-11 ++VJ=0.7 M=0.5 FC=0.5 TT=1E-07 KF=0 AF=1 ) diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/analysis b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/analysis new file mode 100644 index 0000000..09ae223 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/analysis @@ -0,0 +1 @@ +.tran 10e-03 1e-01 0e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.bak new file mode 100644 index 0000000..a47b560 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.bak @@ -0,0 +1,108 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 11:21:47 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.lib new file mode 100644 index 0000000..6d1cabe --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.lib @@ -0,0 +1,108 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 11:52:16 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.bak b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.bak new file mode 100644 index 0000000..3314c60 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.bak @@ -0,0 +1,133 @@ +EESchema Schematic File Version 2 date Tuesday 14 May 2013 11:21:47 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:example_2.1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "14 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5750 5050 +Wire Wire Line + 5550 3150 5650 3150 +Wire Wire Line + 5050 4550 5050 5050 +Wire Wire Line + 6500 4900 6500 5050 +Wire Wire Line + 6050 3150 6500 3150 +Wire Wire Line + 5750 5050 5750 5800 +Connection ~ 5750 5550 +Connection ~ 6500 3150 +Wire Wire Line + 6500 3150 6500 3350 +Wire Wire Line + 6500 3850 6500 4000 +Wire Wire Line + 5050 3150 5050 3650 +Wire Wire Line + 6500 5050 5050 5050 +$Comp +L DC v2 +U 1 1 516BA020 +P 6500 4450 +F 0 "v2" H 6300 4550 60 0000 C CNN +F 1 "DC" H 6300 4400 60 0000 C CNN +F 2 "R1" H 6200 4450 60 0000 C CNN + 1 6500 4450 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 5167CC3A +P 5750 5550 +F 0 "#FLG01" H 5750 5645 30 0001 C CNN +F 1 "PWR_FLAG" H 5750 5730 30 0000 C CNN + 1 5750 5550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5167CC15 +P 5750 5800 +F 0 "#PWR02" H 5750 5800 30 0001 C CNN +F 1 "GND" H 5750 5730 30 0001 C CNN + 1 5750 5800 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 5166A34A +P 6500 3600 +F 0 "U1" H 6350 3700 50 0000 C CNN +F 1 "IPLOT" H 6650 3700 50 0000 C CNN + 1 6500 3600 + 0 1 1 0 +$EndComp +$Comp +L DIODE D1 +U 1 1 5166A210 +P 5850 3150 +F 0 "D1" H 5850 3250 40 0000 C CNN +F 1 "DIODE" H 5850 3050 40 0000 C CNN + 1 5850 3150 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5166A1EB +P 5300 3150 +F 0 "R1" V 5380 3150 50 0000 C CNN +F 1 "100" V 5300 3150 50 0000 C CNN + 1 5300 3150 + 0 -1 -1 0 +$EndComp +$Comp +L SINE v1 +U 1 1 5166A1AC +P 5050 4100 +F 0 "v1" H 4850 4200 60 0000 C CNN +F 1 "SINE" H 4850 4050 60 0000 C CNN +F 2 "R1" H 4750 4100 60 0000 C CNN + 1 5050 4100 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.brd b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.brd new file mode 100644 index 0000000..bf4bd89 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.brd @@ -0,0 +1,172 @@ +PCBNEW-BOARD Version 1 date Friday 12 April 2013 02:43:29 PM IST + +# Created by Pcbnew(2012-apr-16-27)-stable + +$GENERAL +encoding utf-8 +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FFF8001 +Links 0 +NoConn 0 +Di 40424 25540 76751 39450 +Ndraw 0 +Ntrack 0 +Nzone 0 +BoardThickness 630 +Nmodule 2 +Nnets 4 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "12 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 80 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 150 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 120 +TextPcbSize 600 800 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000018" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000019" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "GND" +AddNet "N-000018" +AddNet "N-000019" +$EndNCLASS +$MODULE 1pin +Po 41500 38000 0 15 00200000 5167CFD9 ~~ +Li 1pin +Cd module 1 pin (ou trou mecanique de percage) +Kw DEV +Sc 5167CFD9 +AR 1pin +Op 0 0 0 +T0 0 -1200 400 400 0 100 N V 21 N "1PIN" +T1 0 1100 400 400 0 100 N I 21 N "P***" +DC 0 0 0 -900 150 21 +$PAD +Sh "1" C 1600 1600 0 0 0 +Dr 1200 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po 0 0 +$EndPAD +$EndMODULE 1pin +$MODULE 3PIN_6mm +Po 68000 29000 0 15 00200000 5167CFEC ~~ +Li 3PIN_6mm +Cd module 2 pin (trou 6 mm) +Kw DEV +Sc 5167CFEC +AR +Op 0 0 0 +T0 4000 -3000 600 600 0 120 N V 21 N "K1" +T1 -3000 -3000 600 600 0 120 N V 21 N "CONN_3" +DS -8500 -2500 8500 -2500 150 21 +DS 8500 -2500 8500 2500 150 21 +DS 8500 2500 -8500 2500 150 21 +DS -8500 2500 -8500 -2500 150 21 +$PAD +Sh "1" C 4000 4000 0 0 0 +Dr 2400 0 0 +At STD N 00E0FFFF +Ne 2 "N-000018" +Po -5900 0 +$EndPAD +$PAD +Sh "3" C 4000 4000 0 0 0 +Dr 2400 0 0 +At STD N 00E0FFFF +Ne 3 "N-000019" +Po 5900 0 +$EndPAD +$PAD +Sh "2" C 4000 4000 0 0 0 +Dr 2400 0 0 +At STD N 00E0FFFF +Ne 1 "GND" +Po 0 0 +$EndPAD +$SHAPE3D +Na "device/douille_4mm(black).wrl" +Sc 1.800000 1.800000 1.800000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$SHAPE3D +Na "device/douille_4mm(red).wrl" +Sc 1.800000 1.800000 1.800000 +Of -0.590000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$SHAPE3D +Na "device/douille_4mm(green).wrl" +Sc 1.800000 1.800000 1.800000 +Of 0.590000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE 3PIN_6mm +$TRACK +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir new file mode 100644 index 0000000..16861f7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir @@ -0,0 +1,13 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 12:08:03 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v2 1 0 DC +U1 3 1 IPLOT +D1 5 3 DIODE +R1 2 5 100 +v1 2 0 SINE + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.ckt new file mode 100644 index 0000000..6d02b34 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.ckt @@ -0,0 +1,11 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 12:08:03 pm ist + +v2 1 0 dc 12 +V_u1 3 1 0 +d1 5 3 diode +r1 2 5 100 +v1 2 0 sine(0 24 50 0 0) + +.tran 10e-03 1e-01 0e-00 +.plot i(V_u1) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.out b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.out new file mode 100644 index 0000000..52cc067 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.out @@ -0,0 +1,16 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 12:08:03 pm ist + +v2 1 0 dc 12 +V_u1 3 1 0 +d1 5 3 diode +r1 2 5 100 +v1 2 0 sine(0 24 50 0 0) + +.tran 10e-03 1e-01 0e-00 + +* Control Statements +.control +run +plot i(V_u1) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cmp b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cmp new file mode 100644 index 0000000..779ff51 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cmp @@ -0,0 +1,38 @@ +Cmp-Mod V01 Created by CvPcb (2012-apr-16-27)-stable date = Friday 12 April 2013 02:41:23 PM IST + +BeginCmp +TimeStamp = /5166A210; +Reference = D1; +ValeurCmp = DIODE; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /5166A1EB; +Reference = R1; +ValeurCmp = 100; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /5166A34A; +Reference = U1; +ValeurCmp = IPLOT; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /5166A1AC; +Reference = v1; +ValeurCmp = SINE; +IdModule = R1; +EndCmp + +BeginCmp +TimeStamp = /5166A26E; +Reference = v2; +ValeurCmp = 12V; +IdModule = R1; +EndCmp + +EndListe diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.net b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.net new file mode 100644 index 0000000..eeea8db --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.net @@ -0,0 +1,44 @@ +# EESchema Netlist Version 1.1 created Friday 12 April 2013 02:41:23 PM IST +( + ( /5166A210 $noname$ D1 DIODE + ( 1 N-000002 ) + ( 2 N-000004 ) + ) + ( /5166A1EB $noname$ R1 100 + ( 1 N-000001 ) + ( 2 N-000002 ) + ) + ( /5166A34A $noname$ U1 IPLOT + ( 1 N-000004 ) + ( 2 N-000003 ) + ) + ( /5166A1AC R1 v1 SINE + ( 1 N-000001 ) + ( 2 GND ) + ) + ( /5166A26E R1 v2 12V + ( 1 N-000003 ) + ( 2 GND ) + ) +) +* +{ Allowed footprints by component: +$component D1 + D? + S* +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* + SM1206 +$endlist +$component v1 + 1_pin +$endlist +$component v2 + 1_pin +$endlist +$endfootprintlist +} diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.pro b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.pro new file mode 100644 index 0000000..a447e05 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.pro @@ -0,0 +1,74 @@ +update=Thursday 11 April 2013 05:12:20 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/ambikeshwar/FreeEDA/library/analogSpice +LibName32=/home/ambikeshwar/FreeEDA/library/analogXSpice +LibName33=/home/ambikeshwar/FreeEDA/library/convergenceAidSpice +LibName34=/home/ambikeshwar/FreeEDA/library/converterSpice +LibName35=/home/ambikeshwar/FreeEDA/library/digitalSpice +LibName36=/home/ambikeshwar/FreeEDA/library/digitalXSpice +LibName37=/home/ambikeshwar/FreeEDA/library/linearSpice +LibName38=/home/ambikeshwar/FreeEDA/library/measurementSpice +LibName39=/home/ambikeshwar/FreeEDA/library/portSpice +LibName40=/home/ambikeshwar/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.proj b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.proj new file mode 100644 index 0000000..3cb5076 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.proj @@ -0,0 +1 @@ +schematicFile example_2.1.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.sch b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.sch new file mode 100644 index 0000000..dfa5e1d --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.sch @@ -0,0 +1,133 @@ +EESchema Schematic File Version 2 date Tuesday 14 May 2013 11:52:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:example_2.1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "14 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5750 5050 +Wire Wire Line + 5550 3150 5650 3150 +Wire Wire Line + 5050 4550 5050 5050 +Wire Wire Line + 6500 4900 6500 5050 +Wire Wire Line + 6050 3150 6500 3150 +Wire Wire Line + 5750 5050 5750 5800 +Connection ~ 5750 5550 +Connection ~ 6500 3150 +Wire Wire Line + 6500 3150 6500 3350 +Wire Wire Line + 6500 3850 6500 4000 +Wire Wire Line + 5050 3150 5050 3650 +Wire Wire Line + 6500 5050 5050 5050 +$Comp +L DC v2 +U 1 1 516BA020 +P 6500 4450 +F 0 "v2" H 6300 4550 60 0000 C CNN +F 1 "DC" H 6300 4400 60 0000 C CNN +F 2 "R1" H 6200 4450 60 0000 C CNN + 1 6500 4450 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 5167CC3A +P 5750 5550 +F 0 "#FLG01" H 5750 5645 30 0001 C CNN +F 1 "PWR_FLAG" H 5750 5730 30 0000 C CNN + 1 5750 5550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5167CC15 +P 5750 5800 +F 0 "#PWR02" H 5750 5800 30 0001 C CNN +F 1 "GND" H 5750 5730 30 0001 C CNN + 1 5750 5800 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 5166A34A +P 6500 3600 +F 0 "U1" H 6350 3700 50 0000 C CNN +F 1 "IPLOT" H 6650 3700 50 0000 C CNN + 1 6500 3600 + 0 1 1 0 +$EndComp +$Comp +L DIODE D1 +U 1 1 5166A210 +P 5850 3150 +F 0 "D1" H 5850 3250 40 0000 C CNN +F 1 "DIODE" H 5850 3050 40 0000 C CNN + 1 5850 3150 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5166A1EB +P 5300 3150 +F 0 "R1" V 5380 3150 50 0000 C CNN +F 1 "100" V 5300 3150 50 0000 C CNN + 1 5300 3150 + 0 -1 -1 0 +$EndComp +$Comp +L SINE v1 +U 1 1 5166A1AC +P 5050 4100 +F 0 "v1" H 4850 4200 60 0000 C CNN +F 1 "SINE" H 4850 4050 60 0000 C CNN +F 2 "R1" H 4750 4100 60 0000 C CNN + 1 5050 4100 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/analysis b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/analysis new file mode 100644 index 0000000..403e10c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/analysis @@ -0,0 +1 @@ +.dc v2 0e-00 10e-00 1e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.bak new file mode 100644 index 0000000..fc013c5 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.bak @@ -0,0 +1,90 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 14 April 2013 04:43:15 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 95 30 H I C CNN +F1 "PWR_FLAG" 0 180 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* + SM1206 +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.lib new file mode 100644 index 0000000..aea3592 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.lib @@ -0,0 +1,108 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 12:54:28 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.bak b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.bak new file mode 100644 index 0000000..6ce76aa --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.bak @@ -0,0 +1,162 @@ +EESchema Schematic File Version 2 date Sunday 14 April 2013 04:43:15 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_2.2-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "14 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PWR_FLAG #FLG01 +U 1 1 516A8F23 +P 4150 6650 +F 0 "#FLG01" H 4150 6745 30 0001 C CNN +F 1 "PWR_FLAG" H 4150 6830 30 0000 C CNN + 1 4150 6650 + 0 1 1 0 +$EndComp +Connection ~ 4150 6650 +Connection ~ 6350 4000 +Wire Wire Line + 6350 3350 6350 3150 +Connection ~ 4150 5200 +Wire Wire Line + 6350 5200 4150 5200 +Wire Wire Line + 4800 3150 4150 3150 +Wire Wire Line + 4150 5350 4150 4650 +Wire Wire Line + 6350 3150 5700 3150 +Wire Wire Line + 6350 4650 6350 4800 +Wire Wire Line + 4150 5750 4150 6000 +Wire Wire Line + 6350 3850 6350 4150 +Wire Wire Line + 4150 3150 4150 4150 +Wire Wire Line + 4150 6850 4150 6500 +$Comp +L GND #PWR02 +U 1 1 5167DAB9 +P 4150 6850 +F 0 "#PWR02" H 4150 6850 30 0001 C CNN +F 1 "GND" H 4150 6780 30 0001 C CNN + 1 4150 6850 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 5167DA8B +P 4150 6250 +F 0 "U1" H 4000 6350 50 0000 C CNN +F 1 "IPLOT" H 4300 6350 50 0000 C CNN + 1 4150 6250 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U2 +U 1 1 5167D9D2 +P 6350 3600 +F 0 "U2" H 6200 3700 50 0000 C CNN +F 1 "IPLOT" H 6500 3700 50 0000 C CNN + 1 6350 3600 + 0 1 1 0 +$EndComp +$Comp +L DIODE D2 +U 1 1 5167D956 +P 6350 5000 +F 0 "D2" H 6350 5100 40 0000 C CNN +F 1 "DIODE" H 6350 4900 40 0000 C CNN + 1 6350 5000 + 0 1 1 0 +$EndComp +$Comp +L DC v1 +U 1 1 5167D912 +P 5250 3150 +F 0 "v1" H 5050 3250 60 0000 C CNN +F 1 "10V" H 5050 3100 60 0000 C CNN +F 2 "R1" H 4950 3150 60 0000 C CNN + 1 5250 3150 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 5167D8E5 +P 6350 4400 +F 0 "R2" V 6430 4400 50 0000 C CNN +F 1 "10k" V 6350 4400 50 0000 C CNN + 1 6350 4400 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5167D8B8 +P 4150 4400 +F 0 "R1" V 4230 4400 50 0000 C CNN +F 1 "5k" V 4150 4400 50 0000 C CNN + 1 4150 4400 + 1 0 0 -1 +$EndComp +$Comp +L DIODE D1 +U 1 1 5167D869 +P 4150 5550 +F 0 "D1" H 4150 5650 40 0000 C CNN +F 1 "DIODE" H 4150 5450 40 0000 C CNN + 1 4150 5550 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir new file mode 100644 index 0000000..a8ccf76 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir @@ -0,0 +1,17 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 12:54:07 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U3 6 VPLOT8_1 +v2 1 0 10V +v1 0 4 10V +U1 5 0 IPLOT +U2 1 7 IPLOT +D2 6 3 DIODE +R2 7 6 5k +R1 4 3 10k +D1 5 3 DIODE + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.ckt new file mode 100644 index 0000000..ec3f080 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.ckt @@ -0,0 +1,17 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:54:07 pm ist + +* Plotting option vplot8_1 +v2 1 0 10v +v1 0 4 10v +V_u1 5 0 0 +V_u2 1 7 0 +d2 6 3 diode +r2 7 6 5k +r1 4 3 10k +d1 5 3 diode + +.dc v2 0e-00 10e-00 1e-00 +.plot v(6) +.plot i(V_u1) +.plot i(V_u2) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.out b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.out new file mode 100644 index 0000000..b89d0e8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.out @@ -0,0 +1,22 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:54:07 pm ist + +* Plotting option vplot8_1 +v2 1 0 10v +v1 0 4 10v +V_u1 5 0 0 +V_u2 1 7 0 +d2 6 3 diode +r2 7 6 5k +r1 4 3 10k +d1 5 3 diode + +.dc v2 0e-00 10e-00 1e-00 + +* Control Statements +.control +run +plot v(6) +plot i(V_u1) +plot i(V_u2) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.pro b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.pro new file mode 100644 index 0000000..0fb70ba --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.pro @@ -0,0 +1,84 @@ +update=Monday 13 May 2013 12:52:59 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/ambikeshwar/FreeEDA/library/analogSpice +LibName32=/home/ambikeshwar/FreeEDA/library/analogXSpice +LibName33=/home/ambikeshwar/FreeEDA/library/convergenceAidSpice +LibName34=/home/ambikeshwar/FreeEDA/library/converterSpice +LibName35=/home/ambikeshwar/FreeEDA/library/digitalSpice +LibName36=/home/ambikeshwar/FreeEDA/library/digitalXSpice +LibName37=/home/ambikeshwar/FreeEDA/library/linearSpice +LibName38=/home/ambikeshwar/FreeEDA/library/measurementSpice +LibName39=/home/ambikeshwar/FreeEDA/library/portSpice +LibName40=/home/ambikeshwar/FreeEDA/library/sourcesSpice +LibName41=/home/holy/FreeEDA/library/analogSpice +LibName42=/home/holy/FreeEDA/library/analogXSpice +LibName43=/home/holy/FreeEDA/library/convergenceAidSpice +LibName44=/home/holy/FreeEDA/library/converterSpice +LibName45=/home/holy/FreeEDA/library/digitalSpice +LibName46=/home/holy/FreeEDA/library/digitalXSpice +LibName47=/home/holy/FreeEDA/library/linearSpice +LibName48=/home/holy/FreeEDA/library/measurementSpice +LibName49=/home/holy/FreeEDA/library/portSpice +LibName50=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.proj b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.proj new file mode 100644 index 0000000..049873b --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.proj @@ -0,0 +1 @@ +schematicFile example_2.2.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.sch b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.sch new file mode 100644 index 0000000..de929d7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.sch @@ -0,0 +1,195 @@ +EESchema Schematic File Version 2 date Monday 13 May 2013 12:54:28 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_2.2-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "13 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 6650 4750 +$Comp +L VPLOT8_1 U3 +U 1 1 519094DB +P 6650 4450 +F 0 "U3" H 6500 4550 50 0000 C CNN +F 1 "VPLOT8_1" H 6800 4550 50 0000 C CNN + 1 6650 4450 + 1 0 0 -1 +$EndComp +Connection ~ 6350 4750 +Wire Wire Line + 6350 4750 6650 4750 +Wire Wire Line + 5050 3150 5450 3150 +Wire Wire Line + 4150 6850 4150 6500 +Wire Wire Line + 4150 3150 4150 4150 +Wire Wire Line + 6350 3850 6350 4150 +Wire Wire Line + 4150 5750 4150 6000 +Wire Wire Line + 6350 4650 6350 4800 +Wire Wire Line + 4150 5350 4150 4650 +Wire Wire Line + 6350 5200 4150 5200 +Connection ~ 4150 5200 +Wire Wire Line + 6350 3350 6350 3150 +Connection ~ 6350 4000 +Connection ~ 4150 6650 +Wire Wire Line + 5250 3150 5250 3300 +Connection ~ 5250 3150 +$Comp +L GND #PWR01 +U 1 1 51909464 +P 5250 3300 +F 0 "#PWR01" H 5250 3300 30 0001 C CNN +F 1 "GND" H 5250 3230 30 0001 C CNN + 1 5250 3300 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 51909454 +P 5900 3150 +F 0 "v2" H 5700 3250 60 0000 C CNN +F 1 "10V" H 5700 3100 60 0000 C CNN +F 2 "R1" H 5600 3150 60 0000 C CNN + 1 5900 3150 + 0 1 1 0 +$EndComp +$Comp +L DC v1 +U 1 1 5167D912 +P 4600 3150 +F 0 "v1" H 4400 3250 60 0000 C CNN +F 1 "10V" H 4400 3100 60 0000 C CNN +F 2 "R1" H 4300 3150 60 0000 C CNN + 1 4600 3150 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516A8F23 +P 4150 6650 +F 0 "#FLG02" H 4150 6745 30 0001 C CNN +F 1 "PWR_FLAG" H 4150 6830 30 0000 C CNN + 1 4150 6650 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR03 +U 1 1 5167DAB9 +P 4150 6850 +F 0 "#PWR03" H 4150 6850 30 0001 C CNN +F 1 "GND" H 4150 6780 30 0001 C CNN + 1 4150 6850 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 5167DA8B +P 4150 6250 +F 0 "U1" H 4000 6350 50 0000 C CNN +F 1 "IPLOT" H 4300 6350 50 0000 C CNN + 1 4150 6250 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U2 +U 1 1 5167D9D2 +P 6350 3600 +F 0 "U2" H 6200 3700 50 0000 C CNN +F 1 "IPLOT" H 6500 3700 50 0000 C CNN + 1 6350 3600 + 0 1 1 0 +$EndComp +$Comp +L DIODE D2 +U 1 1 5167D956 +P 6350 5000 +F 0 "D2" H 6350 5100 40 0000 C CNN +F 1 "DIODE" H 6350 4900 40 0000 C CNN + 1 6350 5000 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 5167D8E5 +P 6350 4400 +F 0 "R2" V 6430 4400 50 0000 C CNN +F 1 "5k" V 6350 4400 50 0000 C CNN + 1 6350 4400 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5167D8B8 +P 4150 4400 +F 0 "R1" V 4230 4400 50 0000 C CNN +F 1 "10k" V 4150 4400 50 0000 C CNN + 1 4150 4400 + 1 0 0 -1 +$EndComp +$Comp +L DIODE D1 +U 1 1 5167D869 +P 4150 5550 +F 0 "D1" H 4150 5650 40 0000 C CNN +F 1 "DIODE" H 4150 5450 40 0000 C CNN + 1 4150 5550 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/analysis b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/analysis new file mode 100644 index 0000000..f481193 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 5e-00 50e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/diode.lib b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/diode.lib new file mode 100644 index 0000000..f4b7c8a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/diode.lib @@ -0,0 +1,4 @@ +.model diode D( Vj=.65 Nbvl=14.976 Cjo=175p Rs=.20 Isr=1.859n ++ Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u ++ Bv=8.1 Fc=.5 Ikf=0 Nr=2 Ibv=20.245m ++ Is=880.5E-18 Xti=3 Ibvl=1.9556m ) \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.bak new file mode 100644 index 0000000..f7ad596 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.bak @@ -0,0 +1,105 @@ +EESchema-LIBRARY Version 2.3 Date: Friday 12 April 2013 03:08:39 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* + SM1206 +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8 +# +DEF vplot8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.lib new file mode 100644 index 0000000..1321f82 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.lib @@ -0,0 +1,108 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 12:59:04 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.bak b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.bak new file mode 100644 index 0000000..132334d --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.bak @@ -0,0 +1,133 @@ +EESchema Schematic File Version 2 date Friday 12 April 2013 03:08:39 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_2.4-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "12 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5700 3600 5500 3600 +Wire Wire Line + 6100 3650 6100 4100 +Connection ~ 5500 4100 +Wire Wire Line + 6100 4100 4200 4100 +Wire Wire Line + 4650 2850 4200 2850 +Wire Wire Line + 4200 2850 4200 3200 +Wire Wire Line + 5700 3200 5700 2850 +Wire Wire Line + 5150 2850 6100 2850 +Connection ~ 5700 2850 +Wire Wire Line + 6100 2850 6100 3050 +Wire Wire Line + 5200 4100 5200 4650 +Connection ~ 5200 4100 +$Comp +L IPLOT U2 +U 1 1 5167D5E8 +P 5500 3850 +F 0 "U2" H 5350 3950 50 0000 C CNN +F 1 "IPLOT" H 5650 3950 50 0000 C CNN + 1 5500 3850 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR01 +U 1 1 5166ABF9 +P 5200 4650 +F 0 "#PWR01" H 5200 4650 30 0001 C CNN +F 1 "GND" H 5200 4580 30 0001 C CNN + 1 5200 4650 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8 U1 +U 1 1 5166A97D +P 6100 3350 +F 0 "U1" H 5950 3450 50 0000 C CNN +F 1 "VPLOT8" H 6250 3450 50 0000 C CNN + 1 6100 3350 + 0 1 1 0 +$EndComp +$Comp +L DIODE D1 +U 1 1 5166A924 +P 5700 3400 +F 0 "D1" H 5700 3500 40 0000 C CNN +F 1 "DIODE" H 5700 3300 40 0000 C CNN + 1 5700 3400 + 0 1 1 0 +$EndComp +$Comp +L R R1 +U 1 1 5166A8EF +P 4900 2850 +F 0 "R1" V 4980 2850 50 0000 C CNN +F 1 "1000" V 4900 2850 50 0000 C CNN + 1 4900 2850 + 0 -1 -1 0 +$EndComp +$Comp +L DC v1 +U 1 1 5166A8CD +P 4200 3650 +F 0 "v1" H 4000 3750 60 0000 C CNN +F 1 "5V" H 4000 3600 60 0000 C CNN +F 2 "R1" H 3900 3650 60 0000 C CNN + 1 4200 3650 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir new file mode 100644 index 0000000..3731a3e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir @@ -0,0 +1,13 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 12:59:00 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 2 VPLOT8_1 +U2 3 0 IPLOT +D1 2 3 DIODE +R1 1 2 1000 +v1 1 0 5V + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.ckt new file mode 100644 index 0000000..43a6aa9 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.ckt @@ -0,0 +1,13 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:59:00 pm ist +.include diode.lib + +* Plotting option vplot8_1 +V_u2 3 0 0 +d1 2 3 diode +r1 1 2 1000 +v1 1 0 5v + +.dc v1 0e-00 5e-00 50e-03 +.plot v(2) +.plot i(V_u2) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.out b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.out new file mode 100644 index 0000000..3ce4892 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.out @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:59:00 pm ist +.include diode.lib + +* Plotting option vplot8_1 +V_u2 3 0 0 +d1 2 3 diode +r1 1 2 1000 +v1 1 0 5v + +.dc v1 0e-00 5e-00 50e-03 + +* Control Statements +.control +run +plot v(2) +plot i(V_u2) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.pro b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.pro new file mode 100644 index 0000000..0e5a07e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.pro @@ -0,0 +1,84 @@ +update=Monday 13 May 2013 12:58:14 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/ambikeshwar/FreeEDA/library/analogSpice +LibName32=/home/ambikeshwar/FreeEDA/library/analogXSpice +LibName33=/home/ambikeshwar/FreeEDA/library/convergenceAidSpice +LibName34=/home/ambikeshwar/FreeEDA/library/converterSpice +LibName35=/home/ambikeshwar/FreeEDA/library/digitalSpice +LibName36=/home/ambikeshwar/FreeEDA/library/digitalXSpice +LibName37=/home/ambikeshwar/FreeEDA/library/linearSpice +LibName38=/home/ambikeshwar/FreeEDA/library/measurementSpice +LibName39=/home/ambikeshwar/FreeEDA/library/portSpice +LibName40=/home/ambikeshwar/FreeEDA/library/sourcesSpice +LibName41=/home/holy/FreeEDA/library/analogSpice +LibName42=/home/holy/FreeEDA/library/analogXSpice +LibName43=/home/holy/FreeEDA/library/convergenceAidSpice +LibName44=/home/holy/FreeEDA/library/converterSpice +LibName45=/home/holy/FreeEDA/library/digitalSpice +LibName46=/home/holy/FreeEDA/library/digitalXSpice +LibName47=/home/holy/FreeEDA/library/linearSpice +LibName48=/home/holy/FreeEDA/library/measurementSpice +LibName49=/home/holy/FreeEDA/library/portSpice +LibName50=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.proj b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.proj new file mode 100644 index 0000000..eb6337b --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.proj @@ -0,0 +1 @@ +schematicFile example_2.4.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.sch b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.sch new file mode 100644 index 0000000..7aac593 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.sch @@ -0,0 +1,139 @@ +EESchema Schematic File Version 2 date Monday 13 May 2013 12:59:04 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_2.4-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "13 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PWR_FLAG #FLG01 +U 1 1 51909635 +P 5200 4200 +F 0 "#FLG01" H 5200 4470 30 0001 C CNN +F 1 "PWR_FLAG" H 5200 4430 30 0000 C CNN + 1 5200 4200 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 5190961B +P 5700 2550 +F 0 "U1" H 5550 2650 50 0000 C CNN +F 1 "VPLOT8_1" H 5850 2650 50 0000 C CNN + 1 5700 2550 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5150 2850 5700 2850 +Wire Wire Line + 5700 3600 5700 3700 +Connection ~ 5200 4200 +Wire Wire Line + 5200 4200 5200 4750 +Connection ~ 5700 2850 +Wire Wire Line + 5700 2850 5700 3200 +Wire Wire Line + 4200 3200 4200 2850 +Wire Wire Line + 4200 2850 4650 2850 +Wire Wire Line + 4200 4100 4200 4200 +Wire Wire Line + 4200 4200 5700 4200 +$Comp +L IPLOT U2 +U 1 1 5167D5E8 +P 5700 3950 +F 0 "U2" H 5550 4050 50 0000 C CNN +F 1 "IPLOT" H 5850 4050 50 0000 C CNN + 1 5700 3950 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5166ABF9 +P 5200 4750 +F 0 "#PWR02" H 5200 4750 30 0001 C CNN +F 1 "GND" H 5200 4680 30 0001 C CNN + 1 5200 4750 + 1 0 0 -1 +$EndComp +$Comp +L DIODE D1 +U 1 1 5166A924 +P 5700 3400 +F 0 "D1" H 5700 3500 40 0000 C CNN +F 1 "DIODE" H 5700 3300 40 0000 C CNN + 1 5700 3400 + 0 1 1 0 +$EndComp +$Comp +L R R1 +U 1 1 5166A8EF +P 4900 2850 +F 0 "R1" V 4980 2850 50 0000 C CNN +F 1 "1000" V 4900 2850 50 0000 C CNN + 1 4900 2850 + 0 -1 -1 0 +$EndComp +$Comp +L DC v1 +U 1 1 5166A8CD +P 4200 3650 +F 0 "v1" H 4000 3750 60 0000 C CNN +F 1 "5V" H 4000 3600 60 0000 C CNN +F 2 "R1" H 3900 3650 60 0000 C CNN + 1 4200 3650 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/analysis b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/analysis new file mode 100644 index 0000000..0a70a74 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 5e-00 1e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/diode.lib b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/diode.lib new file mode 100644 index 0000000..d5c42a7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/diode.lib @@ -0,0 +1,4 @@ +.model diode D( Is=880.5E-18 Nbvl=14.976 Cjo=175p Rs=20 Isr=1.859n ++ Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u ++ Bv=8.1 Fc=.5 Ikf=0 Xti=3 Nr=2 ++ Vj=.65 Ibv=20.245m Ibvl=1.9556m ) \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.bak new file mode 100644 index 0000000..4dd86fe --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.bak @@ -0,0 +1,108 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 02:41:15 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.lib new file mode 100644 index 0000000..9adc092 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.lib @@ -0,0 +1,108 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 21 May 2013 11:07:18 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.bak b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.bak new file mode 100644 index 0000000..21d43d7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.bak @@ -0,0 +1,164 @@ +EESchema Schematic File Version 2 date Tuesday 14 May 2013 02:41:15 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_2.5-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "14 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L DC v1 +U 1 1 5191FF90 +P 5000 3850 +F 0 "v1" H 4800 3950 60 0000 C CNN +F 1 "DC" H 4800 3800 60 0000 C CNN +F 2 "R1" H 4700 3850 60 0000 C CNN + 1 5000 3850 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 5190978A +P 6250 5300 +F 0 "#FLG01" H 6250 5570 30 0001 C CNN +F 1 "PWR_FLAG" H 6250 5530 30 0000 C CNN + 1 6250 5300 + 1 0 0 -1 +$EndComp +Connection ~ 6600 2100 +$Comp +L VPLOT8_1 U1 +U 1 1 51909775 +P 6600 1800 +F 0 "U1" H 6450 1900 50 0000 C CNN +F 1 "VPLOT8_1" H 6750 1900 50 0000 C CNN + 1 6600 1800 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6250 5300 5000 5300 +Wire Wire Line + 6250 3300 6250 3350 +Wire Wire Line + 6250 4850 6250 5500 +Wire Wire Line + 6250 2350 6250 2100 +Connection ~ 6250 5300 +Connection ~ 6250 2100 +Wire Wire Line + 5250 2100 5000 2100 +Wire Wire Line + 5750 2100 6600 2100 +Connection ~ 6250 5300 +Wire Wire Line + 6250 2750 6250 2800 +Wire Wire Line + 5000 2100 5000 3400 +Wire Wire Line + 6250 4250 6250 4350 +Wire Wire Line + 5000 5300 5000 4300 +$Comp +L IPLOT U2 +U 1 1 519096FE +P 6250 4600 +F 0 "U2" H 6100 4700 50 0000 C CNN +F 1 "IPLOT" H 6400 4700 50 0000 C CNN + 1 6250 4600 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 519096A6 +P 6250 3050 +F 0 "R2" V 6330 3050 50 0000 C CNN +F 1 "20m" V 6250 3050 50 0000 C CNN + 1 6250 3050 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 5190969F +P 6250 3800 +F 0 "v2" H 6050 3900 60 0000 C CNN +F 1 "65m" H 6050 3750 60 0000 C CNN +F 2 "R1" H 5950 3800 60 0000 C CNN + 1 6250 3800 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516A928C +P 5500 2100 +F 0 "R1" V 5580 2100 50 0000 C CNN +F 1 "1000" V 5500 2100 50 0000 C CNN + 1 5500 2100 + 0 -1 -1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5166AFB9 +P 6250 5500 +F 0 "#PWR02" H 6250 5500 30 0001 C CNN +F 1 "GND" H 6250 5430 30 0001 C CNN + 1 6250 5500 + 1 0 0 -1 +$EndComp +$Comp +L DIODE D1 +U 1 1 5166AF28 +P 6250 2550 +F 0 "D1" H 6250 2650 40 0000 C CNN +F 1 "DIODE" H 6250 2450 40 0000 C CNN + 1 6250 2550 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir new file mode 100644 index 0000000..ab9de69 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 14 May 2013 02:41:09 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v1 1 0 DC +U1 5 VPLOT8_1 +U2 4 0 IPLOT +R2 3 2 20m +v2 2 4 65m +R1 1 5 1000 +D1 5 3 DIODE + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.ckt new file mode 100644 index 0000000..eb19daf --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.ckt @@ -0,0 +1,15 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 14 may 2013 02:41:09 pm ist +.include diode.lib + +v1 1 0 dc 5 +* Plotting option vplot8_1 +V_u2 4 0 0 +r2 3 2 20m +v2 2 4 65m +r1 1 5 1000 +d1 5 3 diode + +.dc v1 0e-00 5e-00 1e-00 +.plot v(5) +.plot i(V_u2) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.out b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.out new file mode 100644 index 0000000..a3bbe2c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.out @@ -0,0 +1,20 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 14 may 2013 02:41:09 pm ist +.include diode.lib + +v1 1 0 dc 5 +* Plotting option vplot8_1 +V_u2 4 0 0 +r2 3 2 20m +v2 2 4 65m +r1 1 5 1000 +d1 5 3 diode + +.dc v1 0e-00 5e-00 1e-00 + +* Control Statements +.control +run +plot v(5) +plot i(V_u2) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.pro b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.pro new file mode 100644 index 0000000..d0d39b6 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.pro @@ -0,0 +1,84 @@ +update=Monday 13 May 2013 01:04:04 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/ambikeshwar/FreeEDA/library/analogSpice +LibName32=/home/ambikeshwar/FreeEDA/library/analogXSpice +LibName33=/home/ambikeshwar/FreeEDA/library/convergenceAidSpice +LibName34=/home/ambikeshwar/FreeEDA/library/converterSpice +LibName35=/home/ambikeshwar/FreeEDA/library/digitalSpice +LibName36=/home/ambikeshwar/FreeEDA/library/digitalXSpice +LibName37=/home/ambikeshwar/FreeEDA/library/linearSpice +LibName38=/home/ambikeshwar/FreeEDA/library/measurementSpice +LibName39=/home/ambikeshwar/FreeEDA/library/portSpice +LibName40=/home/ambikeshwar/FreeEDA/library/sourcesSpice +LibName41=/home/holy/FreeEDA/library/analogSpice +LibName42=/home/holy/FreeEDA/library/analogXSpice +LibName43=/home/holy/FreeEDA/library/convergenceAidSpice +LibName44=/home/holy/FreeEDA/library/converterSpice +LibName45=/home/holy/FreeEDA/library/digitalSpice +LibName46=/home/holy/FreeEDA/library/digitalXSpice +LibName47=/home/holy/FreeEDA/library/linearSpice +LibName48=/home/holy/FreeEDA/library/measurementSpice +LibName49=/home/holy/FreeEDA/library/portSpice +LibName50=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.proj b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.proj new file mode 100644 index 0000000..1148c23 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.proj @@ -0,0 +1 @@ +schematicFile example_2.5.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.sch b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.sch new file mode 100644 index 0000000..ff9da18 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.sch @@ -0,0 +1,168 @@ +EESchema Schematic File Version 2 date Tuesday 21 May 2013 11:07:18 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_2.5-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "21 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 6650 2050 0 90 Italic 18 +Vd +Text Notes 6450 3850 0 90 Italic 18 +Id +$Comp +L DC v1 +U 1 1 5191FF90 +P 5000 3850 +F 0 "v1" H 4800 3950 60 0000 C CNN +F 1 "DC" H 4800 3800 60 0000 C CNN +F 2 "R1" H 4700 3850 60 0000 C CNN + 1 5000 3850 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 5190978A +P 6250 5300 +F 0 "#FLG01" H 6250 5570 30 0001 C CNN +F 1 "PWR_FLAG" H 6250 5530 30 0000 C CNN + 1 6250 5300 + 1 0 0 -1 +$EndComp +Connection ~ 6600 2100 +$Comp +L VPLOT8_1 U1 +U 1 1 51909775 +P 6600 1800 +F 0 "U1" H 6450 1900 50 0000 C CNN +F 1 "VPLOT8_1" H 6750 1900 50 0000 C CNN + 1 6600 1800 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6250 5300 5000 5300 +Wire Wire Line + 6250 3300 6250 3350 +Wire Wire Line + 6250 4850 6250 5500 +Wire Wire Line + 6250 2350 6250 2100 +Connection ~ 6250 5300 +Connection ~ 6250 2100 +Wire Wire Line + 5250 2100 5000 2100 +Wire Wire Line + 5750 2100 6600 2100 +Connection ~ 6250 5300 +Wire Wire Line + 6250 2750 6250 2800 +Wire Wire Line + 5000 2100 5000 3400 +Wire Wire Line + 6250 4250 6250 4350 +Wire Wire Line + 5000 5300 5000 4300 +$Comp +L IPLOT U2 +U 1 1 519096FE +P 6250 4600 +F 0 "U2" H 6100 4700 50 0000 C CNN +F 1 "IPLOT" H 6400 4700 50 0000 C CNN + 1 6250 4600 + 0 1 1 0 +$EndComp +$Comp +L R Rd +U 1 1 519096A6 +P 6250 3050 +F 0 "Rd" V 6330 3050 50 0000 C CNN +F 1 "20m" V 6250 3050 50 0000 C CNN + 1 6250 3050 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 5190969F +P 6250 3800 +F 0 "v2" H 6050 3900 60 0000 C CNN +F 1 "65m" H 6050 3750 60 0000 C CNN +F 2 "R1" H 5950 3800 60 0000 C CNN + 1 6250 3800 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516A928C +P 5500 2100 +F 0 "R1" V 5580 2100 50 0000 C CNN +F 1 "1000" V 5500 2100 50 0000 C CNN + 1 5500 2100 + 0 -1 -1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5166AFB9 +P 6250 5500 +F 0 "#PWR02" H 6250 5500 30 0001 C CNN +F 1 "GND" H 6250 5430 30 0001 C CNN + 1 6250 5500 + 1 0 0 -1 +$EndComp +$Comp +L DIODE D1 +U 1 1 5166AF28 +P 6250 2550 +F 0 "D1" H 6250 2650 40 0000 C CNN +F 1 "DIODE" H 6250 2450 40 0000 C CNN + 1 6250 2550 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/analysis b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/analysis new file mode 100644 index 0000000..35318bb --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 10e-00 5e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8-cache.bak new file mode 100644 index 0000000..c86efd4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8-cache.bak @@ -0,0 +1,93 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 03:23:37 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8 +# +DEF vplot8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +# ZENER +# +DEF ZENER D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "ZENER" 0 -100 40 H V C CNN +$FPLIST + D? + SO* + SM* +$ENDFPLIST +DRAW +P 5 0 1 0 50 0 -50 50 -50 -50 50 0 50 0 F +P 5 0 1 8 70 50 50 30 50 -30 30 -50 30 -50 N +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8-cache.lib new file mode 100644 index 0000000..68b8c20 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8-cache.lib @@ -0,0 +1,93 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 03:25:17 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8 +# +DEF vplot8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +# ZENER +# +DEF ZENER D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "ZENER" 0 -100 40 H V C CNN +$FPLIST + D? + SO* + SM* +$ENDFPLIST +DRAW +P 5 0 1 0 50 0 -50 50 -50 -50 50 0 50 0 F +P 5 0 1 8 70 50 50 30 50 -30 30 -50 30 -50 N +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.bak b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.bak new file mode 100644 index 0000000..298b82a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.bak @@ -0,0 +1,132 @@ +EESchema Schematic File Version 2 date Monday 15 April 2013 03:23:37 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 43 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 7200 2400 +Connection ~ 7200 1800 +Wire Wire Line + 6450 2400 7550 2400 +Wire Wire Line + 6450 2400 6450 2250 +Connection ~ 6850 2400 +Wire Wire Line + 7550 2400 7550 2300 +Wire Wire Line + 6850 2000 6850 1700 +Wire Wire Line + 6850 1200 6450 1200 +Wire Wire Line + 7550 1800 6850 1800 +Connection ~ 6850 1800 +Wire Wire Line + 6450 1200 6450 1350 +Wire Wire Line + 7100 2400 7100 2600 +Connection ~ 7100 2400 +$Comp +L GND #PWR01 +U 1 1 516BCDAC +P 7100 2600 +F 0 "#PWR01" H 7100 2600 30 0001 C CNN +F 1 "GND" H 7100 2530 30 0001 C CNN + 1 7100 2600 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 516BCD76 +P 6450 1800 +F 0 "v1" H 6250 1900 60 0000 C CNN +F 1 "DC" H 6250 1750 60 0000 C CNN +F 2 "R1" H 6150 1800 60 0000 C CNN + 1 6450 1800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8 U1 +U 1 1 516BCD56 +P 7200 2100 +F 0 "U1" H 7050 2200 50 0000 C CNN +F 1 "VPLOT8" H 7350 2200 50 0000 C CNN + 1 7200 2100 + 0 -1 -1 0 +$EndComp +$Comp +L R R2 +U 1 1 516BCD26 +P 7550 2050 +F 0 "R2" V 7630 2050 50 0000 C CNN +F 1 "R" V 7550 2050 50 0000 C CNN + 1 7550 2050 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516BCCFA +P 6850 1450 +F 0 "R1" V 6930 1450 50 0000 C CNN +F 1 "R" V 6850 1450 50 0000 C CNN + 1 6850 1450 + 1 0 0 -1 +$EndComp +$Comp +L ZENER D1 +U 1 1 516BCCC7 +P 6850 2200 +F 0 "D1" H 6850 2300 50 0000 C CNN +F 1 "ZENER" H 6850 2100 40 0000 C CNN + 1 6850 2200 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir new file mode 100644 index 0000000..69c2aea --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir @@ -0,0 +1,13 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 03:25:12 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v1 3 0 DC +U1 0 1 VPLOT8 +R2 1 0 2000 +R1 3 1 500 +D1 0 1 ZENER + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.ckt new file mode 100644 index 0000000..cd705cf --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.ckt @@ -0,0 +1,10 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 03:25:12 pm ist + +v1 3 0 dc 10 +r2 1 0 2000 +r1 3 1 500 +d1 0 1 zener + +.dc v1 0e-00 10e-00 5e-03 +.plot -v(1) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.out b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.out new file mode 100644 index 0000000..2cdd76d --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.out @@ -0,0 +1,15 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 03:25:12 pm ist + +v1 3 0 dc 10 +r2 1 0 2000 +r1 3 1 500 +d1 0 1 zener + +.dc v1 0e-00 10e-00 5e-03 + +* Control Statements +.control +run +plot -v(1) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.proj b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.proj new file mode 100644 index 0000000..e0d6a2f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.proj @@ -0,0 +1 @@ +schematicFile example_2.8.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.sch b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.sch new file mode 100644 index 0000000..ddb3704 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.sch @@ -0,0 +1,123 @@ +EESchema Schematic File Version 2 date Monday 15 April 2013 03:25:17 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:example_2.8-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 7200 2400 +Connection ~ 7200 1800 +Wire Wire Line + 6450 2400 7550 2400 +Wire Wire Line + 6450 2400 6450 2250 +Connection ~ 6850 2400 +Wire Wire Line + 7550 2400 7550 2300 +Wire Wire Line + 6850 2000 6850 1700 +Wire Wire Line + 6850 1200 6450 1200 +Wire Wire Line + 7550 1800 6850 1800 +Connection ~ 6850 1800 +Wire Wire Line + 6450 1200 6450 1350 +Wire Wire Line + 7100 2400 7100 2600 +Connection ~ 7100 2400 +$Comp +L GND #PWR01 +U 1 1 516BCDAC +P 7100 2600 +F 0 "#PWR01" H 7100 2600 30 0001 C CNN +F 1 "GND" H 7100 2530 30 0001 C CNN + 1 7100 2600 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 516BCD76 +P 6450 1800 +F 0 "v1" H 6250 1900 60 0000 C CNN +F 1 "DC" H 6250 1750 60 0000 C CNN +F 2 "R1" H 6150 1800 60 0000 C CNN + 1 6450 1800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8 U1 +U 1 1 516BCD56 +P 7200 2100 +F 0 "U1" H 7050 2200 50 0000 C CNN +F 1 "VPLOT8" H 7350 2200 50 0000 C CNN + 1 7200 2100 + 0 -1 -1 0 +$EndComp +$Comp +L R R2 +U 1 1 516BCD26 +P 7550 2050 +F 0 "R2" V 7630 2050 50 0000 C CNN +F 1 "2000" V 7550 2050 50 0000 C CNN + 1 7550 2050 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516BCCFA +P 6850 1450 +F 0 "R1" V 6930 1450 50 0000 C CNN +F 1 "500" V 6850 1450 50 0000 C CNN + 1 6850 1450 + 1 0 0 -1 +$EndComp +$Comp +L ZENER D1 +U 1 1 516BCCC7 +P 6850 2200 +F 0 "D1" H 6850 2300 50 0000 C CNN +F 1 "ZENER" H 6850 2100 40 0000 C CNN + 1 6850 2200 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/analysis b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/analysis new file mode 100644 index 0000000..73c8f09 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 4e-00 5e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.bak new file mode 100644 index 0000000..1d8b498 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.bak @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 04:09:27 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.lib new file mode 100644 index 0000000..f2704f3 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.lib @@ -0,0 +1,131 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 11:42:22 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.bak new file mode 100644 index 0000000..ca5b9de --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.bak @@ -0,0 +1,167 @@ +EESchema Schematic File Version 2 date Monday 15 April 2013 04:02:35 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example3.4-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5900 2550 5900 1050 +Wire Wire Line + 4400 4300 4400 3050 +Wire Wire Line + 5000 3800 5000 3250 +Wire Wire Line + 5000 2050 5000 1550 +Connection ~ 5000 5450 +Wire Wire Line + 4400 5450 5900 5450 +Wire Wire Line + 5900 1050 5000 1050 +Wire Wire Line + 4400 3050 4700 3050 +Wire Wire Line + 4400 5450 4400 5200 +Wire Wire Line + 5000 4950 5000 5750 +Connection ~ 5000 5600 +Connection ~ 5000 3450 +Wire Wire Line + 5000 2550 5000 2850 +Wire Wire Line + 5000 4300 5000 4450 +Wire Wire Line + 5900 5450 5900 3450 +$Comp +L IPLOT U2 +U 1 1 516BD643 +P 5000 4050 +F 0 "U2" H 4850 4150 50 0000 C CNN +F 1 "IPLOT" H 5150 4150 50 0000 C CNN + 1 5000 4050 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516BD5F9 +P 5000 2300 +F 0 "U1" H 4850 2400 50 0000 C CNN +F 1 "IPLOT" H 5150 2400 50 0000 C CNN + 1 5000 2300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 5166BF83 +P 5000 5600 +F 0 "#FLG01" H 5000 5695 30 0001 C CNN +F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN + 1 5000 5600 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5166BF64 +P 5000 5750 +F 0 "#PWR02" H 5000 5750 30 0001 C CNN +F 1 "GND" H 5000 5680 30 0001 C CNN + 1 5000 5750 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 5166BEE6 +P 4400 4750 +F 0 "v1" H 4200 4850 60 0000 C CNN +F 1 "4" H 4200 4700 60 0000 C CNN +F 2 "R1" H 4100 4750 60 0000 C CNN + 1 4400 4750 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 5166BED7 +P 5900 3000 +F 0 "v2" H 5700 3100 60 0000 C CNN +F 1 "10V" H 5700 2950 60 0000 C CNN +F 2 "R1" H 5600 3000 60 0000 C CNN + 1 5900 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 5166BE96 +P 5000 4700 +F 0 "R2" V 5080 4700 50 0000 C CNN +F 1 "3300" V 5000 4700 50 0000 C CNN + 1 5000 4700 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5166BE8E +P 5000 1300 +F 0 "R1" V 5080 1300 50 0000 C CNN +F 1 "4700" V 5000 1300 50 0000 C CNN + 1 5000 1300 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 5166BE53 +P 4900 3050 +F 0 "Q1" H 4900 2900 50 0000 R CNN +F 1 "NPN" H 4900 3200 50 0000 R CNN + 1 4900 3050 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir new file mode 100644 index 0000000..87e5f07 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir @@ -0,0 +1,16 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 04:09:24 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U3 6 7 VPLOT8_1 +U2 7 3 IPLOT +U1 5 6 IPLOT +v1 2 0 4 +v2 4 0 10V +R2 3 0 3300 +R1 4 5 4700 +Q1 7 2 6 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.ckt new file mode 100644 index 0000000..21ea9e6 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.ckt @@ -0,0 +1,16 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 04:09:24 pm ist + +* Plotting option vplot8_1 +V_u2 7 3 0 +V_u1 5 6 0 +v1 2 0 4 +v2 4 0 10v +r2 3 0 3300 +r1 4 5 4700 +q1 6 2 7 npn + +.dc v1 0e-00 4e-00 5e-03 +.plot v(6) v(7) +.plot i(V_u2) +.plot i(V_u1) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.out new file mode 100644 index 0000000..b00fc82 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.out @@ -0,0 +1,21 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 04:09:24 pm ist + +* Plotting option vplot8_1 +V_u2 7 3 0 +V_u1 5 6 0 +v1 2 0 4 +v2 4 0 10v +r2 3 0 3300 +r1 4 5 4700 +q1 6 2 7 npn + +.dc v1 0e-00 4e-00 5e-03 + +* Control Statements +.control +run +plot v(6) v(7) +plot i(V_u2) +plot i(V_u1) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.pro new file mode 100644 index 0000000..84c7bdc --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.pro @@ -0,0 +1,84 @@ +update=Monday 15 April 2013 04:08:24 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/ambikeshwar/FreeEDA/library/analogSpice +LibName32=/home/ambikeshwar/FreeEDA/library/analogXSpice +LibName33=/home/ambikeshwar/FreeEDA/library/convergenceAidSpice +LibName34=/home/ambikeshwar/FreeEDA/library/converterSpice +LibName35=/home/ambikeshwar/FreeEDA/library/digitalSpice +LibName36=/home/ambikeshwar/FreeEDA/library/digitalXSpice +LibName37=/home/ambikeshwar/FreeEDA/library/linearSpice +LibName38=/home/ambikeshwar/FreeEDA/library/measurementSpice +LibName39=/home/ambikeshwar/FreeEDA/library/portSpice +LibName40=/home/ambikeshwar/FreeEDA/library/sourcesSpice +LibName41=/home/holy/FreeEDA/library/analogSpice +LibName42=/home/holy/FreeEDA/library/analogXSpice +LibName43=/home/holy/FreeEDA/library/convergenceAidSpice +LibName44=/home/holy/FreeEDA/library/converterSpice +LibName45=/home/holy/FreeEDA/library/digitalSpice +LibName46=/home/holy/FreeEDA/library/digitalXSpice +LibName47=/home/holy/FreeEDA/library/linearSpice +LibName48=/home/holy/FreeEDA/library/measurementSpice +LibName49=/home/holy/FreeEDA/library/portSpice +LibName50=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.proj b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.proj new file mode 100644 index 0000000..9978f31 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.proj @@ -0,0 +1 @@ +schematicFile example3.4.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.sch new file mode 100644 index 0000000..4138df7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example3.4/example3.4.sch @@ -0,0 +1,186 @@ +EESchema Schematic File Version 2 date Monday 15 April 2013 04:09:27 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example3.4-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5000 2650 +$Comp +L VPLOT8_1 U3 +U 1 1 516BD8B9 +P 5300 2650 +F 0 "U3" H 5150 2750 50 0000 C CNN +F 1 "VPLOT8_1" H 5450 2750 50 0000 C CNN + 1 5300 2650 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U3 +U 2 1 516BD8AC +P 5300 3450 +F 0 "U3" H 5150 3550 50 0000 C CNN +F 1 "VPLOT8_1" H 5450 3550 50 0000 C CNN + 2 5300 3450 + 0 1 1 0 +$EndComp +Wire Wire Line + 5900 2550 5900 1050 +Wire Wire Line + 4400 4300 4400 3050 +Wire Wire Line + 5000 3800 5000 3250 +Wire Wire Line + 5000 2050 5000 1550 +Connection ~ 5000 5450 +Wire Wire Line + 4400 5450 5900 5450 +Wire Wire Line + 5900 1050 5000 1050 +Wire Wire Line + 4400 3050 4700 3050 +Wire Wire Line + 4400 5450 4400 5200 +Wire Wire Line + 5000 4950 5000 5750 +Connection ~ 5000 5600 +Connection ~ 5000 3450 +Wire Wire Line + 5000 2550 5000 2850 +Wire Wire Line + 5000 4300 5000 4450 +Wire Wire Line + 5900 5450 5900 3450 +$Comp +L IPLOT U2 +U 1 1 516BD643 +P 5000 4050 +F 0 "U2" H 4850 4150 50 0000 C CNN +F 1 "IPLOT" H 5150 4150 50 0000 C CNN + 1 5000 4050 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516BD5F9 +P 5000 2300 +F 0 "U1" H 4850 2400 50 0000 C CNN +F 1 "IPLOT" H 5150 2400 50 0000 C CNN + 1 5000 2300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 5166BF83 +P 5000 5600 +F 0 "#FLG01" H 5000 5695 30 0001 C CNN +F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN + 1 5000 5600 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5166BF64 +P 5000 5750 +F 0 "#PWR02" H 5000 5750 30 0001 C CNN +F 1 "GND" H 5000 5680 30 0001 C CNN + 1 5000 5750 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 5166BEE6 +P 4400 4750 +F 0 "v1" H 4200 4850 60 0000 C CNN +F 1 "4" H 4200 4700 60 0000 C CNN +F 2 "R1" H 4100 4750 60 0000 C CNN + 1 4400 4750 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 5166BED7 +P 5900 3000 +F 0 "v2" H 5700 3100 60 0000 C CNN +F 1 "10V" H 5700 2950 60 0000 C CNN +F 2 "R1" H 5600 3000 60 0000 C CNN + 1 5900 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 5166BE96 +P 5000 4700 +F 0 "R2" V 5080 4700 50 0000 C CNN +F 1 "3300" V 5000 4700 50 0000 C CNN + 1 5000 4700 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5166BE8E +P 5000 1300 +F 0 "R1" V 5080 1300 50 0000 C CNN +F 1 "4700" V 5000 1300 50 0000 C CNN + 1 5000 1300 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 5166BE53 +P 4900 3050 +F 0 "Q1" H 4900 2900 50 0000 R CNN +F 1 "NPN" H 4900 3200 50 0000 R CNN + 1 4900 3050 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/analysis b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/analysis new file mode 100644 index 0000000..395e205 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/analysis @@ -0,0 +1 @@ +.dc v2 0e-00 15e-00 15e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.bak new file mode 100644 index 0000000..3c23bc8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.bak @@ -0,0 +1,97 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 06:57:20 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.lib new file mode 100644 index 0000000..b1e32d7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.lib @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 06:59:23 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.bak new file mode 100644 index 0000000..9b63b41 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.bak @@ -0,0 +1,154 @@ +EESchema Schematic File Version 2 date Wednesday 15 May 2013 06:57:20 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5750 5350 5750 5950 +Connection ~ 4300 4400 +Connection ~ 5750 4100 +Wire Wire Line + 4300 4500 4300 4400 +Wire Wire Line + 4300 4400 5450 4400 +Connection ~ 4750 4400 +Wire Wire Line + 4750 4600 4750 4050 +Wire Wire Line + 4750 3150 4750 2750 +Wire Wire Line + 4750 2750 5750 2750 +Wire Wire Line + 5750 4600 5750 4850 +Wire Wire Line + 4750 5500 4750 5950 +Wire Wire Line + 4750 5950 5750 5950 +Wire Wire Line + 5750 4200 5750 3250 +$Comp +L DC v1 +U 1 1 517A27AF +P 4750 3600 +F 0 "v1" H 4550 3700 60 0000 C CNN +F 1 "DC" H 4550 3550 60 0000 C CNN +F 2 "R1" H 4450 3600 60 0000 C CNN + 1 4750 3600 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 517A278C +P 4750 5050 +F 0 "v2" H 4550 5150 60 0000 C CNN +F 1 "DC" H 4550 5000 60 0000 C CNN +F 2 "R1" H 4450 5050 60 0000 C CNN + 1 4750 5050 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 5178C864 +P 6050 4100 +F 0 "U1" H 5900 4200 50 0000 C CNN +F 1 "VPLOT8_1" H 6200 4200 50 0000 C CNN + 1 6050 4100 + 0 1 1 0 +$EndComp +$Comp +L NPN Q1 +U 1 1 5178C812 +P 5650 4400 +F 0 "Q1" H 5650 4250 50 0000 R CNN +F 1 "NPN" H 5650 4550 50 0000 R CNN + 1 5650 4400 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 516BDAF0 +P 4300 4400 +F 0 "#FLG01" H 4300 4670 30 0001 C CNN +F 1 "PWR_FLAG" H 4300 4630 30 0000 C CNN + 1 4300 4400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 516BDAE0 +P 4300 4500 +F 0 "#PWR02" H 4300 4500 30 0001 C CNN +F 1 "GND" H 4300 4430 30 0001 C CNN + 1 4300 4500 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516BD9B5 +P 5750 3000 +F 0 "R1" V 5830 3000 50 0000 C CNN +F 1 "5k" V 5750 3000 50 0000 C CNN + 1 5750 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516BD9A9 +P 5750 5100 +F 0 "R2" V 5850 5100 50 0000 C CNN +F 1 "7.07k" V 5750 5100 50 0000 C CNN + 1 5750 5100 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir new file mode 100644 index 0000000..bdacb65 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 15 May 2013 06:59:18 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U2 4 3 IPLOT +v1 1 0 DC +v2 0 5 DC +U1 3 VPLOT8_1 +Q1 2 0 3 NPN +R1 1 4 5k +R2 2 5 7.07k + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.ckt new file mode 100644 index 0000000..055c4d2 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.ckt @@ -0,0 +1,15 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 06:59:18 pm ist +.include npn.lib + +V_u2 4 3 0 +v1 1 0 dc 15 +v2 0 5 dc 15 +* Plotting option vplot8_1 +q1 3 0 2 npn +r1 1 4 5k +r2 2 5 7.07k + +.dc v2 0e-00 15e-00 15e-00 +.plot i(V_u2) +.plot v(3) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.out new file mode 100644 index 0000000..17c61c2 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.out @@ -0,0 +1,20 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 06:59:18 pm ist +.include npn.lib + +V_u2 4 3 0 +v1 1 0 dc 15 +v2 0 5 dc 15 +* Plotting option vplot8_1 +q1 3 0 2 npn +r1 1 4 5k +r2 2 5 7.07k + +.dc v2 0e-00 15e-00 15e-00 + +* Control Statements +.control +run +plot i(V_u2) +plot v(3) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.pro new file mode 100644 index 0000000..3d2efae --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.pro @@ -0,0 +1,74 @@ +update=Monday 15 April 2013 04:46:53 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.proj b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.proj new file mode 100644 index 0000000..3a2ba21 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.proj @@ -0,0 +1 @@ +schematicFile example_3.1.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.sch new file mode 100644 index 0000000..7873ea6 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.sch @@ -0,0 +1,165 @@ +EESchema Schematic File Version 2 date Wednesday 15 May 2013 06:59:23 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5750 4200 5750 3850 +Wire Wire Line + 5750 5350 5750 5950 +Connection ~ 4300 4400 +Connection ~ 5750 4100 +Wire Wire Line + 4300 4500 4300 4400 +Wire Wire Line + 4300 4400 5450 4400 +Connection ~ 4750 4400 +Wire Wire Line + 4750 4600 4750 4050 +Wire Wire Line + 4750 3150 4750 2750 +Wire Wire Line + 4750 2750 5750 2750 +Wire Wire Line + 5750 4600 5750 4850 +Wire Wire Line + 4750 5500 4750 5950 +Wire Wire Line + 4750 5950 5750 5950 +Wire Wire Line + 5750 3250 5750 3350 +$Comp +L IPLOT U2 +U 1 1 51938D87 +P 5750 3600 +F 0 "U2" H 5600 3700 50 0000 C CNN +F 1 "IPLOT" H 5900 3700 50 0000 C CNN + 1 5750 3600 + 0 1 1 0 +$EndComp +$Comp +L DC v1 +U 1 1 517A27AF +P 4750 3600 +F 0 "v1" H 4550 3700 60 0000 C CNN +F 1 "DC" H 4550 3550 60 0000 C CNN +F 2 "R1" H 4450 3600 60 0000 C CNN + 1 4750 3600 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 517A278C +P 4750 5050 +F 0 "v2" H 4550 5150 60 0000 C CNN +F 1 "DC" H 4550 5000 60 0000 C CNN +F 2 "R1" H 4450 5050 60 0000 C CNN + 1 4750 5050 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 5178C864 +P 6050 4100 +F 0 "U1" H 5900 4200 50 0000 C CNN +F 1 "VPLOT8_1" H 6200 4200 50 0000 C CNN + 1 6050 4100 + 0 1 1 0 +$EndComp +$Comp +L NPN Q1 +U 1 1 5178C812 +P 5650 4400 +F 0 "Q1" H 5650 4250 50 0000 R CNN +F 1 "NPN" H 5650 4550 50 0000 R CNN + 1 5650 4400 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG1 +U 1 1 516BDAF0 +P 4300 4400 +F 0 "#FLG1" H 4300 4670 30 0001 C CNN +F 1 "PWR_FLAG" H 4300 4630 30 0000 C CNN + 1 4300 4400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR1 +U 1 1 516BDAE0 +P 4300 4500 +F 0 "#PWR1" H 4300 4500 30 0001 C CNN +F 1 "GND" H 4300 4430 30 0001 C CNN + 1 4300 4500 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516BD9B5 +P 5750 3000 +F 0 "R1" V 5830 3000 50 0000 C CNN +F 1 "5k" V 5750 3000 50 0000 C CNN + 1 5750 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516BD9A9 +P 5750 5100 +F 0 "R2" V 5850 5100 50 0000 C CNN +F 1 "7.07k" V 5750 5100 50 0000 C CNN + 1 5750 5100 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/npn.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/npn.lib new file mode 100644 index 0000000..1ff6b05 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.1/npn.lib @@ -0,0 +1,6 @@ +.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 ++ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 ++ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 ++ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 ++ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 ++ Is=6.734f Eg=1.11 ) diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/analysis b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/analysis new file mode 100644 index 0000000..bd0d4e6 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 15e-00 5e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10-cache.lib new file mode 100644 index 0000000..a66f15e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10-cache.lib @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 10:01:35 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir new file mode 100644 index 0000000..6cc7243 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir @@ -0,0 +1,17 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 10:01:31 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U2 1 3 7 VPLOT8_1 +R2 1 0 50000 +R1 5 1 100000 +R4 4 0 3000 +U4 7 4 IPLOT +v1 5 0 15V +U3 6 3 IPLOT +R3 5 6 5000 +Q1 7 1 3 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.ckt new file mode 100644 index 0000000..6b82c7f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.ckt @@ -0,0 +1,17 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:01:31 pm ist + +* Plotting option vplot8_1 +r2 1 0 50000 +r1 5 1 100000 +r4 4 0 3000 +V_u4 7 4 0 +v1 5 0 15v +V_u3 6 3 0 +r3 5 6 5000 +q1 3 1 7 npn + +.dc v1 0e-00 15e-00 5e-03 +.plot v(1) v(3) v(7) +.plot i(V_u4) +.plot i(V_u3) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.out new file mode 100644 index 0000000..0e51a81 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.out @@ -0,0 +1,22 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:01:31 pm ist + +* Plotting option vplot8_1 +r2 1 0 50000 +r1 5 1 100000 +r4 4 0 3000 +V_u4 7 4 0 +v1 5 0 15v +V_u3 6 3 0 +r3 5 6 5000 +q1 3 1 7 npn + +.dc v1 0e-00 15e-00 5e-03 + +* Control Statements +.control +run +plot v(1) v(3) v(7) +plot i(V_u4) +plot i(V_u3) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.pro new file mode 100644 index 0000000..eed2ea3 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.pro @@ -0,0 +1,74 @@ +update=Monday 15 April 2013 09:51:55 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.proj b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.proj new file mode 100644 index 0000000..6fef01d --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.proj @@ -0,0 +1 @@ +schematicFile example_3.10.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.sch new file mode 100644 index 0000000..54adb65 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.sch @@ -0,0 +1,209 @@ +EESchema Schematic File Version 2 date Monday 15 April 2013 10:01:35 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 43 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5050 3350 4200 3350 +Wire Wire Line + 6850 2850 6850 1300 +Wire Wire Line + 6850 1300 4200 1300 +Wire Wire Line + 4200 1300 4200 2200 +Connection ~ 4200 3350 +Wire Wire Line + 4200 2700 4200 3800 +Wire Wire Line + 6850 3750 6850 5150 +Wire Wire Line + 5350 3550 5350 3750 +Wire Wire Line + 5350 2050 5350 2250 +Wire Wire Line + 5350 1550 5350 1300 +Wire Wire Line + 5350 2750 5350 3150 +Wire Wire Line + 5350 4250 5350 4400 +Wire Wire Line + 4200 4300 4200 5150 +Wire Wire Line + 4200 5150 6850 5150 +Connection ~ 5350 5150 +Connection ~ 5350 1300 +Wire Wire Line + 5350 5650 5350 4900 +Connection ~ 5350 5500 +Connection ~ 5350 3650 +Connection ~ 5350 2900 +Connection ~ 5000 3350 +$Comp +L VPLOT8_1 U2 +U 3 1 516C2B0C +P 5650 3650 +F 0 "U2" H 5500 3750 50 0000 C CNN +F 1 "VPLOT8_1" H 5800 3750 50 0000 C CNN + 3 5650 3650 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 516C2B05 +P 5650 2900 +F 0 "U2" H 5500 3000 50 0000 C CNN +F 1 "VPLOT8_1" H 5800 3000 50 0000 C CNN + 2 5650 2900 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 516C2AFE +P 5000 3050 +F 0 "U2" H 4850 3150 50 0000 C CNN +F 1 "VPLOT8_1" H 5150 3150 50 0000 C CNN + 1 5000 3050 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 516C2AB7 +P 5350 5500 +F 0 "#FLG01" H 5350 5770 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 5730 30 0000 C CNN + 1 5350 5500 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 516C2AAB +P 5350 5650 +F 0 "#PWR02" H 5350 5650 30 0001 C CNN +F 1 "GND" H 5350 5580 30 0001 C CNN + 1 5350 5650 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516C2A3E +P 4200 4050 +F 0 "R2" V 4280 4050 50 0000 C CNN +F 1 "50000" V 4200 4050 50 0000 C CNN + 1 4200 4050 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516C2A13 +P 4200 2450 +F 0 "R1" V 4280 2450 50 0000 C CNN +F 1 "100000" V 4200 2450 50 0000 C CNN + 1 4200 2450 + 1 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--git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/analysis b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/analysis new file mode 100644 index 0000000..bd0d4e6 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 15e-00 5e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11-cache.lib new file mode 100644 index 0000000..c412639 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11-cache.lib @@ -0,0 +1,127 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 10:18:23 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PNP +# +DEF PNP Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 60 H V R CNN +F1 "PNP" 0 150 60 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 F +P 3 0 1 0 25 -25 0 0 0 0 N +P 3 0 1 0 100 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40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir new file mode 100644 index 0000000..72eb140 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir @@ -0,0 +1,23 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 10:18:19 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U4 11 VPLOT8_1 +R1 7 11 100000 +U3 1 4 6 5 VPLOT8_1 +R5 7 3 2000 +U5 3 6 IPLOT +R6 2 0 2700 +U6 5 2 IPLOT +R4 10 0 3000 +U2 4 10 IPLOT +R3 7 9 5000 +U1 9 1 IPLOT +v1 7 0 DC +R2 11 0 50000 +Q2 6 1 5 PNP +Q1 4 11 1 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.ckt new file mode 100644 index 0000000..5e6583e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.ckt @@ -0,0 +1,26 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:18:19 pm ist + +* Plotting option vplot8_1 +r1 7 11 100000 +* Plotting option vplot8_1 +r5 7 3 2000 +V_u5 3 6 0 +r6 2 0 2700 +V_u6 5 2 0 +r4 10 0 3000 +V_u2 4 10 0 +r3 7 9 5000 +V_u1 9 1 0 +v1 7 0 dc 15 +r2 11 0 50000 +q2 5 1 6 pnp +q1 1 11 4 npn + +.dc v1 0e-00 15e-00 5e-03 +.plot v(11) +.plot v(1) v(4) v(6) v(5) +.plot i(V_u5) +.plot i(V_u6) +.plot i(V_u2) +.plot i(V_u1) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.out new file mode 100644 index 0000000..1a2f17d --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.out @@ -0,0 +1,31 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:18:19 pm ist + +* Plotting option vplot8_1 +r1 7 11 100000 +* Plotting option vplot8_1 +r5 7 3 2000 +V_u5 3 6 0 +r6 2 0 2700 +V_u6 5 2 0 +r4 10 0 3000 +V_u2 4 10 0 +r3 7 9 5000 +V_u1 9 1 0 +v1 7 0 dc 15 +r2 11 0 50000 +q2 5 1 6 pnp +q1 1 11 4 npn + +.dc v1 0e-00 15e-00 5e-03 + +* Control Statements +.control +run +plot v(11) +plot v(1) v(4) v(6) v(5) +plot i(V_u5) +plot i(V_u6) +plot i(V_u2) +plot i(V_u1) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.pro new file mode 100644 index 0000000..4ea715e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.pro @@ -0,0 +1,74 @@ +update=Monday 15 April 2013 10:04:33 PM IST +last_client=eeschema +[eeschema] +version=1 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b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.sch @@ -0,0 +1,295 @@ +EESchema Schematic File Version 2 date Monday 15 April 2013 10:18:23 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 43 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5150 3800 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Version 2.3 Date: Tuesday 16 April 2013 11:09:27 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PNP +# +DEF PNP Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 60 H V R CNN +F1 "PNP" 0 150 60 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 F +P 3 0 1 0 25 -25 0 0 0 0 N +P 3 0 1 0 100 -100 65 -65 65 -65 N +P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.lib new file mode 100644 index 0000000..b975094 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.lib @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 01:31:57 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PNP +# +DEF PNP Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 60 H V R CNN +F1 "PNP" 0 150 60 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 F +P 3 0 1 0 25 -25 0 0 0 0 N +P 3 0 1 0 100 -100 65 -65 65 -65 N +P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.bak new file mode 100644 index 0000000..99334cc --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.bak @@ -0,0 +1,207 @@ +EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:09:27 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.12-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 4900 3850 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516CE3EB +P 4900 3850 +F 0 "#FLG01" H 4900 3945 30 0001 C CNN +F 1 "PWR_FLAG" H 4900 4030 30 0000 C CNN + 1 4900 3850 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3850 4950 3850 3850 +Wire Wire Line + 6650 4100 6650 5950 +Wire Wire Line + 5350 3400 5350 3450 +Wire Wire Line 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C CNN +F 1 "5V" H 3650 5350 60 0000 C CNN +F 2 "R1" H 3550 5400 60 0000 C CNN + 1 3850 5400 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 5166ED91 +P 4450 3850 +F 0 "R2" V 4530 3850 50 0000 C CNN +F 1 "10000" V 4450 3850 50 0000 C CNN + 1 4450 3850 + 0 -1 -1 0 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 5166ED50 +P 6650 4100 +F 0 "#FLG02" H 6650 4195 30 0001 C CNN +F 1 "PWR_FLAG" H 6650 4280 30 0000 C CNN + 1 6650 4100 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 5166ED33 +P 6750 4100 +F 0 "#PWR03" H 6750 4100 30 0001 C CNN +F 1 "GND" H 6750 4030 30 0001 C CNN + 1 6750 4100 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5166ED03 +P 5950 4100 +F 0 "R1" V 6030 4100 50 0000 C CNN +F 1 "1000" V 5950 4100 50 0000 C CNN + 1 5950 4100 + 0 -1 -1 0 +$EndComp +$Comp +L DC v2 +U 1 1 5166ECC4 +P 6500 5400 +F 0 "v2" H 6300 5500 60 0000 C CNN +F 1 "5V" H 6300 5350 60 0000 C CNN +F 2 "R1" H 6200 5400 60 0000 C CNN + 1 6500 5400 + -1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 5166EC91 +P 6500 3000 +F 0 "v1" H 6300 3100 60 0000 C CNN +F 1 "5V" H 6300 2950 60 0000 C CNN +F 2 "R1" H 6200 3000 60 0000 C CNN + 1 6500 3000 + 1 0 0 -1 +$EndComp +$Comp +L PNP Q2 +U 1 1 5166EC64 +P 5250 5100 +F 0 "Q2" H 5250 4950 60 0000 R CNN +F 1 "PNP" H 5250 5250 60 0000 R CNN + 1 5250 5100 + 1 0 0 1 +$EndComp +$Comp +L NPN Q1 +U 1 1 5166EC56 +P 5250 3200 +F 0 "Q1" H 5250 3050 50 0000 R CNN +F 1 "NPN" H 5250 3350 50 0000 R CNN + 1 5250 3200 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir new file mode 100644 index 0000000..1961478 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir @@ -0,0 +1,18 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:31:53 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U3 5 1 IPLOT +U1 3 8 IPLOT +U2 1 7 IPLOT +v3 4 0 5V +R2 4 2 10000 +R1 5 0 1000 +v2 0 6 5V +v1 3 0 5V +Q2 7 2 6 PNP +Q1 1 2 8 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.ckt new file mode 100644 index 0000000..2283488 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.ckt @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:31:53 pm ist + +V_u3 5 1 0 +V_u1 3 8 0 +V_u2 1 7 0 +v3 4 0 5v +r2 4 2 10000 +r1 5 0 1000 +v2 0 6 5v +v1 3 0 5v +q2 6 2 7 pnp +q1 8 2 1 npn + +.dc v3 0e-00 5e-00 1e-00 +.plot i(V_u3) +.plot i(V_u1) +.plot i(V_u2) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.out new file mode 100644 index 0000000..61a3934 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.out @@ -0,0 +1,23 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:31:53 pm ist + +V_u3 5 1 0 +V_u1 3 8 0 +V_u2 1 7 0 +v3 4 0 5v +r2 4 2 10000 +r1 5 0 1000 +v2 0 6 5v +v1 3 0 5v +q2 6 2 7 pnp +q1 8 2 1 npn + +.dc v3 0e-00 5e-00 1e-00 + +* Control Statements +.control +run +plot i(V_u3) +plot i(V_u1) +plot i(V_u2) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.pro new file mode 100644 index 0000000..7c14258 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.pro @@ -0,0 +1,84 @@ +update=Monday 15 April 2013 10:21:09 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 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--git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.proj b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.proj new file mode 100644 index 0000000..cf8b515 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.proj @@ -0,0 +1 @@ +schematicFile example_3.12.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.sch new file mode 100644 index 0000000..a133513 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.sch @@ -0,0 +1,222 @@ +EESchema Schematic File Version 2 date Monday 13 May 2013 01:31:57 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio 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R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.bak new file mode 100644 index 0000000..db1ff38 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.bak @@ -0,0 +1,210 @@ +EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:16:49 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip 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[Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +R1 5 7 80000 +U2 7 2 1 VPLOT8_1 +R2 7 0 40000 +R4 4 0 3300 +U4 1 4 IPLOT +v1 5 0 12V +U3 6 2 IPLOT +R3 5 6 4000 +Q1 1 7 2 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.ckt new file mode 100644 index 0000000..cc4fac4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.ckt @@ -0,0 +1,17 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 11:31:17 am ist + +r1 5 7 80000 +* Plotting option vplot8_1 +r2 7 0 40000 +r4 4 0 3300 +V_u4 1 4 0 +v1 5 0 12v +V_u3 6 2 0 +r3 5 6 4000 +q1 2 7 1 npn + +.dc v1 0e-00 12e-00 12e-03 +.plot v(7) v(2) v(1) +.plot i(V_u4) +.plot i(V_u3) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.out 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b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.sch @@ -0,0 +1,209 @@ +EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:31:21 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L R R1 +U 1 1 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b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/analysis @@ -0,0 +1 @@ +.tran 5e-00 100e-00 0e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14-cache.lib new file mode 100644 index 0000000..4090ea9 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14-cache.lib @@ -0,0 +1,131 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 01:35:55 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.bak new file mode 100644 index 0000000..850e6be --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.bak @@ -0,0 +1,227 @@ +EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:42:22 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example3.4-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5000 5750 5000 4300 +Connection ~ 4550 3050 +Connection ~ 4650 3050 +Wire Wire Line + 4300 3050 4700 3050 +Wire Wire Line + 3800 3050 3700 3050 +Connection ~ 5000 2650 +Wire Wire Line + 5900 2550 5900 1050 +Wire Wire Line + 5000 3800 5000 3250 +Wire Wire Line + 5000 2050 5000 1550 +Connection ~ 5000 5450 +Wire Wire Line + 5900 1050 5000 1050 +Wire Wire Line + 2900 3050 3200 3050 +Wire Wire Line + 2900 5200 2900 5450 +Connection ~ 5000 5600 +Connection ~ 5000 3450 +Wire Wire Line + 5000 2550 5000 2850 +Wire Wire Line + 5900 3450 5900 5450 +Wire Wire Line + 2900 3950 2900 4300 +Wire Wire Line + 5900 5450 2900 5450 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516CEB5B +P 4550 3050 +F 0 "#FLG01" H 4550 3145 30 0001 C CNN +F 1 "PWR_FLAG" H 4550 3230 30 0000 C CNN + 1 4550 3050 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U5 +U 1 1 516CEB46 +P 4650 3350 +F 0 "U5" H 4500 3450 50 0000 C CNN +F 1 "VPLOT8_1" H 4800 3450 50 0000 C CNN + 1 4650 3350 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516CEB0E +P 4050 3050 +F 0 "U4" H 3900 3150 50 0000 C CNN +F 1 "IPLOT" H 4200 3150 50 0000 C CNN + 1 4050 3050 + -1 0 0 1 +$EndComp +$Comp +L R R2 +U 1 1 516CEAFA +P 3450 3050 +F 0 "R2" V 3530 3050 50 0000 C CNN +F 1 "100000" V 3450 3050 50 0000 C CNN + 1 3450 3050 + 0 1 1 0 +$EndComp +$Comp +L PULSE v3 +U 1 1 516CEAC5 +P 2900 3500 +F 0 "v3" H 2700 3600 60 0000 C CNN +F 1 "PULSE" H 2700 3450 60 0000 C CNN +F 2 "R1" H 2600 3500 60 0000 C CNN + 1 2900 3500 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516BD8B9 +P 5300 2650 +F 0 "U3" H 5150 2750 50 0000 C CNN +F 1 "VPLOT8_1" H 5450 2750 50 0000 C CNN + 1 5300 2650 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U3 +U 2 1 516BD8AC +P 5300 3450 +F 0 "U3" H 5150 3550 50 0000 C CNN +F 1 "VPLOT8_1" H 5450 3550 50 0000 C CNN + 2 5300 3450 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516BD643 +P 5000 4050 +F 0 "U2" H 4850 4150 50 0000 C CNN +F 1 "IPLOT" H 5150 4150 50 0000 C CNN + 1 5000 4050 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516BD5F9 +P 5000 2300 +F 0 "U1" H 4850 2400 50 0000 C CNN +F 1 "IPLOT" H 5150 2400 50 0000 C CNN + 1 5000 2300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 5166BF83 +P 5000 5600 +F 0 "#FLG02" H 5000 5695 30 0001 C CNN +F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN + 1 5000 5600 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR03 +U 1 1 5166BF64 +P 5000 5750 +F 0 "#PWR03" H 5000 5750 30 0001 C CNN +F 1 "GND" H 5000 5680 30 0001 C CNN + 1 5000 5750 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 5166BEE6 +P 2900 4750 +F 0 "v1" H 2700 4850 60 0000 C CNN +F 1 "3V" H 2700 4700 60 0000 C CNN +F 2 "R1" H 2600 4750 60 0000 C CNN + 1 2900 4750 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 5166BED7 +P 5900 3000 +F 0 "v2" H 5700 3100 60 0000 C CNN +F 1 "10V" H 5700 2950 60 0000 C CNN +F 2 "R1" H 5600 3000 60 0000 C CNN + 1 5900 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5166BE8E +P 5000 1300 +F 0 "R1" V 5080 1300 50 0000 C CNN +F 1 "3000" V 5000 1300 50 0000 C CNN + 1 5000 1300 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 5166BE53 +P 4900 3050 +F 0 "Q1" H 4900 2900 50 0000 R CNN +F 1 "NPN" H 4900 3200 50 0000 R CNN + 1 4900 3050 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir new file mode 100644 index 0000000..e9d15ad --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir @@ -0,0 +1,20 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:35:51 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U6 8 VPLOT8_1 +U5 9 VPLOT8_1 +U4 9 1 IPLOT +R2 1 8 100000 +v3 8 4 PULSE +U3 2 3 VPLOT8_1 +U2 3 0 IPLOT +U1 7 2 IPLOT +v1 4 0 3V +v2 6 0 10V +R1 6 7 3000 +Q1 3 9 2 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.ckt new file mode 100644 index 0000000..b1e99c7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.ckt @@ -0,0 +1,23 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:35:51 pm ist + +* Plotting option vplot8_1 +* Plotting option vplot8_1 +V_u4 9 1 0 +r2 1 8 100000 +v3 8 4 pulse(0 1 0 0 0 2 ) +* Plotting option vplot8_1 +V_u2 3 0 0 +V_u1 7 2 0 +v1 4 0 3v +v2 6 0 10v +r1 6 7 3000 +q1 2 9 3 npn + +.tran 5e-00 100e-00 0e-00 +.plot v(8) +.plot v(9) +.plot i(V_u4) +.plot v(2) v(3) +.plot i(V_u2) +.plot i(V_u1) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.out new file mode 100644 index 0000000..be85aa9 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.out @@ -0,0 +1,28 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:35:51 pm ist + +* Plotting option vplot8_1 +* Plotting option vplot8_1 +V_u4 9 1 0 +r2 1 8 100000 +v3 8 4 pulse(0 1 0 0 0 2 ) +* Plotting option vplot8_1 +V_u2 3 0 0 +V_u1 7 2 0 +v1 4 0 3v +v2 6 0 10v +r1 6 7 3000 +q1 2 9 3 npn + +.tran 5e-00 100e-00 0e-00 + +* Control Statements +.control +run +plot v(8) +plot v(9) +plot i(V_u4) +plot v(2) v(3) +plot i(V_u2) +plot i(V_u1) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.pro new file mode 100644 index 0000000..4628902 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.pro @@ -0,0 +1,74 @@ +update=Tuesday 16 April 2013 11:34:19 AM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.proj b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.proj new file mode 100644 index 0000000..2c95037 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.proj @@ -0,0 +1 @@ +schematicFile example_3.14.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.sch new file mode 100644 index 0000000..4f4f51a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.sch @@ -0,0 +1,236 @@ +EESchema Schematic File Version 2 date Monday 13 May 2013 01:35:55 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "13 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 3050 3050 +$Comp +L VPLOT8_1 U6 +U 1 1 51909ECA +P 3050 3350 +F 0 "U6" H 2900 3450 50 0000 C CNN +F 1 "VPLOT8_1" H 3200 3450 50 0000 C CNN + 1 3050 3350 + -1 0 0 1 +$EndComp +Wire Wire Line + 5000 5750 5000 4300 +Connection ~ 4550 3050 +Connection ~ 4650 3050 +Wire Wire Line + 4300 3050 4700 3050 +Wire Wire Line + 3800 3050 3700 3050 +Connection ~ 5000 2650 +Wire Wire Line + 5900 2550 5900 1050 +Wire Wire Line + 5000 3800 5000 3250 +Wire Wire Line + 5000 2050 5000 1550 +Connection ~ 5000 5450 +Wire Wire Line + 5900 1050 5000 1050 +Wire Wire Line + 2900 3050 3200 3050 +Wire Wire Line + 2900 5200 2900 5450 +Connection ~ 5000 5600 +Connection ~ 5000 3450 +Wire Wire Line + 5000 2550 5000 2850 +Wire Wire Line + 5900 3450 5900 5450 +Wire Wire Line + 2900 3950 2900 4300 +Wire Wire Line + 5900 5450 2900 5450 +$Comp +L PWR_FLAG #FLG1 +U 1 1 516CEB5B +P 4550 3050 +F 0 "#FLG1" H 4550 3145 30 0001 C CNN +F 1 "PWR_FLAG" H 4550 3230 30 0000 C CNN + 1 4550 3050 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U5 +U 1 1 516CEB46 +P 4650 3350 +F 0 "U5" H 4500 3450 50 0000 C CNN +F 1 "VPLOT8_1" H 4800 3450 50 0000 C CNN + 1 4650 3350 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516CEB0E +P 4050 3050 +F 0 "U4" H 3900 3150 50 0000 C CNN +F 1 "IPLOT" H 4200 3150 50 0000 C CNN + 1 4050 3050 + -1 0 0 1 +$EndComp +$Comp +L R R2 +U 1 1 516CEAFA +P 3450 3050 +F 0 "R2" V 3530 3050 50 0000 C CNN +F 1 "100000" V 3450 3050 50 0000 C CNN + 1 3450 3050 + 0 1 1 0 +$EndComp +$Comp +L PULSE v3 +U 1 1 516CEAC5 +P 2900 3500 +F 0 "v3" H 2700 3600 60 0000 C CNN +F 1 "PULSE" H 2700 3450 60 0000 C CNN +F 2 "R1" H 2600 3500 60 0000 C CNN + 1 2900 3500 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516BD8B9 +P 5300 2650 +F 0 "U3" H 5150 2750 50 0000 C CNN +F 1 "VPLOT8_1" H 5450 2750 50 0000 C CNN + 1 5300 2650 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U3 +U 2 1 516BD8AC +P 5300 3450 +F 0 "U3" H 5150 3550 50 0000 C CNN +F 1 "VPLOT8_1" H 5450 3550 50 0000 C CNN + 2 5300 3450 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516BD643 +P 5000 4050 +F 0 "U2" H 4850 4150 50 0000 C CNN +F 1 "IPLOT" H 5150 4150 50 0000 C CNN + 1 5000 4050 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516BD5F9 +P 5000 2300 +F 0 "U1" H 4850 2400 50 0000 C CNN +F 1 "IPLOT" H 5150 2400 50 0000 C CNN + 1 5000 2300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG2 +U 1 1 5166BF83 +P 5000 5600 +F 0 "#FLG2" H 5000 5695 30 0001 C CNN +F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN + 1 5000 5600 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR1 +U 1 1 5166BF64 +P 5000 5750 +F 0 "#PWR1" H 5000 5750 30 0001 C CNN +F 1 "GND" H 5000 5680 30 0001 C CNN + 1 5000 5750 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 5166BEE6 +P 2900 4750 +F 0 "v1" H 2700 4850 60 0000 C CNN +F 1 "3V" H 2700 4700 60 0000 C CNN +F 2 "R1" H 2600 4750 60 0000 C CNN + 1 2900 4750 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 5166BED7 +P 5900 3000 +F 0 "v2" H 5700 3100 60 0000 C CNN +F 1 "10V" H 5700 2950 60 0000 C CNN +F 2 "R1" H 5600 3000 60 0000 C CNN + 1 5900 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5166BE8E +P 5000 1300 +F 0 "R1" V 5080 1300 50 0000 C CNN +F 1 "3000" V 5000 1300 50 0000 C CNN + 1 5000 1300 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 5166BE53 +P 4900 3050 +F 0 "Q1" H 4900 2900 50 0000 R CNN +F 1 "NPN" H 4900 3200 50 0000 R CNN + 1 4900 3050 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/analysis b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/analysis new file mode 100644 index 0000000..05351e0 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/analysis @@ -0,0 +1 @@ +.tran 1e-00 10e-00 0e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16-cache.lib new file mode 100644 index 0000000..e8eb963 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16-cache.lib @@ -0,0 +1,131 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 12:27:16 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.bak new file mode 100644 index 0000000..8773c0d --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.bak @@ -0,0 +1,221 @@ +EESchema Schematic File Version 2 date Tuesday 16 April 2013 12:24:14 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.3-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5450 4850 5450 5350 +Connection ~ 4300 5050 +Wire Wire Line + 4300 5050 4300 3300 +Wire Wire Line + 6650 5050 3500 5050 +Connection ~ 5450 5050 +Wire Wire Line + 6650 5050 6650 4450 +Wire Wire Line + 3500 5050 3500 4450 +Wire Wire Line + 5450 3700 5450 3500 +Wire Wire Line + 5450 2950 5450 3100 +Wire Wire Line + 5450 2300 5450 2450 +Connection ~ 5450 3050 +Connection ~ 5450 3600 +Wire Wire Line + 5450 1800 6650 1800 +Wire Wire Line + 6650 1800 6650 3550 +Wire Wire Line + 4800 3300 5150 3300 +Connection ~ 5100 3300 +Connection ~ 6650 5050 +Connection ~ 4950 3300 +Connection ~ 5450 5200 +Wire Wire Line + 3500 3550 3500 3050 +Wire Wire Line + 3500 3050 5450 3050 +Wire Wire Line + 5450 4200 5450 4350 +$Comp +L R R1 +U 1 1 516CF523 +P 5450 4600 +F 0 "R1" V 5530 4600 50 0000 C CNN +F 1 "5000" V 5450 4600 50 0000 C CNN + 1 5450 4600 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 516CE235 +P 4950 3300 +F 0 "#FLG01" H 4950 3570 30 0001 C CNN +F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN + 1 4950 3300 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516CE22C +P 5450 5200 +F 0 "#FLG02" H 5450 5470 30 0001 C CNN +F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN + 1 5450 5200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516CE20C +P 5450 5350 +F 0 "#PWR03" H 5450 5350 30 0001 C CNN +F 1 "GND" H 5450 5280 30 0001 C CNN + 1 5450 5350 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 516CE1D8 +P 5100 3000 +F 0 "U2" H 4950 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN + 1 5100 3000 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516CE177 +P 4550 3300 +F 0 "U1" H 4400 3400 50 0000 C CNN +F 1 "IPLOT" H 4700 3400 50 0000 C CNN + 1 4550 3300 + -1 0 0 1 +$EndComp +$Comp +L DC v1 +U 1 1 516CE159 +P 3500 4000 +F 0 "v1" H 3300 4100 60 0000 C CNN +F 1 "5V" H 3300 3950 60 0000 C CNN +F 2 "R1" H 3200 4000 60 0000 C CNN + 1 3500 4000 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 516CE102 +P 5750 3050 +F 0 "U2" H 5600 3150 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN + 2 5750 3050 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 516CE0C0 +P 5450 2050 +F 0 "R2" V 5530 2050 50 0000 C CNN +F 1 "10000" V 5450 2050 50 0000 C CNN + 1 5450 2050 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U3 +U 1 1 516CE0B6 +P 5450 2700 +F 0 "U3" H 5300 2800 50 0000 C CNN +F 1 "IPLOT" H 5600 2800 50 0000 C CNN + 1 5450 2700 + 0 1 1 0 +$EndComp +$Comp +L DC v2 +U 1 1 516CE08D +P 6650 4000 +F 0 "v2" H 6450 4100 60 0000 C CNN +F 1 "10V" H 6450 3950 60 0000 C CNN +F 2 "R1" H 6350 4000 60 0000 C CNN + 1 6650 4000 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 3 1 516CE083 +P 5750 3600 +F 0 "U2" H 5600 3700 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN + 3 5750 3600 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516CE07C +P 5450 3950 +F 0 "U4" H 5300 4050 50 0000 C CNN +F 1 "IPLOT" H 5600 4050 50 0000 C CNN + 1 5450 3950 + 0 1 1 0 +$EndComp +$Comp +L NPN Q1 +U 1 1 516CE055 +P 5350 3300 +F 0 "Q1" H 5350 3150 50 0000 R CNN +F 1 "NPN" H 5350 3450 50 0000 R CNN + 1 5350 3300 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir new file mode 100644 index 0000000..e62088b --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir @@ -0,0 +1,17 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 12:27:13 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v1 7 0 PULSE +R1 1 0 5000 +U2 2 7 6 VPLOT8_1 +U1 2 0 IPLOT +R2 4 5 10000 +U3 5 7 IPLOT +v2 4 0 10V +U4 6 1 IPLOT +Q1 6 2 7 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.ckt new file mode 100644 index 0000000..3741239 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.ckt @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 12:27:13 pm ist + +v1 7 0 pulse(0 5 0 0 0 1 2) +r1 1 0 5000 +* Plotting option vplot8_1 +V_u1 2 0 0 +r2 4 5 10000 +V_u3 5 7 0 +v2 4 0 10v +V_u4 6 1 0 +q1 7 2 6 npn + +.tran 1e-00 10e-00 0e-00 +.plot v(2) v(7) v(6) +.plot i(V_u1) +.plot i(V_u3) +.plot i(V_u4) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.out new file mode 100644 index 0000000..86e4303 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.out @@ -0,0 +1,23 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 12:27:13 pm ist + +v1 7 0 pulse(0 5 0 0 0 1 2) +r1 1 0 5000 +* Plotting option vplot8_1 +V_u1 2 0 0 +r2 4 5 10000 +V_u3 5 7 0 +v2 4 0 10v +V_u4 6 1 0 +q1 7 2 6 npn + +.tran 1e-00 10e-00 0e-00 + +* Control Statements +.control +run +plot v(2) v(7) v(6) +plot i(V_u1) +plot i(V_u3) +plot i(V_u4) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.pro new file mode 100644 index 0000000..23043f4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.pro @@ -0,0 +1,74 @@ +update=Tuesday 16 April 2013 12:26:32 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.proj b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.proj new file mode 100644 index 0000000..5af6371 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.proj @@ -0,0 +1 @@ +schematicFile example_3.16.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.sch new file mode 100644 index 0000000..95e37c9 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.sch @@ -0,0 +1,220 @@ +EESchema Schematic File Version 2 date Tuesday 16 April 2013 12:27:16 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PULSE v1 +U 1 1 516CF62D +P 3500 4000 +F 0 "v1" H 3300 4100 60 0000 C CNN +F 1 "PULSE" H 3300 3950 60 0000 C CNN +F 2 "R1" H 3200 4000 60 0000 C CNN + 1 3500 4000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5450 4850 5450 5350 +Connection ~ 4300 5050 +Wire Wire Line + 4300 5050 4300 3300 +Wire Wire Line + 6650 5050 3500 5050 +Connection ~ 5450 5050 +Wire Wire Line + 6650 5050 6650 4450 +Wire Wire Line + 3500 5050 3500 4450 +Wire Wire Line + 5450 3700 5450 3500 +Wire Wire Line + 5450 2950 5450 3100 +Wire Wire Line + 5450 2300 5450 2450 +Connection ~ 5450 3050 +Connection ~ 5450 3600 +Wire Wire Line + 5450 1800 6650 1800 +Wire Wire Line + 6650 1800 6650 3550 +Wire Wire Line + 4800 3300 5150 3300 +Connection ~ 5100 3300 +Connection ~ 6650 5050 +Connection ~ 4950 3300 +Connection ~ 5450 5200 +Wire Wire Line + 3500 3550 3500 3050 +Wire Wire Line + 3500 3050 5450 3050 +Wire Wire Line + 5450 4200 5450 4350 +$Comp +L R R1 +U 1 1 516CF523 +P 5450 4600 +F 0 "R1" V 5530 4600 50 0000 C CNN +F 1 "5000" V 5450 4600 50 0000 C CNN + 1 5450 4600 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 516CE235 +P 4950 3300 +F 0 "#FLG01" H 4950 3570 30 0001 C CNN +F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN + 1 4950 3300 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516CE22C +P 5450 5200 +F 0 "#FLG02" H 5450 5470 30 0001 C CNN +F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN + 1 5450 5200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516CE20C +P 5450 5350 +F 0 "#PWR03" H 5450 5350 30 0001 C CNN +F 1 "GND" H 5450 5280 30 0001 C CNN + 1 5450 5350 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 516CE1D8 +P 5100 3000 +F 0 "U2" H 4950 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN + 1 5100 3000 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516CE177 +P 4550 3300 +F 0 "U1" H 4400 3400 50 0000 C CNN +F 1 "IPLOT" H 4700 3400 50 0000 C CNN + 1 4550 3300 + -1 0 0 1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 516CE102 +P 5750 3050 +F 0 "U2" H 5600 3150 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN + 2 5750 3050 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 516CE0C0 +P 5450 2050 +F 0 "R2" V 5530 2050 50 0000 C CNN +F 1 "10000" V 5450 2050 50 0000 C CNN + 1 5450 2050 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U3 +U 1 1 516CE0B6 +P 5450 2700 +F 0 "U3" H 5300 2800 50 0000 C CNN +F 1 "IPLOT" H 5600 2800 50 0000 C CNN + 1 5450 2700 + 0 1 1 0 +$EndComp +$Comp +L DC v2 +U 1 1 516CE08D +P 6650 4000 +F 0 "v2" H 6450 4100 60 0000 C CNN +F 1 "10V" H 6450 3950 60 0000 C CNN +F 2 "R1" H 6350 4000 60 0000 C CNN + 1 6650 4000 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 3 1 516CE083 +P 5750 3600 +F 0 "U2" H 5600 3700 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN + 3 5750 3600 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516CE07C +P 5450 3950 +F 0 "U4" H 5300 4050 50 0000 C CNN +F 1 "IPLOT" H 5600 4050 50 0000 C CNN + 1 5450 3950 + 0 1 1 0 +$EndComp +$Comp +L NPN Q1 +U 1 1 516CE055 +P 5350 3300 +F 0 "Q1" H 5350 3150 50 0000 R CNN +F 1 "NPN" H 5350 3450 50 0000 R CNN + 1 5350 3300 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/analysis b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/analysis new file mode 100644 index 0000000..31f2ad8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 2e-00 2e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.bak new file mode 100644 index 0000000..646744a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.bak @@ -0,0 +1,107 @@ +EESchema-LIBRARY Version 2.3 Date: Friday 26 April 2013 04:00:58 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# Idc +# +DEF Idc i 0 40 Y Y 1 F N +F0 "i" -200 100 60 H V C CNN +F1 "Idc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.lib new file mode 100644 index 0000000..b92ac3a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.lib @@ -0,0 +1,107 @@ +EESchema-LIBRARY Version 2.3 Date: Friday 26 April 2013 04:23:31 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# Idc +# +DEF Idc i 0 40 Y Y 1 F N +F0 "i" -200 100 60 H V C CNN +F1 "Idc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak new file mode 100644 index 0000000..65ec82c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak @@ -0,0 +1,188 @@ +EESchema Schematic File Version 2 date Friday 26 April 2013 04:00:58 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.20-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "26 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 6350 3300 6350 2800 +Wire Wire Line + 6350 2800 5950 2800 +Wire Wire Line + 4750 4200 4950 4200 +Wire Wire Line + 5450 4200 5650 4200 +Wire Wire Line + 5950 3300 5950 3650 +Wire Wire Line + 5950 4200 5950 4050 +Connection ~ 5950 5350 +Connection ~ 5950 5450 +Connection ~ 5950 3450 +Connection ~ 5950 4100 +Wire Wire Line + 6350 4200 6350 5350 +Wire Wire Line + 5650 4200 5650 3850 +Connection ~ 5650 3850 +Connection ~ 5650 3950 +Wire Wire Line + 5950 5600 5950 4700 +Wire Wire Line + 6350 5350 5450 5350 +Wire Wire Line + 5450 5350 5450 5100 +Wire Wire Line + 5450 5100 4750 5100 +$Comp +L IDC i1 +U 1 1 517A17EC +P 4750 4650 +F 0 "i1" H 4550 4750 60 0000 C CNN +F 1 "IDC" H 4550 4600 60 0000 C CNN +F 2 "R1" H 4450 4650 60 0000 C CNN + 1 4750 4650 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 517A1753 +P 5950 5350 +F 0 "#FLG01" H 5950 5620 30 0001 C CNN +F 1 "PWR_FLAG" H 5950 5580 30 0000 C CNN + 1 5950 5350 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 517A174B +P 5650 3950 +F 0 "#FLG02" H 5650 4220 30 0001 C CNN +F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN + 1 5650 3950 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U4 +U 1 1 517A172B +P 5950 4450 +F 0 "U4" H 5800 4550 50 0000 C CNN +F 1 "IPLOT" H 6100 4550 50 0000 C CNN + 1 5950 4450 + 0 -1 -1 0 +$EndComp +$Comp +L IPLOT U2 +U 1 1 517A1709 +P 5200 4200 +F 0 "U2" H 5050 4300 50 0000 C CNN +F 1 "IPLOT" H 5350 4300 50 0000 C CNN + 1 5200 4200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U3 +U 1 1 517A16C8 +P 5950 3050 +F 0 "U3" H 5800 3150 50 0000 C CNN +F 1 "IPLOT" H 6100 3150 50 0000 C CNN + 1 5950 3050 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 5166CA3C +P 5650 4100 +F 0 "U1" H 5500 4200 50 0000 C CNN +F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN + 2 5650 4100 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 5166C9F3 +P 5650 3450 +F 0 "U1" H 5500 3550 50 0000 C CNN +F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN + 1 5650 3450 + 0 -1 -1 0 +$EndComp +$Comp +L GND #PWR03 +U 1 1 5166C87D +P 5950 5600 +F 0 "#PWR03" H 5950 5600 30 0001 C CNN +F 1 "GND" H 5950 5530 30 0001 C CNN + 1 5950 5600 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 5166C79C +P 6350 3750 +F 0 "v1" H 6150 3850 60 0000 C CNN +F 1 "2" H 6150 3700 60 0000 C CNN +F 2 "R1" H 6050 3750 60 0000 C CNN + 1 6350 3750 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 5166C72A +P 5850 3850 +F 0 "Q1" H 5850 3700 50 0000 R CNN +F 1 "NPN" H 5850 4000 50 0000 R CNN + 1 5850 3850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir new file mode 100644 index 0000000..419bc05 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 26 April 2013 03:55:55 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +i1 5 0 IDC +U4 0 1 IPLOT +U2 3 5 IPLOT +U3 4 6 IPLOT +U1 6 1 VPLOT8_1 +v1 4 0 2 +Q1 1 3 6 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt new file mode 100644 index 0000000..a91b990 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt @@ -0,0 +1,17 @@ +* eeschema netlist version 1.1 (spice format) creation date: friday 26 april 2013 03:55:55 pm ist +.include npn.lib + +i1 5 0 idc +V_u4 0 1 0 +V_u2 3 5 0 +V_u3 4 6 0 +* Plotting option vplot8_1 +v1 4 0 2 +q1 6 3 1 npn + +.dc v1 0e-00 2e-00 2e-03 +.plot i(V_u4) +.plot i(V_u2) +.plot i(V_u3) +.plot v(6) v(1) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out new file mode 100644 index 0000000..b2caa59 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out @@ -0,0 +1,22 @@ +* eeschema netlist version 1.1 (spice format) creation date: friday 26 april 2013 03:55:55 pm ist +.include npn.lib + +i1 5 0 idc +V_u4 0 1 0 +V_u2 3 5 0 +V_u3 4 6 0 +* Plotting option vplot8_1 +v1 4 0 2 +q1 6 3 1 npn + +.dc v1 0e-00 2e-00 2e-03 + +* Control Statements +.control +run +plot i(V_u4) +plot i(V_u2) +plot i(V_u3) +plot v(6) v(1) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro new file mode 100644 index 0000000..8e18c73 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro @@ -0,0 +1,74 @@ +update=Tuesday 16 April 2013 12:53:24 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj new file mode 100644 index 0000000..231747a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj @@ -0,0 +1 @@ +schematicFile example_3.20.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch new file mode 100644 index 0000000..a694eb1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch @@ -0,0 +1,183 @@ +EESchema Schematic File Version 2 date Friday 26 April 2013 04:23:31 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.20-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "26 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 6350 4200 6350 5100 +Wire Wire Line + 6350 3300 6350 2800 +Wire Wire Line + 6350 2800 5950 2800 +Wire Wire Line + 4750 4200 4950 4200 +Wire Wire Line + 5450 4200 5650 4200 +Wire Wire Line + 5950 3300 5950 3650 +Wire Wire Line + 5950 4200 5950 4050 +Connection ~ 5950 5100 +Connection ~ 5950 3450 +Connection ~ 5950 4100 +Wire Wire Line + 5650 4200 5650 3850 +Connection ~ 5650 3850 +Connection ~ 5650 3950 +Wire Wire Line + 6350 5100 4750 5100 +Wire Wire Line + 5950 5200 5950 4700 +$Comp +L IDC i1 +U 1 1 517A17EC +P 4750 4650 +F 0 "i1" H 4550 4750 60 0000 C CNN +F 1 "IDC" H 4550 4600 60 0000 C CNN +F 2 "R1" H 4450 4650 60 0000 C CNN + 1 4750 4650 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 517A1753 +P 5950 5100 +F 0 "#FLG01" H 5950 5370 30 0001 C CNN +F 1 "PWR_FLAG" H 5950 5330 30 0000 C CNN + 1 5950 5100 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 517A174B +P 5650 3950 +F 0 "#FLG02" H 5650 4220 30 0001 C CNN +F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN + 1 5650 3950 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U4 +U 1 1 517A172B +P 5950 4450 +F 0 "U4" H 5800 4550 50 0000 C CNN +F 1 "IPLOT" H 6100 4550 50 0000 C CNN + 1 5950 4450 + 0 -1 -1 0 +$EndComp +$Comp +L IPLOT U2 +U 1 1 517A1709 +P 5200 4200 +F 0 "U2" H 5050 4300 50 0000 C CNN +F 1 "IPLOT" H 5350 4300 50 0000 C CNN + 1 5200 4200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U3 +U 1 1 517A16C8 +P 5950 3050 +F 0 "U3" H 5800 3150 50 0000 C CNN +F 1 "IPLOT" H 6100 3150 50 0000 C CNN + 1 5950 3050 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 5166CA3C +P 5650 4100 +F 0 "U1" H 5500 4200 50 0000 C CNN +F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN + 2 5650 4100 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 5166C9F3 +P 5650 3450 +F 0 "U1" H 5500 3550 50 0000 C CNN +F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN + 1 5650 3450 + 0 -1 -1 0 +$EndComp +$Comp +L GND #PWR03 +U 1 1 5166C87D +P 5950 5200 +F 0 "#PWR03" H 5950 5200 30 0001 C CNN +F 1 "GND" H 5950 5130 30 0001 C CNN + 1 5950 5200 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 5166C79C +P 6350 3750 +F 0 "v1" H 6150 3850 60 0000 C CNN +F 1 "2" H 6150 3700 60 0000 C CNN +F 2 "R1" H 6050 3750 60 0000 C CNN + 1 6350 3750 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 5166C72A +P 5850 3850 +F 0 "Q1" H 5850 3700 50 0000 R CNN +F 1 "NPN" H 5850 4000 50 0000 R CNN + 1 5850 3850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/npn.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/npn.lib new file mode 100644 index 0000000..1ff6b05 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.20/npn.lib @@ -0,0 +1,6 @@ +.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 ++ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 ++ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 ++ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 ++ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 ++ Is=6.734f Eg=1.11 ) diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/analysis b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/analysis new file mode 100644 index 0000000..10c280a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 5e-00 5e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib new file mode 100644 index 0000000..a8411e8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib @@ -0,0 +1,6 @@ +.model bjt NPN( Vtf=1.7 Cjc=7.306p Nc=2 Tr=46.91n Ne=1.307 ++ Cje=22.01p Isc=0 Xtb=1.5 Rb=10 Rc=1 ++ Tf=411.1p Xti=3 Ikr=0 Bf=50 Fc=.5 ++ Ise=14.34f Br=6.092 Ikf=.2847 Mje=.377 Mjc=.3416 ++ Vaf=74.03 Vjc=.2 Vje=.75 Xtf=3 Itf=.6 ++ Is=14.34f Eg=1.11 ) \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak new file mode 100644 index 0000000..dad7e0c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak @@ -0,0 +1,218 @@ +EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:57:15 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.3-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 4000 3300 +Wire Wire Line + 5450 4200 5450 5350 +Wire Wire Line + 6650 5050 3500 5050 +Connection ~ 5450 5050 +Wire Wire Line + 6650 5050 6650 4450 +Wire Wire Line + 3500 5050 3500 4450 +Wire Wire Line + 4300 3300 3500 3300 +Wire Wire Line + 5450 3700 5450 3500 +Wire Wire Line + 5450 2950 5450 3100 +Wire Wire Line + 5450 2300 5450 2450 +Connection ~ 5450 3050 +Connection ~ 5450 3600 +Wire Wire Line + 3500 3300 3500 3550 +Wire Wire Line + 5450 1800 6650 1800 +Wire Wire Line + 6650 1800 6650 3550 +Wire Wire Line + 4800 3300 5150 3300 +Connection ~ 5100 3300 +Connection ~ 6650 5050 +Connection ~ 4950 3300 +Connection ~ 5450 5200 +Connection ~ 5450 4400 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516CE235 +P 4950 3300 +F 0 "#FLG01" H 4950 3570 30 0001 C CNN +F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN + 1 4950 3300 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516CE22C +P 5450 5200 +F 0 "#FLG02" H 5450 5470 30 0001 C CNN +F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN + 1 5450 5200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516CE20C +P 5450 5350 +F 0 "#PWR03" H 5450 5350 30 0001 C CNN +F 1 "GND" H 5450 5280 30 0001 C CNN + 1 5450 5350 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 516CE1D8 +P 5100 3000 +F 0 "U2" H 4950 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN + 1 5100 3000 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516CE177 +P 4550 3300 +F 0 "U1" H 4400 3400 50 0000 C CNN +F 1 "IPLOT" H 4700 3400 50 0000 C CNN + 1 4550 3300 + -1 0 0 1 +$EndComp +$Comp +L DC v1 +U 1 1 516CE159 +P 3500 4000 +F 0 "v1" H 3300 4100 60 0000 C CNN +F 1 "5V" H 3300 3950 60 0000 C CNN +F 2 "R1" H 3200 4000 60 0000 C CNN + 1 3500 4000 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516CE13E +P 3750 3300 +F 0 "R1" V 3830 3300 50 0000 C CNN +F 1 "2200" V 3750 3300 50 0000 C CNN + 1 3750 3300 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 516CE102 +P 5750 3050 +F 0 "U2" H 5600 3150 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN + 2 5750 3050 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 516CE0C0 +P 5450 2050 +F 0 "R2" V 5530 2050 50 0000 C CNN +F 1 "1000" V 5450 2050 50 0000 C CNN + 1 5450 2050 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U3 +U 1 1 516CE0B6 +P 5450 2700 +F 0 "U3" H 5300 2800 50 0000 C CNN +F 1 "IPLOT" H 5600 2800 50 0000 C CNN + 1 5450 2700 + 0 1 1 0 +$EndComp +$Comp +L DC v2 +U 1 1 516CE08D +P 6650 4000 +F 0 "v2" H 6450 4100 60 0000 C CNN +F 1 "10V" H 6450 3950 60 0000 C CNN +F 2 "R1" H 6350 4000 60 0000 C CNN + 1 6650 4000 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 3 1 516CE083 +P 5750 3600 +F 0 "U2" H 5600 3700 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN + 3 5750 3600 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516CE07C +P 5450 3950 +F 0 "U4" H 5300 4050 50 0000 C CNN +F 1 "IPLOT" H 5600 4050 50 0000 C CNN + 1 5450 3950 + 0 1 1 0 +$EndComp +$Comp +L NPN Q1 +U 1 1 516CE055 +P 5350 3300 +F 0 "Q1" H 5350 3150 50 0000 R CNN +F 1 "NPN" H 5350 3450 50 0000 R CNN + 1 5350 3300 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir new file mode 100644 index 0000000..2e072a8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir @@ -0,0 +1,17 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 12:03:45 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +Q1 7 1 5 PNP +v1 7 0 PULSE +R1 6 0 5000 +U2 1 7 5 VPLOT8_1 +U1 1 0 IPLOT +R2 3 4 10000 +U3 4 7 IPLOT +v2 3 0 10V +U4 5 6 IPLOT + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch new file mode 100644 index 0000000..e0eb696 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch @@ -0,0 +1,235 @@ +EESchema Schematic File Version 2 date Tuesday 16 April 2013 12:03:50 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.3-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PWR_FLAG #FLG01 +U 1 1 516CF0A9 +P 4000 3050 +F 0 "#FLG01" H 4000 3320 30 0001 C CNN +F 1 "PWR_FLAG" H 4000 3280 30 0000 C CNN + 1 4000 3050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3500 4200 3500 5050 +Connection ~ 4300 5050 +Wire Wire Line + 4300 5050 4300 3300 +Connection ~ 3500 3300 +Wire Wire Line + 3500 3550 3500 3050 +Wire Wire Line + 5450 4200 5450 4350 +Connection ~ 4000 3050 +Wire Wire Line + 3500 5050 6650 5050 +Connection ~ 5450 5050 +Wire Wire Line + 6650 5050 6650 4450 +Wire Wire Line + 5450 3700 5450 3500 +Wire Wire Line + 5450 2950 5450 3100 +Wire Wire Line + 5450 2300 5450 2450 +Connection ~ 5450 3050 +Connection ~ 5450 3600 +Wire Wire Line + 5450 1800 6650 1800 +Wire Wire Line + 6650 1800 6650 3550 +Connection ~ 5100 3300 +Connection ~ 6650 5050 +Connection ~ 4950 3300 +Connection ~ 5450 5200 +Wire Wire Line + 5450 5350 5450 4850 +Wire Wire Line + 5150 3300 4800 3300 +Wire Wire Line + 3500 3050 5450 3050 +Wire Wire Line + 5450 3050 5450 3000 +Connection ~ 5450 3000 +$Comp +L PNP Q1 +U 1 1 516CEFD3 +P 5350 3300 +F 0 "Q1" H 5350 3150 60 0000 R CNN +F 1 "PNP" H 5350 3450 60 0000 R CNN + 1 5350 3300 + 1 0 0 1 +$EndComp +$Comp +L PULSE v1 +U 1 1 516CEF97 +P 3500 3750 +F 0 "v1" H 3300 3850 60 0000 C CNN +F 1 "PULSE" H 3300 3700 60 0000 C CNN +F 2 "R1" H 3200 3750 60 0000 C CNN + 1 3500 3750 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516CEF60 +P 5450 4600 +F 0 "R1" V 5530 4600 50 0000 C CNN +F 1 "5000" V 5450 4600 50 0000 C CNN + 1 5450 4600 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516CE235 +P 4950 3300 +F 0 "#FLG02" H 4950 3570 30 0001 C CNN +F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN + 1 4950 3300 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG03 +U 1 1 516CE22C +P 5450 5200 +F 0 "#FLG03" H 5450 5470 30 0001 C CNN +F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN + 1 5450 5200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 516CE20C +P 5450 5350 +F 0 "#PWR04" H 5450 5350 30 0001 C CNN +F 1 "GND" H 5450 5280 30 0001 C CNN + 1 5450 5350 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 516CE1D8 +P 5100 3000 +F 0 "U2" H 4950 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN + 1 5100 3000 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516CE177 +P 4550 3300 +F 0 "U1" H 4400 3400 50 0000 C CNN +F 1 "IPLOT" H 4700 3400 50 0000 C CNN + 1 4550 3300 + -1 0 0 1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 516CE102 +P 5750 3050 +F 0 "U2" H 5600 3150 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN + 2 5750 3050 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 516CE0C0 +P 5450 2050 +F 0 "R2" V 5530 2050 50 0000 C CNN +F 1 "10000" V 5450 2050 50 0000 C CNN + 1 5450 2050 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U3 +U 1 1 516CE0B6 +P 5450 2700 +F 0 "U3" H 5300 2800 50 0000 C CNN +F 1 "IPLOT" H 5600 2800 50 0000 C CNN + 1 5450 2700 + 0 1 1 0 +$EndComp +$Comp +L DC v2 +U 1 1 516CE08D +P 6650 4000 +F 0 "v2" H 6450 4100 60 0000 C CNN +F 1 "10V" H 6450 3950 60 0000 C CNN +F 2 "R1" H 6350 4000 60 0000 C CNN + 1 6650 4000 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 3 1 516CE083 +P 5750 3600 +F 0 "U2" H 5600 3700 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN + 3 5750 3600 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516CE07C +P 5450 3950 +F 0 "U4" H 5300 4050 50 0000 C CNN +F 1 "IPLOT" H 5600 4050 50 0000 C CNN + 1 5450 3950 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak new file mode 100644 index 0000000..f265808 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 12:24:14 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib new file mode 100644 index 0000000..8652c69 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Thursday 25 April 2013 02:05:06 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak new file mode 100644 index 0000000..246ba5c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak @@ -0,0 +1,217 @@ +EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:04:07 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 43 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 4000 3300 +Wire Wire Line + 5450 4200 5450 5350 +Wire Wire Line + 6650 5050 3500 5050 +Connection ~ 5450 5050 +Wire Wire Line + 6650 5050 6650 4450 +Wire Wire Line + 3500 5050 3500 4450 +Wire Wire Line + 4300 3300 3500 3300 +Wire Wire Line + 5450 3700 5450 3500 +Wire Wire Line + 5450 2950 5450 3100 +Wire Wire Line + 5450 2300 5450 2450 +Connection ~ 5450 3050 +Connection ~ 5450 3600 +Wire Wire Line + 3500 3300 3500 3550 +Wire Wire Line + 5450 1800 6650 1800 +Wire Wire Line + 6650 1800 6650 3550 +Wire Wire Line + 4800 3300 5150 3300 +Connection ~ 5100 3300 +Connection ~ 6650 5050 +Connection ~ 4950 3300 +Connection ~ 5450 5200 +Connection ~ 5450 4400 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516CE235 +P 4950 3300 +F 0 "#FLG01" H 4950 3570 30 0001 C CNN +F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN + 1 4950 3300 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516CE22C +P 5450 5200 +F 0 "#FLG02" H 5450 5470 30 0001 C CNN +F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN + 1 5450 5200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516CE20C +P 5450 5350 +F 0 "#PWR03" H 5450 5350 30 0001 C CNN +F 1 "GND" H 5450 5280 30 0001 C CNN + 1 5450 5350 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 516CE1D8 +P 5100 3000 +F 0 "U2" H 4950 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN + 1 5100 3000 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516CE177 +P 4550 3300 +F 0 "U1" H 4400 3400 50 0000 C CNN +F 1 "IPLOT" H 4700 3400 50 0000 C CNN + 1 4550 3300 + -1 0 0 1 +$EndComp +$Comp +L DC v1 +U 1 1 516CE159 +P 3500 4000 +F 0 "v1" H 3300 4100 60 0000 C CNN +F 1 "5V" H 3300 3950 60 0000 C CNN +F 2 "R1" H 3200 4000 60 0000 C CNN + 1 3500 4000 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516CE13E +P 3750 3300 +F 0 "R1" V 3830 3300 50 0000 C CNN +F 1 "2200" V 3750 3300 50 0000 C CNN + 1 3750 3300 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 516CE102 +P 5750 3050 +F 0 "U2" H 5600 3150 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN + 2 5750 3050 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 516CE0C0 +P 5450 2050 +F 0 "R2" V 5530 2050 50 0000 C CNN +F 1 "1000" V 5450 2050 50 0000 C CNN + 1 5450 2050 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U3 +U 1 1 516CE0B6 +P 5450 2700 +F 0 "U3" H 5300 2800 50 0000 C CNN +F 1 "IPLOT" H 5600 2800 50 0000 C CNN + 1 5450 2700 + 0 1 1 0 +$EndComp +$Comp +L DC v2 +U 1 1 516CE08D +P 6650 4000 +F 0 "v2" H 6450 4100 60 0000 C CNN +F 1 "10V" H 6450 3950 60 0000 C CNN +F 2 "R1" H 6350 4000 60 0000 C CNN + 1 6650 4000 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 3 1 516CE083 +P 5750 3600 +F 0 "U2" H 5600 3700 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN + 3 5750 3600 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516CE07C +P 5450 3950 +F 0 "U4" H 5300 4050 50 0000 C CNN +F 1 "IPLOT" H 5600 4050 50 0000 C CNN + 1 5450 3950 + 0 1 1 0 +$EndComp +$Comp +L NPN Q1 +U 1 1 516CE055 +P 5350 3300 +F 0 "Q1" H 5350 3150 50 0000 R CNN +F 1 "NPN" H 5350 3450 50 0000 R CNN + 1 5350 3300 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir new file mode 100644 index 0000000..97a0042 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir @@ -0,0 +1,17 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 25 April 2013 02:05:01 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U2 7 2 5 VPLOT8_1 +U1 7 1 IPLOT +v1 1 0 5V +R1 1 1 2200 +R2 3 4 1k +U3 4 2 IPLOT +v2 3 0 10V +U4 5 0 IPLOT +Q1 5 7 2 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt new file mode 100644 index 0000000..51d6e2f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt @@ -0,0 +1,19 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 02:05:01 pm ist +.include npn.lib + +* Plotting option vplot8_1 +V_u1 7 1 0 +v1 1 0 5v +r1 1 1 2200 +r2 3 4 1k +V_u3 4 2 0 +v2 3 0 10v +V_u4 5 0 0 +q1 2 7 5 npn + +.dc v1 0e-00 5e-00 5e-00 +.plot v(7) v(2) v(5) +.plot i(V_u1) +.plot i(V_u3) +.plot i(V_u4) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out new file mode 100644 index 0000000..30154d7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out @@ -0,0 +1,24 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 02:05:01 pm ist +.include npn.lib + +* Plotting option vplot8_1 +V_u1 7 1 0 +v1 1 0 5v +r1 1 1 2200 +r2 3 4 1k +V_u3 4 2 0 +v2 3 0 10v +V_u4 5 0 0 +q1 2 7 5 npn + +.dc v1 0e-00 5e-00 5e-00 + +* Control Statements +.control +run +plot v(7) v(2) v(5) +plot i(V_u1) +plot i(V_u3) +plot i(V_u4) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro new file mode 100644 index 0000000..4059595 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro @@ -0,0 +1,74 @@ +update=Tuesday 16 April 2013 10:53:01 AM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj new file mode 100644 index 0000000..00153d6 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj @@ -0,0 +1 @@ +schematicFile example_3.3.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch new file mode 100644 index 0000000..0bfa3f7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch @@ -0,0 +1,218 @@ +EESchema Schematic File Version 2 date Thursday 25 April 2013 02:05:06 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.3-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "25 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 4000 3300 +Wire Wire Line + 5450 4200 5450 5350 +Wire Wire Line + 6650 5050 3500 5050 +Connection ~ 5450 5050 +Wire Wire Line + 6650 5050 6650 4450 +Wire Wire Line + 3500 5050 3500 4450 +Wire Wire Line + 4300 3300 3500 3300 +Wire Wire Line + 5450 3700 5450 3500 +Wire Wire Line + 5450 2950 5450 3100 +Wire Wire Line + 5450 2300 5450 2450 +Connection ~ 5450 3050 +Connection ~ 5450 3600 +Wire Wire Line + 3500 3300 3500 3550 +Wire Wire Line + 5450 1800 6650 1800 +Wire Wire Line + 6650 1800 6650 3550 +Wire Wire Line + 4800 3300 5150 3300 +Connection ~ 5100 3300 +Connection ~ 6650 5050 +Connection ~ 4950 3300 +Connection ~ 5450 5200 +Connection ~ 5450 4400 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516CE235 +P 4950 3300 +F 0 "#FLG01" H 4950 3570 30 0001 C CNN +F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN + 1 4950 3300 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516CE22C +P 5450 5200 +F 0 "#FLG02" H 5450 5470 30 0001 C CNN +F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN + 1 5450 5200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516CE20C +P 5450 5350 +F 0 "#PWR03" H 5450 5350 30 0001 C CNN +F 1 "GND" H 5450 5280 30 0001 C CNN + 1 5450 5350 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 516CE1D8 +P 5100 3000 +F 0 "U2" H 4950 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN + 1 5100 3000 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516CE177 +P 4550 3300 +F 0 "U1" H 4400 3400 50 0000 C CNN +F 1 "IPLOT" H 4700 3400 50 0000 C CNN + 1 4550 3300 + -1 0 0 1 +$EndComp +$Comp +L DC v1 +U 1 1 516CE159 +P 3500 4000 +F 0 "v1" H 3300 4100 60 0000 C CNN +F 1 "5V" H 3300 3950 60 0000 C CNN +F 2 "R1" H 3200 4000 60 0000 C CNN + 1 3500 4000 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516CE13E +P 3750 3300 +F 0 "R1" V 3830 3300 50 0000 C CNN +F 1 "2200" V 3750 3300 50 0000 C CNN + 1 3750 3300 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 516CE102 +P 5750 3050 +F 0 "U2" H 5600 3150 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN + 2 5750 3050 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 516CE0C0 +P 5450 2050 +F 0 "R2" V 5530 2050 50 0000 C CNN +F 1 "1k" V 5450 2050 50 0000 C CNN + 1 5450 2050 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U3 +U 1 1 516CE0B6 +P 5450 2700 +F 0 "U3" H 5300 2800 50 0000 C CNN +F 1 "IPLOT" H 5600 2800 50 0000 C CNN + 1 5450 2700 + 0 1 1 0 +$EndComp +$Comp +L DC v2 +U 1 1 516CE08D +P 6650 4000 +F 0 "v2" H 6450 4100 60 0000 C CNN +F 1 "10V" H 6450 3950 60 0000 C CNN +F 2 "R1" H 6350 4000 60 0000 C CNN + 1 6650 4000 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 3 1 516CE083 +P 5750 3600 +F 0 "U2" H 5600 3700 50 0000 C CNN +F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN + 3 5750 3600 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516CE07C +P 5450 3950 +F 0 "U4" H 5300 4050 50 0000 C CNN +F 1 "IPLOT" H 5600 4050 50 0000 C CNN + 1 5450 3950 + 0 1 1 0 +$EndComp +$Comp +L NPN Q1 +U 1 1 516CE055 +P 5350 3300 +F 0 "Q1" H 5350 3150 50 0000 R CNN +F 1 "NPN" H 5350 3450 50 0000 R CNN + 1 5350 3300 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/npn.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/npn.lib new file mode 100644 index 0000000..5aecc2e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.3/npn.lib @@ -0,0 +1,6 @@ +.model npn NPN( Vtf= Cjc= Nc= Tr= Ne= ++ Cje= Vjc= Xtb= Rb= Rc= ++ Tf= Xti= Ikr= Bf=50 Fc= ++ Ikf= Br= Mje= Mjc= Vaf= ++ Isc= Ise= Xtf= Vje= Is= ++ Itf= Eg= ) \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/analysis b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/analysis new file mode 100644 index 0000000..35318bb --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 10e-00 5e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.bak new file mode 100644 index 0000000..ea673cb --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.bak @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 10:43:17 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.lib new file mode 100644 index 0000000..ee59c22 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.lib @@ -0,0 +1,108 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 12:52:43 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# VCCS +# +DEF VCCS G 0 40 Y Y 1 F N +F0 "G" -200 100 50 H V C CNN +F1 "VCCS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.bak new file mode 100644 index 0000000..6e5ac9b --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.bak @@ -0,0 +1,172 @@ +EESchema Schematic File Version 2 date Monday 15 April 2013 07:53:26 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.6-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5650 3850 5650 5350 +Wire Wire Line + 5950 4700 5950 4850 +Wire Wire Line + 5950 2800 5950 2650 +Wire Wire Line + 5950 3300 5950 3650 +Wire Wire Line + 5950 2150 6350 2150 +Wire Wire Line + 5950 4200 5950 4050 +Wire Wire Line + 5650 5350 6350 5350 +Connection ~ 5950 5350 +Wire Wire Line + 5950 5350 5950 5600 +Connection ~ 5950 5450 +Connection ~ 5950 3450 +Connection ~ 5950 4100 +Wire Wire Line + 6350 2150 6350 3300 +Wire Wire Line + 6350 5350 6350 4200 +$Comp +L IPLOT U3 +U 1 1 516C0D28 +P 5950 4450 +F 0 "U3" H 5800 4550 50 0000 C CNN +F 1 "IPLOT" H 6100 4550 50 0000 C CNN + 1 5950 4450 + 0 -1 -1 0 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516C0CED +P 5950 3050 +F 0 "U2" H 5800 3150 50 0000 C CNN +F 1 "IPLOT" H 6100 3150 50 0000 C CNN + 1 5950 3050 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 5166CA3C +P 5650 4100 +F 0 "U1" H 5500 4200 50 0000 C CNN +F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN + 2 5650 4100 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 5166C9F3 +P 5650 3450 +F 0 "U1" H 5500 3550 50 0000 C CNN +F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN + 1 5650 3450 + 0 -1 -1 0 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 5166C8C4 +P 5950 5450 +F 0 "#FLG01" H 5950 5545 30 0001 C CNN +F 1 "PWR_FLAG" H 5950 5630 30 0000 C CNN + 1 5950 5450 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5166C87D +P 5950 5600 +F 0 "#PWR02" H 5950 5600 30 0001 C CNN +F 1 "GND" H 5950 5530 30 0001 C CNN + 1 5950 5600 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5166C822 +P 5950 2400 +F 0 "R1" V 6030 2400 50 0000 C CNN +F 1 "4700" V 5950 2400 50 0000 C CNN + 1 5950 2400 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 5166C7EC +P 5950 5100 +F 0 "R2" V 6030 5100 50 0000 C CNN +F 1 "3300" V 5950 5100 50 0000 C CNN + 1 5950 5100 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 5166C79C +P 6350 3750 +F 0 "v1" H 6150 3850 60 0000 C CNN +F 1 "10V" H 6150 3700 60 0000 C CNN +F 2 "R1" H 6050 3750 60 0000 C CNN + 1 6350 3750 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 5166C72A +P 5850 3850 +F 0 "Q1" H 5850 3700 50 0000 R CNN +F 1 "NPN" H 5850 4000 50 0000 R CNN + 1 5850 3850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir new file mode 100644 index 0000000..c9bc6a1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir @@ -0,0 +1,16 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 10:43:13 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U4 0 7 IPLOT +U3 4 1 IPLOT +U2 2 3 IPLOT +U1 2 1 VPLOT8_1 +R1 5 3 4700 +R2 4 0 3300 +v1 5 0 10V +Q1 1 7 2 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.ckt new file mode 100644 index 0000000..f76426b --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.ckt @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 10:43:13 am ist +.include npn.lib + +V_u4 0 7 0 +V_u3 4 1 0 +V_u2 2 3 0 +* Plotting option vplot8_1 +r1 5 3 4700 +r2 4 0 3300 +v1 5 0 10v +q1 2 7 1 npn + +.dc v1 0e-00 10e-00 5e-03 +.plot i(V_u4) +.plot i(V_u3) +.plot i(V_u2) +.plot v(2) v(1) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.out new file mode 100644 index 0000000..c87b0a7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.out @@ -0,0 +1,23 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 10:43:13 am ist +.include npn.lib + +V_u4 0 7 0 +V_u3 4 1 0 +V_u2 2 3 0 +* Plotting option vplot8_1 +r1 5 3 4700 +r2 4 0 3300 +v1 5 0 10v +q1 2 7 1 npn + +.dc v1 0e-00 10e-00 5e-03 + +* Control Statements +.control +run +plot i(V_u4) +plot i(V_u3) +plot i(V_u2) +plot v(2) v(1) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.pro new file mode 100644 index 0000000..28065a5 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.pro @@ -0,0 +1,84 @@ +update=Tuesday 16 April 2013 12:39:39 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/ambikeshwar/FreeEDA/library/analogSpice +LibName32=/home/ambikeshwar/FreeEDA/library/analogXSpice +LibName33=/home/ambikeshwar/FreeEDA/library/convergenceAidSpice +LibName34=/home/ambikeshwar/FreeEDA/library/converterSpice +LibName35=/home/ambikeshwar/FreeEDA/library/digitalSpice +LibName36=/home/ambikeshwar/FreeEDA/library/digitalXSpice +LibName37=/home/ambikeshwar/FreeEDA/library/linearSpice +LibName38=/home/ambikeshwar/FreeEDA/library/measurementSpice +LibName39=/home/ambikeshwar/FreeEDA/library/portSpice +LibName40=/home/ambikeshwar/FreeEDA/library/sourcesSpice +LibName41=/home/holy/FreeEDA/library/analogSpice +LibName42=/home/holy/FreeEDA/library/analogXSpice +LibName43=/home/holy/FreeEDA/library/convergenceAidSpice +LibName44=/home/holy/FreeEDA/library/converterSpice +LibName45=/home/holy/FreeEDA/library/digitalSpice +LibName46=/home/holy/FreeEDA/library/digitalXSpice +LibName47=/home/holy/FreeEDA/library/linearSpice +LibName48=/home/holy/FreeEDA/library/measurementSpice +LibName49=/home/holy/FreeEDA/library/portSpice +LibName50=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.proj b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.proj new file mode 100644 index 0000000..3ace945 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.proj @@ -0,0 +1 @@ +schematicFile example_3.6.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.sch new file mode 100644 index 0000000..d3d6988 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.sch @@ -0,0 +1,195 @@ +EESchema Schematic File Version 2 date Tuesday 16 April 2013 10:43:17 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.6-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5650 3950 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516CDDBE +P 5650 3950 +F 0 "#FLG01" H 5650 4220 30 0001 C CNN +F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN + 1 5650 3950 + 0 -1 -1 0 +$EndComp +Connection ~ 5650 3850 +Connection ~ 5700 5350 +Wire Wire Line + 5650 4700 5650 5350 +Wire Wire Line + 5650 3850 5650 4200 +Wire Wire Line + 6350 4200 6350 5350 +Wire Wire Line + 6350 3300 6350 2150 +Connection ~ 5950 4100 +Connection ~ 5950 3450 +Connection ~ 5950 5450 +Wire Wire Line + 5950 5350 5950 5600 +Connection ~ 5950 5350 +Wire Wire Line + 6350 5350 5650 5350 +Wire Wire Line + 5950 4200 5950 4050 +Wire Wire Line + 6350 2150 5950 2150 +Wire Wire Line + 5950 3300 5950 3650 +Wire Wire Line + 5950 2800 5950 2650 +Wire Wire Line + 5950 4700 5950 4850 +$Comp +L IPLOT U4 +U 1 1 516CDCFB +P 5650 4450 +F 0 "U4" H 5500 4550 50 0000 C CNN +F 1 "IPLOT" H 5800 4550 50 0000 C CNN + 1 5650 4450 + 0 -1 -1 0 +$EndComp +$Comp +L IPLOT U3 +U 1 1 516C0D28 +P 5950 4450 +F 0 "U3" H 5800 4550 50 0000 C CNN +F 1 "IPLOT" H 6100 4550 50 0000 C CNN + 1 5950 4450 + 0 -1 -1 0 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516C0CED +P 5950 3050 +F 0 "U2" H 5800 3150 50 0000 C CNN +F 1 "IPLOT" H 6100 3150 50 0000 C CNN + 1 5950 3050 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 5166CA3C +P 5650 4100 +F 0 "U1" H 5500 4200 50 0000 C CNN +F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN + 2 5650 4100 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 5166C9F3 +P 5650 3450 +F 0 "U1" H 5500 3550 50 0000 C CNN +F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN + 1 5650 3450 + 0 -1 -1 0 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 5166C8C4 +P 5700 5350 +F 0 "#FLG02" H 5700 5445 30 0001 C CNN +F 1 "PWR_FLAG" H 5700 5530 30 0000 C CNN + 1 5700 5350 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 5166C87D +P 5950 5600 +F 0 "#PWR03" H 5950 5600 30 0001 C CNN +F 1 "GND" H 5950 5530 30 0001 C CNN + 1 5950 5600 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5166C822 +P 5950 2400 +F 0 "R1" V 6030 2400 50 0000 C CNN +F 1 "4700" V 5950 2400 50 0000 C CNN + 1 5950 2400 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 5166C7EC +P 5950 5100 +F 0 "R2" V 6030 5100 50 0000 C CNN +F 1 "3300" V 5950 5100 50 0000 C CNN + 1 5950 5100 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 5166C79C +P 6350 3750 +F 0 "v1" H 6150 3850 60 0000 C CNN +F 1 "10V" H 6150 3700 60 0000 C CNN +F 2 "R1" H 6050 3750 60 0000 C CNN + 1 6350 3750 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 5166C72A +P 5850 3850 +F 0 "Q1" H 5850 3700 50 0000 R CNN +F 1 "NPN" H 5850 4000 50 0000 R CNN + 1 5850 3850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/npn.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/npn.lib new file mode 100644 index 0000000..f84808e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.6/npn.lib @@ -0,0 +1,6 @@ +.model npn NPN( Vtf=1.7 Cjc=7.306p Nc=2 Tr=46.91n Ne=1.307 ++ Cje=22.01p Isc=0 Xtb=1.5 Rb=10 Rc=1 ++ Tf=411.1p Xti=3 Ikr=0 Bf=400 Fc=.5 ++ Ise=14.34f Br=6.092 Ikf=.2847 Mje=.377 Mjc=.3416 ++ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=3 Itf=.6 ++ Is=14.34f Eg=1.11 ) \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/analysis b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/analysis new file mode 100644 index 0000000..35318bb --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 10e-00 5e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.bak new file mode 100644 index 0000000..1c7c96a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.bak @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 08:09:14 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PNP +# +DEF PNP Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 60 H V R CNN +F1 "PNP" 0 150 60 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 F +P 3 0 1 0 25 -25 0 0 0 0 N +P 3 0 1 0 100 -100 65 -65 65 -65 N +P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.lib new file mode 100644 index 0000000..0acf0b6 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.lib @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 08:10:59 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PNP +# +DEF PNP Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 60 H V R CNN +F1 "PNP" 0 150 60 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 F +P 3 0 1 0 25 -25 0 0 0 0 N +P 3 0 1 0 100 -100 65 -65 65 -65 N +P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak new file mode 100644 index 0000000..ca1bf82 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak @@ -0,0 +1,172 @@ +EESchema Schematic File Version 2 date Monday 15 April 2013 08:09:14 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 43 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5050 4700 +Connection ~ 5050 3500 +Connection ~ 4500 5050 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516C10CC +P 4500 5050 +F 0 "#FLG01" H 4500 5320 30 0001 C CNN +F 1 "PWR_FLAG" H 4500 5280 30 0000 C CNN + 1 4500 5050 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 516C10B9 +P 4450 5350 +F 0 "#PWR02" H 4450 5350 30 0001 C CNN +F 1 "GND" H 4450 5280 30 0001 C CNN + 1 4450 5350 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4450 5350 4500 5350 +Wire Wire Line + 4500 5350 4500 3750 +Wire Wire Line + 4500 3750 4750 3750 +Wire Wire Line + 5050 4550 5050 4850 +Wire Wire Line + 5050 5350 5650 5350 +Wire Wire Line + 5050 3450 5050 3550 +Wire Wire Line + 5050 2850 5050 2950 +Wire Wire Line + 5050 3950 5050 4050 +Wire Wire Line + 5050 2350 5650 2350 +Wire Wire Line + 5650 2350 5650 3200 +Wire Wire Line + 5650 5350 5650 4100 +$Comp +L VPLOT8_1 U3 +U 2 1 516C107A +P 5350 4700 +F 0 "U3" H 5200 4800 50 0000 C CNN +F 1 "VPLOT8_1" H 5500 4800 50 0000 C CNN + 2 5350 4700 + 0 1 1 0 +$EndComp +$Comp +L DC v1 +U 1 1 516C103D +P 5650 3650 +F 0 "v1" H 5450 3750 60 0000 C CNN +F 1 "DC" H 5450 3600 60 0000 C CNN +F 2 "R1" H 5350 3650 60 0000 C CNN + 1 5650 3650 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516C1001 +P 5350 3500 +F 0 "U3" H 5200 3600 50 0000 C CNN +F 1 "VPLOT8_1" H 5500 3600 50 0000 C CNN + 1 5350 3500 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 516C0FB5 +P 5050 5100 +F 0 "R2" V 5130 5100 50 0000 C CNN +F 1 "R" V 5050 5100 50 0000 C CNN + 1 5050 5100 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516C0FAB +P 5050 4300 +F 0 "U2" H 4900 4400 50 0000 C CNN +F 1 "IPLOT" H 5200 4400 50 0000 C CNN + 1 5050 4300 + 0 -1 -1 0 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516C0F0F +P 5050 3200 +F 0 "U1" H 4900 3300 50 0000 C CNN +F 1 "IPLOT" H 5200 3300 50 0000 C CNN + 1 5050 3200 + 0 -1 -1 0 +$EndComp +$Comp +L R R1 +U 1 1 516C0F01 +P 5050 2600 +F 0 "R1" V 5130 2600 50 0000 C CNN +F 1 "R" V 5050 2600 50 0000 C CNN + 1 5050 2600 + 1 0 0 -1 +$EndComp +$Comp +L PNP Q1 +U 1 1 516C0EEC +P 4950 3750 +F 0 "Q1" H 4950 3600 60 0000 R CNN +F 1 "PNP" H 4950 3900 60 0000 R CNN + 1 4950 3750 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir new file mode 100644 index 0000000..7d111e3 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 08:10:56 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U3 4 6 VPLOT8_1 +v1 3 5 10 +R2 6 3 2000 +U2 6 2 IPLOT +U1 4 1 IPLOT +R1 5 1 1000 +Q1 2 0 4 PNP + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt new file mode 100644 index 0000000..d569e7a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt @@ -0,0 +1,15 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:10:56 pm ist + +* Plotting option vplot8_1 +v1 3 5 10 +r2 6 3 2000 +V_u2 6 2 0 +V_u1 4 1 0 +r1 5 1 1000 +q1 4 0 2 pnp + +.dc v1 0e-00 10e-00 5e-03 +.plot v(4) v(6) +.plot i(V_u2) +.plot i(V_u1) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out new file mode 100644 index 0000000..946ba9b --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out @@ -0,0 +1,20 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:10:56 pm ist + +* Plotting option vplot8_1 +v1 3 5 10 +r2 6 3 2000 +V_u2 6 2 0 +V_u1 4 1 0 +r1 5 1 1000 +q1 4 0 2 pnp + +.dc v1 0e-00 10e-00 5e-03 + +* Control Statements +.control +run +plot v(4) v(6) +plot i(V_u2) +plot i(V_u1) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro new file mode 100644 index 0000000..833b58c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro @@ -0,0 +1,74 @@ +update=Monday 15 April 2013 07:58:37 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj new file mode 100644 index 0000000..b07d448 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj @@ -0,0 +1 @@ +schematicFile example_3.7.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch new file mode 100644 index 0000000..c9780ef --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch @@ -0,0 +1,173 @@ +EESchema Schematic File Version 2 date Monday 15 April 2013 08:10:59 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.7-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5050 4700 +Connection ~ 5050 3500 +Connection ~ 4500 5050 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516C10CC +P 4500 5050 +F 0 "#FLG01" H 4500 5320 30 0001 C CNN +F 1 "PWR_FLAG" H 4500 5280 30 0000 C CNN + 1 4500 5050 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 516C10B9 +P 4450 5350 +F 0 "#PWR02" H 4450 5350 30 0001 C CNN +F 1 "GND" H 4450 5280 30 0001 C CNN + 1 4450 5350 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4450 5350 4500 5350 +Wire Wire Line + 4500 5350 4500 3750 +Wire Wire Line + 4500 3750 4750 3750 +Wire Wire Line + 5050 4550 5050 4850 +Wire Wire Line + 5050 5350 5650 5350 +Wire Wire Line + 5050 3450 5050 3550 +Wire Wire Line + 5050 2850 5050 2950 +Wire Wire Line + 5050 3950 5050 4050 +Wire Wire Line + 5050 2350 5650 2350 +Wire Wire Line + 5650 2350 5650 3200 +Wire Wire Line + 5650 5350 5650 4100 +$Comp +L VPLOT8_1 U3 +U 2 1 516C107A +P 5350 4700 +F 0 "U3" H 5200 4800 50 0000 C CNN +F 1 "VPLOT8_1" H 5500 4800 50 0000 C CNN + 2 5350 4700 + 0 1 1 0 +$EndComp +$Comp +L DC v1 +U 1 1 516C103D +P 5650 3650 +F 0 "v1" H 5450 3750 60 0000 C CNN +F 1 "10" H 5450 3600 60 0000 C CNN +F 2 "R1" H 5350 3650 60 0000 C CNN + 1 5650 3650 + 1 0 0 1 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516C1001 +P 5350 3500 +F 0 "U3" H 5200 3600 50 0000 C CNN +F 1 "VPLOT8_1" H 5500 3600 50 0000 C CNN + 1 5350 3500 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 516C0FB5 +P 5050 5100 +F 0 "R2" V 5130 5100 50 0000 C CNN +F 1 "2000" V 5050 5100 50 0000 C CNN + 1 5050 5100 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516C0FAB +P 5050 4300 +F 0 "U2" H 4900 4400 50 0000 C CNN +F 1 "IPLOT" H 5200 4400 50 0000 C CNN + 1 5050 4300 + 0 -1 -1 0 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516C0F0F +P 5050 3200 +F 0 "U1" H 4900 3300 50 0000 C CNN +F 1 "IPLOT" H 5200 3300 50 0000 C CNN + 1 5050 3200 + 0 -1 -1 0 +$EndComp +$Comp +L R R1 +U 1 1 516C0F01 +P 5050 2600 +F 0 "R1" V 5130 2600 50 0000 C CNN +F 1 "1000" V 5050 2600 50 0000 C CNN + 1 5050 2600 + 1 0 0 -1 +$EndComp +$Comp +L PNP Q1 +U 1 1 516C0EEC +P 4950 3750 +F 0 "Q1" H 4950 3600 60 0000 R CNN +F 1 "PNP" H 4950 3900 60 0000 R CNN + 1 4950 3750 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/analysis b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/analysis new file mode 100644 index 0000000..7946c35 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 5e-00 5e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8-cache.lib new file mode 100644 index 0000000..c582dbc --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8-cache.lib @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 08:58:27 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir new file mode 100644 index 0000000..073dc21 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir @@ -0,0 +1,16 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 08:58:23 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v1 3 0 5V +v2 2 0 10V +R1 6 3 100 +U3 1 4 VPLOT8_1 +U2 0 4 IPLOT +U1 1 5 IPLOT +R2 2 5 2000 +Q1 4 6 1 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.ckt new file mode 100644 index 0000000..bf04d00 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.ckt @@ -0,0 +1,16 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:58:23 pm ist + +v1 3 0 5v +v2 2 0 10v +r1 6 3 100 +* Plotting option vplot8_1 +V_u2 0 4 0 +V_u1 1 5 0 +r2 2 5 2000 +q1 1 6 4 npn + +.dc v1 0e-00 5e-00 5e-03 +.plot v(1) v(4) +.plot i(V_u2) +.plot i(V_u1) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.out new file mode 100644 index 0000000..4fa87ff --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.out @@ -0,0 +1,21 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:58:23 pm ist + +v1 3 0 5v +v2 2 0 10v +r1 6 3 100 +* Plotting option vplot8_1 +V_u2 0 4 0 +V_u1 1 5 0 +r2 2 5 2000 +q1 1 6 4 npn + +.dc v1 0e-00 5e-00 5e-03 + +* Control Statements +.control +run +plot v(1) v(4) +plot i(V_u2) +plot i(V_u1) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.pro new file mode 100644 index 0000000..54c8653 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.pro @@ -0,0 +1,74 @@ +update=Monday 15 April 2013 08:14:03 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.proj b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.proj new file mode 100644 index 0000000..2797ff1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.proj @@ -0,0 +1 @@ +schematicFile example_3.8.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.sch new file mode 100644 index 0000000..f8c5751 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.sch @@ -0,0 +1,181 @@ +EESchema Schematic File Version 2 date Monday 15 April 2013 08:58:27 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 43 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" 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-1 -1 0 +$EndComp +$Comp +L R R2 +U 1 1 516C125F +P 5500 2050 +F 0 "R2" V 5580 2050 50 0000 C CNN +F 1 "2000" V 5500 2050 50 0000 C CNN + 1 5500 2050 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 516C1252 +P 5400 3200 +F 0 "Q1" H 5400 3050 50 0000 R CNN +F 1 "NPN" H 5400 3350 50 0000 R CNN + 1 5400 3200 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/analysis b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/analysis new file mode 100644 index 0000000..7946c35 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 5e-00 5e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.bak new file mode 100644 index 0000000..ab4ac6a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.bak @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 09:47:58 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PNP +# +DEF PNP Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 60 H V R CNN +F1 "PNP" 0 150 60 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 F +P 3 0 1 0 25 -25 0 0 0 0 N +P 3 0 1 0 100 -100 65 -65 65 -65 N +P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.lib new file mode 100644 index 0000000..19bc1ef --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.lib @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 01:19:52 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PNP +# +DEF PNP Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 60 H V R CNN +F1 "PNP" 0 150 60 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 F +P 3 0 1 0 25 -25 0 0 0 0 N +P 3 0 1 0 100 -100 65 -65 65 -65 N +P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.bak b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.bak new file mode 100644 index 0000000..9b2890f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.bak @@ -0,0 +1,200 @@ +EESchema Schematic File Version 2 date Monday 15 April 2013 09:47:58 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 43 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 4800 3600 4150 3600 +Wire Wire Line + 6500 2900 6500 2050 +Wire Wire Line + 6500 2050 5100 2050 +Wire Wire Line + 5100 5100 5100 5250 +Wire Wire Line + 5100 3800 5100 3950 +Wire Wire Line + 5100 3250 5100 3400 +Wire Wire Line + 5100 2650 5100 2750 +Wire Wire Line + 5100 4450 5100 4600 +Wire Wire Line + 5100 2050 5100 2150 +Connection ~ 5100 3350 +Connection ~ 5100 3900 +Wire Wire Line + 3650 3600 3650 5100 +Connection ~ 5100 2050 +Connection ~ 5100 2050 +Connection ~ 5100 2050 +Wire Wire Line + 6500 3800 6500 5250 +Wire Wire Line + 6500 5250 5100 5250 +Connection ~ 4750 3600 +Connection ~ 3650 3600 +Connection ~ 4150 3600 +Connection ~ 3950 3600 +Connection ~ 4800 3600 +Connection ~ 3650 4850 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516C1E89 +P 3650 4850 +F 0 "#FLG01" H 3650 5120 30 0001 C CNN +F 1 "PWR_FLAG" H 3650 5080 30 0000 C CNN + 1 3650 4850 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 516C1EFD +P 4750 3300 +F 0 "U2" H 4600 3400 50 0000 C CNN +F 1 "VPLOT8_1" H 4900 3400 50 0000 C CNN + 1 4750 3300 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 516C1E7B +P 3650 5100 +F 0 "#PWR02" H 3650 5100 30 0001 C CNN +F 1 "GND" H 3650 5030 30 0001 C CNN + 1 3650 5100 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516C1E56 +P 3900 3600 +F 0 "R1" V 3980 3600 50 0000 C CNN +F 1 "10000" V 3900 3600 50 0000 C CNN + 1 3900 3600 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U2 +U 3 1 516C1E37 +P 5400 3900 +F 0 "U2" H 5250 4000 50 0000 C CNN +F 1 "VPLOT8_1" H 5550 4000 50 0000 C CNN + 3 5400 3900 + 0 1 1 0 +$EndComp +$Comp +L R R3 +U 1 1 516C1E04 +P 5100 4850 +F 0 "R3" V 5180 4850 50 0000 C CNN +F 1 "10000" V 5100 4850 50 0000 C CNN + 1 5100 4850 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516C1DF8 +P 5100 4200 +F 0 "U4" H 4950 4300 50 0000 C CNN +F 1 "IPLOT" H 5250 4300 50 0000 C CNN + 1 5100 4200 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 516C1DCB +P 5400 3350 +F 0 "U2" H 5250 3450 50 0000 C CNN +F 1 "VPLOT8_1" H 5550 3450 50 0000 C CNN + 2 5400 3350 + 0 1 1 0 +$EndComp +$Comp +L DC v1 +U 1 1 516C1DBD +P 6500 3350 +F 0 "v1" H 6300 3450 60 0000 C CNN +F 1 "5" H 6300 3300 60 0000 C CNN +F 2 "R1" H 6200 3350 60 0000 C CNN + 1 6500 3350 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U3 +U 1 1 516C1DAD +P 5100 3000 +F 0 "U3" H 4950 3100 50 0000 C CNN +F 1 "IPLOT" H 5250 3100 50 0000 C CNN + 1 5100 3000 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 516C1D7F +P 5100 2400 +F 0 "R2" V 5180 2400 50 0000 C CNN +F 1 "1000" V 5100 2400 50 0000 C CNN + 1 5100 2400 + 1 0 0 -1 +$EndComp +$Comp +L PNP Q1 +U 1 1 516C1D57 +P 5000 3600 +F 0 "Q1" H 5000 3450 60 0000 R CNN +F 1 "PNP" H 5000 3750 60 0000 R CNN + 1 5000 3600 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir new file mode 100644 index 0000000..484dfb8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir @@ -0,0 +1,17 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:19:49 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v2 0 4 5 +U2 2 6 3 VPLOT8_1 +R1 2 0 10000 +R3 5 4 10000 +U4 3 5 IPLOT +v1 7 0 5 +U3 8 6 IPLOT +R2 7 8 1000 +Q1 3 2 6 PNP + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.ckt new file mode 100644 index 0000000..3c4d3e8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.ckt @@ -0,0 +1,17 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:19:49 pm ist + +v2 0 4 5 +* Plotting option vplot8_1 +r1 2 0 10000 +r3 5 4 10000 +V_u4 3 5 0 +v1 7 0 5 +V_u3 8 6 0 +r2 7 8 1000 +q1 6 2 3 pnp + +.dc v1 0e-00 5e-00 5e-03 +.plot v(2) v(6) v(3) +.plot i(V_u4) +.plot i(V_u3) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.out b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.out new file mode 100644 index 0000000..00c3815 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.out @@ -0,0 +1,22 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:19:49 pm ist + +v2 0 4 5 +* Plotting option vplot8_1 +r1 2 0 10000 +r3 5 4 10000 +V_u4 3 5 0 +v1 7 0 5 +V_u3 8 6 0 +r2 7 8 1000 +q1 6 2 3 pnp + +.dc v1 0e-00 5e-00 5e-03 + +* Control Statements +.control +run +plot v(2) v(6) v(3) +plot i(V_u4) +plot i(V_u3) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.pro b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.pro new file mode 100644 index 0000000..59bd650 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.pro @@ -0,0 +1,74 @@ +update=Monday 15 April 2013 09:01:17 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.proj b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.proj new file mode 100644 index 0000000..cf438f1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.proj @@ -0,0 +1 @@ +schematicFile example_3.9.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.sch b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.sch new file mode 100644 index 0000000..da988b4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.sch @@ -0,0 +1,221 @@ +EESchema Schematic File Version 2 date Monday 13 May 2013 01:19:52 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_3.9-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "13 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L GND #PWR01 +U 1 1 51909AF0 +P 6700 3550 +F 0 "#PWR01" H 6700 3550 30 0001 C CNN +F 1 "GND" H 6700 3480 30 0001 C CNN + 1 6700 3550 + 1 0 0 -1 +$EndComp +Connection ~ 6500 3550 +Wire Wire Line + 6500 3550 6700 3550 +Wire Wire Line + 4800 3600 4150 3600 +Wire Wire Line + 6500 2050 5100 2050 +Wire Wire Line + 5100 5100 5100 5250 +Wire Wire Line + 5100 3800 5100 3950 +Wire Wire Line + 5100 3250 5100 3400 +Wire Wire Line + 5100 2650 5100 2750 +Wire Wire Line + 5100 4450 5100 4600 +Wire Wire Line + 5100 2050 5100 2150 +Connection ~ 5100 3350 +Connection ~ 5100 3900 +Wire Wire Line + 3650 3600 3650 5100 +Connection ~ 5100 2050 +Connection ~ 5100 2050 +Connection ~ 5100 2050 +Wire Wire Line + 5100 5250 6500 5250 +Connection ~ 4750 3600 +Connection ~ 3650 3600 +Connection ~ 4150 3600 +Connection ~ 3950 3600 +Connection ~ 4800 3600 +Connection ~ 3650 4850 +Wire Wire Line + 6500 2950 6500 4350 +$Comp +L DC v2 +U 1 1 51909ACB +P 6500 4800 +F 0 "v2" H 6300 4900 60 0000 C CNN +F 1 "5" H 6300 4750 60 0000 C CNN +F 2 "R1" H 6200 4800 60 0000 C CNN + 1 6500 4800 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516C1E89 +P 3650 4850 +F 0 "#FLG02" H 3650 5120 30 0001 C CNN +F 1 "PWR_FLAG" H 3650 5080 30 0000 C CNN + 1 3650 4850 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 516C1EFD +P 4750 3300 +F 0 "U2" H 4600 3400 50 0000 C CNN +F 1 "VPLOT8_1" H 4900 3400 50 0000 C CNN + 1 4750 3300 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516C1E7B +P 3650 5100 +F 0 "#PWR03" H 3650 5100 30 0001 C CNN +F 1 "GND" H 3650 5030 30 0001 C CNN + 1 3650 5100 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516C1E56 +P 3900 3600 +F 0 "R1" V 3980 3600 50 0000 C CNN +F 1 "10000" V 3900 3600 50 0000 C CNN + 1 3900 3600 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U2 +U 3 1 516C1E37 +P 5400 3900 +F 0 "U2" H 5250 4000 50 0000 C CNN +F 1 "VPLOT8_1" H 5550 4000 50 0000 C CNN + 3 5400 3900 + 0 1 1 0 +$EndComp +$Comp +L R R3 +U 1 1 516C1E04 +P 5100 4850 +F 0 "R3" V 5180 4850 50 0000 C CNN +F 1 "10000" V 5100 4850 50 0000 C CNN + 1 5100 4850 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516C1DF8 +P 5100 4200 +F 0 "U4" H 4950 4300 50 0000 C CNN +F 1 "IPLOT" H 5250 4300 50 0000 C CNN + 1 5100 4200 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 516C1DCB +P 5400 3350 +F 0 "U2" H 5250 3450 50 0000 C CNN +F 1 "VPLOT8_1" H 5550 3450 50 0000 C CNN + 2 5400 3350 + 0 1 1 0 +$EndComp +$Comp +L DC v1 +U 1 1 516C1DBD +P 6500 2500 +F 0 "v1" H 6300 2600 60 0000 C CNN +F 1 "5" H 6300 2450 60 0000 C CNN +F 2 "R1" H 6200 2500 60 0000 C CNN + 1 6500 2500 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U3 +U 1 1 516C1DAD +P 5100 3000 +F 0 "U3" H 4950 3100 50 0000 C CNN +F 1 "IPLOT" H 5250 3100 50 0000 C CNN + 1 5100 3000 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 516C1D7F +P 5100 2400 +F 0 "R2" V 5180 2400 50 0000 C CNN +F 1 "1000" V 5100 2400 50 0000 C CNN + 1 5100 2400 + 1 0 0 -1 +$EndComp +$Comp +L PNP Q1 +U 1 1 516C1D57 +P 5000 3600 +F 0 "Q1" H 5000 3450 60 0000 R CNN +F 1 "PNP" H 5000 3750 60 0000 R CNN + 1 5000 3600 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_3/npn.lib b/FreeEDA/Examples/sedra_smith/chapter_3/npn.lib new file mode 100644 index 0000000..caa3cb7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_3/npn.lib @@ -0,0 +1,6 @@ +.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 ++ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 ++ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 ++ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 ++ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 ++ Is=6.734 Eg=1.11 ) \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/1n4007.lib b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/1n4007.lib new file mode 100644 index 0000000..89d421d --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/1n4007.lib @@ -0,0 +1,2 @@ +.model 1n4007 D( IS=7.02767e-09 RS=0.0341512 N=1.80803 EG=1.05743 XTI=5 BV=1000 IBV=5e-08 CJO=1E-11 ++VJ=0.7 M=0.5 FC=0.5 TT=1E-07 KF=0 AF=1 ) diff --git a/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/analysis b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/analysis new file mode 100644 index 0000000..f74e3c8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 10e-00 1e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/cd4007.txt b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/cd4007.txt new file mode 100644 index 0000000..0552575 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/cd4007.txt @@ -0,0 +1,22 @@ +* CD4007 NMOS and PMOS transistor SPICE models + +* Typical - Typical Condition + +.model mos_n NMOS ++ Level=1 Gamma= 0 Xj=0 ++ Tox=1200n Phi=.6 Rs=0 Kp=111u Vto=1.4 Lambda=0.01 ++ Rd=0 Cbd=2.0p Cbs=2.0p Pb=.8 Cgso=0.1p ++ Cgdo=0.1p Is=16.64p N=1 + +*The default W and L is 30 and 10 um respectively and AD and AS +*should not be included. + + +.model mos_p PMOS ++ Level=1 Gamma= 0 Xj=0 ++ Tox=1200n Phi=.6 Rs=0 Kp=1u Vto=-1.2 Lambda=0.04 ++ Rd=0 Cbd=4.0p Cbs=4.0p Pb=.8 Cgso=0.2p ++ Cgdo=0.2p Is=16.64p N=1 + +*The default W and L is 60 and 10 um respectively and AD and AS +*should not be included. diff --git a/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.bak new file mode 100644 index 0000000..5cb1eee --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.bak @@ -0,0 +1,110 @@ +EESchema-LIBRARY Version 2.3 Date: Thursday 16 May 2013 11:39:19 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# MOS_N +# +DEF MOS_N M 0 0 N Y 1 F N +F0 "M" 10 170 60 H V R CNN +F1 "MOS_N" 10 -150 60 H V R CNN +ALIAS MOSFET_N +DRAW +P 2 0 1 8 -50 -100 -50 100 N +P 2 0 1 10 0 -150 0 150 N +P 2 0 1 0 100 -100 0 -100 N +P 2 0 1 0 100 100 0 100 N +P 3 0 1 8 100 -100 100 0 50 0 N +P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N +X D D 100 200 100 D 40 40 1 1 P +X G G -200 0 150 R 40 40 1 1 I +X S S 100 -200 100 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.lib new file mode 100644 index 0000000..df97081 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.lib @@ -0,0 +1,110 @@ +EESchema-LIBRARY Version 2.3 Date: Thursday 16 May 2013 11:43:16 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# MOS_N +# +DEF MOS_N M 0 0 N Y 1 F N +F0 "M" 10 170 60 H V R CNN +F1 "MOS_N" 10 -150 60 H V R CNN +ALIAS MOSFET_N +DRAW +P 2 0 1 8 -50 -100 -50 100 N +P 2 0 1 10 0 -150 0 150 N +P 2 0 1 0 100 -100 0 -100 N +P 2 0 1 0 100 100 0 100 N +P 3 0 1 8 100 -100 100 0 50 0 N +P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N +X D D 100 200 100 D 40 40 1 1 P +X G G -200 0 150 R 40 40 1 1 I +X S S 100 -200 100 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.bak b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.bak new file mode 100644 index 0000000..c4bf9b0 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.bak @@ -0,0 +1,214 @@ +EESchema Schematic File Version 2 date Thursday 16 May 2013 11:39:19 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_4.5-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 6600 3650 +$Comp +L VPLOT8_1 U4 +U 2 1 519477A9 +P 6900 3650 +F 0 "U4" H 6750 3750 50 0000 C CNN +F 1 "VPLOT8_1" H 7050 3750 50 0000 C CNN + 2 6900 3650 + 0 1 1 0 +$EndComp +Wire Wire Line + 6600 4350 6600 4700 +Wire Wire Line + 5800 5500 5800 5550 +Wire Wire Line + 6600 2700 6600 3000 +Connection ~ 5800 5500 +Wire Wire Line + 5000 2850 5000 850 +Connection ~ 5700 850 +Wire Wire Line + 5000 850 6600 850 +Connection ~ 5700 3200 +Wire Wire Line + 5700 5500 5700 5200 +Wire Wire Line + 5700 1200 5700 850 +Wire Wire Line + 6600 850 6600 1200 +Wire Wire Line + 6600 5200 6600 5500 +Wire Wire Line + 6300 3200 5700 3200 +Connection ~ 5700 3200 +Connection ~ 6600 2850 +Connection ~ 6600 850 +Connection ~ 6600 5500 +Wire Wire Line + 5700 4700 5700 1700 +Wire Wire Line + 6600 5500 5000 5500 +Connection ~ 5700 5500 +Wire Wire Line + 5000 5500 5000 3750 +Wire Wire Line + 6600 1700 6600 2200 +Wire Wire Line + 6600 3400 6600 3800 +$Comp +L IPLOT U2 +U 1 1 51947793 +P 6600 4050 +F 0 "U2" H 6450 4150 50 0000 C CNN +F 1 "IPLOT" H 6750 4150 50 0000 C CNN + 1 6600 4050 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U1 +U 1 1 518B75C0 +P 6600 2450 +F 0 "U1" H 6450 2550 50 0000 C CNN +F 1 "IPLOT" H 6750 2550 50 0000 C CNN + 1 6600 2450 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U4 +U 1 1 518B74B3 +P 6000 3200 +F 0 "U4" H 5850 3300 50 0000 C CNN +F 1 "VPLOT8_1" H 6150 3300 50 0000 C CNN + 1 6000 3200 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR01 +U 1 1 517A3B91 +P 5800 5550 +F 0 "#PWR01" H 5800 5550 30 0001 C CNN +F 1 "GND" H 5800 5480 30 0001 C CNN + 1 5800 5550 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 517A3B8C +P 5800 5500 +F 0 "#FLG02" H 5800 5770 30 0001 C CNN +F 1 "PWR_FLAG" H 5800 5730 30 0000 C CNN + 1 5800 5500 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 517A3ABD +P 5000 3300 +F 0 "v1" H 4800 3400 60 0000 C CNN +F 1 "10" H 4800 3250 60 0000 C CNN +F 2 "R1" H 4700 3300 60 0000 C CNN + 1 5000 3300 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516BA47D +P 6900 2850 +F 0 "U3" H 6750 2950 50 0000 C CNN +F 1 "VPLOT8_1" H 7050 2950 50 0000 C CNN + 1 6900 2850 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 5166F1C0 +P 5700 4950 +F 0 "R2" V 5780 4950 50 0000 C CNN +F 1 "10M" V 5700 4950 50 0000 C CNN + 1 5700 4950 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5166F1AE +P 5700 1450 +F 0 "R1" V 5780 1450 50 0000 C CNN +F 1 "10M" V 5700 1450 50 0000 C CNN + 1 5700 1450 + 1 0 0 -1 +$EndComp +$Comp +L R R4 +U 1 1 5166F187 +P 6600 4950 +F 0 "R4" V 6680 4950 50 0000 C CNN +F 1 "6k" V 6600 4950 50 0000 C CNN + 1 6600 4950 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 5166F163 +P 6600 1450 +F 0 "R3" V 6680 1450 50 0000 C CNN +F 1 "6k" V 6600 1450 50 0000 C CNN + 1 6600 1450 + 1 0 0 -1 +$EndComp +$Comp +L MOS_N M1 +U 1 1 5166F12C +P 6500 3200 +F 0 "M1" H 6510 3370 60 0000 R CNN +F 1 "MOS_N" H 6510 3050 60 0000 R CNN + 1 6500 3200 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir new file mode 100644 index 0000000..4a904e0 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir @@ -0,0 +1,18 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 16 May 2013 11:43:12 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U4 6 7 VPLOT8_1 +U2 7 4 IPLOT +U1 5 1 IPLOT +v1 3 0 10 +U3 1 VPLOT8_1 +R2 6 0 10M +R1 3 6 10M +R4 4 0 6k +R3 3 5 6k +M1 1 6 7 MOS_N + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir.ckt new file mode 100644 index 0000000..68ce4e1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir.ckt @@ -0,0 +1,19 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 16 may 2013 11:43:12 am ist + +* Plotting option vplot8_1 +V_u2 7 4 0 +V_u1 5 1 0 +v1 3 0 10 +* Plotting option vplot8_1 +r2 6 0 10m +r1 3 6 10m +r4 4 0 6k +r3 3 5 6k +m1 1 6 7 mos_n + +.dc v1 0e-00 10e-00 1e-00 +.plot v(6) v(7) +.plot i(V_u2) +.plot i(V_u1) +.plot v(1) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir.out b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir.out new file mode 100644 index 0000000..b363435 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir.out @@ -0,0 +1,24 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 16 may 2013 11:43:12 am ist + +* Plotting option vplot8_1 +V_u2 7 4 0 +V_u1 5 1 0 +v1 3 0 10 +* Plotting option vplot8_1 +r2 6 0 10m +r1 3 6 10m +r4 4 0 6k +r3 3 5 6k +m1 1 6 7 mos_n + +.dc v1 0e-00 10e-00 1e-00 + +* Control Statements +.control +run +plot v(6) v(7) +plot i(V_u2) +plot i(V_u1) +plot v(1) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.pro b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.pro new file mode 100644 index 0000000..bbe05fb --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.pro @@ -0,0 +1,84 @@ +update=Tuesday 07 May 2013 02:38:55 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/ambikeshwar/FreeEDA/library/analogSpice +LibName32=/home/ambikeshwar/FreeEDA/library/analogXSpice +LibName33=/home/ambikeshwar/FreeEDA/library/convergenceAidSpice +LibName34=/home/ambikeshwar/FreeEDA/library/converterSpice +LibName35=/home/ambikeshwar/FreeEDA/library/digitalSpice +LibName36=/home/ambikeshwar/FreeEDA/library/digitalXSpice +LibName37=/home/ambikeshwar/FreeEDA/library/linearSpice +LibName38=/home/ambikeshwar/FreeEDA/library/measurementSpice +LibName39=/home/ambikeshwar/FreeEDA/library/portSpice +LibName40=/home/ambikeshwar/FreeEDA/library/sourcesSpice +LibName41=/home/holy/FreeEDA/library/analogSpice +LibName42=/home/holy/FreeEDA/library/analogXSpice +LibName43=/home/holy/FreeEDA/library/convergenceAidSpice +LibName44=/home/holy/FreeEDA/library/converterSpice +LibName45=/home/holy/FreeEDA/library/digitalSpice +LibName46=/home/holy/FreeEDA/library/digitalXSpice +LibName47=/home/holy/FreeEDA/library/linearSpice +LibName48=/home/holy/FreeEDA/library/measurementSpice +LibName49=/home/holy/FreeEDA/library/portSpice +LibName50=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.proj b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.proj new file mode 100644 index 0000000..2320ec1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.proj @@ -0,0 +1 @@ +schematicFile example_4.5.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.sch b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.sch new file mode 100644 index 0000000..a1406f4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.sch @@ -0,0 +1,214 @@ +EESchema Schematic File Version 2 date Thursday 16 May 2013 11:43:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_4.5-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 6600 4300 6600 4700 +Wire Wire Line + 6600 3400 6600 3800 +Wire Wire Line + 6600 1700 6600 2200 +Wire Wire Line + 5000 3750 5000 5500 +Connection ~ 5700 5500 +Wire Wire Line + 5000 5500 6600 5500 +Wire Wire Line + 5700 4700 5700 1700 +Connection ~ 6600 5500 +Connection ~ 6600 850 +Connection ~ 6600 2850 +Connection ~ 5700 3200 +Wire Wire Line + 6300 3200 5700 3200 +Wire Wire Line + 6600 5500 6600 5200 +Wire Wire Line + 6600 1200 6600 850 +Wire Wire Line + 5700 1200 5700 850 +Wire Wire Line + 5700 5500 5700 5200 +Connection ~ 5700 3200 +Wire Wire Line + 6600 850 5000 850 +Connection ~ 5700 850 +Wire Wire Line + 5000 850 5000 2850 +Connection ~ 5800 5500 +Wire Wire Line + 6600 2700 6600 3000 +Wire Wire Line + 5800 5500 5800 5550 +Connection ~ 6600 3650 +$Comp +L VPLOT8_1 U4 +U 2 1 519477A9 +P 6900 3650 +F 0 "U4" H 6750 3750 50 0000 C CNN +F 1 "VPLOT8_1" H 7050 3750 50 0000 C CNN + 2 6900 3650 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U2 +U 1 1 51947793 +P 6600 4050 +F 0 "U2" H 6450 4150 50 0000 C CNN +F 1 "IPLOT" H 6750 4150 50 0000 C CNN + 1 6600 4050 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U1 +U 1 1 518B75C0 +P 6600 2450 +F 0 "U1" H 6450 2550 50 0000 C CNN +F 1 "IPLOT" H 6750 2550 50 0000 C CNN + 1 6600 2450 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U4 +U 1 1 518B74B3 +P 6000 3200 +F 0 "U4" H 5850 3300 50 0000 C CNN +F 1 "VPLOT8_1" H 6150 3300 50 0000 C CNN + 1 6000 3200 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR01 +U 1 1 517A3B91 +P 5800 5550 +F 0 "#PWR01" H 5800 5550 30 0001 C CNN +F 1 "GND" H 5800 5480 30 0001 C CNN + 1 5800 5550 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 517A3B8C +P 5800 5500 +F 0 "#FLG02" H 5800 5770 30 0001 C CNN +F 1 "PWR_FLAG" H 5800 5730 30 0000 C CNN + 1 5800 5500 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 517A3ABD +P 5000 3300 +F 0 "v1" H 4800 3400 60 0000 C CNN +F 1 "10" H 4800 3250 60 0000 C CNN +F 2 "R1" H 4700 3300 60 0000 C CNN + 1 5000 3300 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516BA47D +P 6900 2850 +F 0 "U3" H 6750 2950 50 0000 C CNN +F 1 "VPLOT8_1" H 7050 2950 50 0000 C CNN + 1 6900 2850 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 5166F1C0 +P 5700 4950 +F 0 "R2" V 5780 4950 50 0000 C CNN +F 1 "10M" V 5700 4950 50 0000 C CNN + 1 5700 4950 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5166F1AE +P 5700 1450 +F 0 "R1" V 5780 1450 50 0000 C CNN +F 1 "10M" V 5700 1450 50 0000 C CNN + 1 5700 1450 + 1 0 0 -1 +$EndComp +$Comp +L R R4 +U 1 1 5166F187 +P 6600 4950 +F 0 "R4" V 6680 4950 50 0000 C CNN +F 1 "6k" V 6600 4950 50 0000 C CNN + 1 6600 4950 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 5166F163 +P 6600 1450 +F 0 "R3" V 6680 1450 50 0000 C CNN +F 1 "6k" V 6600 1450 50 0000 C CNN + 1 6600 1450 + 1 0 0 -1 +$EndComp +$Comp +L MOS_N M1 +U 1 1 5166F12C +P 6500 3200 +F 0 "M1" H 6510 3370 60 0000 R CNN +F 1 "MOS_N" H 6510 3050 60 0000 R CNN + 1 6500 3200 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/analysis b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/analysis new file mode 100644 index 0000000..1665db7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 100e-03 100e-06 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1-cache.bak new file mode 100644 index 0000000..7a3e4b4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1-cache.bak @@ -0,0 +1,126 @@ +EESchema-LIBRARY Version 2.3 Date: Thursday 09 May 2013 05:04:50 PM IST +#encoding utf-8 +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# LM741 +# +DEF LM741 U 0 20 Y Y 1 F N +F0 "U" 150 150 60 H V C CNN +F1 "LM741" 150 250 60 H V C CNN +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X ~ 1 0 -400 300 U 40 40 1 1 I +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X V- 4 -100 -400 250 U 40 40 1 1 I +X ~ 5 100 -400 350 U 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +X V+ 7 -100 400 250 D 40 40 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1-cache.lib new file mode 100644 index 0000000..5b4c901 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1-cache.lib @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 10:18:21 AM IST +#encoding utf-8 +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.bak new file mode 100644 index 0000000..abf9a53 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.bak @@ -0,0 +1,181 @@ +EESchema Schematic File Version 2 date Thursday 09 May 2013 05:04:50 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "9 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L LM741 U? +U 1 1 518B89AE +P 8800 3550 +F 0 "U?" H 8950 3700 60 0000 C CNN +F 1 "LM741" H 8950 3800 60 0000 C CNN + 1 8800 3550 + 1 0 0 -1 +$EndComp +$Comp +L UA741 X? +U 1 1 518B899E +P 9050 2450 +F 0 "X?" H 9200 2600 60 0000 C CNN +F 1 "UA741" H 9200 2700 60 0000 C CNN + 1 9050 2450 + 1 0 0 -1 +$EndComp +$Comp +L SINE v1 +U 1 1 516F84E1 +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "SINE" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7150 3300 6350 3300 +Wire Wire Line + 5300 2400 5300 3200 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 5350 4200 5350 3400 +Connection ~ 5300 3200 +Wire Wire Line + 5350 3200 5250 3200 +Wire Wire Line + 4150 3200 4050 3200 +Connection ~ 5350 4100 +Connection ~ 6350 3300 +Connection ~ 7050 3300 +Wire Wire Line + 5350 4100 4050 4100 +Wire Wire Line + 6900 2400 7050 2400 +Wire Wire Line + 7050 2400 7050 3300 +Wire Wire Line + 6400 2400 5800 2400 +$Comp +L VPLOT8_1 U3 +U 1 1 516D117B +P 7050 3600 +F 0 "U3" H 6900 3700 50 0000 C CNN +F 1 "VPLOT8_1" H 7200 3700 50 0000 C CNN + 1 7050 3600 + -1 0 0 1 +$EndComp +$Comp +L PWR_FLAG #FLG1 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG1" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2400 +F 0 "U2" H 5400 2500 50 0000 C CNN +F 1 "IPLOT" H 5700 2500 50 0000 C CNN + 1 5550 2400 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6650 2400 +F 0 "R2" V 6730 2400 50 0000 C CNN +F 1 "10000" V 6650 2400 50 0000 C CNN + 1 6650 2400 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR1 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR1" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "1000" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir new file mode 100644 index 0000000..d11b7e1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir @@ -0,0 +1,24 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 18 April 2013 10:42:46 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v1 4 0 PULSE +v2 11 0 10V +U3 8 3 VPLOT8_1 +R5 13 3 10000 +R4 0 13 10000 +R3 1 11 10000 +U5 8 2 IPLOT +Q2 1 1 2 NPN +X2 1 13 3 UA741 +U4 10 8 IPLOT +Q1 10 0 9 NPN +U1 6 7 IPLOT +U2 7 9 IPLOT +R2 8 5 10000 +R1 6 4 1000 +X1 7 0 5 UA741 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.ckt new file mode 100644 index 0000000..db0e45e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.ckt @@ -0,0 +1,16 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 02:25:09 pm ist +.include ua741.sub + +* Plotting option vplot8_1 +V_u1 6 5 0 +V_u2 5 4 0 +r2 1 4 100000 +v1 3 0 100m +r1 6 3 1000 +x1 5 0 1 ua741 + +.dc v1 0e-00 100e-03 100e-06 +.plot v(1) +.plot i(V_u1) +.plot i(V_u2) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.out new file mode 100644 index 0000000..d01be76 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.out @@ -0,0 +1,21 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 02:25:09 pm ist +.include ua741.sub + +* Plotting option vplot8_1 +V_u1 6 5 0 +V_u2 5 4 0 +r2 1 4 100000 +v1 3 0 100m +r1 6 3 1000 +x1 5 0 1 ua741 + +.dc v1 0e-00 100e-03 100e-06 + +* Control Statements +.control +run +plot v(1) +plot i(V_u1) +plot i(V_u2) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.net b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.net new file mode 100644 index 0000000..6696e60 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.net @@ -0,0 +1,76 @@ +# EESchema Netlist Version 1.1 created Thursday 18 April 2013 11:00:24 AM IST +( + ( /516F84E1 R1 v1 SINE {Lib=SINE} + ( 1 N-000005 ) + ( 2 GND ) + ) + ( /516D117B $noname U3 VPLOT8_1 {Lib=VPLOT8_1} + ( 1 N-000004 ) + ) + ( /516D1019 $noname U1 IPLOT {Lib=IPLOT} + ( 1 N-000002 ) + ( 2 N-000003 ) + ) + ( /516D0FEC $noname U2 IPLOT {Lib=IPLOT} + ( 1 N-000003 ) + ( 2 N-000001 ) + ) + ( /516D0FE2 $noname R2 10000 {Lib=R} + ( 1 N-000004 ) + ( 2 N-000001 ) + ) + ( /516D0F10 $noname R1 1000 {Lib=R} + ( 1 N-000002 ) + ( 2 N-000005 ) + ) + ( /516D0E60 $noname X1 UA741 {Lib=UA741} + ( 2 N-000003 ) + ( 3 GND ) + ( 6 N-000004 ) + ) +) +* +{ Allowed footprints by component: +$component v1 + 1_pin +$endlist +$component R2 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$component X1 + DIP-8__300 +$endlist +$endfootprintlist +} +{ Pin List by Nets +Net 1 "" "" + R2 2 + U2 2 +Net 2 "" "" + R1 1 + U1 1 +Net 3 "" "" + X1 2 + U2 1 + U1 2 +Net 4 "" "" + U3 1 + R2 1 + X1 6 +Net 5 "" "" + v1 1 + R1 2 +Net 6 "GND" "GND" + X1 3 + v1 2 +} +#End diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.pro new file mode 100644 index 0000000..d6041ee --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.pro @@ -0,0 +1,74 @@ +update=Tuesday 16 April 2013 02:06:21 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.proj b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.proj new file mode 100644 index 0000000..fb6ad90 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.proj @@ -0,0 +1 @@ +schematicFile example_5.1.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.sch new file mode 100644 index 0000000..9267154 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.sch @@ -0,0 +1,163 @@ +EESchema Schematic File Version 2 date Monday 13 May 2013 10:18:21 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "13 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L SINE v1 +U 1 1 516F84E1 +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "SINE" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7150 3300 6350 3300 +Wire Wire Line + 5300 2400 5300 3200 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 5350 4200 5350 3400 +Connection ~ 5300 3200 +Wire Wire Line + 5350 3200 5250 3200 +Wire Wire Line + 4150 3200 4050 3200 +Connection ~ 5350 4100 +Connection ~ 6350 3300 +Connection ~ 7050 3300 +Wire Wire Line + 5350 4100 4050 4100 +Wire Wire Line + 6900 2400 7050 2400 +Wire Wire Line + 7050 2400 7050 3300 +Wire Wire Line + 6400 2400 5800 2400 +$Comp +L VPLOT8_1 U3 +U 1 1 516D117B +P 7050 3600 +F 0 "U3" H 6900 3700 50 0000 C CNN +F 1 "VPLOT8_1" H 7200 3700 50 0000 C CNN + 1 7050 3600 + -1 0 0 1 +$EndComp +$Comp +L PWR_FLAG #FLG1 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG1" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2400 +F 0 "U2" H 5400 2500 50 0000 C CNN +F 1 "IPLOT" H 5700 2500 50 0000 C CNN + 1 5550 2400 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6650 2400 +F 0 "R2" V 6730 2400 50 0000 C CNN +F 1 "10000" V 6650 2400 50 0000 C CNN + 1 6650 2400 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR1 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR1" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "1000" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741-cache.lib new file mode 100644 index 0000000..e9ec641 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741-cache.lib @@ -0,0 +1,63 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 02:55:26 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.pro new file mode 100644 index 0000000..d4a57d4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.pro @@ -0,0 +1,82 @@ +update=Tuesday 16 April 2013 02:56:39 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice +LibName39=/home/holy/FreeEDA/library/analogSpice +LibName40=/home/holy/FreeEDA/library/analogXSpice +LibName41=/home/holy/FreeEDA/library/convergenceAidSpice +LibName42=/home/holy/FreeEDA/library/converterSpice +LibName43=/home/holy/FreeEDA/library/digitalSpice +LibName44=/home/holy/FreeEDA/library/digitalXSpice +LibName45=/home/holy/FreeEDA/library/linearSpice +LibName46=/home/holy/FreeEDA/library/measurementSpice +LibName47=/home/holy/FreeEDA/library/portSpice +LibName48=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.sub b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.sub new file mode 100644 index 0000000..1edba9f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.1/ua741.sub @@ -0,0 +1,11 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 + +.ends ua741 \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/analysis b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/analysis new file mode 100644 index 0000000..63f4a40 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/analysis @@ -0,0 +1,8 @@ + +.ac lin 20 1Hz 10Meg + + +.end +.control +run +.endc diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.bak new file mode 100644 index 0000000..3c7e9ce --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.bak @@ -0,0 +1,97 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 12 May 2013 08:39:09 PM IST +#encoding utf-8 +# +# AC +# +DEF AC AC 0 40 Y Y 1 F N +F0 "AC" -200 100 60 H V C CNN +F1 "AC" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.lib new file mode 100644 index 0000000..1541b6a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.lib @@ -0,0 +1,97 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 01:50:16 PM IST +#encoding utf-8 +# +# AC +# +DEF AC AC 0 40 Y Y 1 F N +F0 "AC" -200 100 60 H V C CNN +F1 "AC" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.bak new file mode 100644 index 0000000..7d24c57 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.bak @@ -0,0 +1,143 @@ +EESchema Schematic File Version 2 date Sunday 12 May 2013 08:39:09 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.10-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "12 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5200 3800 +$Comp +L VPLOT8_1 U1 +U 1 1 51877E04 +P 5200 4100 +F 0 "U1" H 5050 4200 50 0000 C CNN +F 1 "VPLOT8_1" H 5350 4200 50 0000 C CNN + 1 5200 4100 + -1 0 0 1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 51877DFD +P 6500 3400 +F 0 "U1" H 6350 3500 50 0000 C CNN +F 1 "VPLOT8_1" H 6650 3500 50 0000 C CNN + 2 6500 3400 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 51877DEF +P 4850 4700 +F 0 "#FLG01" H 4850 4970 30 0001 C CNN +F 1 "PWR_FLAG" H 4850 4930 30 0000 C CNN + 1 4850 4700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 51877DE4 +P 4850 4850 +F 0 "#PWR02" H 4850 4850 30 0001 C CNN +F 1 "GND" H 4850 4780 30 0001 C CNN + 1 4850 4850 + 1 0 0 -1 +$EndComp +Connection ~ 4850 4700 +Wire Wire Line + 4850 4700 4850 4850 +Connection ~ 6350 3700 +Wire Wire Line + 6500 3700 6250 3700 +Wire Wire Line + 5050 3800 5250 3800 +Wire Wire Line + 5250 3600 5050 3600 +Wire Wire Line + 5150 3600 5150 3200 +Connection ~ 5150 3600 +Wire Wire Line + 5150 3200 6350 3200 +Wire Wire Line + 6350 3200 6350 3700 +Wire Wire Line + 4550 3600 4550 4700 +Wire Wire Line + 4550 4700 5050 4700 +$Comp +L AC V1 +U 1 1 51877DB5 +P 5050 4250 +F 0 "V1" H 4850 4350 60 0000 C CNN +F 1 "AC" H 4850 4200 60 0000 C CNN +F 2 "R1" H 4750 4250 60 0000 C CNN + 1 5050 4250 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 51877DA4 +P 4800 3600 +F 0 "R1" V 4880 3600 50 0000 C CNN +F 1 "R" V 4800 3600 50 0000 C CNN + 1 4800 3600 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 51877D93 +P 5750 3700 +F 0 "X1" H 5900 3850 60 0000 C CNN +F 1 "UA741" H 5900 3950 60 0000 C CNN + 1 5750 3700 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir new file mode 100644 index 0000000..103691f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir @@ -0,0 +1,13 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:50:12 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +R2 1 4 100k +U1 3 1 VPLOT8_1 +V1 3 0 AC +R1 4 0 1k +X1 3 4 1 UA741 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir.ckt new file mode 100644 index 0000000..b3db0c4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir.ckt @@ -0,0 +1,12 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:50:12 pm ist +.include ua741.sub + +r2 1 4 100k +* Plotting option vplot8_1 +v1 3 0 ac 1 +r1 4 0 1k +x1 3 4 1 ua741 + +.ac lin 10 1Hz 1Meg +.plot v(3) v(1) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir.out new file mode 100644 index 0000000..3554667 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir.out @@ -0,0 +1,17 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:50:12 pm ist +.include ua741.sub + +r2 1 4 100k +* Plotting option vplot8_1 +v1 3 0 ac 1 +r1 4 0 1k +x1 3 4 1 ua741 + +.ac lin 10 1Hz 1Meg + +* Control Statements +.control +run +plot v(3) v(1) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.pro new file mode 100644 index 0000000..c525500 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.pro @@ -0,0 +1,74 @@ +update=Monday 06 May 2013 03:19:21 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.proj b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.proj new file mode 100644 index 0000000..81a471e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.proj @@ -0,0 +1 @@ +schematicFile example_5.10.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.sch new file mode 100644 index 0000000..8601e68 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.sch @@ -0,0 +1,154 @@ +EESchema Schematic File Version 2 date Monday 13 May 2013 01:50:16 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.10-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "13 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 6000 3200 6350 3200 +Connection ~ 5200 3800 +Connection ~ 4850 4700 +Wire Wire Line + 4850 4700 4850 4850 +Connection ~ 6350 3700 +Wire Wire Line + 6500 3700 6250 3700 +Wire Wire Line + 5050 3800 5250 3800 +Wire Wire Line + 5250 3600 5050 3600 +Wire Wire Line + 5150 3600 5150 3200 +Connection ~ 5150 3600 +Wire Wire Line + 6350 3200 6350 3700 +Wire Wire Line + 4550 3600 4550 4700 +Wire Wire Line + 4550 4700 5050 4700 +Wire Wire Line + 5150 3200 5500 3200 +$Comp +L R R2 +U 1 1 5190A20F +P 5750 3200 +F 0 "R2" V 5830 3200 50 0000 C CNN +F 1 "100k" V 5750 3200 50 0000 C CNN + 1 5750 3200 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 51877E04 +P 5200 4100 +F 0 "U1" H 5050 4200 50 0000 C CNN +F 1 "VPLOT8_1" H 5350 4200 50 0000 C CNN + 1 5200 4100 + -1 0 0 1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 51877DFD +P 6500 3400 +F 0 "U1" H 6350 3500 50 0000 C CNN +F 1 "VPLOT8_1" H 6650 3500 50 0000 C CNN + 2 6500 3400 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG1 +U 1 1 51877DEF +P 4850 4700 +F 0 "#FLG1" H 4850 4970 30 0001 C CNN +F 1 "PWR_FLAG" H 4850 4930 30 0000 C CNN + 1 4850 4700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR1 +U 1 1 51877DE4 +P 4850 4850 +F 0 "#PWR1" H 4850 4850 30 0001 C CNN +F 1 "GND" H 4850 4780 30 0001 C CNN + 1 4850 4850 + 1 0 0 -1 +$EndComp +$Comp +L AC V1 +U 1 1 51877DB5 +P 5050 4250 +F 0 "V1" H 4850 4350 60 0000 C CNN +F 1 "AC" H 4850 4200 60 0000 C CNN +F 2 "R1" H 4750 4250 60 0000 C CNN + 1 5050 4250 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 51877DA4 +P 4800 3600 +F 0 "R1" V 4880 3600 50 0000 C CNN +F 1 "1k" V 4800 3600 50 0000 C CNN + 1 4800 3600 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 51877D93 +P 5750 3700 +F 0 "X1" H 5900 3850 60 0000 C CNN +F 1 "UA741" H 5900 3950 60 0000 C CNN + 1 5750 3700 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741-cache.bak new file mode 100644 index 0000000..696ddb5 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741-cache.bak @@ -0,0 +1,116 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 07 May 2013 04:32:37 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCCS +# +DEF VCCS G 0 40 Y Y 1 F N +F0 "G" -200 100 50 H V C CNN +F1 "VCCS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741-cache.lib new file mode 100644 index 0000000..4ffd70b --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741-cache.lib @@ -0,0 +1,116 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 08 May 2013 02:27:06 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCCS +# +DEF VCCS G 0 40 Y Y 1 F N +F0 "G" -200 100 50 H V C CNN +F1 "VCCS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.pro new file mode 100644 index 0000000..dabece1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.pro @@ -0,0 +1,82 @@ +update=Sunday 12 May 2013 08:34:27 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice +LibName39=/home/holy/FreeEDA/library/analogSpice +LibName40=/home/holy/FreeEDA/library/analogXSpice +LibName41=/home/holy/FreeEDA/library/convergenceAidSpice +LibName42=/home/holy/FreeEDA/library/converterSpice +LibName43=/home/holy/FreeEDA/library/digitalSpice +LibName44=/home/holy/FreeEDA/library/digitalXSpice +LibName45=/home/holy/FreeEDA/library/linearSpice +LibName46=/home/holy/FreeEDA/library/measurementSpice +LibName47=/home/holy/FreeEDA/library/portSpice +LibName48=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.sub b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.sub new file mode 100644 index 0000000..1edba9f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.10/ua741.sub @@ -0,0 +1,11 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 + +.ends ua741 \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/analysis b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/analysis new file mode 100644 index 0000000..7946c35 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 5e-00 5e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2-cache.lib new file mode 100644 index 0000000..40f51d7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2-cache.lib @@ -0,0 +1,107 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 03:05:48 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.bak new file mode 100644 index 0000000..9eb4b13 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.bak @@ -0,0 +1,171 @@ +EESchema Schematic File Version 2 date Tuesday 16 April 2013 02:59:48 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5350 4100 4050 4100 +Wire Wire Line + 6400 3350 6400 2950 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 5350 4200 5350 3400 +Connection ~ 5300 3200 +Wire Wire Line + 5300 2950 5300 3200 +Wire Wire Line + 5350 3200 5250 3200 +Connection ~ 6400 3300 +Wire Wire Line + 5900 2950 5800 2950 +Wire Wire Line + 4150 3200 4050 3200 +Connection ~ 5350 4100 +Wire Wire Line + 6350 3300 6400 3300 +Connection ~ 6350 3300 +Connection ~ 6400 3350 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516D11A2 +P 5350 4100 +F 0 "#FLG01" H 5350 4370 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN + 1 5350 4100 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516D117B +P 6700 3350 +F 0 "U3" H 6550 3450 50 0000 C CNN +F 1 "VPLOT8_1" H 6850 3450 50 0000 C CNN + 1 6700 3350 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG02" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2950 +F 0 "U2" H 5400 3050 50 0000 C CNN +F 1 "IPLOT" H 5700 3050 50 0000 C CNN + 1 5550 2950 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6150 2950 +F 0 "R2" V 6230 2950 50 0000 C CNN +F 1 "100000" V 6150 2950 50 0000 C CNN + 1 6150 2950 + 0 1 1 0 +$EndComp +$Comp +L DC v1 +U 1 1 516D0FD3 +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "100m" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR03" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "1000" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir new file mode 100644 index 0000000..b0ee189 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir @@ -0,0 +1,19 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 03:05:45 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U5 3 8 IPLOT +U4 2 VPLOT8_1 +R3 0 2 100000 +R4 3 2 100000 +U3 8 VPLOT8_1 +U1 6 4 IPLOT +U2 4 5 IPLOT +R2 2 5 100000 +v1 7 0 100m +R1 6 7 1000 +X1 4 0 8 UA741 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.ckt new file mode 100644 index 0000000..ea512f4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.ckt @@ -0,0 +1,22 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 03:05:45 pm ist +.include ua741.sub + +V_u5 3 8 0 +* Plotting option vplot8_1 +r3 0 2 100000 +r4 3 2 100000 +* Plotting option vplot8_1 +V_u1 6 4 0 +V_u2 4 5 0 +r2 2 5 100000 +v1 7 0 100m +r1 6 7 1000 +x1 4 0 8 ua741 + +.dc v1 0e-00 5e-00 5e-03 +.plot i(V_u5) +.plot v(2) +.plot v(8) +.plot i(V_u1) +.plot i(V_u2) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.out new file mode 100644 index 0000000..fdcc306 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.out @@ -0,0 +1,27 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 03:05:45 pm ist +.include ua741.sub + +V_u5 3 8 0 +* Plotting option vplot8_1 +r3 0 2 100000 +r4 3 2 100000 +* Plotting option vplot8_1 +V_u1 6 4 0 +V_u2 4 5 0 +r2 2 5 100000 +v1 7 0 100m +r1 6 7 1000 +x1 4 0 8 ua741 + +.dc v1 0e-00 5e-00 5e-03 + +* Control Statements +.control +run +plot i(V_u5) +plot v(2) +plot v(8) +plot i(V_u1) +plot i(V_u2) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.pro new file mode 100644 index 0000000..fbb8adc --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.pro @@ -0,0 +1,74 @@ +update=Tuesday 16 April 2013 02:59:20 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.proj b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.proj new file mode 100644 index 0000000..e56c1d2 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.proj @@ -0,0 +1 @@ +schematicFile example_5.2.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.sch new file mode 100644 index 0000000..5dbaecc --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.sch @@ -0,0 +1,224 @@ +EESchema Schematic File Version 2 date Tuesday 16 April 2013 03:05:48 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 7000 3000 7000 3350 +Connection ~ 7000 2400 +Connection ~ 6450 2500 +Connection ~ 6450 2400 +Wire Wire Line + 6350 3300 7000 3300 +Wire Wire Line + 6450 2900 6450 3000 +Connection ~ 7000 3350 +Connection ~ 6350 3300 +Connection ~ 5350 4100 +Wire Wire Line + 4150 3200 4050 3200 +Wire Wire Line + 5900 2400 5800 2400 +Connection ~ 7000 3300 +Wire Wire Line + 5350 3200 5250 3200 +Connection ~ 5300 3200 +Wire Wire Line + 5350 4200 5350 3400 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 5350 4100 4050 4100 +Wire Wire Line + 6400 2400 6500 2400 +Wire Wire Line + 5300 2400 5300 3200 +Wire Wire Line + 7000 2400 7000 2500 +$Comp +L IPLOT U5 +U 1 1 516D1AB3 +P 7000 2750 +F 0 "U5" H 6850 2850 50 0000 C CNN +F 1 "IPLOT" H 7150 2850 50 0000 C CNN + 1 7000 2750 + 0 1 1 0 +$EndComp +$Comp +L VPLOT8_1 U4 +U 1 1 516D1A8F +P 6450 2100 +F 0 "U4" H 6300 2200 50 0000 C CNN +F 1 "VPLOT8_1" H 6600 2200 50 0000 C CNN + 1 6450 2100 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 516D1A5C +P 6450 3000 +F 0 "#PWR01" H 6450 3000 30 0001 C CNN +F 1 "GND" H 6450 2930 30 0001 C CNN + 1 6450 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 516D1A47 +P 6450 2650 +F 0 "R3" V 6530 2650 50 0000 C CNN +F 1 "100000" V 6450 2650 50 0000 C CNN + 1 6450 2650 + -1 0 0 1 +$EndComp +$Comp +L R R4 +U 1 1 516D1A3E +P 6750 2400 +F 0 "R4" V 6830 2400 50 0000 C CNN +F 1 "100000" V 6750 2400 50 0000 C CNN + 1 6750 2400 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516D11A2 +P 5350 4100 +F 0 "#FLG02" H 5350 4370 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN + 1 5350 4100 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516D117B +P 7300 3350 +F 0 "U3" H 7150 3450 50 0000 C CNN +F 1 "VPLOT8_1" H 7450 3450 50 0000 C CNN + 1 7300 3350 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG03 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG03" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2400 +F 0 "U2" H 5400 2500 50 0000 C CNN +F 1 "IPLOT" H 5700 2500 50 0000 C CNN + 1 5550 2400 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6150 2400 +F 0 "R2" V 6230 2400 50 0000 C CNN +F 1 "100000" V 6150 2400 50 0000 C CNN + 1 6150 2400 + 0 1 1 0 +$EndComp +$Comp +L DC v1 +U 1 1 516D0FD3 +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "100m" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR04" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "1000" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.pro new file mode 100644 index 0000000..7e86ee9 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.pro @@ -0,0 +1,82 @@ +update=Tuesday 16 April 2013 03:06:44 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice +LibName39=/home/holy/FreeEDA/library/analogSpice +LibName40=/home/holy/FreeEDA/library/analogXSpice +LibName41=/home/holy/FreeEDA/library/convergenceAidSpice +LibName42=/home/holy/FreeEDA/library/converterSpice +LibName43=/home/holy/FreeEDA/library/digitalSpice +LibName44=/home/holy/FreeEDA/library/digitalXSpice +LibName45=/home/holy/FreeEDA/library/linearSpice +LibName46=/home/holy/FreeEDA/library/measurementSpice +LibName47=/home/holy/FreeEDA/library/portSpice +LibName48=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.sub b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.sub new file mode 100644 index 0000000..1edba9f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.2/ua741.sub @@ -0,0 +1,11 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 + +.ends ua741 \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/analysis b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/analysis new file mode 100644 index 0000000..7946c35 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 5e-00 5e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.bak new file mode 100644 index 0000000..e6f6afe --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.bak @@ -0,0 +1,107 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 09:35:11 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.lib new file mode 100644 index 0000000..4daeb80 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.lib @@ -0,0 +1,107 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 21 May 2013 11:13:50 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.bak new file mode 100644 index 0000000..d0ef6de --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.bak @@ -0,0 +1,182 @@ +EESchema Schematic File Version 2 date Wednesday 15 May 2013 09:35:11 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 7050 3300 7050 2950 +Wire Wire Line + 6450 3300 6350 3300 +Wire Wire Line + 5350 4100 4050 4100 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 5350 3400 5350 4200 +Connection ~ 5300 3200 +Wire Wire Line + 5300 2950 5300 3200 +Wire Wire Line + 5250 3200 5350 3200 +Wire Wire Line + 5900 2950 5800 2950 +Wire Wire Line + 4150 3200 4050 3200 +Connection ~ 5350 4100 +Connection ~ 6350 3300 +Connection ~ 7050 3300 +Wire Wire Line + 7050 3300 6950 3300 +Wire Wire Line + 7050 2950 6400 2950 +$Comp +L R R3 +U 1 1 516D1D5E +P 6700 3300 +F 0 "R3" V 6780 3300 50 0000 C CNN +F 1 "100k" V 6700 3300 50 0000 C CNN + 1 6700 3300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 516D11A2 +P 5350 4100 +F 0 "#FLG01" H 5350 4370 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN + 1 5350 4100 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516D117B +P 7350 3300 +F 0 "U3" H 7200 3400 50 0000 C CNN +F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN + 1 7350 3300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG02" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2950 +F 0 "U2" H 5400 3050 50 0000 C CNN +F 1 "IPLOT" H 5700 3050 50 0000 C CNN + 1 5550 2950 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6150 2950 +F 0 "R2" V 6230 2950 50 0000 C CNN +F 1 "1000" V 6150 2950 50 0000 C CNN + 1 6150 2950 + 0 1 1 0 +$EndComp +$Comp +L DC v1 +U 1 1 516D0FD3 +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "10" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR03" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "10" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir new file mode 100644 index 0000000..25f7e67 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir @@ -0,0 +1,16 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 15 May 2013 09:29:30 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +R3 1 7 100k +U3 1 VPLOT8_1 +U1 5 2 IPLOT +U2 2 3 IPLOT +R2 1 3 1000 +v1 6 0 10 +R1 5 6 10 +X1 2 0 7 UA741 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.ckt new file mode 100644 index 0000000..5cc8d66 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.ckt @@ -0,0 +1,17 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 09:29:30 pm ist +.include ua741.sub + +r3 1 7 100k +* Plotting option vplot8_1 +V_u1 5 2 0 +V_u2 2 3 0 +r2 1 3 1000 +v1 6 0 10 +r1 5 6 10 +x1 2 0 7 ua741 + +.dc v1 0e-00 5e-00 5e-03 +.plot v(1) +.plot i(V_u1) +.plot i(V_u2) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.out new file mode 100644 index 0000000..1d3b745 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.out @@ -0,0 +1,22 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 09:29:30 pm ist +.include ua741.sub + +r3 1 7 100k +* Plotting option vplot8_1 +V_u1 5 2 0 +V_u2 2 3 0 +r2 1 3 1000 +v1 6 0 10 +r1 5 6 10 +x1 2 0 7 ua741 + +.dc v1 0e-00 5e-00 5e-03 + +* Control Statements +.control +run +plot v(1) +plot i(V_u1) +plot i(V_u2) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.pro new file mode 100644 index 0000000..d8dae16 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.pro @@ -0,0 +1,74 @@ +update=Tuesday 16 April 2013 03:20:48 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.proj b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.proj new file mode 100644 index 0000000..36f23a8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.proj @@ -0,0 +1 @@ +schematicFile example_5.3.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.sch new file mode 100644 index 0000000..a549a57 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.sch @@ -0,0 +1,183 @@ +EESchema Schematic File Version 2 date Tuesday 21 May 2013 11:13:50 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.3-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "21 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 7050 3300 7050 2950 +Wire Wire Line + 6450 3300 6350 3300 +Wire Wire Line + 5350 4100 4050 4100 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 5350 3400 5350 4200 +Connection ~ 5300 3200 +Wire Wire Line + 5300 2950 5300 3200 +Wire Wire Line + 5250 3200 5350 3200 +Wire Wire Line + 5900 2950 5800 2950 +Wire Wire Line + 4150 3200 4050 3200 +Connection ~ 5350 4100 +Connection ~ 6350 3300 +Connection ~ 7050 3300 +Wire Wire Line + 7050 3300 6950 3300 +Wire Wire Line + 7050 2950 6400 2950 +$Comp +L R RL +U 1 1 516D1D5E +P 6700 3300 +F 0 "RL" V 6780 3300 50 0000 C CNN +F 1 "100k" V 6700 3300 50 0000 C CNN + 1 6700 3300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 516D11A2 +P 5350 4100 +F 0 "#FLG01" H 5350 4370 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN + 1 5350 4100 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516D117B +P 7350 3300 +F 0 "U3" H 7200 3400 50 0000 C CNN +F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN + 1 7350 3300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG02" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2950 +F 0 "U2" H 5400 3050 50 0000 C CNN +F 1 "IPLOT" H 5700 3050 50 0000 C CNN + 1 5550 2950 + 1 0 0 -1 +$EndComp +$Comp +L R Rf +U 1 1 516D0FE2 +P 6150 2950 +F 0 "Rf" V 6230 2950 50 0000 C CNN +F 1 "1000" V 6150 2950 50 0000 C CNN + 1 6150 2950 + 0 1 1 0 +$EndComp +$Comp +L DC v1 +U 1 1 516D0FD3 +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "10" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR03" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "10" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.pro new file mode 100644 index 0000000..7fef6ff --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.pro @@ -0,0 +1,82 @@ +update=Wednesday 15 May 2013 09:42:35 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice +LibName39=/home/holy/FreeEDA/library/analogSpice +LibName40=/home/holy/FreeEDA/library/analogXSpice +LibName41=/home/holy/FreeEDA/library/convergenceAidSpice +LibName42=/home/holy/FreeEDA/library/converterSpice +LibName43=/home/holy/FreeEDA/library/digitalSpice +LibName44=/home/holy/FreeEDA/library/digitalXSpice +LibName45=/home/holy/FreeEDA/library/linearSpice +LibName46=/home/holy/FreeEDA/library/measurementSpice +LibName47=/home/holy/FreeEDA/library/portSpice +LibName48=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.sub b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.sub new file mode 100644 index 0000000..1edba9f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.3/ua741.sub @@ -0,0 +1,11 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 + +.ends ua741 \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/analysis b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/analysis new file mode 100644 index 0000000..35318bb --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 10e-00 5e-03 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.bak new file mode 100644 index 0000000..c4ca8fc --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.bak @@ -0,0 +1,107 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 17 April 2013 12:43:16 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.lib new file mode 100644 index 0000000..18a7cf4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.lib @@ -0,0 +1,107 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 17 April 2013 12:47:25 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.bak new file mode 100644 index 0000000..f68a6c8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.bak @@ -0,0 +1,345 @@ +EESchema Schematic File Version 2 date Wednesday 17 April 2013 12:43:16 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.4-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 1400 6300 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516D2826 +P 1400 6300 +F 0 "#FLG01" H 1400 6570 30 0001 C CNN +F 1 "PWR_FLAG" H 1400 6530 30 0000 C CNN + 1 1400 6300 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 516D27F8 +P 1400 6450 +F 0 "#PWR02" H 1400 6450 30 0001 C CNN +F 1 "GND" H 1400 6380 30 0001 C CNN + 1 1400 6450 + 1 0 0 -1 +$EndComp +Connection ~ 1400 6100 +Wire Wire Line + 1400 6100 1400 6450 +Connection ~ 2400 3250 +Connection ~ 4500 3450 +Connection ~ 4500 4400 +Connection ~ 6750 3900 +Wire Wire Line + 5100 4700 5100 4850 +Wire Wire Line + 1600 5200 1600 5000 +Wire Wire Line + 1600 5000 2400 5000 +Connection ~ 3650 4900 +Wire Wire Line + 3900 4400 3900 4900 +Wire Wire Line + 3900 4900 3400 4900 +Connection ~ 2400 4500 +Wire Wire Line + 2400 4500 2600 4500 +Wire Wire Line + 3650 3000 3650 3550 +Wire Wire Line + 3650 3550 3100 3550 +Wire Wire Line + 2400 4250 2400 4800 +Wire Wire Line + 6750 3900 6750 3950 +Wire Wire Line + 6750 3950 6150 3950 +Wire Wire Line + 5300 3350 5100 3350 +Connection ~ 5100 3850 +Wire Wire Line + 5100 3350 5100 3850 +Wire Wire Line + 4400 3450 4550 3450 +Wire Wire Line + 4550 3450 4550 3850 +Wire Wire Line + 5150 3850 5050 3850 +Wire Wire Line + 5150 4050 5050 4050 +Wire Wire Line + 4550 4050 4550 4400 +Wire Wire Line + 4550 4400 4400 4400 +Wire Wire Line + 5800 3350 5950 3350 +Wire Wire Line + 6450 3350 6450 3950 +Connection ~ 6450 3950 +Wire Wire Line + 2400 3750 2400 3100 +Wire Wire Line + 2400 3550 2600 3550 +Connection ~ 2400 3550 +Wire Wire Line + 3400 3000 3900 3000 +Wire Wire Line + 3900 3000 3900 3450 +Connection ~ 3650 3000 +Wire Wire Line + 3100 4500 3650 4500 +Wire Wire Line + 3650 4500 3650 4900 +Wire Wire Line + 2400 2900 1150 2900 +Wire Wire Line + 1150 2900 1150 3600 +Wire Wire Line + 5100 4050 5100 4200 +Connection ~ 5100 4050 +Wire Wire Line + 1150 4500 1150 6100 +Wire Wire Line + 1150 6100 1600 6100 +$Comp +L DC v2 +U 1 1 516D27D5 +P 1600 5650 +F 0 "v2" H 1400 5750 60 0000 C CNN +F 1 "DC" H 1400 5600 60 0000 C CNN +F 2 "R1" H 1300 5650 60 0000 C CNN + 1 1600 5650 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 516D27D0 +P 1150 4050 +F 0 "v1" H 950 4150 60 0000 C CNN +F 1 "DC" H 950 4000 60 0000 C CNN +F 2 "R1" H 850 4050 60 0000 C CNN + 1 1150 4050 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 516D27AE +P 2400 4200 +F 0 "U1" H 2250 4300 50 0000 C CNN +F 1 "VPLOT8_1" H 2550 4300 50 0000 C CNN + 2 2400 4200 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 516D27A5 +P 2400 3250 +F 0 "U1" H 2250 3350 50 0000 C CNN +F 1 "VPLOT8_1" H 2550 3350 50 0000 C CNN + 1 2400 3250 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 5 1 516D278E +P 6750 3600 +F 0 "U1" H 6600 3700 50 0000 C CNN +F 1 "VPLOT8_1" H 6900 3700 50 0000 C CNN + 5 6750 3600 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 4 1 516D2789 +P 4500 4100 +F 0 "U1" H 4350 4200 50 0000 C CNN +F 1 "VPLOT8_1" H 4650 4200 50 0000 C CNN + 4 4500 4100 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 3 1 516D2785 +P 4500 3150 +F 0 "U1" H 4350 3250 50 0000 C CNN +F 1 "VPLOT8_1" H 4650 3250 50 0000 C CNN + 3 4500 3150 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516D274C +P 5100 4850 +F 0 "#PWR03" H 5100 4850 30 0001 C CNN +F 1 "GND" H 5100 4780 30 0001 C CNN + 1 5100 4850 + 1 0 0 -1 +$EndComp +$Comp +L R R6 +U 1 1 516D2736 +P 5100 4450 +F 0 "R6" V 5180 4450 50 0000 C CNN +F 1 "R" V 5100 4450 50 0000 C CNN + 1 5100 4450 + -1 0 0 1 +$EndComp +$Comp +L R R3 +U 1 1 516D26F4 +P 2850 4500 +F 0 "R3" V 2930 4500 50 0000 C CNN +F 1 "R" V 2850 4500 50 0000 C CNN + 1 2850 4500 + 0 -1 -1 0 +$EndComp +$Comp +L R R2 +U 1 1 516D26CE +P 2850 3550 +F 0 "R2" V 2930 3550 50 0000 C CNN +F 1 "R" V 2850 3550 50 0000 C CNN + 1 2850 3550 + 0 -1 -1 0 +$EndComp +$Comp +L R R1 +U 1 1 516D26AE +P 2400 4000 +F 0 "R1" V 2480 4000 50 0000 C CNN +F 1 "R" V 2400 4000 50 0000 C CNN + 1 2400 4000 + -1 0 0 1 +$EndComp +$Comp +L R R7 +U 1 1 516D268C +P 6200 3350 +F 0 "R7" V 6280 3350 50 0000 C CNN +F 1 "R" V 6200 3350 50 0000 C CNN + 1 6200 3350 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516D267F +P 5550 3350 +F 0 "U4" H 5400 3450 50 0000 C CNN +F 1 "IPLOT" H 5700 3450 50 0000 C CNN + 1 5550 3350 + 1 0 0 -1 +$EndComp +$Comp +L UA741 X2 +U 1 1 516D2661 +P 2900 4900 +F 0 "X2" H 3050 5050 60 0000 C CNN +F 1 "UA741" H 3050 5150 60 0000 C CNN + 1 2900 4900 + 1 0 0 1 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D2656 +P 2900 3000 +F 0 "X1" H 3050 3150 60 0000 C CNN +F 1 "UA741" H 3050 3250 60 0000 C CNN + 1 2900 3000 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U3 +U 1 1 516D264E +P 4150 4400 +F 0 "U3" H 4000 4500 50 0000 C CNN +F 1 "IPLOT" H 4300 4500 50 0000 C CNN + 1 4150 4400 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D2648 +P 4150 3450 +F 0 "U2" H 4000 3550 50 0000 C CNN +F 1 "IPLOT" H 4300 3550 50 0000 C CNN + 1 4150 3450 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 516D2600 +P 4800 4050 +F 0 "R5" V 4880 4050 50 0000 C CNN +F 1 "R" V 4800 4050 50 0000 C CNN + 1 4800 4050 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 516D25EC +P 4800 3850 +F 0 "R4" V 4880 3850 50 0000 C CNN +F 1 "R" V 4800 3850 50 0000 C CNN + 1 4800 3850 + 0 1 1 0 +$EndComp +$Comp +L UA741 X3 +U 1 1 516D25CD +P 5650 3950 +F 0 "X3" H 5800 4100 60 0000 C CNN +F 1 "UA741" H 5800 4200 60 0000 C CNN + 1 5650 3950 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir new file mode 100644 index 0000000..4788ef3 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir @@ -0,0 +1,24 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 17 April 2013 12:47:21 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v2 5 0 10V +v1 9 0 20V +U1 3 4 6 2 11 VPLOT8_1 +R6 0 7 R +R3 4 12 R +R2 3 8 R +R1 4 3 R +R7 11 10 R +U4 13 10 IPLOT +X2 4 5 12 UA741 +X1 3 9 8 UA741 +U3 12 2 IPLOT +U2 8 6 IPLOT +R5 7 2 R +R4 13 6 R +X3 13 7 11 UA741 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.ckt new file mode 100644 index 0000000..2fc3967 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.ckt @@ -0,0 +1,26 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 17 april 2013 12:47:21 pm ist +.include ua741.sub + +v2 5 0 10v +v1 9 0 20v +* Plotting option vplot8_1 +r6 0 7 r +r3 4 12 r +r2 3 8 r +r1 4 3 r +r7 11 10 r +V_u4 13 10 0 +x2 4 5 12 ua741 +x1 3 9 8 ua741 +V_u3 12 2 0 +V_u2 8 6 0 +r5 7 2 r +r4 13 6 r +x3 13 7 11 ua741 + +.dc v1 0e-00 10e-00 5e-03 +.plot v(3) v(4) v(6) v(2) v(11) +.plot i(V_u4) +.plot i(V_u3) +.plot i(V_u2) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.out new file mode 100644 index 0000000..98912a5 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.out @@ -0,0 +1,31 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 17 april 2013 12:47:21 pm ist +.include ua741.sub + +v2 5 0 10v +v1 9 0 20v +* Plotting option vplot8_1 +r6 0 7 r +r3 4 12 r +r2 3 8 r +r1 4 3 r +r7 11 10 r +V_u4 13 10 0 +x2 4 5 12 ua741 +x1 3 9 8 ua741 +V_u3 12 2 0 +V_u2 8 6 0 +r5 7 2 r +r4 13 6 r +x3 13 7 11 ua741 + +.dc v1 0e-00 10e-00 5e-03 + +* Control Statements +.control +run +plot v(3) v(4) v(6) v(2) v(11) +plot i(V_u4) +plot i(V_u3) +plot i(V_u2) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.pro new file mode 100644 index 0000000..63f9501 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.pro @@ -0,0 +1,74 @@ +update=Tuesday 16 April 2013 03:49:31 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.proj b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.proj new file mode 100644 index 0000000..799253b --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.proj @@ -0,0 +1 @@ +schematicFile example_5.4.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.sch new file mode 100644 index 0000000..8b83c0d --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.sch @@ -0,0 +1,345 @@ +EESchema Schematic File Version 2 date Wednesday 17 April 2013 12:47:25 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.4-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 1400 6300 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516D2826 +P 1400 6300 +F 0 "#FLG01" H 1400 6570 30 0001 C CNN +F 1 "PWR_FLAG" H 1400 6530 30 0000 C CNN + 1 1400 6300 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 516D27F8 +P 1400 6450 +F 0 "#PWR02" H 1400 6450 30 0001 C CNN +F 1 "GND" H 1400 6380 30 0001 C CNN + 1 1400 6450 + 1 0 0 -1 +$EndComp +Connection ~ 1400 6100 +Wire Wire Line + 1400 6100 1400 6450 +Connection ~ 2400 3250 +Connection ~ 4500 3450 +Connection ~ 4500 4400 +Connection ~ 6750 3900 +Wire Wire Line + 5100 4700 5100 4850 +Wire Wire Line + 1600 5200 1600 5000 +Wire Wire Line + 1600 5000 2400 5000 +Connection ~ 3650 4900 +Wire Wire Line + 3900 4400 3900 4900 +Wire Wire Line + 3900 4900 3400 4900 +Connection ~ 2400 4500 +Wire Wire Line + 2400 4500 2600 4500 +Wire Wire Line + 3650 3000 3650 3550 +Wire Wire Line + 3650 3550 3100 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"VPLOT8_1" H 4650 4200 50 0000 C CNN + 4 4500 4100 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 3 1 516D2785 +P 4500 3150 +F 0 "U1" H 4350 3250 50 0000 C CNN +F 1 "VPLOT8_1" H 4650 3250 50 0000 C CNN + 3 4500 3150 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516D274C +P 5100 4850 +F 0 "#PWR03" H 5100 4850 30 0001 C CNN +F 1 "GND" H 5100 4780 30 0001 C CNN + 1 5100 4850 + 1 0 0 -1 +$EndComp +$Comp +L R R6 +U 1 1 516D2736 +P 5100 4450 +F 0 "R6" V 5180 4450 50 0000 C CNN +F 1 "R" V 5100 4450 50 0000 C CNN + 1 5100 4450 + -1 0 0 1 +$EndComp +$Comp +L R R3 +U 1 1 516D26F4 +P 2850 4500 +F 0 "R3" V 2930 4500 50 0000 C CNN +F 1 "R" V 2850 4500 50 0000 C CNN + 1 2850 4500 + 0 -1 -1 0 +$EndComp +$Comp +L R R2 +U 1 1 516D26CE +P 2850 3550 +F 0 "R2" V 2930 3550 50 0000 C CNN +F 1 "R" V 2850 3550 50 0000 C CNN + 1 2850 3550 + 0 -1 -1 0 +$EndComp +$Comp +L R R1 +U 1 1 516D26AE +P 2400 4000 +F 0 "R1" V 2480 4000 50 0000 C CNN +F 1 "R" V 2400 4000 50 0000 C CNN + 1 2400 4000 + -1 0 0 1 +$EndComp +$Comp +L R R7 +U 1 1 516D268C +P 6200 3350 +F 0 "R7" V 6280 3350 50 0000 C CNN +F 1 "R" V 6200 3350 50 0000 C CNN + 1 6200 3350 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516D267F +P 5550 3350 +F 0 "U4" H 5400 3450 50 0000 C CNN +F 1 "IPLOT" H 5700 3450 50 0000 C CNN + 1 5550 3350 + 1 0 0 -1 +$EndComp +$Comp +L UA741 X2 +U 1 1 516D2661 +P 2900 4900 +F 0 "X2" H 3050 5050 60 0000 C CNN +F 1 "UA741" H 3050 5150 60 0000 C CNN + 1 2900 4900 + 1 0 0 1 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D2656 +P 2900 3000 +F 0 "X1" H 3050 3150 60 0000 C CNN +F 1 "UA741" H 3050 3250 60 0000 C CNN + 1 2900 3000 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U3 +U 1 1 516D264E +P 4150 4400 +F 0 "U3" H 4000 4500 50 0000 C CNN +F 1 "IPLOT" H 4300 4500 50 0000 C CNN + 1 4150 4400 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D2648 +P 4150 3450 +F 0 "U2" H 4000 3550 50 0000 C CNN +F 1 "IPLOT" H 4300 3550 50 0000 C CNN + 1 4150 3450 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 516D2600 +P 4800 4050 +F 0 "R5" V 4880 4050 50 0000 C CNN +F 1 "R" V 4800 4050 50 0000 C CNN + 1 4800 4050 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 516D25EC +P 4800 3850 +F 0 "R4" V 4880 3850 50 0000 C CNN +F 1 "R" V 4800 3850 50 0000 C CNN + 1 4800 3850 + 0 1 1 0 +$EndComp +$Comp +L UA741 X3 +U 1 1 516D25CD +P 5650 3950 +F 0 "X3" H 5800 4100 60 0000 C CNN +F 1 "UA741" H 5800 4200 60 0000 C CNN + 1 5650 3950 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.pro new file mode 100644 index 0000000..36280c7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.pro @@ -0,0 +1,82 @@ +update=Wednesday 17 April 2013 12:46:01 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice +LibName39=/home/holy/FreeEDA/library/analogSpice +LibName40=/home/holy/FreeEDA/library/analogXSpice +LibName41=/home/holy/FreeEDA/library/convergenceAidSpice +LibName42=/home/holy/FreeEDA/library/converterSpice +LibName43=/home/holy/FreeEDA/library/digitalSpice +LibName44=/home/holy/FreeEDA/library/digitalXSpice +LibName45=/home/holy/FreeEDA/library/linearSpice +LibName46=/home/holy/FreeEDA/library/measurementSpice +LibName47=/home/holy/FreeEDA/library/portSpice +LibName48=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.sub b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.sub new file mode 100644 index 0000000..1edba9f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.4/ua741.sub @@ -0,0 +1,11 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 + +.ends ua741 \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/analysis b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/analysis new file mode 100644 index 0000000..c9183fa --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/analysis @@ -0,0 +1 @@ +.tran 10e-03 20e-03 0e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.bak new file mode 100644 index 0000000..79f0251 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.bak @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 17 April 2013 11:57:44 AM IST +#encoding utf-8 +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.lib new file mode 100644 index 0000000..951b224 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.lib @@ -0,0 +1,109 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 17 April 2013 12:50:53 PM IST +#encoding utf-8 +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.bak new file mode 100644 index 0000000..9eaa078 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.bak @@ -0,0 +1,171 @@ +EESchema Schematic File Version 2 date Wednesday 17 April 2013 11:57:44 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L SINE v1 +U 1 1 516E3BC9 +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "SINE" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5350 4100 4050 4100 +Wire Wire Line + 6350 3300 7050 3300 +Wire Wire Line + 6400 2950 7050 2950 +Connection ~ 7050 3300 +Connection ~ 6350 3300 +Connection ~ 5350 4100 +Wire Wire Line + 4150 3200 4050 3200 +Wire Wire Line + 5900 2950 5800 2950 +Wire Wire Line + 5350 3200 5250 3200 +Wire Wire Line + 5300 2950 5300 3200 +Connection ~ 5300 3200 +Wire Wire Line + 5350 4200 5350 3400 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 7050 2950 7050 3300 +$Comp +L PWR_FLAG #FLG01 +U 1 1 516D11A2 +P 5350 4100 +F 0 "#FLG01" H 5350 4370 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN + 1 5350 4100 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516D117B +P 7350 3300 +F 0 "U3" H 7200 3400 50 0000 C CNN +F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN + 1 7350 3300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG02" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2950 +F 0 "U2" H 5400 3050 50 0000 C CNN +F 1 "IPLOT" H 5700 3050 50 0000 C CNN + 1 5550 2950 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6150 2950 +F 0 "R2" V 6230 2950 50 0000 C CNN +F 1 "9000" V 6150 2950 50 0000 C CNN + 1 6150 2950 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR03" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "1000" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir new file mode 100644 index 0000000..cbcca2f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir @@ -0,0 +1,16 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 17 April 2013 12:50:50 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +R3 6 0 1000 +v1 5 0 SINE +U3 6 VPLOT8_1 +U1 4 2 IPLOT +U2 2 3 IPLOT +R2 6 3 9000 +R1 4 5 1000 +X1 2 0 6 UA741 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.ckt new file mode 100644 index 0000000..6843d47 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.ckt @@ -0,0 +1,17 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 17 april 2013 12:50:50 pm ist +.include ua741.sub + +r3 6 0 1000 +v1 5 0 sine(0 5 50 0 0) +* Plotting option vplot8_1 +V_u1 4 2 0 +V_u2 2 3 0 +r2 6 3 9000 +r1 4 5 1000 +x1 2 0 6 ua741 + +.tran 10e-03 20e-03 0e-00 +.plot v(6) +.plot i(V_u1) +.plot i(V_u2) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.out new file mode 100644 index 0000000..9e60789 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.out @@ -0,0 +1,22 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 17 april 2013 12:50:50 pm ist +.include ua741.sub + +r3 6 0 1000 +v1 5 0 sine(0 5 50 0 0) +* Plotting option vplot8_1 +V_u1 4 2 0 +V_u2 2 3 0 +r2 6 3 9000 +r1 4 5 1000 +x1 2 0 6 ua741 + +.tran 10e-03 20e-03 0e-00 + +* Control Statements +.control +run +plot v(6) +plot i(V_u1) +plot i(V_u2) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.pro new file mode 100644 index 0000000..816fec2 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.pro @@ -0,0 +1,74 @@ +update=Wednesday 17 April 2013 11:37:31 AM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.proj b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.proj new file mode 100644 index 0000000..8554126 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.proj @@ -0,0 +1 @@ +schematicFile example_5.6.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.sch new file mode 100644 index 0000000..73864f6 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.sch @@ -0,0 +1,183 @@ +EESchema Schematic File Version 2 date Wednesday 17 April 2013 12:50:53 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.6-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 4050 4100 7050 4100 +Wire Wire Line + 7050 4100 7050 4000 +Wire Wire Line + 7050 3300 6350 3300 +Wire Wire Line + 6400 2950 7050 2950 +Connection ~ 7050 3300 +Connection ~ 6350 3300 +Connection ~ 5350 4100 +Wire Wire Line + 4150 3200 4050 3200 +Wire Wire Line + 5900 2950 5800 2950 +Wire Wire Line + 5350 3200 5250 3200 +Wire Wire Line + 5300 2950 5300 3200 +Connection ~ 5300 3200 +Wire Wire Line + 5350 4200 5350 3400 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 7050 2950 7050 3500 +$Comp +L R R3 +U 1 1 516E4D07 +P 7050 3750 +F 0 "R3" V 7130 3750 50 0000 C CNN +F 1 "1000" V 7050 3750 50 0000 C CNN + 1 7050 3750 + 1 0 0 -1 +$EndComp +$Comp +L SINE v1 +U 1 1 516E3BC9 +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "SINE" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 516D11A2 +P 5350 4100 +F 0 "#FLG01" H 5350 4370 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN + 1 5350 4100 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516D117B +P 7350 3300 +F 0 "U3" H 7200 3400 50 0000 C CNN +F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN + 1 7350 3300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG02" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2950 +F 0 "U2" H 5400 3050 50 0000 C CNN +F 1 "IPLOT" H 5700 3050 50 0000 C CNN + 1 5550 2950 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6150 2950 +F 0 "R2" V 6230 2950 50 0000 C CNN +F 1 "9000" V 6150 2950 50 0000 C CNN + 1 6150 2950 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR03" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "1000" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.pro new file mode 100644 index 0000000..2405944 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.pro @@ -0,0 +1,82 @@ +update=Wednesday 17 April 2013 12:51:39 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice +LibName39=/home/holy/FreeEDA/library/analogSpice +LibName40=/home/holy/FreeEDA/library/analogXSpice +LibName41=/home/holy/FreeEDA/library/convergenceAidSpice +LibName42=/home/holy/FreeEDA/library/converterSpice +LibName43=/home/holy/FreeEDA/library/digitalSpice +LibName44=/home/holy/FreeEDA/library/digitalXSpice +LibName45=/home/holy/FreeEDA/library/linearSpice +LibName46=/home/holy/FreeEDA/library/measurementSpice +LibName47=/home/holy/FreeEDA/library/portSpice +LibName48=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.sub b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.sub new file mode 100644 index 0000000..1edba9f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.6/ua741.sub @@ -0,0 +1,11 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 + +.ends ua741 \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/analysis b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/analysis new file mode 100644 index 0000000..234e759 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/analysis @@ -0,0 +1,8 @@ + +.ac lin 10 1Hz 1Meg + + +.end +.control +run +.endc diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.bak new file mode 100644 index 0000000..bef6862 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.bak @@ -0,0 +1,127 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 10:40:53 PM IST +#encoding utf-8 +# +# AC +# +DEF AC AC 0 40 Y Y 1 F N +F0 "AC" -200 100 60 H V C CNN +F1 "AC" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.lib new file mode 100644 index 0000000..a99ee60 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.lib @@ -0,0 +1,127 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 10:41:23 PM IST +#encoding utf-8 +# +# AC +# +DEF AC AC 0 40 Y Y 1 F N +F0 "AC" -200 100 60 H V C CNN +F1 "AC" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.bak new file mode 100644 index 0000000..5b65555 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.bak @@ -0,0 +1,210 @@ +EESchema Schematic File Version 2 date Wednesday 15 May 2013 10:40:53 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.7-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L AC AC1 +U 1 1 5193C186 +P 4050 3650 +F 0 "AC1" H 3850 3750 60 0000 C CNN +F 1 "AC" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7050 3500 7050 2950 +Connection ~ 6500 2950 +Wire Wire Line + 6500 2950 6500 2550 +Wire Wire Line + 6500 2550 6300 2550 +Connection ~ 5300 2950 +Wire Wire Line + 5300 2550 5300 3200 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 5350 4200 5350 3400 +Connection ~ 5300 3200 +Wire Wire Line + 5350 3200 5250 3200 +Wire Wire Line + 5900 2950 5800 2950 +Wire Wire Line + 4150 3200 4050 3200 +Connection ~ 5350 4100 +Connection ~ 6350 3300 +Connection ~ 7050 3300 +Wire Wire Line + 7050 2950 6400 2950 +Wire Wire Line + 6350 3300 7050 3300 +Wire Wire Line + 5800 2550 5900 2550 +Wire Wire Line + 4050 4100 7050 4100 +Wire Wire Line + 7050 4100 7050 4000 +Connection ~ 7050 3400 +$Comp +L R R3 +U 1 1 516E71B7 +P 7050 3750 +F 0 "R3" V 7130 3750 50 0000 C CNN +F 1 "R" V 7050 3750 50 0000 C CNN + 1 7050 3750 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG2 +U 1 1 516E6E61 +P 5350 4100 +F 0 "#FLG2" H 5350 4370 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN + 1 5350 4100 + -1 0 0 1 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516E6E43 +P 7350 3400 +F 0 "U3" H 7200 3500 50 0000 C CNN +F 1 "VPLOT8_1" H 7500 3500 50 0000 C CNN + 1 7350 3400 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG1 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG1" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L C C1 +U 1 1 516E6B62 +P 6100 2550 +F 0 "C1" H 6150 2650 50 0000 L CNN +F 1 "1.59n" H 6150 2450 50 0000 L CNN + 1 6100 2550 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516E6B56 +P 5550 2550 +F 0 "U4" H 5400 2650 50 0000 C CNN +F 1 "IPLOT" H 5700 2650 50 0000 C CNN + 1 5550 2550 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2950 +F 0 "U2" H 5400 3050 50 0000 C CNN +F 1 "IPLOT" H 5700 3050 50 0000 C CNN + 1 5550 2950 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6150 2950 +F 0 "R2" V 6230 2950 50 0000 C CNN +F 1 "10000" V 6150 2950 50 0000 C CNN + 1 6150 2950 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR1 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR1" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "1000" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir new file mode 100644 index 0000000..944330f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir @@ -0,0 +1,18 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 15 May 2013 10:41:20 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v1 6 0 AC +R3 7 0 R +U3 7 VPLOT8_1 +C1 7 3 1.59n +U4 1 3 IPLOT +U1 5 1 IPLOT +U2 1 4 IPLOT +R2 7 4 10000 +R1 5 6 1000 +X1 1 0 7 UA741 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.ckt new file mode 100644 index 0000000..28de072 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.ckt @@ -0,0 +1,20 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 10:41:20 pm ist +.include ua741.sub + +v1 6 0 ac 1 +r3 7 0 r +* Plotting option vplot8_1 +c1 7 3 1.59n +V_u4 1 3 0 +V_u1 5 1 0 +V_u2 1 4 0 +r2 7 4 10000 +r1 5 6 1000 +x1 1 0 7 ua741 + +.ac lin 10 1Hz 1Meg +.plot v(7) +.plot i(V_u4) +.plot i(V_u1) +.plot i(V_u2) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.out new file mode 100644 index 0000000..9002bf8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.out @@ -0,0 +1,25 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 10:41:20 pm ist +.include ua741.sub + +v1 6 0 ac 1 +r3 7 0 r +* Plotting option vplot8_1 +c1 7 3 1.59n +V_u4 1 3 0 +V_u1 5 1 0 +V_u2 1 4 0 +r2 7 4 10000 +r1 5 6 1000 +x1 1 0 7 ua741 + +.ac lin 10 1Hz 1Meg + +* Control Statements +.control +run +plot v(7) +plot i(V_u4) +plot i(V_u1) +plot i(V_u2) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.pro new file mode 100644 index 0000000..e47c1e4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.pro @@ -0,0 +1,74 @@ +update=Wednesday 17 April 2013 12:56:50 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.proj b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.proj new file mode 100644 index 0000000..304c734 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.proj @@ -0,0 +1 @@ +schematicFile example_5.7.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.sch new file mode 100644 index 0000000..d7677e1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.sch @@ -0,0 +1,210 @@ +EESchema Schematic File Version 2 date Wednesday 15 May 2013 10:41:23 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.7-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "15 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L AC v1 +U 1 1 5193C186 +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "AC" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7050 3500 7050 2950 +Connection ~ 6500 2950 +Wire Wire Line + 6500 2950 6500 2550 +Wire Wire Line + 6500 2550 6300 2550 +Connection ~ 5300 2950 +Wire Wire Line + 5300 2550 5300 3200 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 5350 4200 5350 3400 +Connection ~ 5300 3200 +Wire Wire Line + 5350 3200 5250 3200 +Wire Wire Line + 5900 2950 5800 2950 +Wire Wire Line + 4150 3200 4050 3200 +Connection ~ 5350 4100 +Connection ~ 6350 3300 +Connection ~ 7050 3300 +Wire Wire Line + 7050 2950 6400 2950 +Wire Wire Line + 6350 3300 7050 3300 +Wire Wire Line + 5800 2550 5900 2550 +Wire Wire Line + 4050 4100 7050 4100 +Wire Wire Line + 7050 4100 7050 4000 +Connection ~ 7050 3400 +$Comp +L R R3 +U 1 1 516E71B7 +P 7050 3750 +F 0 "R3" V 7130 3750 50 0000 C CNN +F 1 "R" V 7050 3750 50 0000 C CNN + 1 7050 3750 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 516E6E61 +P 5350 4100 +F 0 "#FLG01" H 5350 4370 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN + 1 5350 4100 + -1 0 0 1 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516E6E43 +P 7350 3400 +F 0 "U3" H 7200 3500 50 0000 C CNN +F 1 "VPLOT8_1" H 7500 3500 50 0000 C CNN + 1 7350 3400 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG02" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L C C1 +U 1 1 516E6B62 +P 6100 2550 +F 0 "C1" H 6150 2650 50 0000 L CNN +F 1 "1.59n" H 6150 2450 50 0000 L CNN + 1 6100 2550 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516E6B56 +P 5550 2550 +F 0 "U4" H 5400 2650 50 0000 C CNN +F 1 "IPLOT" H 5700 2650 50 0000 C CNN + 1 5550 2550 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2950 +F 0 "U2" H 5400 3050 50 0000 C CNN +F 1 "IPLOT" H 5700 3050 50 0000 C CNN + 1 5550 2950 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6150 2950 +F 0 "R2" V 6230 2950 50 0000 C CNN +F 1 "10000" V 6150 2950 50 0000 C CNN + 1 6150 2950 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR03" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "1000" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.pro new file mode 100644 index 0000000..5dbb81a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.pro @@ -0,0 +1,72 @@ +update=Monday 17 December 2012 06:14:06 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.sub b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.sub new file mode 100644 index 0000000..1edba9f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.7/ua741.sub @@ -0,0 +1,11 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 + +.ends ua741 \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/analysis b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/analysis new file mode 100644 index 0000000..64c6d69 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/analysis @@ -0,0 +1 @@ +.tran 1e-03 2e-03 0e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.1.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.1.sch new file mode 100644 index 0000000..d6f19aa --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.1.sch @@ -0,0 +1,172 @@ +EESchema Schematic File Version 2 date Wednesday 17 April 2013 05:15:51 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5350 4100 4050 4100 +Wire Wire Line + 6350 3300 7050 3300 +Wire Wire Line + 6400 2950 7050 2950 +Connection ~ 7050 3300 +Connection ~ 6350 3300 +Connection ~ 5350 4100 +Wire Wire Line + 4150 3200 4050 3200 +Wire Wire Line + 5900 2950 5800 2950 +Wire Wire Line + 5350 3200 5250 3200 +Wire Wire Line + 5300 2950 5300 3200 +Connection ~ 5300 3200 +Wire Wire Line + 5350 4200 5350 3400 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 7050 2950 7050 3300 +$Comp +L SINE v1 +U 1 1 516E3AE9 +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "SINE" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 516D11A2 +P 5350 4100 +F 0 "#FLG01" H 5350 4370 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN + 1 5350 4100 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516D117B +P 7350 3300 +F 0 "U3" H 7200 3400 50 0000 C CNN +F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN + 1 7350 3300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG02" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2950 +F 0 "U2" H 5400 3050 50 0000 C CNN +F 1 "IPLOT" H 5700 3050 50 0000 C CNN + 1 5550 2950 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6150 2950 +F 0 "R2" V 6230 2950 50 0000 C CNN +F 1 "10000" V 6150 2950 50 0000 C CNN + 1 6150 2950 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR03 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR03" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "1000" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8-cache.bak new file mode 100644 index 0000000..969d8ac --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8-cache.bak @@ -0,0 +1,157 @@ +EESchema-LIBRARY Version 2.3 Date: Thursday 18 April 2013 09:19:41 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8 +# +DEF vplot8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8-cache.lib new file mode 100644 index 0000000..32852ba --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8-cache.lib @@ -0,0 +1,157 @@ +EESchema-LIBRARY Version 2.3 Date: Thursday 18 April 2013 10:25:50 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8 +# +DEF vplot8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.bak new file mode 100644 index 0000000..a102621 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.bak @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Thursday 18 April 2013 09:19:41 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.8-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "18 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 3300 3700 3300 4300 +Wire Wire Line + 3300 3100 3300 2850 +Wire Wire Line + 3300 2850 4200 2850 +Wire Wire Line + 4200 2850 4200 3200 +Wire Wire Line + 5800 2600 5900 2600 +Wire Wire Line + 4050 4100 5350 4100 +Wire Wire Line + 6350 3300 7050 3300 +Wire Wire Line + 7050 2950 6400 2950 +Connection ~ 7050 3300 +Connection ~ 6350 3300 +Connection ~ 5350 4100 +Wire Wire Line + 4150 3200 4050 3200 +Wire Wire Line + 5900 2950 5800 2950 +Wire Wire Line + 5250 3200 5350 3200 +Connection ~ 5300 3200 +Wire Wire Line + 5350 3400 5350 4200 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 5300 3200 5300 2600 +Connection ~ 5300 2950 +Wire Wire Line + 6300 2600 7050 2600 +Wire Wire Line + 7050 2600 7050 3300 +Connection ~ 7050 2950 +Connection ~ 4100 3200 +Wire Wire Line + 4250 4100 4250 4300 +Connection ~ 4250 4100 +Wire Wire Line + 4250 4300 3300 4300 +$Comp +L VPLOT8 U5 +U 1 1 516F6D28 +P 3300 3400 +F 0 "U5" H 3150 3500 50 0000 C CNN +F 1 "VPLOT8" H 3450 3500 50 0000 C CNN + 1 3300 3400 + 0 1 1 0 +$EndComp +$Comp +L PULSE v1 +U 1 1 516E8CD4 +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "PULSE" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +$Comp +L C C1 +U 1 1 516E8BE7 +P 6100 2600 +F 0 "C1" H 6150 2700 50 0000 L CNN +F 1 "10n" H 6150 2500 50 0000 L CNN + 1 6100 2600 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516E8BCF +P 5550 2600 +F 0 "U4" H 5400 2700 50 0000 C CNN +F 1 "IPLOT" H 5700 2700 50 0000 C CNN + 1 5550 2600 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG2 +U 1 1 516D11A2 +P 5350 4100 +F 0 "#FLG2" H 5350 4370 30 0001 C CNN +F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN + 1 5350 4100 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516D117B +P 7350 3300 +F 0 "U3" H 7200 3400 50 0000 C CNN +F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN + 1 7350 3300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG1 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG1" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2950 +F 0 "U2" H 5400 3050 50 0000 C CNN +F 1 "IPLOT" H 5700 3050 50 0000 C CNN + 1 5550 2950 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6150 2950 +F 0 "R2" V 6230 2950 50 0000 C CNN +F 1 "1000000" V 6150 2950 50 0000 C CNN + 1 6150 2950 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR1 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR1" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "10000" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir new file mode 100644 index 0000000..b53502b --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir @@ -0,0 +1,18 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 18 April 2013 10:25:46 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U5 5 0 VPLOT8 +v1 5 0 PULSE +C1 6 1 10n +U4 2 1 IPLOT +U3 6 VPLOT8_1 +U1 4 2 IPLOT +U2 2 3 IPLOT +R2 6 3 1000000 +R1 4 5 10000 +X1 2 0 6 UA741 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.ckt new file mode 100644 index 0000000..63570ef --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.ckt @@ -0,0 +1,20 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 18 april 2013 10:25:46 am ist +.include ua741.sub + +v1 5 0 pulse(1 0 0 0 0 0.001 0.002) +c1 6 1 10n +V_u4 2 1 0 +* Plotting option vplot8_1 +V_u1 4 2 0 +V_u2 2 3 0 +r2 6 3 1000000 +r1 4 5 10000 +x1 2 0 6 ua741 + +.tran 1e-03 2e-03 0e-00 +.plot v(5) +.plot i(V_u4) +.plot v(6) +.plot i(V_u1) +.plot i(V_u2) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.out new file mode 100644 index 0000000..ed95f2f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.out @@ -0,0 +1,25 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 18 april 2013 10:25:46 am ist +.include ua741.sub + +v1 5 0 pulse(1 0 0 0 0 0.001 0.002) +c1 6 1 10n +V_u4 2 1 0 +* Plotting option vplot8_1 +V_u1 4 2 0 +V_u2 2 3 0 +r2 6 3 1000000 +r1 4 5 10000 +x1 2 0 6 ua741 + +.tran 1e-03 2e-03 0e-00 + +* Control Statements +.control +run +plot v(5) +plot i(V_u4) +plot v(6) +plot i(V_u1) +plot i(V_u2) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.pro new file mode 100644 index 0000000..84687f7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.pro @@ -0,0 +1,74 @@ +update=Wednesday 17 April 2013 05:14:42 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.proj b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.proj new file mode 100644 index 0000000..a7ce942 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.proj @@ -0,0 +1 @@ +schematicFile example_5.8.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.sch new file mode 100644 index 0000000..976a836 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.sch @@ -0,0 +1,214 @@ +EESchema Schematic File Version 2 date Thursday 18 April 2013 10:25:50 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.8-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "18 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 4100 3200 4100 2950 +Wire Wire Line + 4100 2950 4200 2950 +Wire Wire Line + 4200 2950 4200 2850 +Wire Wire Line + 4250 4300 3300 4300 +Connection ~ 4250 4100 +Wire Wire Line + 4250 4300 4250 4100 +Connection ~ 4100 3200 +Connection ~ 7050 2950 +Wire Wire Line + 7050 2600 7050 3300 +Wire Wire Line + 7050 2600 6300 2600 +Connection ~ 5300 2950 +Wire Wire Line + 5300 3200 5300 2600 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 5350 3400 5350 4200 +Connection ~ 5300 3200 +Wire Wire Line + 5250 3200 5350 3200 +Wire Wire Line + 5900 2950 5800 2950 +Wire Wire Line + 4150 3200 4050 3200 +Connection ~ 5350 4100 +Connection ~ 6350 3300 +Connection ~ 7050 3300 +Wire Wire Line + 7050 2950 6400 2950 +Wire Wire Line + 7050 3300 6350 3300 +Wire Wire Line + 4050 4100 5350 4100 +Wire Wire Line + 5800 2600 5900 2600 +Wire Wire Line + 3300 4300 3300 3700 +Wire Wire Line + 3300 3100 3300 2850 +Wire Wire Line + 3300 2850 4200 2850 +$Comp +L VPLOT8 U5 +U 1 1 516F6D28 +P 3300 3400 +F 0 "U5" H 3150 3500 50 0000 C CNN +F 1 "VPLOT8" H 3450 3500 50 0000 C CNN + 1 3300 3400 + 0 1 1 0 +$EndComp +$Comp +L PULSE v1 +U 1 1 516E8CD4 +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "PULSE" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +$Comp +L C C1 +U 1 1 516E8BE7 +P 6100 2600 +F 0 "C1" H 6150 2700 50 0000 L CNN +F 1 "10n" H 6150 2500 50 0000 L CNN + 1 6100 2600 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516E8BCF +P 5550 2600 +F 0 "U4" H 5400 2700 50 0000 C CNN +F 1 "IPLOT" H 5700 2700 50 0000 C CNN + 1 5550 2600 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516D117B +P 7350 3300 +F 0 "U3" H 7200 3400 50 0000 C CNN +F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN + 1 7350 3300 + 0 1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG01" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2950 +F 0 "U2" H 5400 3050 50 0000 C CNN +F 1 "IPLOT" H 5700 3050 50 0000 C CNN + 1 5550 2950 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6150 2950 +F 0 "R2" V 6230 2950 50 0000 C CNN +F 1 "1000000" V 6150 2950 50 0000 C CNN + 1 6150 2950 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR02" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "10000" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.pro new file mode 100644 index 0000000..5dbb81a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.pro @@ -0,0 +1,72 @@ +update=Monday 17 December 2012 06:14:06 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.sub b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.sub new file mode 100644 index 0000000..1edba9f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.8/ua741.sub @@ -0,0 +1,11 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 + +.ends ua741 \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/analysis b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/analysis new file mode 100644 index 0000000..48302a3 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/analysis @@ -0,0 +1 @@ +.tran 2e-03 4e-03 0e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir new file mode 100644 index 0000000..d30b232 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir @@ -0,0 +1,24 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 18 April 2013 10:53:39 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v1 4 0 PULSE +v2 11 0 10V +U3 8 3 VPLOT8_1 +R5 13 3 10000 +R4 0 13 10000 +R3 1 11 10000 +U5 8 2 IPLOT +Q2 1 1 2 NPN +X2 1 13 3 UA741 +U4 10 8 IPLOT +Q1 10 0 9 NPN +U1 6 7 IPLOT +U2 7 9 IPLOT +R2 8 5 10000 +R1 6 4 1000 +X1 7 0 5 UA741 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.ckt new file mode 100644 index 0000000..0decb7c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.ckt @@ -0,0 +1,27 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 18 april 2013 10:53:39 am ist +.include ua741.sub + +v1 4 0 pulse(0 1 0.002 0.004) +v2 11 0 10v +* Plotting option vplot8_1 +r5 13 3 10000 +r4 0 13 10000 +r3 1 11 10000 +V_u5 8 2 0 +q2 2 1 1 npn +x2 1 13 3 ua741 +V_u4 10 8 0 +q1 10 0 9 npn +V_u1 6 7 0 +V_u2 7 9 0 +r2 8 5 10000 +r1 6 4 1000 +x1 7 0 5 ua741 + +.tran 2e-03 4e-03 0e-00 +.plot v(8) v(3) +.plot i(V_u5) +.plot i(V_u4) +.plot i(V_u1) +.plot i(V_u2) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.out new file mode 100644 index 0000000..f4b917f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.out @@ -0,0 +1,32 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 18 april 2013 10:53:39 am ist +.include ua741.sub + +v1 4 0 pulse(0 1 0.002 0.004) +v2 11 0 10v +* Plotting option vplot8_1 +r5 13 3 10000 +r4 0 13 10000 +r3 1 11 10000 +V_u5 8 2 0 +q2 2 1 1 npn +x2 1 13 3 ua741 +V_u4 10 8 0 +q1 10 0 9 npn +V_u1 6 7 0 +V_u2 7 9 0 +r2 8 5 10000 +r1 6 4 1000 +x1 7 0 5 ua741 + +.tran 2e-03 4e-03 0e-00 + +* Control Statements +.control +run +plot v(8) v(3) +plot i(V_u5) +plot i(V_u4) +plot i(V_u1) +plot i(V_u2) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.pro new file mode 100644 index 0000000..9833fef --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.pro @@ -0,0 +1,74 @@ +update=Thursday 18 April 2013 10:31:10 AM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.proj b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.proj new file mode 100644 index 0000000..da8b8d1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.proj @@ -0,0 +1 @@ +schematicFile example_5.9.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.sch new file mode 100644 index 0000000..481506c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.sch @@ -0,0 +1,324 @@ +EESchema Schematic File Version 2 date Thursday 18 April 2013 10:52:19 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_5.1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "18 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L GND #PWR01 +U 1 1 516F8096 +P 6150 2850 +F 0 "#PWR01" H 6150 2850 30 0001 C CNN +F 1 "GND" H 6150 2780 30 0001 C CNN + 1 6150 2850 + 1 0 0 -1 +$EndComp +Connection ~ 6150 2750 +$Comp +L PWR_FLAG #FLG02 +U 1 1 516F807F +P 6150 2750 +F 0 "#FLG02" H 6150 3020 30 0001 C CNN +F 1 "PWR_FLAG" H 6150 2980 30 0000 C CNN + 1 6150 2750 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 6150 2700 6150 2850 +Wire Wire Line + 10200 3750 10200 5050 +Wire Wire Line + 10200 2850 10200 2400 +Wire Wire Line + 10200 2400 8100 2400 +Wire Wire Line + 9250 3700 9400 3700 +Wire Wire Line + 8250 3800 8250 4100 +Connection ~ 8100 3300 +Wire Wire Line + 8100 3050 8100 3600 +Wire Wire Line + 7900 3600 8250 3600 +Wire Wire Line + 7150 3300 6950 3300 +Wire Wire Line + 6350 2400 6400 2400 +Wire Wire Line + 5300 2400 5300 3200 +Wire Wire Line + 6350 3300 6450 3300 +Wire Wire Line + 4750 3200 4650 3200 +Wire Wire Line + 5350 4200 5350 3400 +Connection ~ 5300 3200 +Wire Wire Line + 5350 3200 5250 3200 +Wire Wire Line + 4150 3200 4050 3200 +Connection ~ 5350 4100 +Connection ~ 6350 3300 +Connection ~ 7050 3300 +Wire Wire Line + 5350 4100 4050 4100 +Wire Wire Line + 5800 2400 5950 2400 +Wire Wire Line + 6900 2400 7050 2400 +Wire Wire Line + 7050 2400 7050 3300 +Wire Wire Line + 7650 3300 7700 3300 +Connection ~ 8100 3600 +Wire Wire Line + 8100 2400 8100 2550 +Wire Wire Line + 8250 4000 8450 4000 +Connection ~ 8250 4000 +Wire Wire Line + 9300 3700 9300 4000 +Wire Wire Line + 9300 4000 8950 4000 +Connection ~ 9300 3700 +Connection ~ 9400 3700 +Connection ~ 8100 2400 +Wire Wire Line + 10200 5050 8250 5050 +Wire Wire Line + 8250 5250 8250 4600 +Connection ~ 8250 5050 +Connection ~ 8250 5150 +$Comp +L GND #PWR03 +U 1 1 516F8034 +P 8250 5250 +F 0 "#PWR03" H 8250 5250 30 0001 C CNN +F 1 "GND" H 8250 5180 30 0001 C CNN + 1 8250 5250 + 1 0 0 -1 +$EndComp +$Comp +L PULSE v1 +U 1 1 516F801F +P 4050 3650 +F 0 "v1" H 3850 3750 60 0000 C CNN +F 1 "PULSE" H 3850 3600 60 0000 C CNN +F 2 "R1" H 3750 3650 60 0000 C CNN + 1 4050 3650 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 516F7FED +P 10200 3300 +F 0 "v2" H 10000 3400 60 0000 C CNN +F 1 "10V" H 10000 3250 60 0000 C CNN +F 2 "R1" H 9900 3300 60 0000 C CNN + 1 10200 3300 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U3 +U 2 1 516F7F85 +P 9400 4000 +F 0 "U3" H 9250 4100 50 0000 C CNN +F 1 "VPLOT8_1" H 9550 4100 50 0000 C CNN + 2 9400 4000 + -1 0 0 1 +$EndComp +$Comp +L R R5 +U 1 1 516F7F66 +P 8700 4000 +F 0 "R5" V 8780 4000 50 0000 C CNN +F 1 "10000" V 8700 4000 50 0000 C CNN + 1 8700 4000 + 0 -1 -1 0 +$EndComp +$Comp +L R R4 +U 1 1 516F7F56 +P 8250 4350 +F 0 "R4" V 8330 4350 50 0000 C CNN +F 1 "10000" V 8250 4350 50 0000 C CNN + 1 8250 4350 + -1 0 0 1 +$EndComp +$Comp +L R R3 +U 1 1 516F7F35 +P 8100 2800 +F 0 "R3" V 8180 2800 50 0000 C CNN +F 1 "10000" V 8100 2800 50 0000 C CNN + 1 8100 2800 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U5 +U 1 1 516F7EEB +P 7400 3300 +F 0 "U5" H 7250 3400 50 0000 C CNN +F 1 "IPLOT" H 7550 3400 50 0000 C CNN + 1 7400 3300 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q2 +U 1 1 516F7EDC +P 7900 3400 +F 0 "Q2" H 7900 3250 50 0000 R CNN +F 1 "NPN" H 7900 3550 50 0000 R CNN + 1 7900 3400 + 0 -1 -1 0 +$EndComp +$Comp +L UA741 X2 +U 1 1 516F7ED1 +P 8750 3700 +F 0 "X2" H 8900 3850 60 0000 C CNN +F 1 "UA741" H 8900 3950 60 0000 C CNN + 1 8750 3700 + 1 0 0 1 +$EndComp +$Comp +L IPLOT U4 +U 1 1 516F7EB1 +P 6650 2400 +F 0 "U4" H 6500 2500 50 0000 C CNN +F 1 "IPLOT" H 6800 2500 50 0000 C CNN + 1 6650 2400 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 516F7E9D +P 6150 2500 +F 0 "Q1" H 6150 2350 50 0000 R CNN +F 1 "NPN" H 6150 2650 50 0000 R CNN + 1 6150 2500 + 0 -1 -1 0 +$EndComp +$Comp +L VPLOT8_1 U3 +U 1 1 516D117B +P 7050 3600 +F 0 "U3" H 6900 3700 50 0000 C CNN +F 1 "VPLOT8_1" H 7200 3700 50 0000 C CNN + 1 7050 3600 + -1 0 0 1 +$EndComp +$Comp +L PWR_FLAG #FLG04 +U 1 1 516D1102 +P 5300 3200 +F 0 "#FLG04" H 5300 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN + 1 5300 3200 + -1 0 0 1 +$EndComp +$Comp +L IPLOT U1 +U 1 1 516D1019 +P 5000 3200 +F 0 "U1" H 4850 3300 50 0000 C CNN +F 1 "IPLOT" H 5150 3300 50 0000 C CNN + 1 5000 3200 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U2 +U 1 1 516D0FEC +P 5550 2400 +F 0 "U2" H 5400 2500 50 0000 C CNN +F 1 "IPLOT" H 5700 2500 50 0000 C CNN + 1 5550 2400 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 516D0FE2 +P 6700 3300 +F 0 "R2" V 6780 3300 50 0000 C CNN +F 1 "10000" V 6700 3300 50 0000 C CNN + 1 6700 3300 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR05 +U 1 1 516D0F6B +P 5350 4200 +F 0 "#PWR05" H 5350 4200 30 0001 C CNN +F 1 "GND" H 5350 4130 30 0001 C CNN + 1 5350 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 516D0F10 +P 4400 3200 +F 0 "R1" V 4480 3200 50 0000 C CNN +F 1 "1000" V 4400 3200 50 0000 C CNN + 1 4400 3200 + 0 1 1 0 +$EndComp +$Comp +L UA741 X1 +U 1 1 516D0E60 +P 5850 3300 +F 0 "X1" H 6000 3450 60 0000 C CNN +F 1 "UA741" H 6000 3550 60 0000 C CNN + 1 5850 3300 + 1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.bak b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.out b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.pro b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.pro new file mode 100644 index 0000000..65cc477 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.pro @@ -0,0 +1,82 @@ +update=Thursday 18 April 2013 01:48:22 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice +LibName39=/home/holy/FreeEDA/library/analogSpice +LibName40=/home/holy/FreeEDA/library/analogXSpice +LibName41=/home/holy/FreeEDA/library/convergenceAidSpice +LibName42=/home/holy/FreeEDA/library/converterSpice +LibName43=/home/holy/FreeEDA/library/digitalSpice +LibName44=/home/holy/FreeEDA/library/digitalXSpice +LibName45=/home/holy/FreeEDA/library/linearSpice +LibName46=/home/holy/FreeEDA/library/measurementSpice +LibName47=/home/holy/FreeEDA/library/portSpice +LibName48=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.sch b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.sub b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.sub new file mode 100644 index 0000000..1edba9f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_5/example_5.9/ua741.sub @@ -0,0 +1,11 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 + +.ends ua741 \ No newline at end of file diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/analysis b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/analysis new file mode 100644 index 0000000..0e8f996 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/analysis @@ -0,0 +1 @@ +.tran 2e-03 20e-03 0e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.bak new file mode 100644 index 0000000..6284625 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.bak @@ -0,0 +1,98 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 22 April 2013 12:05:40 PM IST +#encoding utf-8 +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.lib new file mode 100644 index 0000000..388a263 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.lib @@ -0,0 +1,98 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 22 April 2013 12:09:56 PM IST +#encoding utf-8 +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.bak b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.bak new file mode 100644 index 0000000..cc13116 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.bak @@ -0,0 +1,231 @@ +EESchema Schematic File Version 2 date Monday 22 April 2013 12:05:40 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_7.1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "22 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 1050 3250 +$Comp +L VPLOT8_1 U2 +U 1 1 5174D971 +P 1050 2950 +F 0 "U2" H 900 3050 50 0000 C CNN +F 1 "VPLOT8_1" H 1200 3050 50 0000 C CNN + 1 1050 2950 + 1 0 0 -1 +$EndComp +Connection ~ 2950 3200 +$Comp +L PWR_FLAG #FLG01 +U 1 1 5174D14C +P 2050 5350 +F 0 "#FLG01" H 2050 5620 30 0001 C CNN +F 1 "PWR_FLAG" H 2050 5580 30 0000 C CNN + 1 2050 5350 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 5174D02B +P 2950 2900 +F 0 "U1" H 2800 3000 50 0000 C CNN +F 1 "VPLOT8_1" H 3100 3000 50 0000 C CNN + 2 2950 2900 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 5174D021 +P 2050 2900 +F 0 "U1" H 1900 3000 50 0000 C CNN +F 1 "VPLOT8_1" H 2200 3000 50 0000 C CNN + 1 2050 2900 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 3 1 5174D010 +P 4050 2900 +F 0 "U1" H 3900 3000 50 0000 C CNN +F 1 "VPLOT8_1" H 4200 3000 50 0000 C CNN + 3 4050 2900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5174CFD9 +P 2050 5500 +F 0 "#PWR02" H 2050 5500 30 0001 C CNN +F 1 "GND" H 2050 5430 30 0001 C CNN + 1 2050 5500 + 1 0 0 -1 +$EndComp +Connection ~ 2750 5350 +Wire Wire Line + 2750 3950 2750 5350 +Connection ~ 2050 5350 +Wire Wire Line + 1050 4200 1050 5350 +Connection ~ 2050 4600 +Wire Wire Line + 2050 4800 2050 4000 +Wire Wire Line + 3650 4600 3800 4600 +Connection ~ 3800 3200 +Wire Wire Line + 3800 4600 3800 3200 +Connection ~ 4050 3200 +Wire Wire Line + 4050 3200 4050 3350 +Wire Wire Line + 2050 4200 2500 4200 +Connection ~ 2050 4200 +Wire Wire Line + 2500 4200 2500 3700 +Wire Wire Line + 1050 3200 1050 3300 +Wire Wire Line + 2050 3200 2050 3500 +Wire Wire Line + 1550 3200 2500 3200 +Wire Wire Line + 2500 3200 2500 3600 +Connection ~ 2050 3200 +Wire Wire Line + 2750 3350 2750 3200 +Wire Wire Line + 2750 3200 3100 3200 +Wire Wire Line + 3600 3200 4250 3200 +Wire Wire Line + 2050 4600 3150 4600 +Wire Wire Line + 2050 5300 2050 5500 +Wire Wire Line + 4050 3850 4050 5350 +Wire Wire Line + 4050 5350 1050 5350 +$Comp +L R R3 +U 1 1 5174CF9E +P 2050 5050 +F 0 "R3" V 2130 5050 50 0000 C CNN +F 1 "1000" V 2050 5050 50 0000 C CNN + 1 2050 5050 + -1 0 0 1 +$EndComp +$Comp +L R R5 +U 1 1 5174CF7E +P 3400 4600 +F 0 "R5" V 3480 4600 50 0000 C CNN +F 1 "100000" V 3400 4600 50 0000 C CNN + 1 3400 4600 + 0 1 1 0 +$EndComp +$Comp +L R R6 +U 1 1 5174CF4D +P 4050 3600 +F 0 "R6" V 4130 3600 50 0000 C CNN +F 1 "2000" V 4050 3600 50 0000 C CNN + 1 4050 3600 + -1 0 0 1 +$EndComp +$Comp +L R R4 +U 1 1 5174CF16 +P 3350 3200 +F 0 "R4" V 3430 3200 50 0000 C CNN +F 1 "1000" V 3350 3200 50 0000 C CNN + 1 3350 3200 + 0 1 1 0 +$EndComp +$Comp +L VCVS E1 +U 1 1 5174CEE8 +P 2700 3650 +F 0 "E1" H 2500 3750 50 0000 C CNN +F 1 "10000" H 2500 3600 50 0000 C CNN + 1 2700 3650 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 5174CEC2 +P 2050 3750 +F 0 "R2" V 2130 3750 50 0000 C CNN +F 1 "100000" V 2050 3750 50 0000 C CNN + 1 2050 3750 + -1 0 0 1 +$EndComp +$Comp +L SINE v1 +U 1 1 5174CE88 +P 1050 3750 +F 0 "v1" H 850 3850 60 0000 C CNN +F 1 "SINE" H 850 3700 60 0000 C CNN +F 2 "R1" H 750 3750 60 0000 C CNN + 1 1050 3750 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5174CE5E +P 1300 3200 +F 0 "R1" V 1380 3200 50 0000 C CNN +F 1 "10000" V 1300 3200 50 0000 C CNN + 1 1300 3200 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir new file mode 100644 index 0000000..c73ab3c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir @@ -0,0 +1,18 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 22 April 2013 12:19:08 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +XU2 1 VPLOT8_1 +XU1 4 3 5 VPLOT8_1 +R3 0 6 1000 +R5 5 6 100000 +R6 0 5 2000 +R4 5 3 1000 +E1 3 0 4 6 2 +R2 6 4 100000 +v1 1 0 SINE +R1 4 1 10000 + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir.ckt new file mode 100644 index 0000000..9a79ca6 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir.ckt @@ -0,0 +1,17 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 22 april 2013 12:09:21 pm ist + +* Plotting option vplot8_1 +* Plotting option vplot8_1 +r3 0 6 1000 +r5 5 6 100000 +r6 0 5 2000 +r4 5 3 1000 +e1 3 0 4 6 2 +r2 6 4 100000 +v1 1 0 sine(0 5 50 0 0) +r1 4 1 10000 + +.tran 2e-03 20e-03 0e-00 +.plot v(1) +.plot v(4) v(3) v(5) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir.out b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir.out new file mode 100644 index 0000000..222f9bd --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir.out @@ -0,0 +1,22 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 22 april 2013 12:09:21 pm ist + +* Plotting option vplot8_1 +* Plotting option vplot8_1 +r3 0 6 1000 +r5 5 6 100000 +r6 0 5 2000 +r4 5 3 1000 +e1 3 0 4 6 2 +r2 6 4 100000 +v1 1 0 sine(0 5 50 0 0) +r1 4 1 10000 + +.tran 2e-03 20e-03 0e-00 + +* Control Statements +.control +run +plot v(1) +plot v(4) v(3) v(5) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.pro b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.pro new file mode 100644 index 0000000..15d76f9 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.pro @@ -0,0 +1,74 @@ +update=Monday 22 April 2013 11:14:03 AM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.proj b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.proj new file mode 100644 index 0000000..dafbe48 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.proj @@ -0,0 +1 @@ +schematicFile example_7.1.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.sch b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.sch new file mode 100644 index 0000000..7980439 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.sch @@ -0,0 +1,231 @@ +EESchema Schematic File Version 2 date Monday 22 April 2013 12:09:56 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_7.1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "22 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 1050 3250 +$Comp +L VPLOT8_1 U2 +U 1 1 5174D971 +P 1050 2950 +F 0 "U2" H 900 3050 50 0000 C CNN +F 1 "VPLOT8_1" H 1200 3050 50 0000 C CNN + 1 1050 2950 + 1 0 0 -1 +$EndComp +Connection ~ 2950 3200 +$Comp +L PWR_FLAG #FLG01 +U 1 1 5174D14C +P 2050 5350 +F 0 "#FLG01" H 2050 5620 30 0001 C CNN +F 1 "PWR_FLAG" H 2050 5580 30 0000 C CNN + 1 2050 5350 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 2 1 5174D02B +P 2950 2900 +F 0 "U1" H 2800 3000 50 0000 C CNN +F 1 "VPLOT8_1" H 3100 3000 50 0000 C CNN + 2 2950 2900 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 5174D021 +P 2050 2900 +F 0 "U1" H 1900 3000 50 0000 C CNN +F 1 "VPLOT8_1" H 2200 3000 50 0000 C CNN + 1 2050 2900 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 3 1 5174D010 +P 4050 2900 +F 0 "U1" H 3900 3000 50 0000 C CNN +F 1 "VPLOT8_1" H 4200 3000 50 0000 C CNN + 3 4050 2900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5174CFD9 +P 2050 5500 +F 0 "#PWR02" H 2050 5500 30 0001 C CNN +F 1 "GND" H 2050 5430 30 0001 C CNN + 1 2050 5500 + 1 0 0 -1 +$EndComp +Connection ~ 2750 5350 +Wire Wire Line + 2750 3950 2750 5350 +Connection ~ 2050 5350 +Wire Wire Line + 1050 4200 1050 5350 +Connection ~ 2050 4600 +Wire Wire Line + 2050 4800 2050 4000 +Wire Wire Line + 3650 4600 3800 4600 +Connection ~ 3800 3200 +Wire Wire Line + 3800 4600 3800 3200 +Connection ~ 4050 3200 +Wire Wire Line + 4050 3200 4050 3350 +Wire Wire Line + 2050 4200 2500 4200 +Connection ~ 2050 4200 +Wire Wire Line + 2500 4200 2500 3700 +Wire Wire Line + 1050 3200 1050 3300 +Wire Wire Line + 2050 3200 2050 3500 +Wire Wire Line + 1550 3200 2500 3200 +Wire Wire Line + 2500 3200 2500 3600 +Connection ~ 2050 3200 +Wire Wire Line + 2750 3350 2750 3200 +Wire Wire Line + 2750 3200 3100 3200 +Wire Wire Line + 3600 3200 4250 3200 +Wire Wire Line + 2050 4600 3150 4600 +Wire Wire Line + 2050 5300 2050 5500 +Wire Wire Line + 4050 3850 4050 5350 +Wire Wire Line + 4050 5350 1050 5350 +$Comp +L R R3 +U 1 1 5174CF9E +P 2050 5050 +F 0 "R3" V 2130 5050 50 0000 C CNN +F 1 "1000" V 2050 5050 50 0000 C CNN + 1 2050 5050 + -1 0 0 1 +$EndComp +$Comp +L R R5 +U 1 1 5174CF7E +P 3400 4600 +F 0 "R5" V 3480 4600 50 0000 C CNN +F 1 "100000" V 3400 4600 50 0000 C CNN + 1 3400 4600 + 0 1 1 0 +$EndComp +$Comp +L R R6 +U 1 1 5174CF4D +P 4050 3600 +F 0 "R6" V 4130 3600 50 0000 C CNN +F 1 "2000" V 4050 3600 50 0000 C CNN + 1 4050 3600 + -1 0 0 1 +$EndComp +$Comp +L R R4 +U 1 1 5174CF16 +P 3350 3200 +F 0 "R4" V 3430 3200 50 0000 C CNN +F 1 "1000" V 3350 3200 50 0000 C CNN + 1 3350 3200 + 0 1 1 0 +$EndComp +$Comp +L VCVS E1 +U 1 1 5174CEE8 +P 2700 3650 +F 0 "E1" H 2500 3750 50 0000 C CNN +F 1 "2" H 2500 3600 50 0000 C CNN + 1 2700 3650 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 5174CEC2 +P 2050 3750 +F 0 "R2" V 2130 3750 50 0000 C CNN +F 1 "100000" V 2050 3750 50 0000 C CNN + 1 2050 3750 + -1 0 0 1 +$EndComp +$Comp +L SINE v1 +U 1 1 5174CE88 +P 1050 3750 +F 0 "v1" H 850 3850 60 0000 C CNN +F 1 "SINE" H 850 3700 60 0000 C CNN +F 2 "R1" H 750 3750 60 0000 C CNN + 1 1050 3750 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5174CE5E +P 1300 3200 +F 0 "R1" V 1380 3200 50 0000 C CNN +F 1 "10000" V 1300 3200 50 0000 C CNN + 1 1300 3200 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/analysis b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/analysis new file mode 100644 index 0000000..0e8f996 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/analysis @@ -0,0 +1 @@ +.tran 2e-03 20e-03 0e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3-cache.lib new file mode 100644 index 0000000..394db4b --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3-cache.lib @@ -0,0 +1,115 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 22 April 2013 02:21:52 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir new file mode 100644 index 0000000..fc9aa74 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 22 April 2013 02:21:49 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 5 4 VPLOT8_1 +v2 2 0 12 +R2 4 3 47000 +R1 3 5 10000 +v1 5 0 SINE +R3 2 4 4700 +Q1 0 3 4 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir.ckt new file mode 100644 index 0000000..421fe94 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir.ckt @@ -0,0 +1,13 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 22 april 2013 02:21:49 pm ist + +* Plotting option vplot8_1 +v2 2 0 12 +r2 4 3 47000 +r1 3 5 10000 +v1 5 0 sine( 5 50 ) +r3 2 4 4700 +q1 4 3 0 npn + +.tran 2e-03 20e-03 0e-00 +.plot v(5) v(4) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir.out b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir.out new file mode 100644 index 0000000..db0fe26 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir.out @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 22 april 2013 02:21:49 pm ist + +* Plotting option vplot8_1 +v2 2 0 12 +r2 4 3 47000 +r1 3 5 10000 +v1 5 0 sine( 5 50 ) +r3 2 4 4700 +q1 4 3 0 npn + +.tran 2e-03 20e-03 0e-00 + +* Control Statements +.control +run +plot v(5) v(4) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.pro b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.pro new file mode 100644 index 0000000..1039051 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.pro @@ -0,0 +1,74 @@ +update=Monday 22 April 2013 02:17:45 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.proj b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.proj new file mode 100644 index 0000000..ff14336 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.proj @@ -0,0 +1 @@ +schematicFile example_7.3.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.sch b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.sch new file mode 100644 index 0000000..fddbc06 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.sch @@ -0,0 +1,175 @@ +EESchema Schematic File Version 2 date Monday 22 April 2013 02:21:52 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 43 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "22 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L VPLOT8_1 U1 +U 1 1 5174FA0E +P 3850 3350 +F 0 "U1" H 3700 3450 50 0000 C CNN +F 1 "VPLOT8_1" H 4000 3450 50 0000 C CNN + 1 3850 3350 + 1 0 0 -1 +$EndComp +Connection ~ 3850 3650 +Wire Wire Line + 3850 3650 3800 3650 +Connection ~ 4350 3650 +Connection ~ 5300 3350 +Wire Wire Line + 4950 4650 4950 3850 +Wire Wire Line + 5800 3200 5800 2800 +Wire Wire Line + 5800 2800 4950 2800 +Wire Wire Line + 4350 3350 4350 3650 +Wire Wire Line + 4350 3350 4450 3350 +Wire Wire Line + 4950 3450 4950 3300 +Wire Wire Line + 4350 3650 4650 3650 +Wire Wire Line + 4950 3350 5300 3350 +Connection ~ 4950 3350 +Wire Wire Line + 5800 4100 5800 4550 +Wire Wire Line + 5800 4550 3800 4550 +Connection ~ 4950 4550 +$Comp +L VPLOT8_1 U1 +U 2 1 5174F9F2 +P 5300 3050 +F 0 "U1" H 5150 3150 50 0000 C CNN +F 1 "VPLOT8_1" H 5450 3150 50 0000 C CNN + 2 5300 3050 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 5174F9DF +P 4950 4550 +F 0 "#FLG01" H 4950 4820 30 0001 C CNN +F 1 "PWR_FLAG" H 4950 4780 30 0000 C CNN + 1 4950 4550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5174F9D4 +P 4950 4650 +F 0 "#PWR02" H 4950 4650 30 0001 C CNN +F 1 "GND" H 4950 4580 30 0001 C CNN + 1 4950 4650 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 5174F994 +P 5800 3650 +F 0 "v2" H 5600 3750 60 0000 C CNN +F 1 "12" H 5600 3600 60 0000 C CNN +F 2 "R1" H 5500 3650 60 0000 C CNN + 1 5800 3650 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 5174F959 +P 4700 3350 +F 0 "R2" V 4780 3350 50 0000 C CNN +F 1 "47000" V 4700 3350 50 0000 C CNN + 1 4700 3350 + 0 1 1 0 +$EndComp +$Comp +L R R1 +U 1 1 5174F943 +P 4100 3650 +F 0 "R1" V 4180 3650 50 0000 C CNN +F 1 "10000" V 4100 3650 50 0000 C CNN + 1 4100 3650 + 0 1 1 0 +$EndComp +$Comp +L SINE v1 +U 1 1 5174F939 +P 3800 4100 +F 0 "v1" H 3600 4200 60 0000 C CNN +F 1 "SINE" H 3600 4050 60 0000 C CNN +F 2 "R1" H 3500 4100 60 0000 C CNN + 1 3800 4100 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 5174F90B +P 4950 3050 +F 0 "R3" V 5030 3050 50 0000 C CNN +F 1 "4700" V 4950 3050 50 0000 C CNN + 1 4950 3050 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 5174F8FA +P 4850 3650 +F 0 "Q1" H 4850 3500 50 0000 R CNN +F 1 "NPN" H 4850 3800 50 0000 R CNN + 1 4850 3650 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/analysis b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/analysis new file mode 100644 index 0000000..0e8f996 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/analysis @@ -0,0 +1 @@ +.tran 2e-03 20e-03 0e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4-cache.bak new file mode 100644 index 0000000..61d077a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4-cache.bak @@ -0,0 +1,133 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 23 April 2013 11:46:23 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4-cache.lib new file mode 100644 index 0000000..b4c0e94 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4-cache.lib @@ -0,0 +1,133 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 23 April 2013 12:03:44 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.bak b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.bak new file mode 100644 index 0000000..0eedc93 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.bak @@ -0,0 +1,348 @@ +EESchema Schematic File Version 2 date Tuesday 23 April 2013 11:46:23 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_7.4-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "23 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 6350 3000 +$Comp +L VPLOT8_1 U1 +U 1 1 517625EA +P 6350 2700 +F 0 "U1" H 6200 2800 50 0000 C CNN +F 1 "VPLOT8_1" H 6500 2800 50 0000 C CNN + 1 6350 2700 + 1 0 0 -1 +$EndComp +Connection ~ 7000 2450 +$Comp +L VPLOT8_1 U1 +U 2 1 517625DB +P 7000 2150 +F 0 "U1" H 6850 2250 50 0000 C CNN +F 1 "VPLOT8_1" H 7150 2250 50 0000 C CNN + 2 7000 2150 + 1 0 0 -1 +$EndComp +Connection ~ 5800 2700 +$Comp +L PWR_FLAG #FLG01 +U 1 1 517625B5 +P 5800 2700 +F 0 "#FLG01" H 5800 2970 30 0001 C CNN +F 1 "PWR_FLAG" H 5800 2930 30 0000 C CNN + 1 5800 2700 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 517625AE +P 4050 3100 +F 0 "#FLG02" H 4050 3370 30 0001 C CNN +F 1 "PWR_FLAG" H 4050 3330 30 0000 C CNN + 1 4050 3100 + 1 0 0 -1 +$EndComp +Connection ~ 3250 4150 +$Comp +L PWR_FLAG #FLG03 +U 1 1 5176256A +P 3250 4150 +F 0 "#FLG03" H 3250 4420 30 0001 C CNN +F 1 "PWR_FLAG" H 3250 4380 30 0000 C CNN + 1 3250 4150 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 5176255C +P 3250 4300 +F 0 "#PWR04" H 3250 4300 30 0001 C CNN +F 1 "GND" H 3250 4230 30 0001 C CNN + 1 3250 4300 + 1 0 0 -1 +$EndComp +Connection ~ 3250 3950 +Wire Wire Line + 3250 3950 3250 4300 +Wire Wire Line + 2500 3100 2750 3100 +Connection ~ 6200 1700 +Wire Wire Line + 7500 2400 7500 1700 +Wire Wire Line + 7500 1700 4050 1700 +Wire Wire Line + 5200 4350 5000 4350 +Wire Wire Line + 6600 3000 6600 4350 +Connection ~ 6200 3000 +Wire Wire Line + 6600 3000 6200 3000 +Connection ~ 4050 3950 +Wire Wire Line + 3850 3100 4400 3100 +Connection ~ 4050 3100 +Wire Wire Line + 4050 3450 4050 2650 +Connection ~ 4700 1700 +Wire Wire Line + 4050 1700 4050 2150 +Connection ~ 6200 3950 +Wire Wire Line + 6200 3550 6200 3950 +Wire Wire Line + 6900 2450 7050 2450 +Wire Wire Line + 5200 3450 5200 3400 +Connection ~ 4700 3400 +Wire Wire Line + 5200 3400 4700 3400 +Wire Wire Line + 4700 3300 4700 3450 +Wire Wire Line + 6200 2500 6200 2350 +Wire Wire Line + 4700 2600 4700 2900 +Wire Wire Line + 5900 2700 4700 2700 +Connection ~ 4700 2700 +Wire Wire Line + 6200 2450 6500 2450 +Connection ~ 6200 2450 +Wire Wire Line + 6200 2900 6200 3050 +Wire Wire Line + 5200 3950 5200 3850 +Wire Wire Line + 7050 3950 7050 2950 +Connection ~ 5200 3950 +Wire Wire Line + 4700 1700 4700 2100 +Wire Wire Line + 6200 1700 6200 1850 +Connection ~ 4700 3950 +Wire Wire Line + 3450 3100 3250 3100 +Wire Wire Line + 6600 4350 5600 4350 +Wire Wire Line + 4500 4350 3950 4350 +Wire Wire Line + 3950 4350 3950 3100 +Connection ~ 3950 3100 +Wire Wire Line + 7500 3300 7500 3950 +Wire Wire Line + 7500 3950 2750 3950 +Connection ~ 7050 3950 +Wire Wire Line + 2750 3950 2750 4000 +Wire Wire Line + 2750 4000 2500 4000 +$Comp +L SINE v1 +U 1 1 5176244C +P 2500 3550 +F 0 "v1" H 2300 3650 60 0000 C CNN +F 1 "SINE" H 2300 3500 60 0000 C CNN +F 2 "R1" H 2200 3550 60 0000 C CNN + 1 2500 3550 + 1 0 0 -1 +$EndComp +$Comp +L R R6 +U 1 1 51761AB3 +P 4750 4350 +F 0 "R6" V 4830 4350 50 0000 C CNN +F 1 "10k" V 4750 4350 50 0000 C CNN + 1 4750 4350 + 0 1 1 0 +$EndComp +$Comp +L R R1 +U 1 1 51761A46 +P 3000 3100 +F 0 "R1" V 3080 3100 50 0000 C CNN +F 1 "10k" V 3000 3100 50 0000 C CNN + 1 3000 3100 + 0 1 1 0 +$EndComp +$Comp +L C C1 +U 1 1 51761A2D +P 3650 3100 +F 0 "C1" H 3700 3200 50 0000 L CNN +F 1 "1k" H 3700 3000 50 0000 L CNN + 1 3650 3100 + 0 1 1 0 +$EndComp +$Comp +L R R3 +U 1 1 51761A14 +P 4050 3700 +F 0 "R3" V 4130 3700 50 0000 C CNN +F 1 "15k" V 4050 3700 50 0000 C CNN + 1 4050 3700 + 1 0 0 -1 +$EndComp +$Comp +L R R9 +U 1 1 517619D2 +P 7050 2700 +F 0 "R9" V 7130 2700 50 0000 C CNN +F 1 "1k" V 7050 2700 50 0000 C CNN + 1 7050 2700 + 1 0 0 -1 +$EndComp +$Comp +L C C2 +U 1 1 517619B5 +P 5200 3650 +F 0 "C2" H 5250 3750 50 0000 L CNN +F 1 "1k" H 5250 3550 50 0000 L CNN + 1 5200 3650 + 1 0 0 -1 +$EndComp +$Comp +L R R7 +U 1 1 517619A1 +P 6200 2100 +F 0 "R7" V 6280 2100 50 0000 C CNN +F 1 "8k" V 6200 2100 50 0000 C CNN + 1 6200 2100 + 1 0 0 -1 +$EndComp +$Comp +L R R8 +U 1 1 5176198B +P 6200 3300 +F 0 "R8" V 6280 3300 50 0000 C CNN +F 1 "3.4k" V 6200 3300 50 0000 C CNN + 1 6200 3300 + 1 0 0 -1 +$EndComp +$Comp +L C C4 +U 1 1 5176197A +P 6700 2450 +F 0 "C4" H 6750 2550 50 0000 L CNN +F 1 "1k" H 6750 2350 50 0000 L CNN + 1 6700 2450 + 0 1 1 0 +$EndComp +$Comp +L R R5 +U 1 1 51761974 +P 4700 3700 +F 0 "R5" V 4780 3700 50 0000 C CNN +F 1 "870" V 4700 3700 50 0000 C CNN + 1 4700 3700 + 1 0 0 -1 +$EndComp +$Comp +L R R4 +U 1 1 51761961 +P 4700 2350 +F 0 "R4" V 4780 2350 50 0000 C CNN +F 1 "10k" V 4700 2350 50 0000 C CNN + 1 4700 2350 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 5176195A +P 7500 2850 +F 0 "v2" H 7300 2950 60 0000 C CNN +F 1 "12" H 7300 2800 60 0000 C CNN +F 2 "R1" H 7200 2850 60 0000 C CNN + 1 7500 2850 + 1 0 0 -1 +$EndComp +$Comp +L C C3 +U 1 1 51761951 +P 5400 4350 +F 0 "C3" H 5450 4450 50 0000 L CNN +F 1 "1k" H 5450 4250 50 0000 L CNN + 1 5400 4350 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 5176194E +P 4050 2400 +F 0 "R2" V 4130 2400 50 0000 C CNN +F 1 "100k" V 4050 2400 50 0000 C CNN + 1 4050 2400 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q2 +U 1 1 5176191C +P 6100 2700 +F 0 "Q2" H 6100 2550 50 0000 R CNN +F 1 "NPN" H 6100 2850 50 0000 R CNN + 1 6100 2700 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 517618FE +P 4600 3100 +F 0 "Q1" H 4600 2950 50 0000 R CNN +F 1 "NPN" H 4600 3250 50 0000 R CNN + 1 4600 3100 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir new file mode 100644 index 0000000..66167e8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir @@ -0,0 +1,26 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 23 April 2013 12:03:40 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 8 7 VPLOT8_1 +v1 2 0 SINE +R6 3 6 10k +R1 1 2 10k +C1 6 1 1m +R3 6 0 15k +R9 7 0 1k +C2 11 0 1m +R7 4 9 8k +R8 8 0 3.4k +C4 7 9 1m +R5 11 0 870 +R4 4 10 10k +v2 4 0 12 +C3 8 3 1m +R2 4 6 100k +Q2 8 10 9 NPN +Q1 11 6 10 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.ckt new file mode 100644 index 0000000..d627f6f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.ckt @@ -0,0 +1,24 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 23 april 2013 12:03:40 pm ist + +* Plotting option vplot8_1 +v1 2 0 sine(0 1 50 ) +r6 3 6 10k +r1 1 2 10k +c1 6 1 1m +r3 6 0 15k +r9 7 0 1k +c2 11 0 1m +r7 4 9 8k +r8 8 0 3.4k +c4 7 9 1m +r5 11 0 870 +r4 4 10 10k +v2 4 0 12 +c3 8 3 1m +r2 4 6 100k +q2 9 10 8 npn +q1 10 6 11 npn + +.tran 2e-03 20e-03 0e-00 +.plot v(8) v(7) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.out b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.out new file mode 100644 index 0000000..669fcbb --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.out @@ -0,0 +1,29 @@ +* eeschema netlist version 1.1 (spice format) creation date: tuesday 23 april 2013 12:03:40 pm ist + +* Plotting option vplot8_1 +v1 2 0 sine(0 1 50 ) +r6 3 6 10k +r1 1 2 10k +c1 6 1 1m +r3 6 0 15k +r9 7 0 1k +c2 11 0 1m +r7 4 9 8k +r8 8 0 3.4k +c4 7 9 1m +r5 11 0 870 +r4 4 10 10k +v2 4 0 12 +c3 8 3 1m +r2 4 6 100k +q2 9 10 8 npn +q1 10 6 11 npn + +.tran 2e-03 20e-03 0e-00 + +* Control Statements +.control +run +plot v(8) v(7) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.pro b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.pro new file mode 100644 index 0000000..42b9098 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.pro @@ -0,0 +1,74 @@ +update=Tuesday 23 April 2013 10:45:01 AM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.proj b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.proj new file mode 100644 index 0000000..a6cb330 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.proj @@ -0,0 +1 @@ +schematicFile example_7.4.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.sch b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.sch new file mode 100644 index 0000000..1f165d6 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.sch @@ -0,0 +1,348 @@ +EESchema Schematic File Version 2 date Tuesday 23 April 2013 12:03:44 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_7.4-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "23 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 6350 3000 +$Comp +L VPLOT8_1 U1 +U 1 1 517625EA +P 6350 2700 +F 0 "U1" H 6200 2800 50 0000 C CNN +F 1 "VPLOT8_1" H 6500 2800 50 0000 C CNN + 1 6350 2700 + 1 0 0 -1 +$EndComp +Connection ~ 7000 2450 +$Comp +L VPLOT8_1 U1 +U 2 1 517625DB +P 7000 2150 +F 0 "U1" H 6850 2250 50 0000 C CNN +F 1 "VPLOT8_1" H 7150 2250 50 0000 C CNN + 2 7000 2150 + 1 0 0 -1 +$EndComp +Connection ~ 5800 2700 +$Comp +L PWR_FLAG #FLG01 +U 1 1 517625B5 +P 5800 2700 +F 0 "#FLG01" H 5800 2970 30 0001 C CNN +F 1 "PWR_FLAG" H 5800 2930 30 0000 C CNN + 1 5800 2700 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 517625AE +P 4050 3100 +F 0 "#FLG02" H 4050 3370 30 0001 C CNN +F 1 "PWR_FLAG" H 4050 3330 30 0000 C CNN + 1 4050 3100 + 1 0 0 -1 +$EndComp +Connection ~ 3250 4150 +$Comp +L PWR_FLAG #FLG03 +U 1 1 5176256A +P 3250 4150 +F 0 "#FLG03" H 3250 4420 30 0001 C CNN +F 1 "PWR_FLAG" H 3250 4380 30 0000 C CNN + 1 3250 4150 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 5176255C +P 3250 4300 +F 0 "#PWR04" H 3250 4300 30 0001 C CNN +F 1 "GND" H 3250 4230 30 0001 C CNN + 1 3250 4300 + 1 0 0 -1 +$EndComp +Connection ~ 3250 3950 +Wire Wire Line + 3250 3950 3250 4300 +Wire Wire Line + 2500 3100 2750 3100 +Connection ~ 6200 1700 +Wire Wire Line + 7500 2400 7500 1700 +Wire Wire Line + 7500 1700 4050 1700 +Wire Wire Line + 5200 4350 5000 4350 +Wire Wire Line + 6600 3000 6600 4350 +Connection ~ 6200 3000 +Wire Wire Line + 6600 3000 6200 3000 +Connection ~ 4050 3950 +Wire Wire Line + 3850 3100 4400 3100 +Connection ~ 4050 3100 +Wire Wire Line + 4050 3450 4050 2650 +Connection ~ 4700 1700 +Wire Wire Line + 4050 1700 4050 2150 +Connection ~ 6200 3950 +Wire Wire Line + 6200 3550 6200 3950 +Wire Wire Line + 6900 2450 7050 2450 +Wire Wire Line + 5200 3450 5200 3400 +Connection ~ 4700 3400 +Wire Wire Line + 5200 3400 4700 3400 +Wire Wire Line + 4700 3300 4700 3450 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1 1 51761AB3 +P 4750 4350 +F 0 "R6" V 4830 4350 50 0000 C CNN +F 1 "10k" V 4750 4350 50 0000 C CNN + 1 4750 4350 + 0 1 1 0 +$EndComp +$Comp +L R R1 +U 1 1 51761A46 +P 3000 3100 +F 0 "R1" V 3080 3100 50 0000 C CNN +F 1 "10k" V 3000 3100 50 0000 C CNN + 1 3000 3100 + 0 1 1 0 +$EndComp +$Comp +L C C1 +U 1 1 51761A2D +P 3650 3100 +F 0 "C1" H 3700 3200 50 0000 L CNN +F 1 "1m" H 3700 3000 50 0000 L CNN + 1 3650 3100 + 0 1 1 0 +$EndComp +$Comp +L R R3 +U 1 1 51761A14 +P 4050 3700 +F 0 "R3" V 4130 3700 50 0000 C CNN +F 1 "15k" V 4050 3700 50 0000 C CNN + 1 4050 3700 + 1 0 0 -1 +$EndComp +$Comp +L R R9 +U 1 1 517619D2 +P 7050 2700 +F 0 "R9" V 7130 2700 50 0000 C CNN +F 1 "1k" V 7050 2700 50 0000 C CNN + 1 7050 2700 + 1 0 0 -1 +$EndComp +$Comp +L C C2 +U 1 1 517619B5 +P 5200 3650 +F 0 "C2" H 5250 3750 50 0000 L CNN +F 1 "1m" H 5250 3550 50 0000 L CNN + 1 5200 3650 + 1 0 0 -1 +$EndComp +$Comp +L R R7 +U 1 1 517619A1 +P 6200 2100 +F 0 "R7" V 6280 2100 50 0000 C CNN +F 1 "8k" V 6200 2100 50 0000 C CNN + 1 6200 2100 + 1 0 0 -1 +$EndComp +$Comp +L R R8 +U 1 1 5176198B +P 6200 3300 +F 0 "R8" V 6280 3300 50 0000 C CNN +F 1 "3.4k" V 6200 3300 50 0000 C CNN + 1 6200 3300 + 1 0 0 -1 +$EndComp +$Comp +L C C4 +U 1 1 5176197A +P 6700 2450 +F 0 "C4" H 6750 2550 50 0000 L CNN +F 1 "1m" H 6750 2350 50 0000 L CNN + 1 6700 2450 + 0 1 1 0 +$EndComp +$Comp +L R R5 +U 1 1 51761974 +P 4700 3700 +F 0 "R5" V 4780 3700 50 0000 C CNN +F 1 "870" V 4700 3700 50 0000 C CNN + 1 4700 3700 + 1 0 0 -1 +$EndComp +$Comp +L R R4 +U 1 1 51761961 +P 4700 2350 +F 0 "R4" V 4780 2350 50 0000 C CNN +F 1 "10k" V 4700 2350 50 0000 C CNN + 1 4700 2350 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 5176195A +P 7500 2850 +F 0 "v2" H 7300 2950 60 0000 C CNN +F 1 "12" H 7300 2800 60 0000 C CNN +F 2 "R1" H 7200 2850 60 0000 C CNN + 1 7500 2850 + 1 0 0 -1 +$EndComp +$Comp +L C C3 +U 1 1 51761951 +P 5400 4350 +F 0 "C3" H 5450 4450 50 0000 L CNN +F 1 "1m" H 5450 4250 50 0000 L CNN + 1 5400 4350 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 5176194E +P 4050 2400 +F 0 "R2" V 4130 2400 50 0000 C CNN +F 1 "100k" V 4050 2400 50 0000 C CNN + 1 4050 2400 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q2 +U 1 1 5176191C +P 6100 2700 +F 0 "Q2" H 6100 2550 50 0000 R CNN +F 1 "NPN" H 6100 2850 50 0000 R CNN + 1 6100 2700 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 517618FE +P 4600 3100 +F 0 "Q1" H 4600 2950 50 0000 R CNN +F 1 "NPN" H 4600 3250 50 0000 R CNN + 1 4600 3100 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/analysis b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/analysis new file mode 100644 index 0000000..0e8f996 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/analysis @@ -0,0 +1 @@ +.tran 2e-03 20e-03 0e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1-cache.bak new file mode 100644 index 0000000..6eed972 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1-cache.bak @@ -0,0 +1,139 @@ +EESchema-LIBRARY Version 2.3 Date: Thursday 25 April 2013 11:20:04 AM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# Idc +# +DEF Idc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "Idc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot8 +# +DEF vplot8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1-cache.lib new file mode 100644 index 0000000..008a8d7 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1-cache.lib @@ -0,0 +1,139 @@ +EESchema-LIBRARY Version 2.3 Date: Friday 26 April 2013 04:42:05 PM IST +#encoding utf-8 +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# Idc +# +DEF Idc i 0 40 Y Y 1 F N +F0 "i" -200 100 60 H V C CNN +F1 "Idc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# vplot8 +# +DEF vplot8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.bak b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.bak new file mode 100644 index 0000000..a480fc4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.bak @@ -0,0 +1,245 @@ +EESchema Schematic File Version 2 date Thursday 25 April 2013 11:20:04 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_8-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "25 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 4700 4600 +$Comp +L PWR_FLAG #FLG01 +U 1 1 5178C3EF +P 4700 4600 +F 0 "#FLG01" H 4700 4870 30 0001 C CNN +F 1 "PWR_FLAG" H 4700 4830 30 0000 C CNN + 1 4700 4600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5178C3E3 +P 4700 4700 +F 0 "#PWR02" H 4700 4700 30 0001 C CNN +F 1 "GND" H 4700 4630 30 0001 C CNN + 1 4700 4700 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4700 4500 4700 4700 +Connection ~ 5800 2350 +Wire Wire Line + 5600 2350 5800 2350 +Wire Wire Line + 3600 4250 3600 5000 +Wire Wire Line + 6100 2700 6100 5000 +Wire Wire Line + 6600 3750 6600 4750 +Wire Wire Line + 6600 4750 5300 4750 +Wire Wire Line + 4450 2700 4100 2700 +Wire Wire Line + 4750 1650 5800 1650 +Wire Wire Line + 5800 2900 5800 3200 +Wire Wire Line + 4750 2900 4750 3200 +Wire Wire Line + 4750 2150 4750 2500 +Wire Wire Line + 5800 2150 5800 2500 +Wire Wire Line + 5800 3700 4750 3700 +Wire Wire Line + 6100 5000 4100 5000 +Wire Wire Line + 5300 3700 5300 3850 +Connection ~ 5300 3700 +Wire Wire Line + 5750 1650 5750 1400 +Connection ~ 5750 1650 +Wire Wire Line + 5750 1400 6600 1400 +Wire Wire Line + 6600 1400 6600 2850 +Wire Wire Line + 3600 2700 3600 3350 +Wire Wire Line + 5000 2350 4750 2350 +Connection ~ 4750 2350 +Wire Wire Line + 5300 3800 4700 3800 +Connection ~ 5300 3800 +Wire Wire Line + 4700 3800 4700 4000 +$Comp +L R R7 +U 1 1 5178C3D2 +P 4700 4250 +F 0 "R7" V 4780 4250 50 0000 C CNN +F 1 "150" V 4700 4250 50 0000 C CNN + 1 4700 4250 + 1 0 0 -1 +$EndComp +$Comp +L SINE v1 +U 1 1 5178C33C +P 3600 3800 +F 0 "v1" H 3400 3900 60 0000 C CNN +F 1 "SINE" H 3400 3750 60 0000 C CNN +F 2 "R1" H 3300 3800 60 0000 C CNN + 1 3600 3800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8 U1 +U 1 1 51779652 +P 5300 2350 +F 0 "U1" H 5150 2450 50 0000 C CNN +F 1 "VPLOT8" H 5450 2450 50 0000 C CNN + 1 5300 2350 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 517794FF +P 3850 2700 +F 0 "R1" V 3930 2700 50 0000 C CNN +F 1 "5k" V 3850 2700 50 0000 C CNN + 1 3850 2700 + 0 1 1 0 +$EndComp +$Comp +L R R6 +U 1 1 517794EA +P 5800 3450 +F 0 "R6" V 5880 3450 50 0000 C CNN +F 1 "150" V 5800 3450 50 0000 C CNN + 1 5800 3450 + 1 0 0 -1 +$EndComp +$Comp +L R R4 +U 1 1 517794E3 +P 4750 3450 +F 0 "R4" V 4830 3450 50 0000 C CNN +F 1 "150" V 4750 3450 50 0000 C CNN + 1 4750 3450 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 517794C9 +P 5800 1900 +F 0 "R5" V 5880 1900 50 0000 C CNN +F 1 "10k" V 5800 1900 50 0000 C CNN + 1 5800 1900 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 517794BE +P 4750 1900 +F 0 "R3" V 4830 1900 50 0000 C CNN +F 1 "10k" V 4750 1900 50 0000 C CNN + 1 4750 1900 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q2 +U 1 1 5177949E +P 5900 2700 +F 0 "Q2" H 5900 2550 50 0000 R CNN +F 1 "NPN" H 5900 2850 50 0000 R CNN + 1 5900 2700 + -1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 51779433 +P 3850 5000 +F 0 "R2" V 3930 5000 50 0000 C CNN +F 1 "R" V 3850 5000 50 0000 C CNN + 1 3850 5000 + 0 1 1 0 +$EndComp +$Comp +L DC v3 +U 1 1 51779424 +P 6600 3300 +F 0 "v3" H 6400 3400 60 0000 C CNN +F 1 "15" H 6400 3250 60 0000 C CNN +F 2 "R1" H 6300 3300 60 0000 C CNN + 1 6600 3300 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 51779415 +P 4650 2700 +F 0 "Q1" H 4650 2550 50 0000 R CNN +F 1 "NPN" H 4650 2850 50 0000 R CNN + 1 4650 2700 + 1 0 0 -1 +$EndComp +$Comp +L IDC v2 +U 1 1 5177940C +P 5300 4300 +F 0 "v2" H 5100 4400 60 0000 C CNN +F 1 "1m" H 5100 4250 60 0000 C CNN +F 2 "R1" H 5000 4300 60 0000 C CNN + 1 5300 4300 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir new file mode 100644 index 0000000..b1cc053 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir @@ -0,0 +1,21 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 25 April 2013 11:19:59 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +R7 9 0 150 +v1 2 5 SINE +U1 1 11 VPLOT8 +R1 8 2 5k +R6 3 9 150 +R4 7 9 150 +R5 12 11 10k +R3 12 1 10k +Q2 3 4 11 NPN +R2 4 5 R +v3 12 6 15 +Q1 7 8 1 NPN +v2 9 6 1m + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.ckt new file mode 100644 index 0000000..d42cb97 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.ckt @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 11:19:59 am ist + +r7 9 0 150 +v1 2 5 sine( 5 50 ) +r1 8 2 5k +r6 3 9 150 +r4 7 9 150 +r5 12 11 10k +r3 12 1 10k +q2 11 4 3 npn +r2 4 5 r +v3 12 6 15 +q1 1 8 7 npn +v2 9 6 1m + +.tran 2e-03 20e-03 0e-00 +.plot v(1)-v(11) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.out b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.out new file mode 100644 index 0000000..95b8ceb --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.out @@ -0,0 +1,23 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 11:19:59 am ist + +r7 9 0 150 +v1 2 5 sine( 5 50 ) +r1 8 2 5k +r6 3 9 150 +r4 7 9 150 +r5 12 11 10k +r3 12 1 10k +q2 11 4 3 npn +r2 4 5 r +v3 12 6 15 +q1 1 8 7 npn +v2 9 6 1m + +.tran 2e-03 20e-03 0e-00 + +* Control Statements +.control +run +plot v(1)-v(11) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.pro b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.pro new file mode 100644 index 0000000..d7282aa --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.pro @@ -0,0 +1,74 @@ +update=Thursday 18 April 2013 03:16:09 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.proj b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.proj new file mode 100644 index 0000000..fe0de23 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.proj @@ -0,0 +1 @@ +schematicFile example_8.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.sch b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.sch new file mode 100644 index 0000000..06b9dfa --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.sch @@ -0,0 +1,245 @@ +EESchema Schematic File Version 2 date Friday 26 April 2013 04:42:05 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_8.1-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "26 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5450 5400 +$Comp +L PWR_FLAG #FLG01 +U 1 1 5178C3EF +P 5450 5400 +F 0 "#FLG01" H 5450 5670 30 0001 C CNN +F 1 "PWR_FLAG" H 5450 5630 30 0000 C CNN + 1 5450 5400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5178C3E3 +P 5450 5500 +F 0 "#PWR02" H 5450 5500 30 0001 C CNN +F 1 "GND" H 5450 5430 30 0001 C CNN + 1 5450 5500 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5450 5300 5450 5500 +Connection ~ 6550 3150 +Wire Wire Line + 6350 3150 6550 3150 +Wire Wire Line + 4350 5050 4350 5800 +Wire Wire Line + 6850 3500 6850 5800 +Wire Wire Line + 7350 4550 7350 5550 +Wire Wire Line + 7350 5550 6050 5550 +Wire Wire Line + 5200 3500 4850 3500 +Wire Wire Line + 5500 2450 6550 2450 +Wire Wire Line + 6550 3700 6550 4000 +Wire Wire Line + 5500 3700 5500 4000 +Wire Wire Line + 5500 2950 5500 3300 +Wire Wire Line + 6550 2950 6550 3300 +Wire Wire Line + 6550 4500 5500 4500 +Wire Wire Line + 6850 5800 4850 5800 +Wire Wire Line + 6050 4500 6050 4650 +Connection ~ 6050 4500 +Wire Wire Line + 6500 2450 6500 2200 +Connection ~ 6500 2450 +Wire Wire Line + 6500 2200 7350 2200 +Wire Wire Line + 7350 2200 7350 3650 +Wire Wire Line + 4350 3500 4350 4150 +Wire Wire Line + 5750 3150 5500 3150 +Connection ~ 5500 3150 +Wire Wire Line + 6050 4600 5450 4600 +Connection ~ 6050 4600 +Wire Wire Line + 5450 4600 5450 4800 +$Comp +L R R7 +U 1 1 5178C3D2 +P 5450 5050 +F 0 "R7" V 5530 5050 50 0000 C CNN +F 1 "150" V 5450 5050 50 0000 C CNN + 1 5450 5050 + 1 0 0 -1 +$EndComp +$Comp +L SINE v1 +U 1 1 5178C33C +P 4350 4600 +F 0 "v1" H 4150 4700 60 0000 C CNN +F 1 "SINE" H 4150 4550 60 0000 C CNN +F 2 "R1" H 4050 4600 60 0000 C CNN + 1 4350 4600 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8 U1 +U 1 1 51779652 +P 6050 3150 +F 0 "U1" H 5900 3250 50 0000 C CNN +F 1 "VPLOT8" H 6200 3250 50 0000 C CNN + 1 6050 3150 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 517794FF +P 4600 3500 +F 0 "R1" V 4680 3500 50 0000 C CNN +F 1 "5k" V 4600 3500 50 0000 C CNN + 1 4600 3500 + 0 1 1 0 +$EndComp +$Comp +L R R6 +U 1 1 517794EA +P 6550 4250 +F 0 "R6" V 6630 4250 50 0000 C CNN +F 1 "150" V 6550 4250 50 0000 C CNN + 1 6550 4250 + 1 0 0 -1 +$EndComp +$Comp +L R R4 +U 1 1 517794E3 +P 5500 4250 +F 0 "R4" V 5580 4250 50 0000 C CNN +F 1 "150" V 5500 4250 50 0000 C CNN + 1 5500 4250 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 517794C9 +P 6550 2700 +F 0 "R5" V 6630 2700 50 0000 C CNN +F 1 "10k" V 6550 2700 50 0000 C CNN + 1 6550 2700 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 517794BE +P 5500 2700 +F 0 "R3" V 5580 2700 50 0000 C CNN +F 1 "10k" V 5500 2700 50 0000 C CNN + 1 5500 2700 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q2 +U 1 1 5177949E +P 6650 3500 +F 0 "Q2" H 6650 3350 50 0000 R CNN +F 1 "NPN" H 6650 3650 50 0000 R CNN + 1 6650 3500 + -1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 51779433 +P 4600 5800 +F 0 "R2" V 4680 5800 50 0000 C CNN +F 1 "R" V 4600 5800 50 0000 C CNN + 1 4600 5800 + 0 1 1 0 +$EndComp +$Comp +L DC v3 +U 1 1 51779424 +P 7350 4100 +F 0 "v3" H 7150 4200 60 0000 C CNN +F 1 "15" H 7150 4050 60 0000 C CNN +F 2 "R1" H 7050 4100 60 0000 C CNN + 1 7350 4100 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 51779415 +P 5400 3500 +F 0 "Q1" H 5400 3350 50 0000 R CNN +F 1 "NPN" H 5400 3650 50 0000 R CNN + 1 5400 3500 + 1 0 0 -1 +$EndComp +$Comp +L IDC v2 +U 1 1 5177940C +P 6050 5100 +F 0 "v2" H 5850 5200 60 0000 C CNN +F 1 "1m" H 5850 5050 60 0000 C CNN +F 2 "R1" H 5750 5100 60 0000 C CNN + 1 6050 5100 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/analysis b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/analysis new file mode 100644 index 0000000..722124c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 15e-00 1e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.lib new file mode 100644 index 0000000..e93b428 Binary files /dev/null and b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.lib differ diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir new file mode 100644 index 0000000..7f3611e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir @@ -0,0 +1,41 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 29 April 2013 11:24:11 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U3 0 25 0 21 25 24 22 21 VPLOT8_1 +U13 23 VPLOT8_1 +v2 0 8 15 +U14 12 6 IPLOT +U11 5 18 IPLOT +R7 7 8 3k +U15 9 7 IPLOT +Q9 9 23 6 NPN +U12 23 1 IPLOT +R6 1 8 15.7k +U9 2 8 IPLOT +U6 11 8 IPLOT +U2 10 8 IPLOT +Q6 2 25 4 NPN +U8 3 4 IPLOT +R5 12 5 2.3k +U10 19 22 IPLOT +U7 13 21 IPLOT +U4 14 24 IPLOT +U5 15 16 IPLOT +U1 17 25 IPLOT +Q8 23 22 18 NPN +R4 12 19 3k +Q7 3 21 22 NPN +Q5 3 24 12 NPN +R1 0 17 28.6k +Q1 10 25 25 NPN +Q3 11 25 16 NPN +R3 12 13 20k +Q4 15 0 21 NPN +v1 12 0 15 +R2 12 14 20k +Q2 15 0 24 NPN + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt new file mode 100644 index 0000000..14076b8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt @@ -0,0 +1,53 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 29 april 2013 11:24:11 am ist + +* Plotting option vplot8_1 +* Plotting option vplot8_1 +v2 0 8 15 +V_u14 12 6 0 +V_u11 5 18 0 +r7 7 8 3k +V_u15 9 7 0 +q9 6 23 9 npn +V_u12 23 1 0 +r6 1 8 15.7k +V_u9 2 8 0 +V_u6 11 8 0 +V_u2 10 8 0 +q6 4 25 2 npn +V_u8 3 4 0 +r5 12 5 2.3k +V_u10 19 22 0 +V_u7 13 21 0 +V_u4 14 24 0 +V_u5 15 16 0 +V_u1 17 25 0 +q8 18 22 23 npn +r4 12 19 3k +q7 22 21 3 npn +q5 12 24 3 npn +r1 0 17 28.6k +q1 25 25 10 npn +q3 16 25 11 npn +r3 12 13 20k +q4 21 0 15 npn +v1 12 0 15 +r2 12 14 20k +q2 24 0 15 npn + +.dc v1 0e-00 15e-00 1e-00 +.plot v(0) v(25) v(0) v(21) v(25) v(24) v(22) v(21) +.plot v(23) +.plot i(V_u14) +.plot i(V_u11) +.plot i(V_u15) +.plot i(V_u12) +.plot i(V_u9) +.plot i(V_u6) +.plot i(V_u2) +.plot i(V_u8) +.plot i(V_u10) +.plot i(V_u7) +.plot i(V_u4) +.plot i(V_u5) +.plot i(V_u1) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out new file mode 100644 index 0000000..a08c832 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out @@ -0,0 +1,58 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 29 april 2013 11:24:11 am ist + +* Plotting option vplot8_1 +* Plotting option vplot8_1 +v2 0 8 15 +V_u14 12 6 0 +V_u11 5 18 0 +r7 7 8 3k +V_u15 9 7 0 +q9 6 23 9 npn +V_u12 23 1 0 +r6 1 8 15.7k +V_u9 2 8 0 +V_u6 11 8 0 +V_u2 10 8 0 +q6 4 25 2 npn +V_u8 3 4 0 +r5 12 5 2.3k +V_u10 19 22 0 +V_u7 13 21 0 +V_u4 14 24 0 +V_u5 15 16 0 +V_u1 17 25 0 +q8 18 22 23 npn +r4 12 19 3k +q7 22 21 3 npn +q5 12 24 3 npn +r1 0 17 28.6k +q1 25 25 10 npn +q3 16 25 11 npn +r3 12 13 20k +q4 21 0 15 npn +v1 12 0 15 +r2 12 14 20k +q2 24 0 15 npn + +.dc v1 0e-00 15e-00 1e-00 + +* Control Statements +.control +run +plot v(0) v(25) v(0) v(21) v(25) v(24) v(22) v(21) +plot v(23) +plot i(V_u14) +plot i(V_u11) +plot i(V_u15) +plot i(V_u12) +plot i(V_u9) +plot i(V_u6) +plot i(V_u2) +plot i(V_u8) +plot i(V_u10) +plot i(V_u7) +plot i(V_u4) +plot i(V_u5) +plot i(V_u1) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro new file mode 100644 index 0000000..71d3b4f --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro @@ -0,0 +1,74 @@ +update=Monday 29 April 2013 10:50:36 AM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj new file mode 100644 index 0000000..c332699 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj @@ -0,0 +1 @@ +schematicFile example_8.4.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch new file mode 100644 index 0000000..cc68262 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch @@ -0,0 +1,573 @@ +EESchema Schematic File Version 2 date Monday 29 April 2013 11:24:17 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +EELAYER 43 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "29 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" 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Line + 5250 1650 5250 1750 +Wire Wire Line + 5900 1950 5900 1150 +Connection ~ 5250 1150 +Wire Wire Line + 2650 2750 2550 2750 +Wire Wire Line + 5900 1150 1900 1150 +Wire Wire Line + 1900 1150 1900 3250 +Wire Wire Line + 2450 2550 2450 5550 +Connection ~ 2450 2550 +$Comp +L DC v2 +U 1 1 517E089A +P 2900 5550 +F 0 "v2" H 2700 5650 60 0000 C CNN +F 1 "15" H 2700 5500 60 0000 C CNN +F 2 "R1" H 2600 5550 60 0000 C CNN + 1 2900 5550 + 0 -1 1 0 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 517E07C2 +P 2400 2550 +F 0 "#FLG01" H 2400 2820 30 0001 C CNN +F 1 "PWR_FLAG" H 2400 2780 30 0000 C CNN + 1 2400 2550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 517E07B3 +P 2250 2550 +F 0 "#PWR02" H 2250 2550 30 0001 C CNN +F 1 "GND" H 2250 2480 30 0001 C CNN + 1 2250 2550 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U14 +U 1 1 517E06CB +P 5900 2200 +F 0 "U14" H 5750 2300 50 0000 C CNN +F 1 "IPLOT" H 6050 2300 50 0000 C CNN + 1 5900 2200 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U11 +U 1 1 517E06B1 +P 5250 2000 +F 0 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CNN + 1 4500 4800 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U6 +U 1 1 517E0562 +P 3300 4800 +F 0 "U6" H 3150 4900 50 0000 C CNN +F 1 "IPLOT" H 3450 4900 50 0000 C CNN + 1 3300 4800 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U2 +U 1 1 517E055E +P 2550 4800 +F 0 "U2" H 2400 4900 50 0000 C CNN +F 1 "IPLOT" H 2700 4900 50 0000 C CNN + 1 2550 4800 + 0 1 1 0 +$EndComp +$Comp +L NPN Q6 +U 1 1 517E0538 +P 4400 4150 +F 0 "Q6" H 4400 4000 50 0000 R CNN +F 1 "NPN" H 4400 4300 50 0000 R CNN + 1 4400 4150 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U8 +U 1 1 517E0528 +P 4500 3500 +F 0 "U8" H 4350 3600 50 0000 C CNN +F 1 "IPLOT" H 4650 3600 50 0000 C CNN + 1 4500 3500 + 0 1 1 0 +$EndComp +$Comp +L R R5 +U 1 1 517E04FA +P 5250 1400 +F 0 "R5" V 5330 1400 50 0000 C CNN +F 1 "2.3k" V 5250 1400 50 0000 C CNN + 1 5250 1400 + 1 0 0 -1 +$EndComp +$Comp +L IPLOT U10 +U 1 1 517E04B8 +P 4600 2200 +F 0 "U10" H 4450 2300 50 0000 C CNN +F 1 "IPLOT" H 4750 2300 50 0000 C CNN + 1 4600 2200 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U7 +U 1 1 517E04B5 +P 3450 2200 +F 0 "U7" H 3300 2300 50 0000 C CNN +F 1 "IPLOT" H 3600 2300 50 0000 C CNN + 1 3450 2200 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U4 +U 1 1 517E04B0 +P 3100 2200 +F 0 "U4" H 2950 2300 50 0000 C CNN +F 1 "IPLOT" H 3250 2300 50 0000 C CNN + 1 3100 2200 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U5 +U 1 1 517E0481 +P 3300 3500 +F 0 "U5" H 3150 3600 50 0000 C CNN +F 1 "IPLOT" H 3450 3600 50 0000 C CNN + 1 3300 3500 + 0 1 1 0 +$EndComp +$Comp +L IPLOT U1 +U 1 1 517E0473 +P 2550 3600 +F 0 "U1" H 2400 3700 50 0000 C CNN +F 1 "IPLOT" H 2700 3700 50 0000 C CNN + 1 2550 3600 + 0 1 1 0 +$EndComp +$Comp +L NPN Q8 +U 1 1 517E0432 +P 5150 2600 +F 0 "Q8" H 5150 2450 50 0000 R CNN +F 1 "NPN" H 5150 2750 50 0000 R CNN + 1 5150 2600 + 1 0 0 -1 +$EndComp +$Comp +L R R4 +U 1 1 517E0427 +P 4600 1400 +F 0 "R4" V 4680 1400 50 0000 C CNN +F 1 "3k" V 4600 1400 50 0000 C CNN + 1 4600 1400 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q7 +U 1 1 517E0411 +P 4700 3000 +F 0 "Q7" H 4700 2850 50 0000 R CNN +F 1 "NPN" H 4700 3150 50 0000 R CNN + 1 4700 3000 + -1 0 0 -1 +$EndComp +$Comp +L NPN Q5 +U 1 1 517E03F6 +P 4250 3000 +F 0 "Q5" H 4250 2850 50 0000 R CNN +F 1 "NPN" H 4250 3150 50 0000 R CNN + 1 4250 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 517E03C0 +P 2550 3000 +F 0 "R1" V 2630 3000 50 0000 C CNN +F 1 "28.6k" V 2550 3000 50 0000 C CNN + 1 2550 3000 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q1 +U 1 1 517E03AD +P 2650 4150 +F 0 "Q1" H 2650 4000 50 0000 R CNN +F 1 "NPN" H 2650 4300 50 0000 R CNN + 1 2650 4150 + -1 0 0 -1 +$EndComp +$Comp +L NPN Q3 +U 1 1 517E03A2 +P 3200 4150 +F 0 "Q3" H 3200 4000 50 0000 R CNN +F 1 "NPN" H 3200 4300 50 0000 R CNN + 1 3200 4150 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 517E0387 +P 3450 1400 +F 0 "R3" V 3530 1400 50 0000 C CNN +F 1 "20k" V 3450 1400 50 0000 C CNN + 1 3450 1400 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q4 +U 1 1 517E0370 +P 3550 2950 +F 0 "Q4" H 3550 2800 50 0000 R CNN +F 1 "NPN" H 3550 3100 50 0000 R CNN + 1 3550 2950 + -1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 517E0351 +P 1900 3700 +F 0 "v1" H 1700 3800 60 0000 C CNN +F 1 "15" H 1700 3650 60 0000 C CNN +F 2 "R1" H 1600 3700 60 0000 C CNN + 1 1900 3700 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 517E0341 +P 3100 1400 +F 0 "R2" V 3180 1400 50 0000 C CNN +F 1 "20k" V 3100 1400 50 0000 C CNN + 1 3100 1400 + 1 0 0 -1 +$EndComp +$Comp +L NPN Q2 +U 1 1 517E0337 +P 3000 2950 +F 0 "Q2" H 3000 2800 50 0000 R CNN +F 1 "NPN" H 3000 3100 50 0000 R CNN + 1 3000 2950 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/analysis b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/analysis new file mode 100644 index 0000000..f74e3c8 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/analysis @@ -0,0 +1 @@ +.dc v1 0e-00 10e-00 1e-00 diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/cd4007.txt b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/cd4007.txt new file mode 100644 index 0000000..cb5beb4 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/cd4007.txt @@ -0,0 +1,22 @@ +* CD4007 NMOS and PMOS transistor SPICE models + +* Typical - Typical Condition + +.model MbreakND NMOS ++ Level=1 Gamma= 0 Xj=0 ++ Tox=1200n Phi=.6 Rs=0 Kp=111u Vto=1.4 Lambda=0.01 ++ Rd=0 Cbd=2.0p Cbs=2.0p Pb=.8 Cgso=0.1p ++ Cgdo=0.1p Is=16.64p N=1 + +*The default W and L is 30 and 10 um respectively and AD and AS +*should not be included. + + +.model MbreakPD PMOS ++ Level=1 Gamma= 0 Xj=0 ++ Tox=1200n Phi=.6 Rs=0 Kp=55u Vto=-1.2 Lambda=0.04 ++ Rd=0 Cbd=4.0p Cbs=4.0p Pb=.8 Cgso=0.2p ++ Cgdo=0.2p Is=16.64p N=1 + +*The default W and L is 60 and 10 um respectively and AD and AS +*should not be included. diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.bak b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.bak new file mode 100644 index 0000000..cc8bedb --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.bak @@ -0,0 +1,118 @@ +EESchema-LIBRARY Version 2.3 Date: Friday 10 May 2013 04:54:25 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# MOS_N +# +DEF MOS_N M 0 0 N Y 1 F N +F0 "M" 10 170 60 H V R CNN +F1 "MOS_N" 10 -150 60 H V R CNN +ALIAS MOSFET_N +DRAW +P 2 0 1 8 -50 -100 -50 100 N +P 2 0 1 10 0 -150 0 150 N +P 2 0 1 0 100 -100 0 -100 N +P 2 0 1 0 100 100 0 100 N +P 3 0 1 8 100 -100 100 0 50 0 N +P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N +X D D 100 200 100 D 40 40 1 1 P +X G G -200 0 150 R 40 40 1 1 I +X S S 100 -200 100 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# MOS_P +# +DEF MOS_P M 0 40 Y N 1 F N +F0 "M" 0 190 60 H V R CNN +F1 "MOS_P" 0 -180 60 H V R CNN +ALIAS MOSFET_P +DRAW +P 2 0 1 8 -50 -100 -50 100 N +P 2 0 1 10 0 -150 0 150 N +P 2 0 1 8 30 0 0 0 N +P 2 0 1 0 100 -100 0 -100 N +P 2 0 1 0 100 100 0 100 N +P 3 0 1 0 80 0 100 0 100 -100 N +P 5 0 1 8 30 40 30 -30 80 0 30 40 30 40 N +X D D 100 200 100 D 40 40 1 1 P +X G G -200 0 150 R 40 40 1 1 I +X S S 100 -200 100 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.lib b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.lib new file mode 100644 index 0000000..5680002 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.lib @@ -0,0 +1,118 @@ +EESchema-LIBRARY Version 2.3 Date: Thursday 16 May 2013 11:24:57 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# MOS_N +# +DEF MOS_N M 0 0 N Y 1 F N +F0 "M" 10 170 60 H V R CNN +F1 "MOS_N" 10 -150 60 H V R CNN +ALIAS MOSFET_N +DRAW +P 2 0 1 8 -50 -100 -50 100 N +P 2 0 1 10 0 -150 0 150 N +P 2 0 1 0 100 -100 0 -100 N +P 2 0 1 0 100 100 0 100 N +P 3 0 1 8 100 -100 100 0 50 0 N +P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N +X D D 100 200 100 D 40 40 1 1 P +X G G -200 0 150 R 40 40 1 1 I +X S S 100 -200 100 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# MOS_P +# +DEF MOS_P M 0 40 Y N 1 F N +F0 "M" 0 190 60 H V R CNN +F1 "MOS_P" 0 -180 60 H V R CNN +ALIAS MOSFET_P +DRAW +P 2 0 1 8 -50 -100 -50 100 N +P 2 0 1 10 0 -150 0 150 N +P 2 0 1 8 30 0 0 0 N +P 2 0 1 0 100 -100 0 -100 N +P 2 0 1 0 100 100 0 100 N +P 3 0 1 0 80 0 100 0 100 -100 N +P 5 0 1 8 30 40 30 -30 80 0 30 40 30 40 N +X D D 100 200 100 D 40 40 1 1 P +X G G -200 0 150 R 40 40 1 1 I +X S S 100 -200 100 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.bak b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.bak new file mode 100644 index 0000000..e14fb9e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.bak @@ -0,0 +1,194 @@ +EESchema Schematic File Version 2 date Friday 10 May 2013 04:54:25 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_9.4-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "10 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5750 3600 +Wire Wire Line + 5750 3600 5300 3600 +Wire Wire Line + 5300 3600 5300 3850 +Connection ~ 5600 3450 +Wire Wire Line + 5600 3650 5600 3450 +Wire Wire Line + 6050 3450 6400 3450 +Connection ~ 6050 4300 +Wire Wire Line + 6050 4050 6050 4350 +Wire Wire Line + 6050 4350 5100 4350 +Wire Wire Line + 6650 3900 6650 4300 +Wire Wire Line + 6050 2850 6050 2700 +Wire Wire Line + 6050 3250 6050 3650 +Wire Wire Line + 5750 3050 5750 3850 +Connection ~ 6050 3450 +Wire Wire Line + 6400 3450 6400 3750 +Connection ~ 6400 4300 +Wire Wire Line + 6050 2700 6650 2700 +Wire Wire Line + 6650 2700 6650 3000 +Wire Wire Line + 5750 3450 5100 3450 +Connection ~ 5750 3450 +Wire Wire Line + 5100 3450 5100 3550 +Wire Wire Line + 6400 4400 6400 4150 +Connection ~ 5500 3450 +Wire Wire Line + 6650 4300 6050 4300 +Connection ~ 6200 3450 +Wire Wire Line + 5600 4050 5600 4350 +Connection ~ 5600 4350 +$Comp +L MOS_N M3 +U 1 1 518CD8BE +P 5500 3850 +F 0 "M3" H 5510 4020 60 0000 R CNN +F 1 "MOS_N" H 5510 3700 60 0000 R CNN + 1 5500 3850 + 1 0 0 -1 +$EndComp +$Comp +L MOS_P M1 +U 1 1 5188E486 +P 5950 3050 +F 0 "M1" H 5950 3240 60 0000 R CNN +F 1 "MOS_P" H 5950 2870 60 0000 R CNN + 1 5950 3050 + 1 0 0 1 +$EndComp +$Comp +L MOS_N M2 +U 1 1 5188E477 +P 5950 3850 +F 0 "M2" H 5960 4020 60 0000 R CNN +F 1 "MOS_N" H 5960 3700 60 0000 R CNN + 1 5950 3850 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 5188E0A2 +P 6200 3150 +F 0 "U2" H 6050 3250 50 0000 C CNN +F 1 "VPLOT8_1" H 6350 3250 50 0000 C CNN + 2 6200 3150 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 5188E094 +P 6400 4300 +F 0 "#FLG01" H 6400 4570 30 0001 C CNN +F 1 "PWR_FLAG" H 6400 4530 30 0000 C CNN + 1 6400 4300 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 517F5425 +P 6650 3450 +F 0 "v2" H 6450 3550 60 0000 C CNN +F 1 "10" H 6450 3400 60 0000 C CNN +F 2 "R1" H 6350 3450 60 0000 C CNN + 1 6650 3450 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 517F5879 +P 5500 3150 +F 0 "U2" H 5350 3250 50 0000 C CNN +F 1 "VPLOT8_1" H 5650 3250 50 0000 C CNN + 1 5500 3150 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 517F5470 +P 6400 4400 +F 0 "#PWR02" H 6400 4400 30 0001 C CNN +F 1 "GND" H 6400 4330 30 0001 C CNN + 1 6400 4400 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 517F544C +P 5100 3900 +F 0 "v1" H 4900 4000 60 0000 C CNN +F 1 "DC" H 4900 3850 60 0000 C CNN +F 2 "R1" H 4800 3900 60 0000 C CNN + 1 5100 3900 + 1 0 0 -1 +$EndComp +$Comp +L C C1 +U 1 1 517F53E7 +P 6400 3950 +F 0 "C1" H 6450 4050 50 0000 L CNN +F 1 ".5p" H 6450 3850 50 0000 L CNN + 1 6400 3950 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir new file mode 100644 index 0000000..f3aa33e --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir @@ -0,0 +1,14 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 16 May 2013 11:24:53 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +M1 4 3 1 MOS_P +M2 4 3 0 MOS_N +U2 3 4 VPLOT8_1 +v2 1 0 10 +v1 3 0 DC +C1 4 0 .5p + +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.ckt b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.ckt new file mode 100644 index 0000000..0699b0a --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.ckt @@ -0,0 +1,14 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 16 may 2013 11:24:53 am ist +.include mos_p.lib +.include mos_n.lib + +m1 4 3 1 1 mos_p +m2 4 3 0 0 mos_n +* Plotting option vplot8_1 +v2 1 0 10 +v1 3 0 dc 10 +c1 4 0 .5p + +.dc v1 0e-00 10e-00 1e-00 +.plot v(3) v(4) +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.out b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.out new file mode 100644 index 0000000..4fc3ec2 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.out @@ -0,0 +1,19 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 16 may 2013 11:24:53 am ist +.include mos_p.lib +.include mos_n.lib + +m1 4 3 1 1 mos_p +m2 4 3 0 0 mos_n +* Plotting option vplot8_1 +v2 1 0 10 +v1 3 0 dc 10 +c1 4 0 .5p + +.dc v1 0e-00 10e-00 1e-00 + +* Control Statements +.control +run +plot v(3) v(4) +.endc +.end diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.pro b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.pro new file mode 100644 index 0000000..a802a04 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.pro @@ -0,0 +1,74 @@ +update=Tuesday 30 April 2013 10:42:25 AM IST +last_client=eeschema +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/holy/FreeEDA/library/analogSpice +LibName32=/home/holy/FreeEDA/library/analogXSpice +LibName33=/home/holy/FreeEDA/library/convergenceAidSpice +LibName34=/home/holy/FreeEDA/library/converterSpice +LibName35=/home/holy/FreeEDA/library/digitalSpice +LibName36=/home/holy/FreeEDA/library/digitalXSpice +LibName37=/home/holy/FreeEDA/library/linearSpice +LibName38=/home/holy/FreeEDA/library/measurementSpice +LibName39=/home/holy/FreeEDA/library/portSpice +LibName40=/home/holy/FreeEDA/library/sourcesSpice diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.proj b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.proj new file mode 100644 index 0000000..8fac45c --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.proj @@ -0,0 +1 @@ +schematicFile example_9.4.sch diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.sch b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.sch new file mode 100644 index 0000000..de8111b --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.sch @@ -0,0 +1,175 @@ +EESchema Schematic File Version 2 date Thursday 16 May 2013 11:24:57 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:convergenceAidSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:digitalXSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:example_9.4-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "16 may 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5750 3600 +Wire Wire Line + 6050 3450 6400 3450 +Connection ~ 6050 4300 +Wire Wire Line + 6050 4050 6050 4350 +Wire Wire Line + 6050 4350 5100 4350 +Wire Wire Line + 6650 3900 6650 4300 +Wire Wire Line + 6050 2850 6050 2700 +Wire Wire Line + 6050 3250 6050 3650 +Wire Wire Line + 5750 3050 5750 3850 +Connection ~ 6050 3450 +Wire Wire Line + 6400 3450 6400 3750 +Connection ~ 6400 4300 +Wire Wire Line + 6050 2700 6650 2700 +Wire Wire Line + 6650 2700 6650 3000 +Wire Wire Line + 5750 3450 5100 3450 +Connection ~ 5750 3450 +Wire Wire Line + 5100 3450 5100 3550 +Wire Wire Line + 6400 4400 6400 4150 +Connection ~ 5500 3450 +Wire Wire Line + 6650 4300 6050 4300 +Connection ~ 6200 3450 +$Comp +L MOS_P M1 +U 1 1 5188E486 +P 5950 3050 +F 0 "M1" H 5950 3240 60 0000 R CNN +F 1 "MOS_P" H 5950 2870 60 0000 R CNN + 1 5950 3050 + 1 0 0 1 +$EndComp +$Comp +L MOS_N M2 +U 1 1 5188E477 +P 5950 3850 +F 0 "M2" H 5960 4020 60 0000 R CNN +F 1 "MOS_N" H 5960 3700 60 0000 R CNN + 1 5950 3850 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 2 1 5188E0A2 +P 6200 3150 +F 0 "U2" H 6050 3250 50 0000 C CNN +F 1 "VPLOT8_1" H 6350 3250 50 0000 C CNN + 2 6200 3150 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 5188E094 +P 6400 4300 +F 0 "#FLG01" H 6400 4570 30 0001 C CNN +F 1 "PWR_FLAG" H 6400 4530 30 0000 C CNN + 1 6400 4300 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 517F5425 +P 6650 3450 +F 0 "v2" H 6450 3550 60 0000 C CNN +F 1 "10" H 6450 3400 60 0000 C CNN +F 2 "R1" H 6350 3450 60 0000 C CNN + 1 6650 3450 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 517F5879 +P 5500 3150 +F 0 "U2" H 5350 3250 50 0000 C CNN +F 1 "VPLOT8_1" H 5650 3250 50 0000 C CNN + 1 5500 3150 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 517F5470 +P 6400 4400 +F 0 "#PWR02" H 6400 4400 30 0001 C CNN +F 1 "GND" H 6400 4330 30 0001 C CNN + 1 6400 4400 + 1 0 0 -1 +$EndComp +$Comp +L DC v1 +U 1 1 517F544C +P 5100 3900 +F 0 "v1" H 4900 4000 60 0000 C CNN +F 1 "DC" H 4900 3850 60 0000 C CNN +F 2 "R1" H 4800 3900 60 0000 C CNN + 1 5100 3900 + 1 0 0 -1 +$EndComp +$Comp +L C C1 +U 1 1 517F53E7 +P 6400 3950 +F 0 "C1" H 6450 4050 50 0000 L CNN +F 1 ".5p" H 6450 3850 50 0000 L CNN + 1 6400 3950 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/mos_n.lib b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/mos_n.lib new file mode 100644 index 0000000..23ac1f6 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/mos_n.lib @@ -0,0 +1,6 @@ +.model mos_n NMOS( Cgso=877.2p Tox=100n Rs=70.6m Tt=140n Vto=-3.67 ++ Pb=.8 Rg=.811 Theta=0 Phi=.6 Fc=.5 ++ Delta=0 Vmax=0 Kappa=0 Rds=444.4K Level=3 ++ L=2u Mj=.5 Uo=300 Eta=0 W=1.9 ++ Cgdo=369.3p Gamma=0 Xj=0 Rd=60.66m Cbd=2.141n ++ Is=52.23E-18 N=2 Kp=10.15u ) diff --git a/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/mos_p.lib b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/mos_p.lib new file mode 100644 index 0000000..2c58d87 --- /dev/null +++ b/FreeEDA/Examples/sedra_smith/chapter_9/example_9.4/mos_p.lib @@ -0,0 +1,6 @@ +.model mos_p PMOS( Cgso=877.2p Tox=100n Rs=70.6m Tt=140n Vto=-3.67 ++ Pb=.8 Rg=.811 Theta=0 Phi=.6 Fc=.5 ++ Delta=0 Vmax=0 Kappa=0 Rds=444.4K Level=3 ++ L=2u Mj=.5 Uo=300 Eta=0 W=1.9 ++ Cgdo=369.3p Gamma=0 Xj=0 Rd=60.66m Cbd=2.141n ++ Is=52.23E-18 N=2 Kp=10.15u ) \ No newline at end of file diff --git a/FreeEDA/Examples/simpleTTL/analysis b/FreeEDA/Examples/simpleTTL/analysis new file mode 100644 index 0000000..bf5e632 --- /dev/null +++ b/FreeEDA/Examples/simpleTTL/analysis @@ -0,0 +1 @@ +.tran 10e-09 1e-06 0e-00 diff --git a/FreeEDA/Examples/simpleTTL/simpleTTL-cache.bak b/FreeEDA/Examples/simpleTTL/simpleTTL-cache.bak new file mode 100644 index 0000000..4bb51e9 --- /dev/null +++ b/FreeEDA/Examples/simpleTTL/simpleTTL-cache.bak @@ -0,0 +1,148 @@ +EESchema-LIBRARY Version 2.3 Date: Thursday 20 December 2012 12:04:47 AM IST +#encoding utf-8 +# +# 74LS00 +# +DEF 74LS00 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS00" 0 -100 60 H V C CNN +ALIAS 74LS37 7400 74HCT00 74HC00 +$FPLIST + 14DIP300* + SO14* +$ENDFPLIST +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O I +X ~ 4 -600 100 300 R 60 60 2 1 I +X ~ 5 -600 -100 300 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O I +X ~ 8 600 0 300 L 60 60 3 1 O I +X ~ 9 -600 100 300 R 60 60 3 1 I +X ~ 10 -600 -100 300 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O I +X ~ 12 -600 100 300 R 60 60 4 1 I +X ~ 13 -600 -100 300 R 60 60 4 1 I +A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 +A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 +A -10 -141 340 244 883 0 2 0 N 300 0 0 200 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O +X ~ 4 -600 100 370 R 60 60 2 2 I I +X ~ 5 -600 -100 370 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O +X ~ 8 600 0 300 L 60 60 3 2 O +X ~ 9 -600 100 370 R 60 60 3 2 I I +X ~ 10 -600 -100 370 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O +X ~ 12 -600 100 370 R 60 60 4 2 I I +X ~ 13 -600 -100 370 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/simpleTTL/simpleTTL-cache.lib b/FreeEDA/Examples/simpleTTL/simpleTTL-cache.lib new file mode 100644 index 0000000..bd572f0 --- /dev/null +++ b/FreeEDA/Examples/simpleTTL/simpleTTL-cache.lib @@ -0,0 +1,148 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 02 April 2013 03:01:00 PM IST +#encoding utf-8 +# +# 74LS00 +# +DEF 74LS00 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS00" 0 -100 60 H V C CNN +ALIAS 74LS37 7400 74HCT00 74HC00 +$FPLIST + 14DIP300* + SO14* +$ENDFPLIST +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O I +X ~ 4 -600 100 300 R 60 60 2 1 I +X ~ 5 -600 -100 300 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O I +X ~ 8 600 0 300 L 60 60 3 1 O I +X ~ 9 -600 100 300 R 60 60 3 1 I +X ~ 10 -600 -100 300 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O I +X ~ 12 -600 100 300 R 60 60 4 1 I +X ~ 13 -600 -100 300 R 60 60 4 1 I +A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 +A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 +A -10 -141 340 244 883 0 2 0 N 300 0 0 200 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O +X ~ 4 -600 100 370 R 60 60 2 2 I I +X ~ 5 -600 -100 370 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O +X ~ 8 600 0 300 L 60 60 3 2 O +X ~ 9 -600 100 370 R 60 60 3 2 I I +X ~ 10 -600 -100 370 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O +X ~ 12 -600 100 370 R 60 60 4 2 I I +X ~ 13 -600 -100 370 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/simpleTTL/simpleTTL.bak b/FreeEDA/Examples/simpleTTL/simpleTTL.bak new file mode 100644 index 0000000..2bf0b11 --- /dev/null +++ b/FreeEDA/Examples/simpleTTL/simpleTTL.bak @@ -0,0 +1,166 @@ +EESchema Schematic File Version 2 date Thursday 20 December 2012 12:04:47 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:digitalXSpice +LIBS:analogXSpice +LIBS:simpleTTL-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5550 3450 +Wire Wire Line + 5550 3300 5550 3600 +Wire Wire Line + 2950 4600 5550 4600 +Connection ~ 4500 4600 +Wire Wire Line + 4500 4300 4500 4600 +Wire Wire Line + 3700 4600 3700 4450 +Connection ~ 2950 4600 +Wire Wire Line + 2950 3350 4150 3350 +Wire Wire Line + 2950 4250 2950 4800 +Wire Wire Line + 3700 3550 4150 3550 +Connection ~ 3700 4600 +Wire Wire Line + 4550 2900 4550 3250 +Wire Wire Line + 3450 3350 3450 3250 +Connection ~ 3450 3350 +Wire Wire Line + 5550 3450 5350 3450 +Wire Wire Line + 5550 4600 5550 4100 +$Comp +L VPLOT8_1 U2 +U 2 1 50CEBA04 +P 5550 3000 +F 0 "U2" H 5400 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 5700 3100 50 0000 C CNN + 2 5550 3000 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 50CEBA01 +P 3450 2950 +F 0 "U2" H 3300 3050 50 0000 C CNN +F 1 "VPLOT8_1" H 3600 3050 50 0000 C CNN + 1 3450 2950 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 50862FAD +P 4550 2900 +F 0 "#FLG01" H 4550 3170 30 0001 C CNN +F 1 "PWR_FLAG" H 4550 3130 30 0000 C CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 50862FA6 +P 4500 4300 +F 0 "#FLG02" H 4500 4570 30 0001 C CNN +F 1 "PWR_FLAG" H 4500 4530 30 0000 C CNN + 1 4500 4300 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50862F73 +P 5550 3850 +F 0 "R1" V 5630 3850 50 0000 C CNN +F 1 "1000" V 5550 3850 50 0000 C CNN + 1 5550 3850 + 1 0 0 -1 +$EndComp +$Comp +L PULSE v1 +U 1 1 50862F55 +P 2950 3800 +F 0 "v1" H 2750 3900 60 0000 C CNN +F 1 "PULSE" H 2750 3750 60 0000 C CNN +F 2 "R1" H 2650 3800 60 0000 C CNN + 1 2950 3800 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 50862CF3 +P 2950 4800 +F 0 "#PWR03" H 2950 4800 30 0001 C CNN +F 1 "GND" H 2950 4730 30 0001 C CNN + 1 2950 4800 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 50862BA3 +P 3700 4000 +F 0 "v2" H 3500 4100 60 0000 C CNN +F 1 "5" H 3500 3950 60 0000 C CNN +F 2 "R1" H 3400 4000 60 0000 C CNN + 1 3700 4000 + 1 0 0 -1 +$EndComp +$Comp +L 7400 U1 +U 3 1 50862B5B +P 4750 3450 +F 0 "U1" H 4750 3500 60 0000 C CNN +F 1 "7400" H 4750 3350 60 0000 C CNN + 3 4750 3450 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/simpleTTL/simpleTTL.cir b/FreeEDA/Examples/simpleTTL/simpleTTL.cir new file mode 100644 index 0000000..b4463d3 --- /dev/null +++ b/FreeEDA/Examples/simpleTTL/simpleTTL.cir @@ -0,0 +1,13 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 02 April 2013 03:00:52 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +XU2 1 5 VPLOT8_1 +R1 5 0 1000 +v1 1 0 PULSE +v2 4 0 5 +XU1 0 5 1 4 3 7400 + +.end diff --git a/FreeEDA/Examples/simpleTTL/simpleTTL.cir.ckt b/FreeEDA/Examples/simpleTTL/simpleTTL.cir.ckt new file mode 100644 index 0000000..7bbb5a4 --- /dev/null +++ b/FreeEDA/Examples/simpleTTL/simpleTTL.cir.ckt @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 20 december 2012 12:05:00 am ist + +* Plotting option vplot8_1 +r1 5 0 1000 +v1 1 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) +v2 4 0 5 +* 7400 +a1 [1] [1_in] u1adc +a2 [4] [4_in] u1adc +a3 [1_in 4_in] 5_out u1 +a4 [5_out] [5] u1dac +.model u1 d_nand +.model u1adc adc_bridge(in_low=0.8 in_high=2.0) +.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) + +.tran 10e-09 1e-06 0e-00 +.plot v(1) v(5) +.end diff --git a/FreeEDA/Examples/simpleTTL/simpleTTL.cir.out b/FreeEDA/Examples/simpleTTL/simpleTTL.cir.out new file mode 100644 index 0000000..666b204 --- /dev/null +++ b/FreeEDA/Examples/simpleTTL/simpleTTL.cir.out @@ -0,0 +1,23 @@ +* eeschema netlist version 1.1 (spice format) creation date: thursday 20 december 2012 12:05:00 am ist + +* Plotting option vplot8_1 +r1 5 0 1000 +v1 1 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) +v2 4 0 5 +* 7400 +a1 [1] [1_in] u1adc +a2 [4] [4_in] u1adc +a3 [1_in 4_in] 5_out u1 +a4 [5_out] [5] u1dac +.model u1 d_nand +.model u1adc adc_bridge(in_low=0.8 in_high=2.0) +.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) + +.tran 10e-09 1e-06 0e-00 + +* Control Statements +.control +run +plot v(1) v(5) +.endc +.end diff --git a/FreeEDA/Examples/simpleTTL/simpleTTL.pro b/FreeEDA/Examples/simpleTTL/simpleTTL.pro new file mode 100644 index 0000000..b578a82 --- /dev/null +++ b/FreeEDA/Examples/simpleTTL/simpleTTL.pro @@ -0,0 +1,73 @@ +update=Tuesday 18 December 2012 10:13:38 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=digitalXSpice +LibName39=analogXSpice diff --git a/FreeEDA/Examples/simpleTTL/simpleTTL.proj b/FreeEDA/Examples/simpleTTL/simpleTTL.proj new file mode 100644 index 0000000..72370e2 --- /dev/null +++ b/FreeEDA/Examples/simpleTTL/simpleTTL.proj @@ -0,0 +1 @@ +schematicFile simpleTTL.sch diff --git a/FreeEDA/Examples/simpleTTL/simpleTTL.sch b/FreeEDA/Examples/simpleTTL/simpleTTL.sch new file mode 100644 index 0000000..cb6e4f2 --- /dev/null +++ b/FreeEDA/Examples/simpleTTL/simpleTTL.sch @@ -0,0 +1,157 @@ +EESchema Schematic File Version 2 date Tuesday 02 April 2013 03:01:00 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:simpleTTL-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "2 apr 2013" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5550 3450 +Wire Wire Line + 5550 3300 5550 3600 +Wire Wire Line + 2950 4600 5550 4600 +Connection ~ 4500 4600 +Wire Wire Line + 4500 4300 4500 4600 +Wire Wire Line + 3700 4600 3700 4450 +Connection ~ 2950 4600 +Wire Wire Line + 2950 3350 4150 3350 +Wire Wire Line + 2950 4250 2950 4800 +Wire Wire Line + 3700 3550 4150 3550 +Connection ~ 3700 4600 +Wire Wire Line + 4550 2900 4550 3250 +Wire Wire Line + 3450 3350 3450 3250 +Connection ~ 3450 3350 +Wire Wire Line + 5550 3450 5350 3450 +Wire Wire Line + 5550 4600 5550 4100 +$Comp +L VPLOT8_1 U2 +U 2 1 50CEBA04 +P 5550 3000 +F 0 "U2" H 5400 3100 50 0000 C CNN +F 1 "VPLOT8_1" H 5700 3100 50 0000 C CNN + 2 5550 3000 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U2 +U 1 1 50CEBA01 +P 3450 2950 +F 0 "U2" H 3300 3050 50 0000 C CNN +F 1 "VPLOT8_1" H 3600 3050 50 0000 C CNN + 1 3450 2950 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 50862FAD +P 4550 2900 +F 0 "#FLG01" H 4550 3170 30 0001 C CNN +F 1 "PWR_FLAG" H 4550 3130 30 0000 C CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG02 +U 1 1 50862FA6 +P 4500 4300 +F 0 "#FLG02" H 4500 4570 30 0001 C CNN +F 1 "PWR_FLAG" H 4500 4530 30 0000 C CNN + 1 4500 4300 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50862F73 +P 5550 3850 +F 0 "R1" V 5630 3850 50 0000 C CNN +F 1 "1000" V 5550 3850 50 0000 C CNN + 1 5550 3850 + 1 0 0 -1 +$EndComp +$Comp +L PULSE v1 +U 1 1 50862F55 +P 2950 3800 +F 0 "v1" H 2750 3900 60 0000 C CNN +F 1 "PULSE" H 2750 3750 60 0000 C CNN +F 2 "R1" H 2650 3800 60 0000 C CNN + 1 2950 3800 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 50862CF3 +P 2950 4800 +F 0 "#PWR03" H 2950 4800 30 0001 C CNN +F 1 "GND" H 2950 4730 30 0001 C CNN + 1 2950 4800 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 50862BA3 +P 3700 4000 +F 0 "v2" H 3500 4100 60 0000 C CNN +F 1 "5" H 3500 3950 60 0000 C CNN +F 2 "R1" H 3400 4000 60 0000 C CNN + 1 3700 4000 + 1 0 0 -1 +$EndComp +$Comp +L 7400 U1 +U 3 1 50862B5B +P 4750 3450 +F 0 "U1" H 4750 3500 60 0000 C CNN +F 1 "7400" H 4750 3350 60 0000 C CNN + 3 4750 3450 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/slewRateExample/analysis b/FreeEDA/Examples/slewRateExample/analysis new file mode 100644 index 0000000..f635959 --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/analysis @@ -0,0 +1 @@ +.tran 1e-09 1e-06 0e-00 diff --git a/FreeEDA/Examples/slewRateExample/slewRateExample-cache.bak b/FreeEDA/Examples/slewRateExample/slewRateExample-cache.bak new file mode 100644 index 0000000..96fc3bb --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/slewRateExample-cache.bak @@ -0,0 +1,101 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 03:22:05 PM IST +#encoding utf-8 +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/slewRateExample/slewRateExample-cache.lib b/FreeEDA/Examples/slewRateExample/slewRateExample-cache.lib new file mode 100644 index 0000000..eb08e6b --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/slewRateExample-cache.lib @@ -0,0 +1,101 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 03:24:18 PM IST +#encoding utf-8 +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/slewRateExample/slewRateExample.bak b/FreeEDA/Examples/slewRateExample/slewRateExample.bak new file mode 100644 index 0000000..1f8a1ee --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/slewRateExample.bak @@ -0,0 +1,193 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 03:22:05 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:slewRateExample-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PULSE v1 +U 1 1 50CEEB0C +P 4300 4100 +F 0 "v1" H 4100 4200 60 0000 C CNN +F 1 "PULSE" H 4100 4050 60 0000 C CNN +F 2 "R1" H 4000 4100 60 0000 C CNN + 1 4300 4100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6850 3100 6850 3650 +Connection ~ 6850 3400 +Connection ~ 4300 4650 +Wire Wire Line + 4300 4650 4600 4650 +Wire Wire Line + 4600 4650 4600 4400 +Wire Wire Line + 6850 3400 6300 3400 +Wire Wire Line + 4300 4550 4300 4700 +Wire Wire Line + 4900 3500 5300 3500 +Wire Wire Line + 4300 3650 4300 3500 +Wire Wire Line + 4300 3500 4400 3500 +Wire Wire Line + 5300 3300 4300 3300 +Wire Wire Line + 4300 3300 4300 3400 +Wire Wire Line + 5150 3500 5150 4050 +Wire Wire Line + 5150 4050 5550 4050 +Connection ~ 5150 3500 +Wire Wire Line + 6850 4150 6850 4400 +Wire Wire Line + 6050 4050 6550 4050 +Wire Wire Line + 6550 4050 6550 3400 +Connection ~ 6550 3400 +Wire Wire Line + 3400 3100 3400 3550 +Wire Wire Line + 3400 3550 4300 3550 +Connection ~ 4300 3550 +$Comp +L VPLOT8_1 U1 +U 2 1 50CEB089 +P 6850 2800 +F 0 "U1" H 6700 2900 50 0000 C CNN +F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN + 2 6850 2800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50CEB075 +P 3400 2800 +F 0 "U1" H 3250 2900 50 0000 C CNN +F 1 "VPLOT8_1" H 3550 2900 50 0000 C CNN + 1 3400 2800 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 508245D2 +P 4600 4400 +F 0 "#FLG01" H 4600 4670 30 0001 C CNN +F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN + 1 4600 4400 + 1 0 0 -1 +$EndComp +$Comp +L UA741 X1 +U 1 1 50824595 +P 5800 3400 +F 0 "X1" H 5950 3550 60 0000 C CNN +F 1 "UA741" H 5950 3650 60 0000 C CNN + 1 5800 3400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 508240CB +P 4300 3400 +F 0 "#PWR02" H 4300 3400 30 0001 C CNN +F 1 "GND" H 4300 3330 30 0001 C CNN + 1 4300 3400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 508240B7 +P 4300 4700 +F 0 "#PWR03" H 4300 4700 30 0001 C CNN +F 1 "GND" H 4300 4630 30 0001 C CNN + 1 4300 4700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 508240AD +P 6850 4400 +F 0 "#PWR04" H 6850 4400 30 0001 C CNN +F 1 "GND" H 6850 4330 30 0001 C CNN + 1 6850 4400 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50824073 +P 6850 3900 +F 0 "R3" V 6930 3900 50 0000 C CNN +F 1 "10000" V 6850 3900 50 0000 C CNN + 1 6850 3900 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50824062 +P 4650 3500 +F 0 "R1" V 4730 3500 50 0000 C CNN +F 1 "1000" V 4650 3500 50 0000 C CNN + 1 4650 3500 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 50824045 +P 5800 4050 +F 0 "R2" V 5880 4050 50 0000 C CNN +F 1 "2000" V 5800 4050 50 0000 C CNN + 1 5800 4050 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/slewRateExample/slewRateExample.cir b/FreeEDA/Examples/slewRateExample/slewRateExample.cir new file mode 100644 index 0000000..67bfed1 --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/slewRateExample.cir @@ -0,0 +1,14 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 03:24:15 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +v1 2 0 PULSE +U1 2 3 VPLOT8_1 +X1 4 0 3 UA741 +R3 3 0 10000 +R1 4 2 1000 +R2 3 4 2000 + +.end diff --git a/FreeEDA/Examples/slewRateExample/slewRateExample.cir.ckt b/FreeEDA/Examples/slewRateExample/slewRateExample.cir.ckt new file mode 100644 index 0000000..99770a5 --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/slewRateExample.cir.ckt @@ -0,0 +1,13 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 03:24:15 pm ist +.include ua741.sub + +v1 2 0 pulse(0 5 0 0 0 0.5e-4 1e-4) +* Plotting option vplot8_1 +x1 4 0 3 ua741 +r3 3 0 10000 +r1 4 2 1000 +r2 3 4 2000 + +.tran 1e-09 1e-06 0e-00 +.plot v(2) v(3) +.end diff --git a/FreeEDA/Examples/slewRateExample/slewRateExample.cir.out b/FreeEDA/Examples/slewRateExample/slewRateExample.cir.out new file mode 100644 index 0000000..c771986 --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/slewRateExample.cir.out @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 03:24:15 pm ist +.include ua741.sub + +v1 2 0 pulse(0 5 0 0 0 0.5e-4 1e-4) +* Plotting option vplot8_1 +x1 4 0 3 ua741 +r3 3 0 10000 +r1 4 2 1000 +r2 3 4 2000 + +.tran 1e-09 1e-06 0e-00 + +* Control Statements +.control +run +plot v(2) v(3) +.endc +.end diff --git a/FreeEDA/Examples/slewRateExample/slewRateExample.cmp b/FreeEDA/Examples/slewRateExample/slewRateExample.cmp new file mode 100644 index 0000000..c3e04af --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/slewRateExample.cmp @@ -0,0 +1,38 @@ +Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Saturday 20 October 2012 11:59:17 AM IST + +BeginCmp +TimeStamp = /50824062; +Reference = R1; +ValeurCmp = 1000; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50824045; +Reference = R2; +ValeurCmp = 2000; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50824073; +Reference = R3; +ValeurCmp = 10000; +IdModule = ; +EndCmp + +BeginCmp +TimeStamp = /50824091; +Reference = v1; +ValeurCmp = SINE; +IdModule = R1; +EndCmp + +BeginCmp +TimeStamp = /50823E96; +Reference = X1; +ValeurCmp = LM741; +IdModule = DIP-8__300; +EndCmp + +EndListe diff --git a/FreeEDA/Examples/slewRateExample/slewRateExample.net b/FreeEDA/Examples/slewRateExample/slewRateExample.net new file mode 100644 index 0000000..938591e --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/slewRateExample.net @@ -0,0 +1,70 @@ +# EESchema Netlist Version 1.1 created Saturday 20 October 2012 12:03:26 PM IST +( + ( /50824595 $noname X1 UA741 {Lib=UA741} + ( 2 N-000004 ) + ( 3 GND ) + ( 6 N-000001 ) + ) + ( /50824091 R1 v1 SINE {Lib=SINE} + ( 1 N-000002 ) + ( 2 GND ) + ) + ( /50824073 $noname R3 10000 {Lib=R} + ( 1 N-000001 ) + ( 2 GND ) + ) + ( /50824062 $noname R1 1000 {Lib=R} + ( 1 N-000004 ) + ( 2 N-000002 ) + ) + ( /50824045 $noname R2 2000 {Lib=R} + ( 1 N-000001 ) + ( 2 N-000004 ) + ) +) +* +{ Allowed footprints by component: +$component X1 + DIP-8__300 +$endlist +$component v1 + 1_pin +$endlist +$component R3 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R1 + R? + SM0603 + SM0805 + R?-* +$endlist +$component R2 + R? + SM0603 + SM0805 + R?-* +$endlist +$endfootprintlist +} +{ Pin List by Nets +Net 1 "" "" + R2 1 + X1 6 + R3 1 +Net 2 "" "" + R1 2 + v1 1 +Net 3 "GND" "GND" + X1 3 + v1 2 + R3 2 +Net 4 "" "" + X1 2 + R1 1 + R2 2 +} +#End diff --git a/FreeEDA/Examples/slewRateExample/slewRateExample.pro b/FreeEDA/Examples/slewRateExample/slewRateExample.pro new file mode 100644 index 0000000..0874a6b --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/slewRateExample.pro @@ -0,0 +1,71 @@ +update=Saturday 20 October 2012 07:46:26 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice diff --git a/FreeEDA/Examples/slewRateExample/slewRateExample.proj b/FreeEDA/Examples/slewRateExample/slewRateExample.proj new file mode 100644 index 0000000..c78c533 --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/slewRateExample.proj @@ -0,0 +1 @@ +schematicFile InvertingAmplifier.sch diff --git a/FreeEDA/Examples/slewRateExample/slewRateExample.sch b/FreeEDA/Examples/slewRateExample/slewRateExample.sch new file mode 100644 index 0000000..4508864 --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/slewRateExample.sch @@ -0,0 +1,193 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 03:24:18 PM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:slewRateExample-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PULSE v1 +U 1 1 50CEEB0C +P 4300 4100 +F 0 "v1" H 4100 4200 60 0000 C CNN +F 1 "PULSE" H 4100 4050 60 0000 C CNN +F 2 "R1" H 4000 4100 60 0000 C CNN + 1 4300 4100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6850 3100 6850 3650 +Connection ~ 6850 3400 +Connection ~ 4300 4650 +Wire Wire Line + 4300 4650 4600 4650 +Wire Wire Line + 4600 4650 4600 4400 +Wire Wire Line + 6850 3400 6300 3400 +Wire Wire Line + 4300 4550 4300 4700 +Wire Wire Line + 4900 3500 5300 3500 +Wire Wire Line + 4300 3650 4300 3500 +Wire Wire Line + 4300 3500 4400 3500 +Wire Wire Line + 5300 3300 4300 3300 +Wire Wire Line + 4300 3300 4300 3400 +Wire Wire Line + 5150 3500 5150 4050 +Wire Wire Line + 5150 4050 5550 4050 +Connection ~ 5150 3500 +Wire Wire Line + 6850 4150 6850 4400 +Wire Wire Line + 6050 4050 6550 4050 +Wire Wire Line + 6550 4050 6550 3400 +Connection ~ 6550 3400 +Wire Wire Line + 3400 3100 3400 3550 +Wire Wire Line + 3400 3550 4300 3550 +Connection ~ 4300 3550 +$Comp +L VPLOT8_1 U1 +U 2 1 50CEB089 +P 6850 2800 +F 0 "U1" H 6700 2900 50 0000 C CNN +F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN + 2 6850 2800 + 1 0 0 -1 +$EndComp +$Comp +L VPLOT8_1 U1 +U 1 1 50CEB075 +P 3400 2800 +F 0 "U1" H 3250 2900 50 0000 C CNN +F 1 "VPLOT8_1" H 3550 2900 50 0000 C CNN + 1 3400 2800 + 1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 508245D2 +P 4600 4400 +F 0 "#FLG01" H 4600 4670 30 0001 C CNN +F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN + 1 4600 4400 + 1 0 0 -1 +$EndComp +$Comp +L UA741 X1 +U 1 1 50824595 +P 5800 3400 +F 0 "X1" H 5950 3550 60 0000 C CNN +F 1 "UA741" H 5950 3650 60 0000 C CNN + 1 5800 3400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 508240CB +P 4300 3400 +F 0 "#PWR02" H 4300 3400 30 0001 C CNN +F 1 "GND" H 4300 3330 30 0001 C CNN + 1 4300 3400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 508240B7 +P 4300 4700 +F 0 "#PWR03" H 4300 4700 30 0001 C CNN +F 1 "GND" H 4300 4630 30 0001 C CNN + 1 4300 4700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 508240AD +P 6850 4400 +F 0 "#PWR04" H 6850 4400 30 0001 C CNN +F 1 "GND" H 6850 4330 30 0001 C CNN + 1 6850 4400 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50824073 +P 6850 3900 +F 0 "R3" V 6930 3900 50 0000 C CNN +F 1 "10000" V 6850 3900 50 0000 C CNN + 1 6850 3900 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50824062 +P 4650 3500 +F 0 "R1" V 4730 3500 50 0000 C CNN +F 1 "1000" V 4650 3500 50 0000 C CNN + 1 4650 3500 + 0 1 1 0 +$EndComp +$Comp +L R R2 +U 1 1 50824045 +P 5800 4050 +F 0 "R2" V 5880 4050 50 0000 C CNN +F 1 "2000" V 5800 4050 50 0000 C CNN + 1 5800 4050 + 0 1 1 0 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/slewRateExample/ua741-cache.bak b/FreeEDA/Examples/slewRateExample/ua741-cache.bak new file mode 100644 index 0000000..1ac0925 --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/ua741-cache.bak @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 19 November 2012 12:14:01 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 I +X ~ 2 250 0 100 L 30 30 2 1 I +X ~ 3 250 0 100 L 30 30 3 1 I +X ~ 4 250 0 100 L 30 30 4 1 I +X ~ 5 250 0 100 L 30 30 5 1 I +X ~ 6 250 0 100 L 30 30 6 1 I +X ~ 7 250 0 100 L 30 30 7 1 I +X ~ 8 250 0 100 L 30 30 8 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/slewRateExample/ua741-cache.lib b/FreeEDA/Examples/slewRateExample/ua741-cache.lib new file mode 100644 index 0000000..e2ece32 --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/ua741-cache.lib @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:17:01 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/Examples/slewRateExample/ua741.bak b/FreeEDA/Examples/slewRateExample/ua741.bak new file mode 100644 index 0000000..5237bd8 --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 19 November 2012 12:14:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG1 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG1" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR1 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR1" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/slewRateExample/ua741.cir b/FreeEDA/Examples/slewRateExample/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/Examples/slewRateExample/ua741.cir.ckt b/FreeEDA/Examples/slewRateExample/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/slewRateExample/ua741.cir.out b/FreeEDA/Examples/slewRateExample/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/Examples/slewRateExample/ua741.pro b/FreeEDA/Examples/slewRateExample/ua741.pro new file mode 100644 index 0000000..1821b88 --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/ua741.pro @@ -0,0 +1,71 @@ +update=Sunday 18 November 2012 03:20:54 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice diff --git a/FreeEDA/Examples/slewRateExample/ua741.sch b/FreeEDA/Examples/slewRateExample/ua741.sch new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/ua741.sch @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/Examples/slewRateExample/ua741.sub b/FreeEDA/Examples/slewRateExample/ua741.sub new file mode 100644 index 0000000..1edba9f --- /dev/null +++ b/FreeEDA/Examples/slewRateExample/ua741.sub @@ -0,0 +1,11 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 + +.ends ua741 \ No newline at end of file diff --git a/FreeEDA/LPCSim/LPCSim/ACAnalysis.sci b/FreeEDA/LPCSim/LPCSim/ACAnalysis.sci new file mode 100644 index 0000000..79d9796 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ACAnalysis.sci @@ -0,0 +1,79 @@ +// ACAnalysis.sci is a scilab file to perform AC Analysis. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +function [A,B,x]=ACAnalysis(A,B,f) +// Modify Sweep Source Value and update matrices + [C,d]=buildMatricesAC(A,B,f); + +// Find node potetial and current through devices whose device characteristic can not be expressed in terms of voltage + x=findNodePotential(C,d); + +// Find branch voltage from node potential + voltage=findBranchVoltage(x); + +// Find branch current from branch voltage using device characteristic + current=findBranchCurrent(x,voltage); +endfunction + +function [C,d]=buildMatricesAC(A,B,f); + global g; + pi=3.14; + _C=1; + Edges=edge_number(g); + Nodes=node_number(g); + [rows cols]=size(A); + A2 = zeros(rows,cols); + b2 = zeros(cols,1); + for edge_cnt = 1:Edges, + if(g.edges.data.type(edge_cnt)=='C') + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + if(~(source==0)) + A2(source,source) = A2(source,source)+2*pi*f*cValue(_C); + end + if(~(sink==0)) + A2(sink,sink) = A2(sink,sink)+2*pi*f*cValue(_C); + end + if(~(sink==0) & ~(source==0)) + A2(source,sink) = A2(source,sink)-2*pi*f*cValue(_C); + A2(sink,source) = A2(sink,source)-2*pi*f*cValue(_C); + end + _C=_C+1; + end + end + C=[A -A2;A2 A]; + d=[B;b2]; +endfunction + +function buildDCOutput(x,s,itr) + global vPrintList; + global iPrintList; + global sweepArray; + global vPrintArray; + global iPrintArray; + sweepArray(itr)=s; +// Store voltage output for printing + if(~(vPrintList(1)==0)) + fill_vPrintArray(x,itr); + vPrintArray(itr,1)=s; + end + +// Store voltage output for plotting + if(~(vPlotList(1)==0)) + fill_vPlotArray(x,itr); + end + +// Store current output for printing + if(~(iPrintList(1)==0)) + fill_iPrintArray(x,itr); + iPrintArray(itr,1)=s; + end + +// Store current output for plotting + if(~(iPlotList(1)==0)) + fill_iPlotArray(x,itr); + end +endfunction diff --git a/FreeEDA/LPCSim/LPCSim/DCAnalysis.sci b/FreeEDA/LPCSim/LPCSim/DCAnalysis.sci new file mode 100644 index 0000000..7a2c691 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/DCAnalysis.sci @@ -0,0 +1,58 @@ +// DCAnalysis.sci is a scilab file to perform DC Analysis. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +function [A,B,x]=DCAnalysis(A,B,_X,s) +// Modify Sweep Source Value and update matrices + [A,B]=modifySourceValue(A,B,s); +// Perform Operating Point Analysis on static circuit + [A,B,x]=OPAnalysis(A,B); +endfunction + +function [A,B]=modifySourceValue(A,B,s); + global g; + global wave; + waveIndex=1; + _T=1; + Edges=edge_number(g); + Nodes=node_number(g); + for edge_cnt = 1:Edges, + if(g.edges.data.type(edge_cnt)=='V') + tempWave=wave(waveIndex); + if(tempWave(1)=='dc') + waveIndex=waveIndex+1; + elseif(tempWave(1)=='sweep') + waveIndex=waveIndex+1; + g.edges.data.value(edge_cnt)=s; + B(Nodes-1+_T) = g.edges.data.value(edge_cnt); + elseif(tempWave(1)=='sine') + waveIndex=waveIndex+1; + end + _T=_T+1; + clear tempWave; + elseif(g.edges.data.type(edge_cnt)=='I') + tempWave=wave(waveIndex); + if(tempWave(1)=='dc') + waveIndex=waveIndex+1; + elseif(tempWave(1)=='sine') + waveIndex=waveIndex+1; + elseif(tempWave(1)=='sweep') + waveIndex=waveIndex+1; + oldCurrent=g.edges.data.value(edge_cnt); + g.edges.data.value(edge_cnt)=s; + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + if(~(source==0)) + B(source) = B(source)-(g.edges.data.value(edge_cnt)-oldCurrent); + end + if(~(sink==0)) + B(sink) =B(sink) + (g.edges.data.value(edge_cnt)-oldCurrent); + end + end + clear tempWave; + end + end +endfunction + diff --git a/FreeEDA/LPCSim/LPCSim/Main.sci b/FreeEDA/LPCSim/LPCSim/Main.sci new file mode 100644 index 0000000..80645a9 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/Main.sci @@ -0,0 +1,293 @@ +// Main.sci is a main scilab file of a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// It is modified by Yogesh Dilip Save for FreeEDA Software on October 2012 +warning('off'); +clear +global('LPCSim_HOME') +FreeEDA_HOME="/home/hardik/FreeEDA" +LPCSim_HOME=FreeEDA_HOME+'/LPCSim/LPCSim/' +//%format('e',10); +MaxNRitr=100; +symbolic=%F; +displayMatrix=%F; + +// Open the circuit file +try + fid = mopen(LPCSim_HOME+"option", 'r'); + if (fid == -1) + error("cannot open file for reading"); + end + tempStr=mgetl(fid,1); + tempStr=stripblanks(tempStr); + [option] = sscanf(tempStr, "%d"); +catch + disp("Can not open option. Running default mode"); + option=1 +end + +if (option == 1) + symbolic=%T +elseif (option == 2) + symbolic=%T + displayMatrix=%T +end + +// Metanet Graph library + // exec('metanet-0.4/loader.sce',-1); + +// Supporting function library +exec(LPCSim_HOME+'support/atof.sci',-1); +exec(LPCSim_HOME+'support/findIndex.sci',-1); + +exec(LPCSim_HOME+'lib/mos.sci',-1); +exec(LPCSim_HOME+'readfile.sci',-1); +exec(LPCSim_HOME+'buildMatrices.sci',-1); +exec(LPCSim_HOME+'buildMatricesSymbolic.sci',-1); +exec(LPCSim_HOME+'OpAnalysis.sci',-1); +exec(LPCSim_HOME+'NR.sci',-1); +exec(LPCSim_HOME+'genrateCallingLibF.sci',-1); +exec(LPCSim_HOME+'printSolution.sci',-1); +exec(LPCSim_HOME+'tranAnalysis.sci',-1); +exec(LPCSim_HOME+'DCAnalysis.sci',-1); +exec(LPCSim_HOME+'ACAnalysis.sci',-1); +//getf('LUT/ids.sce'); +fileName = 'ckt/nodalExample.ckt'; +fileName = 'ckt/ModifiednodalExample.ckt'; +fileName = 'ckt/linear.ckt'; +fileName = 'ckt/ForwardBiasedDiode.ckt'; +fileName = 'ckt/bridge.ckt'; +//fileName='ckt/Vsweep.ckt'; +//fileName='ckt/myCompSweep.ckt'; +//fileName='ckt/rc1.ckt'; +//fileName='ckt/rc_ac.ckt' +fileName='ckt/HWRectifierFilter.ckt'; +//fileName = readc_(); +args=sciargs(); +fileName= args(5); + +global('g'); +global('model') +global('wave') +global('cValue','cInitial') +global('vPrintList','vPlotList') +global('iPrintList','iPlotList') +global('initialVoltage') +global('displayNLFlag'); +global('NLFlag'); +global('dynamicFlag'); +global('currentAnalysis') +global('nodeMap') +displayNLFlag=%T; +dynamicFlag=%F; +NLFlag=%F; +currentAnalysis=0; + +// Get circuit analysis option from circuit file +[transParameter,sweep,Analysis,_Nodes]=getAnalysisOption(fileName); + +// Read circuit form file and convert it into graph +_T=convertCircuitIntoGraph(fileName,_Nodes); + +// Build Modified Nodal Matrix for linear devices +[A,B]=buildMatrices(_T); + +if symbolic then + mprintf("-----------------------------------------------------------\n"); + mprintf("Simulation of %s: \n",fileName); + [Asymb,Bsymb,Dsymb,Csymb,xsymb,fxsymb]=buildMatricesSymbolic(_T); + if displayMatrix then + mprintf("The system of equations Ax+D_f(w)+C(dx/dt)=b (Symbolically):\n"); + mprintf("Where A, D and C represent matrices corresponding to linear,\n nonlinear and time dependent electrical elements respectively.\n"); + mprintf(" b represents the vector corresponding to sources.\n"); + mprintf("-----------------------------------------------------------\n"); + if dynamicFlag then + disp(fxsymb,"w=",xsymb,"x=",Csymb,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); + elseif NLFlag then + disp(fxsymb,"w=",xsymb,"x=",0,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); + else + disp(fxsymb,"w=",xsymb,"x=",0,"C=",0,"D_f=",Bsymb,"B=",Asymb,"A="); + end + mprintf("The number of equations are %d\n",_Nodes+_T-1); + mprintf("Unknowns:\n"); + mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); + mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); + pause; + end +end + +// Perform Operating Point Analysis on static circuit +if symbolic then + mprintf("-----------------------------------------------------------\n"); + mprintf("Operating Point (DC) Analysis: \n"); + mprintf("All capacitors are open circuited and inductors are short circuited \n"); + [Asymb,Bsymb,Dsymb,xsymb,fxsymb]=buildMatricesSymbStatic(_T); + if displayMatrix then + mprintf("The system of equations Ax+D_f(w))=b (Symbolically):\n"); + mprintf("Where A and D represent matrices corresponding to linear,\n and nonlinear electrical elements respectively.\n"); + mprintf(" b represents the vector corresponding to sources.\n"); + mprintf("-----------------------------------------------------------\n"); + if NLFlag then + disp(fxsymb,"w=",xsymb,"x=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); + else + disp(fxsymb,"w=",xsymb,"x=",0,"D_f=",Bsymb,"B=",Asymb,"A="); + end + mprintf("The number of equations are %d\n",_Nodes+_T-1); + mprintf("Unknowns:\n"); + mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); + mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); + pause; + end +end +[A,B,x]=OPAnalysis(A,B); +if displayMatrix then + mprintf("-----------------------------------------------------------\n"); + mprintf("Operating Point (DC) Analysis: \n"); + mprintf("All capacitors are open circuited and inductors are short circuited \n"); + mprintf("The system of equations Ax=b (Numerically):\n"); + mprintf("-----------------------------------------------------------\n"); + format('e',10); + disp(B,"B=",A,"A="); + pause; +end + +if displayMatrix then + mprintf("-----------------------------------------------------\n"); + mprintf("The solution of the circuit x:\n"); + mprintf("-----------------------------------------------------\n"); + format('e',10); + disp(x,"x="); + pause; +end + +// Find branch voltage from node potential +voltage=findBranchVoltage(x); + +// Find branch current from branch voltage using device characteristic +current=findBranchCurrent(x,voltage); + +// Print the Operating Point Solution +fileName=fileName+".sol"; +Wmode="w"; +printOPSolution(fileName,voltage,current,Wmode); +mprintf("-----------------------------------------------------\n"); +mprintf("The complete solution (Operating Point) of the circuit\n\t is written in %s\n",fileName); +mprintf("-----------------------------------------------------\n"); + +if(Analysis==1) // Transient Analysis + currentAnalysis=1; + mprintf("-----------------------------------------------------\n"); + mprintf("Transient Analysis: \n"); + mprintf("-----------------------------------------------------\n"); + global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray'); + + if symbolic then + [Asymb,Bsymb,Dsymb,Csymb,xsymb,fxsymb]=buildMatricesSymbolic(_T); + if displayMatrix then + mprintf("The system of equations Ax+D_f(w)+C(dx/dt)=b (Symbolically):\n"); + mprintf("Where A, D and C represent matrices corresponding to linear,\n nonlinear and time dependent electrical elements respectively.\n"); + mprintf(" b represents the vector corresponding to sources.\n"); + mprintf("-----------------------------------------------------------\n"); + if dynamicFlag then + disp(fxsymb,"w=",xsymb,"x=",Csymb,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); + elseif NLFlag then + disp(fxsymb,"w=",xsymb,"x=",0,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); + else + disp(fxsymb,"w=",xsymb,"x=",0,"C=",0,"D_f=",Bsymb,"B=",Asymb,"A="); + end + mprintf("The number of equations are %d\n",_Nodes+_T-1); + mprintf("Unknowns:\n"); + mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); + mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); + pause; + end + end + + // Perform Transient Analysis on static circuit + if symbolic then + mprintf("-----------------------------------------------------------\n"); + mprintf("A static circuit at time t: \n"); + [Asymb,Bsymb,Dsymb,xsymb,fxsymb]=buildMatricesSymbStatic(_T); + if displayMatrix then + mprintf("The system of equations Ax+D_f(w))=b (Symbolically):\n"); + mprintf("Where A and D represent matrices corresponding to linear,\n and nonlinear electrical elements respectively.\n"); + mprintf(" b represents the vector corresponding to sources.\n"); + mprintf("-----------------------------------------------------------\n"); + if NLFlag then + disp(fxsymb,"w=",xsymb,"x=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); + else + disp(fxsymb,"w=",xsymb,"x=",0,"D_f=",Bsymb,"B=",Asymb,"A="); + end + mprintf("The number of equations are %d\n",_Nodes+_T-1); + mprintf("Unknowns:\n"); + mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); + mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); + pause; + end + end + + t_start=transParameter(1); + t_end=transParameter(2); + t_step=transParameter(3); + UIC=transParameter(4); + t_itr=(t_end-t_start)/t_step+2; + initArrays(t_itr); + sweepArray = zeros(t_itr,1); + i=1; + // Find Initial condition at t=0 + [x]=setIntialCondition(A,B,x,_T,UIC); + // Store Output Variable for plotting/printing + buildOutput(x,0,i); + i=i+1; + for t=t_start:t_step:t_end + if(i==2) t=t+t_step/100; end; + [A,B,x]=transientAnalysis(A,B,x,t,i); + i=i+1; + end + xaxis='time(sec)'; + printSolution(sweepArray,xaxis,'lin'); +end + +if(Analysis==2) // DC Analysis + global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray'); + s_start=sweep(1); + s_end=sweep(2); + s_step=sweep(3); + s_itr=(s_end-s_start)/s_step+1; + initArrays(s_itr); + sweepArray = zeros(s_itr,1); + i=1; + for s=s_start:s_step:s_end + [A,B,x]=DCAnalysis(A,B,s); + buildOutput(x,s,i); + i=i+1; + end + xaxis='Voltage(V)'; + printSolution(sweepArray,xaxis,'lin'); +end + +if(Analysis==3) // AC Analysis + global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray'); + f_start=sweep(1); + f_end=sweep(2); + f_itr=sweep(3)+1; + axisType=sweep(4); + f_step=(f_end-f_start)/(f_itr-1); + initArrays(f_itr); + sweepArray = zeros(f_itr,1); + i=1; + buildOutput(x,0,i); + i=i+1; + for f=f_start:f_step:f_end + [A,B,x]=ACAnalysis(A,B,f); + buildDCOutput(x,f,i); + i=i+1; + end + xaxis='frequency(Hz)'; + printSolution(sweepArray,xaxis,axisType); +end +clearglobal(); +//quit +/////////////////////////////////////////////////////////////////////////////// diff --git a/FreeEDA/LPCSim/LPCSim/MainInstall.sci b/FreeEDA/LPCSim/LPCSim/MainInstall.sci new file mode 100644 index 0000000..eafdc64 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/MainInstall.sci @@ -0,0 +1,293 @@ +// Main.sci is a main scilab file of a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// It is modified by Yogesh Dilip Save for FreeEDA Software on October 2012 +warning('off'); +clear +global('LPCSim_HOME') +FreeEDA_HOME=set_PATH_to_FreeEDA +LPCSim_HOME=FreeEDA_HOME+'/LPCSim/LPCSim/' +//%format('e',10); +MaxNRitr=100; +symbolic=%F; +displayMatrix=%F; + +// Open the circuit file +try + fid = mopen(LPCSim_HOME+"option", 'r'); + if (fid == -1) + error("cannot open file for reading"); + end + tempStr=mgetl(fid,1); + tempStr=stripblanks(tempStr); + [option] = sscanf(tempStr, "%d"); +catch + disp("Can not open option. Running default mode"); + option=1 +end + +if (option == 1) + symbolic=%T +elseif (option == 2) + symbolic=%T + displayMatrix=%T +end + +// Metanet Graph library + // exec('metanet-0.4/loader.sce',-1); + +// Supporting function library +exec(LPCSim_HOME+'support/atof.sci',-1); +exec(LPCSim_HOME+'support/findIndex.sci',-1); + +exec(LPCSim_HOME+'lib/mos.sci',-1); +exec(LPCSim_HOME+'readfile.sci',-1); +exec(LPCSim_HOME+'buildMatrices.sci',-1); +exec(LPCSim_HOME+'buildMatricesSymbolic.sci',-1); +exec(LPCSim_HOME+'OpAnalysis.sci',-1); +exec(LPCSim_HOME+'NR.sci',-1); +exec(LPCSim_HOME+'genrateCallingLibF.sci',-1); +exec(LPCSim_HOME+'printSolution.sci',-1); +exec(LPCSim_HOME+'tranAnalysis.sci',-1); +exec(LPCSim_HOME+'DCAnalysis.sci',-1); +exec(LPCSim_HOME+'ACAnalysis.sci',-1); +//getf('LUT/ids.sce'); +fileName = 'ckt/nodalExample.ckt'; +fileName = 'ckt/ModifiednodalExample.ckt'; +fileName = 'ckt/linear.ckt'; +fileName = 'ckt/ForwardBiasedDiode.ckt'; +fileName = 'ckt/bridge.ckt'; +//fileName='ckt/Vsweep.ckt'; +//fileName='ckt/myCompSweep.ckt'; +//fileName='ckt/rc1.ckt'; +//fileName='ckt/rc_ac.ckt' +fileName='ckt/HWRectifierFilter.ckt'; +//fileName = readc_(); +args=sciargs(); +fileName= args(5); + +global('g'); +global('model') +global('wave') +global('cValue','cInitial') +global('vPrintList','vPlotList') +global('iPrintList','iPlotList') +global('initialVoltage') +global('displayNLFlag'); +global('NLFlag'); +global('dynamicFlag'); +global('currentAnalysis') +global('nodeMap') +displayNLFlag=%T; +dynamicFlag=%F; +NLFlag=%F; +currentAnalysis=0; + +// Get circuit analysis option from circuit file +[transParameter,sweep,Analysis,_Nodes]=getAnalysisOption(fileName); + +// Read circuit form file and convert it into graph +_T=convertCircuitIntoGraph(fileName,_Nodes); + +// Build Modified Nodal Matrix for linear devices +[A,B]=buildMatrices(_T); + +if symbolic then + mprintf("-----------------------------------------------------------\n"); + mprintf("Simulation of %s: \n",fileName); + [Asymb,Bsymb,Dsymb,Csymb,xsymb,fxsymb]=buildMatricesSymbolic(_T); + if displayMatrix then + mprintf("The system of equations Ax+D_f(w)+C(dx/dt)=b (Symbolically):\n"); + mprintf("Where A, D and C represent matrices corresponding to linear,\n nonlinear and time dependent electrical elements respectively.\n"); + mprintf(" b represents the vector corresponding to sources.\n"); + mprintf("-----------------------------------------------------------\n"); + if dynamicFlag then + disp(fxsymb,"w=",xsymb,"x=",Csymb,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); + elseif NLFlag then + disp(fxsymb,"w=",xsymb,"x=",0,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); + else + disp(fxsymb,"w=",xsymb,"x=",0,"C=",0,"D_f=",Bsymb,"B=",Asymb,"A="); + end + mprintf("The number of equations are %d\n",_Nodes+_T-1); + mprintf("Unknowns:\n"); + mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); + mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); + pause; + end +end + +// Perform Operating Point Analysis on static circuit +if symbolic then + mprintf("-----------------------------------------------------------\n"); + mprintf("Operating Point (DC) Analysis: \n"); + mprintf("All capacitors are open circuited and inductors are short circuited \n"); + [Asymb,Bsymb,Dsymb,xsymb,fxsymb]=buildMatricesSymbStatic(_T); + if displayMatrix then + mprintf("The system of equations Ax+D_f(w))=b (Symbolically):\n"); + mprintf("Where A and D represent matrices corresponding to linear,\n and nonlinear electrical elements respectively.\n"); + mprintf(" b represents the vector corresponding to sources.\n"); + mprintf("-----------------------------------------------------------\n"); + if NLFlag then + disp(fxsymb,"w=",xsymb,"x=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); + else + disp(fxsymb,"w=",xsymb,"x=",0,"D_f=",Bsymb,"B=",Asymb,"A="); + end + mprintf("The number of equations are %d\n",_Nodes+_T-1); + mprintf("Unknowns:\n"); + mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); + mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); + pause; + end +end +[A,B,x]=OPAnalysis(A,B); +if displayMatrix then + mprintf("-----------------------------------------------------------\n"); + mprintf("Operating Point (DC) Analysis: \n"); + mprintf("All capacitors are open circuited and inductors are short circuited \n"); + mprintf("The system of equations Ax=b (Numerically):\n"); + mprintf("-----------------------------------------------------------\n"); + format('e',10); + disp(B,"B=",A,"A="); + pause; +end + +if displayMatrix then + mprintf("-----------------------------------------------------\n"); + mprintf("The solution of the circuit x:\n"); + mprintf("-----------------------------------------------------\n"); + format('e',10); + disp(x,"x="); + pause; +end + +// Find branch voltage from node potential +voltage=findBranchVoltage(x); + +// Find branch current from branch voltage using device characteristic +current=findBranchCurrent(x,voltage); + +// Print the Operating Point Solution +fileName=fileName+".sol"; +Wmode="w"; +printOPSolution(fileName,voltage,current,Wmode); +mprintf("-----------------------------------------------------\n"); +mprintf("The complete solution (Operating Point) of the circuit\n\t is written in %s\n",fileName); +mprintf("-----------------------------------------------------\n"); + +if(Analysis==1) // Transient Analysis + currentAnalysis=1; + mprintf("-----------------------------------------------------\n"); + mprintf("Transient Analysis: \n"); + mprintf("-----------------------------------------------------\n"); + global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray'); + + if symbolic then + [Asymb,Bsymb,Dsymb,Csymb,xsymb,fxsymb]=buildMatricesSymbolic(_T); + if displayMatrix then + mprintf("The system of equations Ax+D_f(w)+C(dx/dt)=b (Symbolically):\n"); + mprintf("Where A, D and C represent matrices corresponding to linear,\n nonlinear and time dependent electrical elements respectively.\n"); + mprintf(" b represents the vector corresponding to sources.\n"); + mprintf("-----------------------------------------------------------\n"); + if dynamicFlag then + disp(fxsymb,"w=",xsymb,"x=",Csymb,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); + elseif NLFlag then + disp(fxsymb,"w=",xsymb,"x=",0,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); + else + disp(fxsymb,"w=",xsymb,"x=",0,"C=",0,"D_f=",Bsymb,"B=",Asymb,"A="); + end + mprintf("The number of equations are %d\n",_Nodes+_T-1); + mprintf("Unknowns:\n"); + mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); + mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); + pause; + end + end + + // Perform Transient Analysis on static circuit + if symbolic then + mprintf("-----------------------------------------------------------\n"); + mprintf("A static circuit at time t: \n"); + [Asymb,Bsymb,Dsymb,xsymb,fxsymb]=buildMatricesSymbStatic(_T); + if displayMatrix then + mprintf("The system of equations Ax+D_f(w))=b (Symbolically):\n"); + mprintf("Where A and D represent matrices corresponding to linear,\n and nonlinear electrical elements respectively.\n"); + mprintf(" b represents the vector corresponding to sources.\n"); + mprintf("-----------------------------------------------------------\n"); + if NLFlag then + disp(fxsymb,"w=",xsymb,"x=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); + else + disp(fxsymb,"w=",xsymb,"x=",0,"D_f=",Bsymb,"B=",Asymb,"A="); + end + mprintf("The number of equations are %d\n",_Nodes+_T-1); + mprintf("Unknowns:\n"); + mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); + mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); + pause; + end + end + + t_start=transParameter(1); + t_end=transParameter(2); + t_step=transParameter(3); + UIC=transParameter(4); + t_itr=(t_end-t_start)/t_step+2; + initArrays(t_itr); + sweepArray = zeros(t_itr,1); + i=1; + // Find Initial condition at t=0 + [x]=setIntialCondition(A,B,x,_T,UIC); + // Store Output Variable for plotting/printing + buildOutput(x,0,i); + i=i+1; + for t=t_start:t_step:t_end + if(i==2) t=t+t_step/100; end; + [A,B,x]=transientAnalysis(A,B,x,t,i); + i=i+1; + end + xaxis='time(sec)'; + printSolution(sweepArray,xaxis,'lin'); +end + +if(Analysis==2) // DC Analysis + global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray'); + s_start=sweep(1); + s_end=sweep(2); + s_step=sweep(3); + s_itr=(s_end-s_start)/s_step+1; + initArrays(s_itr); + sweepArray = zeros(s_itr,1); + i=1; + for s=s_start:s_step:s_end + [A,B,x]=DCAnalysis(A,B,s); + buildOutput(x,s,i); + i=i+1; + end + xaxis='Voltage(V)'; + printSolution(sweepArray,xaxis,'lin'); +end + +if(Analysis==3) // AC Analysis + global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray'); + f_start=sweep(1); + f_end=sweep(2); + f_itr=sweep(3)+1; + axisType=sweep(4); + f_step=(f_end-f_start)/(f_itr-1); + initArrays(f_itr); + sweepArray = zeros(f_itr,1); + i=1; + buildOutput(x,0,i); + i=i+1; + for f=f_start:f_step:f_end + [A,B,x]=ACAnalysis(A,B,f); + buildDCOutput(x,f,i); + i=i+1; + end + xaxis='frequency(Hz)'; + printSolution(sweepArray,xaxis,axisType); +end +clearglobal(); +//quit +/////////////////////////////////////////////////////////////////////////////// diff --git a/FreeEDA/LPCSim/LPCSim/NR.sci b/FreeEDA/LPCSim/LPCSim/NR.sci new file mode 100644 index 0000000..229fb64 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/NR.sci @@ -0,0 +1,233 @@ +// NR.sci is a scilab file to perform linearization of nonlinear element using Newton-Raphson method. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// It is modified by Yogesh Dilip Save for FreeEDA Software on October 2012 + + +function flag=checkForDeviceChar(voltage,current) + global g; + global model; + Edges=edge_number(g); + flag=%t; + X=1; + for edge_cnt = 1:Edges, + if(g.edges.data.type(edge_cnt)=='D') + tempModel=model(X); + Is=tempModel(2); Vt=tempModel(3); + currentByDiodeChar=Is*(exp(voltage(edge_cnt)/Vt)-1); + diodeCurrent=current(edge_cnt)+current(edge_cnt+1); + if(abs(currentByDiodeChar)<1d-9) + err=(diodeCurrent-currentByDiodeChar); + else + err=(diodeCurrent-currentByDiodeChar)*100/currentByDiodeChar; + end + if(abs(err)>0.001) + flag=%f; break; + end + X=X+1; + clear tempModel; + elseif(g.edges.data.type(edge_cnt)=='X') + tempModel=model(X); + generateCallingLibF(tempModel(1)); + exec('getlib.sci',-1); + currentByFunc=func(voltage(edge_cnt),model(X)); + currentByAnalysis=current(edge_cnt)+current(edge_cnt+1); + if(abs(currentByFunc)<1d-9) + err=(currentByAnalysis-currentByFunc); + else + err=(currentByAnalysis-currentByFunc)*100/currentByFunc; + end + if(abs(err)>0.001) + flag=%f; break; + end + X=X+1; + clear tempModel; + elseif(g.edges.data.type(edge_cnt)=='M') + Vgs=voltage(edge_cnt+2); + Vds=voltage(edge_cnt); + tempModel=model(X); + [Vt,beta1]=getMosPara(tempModel); + if(tempModel(1)=='P') + if(Vgs>Vt) //Cut-OFF region + currentByFunc=0; + elseif((Vgs<=Vt) & (Vds<(Vgs-Vt))) // Saturation region + currentByFunc=-beta1/2*(Vgs-Vt)*(Vgs-Vt); + else // Linear region + currentByFunc=-beta1*((Vgs-Vt)*Vds-Vds*Vds/2); + end + else + if(Vgs=Vt) & (Vds>(Vgs-Vt))) // Saturation region + currentByFunc=beta1/2*(Vgs-Vt)*(Vgs-Vt); + else // Linear region + currentByFunc=beta1*((Vgs-Vt)*Vds-Vds*Vds/2); + end + end + currentByAnalysis=current(edge_cnt)+current(edge_cnt+1); + if(abs(currentByFunc)<1d-9) + err=(currentByAnalysis-currentByFunc); + else + err=(currentByAnalysis-currentByFunc)*100/currentByFunc; + end + if(abs(err)>0.0001) + flag=%f; break; + end + X=X+1; + clear tempModel; + end + end +endfunction + +function [A,B]=NR(A,B,voltage,current,NRitr) + global g; + global model; + X=1; + Edges=edge_number(g); + for edge_cnt = 1:Edges, + if(g.edges.data.type(edge_cnt)=='D') + tempModel=model(X); + Is=tempModel(2); Vt=tempModel(3); Vtlimit=80*Vt; // Diode Parameter + tempVoltage=voltage(edge_cnt); + tempCurrent=current(edge_cnt)+current(edge_cnt+1); +// Voltage Limiting + if(~(tempVoltage==0)) + while(tempVoltage > Vtlimit) + tempVoltage = log(tempVoltage); + end + while(tempVoltage < -Vtlimit) + tempVoltage = -log(-tempVoltage); + end + end +// In forword bisaed use diode current to find voltage + if(tempVoltage>=0 & tempCurrent>=0) + tempVoltage = Vt*log(tempCurrent/Is+1); + end +// Update diode conductance and current source + Gnew=Is/Vt*exp(tempVoltage/Vt); + Gupdate=Gnew-g.edges.data.value(edge_cnt) + g.edges.data.value(edge_cnt)=Gnew; + Inew=Is*(exp(tempVoltage/Vt)-1)-Gnew*tempVoltage; + Iupdate=Inew-g.edges.data.value(edge_cnt+1); + g.edges.data.value(edge_cnt+1)=Inew; +// Update matrix A and rhs vector + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + if(~(source==0)) + A(source,source) = A(source,source) + Gupdate; + B(source) = B(source)-Iupdate; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + Gupdate; + B(sink) =B(sink) + Iupdate; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - Gupdate; + A(sink,source) = A(sink,source) - Gupdate; + end + X=X+1; + clear tempModel; + elseif(g.edges.data.type(edge_cnt)=='X') + tempVoltage=voltage(edge_cnt); + tempCurrent=current(edge_cnt)+current(edge_cnt+1); + tempModel=model(X); + generateCallingLibF(tempModel(1)); + exec('getlib.sci',-1); +// Update conductance and current source of nonlinear device + Gnew=jacobian(tempVoltage,model(X)); + Gupdate=Gnew-g.edges.data.value(edge_cnt) + g.edges.data.value(edge_cnt)=Gnew; + Inew=func(tempVoltage,model(X))-Gnew*tempVoltage; + Iupdate=Inew-g.edges.data.value(edge_cnt+1); + g.edges.data.value(edge_cnt+1)=Inew; +// Update matrix A and rhs vector + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + if(~(source==0)) + A(source,source) = A(source,source) + Gupdate; + B(source) = B(source)-Iupdate; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + Gupdate; + B(sink) =B(sink) + Iupdate; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - Gupdate; + A(sink,source) = A(sink,source) - Gupdate; + end + X=X+1; + clear tempModel; + elseif(g.edges.data.type(edge_cnt)=='M') + Vgs=voltage(edge_cnt+2); + Vds=voltage(edge_cnt); + tempModel=model(X); + [Vt,beta1]=getMosPara(tempModel); + Vtlimit=abs(80*Vt); +// MOS Voltage Limiting + if(~(Vgs==0)) + while(Vgs > Vtlimit) + Vgs = log(Vgs) + end + while(Vgs < -Vtlimit) + Vgs = -log(-Vgs) + end + end + if(~(Vds==0)) + while(Vds > Vtlimit) + Vds = log(Vds); + end + while(Vds < -Vtlimit) + Vds = -log(-Vds); + end + end +// Update conductance and current source of MOSFET + if(tempModel(1)=='P') + if(Vgs>Vt) //Cut-OFF region + Gnew=1e-12; + Inew=0; + elseif((Vgs<=Vt) & (Vds<(Vgs-Vt))) // Saturation region + Gnew=1e-12; + Inew=-beta1/2*(Vgs-Vt)*(Vgs-Vt); + else // Linear region + Gnew=abs(beta1*((-Vgs+Vt)+Vds)); + Inew=-beta1/2*Vds*Vds; + end + else + if(Vgs=Vt) & (Vds>(Vgs-Vt))) // Saturation region + Gnew=1e-12; + Inew=beta1/2*(Vgs-Vt)*(Vgs-Vt); + else // Linear region + Gnew=abs(beta1*((Vgs-Vt)-Vds)); + Inew=beta1/2*Vds*Vds; + end + end + Gupdate=Gnew-g.edges.data.value(edge_cnt) + g.edges.data.value(edge_cnt)=Gnew; + Iupdate=Inew-g.edges.data.value(edge_cnt+1); + g.edges.data.value(edge_cnt+1)=Inew; +// Update matrix A and rhs vector + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + if(~(source==0)) + A(source,source) = A(source,source) + Gupdate; + B(source) = B(source)-Iupdate; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + Gupdate; + B(sink) =B(sink) + Iupdate; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - Gupdate; + A(sink,source) = A(sink,source) - Gupdate; + end + X=X+1; + clear tempModel; + end + end +endfunction + diff --git a/FreeEDA/LPCSim/LPCSim/OpAnalysis.sci b/FreeEDA/LPCSim/LPCSim/OpAnalysis.sci new file mode 100644 index 0000000..9049608 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/OpAnalysis.sci @@ -0,0 +1,138 @@ +// OpAnalysis.sci is a scilab file to perform Operating point Analysis. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// It is modified by Yogesh Dilip Save for FreeEDA Software on October 2012 + +function [A,B,x]=OPAnalysis(A,B) + global displayNLFlag; + global g; + global model; + global LPCSim_HOME; +// Find node potetial and current through devices whose device characteristic can not be expressed in terms of voltage + x=findNodePotential(A,B); + +// Find branch voltage from node potential + voltage=findBranchVoltage(x); + +// Find branch current from branch voltage using device characteristic + current=findBranchCurrent(x,voltage); + + if(NLFlag) then + if symbolic then + if displayNLFlag then + mprintf("-----------------------------------------------------------\n"); + mprintf("Application of Newton-Raphson method: \n"); + disp('Nonliner models:'); + Edges=edge_number(g); + X=1; + for edge_cnt = 1:Edges, + if(g.edges.data.type(edge_cnt)=='D') + tempModel=model(X); + Is=tempModel(2); Vt=tempModel(3); + X=X+1; + devName=strsplit(g.edges.data.devName(edge_cnt),1); + devSubscript=devName(2); + mprintf("See linearized model for diode D%s in diode_D%s.eps\n",devSubscript,devSubscript); + unix_g('cp '+LPCSim_HOME+'/diode_Dref.pstex .'); + unix_g('cp '+LPCSim_HOME+'/diode_Dref.pstex_t .'); + unix_g('cp '+LPCSim_HOME+'/latfont* .'); + unix_g(LPCSim_HOME+'/nonlinearDevice.sh ' + devSubscript); + displayNLFlag=%F; + end + end + [Asymb,Bsymb,Csymb,xsymb]=buildMatricesSymbLin(_T); + if displayMatrix then + mprintf("The system of equations Ax=b (Symbolically):\n"); + mprintf("Where Ax=b represents equations after linearization of nonlinear elements.\n"); + mprintf("-----------------------------------------------------------\n"); + disp(xsymb,"x=",Bsymb,"B=",Asymb,"A="); + pause; + end + end + end + + for i=1:MaxNRitr +// Check device characteristic of non-linear devices + flag=checkForDeviceChar(voltage,current); + if(flag) break; end +// Call Newton Raphson method to update the value of linearized model of nonlinear devices + [A,B]=NR(A,B,voltage,current,i-1); + if displayMatrix then + mprintf("-----------------------------------------------------------\n"); + mprintf("Operating Point (DC) Analysis: \n"); + mprintf("NR Iteration: %d \n",i); + mprintf("The system of equations Ax=b (Numerically):\n"); + mprintf("-----------------------------------------------------------\n"); + format('e',10); + disp(B,"B=",A,"A="); + end + + x=findNodePotential(A,B); + if displayMatrix then + mprintf("-----------------------------------------------------\n"); + mprintf("The solution of the circuit x:\n"); + mprintf("-----------------------------------------------------\n"); + format('e',10); + disp(x,"x="); + pause; + end + voltage=findBranchVoltage(x); + current=findBranchCurrent(x,voltage); + end + end +endfunction + +function x=findNodePotential(A,B) +// START: Solving Ax=B for Node potential x + A_sparse=sparse(A); + x=lusolve(A_sparse,B); + clear A_sparse; +// END: Solving Ax=B for x +endfunction + +function voltage=findBranchVoltage(x) +// Find voltages of complete network + global g; + Edges=edge_number(g); + voltage=zeros(Edges,1) + for edge_cnt = 1:Edges, + if(g.edges.head(edge_cnt)==1) + voltage(edge_cnt)=x(g.edges.tail(edge_cnt)-1); + elseif(g.edges.tail(edge_cnt)==1) + voltage(edge_cnt)=-x(g.edges.head(edge_cnt)-1); + else + voltage(edge_cnt)=x(g.edges.tail(edge_cnt)-1)-x(g.edges.head(edge_cnt)-1); + end + end +endfunction + +function current=findBranchCurrent(x,voltage) + global g; + T=1; + Nodes=node_number(g); + Edges=edge_number(g); + current=zeros(Edges,1) + for edge_cnt = 1:Edges, + if(g.edges.data.type(edge_cnt)=='R'|g.edges.data.type(edge_cnt)=='D'|g.edges.data.type(edge_cnt)=='X'|g.edges.data.type(edge_cnt)=='M') + current(edge_cnt)=g.edges.data.value(edge_cnt)*voltage(edge_cnt); + elseif(g.edges.data.type(edge_cnt)=='V') + current(edge_cnt)=x(Nodes-1+T); + T=T+1; + elseif(g.edges.data.type(edge_cnt)=='E') + current(edge_cnt)=x(Nodes-1+T); + T=T+1; + elseif(g.edges.data.type(edge_cnt)=='F') + current(edge_cnt)=x(Nodes-1+T); + T=T+1; + elseif(g.edges.data.type(edge_cnt)=='H') + current(edge_cnt)=x(Nodes-1+T); + T=T+1; + elseif(g.edges.data.type(edge_cnt)=='G') + current(edge_cnt)=voltage(edge_cnt+1)*g.edges.data.value(edge_cnt); + else + current(edge_cnt)=g.edges.data.value(edge_cnt); + end + end +endfunction diff --git a/FreeEDA/LPCSim/LPCSim/buildMatrices.sci b/FreeEDA/LPCSim/LPCSim/buildMatrices.sci new file mode 100644 index 0000000..6323b17 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/buildMatrices.sci @@ -0,0 +1,415 @@ +// buildMatrices.sci is a scilab file to construct a system matrix representing the circuit equations. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +function [A,B]=buildMatrices(_T) + /////////////////////////////////////////////////////////////////////////////// + // Create Matrice A and vector B corresponding to circuit equation + global g; + Nodes=node_number(g); + A = zeros(Nodes-1+_T,Nodes-1+_T); + B = zeros(Nodes-1+_T,1); + + _T=1; + for edge_cnt = 1:edge_number(g), + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + value=g.edges.data.value(edge_cnt); + select (g.edges.data.type(edge_cnt)) + case 'R' then // Resistor + if(~(source==0)) + A(source,source) = A(source,source) + value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - value; + A(sink,source) = A(sink,source) - value; + end + + case 'I' then // Current source + if(~(source==0)) + B(source) = B(source)-value; + end + if(~(sink==0)) + B(sink) =B(sink) + value; + end + + case 'V' then // Voltage source + if(~(source==0)) + A(Nodes-1+_T,source) = 1; + A(source,Nodes-1+_T) = 1; + end + if(~(sink==0)) + A(Nodes-1+_T,sink) = -1; + A(sink,Nodes-1+_T) = -1; + end + B(Nodes-1+_T) = value; + _T=_T+1; + + case 'C' then // Capacitor + if(~(source==0)) + A(source,source) = A(source,source) + value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - value; + A(sink,source) = A(sink,source) - value; + end + + case 'D' then // Diode + if(~(source==0)) + A(source,source) = A(source,source) + value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - value; + A(sink,source) = A(sink,source) - value; + end + + case 'G' then // Voltage controlled current source + if(~(source==0)) + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) + value; + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) - value; + end + end + if(~(sink==0)) + if(~(g.edges.tail(edge_cnt+1)==1)) + A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) - value; + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) + value; + end + end + + case 'E' then // Voltage controlled voltage source + if(~(source==0)) + A(source,Nodes-1+_T) = 1; + A(Nodes-1+_T,source) = 1; + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = value; + end + if(~(g.edges.head(edge_cnt+1)==1)) + A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = - value; + end + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = -1; + A(Nodes-1+_T,sink) = -1; + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = -value; + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = value; + end + end + _T=_T+1; + + case 'F' then // Current controlled current source + A(Nodes-1+_T,Nodes-1+_T) = 1; + A(Nodes-1+_T,Nodes-1+_T-1) = -value; + if(~(source==0)) + A(source,Nodes-1+_T) = 1; + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = -1; + end + _T=_T+1; + + case 'H' then // Current controlled voltage source + A(Nodes-1+_T,Nodes-1+_T-1) = -value; + if(~(source==0)) + A(source,Nodes-1+_T) = 1; + A(Nodes-1+_T,source) = 1; + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = -1; + A(Nodes-1+_T,sink) = -1; + end + _T=_T+1; + + case 'M' then // MOSFET + if(~(source==0)) + A(source,source) = A(source,source) + value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - value; + A(sink,source) = A(sink,source) - value; + end + + case 'X' then // User defined component + if(~(source==0)) + A(source,source) = A(source,source) + value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - value; + A(sink,source) = A(sink,source) - value; + end + + else + exit(0); + end + end +endfunction + +function [A,B]=buildMatrices2(g,x) + /////////////////////////////////////////////////////////////////////////////// + // Create Matrices A and B + Nodes=node_number(g); + _T=0; + for edge_cnt = 1:edge_number(g), + if(g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H'|g.edges.data.type(edge_cnt)=='C') + _T=_T+1; + end + end + A = zeros(Nodes+_T-1,Nodes+_T-1); + B = zeros(Nodes+_T-1,1); + + _T=1; + for edge_cnt = 1:edge_number(g), + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + value=g.edges.data.value(edge_cnt); + select (g.edges.data.type(edge_cnt)) + case 'R' then // Resistor + if(~(source==0)) + A(source,source) = A(source,source) + value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - value; + A(sink,source) = A(sink,source) - value; + end + + case 'M' then // MOSFET + if(~(source==0)) + A(source,source) = A(source,source) + value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - value; + A(sink,source) = A(sink,source) - value; + end + + case 'C' then // Capacitor + if(~(source==0)) + A(Nodes-1+_T,source) = 1; + A(source,Nodes-1+_T) = 1; + end + if(~(sink==0)) + A(Nodes-1+_T,sink) = -1; + A(sink,Nodes-1+_T) = -1; + end + if(~(source==0)) + B(Nodes-1+_T) = B(Nodes-1+_T)+x(source); + end + if(~(sink==0)) + B(Nodes-1+_T) = B(Nodes-1+_T)-x(sink); + end + _T=_T+1; + + case 'D' then // Diode + if(~(source==0)) + A(source,source) = A(source,source) + value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - value; + A(sink,source) = A(sink,source) - value; + end + + case 'G' then // Voltage controlled current source + if(~(source==0)) + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) + value; + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) - value; + end + end + if(~(sink==0)) + if(~(g.edges.tail(edge_cnt+1)==1)) + A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) - value; + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) + value; + end + end + + case 'I' then // Current source + if(~(source==0)) + B(source) = B(source)-value; + end + if(~(sink==0)) + B(sink) =B(sink) + value; + end + + case 'V' then // Voltage Source + if(~(source==0)) + A(Nodes-1+_T,source) = 1; + A(source,Nodes-1+_T) = 1; + end + if(~(sink==0)) + A(Nodes-1+_T,sink) = -1; + A(sink,Nodes-1+_T) = -1; + end + B(Nodes-1+_T) = value; + _T=_T+1; + + case 'E' then + if(~(source==0)) + A(source,Nodes-1+_T) = 1; + A(Nodes-1+_T,source) = -1; + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = value; + end + if(~(g.edges.head(edge_cnt+1)==1)) + A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = - value; + end + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = -1; + A(Nodes-1+_T,sink) = 1; + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = -value; + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = value; + end + end + _T=_T+1; + case 'F' then + A(Nodes-1+_T,Nodes-1+_T) = 1; + A(Nodes-1+_T,Nodes-1+_T-1) = -value; + if(~(source==0)) + A(source,Nodes-1+_T) = 1; + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = -1; + end + _T=_T+1; + case 'H' then + A(Nodes-1+_T,Nodes-1+_T-1) = -value; + if(~(source==0)) + A(source,Nodes-1+_T) = 1; + A(Nodes-1+_T,source) = 1; + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = -1; + A(Nodes-1+_T,sink) = -1; + end + _T=_T+1; + else + exit(0); + end + end +endfunction + +function [A,B]=buildMatrices3(g) + /////////////////////////////////////////////////////////////////////////////// + // Create Matrices A and B + Nodes=node_number(g); + _T=0; + for edge_cnt = 1:edge_number(g), + if(g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H') + _T=_T+1; + end + end + A = zeros(Nodes+_T-1,Nodes+_T-1); + B = zeros(Nodes+_T-1,1); + + _T=1; + for edge_cnt = 1:edge_number(g), + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + value=g.edges.data.value(edge_cnt); + select (g.edges.data.type(edge_cnt)) + case 'R' then + if(~(source==0)) + A(source,source) = A(source,source) + value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - value; + A(sink,source) = A(sink,source) - value; + end + case 'I' then + if(~(source==0)) + B(source) = B(source)-value; + end + if(~(sink==0)) + B(sink) =B(sink) + value; + end + case 'V' then + if(~(source==0)) + A(Nodes-1+_T,source) = 1; + A(source,Nodes-1+_T) = 1; + end + if(~(sink==0)) + A(Nodes-1+_T,sink) = -1; + A(sink,Nodes-1+_T) = -1; + end + B(Nodes-1+_T) = value; + _T=_T+1; + case 'E' then + if(~(source==0)) + A(source,Nodes-1+_T) = 1; + A(Nodes-1+_T,source) = -1; + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = value; + end + if(~(g.edges.head(edge_cnt+1)==1)) + A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = - value; + end + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = -1; + A(Nodes-1+_T,sink) = 1; + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = -value; + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = value; + end + end + _T=_T+1; + case 'H' then + A(Nodes-1+_T,Nodes-1+_T-1) = -value; + if(~(source==0)) + A(source,Nodes-1+_T) = 1; + A(Nodes-1+_T,source) = 1; + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = -1; + A(Nodes-1+_T,sink) = -1; + end + _T=_T+1; + else + exit(0); + end + end +endfunction diff --git a/FreeEDA/LPCSim/LPCSim/buildMatricesSymbolic.sci b/FreeEDA/LPCSim/LPCSim/buildMatricesSymbolic.sci new file mode 100644 index 0000000..3639e65 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/buildMatricesSymbolic.sci @@ -0,0 +1,802 @@ +// buildMatricesSymbolic.sci is a scilab file to build equations of the circuit symbolically. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// It is modified by Yogesh Dilip Save for FreeEDA Software on October 2012 +warning('off'); +function [A,B,D,C,x,fx]=buildMatricesSymbolic(_T) +// Create Matrice A, D, C and vector b corresponding to circuit equation + global g; + global('model') + Nodes=node_number(g); + Edges=edge_number(g); + A = emptystr(Nodes-1+_T,Nodes-1+_T); + D = emptystr(Nodes-1+_T,length(model)); + C = emptystr(Nodes-1+_T,Nodes-1+_T); + B = emptystr(Nodes-1+_T,1); + x = emptystr(Nodes-1+_T,1); + fx = emptystr(length(model),1); + + _T=1; + X=1; + controlledSourceFlag=%F + for i=1:Nodes-1, + x(i,1)="v_"+ msprintf("%d",i) + end + for edge_cnt = 1:edge_number(g), + if(controlledSourceFlag) + controlledSourceFlag=%F + continue + end + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + value=g.edges.data.devName(edge_cnt); + select (g.edges.data.type(edge_cnt)) + case 'R' then // Resistor + if(~(source==0)) + A(source,source) = A(source,source) + "+"+ value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) +"+"+ value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) +"-"+ value; + A(sink,source) = A(sink,source) +"-"+ value; + end + + case 'I' then // Current source + if(sscanf(value, "%c")=='I') + if(~(source==0)) + B(source) = B(source)+"-"+value; + end + if(~(sink==0)) + B(sink) =B(sink) +"+"+ value; + end + end + + case 'V' then // Voltage source + if(~(source==0)) + A(Nodes-1+_T,source) = "1"; + A(source,Nodes-1+_T) = "1"; + end + if(~(sink==0)) + A(Nodes-1+_T,sink) = "-1"; + A(sink,Nodes-1+_T) = "-1"; + end + B(Nodes-1+_T) = value; + x(Nodes-1+_T)="i_"+ value; + _T=_T+1; + + case 'C' then // Capacitor + if(~(source==0)) + C(source,source) = C(source,source) +"+"+ value; + end + if(~(sink==0)) + C(sink,sink) = C(sink,sink) +" + "+ value; + end + if(~(sink==0) & ~(source==0)) + C(source,sink) = C(source,sink) +"-"+value; + C(sink,source) = C(sink,source) +"-"+value; + end + + case 'D' then // Diode + if(~(source==0)) + D(source,X) = value+"_f"; + end + if(~(sink==0)) + D(sink,X) = "-"+ value+"_f"; + end + if(source==0) + fx(X)="(v_"+string(sink)+")"; + elseif(sink==0) + fx(X)="(v_"+string(source)+")"; + else + fx(X)="(v_"+string(source)+",v_"+string(sink)+")"; + end + X=X+1; + + case 'G' then // Voltage controlled current source + if(~(source==0)) + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) +"+"+ convstr(value,'l'); + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) +"-"+ convstr(value,'l'); + end + end + if(~(sink==0)) + if(~(g.edges.tail(edge_cnt+1)==1)) + A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) +"-"+ convstr(value,'l'); + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) +"+"+ convstr(value,'l'); + end + end + controlledSourceFlag=%T + + case 'E' then // Voltage controlled voltage source + if(~(source==0)) + A(source,Nodes-1+_T) = "1"; + A(Nodes-1+_T,source) = "1"; + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = convstr(value,'l'); + end + if(~(g.edges.head(edge_cnt+1)==1)) + A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = "-"+convstr(value,'l'); + end + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = "-1"; + A(Nodes-1+_T,sink) = "-1"; + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = "-"+convstr(value,'l'); + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = convstr(value,'l'); + end + end + x(Nodes-1+_T)="i_"+ value; + _T=_T+1; + controlledSourceFlag=%T + + case 'F' then // Current controlled current source + A(Nodes-1+_T,Nodes-1+_T) = 1; + A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l'); + if(~(source==0)) + A(source,Nodes-1+_T) = 1; + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = -1; + end + x(Nodes-1+_T)="i_"+ value; + _T=_T+1; + + case 'H' then // Current controlled voltage source + A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l'); + if(~(source==0)) + A(source,Nodes-1+_T) = "1"; + A(Nodes-1+_T,source) = "1"; + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = "-1"; + A(Nodes-1+_T,sink) = "-1"; + end + x(Nodes-1+_T)="i_"+ value; + _T=_T+1; + + case 'M' then // MOSFET + if(~(source==0)) + A(source,source) = A(source,source) + value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - value; + A(sink,source) = A(sink,source) - value; + end + + case 'X' then // User defined component + if(~(source==0)) + A(source,source) = A(source,source) +" + "+ value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) +" + "+ value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) +" - "+value; + A(sink,source) = A(sink,source) +" - "+value; + end + + else + exit(0); + end + end + _T=_T-1; + + firstValue=%T + mprintf("-----------------------------------------------------------\n"); + mprintf("System of Equations representing the electrical circuit:\n"); + mprintf("-----------------------------------------------------------\n"); +// Fill zero entries + for i=1:Nodes-1+_T, + mprintf("\n "); + for j=1:Nodes-1+_T, + if(length(A(i,j))==0) + A(i,j)="0"; + elseif(sscanf(A(i,j), "%c")=='+') + tempstr=strsplit(A(i,j),1); + A(i,j)=tempstr(2); + if firstValue then + if ~(strcmp(A(i,j),'1')) then + mprintf("%s",x(j)); + else + mprintf("(%s)%s",A(i,j),x(j)); + end + firstValue=%F; + else + if ~(strcmp(A(i,j),'1')) then + mprintf(" + %s",x(j)); + else + mprintf(" + (%s)%s",A(i,j),x(j)); + end + end + else + if firstValue then + if ~(strcmp(A(i,j),'1')) then + mprintf("%s",x(j)); + else + mprintf("(%s)%s",A(i,j),x(j)); + end + firstValue=%F; + else + if ~(strcmp(A(i,j),'1')) then + mprintf(" + %s",x(j)); + else + mprintf(" + (%s)%s",A(i,j),x(j)); + end + end + end + if(length(C(i,j))==0) + C(i,j)="0"; + elseif(sscanf(C(i,j), "%c")=='+') + tempstr=strsplit(C(i,j),1); + C(i,j)=tempstr(2); + if firstValue then + mprintf("(%s)d%s/dt",C(i,j),x(j)); + firstValue=%F; + else + mprintf(" + (%s)d%s/dt",C(i,j),x(j)); + end + else + if firstValue then + mprintf("(%s)d%s/dt",C(i,j),x(j)); + firstValue=%F; + else + mprintf(" + (%s)d%s/dt",C(i,j),x(j)); + end + end + end + for j=1:length(model), + if(length(D(i,j))==0) + D(i,j)="0"; + elseif(firstValue) + mprintf("%s%s",D(i,j),fx(j)); + firstValue=%F; + else + mprintf(" + %s%s",D(i,j),fx(j)); + end + end + if(length(B(i,1))==0) + B(i,1)="0"; + elseif(sscanf(B(i,1), "%c")=='+') + tempstr=strsplit(B(i,1),1); + B(i,1)=tempstr(2); + end + mprintf(" = %s\n",B(i,1)); + firstValue=%T + end + global('NLFlag'); + if NLFlag then + mprintf("-----------------------------------------------------------\n"); + mprintf(" Dn_f(v_a,v_b)=Is_n(1-e^((v_a-v_b)/vt_n))\n where Is_n=reverse saturation current and vt_n=threshold voltage of diode n\n") + end + mprintf("-----------------------------------------------------------\n"); +endfunction + +function [A,B,D,x,fx]=buildMatricesSymbStatic(_T) +global('currentAnalysis'); +// Create Matrice A, D, C and vector b corresponding to circuit equation + global g; + global('model') + Nodes=node_number(g); + Edges=edge_number(g); + A = emptystr(Nodes-1+_T,Nodes-1+_T); + D = emptystr(Nodes-1+_T,length(model)); + B = emptystr(Nodes-1+_T,1); + x = emptystr(Nodes-1+_T,1); + fx = emptystr(length(model),1); + + _T=1; + X=1; + controlledSourceFlag=%F + for i=1:Nodes-1, + x(i,1)="v_"+ msprintf("%d",i) + end + for edge_cnt = 1:edge_number(g), + if(controlledSourceFlag) + controlledSourceFlag=%F + continue + end + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + value=g.edges.data.devName(edge_cnt); + select (g.edges.data.type(edge_cnt)) + case 'R' then // Resistor + if(~(source==0)) + A(source,source) = A(source,source) + "+"+ value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) +"+"+ value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) +"-"+ value; + A(sink,source) = A(sink,source) +"-"+ value; + end + + case 'I' then // Current source + if(sscanf(value, "%c")=='I') + if(~(source==0)) + B(source) = B(source)+"-"+value; + end + if(~(sink==0)) + B(sink) =B(sink) +"+"+ value; + end + elseif((sscanf(value, "%c")=='C') & currentAnalysis) + if(~(source==0)) + B(source) = B(source)+"-i_"+value; + end + if(~(sink==0)) + B(sink) =B(sink) +"+i_"+ value; + end + end + + case 'V' then // Voltage source + if(~(source==0)) + A(Nodes-1+_T,source) = "1"; + A(source,Nodes-1+_T) = "1"; + end + if(~(sink==0)) + A(Nodes-1+_T,sink) = "-1"; + A(sink,Nodes-1+_T) = "-1"; + end + B(Nodes-1+_T) = value; + x(Nodes-1+_T)="i_"+ value; + _T=_T+1; + + case 'C' then // Capacitor + if currentAnalysis then + if(~(source==0)) + A(source,source) = A(source,source) +"+R_"+ value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) +"+R_"+ value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) +"-R_"+value; + A(sink,source) = A(sink,source) +"-R_"+value; + end + end + + case 'D' then // Diode + if(~(source==0)) + D(source,X) = value+"_f"; + end + if(~(sink==0)) + D(sink,X) = "-"+ value+"_f"; + end + if(source==0) + fx(X)="(v_"+string(sink)+")"; + elseif(sink==0) + fx(X)="(v_"+string(source)+")"; + else + fx(X)="(v_"+string(source)+",v_"+string(sink)+")"; + end + X=X+1; + + case 'G' then // Voltage controlled current source + if(~(source==0)) + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) +"+"+ convstr(value,'l'); + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) +"-"+ convstr(value,'l'); + end + end + if(~(sink==0)) + if(~(g.edges.tail(edge_cnt+1)==1)) + A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) +"-"+ convstr(value,'l'); + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) +"+"+ convstr(value,'l'); + end + end + controlledSourceFlag=%T + + case 'E' then // Voltage controlled voltage source + if(~(source==0)) + A(source,Nodes-1+_T) = "1"; + A(Nodes-1+_T,source) = "1"; + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = convstr(value,'l'); + end + if(~(g.edges.head(edge_cnt+1)==1)) + A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = "-"+convstr(value,'l'); + end + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = "-1"; + A(Nodes-1+_T,sink) = "-1"; + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = "-"+convstr(value,'l'); + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = convstr(value,'l'); + end + end + x(Nodes-1+_T)="i_"+ value; + _T=_T+1; + controlledSourceFlag=%T + + case 'F' then // Current controlled current source + A(Nodes-1+_T,Nodes-1+_T) = 1; + A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l'); + if(~(source==0)) + A(source,Nodes-1+_T) = 1; + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = -1; + end + x(Nodes-1+_T)="i_"+ value; + _T=_T+1; + + case 'H' then // Current controlled voltage source + A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l'); + if(~(source==0)) + A(source,Nodes-1+_T) = "1"; + A(Nodes-1+_T,source) = "1"; + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = "-1"; + A(Nodes-1+_T,sink) = "-1"; + end + x(Nodes-1+_T)="i_"+ value; + _T=_T+1; + + case 'M' then // MOSFET + if(~(source==0)) + A(source,source) = A(source,source) + value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - value; + A(sink,source) = A(sink,source) - value; + end + + case 'X' then // User defined component + if(~(source==0)) + A(source,source) = A(source,source) +" + "+ value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) +" + "+ value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) +" - "+value; + A(sink,source) = A(sink,source) +" - "+value; + end + + else + exit(0); + end + end + _T=_T-1; + + firstValue=%T + mprintf("-----------------------------------------------------------\n"); + mprintf("System of Equations representing the electrical circuit:\n"); + mprintf("-----------------------------------------------------------\n"); +// Fill zero entries + for i=1:Nodes-1+_T, + mprintf("\n "); + for j=1:Nodes-1+_T, + if(length(A(i,j))==0) + A(i,j)="0"; + elseif(sscanf(A(i,j), "%c")=='+') + tempstr=strsplit(A(i,j),1); + A(i,j)=tempstr(2); + if firstValue then + if ~(strcmp(A(i,j),'1')) then + mprintf("%s",x(j)); + else + mprintf("(%s)%s",A(i,j),x(j)); + end + firstValue=%F; + else + if ~(strcmp(A(i,j),'1')) then + mprintf(" + %s",x(j)); + else + mprintf(" + (%s)%s",A(i,j),x(j)); + end + end + else + if firstValue then + if ~(strcmp(A(i,j),'1')) then + mprintf("%s",x(j)); + else + mprintf("(%s)%s",A(i,j),x(j)); + end + firstValue=%F; + else + if ~(strcmp(A(i,j),'1')) then + mprintf(" + %s",x(j)); + else + mprintf(" + (%s)%s",A(i,j),x(j)); + end + end + end + end + for j=1:length(model), + if(length(D(i,j))==0) + D(i,j)="0"; + elseif(firstValue) + mprintf("%s%s",D(i,j),fx(j)); + firstValue=%F; + else + mprintf(" + %s%s",D(i,j),fx(j)); + end + end + if(length(B(i,1))==0) + B(i,1)="0"; + elseif(sscanf(B(i,1), "%c")=='+') + tempstr=strsplit(B(i,1),1); + B(i,1)=tempstr(2); + end + mprintf(" = %s\n",B(i,1)); + firstValue=%T + end + if NLFlag then + mprintf("-----------------------------------------------------------\n"); + mprintf(" Dn_f(v_a,v_b)=Is_n(1-e^((v_a-v_b)/vt_n))\n where Is_n=reverse saturation current and vt_n=threshold voltage of diode n\n") + end + mprintf("-----------------------------------------------------------\n"); +endfunction + +function [A,B,C,x]=buildMatricesSymbLin(_T) +// Create Matrice A, D, C and vector b corresponding to circuit equation + global g; + global('currentAnalysis'); + Nodes=node_number(g); + A = emptystr(Nodes-1+_T,Nodes-1+_T); + C = emptystr(Nodes-1+_T,Nodes-1+_T); + B = emptystr(Nodes-1+_T,1); + x = emptystr(Nodes-1+_T,1); + + _T=1; + controlledSourceFlag=%F + for i=1:Nodes-1, + x(i,1)="v_"+ msprintf("%d",i) + end + for edge_cnt = 1:edge_number(g), + if(controlledSourceFlag) + controlledSourceFlag=%F + continue + end + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + value=g.edges.data.devName(edge_cnt); + select (g.edges.data.type(edge_cnt)) + case 'R' then // Resistor + if(~(source==0)) + A(source,source) = A(source,source) + "+"+ value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) +"+"+ value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) +"-"+ value; + A(sink,source) = A(sink,source) +"-"+ value; + end + + case 'I' then // Current source + if(sscanf(value, "%c")=='I') + if(~(source==0)) + B(source) = B(source)+"-"+value; + end + if(~(sink==0)) + B(sink) =B(sink) +"+"+ value; + end + elseif(~(sscanf(value, "%c")=='C') | currentAnalysis) + if(~(source==0)) + B(source) = B(source)+"-i_"+value; + end + if(~(sink==0)) + B(sink) =B(sink) +"+i_"+ value; + end + end + + case 'V' then // Voltage source + if(~(source==0)) + A(Nodes-1+_T,source) = "1"; + A(source,Nodes-1+_T) = "1"; + end + if(~(sink==0)) + A(Nodes-1+_T,sink) = "-1"; + A(sink,Nodes-1+_T) = "-1"; + end + B(Nodes-1+_T) = value; + x(Nodes-1+_T)="i_"+ value; + _T=_T+1; + + case 'C' then // Capacitor + if currentAnalysis then + if(~(source==0)) + C(source,source) = C(source,source) +"+"+ value; + end + if(~(sink==0)) + C(sink,sink) = C(sink,sink) +" + "+ value; + end + if(~(sink==0) & ~(source==0)) + C(source,sink) = C(source,sink) +"-"+value; + C(sink,source) = C(sink,source) +"-"+value; + end + end + + case 'D' then // Diode + if(~(source==0)) + A(source,source) = A(source,source) +"+R_"+ value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) +"+R_"+ value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) +"-R_"+ value; + A(sink,source) = A(sink,source) +"-R_"+ value; + end + + case 'G' then // Voltage controlled current source + if(~(source==0)) + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) +"+"+ convstr(value,'l'); + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) +"-"+ convstr(value,'l'); + end + end + if(~(sink==0)) + if(~(g.edges.tail(edge_cnt+1)==1)) + A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) +"-"+ convstr(value,'l'); + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) +"+"+ convstr(value,'l'); + end + end + controlledSourceFlag=%T + + case 'E' then // Voltage controlled voltage source + if(~(source==0)) + A(source,Nodes-1+_T) = "1"; + A(Nodes-1+_T,source) = "1"; + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = convstr(value,'l'); + end + if(~(g.edges.head(edge_cnt+1)==1)) + A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = "-"+convstr(value,'l'); + end + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = "-1"; + A(Nodes-1+_T,sink) = "-1"; + if(~(g.edges.tail(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = "-"+convstr(value,'l'); + end + if(~(g.edges.head(edge_cnt+1)-1==0)) + A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = convstr(value,'l'); + end + end + x(Nodes-1+_T)="i_"+ value; + _T=_T+1; + controlledSourceFlag=%T + + case 'F' then // Current controlled current source + A(Nodes-1+_T,Nodes-1+_T) = 1; + A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l'); + if(~(source==0)) + A(source,Nodes-1+_T) = 1; + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = -1; + end + x(Nodes-1+_T)="i_"+ value; + _T=_T+1; + + case 'H' then // Current controlled voltage source + A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l'); + if(~(source==0)) + A(source,Nodes-1+_T) = 1; + A(Nodes-1+_T,source) = 1; + end + if(~(sink==0)) + A(sink,Nodes-1+_T) = -1; + A(Nodes-1+_T,sink) = -1; + end + x(Nodes-1+_T)="i"+ value; + _T=_T+1; + + case 'M' then // MOSFET + if(~(source==0)) + A(source,source) = A(source,source) + value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - value; + A(sink,source) = A(sink,source) - value; + end + + case 'X' then // User defined component + if(~(source==0)) + A(source,source) = A(source,source) +" + "+ value; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) +" + "+ value; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) +" - "+value; + A(sink,source) = A(sink,source) +" - "+value; + end + + else + exit(0); + end + end + _T=_T-1; + + firstValue=%T + mprintf("-----------------------------------------------------------\n"); + mprintf("System of Equations representing the electrical circuit:\n"); + mprintf("-----------------------------------------------------------\n"); +// Fill zero entries + for i=1:Nodes-1+_T, + mprintf("\n "); + for j=1:Nodes-1+_T, + if(length(A(i,j))==0) + A(i,j)="0"; + elseif(sscanf(A(i,j), "%c")=='+') + tempstr=strsplit(A(i,j),1); + A(i,j)=tempstr(2); + if firstValue then + if ~(strcmp(A(i,j),'1')) then + mprintf("%s",x(j)); + else + mprintf("(%s)%s",A(i,j),x(j)); + end + firstValue=%F; + else + if ~(strcmp(A(i,j),'1')) then + mprintf(" + %s",x(j)); + else + mprintf(" + (%s)%s",A(i,j),x(j)); + end + end + else + if firstValue then + if ~(strcmp(A(i,j),'1')) then + mprintf("%s",x(j)); + else + mprintf("(%s)%s",A(i,j),x(j)); + end + firstValue=%F; + else + if ~(strcmp(A(i,j),'1')) then + mprintf(" + %s",x(j)); + else + mprintf(" + (%s)%s",A(i,j),x(j)); + end + end + end + end + if(length(B(i,1))==0) + B(i,1)="0"; + elseif(sscanf(B(i,1), "%c")=='+') + tempstr=strsplit(B(i,1),1); + B(i,1)=tempstr(2); + end + mprintf(" = %s\n",B(i,1)); + firstValue=%T + end + mprintf("-----------------------------------------------------------\n"); +endfunction diff --git a/FreeEDA/LPCSim/LPCSim/ckt/ForwardBiasedDiode.ckt b/FreeEDA/LPCSim/LPCSim/ckt/ForwardBiasedDiode.ckt new file mode 100644 index 0000000..4501665 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/ForwardBiasedDiode.ckt @@ -0,0 +1,6 @@ +* Diode in forward biased +V1 1 0 dc 1 +D1 1 2 mymodel (1e-8 0.026) +R1 2 0 100 +.op +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/HWRectifier.ckt b/FreeEDA/LPCSim/LPCSim/ckt/HWRectifier.ckt new file mode 100644 index 0000000..cba98ec --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/HWRectifier.ckt @@ -0,0 +1,6 @@ +V1 1 0 sine (5 50) +D2 1 2 mymodel (1e-8 0.026) +R3 2 0 1 +.tran 0 100 0.5 +.plot v(1) v(2) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/HWRectifierFilter.ckt b/FreeEDA/LPCSim/LPCSim/ckt/HWRectifierFilter.ckt new file mode 100644 index 0000000..8df0e6b --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/HWRectifierFilter.ckt @@ -0,0 +1,8 @@ +* Half-Wave Rectifier +V1 1 0 sine (5 50) +D1 1 2 mymodel (1e-8 0.026) +R1 2 0 10000 +C1 2 0 10e-3 +.tran 0 100 0.5 +.plot v(1) v(2) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/NMOS.ckt b/FreeEDA/LPCSim/LPCSim/ckt/NMOS.ckt new file mode 100644 index 0000000..c9e1c78 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/NMOS.ckt @@ -0,0 +1,7 @@ +V1 2 0 dc 2.5 +M1 1 0 2 N (20e-6 0.18e-6 1 1e-3 1e-1) +V2 3 0 sweep 0 +V3 3 1 dc 0 +.dc 0 5 0.1 +.plot i(V3) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/RC.ckt b/FreeEDA/LPCSim/LPCSim/ckt/RC.ckt new file mode 100644 index 0000000..e3ec032 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/RC.ckt @@ -0,0 +1,6 @@ +V1 1 0 dc 5 +R1 1 2 1e3 +C1 2 0 0.1e-6 +.tran 0 5e-3 0.5e-3 +.plot v(2) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/RingOsc.ckt b/FreeEDA/LPCSim/LPCSim/ckt/RingOsc.ckt new file mode 100644 index 0000000..f30dcf2 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/RingOsc.ckt @@ -0,0 +1,66 @@ +V1 1 0 dc 1.8 +M1 3 1 2 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M2 3 0 2 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M3 4 1 3 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M4 4 0 3 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M5 5 1 4 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M6 5 0 4 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M7 6 1 5 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M8 6 0 5 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M9 7 1 6 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M10 7 0 6 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M11 8 1 7 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M12 8 0 7 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M13 9 1 8 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M14 9 0 8 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M15 10 1 9 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M16 10 0 9 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M17 11 1 10 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M18 11 0 10 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M19 12 1 11 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M20 12 0 11 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M21 13 1 12 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M22 13 0 12 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M23 14 1 13 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M24 14 0 13 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M25 15 1 14 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M26 15 0 14 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M27 16 1 15 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M28 16 0 15 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M29 17 1 16 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M30 17 0 16 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M31 18 1 17 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M32 18 0 17 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M33 19 1 18 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M34 19 0 18 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M35 20 1 19 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M36 20 0 19 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M37 21 1 20 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M38 21 0 20 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M39 22 1 21 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M40 22 0 21 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M41 23 1 22 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M42 23 0 22 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M43 24 1 23 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M44 24 0 23 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M45 25 1 24 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M46 25 0 24 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M47 26 1 25 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M48 26 0 25 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M49 27 1 26 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M50 27 0 26 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M51 28 1 27 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M52 28 0 27 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M53 29 1 28 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M54 29 0 28 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M55 30 1 29 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M56 30 0 29 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M57 31 1 30 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M58 31 0 30 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M59 32 1 31 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M60 32 0 31 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +M61 2 1 32 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +M62 2 0 32 N (20e-6 0.18e-6 0.4 1e-3 1e-1) +.tran 0 20e-9 1e-9 +.plot v(2) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/Vsweep.ckt b/FreeEDA/LPCSim/LPCSim/ckt/Vsweep.ckt new file mode 100644 index 0000000..7fd7e27 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/Vsweep.ckt @@ -0,0 +1,6 @@ +V1 1 0 sweep 0 +R1 1 2 1 +R2 2 0 1 +.dc 0 5 0.1 +.plot v(1) v(2) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/bridge.ckt b/FreeEDA/LPCSim/LPCSim/ckt/bridge.ckt new file mode 100644 index 0000000..3c6f4eb --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/bridge.ckt @@ -0,0 +1,10 @@ +* Bridge Rectifier +V1 1 2 sine (5 50) +D1 1 3 mymodel (1e-8 0.026) +D2 2 3 mymodel (1e-8 0.026) +D3 0 1 mymodel (1e-8 0.026) +D4 0 2 mymodel (1e-8 0.026) +R1 3 0 1 +.tran 0.0005 0.04 0 +.plot v(1)-v(2) v(3) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/bridgeFilter.ckt b/FreeEDA/LPCSim/LPCSim/ckt/bridgeFilter.ckt new file mode 100644 index 0000000..a153700 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/bridgeFilter.ckt @@ -0,0 +1,10 @@ +V1 1 2 sine (5 50) +D1 1 3 mymodel (1e-8 0.026) +D2 2 3 mymodel (1e-8 0.026) +D3 0 1 mymodel (1e-8 0.026) +D4 0 2 mymodel (1e-8 0.026) +R1 3 0 10000 +C1 3 0 1e-2 +.tran 0 100 0.5 +.plot v(1)-v(2) v(3) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/cmos.ckt b/FreeEDA/LPCSim/LPCSim/ckt/cmos.ckt new file mode 100644 index 0000000..c04311c --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/cmos.ckt @@ -0,0 +1,7 @@ +V1 1 0 dc 1.8 +M1 3 1 2 P (20e-6 0.18e-6 -0.4 8.56e-3) +M2 3 0 2 N (10e-6 0.18e-6 0.4 8.56e-3) +V2 2 0 sweep 0 +.dc 0 1.8 0.05 +.plot v(3) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/inverter.ckt b/FreeEDA/LPCSim/LPCSim/ckt/inverter.ckt new file mode 100644 index 0000000..c04311c --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/inverter.ckt @@ -0,0 +1,7 @@ +V1 1 0 dc 1.8 +M1 3 1 2 P (20e-6 0.18e-6 -0.4 8.56e-3) +M2 3 0 2 N (10e-6 0.18e-6 0.4 8.56e-3) +V2 2 0 sweep 0 +.dc 0 1.8 0.05 +.plot v(3) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/linear1.ckt b/FreeEDA/LPCSim/LPCSim/ckt/linear1.ckt new file mode 100644 index 0000000..2f4a3ee --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/linear1.ckt @@ -0,0 +1,13 @@ +* linear circuit +V1 1 0 dc 1 +R1 1 2 1 +R2 2 0 1 +E1 2 3 4 5 0.5 +I1 0 3 dc 1 +R3 4 0 1 +R4 3 4 1 +G1 3 5 0 4 0.5 +R5 5 4 0.5 +R6 5 0 1 +.op +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/linear2.ckt b/FreeEDA/LPCSim/LPCSim/ckt/linear2.ckt new file mode 100644 index 0000000..19c7c48 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/linear2.ckt @@ -0,0 +1,10 @@ +* Example of current controlled voltage source +I1 0 1 dc 1 +R1 1 0 0.2 +R2 1 2 0.1 +R3 4 0 0.2 +R4 2 3 0.1 +V1 2 4 dc 0 +H1 3 0 V1 2 +.op +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/modifiedNodalExample.ckt b/FreeEDA/LPCSim/LPCSim/ckt/modifiedNodalExample.ckt new file mode 100644 index 0000000..d3b09bf --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/modifiedNodalExample.ckt @@ -0,0 +1,9 @@ +* Example to explain modified nodal analyis +V1 1 0 dc 5 +R1 1 2 1 +R2 2 0 1 +R3 2 3 1 +R4 1 3 1 +V2 3 0 dc 10 +.op +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/mosfet.sci b/FreeEDA/LPCSim/LPCSim/ckt/mosfet.sci new file mode 100644 index 0000000..319a9ec --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/mosfet.sci @@ -0,0 +1,6 @@ +M1 2 0 3 N (20e-6 0.18e-6 1 1e-3 1e-2) +V1 3 0 dc 2.5 +V2 1 0 dc 5 +R2 1 3 1 +.op +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/myComp.ckt b/FreeEDA/LPCSim/LPCSim/ckt/myComp.ckt new file mode 100644 index 0000000..7709b3c --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/myComp.ckt @@ -0,0 +1,5 @@ +V1 1 0 dc 5 +X2 1 2 myR (2) +R3 2 0 1 +.op +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/myCompSweep.ckt b/FreeEDA/LPCSim/LPCSim/ckt/myCompSweep.ckt new file mode 100644 index 0000000..d72be10 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/myCompSweep.ckt @@ -0,0 +1,6 @@ +V1 1 0 sweep 0 +R1 1 2 1 +X2 2 0 myR (1) +.dc 0 5 0.1 +.plot v(1) v(2) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/nodalExample.ckt b/FreeEDA/LPCSim/LPCSim/ckt/nodalExample.ckt new file mode 100644 index 0000000..828ad04 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/nodalExample.ckt @@ -0,0 +1,10 @@ +*Nodal Analysis Example +I1 0 1 dc 1 +R1 1 0 1 +R2 1 2 1 +R3 2 0 1 +R4 2 3a 2 +R5 3a 0 1 +I2 0 3a dc 1 +.op +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/pmos.ckt b/FreeEDA/LPCSim/LPCSim/ckt/pmos.ckt new file mode 100644 index 0000000..635a0d0 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/pmos.ckt @@ -0,0 +1,7 @@ +V1 2 0 dc 0 +M1 1 0 2 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) +V2 3 0 sweep 0 +V3 3 1 dc 0 +.dc 0 1.8 0.1 +.plot i(V3) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/rc1.ckt b/FreeEDA/LPCSim/LPCSim/ckt/rc1.ckt new file mode 100644 index 0000000..3793f46 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/rc1.ckt @@ -0,0 +1,8 @@ +V1 1 0 dc 5 +R1 1 2 1000 +R2 2 3 1000 +C1 3 0 0.1e-6 ic=3 +.tran 0 0.5e-3 0.01e-3 UIC +.ic v(2)=1 +.print v(3) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/rc_ac.ckt b/FreeEDA/LPCSim/LPCSim/ckt/rc_ac.ckt new file mode 100644 index 0000000..1a7403b --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/rc_ac.ckt @@ -0,0 +1,6 @@ +V1 1 0 ac 5 +R1 1 2 100 +C1 2 0 1e-6 +.ac lin 10 1 10000 +.plot v(2) +.end diff --git a/FreeEDA/LPCSim/LPCSim/ckt/rc_ac.spice b/FreeEDA/LPCSim/LPCSim/ckt/rc_ac.spice new file mode 100644 index 0000000..d09f0f8 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/rc_ac.spice @@ -0,0 +1,12 @@ +* AC Analysis +V1 1 0 ac 1 +R1 1 2 100 +C1 2 0 1e-6 +.ac lin 10 100 10000 + +.control +run +plot v(2) +.endc +.end + diff --git a/FreeEDA/LPCSim/LPCSim/ckt/test.ckt b/FreeEDA/LPCSim/LPCSim/ckt/test.ckt new file mode 100644 index 0000000..d72be10 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/ckt/test.ckt @@ -0,0 +1,6 @@ +V1 1 0 sweep 0 +R1 1 2 1 +X2 2 0 myR (1) +.dc 0 5 0.1 +.plot v(1) v(2) +.end diff --git a/FreeEDA/LPCSim/LPCSim/diode_Dref.fig b/FreeEDA/LPCSim/LPCSim/diode_Dref.fig new file mode 100644 index 0000000..507de5c --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/diode_Dref.fig @@ -0,0 +1,59 @@ +#FIG 3.2 Produced by xfig version 3.2.5 +Landscape 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+\setlength{\unitlength}{3947sp}% +% +\begingroup\makeatletter\ifx\SetFigFont\undefined% +\gdef\SetFigFont#1#2#3#4#5{% + \reset@font\fontsize{#1}{#2pt}% + \fontfamily{#3}\fontseries{#4}\fontshape{#5}% + \selectfont}% +\fi\endgroup% +\begin{picture}(2435,1374)(1939,-1648) +\put(2251,-661){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$D_{dnumber}$}% +}}}} +\put(3076,-961){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$R_{D_{dnumber}}$}% +}}}} +\put(4351,-886){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$I_{D_{dnumber}}$}% +}}}} +\end{picture}% diff --git a/FreeEDA/LPCSim/LPCSim/discretization.sci b/FreeEDA/LPCSim/LPCSim/discretization.sci new file mode 100644 index 0000000..f020b3b --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/discretization.sci @@ -0,0 +1,104 @@ +// discretization.sci is a scilab file to discretize time dependent components. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + +function [A,B]=discretization(A,B,x,t,i) + global LPCSim_HOME; + exec(LPCSim_HOME+'lib/waveform.sci',-1); + global g; + global wave; + global timeArray; + global cValue; + waveIndex=1; + _T=1; + _C=1; + Edges=edge_number(g); + Nodes=node_number(g); + if(i>1) h=t-sweepArray(i-1); end + + for edge_cnt = 1:Edges, +// Compute time dependent voltage source value at time t + if(g.edges.data.type(edge_cnt)=='V') + tempWave=wave(waveIndex); + if(tempWave(1)=='DC') + waveIndex=waveIndex+1; + elseif(tempWave(1)=='SWEEP') + waveIndex=waveIndex+1; + elseif(tempWave(1)=='SINE'|tempWave(1)=='PULSE') + waveIndex=waveIndex+1; + if(tempWave(1)=='SINE') + g.edges.data.value(edge_cnt)=sine(tempWave,t); + else + g.edges.data.value(edge_cnt)=pulse(tempWave,t); + end +// Update rhs vector + B(Nodes-1+_T) = g.edges.data.value(edge_cnt); + end + _T=_T+1; + clear tempWave; +// Compute time dependent current source value at time t + elseif(g.edges.data.type(edge_cnt)=='I'&~(g.edges.data.type(edge_cnt-1)=='X')&~(g.edges.data.type(edge_cnt-1)=='D')&~(g.edges.data.type(edge_cnt-1)=='C')) + tempWave=wave(waveIndex); + if(tempWave(1)=='DC') + waveIndex=waveIndex+1; + elseif(tempWave(1)=='SWEEP') + waveIndex=waveIndex+1; + elseif(tempWave(1)=='SINE'|tempWave(1)=='PULSE') + waveIndex=waveIndex+1; + oldCurrent=g.edges.data.value(edge_cnt); + if(tempWave(1)=='SINE') + g.edges.data.value(edge_cnt)=sine(tempWave,t); + else + g.edges.data.value(edge_cnt)=pulse(tempWave,t); + end +// Update rhs vector + B(Nodes-1+_T) = g.edges.data.value(edge_cnt); + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + if(~(source==0)) + B(source) = B(source)-(g.edges.data.value(edge_cnt)-oldCurrent); + end + if(~(sink==0)) + B(sink) =B(sink) + (g.edges.data.value(edge_cnt)-oldCurrent); + end + end + clear tempWave; +// Update conductance and current source of dynamic device + elseif(g.edges.data.type(edge_cnt)=='C') + if(i>1) + if(g.edges.head(edge_cnt)==1) + tempVoltage=x(g.edges.tail(edge_cnt)-1); + elseif(g.edges.tail(edge_cnt)==1) + tempVoltage=-x(g.edges.head(edge_cnt)-1); + else + tempVoltage=x(g.edges.tail(edge_cnt)-1)-x(g.edges.head(edge_cnt)-1); + end + Gnew=cValue(_C)/h; + Gupdate=Gnew-g.edges.data.value(edge_cnt) + g.edges.data.value(edge_cnt)=Gnew; + Inew=cValue(_C)/h*tempVoltage; + Iupdate=Inew-g.edges.data.value(edge_cnt+1); + g.edges.data.value(edge_cnt+1)=Inew; +// Update matrix A and rhs vector + source=g.edges.tail(edge_cnt)-1; + sink=g.edges.head(edge_cnt)-1; + if(~(source==0)) + A(source,source) = A(source,source) + Gupdate; + B(source) = B(source)+Iupdate; + end + if(~(sink==0)) + A(sink,sink) = A(sink,sink) + Gupdate; + B(sink) =B(sink) - Iupdate; + end + if(~(sink==0) & ~(source==0)) + A(source,sink) = A(source,sink) - Gupdate; + A(sink,source) = A(sink,source) - Gupdate; + end + _C=_C+1; + end + end + end +endfunction diff --git a/FreeEDA/LPCSim/LPCSim/genrateCallingLibF.sci b/FreeEDA/LPCSim/LPCSim/genrateCallingLibF.sci new file mode 100644 index 0000000..8a2188b --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/genrateCallingLibF.sci @@ -0,0 +1,24 @@ +// genrateCallingLibF.sci is a scilab file to create library function for a new components. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + +function generateCallingLibF(f_name) +fid = mopen('getlib.sci', 'w'); +if (fid == -1) + error("cannot open file for reading"); +end +libName=f_name+".sci"; +mfprintf(fid,'function I=func(voltage,parameter)\n'); +mfprintf(fid,"\texec("'%s"',-1);\n",libName); +mfprintf(fid,'\tI=%s_func(voltage,parameter);\n',f_name); +mfprintf(fid,'endfunction\n\n'); + +mfprintf(fid,'function Gj=jacobian(voltage,parameter)\n'); +mfprintf(fid,"\texec("'%s"',-1);\n",libName); +mfprintf(fid,'\tGj=%s_Jacobian(voltage,parameter);\n',f_name); +mfprintf(fid,'endfunction'); +mclose(fid) +endfunction diff --git a/FreeEDA/LPCSim/LPCSim/getlib.sci b/FreeEDA/LPCSim/LPCSim/getlib.sci new file mode 100644 index 0000000..ac01e7c --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/getlib.sci @@ -0,0 +1,14 @@ +// MNA based Circuit Simulator +// Yogesh Dilip Save +// Research Scholor +// IIT Bombay, Mumbai-400076 + +function I=func(voltage,parameter) + exec('myr.sci',-1); + I=myr_func(voltage,parameter); +endfunction + +function Gj=jacobian(voltage,parameter) + exec('myr.sci',-1); + Gj=myr_Jacobian(voltage,parameter); +endfunction diff --git a/FreeEDA/LPCSim/LPCSim/latfont b/FreeEDA/LPCSim/LPCSim/latfont new file mode 100644 index 0000000..90e1eb3 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/latfont @@ -0,0 +1,8 @@ +echo {\\input{$*.pstex_t}} >& dummy_font.tex +cat latfont1.tex dummy_font.tex latfont2.tex >& dummy_fig.tex +latex dummy_fig.tex +dvips -E -o dummy_fig.eps dummy_fig.dvi +mv dummy_fig.eps $*.eps +rm dummy_fig.* +rm -rf dummy_font.tex +evince $1.eps & diff --git a/FreeEDA/LPCSim/LPCSim/latfont1.tex b/FreeEDA/LPCSim/LPCSim/latfont1.tex new file mode 100644 index 0000000..e6301a4 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/latfont1.tex @@ -0,0 +1,20 @@ +\documentclass[12pt]{book} +\textwidth 6.5in +\textheight 9.0in +\topmargin 0.0in +\oddsidemargin 0.2in +\evensidemargin 0.2in +\textfloatsep 0.6cm +\abovecaptionskip 0.1cm +\usepackage[dvips]{graphicx} +\usepackage{makeidx} +\usepackage{epsfig} +\usepackage{color} +\setlength{\textwidth}{50cm} +\setlength{\textheight}{50cm} +\begin{document} +\pagestyle{empty} + +\begin{center} +%\resizebox{!}{5cm}{\input{cap_trns.pstex_t}} + diff --git a/FreeEDA/LPCSim/LPCSim/latfont2.tex b/FreeEDA/LPCSim/LPCSim/latfont2.tex new file mode 100644 index 0000000..3f4cd92 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/latfont2.tex @@ -0,0 +1,2 @@ +\end{center} +\end{document} \ No newline at end of file diff --git a/FreeEDA/LPCSim/LPCSim/lib/mos.sci b/FreeEDA/LPCSim/LPCSim/lib/mos.sci new file mode 100644 index 0000000..38067e5 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/lib/mos.sci @@ -0,0 +1,18 @@ +// mos.sci is a scilab file to read MOSFET parameters. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +function [Vt,beta1]=getMosPara(parameter) + W=parameter(2); + L=parameter(3); + Vt=parameter(4); + Cox=parameter(5); + if(parameter(1)=='P') + u=0.4; + else + u=0.8; + end + beta1=W/L*Cox*u; +endfunction diff --git a/FreeEDA/LPCSim/LPCSim/lib/waveform.sci b/FreeEDA/LPCSim/LPCSim/lib/waveform.sci new file mode 100644 index 0000000..e882ec5 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/lib/waveform.sci @@ -0,0 +1,43 @@ +// waveform.sci is a scilab file to read source parameters. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +function value=sine(param,t) + pi=3.14; + value=param(3)*sin(2*pi*param(4)*t); +endfunction + +function value=pulse(param,t) + v1=param(2); // Initial value + v2=param(3); // Pulsed value + td=param(4); // Delay time + tr=param(5); // Rise time + tf=param(6); // Fall time + pw=param(7); // Pulse width + per=param(8); // Pulse period + while(t>per) + t=t-per; + end + if(v1>v2) + tr_back=tr; + tr=tf; + tf=tr_back; + end + if(t '' ) + token = strtok(" "); + if(length(token)) + [NodeNumber,potential]=sscanf(token,"V(%d)=%f"); + initialVoltage(icIndex)=[NodeNumber,potential]; + icIndex=icIndex+1; + end + end +// Get Output variable for printing + elseif (dev=='.PRINT') + token = strtok(tempStr," "); + while( token <> '' ) + token = strtok(" "); + if(length(token)) + if(msscanf(token,"%c")=='V') + if(length(strchr(token,'-'))) + if(length(strchr(token,'-'))==length(token)) + printNode=sscanf(token,"-V(%d)"); + vPrintList(vPrintIndex)=-findIndexStrList(string(printNode),nodeMap); + else + [printNode,printNode1]=sscanf(token,"V(%d)-V(%d)"); + vPrintList(vPrintIndex)=[findIndexStrList(string(printNode),nodeMap),findIndexStrList(string(printNode1),nodeMap)]; + end + else + printNode=sscanf(token,"V(%d)"); + vPrintList(vPrintIndex)=findIndexStrList(string(printNode),nodeMap); + end + vPrintIndex=vPrintIndex+1; + elseif(msscanf(token,"%c")=='I') + if(length(strchr(token,'-'))) + printNode=msscanf(token,"-I(%*c%d)"); + iPrintList(iPrintIndex)=-printNode; + else + printNode=msscanf(token,"I(%*c%d)"); + iPrintList(iPrintIndex)=printNode; + end + iPrintIndex=iPrintIndex+1; + end + end + end +// Get Output variable for plotting + elseif (dev=='.PLOT') + token = strtok(tempStr," "); + while( token <> '' ) + token = strtok(" "); + if(length(token)) + if(msscanf(token,"%c")=='V') + if(length(strchr(token,'-'))) + if(length(strchr(token,'-'))==length(token)) + printNode=sscanf(token,"-V(%d)"); + vPlotList(vPlotIndex)=-findIndexStrList(string(printNode),nodeMap); + else + [printNode,printNode1]=sscanf(token,"V(%d)-V(%d)"); + vPlotList(vPlotIndex)=[findIndexStrList(string(printNode),nodeMap),findIndexStrList(string(printNode1),nodeMap)]; + end + else + printNode=sscanf(token,"V(%d)"); + vPlotList(vPlotIndex)=findIndexStrList(string(printNode),nodeMap); + end + vPlotIndex=vPlotIndex+1; + elseif(msscanf(token,"%c")=='I') + if(length(strchr(token,'-'))) + printNode=msscanf(token,"-I(%*c%d)"); + iPlotList(iPlotIndex)=-printNode; + else + printNode=msscanf(token,"I(%*c%d)"); + iPlotList(iPlotIndex)=printNode; + end + iPlotIndex=iPlotIndex+1; + end + end + end +// Find number of nodes in the circuit + else + devtype=sscanf(tempStr, "%c"); + if(devtype=='M') + [source,sink,gate] = sscanf(tempStr, "%*s %s %s %s"); + Index=findIndexStrList(gate,nodeMap); + if(Index==-1) + nodeMap(Nodes)=gate; + Nodes=Nodes+1; + end + else + [source,sink] = sscanf(tempStr, "%*s %s %s"); + end + Index=findIndexStrList(source,nodeMap); + if(Index==-1) + nodeMap(Nodes)=source; + Nodes=Nodes+1; + end + Index=findIndexStrList(sink,nodeMap); + if(Index==-1) + nodeMap(Nodes)=sink; + Nodes=Nodes+1 + end + end + end +err=mclose(fid) + +Nodes=Nodes-1; +//catch +// disp("Error in circuit file. Error code:110. Exiting......."); +// abort; +//end +endfunction + +function T=convertCircuitIntoGraph(filename,Nodes) +global g; +global model; +global wave; +global iPrintList; +global iPlotList; +global cValue; +global cInitial; +global NLFlag; +global dynamicFlag; +global nodeMap; + +model=list(0); +wave=list(0); +Edges=0; +T=0; +X=0; + +//try +// Open the circuit file +fid=mopen(filename,'r'); +firstEdge=%t +X=1; +C=1; +waveIndex=1; + +// Scan each line of the circuit file +while (1) + tempStr=mgetl(fid,1); + tempStr=stripblanks(tempStr); + if (length(tempStr)==0) + continue; + end + if (part(tempStr,1)=='*') + continue; + end + tempStr=convstr(tempStr,'u') + [dev] = sscanf(tempStr, "%s"); + if (dev=='.END') + break; + elseif (dev=='.OP'|dev=='.TRAN'|dev=='.DC'|dev=='.IC'|dev=='.PLOT'|dev=='.PRINT'|dev=='.AC'|dev=='.INCLUDE') + continue; + else + [sourceS, sinkS] = sscanf(tempStr, "%*s %s %s"); + source=findIndexStrList(sourceS,nodeMap); + sink=findIndexStrList(sinkS,nodeMap); + Edges=Edges+1; + if(firstEdge) // initializing graph with first edge + g = make_graph('my_graph',1,Nodes,source,sink); + g = add_edge_data(g,'type'); + g = add_edge_data(g,'value'); + g = add_edge_data(g,'devName'); + firstEdge=%f; + else + g=add_edge(source,sink,g); + end + [device_type] = sscanf(dev, "%c"); + g.edges.data.devName(Edges) = dev; + select (device_type) + case 'R' then // Resistance + g.edges.data.type(Edges) = device_type; + [value] = sscanf(tempStr, "%*s %*s %*s %f"); + g.edges.data.value(Edges) = 1/value; + + case 'I' then // Current Source + tempWave=list(0); + g.edges.data.type(Edges) = device_type; + wavtype = sscanf(tempStr, "%*s %*s %*s %s"); + [wave(waveIndex),g.edges.data.value(Edges)] = getSourceParam(tempStr,wavtype); + waveIndex=waveIndex+1; + + case 'V' then // Voltage Source + tempWave=list(0); + g.edges.data.type(Edges) = device_type; + Index=msscanf(tempStr, "%*c%d"); + wavtype1 = sscanf(tempStr, "%*s %*s %*s %s"); + wavtype2=strsplit(wavtype1,'('); + wavtype=wavtype2(1); + [wave(waveIndex),g.edges.data.value(Edges)] = getSourceParam(tempStr,wavtype); + waveIndex=waveIndex+1; + T=T+1; + // For printing and plotting current variables + if(~(iPlotList(1)==0)) + Index=findIndex(Index,iPlotList); + if(~(Index==0)) + iPlotList(Index)=T; + end + end + if(~(iPrintList(1)==0)) + Index=findIndex(Index,iPrintList); + if(~(Index==0)) + iPrintList(Index)=T; + end + end + + case 'G' then // Voltage Controlled Current Source + g.edges.data.type(Edges) = device_type; + [sourceCS sinkCS value] = sscanf(tempStr, "%*s %*s %*s %s %s %f"); + sourceC=findIndexStrList(sourceCS,nodeMap); + sinkC=findIndexStrList(sinkCS,nodeMap); + g.edges.data.value(Edges) = value; + Edges=Edges+1; + // Add Current Source for voltage sensing + g=add_edge(sourceC,sinkC,g); + g.edges.data.type(Edges) = 'I'; + g.edges.data.value(Edges) = 0; + tempWave=list(0); + tempWave(1)='dc'; + wave(waveIndex)=tempWave; + waveIndex=waveIndex+1; + clear tempWave; + + case 'E' then // Voltage Controlled Voltage Source + g.edges.data.type(Edges) = device_type; + [sourceCS sinkCS value] = sscanf(tempStr, "%*s %*s %*s %s %s %f"); + sourceC=findIndexStrList(sourceCS,nodeMap); + sinkC=findIndexStrList(sinkCS,nodeMap); + g.edges.data.value(Edges) = value; + Edges=Edges+1; + // Add Current Source for voltage sensing + g=add_edge(sourceC,sinkC,g); + g.edges.data.type(Edges) = 'I'; + g.edges.data.value(Edges) = 0; + T=T+1; + tempWave=list(0); + tempWave(1)='dc'; + wave(waveIndex)=tempWave; + waveIndex=waveIndex+1; + clear tempWave; + + case 'F' then // Current Controlled Current Source + g.edges.data.type(Edges) = device_type; + [value] = sscanf(tempStr, "%*s %*s %*s %*s %f"); + g.edges.data.value(Edges) = value; + Edges=Edges+1; + T=T+1; + + case 'H' then // Current Controlled Voltage Source + g.edges.data.type(Edges) = device_type; + [value] = sscanf(tempStr, "%*s %*s %*s %*s %f"); + g.edges.data.value(Edges) = value; + Edges=Edges+1; + T=T+1; + + case 'D' then // Diode + NLFlag=%T; + tempModel=list(0); + g.edges.data.type(Edges) = 'D'; + tempModel(1) = sscanf(tempStr, "%*s %*s %*s %s"); + token = strtok(tempStr,"("); + i=2; + while( token <> '' ) + token = strtok(" )"); + if(length(token)) + tempModel(i)=atof(token); + i=i+1; + end + end + if(length(tempModel)==1) + tempModel(2)=1e-14; + tempModel(3)=0.026; + end + Is=tempModel(2); + Vt=tempModel(3); + model(X)=tempModel; + g.edges.data.value(Edges) = Is/Vt; + Edges=Edges+1; + // Add Current Source parallel with resistance(linearization) + g=add_edge(source,sink,g); + g.edges.data.type(Edges) = 'I'; + g.edges.data.value(Edges) = 0; + tempWave=list(0); + tempWave(1)='dc'; + wave(waveIndex)=tempWave; + waveIndex=waveIndex+1; + clear tempWave; + X=X+1; + clear tempModel; + + case 'M' then // MOSFET + tempModel=list(0); + g.edges.data.type(Edges) = device_type; + g.edges.data.value(Edges) = 1e-12; + Edges=Edges+1; + [gateNodeS,tempModel(1)] = sscanf(tempStr, "%*s %*s %*s %s %s"); + gateNode=findIndexStrList(gateNode,nodeMap); + token = strtok(tempStr,"("); + i=2; + while( token <> '' ) + token = strtok(" )"); + if(length(token)) + tempModel(i)=atof(token); + i=i+1; + end + end + model(X)=tempModel; + + // Add current source drain to source + g=add_edge(source,sink,g); + g.edges.data.type(Edges) = 'I'; + g.edges.data.value(Edges) = 0; + tempWave=list(0); + tempWave(1)='dc'; + wave(waveIndex)=tempWave; + waveIndex=waveIndex+1; + clear tempWave; + Edges=Edges+1; + + // Add current source gate to source + g=add_edge(gateNode,sink,g); + g.edges.data.type(Edges) = 'I'; + g.edges.data.value(Edges) = 0; + tempWave=list(0); + tempWave(1)='dc'; + wave(waveIndex)=tempWave; + waveIndex=waveIndex+1; + clear tempWave; + X=X+1; + Edges=Edges+1; + + // Add capactior gate to drain + g=add_edge(gateNode,source,g); + g.edges.data.type(Edges) = 'C'; + cValue(C)=0.5*tempModel(4)*tempModel(2)*tempModel(3); + g.edges.data.value(Edges) = 1e-12; + Edges=Edges+1; + + g=add_edge(source,gateNode+1,g); + g.edges.data.type(Edges) = 'I'; + g.edges.data.value(Edges) = 0; + tempWave=list(0); + tempWave(1)='dc'; + wave(waveIndex)=tempWave; + waveIndex=waveIndex+1; + clear tempWave; + C=C+1; + Edges=Edges+1; + + // Add capacitor gate to source + g=add_edge(gateNode,sink,g); + g.edges.data.type(Edges) = 'C'; + cValue(C)=0.5*tempModel(4)*tempModel(2)*tempModel(3); + g.edges.data.value(Edges) = 1e-12; + Edges=Edges+1; + + g=add_edge(sink,gateNode,g); + g.edges.data.type(Edges) = 'I'; + g.edges.data.value(Edges) = 0; + tempWave=list(0); + tempWave(1)='dc'; + wave(waveIndex)=tempWave; + waveIndex=waveIndex+1; + clear tempWave; + C=C+1; + clear tempModel; + + case 'C' then // Capacitor + dynamicFlag=%T; + g.edges.data.type(Edges) = 'C'; + [value] = sscanf(tempStr, "%*s %*s %*s %f"); + token=strtok(tempStr,"="); + token = strtok(" "); + if(token <> '') + cInitial(C)=atof(token); + else + cInitial(C)=0.0; + end + cValue(C)=value; + g.edges.data.value(Edges) = 0.0; + Edges=Edges+1; + g=add_edge(sink,source,g); + g.edges.data.type(Edges) = 'I'; + g.edges.data.value(Edges) = 0; + tempWave=list(0); + tempWave(1)='dc'; + wave(waveIndex)=tempWave; + waveIndex=waveIndex+1; + clear tempWave; + C=C+1; + + case 'X' then // UserDefined Component + tempModel=list(0); + g.edges.data.type(Edges) = 'X'; + tempModel(1) = sscanf(tempStr, "%*s %*s %*s %s"); + i=2; + token = strtok(tempStr,"("); + while( token <> '' ) + token = strtok(" )"); + if(length(token)) + tempModel(i)=atof(token); + i=i+1; + end + end + model(X)=tempModel; + generateCallingLibF(tempModel(1)); + exec('getlib.sci',-1); + value=jacobian(0.0,model(X)); + if(value>1d-6) + g.edges.data.value(Edges) = value; + else + g.edges.data.value(Edges) = 1d-6; + end + Edges=Edges+1; + g=add_edge(source,sink,g); + g.edges.data.type(Edges) = 'I'; + g.edges.data.value(Edges) = 0; + tempWave=list(0); + tempWave(1)='dc'; + wave(waveIndex)=tempWave; + waveIndex=waveIndex+1; + clear tempWave; + X=X+1; + clear tempModel; + else + printf("Incorrect input file\n"); + exit(0); + end + end +end //while +mclose(fid); +//catch +// disp("Error in circuit file. Error code: 120 Exiting......."); +// abort; +//end +endfunction + +function [tempWave,value]=getSourceParam(tempStr,wavtype) + tempWave=list(0); + tempWave(1)=wavtype; + if(wavtype=='DC') + value = sscanf(tempStr, "%*s %*s %*s %*s %f"); + elseif(wavtype=='SWEEP') + value = sscanf(tempStr, "%*s %*s %*s %*s %f"); + elseif(wavtype=='AC') + value = sscanf(tempStr, "%*s %*s %*s %*s %f"); + else + token = strtok(tempStr,"("); + i=2; + while( token <> '' ) + token = strtok(" )"); + if(length(token)) + tempWave(i)=atof(token); + i=i+1; + end + end + value = 0; + end +endfunction diff --git a/FreeEDA/LPCSim/LPCSim/support/atof.sci b/FreeEDA/LPCSim/LPCSim/support/atof.sci new file mode 100644 index 0000000..2933af1 --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/support/atof.sci @@ -0,0 +1,7 @@ +function value=atof(tempStr) + value=sscanf(tempStr,"%e"); +endfunction + +function value=atoi(tempStr) + value=sscanf(tempStr,"%d"); +endfunction diff --git a/FreeEDA/LPCSim/LPCSim/support/findIndex.sci b/FreeEDA/LPCSim/LPCSim/support/findIndex.sci new file mode 100644 index 0000000..90293cc --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/support/findIndex.sci @@ -0,0 +1,9 @@ +function Index=findIndex(Index,searchList) + for i=1:1:length(searchList) + if(searchList(i)==Index) + Index=i; + return; + end + end + Index=0; +endfunction diff --git a/FreeEDA/LPCSim/LPCSim/tranAnalysis.sci b/FreeEDA/LPCSim/LPCSim/tranAnalysis.sci new file mode 100644 index 0000000..5f35a0c --- /dev/null +++ b/FreeEDA/LPCSim/LPCSim/tranAnalysis.sci @@ -0,0 +1,383 @@ +// tranAnalysis.sci is a scilab file to perform Transient Analysis. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// Copyright (C) 2012 Yogesh Dilip Save +// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + +function [A,B,x]=transientAnalysis(A,B,x,t,i) + global LPCSim_HOME; + exec(LPCSim_HOME+'discretization.sci',-1); + MaxNRitr=50; + if(i-2) +// Discretize time dependent component and update matrices + [A,B]=discretization(A,B,x,t,i); + +// Perform Operating Point Analysis on static circuit + [A,B,x]=OPAnalysis(A,B); + +// Store Output Variable for plotting/printing + buildOutput(x,t,i); + else +// Perform Operating Point Analysis on static circuit at t=0+ + // Build Modified Nodal Matrix for linear devices + [C,d]=buildMatrices2(g,x); + + // Perform Operating Point Analysis on static circuit + [C,d,x]=OPAnalysis(C,d); + + // Store Output Variable for plotting/printing + buildOutput(x,t,i); + end +endfunction + +function [x]=setIntialCondition(K,y,x,_T,UIC) +// Compute fictitious node potential at t=0 + global g; + _C=1; + first_edge=%t; + Nodes=node_number(g); + nodeCovered=zeros(Nodes,1); + xnew=zeros(Nodes,1); + Edges=1; + +// Build a tree of Voltage sources + for edge_cnt = 1:edge_number(g), + if(g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H') + source=g.edges.tail(edge_cnt); + sink=g.edges.head(edge_cnt); + if(first_edge) + g1 = make_graph('mygraph1',1,Nodes,source,sink); + g1 = add_edge_data(g1,'voltage'); + g1 = add_edge_data(g1,'number'); + if(g.edges.data.type(edge_cnt)=='V') + g1.edges.data.voltage(Edges) = g.edges.data.value(edge_cnt); + else + g1.edges.data.voltage(Edges) = x(source)-x(sink); + end + g1.edges.data.number(Edges) = edge_cnt; + Edges=Edges+1; + first_edge=%f; + else + g1=add_edge(source,sink,g1); + if(g.edges.data.type(edge_cnt)=='V') + g1.edges.data.voltage(Edges) = g.edges.data.value(edge_cnt); + else + g1.edges.data.voltage(Edges) = x(source)-x(sink); + end + g1.edges.data.number(Edges) = edge_cnt; + Edges=Edges+1; + end + if(~nodeCovered(source)) + nodeCovered(source)=1; + end + if(~nodeCovered(sink)) + nodeCovered(sink)=1; + end + end + end + + chargeBalanceRequired=%f; +// If UIC is set then use device intial condition (with highest priority) + if(UIC==1) + // Extend the tree by adding voltage source corresponding to capacitor with initial condition + global cInitial; + for edge_cnt = 1:edge_number(g), + if(g.edges.data.type(edge_cnt)=='C') + source=g.edges.tail(edge_cnt); + sink=g.edges.head(edge_cnt); + if(~nodeCovered(source)) + if(~nodeCovered(sink)) + nodeCovered(sink)=1; + end + nodeCovered(source)=1; + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=cInitial(_C); + elseif(~nodeCovered(sink)) + nodeCovered(sink)=1; + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=cInitial(_C); + else + [nc,ncomp]=connex(g1); + if(ncomp(source)~=ncomp(sink)) + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=cInitial(_C); + else + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=cInitial(_C); + if(~chargeBalanceRequired) + cap=list(Edges); + chargeBalanceRequired=%t; + else + cap($+1)=Edges; + end + end + end + g1.edges.data.number(Edges) = edge_cnt; + Edges=Edges+1; + _C=_C+1; + end + end + end + + if(~chargeBalanceRequired) + // Insert voltage sources corresponding to intial condition + global initialVoltage; + for j=1:1:length(initialVoltage); + templist=initialVoltage(j); + source=templist(1)+1; + sink=1; + if(~nodeCovered(source)) + nodeCovered(source)=1; + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=templist(2); + g1.edges.data.number(Edges) = Edges; + Edges=Edges+1; + end + end + + // Extend the tree to complete graph + if(UIC==1) + for edge_cnt = 1:edge_number(g), + if(edge_number(g1)==Nodes-1) break; end; + if(~(g.edges.data.type(edge_cnt)=='C'|g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H'|g.edges.data.type(edge_cnt)=='I')) + source=g.edges.tail(edge_cnt); + sink=g.edges.head(edge_cnt); + if(~nodeCovered(source)) + if(~nodeCovered(sink)) + nodeCovered(sink)=1; + end + nodeCovered(source)=1; + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=0.0; + g1.edges.data.number(Edges) = Edges; + Edges=Edges+1; + elseif(~nodeCovered(sink)) + nodeCovered(sink)=1; + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=0.0; + g1.edges.data.number(Edges) = Edges; + Edges=Edges+1; + else + [nc,ncomp]=connex(g1); + if(nc==1) break; end; + if(ncomp(source)~=ncomp(sink)) + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=0.0; + g1.edges.data.number(Edges) = Edges; + Edges=Edges+1; + end + end + end + end + else + for edge_cnt = 1:edge_number(g), + if(~(g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H'|g.edges.data.type(edge_cnt)=='I')) + source=g.edges.tail(edge_cnt); + sink=g.edges.head(edge_cnt); + if(~nodeCovered(source)) + if(~nodeCovered(sink)) + nodeCovered(sink)=1; + end + nodeCovered(source)=1; + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=0.0; + g1.edges.data.number(Edges) = Edges; + Edges=Edges+1; + elseif(~nodeCovered(sink)) + nodeCovered(sink)=1; + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=0.0; + g1.edges.data.number(Edges) = Edges; + Edges=Edges+1; + else + [nc,ncomp]=connex(g1); + if(nc==1) break; end; + if(ncomp(source)~=ncomp(sink)) + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=0.0; + g1.edges.data.number(Edges) = Edges; + Edges=Edges+1; + end + end + end + end + end + // Find the node potentials from tree branch voltages at t=0 + g1.directed=0; + listOfNodes=list(1); + nodeCovered(1)=0; + for i=1:Nodes + predecessor=listOfNodes(i); + neNodes=neighbors(predecessor,g1); + [k1 k2]=size(neNodes); + for j=1:k2 + sucessor=neNodes(j); + if(nodeCovered(sucessor)) + listOfNodes=lstcat(listOfNodes,sucessor); + nodeCovered(sucessor)=0; + e=nodes_2_path([predecessor sucessor],g1); + if(g.edges.tail(e)==predecessor) + xnew(sucessor)=xnew(predecessor)-g1.edges.data.voltage(e); + else + xnew(sucessor)=xnew(predecessor)+g1.edges.data.voltage(e); + end + end + end + end + x(1:Nodes-1,1)=xnew(2:Nodes,1); + + // Charge Balance scheme using equivalent electrical representation + else + // Find the components which require charge balancing + [nc,ncomp]=connex(g1); + for j=1:1:length(cap), + if(j==1) + CBcomp=list(ncomp(g.edges.tail(g1.edges.data.number(cap(j))))); + else + tempBlock=ncomp(g.edges.tail(g1.edges.data.number(cap(j)))); + blockFound=%f + for j=1:1:length(CBcomp), + if(CBcomp(j)==tempBlock) + blockFound=%t; + end + end + if(~blockFound) + CBcomp($+1)=ncomp(g.edges.tail(g1.edges.data.number(cap(j)))); + end + end + end + + // Find edge voltages of the components by operating point analysis + for j=1:1:length(CBcomp), + disp(length(CBcomp)); + firstEdge=%t; + Edges=1; + k=1; + _C=0; + for i=1:Nodes + if(ncomp(i)==CBcomp(j)) + nodeMap(k)=i; + nodeReverseMap(i)=k; + k=k+1; + end + end + for edge_cnt = 1:edge_number(g1), + edge_cnt1=g1.edges.data.number(edge_cnt); + source=g.edges.tail(edge_cnt1); + sink=g.edges.head(edge_cnt1); + if(g.edges.data.type(edge_cnt1)=='C') + _C=_C+1; + end + if(~(ncomp(source)==CBcomp(j))) + continue; + end + source=nodeReverseMap(source); + sink=nodeReverseMap(sink); + if(firstEdge) // initializing graph with first edge + g2 = make_graph('mygraph2',1,k-1,source,sink); + g2 = add_edge_data(g2,'type'); + g2 = add_edge_data(g2,'value'); + g2 = add_edge_data(g2,'number'); + firstEdge=%f; + else + g2=add_edge(source,sink,g2); + end + if(g.edges.data.type(edge_cnt1)=='V') + g2.edges.data.type(Edges) = 'V'; + g2.edges.data.value(Edges) = g.edges.data.value(edge_cnt1); + g2.edges.data.number(Edges) = edge_cnt; + Edges=Edges+1; + // Replace capacitor with conductance parallel with conductance + else + g2.edges.data.type(Edges) = 'R' + g2.edges.data.value(Edges) = g.edges.data.value(edge_cnt1); + g2.edges.data.number(Edges) = edge_cnt; + Edges=Edges+1; + g2=add_edge(source,sink,g2); + g2.edges.data.type(Edges) = 'I' + g2.edges.data.value(Edges) =-g.edges.data.value(edge_cnt1)*cInitial(_C); + g2.edges.data.number(Edges) = edge_cnt; + Edges=Edges+1; + end + end + // Build Modified Nodal Matrix for linear devices + [C,d]=buildMatrices3(g2); + + // Find node potetial + xnew=findNodePotential(C,d); + + // Find branch voltages from node potential + Edges=edge_number(g2); + for edge_cnt = 1:Edges, + if(g2.edges.head(edge_cnt)==1) + g1.edges.data.voltage(g2.edges.data.number(edge_cnt))=xnew(g2.edges.tail(edge_cnt)-1); + elseif(g.edges.tail(edge_cnt)==1) + g1.edges.data.voltage(g2.edges.data.number(edge_cnt))=-xnew(g2.edges.head(edge_cnt)-1); + else + g1.edges.data.voltage(g2.edges.data.number(edge_cnt))=xnew(g2.edges.tail(edge_cnt)-1)-xnew(g2.edges.head(edge_cnt)-1); + end + end + clear g2; + clear xnew; + end + // Extend it to form tree of complete graph + Nodes=node_number(g); + for edge_cnt = 1:edge_number(g), + if(edge_number(g1)==Nodes-1) break; end; + if(~(g.edges.data.type(edge_cnt)=='C'|g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H'|g.edges.data.type(edge_cnt)=='I')) + source=g.edges.tail(edge_cnt); + sink=g.edges.head(edge_cnt); + if(~nodeCovered(source)) + if(~nodeCovered(sink)) + nodeCovered(sink)=1; + end + nodeCovered(source)=1; + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=0.0; + g1.edges.data.number(Edges) = Edges; + Edges=Edges+1; + elseif(~nodeCovered(sink)) + nodeCovered(sink)=1; + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=0.0; + g1.edges.data.number(Edges) = Edges; + Edges=Edges+1; + else + [nc,ncomp]=connex(g1); + if(nc==1) break; end; + if(ncomp(source)~=ncomp(sink)) + g1=add_edge(source,sink,g1); + g1.edges.data.voltage(Edges)=0.0; + g1.edges.data.number(Edges) = Edges; + Edges=Edges+1; + end + end + end + end + + xnew=zeros(Nodes,1); + g1.directed=0; + listOfNodes=list(1); + nodeCovered(1)=0; + for i=1:Nodes + predecessor=listOfNodes(i); + neNodes=neighbors(predecessor,g1); + [k1 k2]=size(neNodes); + for j=1:k2 + sucessor=neNodes(j); + if(nodeCovered(sucessor)) + listOfNodes=lstcat(listOfNodes,sucessor); + nodeCovered(sucessor)=0; + e=nodes_2_path([predecessor sucessor],g1); + if(g.edges.tail(e)==predecessor) + xnew(sucessor)=xnew(predecessor)-g1.edges.data.voltage(e); + else + xnew(sucessor)=xnew(predecessor)+g1.edges.data.voltage(e); + end + end + end + end + x(1:Nodes-1,1)=xnew(2:Nodes,1); + end +endfunction diff --git a/FreeEDA/LPCSim/LUT/ids.cpp b/FreeEDA/LPCSim/LUT/ids.cpp new file mode 100644 index 0000000..cc6f489 --- /dev/null +++ b/FreeEDA/LPCSim/LUT/ids.cpp @@ -0,0 +1,394 @@ +/**************************************************************************** + This routine assumes the existance of file named "vbs_files.txt" + and the files decribed in the that file in current directory. + File vbs_files.txt contains vbs values and corresponding Id-Vds_Vgs file names + e.g. one entry may be 0.2 vbs_0.2.txt +*****************************************************************************/ + +/******************* Header *********************************/ +#include +#include +#include +#include +#include +#include + + +struct CoeffStruct{ + double x; + double y; + double z; +}; + +class NaturalCubicSpline1D{ +public: + double ValueAtX(double x); + void initialize(int n,double* xData,double* yData); + NaturalCubicSpline1D(int NO_OF_POINTS,double* xData,double* yData); //Read from array + NaturalCubicSpline1D(); //User input + ~NaturalCubicSpline1D(); + +private: + void DetermineCoeff(); + int NO_OF_POINTS; + CoeffStruct* coeffsArray; +}; + +class yCSpair{ +public: + double y; + NaturalCubicSpline1D xCubicSpline; + yCSpair(); + ~yCSpair(); +}; + +class CubicCubic{ +public: + double evaluate(double x,double y); + void Initialize(char* Id_Vd_Vg); + const CubicCubic & operator=(const CubicCubic &rhs); + CubicCubic(char* Id_Vd_Vg); + CubicCubic(char* yfileName,char* xzfileName); + CubicCubic(int no_yPoints, double yArray[],int *pxArray,double** xArray,double** zArray); + CubicCubic(); + ~CubicCubic(); +private: + int noYPoints; + yCSpair *CubicSplines1D; +}; + +class IdVbs{ +public: + double Evaluate(double vds,double vgs,double vbs); + void Initialize(double vbs); + IdVbs(); + ~IdVbs(); +private: + double vbs_l,vbs_h; //vbs lies in interval [vbs_l,vbs_h] + CubicCubic cc_l; + CubicCubic cc_h; +}; +/******************* Header *********************************/ + + +/********************* SciLab Callable Routine *******************************/ +//extern "C" _declspec(dllexport) +extern "C" +void ids_c( double *vds, + double *vgs, + double *vbs, + double *ids){ + IdVbs id; + *ids=id.Evaluate(*vds,*vgs,*vbs); +} + + +/****************************************************/ +using namespace std; + +double NaturalCubicSpline1D::ValueAtX(double x){ + /* x < Start Point first polynomial to be used + x > End Point last polynomial to be used + */ + + // Find the segment where x lies + int i=0; // i is used outside loop + for(i=0;i0;--i){ + h1=coeffsArray[i+1].x - coeffsArray[i].x; + coeffsArray[i].z = (v[i] - h1*coeffsArray[i+1].z ) / u[i]; + } +} + +void NaturalCubicSpline1D::initialize(int n,double* xData,double* yData){ + NO_OF_POINTS=n; + coeffsArray=new CoeffStruct[NO_OF_POINTS]; + for(int i=0;i>n_diffVgs; + idvdvg_file>>n_diffVds; + + noYPoints=n_diffVgs; + CubicSplines1D= new yCSpair[noYPoints]; + + double* vds_array; + double* ids_array; + vds_array=new double[n_diffVds]; + ids_array=new double[n_diffVds]; + + int index; + double vds; + double ids; + double vgs; + + for(int i=0;i>index; + idvdvg_file>>vds; + idvdvg_file>>ids; + idvdvg_file>>vgs; + CubicSplines1D[i].y=vgs; //repeat avoid + vds_array[j]=vds; + ids_array[j]=ids; + } + CubicSplines1D[i].xCubicSpline.initialize(n_diffVds,vds_array,ids_array); + } +} +const CubicCubic & CubicCubic::operator=(const CubicCubic &rhs){ + if (this != &rhs) { // make sure not same object + + for(int i=0;i>n_diffVgs; + idvdvg_file>>n_diffVds; + + noYPoints=n_diffVgs; + CubicSplines1D= new yCSpair[noYPoints]; + + double* vds_array; + double* ids_array; + vds_array=new double[n_diffVds]; + ids_array=new double[n_diffVds]; + + int index; + double vds; + double ids; + double vgs; + + for(int i=0;i>index; + idvdvg_file>>vds; + idvdvg_file>>ids; + idvdvg_file>>vgs; + CubicSplines1D[i].y=vgs; + vds_array[j]=vds; + ids_array[j]=ids; + } + CubicSplines1D[i].xCubicSpline.initialize(n_diffVds,vds_array,ids_array); + } +} + + +CubicCubic::CubicCubic(int no_yPoints, double yArray[],int *pxArray,double* xArray[],double* zArray[]){ + noYPoints=no_yPoints; + CubicSplines1D= new yCSpair[noYPoints]; + for(int i=0;i>n; + double* vds_array; + double* ids_array; + vds_array=new double[n]; + ids_array=new double[n]; + + if(!yf.is_open() || !xzf.is_open()){cout<<"Failed to open file "<>noYPoints; + CubicSplines1D= new yCSpair[noYPoints]; + for(int i=0;i>CubicSplines1D[i].y; + for(int j=0;j>vds_array[j]; + xzf>>ids_array[j]; + } + + CubicSplines1D[i].xCubicSpline.initialize(n,vds_array,ids_array); + } + } +} + +CubicCubic::CubicCubic(){ +} + +CubicCubic::~CubicCubic(){ + delete [] CubicSplines1D; + CubicSplines1D=0; +} + +yCSpair::yCSpair(){ +} + +yCSpair::~yCSpair(){ +} + +double IdVbs::Evaluate(double vds,double vgs,double vbs){ + if(vbs_l<=vbs && vbs>vbs_lp; + vbsf>>filename_l; + + bool found=false; + + while(!found || !vbsf.eof()){ + vbsf>>vbs_hp; + vbsf>>filename_h; + + if(vbs>=vbs_lp && vbs), with Reserved Font Name CMR6. +% This Font Software is licensed under the SIL Open Font License, Version 1.1. +% This license is in the accompanying file OFL.txt, and is also +% available with a FAQ at: http://scripts.sil.org/OFL. +%%EndComments +FontDirectory/CMR6 known{/CMR6 findfont dup/UniqueID known{dup +/UniqueID get 5000789 eq exch/FontType get 1 eq and}{pop false}ifelse +{save true}{false}ifelse}{false}ifelse +11 dict begin +/FontType 1 def +/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def +/FontName /CMR6 def +/FontBBox {-20 -250 1193 750 }readonly def +/UniqueID 5000789 def +/PaintType 0 def +/FontInfo 9 dict dup begin +/version (003.002) readonly def +/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050\051, with Reserved Font Name CMR6.) readonly def +/FullName (CMR6) readonly def +/FamilyName (Computer Modern) readonly def +/Weight (Medium) readonly def +/ItalicAngle 0 def +/isFixedPitch false def +/UnderlinePosition -100 def +/UnderlineThickness 50 def +end readonly def +/Encoding 256 array +0 1 255 {1 index exch /.notdef put} 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All Rights Reserved) readonly def +/FullName (CMR12) readonly def +/FamilyName (Computer Modern) readonly def +/Weight (Medium) readonly def +/ItalicAngle 0 def +/isFixedPitch false def +end readonly def +/FontName /CMR12 def +/PaintType 0 def +/FontType 1 def +/FontMatrix [0.001 0 0 0.001 0 0] readonly def +/Encoding 256 array +0 1 255 {1 index exch /.notdef put} for +dup 48 /zero put +dup 61 /equal put +readonly def +/FontBBox{-34 -251 988 750}readonly def +currentdict end +currentfile eexec +D9D66F633B846A97B686A97E45A3D0AA052A014267B7904EB3C0D3BD0B83D891 +016CA6CA4B712ADEB258FAAB9A130EE605E61F77FC1B738ABC7C51CD46EF8171 +9098D5FEE67660E69A7AB91B58F29A4D79E57022F783EB0FBBB6D4F4EC35014F +D2DECBA99459A4C59DF0C6EBA150284454E707DC2100C15B76B4C19B84363758 +469A6C558785B226332152109871A9883487DD7710949204DDCF837E6A8708B8 +2BDBF16FBC7512FAA308A093FE5CF4E9D2405B169CD5365D6ECED5D768D66D6C +68618B8C482B341F8CA38E9BB9BAFCFAAD9C2F3FD033B62690986ED43D9C9361 +3645B82392D5CAE11A7CB49D7E2E82DCD485CBA04C77322EB2E6A79D73DC194E +59C120A2DABB9BF72E2CF256DD6EB54EECBA588101ABD933B57CE8A3A0D16B28 +51D7494F73096DF53BDC66BBF896B587DF9643317D5F610CD9088F9849126F23 +DDE030F7B277DD99055C8B119CAE9C99158AC4E150CDFC2C66ED92EBB4CC092A +AA078CE16247A1335AD332DAA950D20395A7384C33FF72EAA31A5B89766E635F +45C4C068AD7EE867398F0381B07CB94D29FF097D59FF9961D195A948E3D87C31 +821E9295A56D21875B41988F7A16A1587050C3C71B4E4355BB37F255D6B237CE +96F25467F70FA19E0F85785FF49068949CCC79F2F8AE57D5F79BB9C5CF5EED5D +9857B9967D9B96CDCF73D5D65FF75AFABB66734018BAE264597220C89FD17379 +26764A9302D078B4EB0E29178C878FD61007EEA2DDB119AE88C57ECFEF4B71E4 +140A34951DDC3568A84CC92371A789021A103A1A347050FDA6ECF7903F67D213 +1D0C7C474A9053866E9C88E65E6932BA87A73686EAB0019389F84D159809C498 +1E7A30ED942EB211B00DBFF5BCC720F4E276C3339B31B6EABBB078430E6A09BB +377D3061A20B1EB98796B8607EECBC699445EAA866C38E02DF59F5EDD378303A +0733B90E7835C0AAF32BA04F1566D8161EA89CD4D14DDB953F8B910BFC8A7F03 +5020F55EF8FC2640ADADA156F6CF8F2EB6610F7EE8874A26CBE7CD154469B9F4 +ED76886B3FB679FFDEB59BB6C55AF7087BA48B75EE2FB374B19BCC421A963E15 +FE05ECAAF9EECDF4B2715010A320102E6F8CCAA342FA11532671CCCC52875960 +84CC1832A068F03077BAA0C4CB6EB8A6ACF53741914AD12120F8BE6F0A9A65BF +0C099B28A58F40BCC782438962B9EF94FFFD64B4825C08E2F64F1C494F2FE514 +0206F432B586845DEE85C5A0D896A89F2EE07B93CB341DE53930F82AEAEBDD18 +5005D096E36BF691DE22DBA7F5D63F1552AE0BC8E675E2FB600691535BC72BFD +8EF2B5B1D9076592E540D76A56C21F61A5E1ECBC18EE7E8C8F0990685A38A4E4 +81C19C4FAD43B6EF537879E828101FE69AD179FB7CC15F0EE90CBBD3BC739DB0 +2BBC2A179C50B8A892DECAA055E8C302C182B696DEE59643B74079F276D37223 +3F2D71C4FDE1D899A4A04BF758220C355992F1457B94389509BEF1AA38440EF5 +26A37FCC7D7C82F997D00CAC3C92634F984925933524165948D9BFB0901CB8EF +CC679534639F4E1FC505D21268135248DA3E82CCC4777DDB170AAB4C34456D92 +12C18137575210BD8C463F152F456C15DF361A2CC743A11590DA47B08679768D +E9A398F99BB361EB911D702CEEE6EF0D854A02CC9BFDD72FBFA4230B02798730 +54FEE7D11C9A73F97678C034C45E353DA8EFFBF417D266DCB6653C60778289CE +CFCB +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +cleartomark +%%EndFont +%%BeginFont: CMR6 +%!PS-AdobeFont-1.1: CMR6 1.0 +%%CreationDate: 1991 Aug 20 16:39:02 +% Copyright (C) 1997 American Mathematical Society. All Rights Reserved. +11 dict begin +/FontInfo 7 dict dup begin +/version (1.0) readonly def +/Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def +/FullName (CMR6) readonly def +/FamilyName (Computer Modern) readonly def +/Weight (Medium) readonly def +/ItalicAngle 0 def +/isFixedPitch false def +end readonly def +/FontName /CMR6 def +/PaintType 0 def +/FontType 1 def +/FontMatrix [0.001 0 0 0.001 0 0] readonly def +/Encoding 256 array +0 1 255 {1 index exch /.notdef put} for +dup 51 /three put +readonly def +/FontBBox{-20 -250 1193 750}readonly def +currentdict end +currentfile eexec +D9D66F633B846A97B686A97E45A3D0AA052A014267B7904EB3C0D3BD0B83D891 +016CA6CA4B712ADEB258FAAB9A130EE605E61F77FC1B738ABC7C51CD46EF8171 +9098D5FEE67660E69A7AB91B58F29A4D79E57022F783EB0FBBB6D4F4EC35014F +D2DECBA99459A4C59DF0C6EBA150284454E707DC2100C15B76B4C19B84363758 +469A6C558785B226332152109871A9883487DD7710949204DDCF837E6A8708B8 +2BDBF16FBC7512FAA308A093FE5CF4E9D2405B169CD5365D6ECED5D768D66D6C +68618B8C482B341F8CA38E9BB9BAFCFAAD9C2F3FD033B62690986ED43D9C9361 +3645B82392D5CAE11A7CB49D7E2E82DCD485CBA17D1AFFF95F4224CF7ECEE45C +BFB7C8C77C22A01C345078D28D3ECBF804CDC2FE5025FA0D05CCC5EFC0C4F87E +CBED13DDDF8F34E404F471C6DD2E43331D73E89BBC71E7BF889F6293793FEF5A +C9DD3792F032E37A364C70914843F7AA314413D022AE3238730B420A7E9D0CF5 +D0E24F501451F9CDECE10AF7E14FF15C4F12F3FCA47DD9CD3C7AEA8D1551017D +23131C09ED104C052054520268A4FA3C6338BA6CF14C3DE3BAF2EA35296EE3D8 +D6496277E11DFF6076FE64C8A8C3419FA774473D63223FFA41CBAE609C3D976B +93DFB4079ADC7C4EF07303F93808DDA9F651F61BCCF79555059A44CBAF84A711 +6D98083CEF58230D54AD486C74C4A257FC703ACF918219D0A597A5F680B606E4 +EF94ADF8BF91A5096A806DB64EC96636A98397D22A74932EB7346A9C4B5EE953 +CB3C80AA634BFC28AA938C704BDA8DC4D13551CCFE2B2784BE8BF54502EBA9AF +D49B79237B9C56310550BC30E9108BB06EAC755D6AA4E688EFE2A0AAB17F20FE +00CD0BFF1B9CB6BDA0FA3A29A3117388B6686657A150CE6421FD5D420F4F7FB5 +B0DAA1BA19D638676E9CF159AC7325EF17B9F74E082BEF75E10A31C7011C0FFA +99B797CE549B5C45238DD0FADD6B99D233AC69282DF0D91EA2DBD08CE0083904 +A6D968D5AE3BD159D01BDFF42D16111BC0A517C66B43972080D9DD4F3B9AE7FB +11B035CE715C1218B2D779761D8D7E9DEBE277531BD58F313EBD27E33BEF9DC5 +50C7821A8BBC3B9FDF899D7EAA0B94493B97AFEAC503EB5ED7A7AB663529DD50 +29E1FF043619C3969739047DCBFBDCF0C6774643659DAC4390023DE86CE973DC +A19F60FD3A6B29B9BE66B744F4B7324CE96BEA6D9A407F0A9F539851AAE24AA3 +48F025CBF1A7786EB2B75045AEBDDBFF36ED42ECB68F7EB89E766FA6FE146EB5 +3399024344493D2DFB81F5EF61BF51787F9E5DEFF1C689BDEFD186A8E66BFF1F +1C3CE0F5B3EBC5031A1426DBAD6629A80611AA092E35C5E4E545D1673F886200 +E30D96BCDA8FA05FDFC34136A0ABA1166DE06D111D9F8119C829B2C8C41629AD +D43173731D85EB9A11FD7C5E2DFC999B182D11DCAE2F5603F4BA2A3A44B1EB06 +854D01254ABFC9AB9B5713C2A05D32343D3423B911B990607A2C208F8583ECA8 +B5D6D571753F75D3ECD1A0F233FF46F1A8E410791DB7B312E19E45439012F882 +CB7601413853660A98B9A195C7AF5B1BE01153D3D49AF04FB4758D035493F308 +7F2A6B70616185C8A95986E92C3FE1C4B02CB8CD +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +cleartomark +%%EndFont +%%BeginFont: CMMI8 +%!PS-AdobeFont-1.1: CMMI8 1.100 +%%CreationDate: 1996 Jul 23 07:53:54 +% Copyright (C) 1997 American Mathematical Society. All Rights Reserved. +11 dict begin +/FontInfo 7 dict dup begin +/version (1.100) readonly def +/Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def +/FullName (CMMI8) readonly def +/FamilyName (Computer Modern) readonly def +/Weight (Medium) readonly def +/ItalicAngle -14.04 def +/isFixedPitch false def +end readonly def +/FontName /CMMI8 def +/PaintType 0 def +/FontType 1 def +/FontMatrix [0.001 0 0 0.001 0 0] readonly def +/Encoding 256 array +0 1 255 {1 index exch /.notdef put} for +dup 67 /C put +dup 84 /T put +readonly def +/FontBBox{-24 -250 1110 750}readonly def +currentdict end +currentfile eexec +D9D66F633B846A97B686A97E45A3D0AA0529731C99A784CCBE85B4993B2EEBDE +3B12D472B7CF54651EF21185116A69AB1096ED4BAD2F646635E019B6417CC77B +532F85D811C70D1429A19A5307EF63EB5C5E02C89FC6C20F6D9D89E7D91FE470 +B72BEFDA23F5DF76BE05AF4CE93137A219ED8A04A9D7D6FDF37E6B7FCDE0D90B +986423E5960A5D9FBB4C956556E8DF90CBFAEC476FA36FD9A5C8175C9AF513FE +D919C2DDD26BDC0D99398B9F4D03D6A8F05B47AF95EF28A9C561DBDC98C47CF5 +5250011D19E9366EB6FD153D3A100CAA6212E3D5D93990737F8D326D347B7EDC +4391C9DF440285B8FC159D0E98D4258FC57892DDF753642CD526A96ACEDA4120 +788F22B1D09F149794E66DD1AC2C2B3BC6FEC59D626F427CD5AE9C54C7F78F62 +C36F49B3C2E5E62AFB56DCEE87445A12A942C14AE618D1FE1B11A9CF9FAA1F32 +617B598CE5058715EF3051E228F72F651040AD99A741F247C68007E68C84E9D1 +D0BF99AA5D777D88A7D3CED2EA67F4AE61E8BC0495E7DA382E82DDB2B009DD63 +532C74E3BE5EC555A014BCBB6AB31B8286D7712E0E926F8696830672B8214E9B +5D0740C16ADF0AFD47C4938F373575C6CA91E46D88DE24E682DEC44B57EA8AF8 +4E57D45646073250D82C4B50CBBB0B369932618301F3D4186277103B53B3C9E6 +DB42D6B30115F67B9D078220D5752644930643BDF9FACF684EBE13E39B65055E +B1BD054C324962025EC79E1D155936FE32D9F2224353F2A46C3558EF216F6BB2 +A304BAF752BEEC36C4440B556AEFECF454BA7CBBA7537BCB10EBC21047333A89 +8936419D857CD9F59EBA20B0A3D9BA4A0D3395336B4CDA4BA6451B6E4D1370FA +D9BDABB7F271BC1C6C48D9DF1E5A6FAE788F5609DE3C48D47A67097C547D9817 +AD3A7CCE2B771843D69F860DA4059A71494281C0AD8D4BAB3F67BB6739723C04 +AE05F9E35B2B2CB9C7874C114F57A185C8563C0DCCA93F8096384D71A2994748 +A3C7C8B8AF54961A8838AD279441D9A5EB6C1FE26C98BD025F353124DA68A827 +AE2AF8D25CA48031C242AA433EEEBB8ABA4B96821786C38BACB5F58C3D5DA011 +85B385124DFAE11BA4AB27032F02AB84277DB8B54826E132F2E419BF26D1547D +28B104E49BF911BAE3CDA460A75342DD35E03EFA4D6BFCBF0D1D5B1B8E4E959E +CC8F46BEB58AE52A93DEC0D01DCCBA215EA7055079C0D9697057C1DF07A19A4B +153B4C094590876146E656E3B1C1FFB6300DAA83BAAD837F2761764A6B1B6BC2 +C6E16B4F14206DD5441FF27754851316740CF6890B2D243ED324B918EAA9339F +D863B46A303600BFAC9997E5646107742AE57F44313444D4A074D7AE57BD05D1 +AE97421CBA627161C2D627A1FF3312E0CB9797322432DAE5B36919C7B4A5AFFC +3DD16AF4B2E9BD238EC7CF2422754B94943C9F8138F5B0E8DF7B3834CD564B42 +558A8641E0D1A66EF1690F16D225B819061C1905C26F35E5FB5B1A494164FBC6 +960B3D7311B665A377B782B273D2939D6760220C6BE87FBBC612DE2667634505 +EF18CD3F28C92C19CC10727B8FF26F2E4B1290A3BA524F3CA1AB321E7916B175 +4789231A345DEDA6EBBCD3D44A35149D5CDE13BDDB54E7AC9A7C2FF7D8D2686E +7DC00899A0DCA0B1448F0E5674EF835C1A64638AFEFAB3A506099034D719A61F +68BF8D1FD967182B30931387A78C7B89A922909CD3058AFB841BA57FD34AC746 +6C7B6DC8DD7CE26938C2C48E804E22764051385A8BEBD2EDA5DC62A77701E4FD +41FA21152656B7BC16E5548AD0F1DDF4606DEE36314875DA906F5CE1FC2507ED +FF1334BA71B62C13E5A4BE729096C4935707170D1E3F039681D4C9E42153E471 + +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +cleartomark +%%EndFont +%%BeginFont: CMR8 +%!PS-AdobeFont-1.1: CMR8 1.0 +%%CreationDate: 1991 Aug 20 16:39:40 +% Copyright (C) 1997 American Mathematical Society. All Rights Reserved. +11 dict begin +/FontInfo 7 dict dup begin +/version (1.0) readonly def +/Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def +/FullName (CMR8) readonly def +/FamilyName (Computer Modern) readonly def +/Weight (Medium) readonly def +/ItalicAngle 0 def +/isFixedPitch false def +end readonly def +/FontName /CMR8 def +/PaintType 0 def +/FontType 1 def +/FontMatrix [0.001 0 0 0.001 0 0] readonly def +/Encoding 256 array +0 1 255 {1 index exch /.notdef put} for +dup 51 /three put +readonly def +/FontBBox{-36 -250 1070 750}readonly def +currentdict end +currentfile eexec +D9D66F633B846A97B686A97E45A3D0AA052A014267B7904EB3C0D3BD0B83D891 +016CA6CA4B712ADEB258FAAB9A130EE605E61F77FC1B738ABC7C51CD46EF8171 +9098D5FEE67660E69A7AB91B58F29A4D79E57022F783EB0FBBB6D4F4EC35014F +D2DECBA99459A4C59DF0C6EBA150284454E707DC2100C15B76B4C19B84363758 +469A6C558785B226332152109871A9883487DD7710949204DDCF837E6A8708B8 +2BDBF16FBC7512FAA308A093FE5CF4E9D2405B169CD5365D6ECED5D768D66D6C +68618B8C482B341F8CA38E9BB9BAFCFAAD9C2F3FD033B62690986ED43D9C9361 +3645B82392D5CAE11A7CB49D7E2E82DCD485CBA1772CE422BB1D7283AD675B65 +48A7EA0069A883EC1DAA3E1F9ECE7586D6CF0A128CD557C7E5D7AA3EA97EBAD3 +9619D1BFCF4A6D64768741EDEA0A5B0EFBBF347CDCBE2E03D756967A16B613DB +0FC45FA2A3312E0C46A5FD0466AB097C58FFEEC40601B8395E52775D0AFCD7DB +8AB317333110531E5C44A4CB4B5ACD571A1A60960B15E450948A5EEA14DD330F +EA209265DB8E1A1FC80DCD3860323FD26C113B041A88C88A21655878680A4466 +FA10403D24BB97152A49B842C180E4D258C9D48F21D057782D90623116830BA3 +9902B3C5F2F2DD01433B0D7099C07DBDE268D0FFED5169BCD03D48B2F058AD62 +D8678C626DC7A3F352152C99BA963EF95F8AD11DB8B0D351210A17E4C2C55AD8 +9EB64172935D3C20A398F3EEEEC31551966A7438EF3FEE422C6D4E05337620D5 +ACC7B52BED984BFAAD36EF9D20748B05D07BE4414A63975125D272FAD83F76E6 +10FFF8363014BE526D580873C5A42B70FA911EC7B86905F13AFE55EB0273F582 +83158793B8CC296B8DE1DCCF1250FD57CB0E035C7EDA3B0092ED940D37A05493 +2EC54E09B984FCA4AB7D2EA182BCF1263AA244B07EC0EA901C077A059F709F30 +4384CB5FA748F2054FAD9A7A43D4EA427918BD414F766531136B60C3477C6632 +BEFE3897B58C19276A301926C2AEF2756B367319772C9B201C49B4D935A8267B +041D6F1783B6AEA4DAC4F5B3507D7032AA640AAB12E343A4E9BDCF419C04A721 +3888B25AF4E293AACED9A6BDC78E61DA1C424C6503CC1885F762B93EC4488CF1 +43FF3B2A427C5E1C756D1925B53223AC52F4466FF9EB95AA878FF1C7114149D2 +64D481CA2624C69D9B54DB03C3537856805A93F51721CEAD6B9D02CE3A7DE340 +0F696D00AE58F5C3B0194CC5D4EFDA29748FC0DA532BED0F8AB9F8466B6489D4 +3769F06388DD490EC564421D3CD7B61BBFAE92F1045D1005B39F6DE94828020F +5E993EFE6B4CFE27600AABFFD315EE6EDF3DC3DED748E5E7517B9A901AC97A87 +EDA3D5D8479E19F20E5A1124057124648706B8FCDE6FA850BDE75CDAA403B9C8 +13DE23F1B894E4994DACF10B4E6CB0E684B3B6AC11830F036B5FBF488005DA46 +B21EEA85CE4C9A81955A602EBFDBD510B204DF37DE0E5CB1E8B946C1EC66A269 +AAEFF148B2157FB234239D3BFE2A3797D219F3856DAF3D82CB08BD12CD65F77A +9DAB835D01A11185CCFC948F4C416EB101A88694BC507567DA9208814EE9D7E9 +5D09E79749545017 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +cleartomark +%%EndFont +%%BeginFont: CMMI12 +%!PS-AdobeFont-1.1: CMMI12 1.100 +%%CreationDate: 1996 Jul 27 08:57:55 +% Copyright (C) 1997 American Mathematical Society. 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All Rights Reserved) readonly def +/FullName (CMR12) readonly def +/FamilyName (Computer Modern) readonly def +/Weight (Medium) readonly def +/ItalicAngle 0 def +/isFixedPitch false def +end readonly def +/FontName /CMR12 def +/PaintType 0 def +/FontType 1 def +/FontMatrix [0.001 0 0 0.001 0 0] readonly def +/Encoding 256 array +0 1 255 {1 index exch /.notdef put} for +dup 48 /zero put +dup 61 /equal put +readonly def +/FontBBox{-34 -251 988 750}readonly def +currentdict end +currentfile eexec +D9D66F633B846A97B686A97E45A3D0AA052A014267B7904EB3C0D3BD0B83D891 +016CA6CA4B712ADEB258FAAB9A130EE605E61F77FC1B738ABC7C51CD46EF8171 +9098D5FEE67660E69A7AB91B58F29A4D79E57022F783EB0FBBB6D4F4EC35014F +D2DECBA99459A4C59DF0C6EBA150284454E707DC2100C15B76B4C19B84363758 +469A6C558785B226332152109871A9883487DD7710949204DDCF837E6A8708B8 +2BDBF16FBC7512FAA308A093FE5CF4E9D2405B169CD5365D6ECED5D768D66D6C +68618B8C482B341F8CA38E9BB9BAFCFAAD9C2F3FD033B62690986ED43D9C9361 +3645B82392D5CAE11A7CB49D7E2E82DCD485CBA04C77322EB2E6A79D73DC194E +59C120A2DABB9BF72E2CF256DD6EB54EECBA588101ABD933B57CE8A3A0D16B28 +51D7494F73096DF53BDC66BBF896B587DF9643317D5F610CD9088F9849126F23 +DDE030F7B277DD99055C8B119CAE9C99158AC4E150CDFC2C66ED92EBB4CC092A +AA078CE16247A1335AD332DAA950D20395A7384C33FF72EAA31A5B89766E635F +45C4C068AD7EE867398F0381B07CB94D29FF097D59FF9961D195A948E3D87C31 +821E9295A56D21875B41988F7A16A1587050C3C71B4E4355BB37F255D6B237CE +96F25467F70FA19E0F85785FF49068949CCC79F2F8AE57D5F79BB9C5CF5EED5D +9857B9967D9B96CDCF73D5D65FF75AFABB66734018BAE264597220C89FD17379 +26764A9302D078B4EB0E29178C878FD61007EEA2DDB119AE88C57ECFEF4B71E4 +140A34951DDC3568A84CC92371A789021A103A1A347050FDA6ECF7903F67D213 +1D0C7C474A9053866E9C88E65E6932BA87A73686EAB0019389F84D159809C498 +1E7A30ED942EB211B00DBFF5BCC720F4E276C3339B31B6EABBB078430E6A09BB +377D3061A20B1EB98796B8607EECBC699445EAA866C38E02DF59F5EDD378303A +0733B90E7835C0AAF32BA04F1566D8161EA89CD4D14DDB953F8B910BFC8A7F03 +5020F55EF8FC2640ADADA156F6CF8F2EB6610F7EE8874A26CBE7CD154469B9F4 +ED76886B3FB679FFDEB59BB6C55AF7087BA48B75EE2FB374B19BCC421A963E15 +FE05ECAAF9EECDF4B2715010A320102E6F8CCAA342FA11532671CCCC52875960 +84CC1832A068F03077BAA0C4CB6EB8A6ACF53741914AD12120F8BE6F0A9A65BF +0C099B28A58F40BCC782438962B9EF94FFFD64B4825C08E2F64F1C494F2FE514 +0206F432B586845DEE85C5A0D896A89F2EE07B93CB341DE53930F82AEAEBDD18 +5005D096E36BF691DE22DBA7F5D63F1552AE0BC8E675E2FB600691535BC72BFD +8EF2B5B1D9076592E540D76A56C21F61A5E1ECBC18EE7E8C8F0990685A38A4E4 +81C19C4FAD43B6EF537879E828101FE69AD179FB7CC15F0EE90CBBD3BC739DB0 +2BBC2A179C50B8A892DECAA055E8C302C182B696DEE59643B74079F276D37223 +3F2D71C4FDE1D899A4A04BF758220C355992F1457B94389509BEF1AA38440EF5 +26A37FCC7D7C82F997D00CAC3C92634F984925933524165948D9BFB0901CB8EF +CC679534639F4E1FC505D21268135248DA3E82CCC4777DDB170AAB4C34456D92 +12C18137575210BD8C463F152F456C15DF361A2CC743A11590DA47B08679768D +E9A398F99BB361EB911D702CEEE6EF0D854A02CC9BFDD72FBFA4230B02798730 +54FEE7D11C9A73F97678C034C45E353DA8EFFBF417D266DCB6653C60778289CE +CFCB +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +cleartomark +%%EndFont +%%BeginFont: CMR6 +%!PS-AdobeFont-1.1: CMR6 1.0 +%%CreationDate: 1991 Aug 20 16:39:02 +% Copyright (C) 1997 American Mathematical Society. All Rights Reserved. +11 dict begin +/FontInfo 7 dict dup begin +/version (1.0) readonly def +/Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def +/FullName (CMR6) readonly def +/FamilyName (Computer Modern) readonly def +/Weight (Medium) readonly def +/ItalicAngle 0 def +/isFixedPitch false def +end readonly def +/FontName /CMR6 def +/PaintType 0 def +/FontType 1 def +/FontMatrix [0.001 0 0 0.001 0 0] readonly def +/Encoding 256 array +0 1 255 {1 index exch /.notdef put} for +dup 49 /one put +readonly def +/FontBBox{-20 -250 1193 750}readonly def +currentdict end +currentfile eexec +D9D66F633B846A97B686A97E45A3D0AA052A014267B7904EB3C0D3BD0B83D891 +016CA6CA4B712ADEB258FAAB9A130EE605E61F77FC1B738ABC7C51CD46EF8171 +9098D5FEE67660E69A7AB91B58F29A4D79E57022F783EB0FBBB6D4F4EC35014F +D2DECBA99459A4C59DF0C6EBA150284454E707DC2100C15B76B4C19B84363758 +469A6C558785B226332152109871A9883487DD7710949204DDCF837E6A8708B8 +2BDBF16FBC7512FAA308A093FE5CF4E9D2405B169CD5365D6ECED5D768D66D6C +68618B8C482B341F8CA38E9BB9BAFCFAAD9C2F3FD033B62690986ED43D9C9361 +3645B82392D5CAE11A7CB49D7E2E82DCD485CBA17D1AFFF95F4224CF7ECEE45C +BFB7C8C77C22A01C345078D28D3ECBF804CDC2FE5025FA0D05CCC5EFC0C4F87E +CBED13DDDF8F34E404F471C6DD2E43331D73E89BBC71E7BF889F6293793FEF5A +C9DD3792F032E37A364C70914843F7AA314413D022AE3238730B420A7E9D0CF5 +D0E24F501451F9CDECE10AF7E14FF15C4F12F3FCA47DD9CD3C7AEA8D1551017D +23131C09ED104C052054520268A4FA3C6338BA6CF14C3DE3BAF2EA35296EE3D8 +D6496277E11DFF6076FE64C8A8C3419FA774473D63223FFA41CBAE609C3D976B +93DFB4079ADC7C4EF07303F93808DDA9F651F61BCCF79555059A44CBAF84A711 +6D98083CEF58230D54AD486C74C4A257FC703ACF918219D0A597A5F680B606E4 +EF94ADF8BF91A5096A806DB64EC96636A98397D22A74932EB7346A9C4B5EE953 +CB3C80AA634BFC28AA938C704BDA8DC4D13551CCFE2B2784BE8BF54502EBA9AF +D49B79237B9C56310550BC30E9108BB06EAC755D6AA4E688EFE2A0AAB17F20FE +00CD0BFF1B9CB6BDA0FA3A29A3117388B6686657A150CE6421FD5D420F4F7FB5 +B0DAA1BA19D638676E9CF159AC7325EF17B9F74E082BEF75E10A31C7011C0FFA +99B797CE549B5C45238DD0FADD6B99D233AC69282DF0D91EA2DBD08CE0083904 +A6D968D5AE3BD159D01BDFF42D16111BC0A517C66B43972080D9DD4F3B9AE7FB +11B035CE715C1218B2D779761D8D7E9DEBE277531BD58F313EBD27E33BEF9DC5 +50C7821A8BBC3B9FDF899D7EAA0B94493B97AFEAC503EB5ED7A7AB663529DD50 +29E1FF043619C3969739047DCBE0806C6E7ED2CEE445EBA23109D4EA1AF26BFE +9CEFB8F80C4E811C7CB9E4F964F4A095E6456D80CFAB4E4FEBC91333683E769C +BF12AB4D9AFF9738E8F5FD33E5E64D2DA80D00B697A2DB83F44297B501AAD801 +C73389133F28E171C5F7E84A39D16BCF374986988FA525A8F0D6A7024E39331B +CF80BB9CB9682EF2C3899C12B3D8F196F45636CBFB6B23FA38222B2B3D667736 +DC4E61B7CDB4BA8F06ECAD6E279560B467C1C808146FF3B2EDB14ED971A023F5 +2E2F1306654A905BAF872411E832B345DD3BCBE7D4A30B128B2A06BA7ACD95E1 +A451AF157431B3AC6B429A8883ECB107615C9B79C0866560AF39B2D4 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +cleartomark +%%EndFont +%%BeginFont: CMMI8 +%!PS-AdobeFont-1.1: CMMI8 1.100 +%%CreationDate: 1996 Jul 23 07:53:54 +% Copyright (C) 1997 American Mathematical Society. All Rights Reserved. +11 dict begin +/FontInfo 7 dict dup begin +/version (1.100) readonly def +/Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def +/FullName (CMMI8) readonly def +/FamilyName (Computer Modern) readonly def +/Weight (Medium) readonly def +/ItalicAngle -14.04 def +/isFixedPitch false def +end readonly def +/FontName /CMMI8 def +/PaintType 0 def +/FontType 1 def +/FontMatrix [0.001 0 0 0.001 0 0] readonly def +/Encoding 256 array +0 1 255 {1 index exch /.notdef put} for +dup 67 /C put +dup 84 /T put +readonly def +/FontBBox{-24 -250 1110 750}readonly def +currentdict end +currentfile eexec +D9D66F633B846A97B686A97E45A3D0AA0529731C99A784CCBE85B4993B2EEBDE +3B12D472B7CF54651EF21185116A69AB1096ED4BAD2F646635E019B6417CC77B +532F85D811C70D1429A19A5307EF63EB5C5E02C89FC6C20F6D9D89E7D91FE470 +B72BEFDA23F5DF76BE05AF4CE93137A219ED8A04A9D7D6FDF37E6B7FCDE0D90B +986423E5960A5D9FBB4C956556E8DF90CBFAEC476FA36FD9A5C8175C9AF513FE +D919C2DDD26BDC0D99398B9F4D03D6A8F05B47AF95EF28A9C561DBDC98C47CF5 +5250011D19E9366EB6FD153D3A100CAA6212E3D5D93990737F8D326D347B7EDC +4391C9DF440285B8FC159D0E98D4258FC57892DDF753642CD526A96ACEDA4120 +788F22B1D09F149794E66DD1AC2C2B3BC6FEC59D626F427CD5AE9C54C7F78F62 +C36F49B3C2E5E62AFB56DCEE87445A12A942C14AE618D1FE1B11A9CF9FAA1F32 +617B598CE5058715EF3051E228F72F651040AD99A741F247C68007E68C84E9D1 +D0BF99AA5D777D88A7D3CED2EA67F4AE61E8BC0495E7DA382E82DDB2B009DD63 +532C74E3BE5EC555A014BCBB6AB31B8286D7712E0E926F8696830672B8214E9B +5D0740C16ADF0AFD47C4938F373575C6CA91E46D88DE24E682DEC44B57EA8AF8 +4E57D45646073250D82C4B50CBBB0B369932618301F3D4186277103B53B3C9E6 +DB42D6B30115F67B9D078220D5752644930643BDF9FACF684EBE13E39B65055E +B1BD054C324962025EC79E1D155936FE32D9F2224353F2A46C3558EF216F6BB2 +A304BAF752BEEC36C4440B556AEFECF454BA7CBBA7537BCB10EBC21047333A89 +8936419D857CD9F59EBA20B0A3D9BA4A0D3395336B4CDA4BA6451B6E4D1370FA +D9BDABB7F271BC1C6C48D9DF1E5A6FAE788F5609DE3C48D47A67097C547D9817 +AD3A7CCE2B771843D69F860DA4059A71494281C0AD8D4BAB3F67BB6739723C04 +AE05F9E35B2B2CB9C7874C114F57A185C8563C0DCCA93F8096384D71A2994748 +A3C7C8B8AF54961A8838AD279441D9A5EB6C1FE26C98BD025F353124DA68A827 +AE2AF8D25CA48031C242AA433EEEBB8ABA4B96821786C38BACB5F58C3D5DA011 +85B385124DFAE11BA4AB27032F02AB84277DB8B54826E132F2E419BF26D1547D +28B104E49BF911BAE3CDA460A75342DD35E03EFA4D6BFCBF0D1D5B1B8E4E959E +CC8F46BEB58AE52A93DEC0D01DCCBA215EA7055079C0D9697057C1DF07A19A4B +153B4C094590876146E656E3B1C1FFB6300DAA83BAAD837F2761764A6B1B6BC2 +C6E16B4F14206DD5441FF27754851316740CF6890B2D243ED324B918EAA9339F +D863B46A303600BFAC9997E5646107742AE57F44313444D4A074D7AE57BD05D1 +AE97421CBA627161C2D627A1FF3312E0CB9797322432DAE5B36919C7B4A5AFFC +3DD16AF4B2E9BD238EC7CF2422754B94943C9F8138F5B0E8DF7B3834CD564B42 +558A8641E0D1A66EF1690F16D225B819061C1905C26F35E5FB5B1A494164FBC6 +960B3D7311B665A377B782B273D2939D6760220C6BE87FBBC612DE2667634505 +EF18CD3F28C92C19CC10727B8FF26F2E4B1290A3BA524F3CA1AB321E7916B175 +4789231A345DEDA6EBBCD3D44A35149D5CDE13BDDB54E7AC9A7C2FF7D8D2686E +7DC00899A0DCA0B1448F0E5674EF835C1A64638AFEFAB3A506099034D719A61F +68BF8D1FD967182B30931387A78C7B89A922909CD3058AFB841BA57FD34AC746 +6C7B6DC8DD7CE26938C2C48E804E22764051385A8BEBD2EDA5DC62A77701E4FD +41FA21152656B7BC16E5548AD0F1DDF4606DEE36314875DA906F5CE1FC2507ED +FF1334BA71B62C13E5A4BE729096C4935707170D1E3F039681D4C9E42153E471 + +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +cleartomark +%%EndFont +%%BeginFont: CMR8 +%!PS-AdobeFont-1.1: CMR8 1.0 +%%CreationDate: 1991 Aug 20 16:39:40 +% Copyright (C) 1997 American Mathematical Society. All Rights Reserved. +11 dict begin +/FontInfo 7 dict dup begin +/version (1.0) readonly def +/Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def +/FullName (CMR8) readonly def +/FamilyName (Computer Modern) readonly def +/Weight (Medium) readonly def +/ItalicAngle 0 def +/isFixedPitch false def +end readonly def +/FontName /CMR8 def +/PaintType 0 def +/FontType 1 def +/FontMatrix [0.001 0 0 0.001 0 0] readonly def +/Encoding 256 array +0 1 255 {1 index exch /.notdef put} for +dup 49 /one put +readonly def +/FontBBox{-36 -250 1070 750}readonly def +currentdict end +currentfile eexec +D9D66F633B846A97B686A97E45A3D0AA052A014267B7904EB3C0D3BD0B83D891 +016CA6CA4B712ADEB258FAAB9A130EE605E61F77FC1B738ABC7C51CD46EF8171 +9098D5FEE67660E69A7AB91B58F29A4D79E57022F783EB0FBBB6D4F4EC35014F +D2DECBA99459A4C59DF0C6EBA150284454E707DC2100C15B76B4C19B84363758 +469A6C558785B226332152109871A9883487DD7710949204DDCF837E6A8708B8 +2BDBF16FBC7512FAA308A093FE5CF4E9D2405B169CD5365D6ECED5D768D66D6C +68618B8C482B341F8CA38E9BB9BAFCFAAD9C2F3FD033B62690986ED43D9C9361 +3645B82392D5CAE11A7CB49D7E2E82DCD485CBA1772CE422BB1D7283AD675B65 +48A7EA0069A883EC1DAA3E1F9ECE7586D6CF0A128CD557C7E5D7AA3EA97EBAD3 +9619D1BFCF4A6D64768741EDEA0A5B0EFBBF347CDCBE2E03D756967A16B613DB +0FC45FA2A3312E0C46A5FD0466AB097C58FFEEC40601B8395E52775D0AFCD7DB +8AB317333110531E5C44A4CB4B5ACD571A1A60960B15E450948A5EEA14DD330F +EA209265DB8E1A1FC80DCD3860323FD26C113B041A88C88A21655878680A4466 +FA10403D24BB97152A49B842C180E4D258C9D48F21D057782D90623116830BA3 +9902B3C5F2F2DD01433B0D7099C07DBDE268D0FFED5169BCD03D48B2F058AD62 +D8678C626DC7A3F352152C99BA963EF95F8AD11DB8B0D351210A17E4C2C55AD8 +9EB64172935D3C20A398F3EEEEC31551966A7438EF3FEE422C6D4E05337620D5 +ACC7B52BED984BFAAD36EF9D20748B05D07BE4414A63975125D272FAD83F76E6 +10FFF8363014BE526D580873C5A42B70FA911EC7B86905F13AFE55EB0273F582 +83158793B8CC296B8DE1DCCF1250FD57CB0E035C7EDA3B0092ED940D37A05493 +2EC54E09B984FCA4AB7D2EA182BCF1263AA244B07EC0EA901C077A059F709F30 +4384CB5FA748F2054FAD9A7A43D4EA427918BD414F766531136B60C3477C6632 +BEFE3897B58C19276A301926C2AEF2756B367319772C9B201C49B4D935A8267B +041D6F1783B6AEA4DAC4F5B3507D7032AA640AAB12E343A4E9BDCF419C04A721 +3888B25AF4E293AACED9A6BDC78E61DA1C424C6503CC1885F762B93EC4488CF1 +43FF3B2A427C5E1C756D1925AEDB3B4A7C8275B3DD03F0E7BC7763D19E0208C6 +D09F51A1883ACF462E1C76C395331864B08D5EFA157EB3987FEBF0D50B02BC3D +E9E3F9964F760093244CDCE61A99510E3D80055E7653950E8BE2E201F74FA145 +C6D43BAEE7FB7BD1FDC7D84CF7D60E7C2CA6B7DCC137EE4E6F5DD76446CD6A56 +87DADB906D1483ECECA680995A9A7B736CAF3C43E1B71B5E248F5D5D90F237E5 +2B14A39157E555159DD0DE5C78CF7EDE532374FF6A6A9703665ADF4234D87FA4 +3871EBC6254E1C5D00637AB2A30E29D11D8F2F9D030F3D6894A857CCF8EB36C2 +22EC11E3BB4FDFB2875415B71C8F87CED60577B7ED9A1AACFEFB +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +cleartomark +%%EndFont +%%BeginFont: CMMI12 +%!PS-AdobeFont-1.1: CMMI12 1.100 +%%CreationDate: 1996 Jul 27 08:57:55 +% Copyright (C) 1997 American Mathematical Society. All Rights Reserved. +11 dict begin +/FontInfo 7 dict dup begin +/version (1.100) readonly def +/Notice (Copyright (C) 1997 American Mathematical Society. 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All Rights Reserved) readonly def +/FullName (CMR12) readonly def +/FamilyName (Computer Modern) readonly def +/Weight (Medium) readonly def +/ItalicAngle 0 def +/isFixedPitch false def +end readonly def +/FontName /CMR12 def +/PaintType 0 def +/FontType 1 def +/FontMatrix [0.001 0 0 0.001 0 0] readonly def +/Encoding 256 array +0 1 255 {1 index exch /.notdef put} for +dup 40 /parenleft put +dup 41 /parenright put +dup 61 /equal put +readonly def +/FontBBox{-34 -251 988 750}readonly def +currentdict end +currentfile eexec +D9D66F633B846A97B686A97E45A3D0AA052A014267B7904EB3C0D3BD0B83D891 +016CA6CA4B712ADEB258FAAB9A130EE605E61F77FC1B738ABC7C51CD46EF8171 +9098D5FEE67660E69A7AB91B58F29A4D79E57022F783EB0FBBB6D4F4EC35014F +D2DECBA99459A4C59DF0C6EBA150284454E707DC2100C15B76B4C19B84363758 +469A6C558785B226332152109871A9883487DD7710949204DDCF837E6A8708B8 +2BDBF16FBC7512FAA308A093FE5CF4E9D2405B169CD5365D6ECED5D768D66D6C +68618B8C482B341F8CA38E9BB9BAFCFAAD9C2F3FD033B62690986ED43D9C9361 +3645B82392D5CAE11A7CB49D7E2E82DCD485CBA04C77322EB2E6A79D73DC194E +59C120A2DABB9BF72E2CF256DD6EB54EECBA588101ABD933B57CE8A3A0D16B28 +51D7494F73096DF53BDC66BBF896B587DF9643317D5F610CD9088F9849126F23 +DDE030F7B277DD99055C8B119CAE9C99158AC4E150CDFC2C66ED92EBB4CC092A +AA078CE16247A1335AD332DAA950D20395A7384C33FF72EAA31A5B89766E635F +45C4C068AD7EE867398F0381B07CB94D29FF097D59FF9961D195A948E3D87C31 +821E9295A56D21875B41988F7A16A1587050C3C71B4E4355BB37F255D6B237CE +96F25467F70FA19E0F85785FF49068949CCC79F2F8AE57D5F79BB9C5CF5EED5D +9857B9967D9B96CDCF73D5D65FF75AFABB66734018BAE264597220C89FD17379 +26764A9302D078B4EB0E29178C878FD61007EEA2DDB119AE88C57ECFEF4B71E4 +140A34951DDC3568A84CC92371A789021A103A1A347050FDA6ECF7903F67D213 +1D0C7C474A9053866E9C88E65E6932BA87A73686EAB0019389F84D159809C498 +1E7A30ED942EB211B00DBFF5BCC720F4E276C3339B31B6EABBB078430E6A09BB +377D3061A20B1EB98796B8607EECBC699445EAA866C38E02DF59F5EDD378303A +0733B90E7835C0AAF32BA04F1566D8161EA89CD4D14DDB953F8B910BFC8A7F03 +5020F55EF8FC2640ADADA156F6CF8F2EB6610F7EE8874A26CBE7CD154469B9F4 +ED76886B3FB679FFDEB59BB6C55AF7087BA48B75EE2FB374B19BCC421A963E15 +FE05ECAAF9EECDF4B2715010A320102E6F8CCAA342FA11532671CB3E7F3CDA30 +C2C724C13AF4E39626138A25FE5623708C6B883AB4251AD3DCE91AF18446F698 +4326366EDF9C8ACAF59155C6A01833791A87A19EC639389D1CFA6D8AA07D6282 +B910CE0BA90D076EAF8E40867BDBCDC57405D06C9FB9704599F00264ED2720FC +A6FE434ABCABD4B30DF2FB5EE310585FFFCEC317E7C25D7293575039E1B0E7DE +ACA7F613E08F64B7CDA5581570343A98B67BEA081EECE06D81B03A5CA6351EEB +A3BFFDE0AB0F49D0A77A5BC4383D8EA320730F8979C65DAE9BF86C6A52C2942A +0F72793F6F139CF98585ED98AF174AC229AF968BD388EB88FF5280A4E86A8DDE +D6DCF5E632DA2A8D34E9C2800C725A1E17E092F7D7542AE2F70EB7E912672D4C +4B796C75BF6A555FDF41A6E18BF98DE6F5ECC78E77B18C22B7A390E1B7B9092D +2C62F5F5758783C5CB8A8D2CA08EB24CD28C463896EF09BECFCC165C893ECADC +5ABF77EB88720F36BA68FC4DD00E25CAEABCB3EB94D37DD5ED359F80E1AF35C8 +E3D51EDB400F957A4C236E930C566E916A1FA0283488C2FEA87299CFEA2B705E +E784E0A506ABAABFDC1B9881C1ED7D27BF3BA31D573E15EAE40655C7CCF39CAA +F2225B342CD2C7D664284ECA0455FC8E50B476EB3040D9E4743D4DCABDB427E8 +51D81D6AAEB0B05BAE52F3238D9DECF3947AD4CFA651DCEFE7064C09269CDF35 +4FA1DAD67288F87D8FD39ABB9FC6A90B3973D33D5E0FC7578E62A1 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +0000000000000000000000000000000000000000000000000000000000000000 +cleartomark +%%EndFont +%%BeginFont: CMR8 +%!PS-AdobeFont-1.1: CMR8 1.0 +%%CreationDate: 1991 Aug 20 16:39:40 +% Copyright (C) 1997 American Mathematical Society. All Rights Reserved. +11 dict begin +/FontInfo 7 dict dup begin +/version (1.0) readonly def +/Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def +/FullName (CMR8) readonly def +/FamilyName (Computer Modern) readonly def +/Weight (Medium) readonly def +/ItalicAngle 0 def +/isFixedPitch false def +end readonly def +/FontName /CMR8 def +/PaintType 0 def +/FontType 1 def +/FontMatrix [0.001 0 0 0.001 0 0] readonly def +/Encoding 256 array +0 1 255 {1 index exch /.notdef put} for +dup 49 /one put +dup 50 /two put +dup 51 /three put +dup 52 /four put +dup 53 /five put +dup 54 /six put +readonly def +/FontBBox{-36 -250 1070 750}readonly def +currentdict end +currentfile eexec +D9D66F633B846A97B686A97E45A3D0AA052A014267B7904EB3C0D3BD0B83D891 +016CA6CA4B712ADEB258FAAB9A130EE605E61F77FC1B738ABC7C51CD46EF8171 +9098D5FEE67660E69A7AB91B58F29A4D79E57022F783EB0FBBB6D4F4EC35014F +D2DECBA99459A4C59DF0C6EBA150284454E707DC2100C15B76B4C19B84363758 +469A6C558785B226332152109871A9883487DD7710949204DDCF837E6A8708B8 +2BDBF16FBC7512FAA308A093FE5CF4E9D2405B169CD5365D6ECED5D768D66D6C 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All Rights Reserved. +11 dict begin +/FontInfo 7 dict dup begin +/version (1.100) readonly def +/Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def +/FullName (CMMI12) readonly def +/FamilyName (Computer Modern) readonly def +/Weight (Medium) readonly def +/ItalicAngle -14.04 def +/isFixedPitch false def +end readonly def +/FontName /CMMI12 def +/PaintType 0 def +/FontType 1 def +/FontMatrix [0.001 0 0 0.001 0 0] readonly def +/Encoding 256 array +0 1 255 {1 index exch /.notdef put} for +dup 69 /E put +dup 71 /G put +dup 82 /R put +dup 86 /V put +dup 101 /e put +dup 103 /g put +readonly def +/FontBBox{-30 -250 1026 750}readonly def +currentdict end +currentfile eexec +D9D66F633B846A97B686A97E45A3D0AA0529731C99A784CCBE85B4993B2EEBDE +3B12D472B7CF54651EF21185116A69AB1096ED4BAD2F646635E019B6417CC77B +532F85D811C70D1429A19A5307EF63EB5C5E02C89FC6C20F6D9D89E7D91FE470 +B72BEFDA23F5DF76BE05AF4CE93137A219ED8A04A9D7D6FDF37E6B7FCDE0D90B +986423E5960A5D9FBB4C956556E8DF90CBFAEC476FA36FD9A5C8175C9AF513FE +D919C2DDD26BDC0D99398B9F4D03D6A8F05B47AF95EF28A9C561DBDC98C47CF5 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License terms: http://www.apache.org/licenses/LICENSE-2.0) +%%Title: (Basic set of procedures used by the XML Graphics project \(Batik and FOP\)) +/bd{bind def}bind def +/ld{load def}bd +/M/moveto ld +/RM/rmoveto ld +/t/show ld +/A/ashow ld +/cp/closepath ld +/re {4 2 roll M +1 index 0 rlineto +0 exch rlineto +neg 0 rlineto +cp } bd +/_ctm matrix def +/_tm matrix def +/BT { _ctm currentmatrix pop matrix _tm copy pop 0 0 moveto } bd +/ET { _ctm setmatrix } bd +/iTm { _ctm setmatrix _tm concat } bd +/Tm { _tm astore pop iTm 0 0 moveto } bd +/ux 0.0 def +/uy 0.0 def +/F { + /Tp exch def + /Tf exch def + Tf findfont Tp scalefont setfont + /cf Tf def /cs Tp def /cw ( ) stringwidth pop def +} bd +/ULS {currentpoint /uy exch def /ux exch def} bd +/ULE { + /Tcx currentpoint pop def + gsave + newpath + cf findfont cs scalefont dup + /FontMatrix get 0 get /Ts exch def /FontInfo get dup + /UnderlinePosition get Ts mul /To exch def + /UnderlineThickness get Ts mul /Tt exch def + ux uy To add moveto Tcx uy To add lineto + Tt setlinewidth stroke + grestore +} bd +/OLE { + /Tcx currentpoint pop def + gsave + newpath + cf findfont cs scalefont dup + /FontMatrix get 0 get /Ts exch def /FontInfo get dup + /UnderlinePosition get Ts mul /To exch def + /UnderlineThickness get Ts mul /Tt exch def + ux uy To add cs add moveto Tcx uy To add cs add lineto + Tt setlinewidth stroke + grestore +} bd +/SOE { + /Tcx currentpoint pop def + gsave + newpath + cf findfont cs scalefont dup + /FontMatrix get 0 get /Ts exch def /FontInfo get dup + /UnderlinePosition get Ts mul /To exch def + /UnderlineThickness get Ts mul /Tt exch def + ux uy To add cs 10 mul 26 idiv add moveto Tcx uy To add cs 10 mul 26 idiv add lineto + Tt setlinewidth stroke + grestore +} bd +/QUADTO { +/Y22 exch store +/X22 exch store +/Y21 exch store +/X21 exch store +currentpoint +/Y21 load 2 mul add 3 div exch +/X21 load 2 mul add 3 div exch +/X21 load 2 mul /X22 load add 3 div +/Y21 load 2 mul /Y22 load add 3 div +/X22 load /Y22 load curveto +} bd +/SSPD { +dup length /d exch dict def +{ +/v exch def +/k exch def +currentpagedevice k known { +/cpdv currentpagedevice k get def +v cpdv ne { +/upd false def +/nullv v type /nulltype eq def +/nullcpdv cpdv type /nulltype eq def +nullv nullcpdv or +{ +/upd true def +} { +/sametype v type cpdv type eq def +sametype { +v type /arraytype eq { +/vlen v length def +/cpdvlen cpdv length def +vlen cpdvlen eq { +0 1 vlen 1 sub { +/i exch def +/obj v i get def +/cpdobj cpdv i get def +obj cpdobj ne { +/upd true def +exit +} if +} for +} { +/upd true def +} ifelse +} { +v type /dicttype eq { +v { +/dv exch def +/dk exch def +/cpddv cpdv dk get def +dv cpddv ne { +/upd true def +exit +} if +} forall +} { +/upd true def +} ifelse +} ifelse +} if +} ifelse +upd true eq { +d k v put +} if +} if +} if +} forall +d length 0 gt { +d setpagedevice +} if +} bd +%%EndResource +%%BeginResource: procset (Apache XML Graphics EPS ProcSet) 1.0 0 +%%Version: 1.0 0 +%%Copyright: (Copyright 2002-2003 The Apache Software Foundation. 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suitable for printer only not scalable + +#$(MAINFILE).ps: $(MAINFILE).dvi +# $(DVITOPS) -Ppdf -G0 $(MAINFILE).dvi -o $(MAINFILE).ps +#$(MAINFILE).pdf: $(MAINFILE).ps +# $(PSTOPDF) -sPAPERSIZE=a4 -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 -dSubsetFonts=true -dEmbedAllFonts=true $(MAINFILE).ps +$(MAINFILE).pdf: $(MAINFILE).dvi + $(DVIPDF) $(MAINFILE).dvi + +clean: + $(RM) -f $(MAINFILE).pdf $(MAINFILE).ps $(MAINFILE).dvi +cleanall: + $(RM) -f $(MAINFILE).pdf $(MAINFILE).ps $(MAINFILE).dvi *.aux *.log *.ind *.ilg *.idx *.toc diff --git a/FreeEDA/LPCSim/report/presentation/SMCSim.tex b/FreeEDA/LPCSim/report/presentation/SMCSim.tex new file mode 100644 index 0000000..03c1dc1 --- /dev/null +++ b/FreeEDA/LPCSim/report/presentation/SMCSim.tex @@ -0,0 +1,732 @@ +%$Header: /cvsroot/latex-beamer/latex-beamer/solutions/generic-talks/generic-ornate-15min-45min.en.tex,v 1.4 2004/10/07 20:53:08 tantau Exp $ +\documentclass{beamer} +\mode +{ + \usecolortheme{seahorse} + \usefonttheme{professionalfonts} + \useinnertheme{rounded} + \useoutertheme{shadow} +% \useoutertheme{smoothbars} +} +%\setbeamertemplate{background canvas}[vertical shading][bottom=white!10,top=blue!5] +\usepackage{verbatim} +\usepackage[english]{babel} +\usepackage[latin1]{inputenc} +\usepackage{pgf,pgfarrows,pgfnodes,pgfautomata,pgfheaps,pgfshade} +\usepackage{amsmath,amsfonts,amsthm,amssymb} +\usepackage{times} +\usepackage[T1]{fontenc} +\usepackage{graphics} +\usepackage{graphicx} +%\usepackage{psfig} +\usepackage{algorithmic} + +\title +{Scilab based Mini Circuit Simulator for Academic Purpose} + +\author[] +{Yogesh Dilip Save} +\institute +{ + Indian Institute of Technology, Bombay +} +%\pgfdeclareimage[height=0.7cm]{university-logo}{iitblogo.eps} +%\logo{\pgfuseimage{university-logo}} + + +\date[seminar] % (optional) +{\today} + + +\begin{document} +%*************************************************************************************** +\begin{frame} + \titlepage +\end{frame} +%*************************************************************************************** +\begin{frame} + \frametitle{Presentation Outline} + \tableofcontents +\end{frame} +%*************************************************************************************** + +\section{Introduction} +\begin{frame} + \frametitle{Motivation} +\begin{block}{Objective} +To assist students in improving their knowledge in field of circuit simulation. +\end{block} +\begin{block}{Problem with commercial simulators} +\begin{itemize} +\item Generally software codes are not available. +\item Software codes are written in higher level language (C Programming and Fortran....). +\item Complex due to implementation of many features and complex modeling. +\end{itemize} +\end{block} +\end{frame} + +\begin{frame} + \frametitle{Motivation} +\begin{block}{Objective} +To assist students in improving their knowledge in field of circuit simulation. +\end{block} +\begin{block}{Mini simulator} +\begin{itemize} +\item used Scilab for coding. +\item integrated least number of component. +\item different versions for add-on features. +\end{itemize} +\end{block} +\end{frame} + +\begin{frame} + \frametitle{Plan} +\begin{block}{Display Symbolic Equations} +\end{block} +\begin{block}{Display Numerical Values} +\end{block} +\begin{block}{Complete Report Generation} +\end{block} +\begin{block}{GUI for circuit drawing} +\end{block} +\begin{block}{GUI for simulator option} +\end{block} +\begin{block}{Spoken Tutorial} +\end{block} +%\begin{block} +%\begin{itemize} +%\item Display Numerical Values +%\item Complete Report Generation +%\item Graphical User Interface +%\item Spoken Tutorial +%\end{itemize} +%\end{block} +\end{frame} + +\begin{frame} + \frametitle{Core of circuit simulator} +\begin{itemize} +\item Operating Point Analysis plays an important role in a circuit simulation. +\item DC Analysis is equivalent to performing OP Analysis at each voltages/currents. +\item Transient Analysis is equivalent to performing OP Analysis at each time step. +\item AC Analysis computes the small-signal behavior of a circuit about an operating point +\item Thus implementation of Operating Point Analysis affects overall performance of the circuit simulator. +\end{itemize} +\end{frame} + +\section{Operating Point Analysis} +\begin{frame} +\begin{block}{Operating Point (OP) Analysis} +\begin{itemize} +\item OP Analysis is the central part of a circuit simulator. +\item The equations that describe the electrical system are nonlinear and algebraic and their solution gives operating point. +\item Systems of nonlinear equations are solved by iteratively formulating and solving systems of linear algebraic equations. +\item The overall efficiency of a circuit simulator is dependent upon the performance of the linear DC analyzer. +%\item Thus, our work is towards improving the performance of linear DC Analyzers and handling convergence issues related to large size nonlinear circuits. +\end{itemize} +\end{block} +\end{frame} + +\begin{frame} +\begin{block}{Circuit with linear elements} +\end{block} +\end{frame} + +\begin{frame} +\begin{block}{\small Nodal Analysis} +\begin{itemize} +\begin{small} +\item Applicable when the network has only current sources and conductances type devices i.e., $i=g(v)$. +\item Let, $\mathbf{A}_r$ be the reduced incidence matrix of $\cal{G}$ which is a representative matrix of $V_v(\cal{G})$. \\ +\end{small} +\begin{tiny} +The KCL constraints are +$$\mathbf{A_ri}=\mathbf{0}$$ +$$\left[\begin{array}{cc} + \mathbf{A}_{rG} & \mathbf{A}_{rJ} +\end{array}\right] +\left[\begin{array}{c} + \mathbf{i}_{G} \\ + \mathbf{i}_{J} +\end{array}\right] +=\mathbf{0}$$ +$$\mathbf{A}_{rG}\mathbf{i}_{G}=-\mathbf{A}_{rJ}\mathbf{i}_{J}$$ + +$$\mathbf{A}_{rG}\mathbf{G}\mathbf{v}_{G}=-\mathbf{A}_{rJ}\mathbf{i}_{J}\ \ \ \ \ \ \ \ (As, \mathbf{i}_{G}=\mathbf{G}\mathbf{v}_{G})$$ + +The KVE constraints are +$$\left[\begin{array}{c} + \mathbf{v}_{G} \\ + \mathbf{v}_{J} +\end{array}\right] += +\left[\begin{array}{c} + \mathbf{A}_{rG}^T \\ + \mathbf{A}_{rJ}^T +\end{array}\right] +\mathbf{v}_n$$ + +\begin{equation} +\mathbf{A}_{rG}\mathbf{G}\mathbf{A}_{rG}^{T}\mathbf{v}_{n}=-\mathbf{A}_{rJ}\mathbf{i}_{J} +\label{nodal_equation} +\end{equation} +\end{tiny} +\end{itemize} +\end{block} +\end{frame} + +\begin{frame}[fragile] +\begin{block}{Matrix Formulation} +\begin{itemize} +\item The diagonal entries of the matrix are the sum of conductances incident on the corresponding nodes. +\item The off diagonal entries $(i,j)^{th}$ of the matrix is the negative of conductances between node $i$ and $j$. +\item The $\mathbf{A}_{rJ}\mathbf{i}_{J}$ is the sum of current sources leaving the nodes. +\end{itemize} +\end{block} +\begin{block}{Example} +\end{block} +\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.35]{../figures/nodal_figure.eps} +\end{figure} +\end{minipage} +\begin{minipage}[!b]{0.55\linewidth} % A minipage that covers half the page +\begin{tiny} +$$\left[ +\begin{array}{ccc} +\widehat{R}_{1}+\widehat{R}_{2} & -\widehat{R}_{2} & 0\\ +-\widehat{R}_{2} & \widehat{R}_{2}+\widehat{R}_{3}+\widehat{R}_{4} & -\widehat{R}_{4}\\ +0 & -\widehat{R}_{4} & \widehat{R}_{4}+\widehat{R}_{5} +\end{array} +\right] \left[ +\begin{array}{c} +v_{1}\\ +v_{2}\\ +v_{3} +\end{array} +\right]= \left[ +\begin{array}{c} +I_{1}\\ +0\\ +I_{2} +\end{array} +\right]$$ +\end{tiny} +\end{minipage} +\tiny $$\mbox{Note that } \widehat{R}=1/R$$ +\tiny \href{run:../../LPCSim_1.0/ckt/nodalExample.ckt}{\color{red} Click here to see the example} +\end{frame} + + +\begin{frame} +\begin{block}{Modified Nodal Analysis} +\begin{small} +\begin{itemize} +\item applicable to all kinds of networks. +\item Let $\mathbf{A}_{r}$ be the reduced incidence matrix of ${\cal{G}}$ +By Tellegan's theorem, +\begin{tiny} +$$\mathbf{A_ri}=\mathbf{0}$$ +$$\left[\begin{array}{ccc} + \mathbf{A}_{rG} & \mathbf{A}_{rT} & \mathbf{A}_{rJ} +\end{array}\right] +\left[\begin{array}{c} + \mathbf{i}_{G} \\ + \mathbf{i}_{T} \\ + \mathbf{i}_{J} +\end{array}\right] +=\mathbf{0}$$ + +$$\left[\begin{array}{cc} + \mathbf{A}_{rG}\mathbf{G} & \mathbf{A}_{rT} +\end{array}\right] +\left[\begin{array}{c} + \mathbf{v}_{G} \\ + \mathbf{i}_{T} +\end{array}\right] +=-\mathbf{A}_{rJ}\mathbf{i}_{J}$$ + +\begin{equation} +\label{mna_eq1} +\left[\begin{array}{cc} + \mathbf{A}_{rG}\mathbf{G}\mathbf{A}_{rG}^{T} & \mathbf{A}_{rT} +\end{array}\right] +\left[\begin{array}{c} + \mathbf{v}_{n} \\ + \mathbf{i}_{T} +\end{array}\right] +=-\mathbf{A}_{rJ}\mathbf{i}_{J} +\end{equation} + +Device characteristics of the branches in $T$ be +$$\left[\begin{array}{cc} + \mathbf{M} & \mathbf{N} +\end{array}\right] +\left[\begin{array}{c} + \mathbf{i}_{T} \\ + \mathbf{v}_{T} +\end{array}\right] +=\mathbf{S}_{T}$$ + +\begin{equation} +\label{mna_eq2} +\left[\begin{array}{cc} + \mathbf{NA}_{rT}^{T} & \mathbf{M} +\end{array}\right] +\left[\begin{array}{c} + \mathbf{v}_{n} \\ + \mathbf{i}_{T} +\end{array}\right] +=\mathbf{S}_{T} +\end{equation} +\end{tiny} +\end{itemize} +\end{small} +\end{block} +\end{frame} + +\begin{frame} +\begin{block}{Example} +\begin{figure}[!ht] +\begin{center} +\includegraphics[scale=0.35]{../figures/modified_figure.eps} +\caption{ Example for MNA } \label{modifiedfig} +\end{center} +\end{figure} +\begin{tiny} +$$\left[ +\begin{array}{cccccc} +\widehat{R}_{1}+\widehat{R}_{4} & -\widehat{R}_{1} & -\widehat{R}_{4} & 1 & 0 \\ +-\widehat{R}_{1} & \widehat{R}_{1}+\widehat{R}_{2}+\widehat{R}_{3} & -\widehat{R}_{3} & 0 & 0 \\ +-\widehat{R}_{4} & -\widehat{R}_{3} & \widehat{R}_{3}+\widehat{R}_{4} & 0 & 1 \\ +1 & 0 & 0 & 0 & 0 \\ +0 & 0 & 1 & 0 & 0 +\end{array} +\right] \left[ +\begin{array}{c} +v_{1}\\ +v_{2}\\ +v_{3}\\ +i_{V_1}\\ +i_{V_2}\\ +\end{array} +\right]= \left[ +\begin{array}{c} +0\\ +0\\ +0\\ +V_{1}\\ +V_{2} +\end{array} +\right]$$ +\end{tiny} +\tiny $$\mbox{Note that } \widehat{R}=1/R$$ +\tiny \href{run:../../LPCSim_1.0/ckt/modifiedNodalExample.ckt}{\color{red} Click here to see the example} +\end{block} +\end{frame} + +\begin{frame} +\frametitle{Controlled Sources} +\begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page + \begin{figure}[!ht] + \centering + \includegraphics[scale=0.6]{../figures/VCCS.eps} + \caption{\scriptsize Voltage Controlled Current Source (VCCS)} + \label{vccs} + \end{figure} +\end{minipage} +%\hspace{0.5cm} % To get a little bit of space between the figures +\begin{minipage}[!b]{0.47\linewidth} + \begin{figure}[!ht] + \centering + \includegraphics[scale=0.6]{../figures/VCVS.eps} + \caption{\scriptsize Voltage Controlled Voltage Source (VCVS) } + \label{vcvs} + \end{figure} + \end{minipage} +\begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page + \begin{figure}[!ht] + \centering + \includegraphics[scale=0.6]{../figures/CCCS.eps} + \caption{\scriptsize Current Controlled Current Source (CCCS)} + \label{cccs} + \end{figure} +\end{minipage} +%\hspace{0.5cm} % To get a little bit of space between the figures +\begin{minipage}[!b]{0.47\linewidth} + \begin{figure}[!ht] + \centering + \includegraphics[scale=0.6]{../figures/CCVS.eps} + \caption{\scriptsize Current Controlled Voltage Source (CCVS) } + \label{ccvs} + \end{figure} + \end{minipage} +\begin{scriptsize} +\begin{itemize} +\item In voltage controlled devices, we have added a $0A$ current source as controlling branch +%without disturbing the incidence relationship of existing edges (i.e., the addition is 'soldering type') and its voltage is used for calculating the value of the devices. +\item In current controlled devices, we have added a $0V$ voltage source as controlling branch +%by splitting a node (i.e., plier type entry) and the current through it is used for calculating the value of the devices. +\end{itemize} +\end{scriptsize} +\end{frame} + +\begin{frame} +\begin{block}{Example with controlled sources} +\begin{figure}[!ht] +\begin{center} +\includegraphics[scale=0.6]{../figures/linearckt.eps} +\caption{ \scriptsize Example with controlled source (MNA)} \label{modifiedfig} +\end{center} +\end{figure} +\begin{tiny} +$$\left[ +\begin{array}{ccccccc} +\widehat{R}_{1} & -\widehat{R}_{1} & 0 & 0 & 0 & 1 & 0 \\ +-\widehat{R}_{1} & \widehat{R}_{1}+\widehat{R}_{2} & 0 & 0 & 0 & 0 &1\\ +0 & 0& \widehat{R}_{4} & -\widehat{R}_{4}-g_1 & 0 & 0 & -1 \\ +0 & 0& -\widehat{R}_{4} & \widehat{R}_{3}+ \widehat{R}_{4}+\widehat{R}_{5} &-\widehat{R}_{5} & 0 & 0 \\ +0 & 0& 0 &g_1-\widehat{R}_{5} & \widehat{R}_{5}+\widehat{R}_{6} & 0 & 0 \\ +1 & 0 & 0 & 0 & 0 &0 &0\\ +0 & 1 & -1 &-e1 &e1 &0 & 0 +\end{array} +\right] \left[ +\begin{array}{c} +v_{1}\\ +v_{2}\\ +v_{3}\\ +v_{4}\\ +v_{5}\\ +i_{V_1}\\ +i_{E_1}\\ +\end{array} +\right]= \left[ +\begin{array}{c} +0\\ +0\\ +I_1\\ +0\\ +0\\ +V_{1}\\ +0 +\end{array} +\right]$$ +\end{tiny} +\tiny $$\mbox{Note that } \widehat{R}=1/R$$ +\tiny \href{run:../../LPCSim_1.0/ckt/linear1.ckt}{\color{red} Click here to see the example} +\end{block} +\end{frame} + +\begin{frame} +\begin{block}{Example with controlled sources-2} +\begin{figure}[!ht] +\begin{center} +\includegraphics[scale=0.6]{../figures/linearckt2.eps} +\caption{ \scriptsize Example2 with controlled source (MNA)} \label{modifiedfig} +\end{center} +\end{figure} +\begin{tiny} +$$\left[ +\begin{array}{cccccc} +\widehat{R}_{1}+\widehat{R}_{2} & -\widehat{R}_{2} & 0 & 0 & 0 &0\\ +-\widehat{R}_{2} &\widehat{R}_{2}+\widehat{R}_{4} &0& -\widehat{R}_{4} & 1 & 0 \\ +0 & -\widehat{R}_{4} & 0 & \widehat{R}_{4} & 0 & 1 \\ +0 & 1& -1 &0 & 0 & 0 \\ +0 & 0 & 0 & 1 & -h_1 &0 +\end{array} +\right] \left[ +\begin{array}{c} +v_{1}\\ +v_{2}\\ +v_{3}\\ +v_{4}\\ +i_{V_1}\\ +i_{H_1}\\ +\end{array} +\right]= \left[ +\begin{array}{c} +I_1\\ +0\\ +0\\ +0\\ +V_{1}\\ +0 +\end{array} +\right]$$ +\end{tiny} +\tiny $$\mbox{Note that } \widehat{R}=1/R$$ +\tiny \href{run:../../LPCSim_1.0/ckt/linear2.ckt}{\color{red} Click here to see the example} +\end{block} +\end{frame} + +\begin{frame} +\frametitle{Circuit with nonlinear elements} +Simulation of circuit with nonlinear element is done in two steps: +\begin{itemize} +\item Formulating the nonlinear equilibrium equations using topological constraints (i.e., KCE, KVE). +\item Solving these equations using appropriate numerical technique. +\end{itemize} +Newton-Raphson method -- Numerical technique to solve nonlinear equations +\begin{itemize} +\item fast convergence rate +\item needs good initial guess +\item does not guaranteed to converge +\item slower when multiple solution +\end{itemize} +\end{frame} + +\begin{frame} +\frametitle{Linearization of Nonlinear Elements} +\begin{minipage}[!b]{0.5\linewidth} +Diode characteristics, +$$I_D=I_S(e^{qV/kT}-1)$$ +$$I_D=I_D|_{V=V_0} + (V-V_0)\frac{I_D}{V}|_{V=V_0}$$ +$$I_D=I_{D0}+(V-V_0)G_{D0}$$ +\begin{figure}[h] +\begin{center} +\includegraphics[scale=0.4]{../figures/diodeI.eps} +\begin{small}Modeling of Diode\end{small} +\label{diodeI} +\end{center} +\end{figure} +\end{minipage} +\begin{minipage}[!b]{0.4\linewidth} +\begin{figure}[h] +\begin{center} +\includegraphics[scale=0.3]{../figures/diodechar1.eps} +\begin{small}Linearized approximation of diode model\end{small} +\begin{tiny}$$I_{DN0}=I_{D0}-V_0G_{D0}$$\end{tiny} +\end{center} +\end{figure} +\end{minipage} +\end{frame} + + +\begin{frame} +{\bf Procedure:}{Operating Point Analysis} +\small +\begin{algorithmic}[1] +\STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage. +\STATE Find branch voltage and node potential. +\STATE Find branch current from branch voltage using device characteristics. +\IF{Non-linear component} +\STATE {\bf NR:} Check device characteristics of non-linear devices. +\IF {Device characteristics is not satisfied} +\STATE Call Newton Raphson procedure +\STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage. +\STATE Find branch current from branch voltage using device characteristics. +\STATE Go to {\bf NR} +\ENDIF +\STATE Check for KCL +\ENDIF +\end{algorithmic} +\normalsize +\end{frame} + +\begin{frame} +\frametitle{Full Wave Bridge Rectifier} +\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.5]{../figures/bridge.eps} +\end{figure} +\end{minipage} +\hspace{0.5cm} % To get a little bit of space between the figures +\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.3]{../figures/bridgeOutput.eps} +\end{figure} +\end{minipage} +\end{frame} + +\section{DC Analysis} +\begin{frame} +\frametitle{DC Analysis} +{\bf Procedure:}{DC Analysis} +\small +\begin{algorithmic}[1] +\STATE Modify the value of the sweep source and update Modified Nodal matrix. +\STATE Do Operating Point Analysis. +\end{algorithmic} +\normalsize +\end{frame} + +\begin{frame} +\frametitle{Voltage Sweep} +\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.8]{../figures/V_Sweep.eps} +\caption{Example of DC Analysis (Vsweep.ckt)} +\end{figure} +\end{minipage} +\hspace{0.5cm} % To get a little bit of space between the figures +\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.3]{../figures/V_SweepOutput.eps} +\end{figure} +\end{minipage} +\end{frame} + +\begin{frame} +\frametitle{User defined Components} +Consider, a non-linear resistance, +$$I=\frac{1}{R}V^3$$ + +\begin{itemize} +\item Create a file \$CompName.sci +\item Define +\begin{itemize} +\item Function in the $i=g(v)$ form +\item Jacobian of the function +\end{itemize} +\end{itemize} + +%{\bf Syntax:-} +%\newline +%function I=\$CompName\_func(voltage,parameter) +%\$par\_2=parameter(2) +%\$par\_3=parameter(3) +\end{frame} + +\begin{frame} +\frametitle{Non-linear Resistance} +\begin{minipage}[!b]{0.43\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.7]{../figures/myR.eps} +\end{figure} +\begin{tiny} +function I=myR\_func(voltage,parameter) +\begin{center} + R=parameter(2); \newline + I=1/R*(voltage\^3); +\end{center} +endfunction \newline + + +function Gj=myR\_Jacobian(voltage,parameter) +\begin{center} + R=parameter(2); \newline + Gj=3/R*(voltage\^2); +\end{center} +endfunction +\end{tiny} +\end{minipage} +\hspace{0.5cm} % To get a little bit of space between the figures +\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.3]{../figures/myROutput.eps} +\end{figure} +\end{minipage} +\end{frame} + +\section{Transient Analysis} +\begin{frame} + \begin{block}{What is Transient Analysis?} + \begin{itemize} + \item Computes the response of a circuit as function of time. + \item Time is discretized and the solution is computed piecewise. + \end{itemize} + \end{block} + \begin{block}{Important factors} + \begin{itemize} + \item Proper time Stepping. + \item Integration methods. + \end{itemize} + \end{block} +\end{frame} + +\begin{frame} +\frametitle{Discreatization} +Consider, a capacitor +\begin{tiny} +$$I_C(t_n)=C\frac{\partial{V}_C(t_n)}{\partial{t}}$$ +Using Backward Euler's method, +$$I_C(t_n)=C\frac{V(t_n)-V(t_{n-1})}{t_n-t_{n-1}}$$ +$$I_C(t_n)=\frac{C}{h}V(t_n)-\frac{C}{h}V(t_{n-1})$$ +$$I_C(t_n)=G_C^{(k)}V(t_n)-I_C^{(k)}$$ +\end{tiny} +\begin{figure}[h] +\centering +\includegraphics[scale=0.8]{../figures/Ceq.eps} +\end{figure} +\end{frame} + +\begin{frame} +\frametitle{RC Circuit} +\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.8]{../figures/RC.eps} +\end{figure} +\end{minipage} +\hspace{0.5cm} % To get a little bit of space between the figures +\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.3]{../figures/RCOutput.eps} +\end{figure} +\end{minipage} +\end{frame} + +\begin{frame} +\frametitle{Full Wave Bridge Rectifier with Filter} +\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.4]{../figures/bridgeFilter.eps} +\end{figure} +\end{minipage} +\hspace{0.5cm} % To get a little bit of space between the figures +\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.3]{../figures/bridgeFilterOutput.eps} +\end{figure} +\end{minipage} +\end{frame} + +\begin{frame} +\frametitle{PseudoCode} +{\bf Procedure:}{Transient Analysis} +\small +\begin{algorithmic}[1] +\STATE Discretize time dependent Component and Update Modified Nodal matrix. +\STATE Do Operating Point Analysis. +\end{algorithmic} +\normalsize + +{\bf Procedure:}{Discretization} +\small +\begin{algorithmic}[1] +\STATE Compute time dependent source value at time t. +\STATE Compute the values of static model of dynamic component at time t. +\STATE Update Modified Nodal matrix. +\end{algorithmic} +\normalsize +\end{frame} + +%\begin{frame} +%\frametitle{CMOS Inverter} +%\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +%\begin{figure}[h] +%\centering +%\includegraphics[scale=0.4]{../figures/inverter.eps} +%\end{figure} +%\end{minipage} +%\hspace{0.5cm} % To get a little bit of space between the figures +%\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page +%\begin{figure}[h] +%\centering +%\includegraphics[scale=0.3]{../figures/inverterOutput.eps} +%\end{figure} +%\end{minipage} +%\end{frame} + +\end{document} + diff --git a/FreeEDA/LPCSim/report/presentation/SMCSim_SFD.tex b/FreeEDA/LPCSim/report/presentation/SMCSim_SFD.tex new file mode 100644 index 0000000..f2cd6dd --- /dev/null +++ b/FreeEDA/LPCSim/report/presentation/SMCSim_SFD.tex @@ -0,0 +1,737 @@ +%$Header: /cvsroot/latex-beamer/latex-beamer/solutions/generic-talks/generic-ornate-15min-45min.en.tex,v 1.4 2004/10/07 20:53:08 tantau Exp $ +\documentclass{beamer} +\mode +{ + \usecolortheme{seahorse} + \usefonttheme{professionalfonts} + \useinnertheme{rounded} + \useoutertheme{shadow} +% \useoutertheme{smoothbars} +} +%\setbeamertemplate{background canvas}[vertical shading][bottom=white!10,top=blue!5] +\usepackage{verbatim} +\usepackage[english]{babel} +\usepackage[latin1]{inputenc} +\usepackage{pgf,pgfarrows,pgfnodes,pgfautomata,pgfheaps,pgfshade} +\usepackage{amsmath,amsfonts,amsthm,amssymb} +\usepackage{times} +\usepackage[T1]{fontenc} +\usepackage{graphics} +\usepackage{graphicx} +%\usepackage{psfig} +\usepackage{algorithmic} + +\title +{Scilab based Mini Circuit Simulator} + +\author[] +{Yogesh Dilip Save} +\institute +{ + Department of Electrical Engineering\\ + Indian Institute of Technology, Bombay +} +%\pgfdeclareimage[height=0.7cm]{university-logo}{iitblogo.eps} +%\logo{\pgfuseimage{university-logo}} + + +\date[seminar] % (optional) +{Sept., 2011 / \small{Software Freedom Day}} + + +\begin{document} +%*************************************************************************************** +\begin{frame} + \titlepage +\end{frame} +%*************************************************************************************** +%\begin{frame} +% \frametitle{Presentation Outline} +% \setcounter{tocdepth}{1} +% \tableofcontents +%\end{frame} +%*************************************************************************************** + +\section{Introduction} +\begin{frame} + \frametitle{Motivation} +\begin{block}{Objective} +To assist students in improving their knowledge in field of circuit simulation. +\end{block} +\begin{block}{Problem with commercial simulators} +\begin{itemize} +\item Generally software codes are not available. +\item Software codes are written in higher level language (C Programming and Fortran....). +\item Complex due to implementation of many features and complex modelling. +\end{itemize} +\end{block} +\end{frame} + +\begin{frame} + \frametitle{Motivation} +\begin{block}{Objective} +To assist students in improving their knowledge in field of circuit simulation. +\end{block} +\begin{block}{Mini simulator} +\begin{itemize} +\item used Scilab for coding. +\item integrated least number of component. +\item different versions for add-on features. +\end{itemize} +\end{block} +\end{frame} + +\section{Features} +\begin{frame} + \frametitle{Features} +\begin{itemize} + \item {\color{red} Various Analysis options.} + \begin{itemize} + \item Operating Point Analysis + \item DC Analysis + \item Transient Analysis + \item AC Analysis + \end{itemize} + \item Facility to define a new component. + \item Provides circuit equations for debugging as well as learning circuit simulator. + \item Easy to integrate and test a new method such as convergence technique, integration method etc. +\end{itemize} +\end{frame} + +\begin{frame} +\frametitle{Full Wave Bridge Rectifier with Filter} +\begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page + \begin{small} {\bf Circuit Diagram and Netlist} \end{small} +\vspace{-0.5cm} +\begin{figure}[h] +\centering +\includegraphics[scale=0.47]{../figures/bridgeFilter.eps} +\end{figure} +\vspace{-0.5cm} +\begin{tiny} +* Full Wave Bridge Rectifier +\newline +\vspace{-0.1cm} +V1 1 2 sine (5 50) +\newline +\vspace{-0.1cm} +D1 1 3 mymodel (1e-8 0.026) +\newline +\vspace{-0.1cm} +D2 2 3 mymodel (1e-8 0.026) +\newline +\vspace{-0.1cm} +D3 0 1 mymodel (1e-8 0.026) +\newline +\vspace{-0.1cm} +D4 0 2 mymodel (1e-8 0.026) +\newline +\vspace{-0.1cm} +R1 3 0 10000 +\newline +\vspace{-0.1cm} +C1 3 0 1e-2 +\newline +\vspace{-0.1cm} +.tran 0 100 0.5 +\newline +\vspace{-0.1cm} +.plot v(1)-v(2) v(3) +\newline +\vspace{-0.1cm} +.end +\end{tiny} +\end{minipage} +\hspace{0.1cm} % To get a little bit of space between the figures +\begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.3]{../figures/bridgeFilterOutput.eps} +\caption{Input-Output Waveform} +\end{figure} +\end{minipage} +\end{frame} + +\begin{frame} + \frametitle{Features} +\begin{itemize} + \item Various Analysis options. + \begin{itemize} + \item Operating Point Analysis + \item DC Analysis + \item Transient Analysis + \item AC Analysis + \end{itemize} + \item {\color{red} Facility to define a new component.} + \item Provides circuit equations for debugging as well as learning circuit simulator. + \item Easy to integrate and test a new method such as convergence technique, integration method etc. +\end{itemize} +\end{frame} + +\begin{frame} +\frametitle{User defined Components} +Consider, a non-linear resistance, +$$I=\frac{1}{R}V^3$$ + +\begin{itemize} +\item Create a file \$CompName.sci +\item Define +\begin{itemize} +\item Function in the $i=g(v)$ form +\item Jacobian of the function +\end{itemize} +\end{itemize} + +%{\bf Syntax:-} +%\newline +%function I=\$CompName\_func(voltage,parameter) +%\$par\_2=parameter(2) +%\$par\_3=parameter(3) +\end{frame} + +\begin{frame} +\frametitle{Non-linear Resistance} +\begin{minipage}[!b]{0.43\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.7]{../figures/myR.eps} +\end{figure} +\begin{tiny} +function I=myR\_func(voltage,param)\newline +\hspace*{1cm}R=param(2); \newline +\hspace*{1cm}I=1/R*(voltage$^3$);\newline +endfunction + +function Gj=myR\_Jacobian(voltage,param)\newline +\hspace*{1cm}R=param(2); \newline +\hspace*{1cm}Gj=3/R*(voltage$^2$);\newline +endfunction +\end{tiny} +\end{minipage} +\hspace{0.5cm} % To get a little bit of space between the figures +\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page +\begin{figure}[h] +\centering +\includegraphics[scale=0.3]{../figures/myROutput.eps} +\end{figure} +\end{minipage} +\end{frame} + +\begin{frame} + \frametitle{Features} +\begin{itemize} + \item Various Analysis options. + \begin{itemize} + \item Operating Point Analysis + \item DC Analysis + \item Transient Analysis + \item AC Analysis + \end{itemize} + \item Facility to define a new component. + \item {\color{red} Provides circuit equations for debugging as well as learning circuit simulator.} + \item Easy to integrate and test a new method such as convergence technique, integration method etc. +\end{itemize} +\end{frame} + +\begin{frame} +\begin{block}{Example} +%\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +\begin{figure}[!ht] +\begin{center} +\includegraphics[scale=0.35]{../figures/modified_figure.eps} +\caption{ Example for MNA } \label{modifiedfig} +\end{center} +\end{figure} +%\end{minipage} +%\begin{minipage}[!b]{0.55\linewidth} % A minipage that covers half the page +\begin{tiny} +$$\left[ +\begin{array}{cccccc} +G_{1}+G_{4} & -G_{1} & -G_{4} & 1 & 0 \\ +-G_{1} & G_{1}+G_{2}+G_{3} & -G_{3} & 0 & 0 \\ +-G_{4} & -G_{3} & G_{3}+G_{4} & 0 & 1 \\ +1 & 0 & 0 & 0 & 0 \\ +0 & 0 & 1 & 0 & 0 +\end{array} +\right] \left[ +\begin{array}{c} +v_{1}\\ +v_{2}\\ +v_{3}\\ +i_{V_1}\\ +i_{V_2}\\ +\end{array} +\right]= \left[ +\begin{array}{c} +0\\ +0\\ +0\\ +V_{1}\\ +V_{2} +\end{array} +\right]$$ +\end{tiny} +%\end{minipage} +\end{block} +\end{frame} + +\begin{frame} + \frametitle{Features} +\begin{itemize} + \item Various Analysis options. + \begin{itemize} + \item Operating Point Analysis + \item DC Analysis + \item Transient Analysis + \item AC Analysis + \end{itemize} + \item Facility to define a new component. + \item Provides circuit equations for debugging as well as learning circuit simulator. + \item {\color{red} Easy to integrate and test a new method such as convergence technique, integration method etc.} +\end{itemize} +\end{frame} + +\begin{frame} + \begin{center} + {\Huge Thank You} +\end{center} +% \smiley +\end{frame} +% +% \section{Operating Point Analysis} +% \begin{frame} +% \begin{block}{Operating Point (OP) Analysis} +% \begin{itemize} +% \item OP Analysis is the central part of a circuit simulator. +% \item The equations that describe the electrical system are nonlinear and algebraic and their solution gives operating point. +% \item Systems of nonlinear equations are solved by iteratively formulating and solving systems of linear algebraic equations. +% \item The overall efficiency of a circuit simulator is dependent upon the performance of the linear DC analyzer. +% %\item Thus, our work is towards improving the performance of linear DC Analyzers and handling convergence issues related to large size nonlinear circuits. +% \end{itemize} +% \end{block} +% \end{frame} +% +% \begin{frame} +% \begin{block}{\small Nodal Analysis} +% \begin{itemize} +% \begin{small} +% \item Applicable when the network has only current sources and conductances type devices i.e., $i=g(v)$. +% \item Let, $\mathbf{A}_r$ be the reduced incidence matrix of $\cal{G}$ which is a representative matrix of $V_v(\cal{G})$. \\ +% \end{small} +% \begin{tiny} +% The KCL constraints are +% $$\mathbf{A_ri}=\mathbf{0}$$ +% $$\left[\begin{array}{cc} +% \mathbf{A}_{rG} & \mathbf{A}_{rJ} +% \end{array}\right] +% \left[\begin{array}{c} +% \mathbf{i}_{G} \\ +% \mathbf{i}_{J} +% \end{array}\right] +% =\mathbf{0}$$ +% $$\mathbf{A}_{rG}\mathbf{i}_{G}=-\mathbf{A}_{rJ}\mathbf{i}_{J}$$ +% +% $$\mathbf{A}_{rG}\mathbf{G}\mathbf{v}_{G}=-\mathbf{A}_{rJ}\mathbf{i}_{J}\ \ \ \ \ \ \ \ (As, \mathbf{i}_{G}=\mathbf{G}\mathbf{v}_{G})$$ +% +% The KVE constraints are +% $$\left[\begin{array}{c} +% \mathbf{v}_{G} \\ +% \mathbf{v}_{J} +% \end{array}\right] +% = +% \left[\begin{array}{c} +% \mathbf{A}_{rG}^T \\ +% \mathbf{A}_{rJ}^T +% \end{array}\right] +% \mathbf{v}_n$$ +% +% \begin{equation} +% \mathbf{A}_{rG}\mathbf{G}\mathbf{A}_{rG}^{T}\mathbf{v}_{n}=-\mathbf{A}_{rJ}\mathbf{i}_{J} +% \label{nodal_equation} +% \end{equation} +% \end{tiny} +% \end{itemize} +% \end{block} +% \end{frame} +% +% \begin{frame} +% \begin{block}{Matrix Formulation} +% \begin{itemize} +% \item The diagonal entries of the matrix are the sum of conductances incident on the corresponding nodes. +% \item The off diagonal entries $(i,j)^{th}$ of the matrix is the negative of conductances between node $i$ and $j$. +% \item The $\mathbf{A}_{rJ}\mathbf{i}_{J}$ is the sum of current sources leaving the nodes. +% \end{itemize} +% \end{block} +% \begin{block}{Example} +% \end{block} +% \begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +% \begin{figure}[h] +% \centering +% \includegraphics[scale=0.35]{../figures/nodal_figure.eps} +% \end{figure} +% \end{minipage} +% \begin{minipage}[!b]{0.55\linewidth} % A minipage that covers half the page +% \begin{tiny} +% $$\left[ +% \begin{array}{ccc} +% G_{1}+G_{2} & -G_{2} & 0\\ +% -G_{2} & G_{2}+G_{3}+G_{4} & -G_{4}\\ +% 0 & -G_{4} & G_{4}+G_{5} +% \end{array} +% \right] \left[ +% \begin{array}{c} +% v_{1}\\ +% v_{2}\\ +% v_{3} +% \end{array} +% \right]= \left[ +% \begin{array}{c} +% I_{1}\\ +% 0\\ +% I_{2} +% \end{array} +% \right]$$ +% \end{tiny} +% \end{minipage} +% \end{frame} +% +% +% \begin{frame} +% \begin{block}{Modified Nodal Analysis} +% \begin{small} +% \begin{itemize} +% \item applicable to all kinds of networks. +% \item Let $\mathbf{A}_{r}$ be the reduced incidence matrix of ${\cal{G}}$ +% By Tellegan's theorem, +% \begin{tiny} +% $$\mathbf{A_ri}=\mathbf{0}$$ +% $$\left[\begin{array}{ccc} +% \mathbf{A}_{rG} & \mathbf{A}_{rT} & \mathbf{A}_{rJ} +% \end{array}\right] +% \left[\begin{array}{c} +% \mathbf{i}_{G} \\ +% \mathbf{i}_{T} \\ +% \mathbf{i}_{J} +% \end{array}\right] +% =\mathbf{0}$$ +% +% $$\left[\begin{array}{cc} +% \mathbf{A}_{rG}\mathbf{G} & \mathbf{A}_{rT} +% \end{array}\right] +% \left[\begin{array}{c} +% \mathbf{v}_{G} \\ +% \mathbf{i}_{T} +% \end{array}\right] +% =-\mathbf{A}_{rJ}\mathbf{i}_{J}$$ +% +% \begin{equation} +% \label{mna_eq1} +% \left[\begin{array}{cc} +% \mathbf{A}_{rG}\mathbf{G}\mathbf{A}_{rG}^{T} & \mathbf{A}_{rT} +% \end{array}\right] +% \left[\begin{array}{c} +% \mathbf{v}_{n} \\ +% \mathbf{i}_{T} +% \end{array}\right] +% =-\mathbf{A}_{rJ}\mathbf{i}_{J} +% \end{equation} +% +% Device characteristics of the branches in $T$ be +% $$\left[\begin{array}{cc} +% \mathbf{M} & \mathbf{N} +% \end{array}\right] +% \left[\begin{array}{c} +% \mathbf{i}_{T} \\ +% \mathbf{v}_{T} +% \end{array}\right] +% =\mathbf{S}_{T}$$ +% +% \begin{equation} +% \label{mna_eq2} +% \left[\begin{array}{cc} +% \mathbf{NA}_{rT}^{T} & \mathbf{M} +% \end{array}\right] +% \left[\begin{array}{c} +% \mathbf{v}_{n} \\ +% \mathbf{i}_{T} +% \end{array}\right] +% =\mathbf{S}_{T} +% \end{equation} +% \end{tiny} +% \end{itemize} +% \end{small} +% \end{block} +% \end{frame} +% +% \begin{frame} +% \begin{block}{Example} +% %\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +% \begin{figure}[!ht] +% \begin{center} +% \includegraphics[scale=0.35]{../figures/modified_figure.eps} +% \caption{ Example for MNA } \label{modifiedfig} +% \end{center} +% \end{figure} +% %\end{minipage} +% %\begin{minipage}[!b]{0.55\linewidth} % A minipage that covers half the page +% \begin{tiny} +% $$\left[ +% \begin{array}{cccccc} +% G_{1}+G_{4} & -G_{1} & -G_{4} & 1 & 0 \\ +% -G_{1} & G_{1}+G_{2}+G_{3} & -G_{3} & 0 & 0 \\ +% -G_{4} & -G_{3} & G_{3}+G_{4} & 0 & 1 \\ +% 1 & 0 & 0 & 0 & 0 \\ +% 0 & 0 & 1 & 0 & 0 +% \end{array} +% \right] \left[ +% \begin{array}{c} +% v_{1}\\ +% v_{2}\\ +% v_{3}\\ +% i_{V_1}\\ +% i_{V_2}\\ +% \end{array} +% \right]= \left[ +% \begin{array}{c} +% 0\\ +% 0\\ +% 0\\ +% V_{1}\\ +% V_{2} +% \end{array} +% \right]$$ +% \end{tiny} +% %\end{minipage} +% \end{block} +% \end{frame} +% +% \begin{frame} +% \frametitle{Controlled Sources} +% \begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page +% \begin{figure}[!ht] +% \centering +% \includegraphics[scale=0.6]{../figures/VCCS.eps} +% \caption{Voltage Controlled Current Source (VCCS)} +% \label{vccs} +% \end{figure} +% \end{minipage} +% %\hspace{0.5cm} % To get a little bit of space between the figures +% \begin{minipage}[!b]{0.47\linewidth} +% \begin{figure}[!ht] +% \centering +% \includegraphics[scale=0.6]{../figures/VCVS.eps} +% \caption{Voltage Controlled Voltage Source (VCVS) } +% \label{vcvs} +% \end{figure} +% \end{minipage} +% \begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page +% \begin{figure}[!ht] +% \centering +% \includegraphics[scale=0.6]{../figures/CCCS.eps} +% \caption{Current Controlled Current Source (CCCS)} +% \label{cccs} +% \end{figure} +% \end{minipage} +% %\hspace{0.5cm} % To get a little bit of space between the figures +% \begin{minipage}[!b]{0.47\linewidth} +% \begin{figure}[!ht] +% \centering +% \includegraphics[scale=0.6]{../figures/CCVS.eps} +% \caption{Current Controlled Voltage Source (CCVS) } +% \label{ccvs} +% \end{figure} +% \end{minipage} +% \begin{small} +% \begin{itemize} +% \item In voltage controlled devices, we have added a $0A$ current source as controlling branch +% %without disturbing the incidence relationship of existing edges (i.e., the addition is 'soldering type') and its voltage is used for calculating the value of the devices. +% \item In current controlled devices, we have added a $0V$ voltage source as controlling branch +% %by splitting a node (i.e., plier type entry) and the current through it is used for calculating the value of the devices. +% \end{itemize} +% \end{small} +% \end{frame} +% +% \begin{frame} +% \frametitle{Linearization of Nonlinear Elements} +% \begin{minipage}[!b]{0.5\linewidth} +% Diode characteristics, +% $$I_D=I_S(e^{qV/kT}-1)$$ +% $$I_D=I_D|_{V=V_0} + (V-V_0)\frac{I_D}{V}|_{V=V_0}$$ +% $$I_D=I_{D0}+(V-V_0)G_{D0}$$ +% \begin{figure}[h] +% \begin{center} +% \includegraphics[scale=0.4]{../figures/diodeI.eps} +% \begin{small}Modeling of Diode\end{small} +% \label{diodeI} +% \end{center} +% \end{figure} +% \end{minipage} +% \begin{minipage}[!b]{0.4\linewidth} +% \begin{figure}[h] +% \begin{center} +% \includegraphics[scale=0.3]{../figures/diodechar1.eps} +% \begin{small}Linearized approximation of diode model\end{small} +% \begin{tiny}$$I_{DN0}=I_{D0}-V_0G_{D0}$$\end{tiny} +% \end{center} +% \end{figure} +% \end{minipage} +% \end{frame} +% +% +% \begin{frame} +% {\bf Procedure:}{Operating Point Analysis} +% \small +% \begin{algorithmic}[1] +% \STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage. +% \STATE Find branch voltage and node potentail. +% \STATE Find branch current from branch voltage using device characteristics. +% \IF{Non-linear component} +% \STATE {\bf NR:} Check device characteristics of non-linear devices. +% \IF {Device characteristics is not satisfied} +% \STATE Call Newton Raphson procedure +% \STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage. +% \STATE Find branch current from branch voltage using device characteristics. +% \STATE Go to {\bf NR} +% \ENDIF +% \STATE Check for KCL +% \ENDIF +% \end{algorithmic} +% \normalsize +% \end{frame} +% +% \begin{frame} +% \frametitle{Full Wave Bridge Rectifier} +% \begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +% \begin{figure}[h] +% \centering +% \includegraphics[scale=0.5]{../figures/bridge.eps} +% \end{figure} +% \end{minipage} +% \hspace{0.5cm} % To get a little bit of space between the figures +% \begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page +% \begin{figure}[h] +% \centering +% \includegraphics[scale=0.3]{../figures/bridgeOutput.eps} +% \end{figure} +% \end{minipage} +% \end{frame} +% +% \section{DC Analysis} +% \begin{frame} +% \frametitle{DC Analysis} +% {\bf Procedure:}{DC Analysis} +% \small +% \begin{algorithmic}[1] +% \STATE Modify the value of the sweep source and update Modified Nodal matrix. +% \STATE Do Operating Point Analysis. +% \end{algorithmic} +% \normalsize +% \end{frame} +% +% \begin{frame} +% \frametitle{Voltage Sweep} +% \begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +% \begin{figure}[h] +% \centering +% \includegraphics[scale=0.8]{../figures/V_Sweep.eps} +% \caption{Example of DC Analysis (Vsweep.ckt)} +% \end{figure} +% \end{minipage} +% \hspace{0.5cm} % To get a little bit of space between the figures +% \begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page +% \begin{figure}[h] +% \centering +% \includegraphics[scale=0.3]{../figures/V_SweepOutput.eps} +% \end{figure} +% \end{minipage} +% \end{frame} +% +% \section{Transient Analysis} +% \begin{frame} +% \begin{block}{What is Transient Analysis?} +% \begin{itemize} +% \item Computes the response of a circuit as function of time. +% \item Time is discretized and the solution is computed piecewise. +% \end{itemize} +% \end{block} +% \begin{block}{Important factors} +% \begin{itemize} +% \item Proper time Stepping. +% \item Integration methods. +% \end{itemize} +% \end{block} +% \end{frame} +% +% \begin{frame} +% \frametitle{Discreatization} +% Consider, a capacitor +% \begin{tiny} +% $$I_C(t_n)=C\frac{\partial{V}_C(t_n)}{\partial{t}}$$ +% Using Backward Euler's method, +% $$I_C(t_n)=C\frac{V(t_n)-V(t_{n-1})}{t_n-t_{n-1}}$$ +% $$I_C(t_n)=\frac{C}{h}V(t_n)-\frac{C}{h}V(t_{n-1})$$ +% $$I_C(t_n)=G_C^{(k)}V(t_n)-I_C^{(k)}$$ +% \end{tiny} +% \begin{figure}[h] +% \centering +% \includegraphics[scale=0.8]{../figures/Ceq.eps} +% \end{figure} +% \end{frame} +% +% \begin{frame} +% \frametitle{RC Circuit} +% \begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +% \begin{figure}[h] +% \centering +% \includegraphics[scale=0.8]{../figures/RC.eps} +% \end{figure} +% \end{minipage} +% \hspace{0.5cm} % To get a little bit of space between the figures +% \begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page +% \begin{figure}[h] +% \centering +% \includegraphics[scale=0.3]{../figures/RCOutput.eps} +% \end{figure} +% \end{minipage} +% \end{frame} +% +% +% \begin{frame} +% \frametitle{PseudoCode} +% {\bf Procedure:}{Transient Analysis} +% \small +% \begin{algorithmic}[1] +% \STATE Discretize time dependent Component and Update Modified Nodal matrix. +% \STATE Do Operating Point Analysis. +% \end{algorithmic} +% \normalsize +% +% {\bf Procedure:}{Discretization} +% \small +% \begin{algorithmic}[1] +% \STATE Compute time dependent source value at time t. +% \STATE Compute the values of static model of dynamic component at time t. +% \STATE Update Modified Nodal matrix. +% \end{algorithmic} +% \normalsize +% \end{frame} +% +% %\begin{frame} +% %\frametitle{CMOS Inverter} +% %\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page +% %\begin{figure}[h] +% %\centering +% %\includegraphics[scale=0.4]{../figures/inverter.eps} +% %\end{figure} +% %\end{minipage} +% %\hspace{0.5cm} % To get a little bit of space between the figures +% %\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page +% %\begin{figure}[h] +% %\centering +% %\includegraphics[scale=0.3]{../figures/inverterOutput.eps} +% %\end{figure} +% %\end{minipage} +% %\end{frame} +% +\end{document} + diff --git a/FreeEDA/LPCSim/report/presentation/runlatex b/FreeEDA/LPCSim/report/presentation/runlatex new file mode 100644 index 0000000..1e21dcf --- /dev/null +++ b/FreeEDA/LPCSim/report/presentation/runlatex @@ -0,0 +1,3 @@ +#!/bin/bash +latex $1.tex +dvipdf $1.dvi diff --git a/FreeEDA/LPCSim/report/report.tex b/FreeEDA/LPCSim/report/report.tex new file mode 100644 index 0000000..0a090c1 --- /dev/null +++ b/FreeEDA/LPCSim/report/report.tex @@ -0,0 +1,208 @@ +\documentclass[a4paper,10pt]{report} +\pagestyle{plain} +\usepackage{graphicx} +\usepackage{caption} +\usepackage{algorithmic} +% Title Page +\title{MiniSim} +\author{Yogesh Dilip Save} + +\begin{document} +\maketitle +\chapter*{Introduction} +MiniSim is a circuit simulator to assist students in improving their knowledge in field of circuit simulation. The purpose of this project is not only to improve the understanding of student toward building simulator but also add some features which are not available in commercial simulator. + +\section*{Features} +Analysis Options +\begin{enumerate} +\item Operating Point Analysis +\item DC Analysis +\item Transient Analysis +\end{enumerate} +Devices Suported +\begin{enumerate} +\item All linear components (Resistances, Independent voltage and current sources, controlled sources). +\item Non-linear components (Diode) +\item User Defined Non-linear component +\item Time Dependent Component (Capacitor) +\item MOSFET +\end{enumerate} + +\chapter*{User Defined Components} +How to define a new component? +\par +Consider, a non-linear resistance, +$$I=\frac{1}{R}V^2$$ + +It is two step processs: +\begin{enumerate} +\item Create a file \$CompName.sci +\item Define +\begin{enumerate} +\item Function in the $i=g(v)$ form +\item Jacobian of the function +\end{enumerate} +\end{enumerate} + +{\bf Syntax:-} +\newline +function I=\$CompName\_func(voltage,parameter) +\$par\_2=parameter(2) +\$par\_3=parameter(3) + +\chapter*{Algorithms} +{\bf Circuit Simulator} (Main Program) +\small +\begin{algorithmic}[1] +\STATE Get Analysis Options. +\STATE Read Circuit from file and convert it into graph. +\STATE Linearize non-linear components. +\STATE Build Modified Nodal Matrix. +\STATE Do Operating Point Analysis. +\STATE Print Operating Point Solution. +\IF {DC Analysis} +\FOR{Sweep Voltage = Intial : Final} +\STATE Do DC Analysis. +\STATE Store output variables. +\ENDFOR +\STATE Print/Plot output. +\ENDIF +\IF {Transient Analysis} +\FOR{time = Intial : Final} +\STATE Do Transient Analysis. +\STATE Store output variables. +\ENDFOR +\STATE Print/Plot output. +\ENDIF +\end{algorithmic} +\normalsize + +{\bf Procedure:}{Get Analysis Options} +\small +\begin{algorithmic}[1] +\IF{Operating Point Analysis} +\STATE Analysis=Operating Point Analysis +\ENDIF +\IF{Transient Analysis} +\STATE Analysis=Transient Analysis +\STATE Get Start time, Stop time and Step size +\ENDIF +\IF{DC Analysis} +\STATE Analysis=DC Analysis +\STATE Get Start voltage, Stop voltage and Step size +\ENDIF +\STATE Get output variables for printing and plotting. +\STATE Find number of nodes in the circuit. +\end{algorithmic} + +{\bf Procedure:}{Build Modified Nodal Matrix (Stamp table approach)} +\small +\begin{algorithmic}[1] +\STATE $Size(A,b) \gets N-1+T$ +\FORALL {Edges} +\IF {Conductance} +\STATE A(Source,Source)+=conductance value +\STATE A(Source,Sink)-=conductance value +\STATE A(Sink,Source)-=conductance value +\ENDIF +\IF {Current Source} +\STATE b(Source)+= value +\STATE b(Sink)-= value +\ENDIF +\IF {Voltage Source} +\STATE A(Source,i*)=1; A(Sink,i*)=-1 +\STATE A(i*,Source)=1; A(i*,Sink)=-1 +\STATE b(i*)= value +\ENDIF +\IF {Voltage Controlled Current Source} +\STATE A(Source,CSource)+= value; A(Source,CSink)-= value +\STATE A(Sink,CSource)-= value; A(Sink,CSink)+= value +\ENDIF +\IF {Voltage controlled Voltage Source} +\STATE A(Source,i*)=1; A(Sink,i*)=-1 +\STATE A(i*,Source)=1; A(i*,Sink)=-1 +\STATE A(i*,CSource)=-value; A(i*,CSink)=value +\ENDIF +\IF {Current controlled Current Source} +\STATE A(Source,i*)=1; A(Sink,i*)=-1 +\STATE A(i*,i*)=1; A(i*,j*)=-value +\ENDIF +\IF {Current controlled Voltage Source} +\STATE A(Source,i*)=1; A(Sink,i*)=-1 +\STATE A(i*,Source)=1; A(i*,Sink)=-1 +\STATE A(i*,i*)=-value +\ENDIF +\ENDFOR +\end{algorithmic} +$N$=Number of Nodes.\newline +$T$=Number of devices whose device characteristic can not be expressed in terms of voltage. +\normalsize +\newline + +{\bf Procedure:}{Operating Point Analysis} +\small +\begin{algorithmic}[1] +\STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage. +\STATE Find branch voltage and node potentail. +\STATE Find branch current from branch voltage using device characteristics. +\IF{Non-linear component} +\STATE {\bf NR:} Check device characteristics of non-linear devices. +\IF {Device characteristics is not satisfied} +\STATE Call Newton Raphson procedure +\STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage. +\STATE Find branch current from branch voltage using device characteristics. +\STATE Go to {\bf NR} +\ENDIF +\STATE Check for KCL +\ENDIF +\end{algorithmic} +\normalsize + +{\bf Procedure}{Check for Device characteristics of Non-linear elements} +\small +\begin{algorithmic}[1] +\FORALL {Non-linear devices} +\STATE Compute actual current/voltage by its device characteristics. +\STATE Compare actual current/voltage with that of by anlysis. +\ENDFOR +\end{algorithmic} +\normalsize + +{\bf Procedure:}{Newton Raphson} +\small +\begin{algorithmic}[1] +\STATE Update the value of the linearized model of non-linear elements. +\STATE Update Modified Nodal matrix. +\end{algorithmic} +\normalsize + +{\bf Procedure:}{Transient Analysis} +\small +\begin{algorithmic}[1] +\STATE Discretize time dependent Component and Update Modified Nodal matrix. +\STATE Do Operating Point Analysis. +\end{algorithmic} +\normalsize + +{\bf Procedure:}{Discretization} +\small +\begin{algorithmic}[1] +\STATE Compute time dependent source value at time t. +\STATE Compute the values of static model of dynamic component at time t. +\STATE Update Modified Nodal matrix. +\end{algorithmic} +\normalsize + +{\bf Procedure:}{DC Analysis} +\small +\begin{algorithmic}[1] +\STATE Modify the value of the sweep source and update Modified Nodal matrix. +\STATE Do Operating Point Analysis. +\end{algorithmic} +\normalsize + +\chapter*{Examples} +In this chapter, some basic circuits and simulation results with minsim are presented. +\section*{RC Circuit} + +\end{document} diff --git a/FreeEDA/LPCSim/report/simulationReport.aux b/FreeEDA/LPCSim/report/simulationReport.aux new file mode 100644 index 0000000..c17061a --- /dev/null +++ b/FreeEDA/LPCSim/report/simulationReport.aux @@ -0,0 +1,3 @@ +\relax +\@writefile{lof}{\contentsline {figure}{\numberline {1}{\ignorespaces linearization of diode $D_1$\relax }}{2}} +\@writefile{lof}{\contentsline {figure}{\numberline {2}{\ignorespaces plot\relax }}{3}} diff --git a/FreeEDA/LPCSim/report/simulationReport.dvi b/FreeEDA/LPCSim/report/simulationReport.dvi new file mode 100644 index 0000000..c4ac162 Binary files /dev/null and b/FreeEDA/LPCSim/report/simulationReport.dvi differ diff --git a/FreeEDA/LPCSim/report/simulationReport.tex b/FreeEDA/LPCSim/report/simulationReport.tex new file mode 100644 index 0000000..2e06242 --- /dev/null +++ b/FreeEDA/LPCSim/report/simulationReport.tex @@ -0,0 +1,173 @@ +\documentclass[a4paper,10pt]{report} +\pagestyle{plain} +\usepackage{graphicx} +\usepackage{caption} +\usepackage{algorithmic} +% Title Page +\title{Half-Wave Rectifier} +\author{Generated by SMCSim} + +\begin{document} +\maketitle +\hrule\vspace{5mm} +\begin{center} {\bf Simulation of ckt/HWRectifierFilter.ckt} \end{center} +\hrule\vspace{5mm} + +{\bf Circuit Diagram:} \\ +\vspace{2mm} +\hrule\vspace{5mm} + +{\bf NetList:} \\ +{\it * Half-Wave Rectifier} \\ +V1 1 0 sine (5 50) \\ +D1 1 2 mymodel (1e-8 0.026) \\ +R1 2 0 10000 \\ +C1 2 0 10e-3 \\ +.tran 0 100 0.5 \\ +.plot v(1) v(2) \\ +.end +\vspace{2mm} +\hrule\vspace{5mm} + +{\bf System of Equations representing the electrical circuit:} +\vspace{2mm} +\begin{equation} + i_{V_1} + D_{1f}(v_1,v_2) = 0 +\end{equation} +\begin{equation} + (R_1)v_2 + (C_1)\frac{dv_2}{dt} + -D_{1f}(v_1,v_2) = 0 +\end{equation} +\begin{equation} + v_1 = V_1 +\end{equation} +\vspace{2mm} +$$ D_{nf}(v_a,v_b)=Is_n(1-e^{(v_a-v_b)/vt_n})$$ + where $Is_n$=reverse saturation current and $vt_n$=threshold voltage of diode $n$\\ +\hrule\vspace{5mm} + +{\bf Matrix form:}\\ +The system of equations $\mathbf{A}\mathbf{x}+\mathbf{D}_f(\mathbf{\widehat{x}})+\mathbf{C}(d\mathbf{x}/dt)=b$ (Symbolically)\\ +Where $\mathbf{A}$, $\mathbf{D}_f$ and $\mathbf{C}$ represent matrices corresponding to linear, + nonlinear and time dependent electrical elements respectively. + $\mathbf{b}$ represents the vector corresponding to sources. + +\begin{equation} +\mathbf{A}= +\left[ +\begin{array}{ccc} +0 &0 &1 \\ +0 &\widehat{R}_1 &0 \\ +1 &0 &0 +\end{array} +\right] +\end{equation} +\begin{equation} +\mathbf{b}= +\left[ +\begin{array}{c} +0 \\ +0 \\ +V_1 +\end{array} +\right] +\end{equation} +\begin{equation} +\mathbf{D}_f= +\left[ +\begin{array}{c} +D_{1f} \\ +-D_{1f} \\ +0 +\end{array} +\right] +\end{equation} +\begin{equation} +\mathbf{C}= +\left[ +\begin{array}{ccc} +0 &0 &0 \\ +0 &C_1 &0 \\ +0 &0 &0 +\end{array} +\right] +\end{equation} +\begin{equation} +\mathbf{x}= +\left[ +\begin{array}{c} +v_1 \\ +v_2 \\ +i_{V_1} +\end{array} +\right] +\end{equation} +\begin{equation} +\mathbf{\widehat{x}}= +\left[ +\begin{array}{c} +(v_1,v_2) +\end{array} +\right] +\end{equation} +Note that the matrix contains $\widehat{R}$ entries (corresponding to resistors) whose values are equal to 1/$R$\\ +\hrule\vspace{2mm} +The number of equations are $3$ \\ +Unknowns: \\ + Node potentials: $2$ Current Variables: $1$ \\ +\hrule\vspace{5mm} + +{\bf Operating Point (DC) Analysis: } \\ +{\it All capacitors are open circuited and inductors are short circuited.} +\vspace{2mm} + +{\bf System of Equations representing the electrical circuit:} +\begin{equation} + i_{V_1} + D_{1f}(v_1,v_2) = 0 +\end{equation} +\begin{equation} + (R_1)v_2 + -D_{1f}(v_1,v_2) = 0 +\end{equation} +\begin{equation} + v_1 = V_1 +\end{equation} +\vspace{2mm} +$$ D_{nf}(v_a,v_b)=Is_n(1-e^{(v_a-v_b)/vt_n})$$ + where $Is_n$=reverse saturation current and $vt_n$=threshold voltage of diode $n$\\ +\hrule\vspace{5mm} + +{\bf Application of Newton-Raphson method: }\\ +\vspace{2mm} +{\it Nonliner models: }\\ +See linearized model for diode $D_1$ in diode\_D1.eps +\begin{figure}[h] +\centering +\includegraphics{diode_D1.eps} +\caption{linearization of diode $D_1$} +\end{figure} +\vspace{2mm} + +{\bf System of Equations representing the electrical circuit:}\\ +\begin{equation} + (R_{D_1})v_1 + (-R_{D_1})v_2 + i_{V_1} = -i_{D_1} +\end{equation} +\begin{equation} + (R_{D_1})v_1 + (R_{D_1}+R_1)v_2 = i_{D_1} +\end{equation} +\begin{equation} + v_1 = V_1 +\end{equation} +\hrule\vspace{5mm} + +{\bf Transient Analysis:} \\ +\hrule\vspace{5mm} + +{\bf Results:} \\ +\begin{figure}[h] +\centering +\includegraphics[scale=0.5]{output.eps} +\caption{plot} +\end{figure} + + +\end{document} + diff --git a/FreeEDA/README.md b/FreeEDA/README.md new file mode 100644 index 0000000..e69de29 diff --git a/FreeEDA/analysisInserter/convertgui.py b/FreeEDA/analysisInserter/convertgui.py new file mode 100644 index 0000000..7e00a41 --- /dev/null +++ b/FreeEDA/analysisInserter/convertgui.py @@ -0,0 +1,392 @@ +#!/usr/bin/python +# convertgui.py is a python script to create analysis option for ngspice. It is developed for FreeEDA software. It is written by Saket Choudhary (saketkc@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# It is modified by Yogesh Dilip Save on 9th October 2012. + +import wx +import os,re +ID_ABOUT=101 +ID_OPEN=102 +ID_SAVE=103 +ID_BUTTON1=300 +ID_EXIT=200 + +# Some classes to use for the notebook pages. Obviously you would +# want to use something more meaningful for your application, these +# are just for illustration. + +def convertintoScientificForm(str): + if str[0]=='p': + return "e-12" + elif str[0]=='n' : + return "e-09" + elif str[0]=='u' : + return "e-06" + elif str[0]=='m' : + return "e-03" + else: + return "e-00" + +class PageOne(wx.Panel): + def __init__(self, parent): + wx.Panel.__init__(self, parent) + + grid1 = wx.GridSizer(5, 2) + grid1.Add(wx.StaticText(self,-1,'Enter Source Name:'),1) + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.source = wx.TextCtrl(self, -1, '', (150, 75), (120, -1)) + hbox.Add(self.source) + grid1.Add(hbox) + + grid1.Add(wx.StaticText(self,-1,'Start'),1) + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.start = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) + hbox.Add(self.start) + self.startscale = wx.ComboBox(self, -1, value = 'Volts or Amperes', choices=['mV or mA', 'uV or uA', 'nV or nA', 'pV or pA'], size=(160, -1), style=wx.CB_DROPDOWN) + hbox.Add(self.startscale) + grid1.Add(hbox) + + grid1.Add(wx.StaticText(self,-1,'Increment'),1) + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.step = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) + hbox.Add(self.step) + self.stepscale = wx.ComboBox(self, -1, value = 'Volts or Amperes', choices=['mV or mA', 'uV or uA', 'nV or nA', 'pV or pA'], size=(160, -1), style=wx.CB_DROPDOWN) + hbox.Add(self.stepscale) + grid1.Add(hbox) + + grid1.Add(wx.StaticText(self,-1,'Stop'),1) + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.stop = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) + hbox.Add(self.stop) + self.stopscale = wx.ComboBox(self, -1, value = 'Volts or Amperes', choices=['mV or mA', 'uV or uA', 'nV or nA', 'pV or pA'], size=(160, -1), style=wx.CB_DROPDOWN) + hbox.Add(self.stopscale) + grid1.Add(hbox) + + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.cb = wx.CheckBox(self, -1, 'Operating Point analysis', (10, 10)) + hbox.Add(self.cb) + grid1.Add(wx.StaticText(self,-1,''),1) + grid1.Add(hbox) + + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.button = wx.Button(self,901,"Add Simulation Data") + hbox.Add(self.button) + self.button.Bind(wx.EVT_BUTTON, self.enter_simulation) + grid1.Add(wx.StaticText(self,-1,''),1) + grid1.Add(hbox) + self.SetSizer(grid1) + self.Centre() + self.Show(True) + + def enter_simulation(self,e): + txtctrl = self.GetParent().GetParent().control + previous_data = txtctrl.GetValue() + start = str(self.start.GetValue()) +convertintoScientificForm(str(self.startscale.GetValue())) + stop = str(self.stop.GetValue()) +convertintoScientificForm(str(self.stopscale.GetValue())) + step = str(self.step.GetValue()) +convertintoScientificForm(str(self.stepscale.GetValue())) + source = str(self.source.GetValue()) + if self.cb.GetValue(): + appendline = ".op" + else: + appendline = ".dc " + " " + str(source)+" "+ str(start) + " " + str(stop) + " " + str(step) + "\n" + txtctrl.AppendText(appendline) + +class PageTwo(wx.Panel): + def __init__(self, parent): + wx.Panel.__init__(self, parent) + sizer = wx.StaticBoxSizer(wx.StaticBox(self, -1, 'Scale'), orient=wx.HORIZONTAL) + self.lin = wx.RadioButton(self, -1, 'Lin') + self.dec = wx.RadioButton(self, -1, 'Dec') + self.octal = wx.RadioButton(self, -1, 'Oct') + sizer.Add(self.lin) + sizer.Add(self.dec) + sizer.Add(self.octal) + grid1 = wx.GridSizer(5, 2) + grid1.Add(sizer,1) + grid1.Add(wx.StaticText(self,-1,'')) + grid1.Add(wx.StaticText(self,-1,'Start Frequency'),1) + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.start = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) + hbox.Add(self.start) + self.startscale = wx.ComboBox(self, -1, value = 'Hz', choices=['THz', 'GHz', 'Meg', 'KHz', 'Hz'], size=(60, -1), style=wx.CB_DROPDOWN) + hbox.Add(self.startscale) + grid1.Add(hbox) + grid1.Add(wx.StaticText(self,-1,'Stop Frequency'),1) + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.stop = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) + hbox.Add(self.stop) + self.stopscale = wx.ComboBox(self, -1, value = 'Hz', choices=['THz', 'GHz', 'Meg', 'KHz', 'Hz'], size=(60, -1), style=wx.CB_DROPDOWN) + hbox.Add(self.stopscale) + grid1.Add(hbox) + + grid1.Add(wx.StaticText(self,-1,'Number of points'),1) + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.datapoints = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) + hbox.Add(self.datapoints) + grid1.Add(hbox) + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.button = wx.Button(self,901,"Add Simulation Data") + hbox.Add(self.button) + self.button.Bind(wx.EVT_BUTTON, self.enter_simulation) + grid1.Add(wx.StaticText(self,-1,''),1) + grid1.Add(hbox) + self.SetSizer(grid1) + self.Centre() + self.Show(True) + def OnButton(self,e): + print self.lin.GetValue() + print self.GetParent().GetParent().control.GetValue() + def enter_simulation(self,e): + txtctrl = self.GetParent().GetParent().control + if self.lin.GetValue(): + ac_scale="lin" + elif self.dec.GetValue(): + ac_scale="dec" + elif self.octal.GetValue(): + ac_scale = "octal" + previous_data = txtctrl.GetValue() + #print previous_data + data_real = re.sub(r'.end.*',"",previous_data) + txtctrl.SetValue(data_real) + number_of_data_points = str(self.datapoints.GetValue()) + start_frequency = str(self.start.GetValue())+ str(self.startscale.GetValue()) + stop_frequency = str(self.stop.GetValue())+ str(self.stopscale.GetValue()) + appendline_ac = ".ac " + str(ac_scale) + " " + str(number_of_data_points)+" " + str(start_frequency) + " " + str(stop_frequency) + "\n" + #appendline_end = ".end\n" + #appendline_control=".control\n" + "run\n" + ".endc\n" + #with open(filename,"a") as myfile: + txtctrl.AppendText("\n") + txtctrl.AppendText(appendline_ac) + #txtctrl.AppendText("\n\n") + #txtctrl.AppendText(appendline_end) + #txtctrl.AppendText(appendline_control) + + +class PageThree(wx.Panel): + def __init__(self, parent): + wx.Panel.__init__(self, parent) + + grid1 = wx.GridSizer(5, 2) + grid1.Add(wx.StaticText(self,-1,'Start Time'),1) + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.start = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) + hbox.Add(self.start) + self.startscale = wx.ComboBox(self, -1, value = 'Sec', choices=['ms', 'us', 'ns', 'ps'], size=(60, -1), style=wx.CB_DROPDOWN) + hbox.Add(self.startscale) + + grid1.Add(hbox) + grid1.Add(wx.StaticText(self,-1,'Step Time'),1) + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.step = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) + hbox.Add(self.step) + self.stepscale = wx.ComboBox(self, -1, value = 'sec', choices=['ms', 'us', 'ns', 'ps'], size=(60, -1), style=wx.CB_DROPDOWN) + hbox.Add(self.stepscale) + + grid1.Add(hbox) + grid1.Add(wx.StaticText(self,-1,'Stop Time'),1) + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.stop = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) + hbox.Add(self.stop) + self.stopscale = wx.ComboBox(self, -1, value = 'sec', choices=['ms', 'us', 'ns', 'ps'], size=(60, -1), style=wx.CB_DROPDOWN) + hbox.Add(self.stopscale) + grid1.Add(hbox) + + hbox = wx.BoxSizer(wx.HORIZONTAL) + self.button = wx.Button(self,901,"Add Simulation Data") + hbox.Add(self.button) + self.button.Bind(wx.EVT_BUTTON, self.enter_simulation) + grid1.Add(wx.StaticText(self,-1,''),1) + grid1.Add(hbox) + self.SetSizer(grid1) + self.Centre() + self.Show(True) + + def enter_simulation(self,e): + txtctrl = self.GetParent().GetParent().control + + previous_data = txtctrl.GetValue() + #print previous_data +# data_real = re.sub(r'.end.*',"",previous_data) +# txtctrl.SetValue(data_real) + start_time = str(self.start.GetValue()) +convertintoScientificForm(str(self.startscale.GetValue())) + stop_time = str(self.stop.GetValue()) +convertintoScientificForm(str(self.stopscale.GetValue())) + step_time = str(self.step.GetValue()) +convertintoScientificForm(str(self.stepscale.GetValue())) + appendline_trans = ".tran " + " " + str(step_time) + " " + str(stop_time) + " " + str(start_time) + "\n" +# appendline_end = ".end\n" +# appendline_control=".control\n" + "run\n" + ".endc\n" + #with open(filename,"a") as myfile: +# txtctrl.AppendText("\n") + txtctrl.AppendText(appendline_trans) +# txtctrl.AppendText("\n\n") +# txtctrl.AppendText(appendline_end) +# txtctrl.AppendText(appendline_control) + + +class PageFour(wx.Panel): + def __init__(self, parent): + wx.Panel.__init__(self, parent) + t = wx.StaticText(self, -1, "Fourier", (60,60)) + + +class PageFive(wx.Panel): + def __init__(self, parent): + wx.Panel.__init__(self, parent) + t = wx.StaticText(self, -1, "Pole Zero", (60,60)) + + +class PageSix(wx.Panel): + def __init__(self, parent): + wx.Panel.__init__(self, parent) + t = wx.StaticText(self, -1, "Transfer Function", (60,60)) +class MainFrame(wx.Frame): + def __init__(self):#self,parent,wx.ID_ANY, title + wx.Frame.__init__(self,None, wx.ID_ANY, title="kicad ngspice") + self.CreateStatusBar(style=0) + self.control = wx.TextCtrl(self, 1, style=wx.TE_MULTILINE) + filemenu= wx.Menu() + # use ID_ for future easy reference - much better that "48", "404" etc + # The & character indicates the short cut key + filemenu.Append(ID_OPEN, "&Open"," Open a file to edit") + filemenu.AppendSeparator() + filemenu.Append(ID_SAVE, "&Save"," Save file") + filemenu.AppendSeparator() + filemenu.Append(ID_ABOUT, "&About"," Information about this program") + filemenu.AppendSeparator() + filemenu.Append(ID_EXIT,"E&xit"," Terminate the program") + + # Creating the menubar. + menuBar = wx.MenuBar() + menuBar.Append(filemenu,"&File") # Adding the "filemenu" to the MenuBar + self.SetMenuBar(menuBar) # Adding the MenuBar to the Frame content. + # Note - previous line stores the whole of the menu into the current object + + # Define the code to be run when a menu option is selected + wx.EVT_MENU(self, ID_ABOUT, self.OnAbout) + wx.EVT_MENU(self, ID_EXIT, self.OnExit) + wx.EVT_MENU(self, ID_OPEN, self.OnOpen) + wx.EVT_MENU(self, ID_SAVE, self.OnSave); # just "pass" in our demo + + self.aboutme = wx.MessageDialog( self, " Converter for kicad \n" + " in wxPython","Beta mode", wx.OK) + self.doiexit = wx.MessageDialog( self, " Exit - R U Sure? \n", + "GOING away ...", wx.YES_NO) + + # dirname is an APPLICATION variable that we're choosing to store + # in with the frame - it's the parent directory for any file we + # choose to edit in this frame + self.dirname = os.getcwd() + + #self.sizer2 = wx.BoxSizer(wx.HORIZONTAL) + #self.sizer=wx.BoxSizer(wx.VERTICAL) + #self.sizer.Add(self.control,1,wx.EXPAND) + #self.sizer.Add(self.sizer2,0,wx.EXPAND) + #self.SetSizer(self.sizer) + + # Here we create a panel and a notebook on the panel + p = wx.Panel(self) + nb = wx.Notebook(self) + + # create the page windows as children of the notebook + page1 = PageOne(nb) + page2 = PageTwo(nb) + page3 = PageThree(nb) + page4 = PageFour(nb) + page5 = PageFive(nb) + page6 = PageSix(nb) + + # add the pages to the notebook with the label to show on the tab + nb.AddPage(page1, "DC") + nb.AddPage(page2, "AC") + nb.AddPage(page3, "Transient") + nb.AddPage(page4, "Fourier") + nb.AddPage(page5, "Pole Zero") + nb.AddPage(page6, "Transfer Function") + + # finally, put the notebook in a sizer for the panel to manage + # the layout + sizer = wx.BoxSizer(wx.VERTICAL) + sizer.Add(nb, 1, wx.EXPAND) + sizer.Add(self.control,1,wx.EXPAND) + self.SetSizer(sizer) + + #wx.Frame.__init__(self,parent,wx.ID_ANY, title) + + # Add a text editor and a status bar + # Each of these is within the current instance + # so that we can refer to them later. + #self.SetAutoLayout(1) + #self.sizer.Fit(self) + + # Show it !!! + #self.Show(1) + self.Maximize() + + + def OnAbout(self,e): + # A modal show will lock out the other windows until it has + # been dealt with. Very useful in some programming tasks to + # ensure that things happen in an order that the programmer + # expects, but can be very frustrating to the user if it is + # used to excess! + self.aboutme.ShowModal() # Shows it + def OnExit(self,e): + # A modal with an "are you sure" check - we don't want to exit + # unless the user confirms the selection in this case ;-) + igot = self.doiexit.ShowModal() # Shows it + if igot == wx.ID_YES: + self.Close(True) # Closes out this simple application + + def OnOpen(self,e): + # In this case, the dialog is created within the method because + # the directory name, etc, may be changed during the running of the + # application. In theory, you could create one earlier, store it in + # your frame object and change it when it was called to reflect + # current parameters / values + dlg = wx.FileDialog(self, "Choose a file", self.dirname, "", "*.*", wx.OPEN) + if dlg.ShowModal() == wx.ID_OK: + self.filename=dlg.GetFilename() + self.dirname=dlg.GetDirectory() + + # Open the file, read the contents and set them into + # the text edit window + filehandle=open(os.path.join(self.dirname, self.filename),'r') + self.control.SetValue(filehandle.read()) + filehandle.close() + + # Report on name of latest file read + self.SetTitle("Editing ... "+self.filename) + # Later - could be enhanced to include a "changed" flag whenever + # the text is actually changed, could also be altered on "save" ... + dlg.Destroy() + + def OnSave(self,e): + # Save away the edited text + # Open the file, do an RU sure check for an overwrite! + dlg = wx.FileDialog(self, "Choose a file", self.dirname, "analysis", "*.*", \ + wx.SAVE | wx.OVERWRITE_PROMPT) + if dlg.ShowModal() == wx.ID_OK: + # Grab the content to be saved + itcontains = self.control.GetValue() + + # Open the file for write, write, close + self.filename=dlg.GetFilename() + self.dirname=dlg.GetDirectory() + filehandle=open(os.path.join(self.dirname, self.filename),'w') + filehandle.write(itcontains) + filehandle.close() + # Get rid of the dialog to keep things tidy + dlg.Destroy() + + + + +if __name__ == "__main__": + app = wx.App() + + MainFrame().Show(1) + #MainFrame().Maximize() + #MainFrame().Layout() + app.MainLoop() diff --git a/FreeEDA/copyProject.sh b/FreeEDA/copyProject.sh new file mode 100644 index 0000000..f392a6e --- /dev/null +++ b/FreeEDA/copyProject.sh @@ -0,0 +1,14 @@ +sourceProject=IC555AstableMultivibrator +targetProject=frequencyDivider +cp -r $sourceProject $targetProject +cd $targetProject +mv $sourceProject.bak $targetProject.bak +mv $sourceProject-cache.bak $targetProject-cache.bak +mv $sourceProject-cache.lib $targetProject-cache.lib +mv $sourceProject.cir $targetProject.cir +mv $sourceProject.cir.ckt $targetProject.cir.ckt +mv $sourceProject.cir.out $targetProject.cir.out +mv $sourceProject.pro $targetProject.pro +mv $sourceProject.proj $targetProject.proj +mv $sourceProject.sch $targetProject.sch + diff --git a/FreeEDA/forntEnd/freeeda.py b/FreeEDA/forntEnd/freeeda.py new file mode 100755 index 0000000..92349e9 --- /dev/null +++ b/FreeEDA/forntEnd/freeeda.py @@ -0,0 +1,184 @@ +#!/usr/bin/python +# freeeda.py is a python script to create fornt end for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from setPath import FreeEDA_HOME +from Tkinter import * +import ttk +import tkMessageBox +import tkFileDialog +import newProject +import openProject +import os +import Image +import ImageTk +import os +import sys +# T=os.popen("ls -l").read() +# text.insert(END, T) + +# Create a new model +def new_Project(e=None): + #text.insert(END,"Select the directory to save the project\n") + directory=tkFileDialog.askdirectory() + if directory: + try: + os.chdir(directory) + text.insert(END, "Changing directory to "+directory+"\n\n") + text.yview(END) + project= newProject.ProjectInfo(root,text) + except msg: + tkMessageBox.showerror("Change Directory Failed",msg) + else: + tkMessageBox.showwarning("Bad input","Directory is not specified, please try again") +# Create project files + try: + if project.status: + projectParam = newProject.ProjectParam(root,text,project.projectName) + except: + pass + +# Open an existing model +def open_Project(e=None): +# Read project information (name) + text.insert(END, "Please enter the project Name\n") + text.yview(END) + project= openProject.ProjectInfo(root,text) +# Open model file + if project.status: + projectParam = newProject.ProjectParam(root,text,project.projectName) + #text.insert(END, "In Main window:\n") + #text.insert(END, "Please select the proper option from File Menu\n") + +# Change the current directory to new directory +def changeDirectory(event=None): + folderName=tkFileDialog.askdirectory() + if folderName: + try: + os.chdir(folderName) + text.insert(END, "Changing directory to "+folderName+"\n\n") + text.yview(END) + open_Project() + except OSError, msg: + tkMessageBox.showerror("Change Directory Failed",msg) + else: + tkMessageBox.showwarning("Bad input","Directory is not specified, please try again") + +# Exit an model editor +def exit_Project(e=None): + if tkMessageBox.askokcancel("QUIT","Do you really wish to quit, this will close all FreeEDA projects that are running ?"): + text.insert(END, "Good Bye !!\n") + root.destroy() + +# Display help content +def help_Project(e=None): + pass + +# Display help content +def about_Project(): + tkMessageBox.showinfo("About FreeEDA","FreeEDA is a free & open source CAD tool for\ + Electronics & Electrical Engineers.\n \ + \nDeveloped by putting together open source soft like:\neeschema(kicad), \nPCB layout editor (kicad), \nNGSpice, \nScilab.\n\ + \nDeveloped at IIT Bombay by FOSSEE team") + +# Create and configure a graphical window +root = Tk() +root.title("FreeEDA") +"""img = PhotoImage(file="an.jpg") +root.tk.call('wm', 'iconphoto', root._w, img)""" + +# make it cover the entire screen +w, h = root.winfo_screenwidth(), root.winfo_screenheight() +root.geometry("%dx%d" % (0.15*w, 0.25*h)) +root.focus_set() +root.resizable(0,0) + +"""mainWindow = Frame(root) + +b1 = Button(mainWindow, text="New", width=18, command=new_Project) +b1.pack() +b2 = Button(mainWindow, text="Open", width=18, command=changeDirectory) +b2.pack() +b3 = Button(mainWindow, text="Exit", width=18, command=exit_Project) +b3.pack() + +mainWindow.pack()""" + +"""c = Canvas(root, bg='lightblue') +c.pack(side=LEFT) +c.place(relheight=0.99, relwidth=0.99, rely=0.0,relx=0.2) +im = Image.open(FreeEDA_HOME+"/images/logo.png") +tkim = ImageTk.PhotoImage(im) +c.create_image(75, 75, image=tkim)""" + +img = ImageTk.PhotoImage(Image.open(FreeEDA_HOME+"/images/logo.png")) +panel = Label(root, image = img) +panel.place(relheight=0.8,relwidth=0.8,rely=0.0,relx=0.1) +panel.pack() + +# Create and configure a menu +menu = Menu(root) +root.config(menu=menu) + +# Create File menu +filemenu= Menu(menu) +menu.add_cascade(label="Project", menu=filemenu) +filemenu.add_command(label="New F2", command=new_Project) +filemenu.add_command(label="Open F3", command=changeDirectory) +filemenu.add_separator() +filemenu.add_command(label="Exit F4", command=exit_Project) + +# Create help menu +helpmenu=Menu(menu) +menu.add_cascade(label="Help", menu=helpmenu) +helpmenu.add_command(label="Help F1",command=help_Project) +helpmenu.add_command(label="About...",command=about_Project) + +# Protocol for deletion of main window + + +# Create shortcut keys +root.bind("", new_Project) +root.bind("", changeDirectory) +root.bind("", exit_Project) +root.bind("", help_Project) + +"""mainWindow = LabelFrame(root, bd=4, relief=SUNKEN,text="Main Window", bg='lightblue') +mainWindow.pack(side=TOP,fill="both", padx=5, pady=5,expand="Y") +mainWindow.place(relheight=0.85, relwidth=0.99, rely=0.0) + +c = Canvas(mainWindow, bg='white',width=750, height=325) +c.pack() +im = Image.open(FreeEDA_HOME+"/images/FreeEDAlogo.jpeg") +tkim = ImageTk.PhotoImage(im) +c.create_image(375, 150, image=tkim)""" + +reportWindow = LabelFrame(root, bd=4, relief=SUNKEN,text="Report Window") +#reportWindow.pack(side=BOTTOM,fill="both", padx=5, pady=5,expand="Y") +#reportWindow.place(relheight=0.52, relwidth=0.98, rely=0.47) + +text = Text(reportWindow) +"""text.insert(INSERT, "Welcome !!\n") +text.insert(END, "New: Create a New Project\n") +text.insert(END, "Open: Open an Exising Project\n") +text.focus_set() +text.pack() +text.place(relheight=0.99, relwidth=0.99) +text.config(borderwidth=5) + +scrollY = Scrollbar(reportWindow,orient=VERTICAL,command=text.yview) +scrollY.pack(fill=Y) +scrollY.place(relheight=0.98,relwidth=0.01, rely=0.02, relx=0.99) +text.config(yscrollcommand=scrollY.set) +scrollY.set(0,0.5)""" + +root.protocol("WM_DELETE_WINDOW",exit_Project) + +def execute(event): + print "yogesh" + +#text.bind("",execute) +mainloop() diff --git a/FreeEDA/forntEnd/my_freeeda.py b/FreeEDA/forntEnd/my_freeeda.py new file mode 100755 index 0000000..655d559 --- /dev/null +++ b/FreeEDA/forntEnd/my_freeeda.py @@ -0,0 +1,301 @@ +from setPath import FreeEDA_HOME +from Tkinter import * +import thread +import ttk +import template +import tkMessageBox +import os.path +import os +import toolTip +import selectOption +from string import maketrans +from PIL import Image, ImageTk +import tkFileDialog +import os +import Image +import ImageTk + +def new_Project(e=None): + text.insert(END,"Select the directory to save the project\n") + directory=tkFileDialog.askdirectory() + if directory: + try: + os.chdir(directory) + text.insert(END, "Changing directory to "+directory+"\n\n") + text.yview(END) + except OSError, msg: + tkMessageBox.showerror("Change Directory Failed",msg) + else: + tkMessageBox.showwarning("Bad input","Directory is not specified, please try again") + text.insert(END, "In Main window:\n") + text.insert(END, "Please select the proper option from File Menu\n") + text.yview(END) + text.insert(END, "Please enter a project Name\n") + text.yview(END) +# Read project information (name) + project= newProject.ProjectInfo(root,text) +# Create project files + if project.status: + projectParam = newProject.ProjectParam(root,text,project.projectName) + +# Open an existing model +def open_Project(e=None): +# Read project information (name) + text.insert(END, "Please enter the project Name\n") + text.yview(END) + project= openProject.ProjectInfo(root,text) +# Open model file + if project.status: + projectParam = newProject.ProjectParam(root,text,project.projectName) + text.insert(END, "In Main window:\n") + text.insert(END, "Please select the proper option from File Menu\n") + +# Change the current directory to new directory +def changeDirectory(event=None): + folderName=tkFileDialog.askdirectory() + if folderName: + try: + os.chdir(folderName) + text.insert(END, "Changing directory to "+folderName+"\n\n") + text.yview(END) + open_Project() + except OSError, msg: + tkMessageBox.showerror("Change Directory Failed",msg) + else: + tkMessageBox.showwarning("Bad input","Directory is not specified, please try again") + text.insert(END, "In Main window:\n") + text.insert(END, "Please select the proper option from File Menu\n") + text.yview(END) + +def exit_Project(e=None): + if tkMessageBox.askokcancel("QUIT","Do you really wish to quit?"): + text.insert(END, "Bye Bye......\n") + root.destroy() + +# Display help content +def help_Project(e=None): + pass + +# Display help content +def about_Project(): + tkMessageBox.showinfo("About Editor","Created by Yogesh Dilip Save") + +def createButtonForCommand(frameName,commandName,imagePath,textlabel): + # Open images + im = Image.open(imagePath) + photo = ImageTk.PhotoImage(im) + + # Create button and set label for tools + w = Button(frameName, image=photo, width=20, height=14, command=commandName, default=ACTIVE) + w.image=photo + w.pack(side=TOP, padx=1, pady=1) + toolTip.createToolTip(w,textlabel) + +def call_system(command): + os.system(command) + +def openSchematic(e=None): + text.insert(END, " Opening schematic editor .........\n") + text.yview(END) + # Call all pending idle tasks, without processing any other events. + #update_idletasks() + command="eeschema "+self.projectName+".sch " + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + text.insert(END, "Select a tool from tool menu\n") + text.yview(END) + +def openFootprint(e=None): + text.insert(END, " Opening footprint editor .........\n") + text.yview(END) + # Call all pending idle tasks, without processing any other events. + update_idletasks() + command="cvpcb "+self.projectName+".net " + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + text.insert(END, "Select a tool from tool menu\n") + text.yview(END) + +def openLayout(e=None): + text.insert(END, " Opening layout editor .........\n") + text.yview(END) + # Call all pending idle tasks, without processing any other events. + update_idletasks() + command="pcbnew "+self.projectName+".net " + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + text.insert(END, "Select a tool from tool menu\n") + text.yview(END) + +def openNetConverter(e=None): + text.insert(END, " Running netlist converter .........\n") + text.yview(END) + # Call all pending idle tasks, without processing any other events. + update_idletasks() + command="xterm -e \""+self.FreeEDA_HOME+"/kicadtoNgspice/KicadtoNgspice.py "+self.projectName+".cir 1\"" + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + text.insert(END, "Select a tool from tool menu\n") + text.yview(END) + +def openAnalysisInserter(e=None): + text.insert(END, " Opening analysis inserter .........\n") + text.yview(END) + # Call all pending idle tasks, without processing any other events. + update_idletasks() + command=self.FreeEDA_HOME+"/analysisInserter/convertgui.py" + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + text.insert(END, "Select a tool from tool menu\n") + text.yview(END) + +def openModelBuilder(e=None): + text.insert(END, " Opening model editor .........\n") + text.yview(END) + # Call all pending idle tasks, without processing any other events. + update_idletasks() + command=self.FreeEDA_HOME+"/modelEditor/modelEditor.py " +self.projectName+".cir " + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + text.insert(END, "Select a tool from tool menu\n") + text.yview(END) + +def openSubcircuitBuilder(e=None): + text.insert(END, " Opening Sub-circuit editor ................\n") + text.yview(END) + # Call all pending idle tasks, without processing any other events. + update_idletasks() + command=self.FreeEDA_HOME+"/subcktEditor/subcktEditor.py " +self.projectName+".cir " + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + text.insert(END, "Select a tool from tool menu\n") + text.yview(END) + +def openNgspice(e=None): + text.insert(END, " Running ngspice circuit simulator .........\n") + text.yview(END) + # Call all pending idle tasks, without processing any other events. + update_idletasks() + command="xterm -e \"ngspice "+self.projectName+".cir.out \"" + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + text.insert(END, "Select a tool from tool menu\n") + text.yview(END) + +def openSMCSim(e=None): + text.insert(END, " Running scilab based circuit simulator .........\n") + text.yview(END) + # Call all pending idle tasks, without processing any other events. + update_idletasks() + Option=selectOption.SelectOption(self,self.text,"LPCSim") + command=self.FreeEDA_HOME+"/bin/scilab54 -f " +self.FreeEDA_HOME+"/LPCSim/LPCSim/Main.sci -args "+self.projectName+".cir.ckt " + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + text.insert(END, "Select a tool from tool menu\n") + text.yview(END) + + +# Create and configure a graphical window +root = Tk() +root.title("FreeEDA for Electronics and Electrical Engineers") + +# make it cover the entire screen +w, h = root.winfo_screenwidth(), root.winfo_screenheight() +root.geometry("%dx%d" % (0.65*w, 0.65*h)) +root.focus_set() + +# Create and configure a menu +menu = Menu(root) +root.config(menu=menu) + +# Create File menu +filemenu= Menu(menu) +menu.add_cascade(label="File", menu=filemenu) +filemenu.add_command(label="New F2", command=new_Project) +filemenu.add_command(label="Open F3", command=changeDirectory) +filemenu.add_separator() +filemenu.add_command(label="Exit F4", command=exit_Project) + +# Create help menu +helpmenu=Menu(menu) +menu.add_cascade(label="Help", menu=helpmenu) +helpmenu.add_command(label="Help F1",command=help_Project) +helpmenu.add_command(label="About...",command=about_Project) + +# Protocol for deletion of main window +root.protocol("WM_DELETE_WINDOW",exit_Project) + +# Create shortcut keys +root.bind("", new_Project) +root.bind("", open_Project) +root.bind("", exit_Project) +root.bind("", help_Project) +root.bind("", changeDirectory) + +mainWindow = LabelFrame(root, bd=4, relief=SUNKEN,text="Main Window", bg='lightblue') +mainWindow.pack(side=TOP,fill="both", padx=5, pady=5,expand="Y") +mainWindow.place(relheight=0.85, relwidth=0.99, rely=0.0) + +c = Canvas(mainWindow, bg='white',width=745, height=320) +c.pack() +im = Image.open(FreeEDA_HOME+"/images/FreeEDAlogo.jpeg") +tkim = ImageTk.PhotoImage(im) +c.create_image(375, 150, image=tkim) + +buttonWindow = Frame(root, bd=4, relief=SUNKEN) +buttonWindow.pack(side=RIGHT,fill="both", padx=2, pady=2,expand="Y") +buttonWindow.place(relheight=0.6, relwidth=0.06, rely=0.04, relx=0.01) + +createButtonForCommand(buttonWindow,openSchematic,FreeEDA_HOME+"/images/seLogo.jpg","Schematic Editor") +createButtonForCommand(buttonWindow,openFootprint,FreeEDA_HOME+"/images/feLogo.jpg","Footprint Editor") +createButtonForCommand(buttonWindow,openLayout,FreeEDA_HOME+"/images/leLogo.jpg","Layout Editor") +createButtonForCommand(buttonWindow,openAnalysisInserter,FreeEDA_HOME+"/images/anLogo.jpg","Analysis Insertor") +createButtonForCommand(buttonWindow,openModelBuilder,FreeEDA_HOME+"/images/mbLogo.jpg","Model builder") +createButtonForCommand(buttonWindow,openSubcircuitBuilder,FreeEDA_HOME+"/images/sbLogo.jpg","Subcircuit builder") +createButtonForCommand(buttonWindow,openNetConverter,FreeEDA_HOME+"/images/knLogo.jpg","NetList Converter") +createButtonForCommand(buttonWindow,openNgspice,FreeEDA_HOME+"/images/ngLogo.jpg","Ngspice") +createButtonForCommand(buttonWindow,openSMCSim,FreeEDA_HOME+"/images/slLogo.jpg","SMCSim") + +reportWindow = LabelFrame(root, bd=4, relief=SUNKEN,text="Report Window") +reportWindow.pack(side=BOTTOM,fill="both", padx=5, pady=5,expand="Y") +reportWindow.place(relheight=0.35, relwidth=0.99, rely=0.65) + +text = Text(reportWindow) +text.insert(INSERT, "Welcome.....\n") +text.insert(END, "First select project working directory using File Menu\n") +text.insert(END, "Then select the proper option in File Menu\n") +text.focus_set() +text.pack() +text.place(relheight=0.98, relwidth=0.99, rely=0.02) +text.config(borderwidth=5) + +scrollY = Scrollbar(reportWindow,orient=VERTICAL,command=text.yview) +scrollY.pack(fill=Y) +scrollY.place(relheight=0.98,relwidth=0.01, rely=0.02, relx=0.99) +text.config(yscrollcommand=scrollY.set) +scrollY.set(0,0.5) + + +def execute(event): + print "yogesh" + +text.bind("",execute) +mainloop() diff --git a/FreeEDA/forntEnd/newProject.py b/FreeEDA/forntEnd/newProject.py new file mode 100755 index 0000000..7ab27ec --- /dev/null +++ b/FreeEDA/forntEnd/newProject.py @@ -0,0 +1,362 @@ +#!/usr/bin/python +# newProject.py is a python script to create a new project. It is developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + +from setPath import FreeEDA_HOME +from Tkinter import * +import thread +import ttk +import sys +import subprocess, time +import template +import tkMessageBox +import os.path +import os +import toolTip +import selectOption +from string import maketrans +from PIL import Image, ImageTk + +class ProjectInfo(template.MyTemplate): + """ Class for accept model information from user """ + def body(self, master): + # Ask for project name + try: + Label(master, text="Enter Project name:").grid(row=0) + self.e1 = Entry(master) + self.e1.grid(row=0, column=1,pady=10,columnspan=2) + except: + print "error" +# Collect project information + def apply(self): + """ a method for writing project information to the file""" + self.text.insert(END, "Creating new project " + self.projectName+" ...... \n") + self.text.yview(END) + # Cerate directory for the project + try: + os.mkdir(self.projectName) + except: + tkMessageBox.showwarning("Error","Directory already exists") + self.text.insert(END, " The project directory "+self.projectName+"has been created.\n") + self.text.yview(END) + os.chdir(self.projectName) + self.text.insert(END, " Entered into the project directory "+self.projectName+"\n") + self.text.yview(END) + # Create model file for writing + try: + f = open(self.projectName+".proj","w") + except : + tkMessageBox.showwarning("Error","Project information file can not be wriiten. please check the file system permission") + return 0 + f.write("schematicFile " + self.projectName+".sch\n") + f.close() + self.text.insert(END, "Successfully Created new project " + self.projectName+". \n") + self.text.yview(END) + return 1 + +# Validate the model information + def validate(self): + # Remove trailing and leading spaces from modelName + self.projectName=self.e1.get().strip() + if len(self.projectName): + if os.path.exists(self.projectName+".proj"): + tkMessageBox.showwarning("Bad input","Project already exists, please try again") + return 0 + return 1 + else: + tkMessageBox.showwarning("Bad input","Project Name is not specified, please try again") + return 0 + +class ProjectParam(template.MyTemplate): + """Class for specifying parameter of the model""" + def __init__(self,parent,text,name): + # Collect model information + self.projectName=name + try: + self.FreeEDA_HOME=FreeEDA_HOME + except NameError: + try: + self.FreeEDA_HOME=os.environ["FreeEDA_HOME"] + except KeyError: + tkMessageBox.showerror("Error FreeEDA_HOME is not set","Please set FreeEDA_HOME variable in .bashrc\n\nStep to set FreeEDA_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export FreeEDA_HOME=\" to it.\n 3) source ~/.bashrc") + exit(0) + + # Call base class MyTemplate + template.MyTemplate.__init__(self,parent,text,name, buttonbox=False) + + def body(self, master): + w, h = master.winfo_screenwidth(), master.winfo_screenheight() + self.geometry("%dx%d" % (0.075*w, 0.6*h)) + self.resizable(0,0) + self.attributes("-topmost",True) + + # Create and configure a menu + """menu = Menu(self) + self.config(menu=menu) + + # Create File menu + toolmenu= Menu(menu) + menu.add_cascade(label="Tool", menu=toolmenu) + toolmenu.add_command(label="Schematic Editor F2", command=self.openSchematic) + toolmenu.add_separator() + toolmenu.add_command(label="Footprint Editor F3", command=self.openFootprint) + toolmenu.add_command(label="Layout Editor F4", command=self.openLayout) + toolmenu.add_separator() + toolmenu.add_command(label="Analysis Insertor F5", command=self.openAnalysisInserter) + toolmenu.add_command(label="Model builder F6", command=self.openModelBuilder) + toolmenu.add_command(label="Subcircuit builder F7", command=self.openSubcircuitBuilder) + toolmenu.add_separator() + toolmenu.add_command(label="NetList Converter F8", command=self.openNetConverter) + toolmenu.add_separator() + toolmenu.add_command(label="Ngspice F9", command=self.openNgspice) + toolmenu.add_command(label="SMCSim F10", command=self.openSMCSim) + toolmenu.add_separator() + toolmenu.add_command(label="Exit F11", command=self.exitProject) + + # Create help menu + helpmenu=Menu(menu) + menu.add_cascade(label="Help", menu=helpmenu) + helpmenu.add_command(label="Help F1",command=self.helpProject) + helpmenu.add_command(label="About...",command=self.aboutProjectManager) + + + + self.mainWindow = LabelFrame(self, bd=4, relief=SUNKEN,text="Tool Window",bg="lightblue") + self.mainWindow.pack(side=TOP,fill="both", padx=5, pady=5, expand="Y") + self.mainWindow.place(relheight=0.85, relwidth=0.99)""" + + # Set frame for command buttons + buttonWindow = Frame(self, bd=4, relief=SUNKEN) + buttonWindow.pack(side=LEFT,fill="both", padx=2, pady=2,expand="Y") + buttonWindow.place(relheight=0.95, relwidth=0.87, rely=0.02, relx=0.07) + + """buttonWindow1 = Frame(self, bd=4, relief=SUNKEN) + buttonWindow1.pack(side=TOP,fill="both", padx=2, pady=2,expand="Y") + buttonWindow1.place(relheight=0.9, relwidth=0.25, rely=0.02, relx=0.37) + + buttonWindow2 = Frame(self, bd=4, relief=SUNKEN) + buttonWindow2.pack(side=BOTTOM,fill="both", padx=2, pady=2,expand="Y") + buttonWindow2.place(relheight=0.9, relwidth=0.25, rely=0.02, relx=0.67)""" + + def createToolboxWithScilab(): + self.createButtonForCommandWithScilab(buttonWindow,self.openSchematic,self.FreeEDA_HOME+"/images/se.png","Schematic Editor") + self.createButtonForCommandWithScilab(buttonWindow,self.openAnalysisInserter,self.FreeEDA_HOME+"/images/an.png","Analysis Insertor") + self.createButtonForCommandWithScilab(buttonWindow,self.openNetConverter,self.FreeEDA_HOME+"/images/kn.png","NetList Converter") + self.createButtonForCommandWithScilab(buttonWindow,self.openNgspice,self.FreeEDA_HOME+"/images/ng.png","Ngspice") + self.createButtonForCommandWithScilab(buttonWindow,self.openFootprint,self.FreeEDA_HOME+"/images/fp.png","Footprint Editor") + self.createButtonForCommandWithScilab(buttonWindow,self.openLayout,self.FreeEDA_HOME+"/images/lout.png","Layout Editor") + self.createButtonForCommandWithScilab(buttonWindow,self.openSMCSim,self.FreeEDA_HOME+"/images/sci.png","SMCSim") + self.createButtonForCommandWithScilab(buttonWindow,self.openModelBuilder,self.FreeEDA_HOME+"/images/mb.png","Model builder") + self.createButtonForCommandWithScilab(buttonWindow,self.openSubcircuitBuilder,self.FreeEDA_HOME+"/images/sub.png","Subcircuit builder") + + def createToolboxWithoutScilab(): + self.createButtonForCommandWithoutScilab(buttonWindow,self.openSchematic,self.FreeEDA_HOME+"/images/se.png","Schematic Editor") + self.createButtonForCommandWithoutScilab(buttonWindow,self.openAnalysisInserter,self.FreeEDA_HOME+"/images/an.png","Analysis Insertor") + self.createButtonForCommandWithoutScilab(buttonWindow,self.openNetConverter,self.FreeEDA_HOME+"/images/kn.png","NetList Converter") + self.createButtonForCommandWithoutScilab(buttonWindow,self.openNgspice,self.FreeEDA_HOME+"/images/ng.png","Ngspice") + self.createButtonForCommandWithoutScilab(buttonWindow,self.openFootprint,self.FreeEDA_HOME+"/images/fp.png","Footprint Editor") + self.createButtonForCommandWithoutScilab(buttonWindow,self.openLayout,self.FreeEDA_HOME+"/images/lout.png","Layout Editor") + self.createButtonForCommandWithoutScilab(buttonWindow,self.openModelBuilder,self.FreeEDA_HOME+"/images/mb.png","Model builder") + self.createButtonForCommandWithoutScilab(buttonWindow,self.openSubcircuitBuilder,self.FreeEDA_HOME+"/images/sub.png","Subcircuit builder") + + if os.path.isfile(FreeEDA_HOME + "/bin/scilab54"): + createToolboxWithScilab() + else: + createToolboxWithoutScilab() + + # Protocol for deletion of main window + self.protocol("WM_DELETE_WINDOW",self.exitProject) + + # Create shortcut keys + """self.bind("", self.openSchematic) + self.bind("", self.openFootprint) + self.bind("", self.openLayout) + self.bind("", self.openAnalysisInserter) + self.bind("", self.openModelBuilder) + self.bind("", self.openSubcircuitBuilder) + self.bind("", self.openNetConverter) + self.bind("", self.openNgspice) + self.bind("",self.openSMCSim) + self.bind("",self.exitProject) + self.bind("", self.helpProject) + self.focus_set()""" + + def createButtonForCommandWithScilab(self,frameName,commandName,imagePath,textlabel): + # Open images + im = Image.open(imagePath) + photo = ImageTk.PhotoImage(im) + + # Create button and set label for tools + w = Button(frameName, image=photo, width=45, height=30, command=commandName, default=ACTIVE) + w.image=photo + w.pack(side=TOP, padx=1, pady=1) + toolTip.createToolTip(w,textlabel) + + def createButtonForCommandWithoutScilab(self,frameName,commandName,imagePath,textlabel): + # Open images + im = Image.open(imagePath) + photo = ImageTk.PhotoImage(im) + + # Create button and set label for tools + w = Button(frameName, image=photo, width=45, height=35, command=commandName, default=ACTIVE) + w.image=photo + w.pack(side=TOP, padx=1, pady=1) + toolTip.createToolTip(w,textlabel) + + def call_system(self,command): + os.system(command) + + def openSchematic(self,e=None): + self.text.insert(END, " Opening schematic editor .........\n") + self.text.yview(END) + # Call all pending idle tasks, without processing any other events. + self.update_idletasks() + command="eeschema "+self.projectName+".sch " + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + self.text.insert(END, "Select a tool from tool menu\n") + self.text.yview(END) + + def openFootprint(self,e=None): + self.text.insert(END, " Opening footprint editor .........\n") + self.text.yview(END) + # Call all pending idle tasks, without processing any other events. + self.update_idletasks() + command="cvpcb "+self.projectName+".net " + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + self.text.insert(END, "Select a tool from tool menu\n") + self.text.yview(END) + + def openLayout(self,e=None): + self.text.insert(END, " Opening layout editor .........\n") + self.text.yview(END) + # Call all pending idle tasks, without processing any other events. + self.update_idletasks() + command="pcbnew "+self.projectName+".net " + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + self.text.insert(END, "Select a tool from tool menu\n") + self.text.yview(END) + + def openNetConverter(self,e=None): + self.text.insert(END, " Running netlist converter .........\n") + self.text.yview(END) + # Call all pending idle tasks, without processing any other events. + self.update_idletasks() + command="xterm -e python "+self.FreeEDA_HOME+"/kicadtoNgspice/KicadtoNgspice.py "+self.projectName+".cir 1" + #command=self.FreeEDA_HOME+"/kicadtoNgspice/KicadtoNgspice.py "+self.projectName+".cir 1\"" + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + self.text.insert(END, "Select a tool from tool menu\n") + self.text.yview(END) + + def openAnalysisInserter(self,e=None): + self.text.insert(END, " Opening analysis inserter .........\n") + self.text.yview(END) + # Call all pending idle tasks, without processing any other events. + self.update_idletasks() + command=self.FreeEDA_HOME+"/analysisInserter/convertgui.py" + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + self.text.insert(END, "Select a tool from tool menu\n") + self.text.yview(END) + + def openModelBuilder(self,e=None): + self.text.insert(END, " Opening model editor .........\n") + self.text.yview(END) + # Call all pending idle tasks, without processing any other events. + self.update_idletasks() + #command="xterm -e \""+self.FreeEDA_HOME+"/modelEditor/modelEditor.py " +self.projectName+".cir 1\"" + command=self.FreeEDA_HOME+"/modelEditor/modelEditor.py "+self.projectName+".cir 1" + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + self.text.insert(END, "Select a tool from tool menu\n") + self.text.yview(END) + + def openSubcircuitBuilder(self,e=None): + self.text.insert(END, " Opening Sub-circuit editor ................\n") + self.text.yview(END) + # Call all pending idle tasks, without processing any other events. + self.update_idletasks() + command=self.FreeEDA_HOME+"/subcktEditor/subcktEditor.py " +self.projectName+".cir " + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + self.text.insert(END, "Select a tool from tool menu\n") + self.text.yview(END) + + def openNgspice(self,e=None): + self.text.insert(END, " Running ngspice circuit simulator .........\n") + self.text.yview(END) + # Call all pending idle tasks, without processing any other events. + self.update_idletasks() + command="xterm -e \"ngspice "+self.projectName+".cir.out \"" + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + self.text.insert(END, "Select a tool from tool menu\n") + self.text.yview(END) + + # opening pythonplotting: + command ="python " + self.FreeEDA_HOME+"/forntEnd/pythonPlotting.py "+os.getcwd()+" "+self.projectName + + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + + + + def openSMCSim(self,e=None): + self.text.insert(END, " Running scilab based circuit simulator .........\n") + self.text.yview(END) + # Call all pending idle tasks, without processing any other events. + self.update_idletasks() + Option=selectOption.SelectOption(self,self.text,"LPCSim") + command=self.FreeEDA_HOME+"/bin/scilab54 -f " +self.FreeEDA_HOME+"/LPCSim/LPCSim/Main.sci -args "+self.projectName+".cir.ckt " + try: + thread.start_new_thread(self.call_system,(command,)) + except Exception,err: + print err + self.text.insert(END, "Select a tool from tool menu\n") + self.text.yview(END) + + def helpProject(self,e=None): + pass + +# Display help content + def aboutProjectManager(self,e=None): + tkMessageBox.showinfo("About Project Manager","Created by Yogesh Dilip Save") + +# Exit an Project Manager + def exitProject(self): + if tkMessageBox.askokcancel("QUIT","Do you really wish to quit?"): + self.destroy() + + def apply(self): + pass + +if __name__=='__main__': + root = Tk() + project= ProjectInfo(root) + projectParam = ProjectParam(root,project.modelName,project.modelType) + mainloop() diff --git a/FreeEDA/forntEnd/openProject.py b/FreeEDA/forntEnd/openProject.py new file mode 100755 index 0000000..41a2e6f --- /dev/null +++ b/FreeEDA/forntEnd/openProject.py @@ -0,0 +1,57 @@ +#!/usr/bin/python +# openProject.py is a python script to open an existing project. It is developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from Tkinter import * +import template +import tkMessageBox +import os.path +from string import maketrans + +class ProjectInfo(template.MyTemplate): + """ Class for accept model information from user """ + def body(self, master): + # Ask for compoent name + Label(master, text="Enter Project name:").grid(row=0) + self.e1 = Entry(master) + self.e1.grid(row=0, column=1,pady=10,columnspan=2) + tempStr=os.getcwd() + tempStr2=tempStr.split('/') + self.e1.insert(0,tempStr2[len(tempStr2)-1]) + +# Collect project information + def apply(self): + """ a method for writing project information to the file""" + self.text.insert(END, "Successfully opened project " + self.projectName+". \n") + self.text.yview(END) + pass + +# Validate the model information + def validate(self): + # Remove trailing and leading spaces from modelName + self.projectName=self.e1.get().strip() + if len(self.projectName): + self.text.insert(END, "Opening project " + self.projectName+" ...... \n") + self.text.yview(END) + # Read project file + try: + self.text.insert(END, " Checking project information file " + self.projectName+".proj. ...... \n") + self.text.yview(END) + f = open(self.projectName+".proj","r") + except : + tkMessageBox.showwarning("Error","Project information file does not exist, Try again") + return 0 + f.close() + return 1 + else: + tkMessageBox.showwarning("Bad input","Project Name is not specified, please try again") + return 0 + +if __name__=='__main__': + root=Tk() + project= ProjectInfo(root) + mainloop() + diff --git a/FreeEDA/forntEnd/pythonPlotting.py b/FreeEDA/forntEnd/pythonPlotting.py new file mode 100755 index 0000000..3564aab --- /dev/null +++ b/FreeEDA/forntEnd/pythonPlotting.py @@ -0,0 +1,696 @@ +from __future__ import division # Used for decimal division eg 2/3=0.66 and not '0' 6/2=3.0 and 6//2=3 +import sys, os +from PyQt4.QtCore import * +from PyQt4.QtGui import * +from PyQt4 import QtGui, uic +from PyQt4 import QtCore +from decimal import * +import matplotlib +from matplotlib.backends.backend_qt4agg import FigureCanvasQTAgg as FigureCanvas +from matplotlib.backends.backend_qt4agg import NavigationToolbar2QTAgg as NavigationToolbar +from matplotlib.figure import Figure +import tkMessageBox + + +class File_data: + def __init__(self,parent=None): + + self.data=[] #consists of all the columns of data belonging to nodes and branches + self.y=[] #stores y-axis data + self.x=[] #stores x-axis data + +#new function for finding no of points to be plotted: + + def numberFinder(self,fpath): + + with open (fpath+"/analysis") as f3: + info = f3.read() + + info = info.split(" ") + #info[0] = info[0][-3:] + #print info + + with open (fpath+"/plot_data_v.txt") as f2: + ilines = f2.read() + + p = l = vnumber = inumber = 0 + ilines = ilines.split("\n") + + for i in ilines[3:]: + if "V(" in i or "x1" in i or "u3" in i: #it has possible names of voltage nodes in ngspice + vnumber+=1 + #print "vno:",vnumber + + # for finding no of branches: + + with open (fpath+"/plot_data_i.txt") as f2: + current = f2.read() + + + current = current.split("\n") + + for i in current[3:]: + if "#branch" in i: + inumber+=1 + #print "current no:",inumber + + dec = 0 + + # For AC: + if info[0][-3:]==".ac": + + if "dec" in info: + dec = 1 + + for i in ilines[3:]: + p+=1 #'p' gives no. of lines of data for each node/branch + if "Index" in i: + l+=1 # 'l' gives the no of partitions for a single voltage node + #print "l:",l + if "AC" in i: #DC for dc files and AC for ac ones + break + analysis_type = 0 + + elif ".tran" in info: + analysis_type = 1 + for i in ilines[3:]: + p+=1 + if "Index" in i: + l+=1 # 'l' gives the no of partitions for a single voltage node + #print "l:",l + if "Transient" in i: #DC for dc files and AC for ac ones + break + + + # For DC: + else: + for i in ilines[3:]: + p+=1 + if "Index" in i: + l+=1 # 'l' gives the no of partitions for a single voltage node + #print "l:",l + if "DC" in i: #DC for dc files and AC for ac ones + break + analysis_type = 2 + + + #if ac!=1: + vnumber = vnumber//l #vnumber gives the no of voltage nodes + inumber = inumber//l #inumber gives the no of branches + #print "i'm p:",p + p=[p,vnumber,analysis_type,dec,inumber] + #print p + return p + + def openFile(self,fpath): + + # For Current: + + try: + with open (fpath+"/plot_data_i.txt") as f2: #Checking whether the files Plot_data_i.txt + I = f2.read() # and plot_data_v.txt are present or not + + I = I.split("\n") + self.butnamesi = [] + + with open (fpath+"/plot_data_v.txt") as f1: + idata = f1.read() + + except: + tkMessageBox.showinfo("Warning!!", "Click on KI->Ng button before simulation ") + exit(1) + try: + for l in I[3].split(" "): + if len(l)>0: + self.butnamesi.append(l) + self.butnamesi=self.butnamesi[2:] + len_bnamesi = len(self.butnamesi) + #print "length_new",len_bnamesi + #print self.butnamesi + except: + tkMessageBox.showinfo("Warning!!", "Error in Analysis File") + + d = self.numberFinder(fpath) + d1 = int(d[0] + 1) + #print "I'm D1:", d1 #for debugging + d2 = int(d[1]) + d3 = d[2] + d4 = d[4] + #print "I'm D4:", d4 #for debugging + dec = [d3,d[3]] + #print "No. of Nodes:", d2 + self.butnames=[] + idata=idata.split("\n") + for l in idata[3].split(" "): + if len(l)>0: + self.butnames.append(l) + self.butnames=self.butnames[2:] + len_bnames = len(self.butnames) + #print len_bnames + #print self.butnames + + ivals=[] + inum = len(idata[5].split("\t")) + inum_i = len(I[5].split("\t")) + #print inum + + full_data = [] + + # Creating list of data: + if d3 < 3 : + + for i in range(1,d2): + + for l in idata[3+i*d1].split(" "): + if len(l)>0: + self.butnames.append(l) + self.butnames.pop(len_bnames) + self.butnames.pop(len_bnames) + len_bnames = len(self.butnames) + #print "volts:",self.butnames + + for n in range(1,d4): + + for l in I[3+n*d1].split(" "): + if len(l)>0: + self.butnamesi.append(l) + #print "names:",self.butnamesi + self.butnamesi.pop(len_bnamesi) + self.butnamesi.pop(len_bnamesi) + len_bnamesi = len(self.butnamesi) + #print "current",self.butnamesi + + p=0 + k = 0 + m=0 + + for i in I[5:d1-1]: + + #print "hello:" + + if len(i.split("\t"))==inum_i: + j2=i.split("\t") + #print j2 + j2.pop(0) + j2.pop(0) + j2.pop() + if d3 == 0: #not in trans + j2.pop() + #print j2 + + for l in range(1,d4): + j3 = I[5+l*d1+k].split("\t") + j3.pop(0) + j3.pop(0) + if d3==0: + j3.pop() #not required for dc + j3.pop() + j2 = j2 + j3 + #print j2 + full_data.append(j2) + k+=1 + #print full_data + + + for i in idata[5:d1-1]: + + if len(i.split("\t"))==inum: + j=i.split("\t") + j.pop() + if d3==0: + j.pop() + + for l in range(1,d2): + j1 = idata[5+l*d1+p].split("\t") + j1.pop(0) + j1.pop(0) + if d3==0: + j1.pop() #not required for dc + if self.butnames[len(self.butnames)-1] == 'v-sweep': + self.butnames.pop() + j1.pop() + #if l==d2-1 and d3==2: + #j1.pop() + j1.pop() + j = j + j1 + #self.volts_length = len(j)-2 + j = j + full_data[m] + #print j + m+=1 + #print j[:20] + j = "\t".join(j[1:]) + j = j.replace(",","") + ivals.append(j) + + p+=1 + + self.data = ivals + #print self.data + + #print "volts:",self.butnames + self.volts_length = len(self.butnames) + #print "volts_length:",self.volts_length + self.butnames = self.butnames + self.butnamesi + #print "new butnames:",self.butnames + + #print self.data + return dec + + + def numVals(self): + a = self.volts_length # No of voltage nodes + b = len(self.data[0].split("\t")) + #print "numvals:",b + return [b,a] + + def computeAxes(self): + nums = len(self.data[0].split("\t")) + #print "i'm nums:",nums + self.y=[] + var=self.data[0].split("\t") + for i in range(1,nums): + self.y.append([Decimal(var[i])]) + #print self.y + #print y,nums + for i in self.data[1:]: + temp=i.split("\t") + for j in range(1,nums): + self.y[j-1].append(Decimal(temp[j])) + #print len(self.y) + #print self.y[3] + + for i in self.data: + temp=i.split("\t") + self.x.append(Decimal(temp[0])) + + +class Window(QMainWindow): + def __init__(self,fpath,projName, parent=None): + super(Window, self).__init__(parent) + #self.setWindowTitle('AC Analysis') + self.fpath=fpath + self.projName=projName + self.createMainFrame() + self.combo = [] + self.combo1 = [] + self.combo1_rev = [] + + def createMainFrame(self): + + self.main_frame = QWidget() + self.dpi = 100 + self.fig = Figure((7.0, 7.0), dpi=self.dpi) + self.canvas = FigureCanvas(self.fig) + self.canvas.setParent(self.main_frame) + self.axes = self.fig.add_subplot(111) + self.mpl_toolbar = NavigationToolbar(self.canvas, self.main_frame) + + left_vbox = QVBoxLayout() + left_vbox.addWidget(self.mpl_toolbar) + left_vbox.addWidget(self.canvas) + + right_vbox = QVBoxLayout() + right_grid = QGridLayout() + top_grid = QGridLayout() + + self.fobj = File_data() + plot_type = self.fobj.openFile(self.fpath) + #print "hi:",plot_type + self.fobj.computeAxes() + self.chkbox=[] + self.a = self.fobj.numVals() + + ########### Generating list of colours : + self.full_colors = ['r','b','g','y','c','m','k']#,(0.4,0.5,0.2),(0.1,0.4,0.9),(0.4,0.9,0.2),(0.9,0.4,0.9)] + self.color = [] + for i in range(0,self.a[0]-1): + if i%7 == 0: + self.color.append(self.full_colors[0]) + elif (i-1)%7 == 0: + self.color.append(self.full_colors[1]) + elif (i-2)%7 == 0: + self.color.append(self.full_colors[2]) + elif (i-3)%7 == 0: + self.color.append(self.full_colors[3]) + elif (i-4)%7 == 0: + self.color.append(self.full_colors[4]) + elif (i-5)%7 == 0: + self.color.append(self.full_colors[5]) + elif (i-6)%7 == 0: + self.color.append(self.full_colors[6]) + + ########### + + self.volts_length = self.a[1] + #print "I'm Volts length:",self.volts_length + self.heading1 = QLabel() + top_grid.addWidget(self.heading1,1,0) + self.heading2 = QLabel() + top_grid.addWidget(self.heading2,self.a[1]+2,0) + for i in range(0,self.a[1]):#a[0]-1 + self.chkbox.append(QCheckBox(self.fobj.butnames[i])) + self.chkbox[i].setToolTip('Tick Me!' ) + top_grid.addWidget(self.chkbox[i],i+2,0) + + for i in range(self.a[1],self.a[0]-1):#a[0]-1 + self.chkbox.append(QCheckBox(self.fobj.butnames[i])) + self.chkbox[i].setToolTip('Tick Me!' ) + top_grid.addWidget(self.chkbox[i],i+3,0) + + self.clear = QPushButton("Clear") + self.Note = QLabel() + self.Note1 = QLabel() + self.Note2 = QLabel() + + self.btn = QPushButton("Plot") + self.btn.setToolTip('Press to Plot' ) + self.text = QLineEdit() + self.funcLabel = QLabel() + self.palette1 = QPalette() + self.palette2 = QPalette() + self.btn1 = QPushButton("Plot Function") + self.btn1.setToolTip('Press to Plot the function' ) + + self.palette1.setColor(QtGui.QPalette.Foreground,QtCore.Qt.blue) + self.palette2.setColor(QtGui.QPalette.Foreground,QtCore.Qt.red) + self.Note1.setPalette(self.palette1) + self.Note2.setPalette(self.palette2) + + right_vbox.addLayout(top_grid) + right_vbox.addWidget(self.btn) + + right_grid.addWidget(self.funcLabel,1,0) + right_grid.addWidget(self.text,1,1) + right_grid.addWidget(self.btn1,2,1) + right_grid.addWidget(self.clear,2,0) + right_grid.addWidget(self.Note,3,0) + right_grid.addWidget(self.Note1,4,0) + right_grid.addWidget(self.Note2,4,1) + + right_vbox.addLayout(right_grid) + + netlist = QTextEdit() + with open (self.fpath+"/"+self.projName+'.cir.out') as f2: + fdata = f2.read() + netlist.setText(fdata) + netlist.setReadOnly(True) + + '''down_box = QHBoxLayout() + down_box.addWidget(netlist) + + left_vbox.addLayout(down_box)''' + left_vbox.addWidget(netlist) + + hbox = QHBoxLayout() + hbox.addLayout(left_vbox) + hbox.addLayout(right_vbox) + + '''finalvbox = QVBoxLayout() + finalvbox.addLayout(hbox)''' + + widget = QWidget() + widget.setLayout(hbox)#finalvbox + self.scrollArea = QScrollArea() + self.scrollArea.setWidgetResizable(True) + self.scrollArea.setWidget(widget) + + finalhbox = QHBoxLayout() + finalhbox.addWidget(self.scrollArea) + + self.main_frame.setLayout(finalhbox) + + self.showMaximized() + + self.heading1.setText("List of Nodes:") + + self.heading2.setText("List of Branches:") + + self.funcLabel.setText("Function:") + + self.Note1.setText("Examples:\ +

Addition:
Subtraction:
Multiplication:
Division:
Comparison:") + + self.Note2.setText("\n\n"+self.fobj.butnames[0]+" + "+self.fobj.butnames[1]+"\n"+self.fobj.butnames[0]+" - "+self.fobj.butnames[1]+ \ + "\n"+self.fobj.butnames[0]+" * "+self.fobj.butnames[1]+"\n"+self.fobj.butnames[0]+" / "+self.fobj.butnames[1]+ \ + "\n"+self.fobj.butnames[0]+" vs "+self.fobj.butnames[1]) + + + self.connect(self.clear,SIGNAL('clicked()'),self.pushedClear) + + self.connect(self.btn1,SIGNAL('clicked()'), self.pushedPlotFunc) + + if plot_type[0]==0: + + self.setWindowTitle('AC Analysis') + if plot_type[1]==1: + + self.connect(self.btn, SIGNAL('clicked()'), self.onPush_decade) + + else: + + self.connect(self.btn, SIGNAL('clicked()'), self.onPush_ac) + + elif plot_type[0]==1: + + self.setWindowTitle('Transient Analysis') + self.connect(self.btn, SIGNAL('clicked()'), self.onPush_trans) + + else: + + self.setWindowTitle('DC Analysis') + self.connect(self.btn, SIGNAL('clicked()'), self.onPush_dc) + + self.setCentralWidget(self.main_frame) + + + def pushedPlotFunc(self): + + self.parts = str(self.text.text()) + self.parts = self.parts.split(" ") + #print self.parts + if self.parts[len(self.parts)-1] == '': + self.parts = self.parts[0:-1] + #print self.parts + self.values = self.parts + self.comboAll = [] + self.axes.cla() + plot_type2 = self.fobj.openFile(self.fpath) + + if len(self.parts) <= 2: + self.Note.setText("Too few arguments!\nRefer syntax below!") + QMessageBox.about(self, "Warning!!", "Too Few Arguments/SYNTAX Error!\n Refer Examples") + else: + self.Note.setText("") + + a = [] + finalResult = [] + p = 0 + #print "values:",self.values + #print "parts:",self.parts + + for i in range(len(self.parts)): + #print "hello" + if i%2 == 0: + #print "I'm in:" + for j in range(len(self.fobj.butnames)): + if self.parts[i]==self.fobj.butnames[j]: + #print "I got you:",i + a.append(j) + + #print "positions",a + + if len(a) != len(self.parts)//2 + 1: + QMessageBox.about(self, "Warning!!", "One of the operands doesn't belong to the above list!!") + + for i in a: + self.comboAll.append(self.fobj.y[i]) + + #print self.comboAll + + for i in range(len(a)): + + if a[i] == len(self.fobj.butnames): + QMessageBox.about(self, "Warning!!", "One of the operands doesn't belong to the above list!!") + self.Note.setText("To Err Is Human!
One of the operands doesn't belong to the above list!!") + + if self.parts[1] == 'vs': + + if len(self.parts) > 3: + self.Note.setText("Enter two operands only!!") + QMessageBox.about(self, "Warning!!", "Recheck the expression syntax!") + + else: + self.axes.cla() + #print "plotting wait" + for i in range(len(self.fobj.y[a[0]])): + self.combo.append(self.fobj.y[a[0]][i]) + self.combo1.append(self.fobj.y[a[1]][i]) + + '''for i in reversed(self.combo1): + self.combo1_rev.append(i)''' + #print self.combo + #print "\ncombo1_rev\n",self.combo1_rev + self.axes.plot(self.combo,self.combo1,c=self.color[1],label=str(2))#_rev + if max(a) < self.volts_length: + self.axes.set_ylabel('Voltage(V)-->') + self.axes.set_xlabel('Voltage(V)-->') + else: + self.axes.set_ylabel('Current(I)-->') + self.axes.set_ylabel('Current(I)-->') + + + elif max(a) >= self.volts_length and min(a) < self.volts_length: + QMessageBox.about(self, "Warning!!", "Do not combine Voltage and Current!!") + + else: + + for j in range(len(self.comboAll[0])): + for i in range(len(self.values)): + if i%2==0: + self.values[i] = str(self.comboAll[i//2][j]) + re = " ".join(self.values[:]) + #print re + try: + finalResult.append(eval(re)) + except ArithmeticError: + QMessageBox.about(self, "Warning!!", "Dividing by zero!!") + ############################################ + if plot_type2[0]==0: + + self.setWindowTitle('AC Analysis') + if plot_type2[1]==1: + + self.axes.semilogx(self.fobj.x,finalResult,c=self.color[0],label=str(1)) + + else: + + self.axes.plot(self.fobj.x,finalResult,c=self.color[0],label=str(1)) + self.axes.set_xlabel('freq-->') + if max(a) < self.volts_length: + self.axes.set_ylabel('Voltage(V)-->') + else: + self.axes.set_ylabel('Current(I)-->') + + + elif plot_type2[0]==1: + + self.setWindowTitle('Transient Analysis') + self.axes.plot(self.fobj.x,finalResult,c=self.color[0],label=str(1)) + self.axes.set_xlabel('time-->') + if max(a) < self.volts_length: + self.axes.set_ylabel('Voltage(V)-->') + else: + self.axes.set_ylabel('Current(I)-->') + + + else: + + self.setWindowTitle('DC Analysis') + self.axes.plot(self.fobj.x,finalResult,c=self.color[0],label=str(1)) + self.axes.set_xlabel('I/P Voltage-->') + if max(a) < self.volts_length: + self.axes.set_ylabel('Voltage(V)-->') + else: + self.axes.set_ylabel('Current(I)-->') + + ########################################## + + #self.axes.plot(self.fobj.x,finalResult,c=self.color[0],label=str(1)) + + + self.axes.grid(True) + self.canvas.draw() + self.combo = [] + self.combo1 = [] + self.combo1_rev = [] + #print "succes:",self.parts + + def pushedClear(self): + + self.text.clear() + self.axes.cla() + self.canvas.draw() + QtCore.SLOT('quit()') + + def onPush_ac(self): + self.axes.cla() + boxCheck = 0 + for i,j in zip(self.chkbox,range(len(self.chkbox))): + if i.isChecked(): + boxCheck += 1 + self.axes.plot(self.fobj.x,self.fobj.y[j],c=self.color[j],label=str(j+1)) + self.axes.set_xlabel('freq-->') + if j < self.volts_length: + self.axes.set_ylabel('Voltage(V)-->') + else: + self.axes.set_ylabel('Current(I)-->') + self.axes.grid(True) + if boxCheck == 0: + QMessageBox.about(self, "Warning!!","Please select atleast one Node OR Branch") + self.canvas.draw() + + + def onPush_decade(self): + boxCheck = 0 + self.axes.cla() + + for i,j in zip(self.chkbox,range(len(self.chkbox))): + if i.isChecked(): + boxCheck += 1 + self.axes.semilogx(self.fobj.x,self.fobj.y[j],c=self.color[j],label=str(j+1)) + if j < self.volts_length: + self.axes.set_ylabel('Voltage(V)-->') + else: + self.axes.set_ylabel('Current(I)-->') + self.axes.set_xlabel('freq-->') + self.axes.grid(True) + if boxCheck == 0: + QMessageBox.about(self, "Warning!!","Please select atleast one Node OR Branch") + self.canvas.draw() + + def onPush_trans(self): + boxCheck = 0 + self.axes.cla() + for i,j in zip(self.chkbox,range(len(self.chkbox))): + if i.isChecked(): + boxCheck += 1 + #print self.fobj.y[j] + self.axes.plot(self.fobj.x,self.fobj.y[j],c=self.color[j],label=str(j+1)) + self.axes.set_xlabel('time-->') + + if j < self.volts_length: + self.axes.set_ylabel('Voltage(V)-->') + + else: + self.axes.set_ylabel('Current(I)-->') + self.axes.grid(True) + if boxCheck == 0: + QMessageBox.about(self,"Warning!!", "Please select atleast one Node OR Branch") + self.canvas.draw() + + def onPush_dc(self): + boxCheck = 0 + self.axes.cla() + for i,j in zip(self.chkbox,range(len(self.chkbox))): + if i.isChecked(): + boxCheck += 1 + self.axes.plot(self.fobj.x,self.fobj.y[j],c=self.color[j],label=str(j+1)) + self.axes.set_xlabel('Voltage Sweep(V)-->') + + if j < self.volts_length: + self.axes.set_ylabel('Voltage(V)-->') + else: + self.axes.set_ylabel('Current(I)-->') + self.axes.grid(True) + if boxCheck == 0: + QMessageBox.about(self,"Warning!!", "Please select atleast one Node OR Branch") + self.canvas.draw() + +if __name__=="__main__": + app = QtGui.QApplication(sys.argv) + fpath = sys.argv[1] + projName = sys.argv[2] + global main + main = Window(fpath,projName) + main.show() + sys.exit(app.exec_()) diff --git a/FreeEDA/forntEnd/selectOption.py b/FreeEDA/forntEnd/selectOption.py new file mode 100755 index 0000000..d381fc3 --- /dev/null +++ b/FreeEDA/forntEnd/selectOption.py @@ -0,0 +1,55 @@ +#!/usr/bin/python +# selectOption.py is a python script to select option for Scilab based circuit simulator. It is developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from setPath import FreeEDA_HOME +from Tkinter import * +import template +import tkMessageBox +import os.path +from string import maketrans + +class SelectOption(template.MyTemplate): + """ Class for accept model information from user """ + def body(self, master): + # Define default mode type and set it to symbolic + self.option = StringVar() + self.option.set("1") + + # Ask for scilab option + Label(master, text="Enter mode for scilab based circuit simulator:").grid(row=1) + Radiobutton(master, text="Normal", variable=self.option, value="0").grid(row=2,column=0,columnspan=2,sticky=W) + Radiobutton(master, text="Symbolic", variable=self.option, value="1").grid(row=3,column=0,columnspan=2,sticky=W) + Radiobutton(master, text="Matrix", variable=self.option, value="2").grid(row=4,column=0,columnspan=2,sticky=W) + +# Collect model information + def apply(self): + self.mode=self.option.get() + try: + self.FreeEDA_HOME=FreeEDA_HOME + except NameError: + try: + self.FreeEDA_HOME=os.environ["FreeEDA_HOME"] + except KeyError: + tkMessageBox.showerror("Error FreeEDA_HOME is not set","Please set FreeEDA_HOME variable in .bashrc\n\nStep to set FreeEDA_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export FreeEDA_HOME=\" to it.\n 3) source ~/.bashrc") + exit(0) + HOME=self.FreeEDA_HOME+"/LPCSim/LPCSim/" + # Open file for writing option + fileName=HOME+"option" + os.system("rm -rf "+ fileName) + # Create model file for writing + try: + f = open(fileName,"w") + except : + tkMessageBox.showwarning("Error","Model file can not be wriiten. please check the file system permission") + f.write(self.mode) + f.close() + +if __name__=='__main__': + root=Tk() + model= SelectOption(root) + mainloop() + diff --git a/FreeEDA/forntEnd/setPath.py b/FreeEDA/forntEnd/setPath.py new file mode 100755 index 0000000..334e805 --- /dev/null +++ b/FreeEDA/forntEnd/setPath.py @@ -0,0 +1,2 @@ +#!/usr/bin/python +FreeEDA_HOME="/home/hardik/FreeEDA" diff --git a/FreeEDA/forntEnd/template.py b/FreeEDA/forntEnd/template.py new file mode 100755 index 0000000..e5f843b --- /dev/null +++ b/FreeEDA/forntEnd/template.py @@ -0,0 +1,117 @@ +#!/usr/bin/python +from Tkinter import * +import os + +class MyTemplate(Toplevel): + """Template to construct new window""" +# Define constructor + def __init__(self, parent, text=None, title=None, buttonbox=True): + # Set new window properties same as parent + Toplevel.__init__(self, parent) + + # Set report window + if text: + self.text=text + + # Create a new window on top of the parent such that don't appear in taskbar + self.transient(parent) + + # Set the title + if title: + self.title("Tools") + # Set Parent of active window + self.parent =parent + + # Create a new frame + body =Frame (self) + # Call body method + self.initial_focus = self.body(body) + # Display body + body.pack(padx=5, pady=5) + # Create buttons + if buttonbox: + self.buttonbox() + # Create status bar + self.statusBar() + # Take control of all the events + self.grab_set() + + # Take control of all the keyboard events + if not self.initial_focus: + self.initial_focus=self + + # Protocol when window is deleted. + self.protocol("WM_DELETE_WINDOW",self.cancel) + + # Position the geometry respect to main window + self.geometry("+%d+%d" % (parent.winfo_rootx()+10,parent.winfo_rooty()+22)) + self.initial_focus.focus_set() + + # Wait for widget to be destroyed + self.wait_window(self) + +# Construction of body of the window + def body(self, master): + # Create dialog body. This method should be overridden + pass + +# Add standard button box (OK, Cancel). Override if you don't want the standard buttons + def buttonbox(self): + # Construct a new frame + box = Frame(self) + # Create buttons + w = Button(box, text="OK", width=10, command=self.ok, default=ACTIVE) + w.pack(side=LEFT, padx=5, pady=5) + w = Button(box, text="Cancel", width=10, command=self.cancel) + w.pack(side=LEFT, padx=5, pady=5) + + # Bind Return and escape keys + self.bind("", self.ok) + self.bind("", self.cancel) + # Create the frame "box" + box.pack(side=BOTTOM) + +# Add standard status bar. Override if you don't want the status bar + def statusBar(self): + pass + # self.statusbar = Label(self, text="", bd=1, relief=SUNKEN, anchor=W) + # self.statusbar.pack(side=BOTTOM, fill=X) + +# Template for action taken when OK is pressed + def ok(self, event=None): + # If data is not valid then put the focus back + if not self.validate(): + self.initial_focus.focus_set() + return + # Remove the window from the screen (without destroying it) + self.withdraw() + # Call all pending idle tasks, without processing any other events. + self.update_idletasks() + # Perform required task (collection of result, inputs etc.) + self.apply() + # Take action when all task has finished + self.cancel(status=1) + +# Template for action taken when cancel pressed + def cancel(self, event=None, status=0): + # Catch the status + self.status=status + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.destroy() + +# Template for validation of data + def validate(self): + return 1 + +# Template for required action (Saving Data, results) + def apply(self): + pass + +# Test case +if __name__=='__main__': + root=Tk() + d =MyTemplate(root) + mainloop() + diff --git a/FreeEDA/forntEnd/test.py b/FreeEDA/forntEnd/test.py new file mode 100755 index 0000000..225030d --- /dev/null +++ b/FreeEDA/forntEnd/test.py @@ -0,0 +1,35 @@ +##------------------------------- +# file: test.py +# simple demonstration of the Tkinter notebook + +from Tkinter import * +from notebook import * + +a = Tk() +n = notebook(a, LEFT) + +# uses the notebook's frame +f1 = Frame(n()) +b1 = Button(f1, text="Button 1") +e1 = Entry(f1) +# pack your widgets before adding the frame +# to the notebook (but not the frame itself)! +b1.pack(fill=BOTH, expand=1) +e1.pack(fill=BOTH, expand=1) + +f2 = Frame(n()) +# this button destroys the 1st screen radiobutton +b2 = Button(f2, text='Button 2', command=lambda:x1.destroy()) +b3 = Button(f2, text='Beep 2', command=lambda:Tk.bell(a)) +b2.pack(fill=BOTH, expand=1) +b3.pack(fill=BOTH, expand=1) + +f3 = Frame(n()) + +# keeps the reference to the radiobutton (optional) +x1 = n.add_screen(f1, "Screen 1") +n.add_screen(f2, "Screen 2") +n.add_screen(f3, "dummy") + +if __name__ == "__main__": + a.mainloop() diff --git a/FreeEDA/forntEnd/toolTip.py b/FreeEDA/forntEnd/toolTip.py new file mode 100755 index 0000000..0409390 --- /dev/null +++ b/FreeEDA/forntEnd/toolTip.py @@ -0,0 +1,48 @@ +#!/usr/bin/python +from Tkinter import * + +class ToolTip(object): + + def __init__(self, widget): + self.widget = widget + self.tipwindow = None + self.id = None + self.x = self.y = 0 + + def showtip(self, text): + "Display text in tooltip window" + self.text = text + if self.tipwindow or not self.text: + return + x, y, cx, cy = self.widget.bbox("insert") + x = x + self.widget.winfo_rootx() + 27 + y = y + cy + self.widget.winfo_rooty() +27 + self.tipwindow = tw = Toplevel(self.widget) + tw.wm_overrideredirect(1) + tw.wm_geometry("+%d+%d" % (x, y)) + try: + # For Mac OS + tw.tk.call("::tk::unsupported::MacWindowStyle", + "style", tw._w, + "help", "noActivates") + except TclError: + pass + label = Label(tw, text=self.text, justify=LEFT, + background="#ffffe0", relief=SOLID, borderwidth=1, + font=("tahoma", "8", "normal")) + label.pack(ipadx=1) + + def hidetip(self): + tw = self.tipwindow + self.tipwindow = None + if tw: + tw.destroy() + +def createToolTip(widget, text): + toolTip = ToolTip(widget) + def enter(event): + toolTip.showtip(text) + def leave(event): + toolTip.hidetip() + widget.bind('', enter) + widget.bind('', leave) diff --git a/FreeEDA/images/FreeEDAlogo.jpeg b/FreeEDA/images/FreeEDAlogo.jpeg new file mode 100644 index 0000000..b28687e Binary files /dev/null and b/FreeEDA/images/FreeEDAlogo.jpeg differ diff --git a/FreeEDA/images/FreeEDAlogo.jpg b/FreeEDA/images/FreeEDAlogo.jpg new file mode 100644 index 0000000..e3b5812 Binary files /dev/null and b/FreeEDA/images/FreeEDAlogo.jpg differ diff --git a/FreeEDA/images/an-mask.xbm b/FreeEDA/images/an-mask.xbm new file mode 100644 index 0000000..d817f18 --- /dev/null +++ b/FreeEDA/images/an-mask.xbm @@ -0,0 +1,21 @@ +#define an_mask_width 45 +#define an_mask_height 35 +static unsigned char an_mask_bits[] = { + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f }; diff --git a/FreeEDA/images/an.ico b/FreeEDA/images/an.ico new file mode 100644 index 0000000..85125d9 Binary files /dev/null and b/FreeEDA/images/an.ico differ diff --git a/FreeEDA/images/an.jpg b/FreeEDA/images/an.jpg new file mode 100644 index 0000000..82646b2 Binary files /dev/null and b/FreeEDA/images/an.jpg differ diff --git a/FreeEDA/images/an.png b/FreeEDA/images/an.png new file mode 100644 index 0000000..46d62b5 Binary files /dev/null and b/FreeEDA/images/an.png differ diff --git a/FreeEDA/images/an.xbm b/FreeEDA/images/an.xbm new file mode 100644 index 0000000..47229ae --- /dev/null +++ b/FreeEDA/images/an.xbm @@ -0,0 +1,21 @@ +#define an_width 45 +#define an_height 35 +static unsigned char an_bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x07, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x01, 0x00, 0x20, 0x00, 0x00, 0x00, 0x01, 0x00, 0x70, 0x00, 0x00, + 0x00, 0x03, 0x00, 0x30, 0x00, 0x00, 0x00, 0x04, 0x00, 0x20, 0x00, 0x00, + 0x00, 0x10, 0x00, 0x20, 0x00, 0x00, 0x00, 0x10, 0x00, 0x22, 0x04, 0x00, + 0x00, 0x08, 0x80, 0x22, 0x80, 0x00, 0x00, 0x04, 0x00, 0x22, 0x00, 0x00, + 0x00, 0x10, 0x00, 0x20, 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x00, 0x00, + 0x00, 0x10, 0x80, 0x00, 0x01, 0x00, 0x04, 0x07, 0x00, 0x00, 0x00, 0x00, + 0x20, 0x10, 0x00, 0x6d, 0x03, 0x00, 0x00, 0x00, 0x60, 0x20, 0x00, 0x00, + 0x00, 0x20, 0xd8, 0xf8, 0x18, 0x00, 0x00, 0x10, 0xf0, 0x2c, 0x40, 0x01, + 0x00, 0x04, 0xf8, 0x3c, 0x00, 0x00, 0x00, 0x08, 0xa9, 0x70, 0x00, 0x00, + 0x00, 0x10, 0x00, 0x20, 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x00, 0x00, + 0x00, 0x04, 0x00, 0x70, 0x00, 0x00, 0x00, 0x01, 0x18, 0x20, 0x00, 0x00, + 0x00, 0x01, 0x78, 0xeb, 0xb0, 0x01, 0x00, 0x01, 0x18, 0xc3, 0x33, 0x03, + 0x00, 0x01, 0x18, 0xf3, 0x33, 0x03, 0x80, 0x03, 0x79, 0xf3, 0x33, 0x03, + 0x80, 0x83, 0x38, 0x01, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x57, 0x01, 0x00, 0x00, 0x00, 0x00, 0x8a, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x30, 0x00, 0x00, 0x00 }; diff --git a/FreeEDA/images/feLogo.jpg b/FreeEDA/images/feLogo.jpg new file mode 100644 index 0000000..bb7a797 Binary files /dev/null and b/FreeEDA/images/feLogo.jpg differ diff --git a/FreeEDA/images/fp.png b/FreeEDA/images/fp.png new file mode 100644 index 0000000..6993967 Binary files /dev/null and b/FreeEDA/images/fp.png differ diff --git a/FreeEDA/images/freeeda.xpm b/FreeEDA/images/freeeda.xpm new file mode 100644 index 0000000..ced507c --- /dev/null +++ b/FreeEDA/images/freeeda.xpm @@ -0,0 +1,4074 @@ +/* XPM */ +static char * FreeEDA L0_xpm[] = { +"851 881 3190 2", +" c None", +". c #EFCFA6", +"+ c #EECDA3", +"@ c #E7C69C", +"# c #E0BD95", +"$ c #DBB990", +"% c #D9B58E", +"& c #D6B38A", +"* c #D4B089", +"= c #D1AE86", +"- c #CFAA83", +"; c #CDA881", +"> c #CCA67E", +", c #C8A27C", +"' c #C6A07A", +") c #C39D76", +"! c #C19A75", +"~ c #BE9771", +"{ c #BC956F", +"] c #BA916B", +"^ c #B78F69", +"/ c #B58D67", +"( c #B38A64", +"_ c #B08762", +": c #AE8460", +"< c #AD835E", +"[ c #AF8661", +"} c #B18863", +"| c #B48A66", +"1 c #B68D68", +"2 c #B9906A", +"3 c #BB936E", +"4 c #BC9570", +"5 c #BE9971", +"6 c #C29B75", +"7 c #C49D77", +"8 c #C7A17A", +"9 c #C9A37C", +"0 c #CEA881", +"a c #D0AB84", +"b c #D3AE87", +"c c #D5B089", +"d c #D6B48B", +"e c #DAB68E", +"f c #DCBA91", +"g c #E3C298", +"h c #EAC9A0", +"i c #E7C69D", +"j c #E1BE96", +"k c #D3AF87", +"l c #CDA780", +"m c #C6A078", +"n c #AA815C", +"o c #A47855", +"p c #9C704D", +"q c #976A48", +"r c #976A47", +"s c #976947", +"t c #966947", +"u c #966945", +"v c #966845", +"w c #956845", +"x c #956844", +"y c #956744", +"z c #946744", +"A c #9D714D", +"B c #A47A55", +"C c #B9906B", +"D c #C09973", +"E c #C7A17B", +"F c #CEA982", +"G c #D5B18A", +"H c #E3C198", +"I c #EAC9A1", +"J c #E8C79E", +"K c #DDBA91", +"L c #BB956F", +"M c #B18964", +"N c #AA825D", +"O c #A47A56", +"P c #9D714F", +"Q c #996B49", +"R c #996B48", +"S c #946743", +"T c #946543", +"U c #9C704B", +"V c #A37854", +"W c #AA815B", +"X c #B38964", +"Y c #BB936F", +"Z c #9B7E60", +"` c #A4896A", +" . c #AE9374", +".. c #8F7B63", +"+. c #73634F", +"@. c #8B7860", +"#. c #958167", +"$. c #A08A6F", +"%. c #DEBC95", +"&. c #C9A37D", +"*. c #BE9671", +"=. c #A87D58", +"-. c #9A6D49", +";. c #996D49", +">. c #936543", +",. c #936542", +"'. c #8F6341", +"). c #6D4B31", +"!. c #6D4A31", +"~. c #2F2116", +"{. c #000000", +"]. c #1A1610", +"^. c #E3C29A", +"/. c #EECEA4", +"(. c #E2C097", +"_. c #C19A73", +":. c #A07450", +"<. c #9A6E4A", +"[. c #9A6D4A", +"}. c #906342", +"|. c #2F2115", +"1. c #110B08", +"2. c #916441", +"3. c #9E714E", +"4. c #A9805B", +"5. c #DAB78F", +"6. c #E9C8A0", +"7. c #E8C89E", +"8. c #CAA47E", +"9. c #AB815D", +"0. c #9D714E", +"a. c #9B6E4B", +"b. c #9B6E4A", +"c. c #6E4B31", +"d. c #936442", +"e. c #916341", +"f. c #9C6F4D", +"g. c #BD9670", +"h. c #CEAA82", +"i. c #EECDA4", +"j. c #D0AD86", +"k. c #9B6F4B", +"l. c #906442", +"m. c #A37754", +"n. c #B48B66", +"o. c #C69E78", +"p. c #D9B48D", +"q. c #AA805B", +"r. c #9C6F4B", +"s. c #6E4D31", +"t. c #906340", +"u. c #906240", +"v. c #AA805C", +"w. c #BB946E", +"x. c #CDA781", +"y. c #DDBB93", +"z. c #EDCDA3", +"A. c #EACAA1", +"B. c #D7B48D", +"C. c #C49E77", +"D. c #A27754", +"E. c #916443", +"F. c #6E4D32", +"G. c #A17550", +"H. c #B38A66", +"I. c #C9A47D", +"J. c #E6C49B", +"K. c #AB825D", +"L. c #6F4D33", +"M. c #90623E", +"N. c #8F613E", +"O. c #AD825E", +"P. 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J K = E L M N O P Q Q Q Q R R R R R R R R R R R R R q q q q q q q r r r r r r r r s s t t t t u u u u u u u v v v w w w x x x x x y y y y y z S S S S T T T T T T w U V W X Y Z ` ...+.+.@.#.#.$.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h %.* &.*.( =.A -.-.-.-.-.-.-.-.-.-.-.;.;.;.Q Q Q Q Q R R R R R R R R R R R R q q q q q q r r r r r r r r s s t t t u u u u u u u v v v v w w w x x x x y y y y y z S S S S T T T T T T >.,.'.).!.!.~.{.{.{.{.{.].^./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.(.& > _.1 n :.<.<.<.<.<.<.[.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.-.;.;.;.Q Q Q Q Q R R R R R R R R R R R q q q q q q r r r r r r r s s t t t u u u u u u u v v v w w w x x x x y y y y y z S S S S T T T T T }.).).).|.{.{.{.{.{.1.2.,.3.4.1 6 F 5.6.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.e 8.3 9.0.a.b.b.b.b.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.<.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.;.;.Q Q Q Q Q R R R R R R R R R R q q q q q q r r r r r r r s s t t t u u u u u u v v v w w w x x x x x y y y y z S S S S T T }.c.c.).~.{.{.{.{.{.1.d.d.2.2.2.e.e.e.e.f.< g.h.# /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i.# j.6 ( V k.k.k.k.k.k.k.k.a.a.a.a.a.a.a.a.a.b.b.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R R R q q q q q q r r r r r r s s t t t u u u u u u v v v w w w x x x x x y y y y z S S S l.c.c.c.~.{.{.{.{.{.1.d.d.d.d.d.2.2.e.e.e.e.e.e.e.,.m.n.o.& i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i p.9 ] q.A r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.a.a.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R R q q q q q r r r r r r r s s t t t u u u u u u v v v w w x x x x x y y y y z l.s.s.s.~.{.{.{.{.{.1.,.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.t.u.u.u.-.v.w.x.y.z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.B.C.M D.p f.f.f.f.f.f.f.f.f.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.a.b.b.b.b.b.b.b.b.<.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R R q q q q q r r r r r r s s t t t u u u u u u v v v w w x x x x y y y E.F.F.s.~.{.{.{.{.{.1.>.,.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.d.G.H.I.# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J.b ~ K.0.p p p p p p p p p p p p p p p p p p p p p p f.f.f.f.f.r.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.b.b.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.;.Q Q Q Q R R R R R R R R R q q q q q r r r r r r s t t t u u u u u u v v v w w x x x x E.L.L.L.~.{.{.{.{.{.1.T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.u O.P.e z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X.Y.Z.`. +0.0.0.0.0.0.0.0.0.0.0..+.+.+.+.+.+.+.+.+.+R.R.R.R.R.R.R.R.R.R.R.R.p p p p p p p p p p p p p p p p f.f.f.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.<.<.<.<.[.[.[.[.-.-.-.-.-.-.-.-.;.Q Q Q Q R R R R R R R R q q q q r r r r r r s t t t u u u u u u v v w ++@+T.T.U.{.{.{.{.{.V.S S S T T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.#+/ $+(.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.G 6 [ %+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+.+.+R.R.R.R.R.R.R.R.R.p p p p p p p p p p p p p f.f.f.r.r.r.r.r.r.r.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.<.<.<.<.[.[.[.-.-.-.-.-.-.-.;.;.Q Q Q R R R R R R R R q q q q r r r r r r s t t t u u u u u v &+*+@+@+U.{.{.{.{.{.V.y z S S S T T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+q : -+;+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j &.M %+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+.+R.R.R.R.R.R.p p p p p p p p p p p p f.f.f.r.r.r.r.r.r.r.k.k.k.k.k.k.a.a.a.a.b.b.b.b.b.b.<.<.<.<.[.[.[.-.-.-.-.-.-.-.;.Q Q Q Q R R R R R R R q q q q r r r r r r s t t t u u u >+*+*+*+U.{.{.{.{.{.V.y y y z S S S S T T T T >.,.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+Q `.a I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.'+)+Q.3.3.3.3.3.3.3.3.#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.R.R.p p p p p p p p p p f.f.f.r.r.r.r.r.r.k.k.k.k.k.k.k.a.a.a.b.b.b.b.b.b.<.<.<.[.[.[.[.-.-.-.-.-.-.;.;.Q Q Q R R R R R R R q q q q r r r r r r s t t t >+*+*+*+!+{.{.{.{.{.V.x x y y y y z S S S T T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+u.~+{+]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j ^+( /+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.R.p p p p p p p p p p f.f.r.r.r.r.r.r.k.k.k.k.k.k.a.a.a.b.b.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.-.-.;.Q Q Q R R R R R R R q q q q r r r r r s s (+_+*+*+!+{.{.{.{.{.V.w x x x x y y y z S S S S T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+:+n.a h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.G ~ <+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.p p p p p p p p p f.f.r.r.r.r.r.r.k.k.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.<.[.[.[.-.-.-.-.-.-.;.Q Q Q R R R R R R R q q q q r r r r [+_+_+_+!+{.{.{.{.{.V.v w w w x x x y y y z S S S S T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+}+|+1+6 ]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j ^+( /+#+#+#+#+#+#+#+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p p p p f.f.r.r.r.r.r.k.k.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.-.;.Q Q Q R R R R R R R q q q q r [+3+3+3+4+{.{.{.{.{.V.u v v v w w x x x y y y y z S S S T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+6+`.a I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j 7+8+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p p p f.f.r.r.r.r.r.k.k.k.k.k.a.a.a.a.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.-.;.Q Q Q R R R R R R R q q 9+3+3+3+4+{.{.{.{.{.V.u u u u v v w w x x x x y y y z S S S T T T T >.,.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+0+9.x.A.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a+E b+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.p p p p p p p f.f.r.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.-.;.Q Q Q R R R R R R 9+3+3+3+4+{.{.{.{.{.V.t u u u u u v v w w w x x x y y y z S S S T T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+t.c+- X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d+&.: :.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p p f.f.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.[.[.-.-.-.-.-.-.;.Q Q Q R R R e+f+f+3+g+{.{.{.{.{.h+s s t t u u u u v v v w w x x x y y y z S S S S T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+e.j+k+z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ $+_ :.:.:.:.:.:.:.:.:.:.:.:.G.G.G.G.G.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.G.G.G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p f.f.r.r.r.r.r.k.k.k.k.a.a.a.b.b.b.b.b.<.<.[.[.[.-.-.-.-.-.-.;.Q Q R e+f+f+f+m+{.{.{.{.{.h+r r r s t t u u u u u v v w w x x x y y y z z S S S T T T T >.,.,.d.d.d.d.d.2.e.e.e.e.e.e.t.u.u.u.u.u.u.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+d.X * /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J F X :.:.:.:.G.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0..+.+R.R.R.p p p p p p p f.f.r.r.r.r.k.k.k.k.k.a.a.b.b.b.b.b.<.<.[.[.[.-.-.-.-.-.;.;.o+p+f+f+m+{.{.{.{.{.h+q r r r r s t t t u u u u v v w w x x x y y y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+,+}+5+5+5+5+5+n+n+q+S / r+/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . s+a t+u+G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0..+.+R.R.R.p p p p p p f.f.r.r.r.r.k.k.k.k.k.a.a.b.b.b.b.b.<.<.[.[.[.-.-.-.-.v+w+p+p+m+{.{.{.{.{.h+q q q r r r r r s t t u u u u v v w w x x x x y y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+v x+e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.B.C y+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+z+z+z+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+z+z+z+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0..+R.R.R.R.p p p p p p f.r.r.r.r.k.k.k.k.k.a.a.b.b.b.b.<.<.<.[.[.[.-.v+A+A+A+m+{.{.{.{.{.h+R R q q q r r r r r s t t u u u u v v v w w x x x y y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+C+g.D+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+F+G+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0..+.+R.R.R.p p p p p p f.r.r.r.r.k.k.k.k.k.a.a.b.b.b.b.<.<.<.[.v+A+A+A+m+{.{.{.{.{.h+R R R R q q q q r r r r s t t u u u u u v v w w x x x y y y z S S S T T T T >.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.N.N.N.N.N.N.N.,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+n+H+j./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.r+x+y+l+l+l+l+l+l+z+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0..+R.R.R.p p p p p p f.r.r.r.r.k.k.k.k.a.a.a.b.b.b.b.<.I+J+J+J+m+{.{.{.{.{.K+Q R R R R R R q q q r r r r s t t t u u u u v v w w x x x y y y z S S S T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+L+L+u { H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M+8 H+l+l+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0.0..+R.R.R.p p p p p p f.r.r.r.r.k.k.k.k.a.a.a.b.b.6+J+J+J+m+{.{.{.{.{.K+;.Q Q R R R R R R q q q r r r r r s t t u u u u v v w w x x x y y y z S S S T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+B+L+L+q+=.a i.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.& N+ +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0..+R.R.R.p p p p p p f.r.r.r.r.k.k.k.k.a.a.6+O+O+O+m+{.{.{.{.{.K+-.-.;.;.Q Q R R R R R q q q r r r r r s t t u u u u v v w w x x x y y y z S S T T T T >.,.,.d.d.d.d.d.2.e.e.e.e.e.e.u.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+L+L+L+P+y 3 a+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d+Q+H+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.R.p p p p p p f.r.r.r.r.k.k.k.R+S+S+O+m+{.{.{.{.{.K+-.-.-.-.-.;.Q Q R R R R R q q q q r r r r s t t u u u u v v w w x x x y y y z S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+B+Q.T+i.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.'+U+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.R.p p p p p f.f.r.r.r.k.V+W+W+S+X+{.{.{.{.{.K+[.[.[.-.-.-.-.;.Q Q R R R R R R q q q r r r r s t t u u u u v v w w x x x y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+L+L+L+P+Y+Y+T Z+(.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J E `+y+y+y+y+y+y+ + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V V V V V V @ @ @ @ @ @ @ @ @ @ @o o o o o o o o o o o o o o o o @ @ @ @ @ @ @ @ @ @ @V V V V V V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.R.p p p p p f.r.r.;.W+W+W+.@{.{.{.{.{.K+<.<.<.[.[.-.-.-.-.;.Q Q Q R R R R R q q q r r r r s t t u u u u v v w w x x x y y z S S S T T T T >.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y++@W.@@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H D o y+y+y+ + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V V V @ @ @ @ @o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o @ @ @ @ @V V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.R.p p p p p #@W+W+W+.@{.{.{.{.{.K+b.b.b.<.<.[.[.-.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u u v v w w x x y y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+L+L+P+P+Y+Y++@+@p ^+z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f ] y+ + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V @ @ @o o o o o o o o o o o o o o o o o o o o o o o B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B o o o o o o o o o o o o o o o o o o o o o o @ @ @ @V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0..+.+R.R.p p p $@%@W+W+.@{.{.{.{.{.K+a.a.b.b.b.<.<.[.[.-.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u u v v w x x x y y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+Y+Y+Y++@+@&@*@s+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.& ( + +m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V @ @ @o o o o o o o o o o o o o o o o B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B o o o o o o o o o o o o o o o o @ @ @V V V V V V m.m.m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0..+R.R.R.$@%@%@%@.@{.{.{.{.{.K+k.k.a.a.b.b.b.<.<.[.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u u v w w x x x y y y z S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+i+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@-@x+d+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;@- c+m.m.m.m.m.m.m.m.m.m.m.V V V V V @ @ @o o o o o o o o o o o o o B B B B B B B B B B B B B O O O O O O O >@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@O O O O O O O B B B B B B B B B B B B B o o o o o o o o o o o o o @ @ @V V V V V m.m.m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0..+<.,@%@%@.@{.{.{.{.{.K+r.k.k.k.a.a.b.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u v v w w x x x y y y S S S T T T T ,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+L+L+L+P+Y+Y++@+@+@'@B+)@y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@9 H+m.m.m.m.m.m.m.V V V V V @ @ @o o o o o o o o o o o B B B B B B B B B B B O O O O >@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@O O O O B B B B B B B B B B B o o o o o o o o o o o @ @ @V V V V V m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.3.0.0.0.0.0.~@{@{@,@]@{.{.{.{.{.K+r.r.r.k.k.k.a.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u v v w w x x x y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@W.* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D+6 >@m.m.m.m.m.V V V V @ @o o o o o o o o o o B B B B B B B B B B O O O >@>@>@>@>@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@>@>@>@>@O O O B B B B B B B B B B o o o o o o o o o o @ @V V V V m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+3.3.3.0.0.~@^@^@^@/@{.{.{.{.{.(@p f.r.r.r.k.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r r s t u u u u v v w w x x y y y z S S S T T T >.,.,.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+q+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@R.:@i.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <@w.o m.m.V V V V @ @o o o o o o o o o o B B B B B B B B O O O >@>@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@>@O O O B B B B B B B B o o o o o o o o o o @ @V V V V m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+3.3.~@^@^@^@/@{.{.{.{.{.(@p p p f.r.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r s t t u u u u v v w x x x y y y z S S T T T T ,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+n+n+q+q+B+B+L+L+P+Y+Y++@+@+@'@'@'@_@x 6 I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f [@m.V V V V @ @o o o o o o o o B B B B B B B B O O >@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+1+1+1+Q.Q.Q.Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.Q.Q.Q.1+1+1+1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@O O B B B B B B B B o o o o o o o o @ @V V V V m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+}@|@|@^@/@{.{.{.{.{.(@R.p p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r s t t u u u u v w w x x x y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@N.{ h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+1@V V @ @o o o o o o o o B B B B B B B O O O >@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+Q.Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.Q.1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@O O O B B B B B B B o o o o o o o o @ @V V V m.m.m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+}@2@2@|@/@{.{.{.{.{.(@.+R.R.p p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q r r r r s t t u u u v v w w x x x y y z S S T T T T >.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+}+5+5+5+i+n+n+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@u.3@4@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5@6@ @ @o o o o o o o o B B B B B B O O >@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.1+1+1+1+1+1+Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@O O B B B B B B o o o o o o o o @ @V V V m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.2+#+#+}@2@2@2@/@{.{.{.{.{.(@0.0..+R.R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q r r r r s t t u u u v v w w x x y y y z S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+n+n+q+q+B+B+L+L+P+Y+Y++@+@+@'@'@_@_@_@7@d.) z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g g.o o o o o o o o B B B B B B O O >@>@>@>@>@>@W.W.W.W.W.W.8@8@9@9@9@9@1+Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+<+<+<+<+<+<+<+<+<+<+<+<+<+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+<+<+<+<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.1+1+1+1+1+1+W.W.W.W.W.W.W.>@>@>@>@>@>@O O O B B B B B o o o o o o o o @V V V V m.m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.p 2@2@2@/@{.{.{.{.{.(@0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R q q q r r r r s t u u u u v v w x x x y y z S S S T T T >.,.d.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+5+5+5+5+i+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@z E i.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J.0@>@o o o o o B B B B B O O >@>@>@>@>@>@W.W.W.W.W.W.8@9@9@9@9@9@<+<+<+=.a@a@~+~+~+~+~+~+~+~+~+~+~+~+<+<+<+<+<+<+<+<+<+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.1+1+1+1+1+W.W.W.W.W.W.W.>@>@>@>@>@>@O O B B B B B o o o o o o o @ @V V V m.m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.b@c@d@2@/@{.{.{.{.{.(@3.0.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R q q q r r r s t t u u u v v w w x x y y y z S S T T T T ,.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+n+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@u ^+/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@P.>@o o o B B B B B O O >@>@>@>@>@>@W.W.W.W.W.W.1+1+1+9@<+f@f@g@g@g@G+G+g@=.a@a@a@~+~+~+~+<+<+<+<+<+<+<+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.1+1+1+1+W.W.W.W.W.W.>@>@>@>@>@>@O O B B B B B o o o o o o o @ @V V V m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+G.:.:.:.:.b@c@c@c@h@{.{.{.{.{.(@#+3.3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q R R R R R q q q r r r s t t u u u v v w w x x y y y S S S T T T >.,.,.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+n+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@-.F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@m Q.o B B B B B O O >@>@>@>@>@>@W.W.W.W.W.1+1+1+1+9@<+<+=.g@G+j@j@n k@k@k@n j@G+`+l@l@<+<+<+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.`+`+`+`+`+`+`+`+`+`+`+`+`+`+g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@`+`+`+`+`+`+`+`+`+`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.1+1+1+1+1+W.W.W.W.W.W.>@>@>@>@>@O O B B B B B o o o o o o @ @V V V m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+G.:.b@c@c@c@h@{.{.{.{.{.(@#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.;.Q Q R R R R R q q r r r r s t u u u u v v w x x x y y z S S T T T T ,.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.N.,+,+,+,+,+}+5+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@+@'@'@_@_@_@7@7@i@i@U m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I , f@B B B B B O >@>@>@>@>@>@W.W.W.W.W.1+1+1+1+<+<+a@=.g@g@G+j@n n@n@o@p@q@q@r@s@t@k@v.H+g@=.=.=.=.=.=.=.=.=.=.=.=.=.`+`+`+`+`+`+`+`+g@g@g@g@g@g@H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+g@g@g@g@g@g@`+`+`+`+`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+Q.Q.1+1+1+1+W.W.W.W.W.W.>@>@>@>@>@O O B B B B B o o o o o o @V V V m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+u@c@c@c@h@{.{.{.{.{.(@#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.;.Q Q R R R R q q q r r r s t t u u u v v w w x x y y y z S S T T T >.,.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@2+c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.> v@B B B O O >@>@>@>@>@W.W.W.W.W.1+1+1+1+Q.<+a@a@=.=.g@j@n k@n@p@w@x@y@z@z@A@B@C@D@E@K.v.H+g@g@=.=.=.=.`+`+`+`+`+`+`+g@g@g@g@H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+g@g@g@g@`+`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+Q.1+1+1+1+W.W.W.W.W.W.>@>@>@>@>@O B B B B B o o o o o o @V V V m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+z+l+l+l+l+l+F@G@G@G@h@{.{.{.{.{.(@:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.-.-.-.-.;.Q Q R R R R q q q r r r s t t u u u v v w x x x y y z S S T T T T ,.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@y+B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I@K.B B O >@>@>@>@>@W.W.W.W.W.1+1+1+1+Q.Q.~+~+a@=.=.G+G+n k@s@q@x@y@z@J@K@L@M@M@L@N@A@C@E@K.v.G+O@`+`+`+`+g@g@g@H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+G+G+G+G+G+G+G+G+G+4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.G+G+G+G+G+G+G+G+G+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+g@g@g@`+`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+Q.Q.1+1+1+W.W.W.W.W.>@>@>@>@>@O O B B B B o o o o o o @V V V m.m.m.m.m.m.m. + +y+y+y+y+y+y+y+y+z+l+l+F@G@G@G@h@{.{.{.{.{.(@:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.[.[.-.-.-.-.;.Q R R R R R q q r r r r s t u u u u v w w x x y y y z S S T T T >.,.,.d.d.d.2.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@P@v.g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@3@O >@>@>@>@W.W.W.W.W.1+1+1+Q.Q.~+~+~+~+a@a@=.g@G+.#Q@t@q@C@A@N@L@T@U@+#@###$#%#&#*#U@Y@=#A@-#;#9.q.4.H+H+H+H+H+H+H+H+H+H+G+G+G+G+4.4.4.4.4.4.4.4.4.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.4.4.4.G+G+G+G+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+~+~+~+~+~+~+~+~+Q.Q.1+1+1+W.W.W.W.W.>@>@>@>@>@O B B B B o o o o o o @V V V m.m.m.m.m.m. + + +y+y+y+y+y+>#,#'#G@h@{.{.{.{.{.)#:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.b.b.b.<.<.[.[.-.-.-.;.Q Q R R R R q q q r r r s t t u u u v w w x x y y y z S S T T T >.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@i@H@P@>.$+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.$+!#>@>@>@W.W.W.W.1+1+1+1+Q.~+~+~+~+~+a@a@=.g@O@.#k@;#~#{#A@N@M@]#W@@#$#^#/#(#_#/#:#<#*#[#K@}#D@|#n@q.q.4.H+H+H+G+G+G+4.4.4.4.4.4.4.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.v.v.v.v.v.v.v.v.v.v.v.v.n n n n n n n n n n n n v.v.v.v.v.v.v.v.v.v.v.v.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.4.4.G+G+G+H+H+H+H+H+H+H+H+H+H+H+H+H+g@g@g@`+`+`+`+=.=.=.=.=.=.=.=.=.=.<+<+<+<+~+~+~+~+~+~+~+~+Q.Q.1+1+1+W.W.W.W.>@>@>@>@>@O B B B B o o o o o o @V V V m.m.m.m.m.m. + +y+y+y+>#,#,#,#1#{.{.{.{.{.)#l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.a.a.b.b.b.<.<.[.-.-.-.-.;.Q Q R R R R q q r r r r t t u u u v v w w x x y y z S S T T T T ,.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@H@P@P@/+$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.[ >@>@W.W.W.W.1+1+1+Q.Q.~+~+~+~+~+~+a@a@`+O@2#K.;#E@D@B@J@M@]#W@#_#4#5#6#6#7#8#9#0#+#a#b#A@D@|#n@q.j@j@G+4.4.4.4.4.4.q.q.q.q.q.q.q.q.q.q.q.q.q.q.v.v.v.v.v.n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n v.v.v.v.v.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+`+=.=.=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+~+Q.Q.1+1+1+W.W.W.W.W.>@>@>@>@O B B B B o o o o o @ @V V m.m.m.m.m.m. + + +>#,#,#,#c#{.{.{.{.{.)#l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.k.k.k.a.a.b.b.b.<.[.[.-.-.-.-.Q Q R R R R q q q r r r s t t u u u v w w x x y y y z S S T T T >.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@i@d#i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e#C >@W.W.W.W.1+1+1+Q.Q.~+~+~+~+~+~+a@l@`+`+O@v.n@;#f#C@A@N@Y@V@#_#g#h#i#j#j#k#l#m#9###n#S@o#B@p#p@n@n q#q#4.q.q.q.q.q.q.q.q.q.q.q.q.v.v.v.v.n n n n n n n n n n n n n n n r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#n n n n n n n n n n n n n n v.v.v.v.q.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.G+G+G+H+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+`+=.=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.W.>@>@>@>@O B B B B o o o o o @V V V m.m.m.m.m.m.s#,#,#,#c#{.{.{.{.{.)#l+l+l+l+l+G.:.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.k.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q Q R R R R q q r r r r s t u u u v v w w x x y y z S S T T T >.,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#}+6 i.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h 7 ~+W.W.W.1+1+1+Q.~+~+~+~+~+~+~+~+<+l@`+4.v.k@;#~#{#B@N@M@u#v#w#x#g#y#z#A#B#B#C#j#D#8#E#@#X@Z@F#G#f#H#K.r#n n q.q.q.q.q.q.q.v.v.v.n n n n n n n n n n n r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#n n n n n n n n n n n v.v.v.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.>@>@>@>@>@O B B B B o o o o o @V V m.m.m.m.I#J#,#,#c#{.{.{.{.{.K#z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p f.r.r.r.k.k.k.a.b.b.b.<.<.[.[.-.-.-.;.Q R R R R R q q r r r s t t u u u v w w x x y y y S S S T T T >.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+i+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#t#s b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.a n W.W.1+1+1+Q.~+~+~+~+~+~+~+~+<+<+l@H+4.v.k@;#~#C@A@L#a#M#<#/#8#l#j#A#N#O#O#P#B#z#Q#R#w#W@S@S#B@D@T#O.K.n n q.q.q.v.v.v.n n n n n n n n n r#r#r#r#r#r#r#r#r#r#r#r#9.9.9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.9.9.9.r#r#r#r#r#r#r#r#r#r#r#r#n n n n n n n n n v.v.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+g@g@`+`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.Q.1+1+W.W.W.W.>@>@>@>@O O B B B o o o o o @V V V m.I#J#J#J#c#{.{.{.{.{.K#y+y+z+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.b.<.[.[.-.-.-.-.Q Q R R R R q q q r r r s t u u u v v w x x x y y z S S T T T >.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@i@P@P@t#t#U#Q.V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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W#X W.1+1+1+Q.~+~+~+~+~+~+~+<+<+<+g@g@H+4.v.K.;#f#X#Y#Z#u#`#E# $.$i#C#N#+$@$@$@$#$$$j#5#/#%$X@K@&$*$|#< K.n k@v.v.n n n n n n n n r#r#r#r#r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.9.r#r#r#r#r#r#r#r#r#n n n n n n n n n v.v.q.q.q.q.q.q.q.q.q.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.>@>@>@>@O B B B B o o o o o @V =$J#J#J#-${.{.{.{.{.K#y+y+y+y+z+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.#+#+#+#+#+#+3.3.0.0.0.0.0..+R.p p p p f.r.r.r.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q Q R R R R q q r r r s t t u u u v w w x x y y y S S S T T T ,.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@i@P@P@t#t#U#;$>$s+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i ,$1+1+1+Q.~+~+~+~+~+~+~+<+<+<+=.g@g@g@4.v.k@;#w@'$N@)$!$~$9#m#D#z#B#+$@${$]$]$^$O#/$y#8#w#W@S@R@($f#;#n@k@N n n n n n n r#r#r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.r#r#r#r#r#r#r#r#r#n n n n n n n v.v.q.q.q.q.q.q.q.q.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+g@`+`+`+`+=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.>@>@>@>@O B B B o o o o o _$:$:$:$-${.{.{.{.{.K#y+y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p p f.r.r.k.k.k.a.a.b.b.<.<.[.-.-.-.-.;.Q R R R R q q q r r r s t u u u v v w x x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#U#<$^+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m@j@1+Q.Q.~+~+~+~+~+~+<+<+<+=.=.=.g@g@4.v.n@p@w@X#=#a#+#w#[$.$i#A#P#@$]$}$}$|$]$@$1$2$7#3$4$[#b#'$-#|#;#K.N N n r#r#r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.r#r#r#r#r#r#r#n n n n n n n v.v.q.q.q.q.q.q.q.q.4.4.4.G+G+H+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.>@>@>@>@O B B B B o o 5$6$7$7$-${.{.{.{.{.K# + +y+y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.b.<.[.[.-.-.-.;.Q Q R R R R q q r r r s t t u u u v w w x x y y z S S T T T >.,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@H@P@P@t#U#U#8$B H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d+1@1+Q.~+~+~+~+~+~+<+<+<+=.=.=.=.g@g@4.9$n@p@G#A@b#a#*#w# $l#z#B#0$]$}$a$a$a$b$]$+$A#D# $c$d$e$R@C@f#f$H#b+K.r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#r#n n n n n n v.v.q.q.q.q.q.q.q.q.4.4.4.G+G+H+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.1+1+W.W.W.W.>@>@>@>@O B B B 5$6$6$6$-${.{.{.{.{.K#m.m. + + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q R R R R q q q r r r s t u u u v v w x x y y y S S S T T T ,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@H@P@P@t#t#U#8$L+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.; !#~+~+~+~+~+~+~+<+<+=.=.=.=.=.g@g@j@9$n@E@G#A@K@[#*#w# $l#g$h$^$]$a$i$j$j$k$l$@$1$m$7#n$`#T@o#B@D@: < b+r#r#r#9.9.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < < < < < < < c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+< < < < < < < < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#r#n n n n n v.v.q.q.q.q.q.q.q.4.4.4.4.G+H+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+Q.Q.1+1+W.W.W.W.>@>@>@O B o$p$p$6$-${.{.{.{.{.K#m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.0.0.0.0.0..+R.p p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.;.Q Q R R R R q q r r r s t u u u u v w w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@i@i@i@H@P@P@t#t#U#8$q$#+]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j r$~+~+~+~+~+~+<+<+=.=.=.=.=.=.g@G+j@9$n@|#($A@K@a#*#w#s$l#/$t$u$|$a$j$v$v$i$b$]$w$C#l#x$$#n#L@y$($z$T#b+b+9.9.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < c+c+c+c+c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+c+c+c+c+c+c+< < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#n n n n n v.v.q.q.q.q.q.q.q.4.4.4.G+G+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+Q.1+1+W.W.W.W.>@>@>@A$p$p$p$B${.{.{.{.{.K#V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q R R R R q q q r r r t t u u u v w w x x y y z S S T T T >.,.d.d.d.d.2.2.e.e.e.e.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$C${ + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.9 =.~+~+~+~+<+<+<+=.=.=.=.=.=.O@O@G+k@n@|#D@A@K@[#*#w#D$y#/$O#E$b$i$v$F$F$v$G$H$^$I$j#8#:#+#T@o#J$D@|#;#H#H#K.K.K.K.K.K.K.b+b+b+b+b+b+b+< < < < < < < < < < < < < < c+c+c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+c+c+< < < < < < < < < < < < < < < b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#n n n n n v.v.q.q.q.q.q.q.4.4.4.G+G+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.=.<+<+~+~+~+~+~+~+Q.Q.1+1+W.W.W.>@D.p$p$p$B${.{.{.{.{.K#o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.a.b.b.<.<.[.-.-.-.;.Q Q R R R R q q r r r s t u u u v v w x x x y y z S S T T T ,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$Q K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.} ~+~+~+~+<+<+=.=.=.=.=.=.`+`+O@4.n n@|#D@B@b#a#@#L$m#k#A#+$E$b$i$v$F$M$N$F$a$]$+$g$O$P$Q$R$S$}#*$z$|#< H#H#K.K.K.b+b+b+b+b+b+< < < < < < < < < < < < < c+c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : T$T$T$T$T$T$T$T$T$: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+c+< < < < < < < < < < < < < b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.9.r#r#r#r#r#r#n n n n n v.q.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+Q.1+1+W.W.U$p$p$p$V${.{.{.{.{.K#o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.:.#+#+#+#+#+#+3.0.0.0.0.0..+R.p p p p f.r.r.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q R R R R q q r r r s t t u u u v w w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$U#1 4@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W$C.~+~+~+<+<+<+=.=.=.=.=.=.`+`+ #4.n 9.;#-#B@N@a#*#:#8#k#A#+$]$b$j$F$M$X$Y$Z$j$H$`$ %i#8#.%+%S@o#B@D@@%< H#H#b+b+b+b+b+b+b+< < < < < < < < < < < c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : T$T$T$T$T$T$#%#%#%#%#%#%#%#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%#%#%#%#%#%#%T$T$T$T$T$T$: : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+< < < < < < < < < < < < b+b+b+b+b+b+K.K.K.K.K.K.K.K.9.r#r#r#r#r#n n n n n v.v.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.<+<+~+~+~+~+~+~+Q.1+1+$%p$p$p$V${.{.{.{.{.%%B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q Q R R R R q q r r r s t u u u v v w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+i+n+q+q+B+B+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%y * . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e #%~+~+<+<+=.=.=.=.=.=.`+`+`+ #4.n 9.O.f#C@R@Y@*%:#=%y#C#+$]$b$j$N$Y$X$X$Y$F$i$-%+$;%>%[$,%[#b#&$G#z$f$c+< < b+b+b+< < < < < < < < < < < c+c+c+c+c+: : : : : : : : : : : : : : : : : : T$T$T$T$#%#%#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%#%T$T$T$T$: : : : : : : : : : : : : : : : : : : c+c+c+c+c+< < < < < < < < < < < b+b+b+b+b+K.K.K.K.K.K.K.9.9.r#r#r#r#r#n n n n n v.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@`+`+=.=.=.=.=.=.=.<+<+~+~+~+~+~+~+ @'%'%p$V${.{.{.{.{.%%B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r s t u u u v v w x x x y y S S S T T >.,.,.d.d.d.2.2.e.e.e.e.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%[ !@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.D ~+<+<+<+=.=.=.=.=.=.`+`+g@H+4.q.n O.|#($)%S@W@$# $D#C#!%E$~%j$Z$X$X$X${%Y$v$k$`$P#m$]%^%/%e$(%_%:%)@c+< < b+< < < < < < < < < < c+c+c+c+: : : : : : : : : : : : : : : : T$T$T$T$#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%#%T$T$T$: : : : : : : : : : : : : : : : c+c+c+c+c+< < < < < < < < < < b+b+b+b+b+K.K.K.K.K.K.K.9.9.r#r#r#r#n n n n n v.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+g@g@`+`+=.=.=.=.=.=.<+<+~+~+~+~+ @<%[%'%V${.{.{.{.{.%%>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0.0.R.R.p p p f.r.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q Q R R R q q q r r r t t u u u v w w x x y y z S S T T T ,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%<$F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . '+b+<+<+=.=.=.=.=.=.`+`+g@g@H+4.q.n n@|#{#A@L@U@##P$O$;%O#u$b$j$Z$X$}%|%|%Y$Y$i$1%2%C#3%4%,%[#b#5%($[ : c+f$< < < < < < < < c+c+c+c+: : : : : : : : : : : : : : : T$T$T$#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+j+j+j+j+j+j+j+j+j+j+_ _ _ _ _ _ _ _ j+j+j+j+j+j+j+j+j+j+j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%T$T$T$: : : : : : : : : : : : : : c+c+c+c+< < < < < < < < < < b+b+b+b+b+K.K.K.K.K.K.9.9.r#r#r#r#r#n n n n v.q.q.q.q.q.q.4.4.G+G+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.<+<+<+~+ @<%<%<%V${.{.{.{.{.%%>@>@>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.b.b.<.<.[.[.-.-.-.Q Q R R R R q q r r r s t u u u v v w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%=.@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W$_.<+<+=.=.=.=.=.=.`+`+g@H+H+H+q.n n@p@p#7%8%X@4$3$7#2$P#@$H$9%F$X$|%|%|%{%0%a%a$E$O#j#]%^%/%b%c%J$d%z$@%f$< < < < < < c+c+c+c+: : : : : : : : : : : : : T$T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%T$T$: : : : : : : : : : : : : : c+c+c+c+< < < < < < < < < b+b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#r#n n n n v.q.q.q.q.q.q.4.4.G+H+H+H+H+H+H+H+g@`+`+=.=.=.=.=.=.<+e%<%<%<%V${.{.{.{.{.%%W.W.>@>@>@O B B B o o o o @V V m.m.m.m.m. +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.r.k.k.a.a.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r s t u u u v v w x x y y y S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%N.b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+_ =.=.=.=.=.=.`+`+g@g@H+H+4.4.q.n f%g%h%o#i%+#E#8#i#B#j%l$9%F${%|%|%|%|%0%Z$j$l$2%C#3%[$%$k%l%y$m%z$@%f$f$< < < c+c+c+c+: : : : : : : : : : : : T$T$#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$T$: : : : : : : : : : : : c+c+c+c+< < < < < < < < b+b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#r#n n n n v.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+g@`+`+`+=.=.=.=.O n%n%<%V${.{.{.{.{.%%1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p f.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q Q R R R q q q r r r t t u u u v w w x x y y z S S T T >.,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%/ z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.$+H+=.=.=.=.=.`+`+g@H+H+H+H+4.4.v.H#f#G#R@S@W@0# $y#$$2%]$a$F$Y$|%p%q%|%|%X$F$k$E$1$2$r%s%t%T@o#7%:%@%: f$< c+c+c+c+: : : : : : : : : : : T$T$#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : : : c+c+c+< < < < < < < < < b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#r#n n n n v.q.q.q.q.q.4.4.G+G+H+H+H+H+H+g@g@`+`+=.=.O v%v%n%w%{.{.{.{.{.%%Q.1+1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+l+:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.r.k.k.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r s t u u u v w w x x y y z S S T T T ,.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%x%# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ y%=.=.=.=.`+`+`+g@H+H+H+H+H+4.v.n@;#z$5%K@X@%$[$l#C##$]$z%v$Y${%q%q%q%A%|%Z$j$B%C%D%D#[$E%F%G%y$m%H%@%: : c+c+: : : : : : : : : : : T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%u%u%d#d#d#d#d#d#d#} } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } d#d#d#d#d#d#d#u%u%u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : : c+c+c+< < < < < < < < b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#n n n n v.v.q.q.q.q.4.4.4.G+H+H+H+H+H+H+g@`+`+O v%v%v%I%{.{.{.{.{.%%~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o @V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p f.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r s t u u u v v w x x y y z S S T T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.u.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%;$m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J%b+=.=.=.`+`+g@g@H+H+H+H+H+j@q#N H#f#($K%i%+#E#.$j#N#^$k$v$Y$|%|%q%q%q%A%X$L%z%-%1$2$M%E#+#T@o#7%:%d%T$: : : : : : : : : : : : T$T$#%[ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%u%d#d#d#d#} } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } d#d#d#d#u%u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : c+c+c+c+< < < < < < < b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#n n n n v.q.q.q.q.q.4.4.G+H+H+H+H+H+H+g@N%O%v%v%I%{.{.{.{.{.%%~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.Q Q R R R q q q r r r t t u u u v w x x y y y S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%f@J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.) =.=.=.`+`+g@H+H+H+H+H+H+G+q#n O.T#D@5%G%V@.%=%y#A#C%l$i$F$|%A%q%q%q%A%|%Y$v$B%@$D%y# $E%n#G%y$M d%[ @%: : : : : : : : : T$T$#%[ [ [ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%d#d#d#} } } } } } } } } } } } } } } } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } } } } } } } } } } } } } } } d#d#d#u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : c+c+c+< < < < < < < b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#n n n n v.q.q.q.q.4.4.4.G+H+H+H+H+1+R%R%O%I%{.{.{.{.{.%%<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o @V V m.m.m.m.m. +y+y+y+y+y+y+l+l+l+l+l+l+:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r s t u u u v w w x x y y S S S T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%u.'+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j X =.=.`+`+g@H+H+H+H+H+H+G+q#n K.< f#S%o#T%@#4%O$;%w$]$z%N$X$A%q%q%q%q%p%{%L%z%U%+$V%M%3$+#T@W%5%X%:%[ @%: : : : : : T$T$#%[ [ [ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%d#d#d#} } } } } } } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } } } } } } } d#d#u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : c+c+c+< < < < < < < b+b+b+b+K.K.K.K.K.9.9.r#r#r#n n n n v.q.q.q.q.q.4.4.G+H+H+1+Y%Y%Y%Z%{.{.{.{.{.%%=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B o o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r s t u u u v w w x x y y z S S T T >.,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%&%2 + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F H+=.`+`+g@H+H+H+H+H+G+4.q#q#r#O.|#*$}#e$W@w#=%i# %`$k$v$Y$|%A%q%q%q%p%|%Y$F$k$^$B#y# $E%`%b%W%J$ &H%@%@%: : : : T$#%#%[ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%d#d#} } } } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } } } d#d#u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : : c+c+c+< < < < < < < b+b+b+b+K.K.K.K.K.9.r#r#r#r#n n n v.v.q.q.q.q.4.4.G+.&Y%Y%Y%Z%{.{.{.{.{.%%=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B o o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p r.r.r.k.k.a.b.b.b.<.[.[.-.-.-.Q Q R R R q q q r r s t u u u v v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%r.+&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J 6@=.`+`+g@H+H+H+H+H+G+4.4.n n r#< f#C@=#]#@#P$O$C#+$]$i$Z$X$A%q%q%q%q%p%|%Y$i$U%+$V%M%@&#&[#b#y$$&H%[ @%@%: T$T$#%[ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ u%u%d#d#d#} } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } d#d#u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : c+c+c+< < < < < < < b+b+b+b+K.K.K.K.K.9.r#r#r#n n n n v.q.q.q.q.4.9@Y%Y%Y%Z%{.{.{.{.{.%%=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@O B B B o o o o @V m.m.m.m.m. +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r t t u u u v w x x y y z S S T T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%+@9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e c+`+`+g@H+H+H+H+H+G+4.4.q.n r#O.%&{#y$e$*%&&8#i#1$E$a$F$Y$|%q%q%q%q%*&A%X$F$k$^$B#=&s$.%-&b%W%J$ &H%[ @%T$#%#%[ [ [ [ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } } } } } Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%} } } } } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ #%T$T$: : : : : : : : c+c+c+< < < < < < < b+b+b+K.K.K.K.K.9.r#r#r#r#n n n v.q.q.q.<+Y%Y%Y%Z%{.{.{.{.{.%%`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@O B B B o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r s t u u u v w x x x y y S S T T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%W s+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.m `+`+g@H+H+H+H+H+G+4.4.q.q.n K.f%g%_%o#]#%$[$O$A#2%H$j$Y$|%q%q%;&;&*&>&|%Y$j$l$,&'&)&P$!&[#b#y$$&:%[ [ #%#%[ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } } } } Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( ( ( ( ( | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ( ( ( ( ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%} } } } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : c+c+c+< < < < < < b+b+b+b+K.K.K.K.K.9.r#r#r#n n n n v.<+Y%Y%Y%Z%{.{.{.{.{.%%H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.>@>@>@O B B B o o o @V V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0.0.R.R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q Q R R R q q r r r s t u u u v w w x x y y S S T T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&2.{&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . l 4.H+H+G+4.4.q.q.q.q.v.n N K.< )@S%K%T@4$4%O$'&@$k$F$X$>&*&*&^&^&;&*&p%{%|&k$C%D%u&v&w&F%G%c%1&$&_ H%j+_ _ _ _ _ _ _ _ u%d#d#} } } } } } } Q%Q%Q%X X X X X X X X X ( ( ( ( ( ( | | | | | | | | n.n.n.n.n.n.n.`.`.r$r$r$r$r$r$r$r$r$/ / / / / / / / / / / / / / / [@[@[@[@[@[@1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 [@[@[@[@[@/ / / / / / / / / / / / / / / / r$r$r$r$r$r$r$r$r$`.`.n.n.n.n.n.n.n.| | | | | | | | ( ( ( ( ( ( X X X X X X X X Q%Q%Q%Q%} } } } } } } d#d#u%_ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ [ #%T$: : : : : : : c+c+c+< < < < < b+O@x&j&j&y&{.{.{.{.{.c&n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o o V V m.m.m.m. + +y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.:.#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.a.b.b.<.[.-.-.-.;.Q R R R R q q r r s t u u u v w w x x y y S S T T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&u V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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W$z&H+H+G+4.4.q.q.q.q.v.n n N b+T#z$B@b#A&~$B&C&1$-%i$Y$|%>&*&^&;&^&*&>&p%Y$n&-%!%D&E&e&F&g&s&5%$&_ u% &_ _ _ _ _ _ _ u%d#d#} } } } } } } Q%Q%Q%X X X X X X X X ( ( ( ( ( ( | | | | | | | n.n.n.n.n.n.n.`.`.r$r$r$r$r$r$r$/ / / / / / / / / / / / / [@[@[@[@1 1 1 1 1 1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 1 1 1 1 1 [@[@[@[@/ / / / / / / / / / / / r$r$r$r$r$r$r$r$`.`.n.n.n.n.n.n.n.| | | | | | | ( ( ( ( ( ( X X X X X X X X Q%Q%Q%} } } } } } } d#d#u%_ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ #%#%T$: : : : : : : c+c+< < < < G&x&x&x&y&{.{.{.{.{.c&r#n n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+=.=.=.=.=.<+<+~+~+~+~+Q.1+W.W.W.>@>@O B B B o o o @V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.R.p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q R R R R q q r r r t t u u v v w x x y y S S T T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&+@H&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g I&H+G+4.4.q.q.q.q.v.n n n K.b+|#G#&$M@/%E#M%J&,&k$|&Y$A%>&^&^&^&^&*&>&{%F$k$`$ %=&9&.%`%b%c%5%X } & &_ _ _ _ _ u%u%d#} } } } } } } Q%Q%Q%X X X X X X X X ( ( ( ( ( | | | | | | | n.n.n.n.n.n.`.`.r$r$r$r$r$r$r$/ / / / / / / / / / / [@[@[@1 1 1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 1 1 [@[@[@/ / / / / / / / / / / r$r$r$r$r$r$r$`.`.n.n.n.n.n.n.| | | | | | | ( ( ( ( ( X X X X X X X X Q%Q%Q%} } } } } } } d#u%u%_ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ #%T$: : : : : : : c+c+< < G&K&K&x&L&{.{.{.{.{.M&r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.=.<+~+~+~+~+~+1+1+W.W.W.>@>@O B B o o o o V V m.m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0.R.R.p p p r.r.k.k.k.a.b.b.<.[.[.-.-.-.Q Q R R R q q r r r t t u u v v w x x y y z S S T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&P%Z+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.b+G+4.4.q.q.q.q.v.n n n r#b+< N&($o#T@#&P$D#D%^$a$Y$|%>&;&^&O&^&^&*&p%Y$v$B%P&C#)&Q&!&[#b#i&( M } &_ _ _ _ u%u%d#} } } } } } } Q%Q%Q%X X X X X X X ( ( ( ( ( | | | | | | | n.n.n.n.n.`.`.r$r$r$r$r$r$r$/ / / / / / / / / [@[@[@1 1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 1 [@[@[@/ / / / / / / / / r$r$r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | | ( ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } } d#u%u%_ _ _ _ _ _ _ j+[ [ [ [ [ [ [ #%T$T$: : : : : : c+c+G&K&K&K&S&{.{.{.{.{.M&K.9.r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@B B B o o o @V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r r s t u u v v w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&V !@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.9 H+4.4.q.q.q.q.v.n n n r#K.b+%&z$B@=#F%E%9&2$O#U%i$Y$|%>&;&^&O&^&*&>&{%L%T&/&1$U&r%V&-&i%>$i&1&} } _ _ _ _ u%d#} } } } } } } Q%Q%Q%X X X X X X X ( ( ( ( ( | | | | | | n.n.n.n.n.`.`.r$r$r$r$r$r$/ / / / / / / / / [@[@1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$>$>$>$R&R&R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&R&R&>$>$>$>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 [@[@/ / / / / / / / / r$r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | ( ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } } d#u%_ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ #%T$: : : : : : j@W&K&K&S&{.{.{.{.{.M&K.K.K.9.r#r#r#n n n v.q.q.q.q.4.4.H+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o o V V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R q q r r r s t u u u v w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&,.y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W$X&G+4.q.q.q.q.v.n n n r#r#K.O.|#D@7%Y&Z&&&M%C#+$k$|&Y$p%;&^&^&^&^&*&p%`&|&k$C%D%D# *%$.*+*a&5%M & &_ _ u%d#d#} } } } } } Q%Q%Q%X X X X X X X ( ( ( ( | | | | | | n.n.n.n.n.n.`.r$r$r$r$r$r$/ / / / / / / / [@[@1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$R&R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&R&>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 [@[@/ / / / / / / / r$r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } d#d#u%_ _ _ _ _ _ _ j+[ [ [ [ [ [ [ #%T$: : : : @*W&W&W&S&{.{.{.{.{.M&b+b+K.K.K.9.r#r#r#n n n v.q.q.q.q.4.G+H+H+H+H+H+g@`+=.=.=.=.=.<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+#+3.0.0.0..+R.R.p p f.r.r.k.k.a.a.b.b.<.[.-.-.-.;.Q R R R q q r r r s t u u u v w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&#*F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i [@4.4.q.q.q.v.n n n r#r#r#n@< |#G#R@b%t%$*D#D%^$k$L%6&*&^&^&O&O&^&>&p%%*v$-%&*V%**=*f&-*h&i&H.} & &_ u%d#} } } } } } Q%Q%Q%X X X X X X X ( ( ( ( | | | | | | n.n.n.n.n.`.`.r$r$r$r$r$/ / / / / / / [@[@1 1 1 1 1 U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+1 1 1 1 1 [@[@/ / / / / / / r$r$r$r$r$r$`.n.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } d#u%_ _ _ _ _ _ _ j+j+[ [ [ [ [ [ #%T$: : @*W&W&W&;*{.{.{.{.{.M&< b+b+K.K.K.K.9.r#r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o o V V m.m.m.m. +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.#+#+#+#+#+3.0.0.0.0.R.R.p p p r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q R R R R q q r r s t u u u v w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$&%&%6%o%o%P%P%3&3&t&t&>*3&*@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (.u%4.q.q.q.q.n n n r#r#r#9.H#< @%($c%,*#&x$=&1$'*)*Y$p%*&^&^&O&^&*&!*~*Y$z%`$D%{*]*^*`%b%s&5%M } &/*d#d#} } } } } } Q%Q%X X X X X X X ( ( ( ( | | | | | | n.n.n.n.`.`.r$r$r$r$r$/ / / / / / / [@[@1 1 1 1 U+U+U+U+U+U+U+U+U+>$>$>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$>$>$U+U+U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / / r$r$r$r$r$`.`.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%} } } } } } } d#u%_ _ _ _ _ _ _ j+[ [ [ [ [ [ #%T$@*W&W&W&;*{.{.{.{.{.M&< < < b+b+K.K.K.K.9.r#r#r#n n n q.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+~+~+~+~+~+1+1+W.W.>@>@>@O B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R R q q r r s t u u u v w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@P@t#U#8$8$q$&%&%6%o%P%P%P%3&t&t&t&>*(*H.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#< q.q.q.q.v.n n r#r#r#9.K.< f$z$J$W%[#~$9&2$O#U%|&{%>&^&O&O&O&_*;&:*A%|&<*P&[*M%}*!&.*G%i&H.M } /*d#} } } } } } Q%Q%Q%X X X X X X ( ( ( ( | | | | | | n.n.n.n.`.`.r$r$r$r$/ / / / / / / [@[@1 1 1 1 U+U+U+U+U+U+U+U+>$>$>$>$R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&>$>$>$>$U+U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / / r$r$r$r$r$`.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%} } } } } } d#u%_ _ _ _ _ _ _ j+[ [ [ [ [ [ |*1*W&W&;*{.{.{.{.{.M&< < < < b+b+b+K.K.K.K.9.r#r#r#n n v.q.q.q.q.4.4.H+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o @V V m.m.m.m. +y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&t&>*(*Q.X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d&n q.q.q.v.n n n r#r#9.K.H#< f$:%5%l%n#w#**2*+$k$Y$A%>&^&O&O&3*_*^&>&%*v$-%&*U&4*s%5*r&6*i&1&Q%/*d#} } } } } } Q%Q%X X X X X X ( ( ( ( | | | | | | n.n.n.n.`.r$r$r$r$r$/ / / / / / [@[@1 1 1 1 U+U+U+U+U+U+U+>$>$>$>$R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C C C C C C C C C C C C C C C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$>$U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / r$r$r$r$r$`.n.n.n.n.n.| | | | | ( ( ( ( X X X X X X Q%Q%Q%} } } } } d#d#u%_ _ _ _ _ _ j+[ [ [ [ |*7*7*1*;*{.{.{.{.{.8*c+c+< < < < b+b+b+K.K.K.K.9.r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@>@B B B o o o @V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+#+3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r s t u u u v w w x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*k.i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $+q.q.q.v.n n n r#r#r#9.K.H#< )@($0*e$-&E#O$C#a*b*Y$p%*&^&O&3*c*^&;&p%Y$z%`$D%d*]*e*.*+*a&5%f*Q%M } } } } } Q%Q%X X X X X X X ( ( ( | | | | | | n.n.n.n.`.r$r$r$r$r$/ / / / / / [@1 1 1 1 U+U+U+U+U+U+U+>$>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C C C C C C C y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%C C C C C C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$>$U+U+U+U+U+U+U+1 1 1 1 [@/ / / / / / / r$r$r$r$`.n.n.n.n.| | | | | | ( ( ( ( X X X X X X Q%Q%} } } } } } d#u%_ _ _ _ _ _ j+j+[ |*7*7*7*g*{.{.{.{.{.8*: : c+c+< < < < b+b+b+K.K.K.K.9.r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o @V V m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r r t u u u v w w x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.=+,+,+,+,+}+5+5+5+n+n+q+B+B+L+P+P+Y++@+@=@'@_@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*d.j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i.P.q.q.q.v.n n r#r#r#9.K.K.H#c+)@($h*_&4$$*y#i*/&v${%p%*&^&3*c*3*^&;&A%L%k$j*k*l*@&#&g&h&i&H.m*M M } } } } Q%Q%X X X X X X ( ( ( ( | | | | | n.n.n.n.`.r$r$r$r$/ / / / / / [@[@1 1 1 U+U+U+U+U+U+U+>$>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C C C y%y%y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%y%C C C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$>$U+U+U+U+U+U+U+1 1 1 [@[@/ / / / / / r$r$r$r$`.n.n.n.n.| | | | | ( ( ( ( X X X X X X Q%Q%} } } } } } d#u%_ _ _ _ _ _ _ H#7*7*7*g*{.{.{.{.{.8*: : : : c+< < < < < b+b+b+K.K.K.9.r#r#r#n n n q.q.q.q.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@>@B B B o o o V V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0..+R.p p p r.r.k.k.a.a.b.b.<.[.-.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.=+,+,+,+,+}+5+5+5+n+n+q+B+B+L+P+Y+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&9*(*L+B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W$X&q.q.v.n n n r#r#9.K.K.K.H#c+[ J$o#[#%$ $C&&*U%|&{%>&*&3*c*n*3*^&>&{%v$o*,&D&r%p*5*r&s&q*| X M } } } Q%Q%Q%X X X X X ( ( ( ( | | | | | n.n.n.n.`.r$r$r$r$/ / / / / / [@[@1 1 1 U+U+U+U+U+U+>$>$>$>$R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C y%y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%y%C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$>$U+U+U+U+U+U+1 1 1 [@[@/ / / / / / r$r$r$r$`.n.n.n.n.| | | | | ( ( ( ( X X X X X X Q%Q%} } } } } d#u%_ _ _ _ _ o@r*s*7*g*{.{.{.{.{.8*: : : : : c+c+< < < < < b+b+b+K.K.K.9.r#r#r#n n v.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+y+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p r.r.k.k.a.a.b.b.<.[.-.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%6%o%o%P%P%3&3&t&t&>*(*(*q$; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i 1 q.v.n n n r#r#9.K.K.K.H#< : [ 7%b#F%E%]&D&,&k$F$A%>&^&_*n*3*3*;&p%%*t*/&&*=&u*v*w*+*x*n.H.M M } } Q%Q%X X X X X X ( ( ( ( | | | | n.n.n.n.`.`.r$r$r$r$/ / / / / [@[@1 1 U+U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 C C C C C y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y*y*y*y*y*y*y*Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+y*y*y*y*y*y*y*y*] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%C C C C C 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+U+U+1 1 1 [@/ / / / / / r$r$r$r$`.n.n.n.n.| | | | | ( ( ( X X X X X X Q%Q%} } } } } } d#u%_ _ o@r*r*r*g*{.{.{.{.{.8*#%T$: : : : : c+c+< < < < < b+b+K.K.K.K.9.r#r#n n n v.q.q.q.4.4.G+H+H+H+H+`+`+=.=.=.=.<+<+~+~+~+Q.1+1+W.W.>@>@O B B o o o @V V m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.[.-.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*t&*@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (.d#q.v.n n r#r#r#9.K.K.K.< < : :%7%Y&n#&&E&D%^$k$Y$A%*&_*c*n*3*3*;&A%z*z%`$D%)&Q&!&A*x+[@B*X M } } Q%Q%X X X X X X ( ( ( | | | | | n.n.n.n.`.r$r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 2 2 2 C C C C C y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y*y*y*y*Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+y*y*y*y*] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%C C C C 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$U+U+U+U+U+U+1 1 1 [@/ / / / / / r$r$r$`.`.n.n.n.| | | | | ( ( ( ( X X X X X Q%Q%} } } } } } d#u%o@r*r*r*g*{.{.{.{.{.8*[ [ #%T$: : : : : c+c+< < < < b+b+b+K.K.K.K.r#r#r#n n v.q.q.q.q.4.G+H+H+H+H+g@`+`+=.=.=.<+<+~+~+~+~+Q.1+W.W.>@>@>@O B B o o o V V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+#+3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+}+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#8$8$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#c+v.n n n r#r#9.K.K.K.b+< < @%($&$G%/%=*O$D%'*z%Y$p%;&_*n*3*3*^&>&C*z*<*,&J&r%p*D*E*l%i&H.M M } Q%Q%X X X X X ( ( ( ( | | | | n.n.n.n.`.r$r$r$r$/ / / / / [@[@1 1 U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 2 2 C C C C y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] y*y*y*Z+Z+Z+Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+Z+Z+y*y*y*] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%C C C C 2 2 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+U+1 1 1 [@/ / / / / r$r$r$r$`.n.n.n.n.| | | | | ( ( ( X X X X X Q%Q%Q%} } } } } f$F*r*r*g*{.{.{.{.{.8*[ [ [ [ T$: : : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#r#n n v.q.q.q.4.4.G+H+H+H+H+`+`+=.=.=.=.<+<+~+~+~+Q.1+1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+y+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.R.p p f.r.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*W.X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I@r#v.n n r#r#r#K.K.K.K.b+b+f$@%($y$e$5*@&D#1$'*n&Y$p%^&n*n*n*3*^&>&{%v$B%&*U&G*v*H*I*6*`.H.M } Q%Q%X X X X X ( ( ( | | | | | n.n.n.`.`.r$r$r$/ / / / / [@[@1 1 U+U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 C C C C y%y%] ] ] ] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@3 3 3 3 3 3 3 3 3 w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.3 3 3 3 3 3 3 3 3 6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+y*y*y*] ] ] ] ] ] ] ] ] ] ] y%y%y%C C C C 2 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+U+1 1 1 [@/ / / / / r$r$r$r$`.n.n.n.| | | | | ( ( ( X X X X X X Q%Q%} } } E@J*K*F*g*{.{.{.{.{.8*[ [ [ [ [ #%T$: : : : : : c+< < < < < b+b+K.K.K.K.9.r#r#n n n q.q.q.q.4.G+H+H+H+H+g@`+`+=.=.=.<+<+~+~+~+~+Q.1+W.W.>@>@O B B o o o @V V m.m.m. + +y+y+y+y+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*<.i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > v.n n r#r#r#9.K.K.K.b+b+< : z$($y$i%t%P$=&o&U%|&{%!*3*3*n*n*3*^&L*%*M*/& %{* *N*0&+*a&B*X f*Q%X X X X X X ( ( ( | | | | | n.n.n.`.r$r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] ] ] ] y*y*y*Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@3 3 3 3 3 w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.3 3 3 3 6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] ] ] y%y%C C C C 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+U+1 1 [@[@/ / / / / r$r$r$`.n.n.n.n.| | | | ( ( ( X X X X X X Q%Q%} E@J*J*J*g*{.{.{.{.{.8*_ j+[ [ [ [ [ #%T$: : : : : c+c+< < < < < b+b+K.K.K.9.r#r#r#n n v.q.q.q.4.4.G+H+H+H+H+`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o V V m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%6%o%o%P%P%3&3&t&t&>*(*(*(*(*O*j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 n n n r#r#9.K.K.K.K.b+b+f$: z$m%P*r&%$9&(&!%l$Q*p%;&3*3*n*n*3*^&!*%*z%`$D%R*S*!&T*U*i&H.( f*X X X X X X ( ( ( | | | | n.n.n.n.`.r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@3 3 3 3 w.w.w.w.w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.w.w.w.w.w.w.3 3 3 6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] ] y%y%C C C C 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 1 [@/ / / / / r$r$r$r$`.n.n.n.| | | | ( ( ( ( X X X X X Q%V*J*J*J*W*{.{.{.{.{.8*_ _ _ [ [ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#n n n v.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+B+B+L+P+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*q+y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X*Y*n n r#r#r#9.K.K.K.b+b+< f$: z$m%W%[#E%9&2$+$k$L%p%^&3*3*n*n*Z*^&!*Y$z%P&[*`* =D*T*6*`..=( X X X X X ( ( ( ( | | | | n.n.n.`.r$r$r$r$/ / / / / [@1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@3 3 w.w.w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&+=+=+=+=+=+=+=+=+=+=+={ { { { { { { { { { { +=+=+=+=+=+=+=+=+=+=+=X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.w.w.w.3 3 3 6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 1 [@/ / / / r$r$r$r$`.n.n.n.| | | | | ( ( ( X X X X f#J*J*J*W*{.{.{.{.{.8*_ _ _ _ j+[ [ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+K.K.K.K.r#r#r#n n v.q.q.q.4.4.G+H+H+H+H+`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#8$8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=+@$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.#=n n r#r#9.K.K.K.b+b+b+< f$: H%1&W%[#.%r%2*,&b*z*>&^&3*3*n*c*c*^&p%z*b*,&$=%=p*&=I*a&*=( H.X X X X ( ( ( | | | | | n.n.n.`.r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@3 3 3 w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&X&X&+=+=+=+=+={ { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { +=+=+=+=+=X&X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 [@/ / / / / r$r$r$`.n.n.n.n.| | | | ( ( ( X X f#====J*W*{.{.{.{.{.8*u%_ _ _ _ _ j+[ [ [ [ [ [ T$: : : : : : c+< < < < b+b+b+K.K.K.9.r#r#n n n v.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+Q.1+W.W.W.>@>@O B B o o o V V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R R q r r r t t u u v w w x y y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=_@% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i.3@n r#r#r#9.K.K.K.b+b+< f$f$: _ 1&b#F%.%7&C#-=T&%*>&^&3*n*;=n*n*^&p%z*<*>=,=r%^*w*b%'=`.| H.X X X ( ( ( | | | | | n.n.n.`.r$r$r$/ / / / / [@1 1 U+U+U+U+U+>$>$R&R&^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+6@6@6@6@6@6@6@6@3 3 w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&+=+=+=+={ { { { { { { { { { { { { { { { { { { { { )=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)={ { { { { { { { { { { { { { { { { { { { { +=+=+=X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@6@6@Z+Z+Z+y*y*] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$U+U+U+U+U+1 1 1 [@/ / / / r$r$r$r$`.n.n.n.| | | | ( ( ( f#======!={.{.{.{.{.8*} d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+K.K.K.K.9.r#r#n n v.q.q.q.4.4.G+H+H+H+g@`+`+=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@O B B o o o V V m.m.m. + +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.a.b.<.<.[.-.-.-.Q R R R R q r r r t t u u v w w x y y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=t#G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.~ n r#r#9.K.K.K.b+b+b+< f$f$@%_ 1&G%F%s%M%C#`$n&{%>&^&3*n*;=n*c*;&p%Q*U%&*{=]=w&.*+*'=`.| H.X X ( ( ( | | | | n.n.n.n.`.r$r$r$/ / / / [@1 1 1 U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] y*Z+Z+Z+Z+6@6@6@6@6@6@6@3 3 w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&+=+=+={ { { { { { { { { { { { { { )=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)={ { { { { { { { { { { { { { +=+=+=X&X&X&X&X&X&X&w.w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@6@Z+Z+Z+y*y*] ] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 [@/ / / / r$r$r$r$`.n.n.n.| | | | ( ^=/=====!={.{.{.{.{.8*} } } u%_ _ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+< < < < < b+b+K.K.K.9.r#r#n n n v.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.a.b.<.<.[.-.-.-.Q R R R R q r r r t t u u v w w x y y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+}+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&>*(*(*(*(*~=q$@@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.{ r#r#r#9.K.K.K.b+b+< < < f$T$_ y$e$-&E#M%D%(=v${%>&3*3*;=;=n*c*;&p%|&_=&*=&v&:=T*h&x*`.| H.X ( ( ( | | | | n.n.n.`.r$r$r$r$/ / / / [@1 1 U+U+U+U+U+>$>$R&R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@6@3 3 w.w.w.w.w.w.X&X&X&X&X&X&X&+=+={ { { { { { { { { { { { )=)=)=)=)=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)=)=)=)=)={ { { { { { { { { { { { +=+=X&X&X&X&X&X&X&w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@Z+Z+Z+Z+y*] ] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&>$>$U+U+U+U+U+1 1 [@/ / / / / r$r$r$`.n.n.n.| | | D@/=/=/=!={.{.{.{.{.8*} } } } d#u%_ _ _ _ _ _ [ [ [ [ [ [ T$: : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#n n v.q.q.q.4.4.H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+Q.1+W.W.>@>@>@B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p f.r.k.k.a.a.b.b.<.[.-.-.-.Q R R R R q r r r t t u u v w w x y y z S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%P%3&t&t&t&9*(*(*(*@=~=P%a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4@w.r#r#9.K.K.K.b+b+b+< < < f$[ $&h*e$-&e&u& %-%|&A%;&^&c*;=n*n*c*;&~*<=_= %[=Q&!&}=|=[@`.H.X ( ( ( | | | | n.n.n.`.r$r$r$/ / / / / [@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@6@6@3 3 w.w.w.w.w.w.X&X&X&X&X&X&+=+={ { { { { { { { { { )=)=)=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)=)={ { { { { { { { { { +=+=X&X&X&X&X&X&X&w.w.w.w.w.3 3 6@6@6@6@6@6@6@Z+Z+Z+y*y*] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ R&R&>$>$U+U+U+U+1 1 1 [@/ / / / r$r$r$`.n.n.n.| D@1=1=/=2={.{.{.{.{.8*Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+K.K.K.9.r#r#n n n q.q.q.q.4.G+H+H+H+H+`+`+=.=.=.<+<+~+~+~+Q.1+1+W.W.>@>@O B B o o @V V m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p f.r.k.k.a.a.b.b.<.[.-.-.-.Q R R R q q r r r t t u u v w x x y y z S T T T ,.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@=@'@_@_@7@7@i@i@H@P@P@t#U#8$8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=3&x.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.y%r#r#9.K.K.K.b+b+< < < f$T$[ $&h*b%-&3${*1$-%v${%;&^&n*n*n*n*c*;&~*M*/&3=)&}*4=-*U*[@`.H.X ( ( | | | | n.n.n.`.r$r$r$/ / / / / [@1 1 U+U+U+U+>$>$R&R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@3 3 w.w.w.w.w.X&X&X&X&X&X&+=+={ { { { { { { { { )=)=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)={ { { { { { { { { +=+=X&X&X&X&X&X&w.w.w.w.w.3 3 6@6@6@6@6@6@Z+Z+Z+y*y*] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&>$>$U+U+U+U+U+1 1 [@/ / / / r$r$r$`.n.n.5=1=1=1=2={.{.{.{.{.8*X X Q%} } } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+< < < < b+b+b+K.K.K.r#r#r#n n v.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@O B B o o o V V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.p p p f.r.r.k.a.a.b.b.<.[.-.-.-.Q R R R q q r r r t t u u v w x x y y z S T T T ,.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=>*9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . s+6=r#r#K.K.K.b+b+b+< < < f$: H% &y$b%-&P$d*&*U%|&A%;&c*n*;=;=n*^&7=8=M*/&3=l* =4=E*6*[@| H.( ( | | | | n.n.n.`.r$r$r$/ / / / [@1 1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 2 C C y%y%] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@3 3 w.w.w.w.w.X&X&X&X&X&+=+={ { { { { { { { )=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)={ { { { { { { { +=+=X&X&X&X&X&X&w.w.w.w.w.3 3 6@6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+1 1 [@/ / / / r$r$r$`.5=9=9=1=2={.{.{.{.{.8*X X X Q%Q%} } } } } d#_ _ _ _ _ _ [ [ [ [ [ [ T$: : : : : c+c+< < < < b+b+K.K.K.9.r#r#n n n q.q.q.4.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.0.0.0.0.R.p p p f.r.r.k.a.a.b.b.<.[.-.-.-.Q R R R q q r r r t t u u v w x x y y z S T T T ,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+n+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&>*(*(*(*(*~=~=(*m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.U+r#9.K.K.K.b+b+< < < < c+: H%$&h*b%-&P$i#>=<*L%A%^&n*n*;=;=n*c*7=0=t*a='&b= =c=r&6*d=| .=( ( | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C C y%] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@3 w.w.w.w.w.X&X&X&X&X&+=+={ { { { { { { { )=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)={ { { { { { { { +=X&X&X&X&X&X&w.w.w.w.3 3 6@6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] ] y%C C 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ R&R&>$>$U+U+U+U+1 1 [@/ / / / r$r$($e=9=9=2={.{.{.{.{.8*( X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+< < < < b+b+K.K.K.K.r#r#r#n n v.q.q.q.4.G+H+H+H+H+`+`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@>@B B o o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.a.a.b.b.<.[.-.-.-.Q R R R q q r r r t u u u v w x x y y S S T T T ,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%P%3&t&t&t&9*(*(*(*@=~=~=~=6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f=r$r#K.K.K.K.b+b+< < < < c+@%H%$&h*b%f& *i#>=k$L%p%^&n*n*;=;=c*g=!*%*t*-=[*h=p&&=r&6*d=.=.=( | | | | n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 C C C y%] ] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@3 3 w.w.w.w.X&X&X&X&X&+=+={ { { { { { { )=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)={ { { { { { { +=+=X&X&X&X&X&w.w.w.w.w.3 6@6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] y%y%C C 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ R&>$>$U+U+U+U+1 1 [@/ / / / ($j=j=e=2={.{.{.{.{.8*( ( X X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ T$: : : : : c+c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B B o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.a.a.b.b.<.[.-.-.;.Q R R R q q r r r t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+}+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+| 9.K.K.K.b+b+< < < < c+: [ H%$&h*b%k=]*U&>=<*L%p%c*n*n*;=n*l=Z*!*%*b*-=$=h=m=&=I*6*[@.=.=| | | | n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+>$>$R&R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%y%] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@3 3 w.w.w.w.X&X&X&X&X&+={ { { { { { { )=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=i=i=i=i=i=i=i=D D D D D D D D D D D D D D D D D D D D D D D i=i=i=i=i=i=i=i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)={ { { { { { { +=+=X&X&X&X&w.w.w.w.w.3 6@6@6@6@6@6@Z+Z+y*y*] ] ] ] ] ] y%C C C 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ R&>$>$U+U+U+U+1 1 [@/ / m%n=j=j=o={.{.{.{.{.8*| | ( ( X X X X X Q%} } } } } d#_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+< < < < b+b+K.K.K.9.r#r#n n n q.q.q.4.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.b.<.[.-.-.;.Q R R R q q r r r t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@=@'@_@_@7@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=y*. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p=X 9.K.K.K.b+b+< < < < c+@%@%H% &h*r&k= *U&+$k$Y$!*c*n*;=;=l=c*c*!*`&<*P&D&4*^*w*+*a&*=.=`.| | | n.n.n.`.r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@3 3 w.w.w.w.X&X&X&X&+=+={ { { { { { )=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=i=D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D i=i=i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.g.g.)=)=)=)=)={ { { { { { { +=X&X&X&X&X&w.w.w.w.3 6@6@6@6@6@6@Z+Z+y*] ] ] ] ] ] y%y%C C 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ R&>$>$U+U+U+U+1 1 [@m%n=n=n=o={.{.{.{.{.8*| | | ( ( ( X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%: : : : : c+c+< < < b+b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+`+=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o V V m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=[@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . q=m*K.K.K.b+b+b+< < < c+c+: @%[ &h*I*!& *i#+$k$%*!*c*n*;=;=l=;=c*p%z*B%>=,=G*r=w*s='=*=r$`.| | n.n.n.`.r$r$r$/ / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C y%y%] ] ] ] ] ] y*Z+Z+6@6@6@6@6@3 3 w.w.w.w.X&X&X&X&+=+={ { { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D t=t=t=t=t=t=t=t=D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.g.g.)=)=)=)=)={ { { { { { +=X&X&X&X&X&w.w.w.w.3 6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] y%C C 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ R&>$>$U+U+U+U+1 J$u=n=n=v={.{.{.{.{.8*n.| | | | ( ( ( X X X X Q%Q%} } } } d#u%_ _ _ _ _ [ [ [ [ [ #%T$: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+H+`+`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o o V V m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q q r r s t u u u v w x x y z S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+n+n+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=w=x+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J `.K.K.K.b+b+< < < < c+c+: @%H%$&P*I*!& *i#>=k$Y$!*c*n*n*;=;=n*c*p%z*<*x=,=]=r=y=+*'=*=r$| | n.n.n.`.r$r$r$/ / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&+=+={ { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=D D D D D D D D D D D D D D D D D D t=t=t=t=t=t=_._._._._._._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._._._._._._._.t=t=t=t=t=t=D D D D D D D D D D D D D D D D D i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.)=)=)=)=)={ { { { { { +=X&X&X&X&X&w.w.w.w.3 6@6@6@6@6@Z+Z+y*] ] ] ] ] ] y%C C C 2 2 2 2 2 x+x+^ ^ ^ ^ ^ R&>$>$U+U+U+z=A=A=u=v={.{.{.{.{.B=`.n.n.| | | | ( ( X X X X X Q%} } } } } u%_ _ _ _ _ j+[ [ [ [ [ #%: : : : : c+< < < < b+b+b+K.K.K.r#r#n n n q.q.q.4.4.H+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o o @V m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q q r r s t u u v v w x x y z S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h >$K.K.K.b+b+< < < < c+: @%@%H%$&i&r&F& *i#>=C=Y$!*c*n*n*;=;=n*_*p%D=o*&*{=v&:=E=+*F=[@`.| | n.n.`.r$r$r$/ / / / [@1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%] ] ] ] ] ] y*Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&+=+={ { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D D D D D D D t=t=t=_._._._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._._.t=t=t=t=D D D D D D D D D D D D D D i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.)=)=)=)={ { { { { { +=X&X&X&X&w.w.w.w.3 3 6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] y%C C 2 2 2 2 2 x+x+^ ^ ^ ^ ^ R&>$>$U+z=A=A=A=v={.{.{.{.{.B=r$`.n.n.n.| | | | ( ( X X X X Q%Q%} } } } d#u%_ _ _ _ _ [ [ [ [ [ #%T$: : : : c+c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B o o o @V m.m.m. + +y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q q r r s t u u v v w x y y z S S T T ,.,.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*(*~=~=~=~=w=P.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W$y%K.K.b+b+b+< < < c+c+: : @%[ G=a&r&F& *i#>=z%Y$!*c*n*;=;=;=n*_*p%D=H=&*d*v&k=}=I=>$r$`.| n.n.`.r$r$r$/ / / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C C y%] ] ] ] ] y*Z+Z+Z+6@6@6@6@3 3 w.w.w.X&X&X&X&+=+={ { { { { )=)=)=)=)=g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D D D D D t=t=t=_._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._.t=t=t=D D D D D D D D D D D D i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.g.)=)=)=)={ { { { { { +=X&X&X&X&w.w.w.w.3 6@6@6@6@6@Z+Z+y*] ] ] ] ] ] y%C C 2 2 2 2 2 x+x+^ ^ ^ ^ ^ R&>$7%A=A=A=v={.{.{.{.{.B=/ r$r$`.n.n.n.| | | ( ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ [ T$: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+`+=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B o o o @V m.m.m. + +y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.k.k.a.a.b.<.<.[.-.-.;.Q R R R q q r r s t u u v w w x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=~=, . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;@w.K.K.b+b+< < < < c+: : : @%H%} x*i%F&P$i#J=b*%*!*c*n*;=K=;=n*_*C*|&L= %[=Q&k=M=I=N=r$`.n.n.n.`.r$r$/ / / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] ] ] ] ] ] y*Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&+={ { { { { )=)=)=)=g.g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D D D t=t=_._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=P=P=P=P=P=P=P=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._.t=t=t=D D D D D D D D D D D i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.)=)=)=)={ { { { { { +=X&X&X&X&w.w.w.3 3 6@6@6@6@Z+Z+Z+y*] ] ] ] ] y%C C 2 2 2 2 2 x+x+^ ^ ^ ^ ^ 5%A=A=A=v={.{.{.{.{.B=/ / r$r$r$`.n.n.| | | | ( ( X X X X X Q%} } } } d#u%_ _ _ _ _ [ [ [ [ [ #%T$: : : : c+c+< < < b+b+b+K.K.9.r#r#n n n q.q.q.4.G+H+H+H+H+`+`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=Q=; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i.R=K.K.b+b+< < < < c+: : : @%[ Q%c%i%F&P$i#>=b*Y$!*c*l=;=K=;=n*^&C*Q*L= %u&}*k=M=U*N=r$*=n.n.`.r$r$r$/ / / [@1 1 U+U+U+U+>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] ] ] ] ] ] y*Z+Z+6@6@6@6@6@3 w.w.w.X&X&X&X&+={ { { { { )=)=)=)=g.g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D D D D t=t=_._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=O=O=P=P=P=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 P=P=P=P=P=O=O=O=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._.t=t=D D D D D D D D D D i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.)=)=)=)={ { { { { +=+=X&X&X&w.w.w.w.3 6@6@6@6@6@Z+Z+y*] ] ] ] ] y%C C 2 2 2 2 2 x+x+^ ^ ^ q*S=A=A=T={.{.{.{.{.B=/ / / / r$r$r$`.n.n.| | | | ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ [ T$: : : : : c+< < < < b+b+K.K.K.9.r#r#n n q.q.q.4.4.H+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R q q r r t t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+n+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@i@P@P@t#U#8$8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=t&m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.*@K.b+b+b+< < < c+c+: : : @%_ Q%c%i%F&P$U=,&b*Y$!*c*l=K=;=;=c*^&C*M*/&V=l*S*W=X=U*N=r$*=n.`.r$r$r$/ / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] ] ] ] ] y*y*Z+Z+6@6@6@6@3 w.w.w.w.X&X&X&+=+={ { { { { )=)=)=)=g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D D D t=t=_._.*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=P=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 P=P=P=P=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D D i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.)=)=)=)={ { { { { +=X&X&X&X&w.w.w.3 6@6@6@6@6@Z+Z+y*] ] ] ] ] y%C C 2 2 2 2 2 x+x+^ q*S=S=S=T={.{.{.{.{.Y=1 [@/ / / / r$r$`.n.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ _ [ [ [ [ [ #%: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R q r r r t t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=w=o%Z=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 K.b+b+< < < < c+: : : : @%`=M i&b%t%P$U=>=b*Y$p%g=;=;=;=;=c*7=C*t*a='&b= -&=.-U*N=/ *=n.`.r$r$/ / / / [@1 U+U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] ] ] ] ] y*Z+Z+6@6@6@6@6@3 w.w.w.X&X&X&X&+={ { { { { )=)=)=)=g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D t=_._.*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 P=P=P=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.)=)=)=)={ { { { { +=X&X&X&w.w.w.w.3 6@6@6@6@Z+Z+y*] ] ] ] ] y%C C 2 2 2 2 2 x+y$S=S=S=T={.{.{.{.{.Y=U+1 1 [@/ / / r$r$r$`.n.n.| | | | ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ #%T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q r r r t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=U#K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z.K.b+b+< < < < c+: : : : @%j+$&i&b%t%Q&=&>=<*Y$p%c*;=;=;=;=c*^&%*t*-=k*b= -W=.-U*N=/ *=`.r$r$r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ ^ x+2 2 2 2 2 C C y%] ] 2 +-+-@-#-#-#-#-#-#-#-#-$-w.w.X&X&X&+=+={ { { { )=)=)=)=g.g.g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D D t=_._.*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 6 6 6 P=P=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.)=)=)={ { { { { +=X&X&X&X&w.w.w.3 6@6@6@6@Z+Z+y*] ] ] ] ] ] C C 2 2 2 2 x*%-%-S=T={.{.{.{.{.Y=U+U+U+1 1 [@/ / / r$r$r$n.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ j+[ [ [ [ [ T$: : : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o o V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R q q r r r t u u u v w x x y z S S T T ,.,.d.d.2.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=~=~=w=w=_@y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > K.b+b+< < < c+c+: : : : [ j+$&5%b%`%}*=&&*<*z*7=Z*;=;=;=;=c*^&%*&--=$=%=p&c=.-6*F=/ *=r$r$r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] 2 *-*-*-=-=-=-=-=-------;-X&X&X&+={ { { { { )=)=)=g.g.g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D t=_._.*@*@*@*@*@*@*@*@*@*@O=O=O=O=P=P=6 6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 6 P=P=P=O=O=O=O=*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.)=)=)=)={ { { { +=+=X&X&X&w.w.w.3 6@6@6@6@Z+Z+Z+y*] ] ] ] ] C C 2 2 x*>->-%-T={.{.{.{.{.Y=>$U+U+U+U+1 [@/ / / / r$r$`.n.n.n.| | | ( ( X X X X Q%Q%} } } } u%_ _ _ _ _ j+[ [ [ [ #%: : : : : c+< < < < b+b+K.K.K.9.r#r#n n q.q.q.4.4.H+H+H+H+`+`+=.=.=.<+~+~+~+~+1+1+W.>@>@O B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v v w x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+n+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=w=w=B+j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - b+b+b+< < < c+c+: : : : [ _ $&5%h&`%}*{*&*B%z*:*Z*;=;=;=l=c*^&%*T&P&$=,-m='-I*6*F=*=`.r$r$/ / / / [@1 U+U+U+U+>$>$^ ^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] ] y*y%*-=-=-=-=-=-----------$-X&+={ { { { )=)=)=)=g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=t=_.*@*@*@*@*@*@*@*@*@O=O=O=O=P=P=6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 P=P=O=O=O=O=*@*@*@*@*@*@*@*@*@_._.t=D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.)=)=)={ { { { { +=X&X&X&w.w.w.3 6@6@6@6@6@Z+Z+y*] ] ] ] y%C C x*)-!-S=~-{.{.{.{.{.Y=R&>$>$U+U+U+1 1 [@/ / / r$r$r$`.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n v.q.q.4.4.H+H+H+H+`+`+=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w w x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=,+g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b b+b+< < < < c+: : : : : :&_ $&5%h&&=e&)& %B%Q*L*c*;=;=;=;=c*!*`&T&{-]-]=^-'-/-N+F=x*r$r$r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C y%] ] ] ] ] y*Z+Z+] =-=-=-=---------------$-{ { { { )=)=)=)=g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=_._.*@*@*@*@*@*@*@*@O=O=O=O=P=P=6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 P=P=O=O=O=*@*@*@*@*@*@*@*@*@_.t=t=D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.)=)=)=)={ { { { +=X&X&X&w.w.w.w.3 6@6@6@6@Z+Z+y*] ] ] ] (-_-:-<-[-~-{.{.{.{.{.Y=^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$`.n.n.n.| | | ( ( X X X X Q%Q%} } } } u%_ _ _ _ _ [ [ [ [ [ T$: : : : c+c+< < < b+b+b+K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=e.E+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . & b+b+< < < < c+: : : : T$:&H% &5%b#E=p*l*}-U%D=L*c*;=;=;=;=c*^&`&T&{-]-|-^*'-/-N+/ x*r$r$/ / / / 1 1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C C ] ] ] ] ] y*Z+Z+6@6@] =-=-------------1-2-2-3-{ { )=)=)=g.g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=_._.*@*@*@*@*@*@*@*@O=O=O=P=P=6 6 6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+6 6 6 6 6 6 6 6 P=P=O=O=O=*@*@*@*@*@*@*@*@_._.t=D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.)=)=)={ { { { +=X&X&X&X&w.w.w.3 6@6@6@6@Z+Z+y*2 4-5-u=6-:-7-W*{.{.{.{.{.Y=^ ^ ^ ^ R&>$U+U+U+U+1 [@/ / / / r$r$`.n.n.| | | ( ( ( X X X X Q%} } } } d#_ _ _ _ _ j+[ [ [ [ #%: : : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@i@P@P@t#U#8$8$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=x 7.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e c+b+< < < c+c+: : : : T$[ H% &5%s&E=s%M%D%/&D=p%_*n*;=;=;=8-^&`&C=J=U=]=r=w*I*N+'=[@[@r$/ / / [@1 U+U+U+U+>$R&^ ^ ^ ^ ^ x+2 2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@6@y*------------1-2-2-2-2-3-)=)=)=g.g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=_.*@*@*@*@*@*@*@*@O=O=O=P=P=6 6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+6 6 6 6 6 6 6 P=O=O=O=O=*@*@*@*@*@*@*@_._.t=D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.)=)=)={ { { { +=+=X&X&X&w.w.w.3 6@6@6@6@9-0-a-a-u=b-b-6-c-{.{.{.{.{.Y=x+^ ^ ^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$r$n.n.n.| | | ( ( X X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.r.k.k.a.b.<.<.[.-.-.;.Q R R R q q r r t t u u v w x x y z S S T T >.,.d.d.2.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+n+q+B+L+L+P+Y+Y++@=@'@_@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=;.W$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j T$b+< < < c+c+: : : : T$[ H% &1&a&.*v*E&'&E$Q*p%_*n*;=;=;=8-^&%*T&J=,=|-r=y=I*>$[@[@r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@6@3 w.Z+--------1-2-2-2-2-d-d-Z+)=g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=D D D D D D D t=_.*@*@*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.{+{+{+{+{+{+6 6 6 6 6 6 P=P=O=O=O=*@*@*@*@*@*@*@_._.t=D D D D D D D i=i=~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.)=)=)={ { { { { +=X&X&X&w.w.w.3 C e---*-*-*-u=b-<-f-g-{.{.{.{.{.Y=2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 1 / / / / r$r$`.n.n.| | | ( ( ( X X X Q%Q%} } } } u%_ _ _ _ _ [ [ [ [ [ T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q r r r t u u u v w x x y z S S T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ m*b+< < < c+: : : : : #%[ H%_ 1&>$g&E%r%[*h-<=p%_*;=;=;=K=8-^&`&T&{-,=]=^*E=$->$1 [@r$/ / / [@1 U+U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] ] y*Z+6@6@6@6@3 w.w.w.6@----1-2-2-2-i-j-j-j-j-k-l-l-l-l-l-m-~ ~ ~ ~ ~ ~ ~ i=i=D D D D D D D t=_._.*@*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.-+-+-+-+-+-+o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.-+-+-+-+-+-+C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.{+{+{+{+{+6 6 6 6 6 6 6 P=O=O=O=*@*@*@*@*@*@*@_._.t=D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.)=)=)=)={ { { { +=X&X&X&w.n-o-=-=-=-=-*-p-q-Y={.{.{.{.{.{.{.Y=2 2 2 x+^ ^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$r$n.n.n.| | | ( ( X X X X Q%} } } } d#_ _ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.b.b.<.[.[.-.-.Q Q R R q q r r s t u u v v w x y y z S T T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W$^ < < < < c+: : : : T$#%[ H%_ M '=g&!&u*D&a=M*p%_*n*;=;=K=8-^&r-T&{-,=]=r=E=$-|=1 [@/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ x+2 2 2 2 2 C y%] ] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&6@1-2-2-2-2-d-s-{.{.{.{.{.{.{.{.{.{.t-~ ~ ~ ~ ~ i=i=D D D D D D t=_._.*@*@*@*@*@*@O=O=O=P=P=6 6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.P.) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.-+-+-+-+o.o.o.o.o.o.o.o.o.o.m m m m m m m m m m m m m m m m m m m m m m m m m m m m m o.o.o.o.o.o.o.o.o.o.o.-+-+-+-+C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.{+{+{+{+{+6 6 6 6 6 6 P=O=O=O=*@*@*@*@*@*@*@_.t=t=D D D D D D i=i=~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.)=)=)={ { { { +=I=u---------=-=-S=v-g-{.{.{.{.{.{.{.{.Y=2 2 2 2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 1 / / / / r$r$`.n.n.| | | ( ( X X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ #%: : : : : c+< < < b+b+b+K.K.9.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w w x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.)+< < < < c+: : : : T$#%[ H%_ M a&r&#&]*U&j*t*0=_*n*;=K=K=8-^&r-t*j*,=|-w-x-$-x+1 [@/ / / [@1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&X&+=w.2-2-2-d-d-d-:-{.{.{.{.{.{.{.{.{.{.t-~ ~ i=i=i=D D D D D D t=_.*@*@*@*@*@*@*@O=O=P=P=6 6 6 6 6 6 {+{+{+{+P.P.P.P.P.P.P.) ) ) ) ) ) ) ) 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.-+-+-+o.o.o.o.o.o.o.m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m o.o.o.o.o.o.o.-+-+-+C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.{+{+{+{+6 6 6 6 6 6 P=P=O=O=*@*@*@*@*@*@*@_.t=D D D D D D i=i=i=~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.)=)=)={ { y-z-1-----------A-B-{.{.{.{.{.{.{.{.{.{.Y=C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+U+1 [@/ / / r$r$`.n.n.n.| | | ( ( X X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < < b+b+K.K.9.r#r#n n v.q.q.4.4.H+H+H+H+`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=Q=m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Q+< < < c+c+: : : : T$[ [ H%_ $&i&b%5*Q&C-J=z%0=^&n*;=K=K=8-_*C*t*-=D-|-^*x-I*E-1 F=F=/ [@1 1 U+U+U+>$>$^ ^ ^ ^ ^ x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@6@3 w.w.X&X&X&+={ { w.2-d-d-d-F-F-:-{.{.{.{.{.{.{.{.{.{.t-i=i=D D D D D D t=_.*@*@*@*@*@*@*@O=O=P=P=6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.) ) ) ) ) ) ) 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.-+-+o.o.o.o.o.o.m m m m m m m m m m m m m m m m m m m m m m m m ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' m m m m m m m m m m m m m m m m m m m m m m m m o.o.o.o.o.o.-+-+C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 ) ) ) ) ) ) ) ) P.P.P.P.P.P.{+{+{+{+6 6 6 6 6 6 P=O=O=O=*@*@*@*@*@*@_._.t=D D D D D D i=i=~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.)=G-H-2-2-2-2-1---I-J-K-{.{.{.{.{.{.{.{.{.{.{.Y=] y%C 2 2 2 2 2 x+^ ^ ^ ^ R&>$>$U+U+U+1 1 / / / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } d#_ _ _ _ _ [ [ [ [ [ T$: : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.4.4.H+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0.R.R.p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v w x x y z S S T T >.,.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=U#K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . L-< < < c+c+: : : : #%[ [ H%_ Q%i&+*5*@&d*M-b*%*^&l=;=K=K=;=Z*C*t*N-D-|-^*x-I*E-1 F=/ / [@1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] ] y*Z+6@6@6@6@3 w.w.w.X&X&+={ { { { X&d-d-F-F-F-F-:-{.{.{.{.{.{.{.{.{.{.t-D D D D D t=t=_.*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.) ) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.C.C.-+-+-+o.o.o.o.o.m m m m m m m m m m m m m m m m ' ' ' ' ' Q+Q+Q+Q+Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+Q+Q+Q+Q+' ' ' ' ' m m m m m m m m m m m m m m m m o.o.o.o.o.-+-+-+C.C.C.C.C.C.C.C.7 7 7 7 7 ) ) ) ) ) ) ) P.P.P.P.P.P.{+{+{+{+{+6 6 6 6 6 P=O=O=O=*@*@*@*@*@*@_.t=D D D D D D i=i=~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.O-z-d-d-d-2-2-2-P-Q-{.{.{.{.{.{.{.{.{.{.{.{.{.R-] ] ] C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( ( X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ T$: : : : c+c+< < < b+b+K.K.K.r#r#n n v.q.q.q.4.H+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+z+l+l+l+l+:.:.:.:.2+#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u u v w x x y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=,+J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . % < < < c+: : : : : #%[ [ [ H%Q%5%h&w*p*R*&*B%`&!*c*K=K=K=;=c*:*D=/&k*%=S-q&T-x+U+F=/ / 1 1 U+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&+={ { { { )=)=X&F-F-F-F-F-U-:-{.{.{.{.{.{.{.{.{.{.t-D D D t=_.*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.) ) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.C.C.-+-+o.o.o.o.m m m m m m m m m m m m m m ' ' ' Q+Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+Q+' ' ' m m m m m m m m m m m m m m o.o.o.o.-+-+C.C.C.C.C.C.C.C.7 7 7 7 7 ) ) ) ) ) ) P.P.P.P.P.P.{+{+{+{+6 6 6 6 6 6 P=O=O=*@*@*@*@*@*@_._.t=D D D D D i=i=i=~ ~ ~ ~ ~ ~ )+V-W-F-F-F-F-d-d-X-Y-{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.Z-] ] ] ] y%C C 2 2 2 2 x+^ ^ ^ ^ ^ >$>$U+U+U+1 1 / / / r$r$r$n.n.n.| | | ( ( X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+z+l+l+l+l+:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p r.r.k.k.a.b.<.<.[.-.-.;.Q R R R q r r r t u u v v w x y y z S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=~=~=w=w=w=w=w=R X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j [ < < c+: : : : T$#%[ [ [ H%Q%5%6*.*V&`* %_=z*!*c*K=K=K=;=;=7=`-_=}-l* =D*.-x+N+F=F=[@1 U+U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&X&+={ { { )=)=)=g.{ F-F-F-U-U- ;6-{.{.{.{.{.{.{.{.{.{.t-D t=_.*@*@*@*@*@*@O=O=P=P=6 6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.C.-+-+o.o.o.o.m m m m m m m m m m m m ' ' ' Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E E E E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+' ' ' m m m m m m m m m m m m o.o.o.o.-+-+C.C.C.C.C.C.C.7 7 7 7 7 ) ) ) ) ) ) P.P.P.P.P.{+{+{+{+6 6 6 6 6 P=P=O=O=*@*@*@*@*@*@_.t=D D D D D D i=i=~ ~ ~ g..;+;U-U-F-F-F-F-@;#;{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;k-I=Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < b+b+K.K.K.9.r#n n v.q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.a.b.<.[.[.-.-.Q Q R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ X < < c+: : : : T$#%[ [ [ H%} H.a&r&e*4*'&/&Q*:*c*K=K=K=%;;=^&8=C=&;*;S*f&E*U*U+U+/ [@1 U+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+6@6@6@6@3 w.w.X&X&X&+={ { { )=)=)=g.g.g.{ F-U-U- ; ; ;6-{.{.{.{.{.{.{.{.{.{.t-_.*@*@*@*@*@O=O=O=P=6 6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.-+-+o.o.o.o.m m m m m m m m m m m ' ' Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E E E E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E E E E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+' ' m m m m m m m m m m m o.o.o.o.-+-+C.C.C.C.C.C.7 7 7 7 7 ) ) ) ) ) ) P.P.P.P.P.{+{+{+{+6 6 6 6 6 P=O=O=O=*@*@*@*@*@_.t=D D D D D D i=i==;-; ; ; ; ;U-U-i-;;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.>;,;6@6@6@Z+y*] ] ] ] y%C C 2 2 2 2 x+x+^ ^ ^ R&>$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } d#_ _ _ _ _ [ [ [ [ #%T$: : : : c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m. + +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=`.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.^ < < c+: : : : T$[ [ [ [ H%} H.i&r&!&]=D&a=M*:*Z*;=K=K=%;';);C*&-{-U=v&:=!;I=N+F=[@1 1 U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&+={ { { { )=)=g.g.g.g.g.)=U- ; ; ; ; ;6-{.{.{.{.{.{.{.{.{.{.t-*@*@*@*@O=O=P=6 6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.C.-+o.o.o.o.m m m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m m m m m m o.o.o.o.-+C.C.C.C.C.C.C.7 7 7 7 ) ) ) ) ) ) P.P.P.P.P.{+{+{+{+6 6 6 6 P=P=O=O=*@*@*@*@*@_._.t=D D D ~;{;z-z- ; ; ; ;];^;/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.(;_;:;w.3 6@6@6@Z+Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#u%_ _ _ _ [ [ [ [ [ T$: : : : c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m. + +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r t t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.R=< < c+: : : : T$[ [ [ [ j+ &1&i&+*D*Q&U&,&z%C*c*;=K=K=%;';);<;t*a=$=]=r=y=$-N+F=[@1 U+U+U+>$>$R&^ ^ ^ x+x+2 2 2 2 C C ] ] ] ] ] Z+Z+6@6@6@3 w.w.w.X&X&+={ { { { )=)=)=g.g.g.g.)+)+g. ; ; ; ; ;z-6-{.{.{.{.{.{.{.{.{.{.t-*@*@O=O=P=6 6 6 6 6 {+{+{+P.P.P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.-+-+o.o.o.m m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m m m m m o.o.o.-+-+C.C.C.C.C.C.7 7 7 7 ) ) ) ) ) P.P.P.P.P.P.{+{+{+6 6 6 6 6 P=O=O=*@*@*@*@*@*@_.t=[;};z-z-z-z-z- ;|;Z-{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.1;2;X&X&w.w.w.3 6@6@6@Z+Z+] ] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ R&>$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X X Q%} } } d#u%_ _ _ _ j+[ [ [ [ T$: : : : c+< < < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m. +y+y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u u v w x y y z S T T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=(*b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ' < < c+: : : : T$[ [ [ [ j+ &M i&G%q&}*{*!%b*r-_*;=K=K=%;';);L*Q*3;D-%=^-'-$-x+U+>$1 U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+6@6@6@6@3 w.w.X&X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ g. ; ; ;z-z-z-4;{.{.{.{.{.{.{.{.{.{.t-O=O=P=6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.-+o.o.o.o.m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 8 E E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+, , , , , , , , , , 5;5;5;5;5;5;5;5;5;5;5;5;, , , , , , , , , , F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E E 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m m m m o.o.o.o.-+C.C.C.C.C.C.7 7 7 7 ) ) ) ) ) P.P.P.P.P.{+{+{+{+6 6 6 6 P=O=O=O=*@*@*@4 6;7;7;z-z-z-z-8;v-9;{.{.{.{.{.{.{.{.{.{.{.{.{.{.0;a;{ { +=X&X&X&w.w.3 6@6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ T$: : : : c+< < < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.R.p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r s t u u v w w x y y S S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=t#y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - < c+c+: : : : #%[ [ [ [ j+ &M 5%6*E=p*)& %B%z*^&;=K=%;%;';8-!*D=H=b;c;d;e;f;1@>$1 1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C C ] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&+={ { { )=)=)=g.g.g.g.g.)+~ ~ ~ ~ g. ;z-z-z-z-z-4;{.{.{.{.{.{.{.{.{.{.t-6 6 6 6 6 {+{+{+P.P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.-+o.o.o.m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+, , , , , 5;5;5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;5;5;5;, , , , , F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m m m m o.o.o.-+C.C.C.C.C.C.7 7 7 7 ) ) ) ) ) P.P.P.P.P.{+{+{+6 6 6 6 6 P=O=O=g;h;i;i;i;7;7;z-j;0;{.{.{.{.{.{.{.{.{.{.{.{.{.{.K-k;l;)=)={ { { +=X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$n.n.n.| | ( ( ( X X X Q%} } } } d#_ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.<.<.[.-.-.Q Q R R q q r r s t u u v w x x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+}+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=,+E+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . % < c+c+: : : : #%[ [ [ [ j+ &} H.s&E*m;%=n;/&D=!*8-K=%;%;o;8-!*p;o*&*[=d;q;E*1@>$>$U+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+6@6@6@6@w.w.w.X&X&+={ { { { )=)=g.g.g.g.g.)+)+~ ~ ~ ~ ~ z&z-z-z-z-z-z-4;{.{.{.{.{.{.{.{.{.{.t-6 6 6 {+{+{+P.P.P.P.P.) ) ) ) ) 7 7 7 C.C.C.C.C.C.-+o.o.o.m m m m m m m m ' Q+Q+8 8 8 8 8 8 8 8 8 E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+, , , 5;5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;5;5;, , , F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 8 8 8 8 8 8 8 Q+Q+' m m m m m m m m o.o.o.-+C.C.C.C.C.C.7 7 7 ) ) ) ) ) P.P.P.P.P.{+{+{+6 6 6 6 r;s;t;t;i;i;i;i;u;v;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.Z-z-g.g.g.)=)={ { { { +=X&X&w.w.w.6@6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ ^ >$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.3.0.0..+R.p p f.r.r.k.a.a.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=Q X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H [ c+c+: : : : #%[ [ [ [ _ _ } 1&'=I*:=]=D&a=<=L*c*K=%;%;w;;=_*%*x;x=y;z;A;M=I=|=>$U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C C y%] ] ] y*Z+Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=~ z-z-z-z-7;7;B;{.{.{.{.{.{.{.{.{.{.t-{+{+{+{+P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.-+o.o.o.m m m m m m m ' ' Q+8 8 8 8 8 8 8 8 8 E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+, , 5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 &.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;5;, , F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 8 8 8 8 8 8 8 Q+' ' m m m m m m m o.o.o.-+C.C.C.C.C.7 7 7 7 ) ) ) ) ) P.P.P.P.{+{+{+C;D;E;F;F;G;t;t;i;H;I;{.{.{.{.{.{.{.{.{.{.{.{.{.{.J;K;Z+)+g.g.g.g.)=)=)={ { { +=X&X&X&w.w.3 6@6@6@Z+Z+y*] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#u%_ _ _ _ [ [ [ [ #%: : : : c+c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R R q q r r t u u u v w x y y z S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=q.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.F=c+c+: : : T$#%[ [ [ [ _ _ &M x*+*D*Q&{=P&t*p%_*;=%;%;w;;=_*L;x;P&M;N;O;X=I=x+R&N+U+U+>$R&^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+6@6@6@6@w.w.w.X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ ~ ~ ~ ~ i=D D ~ z-z-7;7;i;i;B;{.{.{.{.{.{.{.{.{.{.t-{+P.P.P.P.P.) ) ) ) 7 7 7 7 C.C.C.C.C.-+o.o.o.m m m m m m m ' ' Q+8 8 8 8 8 8 8 8 E E E E F+F+F+F+F+F+F+F+F+F+F+F+, , 5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 &.&.&.&.I.I.I.I.I.I.I.I.I.I.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.I.I.I.I.I.I.I.I.I.I.&.&.&.&.9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;, , F+F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 8 8 8 8 8 8 Q+Q+' m m m m m m m o.o.o.-+C.C.C.C.C.7 7 7 7 ) ) ) ) P.P.P.P.A*P;F;F;F;F;F;F;Q;R;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.S;s;~ ~ ~ )+)+g.g.g.g.)=)=)={ { { +=X&X&w.w.w.3 6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 1 [@/ / r$r$r$n.n.| | | ( ( X X X X Q%} } } d#u%_ _ _ _ [ [ [ [ #%T$: : : c+c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u v w w x y y S S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=#=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3@c+c+: : : T$#%[ [ [ [ _ _ &} .=x+w*p*[=x=T&%*_*;=%;%;w;o;_*C*T;j*,=U;V;E=I*x+N+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 C C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=g.g.g.g.g.)+~ ~ ~ ~ ~ ~ i=i=D D D ~ 7;7;i;i;i;i;B;{.{.{.{.{.{.{.{.{.{.t-P.P.P.P.) ) ) ) 7 7 7 7 C.C.C.C.-+-+o.o.m m m m m m m ' Q+Q+8 8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+F+F+, , 5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 &.&.&.I.I.I.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.I.I.I.&.&.&.9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;, , F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 8 8 8 8 8 Q+Q+' m m m m m m m o.o.-+-+C.C.C.C.C.7 7 7 ) ) ) ) C;W;X;Y;Y;F;F;F;Z;`; >{.{.{.{.{.{.{.{.{.{.{.{.{.{..>+>z&~ ~ ~ ~ ~ ~ )+g.g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+Z+y*] ] ] y%C C 2 2 2 x+x+^ ^ ^ ^ >$>$U+U+U+1 [@/ / / r$r$n.n.n.| | ( ( X X X X Q%} } } } u%_ _ _ _ [ [ [ [ #%T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+1+1+W.>@>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y y S S T T ,.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=t&@>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - c+c+: : : T$#%[ [ [ [ _ _ &} .=6*T*m;%=}-<*`-!*8-%;%;w;;=#>L*t*N-$>%>w-&>I**>N+N+U+>$R&^ ^ ^ ^ x+2 2 2 2 C C ] ] ] ] y*Z+6@6@6@6@w.w.w.X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=D D D D t=i=i;i;i;i;i;t;=>{.{.{.{.{.{.{.{.{.{.t-P.) ) ) ) ) 7 7 7 C.C.C.C.C.-+o.o.o.m m m m m m ' Q+Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+F+F+, , 5;5;9 9 9 9 9 9 9 9 9 9 9 &.&.I.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.I.&.&.9 9 9 9 9 9 9 9 9 9 9 9 5;5;, F+F+F+F+F+F+F+F+F+F+F+E E E 8 8 8 8 8 8 8 Q+Q+' m m m m m m m o.o.-+C.C.C.C.C.7 7 7 ) ->;>X;X;Y;Y;Y;Y;>>,>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.'>)>D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)=)={ { { +=X&X&w.w.w.3 6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ j+[ [ [ #%T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+1+1+W.>@>@O B B o o V V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.<.[.[.-.-.Q R R R q q r r s t u u v w x x y z S T T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=5+@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f !>: : : : T$#%[ [ [ j+_ _ _ &H.a&r&!&]=$=~>Q*L*;=%;w;w;o;#>L*<=~>k*%=S-H*T-*>^ N+U+>$R&^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&X&{ { { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=D D D D D _.*@D i;i;i;t;t;G;{>{.{.{.{.{.{.{.{.{.{.t-) ) ) 7 7 7 7 C.C.C.C.-+-+o.o.m m m m m m ' ' Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 9 9 9 9 9 &.&.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.&.&.&.9 9 9 9 9 9 9 9 9 9 5;5;, F+F+F+F+F+F+F+F+F+F+E E E 8 8 8 8 8 8 8 Q+Q+' m m m m m m o.o.o.-+C.C.C.C.! ^>};};X;X;X;X;/>(>/;{.{.{.{.{.{.{.{.{.{.{.{.{.{._>:>_.t=D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+Z+] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+1+1+W.>@>@O B o o o V V m.m. + +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.-.Q R R R q q r r t u u u v w x y y z S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=0./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i m*: : : : T$#%[ [ [ j+_ _ _ &f*i&+*&=Q&C-P&t*C*Z*';w;w;o;;=L*D=L=V=<> -e;Y *>^ U+>$>$R&^ ^ ^ x+x+2 2 2 C C y%] ] ] y*Z+Z+6@6@6@w.w.w.X&X&+={ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ ~ i=D D D D D t=_.*@*@D i;t;t;G;F;F;{>{.{.{.{.{.{.{.{.{.{.t-) 7 7 7 C.C.C.C.C.-+o.o.m m m m m m m ' Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 9 9 9 &.&.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>]>]>]>]>]>]>> > > > > > > > > > > > > > > > > > > > > > > > > > > > > > ]>]>]>]>]>]>]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.&.&.9 9 9 9 9 9 9 9 9 9 5;, , F+F+F+F+F+F+F+F+F+E E E 8 8 8 8 8 8 8 Q+' ' m m m m m m o.o.-+C.[>}>|>|>};};};X;1>2>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.3>4>*@*@*@t=D D D D D i=i=~ ~ ~ ~ ~ )+g.g.g.g.g.)=)={ { { +=X&X&w.w.w.6@6@6@6@Z+y*] ] ] ] C C 2 2 2 x+x+^ ^ ^ ^ >$>$U+U+1 1 [@/ / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+=.=.=.<+<+~+~+~+1+W.W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u v w x x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=[@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.6@: : : : T$#%[ [ [ j+_ _ _ &Q%`.l%.*p&l*&;C=%*Z*;=w;w;w;;=7=z*_=5>6>d;W=!;y%1@N+>$>$^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] y*Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=D D D D t=_.*@*@*@*@t=t;G;F;F;F;F;7>{.{.{.{.{.{.{.{.{.{.t-7 7 C.C.C.C.C.-+o.o.m m m m m m ' Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 9 9 &.&.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>]>]>> > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > ]>]>]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.&.&.9 9 9 9 9 9 9 9 5;5;, , F+F+F+F+F+F+F+F+E E E 8 8 8 8 8 8 8 Q+' m m m m m m 8>9>0>0>|>|>|>|>a>b>g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.c>d>O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+=.=.=.<+<+~+~+~+1+W.W.>@>@B B o o o V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=e>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 : : : : T$[ [ [ [ j+_ _ _ _ m*B*6*T*N*U;'&L=Q*7=;=w;w;w;';Z*8=C=M-*;f>k=!;$-^ N+>$R&^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&+={ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D t=_.*@*@*@*@*@O=_.F;F;F;F;F;F;7>{.{.{.{.{.{.{.{.{.{.t-C.C.C.C.-+o.o.o.m m m m m ' ' Q+8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 9 9 &.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>> > > > > > > > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > > > > > > > > ]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.&.&.9 9 9 9 9 9 9 9 5;, , F+F+F+F+F+F+F+F+E E E 8 8 8 8 8 8 Q+' ' m m g>h>i>0>0>0>0>|>j>k>{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-l>m>6 6 P=O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { +=X&X&w.w.w.6@6@6@Z+Z+y*] ] ] y%C 2 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$n.n.n.| | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.R.p p r.r.k.k.a.b.<.<.[.-.-.Q R R R q q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=U## . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z=: : : : T$[ [ [ [ j+_ _ _ _ Q%H.a&b%D*n>,=-=M*:*c*o;w;w;';Z*C*t*{-M;o>N*X=$-1@N+|=R&^ ^ ^ x+x+2 2 2 C C y%] ] ] y*Z+6@6@6@3 w.w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D D t=*@*@*@*@*@O=O=P=*@F;F;F;F;F;Y;p>{.{.{.{.{.{.{.{.{.{.t-C.C.-+o.o.m m m m m m ' Q+8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 9 &.&.I.I.I.^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>> > > > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > > > > ]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+I.I.I.I.&.9 9 9 9 9 9 9 9 5;5;, F+F+F+F+F+F+F+F+E E E 8 8 8 8 8 8 q>r>i>i>i>i>i>i>s>'>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.t>P;{+{+6 6 6 6 P=O=*@*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+y*] ] ] ] C C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | ( ( X X X X Q%} } } d#_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p p r.r.k.a.a.b.<.[.-.-.-.Q R R R q q r r t u u v v w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=T A.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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(._ : : : T$[ [ [ [ j+_ _ _ _ Q%X `.l%w*p&[=&*T&C*Z*o;w;u>o;;=L*v>N-D-U;w>'-$-1@N+>$R&^ ^ ^ x+x+2 2 2 C C ] ] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D t=_.*@*@*@*@O=O=P=6 6 *@F;F;F;Y;Y;Y;p>{.{.{.{.{.{.{.{.{.{.t--+o.o.m m m m m m ' Q+8 8 8 8 8 8 E E F+F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 &.&.I.I.I.^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>> > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+$+$+$+$+l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l $+$+$+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > > > ]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+I.I.I.&.&.9 9 9 9 9 9 9 5;5;, F+F+F+F+F+F+F+F+E E 8 8 m x>h>y>y>z>z>i>i>A>(;{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;B>C>P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+Z+] ] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ >$>$U+U+1 1 / / / r$r$`.n.n.| | ( ( X X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0..+R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w==.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I t+: : : T$[ [ [ [ j+_ _ _ _ d#X B*a&}=^*E&V=_=p;^&;=o;u>o;;=D>E>F>G>%=H>I>f;C |=>$^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=O=P=6 6 6 6 O=F;Y;Y;Y;Y;X;p>{.{.{.{.{.{.{.{.{.{.J>o.m m m m m ' ' Q+8 8 8 8 8 E E E F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 &.&.I.I.I.^+^+^+^+^+^+^+^+]>]>]>]>]>]>> > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+l l l l l l l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l l l l l l l $+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > ]>]>]>]>]>]>^+^+^+^+^+^+^+^+I.I.I.I.&.9 9 9 9 9 9 9 5;5;, F+F+F+F+F+F+F+E K>L>y>y>y>y>y>y>M>N>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.O>P>) ) P.P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.w.6@6@6@Z+Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ >$>$U+U+U+1 [@/ / r$r$`.n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o V V m.m. + +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+}+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=*@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X*D : : : T$[ [ [ [ j+_ _ _ _ d#M H.i&;-f&v&D&a=<=L*8-o;u>u>%;Z*8=Q>R>`*d;S>T>C x+|=^ ^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+Z+6@6@3 w.w.X&X&X&{ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D t=*@*@*@*@*@O=P=6 6 6 6 {+{+O=Y;Y;Y;X;X;X;p>{.{.{.{.{.{.{.{.{.{.U>m m m m ' Q+8 8 8 8 8 8 E E F+F+F+F+F+F+F+F+, 5;9 9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+^+^+]>]>]>]>]>]>> > > > > > > > $+$+$+$+$+$+$+$+$+l l l l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l l l l $+$+$+$+$+$+$+$+$+$+> > > > > > > > ]>]>]>]>]>^+^+^+^+^+^+^+^+I.I.I.&.9 9 9 9 9 9 9 5;, , F+F+F+V>W>X>h>y>y>y>y>i>Y>$;{.{.{.{.{.{.{.{.{.{.{.{.{.{.Z>`> ,7 ) ) ) ) P.P.P.P.{+{+6 6 6 6 P=O=O=*@*@*@*@_.D D D D D i=~ ~ ~ ~ ~ )+)+g.g.g.)=)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C C 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.<.[.-.-.Q R R R q q r r t u u u v w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=9*.,. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 : : : T$#%[ [ [ j+_ _ _ _ d#} X `.h&+,p*u&J=T&r-);;=u>u>%;);8=x;M-d*z;O;X=y%x+x+^ ^ ^ ^ x+2 2 2 C C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=O=P=6 6 6 {+{+{+P.6 Y;X;X;X;X;};@,{.{.{.{.{.{.{.{.{.{.U>m m ' Q+8 8 8 8 8 8 E E F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+^+^+]>]>]>]>]>> > > > > > > $+$+$+$+$+$+$+$+$+l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l l l $+$+$+$+$+$+$+$+> > > > > > > ]>]>]>]>]>^+^+^+^+^+^+^+^+I.I.I.&.9 9 9 9 9 9 9 5;, #,$,h>h>h>h>h>y>%,&,{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.*,=,C.C.7 7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 6 O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] ] C C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+1+1+W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.a.b.<.[.-.-.;.Q R R R q r r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+B+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=B+J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#: : : T$#%[ [ [ j+_ _ _ _ d#} M H.'=T*w&-,V=F>%*_*;=u>u>w;;=<;;,j*,=>,V;&>$-I=x+^ ^ ^ x+x+2 2 2 C C ] ] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=P=6 6 6 {+{+{+P.P.P.6 X;X;X;};};};j;{.{.{.{.{.{.{.{.{.{.U>' Q+8 8 8 8 8 E E E F+F+F+F+F+F+, , 5;9 9 9 9 9 9 &.&.I.I.^+^+^+^+^+^+^+^+]>]>]>]>> > > > > > > $+$+$+$+$+$+$+$+l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 0 0 0 ,,,,,,,,,,,,,,,,,,,,F F F F F F F F F F ,,,,,,,,,,,,,,,,,,,,0 0 0 0 0 0 0 0 0 0 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l $+$+$+$+$+$+$+$+> > > > > > > ]>]>]>]>]>^+^+^+^+^+^+^+I.I.I.&.9 9 9 9 V>',),),X>h>h>h>!,~,{,{.{.{.{.{.{.{.{.{.{.{.{.{.{.k>],o.-+C.C.C.C.7 7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+)+g.g.g.)=)=)={ { { X&X&X&w.w.6@6@6@Z+Z+] ] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y z S T T T ,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=p /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . q=M : : T$#%[ [ [ j+_ _ _ _ d#} M X x*+*c=Q&U=a=Q*L*8-u>u>w;;=D>D=(=k*^,S-H*f;I=x+^ ^ ^ x+x+2 2 2 C y%] ] ] ] Z+Z+6@6@6@w.w.X&X&X&{ { { )=)=)=g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=O=6 6 6 6 {+{+P.P.P.P.) {+X;X;};};|>|>j;{.{.{.{.{.{.{.{.{.{.U>8 8 8 8 8 E E F+F+F+F+F+F+F+, 5;9 9 9 9 9 9 9 &.I.I.^+^+^+^+^+^+^+]>]>]>]>]>> > > > > > $+$+$+$+$+$+$+l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 0 ,,,,,,,,F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F ,,,,,,,,0 0 0 0 0 0 0 ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l $+$+$+$+$+$+$+> > > > > > > ]>]>]>]>^+^+^+^+^+^+^+I.I.&.&./,(,_,_,_,_,),X>:,<,{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.[,},m m o.o.-+C.C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@*@t=D D D D i=i=~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+H+`+`+=.=.<+<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+3.3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q Q R R q q r r t t u u v w x y y z S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=H.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.{ : : T$#%[ [ [ j+_ _ _ _ d#} } X `.U*y=V&R*&;T&C*);o;u>w;|,Z*p;o*}-c;1,S>f;2,3,1@^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=P=6 6 6 {+{+{+P.P.P.) ) ) {+};};|>|>|>|>j;{.{.{.{.{.{.{.{.{.{.U>8 8 8 E E F+F+F+F+F+F+F+, 5;9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+]>]>]>]>]>> > > > > > $+$+$+$+$+$+l l l l l l ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 ,,,,,,F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F ,,,,,,0 0 0 0 0 ; ; ; ; ; ; ; ; ; ; ; l l l l l l $+$+$+$+$+$+$+> > > > > > ]>]>]>]>^+^+^+^+^+^+4,5,6,7,_,_,_,_,8,9,0,{.{.{.{.{.{.{.{.{.{.{.{.{.{.a,b,' m m m m m o.o.-+C.C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+6 6 6 6 O=O=*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ >$>$U+U+1 1 / / / r$r$n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+H+`+=.=.=.<+<+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.-.Q R R R q q r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F : : T$#%[ [ [ j+_ _ _ _ d#} } M .=6*r&k=c,$=/&D=_*';o;w;o;Z*L;x;M-y;d,e,T>$-3,^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=P=6 6 6 6 {+{+P.P.P.) ) ) ) 7 P.};|>|>|>0>0>j;{.{.{.{.{.{.{.{.{.{.U>8 E E F+F+F+F+F+F+, 5;5;9 9 9 9 9 &.&.I.I.^+^+^+^+^+^+]>]>]>]>]>> > > > > $+$+$+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 ,,,,F F F F F F F F F F F F F F F F F T+T+T+T+T+T+f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,T+T+T+T+T+T+F F F F F F F F F F F F F F F F F ,,,,,,0 0 0 0 ; ; ; ; ; ; ; ; ; ; l l l l l l $+$+$+$+$+$+> > > > > > ]>]>]>]>^+&.g,(,6,6,6,6,6,7,h,R-{.{.{.{.{.{.{.{.{.{.{.{.{.{.i,j,k,8 8 Q+' m m m m m o.o.-+C.C.C.C.7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@t=D D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)=)={ { { X&X&w.w.w.6@6@6@Z+y*] ] ] ] C C 2 2 2 x+^ ^ ^ ^ >$>$U+U+1 1 / / / r$r$`.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+K.K.K.r#r#n n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o V V m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y z S T T T ,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=L+@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j [ : : #%[ [ [ j+_ _ _ _ d#} } M ( d=s=w* =*;J=&-<;#>o;w;o;#>L*;,a=,=l,V;E=$-y%1@^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { )=)=)=g.g.g.)+)+~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=P=6 6 6 {+{+P.P.P.P.) ) ) 7 7 7 ) |>|>|>0>0>i>j;{.{.{.{.{.{.{.{.{.{.U>E F+F+F+F+F+F+, 5;9 9 9 9 9 9 &.I.I.^+^+^+^+^+^+^+]>]>]>]>> > > > > $+$+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; ; 0 0 0 0 ,,,,,,F F F F F F F F F F F F F T+T+T+T+f,f,f,f,- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - f,f,f,f,T+T+T+T+F F F F F F F F F F F F F F ,,,,0 0 0 0 ; ; ; ; ; ; ; ; ; l l l l l $+$+$+$+$+$+> > > > > > ]>m,n,o,6,6,6,6,6,p,q,{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.S;r,E E 8 8 8 8 Q+' m m m m m o.o.-+C.C.C.7 7 7 ) ) ) ) P.P.P.{+{+6 6 6 6 O=O=*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@Z+Z+] ] ] ] y%C 2 2 2 x+x+^ ^ ^ R&>$U+U+1 1 / / / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : c+c+< < < b+K.K.K.r#r#n n q.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=o . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.^ : : #%[ [ [ j+_ _ _ _ d#} } } f*`.6*E*s,,-V=_=%*Z*';w;w;t,u,E>H=G><>v,H*I*y%1@^ ^ x+2 2 2 C C ] ] ] ] Z+Z+6@6@6@w.w.X&X&X&{ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=P=6 6 6 {+{+{+P.P.P.) ) ) ) 7 7 C.C.) |>0>0>i>i>i>j;{.{.{.{.{.{.{.{.{.{.U>F+F+F+F+F+, 5;9 9 9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>]>> > > > > $+$+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; 0 0 0 0 ,,,,F F F F F F F F F F F F T+T+T+f,f,f,- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - f,f,f,T+T+T+F F F F F F F F F F F ,,,,0 0 0 0 ; ; ; ; ; ; ; ; ; l l l l $+$+$+$+$+$+> > I.w,(,x,o,o,o,6,6,j,y,{.{.{.{.{.{.{.{.{.{.{.{.{.{.z,A,' F+F+F+E E 8 8 8 8 Q+' m m m m m o.o.-+C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+6 6 6 P=O=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : c+c+< < < b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+1+W.>@>@O B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.<.<.[.-.-.Q R R R q q r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=-+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 : : #%[ [ [ [ _ _ _ _ d#} } } Q%| [@+*&=S*M;j*B,L*#>w;w;o;Z*8=C,D,*;E,W=E*y*2 1@^ x+2 2 2 C C ] ] ] ] Z+Z+6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=*@*@*@*@O=O=P=6 6 6 {+{+P.P.P.P.) ) ) 7 7 7 C.C.C.F,0>0>i>i>i>i>G,{.{.{.{.{.{.{.{.{.{.U>F+F+F+, 5;9 9 9 9 9 &.I.I.I.^+^+^+^+^+]>]>]>]>> > > > > $+$+$+$+$+$+l l l l ; ; ; ; ; ; ; ; 0 0 0 0 ,,,,F F F F F F F F F F T+T+T+f,f,- - - - - - - - - - - - - - - - - - - - - - - - - H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,- - - - - - - - - - - - - - - - - - - - - - - - f,f,f,T+T+F F F F F F F F F F F ,,,,0 0 0 ; ; ; ; ; ; ; ; l l l l l $+$+$+I,J,x,x,x,x,x,o,K,S;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.L,M,, F+F+F+F+F+F+E E 8 8 8 8 Q+' m m m m m o.-+C.C.C.C.7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)=)={ { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.R.p p r.r.k.a.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=6%V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.: : #%[ [ [ [ _ _ _ _ d#} } } Q%| d=6*}=w-N,}-C=%*Z*o;w;u>;=O,B,j*P,l,N*y=Z+2 1@x+x+2 2 2 C y%] ] ] y*Z+Z+6@6@3 w.w.X&X&+={ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@*@O=P=6 6 6 {+{+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.7 i>i>i>i>z>y>Q,{.{.{.{.{.{.{.{.{.{.U>F+, 5;9 9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>]>> > > > > $+$+$+$+$+l l l l ; ; ; ; ; ; ; ; 0 0 0 ,,,,F F F F F F F F F T+T+f,f,f,- - - - - - - - - - - - - - - - - H,H,H,H,H,H,H,H,H,H,H,a a a a a a a a a a a a a a a a a a a a a a a a a H,H,H,H,H,H,H,H,H,H,- - - - - - - - - - - - - - - - - - f,f,T+T+F F F F F F F F F F ,,0 0 0 0 ; ; ; ; ; ; ; l l l &.M,R,R,R,R,R,x,),S,/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.I;T,9 9 9 5;, F+F+F+F+F+F+E 8 8 8 8 8 Q+' m m m m o.o.-+C.C.C.C.7 7 ) ) ) P.P.P.P.{+{+6 6 6 P=O=O=*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@>@B B o o @V m.m. + +y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y S S T T >.,.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=Q /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.( : #%[ [ [ [ _ _ _ _ u%} } } Q%H.| [@;-e;v&,=-=D=L*|,w;u>t,u,E>U,G>^,S-'-f;2 1@x+x+2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { )=)=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D t=_.*@*@*@O=O=P=6 6 6 {+{+P.P.P.P.) ) ) 7 7 C.C.C.C.-+o.m C.i>i>i>z>y>y>Q,{.{.{.{.{.{.{.{.{.{.U>5;9 9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>> > > > > $+$+$+$+$+l l l l ; ; ; ; ; ; ; 0 0 0 ,,,,F F F F F F F F F T+T+f,f,- - - - - - - - - - - - - - - H,H,H,H,H,H,a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a H,H,H,H,H,H,H,- - - - - - - - - - - - - - - f,f,T+T+F F F F F F F F ,,,,0 0 0 ; ; ; ; ; ; V,W,(,(,(,R,R,R,X,Y,{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.Z,#,&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+{+6 6 6 O=O=*@*@*@*@_.D D D D i=i=~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+`+`+=.=.<+~+~+~+Q.1+W.W.>@O B B o o V m.m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q q r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=x+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D : T$[ [ [ [ _ _ _ _ u%} } } Q%X H.`.6*E=^-l*`,x;L;);o;u>t,Z*8=C=R> 'd;.'T>y*2 I=x+2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&{ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D _.*@*@*@*@O=O=6 6 6 {+{+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.o.m m C.i>z>y>y>y>y>Q,{.{.{.{.{.{.{.{.{.{.U>9 9 9 9 &.I.I.^+^+^+^+^+]>]>]>]>> > > > $+$+$+$+$+l l l l ; ; ; ; ; ; ; 0 0 0 ,,,,F F F F F F F F T+T+f,f,- - - - - - - - - - - - H,H,H,H,H,H,a a a a a a a a a a a a a a a a a a a a a a a +'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'a a a a a a a a a a a a a a a a a a a a a a a a H,H,H,H,H,- - - - - - - - - - - - - f,f,T+T+F F F F F F F F ,,0 0 0 ; @'#'$'$'$'$'(,(,z>%'g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.c>8,^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 8 Q+m m m m m o.o.C.C.C.C.7 7 ) ) ) P.P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { +=X&X&w.w.3 6@6@Z+Z+] ] ] ] C C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=Q=J%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b : T$[ [ [ [ _ _ _ _ u%} } } Q%X H.| [@;-W=v&,=a=D=_*|,u>o;#>L*B,&'M;v&*'&>Z+2 x+x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&X&{ { { )=)=g.g.g.g.)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) ) 7 7 C.C.C.-+o.o.m m m m -+y>y>y>y>y>y>='{.{.{.{.{.{.{.{.{.{.U>9 9 &.I.I.^+^+^+^+^+]>]>]>> > > > > $+$+$+$+$+l l l ; ; ; ; ; ; ; 0 0 0 ,,F F F F F F F F T+T+f,f,- - - - - - - - - - - H,H,H,H,H,a a a a a a a a a a a a a a a a +'+'+'+'-'-'-'-'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@-'-'-'-'-'-'+'+'+'+'+'a a a a a a a a a a a a a a a a H,H,H,H,- - - - - - - - - - - - f,f,T+F F F F F F F F ,,;'>','$'$'$'$'$''')'{.{.{.{.{.{.{.{.{.{.{.{.{.{.0,!'~'^+^+^+^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 6 O=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ )+)+g.g.g.)=)=)={ { +=X&X&w.w.3 6@6@Z+Z+] ] ] ] C C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+1+1+W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y S S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=N.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D+_ T$[ [ [ [ j+_ _ _ u%} } } Q%Q%X H.`.|=y=^-N,&;C=C*);o;o;;=_*E>{'D-^,^-]'f;y%I=x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D t=_.*@*@*@O=O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.m m m m m Q+m y>y>y>y>y>y>='{.{.{.{.{.{.{.{.{.{.U>&.I.I.^+^+^+^+^+]>]>]>> > > > > $+$+$+$+l l l l ; ; ; ; ; ; 0 0 0 ,,F F F F F F F F T+f,f,- - - - - - - - - - - H,H,H,H,a a a a a a a a a a a a a +'+'+'-'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@-'-'-'-'+'+'+'a a a a a a a a a a a a a H,H,H,H,- - - - - - - - - - - f,T+T+F F F ^'/'('('_'_',',':'<'{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.t>[']>]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 9 5;F+F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 ) ) ) P.P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.3 6@6@6@Z+y*] ] ] C C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m. + +y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q q r r t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.y*T$#%[ [ [ j+_ _ _ u%} } } Q%Q%X X | [@/-c=z;P,&'Q*D>;=o;o;);8=x;R>[=d;S>T>y%I=y%2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D t=*@*@*@*@O=P=6 6 6 {+{+P.P.P.P.) ) ) 7 7 C.C.C.-+o.o.m m m m ' Q+8 m y>y>y>y>h>h>='{.{.{.{.{.{.{.{.{.{.U>I.^+^+^+^+^+]>]>]>> > > > $+$+$+$+$+l l l ; ; ; ; ; ; 0 0 0 ,,F F F F F F F T+T+f,- - - - - - - - - - - H,H,H,a a a a a a a a a a a +'+'+'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@= = = = = = = m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@-'-'+'+'+'a a a a a a a a a a a H,H,H,H,- - - - - - - - - - f,,,}'|'('('('('('('1'I;{.{.{.{.{.{.{.{.{.{.{.{.{.{.J;2'Z.> > > > ]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+F+E 8 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=O=*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+g.g.g.g.)=)={ { { X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ #%: : : : c+< < < b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@O B B o o V m.m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=$+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > : #%[ [ [ j+_ _ _ u%d#} } } Q%X X H.*=|=T*r=%=b;C=8=#>t,o;;=L*3'&'M;N;4'&>y*C y%2 2 2 C y%] ] ] Z+Z+6@6@3 w.w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D _.*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 m y>y>h>h>h>h>='{.{.{.{.{.{.{.{.{.{.U>^+^+^+^+]>]>]>> > > > $+$+$+$+l l l l ; ; ; ; ; ; 0 0 ,,,,F F F F F F T+T+f,- - - - - - - - - - H,H,H,a a a a a a a a a a +'+'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@= = = = = = = = = = = = = 5'5'5'5'5'5'5'5'5'5'5'5'5'5'5'= = = = = = = = = = = = = m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@-'-'+'+'a a a a a a a a a a H,H,H,H,- - - - - - 6'7'8'('('('('('9'0'{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.a'b'$+$+$+> > > > > ]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+{+6 6 6 O=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+c+< < < b+K.K.K.r#r#n n q.q.4.G+H+H+H+`+`+=.=.<+~+~+~+Q.1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u u v w x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=7@D+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;+: #%[ [ [ j+_ _ _ u%d#} } } Q%X X H.n.[@2,&=E,c'j*v>d';=t,|,_*e'{'k*f'S-]'f;$-y%2 2 2 C y%] ] ] Z+Z+6@6@3 w.w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@O=O=6 6 6 {+{+{+P.P.P.) ) ) 7 7 C.C.C.-+o.o.m m m m ' 8 8 8 8 8 ' h>h>h>h>h>h>='{.{.{.{.{.{.{.{.{.{.U>^+^+]>]>]>> > > > $+$+$+$+l l l ; ; ; ; ; ; 0 0 0 ,,F F F F F F T+T+f,- - - - - - - - - H,H,H,a a a a a a a a a a +'+'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@= = = = = = = 5'5'5'5'5'b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b 5'5'5'5'5'= = = = = = = m@m@m@m@m@m@m@m@m@m@m@m@m@-'-'+'+'a a a a a a a a a H,H,H,- g'h'i'8'8'8'8'8'('j' >{.{.{.{.{.{.{.{.{.{.{.{.{.{.y,k'> l l $+$+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.I.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } u%_ _ _ _ [ [ [ [ T$: : : c+c+< < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r r t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=#+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A./ #%[ [ [ j+_ _ _ _ d#} } } Q%X X X .=*=6*T*N*U;k*_=8=Z*t,o;);L;x;&;l'm'S>T>$-y%2 2 2 C ] ] ] ] Z+Z+6@6@3 w.w.X&X&{ { { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D D t=*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 8 E E 8 h>h>h>h>X>),A,{.{.{.{.{.{.{.{.{.{.U>]>]>]>> > > > $+$+$+$+l l l ; ; ; ; ; ; 0 0 ,,F F F F F F F T+f,- - - - - - - - - H,H,H,a a a a a a a a +'+'-'-'m@m@m@m@m@m@m@m@m@m@m@= = = = = = 5'5'5'b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b 5'5'5'5'= = = = = m@m@m@m@m@m@m@m@m@m@m@-'-'+'+'a a a a a a a a n'o'i'i'8'8'8'8'p'q'{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.r'}'; ; ; l l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 ' m m m m o.o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=O=*@*@*@_.t=D D D i=~ ~ ~ ~ ~ )+g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.| | | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ [ T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m. + +y+y+y+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x y y S S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F,T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( .=N=U*E= -l*M-s'L*#>|,);L*3'j*M;t'4'&>T-] y%2 2 C ] ] ] ] Z+Z+6@6@3 w.w.X&X&{ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D _.*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.o.m m m m ' 8 8 8 8 E E F+F+8 h>h>X>),_,_,A,{.{.{.{.{.{.{.{.{.{.U>]>> > > > $+$+$+$+l l l ; ; ; ; ; 0 0 0 ,,F F F F F F T+f,f,- - - - - - - - H,H,H,a a a a a a a a +'-'-'m@m@m@m@m@m@m@m@m@m@= = = = = 5'5'b b b b b b b b b b b b b b k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k b b b b b b b b b b b b b b 5'5'5'= = = = m@m@m@m@m@m@m@m@m@m@m@-'+'+'a a u'v'i'i'i'i'i'i'w'x'i,{.{.{.{.{.{.{.{.{.{.{.{.{.{.y'z'0 0 ; ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 9 , F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.| | | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@O B B o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u v w w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=t&f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( .=r$>$A'W=B',=(=D=u,;=;=u,E>(=C'D'S-]'E*Z+y%2 2 C ] ] ] ] Z+Z+6@6@3 w.w.X&X&{ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D _.*@*@*@O=O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 8 E E F+F+F+8 h>),_,_,_,_,A,{.{.{.{.{.{.{.{.{.{.U>> > > $+$+$+$+l l l ; ; ; ; ; 0 0 ,,,,F F F F F T+T+f,- - - - - - - - H,H,a a a a a a a a +'+'-'m@m@m@m@m@m@m@m@m@= = = = = 5'5'b b b b b b b b b b b k k k k k k k k k k k k I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@k k k k k k k k k k k k k b b b b b b b b b b b 5'5'= = = = m@m@m@m@m@m@m@m@m@-'E'F'G'i'i'i'i'i'H'I'{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.J'K'F F ,,0 0 ; ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+m m m m o.o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.| | | ( ( X X Q%Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.<+<+~+~+Q.1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=x + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I | [ [ [ [ j+_ _ _ u%} } } Q%X X X ( ( `.r$|=}=w&-,V=Q>8=Z*;=Z*L;T&L'M'E,S>X=3 y%2 2 C ] ] ] ] Z+6@6@6@3 w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ ~ i=D D D t=_.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.o.o.m m m m ' 8 8 8 8 E E F+F+F+F+F+E ),_,_,_,_,7,N'{.{.{.{.{.{.{.{.{.{.U>> $+$+$+$+l l l ; ; ; ; ; 0 0 ,,F F F F F F T+f,- - - - - - - - H,H,H,a a a a a a a +'-'-'m@m@m@m@m@m@m@m@= = = = 5'5'b b b b b b b b b k k k k k k k k k I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@k k k k k k k k k b b b b b b b b b b 5'5'= = = m@m@m@m@O'P'Q'Q'Q'R'G'G'S'T'g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.I'o,T+F F F F F ,,0 0 0 ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>^+^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$n.n.| | | ( X X X Q%Q%} } d#u%_ _ _ j+[ [ [ #%: : : : c+< < < b+K.K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.>@>@B B o o @V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+#+3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=X&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ' #%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | `.F=I=q&d;c;M-s':*U'U'V'B,j*P,t'4'&>3 ] y%2 C ] ] ] ] Z+6@6@6@3 w.w.X&+={ { { )=)=g.g.g.)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 8 E F+F+F+F+F+, 5;F+_,_,_,7,6,6,W'{.{.{.{.{.{.{.{.{.{.X'$+$+$+l l l ; ; ; ; ; 0 0 ,,F F F F F F T+f,- - - - - - - H,H,H,a a a a a a a +'-'m@m@m@m@m@m@m@m@= = = = 5'5'b b b b b b b b k k k k k k k I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&I@I@I@I@I@I@I@I@I@I@I@I@I@I@k k k k k k k k b b b b b b b b 5'5'= Y'Z'`'Q'Q'Q'Q'Q'Q' ).){.{.{.{.{.{.{.{.{.{.{.{.{.{.{,+)@)- - f,T+F F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>^+^+^+^+^+I.&.9 9 9 9 9 , F+F+F+F+F+E E 8 8 8 8 Q+m m m m o.o.C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$n.n.| | | ( X X X Q%} } } d#_ _ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.Q Q R R q q r r t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=~&V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;+#%[ [ [ j+_ _ _ u%} } } Q%Q%X X ( ( | `.r$>$r&#)B'M;&'v>L*Z*L*D=(=G>D'v,H*T>] y%2 C ] ] ] ] Z+6@6@6@3 w.w.X&+={ { { )=)=g.g.g.)+~ ~ ~ ~ i=i=D D D t=*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' 8 8 8 8 E E F+F+F+F+F+, 9 9 F+_,_,7,6,6,6,W'{.{.{.{.{.{.{.{.{.{.X'$+l l l ; ; ; ; ; 0 0 ,,F F F F F T+f,- - - - - - - - H,H,a a a a a a a +'-'m@m@m@m@m@m@m@m@= = = 5'5'b b b b b b b k k k k k k k I@I@I@I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&c c c c c d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&I@I@I@I@I@I@I@I@I@I@I@k k k k k k b b b b b b $)%)&)&)*)*)*)Q'=)-){.{.{.{.{.{.{.{.{.{.{.{.{.{.{.;)>)- - - - - - f,T+F F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+$+> > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@O B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.[.-.-.Q R R R q r r s t u u v w x y y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=0.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.,)[ [ [ j+_ _ _ u%d#} } } Q%X X X ( | | `./ h&!;:=%>')H=E>L*L*p;Q>)) 'E,W=X=Z+y%2 C ] ] ] ] Z+6@6@6@3 w.X&X&+={ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@*@O=P=6 6 {+{+{+P.P.) ) ) 7 7 7 C.C.-+o.o.m m m ' Q+8 8 8 8 E F+F+F+F+F+, 5;9 9 9 F+7,6,6,6,6,6,W'{.{.{.{.{.{.{.{.{.{.X'l l ; ; ; ; ; 0 0 ,,F F F F F T+f,- - - - - - - H,H,a a a a a a a +'-'m@m@m@m@m@m@m@m@= = = 5'b b b b b b b k k k k k k I@I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&d&d&d&d&c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c d&d&d&d&d&d&d&d&d&d&d&d&d&I@I@I@I@I@I@I@I@I@I@k k k k k = !)~)~)~)~)~)&)&){)(;{.{.{.{.{.{.{.{.{.{.{.{.{.{.z,])^)H,H,H,- - - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+> > > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;F+F+F+F+F+E E 8 8 8 8 ' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@t=D D D i=i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 / / / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.9.r#n n q.q.q.4.H+H+H+g@`+=.=.<+<+~+~+Q.1+W.>@>@O B o o @V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+#+3.0.0..+R.p p r.r.k.a.a.b.<.[.-.-.;.Q R R q q r r t u u v v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x.[ [ [ [ _ _ _ _ d#} } } Q%X X X ( | | | *=F=2,&>S-<>}-Q>/)L;/)C,()P,t'A;&>3 ] y%C ] ] ] ] Z+6@6@6@3 w.X&X&+={ { { )=g.g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 E E F+F+F+F+F+, 9 9 9 9 &.5;6,6,6,6,6,o,W'{.{.{.{.{.{.{.{.{.{.X'; ; ; ; ; 0 0 ,,F F F F F T+f,- - - - - - - H,H,a a a a a a +'-'-'m@m@m@m@m@m@= = = 5'5'b b b b b b k k k k k k I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&c c c c c c c c c c c c '+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+c c c c c c c c c c c d&d&d&d&d&d&d&d&d&d&d&I@I@I@I@I@I@I@I@_):)~)~)~)~)~)~)<)[){.{.{.{.{.{.{.{.{.{.{.{.{.{.{.})|)a a a a a H,H,- - - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+> > > > ]>]>^+^+^+^+^+I.&.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+' m m m o.o.-+C.C.7 7 7 ) ) ) P.P.{+{+6 6 6 P=O=*@*@*@*@t=D D D i=i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 / / / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.r#r#n n q.q.4.4.H+H+H+`+=.=.=.<+~+~+~+1+1+W.>@>@B B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.Q R R R q r r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=7@@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H _ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | *=/ E-2,e;d;[=M-C,e'e't*1)D-%>w-H*T>Z+y%C y%] ] ] Z+6@6@6@3 w.X&X&+={ { { )=g.g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m Q+8 8 8 8 E E F+F+F+F+, 5;9 9 9 9 &.I.9 6,6,6,6,o,o,W'{.{.{.{.{.{.{.{.{.{.X'; ; ; 0 0 ,,F F F F F T+f,- - - - - - H,H,H,a a a a a +'+'-'m@m@m@m@m@m@= = = 5'5'b b b b b b k k k k k I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&c c c c c c c c c '+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+c c c c c c c c d&d&d&d&d&d&d&d&d&I@I@j.2)3)4)4)4)~)~)5)6)$;{.{.{.{.{.{.{.{.{.{.{.{.{.{.7)8)9)-'+'a a a a a a H,H,- - - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l $+$+$+$+> > > > ]>]>^+^+^+^+I.I.&.9 9 9 9 5;F+F+F+F+F+E E 8 8 8 Q+' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 1 / / / r$`.n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < < b+K.K.K.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=`+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0)[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.*=1 E-f;q;f>M;()x;v>t*U,b;<>a)S>T>Z+y%C y%] ] ] Z+6@6@6@3 w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.o.o.m m m ' Q+8 8 8 8 E F+F+F+F+F+, 9 9 9 9 &.I.I.^+9 6,6,o,o,o,x,W'{.{.{.{.{.{.{.{.{.{.X'; 0 0 ,,F F F F F T+f,- - - - - - H,H,a a a a a a +'-'m@m@m@m@m@m@m@= = 5'5'b b b b b k k k k k I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&c c c c c c c '+'+'+'+'+'+'+'+'+'+'+'+'+'+G G G G G Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=G G G G G G '+'+'+'+'+'+'+'+'+'+'+'+'+c c c c c c c c d&d&d&d&b)c)d)d)4)4)4)4)e)f){.{.{.{.{.{.{.{.{.{.{.{.{.{.{.T'g)m@m@m@m@-'-'+'a a a a a a H,H,- - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l $+$+$+$+> > > ]>]>]>^+^+^+^+I.I.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 1 / / / r$`.n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@O B o o @V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+3.3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . k [ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.x*1 1@M=A;l,]-()Q>T&U,R>M'm'A;4 3 y%C y%] ] ] Z+Z+6@6@3 w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 6 {+{+P.P.P.) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 E E F+F+F+F+, 5;9 9 9 9 &.I.^+^+^+9 o,o,o,x,x,x,h){.{.{.{.{.{.{.{.{.{.i)0 ,,F F F F F T+f,- - - - - - H,H,a a a a a a +'-'m@m@m@m@m@m@= = 5'5'b b b b b k k k k k I@I@I@I@I@I@d&d&d&d&d&d&d&c c c c c c c '+'+'+'+'+'+'+'+'+'+G G G G Z=Z=Z=Z=Z=Z=Z=Z=Z=& & & & & & & & & & & & & & & & & & & & & & & & & & & & & Z=Z=Z=Z=Z=Z=Z=Z=Z=G G G '+'+'+'+'+'+'+'+'+'+'+c c c c j)k)d)d)d)d)d)d)l)m)9;{.{.{.{.{.{.{.{.{.{.{.{.{.{.)'=)= = = m@m@m@m@m@m@-'+'a a a a a a H,H,- - - - - - f,T+F F F F F ,,0 0 ; ; ; ; l l l $+$+$+> > > > ]>]>^+^+^+^+I.I.&.9 9 9 9 5;F+F+F+F+F+E 8 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$`.n.| | | ( ( X X Q%Q%} } d#u%_ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.9.r#n n q.q.q.4.H+H+H+g@`+=.=.<+~+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w==+W$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@X [ [ j+_ _ _ u%d#} } Q%Q%X X ( ( | | n.n.`.[@U+I=X=r=>,]-n)N-1)R>o)p)*'q)3 ] $-y%] ] ] Z+Z+6@6@3 w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.-+o.m m m m Q+8 8 8 8 E F+F+F+F+F+, 5;9 9 9 &.I.I.^+^+^+^+I.o,x,x,x,x,R,h){.{.{.{.{.{.{.{.{.{.i)F F F F F T+f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@m@= = = 5'b b b b b k k k k k I@I@I@I@I@I@d&d&d&d&d&d&c c c c c c '+'+'+'+'+'+'+'+'+G G G Z=Z=Z=Z=Z=Z=& & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & Z=Z=Z=Z=Z=Z=G G G '+'+'+'+'+'+'+r)s)t)t)t)t)t)d)u)v){.{.{.{.{.{.{.{.{.{.{.{.{.{.0,w)@)b b b 5'= = m@m@m@m@m@m@-'+'+'a a a a a H,H,- - - - - - f,T+F F F F F ,,0 0 ; ; ; ; l l l $+$+$+> > > ]>]>]>^+^+^+^+I.I.9 9 9 9 5;, F+F+F+F+E E 8 8 8 8 ' m m m m o.-+C.C.C.7 7 ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$`.n.| | | ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=( . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 [ [ [ _ _ _ _ d#} } } Q%X X X ( | | | n.`.r$[@N+I=w*r=%>M;}-))b;o)t'w-x)w.] $-3-] ] ] Z+Z+6@6@3 w.w.X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.o.o.m m m ' Q+8 8 8 8 E F+F+F+F+F+5;9 9 9 9 &.I.^+^+^+^+]>]>I.x,x,x,R,R,R,h){.{.{.{.{.{.{.{.{.{.i)F F F T+f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@m@= = 5'b b b b b k k k k k I@I@I@I@I@d&d&d&d&d&d&d&c c c c c '+'+'+'+'+'+'+'+G G Z=Z=Z=Z=Z=& & & & & & & & & & & & & & & & & & & & .,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,& & & & & & & & & & & & & & & & & & & & Z=Z=Z=Z=Z=G G y)z)F'F'F'F'F'F'A)B)0,{.{.{.{.{.{.{.{.{.{.{.{.{.{.i)t)k k b b b b b 5'5'= = m@m@m@m@m@m@-'+'a a a a a H,H,- - - - - - f,T+F F F F F ,,0 ; ; ; ; ; l l $+$+$+$+> > > ]>]>^+^+^+^+I.I.&.9 9 9 9 , F+F+F+F+F+E 8 8 8 8 Q+m m m m o.-+C.C.C.7 7 ) ) ) P.P.{+{+6 6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ #%T$: : : c+< < < b+K.K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@O B o o o V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=5.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e [ [ [ _ _ _ _ d#} } } Q%X X X ( | | | n.`.r$r$F=N+I*'-w-l,*;$>C)o)l,S-D)T>Z+$-y%] ] ] Z+Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D t=*@*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.o.o.m m m ' Q+8 8 8 E E F+F+F+F+, 5;9 9 9 9 I.I.^+^+^+^+]>]>> ^+x,R,R,R,R,(,h){.{.{.{.{.{.{.{.{.{.i)F T+f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@= = = 5'b b b b b k k k k I@I@I@I@I@d&d&d&d&d&d&c c c c c '+'+'+'+'+'+'+G G Z=Z=Z=Z=Z=& & & & & & & & & & & & & & .,.,.,.,r+r+r+r+r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%r+r+r+r+r+r+.,.,.,.,& & & & & & & & & & & & & & E)F)G)H)I)I)F'F'F'J)K){.{.{.{.{.{.{.{.{.{.{.{.{.{.i,L)M)I@I@k k k k b b b b b 5'= = m@m@m@m@m@m@-'+'a a a a a H,H,- - - - - - f,T+F F F F ,,0 0 ; ; ; ; l l l $+$+$+> > > > ]>]>^+^+^+^+I.I.9 9 9 9 5;, F+F+F+F+E E 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ >$>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#r#n v.q.q.4.H+H+H+g@`+=.=.<+<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A./ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ F=|=2,&>4'B'^,N)<>t'S-D)4 Z+$-3-] ] ] y*Z+6@6@3 w.w.X&+={ { { )=g.g.g.)+)+~ ~ ~ ~ i=D D D t=*@*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.-+o.m m m m ' 8 8 8 8 E F+F+F+F+F+, 9 9 9 9 &.I.^+^+^+^+]>]>]>> > ^+R,R,R,(,(,(,]){.{.{.{.{.{.{.{.{.{.i)f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@= = 5'5'b b b b k k k k I@I@I@I@I@d&d&d&d&d&d&c c c c '+'+'+'+'+'+'+G G Z=Z=Z=Z=& & & & & & & & & & & & .,.,.,r+r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%r+r+r+.,.,.,& & & & & & O)P)Q)Q)Q)Q)H)H)R)S){.{.{.{.{.{.{.{.{.{.{.{.{.{.{.T)U)d&d&I@I@I@I@I@k k k k b b b b 5'= = = m@m@m@m@m@-'+'a a a a a H,H,- - - - - - f,T+F F F F ,,0 0 ; ; ; ; l l l $+$+$+> > > ]>]>]>^+^+^+I.I.&.9 9 9 5;, F+F+F+F+E E 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] C C 2 2 2 x+^ ^ ^ >$U+U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : c+c+< < b+b+K.K.9.r#n n q.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ / '=x+$-V)A;S-p)p)E,w-D)4 3 y*3-] ] ] y*Z+6@6@3 w.w.X&+={ { { )=g.g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.P.) ) 7 7 C.C.C.-+o.m m m m Q+8 8 8 8 E F+F+F+F+F+5;9 9 9 9 I.I.^+^+^+^+]>]>> > > $+]>R,R,(,(,$'$']){.{.{.{.{.{.{.{.{.{.i)- - - - - H,H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b b k k k I@I@I@I@I@d&d&d&d&d&d&c c c c '+'+'+'+'+'+G G Z=Z=Z=Z=& & & & & & & & & & .,.,.,r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.B.B.B.B.B.B.B.B.B.B.B.B.B.J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%r+r+.,W)X)Y)Q)Q)Q)Q)Q)I)Z)y,{.{.{.{.{.{.{.{.{.{.{.{.{.{.`) !.!d&d&d&d&d&I@I@I@I@I@I@k k k b b b b b 5'= = m@m@m@m@m@-'+'a a a a a H,H,- - - - - - f,F F F F F ,,0 ; ; ; ; ; l l $+$+$+> > > > ]>]>^+^+^+^+I.&.9 9 9 9 5;F+F+F+F+F+E 8 8 8 8 ' m m m m o.-+C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] C C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / / r$`.n.n.| | ( ( X X X Q%} } d#u%_ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o o V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o%(.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # [ [ [ _ _ _ _ d#} } Q%Q%X X ( ( | | n.n.`.r$/ / / >$1@y%T>+!4'V;V;A;D)4 3 f;$-] ] ] y*Z+6@6@3 w.w.X&X&{ { { )=g.g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.P.) ) 7 7 C.C.C.-+o.m m m m Q+8 8 8 E E F+F+F+F+, 5;9 9 9 &.I.I.^+^+^+]>]>]>> > > $+$+]>(,(,(,$'$'$']){.{.{.{.{.{.{.{.{.{.i)- - - H,H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k k I@I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+'+G G Z=Z=Z=& & & & & & & & & .,.,r+r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&B.B.B.B.B.B.B.B.B.B.B.J%J%J%J%J%J%J%J%J%J%J%@!#!G)G)G)Y)Y)Y)$!N>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.%!&!'+c c c c d&d&d&d&d&I@I@I@I@I@k k k k b b b b 5'= = m@m@m@m@m@-'+'a a a a a H,H,- - - - - f,T+F F F F F 0 0 ; ; ; ; l l l $+$+$+> > > ]>]>^+^+^+^+I.I.9 9 9 9 5;, F+F+F+F+E 8 8 8 8 Q+m m m m o.-+C.C.C.7 7 ) ) P.P.P.{+{+6 6 6 O=*@*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] C 2 2 2 x+x+^ ^ R&>$U+U+U+1 / / / r$`.n.n.| | ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+K.K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + C [ [ _ _ _ _ d#} } } Q%X X X ( | | | n.`.r$r$/ / 1 >$^ y%E**!]'=!+!&>4 w.Z+$-Z+] ] y*Z+6@6@3 w.w.X&X&{ { { )=g.g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.-+o.m m m ' Q+8 8 8 E E F+F+F+F+, 9 9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+$+> (,$'$'$'$','-!{.{.{.{.{.{.{.{.{.{.i)- H,H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+'+G Z=Z=Z=& & & & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&B.B.B.B.B.B.B.J%J%* ;!G)G)G)G)G)G)>!,!'!{.{.{.{.{.{.{.{.{.{.{.{.{.{.)!!!'+'+'+'+'+'+c c c c d&d&d&d&d&I@I@I@I@k k k k b b b b 5'= = m@m@m@m@m@-'+'a a a a a H,H,- - - - - f,T+F F F F ,,0 0 ; ; ; ; l l $+$+$+> > > > ]>]>^+^+^+^+I.&.9 9 9 9 , F+F+F+F+E E 8 8 8 Q+' m m m o.-+C.C.C.7 7 ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.6@6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 1 / / r$r$`.n.| | | ( X X X Q%} } } d#_ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#n n v.q.q.4.H+H+H+`+`+=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=, . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.`.r$r$/ / [@1 N+^ 2,y*T>T>T>X=T>3 Z+y*Z+Z+] y*Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.o.o.m m m ' 8 8 8 8 E F+F+F+F+F+5;9 9 9 9 I.I.^+^+^+^+]>]>> > > $+$+$+l l > $'$'$'$','_'~!{.{.{.{.{.{.{.{.{.{.i)H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@I@d&d&d&d&c c c c '+'+'+'+'+'+G Z=Z=Z=& & & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{!]!^!^!^!G)G)G)/!(!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.m)_!Z=Z=Z=G '+'+'+'+'+'+c c c d&d&d&d&d&I@I@I@I@I@k k k b b b b 5'= = m@m@m@m@m@-'+'a a a a a H,H,- - - - - f,T+F F F F ,,0 ; ; ; ; l l l $+$+$+> > > ]>]>^+^+^+^+I.&.9 9 9 9 5;F+F+F+F+F+E 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.6@6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : c+< < < b+b+K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==@!@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J } [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+N+|=3,y%Z+Z+f;w.3 3 f;Z+Z+Z+y*Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.o.o.m m m ' 8 8 8 8 E F+F+F+F+, 5;9 9 9 &.I.I.^+^+^+]>]>]>> > > $+$+$+l l ; $+$'$',','_'('~!{.{.{.{.{.{.{.{.{.{.i)a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+G Z=Z=Z=& & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!{&{&{&{&{&{&{&{&{&{&{&{&@@ > > ]>]>]>^+^+^+I.I.&.9 9 9 5;, F+F+F+F+E 8 8 8 8 ' m m m o.o.C.C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=( . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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' [ [ _ _ _ _ d#} } Q%Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$x+1@2 2 $-Z+3 3 f;Z+6@Z+] Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m m Q+8 8 8 8 E F+F+F+F+, 5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+l l l ; ; $+$','_'('('('~!{.{.{.{.{.{.{.{.{.{.i)a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c c '+'+'+'+'+G Z=Z=Z=& & & & & & & .,.,r+J%J%J%J%J%J%J%J%J%B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!:!:!:!e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e :!:!:!:!:!:!:!:!{&{&3!` [![![![![![!4!5!{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-6!y).,.,& & & & & & & Z=Z=Z=G '+'+'+'+'+c c c d&d&d&d&d&I@I@I@I@k k k b b b b 5'= = m@m@m@m@m@-'+'a a a a H,H,- - - - - f,T+F F F F ,,0 ; ; ; ; l l l $+$+$+> > > ]>]>^+^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 8 ' m m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%Q%} } d#_ _ _ _ [ [ [ #%T$: : : c+< < < b+K.K.9.r#n n v.q.q.4.H+H+H+g@`+=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9*# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +&[ [ j+_ _ _ d#} } } Q%X X X ( | | n.n.`.r$/ / / 1 U+U+U+>$1@1@1@C ] Z+Z+f;:;6@6@Z+Z+Z+6@6@w.w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m m Q+8 8 8 E E F+F+F+F+, 9 9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+l l ; ; ; ; l ,'('('('('('7!{.{.{.{.{.{.{.{.{.{.i)+'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c c '+'+'+'+G G Z=Z=& & & & & & & .,r+r+J%J%J%J%J%J%J%J%B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e 8!9!0!0!0!0![![!a!b!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.c!d!J%J%J%J%r+r+.,& & & & & & & Z=Z=G G '+'+'+'+c c c c d&d&d&d&I@I@I@I@k k k b b b b 5'= = m@m@m@m@m@-'+'a a a a H,H,- - - - - f,F F F F F 0 0 ; ; ; ; l l $+$+$+> > > ]>]>^+^+^+^+I.&.9 9 9 9 , F+F+F+F+E E 8 8 8 Q+m m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.w.6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / / r$`.n.n.| | ( X X X Q%} } } d#_ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g.[ j+_ _ _ u%} } } Q%X X X ( | | | n.`.r$r$/ / 1 U+U+U+>$^ ^ 1@I=] ] ] f;:;w.6@Z+f;Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m m Q+8 8 8 E E F+F+F+F+5;9 9 9 9 I.I.^+^+^+]>]>]>> > $+$+$+l l l ; ; ; ; 0 e!('('('('('(' ){.{.{.{.{.{.{.{.{.{.i)m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+'+G Z=Z=& & & & & & & .,r+r+J%J%J%J%J%J%J%B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!e e e e e e e e e e e e e e e e e e 5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.e e e e e e e e e {&f!g!h!h!h!h!h!h!i!j!{.{.{.{.{.{.{.{.{.{.{.{.{.{.'!k!l!B.J%J%J%J%J%J%J%r+r+.,& & & & & & & Z=Z=G '+'+'+'+'+c c c d&d&d&d&I@I@I@I@k k k b b b b 5'= = m@m@m@m@m@+'a a a a a H,- - - - - f,T+F F F F ,,0 ; ; ; ; l l l $+$+> > > ]>]>]>^+^+^+I.I.9 9 9 9 5;F+F+F+F+E E 8 8 8 Q+m m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+1 1 / / r$r$`.n.| | | ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=@@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . % [ [ _ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+I=y%] y*y*6@Z+Z+f;Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+F+5;9 9 9 &.I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 0 ,,; ('('('('8'8' ){.{.{.{.{.{.{.{.{.{.i)m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G G Z=Z=& & & & & & .,r+r+J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!e e e e e e e e e e e e e 5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.5.5.5.5.5.5.5.5.5.5.5.5.5.m!n!h!h!h!h!h!h!R)o!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.p!q!{&{&{&B.B.B.J%J%J%J%J%J%J%r+r+.,& & & & & & Z=Z=G G '+'+'+'+c c c d&d&d&d&I@I@I@I@k k k b b b b 5'= = m@m@m@m@-'+'a a a a H,H,- - - - - f,T+F F F ,,0 0 ; ; ; ; l l $+$+$+> > > ]>]>^+^+^+^+I.&.9 9 9 5;F+F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] ] C C 2 2 x+x+^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < < b+K.K.9.r#r#n v.q.q.4.H+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=z /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.>$[ _ _ _ _ d#} } Q%Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 y%y%$-Z+Z+Z+f;Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+, 5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 ,,F F ; ('('('8'8'8' ){.{.{.{.{.{.{.{.{.{.i)m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & & .,.,r+J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e e e e e 5.5.5.5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.{&r!s!t!t!t!t!t!0!u! >{.{.{.{.{.{.{.{.{.{.{.{.{.{.v!w!B.{&{&{&{&{&{&{&B.B.B.J%J%J%J%J%J%J%r+.,.,& & & & & & Z=Z=G '+'+'+'+c c c d&d&d&d&d&I@I@I@k k k b b b b 5'= = m@m@m@m@-'+'a a a a H,H,- - - - f,T+F F F F ,,0 ; ; ; ; l l $+$+$+> > > ]>]>^+^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%Q%} } d#_ _ _ _ [ [ [ #%: : : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+Q.1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - [ j+_ _ _ u%} } } Q%X X X ( | | n.n.`.r$/ / / 1 U+U+>$>$^ ^ ^ x+2 2 2 $-3-Z+Z+f;Z+6@6@3 w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+, 5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+l l l ; ; ; 0 0 ,,F F F ; ('8'8'8'8'8' ){.{.{.{.{.{.{.{.{.{.i)= 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & & .,r+J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e e e 5.5.5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!Y.Y.Y.Y.Y.Y.y!z!A!A!A!A!A!A!B!c!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.C!D!:!:!:!{&{&{&{&{&{&{&{&{&B.B.B.J%J%J%J%J%J%J%r+.,& & & & & & Z=Z=G '+'+'+'+c c c c d&d&d&I@I@I@I@k k k b b b b 5'= m@m@m@m@m@-'a a a a a H,- - - - - f,T+F F F ,,0 0 ; ; ; l l l $+$+> > > ]>]>^+^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.C.7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } } d#_ _ _ j+[ [ [ #%: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==@!@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J } j+_ _ _ u%} } } Q%X X X ( | | | n.`.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 C.C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+, 9 9 9 9 I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 0 F F F F T+,,8'8'8'8'i'i' ){.{.{.{.{.{.{.{.{.{.i)5'b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & .,.,r+J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&:!:!:!:!e e e e e e e e e 5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.x!x!x!x!$ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ E!F!g!g!g!g!A!A!Y)G!J;{.{.{.{.{.{.{.{.{.{.{.{.{.{.)'H!e e e e e e :!:!:!{&{&{&{&{&{&{&{&B.B.B.J%J%J%J%J%J%r+.,.,& & & & & Z=Z=G '+'+'+'+'+c c c d&d&d&I@I@I@I@k k k b b b 5'= = m@m@m@m@-'+'a a a a H,H,- - - - f,T+F F F F ,,0 ; ; ; ; l l $+$+$+> > > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 8 ' m m m o.-+C.C.C.7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / / r$`.n.| | | ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=H.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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' [ _ _ _ _ d#} } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] ] Z+Z+6@6@w.w.X&X&{ { { )=g.g.g.)+)+~ ~ ~ i=D D D t=_.*@*@*@O=6 6 6 {+{+P.P.) ) ) 7 C.C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+, 9 9 9 9 I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 ,,F F F F f,- F 8'8'8'i'i'i' ){.{.{.{.{.{.{.{.{.{.i)b b k k k I@I@I@I@d&d&d&d&c c '+'+'+'+'+G Z=Z=& & & & & .,r+J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e 5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ $ $ $ $ $ $ $ W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#$ I!J!K!K!K!K!K!K!L!M!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.N!O!5.5.e e e e e e e e :!:!:!{&{&{&{&{&{&{&{&B.B.B.J%J%J%J%J%J%r+.,& & & & & Z=Z=Z=G '+'+'+'+c c c d&d&d&I@I@I@I@k k k b b b 5'= = m@m@m@m@-'+'a a a a H,- - - - - f,F F F F ,,0 ; ; ; ; l l $+$+$+> > > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 8 ' m m m o.-+C.C.C.7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+1 1 / / r$r$n.n.| | ( ( X X X Q%} } d#u%_ _ _ [ [ [ #%T$: : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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(.[ j+_ _ _ d#} } } Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 C C ] ] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D t=_.*@*@*@O=6 6 6 {+{+P.P.) ) ) 7 C.C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+5;9 9 9 &.I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 0 ,,F F F T+f,- - F 8'i'i'i'i'i' ){.{.{.{.{.{.{.{.{.{.i)b k k I@I@I@I@d&d&d&d&c c c '+'+'+G Z=Z=Z=& & & & & .,r+J%J%J%J%J%J%B.B.{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e 5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ $ $ $ $ W#W#W#W#W#W#W#W#W#W#W#W#W#P!P!P!P!P!P!P!P!P!P!P!P!P!P!P!P!P!P!P!P!P!W#W#W#Q!R!]!]!]!]!]!]!S!T!0,{.{.{.{.{.{.{.{.{.{.{.{.{.{.U![!Y.Y.5.5.5.5.5.e e e e e e e e :!:!:!{&{&{&{&{&{&{&{&B.B.J%J%J%J%J%J%r+.,& & & & & & Z=Z=G '+'+'+'+c c d&d&d&d&I@I@I@I@k k b b b b 5'= m@m@m@m@-'+'a a a a H,H,- - - - f,T+F F F ,,0 0 ; ; ; l l $+$+$+> > > ]>]>^+^+^+^+I.&.9 9 9 5;F+F+F+F+E E 8 8 8 ' m m m o.-+C.C.C.7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ )+)+g.g.)=)={ { { X&X&w.w.6@6@Z+Z+] ] ] C C 2 2 x+x+^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } d#_ _ _ j+[ [ [ #%: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g.j+_ _ _ u%} } } Q%X X X ( | | | n.`.r$/ / / 1 U+U+>$R&^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ i=i=D D t=_.*@*@*@O=6 6 6 {+{+P.P.) ) ) 7 C.C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+l l l ; ; ; 0 0 F F F F T+- - - - F i'i'i'i'i'i'V!{.{.{.{.{.{.{.{.{.{.W!k k I@I@I@d&d&d&d&c c c '+'+'+G Z=Z=& & & & & & .,r+J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&:!:!:!e e e e e e e 5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ $ $ W#W#W#W#W#W#W#W#W#P!P!P!P!f f f f f f f f f f f f f f f f f f f f f f f f f f f f f X!Y!Z!`!`!`! ~ ~ ~.~.){.{.{.{.{.{.{.{.{.{.{.{.{.{.{,+~@~Y.Y.Y.Y.Y.Y.Y.5.5.5.5.5.e e e e e e e :!:!:!{&{&{&{&{&{&{&B.B.B.J%J%J%J%J%r+.,& & & & & & Z=Z=G '+'+'+c c c d&d&d&d&I@I@I@k k k b b b 5'= = m@m@m@m@-'+'a a a a H,- - - - - T+F F F F ,,0 ; ; ; ; l l $+$+$+> > ]>]>^+^+^+^+I.&.9 9 9 5;F+F+F+F+E E 8 8 8 ' m m m o.-+C.C.C.7 ) ) ) P.P.{+{+6 6 6 O=*@*@*@_.t=D D D i=~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=I@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . % [ _ _ _ _ d#} } Q%X X X ( ( | | n.`.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+F+5;9 9 9 &.I.^+^+^+^+]>]>> > $+$+$+l l ; ; ; ; 0 ,,F F F F f,- - - - - f,i'i'i'i'G'R'V!{.{.{.{.{.{.{.{.{.{.W!I@I@I@d&d&d&d&c c c '+'+'+'+G Z=& & & & & & .,r+J%J%J%J%J%B.B.{&{&{&{&{&{&{&{&:!:!e e e e e e e 5.5.5.5.5.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ $ W#W#W#W#W#W#W#P!P!P!f f f f f f f f f f f f f f f f f f f f f K K K K K K K K K K f f f f f #~$~`!`!`!`!`!`!%~&~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.[)*~$ $ $ $ x!x!Y.Y.Y.Y.Y.Y.Y.5.5.5.5.e e e e e e e :!:!:!{&{&{&{&{&{&{&B.B.J%J%J%J%J%J%r+.,& & & & & Z=Z=G '+'+'+c c c d&d&d&d&I@I@I@k k k b b b 5'= = m@m@m@m@+'a a a a H,- - - - - f,F F F F ,,0 ; ; ; ; l l $+$+$+> > ]>]>]>^+^+^+I.&.9 9 9 5;F+F+F+F+E E 8 8 8 ' m m m o.o.C.C.C.7 ) ) ) P.P.{+{+6 6 6 O=*@*@*@_.t=D D i=i=~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$>$U+U+1 / / / r$`.n.| | ( ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.>$j+_ _ _ d#} } } Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 ,,F F F T+f,- - - - H,H,- i'i'i'R'Q'Q'V!{.{.{.{.{.{.{.{.{.{.=~I@I@d&d&d&c c c '+'+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!e e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.Y.x!$ $ $ $ $ $ W#W#W#W#W#W#P!P!f f f f f f f f f f f f K K K K K K K K K K K K -~-~-~-~-~-~-~-~-~-~-~-~-~-~-~K $ ;~>~`!`!`!`!`!`!,~'~{.{.{.{.{.{.{.{.{.{.{.{.{.{..>)~:!W#W#W#$ $ $ $ $ $ x!x!Y.Y.Y.Y.Y.Y.5.5.5.5.e e e e e e e :!:!{&{&{&{&{&{&{&B.B.J%J%J%J%J%J%r+.,& & & & & Z=Z='+'+'+'+c c c d&d&d&I@I@I@I@k k b b b b = = m@m@m@m@-'+'a a a H,H,- - - - f,T+F F F ,,0 0 ; ; ; l l $+$+$+> > > ]>]>^+^+^+I.&.9 9 9 5;, F+F+F+E E 8 8 8 Q+m m m o.o.C.C.C.7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=i=~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ >$U+U+1 1 / / r$r$n.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - j+_ _ _ u%} } } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 C C ] ] ] Z+Z+6@6@w.w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 0 F F F F T+- - - - - H,a a - i'G'R'Q'Q'Q'V!{.{.{.{.{.{.{.{.{.{.=~d&d&d&d&c c '+'+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%J%B.B.{&{&{&{&{&{&:!:!:!e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ W#W#W#W#W#P!P!f f f f f f f f f f K K K K K K K -~-~-~-~y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.!~~~{~{~{~{~{~{~]~^~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{./~(~f f P!P!W#W#W#W#W#W#$ $ $ $ $ x!Y.Y.Y.Y.Y.Y.5.5.5.5.e e e e e e :!:!:!{&{&{&{&{&{&B.B.B.J%J%J%J%J%r+.,& & & & & Z=G '+'+'+'+c c c d&d&d&I@I@I@k k k b b b 5'= = m@m@m@-'+'a a a a H,- - - - - T+F F F F 0 0 ; ; ; l l $+$+$+> > > ]>]>^+^+^+I.&.9 9 9 5;, F+F+F+E E 8 8 8 Q+m m m o.-+C.C.C.7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==@6.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J M _ _ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 0 F F F F f,- - - - - H,a a a - G'Q'Q'Q'Q'*)V!{.{.{.{.{.{.{.{.{.{.=~d&d&c c c '+'+'+G Z=Z=& & & & & r+J%J%J%J%J%B.B.B.{&{&{&{&{&{&:!:!e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.x!$ $ $ $ $ W#W#W#W#W#P!P!f f f f f f f f K K K K K -~-~-~y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y._~:~{~{~{~{~{~{~<~[~}~{.{.{.{.{.{.{.{.{.{.{.{.{.{.|~1~f f f f f f f f P!P!W#W#W#W#W#$ $ $ $ $ x!Y.Y.Y.Y.Y.Y.5.5.5.5.e e e e e e :!:!{&{&{&{&{&{&{&B.B.J%J%J%J%J%r+.,& & & & Z=Z=G '+'+'+'+c c d&d&d&d&I@I@I@k k b b b b = = m@m@m@m@-'a a a a H,H,- - - - f,F F F F ,,0 ; ; ; ; l l $+$+> > > ]>]>^+^+^+I.I.9 9 9 5;, F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.C.7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@Z+Z+] ] ] C C 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$`.n.| | | ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%~&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 j+_ _ _ d#} } } Q%X X ( ( | | n.n.r$r$/ / 1 1 U+U+>$^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 &.I.^+^+^+]>]>> > > $+$+l l ; ; ; ; 0 ,,F F F F f,- - - - H,H,a a a +'H,Q'Q'Q'Q'*)&)2~{.{.{.{.{.{.{.{.{.{.=~c c c '+'+'+G Z=Z=& & & & & .,r+J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.x!$ $ $ $ $ W#W#W#W#P!P!f f f f f f f f K K K K -~-~y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.;+;+;+;+;+;+;+;+3~3~3~3~3~3~3~3~3~4~n!>~>~>~>~>~>~5~6~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.7~8~-~K K K K K f f f f f f f P!P!W#W#W#W#W#$ $ $ $ x!Y.Y.Y.Y.Y.Y.5.5.5.e e e e e e :!:!{&{&{&{&{&{&{&B.B.J%J%J%J%J%r+.,& & & & Z=Z=G '+'+'+c c c d&d&d&I@I@I@I@k k b b b 5'= m@m@m@m@-'+'a a a H,H,- - - - f,T+F F F ,,0 ; ; ; ; l l $+$+> > > ]>]>^+^+^+I.I.9 9 9 5;, F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / r$r$`.n.| | ( ( X X X Q%} } d#_ _ _ _ [ [ [ #%: : : c+< < < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d+[ _ _ _ u%} } } Q%X X X ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] ] Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=O=6 6 {+{+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 &.I.^+^+^+]>]>> > > $+$+l l ; ; ; ; 0 ,,F F F T+f,- - - - H,a a a a +'-'a Q'Q'*)*)&)~)2~{.{.{.{.{.{.{.{.{.{.9~c '+'+'+'+G Z=& & & & & .,r+J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!e e e e e 5.5.5.5.Y.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#W#P!P!f f f f f f K K K K -~-~y.y.y.y.y.y.y.y.y.y.y.y.y.;+;+;+;+3~3~3~3~3~3~3~3~3~3~3~]+]+]+]+]+]+]+]+]+]+0~a~Z!Z!Z!>~>~>~b~c~9;{.{.{.{.{.{.{.{.{.{.{.{.{.{.d~e~y.y.y.y.y.y.-~-~K K K K f f f f f f f P!W#W#W#W#W#$ $ $ $ x!Y.Y.Y.Y.Y.5.5.5.5.e e e e e :!:!:!{&{&{&{&{&{&B.B.J%J%J%J%J%r+& & & & & Z=Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b b = = m@m@m@m@+'a a a a H,- - - - - T+F F F ,,0 ; ; ; ; l l $+$+$+> > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+)+g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x x y z S T T >.d.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=H+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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C._ _ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ ^ x+2 2 C C ] ] ] Z+Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=i=D D t=_.*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > > $+$+l l ; ; ; ; 0 ,,F F F T+- - - - - H,a a a a +'m@m@a Q'*)&)~)~)~)f~{.{.{.{.{.{.{.{.{.{.9~'+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%B.{&{&{&{&{&{&:!:!:!e e e e e 5.5.5.Y.Y.Y.Y.Y.x!x!$ $ $ $ W#W#W#W#P!f f f f f f f K K K -~-~y.y.y.y.y.y.y.y.y.y.y.;+;+3~3~3~3~3~3~3~]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+g~h~Z!Z!Z!Z!Z!Z!i~v){.{.{.{.{.{.{.{.{.{.{.{.{.{.0,j~k~y.y.y.y.y.y.y.y.y.y.y.-~-~K K K K f f f f f f P!P!W#W#W#W#$ $ $ $ x!Y.Y.Y.Y.Y.5.5.5.e e e e e e :!:!{&{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & & Z=G '+'+'+'+c c d&d&d&I@I@I@I@k k b b b 5'= m@m@m@m@-'a a a a H,H,- - - - T+F F F F 0 0 ; ; ; l l $+$+$+> > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^.j+_ _ _ d#} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 0 F F F F T+- - - - H,H,a a a +'-'m@m@m@a *)&)~)~)~)~)f~{.{.{.{.{.{.{.{.{.{.9~'+G Z=Z=& & & & .,r+J%J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e e 5.5.5.Y.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#P!f f f f f f K K K -~-~y.y.y.y.y.y.y.y.y.y.;+;+3~3~3~3~3~]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+l~m~Z!Z!Z!Z!Z!Z!n~o~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.p~q~3~3~3~3~3~;+;+;+y.y.y.y.y.y.y.y.y.-~-~K K K f f f f f f P!P!W#W#W#W#$ $ $ x!x!Y.Y.Y.Y.5.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b 5'= = m@m@m@-'+'a a a H,H,- - - - f,F F F F 0 0 ; ; ; l l $+$+$+> > ]>]>^+^+^+^+I.9 9 9 9 , F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 O=O=*@*@_.t=D D i=i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@Z+Z+] ] ] C C 2 2 x+^ ^ ^ R&>$U+U+1 / / / r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+K.K.9.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+q+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ) _ _ _ u%} } } Q%X X X ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 0 F F F F f,- - - - H,H,a a a +'-'m@m@m@= +'&)~)~)~)~)~)r~{.{.{.{.{.{.{.{.{.{.9~G Z=& & & & & r+J%J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e e 5.5.5.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#P!f f f f f f K K K -~y.y.y.y.y.y.y.y.y.;+;+3~3~3~3~]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+s~s~s~s~s~s~s~s~s~s~s~s~s~# # ]+t~u~v~v~v~v~J!J!w~)!{.{.{.{.{.{.{.{.{.{.{.{.{.{./;x~0~]+]+]+]+]+]+]+3~3~3~3~;+;+y.y.y.y.y.y.y.y.y.-~K K K f f f f f f P!W#W#W#W#$ $ $ $ x!Y.Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.J%J%J%J%J%r+.,& & & & Z=Z=G '+'+'+c c d&d&d&I@I@I@k k k b b b 5'= m@m@m@m@+'a a a a H,- - - - f,T+F F F ,,0 ; ; ; l l $+$+$+> > ]>]>^+^+^+^+I.9 9 9 9 , F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 1 / / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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H j+_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ ^ x+2 2 C y%] ] ] Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.C.o.m m m ' Q+8 8 8 E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 0 F F F F f,- - - - H,a a a a +'m@m@m@m@= 5'm@~)~)~)~)4)4)r~{.{.{.{.{.{.{.{.{.{.9~Z=& & & & .,r+J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e 5.5.5.5.Y.Y.Y.Y.x!$ $ $ $ W#W#W#P!f f f f f f K K K -~y.y.y.y.y.y.y.y.;+;+3~3~3~3~]+]+]+]+]+]+]+]+]+]+]+s~s~s~s~s~s~s~# # # # # # # # # # # # # # # y~z~v~v~v~v~v~v~A~B~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.C~D~s~s~]+]+]+]+]+]+]+]+]+]+]+]+3~3~3~;+;+y.y.y.y.y.y.y.y.-~-~K K K f f f f f P!W#W#W#W#$ $ $ x!Y.Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%J%r+& & & & & Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@-'a a a a H,- - - - f,T+F F F ,,0 ; ; ; l l $+$+$+> > > ]>^+^+^+^+I.9 9 9 9 , F+F+F+E E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%: : : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=1+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ) _ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 C.C.C.o.m m m ' Q+8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+f,- - - - H,a a a a -'m@m@m@m@= 5'b m@~)~)~)4)4)4)E~{.{.{.{.{.{.{.{.{.{.9~& & & .,r+J%J%J%J%B.B.{&{&{&{&{&{&:!e e e e e 5.5.5.Y.Y.Y.Y.Y.x!$ $ $ W#W#W#W#P!f f f f f K K K -~y.y.y.y.y.y.y.;+;+3~3~3~3~]+]+]+]+]+]+]+]+]+]+s~s~s~s~s~# # # # # # # # # # # # # # # # # # # # F~G~H~v~v~v~v~v~I~J~K~{.{.{.{.{.{.{.{.{.{.{.{.{.{.v!L~]+# # # s~s~s~s~s~s~]+]+]+]+]+]+]+]+]+]+3~3~3~;+;+y.y.y.y.y.y.y.-~-~K K f f f f f P!P!W#W#W#$ $ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=Z=G '+'+'+c c d&d&d&I@I@I@k k k b b 5'= = m@m@m@-'+'a a a H,- - - - - T+F F F ,,0 ; ; ; ; l $+$+$+> > > ]>^+^+^+^+I.9 9 9 9 , F+F+F+E E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ )+)+g.g.)=)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ R&>$U+U+1 / / / r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+Q.1+W.>@>@B B o o V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v w x y y S T T >.,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e#_ _ _ u%} } } Q%X X X ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D t=_.*@*@O=O=6 6 {+{+P.P.) ) ) 7 C.C.C.o.o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+f,- - - - H,a a a +'-'m@m@m@= = 5'b b = ~)~)4)4)4)d)E~{.{.{.{.{.{.{.{.{.{.9~& & .,J%J%J%J%J%B.{&{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.Y.x!x!$ $ $ W#W#W#P!f f f f f K K K -~y.y.y.y.y.y.y.;+;+3~3~3~]+]+]+]+]+]+]+]+]+s~s~s~s~# # # # # # # # # # # # # # # M~M~M~M~M~M~N~N~N~N~O~P~Q~Q~Q~Q~Q~Q~R~S~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.T~U~# # # # # # # # # # # s~s~s~s~]+]+]+]+]+]+]+]+]+3~3~3~3~;+y.y.y.y.y.y.y.-~-~K K f f f f f P!W#W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b = = m@m@m@-'+'a a a H,H,- - - - T+F F F ,,0 ; ; ; ; l l $+$+> > > ]>^+^+^+^+I.9 9 9 9 , F+F+F+E E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@Z+Z+] ] ] C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x x y S S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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V~_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ x+x+2 2 C y%] ] ] Z+6@6@3 w.w.X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - - H,a a a +'-'m@m@m@= = b b b k = 4)4)4)d)d)d)W~{.{.{.{.{.{.{.{.{.{.9~.,r+J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.Y.x!$ $ $ $ W#W#W#P!f f f f f K K -~y.y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+]+]+]+s~s~s~s~# # # # # # # # # # # # M~M~M~N~N~N~N~N~N~N~N~j j j j X~Y~u~u~u~u~u~u~Z~`~/;{.{.{.{.{.{.{.{.{.{.{.{.{.{..) {N~N~N~M~M~M~# # # # # # # # # # # # s~s~s~s~]+]+]+]+]+]+]+]+3~3~3~;+y.y.y.y.y.y.y.-~K K K f f f f P!P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!{&{&{&{&{&{&B.J%J%J%J%J%.,& & & & Z=Z=G '+'+'+c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@+'a a a H,H,- - - - f,F F F ,,0 ; ; ; ; l l $+$+> > > ]>]>^+^+^+I.9 9 9 5;, F+F+F+E E 8 8 8 ' m m m o.C.C.C.7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)={ { { X&X&w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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(._ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C ] ] ] Z+6@6@6@w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,H,a a a +'m@m@m@m@= 5'b b b k k b 4)4)d)d)d)t)W~{.{.{.{.{.{.{.{.{.{.9~J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e 5.5.Y.Y.Y.Y.x!$ $ $ W#W#W#W#P!f f f f K K K -~y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+]+]+s~s~s~# # # # # # # # # # # M~M~N~N~N~N~N~N~j j j j j j j j j j j j .{+{u~u~u~u~u~u~@{(!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.#{${j j j j N~N~N~N~N~N~M~M~M~# # # # # # # # # # s~s~s~]+]+]+]+]+]+]+]+3~3~3~;+y.y.y.y.y.y.y.-~K K f f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@-'a a a a H,- - - - f,F F F F 0 0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.9 9 9 5;, F+F+F+E 8 8 8 Q+' m m m o.C.C.C.7 ) ) ) P.P.{+{+6 6 O=O=*@*@_.t=D D i=~ ~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+y*] ] y%C 2 2 x+x+^ ^ R&>$U+U+1 / / / r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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P=_ _ _ d#} } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,H,a a a +'m@m@m@m@= 5'b b b k k I@b 4)d)d)d)t)t)W~{.{.{.{.{.{.{.{.{.{.9~J%J%J%B.{&{&{&{&{&{&:!e e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#W#P!f f f f f K K -~y.y.y.y.y.y.;+;+3~3~]+]+]+]+]+]+]+]+s~s~s~# # # # # # # # # M~M~N~N~N~N~N~j j j j j j j j j j j j j +&+&+&%{&{*{*{*{*{*{*{={-{g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.;{>{j j j j j j j j j j j j j N~N~N~N~M~M~M~# # # # # # # # # s~s~s~]+]+]+]+]+]+]+3~3~3~;+y.y.y.y.y.y.-~K K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%.,& & & & Z=Z=G '+'+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@-'a a a a H,- - - - f,F F F F 0 0 ; ; ; l l $+$+> > > ]>^+^+^+^+I.9 9 9 5;, F+F+F+E 8 8 8 Q+m m m o.o.C.C.7 7 ) ) P.P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ )+)+g.g.)=)={ { +=X&w.w.6@6@6@Z+] ] ] C C 2 2 x+^ ^ ^ >$U+U+U+1 / / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+q+L+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j _ _ _ u%} } } Q%X X ( ( | | n.`.r$r$/ / 1 U+U+>$R&^ ^ ^ x+2 2 C y%] ] y*Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ i=i=D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E F+F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,a a a a -'m@m@m@m@= 5'b b k k k I@I@k d)d)t)t)t)F'W~{.{.{.{.{.{.{.{.{.{.9~J%B.B.{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#W#P!f f f f f K K -~y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+s~s~s~# # # # # # # # # M~M~N~N~N~N~j j j j j j j j j j +&+&+&+&+&+&+&,{,{,{'{q~*{*{*{*{*{*{){!{{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-J~0~,{,{+&+&+&+&+&+&+&j j j j j j j j j j N~N~N~N~M~M~# # # # # # # # s~s~s~]+]+]+]+]+]+]+3~3~;+;+y.y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.e e e e e :!:!{&{&{&{&{&B.J%J%J%J%r+.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@-'+'a a a H,- - - - f,T+F F F 0 0 ; ; ; l l $+$+> > > ]>^+^+^+^+I.9 9 9 5;, F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.P.{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.[.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *@_ _ u%} } } Q%X X X ( | | n.n.r$r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] Z+6@6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D D _.*@*@O=O=6 6 {+{+P.P.) ) ) 7 C.C.C.o.m m m ' 8 8 8 E F+F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,a a a a -'m@m@m@= = b b b k k I@I@I@d&k d)t)t)F'F'F'~{{.{.{.{.{.{.{.{.{.{.9~B.{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.Y.x!$ $ W#W#W#P!f f f f K K K -~y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+s~s~s~# # # # # # # # M~M~N~N~N~j j j j j j j j j +&+&+&+&+&,{,{,{(.(.(.(.(.(.{{]{*{*{*{*{*{*{^{/{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.({_{(.(.(.(.(.(.(.(.,{,{,{,{+&+&+&+&+&j j j j j j j j N~N~N~N~M~M~# # # # # # # s~s~s~]+]+]+]+]+]+]+3~3~;+y.y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%.,& & & & Z=Z='+'+'+c c d&d&d&I@I@I@k k b b b 5'= m@m@m@-'+'a a a H,- - - - f,T+F F F 0 0 ; ; ; l l $+$+> > > ]>^+^+^+I.I.9 9 9 5;F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)={ { { X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 / / / r$`.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . N~_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.o.o.m m ' Q+8 8 E E F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a a -'m@m@m@= = b b b k k I@I@I@d&d&k t)t)F'F'F'I):{{.{.{.{.{.{.{.{.{.{.9~{&{&{&{&{&:!e e e e e 5.5.Y.Y.Y.Y.x!$ $ W#W#W#P!f f f f K K -~y.y.y.y.y.y.;+3~3~]+]+]+]+]+]+]+s~s~# # # # # # # M~M~N~N~N~j j j j j j j j +&+&+&+&,{,{,{(.(.(.(.(.(.(.(.(.(.j U~<{*{*{*{*{*{*{x~j!{.{.{.{.{.{.{.{.{.{.{.{.{.{.}~[{}{e#e#(.(.(.(.(.(.(.(.(.(.(.(.(.(.,{,{+&+&+&+&+&j j j j j j j N~N~N~M~M~# # # # # # # s~s~s~]+]+]+]+]+]+3~3~;+;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&{&B.J%J%J%J%r+.,& & & Z=Z=G '+'+'+c c d&d&d&I@I@k k b b b 5'= m@m@m@m@+'a a a H,- - - - f,T+F F F 0 0 ; ; ; l l $+$+> > > ]>^+^+^+I.I.9 9 9 5;F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D i=~ ~ ~ ~ )+g.g.g.)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ >$U+U+U+1 / / r$r$n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=l+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *@_ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ ^ x+2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'-'m@m@m@= 5'b b b k k I@I@I@d&d&c I@t)F'F'F'H)H):{{.{.{.{.{.{.{.{.{.{.9~{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#P!f f f f K K -~y.y.y.y.y.y.;+3~3~]+]+]+]+]+]+s~s~# # # # # # # M~M~N~N~N~j j j j j j +&+&+&+&,{,{(.(.(.(.(.(.(.(.(.(.(.e#e#e#e#|{1{*{*{*{*{*{*{2{3{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.&~4{e#e#e#e#e#e#e#e#e#e#e#e#e#(.(.(.(.(.(.(.(.(.(.,{,{+&+&+&+&j j j j j j j N~N~N~M~# # # # # # # s~s~s~]+]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ Y.Y.Y.Y.5.5.5.e e e e :!{&{&{&{&{&B.B.J%J%J%J%.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b 5'= m@m@m@m@+'a a a H,H,- - - f,T+F F F 0 0 ; ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 ' m m m o.C.C.C.7 ) ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ )+)+g.g.)=)={ { +=X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.b.b.<.[.-.-.Q R R R q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . s~_ _ _ d#} } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] Z+6@6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+, 5;9 9 9 I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'-'m@m@m@= 5'b b b k k I@I@d&d&d&c c d&F'F'I)H)Q)Q):{{.{.{.{.{.{.{.{.{.{.9~{&{&:!e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#W#P!f f f K K -~y.y.y.y.y.;+3~3~3~]+]+]+]+]+s~s~s~# # # # # # M~M~N~N~j j j j j j j +&+&+&,{,{(.(.(.(.(.(.(.(.(.e#e#e#e#e#e#e#e#M~5{<{h~6{6{6{6{*{7{z,{.{.{.{.{.{.{.{.{.{.{.{.{.{.8{9{(.H H H H H H H 0{0{0{0{e#e#e#e#e#e#e#e#e#(.(.(.(.(.(.(.(.,{,{+&+&+&+&j j j j j j N~N~N~M~# # # # # # # s~s~]+]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ x!Y.Y.Y.Y.5.5.e e e e :!:!{&{&{&{&{&B.J%J%J%J%r+& & & & Z=Z='+'+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@+'a a a H,H,- - - f,T+F F F 0 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 ' m m m o.C.C.C.7 ) ) ) P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q q r s t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=#+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D _ _ u%} } } Q%X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=O=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 I.^+^+^+]>]>> > > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'-'m@m@m@= 5'b b b k k I@I@d&d&d&c c '+d&F'I)H)Q)Q)Q):{{.{.{.{.{.{.{.{.{.{.9~:!:!e e e e 5.5.Y.Y.Y.Y.x!$ $ W#W#W#P!f f f K K -~y.y.y.y.y.;+3~3~]+]+]+]+]+]+s~s~# # # # # # M~M~N~N~j j j j j j +&+&+&,{,{(.(.(.(.(.(.(.(.e#e#e#e#e#e#e#0{0{H H H a{b{6{6{6{6{6{6{c{d{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.e{f{g g g g g g H H H H H H H H H H H 0{0{0{e#e#e#e#e#e#e#(.(.(.(.(.(.(.,{,{+&+&+&j j j j j j N~N~N~M~# # # # # # s~s~s~]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#$ $ $ x!Y.Y.Y.5.5.5.e e e e :!{&{&{&{&{&B.B.J%J%J%r+.,& & & Z=Z=G '+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@-'a a a H,H,- - - f,T+F F F 0 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E E 8 8 Q+' m m o.o.C.C.7 7 ) ) P.P.P.{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.a.b.b.<.[.-.-.Q R R R q r r t u u v w x x y S S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=& . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 C y%] ] ] Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+P.P.) ) ) 7 C.C.C.o.m m m ' 8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+]>]>> > > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'-'m@m@m@= 5'b b k k I@I@I@d&d&d&c c '+'+d&H)H)Q)Q)Q)Y)g{{.{.{.{.{.{.{.{.{.{.h{e e e e 5.5.5.Y.Y.Y.x!$ $ W#W#W#P!f f f f K -~y.y.y.y.y.;+3~3~]+]+]+]+]+]+s~s~# # # # # # M~N~N~N~j j j j j +&+&+&,{,{(.(.(.(.(.(.e#e#e#e#e#e#0{0{0{H H H H H H i{j{<{<{<{<{<{<{Z~k{i,{.{.{.{.{.{.{.{.{.{.{.{.{.{.l{m{g g g g g g g g g g g g g g g g g H H H H H H H H 0{0{e#e#e#e#e#e#(.(.(.(.(.(.(.,{+&+&+&j j j j j j N~N~N~M~# # # # # # s~s~]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f W#W#W#$ $ $ x!Y.Y.Y.5.5.e e e e :!:!{&{&{&{&B.B.J%J%J%J%.,& & & & Z=G '+'+'+c c d&d&I@I@I@k k b b b = = m@m@m@-'a a a H,H,- - - f,T+F F F 0 0 ; ; ; l $+$+$+> > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.;.Q R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=0.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@} _ u%} } } Q%X X ( ( | | n.`.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+P.P.P.) ) 7 C.C.C.o.m m m ' 8 8 8 E F+F+F+, 5;9 9 &.I.^+^+^+]>]>> > $+$+l l ; ; ; 0 ,,F F F T+- - - - H,a a a +'m@m@m@m@= 5'b b k k I@I@I@d&d&c c '+'+'+G Z=& & '+Y)G)G)G)G)^!n{{.{.{.{.{.{.{.{.{.{.6~5.Y.Y.Y.x!$ $ W#W#W#f f f f K -~y.y.y.y.y.;+3~]+]+]+]+]+s~s~# # # # # M~N~N~N~j j j j +&+&+&,{(.(.(.(.(.e#e#e#e#0{0{H H H H g g g g g g g g D+D+D+D+F{G{B{B{B{B{B{B{H{/~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.I{J{M+M+M+M+M+M+M+M+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+D+D+D+D+D+D+D+g g g g g g g H H H H H 0{e#e#e#e#e#(.(.(.(.(.,{+&+&j j j j j N~N~M~# # # # # s~s~]+]+]+]+]+3~3~;+y.y.y.y.-~K K f f f P!W#W#W#$ $ x!Y.Y.Y.5.5.e e e e :!{&{&{&{&{&B.J%J%J%J%.,& & & & Z=G '+'+c c d&d&d&I@I@I@k k b b 5'= m@m@m@-'a a a H,H,- - - f,T+F F F 0 ; ; ; l l $+$+$+> > ]>]>^+^+I.I.9 9 9 5;F+F+F+F+E 8 8 Q+' m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -+_ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>> > > $+$+l ; ; ; 0 ,,F F F T+- - - - H,a a a -'m@m@m@= 5'b b k k I@I@d&d&d&c c '+'+G Z=& & & .,r+J%J%J%B.{&{&J%[!0!0!h!h!h!^]{.{.{.{.{.{.{.{.{.{.6~f f K -~y.y.y.y.;+3~]+]+]+]+s~s~# # # # M~N~N~j j j j +&,{(.(.(.(.e#e#e#0{H H H g g g g g D+D+D+d+d+d+d+d+d+d+M+M+M+J.J.J.d+z{p{+]+]+]+]+]+]/])!{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;(]_]e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@i i i @ @ @ @ @ @ @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.J.J.M+M+M+d+d+d+d+d+d+D+D+D+D+g g g g H H H H 0{e#e#e#(.(.(.,{+&+&j j j j N~N~# # # # # s~]+]+]+]+3~3~;+y.y.y.y.K K f f f P!W#W#$ $ x!Y.Y.Y.5.5.e e e :!{&{&{&{&B.B.J%J%J%r+& & & & Z='+'+'+c c d&d&I@I@I@k k b b 5'= m@m@m@+'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.&.9 9 5;F+F+F+F+E 8 8 8 ' m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D i=i=~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.[.-.-.;.Q R R q q r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i } _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+)+~ ~ ~ i=D D t=*@*@*@O=6 6 6 {+P.P.) ) 7 7 C.C.-+o.m m ' Q+8 8 E F+F+F+F+5;9 9 &.I.^+^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+- - - - H,a a a -'m@m@m@= 5'b b k k I@I@d&d&d&c c '+'+G Z=& & & .,r+J%J%J%B.{&{&{&J%0!0!h!h!h!t!^]{.{.{.{.{.{.{.{.{.{.6~K K -~y.y.y.y.3~3~]+]+]+]+s~# # # # # N~N~j j j j +&+&(.(.(.(.e#e#e#0{H H H g g g g g D+D+D+d+d+d+d+d+d+M+M+M+J.J.J.J.J.:]<]+]+]+]+]+]+]H{[]{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.}]|]e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@i i i @ @ @ @ @ @ @ @ @ @ @ @ q=E+E+J.J.J.J.J.J.J.M+M+M+d+d+d+d+d+d+D+D+D+g g g g g H H H 0{e#e#e#(.(.(.,{+&+&j j j j N~M~# # # # s~s~]+]+]+]+3~;+y.y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.Y.5.5.e e e :!:!{&{&{&{&B.J%J%J%r+& & & & Z='+'+'+c c d&d&I@I@I@k k b b 5'= m@m@m@+'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.9 9 9 5;F+F+F+E E 8 8 Q+m m m o.-+C.C.7 ) ) P.P.P.{+6 6 P=O=*@*@_.t=D D i=~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o @V m.m. +y+y+y+z+l+l+G.:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=T#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :@_ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+{+P.P.) ) 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+5;9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+- - - - H,a a a +'m@m@m@= 5'b b k k I@I@I@d&d&c c '+'+G Z=& & & .,r+J%J%J%B.{&{&{&{&@>h!h!h!h!t!t!1]{.{.{.{.{.{.{.{.{.{.2]K y.y.y.y.;+3~]+]+]+]+s~s~# # # # M~N~N~j j j +&+&,{(.(.(.e#e#e#0{H H H g g g g D+D+D+D+d+d+d+d+d+M+M+M+J.J.J.J.J.J.g 3]4]+]+]+]+]+]+]5]y,{.{.{.{.{.{.{.{.{.{.{.{.{.{.7)6]7]e@e@e@e@e@e@e@J J J J J J J J J J J J J J J J J J J e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.J.M+M+d+d+d+d+d+d+D+D+D+g g g g g H H H 0{e#e#(.(.(.(.,{+&+&j j j N~N~M~# # # # s~]+]+]+]+3~3~;+y.y.y.-~K K f f f W#W#$ $ x!Y.Y.Y.5.5.e e e :!:!{&{&{&{&B.J%J%J%r+& & & & Z='+'+'+c c d&d&I@I@I@k k b b 5'= m@m@m@+'a a a H,- - - f,T+F F ,,0 ; ; ; l l $+$+> > ]>]>^+^+I.I.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q r r s t u v w x x y z S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~&@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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W$H._ d#} } Q%X X X ( | | n.n.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+, 9 9 9 I.I.^+^+]>]>> > $+$+l l ; ; ; 0 ,,F F T+f,- - - H,a a a +'m@m@m@= 5'b b k k I@I@I@d&d&c c '+'+G Z=& & & .,r+J%J%J%B.{&{&{&{&:!{&h!h!h!t!t!A!1]{.{.{.{.{.{.{.{.{.{.2]y.y.y.y.;+3~]+]+]+]+s~# # # # M~N~N~j j j +&+&,{(.(.(.(.e#e#0{H H H g g g g D+D+D+d+d+d+d+d+d+M+M+J.J.J.J.J.J.J.E+r{8]+]+]+]+]+]+]9]({{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.0]a]J J J 7.7.7.7.7.!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.7.7.J J J J e@e@e@e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.J.M+M+d+d+d+d+d+D+D+D+D+g g g g H H H e#e#e#(.(.(.(.,{+&j j j j N~N~# # # # s~s~]+]+]+]+3~;+y.y.y.y.K K f f f P!W#W#$ $ Y.Y.Y.5.5.e e e e :!{&{&{&{&B.J%J%J%r+& & & & Z='+'+'+c c d&d&I@I@I@k b b b = = m@m@m@+'a a a H,- - - f,F F F ,,0 ; ; ; l $+$+$+> > ]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 ' m m o.-+C.C.7 7 ) ) P.P.{+6 6 6 O=*@*@*@t=D D i=~ ~ ~ )+)+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p f.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . = _ u%} } } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=P=6 6 {+P.P.) ) 7 7 C.C.-+o.m m ' 8 8 8 E F+F+F+, 5;9 9 &.I.^+^+^+]>> > $+$+$+l ; ; ; 0 ,,F F F f,- - - H,a a a +'m@m@m@= = b b k k I@I@I@d&d&c c '+'+G Z=& & & .,r+J%J%J%B.{&{&{&{&:!e {&h!h!t!t!A!A!1]{.{.{.{.{.{.{.{.{.{.2]y.y.;+3~3~]+]+]+s~s~# # # # M~N~j j j j +&,{(.(.(.(.e#e#0{H H H g g g g D+D+D+d+d+d+d+d+d+M+M+J.J.J.J.J.J.E+q=a+b]+]+]+]+]+]+]c]d]'!{.{.{.{.{.{.{.{.{.{.{.{.{.{.!{e]7.!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.7.J J e@e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.M+M+d+d+d+d+d+d+D+D+D+g g g g H H 0{e#e#e#(.(.(.(.+&+&j j j N~N~M~# # # # s~]+]+]+]+3~3~y.y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.5.5.e e e e :!{&{&{&{&B.J%J%J%r+.,& & & Z='+'+'+c c d&d&I@I@I@k b b b = m@m@m@-'+'a a H,H,- - - f,F F F ,,0 ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 5;F+F+F+F+E 8 8 Q+m m m o.-+C.C.7 ) ) P.P.P.{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+~+1+W.W.>@B B o o V m.m.m. +y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.a.b.<.[.-.-.Q R R R q r r t u u v w x x y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==@X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.R&_ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+{+P.P.) ) 7 C.C.-+o.m m m Q+8 8 E E F+F+F+5;9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; 0 ,,F F F f,- - - H,H,a a +'-'m@m@= = b b b k I@I@I@d&d&c c '+'+G Z=& & & .,r+J%J%J%B.{&{&{&{&:!e e {&t!t!A!A!A!g!f]{.{.{.{.{.{.{.{.{.{.2]y.;+3~]+]+]+]+s~s~# # # M~N~N~j j j +&+&,{(.(.(.e#e#e#0{H H g g g g D+D+D+d+d+d+d+d+M+M+J.J.J.J.J.J.E+E+q=@ ]g]+]+]+]+]+]h]6]i]{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.j]k]!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.J J e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ q=E+E+J.J.J.J.J.M+M+M+d+d+d+d+d+D+D+D+g g g H H H 0{e#e#e#(.(.(.,{+&+&j j j N~N~# # # # s~s~]+]+]+]+3~;+y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.5.5.e e e e :!{&{&{&{&B.J%J%J%r+.,& & & Z='+'+'+c c d&d&I@I@k k b b b = m@m@m@-'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.9 9 9 5;F+F+F+E 8 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@_.D D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ : : : c+< < < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p r.r.k.a.b.b.[.-.-.;.Q R R q r r s t u u v w x y z S T T >.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e _ u%} } } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+, 9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+- - - - H,a a a -'m@m@m@= b b b k I@I@I@d&d&c c '+'+G Z=& & & .,r+J%J%J%B.{&{&{&{&:!e e e :!t!A!A!A!g!K!f]{.{.{.{.{.{.{.{.{.{.2];+3~]+]+]+]+s~# # # # M~N~j j j j +&,{(.(.(.e#e#e#0{H H H g g g D+D+D+d+d+d+d+d+M+M+J.J.J.J.J.J.E+q=@ @ l]&]+]+]+]+]h]m]n]o]g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.p]q]!@!@!@!@!@!@!@!@!@!@s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.J J e@e@e@e@e@e@e@e@e@e@i @ @ @ @ @ @ @ @ q=E+J.J.J.J.J.J.M+M+d+d+d+d+d+D+D+D+g g g H H H 0{e#e#(.(.(.(.,{+&j j j N~N~M~# # # # s~]+]+]+]+3~;+y.y.y.y.K K f f f W#W#$ $ x!Y.Y.Y.5.5.e e e :!{&{&{&{&B.J%J%J%r+.,& & & Z='+'+'+c c d&d&I@I@k k b b 5'= m@m@m@-'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+I.I.9 9 9 , F+F+F+E 8 8 8 ' m m o.o.C.C.7 7 ) ) P.P.{+6 6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.>@>@B B o o V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *@_ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+P.P.) ) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+, 9 9 9 &.I.^+^+]>]>> > $+$+l l ; ; ; 0 ,,F F T+- - - - H,a a a -'m@m@m@= 5'b b k k I@I@d&d&c c '+'+'+Z=& & & .,r+J%J%J%B.{&{&{&{&:!e e e 5.:!A!A!A!K!K!]!f]{.{.{.{.{.{.{.{.{.{.2]3~]+]+]+s~s~# # # # N~N~j j j +&+&(.(.(.(.e#e#0{H H H g g g D+D+D+d+d+d+d+d+M+M+J.J.J.J.J.E+E+q=@ @ E+;]r]+]+]h]m]m]m]s]!{{.{.{.{.{.{.{.{.{.{.{.{.{.{.t]u]v]!@!@!@s+s+s+s+s+s+s+h h h h h h h h h h h h h h h h h h h h h h h h h h h h h h s+s+s+s+s+s+s+!@!@!@!@!@!@!@!@!@!@!@!@7.7.J J e@e@e@e@e@e@e@e@e@i @ @ @ @ @ @ @ q=E+J.J.J.J.J.J.M+M+d+d+d+d+d+D+D+g g g g H H H 0{e#e#(.(.(.,{+&+&j j j N~N~# # # # s~s~]+]+]+3~3~y.y.y.y.-~K f f f W#W#$ $ x!Y.Y.Y.5.5.e e e :!{&{&{&{&B.J%J%J%r+& & & & Z='+'+'+c c d&d&I@I@k k b b 5'= m@m@m@-'a a a H,- - - f,T+F F ,,0 ; ; ; l $+$+$+> > ]>^+^+^+I.&.9 9 5;, F+F+F+E 8 8 Q+m m m o.-+C.C.7 ) ) P.P.P.{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.=.<+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q r r s t u v w x x y z S T T ,.d.d.d.e.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F _ d#} } Q%X X X ( | | n.n.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=P=6 6 {+P.P.) ) 7 7 C.C.o.o.m m ' 8 8 8 E F+F+F+, 9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; 0 ,,F F F f,- - - H,a a a +'m@m@m@= 5'b b k k I@I@d&d&d&c '+'+'+Z=& & & & r+J%J%J%B.{&{&{&{&:!e e e 5.5.Y.e A!K!K!]!]! ~[{{.{.{.{.{.{.{.{.{.{.2]]+]+s~# # # # M~N~j j j +&+&,{(.(.(.e#e#0{H H g g g g D+D+D+d+d+d+d+M+M+J.J.J.J.J.E+q=@ @ @ @ y]V{m]h]m]m]m]m]m]z]j!{.{.{.{.{.{.{.{.{.{.{.{.{.{.z,A]B]h h h h h h h h h h h h h h h A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.h h h h h h h h h h h h h h s+s+s+s+!@!@!@!@!@!@!@!@!@!@7.7.J e@e@e@e@e@e@e@e@i @ @ @ @ @ @ @ q=E+J.J.J.J.J.M+M+d+d+d+d+D+D+D+g g g H H H 0{e#e#(.(.(.,{+&+&j j j N~M~# # # # s~]+]+]+]+3~;+y.y.y.-~K f f f P!W#W#$ $ Y.Y.Y.5.5.e e e :!{&{&{&{&B.J%J%J%r+& & & Z=Z='+'+'+c d&d&d&I@I@k k b b 5'= m@m@m@+'a a a H,- - - f,F F F 0 0 ; ; l l $+$+> > ]>]>^+^+^+I.9 9 9 , F+F+F+E 8 8 8 ' m m o.-+C.C.7 7 ) ) P.P.{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < < b+K.K.9.r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=q$I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.>$u%} } } Q%X X ( ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+{+P.P.) ) 7 C.C.-+o.m m ' Q+8 8 E F+F+F+, 9 9 9 &.I.^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+- - - H,H,a a +'-'m@m@= 5'b b k k I@I@d&d&d&c '+'+'+Z=Z=& & & r+J%J%J%B.{&{&{&{&:!e e e 5.5.Y.Y.e K!K!]!]! ~`![{{.{.{.{.{.{.{.{.{.{.2]s~s~# # # # N~N~j j j +&,{(.(.(.e#e#e#H H H g g g D+D+D+d+d+d+d+M+M+J.J.J.J.J.E+q=@ @ @ @ @ :]<]h]m]m]m]m]m]C]D]{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.E]F]h h h h h h h h h A.A.A.A.A.A.A.A.A.A.A.A.W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$A.A.A.A.A.A.A.A.A.A.A.A.h h h h h h h h h h h s+s+s+!@!@!@!@!@!@!@!@!@7.7.J e@e@e@e@e@e@e@i @ @ @ @ @ @ @ q=E+J.J.J.J.J.M+M+d+d+d+d+D+D+D+g g g H H H e#e#e#(.(.(.,{+&j j j N~N~# # # # s~]+]+]+]+3~;+y.y.y.-~K f f f P!W#W#$ $ Y.Y.Y.5.5.e e e :!{&{&{&{&B.J%J%J%r+& & & Z=Z='+'+c c d&d&d&I@I@k k b b = = m@m@-'+'a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+I.&.9 9 9 , F+F+F+E 8 8 Q+m m m o.-+C.C.7 ) ) P.P.{+{+6 6 O=*@*@*@_.D D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ T$: : : c+< < b+b+K.K.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+Q.1+W.>@>@B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.;.Q R R q r r s t u u w x x y z S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+q+L+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#U#q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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G]_ d#} } Q%X X X ( | | n.n.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m Q+8 8 8 E F+F+F+5;9 9 &.I.^+^+^+]>> > $+$+$+l ; ; ; 0 ,,F F T+- - - - H,a a a -'m@m@m@= b b b k I@I@I@d&d&c c '+'+G Z=& & & r+J%J%J%B.{&{&{&{&:!e e e 5.5.Y.Y.Y.5.K!]!]! ~`!`!)~{.{.{.{.{.{.{.{.{.{.2]s~# # # M~N~j j j +&+&,{(.(.(.e#e#0{H H g g g g D+D+d+d+d+d+d+M+J.J.J.J.J.E+q=@ @ @ @ @ ^.H]m]m]m]m]m]m]+]I]z,{.{.{.{.{.{.{.{.{.{.{.{.{.{.J]K]h h h h h h A.A.A.A.A.A.A.A.W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$A.A.A.A.A.A.A.A.h h h h h h h h h h s+s+s+!@!@!@!@!@!@!@!@7.J J e@e@e@e@e@e@e@i @ @ @ @ @ @ q=E+J.J.J.J.J.M+d+d+d+d+d+D+D+g g g g H H 0{e#e#(.(.(.,{+&+&j j j N~M~# # # s~s~]+]+]+3~3~y.y.y.y.K K f f P!W#W#$ $ Y.Y.Y.5.5.e e e :!{&{&{&{&B.J%J%J%r+& & & Z=G '+'+c c d&d&I@I@I@k b b b = m@m@m@-'a a a H,- - - - T+F F ,,0 ; ; ; l $+$+$+> > ]>^+^+^+I.&.9 9 5;F+F+F+E 8 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < < b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@B B o o V m.m.m.y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.b.b.<.[.-.-.Q R R q q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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P.u%} } } Q%X X ( ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+P.P.) ) 7 7 C.C.-+o.m m ' 8 8 8 E F+F+F+, 9 9 9 I.^+^+^+]>]>> > $+$+l ; ; ; 0 ,,F F F f,- - - H,a a a -'m@m@m@= b b b k I@I@I@d&d&c c '+'+G Z=& & & r+J%J%J%B.{&{&{&{&:!e e e 5.5.Y.Y.Y.$ 5.]!]! ~`!`!`!)~{.{.{.{.{.{.{.{.{.{.2]# # # M~N~j j j +&+&(.(.(.e#e#e#H H H g g g D+D+D+d+d+d+d+M+M+J.J.J.J.E+q=@ @ @ @ @ @ L]M]m]m]m]m]m]m]K]d{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.N]O]h h A.A.A.A.A.A.A.W$W$W$W$W$W$W$W$W$W$W$W$P]P]P]P]P]P]P]X.X.X.X.X.X.X.X.X.X.P]P]P]P]P]P]P]W$W$W$W$W$W$W$W$W$W$W$W$A.A.A.A.A.A.A.h h h h h h h h s+s+s+!@!@!@!@!@!@!@!@7.J e@e@e@e@e@e@e@i @ @ @ @ @ @ q=E+J.J.J.J.M+M+d+d+d+d+D+D+D+g g g H H H e#e#e#(.(.(.+&+&j j j N~M~# # # # s~]+]+]+3~3~y.y.y.y.K K f f P!W#W#$ $ Y.Y.Y.5.5.e e e :!{&{&{&{&B.J%J%J%r+& & & Z=G '+'+c c d&d&I@I@I@k b b b = m@m@m@-'a a a H,- - - f,F F F ,,0 ; ; l l $+$+> > ]>]>^+^+^+I.9 9 9 , F+F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) ) P.P.{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( ( X X Q%} } } u%_ _ j+[ [ [ T$: : : c+< < b+b+K.9.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 d#} } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&X&{ { )=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@m@= b b k k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#W#f f f K y.y.y.;+3~]+]+]+s~# R^v~Q~Q~u~u~*{Z^{.{.{.{.{.{.{.{.{.{.S^d+d+d+M+M+J.J.J.E+@ @ @ @ `^ /m]m]m]S]Y]r]n]./g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.6~+/4&#^z.z.z.z.+ + /^/././././.8^9^9^. . . . . . o^o^o^v^v^v^v^v^v^v^v^K^L^L^L^L^Q^Q^Q^Q^Q^Q^Q^Q^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Q^Q^Q^Q^Q^Q^Q^L^L^L^L^K^K^v^v^v^v^v^v^v^o^o^o^. . . . . . 9^9^8^/./././././^+ + z.z.z.z.#^4&4&4&X.X.P]W$W$W$A.A.A.h h h h s+!@!@!@!@!@J e@e@e@e@i @ @ @ @ q=J.J.J.J.M+d+d+d+D+D+g g g H H e#e#(.(.,{+&j j j N~# # # s~s~]+]+]+3~y.y.y.-~K f f P!W#$ $ x!Y.Y.5.e e e :!{&{&{&{&B.J%J%r+& & & Z=G '+'+c d&d&I@I@I@k b b 5'= m@m@-'a a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ / r$n.n.| | ( X X X } } } u%_ _ _ [ [ [ T$: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@>@B o o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+p p f.r.k.k.b.b.<.[.-.;.Q R R q q r s t u u w x x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {+} } } Q%X X ( | | n.n.r$r$/ [@1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@3 w.X&+={ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> $+$+l l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e e 5.Y.Y.Y.$ $ W#P!f f K -~y.y.y.3~]+]+]+s~# # # M~,/u~u~*{*{*{*{@/{.{.{.{.{.{.{.{.{.{.S^M+J.J.J.J.q=@ @ y]{^S]m]m]m]m]Y]r]'/7){.{.{.{.{.{.{.{.{.{.{.{.{.{.y,)/h #^z.z.z.z.+ /^/././././.8^9^9^. . . . . o^o^v^v^v^v^v^v^K^K^L^L^Q^Q^Q^Q^Q^Y^Y^Y^Y^Y^*/*/=/=/=/=/=/=/=/=/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/=/=/=/=/=/=/=/*/*/Y^Y^Y^Y^Y^Y^Q^Q^Q^Q^L^L^L^K^v^v^v^v^v^v^o^o^. . . . . . 9^9^/./././././^+ + z.z.z.#^4&4&X.X.X.P]W$W$W$A.A.h h h h s+!@!@!@!@7.J e@e@e@e@@ @ @ @ q=E+J.J.J.M+d+d+d+D+D+g g g H 0{e#e#(.(.,{+&j j N~N~# # # s~]+]+]+3~;+y.y.y.K f f P!W#W#$ x!Y.Y.5.5.e e :!{&{&{&{&B.J%J%r+& & & Z=G '+'+c d&d&I@I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+y*] ] y%2 2 2 x+^ ^ R&>$U+1 [@/ / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : : c+< < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=5.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I Q%} } Q%X X X ( | | n.`.r$/ / [@1 U+>$R&^ ^ x+2 2 2 y%] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#W#f f K K y.y.y.3~3~]+]+s~s~# # M~N~!/u~*{*{*{*{*{~/{.{.{.{.{.{.{.{.{.{.S^J.J.J.J.q=@ @ F{<]m]m]m]m]m]Y]{/]/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.^///4&#^z.z.z.+ + /^/./././.8^9^9^. . . . . o^o^v^v^v^v^v^v^K^L^L^Q^Q^Q^Q^Q^Y^Y^Y^Y^*/*/=/=/=/=/=/=/>/>/>/>/>/>/>/>/>/>/>/>/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/>/>/>/>/>/>/>/>/>/>/>/>/>/=/=/=/=/=/*/*/Y^Y^Y^Y^Y^Q^Q^Q^Q^L^L^K^K^v^v^v^v^v^o^o^o^. . . . . 9^8^/./././././^+ z.z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h h s+!@!@!@!@!@J e@e@e@e@i @ @ @ q=E+J.J.J.M+d+d+d+D+D+g g g H 0{e#e#(.(.,{+&j j N~M~# # # s~]+]+]+3~;+y.y.-~K f f P!W#$ $ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%r+& & & Z='+'+c c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+b+K.K.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.d.2.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=r$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .,d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&X&{ { )=g.g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & & r+J%J%B.{&{&{&{&:!e e 5.5.Y.Y.x!$ W#W#f f f K y.y.y.;+3~]+]+]+s~# # # N~j !/u~*{*{*{*{*{~/{.{.{.{.{.{.{.{.{.{.S^J.J.J.q=@ ^.}^_/m]m]m]m]S]+]`]z,{.{.{.{.{.{.{.{.{.{.{.{.{.{.://>/>/>/>/>/>/>/>/(/(/(/[/[/[/[/[/[/[/[/[/[/[/}/}/}/}/}/}/[/[/[/[/[/[/[/[/[/[/[/(/(/(/>/>/>/>/>/>/>/>/>/=/=/=/=/=/*/*/Y^Y^Y^Y^Q^Q^Q^Q^L^L^K^v^v^v^v^v^v^o^o^. . . . 9^9^8^/././././.+ + z.z.z.#^4&4&X.X.X.W$W$W$A.A.A.h h h s+s+!@!@!@!@J e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g g H 0{e#e#(.(.,{+&j j N~M~# # # s~]+]+]+3~y.y.y.-~K f f P!W#$ $ Y.Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F F 0 ; ; l l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ / r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ T$: : c+< < < b+K.K.r#r#n v.q.q.G+H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=N.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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O=} } } Q%X X ( | | n.n.r$/ / [@1 U+U+>$^ ^ x+2 2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ $ W#P!f f K -~y.y.;+3~]+]+]+s~# # # N~j j !/*{*{*{*{*{*{){{.{.{.{.{.{.{.{.{.{.S^J.J.q=@ 4^5^+]m]m]m]m]S]|/S^{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.1/k]4&#^z.z.z.+ /^/././././.9^9^. . . . . o^o^v^v^v^v^v^K^L^L^Q^Q^Q^Q^Y^Y^Y^Y^*/=/=/=/=/=/>/>/>/>/>/>/>/(/(/[/[/[/[/[/[/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/[/[/(/(/>/>/>/>/>/>/>/>/=/=/=/=/*/*/Y^Y^Y^Y^Q^Q^Q^L^L^K^v^v^v^v^v^v^o^o^. . . . 9^9^8^/././././^+ + z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h s+s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H 0{e#e#(.(.,{+&j j N~M~# # # s~]+]+3~3~y.y.y.K K f f W#W#$ $ Y.Y.5.5.e e :!:!{&{&{&B.J%J%r+& & & Z=G '+'+c d&d&I@I@k k b b = m@m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.7 7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@6@y*] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I Q%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 7 C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#P!f f K -~y.y.y.3~]+]+]+s~# # # M~N~j j 2/*{*{*{*{*{6{){{.{.{.{.{.{.{.{.{.{.S^J.q=0^a^+]+]m]m]m]m]T]k{{,{.{.{.{.{.{.{.{.{.{.{.{.{.{.M!3/4&4&z.z.z.+ + /^/./././.8^9^9^. . . . o^o^v^v^v^v^v^K^L^L^Q^Q^Q^Y^Y^Y^Y^*/=/=/=/=/>/>/>/>/>/>/>/(/(/[/[/[/[/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/[/(/(/>/>/>/>/>/>/=/=/=/=/*/Y^Y^Y^Y^Q^Q^Q^L^L^L^K^v^v^v^v^v^o^. . . . . 9^9^8^/././././^+ z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h h s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H 0{e#(.(.(.+&+&j j N~M~# # s~]+]+]+3~;+y.y.y.K f f P!W#W#$ x!Y.Y.5.5.e e :!{&{&{&B.J%J%J%r+& & & Z='+'+c c d&d&I@I@k b b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.n.| ( ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . & d#} } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@3 w.X&+={ { )=g.g.g.~ ~ ~ i=D D D _.*@*@O=6 6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&{&:!e e 5.5.Y.Y.x!$ W#W#f f K K y.y.y.3~]+]+]+s~# # # M~N~j j +&M~*{*{*{*{6{6{4/{.{.{.{.{.{.{.{.{.{.S^q=5/&^+]+]m]m]m]m]6/].{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-7/Q]4&#^z.z.z.+ /^/./././.8^9^9^. . . . o^o^v^v^v^v^v^K^L^L^Q^Q^Q^Y^Y^Y^Y^*/=/=/=/=/>/>/>/>/>/(/(/[/[/[/}/}/}/}/}/}/}/}/}/}/}/}/8/8/8/8/8/8/8/8/8/8/8/8/8/8/8/8/8/8/8/8/8/8/8/8/8/8/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/[/(/>/>/>/>/>/>/=/=/=/=/*/Y^Y^Y^Q^Q^Q^Q^L^L^K^v^v^v^v^o^o^. . . . . 9^8^/././././^+ + z.z.z.4&4&4&X.X.W$W$W$A.A.h h h h s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H 0{e#(.(.(.+&j j j N~# # # s~]+]+]+3~;+y.y.-~K f f P!W#$ $ Y.Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n v.q.q.G+H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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O=} } } Q%X X ( | | n.n.r$/ / [@1 U+U+R&^ ^ x+2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#P!f f K y.y.y.;+3~]+]+]+s~# # M~N~j j +&,{V#*{*{*{h~6{<{4/{.{.{.{.{.{.{.{.{.{.2]k^+]+]+]m]m]m]9/0/g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.{]a/4&4&#^z.z.z.+ /^/./././.8^9^. . . . o^o^v^v^v^v^v^K^L^L^Q^Q^Q^Y^Y^Y^*/=/=/=/=/>/>/>/>/>/(/(/[/[/[/}/}/}/}/}/}/}/}/}/8/8/8/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/8/8/}/}/}/}/}/}/}/}/}/}/[/[/[/(/>/>/>/>/>/>/=/=/=/*/Y^Y^Y^Y^Q^Q^Q^L^L^K^v^v^v^v^o^o^. . . . 9^9^8^/./././.+ + z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~N~# # # s~]+]+]+3~y.y.y.-~K f f W#W#$ $ Y.Y.5.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+{+6 P=O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { +=X&w.3 6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w={&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h m*} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&X&{ { )=g.g.g.)+~ ~ ~ D D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & & r+J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#P!f f K -~y.y.;+3~]+]+]+s~# # # N~j j j +&(.V#*{*{h~6{6{<{4/{.{.{.{.{.{.{.{.{.{.c/+]+]+]m]m]m]d/:/{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;e/f/4&4&z.z.z.+ + /./././.8^9^9^. . . . o^o^v^v^v^v^K^L^L^Q^Q^Q^Y^Y^Y^*/=/=/=/>/>/>/>/>/(/(/[/[/}/}/}/}/}/}/}/}/}/8/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/8/}/}/}/}/}/}/}/}/[/[/[/(/>/>/>/>/>/=/=/=/=/*/Y^Y^Y^Q^Q^Q^L^L^K^v^v^v^v^o^o^. . . . 9^8^/././././^+ z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h s+!@!@!@!@7.J e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # # s~]+]+3~3~y.y.y.K f f f W#W#$ x!Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=( . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . & d#} } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e 5.5.Y.Y.x!$ W#W#f f K -~y.y.y.3~]+]+]+s~# # # N~N~j j +&(.(.V#*{h~6{6{<{<{i~{.{.{.{.{.{.{.{.{.{.M!+]+]m]m]g/h/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.i/j/4&4&#^z.z.z.+ /^/./././.8^9^. . . . o^o^v^v^v^v^K^L^L^Q^Q^Q^Y^Y^Y^*/=/=/=/>/>/>/>/>/(/[/[/}/}/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/k/k/k/k/k/k/k/k/k/k/k/k/k/k/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/8/}/}/}/}/}/}/}/[/[/[/(/>/>/>/>/>/=/=/=/*/Y^Y^Y^Q^Q^Q^L^K^v^v^v^v^v^o^. . . . 9^9^8^/./././^+ + z.z.z.4&4&X.X.P]W$W$W$A.A.h h h s+!@!@!@!@7.J e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # s~s~]+]+3~;+y.y.y.K f f P!W#$ $ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@6@y*] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m. +y+y+z+l+l+G.:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=,+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ) } } } Q%X X ( | | n.`.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@6@w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 E F+F+F+, 9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#P!f f K y.y.y.;+3~]+]+s~# # # M~N~j j +&,{(.(.l/*{6{6{<{<{u{i~{.{.{.{.{.{.{.{.{.{.M!+]m]+]m/Z>{.{.{.{.{.{.{.{.{.{.{.{.{.{.v!n/o/4&4&#^z.z.z.+ /^/././.8^9^9^. . . . o^v^v^v^v^v^L^L^Q^Q^Q^Y^Y^Y^*/=/=/=/>/>/>/>/(/[/[/[/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/k/k/k/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/k/k/k/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/}/}/[/[/(/>/>/>/>/>/=/=/=/*/Y^Y^Y^Q^Q^L^L^K^v^v^v^v^o^o^. . . . 9^8^/././././^+ z.z.z.#^4&4&X.X.W$W$W$A.A.h h h s+s+!@!@!@7.J e@e@e@i @ @ @ q=E+J.J.J.M+d+d+d+D+g g g H 0{e#e#(.(.+&+&j j N~# # # s~]+]+]+3~;+y.y.-~K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) ) P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.;.R R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.n.} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.g.~ ~ ~ i=D D D _.*@*@O=6 6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#P!f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&,{(.(.e#l/6{6{<{<{u{u{i~{.{.{.{.{.{.{.{.{.{.M!m]q/r/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.w{s/X.4&4&#^z.z.+ + /./././.8^9^. . . . o^o^v^v^v^v^K^L^Q^Q^Q^Y^Y^Y^*/=/=/=/>/>/>/>/(/[/[/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/b/k/k/k/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/k/k/b/b/b/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/}/[/[/[/(/>/>/>/>/=/=/=/*/Y^Y^Q^Q^Q^L^L^K^v^v^v^v^o^. . . . 9^9^/././././^+ z.z.z.#^4&4&X.X.W$W$W$A.A.h h h s+s+!@!@!@7.J e@e@e@i @ @ @ q=E+J.J.M+M+d+d+d+D+g g g H 0{e#(.(.(.+&j j j N~# # # s~]+]+]+3~y.y.y.K K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] y%2 2 2 x+^ ^ R&U+U+1 [@/ / r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.~+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.<.[.-.;.Q R R q r r s u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+d#} } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.-+o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.x!$ W#W#f f K -~y.y.y.3~]+]+]+s~# # # N~j j j +&(.(.e#e#+&6{<{<{<{u{B{i~{.{.{.{.{.{.{.{.{.{.M!t/'!{.{.{.{.{.{.{.{.{.{.{.{.{.{.!{u/X.X.4&4&z.z.z.+ /^/./././.8^9^. . . . o^v^v^v^v^K^L^L^Q^Q^Y^Y^Y^*/=/=/=/>/>/>/>/(/[/[/}/}/}/}/}/}/8/8/b/b/b/b/b/b/b/b/b/k/k/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/v/v/v/v/v/v/v/v/v/v/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/}/[/[/(/>/>/>/>/=/=/=/*/Y^Y^Q^Q^Q^L^K^v^v^v^v^o^o^. . . . 9^8^/./././^+ + z.z.#^4&4&X.X.P]W$W$A.A.h h h s+s+!@!@!@7.e@e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H H 0{e#(.(.,{+&j j N~M~# # # s~]+]+3~;+y.y.y.K f f P!W#$ $ Y.Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : : c+< < b+K.K.r#r#n v.q.q.G+H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=#+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w/} } } Q%X X ( | | n.`.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ $ W#P!f f K y.y.y.3~3~]+]+s~# # # M~N~j j +&(.(.(.e#0{5@6{<{<{u{B{B{i~{.{.{.{.{.{.{.{.{.{.'!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.x/y/X.X.4&4&z.z.z.+ /^/./././.9^9^. . . o^o^v^v^v^v^K^L^Q^Q^Q^Y^Y^*/=/=/=/>/>/>/>/(/[/[/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/p/p/p/p/p/v/v/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/v/p/p/p/p/p/p/p/p/p/p/p/p/k/k/b/b/b/b/b/b/b/b/8/8/}/}/}/}/}/}/[/[/(/>/>/>/>/=/=/*/Y^Y^Y^Q^Q^L^L^K^v^v^v^v^o^. . . . 9^8^/./././.+ + z.z.#^4&4&X.X.P]W$W$A.A.h h h s+s+!@!@!@7.e@e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&A.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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A/} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l l ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&,{(.(.e#e#H 5@<{<{u{u{B{B{B/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.C/D^X.X.4&4&#^z.z.z.+ /^/././.8^9^. . . . o^o^v^v^v^K^L^L^Q^Q^Y^Y^Y^*/=/=/>/>/>/>/(/[/[/}/}/}/}/}/8/8/b/b/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/p/p/v/v/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/p/p/p/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/[/[/(/>/>/>/=/=/=/*/Y^Y^Q^Q^Q^L^L^v^v^v^v^o^o^. . . 9^9^/././././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+s+!@!@!@7.e@e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.+&+&j j N~# # # s~]+]+]+3~y.y.y.K K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+> > ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 P=O=*@*@_.D D D ~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@Z+y*] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#n n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.d#} } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; ; ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K K y.y.y.3~]+]+]+s~# # # N~j j +&,{(.(.e#e#H H D/<{u{u{B{B{*]E/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.t]F/G/X.X.4&4&#^z.z.z.+ /^/././.8^9^. . . . o^v^v^v^v^K^L^Q^Q^Q^Y^Y^*/=/=/>/>/>/>/(/[/[/}/}/}/}/}/8/8/b/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/p/v/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/p/p/p/p/p/p/p/p/k/k/b/b/b/b/b/b/b/8/8/}/}/}/}/}/[/[/(/>/>/>/=/=/=/*/Y^Y^Q^Q^L^L^K^v^v^v^o^o^. . . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@7.e@e@e@e@@ @ @ @ E+J.J.J.M+d+d+d+D+g g g H 0{e#(.(.(.+&j j N~N~# # # s~]+]+3~;+y.y.y.K f f P!W#$ $ Y.Y.5.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'm@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 F+F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n v.q.4.G+H+H+g@=.=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=[ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J%} } } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 ,,F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.;+3~]+]+s~# # # N~N~j j +&(.(.e#e#0{H g D/u{u{B{B{B{R{H/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.T{I/W$X.X.4&4&#^z.z.z.+ /./././.8^9^. . . o^o^v^v^v^v^L^L^Q^Q^Y^Y^Y^=/=/=/>/>/>/(/[/[/}/}/}/}/}/8/8/b/b/b/b/b/b/k/k/p/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/J/J/J/J/J/J/K/K/K/K/K/K/K/K/K/J/J/J/J/J/J/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/b/8/8/}/}/}/}/}/[/[/>/>/>/>/=/=/*/Y^Y^Y^Q^Q^L^K^v^v^v^v^o^. . . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@7.e@e@e@e@@ @ @ @ E+J.J.J.M+d+d+d+D+g g H H 0{e#(.(.,{+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.&.9 9 , F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m. +y+y+z+l+l+G.:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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V>} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.-+o.m m ' 8 8 8 F+F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; ; 0 F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&,{(.(.e#0{H H g D/u{B{B{B{R{+]L/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.z,M/J W$X.X.4&4&#^z.z.+ + /./././.9^9^. . . o^o^v^v^v^K^L^Q^Q^Q^Y^Y^*/=/=/>/>/>/>/[/[/}/}/}/}/}/8/8/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/z/z/J/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/8/8/}/}/}/}/[/[/(/>/>/>/=/=/=/*/Y^Y^Q^Q^L^L^v^v^v^v^o^. . . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@J e@e@e@e@@ @ @ @ E+J.J.M+M+d+d+D+D+g g H H e#e#(.(.,{+&j j N~# # # s~]+]+]+3~y.y.y.K f f P!W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@+'a a H,- - - f,F F F 0 ; ; l l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 8 m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { X&X&w.3 6@6@y*] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /./ } } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> $+$+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # # N~j j +&,{(.(.e#e#H H g g a+u{B{B{R{R{+]N/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.O/F]W$W$X.X.4&4&#^z.z.+ + /./././.9^9^. . . o^v^v^v^v^K^L^Q^Q^Y^Y^Y^=/=/=/>/>/>/(/[/[/}/}/}/}/8/8/b/b/b/b/b/b/k/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/z/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/p/k/b/b/b/b/b/b/8/8/}/}/}/}/[/[/(/>/>/>/=/=/*/Y^Y^Q^Q^Q^L^K^v^v^v^o^o^. . . 9^8^/./././^+ z.z.z.#^4&X.X.P]W$W$A.A.h h h s+!@!@!@!@J e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.+&j j j N~# # # s~]+]+3~;+y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=*@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j } } } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.;+3~]+]+s~# # # M~N~j j +&(.(.e#e#0{H g g D+a+B{B{B{R{+]+]N/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.J]K]s+W$W$P]X.4&4&#^z.z.+ + /././.8^9^. . . . o^v^v^v^v^L^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/[/}/}/}/}/8/8/b/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/p/k/b/b/b/b/b/b/8/8/}/}/}/}/[/(/>/>/>/=/=/=/Y^Y^Y^Q^Q^L^K^v^v^v^v^o^. . . 9^9^/./././^+ z.z.z.#^4&X.X.P]W$W$A.A.h h h s+!@!@!@!@J e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+g g g H 0{e#(.(.,{+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'm@m@m@+'a a H,- - - f,F F F 0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=l+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - } } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> > $+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K K y.y.y.3~]+]+]+s~# # M~N~j j +&,{(.(.e#0{H g g g D+L{B{B{R{+]+]+]s]{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.Q/R/A.W$W$P]X.4&4&#^z.z.+ + /././.8^9^. . . . o^v^v^v^K^L^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/}/}/}/}/}/8/b/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/K/K/K/P/P/P/P/P/P/P/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/P/P/P/P/P/P/K/K/K/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/k/b/b/b/b/b/8/8/}/}/}/}/[/[/(/>/>/>/=/=/*/Y^Y^Q^Q^L^L^v^v^v^v^o^. . . 9^9^/./././.+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@7.J e@e@e@i @ @ @ E+J.J.J.M+d+d+d+D+g g H H e#e#(.(.,{+&j j N~# # # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@D D D i=~ ~ ~ g.g.g.)={ { X&X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @m.m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o%X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . )+} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l l ; ; 0 F F F f,- - - H,a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#e#H H g g D+D+L{B{R{+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.{.{.{.V]T/A.A.W$W$P]X.4&4&#^z.z.+ + /././.8^9^. . . . o^v^v^v^K^L^Q^Q^Y^Y^Y^=/=/=/>/>/>/[/[/}/}/}/}/8/8/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/K/K/P/P/P/P/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/P/P/P/P/K/K/K/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/k/b/b/b/b/b/8/8/}/}/}/}/[/(/>/>/>/=/=/*/Y^Y^Q^Q^L^L^v^v^v^v^o^. . . 9^9^/./././.+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@7.e@e@e@e@@ @ @ @ E+J.J.M+M+d+d+D+D+g g H H e#e#(.(.+&j j N~N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - f,F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w== . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h d#} } Q%X X ( | | n.n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G & & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&(.(.e#e#0{H g g D+D+d+L{B{R{+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.{.g-U/V/A.A.W$W$P]X.X.4&#^z.z.+ + /././.8^9^. . . o^o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/}/}/}/}/8/8/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/J/J/K/K/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/S/S/S/S/S/S/S/W/W/W/W/W/W/W/W/W/W/W/W/W/W/W/S/S/S/S/S/S/S/S/S/S/S/S/S/P/P/P/P/K/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/k/b/b/b/b/b/8/}/}/}/}/[/[/(/>/>/>/=/=/Y^Y^Y^Q^Q^L^K^v^v^v^o^. . . . 9^/./././.+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+d+D+D+g g H 0{e#(.(.,{+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b 5'= m@m@-'a a a H,- - - F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 8 m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ T$: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@`+=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&} } } Q%X X ( | | n.`.r$/ / [@U+U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - - H,a a +'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # # N~j j +&,{(.(.e#0{H g g g D+d+d+L{R{+]+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.'!5^h A.A.W$W$P]X.X.4&#^z.z.+ + /././.8^9^. . . o^o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/}/}/}/}/8/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/S/S/W/W/W/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/W/W/S/S/S/S/S/S/S/S/S/S/P/P/P/K/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/b/8/8/}/}/}/}/[/(/>/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . . 9^/./././.+ z.z.z.4&4&X.X.W$W$W$A.A.h h s+s+!@!@!@J e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F ,,0 ; ; l l $+> > ]>]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=d.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 } } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a a -'m@m@= b b k k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j j +&(.(.e#e#H H g g D+d+d+d+^.+]+]+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.p~h A.A.W$W$P]X.X.4&4&z.z.z.+ /././.8^9^. . . o^o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/>/[/[/}/}/}/8/8/b/b/b/b/b/k/p/p/p/p/p/v/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/S/W/W/X/X/X/X/X/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/X/X/X/X/X/W/W/S/S/S/S/S/S/S/S/P/P/P/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/b/8/}/}/}/}/[/[/>/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . . 9^/./././^+ z.z.z.4&4&X.X.W$W$W$A.h h h s+!@!@!@!@J e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e {&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@-'a a a H,- - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=a+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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U+} } Q%X X ( ( | n.n.r$r$/ [@1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+P.P.) ) 7 7 C.-+o.m m ' 8 8 E F+F+F+, 9 9 9 I.^+^+]>]>> > $+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k I@I@d&d&c c '+'+Z=& & & J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~N~j j +&(.(.(.e#0{H g g D+D+d+d+M+^.+]+]+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.@^h A.W$W$W$X.X.4&4&z.z.z.+ /././.8^9^. . . o^o^v^v^v^L^L^Q^Q^Y^Y^=/=/>/>/>/(/[/}/}/}/}/8/8/b/b/b/b/k/p/p/p/p/p/v/z/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/W/X/X/X/X/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/X/X/X/W/W/S/S/S/S/S/S/S/P/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/8/8/}/}/}/[/[/(/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . . 9^/./././^+ z.z.z.4&4&X.X.W$W$A.A.h h h s+!@!@!@7.J e@e@e@@ @ @ @ E+J.J.M+d+d+d+D+D+g g H 0{e#(.(.,{+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@k k b b = m@m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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(.} } } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l ; ; ; 0 F F F f,- - H,a a a -'m@m@= 5'b k k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#0{H H g g D+d+d+d+M+`/+]+]+]+]+]+]M/{.{.{.{.{.{.{.{.{.{.@^A.A.W$W$X.X.4&4&z.z.z.+ /^/././.9^. . . o^o^v^v^v^L^L^Q^Q^Y^Y^=/=/>/>/>/(/[/}/}/}/}/8/b/b/b/b/b/k/p/p/p/p/p/z/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/S/S/W/X/X/X/Y/Y/Y/Y/Y/Y/Y/Y/Z/Z/Z/ ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( (Z/Z/Z/Y/Y/Y/Y/Y/Y/Y/Y/X/X/X/W/S/S/S/S/S/S/S/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/b/8/}/}/}/}/[/(/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . . 9^/./././^+ z.z.#^4&4&X.P]W$W$A.A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@-'a a H,- - - f,F F F 0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%C 2 2 x+^ ^ R&U+U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +'} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+^+]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+D+d+d+M+J.`/+]+]+]+]+]h]M/{.{.{.{.{.{.{.{.{.{.@^A.W$W$P]X.4&4&#^z.z.+ /^/././.9^. . . o^o^v^v^v^L^L^Q^Q^Y^Y^=/=/>/>/>/(/[/}/}/}/8/8/b/b/b/b/k/p/p/p/p/p/v/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/S/W/X/X/X/Y/Y/Y/Y/Y/Y/Z/Z/ ( ( ( ( ( ( ( ( (.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.( ( ( ( ( ( ( ( (Z/Z/Y/Y/Y/Y/Y/Y/Y/X/X/X/W/S/S/S/S/S/S/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/v/p/p/p/p/p/b/b/b/b/b/8/}/}/}/}/[/(/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^9^/./././^+ z.z.#^4&4&X.P]W$W$A.A.h h h s+!@!@!@J e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H 0{e#e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&I@I@k k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X Q%} } } u%_ _ j+[ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s u u v w x y y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=U#+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D } } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+P.P.) ) 7 7 C.-+o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> $+$+l l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & .,J%J%J%{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+d+M+J.`/+]+]+]+]h]m]M/{.{.{.{.{.{.{.{.{.{.@^W$W$P]X.X.4&#^z.z.+ /^/././.9^9^. . . o^v^v^v^L^L^Q^Q^Y^*/=/=/>/>/>/[/[/}/}/}/8/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/X/Y/Y/Y/Y/Y/Y/Z/ ( ( ( ( ( (.(.(.(.(.(.(.(.(.(.(.(.(+(+(+(+(+(+(+(.(.(.(.(.(.(.(.(.(.(.(.( ( ( ( ( ( (Z/Y/Y/Y/Y/Y/Y/X/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/p/p/p/p/p/k/b/b/b/b/8/8/}/}/}/[/(/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^9^/./././^+ z.z.#^4&X.X.P]W$W$A.A.h h s+!@!@!@!@J e@e@e@@ @ @ @ E+J.J.M+d+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - f,F F ,,0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+F+8 8 8 ' m m o.C.C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Z=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.I&} } Q%X X ( ( | n.n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.-+m m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a a -'m@m@= b b k k I@I@d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.`/+]+]+]+]m]m]M/{.{.{.{.{.{.{.{.{.{.@^W$P]X.X.4&#^z.z.+ /^/././.9^9^. . . o^v^v^v^L^L^Q^Q^Y^*/=/=/>/>/>/[/[/}/}/}/8/b/b/b/b/b/p/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Y/Z/Z/ ( ( ( ( (.(.(.(.(.(.(+(+(+(+(+(+(+(+(@(@(@(@(@(@(@(@(@(@(@(+(+(+(+(+(+(+(+(.(.(.(.(.(.( ( ( ( ( (Z/Y/Y/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/K/z/z/z/z/z/z/v/p/p/p/p/k/b/b/b/b/b/8/}/}/}/[/[/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/./././^+ z.z.#^4&X.X.W$W$W$A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - F F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@6@y*] ] y%C 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=+=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +&} } } Q%X X ( | | n.`.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.p=+]+]+]h]m]m]M/{.{.{.{.{.{.{.{.{.{.@^W$X.X.4&4&z.z.+ + /././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^*/=/=/>/>/>/[/[/}/}/}/8/b/b/b/b/k/p/p/p/p/p/z/z/z/z/z/z/J/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Y/Z/ ( ( ( (.(.(.(.(.(+(+(+(+(+(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(+(+(+(+(+(.(.(.(.(.( ( ( ( (Z/Y/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/J/z/z/z/z/z/z/p/p/p/p/p/k/b/b/b/b/8/}/}/}/[/[/>/>/>/=/=/*/Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././.+ z.z.z.4&4&X.X.W$W$A.A.h h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+c c d&d&I@I@k b b 5'm@m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 9 F+F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+[@/ / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @@} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=)=g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.-+o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - H,a a a -'m@m@= 5'b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+y]+]+]+]m]m]m]#({.{.{.{.{.{.{.{.{.{.@^P]X.4&4&z.z.z.+ /././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^*/=/=/>/>/(/[/}/}/}/}/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( ( (.(.(.(.(.(+(+(+(@(@(@(@(@(@(@($($($($($($($($($($($($($($($($($($($($($($($(@(@(@(@(@(@(@(+(+(+(.(.(.(.(.( ( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/k/b/b/b/b/8/}/}/}/}/[/>/>/>/=/=/*/Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././.+ z.z.z.4&4&X.P]W$W$A.A.h h s+s+!@!@!@J e@e@e@@ @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b 5'= m@m@-'a a a - - - f,F F F 0 ; ; l l $+$+> ]>]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.Q R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7+} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@m@= b b k I@I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=y]+]+]m]m]m]m]#({.{.{.{.{.{.{.{.{.{.@^X.4&4&#^z.z.+ /^/./.8^9^. . . o^v^v^v^K^L^Q^Q^Y^*/=/=/>/>/(/[/}/}/}/}/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/K/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(.(+(+(+(@(@(@(@(@(@($($($($(%(%(%(%(%(%(%(%(%(&(&(&(&(&(&(&(%(%(%(%(%(%(%(%(%($($($($(@(@(@(@(@(@(+(+(+(.(.(.(.( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/K/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/k/b/b/b/b/8/}/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././^+ z.z.#^4&4&X.P]W$W$A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%J%.,& & Z='+'+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.3 6@Z+y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.;.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *(} } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~j j +&,{(.(.e#0{H g g D+D+d+d+d+M+J.J.E+@ y]+]h]m]m]m]Y]#({.{.{.{.{.{.{.{.{.{.@^X.4&#^z.z.+ /^/././.9^. . . o^v^v^v^K^L^Q^Q^Y^Y^=/=/>/>/(/[/}/}/}/}/8/b/b/b/b/p/p/p/p/p/z/z/z/z/z/J/K/K/K/K/K/P/P/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(+(+(+(@(@(@(@(@($($($(%(%(%(%(%(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(%(%(%(%(%($($($(@(@(@(@(@(+(+(+(.(.(.( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/P/P/K/K/K/K/K/J/z/z/z/z/z/p/p/p/p/p/b/b/b/b/8/}/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^/./././^+ z.z.#^4&X.X.W$W$W$A.h h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g g H 0{e#(.(.,{+&j j M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.e e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@-'a a H,- - - f,F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - H,a a a -'m@m@= b b k k I@I@d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.J.q=@ y]+]m]m]m]S]r]#({.{.{.{.{.{.{.{.{.{.@^4&4&z.z.+ /^/././.9^9^. . o^v^v^v^K^L^Q^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/8/b/b/b/b/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/P/P/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@(@($($($(%(%(%(%(&(&(&(&(&(&(&(&(&(&(&(=(=(=(=(=(=(=(=(=(=(=(=(=(&(&(&(&(&(&(&(&(&(&(&(%(%(%(%($($($(@(@(@(@(+(+(.(.(.( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/P/P/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/b/b/b/b/8/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^/./././^+ z.z.4&4&X.X.W$W$A.A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%J%& & & Z='+'+c c d&I@I@k k b b = m@m@-'a a a H,- - f,F F F 0 ; ; l l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@m@= b b k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=@ @ y]h]m]m]m]Y]r]#({.{.{.{.{.{.{.{.{.{.d{4&#^z.z.+ /././.8^9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/>/[/}/}/}/8/8/b/b/b/b/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/P/P/S/S/S/S/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@($($($(%(%(%(&(&(&(&(&(&(&(&(=(=(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(=(=(&(&(&(&(&(&(&(&(%(%(%($($($(@(@(@(+(+(.(.(.( ( ( (Z/Y/Y/Y/Y/X/X/S/S/S/S/P/P/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/b/b/b/b/8/8/}/}/}/[/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^o^. . . 9^8^/././.+ z.z.z.4&4&X.P]W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.e e e :!{&{&{&B.J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'm@m@m@+'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=p^. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I.} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] y*6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+@ @ @ &/m]m]m]S]r]r]#({.{.{.{.{.{.{.{.{.{.d{#^z.z.+ /^/./.8^9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/>/[/}/}/}/8/8/b/b/b/b/p/p/p/p/v/z/z/z/z/z/K/K/K/K/K/P/S/S/S/S/W/X/X/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@($($(%(%(%(&(&(&(&(&(&(=(=(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(=(=(&(&(&(&(&(&(%(%(%($($(@(@(@(+(+(+(.(.( ( ( (Z/Y/Y/Y/Y/X/W/S/S/S/S/P/K/K/K/K/K/z/z/z/z/z/v/p/p/p/p/k/b/b/b/8/8/}/}/}/[/>/>/>/=/=/Y^Y^Q^Q^L^v^v^v^o^. . . 9^8^/././^+ z.z.#^4&X.X.P]W$W$A.h h h s+!@!@!@J e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f f W#W#$ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b 5'= m@m@-'a a H,- - - f,F F ,,0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%C 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0)} } Q%X X ( ( | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - H,a a a -'m@m@= b b k k I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+]+s~# # M~N~j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=@ @ @ 7]m]m]S]r]r]r]#({.{.{.{.{.{.{.{.{.{.d{z.z.+ /^/././.9^. . . o^v^v^v^L^L^Q^Y^Y^*/=/>/>/>/[/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/P/S/S/S/S/X/X/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@($($(%(%(&(&(&(&(&(&(=(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(=(&(&(&(&(&(&(%(%($($(@(@(@(@(+(.(.(.( ( ( (Z/Y/Y/Y/X/X/S/S/S/S/P/P/K/K/K/K/J/z/z/z/z/v/p/p/p/p/k/b/b/b/8/8/}/}/}/[/>/>/>/=/*/Y^Y^Q^L^L^v^v^v^o^. . . 9^/./././^+ z.z.4&4&X.X.W$W$A.A.h h s+!@!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f P!W#$ x!Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z='+'+c c d&d&I@I@k b b = m@m@m@a a a H,- - - F F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.C.C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4@d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f K -~y.y.;+3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+@ @ @ i 7]m]m]Y]r]r]r]A]{.{.{.{.{.{.{.{.{.{.d{z.z.+ /././.9^9^. . o^v^v^v^K^L^Q^Q^Y^*/=/=/>/>/[/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/P/S/S/S/W/X/X/Y/Y/Y/Z/ ( (.(.(.(+(+(@(@(@($($(%(%(&(&(&(&(&(=(-(-(-(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(-(-(-(=(&(&(&(&(&(%(%($($($(@(@(+(+(.(.(.( ( ( (Y/Y/Y/Y/X/W/S/S/S/S/P/K/K/K/K/J/z/z/z/z/z/p/p/p/p/k/b/b/b/8/}/}/}/[/[/>/>/>/=/*/Y^Y^Q^L^K^v^v^v^o^. . . 9^/././.+ + z.z.4&4&X.P]W$W$A.h h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f f W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=/ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.} } } X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+]+s~# # M~N~j j ,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=@ @ @ e@7]m]S]r]r]r]>(,({.{.{.{.{.{.{.{.{.{.d{z.+ /^/./.8^9^. . . o^v^v^K^L^Q^Q^Y^*/=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/S/W/X/Y/Y/Y/Z/ ( (.(.(.(+(+(@(@(@($($(%(%(&(&(&(&(=(-(-(-(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(-(-(-(=(&(&(&(&(&(%(%($($(@(@(+(+(.(.(.( ( (Z/Y/Y/Y/X/X/S/S/S/S/P/K/K/K/K/J/z/z/z/z/z/p/p/p/p/k/b/b/b/8/}/}/}/[/[/>/>/=/=/*/Y^Q^Q^L^K^v^v^o^o^. . 9^8^/././.+ z.z.#^4&X.X.W$W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%J%.,& & Z='+'+c c d&I@I@k k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=k.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - } } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 &.I.^+^+]>]>> $+$+l l ; ; 0 F F F f,- - H,a a a m@m@m@= b b k I@I@d&d&c c '+G Z=& & .,J%J%J%{&{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.;+3~]+]+s~# # # N~j j +&,{(.e#e#H H g g D+d+d+d+M+J.J.E+@ @ @ i e@7]m]Y]r]r]r]>(,({.{.{.{.{.{.{.{.{.{.d{+ /^/././.9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/S/X/X/Y/Y/Y/Z/ ( (.(.(+(+(@(@(@($($(%(%(&(&(&(&(=(-(-(;(;(;(;(;(;(;(-(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(-(;(;(;(;(;(;(;(-(-(=(&(&(&(&(&(%(%($(@(@(@(+(+(.(.( ( ( (Y/Y/Y/X/X/W/S/S/S/P/K/K/K/K/J/z/z/z/z/z/p/p/p/p/k/b/b/b/8/}/}/}/[/(/>/>/=/=/*/Y^Q^Q^L^K^v^v^o^. . . 9^8^/././^+ z.z.4&4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~# # # s~]+]+3~;+y.y.-~K f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%.,& & Z=G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=P%z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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O=} } Q%X X ( ( | n.n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.-+o.m m ' 8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.;+]+]+]+s~# # M~N~j j +&(.(.e#0{H g g D+D+d+d+M+J.J.J.q=@ @ @ e@e@7]S]r]r]r]>('(,({.{.{.{.{.{.{.{.{.{.d{+ /././.9^. . . o^v^v^v^L^L^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/W/X/Y/Y/Y/Z/ ( (.(.(.(+(@(@(@($($(%(%(&(&(&(&(=(-(-(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;(;(;(;()()()()()(;(;(;(;(;(;(;(;(;()()()()()(;(;(;(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;(-(-(-(=(&(&(&(&(%($($(@(@(@(+(.(.(.( ( (Z/Y/Y/Y/X/W/S/S/S/P/P/K/K/K/K/z/z/z/z/z/p/p/p/p/b/b/b/b/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^v^v^v^o^. . . 9^/././.+ + z.z.4&4&X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j N~M~# # s~]+]+]+3~y.y.y.K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=@>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.!(} } Q%X X ( | | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b k k I@I@d&c c '+'+Z=& & .,J%J%J%B.{&{&{&e e e 5.Y.Y.x!$ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&,{(.(.e#H H g g D+d+d+d+M+J.J.E+@ @ @ i e@e@7]Y]r]r]r]>('(,({.{.{.{.{.{.{.{.{.{.d{/^/./.8^9^. . o^v^v^v^K^L^Q^Y^Y^*/=/>/>/>/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/W/X/Y/Y/Y/Z/ ( (.(.(+(+(@(@($($(%(%(&(&(&(&(-(-(-(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;(;()()(;(;(;(;(;(;(~(~(~(~(~(~(~(~(~(~(~(~(~(;(;(;(;(;(;()()(;(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;(-(-(=(&(&(&(%(%($($(@(@(+(+(.(.( ( (Z/Y/Y/Y/X/W/S/S/S/P/P/K/K/K/K/z/z/z/z/z/p/p/p/p/b/b/b/b/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^L^K^v^v^v^o^. . 9^8^/././.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~# # # s~]+]+3~;+y.y.K f f P!W#$ $ Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z='+'+c c d&d&I@k k b b = m@m@-'a a a H,- - f,F F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 9 F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@=.=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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H } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> $+$+l l ; ; 0 F F F f,- - H,a a a m@m@m@= b b k I@I@d&d&c c '+G Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f K -~y.y.;+3~]+]+s~# # M~N~j j +&(.(.e#e#H g g D+D+d+d+M+J.J.J.q=@ @ @ e@e@e@B]r]r]r]>('('(,({.{.{.{.{.{.{.{.{.{.{(/././.9^. . . o^v^v^K^L^Q^Q^Y^*/=/=/>/>/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/W/X/Y/Y/Y/ ( ( (.(.(+(@(@(@($(%(%(&(&(&(&(=(-(;(;(;(;(;(;(-(-(-(;(;(;(;(;(;()()(;(;(;(;(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(;(;(;(;()(;(;(;(;(;(;(-(-(-(;(;(;(;(;(;(-(-(=(&(&(&(%(%($(@(@(@(+(.(.(.( ( (Y/Y/Y/X/X/S/S/S/S/P/K/K/K/K/z/z/z/z/z/p/p/p/p/b/b/b/b/8/}/}/}/[/>/>/>/=/*/Y^Q^Q^L^K^v^v^o^. . . 9^8^/././^+ z.z.4&4&X.P]W$W$A.A.h h s+!@!@!@7.e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{j j N~M~# # s~]+]+]+3~y.y.-~K f f W#W#$ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . * } } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+G & & & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+]+s~# # N~j j +&,{(.(.e#0{H g g D+d+d+d+M+J.J.E+@ @ @ i e@e@e@](r]r]r]>('('(^({.{.{.{.{.{.{.{.{.{.{(/./.9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/(/[/}/}/8/8/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/X/X/Y/Y/Y/ ( (.(.(.(+(@(@($($(%(%(&(&(&(=(-(-(;(;(;(;(;(-(-(-(;(;(;(;(;()(;(;(;(~(~(~(~(~(~(~(~(~(~(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(~(~(~(~(~(~(~(~(~(;(;(;()(;(;(;(;(;(-(-(-(-(;(;(;(;(;(-(=(&(&(&(&(%($($(@(@(+(+(.(.( ( (Z/Y/Y/X/X/S/S/S/S/P/K/K/K/K/z/z/z/z/v/p/p/p/p/b/b/b/b/8/}/}/}/[/>/>/=/=/*/Y^Q^Q^L^v^v^v^o^. . . 9^/././.+ z.z.#^4&4&X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.,{+&j j N~# # # s~]+]+3~y.y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.| | ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=L+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m } } Q%X X ( ( | | n.r$r$/ [@1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a -'m@m@= 5'b k k I@I@d&c c '+'+Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.;+3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+M+J.J.J.q=@ @ @ e@e@e@J ((r]r]>('('('(^({.{.{.{.{.{.{.{.{.{.{(/.8^9^. . o^o^v^v^K^L^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/X/X/Y/Y/Z/ ( (.(.(+(+(@(@($(%(%(&(&(&(=(-(-(;(;(;(;(-(-(-(-(;(;(;(;()(;(;(;(~(~(~(~(~(~(~(/(/(/(/(/(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(/(/(/(/(/(~(~(~(~(~(~(~(;(;(;()(;(;(;(;(;(-(-(-(;(;(;(;(-(-(=(&(&(&(%(%($(@(@(@(+(.(.( ( (Z/Y/Y/Y/X/S/S/S/S/P/K/K/K/K/z/z/z/z/v/p/p/p/k/b/b/b/8/8/}/}/[/(/>/>/=/=/Y^Y^Q^L^L^v^v^v^o^. . 9^8^/././^+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c c d&d&I@k k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l l $+> > ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _(} } Q%X X ( ( | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>]>> > $+l l ; ; 0 F F F f,- - H,a a a -'m@m@= b b k I@I@d&d&c c '+G Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.3~]+]+]+s~# # M~N~j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.E+@ @ @ i e@e@e@7.((r]r]>('('('(^({.{.{.{.{.{.{.{.{.{.{(/.9^. . . o^v^v^K^L^Q^Q^Y^*/=/>/>/>/[/}/}/}/8/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/X/X/Y/Y/Z/ ( (.(.(+(@(@(@($(%(%(&(&(&(=(-(;(;(;(;(;(-(-(;(;(;(;(;()(;(;(~(~(~(~(~(~(/(/(/(;(;(;(;(;(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(;(;(;(;(;(/(/(/(~(~(~(~(~(~(;(;()()(;(;(;(;(-(-(-(;(;(;(;(-(-(=(&(&(&(%($($(@(@(+(.(.( ( (Z/Y/Y/Y/X/W/S/S/S/P/K/K/K/K/z/z/z/z/v/p/p/p/k/b/b/b/8/}/}/}/[/(/>/>/=/*/Y^Y^Q^L^K^v^v^o^. . . 9^8^/././^+ z.z.4&4&X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+d+D+g g H H e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - - F F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=F+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> $+$+l l ; ; 0 F F T+- - - H,a a +'m@m@m@5'b b k I@I@d&d&c '+'+G & & & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+M+J.J.J.q=@ @ @ e@e@e@J !@((r]>('('('('(e^{.{.{.{.{.{.{.{.{.{.{(8^9^. . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/b/p/p/p/p/z/z/z/z/J/K/K/K/P/P/S/S/S/X/X/Y/Y/Z/ ( (.(.(+(@(@($($(%(&(&(&(=(-(-(;(;(;(;(-(-(-(;(;(;()()(;(;(~(~(~(~(~(/(/(/(;(;(;(~(~(~(~(~(~(~(~(/(/(/(/(/(/(/(/(/(/(/(/(/(/(~(~(~(~(~(~(~(;(;(;(;(/(/(/(~(~(~(~(~(;(;()(;(;(;(;(-(-(;(;(;(;(;(-(=(&(&(&(%($($(@(@(+(.(.( ( (Z/Y/Y/Y/X/W/S/S/S/P/K/K/K/J/z/z/z/z/v/p/p/p/k/b/b/b/8/}/}/}/[/>/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . . 9^/././.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ q=J.J.J.M+d+d+D+D+g g H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.K f f P!W#$ $ Y.Y.5.e e e :!{&{&B.J%J%J%& & & Z='+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@=.=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.;.Q R R q r r s u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=[ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.} } } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@= 5'b k k I@I@d&d&c '+'+Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#P!f f -~y.y.;+3~]+]+s~# # M~N~j j +&(.(.e#0{H g g D+D+d+d+M+J.J.E+@ @ @ i e@e@e@7.!@((r]>('('('('(e^{.{.{.{.{.{.{.{.{.{.{(9^. . . o^v^v^K^L^Q^Y^Y^=/=/>/>/(/[/}/}/8/8/b/b/b/p/p/p/p/z/z/z/z/J/K/K/K/P/P/S/S/S/X/X/Y/Y/Z/ ( (.(.(+(@(@($(%(%(&(&(&(=(-(;(;(;(;(-(-(-(;(;(;()(;(;(~(~(~(~(~(/(/(;(;(;(~(~(~(~(~(~(/(/(/(/(/(/(/(/(/(/(;(;(;(;(;(/(/(/(/(/(/(/(/(/(/(/(~(~(~(~(~(;(;(;(/(/(~(~(~(~(~(;(;()(;(;(;(-(-(-(;(;(;(;(-(-(&(&(&(%(%($(@(@(+(+(.(.( ( (Y/Y/Y/X/W/S/S/S/P/K/K/K/J/z/z/z/z/p/p/p/p/b/b/b/b/8/}/}/[/[/>/>/=/=/Y^Y^Q^L^L^v^v^v^o^. . 9^8^/././^+ z.z.4&4&X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+d+D+g g H 0{e#(.(.,{+&j j M~# # s~]+]+]+3~y.y.-~K f f W#W#$ Y.Y.5.5.e e :!{&{&{&B.J%J%.,& & Z=G '+c c d&d&I@k k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=a.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . k+} } Q%X X X ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] y*6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; 0 ,,F F f,- - - a a a -'m@m@= b b k k I@d&d&c c '+G Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.3~]+]+]+s~# # N~j j +&,{(.(.e#H H g g D+d+d+d+M+J.J.q=@ @ @ e@e@e@J !@!@((>('('('('('(e^{.{.{.{.{.{.{.{.{.{.{(9^. . o^v^v^v^L^Q^Q^Y^*/=/>/>/>/[/}/}/}/8/b/b/b/k/p/p/p/v/z/z/z/z/K/K/K/K/P/S/S/S/X/X/Y/Y/Z/ ( (.(.(+(@(@($(%(%(&(&(&(-(-(;(;(;(;(-(-(;(;(;(;()(;(~(~(~(~(~(/(/(;(;(~(~(~(~(~(/(/(/(/(/(;(;(;(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(;(;(;(/(/(/(/(/(/(~(~(~(~(;(;(/(/(/(~(~(~(~(;(;()(;(;(;(-(-(-(;(;(;(;(-(=(&(&(&(%($(@(@(+(+(.(.( ( (Y/Y/Y/X/W/S/S/S/P/K/K/K/J/z/z/z/z/p/p/p/p/b/b/b/8/8/}/}/[/(/>/>/=/*/Y^Y^Q^L^K^v^v^o^. . . 9^/././.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g H H e#e#(.(.+&j j N~# # # s~]+]+3~y.y.y.K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - f,F F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 9 F+F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=P@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0)} } Q%X X ( ( | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+Z=& & & J%J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#P!f K -~y.y.;+3~]+]+s~# # M~N~j +&,{(.(.e#0{H g g D+d+d+d+M+J.J.E+@ @ @ e@e@e@J !@!@!@u^'('('('('('(e^{.{.{.{.{.{.{.{.{.{.{(. . o^v^v^K^L^Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/b/p/p/p/p/z/z/z/z/J/K/K/K/P/S/S/S/W/X/Y/Y/Z/ ( (.(+(+(@(@($(%(&(&(&(=(-(;(;(;(;(-(-(;(;(;()(;(;(~(~(~(/(/(;(;(~(~(~(~(/(/(/(/(;(~(~(~(~(~(~(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(~(~(~(~(~(;(;(/(/(/(~(~(~(~(;(;(/(/(~(~(~(~(;()(;(;(;(-(-(-(;(;(;(-(-(&(&(&(%($($(@(@(+(.(.( ( (Y/Y/Y/X/S/S/S/P/K/K/K/K/z/z/z/z/v/p/p/p/k/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . . 9^/././.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@@ @ @ q=J.J.J.M+d+d+D+g g H H e#e#(.,{+&j j N~# # s~]+]+]+3~y.y.-~K f f W#W#$ Y.Y.5.5.e e :!{&{&{&B.J%J%.,& & Z=G '+c c d&d&I@k k b b = m@m@-'a a H,- - - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.m*} } Q%X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a -'m@m@= b b k k I@I@d&c c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.3~]+]+]+# # # N~j j +&,{(.e#e#H H g g D+d+d+M+J.J.J.q=@ @ @ e@e@e@7.!@!@!@u^'('('('('('(e^{.{.{.{.{.{.{.{.{.{.{(. o^v^v^v^L^Q^Q^Y^*/=/=/>/>/[/}/}/}/8/b/b/b/k/p/p/p/z/z/z/z/J/K/K/K/P/S/S/S/W/X/Y/Y/Z/ ( (.(.(+(@(@($(%(&(&(&(=(-(;(;(;(-(-(-(;(;(;()(;(~(~(~(~(/(;(;(~(~(~(~(/(/(/(;(~(~(~(~(~(:(:(:(:(:(:(:(:(/(/(/(/(/(<(<(<(<(<(/(/(/(/(/(:(:(:(:(:(:(:(:(:(~(~(~(~(;(/(/(/(/(~(~(~(;(;(/(/(~(~(~(;(;()(;(;(;(-(-(;(;(;(-(-(&(&(&(%($($(@(@(+(.(.( ( (Y/Y/X/X/S/S/S/P/K/K/K/K/z/z/z/z/v/p/p/p/b/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . 9^8^/././^+ z.z.4&4&X.P]W$W$A.h h h s+!@!@!@e@e@e@i @ @ @ E+J.J.M+d+d+D+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@m@a a a H,- - f,F F F 0 ; ; l l $+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@=.=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=X&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F } } Q%X X ( ( | | n.r$r$/ [@1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+, 9 9 9 I.^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@= 5'b k k I@I@d&c c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.3~]+]+]+# # # N~j j +&(.(.e#e#H H g D+D+d+d+M+J.J.J.@ @ @ i e@e@e@7.!@!@s+h 7.'('('('([(|(e^{.{.{.{.{.{.{.{.{.{.{(o^v^v^K^L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/k/p/p/p/z/z/z/z/J/K/K/K/P/S/S/S/X/Y/Y/Y/ ( (.(.(+(@(@($(%(&(&(&(-(-(;(;(;(-(-(;(;(;(;(;(~(~(~(/(;(;(~(~(~(/(/(;(~(~(~(:(:(:(:(:(/(<(<(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(<(<(/(:(:(:(:(:(~(~(~(;(/(/(/(~(~(;(;(/(/(~(~(~(;()(;(;(;(-(-(;(;(;(-(=(&(&(%($($(@(+(+(.( ( (Z/Y/Y/X/W/S/S/P/P/K/K/K/z/z/z/z/v/p/p/p/b/b/b/8/}/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . 9^8^/./.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+d+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9*+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ) } } Q%X X ( ( | n.n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a -'m@m@= b b k k I@d&d&c c '+G Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+s~# # M~N~j j +&(.(.e#0{H g g D+d+d+d+M+J.J.E+@ @ @ e@e@e@J !@!@!@s+h 7.'('('('(|(|(e^{.{.{.{.{.{.{.{.{.{.{(v^v^v^L^Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/k/p/p/p/v/z/z/z/J/K/K/K/P/S/S/S/X/X/Y/Y/ ( (.(.(+(@(@($(%(&(&(&(-(-(;(;(;(-(-(;(;()(;(;(~(~(~(/(;(;(~(~(/(/(/(;(~(~(:(:(:(:(:(/(<(<(}(}(}(}(}(}(}(}(}(<(<(<(<(<(<(<(<(}(}(}(}(<(<(<(<(<(<(<(<(}(}(}(}(}(}(}(}(<(<(<(/(:(:(:(:(~(~(~(;(/(/(~(~(~(;(/(/(~(~(~(;()(;(;(;(-(-(;(;(;(-(=(&(&(%($($(@(+(+(.( ( (Z/Y/Y/X/W/S/S/P/K/K/K/K/z/z/z/z/p/p/p/k/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . . 9^/././^+ z.z.4&4&X.P]W$W$A.h h s+!@!@!@7.e@e@e@i @ @ q=J.J.J.M+d+d+D+g g H H e#(.(.,{+&j j N~# # s~]+]+]+;+y.y.-~K f P!W#$ $ Y.Y.5.e e e :!{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - f,F F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.7 7 ) ) P.{+{+6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 } } Q%X X ( | | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a a -'m@m@= b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#P!f f -~y.y.;+3~]+]+s~# # M~N~j +&,{(.(.e#H H g g D+d+d+M+J.J.J.q=@ @ @ e@e@e@7.!@!@!@s+h 7.'('('([(|(+/e^{.{.{.{.{.{.{.{.{.{.{(v^v^K^L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/p/p/p/v/z/z/z/z/K/K/K/P/S/S/S/W/X/Y/Y/Z/ (.(.(+(@(@($(%(&(&(&(-(-(;(;(;(-(-(;(;()(;(~(~(~(/(/(;(~(~(~(/(/(;(~(~(:(:(:(:(/(<(<(<(}(}(}(}(}(}(}(<(<(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(<(<(<(}(}(}(}(}(}(}(<(<(/(:(:(:(:(~(~(~(/(/(/(~(~(;(;(/(~(~(~(;()(;(;(;(-(-(;(;(;(-(=(&(&(%($($(@(+(.(.( ( (Y/Y/Y/X/S/S/S/P/K/K/K/J/z/z/z/v/p/p/p/k/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . 9^8^/./.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@J e@e@i @ @ @ E+J.J.M+d+d+D+D+g g H e#e#(.(.+&j j N~# # # s~]+]+3~y.y.y.K f f W#W#$ Y.Y.5.5.e e :!{&{&{&J%J%J%.,& & Z='+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 9 , F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4@d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 {+{+P.) ) 7 7 C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> > $+l l ; ; 0 F F F f,- - H,a a +'m@m@m@5'b b k I@I@d&d&c '+'+Z=& & & J%J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#f f K -~y.y.3~]+]+]+s~# # N~j j +&(.(.e#e#H H g D+D+d+d+M+J.J.E+@ @ @ i e@e@J !@!@!@s+h h 7.'('('(|(|(+/e^{.{.{.{.{.{.{.{.{.{.1(v^v^L^Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/k/p/p/p/z/z/z/z/J/K/K/K/P/S/S/W/X/Y/Y/Z/ ( (.(+(@(@($(%(&(&(&(-(-(;(;(;(-(-(;(;()(;(~(~(~(/(;(;(~(~(/(/(;(~(~(~(:(:(:(/(<(<(}(}(}(}(}(}(<(<(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(<(<(}(}(}(}(}(}(<(<(/(:(:(:(:(~(~(;(/(/(~(~(~(;(/(/(~(~(;(;(;(;(;(-(-(;(;(;(-(=(&(&(%($(@(@(+(.(.( ( (Y/Y/X/W/S/S/S/P/K/K/K/z/z/z/z/v/p/p/p/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . . 9^/././^+ z.z.4&4&X.P]W$W$A.h h s+!@!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+d+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z=G '+c c d&d&I@k k b b = m@m@-'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( X X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@=.=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+z+l+l+l+:.:.:.#+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=r$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>]>> $+$+l l ; ; 0 F F T+- - - H,a a +'m@m@= 5'b k k I@I@d&c c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.y.3~]+]+s~# # M~N~j j +&(.(.e#0{H g g D+d+d+d+M+J.J.q=@ @ @ e@e@e@J !@!@!@s+h h 2('('([(|(+/+/3({.{.{.{.{.{.{.{.{.{.1(v^K^L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/K/P/S/S/S/X/Y/Y/Y/ ( (.(+(+(@($(%(%(&(&(-(-(;(;(;(-(-(;(;()(;(~(~(~(/(;(;(~(~(/(/(;(~(~(:(:(:(:(<(<(}(}(}(}(}(}(<(<(}(}(}(}(}(}(}(}(}(}(}(}(<(<(<(<(<(<(<(<(<(<(<(<(}(}(}(}(}(}(}(}(}(}(}(<(<(<(}(}(}(}(}(<(<(/(:(:(:(~(~(~(;(/(/(~(~(;(/(/(~(~(;(;(;(;(;(-(-(;(;(;(-(=(&(&(%($(@(@(+(.(.( (Z/Y/Y/X/W/S/S/P/K/K/K/K/z/z/z/z/p/p/p/k/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . 9^/././.+ z.z.#^4&X.X.W$W$A.h h h s+!@!@7.e@e@e@i @ @ @ J.J.J.M+d+d+D+g g H H e#e#(.,{+&j j N~# # s~]+]+]+;+y.y.-~K f P!W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.n.| ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=l+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4(} } } X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a -'m@m@= b b k k I@d&d&c c '+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f f K y.y.;+3~]+]+s~# # M~N~j +&,{(.(.e#H H g g D+d+d+M+J.J.J.q=@ @ i e@e@e@7.!@!@s+h h h 2('('([(|(+/5(3({.{.{.{.{.{.{.{.{.{.1(v^L^Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/k/p/p/p/z/z/z/z/K/K/K/P/S/S/S/W/X/Y/Y/ ( (.(.(+(@($($(%(&(&(=(-(;(;(;(-(-(;(;()(;(~(~(~(/(;(~(~(/(/(/(~(~(~(:(:(:(/(<(<(}(}(}(}(<(<(<(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(<(<(/(:(:(:(~(~(;(/(/(~(~(;(;(/(~(~(~(;(;(;(;(-(-(;(;(;(-(&(&(&(%($(@(@(+(.( ( (Z/Y/Y/X/S/S/S/P/K/K/K/J/z/z/z/v/p/p/p/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . 9^8^/././^+ z.z.4&4&X.W$W$A.A.h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+D+D+g g H e#e#(.(.+&j j N~# # # s~]+]+3~y.y.-~K f f W#$ $ Y.Y.5.5.e e :!{&{&B.J%J%J%.,& & Z='+'+c d&d&I@I@k b b 5'm@m@m@+'a a H,- - f,F F F 0 ; ; l l $+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.;.Q R R q r r s u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=5+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6(} } Q%X X ( ( | | n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - - a a a -'m@m@= b b k I@I@d&d&c '+'+G & & & r+J%J%B.{&{&{&e e e 5.Y.Y.$ $ W#P!f K -~y.y.3~]+]+]+s~# # N~j j +&(.(.e#e#H H g D+D+d+d+M+J.J.E+@ @ @ i e@e@J !@!@!@s+h h A.2('('(|(|(+/7(3({.{.{.{.{.{.{.{.{.{.1(K^L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/K/P/S/S/W/X/Y/Y/Z/ (.(.(+(@(@($(%(&(&(=(-(;(;(;(-(-(;(;()(;(~(~(~(/(;(~(~(/(/(;(~(~(:(:(:(/(<(<(}(}(}(}(<(<(}(}(}(}(}(}(}(}(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(}(}(<(<(}(}(}(}(}(<(/(:(:(:(~(~(~(/(/(~(~(;(;(/(~(~(~(;(;(;(;(-(-(;(;(;(-(&(&(&(%($(@(+(+(.( ( (Y/Y/X/X/S/S/S/P/K/K/K/z/z/z/z/p/p/p/k/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . 9^/././.+ z.z.#^4&X.P]W$W$A.h h h !@!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+d+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~y.y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c c d&I@I@k k b 5'= m@m@+'a a H,- - - T+F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 9 F+F+F+E 8 8 Q+m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=!@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 } } Q%X X ( ( | n.n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=g.g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; 0 F F F f,- - H,a a +'m@m@m@= b b k I@I@d&d&c '+'+Z=& & & J%J%J%B.{&{&:!e e 5.5.Y.Y.$ W#W#f f K y.y.y.3~]+]+s~# # # N~j j +&(.(.e#0{H g g D+d+d+d+M+J.J.q=@ @ @ e@e@e@7.!@!@!@s+h h A.s+'([(|(+/+/7(3({.{.{.{.{.{.{.{.{.{.1(L^Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/k/p/p/p/z/z/z/z/K/K/K/P/S/S/S/X/Y/Y/Z/ ( (.(+(@(@($(%(&(&(=(-(;(;(;(-(-(;(;()(;(~(~(/(/(;(~(~(/(/(;(~(~(:(:(:(/(<(}(}(}(}(<(<(}(}(}(}(}(}(}(<(}(}(}(}(}(}(}(}(}(}(}(}(8(8(8(8(8(8(8(8(8(8(}(}(}(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(}(<(<(}(}(}(}(<(<(/(:(:(:(~(~(/(/(/(~(~(;(/(~(~(~(;(;(;(;(-(-(;(;(-(-(&(&(%($($(@(+(.(.( ( (Y/Y/X/W/S/S/P/K/K/K/J/z/z/z/v/p/p/p/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . 9^8^/././^+ z.#^4&X.X.W$W$A.A.h h s+!@!@!@J e@e@i @ @ @ E+J.J.M+d+d+D+g g H H e#e#(.,{+&j j M~# # s~]+]+3~;+y.y.-~f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+c c d&d&I@k k b b = m@m@-'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+I.9 9 9 , F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9(} } Q%X X ( ( | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@O=P=6 {+{+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> > $+l l ; ; 0 F F F - - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.;+3~]+]+s~# # M~N~j j ,{(.(.e#0{H g g D+d+d+M+J.J.J.q=@ @ i e@e@e@7.!@!@s+h h h A.s+'(|(|(+/5(7(3({.{.{.{.{.{.{.{.{.{.1(L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/K/P/S/S/W/X/Y/Y/ ( (.(.(+(@($(%(&(&(&(-(;(;(;(-(-(;(;()(;(~(~(/(/(;(~(~(/(/(;(~(~(:(:(:(<(<(}(}(}(}(<(<(}(}(}(}(}(<(<(}(}(}(}(}(}(}(}(8(8(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(8(8(8(}(}(}(}(}(}(}(}(<(}(}(}(}(}(}(<(<(}(}(}(}(<(/(:(:(:(~(~(;(/(/(~(~(;(/(~(~(~(;(;(;(;(-(;(;(;(-(=(&(&(%($(@(@(+(.(.( (Z/Y/Y/X/S/S/S/P/K/K/K/J/z/z/z/v/p/p/p/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^o^. . . 9^/././.+ z.z.4&4&X.P]W$W$A.h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+D+D+g g H e#e#(.(.+&j j N~# # # ]+]+]+3~y.y.-~K f f W#$ $ Y.Y.5.e e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>]>> $+$+l ; ; ; 0 F F T+- - - H,a a -'m@m@= 5'b k k I@d&d&c c '+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f f -~y.y.;+3~]+]+s~# # N~j j +&,{(.e#e#H H g D+D+d+d+M+J.J.E+@ @ @ i e@e@J !@!@!@s+h h A.A.s+'(|(+/+/7(7(3({.{.{.{.{.{.{.{.{.{.1(Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/k/p/p/v/z/z/z/J/K/K/K/P/S/S/S/X/Y/Y/Z/ (.(.(+(@(@($(%(&(&(-(-(;(;(-(-(;(;()(;(~(~(~(/(;(~(~(/(/(~(~(:(:(:(/(<(}(}(}(}(<(<(}(}(}(}(}(<(}(}(}(}(}(}(}(8(8(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(8(}(}(}(}(}(}(}(<(}(}(}(}(}(}(<(}(}(}(}(<(<(:(:(:(~(~(;(/(/(~(~(;(/(~(~(;(;(;(;(;(-(;(;(;(-(=(&(&(%($(@(@(+(.( ( (Y/Y/X/W/S/S/S/P/K/K/K/z/z/z/z/p/p/p/k/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . 9^8^/./.+ z.z.#^4&X.X.W$W$A.h h h s+!@!@7.e@e@e@i @ @ q=J.J.J.d+d+d+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~y.y.y.K f f W#W#$ Y.Y.5.5.e e :!{&{&B.J%J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - f,F F F 0 ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( ( X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@=.=.=.~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.<.[.-.-.Q R R R q r r t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5;} } } X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; 0 F F F f,- - H,a a +'m@m@m@5'b b k I@I@d&d&c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.;+3~]+]+s~# # M~N~j +&,{(.(.e#H H g g D+d+d+M+J.J.E+@ @ @ i e@e@J !@!@!@s+h h A.A.W$s+|(+/+/7(7(a(d({.{.{.{.{.{.{.{.{.{.1(Q^Y^*/=/>/>/[/}/}/}/8/b/b/b/p/p/p/v/z/z/z/K/K/K/P/S/S/S/X/Y/Y/Z/ (.(.(+(@(@($(%(&(&(-(;(;(;(-(-(;(;(;(;(~(~(/(;(~(~(/(/(~(~(:(:(:(<(<(}(}(}(<(<(}(}(}(}(<(}(}(}(}(}(8(0(0(0(0(0(0(0(0(0(c(c(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(c(c(0(0(0(0(0(0(0(0(8(}(}(}(}(}(}(}(}(}(}(}(<(}(}(}(}(<(/(:(:(~(~(;(/(/(~(;(;(/(~(~(;()(;(;(-(-(;(;(-(=(&(&(%($(@(@(+(.( ( (Y/Y/X/W/S/S/P/K/K/K/J/z/z/z/v/p/p/p/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^8^/././^+ z.#^4&X.X.W$W$A.h h h s+!@!@7.e@e@e@i @ @ q=J.J.M+d+d+d+D+g g H 0{e#(.(.+&j j N~# # # s~]+]+3~y.y.-~K f f W#$ $ Y.Y.5.e e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=E+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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O=} } Q%X X X ( | | n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+l l ; ; 0 F F F - - - H,a a +'m@m@= 5'b b k I@I@d&c c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f f K y.y.;+3~]+]+s~# # N~j j +&,{(.e#e#H H g D+D+d+d+M+J.J.E+@ @ @ e@e@e@J !@!@!@s+h h A.W$W$e(|(+/5(7(7(a(d({.{.{.{.{.{.{.{.{.{.1(Y^Y^=/=/>/>/[/}/}/8/b/b/b/k/p/p/p/z/z/z/J/K/K/K/P/S/S/W/X/Y/Y/ ( (.(+(@(@($(%(&(&(=(-(;(;(-(-(;(;()(;(~(~(/(;(~(~(/(/(~(~(:(:(:(<(<(}(}(}(<(}(}(}(}(}(}(}(}(}(}(8(0(0(0(0(0(0(0(0(c(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(c(0(0(0(0(0(0(0(8(}(}(}(}(}(<(}(}(}(}(<(<(}(}(}(<(/(:(:(~(~(;(/(/(~(;(/(/(~(~(;(;(;(;(-(;(;(;(-(=(&(&(%($(@(+(.(.( (Z/Y/Y/X/S/S/S/P/K/K/K/z/z/z/z/p/p/p/b/b/b/8/}/}/}/[/>/>/=/*/Y^Q^Q^L^v^v^v^. . . 9^/././.+ z.z.4&4&X.W$W$A.A.h h s+!@!@!@J e@e@i @ @ @ J.J.J.M+d+d+D+g g H 0{e#(.(.,{j j N~M~# # s~]+]+3~y.y.y.K f f W#W#$ Y.Y.5.5.e e :!{&{&B.J%J%J%& & & Z='+'+c d&d&I@I@k b b = m@m@m@a a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : < < < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=@>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a a m@m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.x!$ W#P!f f K y.y.;+3~]+]+s~# # M~j j +&,{(.e#e#H H g D+D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@!@h h h A.W$W$X.o/+/5(7(a(f(g(d({.{.{.{.{.{.{.{.{.{.1(*/=/>/>/[/}/}/}/8/b/b/b/p/p/p/z/z/z/z/K/K/K/P/S/S/W/X/Y/Y/ ( (.(+(@(@($(%(&(&(-(;(;(;(-(;(;()(;(~(~(/(;(~(~(/(/(~(~(:(:(/(<(}(}(}(<(}(}(}(}(<(}(}(}(}(0(0(0(0(0(0(c(0(0(0(0(0(c(c(c(0(0(0(0(0(0(0(0(h(h(h(h(h(c(h(h(h(h(h(h(0(0(0(0(0(0(0(0(c(c(0(0(0(0(0(0(c(0(0(0(0(0(8(}(}(}(}(<(}(}(}(}(<(}(}(}(<(/(:(:(~(~(/(/(~(;(;(/(~(~(;(;(;(-(-(;(;(-(=(&(&(%($(@(+(.(.( (Z/Y/Y/X/S/S/S/P/K/K/K/z/z/z/v/p/p/p/b/b/b/8/}/}/[/(/>/>/=/Y^Y^Q^L^K^v^v^o^. . 9^8^/./.+ z.z.#^4&X.P]W$W$A.h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+D+g g H H e#(.(.,{+&j N~M~# # s~]+]+3~y.y.y.K f f W#W#$ Y.Y.5.5.e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+I.9 9 9 , F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@=.=.=.<+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.<.[.-.-.Q R R q q r r t u u v x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y%} } Q%X X ( ( | | n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@O=P=6 {+{+P.) ) 7 7 C.-+o.m m Q+8 8 E F+F+, 9 9 9 I.^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#e#H g g D+D+d+d+M+J.J.q=@ @ @ e@e@e@7.!@!@s+h h A.A.W$W$X.4&A.7(7(a(g(g(g(k({.{.{.{.{.{.{.{.{.{.1(>/>/(/[/}/}/8/b/b/b/p/p/p/z/z/z/z/K/K/K/P/S/S/W/X/Y/Y/ (.(.(+(@($(%(&(&(=(-(;(;(-(-(;(;(;(~(~(/(;(~(~(/(;(~(:(:(/(<(}(}(}(<(}(}(}(<(}(}(}(8(0(0(0(0(c(0(0(0(0(c(c(0(0(0(h(c(c(8(8(8(j(j(j(l(l(l(l(l(c(c(c(c(c(c(c(c(c(c(c(c(l(l(l(l(l(j(j(j(8(8(8(c(h(0(0(0(0(c(c(0(0(0(0(c(0(0(0(0(8(}(}(}(<(}(}(}(<(}(}(}(<(:(:(:(~(;(/(~(~(;(/(~(~(;(;(;(-(-(;(;(-(=(&(&(%(@(@(+(.( ( (Y/Y/X/W/S/S/P/K/K/K/z/z/z/v/p/p/p/b/b/b/8/}/}/[/>/>/=/=/Y^Y^Q^L^v^v^v^. . . 9^/././^+ z.z.4&X.X.W$W$A.h h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+D+g H H e#e#(.,{+&j N~M~# # s~]+]+3~;+y.y.K f f W#W#$ Y.Y.5.5.e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.C.C.7 7 ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.k.k.a.b.<.[.-.;.Q R R q r r s u u v w x y y S T T >.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=^+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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Q%} } Q%X X ( ( | n.n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=6 6 {+{+P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a a m@m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f f -~y.y.;+]+]+]+s~# # N~j j +&(.(.e#0{H g g D+d+d+d+J.J.J.q=@ @ i e@e@J !@!@!@s+h h A.A.W$P]X.4&A.7(7(a(g(g(m(k({.{.{.{.{.{.{.{.{.{.1(>/>/[/}/}/}/8/b/b/k/p/p/p/z/z/z/J/K/K/K/P/S/S/X/Y/Y/Z/ (.(.(@(@($(%(&(&(-(;(;(;(-(;(;()(;(~(~(/(;(~(/(/(~(~(:(:(<(}(}(}(<(}(}(}(<(}(}(}(8(0(0(0(0(c(0(0(0(0(c(0(0(0(0(h(c(8(8(8(j(j(l(l(l(l(c(c(c(c(j(j(j(j(j(j(j(j(j(j(j(j(c(c(c(c(l(l(l(l(j(j(8(8(c(c(h(0(0(0(0(c(0(0(0(0(c(0(0(0(0(}(}(}(}(}(}(}(}(<(}(}(}(<(:(:(~(~(/(/(~(;(/(~(~(;()(;(;(-(;(;(;(-(&(&(%($(@(+(.(.( (Z/Y/Y/W/S/S/P/K/K/K/z/z/z/z/p/p/p/b/b/b/8/}/}/[/(/>/>/=/Y^Y^Q^L^K^v^v^o^. . 9^/././.+ z.z.4&4&X.W$W$A.A.h h s+!@!@7.e@e@e@i @ @ q=J.J.M+d+d+D+D+g g H e#e#(.(.+&j j N~# # s~]+]+3~;+y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&{&J%J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+I.9 9 9 F+F+F+E 8 8 Q+m m o.-+C.7 7 ) P.P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( X X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q r r s u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=+=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J u%} } Q%X X ( ( | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+m m m Q+8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f K -~y.y.3~]+]+]+# # # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$P]X.4&n(7(7(f(g(g(m(k({.{.{.{.{.{.{.{.{.{.1(>/>/[/}/}/8/b/b/b/k/p/p/v/z/z/z/K/K/K/P/S/S/S/X/Y/Y/ ( (.(+(@($(%(&(&(=(-(;(;(-(-(;(;(;(~(~(/(;(~(~(/(;(~(:(:(/(<(}(}(<(}(}(}(}(}(}(}(}(0(0(0(0(c(0(0(0(0(c(0(0(0(0(c(c(8(8(j(j(l(l(l(c(c(c(j(j(j(j(j(j(l(l(l(l(l(l(l(l(j(j(j(j(j(j(c(c(c(l(l(l(j(j(8(8(c(c(0(0(0(0(c(0(0(0(0(c(0(0(0(0(}(}(}(}(}(}(}(<(<(}(}(<(/(:(:(~(;(/(~(~(;(/(~(~(;(;(;(-(-(;(;(-(=(&(%($(@(@(+(.( ( (Y/Y/X/S/S/S/P/K/K/J/z/z/z/v/p/p/k/b/b/b/}/}/}/[/>/>/=/*/Y^Q^Q^K^v^v^o^. . 9^8^/./.+ z.z.#^4&X.P]W$W$A.h h s+!@!@!@J e@e@i @ @ q=J.J.J.d+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+]+;+y.y.-~f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@m@a a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.| | ( ( X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@O B o o V m.m.m.y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # d#} } Q%X X ( ( | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 F F F f,- - H,a a +'m@m@= 5'b b k I@I@d&c c '+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#f f K -~y.y.3~]+]+s~# # M~N~j j ,{(.(.e#H H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@!@s+h h A.W$W$X.X.4&n(7(a(f(g(g(m(k({.{.{.{.{.{.{.{.{.{.1(>/(/[/}/}/8/b/b/b/p/p/p/z/z/z/z/K/K/K/P/S/S/W/X/Y/Z/ (.(.(+(@($(%(&(&(-(;(;(;(-(;(;()(;(~(~(;(~(~(/(;(~(:(:(:(<(}(}(}(<(}(}(}(}(}(}(}(0(0(0(0(c(0(0(0(0(c(0(0(0(h(c(8(8(8(j(l(l(l(c(c(j(j(j(j(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(j(j(j(j(c(c(l(l(j(j(8(8(c(c(h(0(0(0(c(0(0(0(0(c(0(0(0(0(}(}(}(<(}(}(}(<(}(}(}(<(:(:(~(~(/(/(~(;(/(~(~(;()(;(;(-(;(;(;(-(&(&(%($(@(+(.(.( (Y/Y/X/W/S/S/P/K/K/K/z/z/z/v/p/p/p/b/b/b/8/}/}/[/>/>/=/=/Y^Q^Q^L^v^v^o^. . . 8^/././^+ z.#^4&X.X.W$W$A.h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # s~]+]+3~y.y.-~K f P!W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b 5'm@m@m@+'a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| ( ( X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+K.K.9.r#n v.q.q.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x y y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&d#} } Q%X X ( | | n.n.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+l l ; ; 0 F F F - - - H,a a +'m@m@= 5'b k k I@d&d&c c '+G Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ $ W#f f K y.y.y.3~]+]+s~# # M~N~j +&,{(.(.e#H H g D+D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@s+h h h A.W$W$X.X.4&o(7(a(g(g(g(m(k({.{.{.{.{.{.{.{.{.{.1(>/(/[/}/}/8/b/b/k/p/p/p/z/z/z/J/K/K/K/P/S/S/X/Y/Y/Z/ (.(+(@(@($(%(&(=(-(;(;(-(-(;(;(;(~(~(/(;(~(/(/(~(~(:(:(<(}(}(}(<(}(}(}(<(}(}(}(8(0(0(0(c(0(0(0(0(c(0(0(0(h(c(8(8(j(j(l(l(c(c(j(j(j(l(l(l(l(c(c(j(j(j(j(j(j(j(j(j(j(j(c(c(l(l(l(l(l(j(j(j(c(c(l(l(j(j(8(8(c(h(0(0(0(c(0(0(0(0(0(0(0(0(8(}(}(}(<(}(}(}(<(}(}(<(/(:(:(~(;(/(~(~(;(/(~(~(;(;(;(-(-(;(;(-(&(&(%($(@(@(+(.( (Z/Y/Y/X/S/S/P/K/K/K/J/z/z/z/p/p/p/b/b/b/8/}/}/[/(/>/>/=/Y^Y^Q^L^v^v^v^o^. . 9^/././^+ z.z.4&X.X.W$W$A.h h h !@!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H H e#(.(.,{j j N~M~# # s~]+]+3~y.y.-~K f f W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+c c d&I@I@k k b 5'= m@m@+'a a H,- - f,F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$n.n.| ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.G+H+H+g@=.=.=.<+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%o%P%P%~&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=p^. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . } } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 {+{+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - - a a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f K -~y.y.3~]+]+s~# # # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@!@h h h A.W$W$X.X.4&z.o(a(g(g(g(m(m(k({.{.{.{.{.{.{.{.{.{.1([/}/}/}/b/b/b/k/p/p/v/z/z/z/K/K/K/P/S/S/W/X/Y/Y/ (.(.(+(@($(%(&(&(-(;(;(-(-(;(;(;(~(~(/(;(~(/(/(~(~(:(/(<(}(}(<(}(}(}(<(}(}(}(0(0(0(0(0(0(0(0(c(0(0(h(c(8(8(j(l(l(c(j(j(l(l(c(j(j(l(l(l(l(l(l(l(l(p(p(p(p(p(p(p(p(p(p(p(p(p(p(l(l(l(l(l(l(l(l(j(j(c(l(l(j(j(c(l(l(j(8(8(c(h(0(0(c(0(0(0(0(0(0(0(0(}(}(}(<(}(}(}(<(}(}(<(/(:(~(~(/(/(~(;(/(~(~(;(;(;(-(-(;(;(-(&(&(%($(@(+(.(.( (Y/Y/X/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/}/[/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^/././.+ z.z.4&X.X.W$W$A.h h h !@!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # s~]+]+3~y.y.-~K f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.9 9 9 F+F+F+E 8 8 Q+m m o.-+C.7 7 ) P.P.{+{+6 P=O=*@*@t=D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=)=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +&u%} } Q%X X X ( | | n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=6 6 {+{+P.) ) 7 C.C.-+m m m Q+8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@= 5'b k k I@I@d&c c '+G Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.y.3~]+]+s~# # M~N~j +&,{(.e#e#H g g D+D+d+d+M+J.J.q=@ @ i e@e@e@!@!@!@s+h h A.W$W$P]X.4&#^z.o(f(g(g(m(m(m(k({.{.{.{.{.{.{.{.{.{.r([/}/}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/S/X/Y/Y/ ( (.(+(@($(%(&(&(-(;(;(-(-(;(;(;(~(~(/(;(~(/(/(~(:(:(/(<(}(}(<(}(}(}(}(}(}(8(0(0(0(c(0(0(0(c(0(0(h(c(8(8(j(l(c(j(j(l(l(c(j(l(l(l(l(l(l(p(p(p(q(l(l(l(l(p(p(p(p(p(p(p(p(p(p(l(l(l(l(q(p(p(p(p(l(l(l(l(l(j(c(l(l(j(j(c(l(j(j(8(c(h(0(0(c(0(0(0(c(0(0(0(8(}(}(}(}(}(}(<(}(}(<(/(:(:(~(;(/(~(;(/(~(~(;(;(;(-(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/S/P/K/K/J/z/z/z/p/p/p/b/b/b/8/}/}/[/(/>/=/=/Y^Y^Q^L^v^v^o^. . . 8^/././^z.z.#^4&X.P]W$W$A.h h s+!@!@!@J e@e@i @ @ q=J.J.M+d+d+D+D+g g H e#e#(.,{+&j j M~# # s~]+]+3~y.y.y.K f f W#W#$ Y.Y.5.e e e {&{&{&B.J%J%r+& & Z=G '+c c d&I@I@k k b 5'= m@m@+'a a H,- - f,F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 8 m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.| | ( ( X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.k.k.a.b.<.[.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+B+L+L+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f u%} } Q%X X ( ( | | n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+m m m 8 8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 F F F f,- - H,a a +'m@m@= 5'b k k I@d&d&c c '+G Z=& & r+J%J%B.{&{&:!e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # M~j j +&(.(.e#e#H g g D+d+d+d+M+J.J.q=@ @ i e@e@J !@!@!@s+h h A.W$W$P]X.4&#^z.X.f(g(g(m(m(m(k({.{.{.{.{.{.{.{.{.{.r([/}/}/8/b/b/k/p/p/v/z/z/z/J/K/K/P/S/S/W/X/Y/Y/ (.(.(+(@($(%(&(&(-(;(;(-(-(;()(;(~(~(/(~(~(/(;(~(:(:(<(}(}(}(<(}(}(<(}(}(}(0(0(0(0(0(0(0(c(0(0(0(c(8(8(j(l(l(c(j(l(l(c(j(l(l(l(l(l(p(p(p(q(l(l(l(p(p(p(p(p(q(q(q(q(q(q(p(p(p(p(p(l(l(l(q(p(p(p(l(l(l(l(l(j(c(l(l(j(c(c(l(j(8(8(c(0(0(0(c(0(0(0(0(0(0(0(}(}(}(<(}(}(<(}(}(}(<(:(:(~(;(/(~(~(;(~(~(;()(;(;(-(;(;(-(=(&(%($(@(+(.(.( (Z/Y/X/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^v^o^. . 9^/././^+ z.#^4&X.X.W$W$A.h h s+!@!@!@J e@e@i @ @ q=J.J.J.d+d+d+D+g g H e#e#(.(.+&j j N~# # s~]+]+3~;+y.y.K f f W#W#$ Y.Y.5.5.e e :!{&{&B.J%J%r+& & Z=G '+c c d&d&I@k k b 5'= m@m@+'a a H,- - - F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.n.| ( ( X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+0.0.0.R.p p r.k.k.a.b.<.[.-.;.Q R R q r r s u u v w x y y S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=-.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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B.u%} } Q%X X ( ( | | n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 F F F - - - H,a a +'m@m@= 5'b k k I@d&d&c '+'+G Z=& & r+J%J%B.{&{&:!e e 5.5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#0{H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&#^z.X.f(g(g(m(m(m()/{.{.{.{.{.{.{.{.{.{.r(}/}/}/b/b/b/k/p/p/v/z/z/z/K/K/K/P/S/S/W/Y/Y/Z/ (.(+(@(@($(&(&(=(-(;(;(-(;(;()(~(~(/(;(~(~(/(~(~(:(:(<(}(}(<(}(}(}(<(}(}(8(0(0(0(c(0(0(0(c(0(0(h(c(8(j(l(l(c(j(j(l(c(j(j(l(l(l(l(p(p(p(q(l(l(p(p(p(q(q(q(q(l(l(l(l(l(l(q(q(q(q(p(p(p(l(l(l(p(p(p(l(l(l(l(l(j(c(l(l(j(c(l(l(j(8(c(h(0(0(c(0(0(0(c(0(0(0(8(}(}(}(}(}(}(<(}(}(<(/(:(~(~(/(/(~(;(/(~(~(;(;(;(-(;(;(-(=(&(&($(@(@(+(.( (Z/Y/Y/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/b/}/}/}/[/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^/././^+ z.z.4&X.X.W$W$A.h h s+!@!@!@J e@e@e@@ @ @ J.J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+3~;+y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@k k b b = m@m@+'a a H,- - - T+F F 0 ; ; l l $+> > ]>^+^+^+&.9 9 5;F+F+F+8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| ( ( X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q r r s u u v w x y y S T T >.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F u%} } Q%X X ( ( | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C ] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+l l ; ; 0 F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+G & & & J%J%J%B.{&{&:!e e 5.5.Y.x!$ W#P!f f K y.y.;+]+]+]+s~# # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@!@h h h A.W$W$X.4&4&z.z.X.g(g(g(m(m(m()/{.{.{.{.{.{.{.{.{.{.r(}/}/8/b/b/b/p/p/p/z/z/z/z/K/K/K/P/S/S/X/Y/Y/ ( (.(+(@($(%(&(&(-(;(;(-(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(}(<(}(}(<(}(}(}(0(0(0(c(0(0(0(c(0(0(h(c(8(j(l(l(c(j(l(l(j(j(l(l(l(l(p(p(q(l(l(p(p(q(q(l(l(p(p(p(p(p(p(q(q(q(p(p(p(p(p(l(l(q(q(p(p(l(l(q(p(p(l(l(l(l(j(j(l(l(j(j(c(l(j(8(8(c(0(0(c(0(0(0(c(0(0(0(8(}(}(<(}(}(}(}(}(}(<(:(:(~(;(/(~(~(/(~(~(;()(;(-(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/S/K/K/K/J/z/z/z/p/p/p/b/b/b/8/}/}/[/>/>/=/*/Y^Q^Q^K^v^v^o^. . 9^8^/./.+ z.z.4&4&X.W$W$A.h h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # ]+]+]+3~y.y.-~f f P!W#$ x!Y.Y.5.e e :!{&{&{&J%J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+[@/ / r$n.n.| ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.G+H+H+g@=.=.=.~+~+~+1+W.>@>@B o o @m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &.u%} } Q%X X ( ( | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+l l ; ; 0 F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & & J%J%J%{&{&{&:!e e 5.5.Y.x!$ W#P!f f -~y.y.;+]+]+]+# # # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@s+h h h A.W$W$X.4&4&z.z.X.g(g(m(m(m(m()/{.{.{.{.{.{.{.{.{.{.r(}/}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/S/X/Y/Y/ (.(.(+(@($(%(&(&(-(;(;(-(-(;()(;(~(~(;(~(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(8(0(0(0(0(0(0(c(0(0(0(c(8(8(j(l(c(j(j(l(c(j(l(l(l(l(p(p(q(l(l(p(p(q(l(l(p(p(p(q(q(q(q(q(q(q(q(q(q(q(q(p(p(p(l(l(q(p(p(l(l(q(p(p(l(l(l(l(j(j(l(l(j(c(l(l(j(8(c(h(0(0(c(0(0(0(0(0(0(8(}(}(}(}(}(}(<(}(}(<(:(:(~(~(/(~(~(;(/(~(;()(;(;(-(;(;(-(=(&(%($(@(+(.(.( (Y/Y/X/W/S/S/P/K/K/J/z/z/z/p/p/p/b/b/b/8/}/}/[/(/>/=/=/Y^Q^Q^L^v^v^o^. . 9^8^/./.+ z.z.4&4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H H e#(.(.,{j j N~# # # s~]+]+3~y.y.-~K f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)={ { +=X&w.3 6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.G+H+H+g@=.=.=.<+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x y y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 u%} } Q%X X ( ( | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+]>]>> > $+l l ; ; 0 F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.Y.Y.x!$ W#P!f K -~y.y.3~]+]+]+# # # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@s+h h A.A.W$P]X.4&4&z.z.X.g(g(m(m(m(m()/{.{.{.{.{.{.{.{.{.{.r(}/}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Y/ (.(.(+(@($(%(&(=(-(;(;(-(;(;()(~(~(/(;(~(/(/(~(~(:(/(<(}(}(<(}(}(}(}(}(}(0(0(0(0(0(0(0(c(0(0(h(c(8(j(l(l(c(j(l(l(j(j(l(l(l(p(p(p(l(l(p(p(q(l(l(p(p(q(q(q(l(l(l(l(l(l(l(l(l(l(q(q(q(p(p(p(l(q(p(p(l(l(q(p(p(l(l(l(l(j(c(l(j(j(c(l(j(8(8(h(0(0(c(0(0(0(c(0(0(0(}(}(}(}(}(}(<(}(}(<(/(:(:(~(/(/(~(;(/(~(~(;(;(;(-(;(;(-(=(&(&($(@(@(+(.( (Z/Y/X/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/[/(/>/=/=/Y^Y^Q^L^v^v^o^. . . 8^/./.+ z.z.#^4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+D+D+g H H e#(.(.,{j j N~M~# # s~]+]+3~y.y.-~K f P!W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; ; l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@*@D D D i=~ ~ )+g.g.)=)={ +=X&w.3 6@6@y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@=.=.=.<+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x y y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D u%} } Q%X X ( ( | n.n.r$/ / [@U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+]>]>> $+$+l l ; ; 0 F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f K -~y.y.3~]+]+s~# # # N~j j ,{(.(.e#H H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@s+h h A.A.W$P]X.4&#^z.z.X.g(g(m(m(m(m()/{.{.{.{.{.{.{.{.{.{.r(}/}/8/b/b/k/p/p/p/z/z/z/K/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@($(&(&(=(-(;(;(-(;(;(;(~(~(/(;(~(/(/(~(:(:(/(<(}(}(<(}(}(<(}(}(}(0(0(0(c(0(0(0(0(0(0(c(8(8(j(l(c(j(l(l(j(j(l(l(l(l(p(p(l(l(p(p(q(l(p(p(q(q(q(l(l(s(s(s(s(s(s(s(s(s(s(l(l(q(q(q(p(p(l(q(p(p(l(l(p(p(p(l(l(l(j(j(l(l(j(c(l(l(j(8(c(0(0(0(c(0(0(c(0(0(0(8(}(}(<(}(}(<(}(}(}(<(:(:(~(;(/(~(;(/(~(~(;(;(;(-(;(;(;(=(&(&(%(@(@(+(.( (Z/Y/Y/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^v^. . . 9^/././^z.z.#^4&X.P]W$W$A.h h s+!@!@!@e@e@e@i @ @ q=J.J.M+d+d+D+D+g H H e#e#(.,{+&j N~M~# # s~]+]+3~y.y.-~K f f W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a a - - - f,F F ,,; ; ; l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.C.C.7 7 ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.)=)={ +=X&w.3 6@6@y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=& . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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K _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a a m@m@m@5'b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#f f K y.y.y.3~]+]+s~# # M~j j +&,{(.e#e#H g g D+d+d+d+J.J.J.q=@ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Y/ (.(.(+(@($(%(&(=(-(;(;(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(}(}(}(}(}(}(}(8(0(0(0(0(0(0(c(0(0(c(8(8(l(l(c(j(l(c(j(l(l(l(p(p(q(l(p(q(l(p(p(q(l(s(u(u(p(s(u(u(u(p(s(x(x(x(x(x(x(s(p(u(u(u(s(p(u(u(s(l(q(q(p(l(q(p(l(l(p(p(l(l(l(j(c(l(j(j(l(l(j(8(c(0(0(0(c(0(0(c(0(0(0(}(}(}(}(}(}(<(}(}(<(:(:(~(;(/(~(~(/(~(~(;(;(;(-(;(;(;(-(&(&(%(@(@(+(.( (Z/Y/Y/W/S/S/P/K/K/K/z/z/z/p/p/p/k/b/b/8/}/}/[/(/>/=/=/Y^Q^Q^L^v^v^o^. . 9^8^/./.+ z.z.4&4&X.W$W$A.h h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+3~;+y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&B.J%J%r+& & Z=G '+c c d&d&I@k k b 5'= m@m@+'a a H,- - f,F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ [ [ [ #%: : : < < < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=<.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @>_ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a a m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#f f K y.y.y.3~]+]+s~# # M~j j +&(.(.e#e#H g g D+d+d+d+J.J.J.q=@ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(.(@(@($(%(&(=(-(;(;(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(0(0(0(0(c(0(0(c(8(j(l(l(c(j(l(c(j(l(l(l(p(p(l(l(p(q(l(p(q(q(l(s(u(u(s(u(u(u(p(x(x(x(x(x(x(x(x(x(x(s(u(u(u(s(p(u(u(s(l(q(p(l(q(p(p(l(p(p(l(l(l(j(j(l(j(j(c(l(j(8(c(h(0(0(c(0(0(c(0(0(0(}(}(}(}(}(}(<(}(}(<(:(:(~(~(/(~(~(/(~(~(;(;(;(-(-(;(;(-(&(&(%($(@(+(.( (Z/Y/Y/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/[/(/>/=/=/Y^Q^Q^L^v^v^o^. . 9^8^/./.+ z.z.4&4&X.W$W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+3~;+y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&B.J%J%r+& & Z=G '+'+c d&d&I@k k b 5'= m@m@+'a a H,- - - F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } _ _ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I@_ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a a m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.y.3~]+]+s~# # M~j j +&(.(.e#e#H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(.(@(@($(&(&(=(-(;(;(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(0(0(0(0(c(8(j(l(c(j(j(l(j(j(l(l(l(p(p(l(l(p(q(l(p(q(l(s(u(u(p(s(u(u(p(x(x(x(x(x(x(u(x(x(x(x(x(s(u(u(u(s(u(u(s(l(q(p(p(l(p(p(l(q(p(l(l(l(l(j(l(l(j(c(l(j(8(c(h(0(0(c(0(0(c(0(0(0(}(}(}(<(}(}(<(}(}(<(/(:(~(~(/(~(~(;(~(~(;()(;(-(-(;(;(-(&(&(%($(@(+(.( (Z/Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/[/(/>/=/=/Y^Y^Q^L^v^v^o^. . 9^8^/./.+ z.z.4&4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+]+;+y.y.K f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@k k b 5'= m@m@+'a a H,- - - F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 8 m m m -+C.C.7 ) ) P.{+{+6 6 O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 / / r$r$n.| | ( X X X } } } _ _ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w='@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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T+_ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # M~j j +&(.(.e#e#H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@($(&(&(=(;(;(;(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(c(0(0(0(c(8(j(l(c(j(j(l(j(j(l(l(l(p(p(l(p(p(q(p(p(q(l(s(u(u(s(u(u(u(s(x(x(x(u(x(x(x(x(u(x(x(x(x(p(u(u(s(p(u(s(l(q(q(p(l(q(p(l(q(p(p(l(l(l(j(l(l(j(c(l(j(8(8(h(0(0(c(0(0(0(0(0(0(8(}(}(<(}(}(<(}(}(<(/(:(~(~(/(~(~(;(/(~(;()(;(-(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/[/(/>/>/=/Y^Y^Q^L^v^v^o^. . 9^8^/./.+ z.z.4&4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+]+;+y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@k k b 5'= m@m@+'a a H,- - - F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 8 m m m -+C.C.7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 / / r$r$n.| | ( X X X } } } _ _ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . l _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#e#H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@($(&(&(=(;(;(;(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(c(0(0(h(c(8(j(l(c(j(l(l(j(j(l(l(l(p(q(l(p(q(l(p(p(q(l(s(u(u(s(u(u(p(x(x(x(u(x(x(x(x(x(x(x(x(x(x(s(u(u(s(p(u(u(s(q(q(p(l(q(p(l(l(p(p(l(l(l(j(c(l(j(c(l(j(8(8(c(0(0(c(0(0(0(0(0(0(8(}(}(<(}(}(<(}(}(<(/(:(~(~(/(/(~(;(/(~(;()(;(-(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/[/(/>/>/=/Y^Y^Q^L^v^v^o^. . . 8^/./.+ z.z.#^4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # ]+]+]+;+y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@k k b b = m@m@+'a a H,- - - F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]>_ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#0{H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@(%(&(&(=(;(;(;(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(c(0(0(h(c(8(j(l(c(j(l(l(j(l(l(l(l(p(q(l(p(q(l(p(q(q(l(s(u(p(s(u(u(s(x(x(x(x(x(x(x(x(x(x(x(u(x(x(x(u(u(u(s(u(u(s(l(q(p(l(q(p(l(l(p(p(l(l(l(j(c(l(j(c(l(l(8(8(c(0(0(c(0(0(0(0(0(0(8(}(}(<(}(}(<(}(}(<(/(:(:(~(/(/(~(;(/(~(;()(;(-(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^o^. . . 8^/./.+ z.z.#^4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # ]+]+]+;+y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & G '+'+c d&d&I@k k b b = m@m@+'a a H,- - - F F F 0 ; ; l $+$+> > ]>^+^+^+&.9 9 , F+F+F+8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &._ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#0{H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@(%(&(&(=(;(;(;(-(;(;(;(~(~(/(~(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(c(0(0(h(c(8(j(l(c(j(l(l(j(l(l(l(p(p(q(l(p(q(l(p(q(q(l(u(u(p(s(u(u(s(x(x(u(x(x(x(y(y(x(x(x(x(x(x(x(p(u(u(s(u(u(s(l(q(p(l(q(p(l(l(p(p(l(l(l(j(c(l(j(c(l(l(8(8(c(0(0(c(0(0(0(0(0(0(8(}(}(<(}(}(<(}(}(<(/(:(:(~(/(/(~(;(/(~(;()(;(;(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^v^. . . 8^/././^z.z.#^4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # ]+]+]+3~y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & G '+'+c d&d&I@k k b b = m@m@+'a a H,- - - T+F F 0 ; ; l l $+> > ]>^+^+^+&.9 9 , F+F+F+8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F+_ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#e#H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@(%(&(&(=(;(;(;(-(;(;(;(~(~(/(~(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(c(0(0(h(c(8(j(l(c(j(l(l(j(l(l(l(p(p(q(l(p(q(l(p(q(q(l(u(u(p(u(u(u(s(x(x(u(x(x(x(y(y(y(x(x(x(x(x(x(p(u(u(s(u(u(s(l(q(p(l(q(p(l(l(p(p(l(l(l(j(c(l(j(c(l(l(8(8(c(0(0(c(0(0(0(0(0(0(8(}(}(<(}(}(<(}(}(}(/(:(:(~(/(/(~(;(/(~(;()(;(;(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/b/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^v^. . . 8^/././^z.z.#^4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H H e#(.(.+&j j N~# # # ]+]+]+3~y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & G '+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+> > ]>^+^+^+&.9 9 , F+F+F+8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=d+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z(/=A(B(B(C(D(D(E(F(F(G(H(H(H(H(I(J(J(K(5-5-5-L(L(L(M(M(M(d-N(N(O(U-#-#-P(Q(Q(o-o-o-R(R(S(T(T(E;h;h;h;U(V(V(V(b,b,W(X(X(h>X>Y(_,_,;>;>;>Z(`(`(`((,(,(,$',',',' _ _._._._i'i'>'R'Q'Q'+_+_+_J,`'`'`'@_@_@_#_H)H)H)$_$_%_&_&_s)s)*_c)c)A!g!g!g!` ` ` =_=_=_>~-_-_J!J!J!J!J!;_Q~Q~z!>_h~h~,_q~q~q~u{u{B{+{+{x{x{A{p{p{'_'_'_'_r]r]r]&^&^&^'(g]g]+/)_)_)_a(a(a(f(M]M]v(v(!_~_~_{_~_]_]_n/n/n/^_/_{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@(%(&(&(=(;(;(;(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(c(0(0(h(c(8(j(l(c(j(l(l(j(l(l(l(p(p(q(l(p(q(l(p(q(q(l(u(u(p(s(u(u(s(x(x(u(x(x(x(y(y(x(x(x(x(x(x(x(p(u(u(s(u(u(s(l(q(p(l(q(p(l(l(p(p(l(l(l(j(c(l(j(c(l(l(8(8(c(0(0(c(0(0(0(0(0(0(8(}(}(<(}(}(<(}(}(}(/(:(:(~(/(/(~(;(/(~(;()(;(;(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/b/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^v^. . . 8^/././^z.z.#^4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H H e#(.(.+&j j N~# # # ]+]+]+3~y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & G '+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+> > ]>^+^+^+&.9 9 , F+F+F+8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( X X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=(.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |_/;1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_1_i,i,i,i,i,i,i,i,i,i,i,i,i,J;J;J;J;J;J;J;J;J;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;/;=^=^=^=^'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!'!J;J;J;J;J;J;{,{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(.(@(@($(&(&(=(-(;(;(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(c(0(0(0(c(8(j(l(c(j(j(l(j(j(l(l(l(p(p(l(p(p(q(p(p(q(l(s(u(u(s(u(u(u(s(x(x(x(u(x(x(x(x(x(u(x(x(x(p(u(u(s(p(u(u(l(q(q(p(l(q(p(l(q(p(p(l(l(l(j(c(l(j(c(l(j(8(8(c(0(0(c(0(0(0(0(0(0(8(}(}(<(}(}(<(}(}(<(/(:(~(~(/(/(~(;(/(~(;()(;(-(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^o^. . . 8^/././^z.z.#^4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # ]+]+]+3~y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & G '+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+> > ]>^+^+^+&.9 9 , F+F+F+8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( X X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /._ _ u%} } } X X X ( | | n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=6 6 {+{+P.) ) 7 C.C.-+m m m 8 8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 F F F f,- - H,a a +'m@m@= 5'b k k I@d&d&c c '+G Z=& & r+J%J%B.{&{&:!e e 5.5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.X.f(g(g(m(m(m()/{.{.{.{.{.{.{.{.{.{.r(}/}/8/b/b/b/p/p/p/v/z/z/z/K/K/K/P/S/S/X/Y/Y/ ( (.(+(@($(%(&(&(-(;(;(-(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(}(<(}(}(<(}(}(8(0(0(0(c(0(0(0(0(0(0(c(8(8(j(l(c(j(j(l(c(j(l(l(l(l(p(p(p(l(l(p(p(q(q(l(p(p(p(q(q(q(q(q(q(q(q(q(q(q(q(q(p(p(p(l(q(q(p(p(l(l(p(p(p(l(l(l(j(j(l(l(j(j(c(l(j(8(c(h(0(0(c(0(0(0(c(0(0(0(}(}(}(}(}(}(<(}(}(<(/(:(:(~(/(/(~(;(/(~(~(;(;(;(-(;(;(;(=(&(&(%(@(@(+(.( (Z/Y/Y/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^v^. . . 9^/././^+ z.#^4&X.P]W$W$A.h h s+!@!@!@J e@e@i @ @ q=J.J.M+d+d+D+D+g g H e#e#(.,{+&j N~M~# # s~]+]+3~y.y.y.K f f W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c c d&I@I@k b b 5'm@m@m@+'a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.9 9 9 , F+F+E 8 8 Q+m m o.-+C.7 7 ) P.P.{+{+6 P=O=*@*@t=D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#n n q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o @V m.m. +y+y+z+l+l+l+:.:.:.#+#+#+3.0.0..+R.p f.r.k.a.b.b.[.-.-.Q R R R q r r t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /._ _ u%} } } X X X ( | | n.r$r$/ / 1 U+U+R&^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@O=P=6 {+{+P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@= 5'b k k I@I@d&c c '+G Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # M~j j +&(.(.e#e#H g g D+d+d+d+J.J.J.q=@ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&#^z.X.f(g(g(m(m(m()/{.{.{.{.{.{.{.{.{.{.r(}/}/}/b/b/b/k/p/p/v/z/z/z/K/K/K/P/S/S/X/Y/Y/Z/ (.(+(@(@(%(&(&(=(;(;(;(-(;(;(;(~(~(/(;(~(/(/(~(:(:(/(<(}(}(<(}(}(}(}(}(}(0(0(0(0(0(0(0(c(0(0(h(c(8(j(l(l(c(j(l(l(j(j(l(l(l(l(p(p(p(l(l(p(p(q(q(l(l(p(p(p(p(p(q(q(q(q(q(p(p(p(p(p(l(l(q(p(p(p(l(l(p(p(p(l(l(l(l(j(c(l(j(j(c(l(j(8(8(c(0(0(0(c(0(0(0(0(0(0(8(}(}(}(}(}(}(<(}(}(<(/(:(~(~(/(/(~(;(/(~(~()(;(;(-(;(;(-(=(&(%($(@(@(.(.( (Z/Y/X/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/[/(/>/>/=/Y^Y^Q^L^v^v^o^. . . 8^/././^z.z.#^4&X.P]W$W$A.h h s+!@!@!@e@e@e@i @ @ q=J.J.M+d+d+D+D+g H H e#e#(.,{+&j N~M~# # s~]+]+3~y.y.y.K f f W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@m@a a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.9 9 9 F+F+F+E 8 8 Q+m m o.-+C.7 7 ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#n n q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o @V m.m. +y+y+z+l+l+l+:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.<.[.-.-.Q R R R q r r t u u v x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 {+{+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+, 9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a a m@m@m@5'b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#f f K y.y.y.3~]+]+s~# # M~N~j +&,{(.e#e#H H g D+D+d+d+M+J.J.q=@ @ i e@e@e@!@!@!@s+h h A.A.W$P]X.4&#^z.o(a(g(g(m(m(m(k({.{.{.{.{.{.{.{.{.{.r([/}/}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Y/ (.(.(+(@($(%(&(&(-(;(;(-(-(;()(;(~(~(/(~(~(/(;(~(:(:(<(}(}(}(<(}(}(<(}(}(}(0(0(0(0(0(0(0(c(0(0(h(c(8(j(l(l(c(j(j(l(c(j(j(l(l(l(l(p(p(p(q(l(l(p(p(p(q(q(q(l(l(l(l(l(l(l(l(q(q(q(q(p(p(p(l(l(q(p(p(p(l(l(l(l(j(j(l(l(j(j(c(l(j(8(8(c(0(0(0(c(0(0(0(0(0(0(0(}(}(}(}(}(}(<(}(}(}(/(:(:(~(;(/(~(;(/(~(~(;(;(;(-(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/S/K/K/K/J/z/z/z/p/p/p/b/b/b/8/}/}/[/>/>/=/=/Y^Q^Q^L^v^v^o^. . 9^8^/./.+ z.z.4&4&X.W$W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H H e#(.(.,{j j N~M~# # s~]+]+3~y.y.-~K f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F ,,; ; ; l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.C.C.7 7 ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.)=)={ +=X&w.3 6@6@Z+] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.<.[.-.-.Q R R q q r r t u u w x x y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%o%P%P%~&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - - a a a m@m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#P!f K -~y.y.3~]+]+s~# # M~N~j j ,{(.(.e#H H g D+D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@s+h h A.A.W$P]X.4&4&z.o(a(g(g(m(m(m(k({.{.{.{.{.{.{.{.{.{.1([/}/}/8/b/b/b/p/p/p/z/z/z/J/K/K/K/S/S/S/X/Y/Y/ ( (.(+(@($(%(&(&(-(;(;(;(-(;(;(;(~(~(/(;(~(/(/(~(:(:(/(<(}(}(<(}(}(}(}(}(}(8(0(0(0(0(0(0(c(0(0(0(c(c(8(j(l(l(c(j(j(l(c(j(j(l(l(l(l(p(p(p(q(l(l(l(p(p(p(p(p(q(q(q(q(q(q(q(p(p(p(p(p(l(l(l(p(p(p(p(l(l(l(l(j(j(c(l(j(j(c(l(l(j(8(c(h(0(0(c(0(0(0(c(0(0(0(8(}(}(}(}(}(}(<(}(}(<(/(:(~(~(/(/(~(;(/(~(~(;(;(;(-(;(;(;(=(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/z/p/p/p/b/b/b/8/}/}/[/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^/././.+ z.z.4&4&X.W$W$A.h h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # ]+]+]+3~y.y.-~K f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; ; l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@*@D D D i=~ ~ )+g.g.)=)={ +=X&w.3 6@6@y*] ] y%2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%o%P%P%3&t&t&t&(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . / _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) 7 7 C.C.o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> $+$+l ; ; ; ,,F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f K -~y.y.3~]+]+s~# # # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@s+h h h A.W$W$X.4&4&z.o(a(g(g(g(m(m(k({.{.{.{.{.{.{.{.{.{.1([/}/}/8/b/b/b/p/p/p/z/z/z/z/K/K/K/P/S/S/X/Y/Y/Z/ (.(+(@(@(%(&(&(=(-(;(;(-(;(;(;(~(~(/(;(~(/(/(~(~(:(:(<(}(}(<(}(}(}(<(}(}(}(0(0(0(0(0(0(0(c(0(0(0(c(8(8(j(l(l(c(j(l(l(c(j(j(l(l(l(l(l(p(p(p(q(l(l(l(l(p(p(p(p(p(p(p(p(p(p(p(l(l(l(l(q(p(p(p(l(l(l(l(l(j(j(c(l(j(j(c(l(l(j(8(8(c(0(0(0(c(0(0(0(0(0(0(0(}(}(}(<(}(}(}(}(}(}(<(:(:(~(;(/(~(~(;(/(~(;()(;(;(-(;(;(-(=(&(%($(@(@(+(.( (Z/Y/Y/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/b/8/}/}/[/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^/././.+ z.z.4&X.X.W$W$A.h h h !@!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+]+;+y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&{&J%J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@*@D D D ~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . R&_ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+]>]>> $+$+l ; ; ; 0 F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.Y.Y.x!$ W#P!f f -~y.y.;+]+]+]+# # # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@!@h h h A.W$W$X.X.4&z.o(a(g(g(g(m(m(k({.{.{.{.{.{.{.{.{.{.1([/}/}/}/b/b/b/k/p/p/v/z/z/z/K/K/K/P/S/S/W/X/Y/Z/ (.(.(@(@($(%(&(=(-(;(;(-(-(;()(;(~(~(/(~(~(/(;(~(:(:(<(}(}(}(<(}(}(}(}(}(}(8(0(0(0(c(0(0(0(c(0(0(h(c(8(8(j(l(c(c(j(l(l(c(j(j(l(l(l(l(l(p(p(p(p(q(q(l(l(l(l(l(l(l(l(l(l(l(l(l(q(p(p(p(p(p(l(l(l(l(l(j(j(c(l(l(j(c(c(l(j(8(8(c(h(0(0(c(0(0(0(c(0(0(0(8(}(}(}(}(}(}(<(}(}(<(/(:(:(~(;(/(~(;(/(~(~(;()(;(-(-(;(;(-(&(&(%($(@(+(.(.( (Y/Y/X/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^v^o^. . 9^/././^+ z.z.4&X.X.W$W$A.h h s+!@!@!@J e@e@i @ @ @ J.J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & G '+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)={ { +=X&w.3 6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@=.=.=.<+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+]>]>> > $+l l ; ; 0 F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & & J%J%J%B.{&{&:!e e 5.5.Y.x!$ W#P!f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&#^o(a(f(g(g(m(m(k({.{.{.{.{.{.{.{.{.{.1((/[/}/}/8/b/b/k/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Y/ (.(.(+(@($(%(&(&(-(;(;(-(-(;(;(;(~(~(/(;(~(/(/(~(~(:(/(<(}(}(<(}(}(}(<(}(}(}(0(0(0(0(0(0(0(c(0(0(0(h(c(8(j(l(l(c(j(j(l(l(c(j(j(l(l(l(l(l(l(p(p(p(p(p(p(q(q(q(q(l(q(q(q(q(p(p(p(p(p(p(l(l(l(l(l(l(j(j(c(l(l(j(c(c(l(j(j(8(c(h(0(0(0(c(0(0(0(0(0(0(0(}(}(}(<(}(}(}(<(}(}(<(:(:(~(~(/(/(~(;(/(~(~(;(;(;(-(;(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/S/P/K/K/J/z/z/z/p/p/p/k/b/b/8/}/}/[/(/>/=/=/Y^Y^Q^L^v^v^v^. . . 9^/././^+ z.#^4&X.P]W$W$A.h h s+!@!@!@J e@e@i @ @ q=J.J.J.d+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+3~;+y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@k k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@Z+y*] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.G+H+H+g@=.=.=.~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x y y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=I.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y*_ _ d#} } Q%X X ( | | n.n.r$/ / [@U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+l l ; ; 0 F F T+- - - H,a a -'m@m@= b b k k I@d&d&c '+'+G & & & r+J%J%B.{&{&:!e e 5.5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#e#H g g D+d+d+d+J.J.J.q=@ @ i e@e@J !@!@!@s+h h A.W$W$P]X.4&#^o(7(f(g(g(m(m(k({.{.{.{.{.{.{.{.{.{.1((/[/}/}/8/b/b/b/p/p/p/z/z/z/J/K/K/K/S/S/S/X/Y/Y/ ( (.(+(@($(%(&(&(=(;(;(;(-(;(;()(~(~(/(;(~(~(/(;(~(:(:(<(}(}(}(<(}(}(}(}(}(}(8(0(0(0(c(0(0(0(c(0(0(0(c(8(8(j(l(l(c(j(j(l(l(l(j(j(j(l(l(l(l(l(l(l(p(p(p(p(p(p(p(p(p(p(p(p(p(p(p(l(l(l(l(l(l(l(j(j(j(l(l(j(j(c(c(l(l(j(8(c(c(0(0(0(c(0(0(0(c(0(0(0(8(}(}(}(}(}(}(<(}(}(}(<(:(:(~(;(/(~(~(;(/(~(;()(;(;(-(;(;(-(=(&(&(%(@(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/J/z/z/z/p/p/p/b/b/b/8/}/}/[/>/>/=/=/Y^Q^Q^L^v^v^o^. . 9^8^/./.+ z.z.#^4&X.P]W$W$A.h h s+!@!@!@J e@e@i @ @ q=J.J.M+d+d+d+D+g g H e#e#(.,{+&j j M~# # s~]+]+3~;+y.y.K f f W#W#$ Y.Y.5.e e e :!{&{&B.J%J%r+& & Z=G '+c c d&d&I@k k b 5'= m@m@+'a a H,- - - F F F 0 ; ; l l $+> > ]>^+^+^+&.9 9 5;F+F+F+8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| ( ( X X Q%} } u%_ _ _ [ [ [ : : : c+< < b+K.K.9.r#n v.q.q.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B o o @m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w._ _ u%} } Q%X X ( ( | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; 0 F F F - - - H,a a +'m@m@= 5'b k k I@d&d&c c '+G Z=& & r+J%J%B.{&{&:!e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # M~j j +&,{(.e#e#H g g D+D+d+d+M+J.J.q=@ @ i e@e@e@!@!@!@s+h h A.A.W$P]X.4&#^o(7(a(g(g(m(m(k({.{.{.{.{.{.{.{.{.{.1(>/[/}/}/8/b/b/b/p/p/p/z/z/z/z/K/K/K/P/S/S/X/Y/Y/Z/ (.(+(@(@($(%(&(=(-(;(;(-(-(;()(;(~(~(/(;(~(/(;(~(:(:(/(<(}(}(<(}(}(}(<(}(}(}(0(0(0(0(0(0(0(0(c(0(0(0(c(8(8(j(l(l(c(c(j(j(l(l(c(j(j(l(l(l(l(l(l(l(l(l(l(p(p(p(p(p(p(p(l(l(l(l(l(l(l(l(l(l(j(j(c(l(l(j(j(c(c(l(l(j(8(8(c(0(0(0(c(0(0(0(c(0(0(0(0(}(}(}(<(}(}(}(<(}(}(<(/(:(:(~(/(/(~(;(/(~(~(;(;(;(-(-(;(;(-(&(&(%($(@(@(.(.( (Z/Y/Y/W/S/S/P/K/K/K/z/z/z/v/p/p/p/b/b/b/8/}/}/[/>/>/=/*/Y^Q^Q^K^v^v^o^. . 9^8^/./.+ z.z.4&4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+D+D+g H H e#e#(.,{+&j N~M~# # s~]+]+3~y.y.y.K f f W#$ $ Y.Y.5.e e e {&{&{&B.J%J%r+& & Z=G '+c c d&I@I@k k b 5'= m@m@+'a a H,- - f,F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.n.| ( ( X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o V m.m.m.y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . )=_ _ u%} } Q%X X ( ( | n.n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 F F F f,- - H,a a +'m@m@= 5'b k k I@I@d&c c '+G Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ $ W#f f K y.y.y.3~]+]+s~# # M~N~j +&,{(.(.e#H H g D+D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@s+h h A.A.W$W$X.4&4&o(7(a(g(g(g(m(k({.{.{.{.{.{.{.{.{.{.1(>/[/}/}/}/b/b/b/k/p/p/v/z/z/z/K/K/K/P/S/S/W/X/Y/Y/ (.(.(+(@($(%(&(&(-(;(;(;(-(;(;(;(~(~(/(;(~(/(/(~(~(:(:(<(}(}(}(<(}(}(}(}(}(}(8(0(0(0(0(0(0(0(c(c(0(0(h(c(8(8(j(l(l(c(c(j(j(l(l(c(j(j(j(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(j(j(j(l(l(l(j(j(c(c(l(l(j(8(8(c(0(0(0(c(c(0(0(0(0(0(0(0(8(}(}(}(}(}(}(<(}(}(}(<(:(:(~(~(/(~(~(;(/(~(~(;(;(;(-(;(;(;(-(&(&(%($(@(+(.(.( (Y/Y/X/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/b/}/}/}/[/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^/././.+ z.z.4&4&X.W$W$A.h h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+D+g H H e#(.(.,{+&j N~M~# # s~]+]+3~y.y.-~K f f W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z='+'+c c d&I@I@k b b 5'= m@m@+'a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.n.| ( ( X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q r r s u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w== . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z&_ _ u%} } Q%X X ( ( | | n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 C.C.-+m m m Q+8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&c c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#f f K -~y.y.3~]+]+s~# # M~N~j j ,{(.(.e#H H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@!@h h h A.W$W$X.X.4&o(7(a(g(g(g(m(k({.{.{.{.{.{.{.{.{.{.1(>/(/[/}/}/8/b/b/k/p/p/p/z/z/z/J/K/K/P/S/S/S/X/Y/Y/ ( (.(+(@($(%(&(&(=(-(;(;(-(;(;()(;(~(~(/(;(~(/(;(~(:(:(/(<(}(}(<(}(}(}(<(}(}(}(8(0(0(0(c(0(0(0(c(0(0(0(h(c(8(8(j(j(l(l(c(j(j(j(l(l(c(j(j(j(j(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(j(j(j(j(c(l(l(j(j(j(c(l(l(j(j(8(8(c(h(0(0(0(c(0(0(0(c(0(0(0(8(}(}(}(<(}(}(}(<(}(}(<(/(:(:(~(;(/(~(;(/(~(~(;()(;(;(-(;(;(-(=(&(&(%($(@(+(.( ( (Y/Y/X/S/S/S/P/K/K/J/z/z/z/p/p/p/k/b/b/8/}/}/[/(/>/>/=/Y^Y^Q^L^v^v^v^o^. . 9^/././^+ z.z.4&X.X.W$W$A.h h h !@!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # s~]+]+3~y.y.-~K f P!W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b 5'm@m@m@+'a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.| | ( ( X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+0.0.0.R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s u u v w x y y S T T >.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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P=_ _ u%} } } X X X ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&{ { )=g.g.g.)+~ ~ i=D D t=*@*@O=P=6 {+{+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.5.Y.x!$ W#P!f f -~y.y.;+]+]+]+s~# # N~j j +&(.(.e#0{H g g D+d+d+d+J.J.J.q=@ @ i e@e@J !@!@!@s+h h A.W$W$P]X.4&n(7(7(a(g(g(m(k({.{.{.{.{.{.{.{.{.{.1(>/>/[/}/}/8/b/b/b/p/p/p/v/z/z/z/K/K/K/P/S/S/W/X/Y/Y/ (.(.(+(@($(%(&(&(-(;(;(;(-(;(;()(;(~(~(;(~(~(/(;(~(:(:(/(<(}(}(<(<(}(}(}(}(}(}(8(0(0(0(0(0(0(0(0(c(0(0(0(h(c(c(8(8(j(l(l(l(c(j(j(j(l(l(l(l(c(c(j(j(j(j(j(j(j(j(j(j(j(j(j(c(c(l(l(l(l(j(j(j(c(l(l(l(j(8(8(c(c(h(0(0(0(c(0(0(0(0(0(0(0(0(8(}(}(}(}(}(}(<(<(}(}(<(/(:(:(~(;(/(~(~(;(~(~(;()(;(;(-(;(;(;(-(&(&(%($(@(+(.(.( (Y/Y/X/W/S/S/P/K/K/K/z/z/z/v/p/p/p/b/b/b/8/}/}/[/>/>/=/*/Y^Q^Q^L^v^v^o^. . 9^8^/./.+ z.z.#^4&X.P]W$W$A.h h s+!@!@!@J e@e@i @ @ q=J.J.J.d+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+]+;+y.y.K f f P!W#$ x!Y.5.5.e e :!{&{&{&J%J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+I.9 9 9 F+F+F+E 8 8 Q+m m o.-+C.7 7 ) P.P.{+{+6 P=O=*@*@t=D D i=~ ~ )+g.g.g.)={ { X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } _ _ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=5.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . #=_ _ _ } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.C.o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> $+$+l ; ; ; 0 F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & & J%J%J%B.{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#e#H g g D+d+d+d+M+J.J.q=@ @ i e@e@e@!@!@!@s+h h A.A.W$P]X.4&A.7(7(a(g(g(m(k({.{.{.{.{.{.{.{.{.{.1(>/>/[/}/}/}/8/b/b/k/p/p/p/z/z/z/J/K/K/P/S/S/S/X/Y/Y/ ( (.(+(@(@($(&(&(=(-(;(;(-(-(;(;(;(~(~(/(;(~(/(/(~(~(:(:(<(<(}(}(<(}(}(}(<(}(}(}(8(0(0(0(0(0(0(0(0(c(0(0(0(0(c(c(8(8(j(j(l(l(c(c(j(j(j(j(l(l(l(l(l(l(l(c(c(c(c(c(l(l(l(l(l(l(l(j(j(j(j(c(c(l(l(j(j(8(8(c(c(0(0(0(0(c(0(0(0(0(0(0(0(0(8(}(}(}(<(}(}(}(<(}(}(<(<(:(:(~(~(/(/(~(;(/(~(~(;(;(;(-(-(;(;(-(=(&(&($(@(@(+(.( ( (Y/Y/X/S/S/S/P/K/K/J/z/z/z/p/p/p/k/b/b/8/}/}/}/[/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^8^/./.+ z.z.4&4&X.P]W$A.A.h h s+!@!@!@e@e@e@i @ @ q=J.J.M+d+d+d+D+g g H e#e#(.(.+&j j N~# # s~]+]+3~;+y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; ; l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.C.C.7 7 ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 _ _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D D *@*@*@P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+]>]>> > $+l l ; ; 0 F F T+- - - H,a a -'m@m@= b b k k I@d&d&c '+'+G Z=& & r+J%J%B.{&{&:!e e e 5.Y.Y.$ W#W#f f K y.y.y.3~]+]+s~# # M~N~j +&,{(.e#e#H H g D+D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@s+h h h A.W$W$X.X.A.7(7(a(g(g(g(k({.{.{.{.{.{.{.{.{.{.1(>/>/(/[/}/}/8/b/b/b/p/p/p/z/z/z/z/K/K/K/P/S/S/W/Y/Y/Z/ (.(.(+(@($(%(&(&(-(;(;(;(-(;(;()(;(~(~(/(;(~(/(/(~(~(:(:(<(}(}(}(<(}(}(}(<(}(}(}(8(0(0(0(0(0(0(0(0(c(0(0(0(0(h(c(8(8(8(j(l(l(l(l(c(c(j(j(j(j(j(l(l(l(l(l(l(l(l(l(l(l(j(j(j(j(j(c(c(c(l(l(l(j(8(8(8(c(h(0(0(0(0(c(0(0(0(0(0(0(0(0(8(}(}(}(<(}(}(}(<(}(}(}(<(:(:(~(~(;(/(~(~(;(/(~(;()(;(;(-(;(;(;(-(&(&(%($(@(+(.(.( (Z/Y/Y/X/S/S/P/K/K/K/z/z/z/z/p/p/p/b/b/b/8/}/}/[/(/>/>/=/Y^Y^Q^L^v^v^v^o^. . 9^/././.+ z.z.4&4&X.W$W$A.h h h s+!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+D+D+g H H e#e#(.,{+&j N~M~# # s~]+]+3~;+y.y.K f f W#W#$ Y.Y.5.5.e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@k k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@D D D i=~ ~ )+g.g.)=)={ +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#8$q$q$&%6%o%P%P%3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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E _ _ _ d#} } Q%X X ( | | n.n.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 F F F f,- - H,a a +'m@m@= 5'b b k I@I@d&c c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#P!f K -~y.y.3~]+]+s~# # # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$P]X.A.5(7(7(a(g(g(i({.{.{.{.{.{.{.{.{.{.1(=/>/>/[/}/}/}/8/b/b/k/p/p/p/z/z/z/J/K/K/K/S/S/S/X/Y/Y/Z/ (.(+(@(@($(%(&(&(-(;(;(;(-(;(;()(;(~(~(/(;(~(/(/(~(~(:(:(<(}(}(}(<(}(}(}(}(}(}(}(}(0(0(0(0(0(0(0(0(0(c(c(0(0(0(0(h(c(c(8(8(8(j(j(l(l(l(l(l(c(c(c(c(c(c(c(c(c(c(c(c(c(l(l(l(l(l(j(j(8(8(8(8(c(h(0(0(0(0(c(c(0(0(0(0(0(0(0(0(0(}(}(}(}(}(}(}(}(<(}(}(}(<(:(:(~(~(/(/(~(;(/(~(~(;()(;(;(-(;(;(;(-(&(&(%($(@(@(+(.( (Z/Y/Y/X/S/S/S/P/K/K/J/z/z/z/v/p/p/k/b/b/b/}/}/}/[/>/>/=/*/Y^Q^Q^K^v^v^o^. . 9^8^/././^z.z.#^4&X.P]W$W$A.h h s+!@!@!@J e@e@i @ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # s~]+]+3~y.y.-~K f f W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+c c d&I@I@k k b 5'= m@m@+'a a H,- - f,F F F 0 ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=M+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.j+_ _ u%} } Q%X X ( ( | n.n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=6 6 {+{+P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - - a a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&,{(.e#e#H g g D+D+d+d+M+J.J.q=@ @ @ e@e@e@7.!@!@s+h h h A.W$W$X.o/+/7(7(a(f(g(d({.{.{.{.{.{.{.{.{.{.1(=/=/>/>/[/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/P/S/S/S/X/Y/Y/Z/ (.(+(@(@($(%(&(&(-(;(;(;(-(;(;()(;(~(~(/(;(~(/(/(;(~(:(:(/(<(}(}(}(<(}(}(}(<(}(}(}(}(0(0(0(0(0(c(0(0(0(0(c(c(0(0(0(0(0(h(c(c(8(8(8(8(8(j(j(j(j(j(j(l(l(l(j(j(j(j(j(j(j(8(8(8(8(c(c(h(h(0(0(0(0(c(c(0(0(0(0(c(0(0(0(0(0(}(}(}(}(<(}(}(}(<(}(}(}(<(/(:(:(~(~(/(/(~(;(/(~(~(;()(;(;(-(;(;(;(-(&(&(%($(@(@(+(.( ( (Y/Y/X/S/S/S/P/K/K/K/z/z/z/v/p/p/p/b/b/b/8/}/}/[/(/>/=/=/Y^Y^Q^L^v^v^v^o^. . 9^/././.+ z.z.4&4&X.W$W$A.A.h h s+!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+D+D+g g H e#e#(.(.+&j j N~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@m@a a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@=.=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.<.[.-.-.Q R R q q r r t u u v x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $+j+_ _ u%} } Q%X X ( ( | | n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@O=P=6 {+{+P.) ) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>]>> $+$+l ; ; ; 0 F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+G & & & r+J%J%B.{&{&:!e e 5.5.Y.Y.$ W#W#f f K y.y.y.3~]+]+s~# # M~N~j +&,{(.(.e#H H g D+D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@!@s+h h A.W$W$X.o/+/5(7(7(f(g(d({.{.{.{.{.{.{.{.{.{.1(*/=/>/>/[/}/}/}/8/b/b/k/p/p/p/z/z/z/J/K/K/K/P/S/S/W/X/Y/Z/ (.(.(+(@($(%(&(&(=(-(;(;(-(-(;(;(;(~(~(/(;(;(~(/(/(~(~(:(:(/(<(}(}(}(<(}(}(}(<(}(}(}(}(0(0(0(0(0(c(0(0(0(0(0(c(c(0(0(0(0(0(h(c(c(c(8(8(8(8(8(8(8(8(8(8(8(8(8(8(8(8(8(8(8(c(c(c(h(0(0(0(0(0(c(c(0(0(0(0(0(c(0(0(0(0(0(}(}(}(}(<(}(}(}(<(<(}(}(<(<(:(:(~(~(/(/(~(~(;(/(~(~(;(;(;(-(-(;(;(-(=(&(&(%($(@(+(.(.( (Z/Y/Y/X/S/S/P/K/K/K/J/z/z/z/p/p/p/k/b/b/b/}/}/}/[/>/>/=/*/Y^Q^Q^L^v^v^o^. . . 8^/././^+ z.#^4&X.X.W$W$A.h h h !@!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+D+g H H e#e#(.,{+&j j M~# # s~]+]+3~;+y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+I.9 9 9 , F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.n.| ( ( X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.9.r#n v.q.q.G+H+H+g@=.=.=.~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F j+_ _ u%} } Q%X X X ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+]>]>> $+$+l l ; ; 0 F F T+- - - H,a a -'m@m@= b b k k I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ $ W#f f K -~y.y.3~]+]+s~# # M~N~j j +&(.(.e#0{H g g D+d+d+M+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.A.W$P]o/+/+/7(7(a(g(d({.{.{.{.{.{.{.{.{.{.1(Y^=/>/>/(/[/}/}/8/b/b/b/p/p/p/v/z/z/z/K/K/K/P/S/S/S/X/Y/Y/ ( (.(+(@(@($(%(&(&(-(;(;(;(-(;(;()(;(~(~(/(;(~(~(/(;(~(~(:(:(<(<(}(}(<(<(}(}(}(<(}(}(}(}(8(0(0(0(0(0(0(0(0(0(0(0(c(c(0(0(0(0(0(0(h(c(c(c(c(c(8(8(8(8(8(8(8(8(8(c(c(c(c(c(h(0(0(0(0(0(0(0(c(c(0(0(0(0(0(0(0(0(0(0(0(}(}(}(}(<(}(}(}(<(<(}(}(}(<(:(:(:(~(;(/(~(~(;(/(~(~(;()(;(;(-(;(;(;(-(&(&(%($(@(@(+(.( ( (Y/Y/X/W/S/S/P/K/K/K/z/z/z/z/p/p/p/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^8^/./.+ z.z.#^4&X.P]W$W$A.h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+D+g g H H e#(.(.,{+&j N~M~# # s~]+]+3~y.y.y.K f f W#W#$ Y.Y.5.e e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; ; l $+$+> ]>]>^+^+I.9 9 9 F+F+F+E 8 8 Q+m m o.-+C.7 7 ) P.P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.| | ( ( X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B o o @m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=(*. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @@j+_ _ _ } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ i=D D D *@*@*@P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+l l ; ; 0 F F F - - - H,a a +'m@m@= 5'b k k I@I@d&c c '+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#P!f K -~y.y.3~]+]+]+# # # N~j j +&(.(.e#0{H g g D+d+d+d+M+J.J.q=@ @ i e@e@e@7.!@!@s+h h A.A.W$W$o/+/+/7(7(a(f(d({.{.{.{.{.{.{.{.{.{.1(Y^=/=/>/>/[/}/}/8/b/b/b/k/p/p/v/z/z/z/J/K/K/K/P/S/S/W/Y/Y/Z/ (.(.(+(@($(%(&(&(=(-(;(;(-(-(;(;()(;(~(~(/(;(~(~(/(;(~(:(:(:(<(}(}(}(<(<(}(}(}(<(}(}(}(}(8(0(0(0(0(0(c(0(0(0(0(0(0(c(c(0(0(0(0(0(0(0(0(h(h(h(c(c(c(c(c(c(c(h(h(h(0(0(0(0(0(0(0(0(c(c(c(0(0(0(0(0(c(0(0(0(0(0(8(}(}(}(}(<(}(}(}(}(<(}(}(}(<(:(:(:(~(;(/(/(~(;(/(~(~(~(;(;(;(-(-(;(;(-(=(&(&(%($(@(+(.(.( (Z/Y/Y/X/S/S/S/P/K/K/J/z/z/z/v/p/p/p/b/b/b/8/}/}/[/(/>/=/=/Y^Y^Q^L^v^v^v^o^. . 9^/././.+ z.z.4&4&X.P]W$A.A.h h s+!@!@!@J e@e@i @ @ q=J.J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # s~]+]+3~y.y.-~K f f W#$ $ Y.Y.5.e e e {&{&{&B.J%J%r+& & Z=G '+c c d&d&I@k k b 5'= m@m@+'a a H,- - - T+F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ )+g.g.g.)={ { X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ R&U+U+1 / / r$r$n.| | ( X X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x y y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Y+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&[ _ _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*6@6@3 w.X&+={ )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; 0 F F F f,- - H,a a +'m@m@m@5'b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#e#H g g D+D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@!@h h h A.W$W$o/|(+/5(7(a(f(d({.{.{.{.{.{.{.{.{.{.1(Y^*/=/>/>/(/}/}/}/8/b/b/b/p/p/p/z/z/z/z/K/K/K/P/S/S/S/X/Y/Y/ ( (.(+(@(@($(%(&(&(-(;(;(;(-(-(;(;(;(~(~(/(/(;(~(/(/(;(~(:(:(:(<(}(}(}(<(<(}(}(}(}(}(}(}(}(8(0(0(0(0(0(0(c(0(0(0(0(0(0(c(c(c(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(c(c(c(0(0(0(0(0(0(c(0(0(0(0(0(0(8(}(}(}(}(<(}(}(}(}(<(}(}(}(<(/(:(:(~(~(/(/(~(~(;(/(~(~(;(;(;(;(-(;(;(;(-(&(&(%($(@(@(+(.( ( (Y/Y/X/W/S/S/P/K/K/K/z/z/z/z/p/p/p/k/b/b/8/}/}/}/[/>/>/=/*/Y^Q^Q^L^v^v^o^. . . 9^/././^+ z.z.4&X.X.W$W$A.h h h s+!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+]+3~y.y.-~K f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c c d&I@I@k k b 5'= m@m@+'a a H,- - - F F F 0 ; ; l l $+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=d.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3_[ _ _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a a m@m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.;+3~]+]+s~# # M~N~j +&,{(.(.e#H H g g D+d+d+M+J.J.E+@ @ @ e@e@e@J !@!@!@s+h h A.W$W$e(|(+/5(7(7(a(d({.{.{.{.{.{.{.{.{.{.1(Y^Y^=/=/>/(/[/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/K/P/S/S/W/Y/Y/Z/ (.(.(+(@($(%(%(&(&(-(;(;(;(-(;(;()(;(~(~(/(;(~(~(/(/(~(~(:(:(/(<(}(}(}(<(<(}(}(}(}(}(}(}(}(}(8(0(0(0(0(0(0(c(0(0(0(0(0(0(0(c(c(c(c(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(c(c(c(0(0(0(0(0(0(0(0(c(0(0(0(0(0(0(}(}(}(}(}(<(}(}(}(}(<(}(}(}(<(/(:(:(~(~(/(/(~(~(;(/(~(~(;()(;(;(-(;(;(;(-(=(&(&(%($(@(+(.(.( (Z/Y/Y/X/S/S/S/P/K/K/K/z/z/z/v/p/p/p/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^8^/./.+ z.z.#^4&X.P]W$W$A.h h s+!@!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+D+g H H e#e#(.,{+&j j N~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b 5'm@m@m@+'a a H,- - f,F F F 0 ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=k.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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(.[ _ _ _ d#} } Q%X X ( | | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+, 9 9 9 I.^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+G & & & r+J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#f f K y.y.y.3~]+]+s~# # M~N~j j +&(.(.e#0{H g g D+d+d+M+J.J.J.q=@ @ i e@e@J !@!@!@s+h h A.A.W$s+|(+/+/7(7(a(b({.{.{.{.{.{.{.{.{.{.1(Q^Y^*/=/>/>/[/}/}/}/8/b/b/k/p/p/p/z/z/z/z/K/K/K/P/S/S/S/X/Y/Y/Z/ (.(.(+(@($(%(&(&(=(-(;(;(-(-(;(;()(;(~(~(/(;(~(~(/(/(~(~(:(:(/(<(}(}(}(<(<(}(}(}(}(<(}(}(}(}(8(0(0(0(0(0(0(0(c(0(0(0(0(0(0(0(0(0(c(c(c(c(c(c(c(c(c(c(c(c(c(c(c(0(0(0(0(0(0(0(0(0(c(0(0(0(0(0(0(0(8(}(}(}(}(}(}(}(}(}(<(<(}(}(}(<(/(:(:(~(~(;(/(~(~(;(/(~(~(;(;(;(;(-(-(;(;(-(-(&(&(%($(@(@(+(.( ( (Y/Y/X/W/S/S/P/K/K/K/J/z/z/z/p/p/p/k/b/b/b/8/}/}/[/>/>/=/=/Y^Y^Q^L^v^v^v^o^. . 9^/././.+ z.z.4&4&X.P]W$A.A.h h s+!@!@!@J e@e@i @ @ @ E+J.J.M+d+d+D+g g H H e#(.(.,{+&j N~M~# # s~]+]+3~;+y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&B.J%J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@m@a a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.;.Q R R q r r t u u v w x y y S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ [ _ _ _ u%} } Q%X X ( ( | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 {+{+P.) ) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>]>> $+$+l l ; ; 0 F F T+- - - H,a a -'m@m@= b b k k I@d&d&c c '+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#P!f K -~y.y.3~]+]+]+# # # N~j j +&(.(.e#0{H g g D+d+d+d+M+J.J.q=@ @ @ e@e@e@7.!@!@s+h h h A.W$s+|(|(+/5(7(a(b({.{.{.{.{.{.{.{.{.{.1(Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/K/P/S/S/W/X/Y/Y/ ( (.(+(@(@($(%(&(&(-(;(;(;(-(-(;(;(;(;(~(~(/(;(~(~(/(/(~(~(:(:(/(<(}(}(}(}(<(}(}(}(}(<(}(}(}(}(}(8(0(0(0(0(0(0(0(c(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(c(0(0(0(0(0(0(0(8(}(}(}(}(}(<(}(}(}(}(<(<(}(}(}(<(/(:(:(~(~(;(/(~(~(;(/(~(~(~(;(;(;(;(-(;(;(;(-(&(&(&(%($(@(+(.(.( (Z/Y/Y/X/S/S/S/P/K/K/K/z/z/z/v/p/p/p/b/b/b/8/}/}/}/[/>/>/=/*/Y^Q^Q^L^v^v^o^. . . 9^/././^+ z.z.4&X.X.W$W$A.A.h h s+!@!@!@e@e@e@i @ @ q=J.J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # s~]+]+3~y.y.y.K f f W#$ $ Y.Y.5.e e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=b+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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Z+[ _ _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+m m m Q+8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a -'m@m@= b b k k I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#P!f K -~y.y.3~]+]+]+s~# # N~j j +&(.(.e#e#H g g D+D+d+d+M+J.J.E+@ @ @ e@e@e@J !@!@!@s+h h A.s+'([(|(+/+/7(3({.{.{.{.{.{.{.{.{.{.1(L^Q^Q^Y^*/=/>/>/(/}/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/K/P/S/S/W/X/Y/Y/ ( (.(.(+(@($(%(&(&(&(-(;(;(;(-(-(;(;()(;(~(~(/(;(;(~(~(/(;(~(~(:(:(:(/(<(}(}(}(}(<(}(}(}(}(}(}(<(}(}(}(}(}(}(}(8(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(8(}(}(}(}(}(}(}(<(}(}(}(}(}(}(<(}(}(}(}(<(<(:(:(:(~(~(;(/(/(~(~(;(/(~(~(;(;(;(;(;(-(;(;(;(-(=(&(&(%($(@(@(+(.( ( (Y/Y/X/W/S/S/S/P/K/K/K/z/z/z/z/p/p/p/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^v^v^v^o^. . 9^8^/./.+ z.z.#^4&X.P]W$W$A.h h h !@!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+d+D+g g H 0{e#(.(.+&j j N~# # # s~]+]+3~y.y.y.K f f W#W#$ Y.Y.5.5.e e :!{&{&B.J%J%J%& & & Z='+'+c d&d&I@I@k b b = m@m@m@a a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@*@D D D i=~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( X X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.Q R R q q r r t u u w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 [ j+_ _ u%} } Q%X X ( ( | | n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a a m@m@m@= b b k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#f f K -~y.y.3~]+]+]+# # # N~j j +&(.(.e#e#H g g D+D+d+d+M+J.J.E+@ @ @ e@e@e@J !@!@!@s+h h 2('('('(|(+/+/3({.{.{.{.{.{.{.{.{.{.1(v^K^L^Q^Y^Y^=/=/>/(/[/}/}/8/b/b/b/k/p/p/p/z/z/z/z/J/K/K/K/P/S/S/W/X/Y/Y/Z/ (.(.(+(@($($(%(&(&(=(-(;(;(;(-(;(;(;(;(;(~(~(/(/(;(~(~(/(/(;(~(~(:(:(:(/(<(}(}(}(}(}(<(<(}(}(}(}(}(}(}(<(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(}(}(}(}(}(}(}(<(<(}(}(}(}(}(<(<(:(:(:(~(~(~(/(/(~(~(;(;(/(~(~(~(;()(;(;(-(-(;(;(;(-(&(&(&(%($(@(@(+(.( ( (Y/Y/Y/X/S/S/S/P/K/K/K/z/z/z/z/p/p/p/k/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . 9^/././.+ z.z.#^4&X.P]W$W$A.h h s+!@!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+d+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~y.y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c c d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.7 7 ) ) P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%o%P%P%~&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F [ j+_ _ u%} } Q%X X X ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f f -~y.y.;+3~]+]+s~# # M~j j +&,{(.(.e#H H g g D+d+d+M+J.J.J.q=@ @ i e@e@e@7.!@!@s+h h 7.'('('(|(|(+/e^{.{.{.{.{.{.{.{.{.{.1(v^v^L^Q^Q^Y^*/=/>/>/[/}/}/}/8/b/b/b/p/p/p/p/z/z/z/z/K/K/K/P/S/S/S/X/X/Y/Y/ ( (.(+(+(@($(%(%(&(&(-(-(;(;(;(-(;(;(;(;(;(~(~(/(/(;(~(~(/(/(;(~(~(:(:(:(:(<(<(}(}(}(}(}(<(<(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(<(<(/(:(:(:(~(~(;(/(/(~(~(;(;(/(~(~(~(;()(;(;(-(-(;(;(;(-(=(&(&(%($(@(@(+(.(.( (Z/Y/Y/X/S/S/S/P/K/K/K/J/z/z/z/v/p/p/p/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . 9^8^/././^+ z.z.4&4&X.W$W$A.A.h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+D+D+g g H e#e#(.(.+&j j N~# # # s~]+]+3~y.y.-~K f f W#$ $ Y.Y.5.e e e :!{&{&B.J%J%J%& & & Z='+'+c d&d&I@I@k b b 5'm@m@m@+'a a H,- - f,F F F 0 ; ; l l $+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.;.Q R R q r r s u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . k [ j+_ _ _ } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+m m m Q+8 8 E F+F+, 9 9 9 I.^+^+]>]>> $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@= 5'b k k I@I@d&c c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.y.3~]+]+s~# # M~N~j j +&(.(.e#0{H g g D+d+d+d+M+J.J.q=@ @ @ e@e@e@7.!@!@!@s+h 7.'('('([(|(+/e^{.{.{.{.{.{.{.{.{.{.{(v^v^K^L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/K/P/S/S/S/X/Y/Y/Z/ ( (.(+(@(@($(%(&(&(&(-(;(;(;(;(-(;(;(;()(;(~(~(~(/(;(~(~(/(/(/(~(~(~(:(:(:(/(<(<(}(}(}(}(}(<(<(<(}(}(}(}(}(}(}(}(}(}(}(<(<(<(<(}(}(}(}(}(<(<(<(<(<(}(}(}(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(<(<(/(:(:(:(:(~(~(;(/(/(~(~(;(;(/(~(~(~(;()(;(;(-(-(;(;(;(-(=(&(&(%($(@(@(+(.(.( (Z/Y/Y/X/W/S/S/P/P/K/K/K/z/z/z/z/p/p/p/k/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . 9^/././.+ z.z.#^4&X.X.W$W$A.h h h s+!@!@!@e@e@e@i @ @ @ J.J.J.M+d+d+D+g g H H e#e#(.,{+&j j N~# # s~]+]+]+;+y.y.-~K f P!W#$ $ Y.Y.5.e e e {&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.n.| ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w='@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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B.[ [ _ _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.) ) 7 7 C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> > $+l l ; ; 0 F F F - - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+Z=& & .,J%J%J%B.{&{&:!e e 5.5.Y.Y.$ $ W#f f K -~y.y.3~]+]+]+# # # N~j j +&(.(.e#e#H g g D+D+d+d+M+J.J.E+@ @ @ i e@e@J !@!@!@s+h 7.'('('('(|(|(e^{.{.{.{.{.{.{.{.{.{.{(v^v^v^L^Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/k/p/p/p/z/z/z/z/K/K/K/K/P/S/S/W/X/Y/Y/Z/ (.(.(+(@(@($(%(&(&(&(-(;(;(;(-(-(;(;(;()(;(~(~(~(/(;(;(~(~(/(/(;(~(~(:(:(:(:(/(<(<(}(}(}(}(}(}(<(<(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(<(<(}(}(}(}(}(<(<(/(:(:(:(:(~(~(;(/(/(/(~(~(;(/(/(~(~(;(;(;(;(;(-(-(;(;(;(-(=(&(&(%($($(@(+(.(.( ( (Y/Y/X/X/S/S/S/P/K/K/K/J/z/z/z/v/p/p/p/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . . 9^/././^+ z.z.4&4&X.P]W$W$A.h h s+!@!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+d+D+g g H 0{e#(.(.,{j j N~M~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+c c d&d&I@k k b b = m@m@-'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( X X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@=.=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+z+l+l+l+:.:.:.#+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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(.[ [ _ _ _ u%} } Q%X X ( ( | n.n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a -'m@m@= b b k k I@d&d&c c '+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K y.y.;+3~]+]+s~# # M~N~j j +&(.(.e#0{H g g D+d+d+d+M+J.J.E+@ @ @ e@e@e@J !@!@!@s+7.'('('('('(|(e^{.{.{.{.{.{.{.{.{.{.{(o^v^v^v^L^Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/k/p/p/p/v/z/z/z/J/K/K/K/P/S/S/S/X/Y/Y/Y/ ( (.(.(+(@(@($(%(&(&(&(-(;(;(;(;(-(-(;(;()(;(~(~(~(/(/(;(~(~(~(/(/(;(~(~(~(:(:(:(:(/(<(<(<(}(}(}(}(}(}(}(}(<(<(<(<(<(<(}(}(}(}(}(}(}(}(}(<(<(<(<(<(<(}(}(}(}(}(}(}(}(}(<(<(/(:(:(:(:(~(~(~(;(/(/(/(~(~(;(;(/(~(~(~(;()(;(;(;(-(-(;(;(;(-(=(&(&(%(%($(@(@(+(.( ( (Z/Y/Y/X/W/S/S/P/K/K/K/K/z/z/z/z/p/p/p/p/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . . 9^/././.+ z.z.4&4&X.P]W$W$A.h h h s+!@!@7.e@e@e@i @ @ q=J.J.J.M+d+d+D+g g H H e#e#(.,{+&j j N~# # s~]+]+]+3~y.y.-~K f P!W#$ $ Y.Y.5.e e e :!{&{&B.J%J%J%& & & Z='+'+c d&d&I@I@k b b 5'm@m@m@+'a a H,- - f,F F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.Q R R q q r r t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4@[ [ j+_ _ u%} } } X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> > $+l l ; ; 0 F F F f,- - H,a a +'m@m@m@5'b b k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#P!f K -~y.y.;+3~]+]+s~# # M~N~j +&,{(.(.e#0{H g g D+d+d+d+M+J.J.q=@ @ @ e@e@e@7.!@!@!@u^'('('('('('(e^{.{.{.{.{.{.{.{.{.{.{(. o^v^v^v^L^Q^Q^Y^*/=/>/>/(/[/}/}/8/8/b/b/b/p/p/p/v/z/z/z/z/K/K/K/P/P/S/S/W/X/Y/Y/Z/ ( (.(.(+(@(@($(%(&(&(&(-(-(;(;(;(-(-(;(;(;()(;(~(~(~(/(/(;(;(~(~(/(/(/(;(~(~(~(:(:(:(:(:(:(/(<(<(<(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(<(<(/(/(:(:(:(:(:(~(~(~(;(/(/(/(~(~(~(;(;(/(~(~(~(;(;()(;(;(;(-(-(;(;(;(-(=(&(&(%(%($(@(@(+(.(.( ( (Y/Y/X/X/S/S/S/P/K/K/K/J/z/z/z/z/p/p/p/k/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . . 9^/././.+ z.z.#^4&X.P]W$W$A.h h h s+!@!@!@e@e@e@i @ @ @ E+J.J.M+d+d+D+D+g g H e#e#(.(.+&j j N~# # # s~]+]+3~y.y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%.,& & Z=G '+c c d&d&I@k k b b = m@m@-'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x y y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=`.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 [ [ _ _ _ d#} } Q%X X ( | | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a -'m@m@= 5'b k k I@I@d&c c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.3~]+]+]+s~# # N~j j +&,{(.e#e#H H g g D+d+d+M+J.J.J.q=@ @ @ e@e@e@7.!@!@((>('('('('('(e^{.{.{.{.{.{.{.{.{.{.{(. . o^v^v^v^L^Q^Q^Y^*/=/=/>/>/[/}/}/}/8/b/b/b/k/p/p/p/z/z/z/z/J/K/K/K/P/S/S/S/W/X/Y/Y/Z/ ( (.(+(+(@(@($(%(&(&(&(-(-(;(;(;(-(-(-(;(;(;(;(;(~(~(~(/(/(;(;(~(~(~(/(/(/(/(;(~(~(~(~(:(:(:(:(:(:(:(:(/(/(/(/(<(<(<(<(<(<(<(<(<(<(/(/(/(:(:(:(:(:(:(:(:(~(~(~(~(~(;(/(/(/(~(~(~(;(;(/(/(~(~(~(;(;()(;(;(;(-(-(;(;(;(;(-(=(&(&(%(%($(@(@(+(.(.( ( (Y/Y/Y/X/S/S/S/P/K/K/K/K/z/z/z/z/v/p/p/p/k/b/b/b/8/}/}/[/(/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . . 9^/././.+ z.z.#^4&X.X.W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+d+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - f,F F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 9 F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( X X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.;.Q R R q r r t u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *@[ [ _ _ _ d#} } Q%X X ( ( | n.n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+, 9 9 9 I.^+^+]>]>> $+$+l l ; ; 0 F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+Z=& & & J%J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#P!f f -~y.y.;+3~]+]+s~# # M~N~j j ,{(.(.e#0{H g g D+d+d+d+M+J.J.E+@ @ @ e@e@e@J !@!@((>('('('('('(e^{.{.{.{.{.{.{.{.{.{.{(. . . o^v^v^K^L^Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/b/p/p/p/p/z/z/z/z/K/K/K/K/P/S/S/S/W/X/Y/Y/Z/ ( (.(+(+(@(@($(%(&(&(&(=(-(;(;(;(;(-(-(;(;(;()(;(;(~(~(~(/(/(;(;(~(~(~(~(/(/(/(;(;(~(~(~(~(~(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(:(~(~(~(~(~(;(/(/(/(/(~(~(~(;(;(/(/(~(~(~(~(;(;(;(;(;(;(-(-(;(;(;(-(-(=(&(&(%(%($(@(@(+(.(.( ( (Y/Y/Y/X/W/S/S/S/P/K/K/K/J/z/z/z/z/p/p/p/k/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^Q^L^v^v^v^o^. . 9^8^/././^+ z.z.4&4&X.P]W$A.A.h h s+!@!@!@7.e@e@e@i @ @ q=J.J.J.M+d+d+D+D+g H H e#e#(.(.+&j j N~# # # s~]+]+3~y.y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%r+& & Z=G '+c c d&d&I@I@k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.{+{+6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5;[ [ j+_ _ u%} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> > $+l l ; ; 0 F F F f,- - H,a a a m@m@m@= b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+s~# # # N~j j +&(.(.e#e#H H g D+D+d+d+M+J.J.J.q=@ @ i e@e@e@7.!@((r]>('('('('(e^{.{.{.{.{.{.{.{.{.{.{(9^. . . o^v^v^K^L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/k/p/p/p/v/z/z/z/z/K/K/K/K/P/S/S/S/X/X/Y/Y/Z/ ( (.(+(+(@(@($(%(&(&(&(=(-(;(;(;(;(-(-(;(;(;(;()(;(~(~(~(~(/(/(;(;(;(~(~(~(/(/(/(/(/(;(~(~(~(~(~(~(~(~(:(:(:(:(:(:(:(:(:(:(:(:(:(:(~(~(~(~(~(~(~(;(;(/(/(/(/(~(~(~(~(;(;(/(/(~(~(~(~(;(;()(;(;(;(-(-(;(;(;(;(-(-(&(&(&(%(%($(@(@(+(.(.( ( (Y/Y/Y/X/W/S/S/S/P/K/K/K/J/z/z/z/z/p/p/p/p/b/b/b/8/}/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . . 9^/././.+ z.z.#^4&X.X.W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+d+D+g g H 0{e#(.(.,{+&j j M~# # s~]+]+]+;+y.y.-~K f f W#$ $ Y.Y.5.5.e e :!{&{&{&J%J%J%.,& & Z='+'+c c d&I@I@k k b 5'= m@m@-'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.[ [ [ _ _ _ u%} } Q%X X ( ( | n.n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; 0 ,,F F f,- - - a a a -'m@m@= b b k k I@d&d&c c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f K -~y.y.;+3~]+]+s~# # M~N~j j +&(.(.e#0{H g g D+D+d+d+M+J.J.E+@ @ @ i e@e@e@](r]r]r]>('('(^({.{.{.{.{.{.{.{.{.{.{(/./.9^. . . o^v^v^v^L^Q^Q^Y^*/=/>/>/>/[/}/}/}/8/b/b/b/b/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/X/X/Y/Y/Z/ ( (.(.(+(@(@(@($(%(%(&(&(&(=(-(;(;(;(;(;(-(-(;(;(;(;()()(;(;(~(~(~(~(~(/(/(/(/(;(;(;(;(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(;(;(;(;(;(/(/(/(~(~(~(~(~(~(;(;()(;(;(;(;(-(-(-(;(;(;(;(-(-(=(&(&(&(%(%($(@(@(+(+(.(.( ( (Y/Y/Y/X/W/S/S/S/P/K/K/K/K/z/z/z/z/z/p/p/p/p/b/b/b/b/8/}/}/[/(/>/>/=/=/Y^Y^Q^L^L^v^v^v^o^. . 9^8^/././^+ z.z.4&4&X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+g g H H e#e#(.(.+&j j N~# # # s~]+]+3~y.y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@`+=.=.<+~+~+1+W.W.>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.;.Q R R q r r s u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=[ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &[ [ j+_ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+d+J.J.J.q=@ @ @ e@e@e@B]r]r]r]>('('(,({.{.{.{.{.{.{.{.{.{.{(/./.8^9^. . . o^v^v^K^L^Q^Y^Y^*/=/>/>/(/[/}/}/}/8/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/X/X/Y/Y/Z/ ( (.(.(+(+(@(@($(%(%(&(&(&(=(-(-(;(;(;(;(-(-(-(;(;(;(;(;()(;(;(;(~(~(~(~(~(~(/(/(/(/(/(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(/(/(/(/(~(~(~(~(~(~(~(;(;(;()(;(;(;(;(-(-(-(;(;(;(;(;(-(-(&(&(&(&(%($($(@(@(+(.(.( ( ( (Y/Y/Y/X/W/S/S/S/P/K/K/K/K/J/z/z/z/z/p/p/p/p/b/b/b/b/8/}/}/}/[/>/>/=/=/*/Y^Q^Q^L^v^v^v^o^. . . 9^/././.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.-~K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - - F F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 [ [ j+_ _ _ } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> $+$+l l ; ; 0 F F F - - - H,a a +'m@m@m@= b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.3~]+]+]+s~# # M~N~j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.E+@ @ @ i e@e@7]Y]r]r]r]>('(,({.{.{.{.{.{.{.{.{.{.d{/././.8^9^. . o^v^v^v^L^L^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/W/X/Y/Y/Y/ ( (.(.(.(+(@(@($($(%(%(&(&(&(=(-(-(;(;(;(;(-(-(-(-(;(;(;(;(;()(;(;(;(~(~(~(~(~(~(~(~(~(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(~(~(~(~(~(~(~(~(~(;(;(;()(;(;(;(;(;(-(-(-(;(;(;(;(;(-(-(=(&(&(&(%(%($(@(@(@(+(.(.( ( (Z/Y/Y/Y/X/W/S/S/S/P/K/K/K/K/J/z/z/z/z/p/p/p/p/k/b/b/b/8/}/}/}/[/(/>/>/=/*/Y^Y^Q^L^K^v^v^o^. . . 9^8^/././^+ z.z.4&4&X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g H H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~f f P!W#$ $ Y.Y.5.e e e :!{&{&{&J%J%J%.,& & Z='+'+c c d&d&I@k k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _.[ [ [ _ _ _ d#} } Q%X X ( | | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F f,- - - a a a -'m@m@= b b k k I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.;+3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+M+J.J.J.q=@ @ @ e@e@7]S]r]r]r]>('(,({.{.{.{.{.{.{.{.{.{.d{+ /././.9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/[/[/}/}/8/8/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/W/X/Y/Y/Y/Z/ ( (.(.(+(@(@(@($(%(%(&(&(&(&(=(-(;(;(;(;(;(;(-(-(-(;(;(;(;(;(;()(;(;(;(;(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(;(;(;()()(;(;(;(;(;(;(-(-(-(;(;(;(;(;(-(-(=(&(&(&(&(%($($(@(@(+(+(.(.( ( (Z/Y/Y/Y/X/W/S/S/S/P/K/K/K/K/J/z/z/z/z/v/p/p/p/k/b/b/b/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^L^L^v^v^v^o^. . 9^8^/././.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~y.y.y.K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F+[ [ [ _ _ _ d#} } Q%X X ( ( | n.n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.-+o.m m ' 8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+]+s~# # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.E+@ @ @ i e@7]m]Y]r]r]r]>(,({.{.{.{.{.{.{.{.{.{.d{+ /^/./.8^9^. . . o^v^v^K^L^Q^Q^Y^*/=/>/>/>/[/}/}/}/8/b/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/W/X/Y/Y/Y/Z/ ( (.(.(+(+(@(@($($(%(%(&(&(&(=(-(-(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;()()()(;(;(;(;(;(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(;(;(;(;(;()()(;(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(-(-(=(&(&(&(&(%(%($(@(@(@(+(.(.(.( ( (Z/Y/Y/X/X/W/S/S/S/P/K/K/K/K/J/z/z/z/z/v/p/p/p/k/b/b/b/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^v^v^v^o^. . . 9^/./././^+ z.z.4&4&X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f f W#W#$ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@Z+y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( X X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a [ [ [ j+_ _ u%} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 F+F+F+, 9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F - - - H,a a +'m@m@m@= b b k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f K -~y.y.;+3~]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+J.J.J.q=@ @ @ e@7]m]S]r]r]r]>(,({.{.{.{.{.{.{.{.{.{.d{z.+ /././.8^9^. . o^v^v^v^K^L^Q^Y^Y^*/=/>/>/>/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/W/X/X/Y/Y/Z/ ( (.(.(.(+(@(@(@($($(%(%(&(&(&(=(=(-(-(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;(;(;(;()()()(;(;(;(;(;(;(;(;(;(;(;(;(;(;()()()(;(;(;(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;(-(-(=(&(&(&(&(%(%($($(@(@(+(+(.(.( ( ( (Y/Y/Y/X/X/S/S/S/S/P/K/K/K/K/J/z/z/z/z/v/p/p/p/k/b/b/b/8/8/}/}/}/[/>/>/=/=/*/Y^Q^Q^L^K^v^v^o^. . . 9^8^/././^+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.,{+&j j N~# # # s~]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z='+'+c c d&d&I@k k b b = m@m@-'a a a H,- - f,F F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&#%[ [ j+_ _ u%} } } X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>]>> > $+l l ; ; 0 ,,F F f,- - - a a a -'m@m@= b b k k I@I@d&c c '+'+Z=& & .,J%J%J%B.{&{&{&e e e 5.Y.Y.x!$ W#P!f f K y.y.y.3~]+]+]+# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.E+@ @ @ i 7]m]m]Y]r]r]r]A]{.{.{.{.{.{.{.{.{.{.d{z.+ + /././.9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/S/X/X/Y/Y/Y/Z/ ( (.(.(+(+(@(@(@($($(%(%(&(&(&(&(=(-(-(;(;(;(;(;(;(;(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(;(;(;(;(;(;(;(-(-(=(&(&(&(&(%(%($($(@(@(@(+(.(.(.( ( (Z/Y/Y/Y/X/W/S/S/S/S/P/K/K/K/K/J/z/z/z/z/v/p/p/p/k/b/b/b/b/8/}/}/}/[/>/>/>/=/*/Y^Y^Q^L^K^v^v^v^o^. . 9^9^/././.+ z.z.#^4&X.X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.-~K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B B o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.;.Q R R q r r s u u v w x y y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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V##%[ [ [ _ _ _ d#} } Q%X X ( | | n.`.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.;+3~]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+@ @ @ &/m]m]m]Y]r]r]#({.{.{.{.{.{.{.{.{.{.d{z.z.+ /^/./.8^9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/S/W/X/Y/Y/Y/Z/ ( ( (.(.(+(+(@(@(@($($(%(%(&(&(&(&(=(-(-(-(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(-(-(-(=(&(&(&(&(%(%($($(@(@(@(+(+(.(.( ( ( (Y/Y/Y/Y/X/W/S/S/S/P/P/K/K/K/K/J/z/z/z/z/v/p/p/p/k/b/b/b/b/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^v^v^v^o^. . . 9^/./././^+ z.z.4&4&X.P]W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~# # # s~]+]+3~;+y.y.-~f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%.,& & Z=G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=z+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.T$[ [ [ _ _ _ d#} } Q%X X ( ( | n.n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F - - - H,a a a m@m@m@= b b k I@I@d&d&c c '+G Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=@ @ y]m]m]m]S]r]r]#({.{.{.{.{.{.{.{.{.{.d{#^z.z.+ /././.8^9^. . o^o^v^v^K^L^Q^Q^Y^*/=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/P/S/S/S/W/X/X/Y/Y/Y/Z/ ( (.(.(.(+(+(@(@(@($($(%(%(&(&(&(&(&(=(-(-(-(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(-(-(-(=(&(&(&(&(&(%(%($($(@(@(@(+(+(.(.(.( ( (Z/Y/Y/Y/X/X/S/S/S/S/P/P/K/K/K/K/z/z/z/z/z/v/p/p/p/k/b/b/b/b/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^v^v^v^o^. . . 9^8^/././^+ z.z.#^4&X.X.W$W$A.A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j N~M~# # s~]+]+]+3~y.y.y.K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%J%.,& & Z='+'+c c d&I@I@k k b b = m@m@-'a a a H,- - f,F F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=[ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _ [ [ [ _ _ _ u%} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+l l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+@ @ y]h]m]m]m]Y]r]#({.{.{.{.{.{.{.{.{.{.d{4&z.z.z.+ /././.9^. . . o^v^v^v^K^L^Q^Q^Y^*/=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/z/K/K/K/K/K/P/S/S/S/S/W/X/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@($($(%(%(&(&(&(&(&(&(=(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(=(&(&(&(&(&(&(%(%($($(@(@(@(+(+(.(.(.( ( ( (Y/Y/Y/Y/X/W/S/S/S/S/P/K/K/K/K/K/z/z/z/z/z/v/p/p/p/k/b/b/b/b/8/}/}/}/[/(/>/>/=/=/*/Y^Q^Q^L^K^v^v^o^o^. . 9^8^/././.+ z.z.#^4&4&X.P]W$W$A.h h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ [ : : : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x+#%[ [ j+_ _ u%} } } X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@m@5'b b k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=@ y]+]m]m]m]S]r]#({.{.{.{.{.{.{.{.{.{.@^4&4&z.z.+ /^/././.9^. . . o^v^v^v^K^L^Q^Y^Y^*/=/>/>/>/[/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/z/K/K/K/K/K/P/S/S/S/S/W/X/X/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@($($(%(%(%(&(&(&(&(&(&(=(=(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(=(=(&(&(&(&(&(&(%(%($($($(@(@(@(+(+(.(.(.( ( ( (Z/Y/Y/Y/X/X/W/S/S/S/P/P/K/K/K/K/J/z/z/z/z/z/v/p/p/p/k/b/b/b/b/8/}/}/}/[/(/>/>/=/=/*/Y^Q^Q^L^K^v^v^v^o^. . . 9^/./././^+ z.z.4&4&X.P]W$W$A.A.h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f P!W#$ x!Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z=G '+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@`+=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D #%[ [ [ _ _ _ d#} } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - H,a a a -'m@m@= b b k k I@I@d&c c '+'+Z=& & .,J%J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+@ y]+]h]m]m]m]Y]#({.{.{.{.{.{.{.{.{.{.@^X.4&#^z.z.+ /^/./.8^9^. . . o^v^v^v^L^L^Q^Y^Y^*/=/>/>/>/[/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/P/P/S/S/S/S/W/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@($($($(%(%(%(&(&(&(&(&(&(&(=(=(=(-(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(-(=(=(=(&(&(&(&(&(&(&(%(%(%($($(@(@(@(@(+(+(.(.(.( ( ( (Z/Y/Y/Y/Y/X/W/S/S/S/S/P/P/K/K/K/K/J/z/z/z/z/z/p/p/p/p/k/b/b/b/b/8/}/}/}/[/(/>/>/=/=/*/Y^Y^Q^L^K^v^v^v^o^. . . 9^/./././^+ z.z.#^4&X.X.W$W$A.A.h h h s+!@!@!@J e@e@e@@ @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b b = m@m@-'a a a - - - f,F F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F+T$[ [ [ _ _ _ d#} } Q%X X ( ( | n.n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=y]+]+]m]m]m]m]#({.{.{.{.{.{.{.{.{.{.@^X.4&4&#^z.z.+ /././.8^9^. . . o^v^v^v^L^Q^Q^Y^Y^*/=/>/>/>/[/[/}/}/}/8/b/b/b/b/k/p/p/p/p/z/z/z/z/z/J/K/K/K/K/K/P/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@(@($($($(%(%(%(%(&(&(&(&(&(&(&(&(&(&(=(=(=(=(=(=(-(-(-(-(=(=(=(=(=(=(&(&(&(&(&(&(&(&(&(&(%(%(%(%($($($(@(@(@(+(+(+(.(.(.( ( ( (Z/Y/Y/Y/Y/X/X/S/S/S/S/S/P/K/K/K/K/K/J/z/z/z/z/z/p/p/p/p/k/b/b/b/b/8/}/}/}/[/(/>/>/>/=/*/Y^Y^Q^L^L^v^v^v^o^. . . 9^8^/././.+ z.z.#^4&4&X.P]W$W$A.h h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.e e e :!{&{&{&B.J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m@T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@m@= b b k I@I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&{&e e e 5.Y.Y.x!$ W#W#f f K -~y.y.3~]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+p=+]+]+]m]m]m]#({.{.{.{.{.{.{.{.{.{.@^X.X.4&4&z.z.+ + /././.9^9^. . o^o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/>/[/[/}/}/}/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/K/K/K/K/K/P/P/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(.(+(+(@(@(@(@(@($($($(%(%(%(%(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(%(%(%(%($($($(@(@(@(@(@(+(+(.(.(.(.( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/P/P/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/k/b/b/b/b/8/}/}/}/[/[/>/>/>/=/*/Y^Y^Q^Q^L^v^v^v^o^. . . 9^8^/././.+ z.z.z.4&4&X.P]W$W$A.A.h h s+!@!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%J%.,& & Z='+'+c c d&d&I@k k b b = m@m@m@a a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.: #%[ [ j+_ _ u%} } } Q%X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> $+$+l l ; ; 0 F F F f,- - - a a a -'m@m@= 5'b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+d+M+J.J.[^+]+]+]h]m]m]M/{.{.{.{.{.{.{.{.{.{.@^W$X.X.4&#^z.z.+ /^/././.9^. . . o^v^v^v^K^L^Q^Q^Y^Y^=/=/>/>/>/[/[/}/}/}/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/K/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(.(+(+(+(@(@(@(@(@($($($($($(%(%(%(%(%(%(%(&(&(&(&(&(&(&(&(&(&(&(&(%(%(%(%(%(%(%($($($($($(@(@(@(@(@(+(+(+(.(.(.( ( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/P/P/K/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/k/b/b/b/b/8/}/}/}/[/[/>/>/>/=/*/Y^Y^Q^Q^L^K^v^v^o^o^. . 9^9^/./././^+ z.z.4&4&X.X.W$W$A.A.h h h s+!@!@!@J e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k b b 5'= m@m@-'a a H,- - - f,F F ,,0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+F+8 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=p . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@: #%[ [ [ _ _ _ d#} } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+9 9 9 I.^+^+^+]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@5'b b k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+D+d+d+M+J.J.`/+]+]+]+]m]m]M/{.{.{.{.{.{.{.{.{.{.@^W$P]X.X.4&#^z.z.+ /^/././.9^. . . o^v^v^v^K^L^Q^Q^Y^Y^=/=/>/>/>/[/[/}/}/}/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/z/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( ( (.(.(.(.(+(+(+(+(@(@(@(@(@(@($($($($($($($($(%(%(%(%(%(%(%(%(%(%($($($($($($($($(@(@(@(@(@(@(+(+(+(.(.(.(.(.( ( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/z/z/z/z/z/z/p/p/p/p/p/b/b/b/b/b/8/}/}/}/[/(/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^/./././^+ z.z.#^4&X.X.P]W$W$A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e {&{&{&B.J%J%J%.,& & Z=G '+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&U+U+1 [@/ / r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+g@=.=.=.<+~+~+1+W.W.>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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( T$[ [ [ _ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l ; ; ; 0 F F F - - - H,a a a -'m@m@= b b k k I@I@d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&+&(.(.e#e#H H g g D+d+d+d+M+J.`/+]+]+]+]+]m]M/{.{.{.{.{.{.{.{.{.{.@^W$W$P]X.4&4&#^z.z.+ /^/./.8^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^=/=/>/>/>/(/[/}/}/}/8/8/b/b/b/b/p/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Y/Z/ ( ( ( (.(.(.(.(.(+(+(+(+(@(@(@(@(@(@(@(@(@(@(@(@(@($($($($(@(@(@(@(@(@(@(@(@(@(@(@(@(+(+(+(+(.(.(.(.(.( ( ( ( (Z/Y/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/p/b/b/b/b/8/8/}/}/}/[/(/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././^+ z.z.#^4&4&X.P]W$W$A.A.h h s+!@!@!@!@J e@e@e@@ @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - f,F F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@D D D i=~ ~ )+g.g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ~ T$[ [ [ j+_ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m ' 8 8 8 F+F+F+, 9 9 9 I.^+^+]>]>> > $+l l ; ; 0 ,,F F f,- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & .,J%J%J%{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.`/+]+]+]+]+]h]M/{.{.{.{.{.{.{.{.{.{.@^A.W$W$X.X.4&4&z.z.z.+ /././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^=/=/>/>/>/(/[/}/}/}/8/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/z/J/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Y/Z/Z/ ( ( ( ( (.(.(.(.(.(.(+(+(+(+(+(+(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(+(+(+(+(+(+(.(.(.(.(.(.( ( ( ( ( (Z/Y/Y/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/J/z/z/z/z/z/z/v/p/p/p/p/k/b/b/b/b/8/8/}/}/}/[/(/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././.+ z.z.z.4&4&X.X.W$W$A.A.h h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - f,F F ,,0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+F+8 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s u u v w x y y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=J%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^+: #%[ [ j+_ _ _ } } } Q%X X ( | | n.`.r$/ / [@U+U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@m@= b b k k I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+`/+]+]+]+]+]+]M/{.{.{.{.{.{.{.{.{.{.@^A.W$W$W$X.X.4&4&z.z.+ + /././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^*/=/>/>/>/(/[/}/}/}/}/8/b/b/b/b/k/p/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/X/Y/Y/Y/Y/Y/Y/Z/ ( ( ( ( ( (.(.(.(.(.(.(.(.(.(.(+(+(+(+(+(+(+(+(+(+(+(+(.(.(.(.(.(.(.(.(.(.( ( ( ( ( ( (Z/Y/Y/Y/Y/Y/Y/X/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/8/}/}/}/}/[/(/>/>/>/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././.+ z.z.z.4&4&X.X.W$W$W$A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@k k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+[@/ / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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G : #%[ [ [ _ _ _ d#} } Q%X X ( ( | n.n.r$r$/ [@1 U+U+>$^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - - a a a -'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+d+^.+]+]+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.@^h A.W$W$P]X.X.4&#^z.z.+ + /././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/(/[/}/}/}/}/8/b/b/b/b/b/p/p/p/p/p/v/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/S/W/X/X/X/Y/Y/Y/Y/Y/Y/Z/Z/ ( ( ( ( ( ( ( (.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.( ( ( ( ( ( ( ( (Z/Z/Y/Y/Y/Y/Y/Y/X/X/X/W/S/S/S/S/S/S/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/v/p/p/p/p/p/b/b/b/b/b/8/}/}/}/}/[/(/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././.+ + z.z.#^4&X.X.P]W$W$A.h h h s+!@!@!@!@J e@e@e@@ @ @ @ E+J.J.M+d+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@-'a a a - - - f,F F F 0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.3 6@Z+y*] ] y%C 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+g@=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=N.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j : T$[ [ [ _ _ _ u%} } Q%X X ( ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+D+d+d+^.+]+]+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.@^h A.A.W$W$P]X.X.4&#^z.z.+ /^/././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/(/[/[/}/}/}/8/8/b/b/b/b/k/p/p/p/p/p/v/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/S/S/W/X/X/X/Y/Y/Y/Y/Y/Y/Y/Y/Z/Z/Z/ ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( (Z/Z/Z/Y/Y/Y/Y/Y/Y/Y/Y/X/X/X/W/S/S/S/S/S/S/S/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/8/8/}/}/}/[/[/(/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/./././^+ z.z.#^4&X.X.P]W$W$A.A.h h s+s+!@!@!@J e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%& & & Z='+'+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=D.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4&: : [ [ [ j+_ _ u%} } } Q%X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - H,a a a -'m@m@= 5'b k k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#e#H H g g D+d+d+L{R{+]+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.@^h h A.A.W$W$P]X.4&4&#^z.z.+ /^/././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/>/[/[/}/}/}/8/8/b/b/b/b/b/p/p/p/p/p/p/z/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/W/X/X/X/X/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/X/X/X/X/W/S/S/S/S/S/S/S/P/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/z/v/p/p/p/p/p/b/b/b/b/b/8/8/}/}/}/[/[/>/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^9^/./././^+ z.z.#^4&4&X.P]W$W$A.A.h h h s+!@!@!@7.e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o @m.m.m. +y+y+z+l+l+G.:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=>$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . #=: T$[ [ [ _ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a a -'m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # M~N~j j +&(.(.e#e#H H g g D+D+L{B{R{+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.4_s+h h h A.A.W$W$X.X.4&4&#^z.z.+ /^/././.9^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^Y^=/=/>/>/>/(/[/}/}/}/}/8/8/b/b/b/b/b/k/p/p/p/p/p/v/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/S/S/W/W/W/X/X/X/X/X/X/X/X/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/X/X/X/X/X/X/X/X/W/W/W/S/S/S/S/S/S/S/S/S/P/P/P/K/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/b/8/8/}/}/}/}/[/(/>/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^9^/./././^+ z.z.z.4&4&X.X.W$W$W$A.h h h s+!@!@!@!@J e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H H e#e#(.(.+&j j N~N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ T$: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+g@=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.;.R R R q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=<@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F : T$[ [ [ j+_ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - - H,a a +'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~3~]+]+s~# # # N~j j +&,{(.(.e#e#H H g g D+L{B{B{R{+]+]+]s]{.{.{.{.{.{.{.{.{.{.4_!@s+h h h A.W$W$W$X.X.4&4&z.z.z.+ /^/././.9^9^. . . o^v^v^v^v^L^L^Q^Q^Y^Y^=/=/=/>/>/>/[/[/}/}/}/}/8/b/b/b/b/b/b/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/S/S/S/S/S/S/W/W/W/W/W/W/X/X/X/X/X/X/W/W/W/W/W/W/S/S/S/S/S/S/S/S/S/S/S/S/S/P/P/P/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/v/p/p/p/p/p/p/k/b/b/b/b/b/8/}/}/}/}/[/[/>/>/>/=/=/=/Y^Y^Q^Q^L^L^K^v^v^v^o^. . . 9^9^/./././^+ z.z.z.4&4&X.X.W$W$W$A.h h h s+!@!@!@!@J e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+g g H H 0{e#(.(.,{+&j j N~# # # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+c c d&d&I@I@k b b 5'= m@m@-'a a H,- - - f,F F F 0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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K$: : #%[ [ j+_ _ _ d#} } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*6@6@3 w.X&X&{ { )=g.g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f f K y.y.y.3~]+]+]+s~# # M~N~j j +&,{(.(.e#0{H g g D+a+B{B{B{R{+]+]N/{.{.{.{.{.{.{.{.{.{.4_!@s+s+h h h A.W$W$W$X.X.4&4&z.z.z.+ /^/././.8^9^. . . o^v^v^v^v^L^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/}/}/}/}/8/8/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/K/K/P/P/P/P/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/P/P/P/P/K/K/K/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/k/b/b/b/b/b/8/8/}/}/}/}/[/(/>/>/>/=/=/*/Y^Y^Q^Q^L^L^v^v^v^v^o^. . . 9^9^/./././^+ z.z.z.4&4&X.X.W$W$W$A.A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=E+J.J.M+d+d+d+D+D+g g H 0{e#(.(.(.+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$`.n.| | ( X X Q%} } } u%_ _ j+[ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o @m.m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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M+: : T$[ [ [ _ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l l ; ; 0 F F F f,- - - H,a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~N~j j +&(.(.e#e#H H g g a+u{B{B{B{R{+]N/{.{.{.{.{.{.{.{.{.{.4_!@!@s+h h h A.A.W$W$W$X.X.4&4&z.z.z.+ /^/././.8^9^. . . o^o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/[/}/}/}/}/8/8/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/K/K/K/P/P/P/P/P/P/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/P/P/P/P/P/P/K/K/K/K/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/k/b/b/b/b/b/8/8/}/}/}/}/[/[/(/>/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^v^o^. . . 9^9^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@7.e@e@e@e@@ @ @ @ E+J.J.J.M+d+d+D+D+g g H H e#e#(.(.+&+&j j N~# # # s~]+]+3~;+y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 8 m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=4.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /._ : T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # # N~j j +&,{(.(.e#e#H H g D/u{u{B{B{R{+]N/{.{.{.{.{.{.{.{.{.{.4_!@!@!@s+h h h A.A.W$W$P]X.X.4&4&z.z.z.+ /^/././.8^9^. . . o^o^v^v^v^K^L^Q^Q^Q^Y^Y^=/=/=/>/>/>/(/[/}/}/}/}/}/8/b/b/b/b/b/b/k/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/z/z/v/v/p/p/p/p/p/p/k/b/b/b/b/b/b/8/8/}/}/}/}/[/(/>/>/>/=/=/=/Y^Y^Y^Q^Q^L^K^v^v^v^o^o^. . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@7.J e@e@e@i @ @ @ E+J.J.J.M+d+d+d+D+g g H H 0{e#(.(.,{+&j j N~M~# # s~]+]+]+3~y.y.y.K f f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - T+F F ,,0 ; ; l l $+$+> ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( ( X X Q%} } u%_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n v.q.4.G+H+H+g@=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 : : #%[ [ j+_ _ _ } } } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&,{(.(.e#0{H g D/<{u{B{B{B{R{N/{.{.{.{.{.{.{.{.{.{.4_7.!@!@!@s+h h h A.A.W$W$P]X.X.4&4&z.z.z.+ /^/././.8^9^. . . . o^v^v^v^K^L^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/[/}/}/}/}/8/8/b/b/b/b/b/b/k/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/z/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/p/k/b/b/b/b/b/b/8/8/}/}/}/}/[/[/(/>/>/>/=/=/*/Y^Y^Q^Q^Q^L^K^v^v^v^o^o^. . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@J e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H 0{e#(.(.(.+&j j N~M~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+[@/ / r$`.n.| | ( X X X } } } u%_ _ j+[ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 : : #%[ [ [ _ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.;+3~]+]+s~# # # N~N~j j +&(.(.e#e#0{H D/<{u{u{B{B{B{5_{.{.{.{.{.{.{.{.{.{.4_J !@!@!@!@s+h h h A.A.W$W$P]X.X.4&4&z.z.z.+ /^/././.8^9^. . . . o^v^v^v^v^L^L^Q^Q^Y^Y^Y^=/=/=/>/>/>/(/[/[/}/}/}/}/8/8/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/z/z/J/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/J/z/z/z/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/8/8/}/}/}/}/}/[/(/>/>/>/=/=/=/*/Y^Y^Q^Q^L^L^v^v^v^v^o^. . . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@J e@e@e@i @ @ @ q=E+J.J.M+d+d+d+D+D+g g H H e#e#(.(.+&+&j j N~# # # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] y%2 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o @m.m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=M+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m@: : T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - - a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f f K y.y.y.3~]+]+]+s~# # # N~j j +&,{(.(.e#e#H 5@<{<{u{u{B{B{i~{.{.{.{.{.{.{.{.{.{.4_e@J !@!@!@!@s+h h h A.A.W$W$P]X.X.4&4&#^z.z.+ /^/././.8^9^9^. . . o^v^v^v^v^K^L^Q^Q^Q^Y^Y^*/=/=/>/>/>/>/(/[/}/}/}/}/}/8/8/b/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/J/J/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/J/J/J/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/p/p/k/k/b/b/b/b/b/b/8/8/}/}/}/}/}/[/[/>/>/>/>/=/=/*/Y^Y^Y^Q^Q^L^K^v^v^v^v^o^. . . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@J e@e@e@e@@ @ @ @ E+J.J.J.M+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ T$: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.a.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.: : : #%[ [ j+_ _ u%} } } Q%X X ( | | n.n.r$/ / [@1 U+U+R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ ~ D D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> $+$+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&,{(.(.e#0{5@6{<{<{u{u{B{i~{.{.{.{.{.{.{.{.{.{.4_e@e@J !@!@!@!@s+h h h A.A.W$W$P]X.X.4&4&#^z.z.+ + /./././.9^9^. . . o^o^v^v^v^K^L^L^Q^Q^Y^Y^Y^=/=/=/>/>/>/>/[/[/}/}/}/}/}/8/8/b/b/b/b/b/b/b/k/k/p/p/p/p/p/p/p/p/v/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/p/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/b/8/8/}/}/}/}/}/[/[/(/>/>/>/=/=/=/*/Y^Y^Q^Q^L^L^K^v^v^v^o^o^. . . 9^9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@7.e@e@e@e@@ @ @ @ E+J.J.J.M+d+d+d+D+g g g H 0{e#(.(.(.+&j j N~M~# # # s~]+]+3~;+y.y.-~K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; l l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D D i=~ ~ ~ g.g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.<.-.-.;.Q R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=p . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.: : : #%[ [ [ _ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 E F+F+F+, 9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - - a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.;+3~]+]+s~# # # M~N~j j +&(.(.(.e#+&6{<{<{<{u{B{i~{.{.{.{.{.{.{.{.{.{.4_e@e@e@J !@!@!@!@s+h h h A.A.W$W$P]X.X.4&4&#^z.z.+ + /./././.8^9^. . . . o^v^v^v^v^K^L^Q^Q^Q^Y^Y^*/=/=/=/>/>/>/(/[/[/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/p/p/v/v/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/p/p/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/b/b/8/8/}/}/}/}/}/[/[/(/>/>/>/>/=/=/*/Y^Y^Y^Q^Q^L^L^v^v^v^v^o^o^. . . 9^9^/././././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@7.e@e@e@e@@ @ @ @ q=J.J.J.M+d+d+d+D+D+g g H 0{e#e#(.(.+&j j j N~# # # s~]+]+]+3~y.y.y.K f f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.&.9 9 , F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=} . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >$: : T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.P.) 7 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K K y.y.y.3~]+]+]+s~# # # N~j j j +&(.(.e#l/h~6{<{<{u{u{i~{.{.{.{.{.{.{.{.{.{.4_e@e@e@e@7.!@!@!@!@s+h h h A.A.W$W$W$X.X.4&4&#^z.z.z.+ /^/././.8^9^. . . . o^o^v^v^v^K^L^L^Q^Q^Y^Y^Y^*/=/=/>/>/>/>/(/[/[/}/}/}/}/}/}/8/8/b/b/b/b/b/b/b/b/k/k/p/p/p/p/p/p/p/p/p/p/p/p/v/v/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/v/p/p/p/p/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/[/[/(/>/>/>/>/=/=/*/Y^Y^Y^Q^Q^L^L^K^v^v^v^v^o^. . . . 9^8^/./././.+ + z.z.#^4&4&X.X.P]W$W$A.A.h h h s+s+!@!@!@7.e@e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m. +y+y+z+l+l+G.:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=^+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . o.: : : [ [ [ j+_ _ u%} } } Q%X X ( | | n.n.r$/ / [@1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@6@w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 E F+F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&,{(.(.l/*{6{6{<{<{u{i~{.{.{.{.{.{.{.{.{.{.4_@ e@e@e@e@7.!@!@!@!@s+h h h A.A.W$W$W$X.X.4&4&#^z.z.z.+ /^/././.8^9^9^. . . o^o^v^v^v^v^K^L^Q^Q^Q^Y^Y^Y^*/=/=/>/>/>/>/(/[/[/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/v/v/v/v/v/v/v/v/v/v/v/v/v/v/v/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/k/k/b/b/b/b/b/b/b/b/b/8/8/}/}/}/}/}/}/[/[/(/>/>/>/>/=/=/=/*/Y^Y^Q^Q^Q^L^L^v^v^v^v^o^o^. . . . 9^8^/./././^+ + z.z.#^4&4&X.X.P]W$W$A.A.h h h s+s+!@!@!@7.e@e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H H 0{e#(.(.,{+&j j N~M~# # # s~]+]+3~;+y.y.y.K f f P!W#$ $ Y.Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+> > ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { X&X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n v.q.4.G+H+H+g@=.=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=^.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . c : : : #%[ [ [ _ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ $ W#P!f f K y.y.y.;+3~]+]+s~# # # M~N~j j +&,{(.V#*{*{6{6{<{<{i~{.{.{.{.{.{.{.{.{.{.4_@ @ e@e@e@e@7.!@!@!@!@s+h h h A.A.W$W$W$X.X.4&4&#^z.z.z.+ /^/./././.9^9^. . . . o^v^v^v^v^v^L^L^Q^Q^Q^Y^Y^*/=/=/=/>/>/>/>/(/(/[/[/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/b/k/k/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/k/k/b/b/b/b/b/b/b/b/b/b/8/8/}/}/}/}/}/}/}/[/[/(/>/>/>/>/=/=/=/*/Y^Y^Y^Q^Q^L^L^K^v^v^v^v^o^. . . . 9^9^8^/./././^+ z.z.z.#^4&4&X.X.P]W$W$A.A.h h h s+s+!@!@!@7.J e@e@e@i @ @ @ q=E+J.J.M+M+d+d+d+D+g g H H 0{e#(.(.(.+&j j j N~# # # s~]+]+]+3~y.y.y.K f f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+b+K.K.r#n n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.<.-.-.;.Q R R q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=5+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g : : : T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / [@U+U+>$R&^ ^ x+2 2 C y%] ] y*6@6@3 w.X&X&{ { )=g.g.g.)+~ ~ ~ D D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.x!$ W#W#f f K K y.y.y.3~]+]+]+s~# # # N~N~j j +&(.V#*{*{h~6{6{<{4/{.{.{.{.{.{.{.{.{.{.4_@ @ i e@e@e@e@7.!@!@!@!@s+h h h A.A.W$W$W$P]X.X.4&4&z.z.z.+ + /./././.8^9^. . . . o^o^v^v^v^v^K^L^L^Q^Q^Q^Y^Y^*/=/=/=/>/>/>/>/>/(/[/[/}/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/k/k/k/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/k/k/k/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/}/[/[/(/(/>/>/>/>/=/=/=/*/Y^Y^Y^Q^Q^Q^L^K^v^v^v^v^o^o^. . . . 9^8^/././././^+ z.z.z.#^4&4&X.X.W$W$W$A.A.h h h s+s+!@!@!@7.J e@e@e@i @ @ @ q=E+J.J.J.M+d+d+d+D+g g g H 0{e#e#(.(.+&+&j j N~# # # s~]+]+]+3~;+y.y.-~K f f W#W#$ $ Y.Y.5.5.e e :!{&{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@*@D D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=<+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X*} : : : #%[ [ j+_ _ _ } } } Q%X X ( | | n.n.r$r$/ [@1 U+U+>$^ ^ x+2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!:!e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.;+3~]+]+]+s~# # # N~j j j +&V#*{*{*{h~6{<{4/{.{.{.{.{.{.{.{.{.{.S^@ @ @ i e@e@e@e@7.!@!@!@!@s+h h h A.A.W$W$W$P]X.X.4&4&#^z.z.z.+ /^/./././.9^9^. . . . o^o^v^v^v^v^K^L^L^Q^Q^Y^Y^Y^*/=/=/=/=/>/>/>/>/(/[/[/[/}/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/k/k/k/k/k/k/k/k/k/k/k/k/k/k/k/k/k/k/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/}/}/[/[/[/(/>/>/>/>/>/=/=/=/*/Y^Y^Y^Q^Q^Q^L^L^v^v^v^v^v^o^. . . . 9^9^8^/./././.+ + z.z.z.4&4&X.X.X.W$W$W$A.A.h h h s+s+!@!@!@7.J e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # s~s~]+]+3~;+y.y.y.K f f P!W#$ $ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@Z+y*] ] y%C 2 2 x+^ ^ R&>$U+U+[@/ / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n v.q.q.G+H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=*@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D : : : #%[ [ [ _ _ _ d#} } Q%X X ( ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@3 w.X&+={ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ $ W#P!f f K y.y.y.;+3~]+]+]+s~# # M~N~j j +&M~*{*{*{*{h~6{4/{.{.{.{.{.{.{.{.{.{.S^q=@ @ @ i e@e@e@e@7.!@!@!@!@s+h h h h A.A.W$W$P]X.X.4&4&#^z.z.z.+ /^/./././.8^9^. . . . . o^v^v^v^v^v^K^L^Q^Q^Q^Y^Y^Y^*/*/=/=/=/>/>/>/>/>/(/[/[/[/}/}/}/}/}/}/}/}/8/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/8/}/}/}/}/}/}/}/}/[/[/(/(/>/>/>/>/=/=/=/=/*/Y^Y^Y^Q^Q^Q^L^L^K^v^v^v^v^o^o^. . . . 9^9^/././././^+ z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h s+!@!@!@!@7.J e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # # s~]+]+]+3~y.y.y.K f f f W#W#$ x!Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X Q%} } } _ _ _ j+[ [ [ : : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.~+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=5.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - : : : T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@6@w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 7 C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e 5.5.Y.Y.x!$ W#W#f f f K y.y.y.3~3~]+]+s~# # # M~N~j j 2/*{*{*{*{*{6{){{.{.{.{.{.{.{.{.{.{.l{E+q=@ @ @ i e@e@e@e@7.!@!@!@!@s+h h h h A.A.W$W$W$X.X.4&4&4&z.z.z.+ + /^/././.8^9^9^. . . . o^o^v^v^v^v^v^L^L^Q^Q^Q^Y^Y^Y^Y^*/=/=/=/>/>/>/>/>/>/(/[/[/[/}/}/}/}/}/}/}/}/}/8/8/8/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/8/8/}/}/}/}/}/}/}/}/}/[/[/[/(/(/>/>/>/>/>/=/=/=/=/*/Y^Y^Y^Q^Q^Q^L^L^K^v^v^v^v^o^o^. . . . 9^9^8^/././././^+ z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h s+!@!@!@!@7.J e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H 0{e#(.(.(.+&j j N~N~# # # s~]+]+]+3~y.y.y.-~K f f W#W#$ $ Y.Y.5.5.e e e :!{&{&{&B.J%J%r+& & & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { +=X&w.3 6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=q$/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;+c+: : : #%[ [ j+_ _ _ d#} } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D D *@*@*@O=6 6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & & r+J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.y.3~]+]+]+s~# # # M~N~j !/*{*{*{*{*{*{){{.{.{.{.{.{.{.{.{.{.{.T~6_q=@ @ @ i e@e@e@e@J !@!@!@!@s+h h h h A.A.W$W$W$X.X.X.4&4&#^z.z.z.+ /^/./././.8^9^9^. . . . o^o^v^v^v^v^K^L^L^Q^Q^Q^Q^Y^Y^Y^*/=/=/=/=/>/>/>/>/>/>/(/[/[/[/[/}/}/}/}/}/}/}/}/}/}/}/8/8/8/8/8/8/8/8/8/8/b/b/b/b/b/b/b/b/8/8/8/8/8/8/8/8/8/8/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/(/(/>/>/>/>/>/=/=/=/=/*/Y^Y^Y^Y^Q^Q^Q^L^L^K^v^v^v^v^v^o^o^. . . . 9^9^/././././^+ + z.z.z.#^4&4&X.X.P]W$W$A.A.A.h h h s+!@!@!@!@7.J e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H 0{e#(.(.(.+&j j j N~# # # s~]+]+]+3~;+y.y.-~K f f P!W#$ $ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.7 7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=0.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4&T$: : : #%[ [ [ _ _ _ d#} } Q%X X ( ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] y*6@6@3 w.X&X&{ { )=g.g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.Y.$ $ W#P!f f K -~y.y.;+3~]+]+]+s~# # # N~N~!/u~*{*{*{*{*{~/{.{.{.{.{.{.{.{.{.{.{.{.'~<_M+@ @ @ i e@e@e@e@J !@!@!@!@s+s+h h h A.A.W$W$W$P]X.X.4&4&#^z.z.z.+ + /^/./././.9^9^. . . . . o^o^v^v^v^v^K^K^L^L^Q^Q^Q^Y^Y^Y^Y^*/=/=/=/=/>/>/>/>/>/>/(/(/[/[/[/[/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/[/(/(/>/>/>/>/>/>/=/=/=/=/=/*/Y^Y^Y^Q^Q^Q^Q^L^L^K^v^v^v^v^v^o^o^. . . . 9^9^8^/././././^+ z.z.z.#^4&4&X.X.X.W$W$W$A.A.h h h h s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H 0{e#e#(.(.+&+&j j N~M~# # s~s~]+]+3~;+y.y.y.K f f f W#W#$ x!Y.Y.5.5.e e :!{&{&{&B.B.J%J%r+& & & Z='+'+c c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 2 ^ ^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X Q%} } } _ _ _ j+[ [ [ : : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=^ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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Z+c+: : T$[ [ [ j+_ _ u%} } } Q%X X ( | | n.n.r$/ / [@1 U+U+>$^ ^ x+2 2 2 C ] ] y*Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) 7 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#P!f f K y.y.y.;+3~]+]+]+s~# # # N~!/u~u~*{*{*{*{~/{.{.{.{.{.{.{.{.{.{.{.{.{.{.7_B^@ @ @ @ e@e@e@e@J !@!@!@!@s+s+h h h A.A.W$W$W$P]X.X.4&4&4&z.z.z.z.+ /^/./././.8^9^9^. . . . . o^o^v^v^v^v^v^K^L^L^Q^Q^Q^Q^Y^Y^Y^*/*/=/=/=/=/>/>/>/>/>/>/>/(/(/[/[/[/[/[/[/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/[/[/(/(/>/>/>/>/>/>/>/=/=/=/=/=/*/Y^Y^Y^Y^Q^Q^Q^L^L^L^K^v^v^v^v^v^o^o^. . . . 9^9^8^/././././^+ + z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h h s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g g H 0{e#e#(.(.,{+&j j N~M~# # # s~]+]+]+3~y.y.y.-~K f f W#W#$ $ Y.Y.5.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &.c+: : : #%[ [ j+_ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@3 w.X&+={ { )=g.g.g.)+~ ~ ~ D D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= = b b k k I@I@d&d&c '+'+G Z=& & & r+J%J%B.{&{&{&:!:!e e 5.5.Y.Y.x!$ W#W#f f f K y.y.y.;+3~]+]+s~s~# # M~,/u~u~u~*{*{*{@/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.`)8_d+@ @ @ e@e@e@e@J 7.!@!@!@!@s+h h h h A.A.W$W$W$P]X.X.4&4&#^z.z.z.+ + /^/./././.8^9^9^. . . . . o^o^v^v^v^v^v^K^L^L^Q^Q^Q^Q^Y^Y^Y^Y^*/*/=/=/=/=/=/>/>/>/>/>/>/>/>/(/(/(/[/[/[/[/[/[/[/[/[/}/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/[/[/[/[/[/(/(/(/>/>/>/>/>/>/>/>/>/=/=/=/=/=/*/Y^Y^Y^Y^Q^Q^Q^Q^L^L^K^K^v^v^v^v^v^o^o^. . . . . 9^9^/./././././^+ z.z.z.z.4&4&4&X.X.P]W$W$W$A.A.h h h s+s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g g H 0{e#e#(.(.,{+&j j N~M~# # # s~]+]+]+3~y.y.y.-~K f f P!W#$ $ Y.Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+y*] ] C 2 2 2 x+^ ^ R&U+U+1 [@/ / r$`.n.| | ( X X X } } } u%_ _ _ [ [ [ T$: : : < < < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o @m.m.m. +y+y+z+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.;.R R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=6.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&c+: : : T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / [@U+U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@6@w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.y.3~]+]+]+s~# # # }{Q~u~u~*{*{*{@/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.D]a^@ @ @ e@e@e@e@J 7.!@!@!@!@s+h h h h A.A.W$W$W$P]X.X.4&4&4&z.z.z.z.+ /^/././././.8^9^9^. . . . . o^o^v^v^v^v^v^K^K^L^L^Q^Q^Q^Q^Y^Y^Y^Y^Y^*/=/=/=/=/=/=/>/>/>/>/>/>/>/>/>/>/>/>/(/(/(/(/(/(/[/[/[/[/[/[/[/[/(/(/(/(/(/(/(/>/>/>/>/>/>/>/>/>/>/>/=/=/=/=/=/=/*/*/Y^Y^Y^Y^Q^Q^Q^Q^L^L^L^K^v^v^v^v^v^v^o^o^. . . . . 9^9^8^/././././^+ + z.z.z.#^4&4&X.X.X.W$W$W$A.A.A.h h h s+s+!@!@!@!@J e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+d+D+g g g H H e#e#(.(.,{+&j j N~N~# # # s~]+]+]+3~;+y.y.-~K f f P!W#W#$ x!Y.Y.5.5.e e :!{&{&{&{&B.J%J%r+& & & Z='+'+'+c d&d&I@I@k k b b = m@m@m@+'a a H,H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { +=X&w.3 6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.n.| ( ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@< c+: : T$[ [ [ j+_ _ u%} } } Q%X X ( | | n.n.r$r$/ [@1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ $ W#P!f f K -~y.y.y.3~]+]+]+s~# # R^H~Q~u~u~*{*{@/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;9_L{@ @ e@e@e@e@e@7.!@!@!@!@s+s+h h h A.A.A.W$W$W$X.X.X.4&4&#^z.z.z.+ + /^/././././.8^9^9^. . . . . o^o^v^v^v^v^v^v^K^L^L^L^Q^Q^Q^Q^Y^Y^Y^Y^Y^Y^*/=/=/=/=/=/=/=/=/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/=/=/=/=/=/=/=/*/*/Y^Y^Y^Y^Y^Q^Q^Q^Q^Q^L^L^K^K^v^v^v^v^v^v^o^o^. . . . . 9^9^8^/././././^+ + z.z.z.#^4&4&4&X.X.P]W$W$W$A.A.h h h h s+!@!@!@!@!@J e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+d+D+g g g H H e#e#(.(.,{+&j j j N~# # # s~]+]+]+3~;+y.y.y.K f f f W#W#$ x!Y.Y.5.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F F 0 ; ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.-.Q R R q q r s t u u w x x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . `.c+: : : #%[ [ [ _ _ _ d#} } Q%X X ( ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@I@d&d&c '+'+G Z=& & & r+J%J%B.{&{&{&{&:!e e 5.5.Y.Y.x!$ W#W#P!f f K -~y.y.;+3~]+]+]+s~# R^v~H~Q~u~u~*{Z^{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.m^0_@ @ i e@e@e@e@7.!@!@!@!@s+s+h h h h A.A.W$W$W$P]X.X.4&4&4&#^z.z.z.+ + /^/././././.8^9^9^. . . . . o^o^v^v^v^v^v^v^v^K^L^L^L^Q^Q^Q^Q^Q^Y^Y^Y^Y^Y^Y^*/*/=/=/=/=/=/=/=/=/=/=/=/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/=/=/=/=/=/=/=/=/=/=/=/*/*/Y^Y^Y^Y^Y^Y^Q^Q^Q^Q^Q^L^L^L^K^K^v^v^v^v^v^v^o^o^. . . . . . 9^9^8^/./././././^+ z.z.z.z.#^4&4&X.X.X.W$W$W$W$A.A.h h h h s+!@!@!@!@7.J e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+d+D+g g g H H e#e#(.(.(.+&j j j N~# # # s~s~]+]+3~3~y.y.y.-~K f f W#W#$ $ Y.Y.5.5.e e e :!{&{&{&B.J%J%J%.,& & & Z='+'+c c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+{+6 P=O=*@*@_.D D D i=~ ~ ~ g.g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ / r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ T$: : : < < < b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.Q R R q r r s u u v w x y y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=F+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ) c+: : : T$[ [ [ _ _ _ u%} } } X X X ( | | n.n.r$/ / [@1 U+U+>$^ ^ x+2 2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b b k I@I@d&d&c c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.5.Y.Y.x!$ W#W#f f f K y.y.y.;+3~]+]+]+s~R^v~v~H~Q~u~u~A^{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.t]a_l]@ i e@e@e@e@J !@!@!@!@!@s+h h h h A.A.W$W$W$W$X.X.X.4&4&#^z.z.z.z.+ + /^/././././.8^9^9^. . . . . o^o^o^v^v^v^v^v^v^v^K^L^L^L^L^Q^Q^Q^Q^Q^Y^Y^Y^Y^Y^Y^Y^Y^*/*/*/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/*/*/*/*/Y^Y^Y^Y^Y^Y^Y^Q^Q^Q^Q^Q^Q^L^L^L^K^K^v^v^v^v^v^v^v^o^o^. . . . . . 9^9^8^/./././././^+ + z.z.z.#^4&4&4&X.X.P]W$W$W$A.A.h h h h s+s+!@!@!@!@7.J e@e@e@e@@ @ @ @ q=E+J.J.J.M+d+d+d+d+D+g g g H H e#e#(.(.(.+&j j j N~M~# # # s~]+]+]+3~y.y.y.-~K f f P!W#$ $ x!Y.Y.5.e e e :!{&{&{&B.B.J%J%r+& & & Z=G '+'+c d&d&I@I@k k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . k < c+: : : #%[ [ j+_ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@m@= b b k k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#W#f f K K y.y.y.;+3~]+]+]+G^v~v~v~Q~Q~u~A^{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.4_g]@ i e@e@e@e@J 7.!@!@!@!@s+s+h h h h A.A.W$W$W$P]X.X.X.4&4&#^z.z.z.z.+ + /^/././././.8^9^9^. . . . . . o^o^o^v^v^v^v^v^v^v^K^K^L^L^L^L^Q^Q^Q^Q^Q^Q^Q^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^*/*/*/*/*/*/*/*/*/Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Q^Q^Q^Q^Q^Q^Q^L^L^L^L^K^v^v^v^v^v^v^v^v^o^o^. . . . . . 9^9^9^8^/./././././^+ + z.z.z.#^4&4&4&X.X.X.W$W$W$W$A.A.h h h h s+!@!@!@!@!@7.e@e@e@e@e@@ @ @ @ q=E+J.J.J.M+d+d+d+d+D+g g g H H e#e#(.(.(.+&+&j j N~M~# # # s~]+]+]+3~y.y.y.-~K f f P!W#W#$ x!Y.Y.5.5.e e :!:!{&{&{&B.J%J%J%.,& & Z=G '+'+c c d&d&I@I@k b b 5'= m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+y*] ] C 2 2 2 x+^ ^ R&>$U+1 [@/ / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.d.2.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=L+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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(.< c+: : : #%[ [ [ _ _ _ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+>$R&^ ^ x+2 2 2 C ] ] y*Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a a -'m@m@= 5'b b k I@I@I@d&d&c '+'+G Z=& & & r+J%J%B.B.{&{&{&:!e e e 5.Y.Y.Y.$ $ W#P!f f K -~y.y.y.3~3~]+]+X~J!v~v~v~Q~Q~A^{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-,]E{@ e@e@e@e@e@7.!@!@!@!@!@s+h h h h A.A.W$W$W$W$P]X.X.4&4&4&#^z.z.z.z.+ + /^/././././.8^9^9^9^. . . . . . o^o^o^v^v^v^v^v^v^v^v^K^K^L^L^L^L^L^Q^Q^Q^Q^Q^Q^Q^Q^Q^Q^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Q^Q^Q^Q^Q^Q^Q^Q^Q^Q^L^L^L^L^L^K^v^v^v^v^v^v^v^v^v^o^o^o^. . . . . . 9^9^8^8^/./././././^+ + z.z.z.z.#^4&4&X.X.X.P]W$W$W$A.A.A.h h h h s+!@!@!@!@!@J e@e@e@e@i @ @ @ @ q=E+J.J.J.M+d+d+d+D+D+g g g H H e#e#(.(.(.+&+&j j N~M~# # # s~]+]+]+3~;+y.y.y.K f f f W#W#$ x!Y.Y.5.5.e e e :!{&{&{&B.J%J%J%.,& & & Z='+'+c c d&d&I@I@k k b b = m@m@m@+'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ T$: : c+< < < b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.a.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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H < < c+: : : [ [ [ j+_ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+$+l l ; ; 0 ,,F F T+- - - H,H,a a +'m@m@m@= b b b k I@I@d&d&c c '+'+G Z=& & & r+J%J%B.B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#W#f f f K -~y.y.;+i^Z!Z!Z!J!v~v~3^{.{.{.{.{.{.{.{.{.{.M!h~6{6{f_I{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.g_h_i e@e@e@e@J 7.!@!@!@!@!@s+h h h h A.A.A.W$W$W$W$P]X.X.X.4&4&4&#^z.z.z.z.+ + + /^/././././././.8^9^9^9^. . . . . . . . . . o^o^o^o^o^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^o^o^o^o^o^. . . . . . . . . 9^9^9^8^8^/./././././././^+ + z.z.z.z.z.#^4&4&4&X.X.X.P]W$W$W$A.A.A.h h h h s+s+!@!@!@!@!@7.J e@e@e@e@i @ @ @ @ q=E+J.J.J.M+M+d+d+d+D+D+g g g H H e#e#(.(.(.+&+&j j N~M~# # # s~]+]+]+3~3~y.y.y.-~K f f P!W#W#$ x!Y.Y.5.5.e e e :!{&{&{&B.J%J%J%r+& & & Z='+'+'+c d&d&I@I@I@k b b 5'= m@m@-'+'a a H,- - - f,F F F 0 ; ; ; l l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+6 6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 2 x+^ ^ R&U+U+1 [@/ / r$`.n.| | ( X X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@O B o o V m.m.m.y+y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.;.Q R R q r r s u u v w x y y S S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . % < < c+: : : #%[ [ [ _ _ _ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+U+R&^ ^ x+2 2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 ,,F F T+- - - H,a a a +'m@m@m@= b b b k I@I@d&d&d&c '+'+G Z=& & & r+J%J%J%B.{&{&{&:!e e e 5.5.Y.Y.x!$ $ W#P!f f K K y.f {~>~>~Z!Z!Z!3^{.{.{.{.{.{.{.{.{.{.M!*{*{*{*{6{6{<{<{l_j!{.{.{.{.{.{.{.{.{.{.{.{.{.{.|~m_i e@e@e@e@e@7.!@!@!@!@!@s+s+h h h h h A.A.A.W$W$W$W$P]X.X.X.4&4&4&4&#^z.z.z.z.z.+ + + /^/^/././././././././.8^8^9^9^9^9^9^. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9^9^9^9^9^8^8^/./././././././././^+ + + z.z.z.z.z.z.#^4&4&4&X.X.X.X.P]W$W$W$W$A.A.A.h h h h s+s+!@!@!@!@!@7.J e@e@e@e@e@i @ @ @ @ q=E+J.J.J.M+M+d+d+d+D+D+D+g g H H 0{e#e#(.(.(.+&+&j j N~M~# # # s~]+]+]+]+3~y.y.y.-~K f f f W#W#$ $ Y.Y.Y.5.e e e :!{&{&{&{&B.J%J%J%.,& & & Z='+'+c c d&d&I@I@k k b b 5'= m@m@-'+'a a H,- - - f,F F F ,,0 ; ; l l $+$+> > ]>^+^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X X } } } u%_ _ _ [ [ [ T$: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.=.~+~+~+1+W.W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.b.[.-.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # b+< < < c+: : : #%[ [ j+_ _ _ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 C.C.-+o.m m m Q+8 8 E F+F+F+, 9 9 9 &.I.^+^+]>]>> > $+$+l l ; ; ; 0 F F F f,- - - H,a a a +'m@m@m@= 5'b b k k I@I@d&d&c c '+'+G Z=& & & .,J%J%J%B.{&{&{&{&:!e e e 5.5.Y.Y.e K!K!]!]! ~`![{{.{.{.{.{.{.{.{.{.{.2]s~s~# # # M~N~j j j +&+&,{(.L_+{*{*{h~6{6{<{<{<{*{M_}~{.{.{.{.{.{.{.{.{.{.{.{.{.{.N_O_@ @ i e@e@e@e@e@e@e@J 7.!@!@!@!@!@!@!@!@s+s+s+h h h h h h h h A.A.A.A.A.A.W$W$W$W$W$W$W$W$W$W$W$W$P]P]P]P]P]P]X.X.X.X.X.X.X.X.X.X.X.X.X.X.X.P]P]P]P]P]P]W$W$W$W$W$W$W$W$W$W$W$W$A.A.A.A.A.A.h h h h h h h h s+s+s+!@!@!@!@!@!@!@!@7.J e@e@e@e@e@e@e@i @ @ @ @ @ @ q=E+J.J.J.J.M+M+d+d+d+d+D+D+D+g g g H H 0{e#e#(.(.(.,{+&+&j j j N~M~# # # s~s~]+]+]+3~;+y.y.y.-~K f f f P!W#W#$ x!Y.Y.Y.5.e e e e :!{&{&{&B.B.J%J%J%.,& & & Z=G '+'+c c d&d&I@I@k k b b 5'= m@m@m@+'a a a H,- - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+I.&.9 9 5;F+F+F+F+E 8 8 Q+m m m o.C.C.C.7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$n.n.| | ( X X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < < b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o o V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=l+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {+b+< < < c+: : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m Q+8 8 8 E F+F+F+5;9 9 &.I.^+^+^+]>> > > $+$+l ; ; ; 0 ,,F F T+f,- - - H,a a a -'m@m@m@= b b b k I@I@I@d&d&c c '+'+G Z=& & & .,J%J%J%B.{&{&{&{&:!e e e 5.5.e A!A!g!K!K!]![{{.{.{.{.{.{.{.{.{.{.2]]+]+]+s~# # # # M~N~j j j +&+&(.(.T_A{*{*{h~6{6{<{<{<{6{7/`){.{.{.{.{.{.{.{.{.{.{.{.{.{.w_U_@ @ @ @ i e@e@e@e@e@e@e@J 7.7.!@!@!@!@!@!@!@!@!@s+s+s+h h h h h h h h h h h A.A.A.A.A.A.A.A.A.A.W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$A.A.A.A.A.A.A.A.A.A.h h h h h h h h h h h s+s+s+!@!@!@!@!@!@!@!@!@7.7.J e@e@e@e@e@e@e@i @ @ @ @ @ @ @ q=E+J.J.J.J.J.M+d+d+d+d+d+D+D+g g g g H H 0{e#e#(.(.(.(.+&+&j j j N~M~# # # # s~]+]+]+]+3~;+y.y.y.-~K f f f W#W#$ $ x!Y.Y.Y.5.e e e e :!{&{&{&{&B.J%J%J%.,& & & Z=G '+'+c c d&d&I@I@I@k b b b = m@m@m@-'a a a H,- - - f,T+F F ,,0 ; ; ; l $+$+> > > ]>^+^+^+I.9 9 9 5;F+F+F+E 8 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( X X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < < b+K.K.9.r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o V m.m.m. +y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . & b+b+< < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+{+P.P.) ) 7 C.C.-+o.m m m Q+8 8 E F+F+F+, 5;9 9 &.I.^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+- - - - H,a a a -'m@m@m@= b b b k I@I@I@d&d&c c '+'+G Z=& & & r+J%J%J%B.{&{&{&{&:!e e e e :!A!A!A!g!K!K!f]{.{.{.{.{.{.{.{.{.{.2]3~]+]+]+s~s~# # # M~N~j j j +&+&,{(.F~V_*{*{h~6{6{6{<{<{<{W_3{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.X_Y_@ @ @ @ i e@e@e@e@e@e@e@e@J 7.7.!@!@!@!@!@!@!@!@!@s+s+s+s+h h h h h h h h h h h h h h A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.h h h h h h h h h h h h h h s+s+s+s+!@!@!@!@!@!@!@!@!@7.7.J e@e@e@e@e@e@e@e@i @ @ @ @ @ @ @ q=E+J.J.J.J.J.M+M+d+d+d+d+D+D+D+g g g H H H 0{e#e#(.(.(.,{+&+&j j j N~M~# # # s~s~]+]+]+3~3~;+y.y.y.-~K f f f W#W#$ $ x!Y.Y.Y.5.e e e e :!{&{&{&{&B.J%J%J%.,& & & Z=G '+'+c c d&d&I@I@I@k b b b = m@m@m@-'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+I.&.9 9 5;, F+F+F+E 8 8 Q+m m m o.-+C.C.7 ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#r#n v.q.4.G+H+H+g@`+=.=.<+~+~+Q.1+W.>@>@B B o o V m.m. +y+y+y+z+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p f.r.k.a.b.b.<.[.-.;.Q R R q q r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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A.Z_b+< < < c+: : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D t=_.*@*@O=P=6 6 {+P.P.) ) 7 7 C.C.-+o.m m ' 8 8 8 E F+F+F+, 9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+- - - H,H,a a +'-'m@m@= = b b k k I@I@d&d&d&c c '+'+G Z=& & & r+J%J%J%B.{&{&{&{&:!e e e {&t!A!A!A!g!K!f]{.{.{.{.{.{.{.{.{.{.2]3~3~]+]+]+s~s~# # # # N~N~j j j +&,{(.(.${ .*{*{h~6{6{<{<{<{<{N{'~{.{.{.{.{.{.{.{.{.{.{.{.{.{.`_ > ]>]>^+^+^+I.9 9 9 , F+F+F+E 8 8 8 ' m m o.-+C.C.7 7 ) ) P.P.{+6 6 P=O=*@*@_.t=D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : c+< < < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.=.<+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.R R R q r r s t u v w x x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#q$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=>$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D b+b+< < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m Q+8 8 8 E F+F+F+5;9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; 0 ,,F F F f,- - - H,a a a +'m@m@m@= 5'b b k k I@I@d&d&d&c c '+'+G Z=& & & r+J%J%J%B.{&{&{&{&:!e e {&h!t!t!A!A!g!f]{.{.{.{.{.{.{.{.{.{.2]y.;+3~]+]+]+]+s~# # # # M~N~j j j +&+&,{(.%. :*{*{*{6{6{6{<{<{<{m{.:{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.+:a]@ @ @ @ @ @ i e@e@e@e@e@e@e@e@e@J J 7.!@!@!@!@!@!@!@!@!@!@!@!@!@s+s+s+s+s+s+h h h h h h h h h h h h h h h h h h h h h h h h h h h h h h h h h s+s+s+s+s+s+!@!@!@!@!@!@!@!@!@!@!@!@!@7.J J e@e@e@e@e@e@e@e@e@i @ @ @ @ @ @ @ q=E+J.J.J.J.J.J.M+M+d+d+d+d+d+D+D+g g g g H H H e#e#e#(.(.(.,{+&+&j j j N~M~# # # # s~]+]+]+]+3~;+y.y.y.y.K K f f P!W#W#$ $ x!Y.Y.5.5.e e e e :!{&{&{&{&B.J%J%J%r+& & & Z=G '+'+c c d&d&d&I@I@k k b b 5'= m@m@m@+'a a a H,- - - f,F F F ,,0 ; ; l l $+$+> > ]>]>^+^+^+I.9 9 9 5;F+F+F+E 8 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+~+1+W.>@>@B B o o V m.m.m.y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=G]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .,K.b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+P.P.P.) ) 7 C.C.-+o.m m m Q+8 8 E F+F+F+F+5;9 9 &.I.^+^+^+]>> > $+$+$+l ; ; ; 0 ,,F F F f,- - - H,a a a +'m@m@m@= 5'b b k k I@I@d&d&d&c '+'+'+Z=Z=& & & r+J%J%J%B.{&{&{&{&:!e {&h!h!t!t!A!A!1]{.{.{.{.{.{.{.{.{.{.2]y.y.;+3~]+]+]+]+s~s~# # # M~N~N~j j j +&+&(.(.a{@:*{*{h~6{6{6{<{<{<{#:R-{.{.{.{.{.{.{.{.{.{.{.{.{.{.8{$:@ @ @ @ @ @ @ @ i e@e@e@e@e@e@e@e@e@e@J J 7.!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@s+s+s+s+s+s+s+s+s+s+s+s+h h h h h h h s+s+s+s+s+s+s+s+s+s+s+s+!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.J J e@e@e@e@e@e@e@e@e@e@i @ @ @ @ @ @ @ @ q=E+J.J.J.J.J.J.M+M+d+d+d+d+d+D+D+g g g g H H H 0{e#e#(.(.(.(.+&+&j j j N~N~M~# # # s~s~]+]+]+]+3~;+y.y.y.-~K K f f P!W#W#$ $ x!Y.Y.5.5.e e e e :!{&{&{&{&B.J%J%J%r+& & & Z=Z='+'+'+c d&d&d&I@I@k k b b 5'= m@m@m@+'a a a H,- - - f,F F F ,,0 ; ; ; l $+$+$+> > ]>^+^+^+I.&.9 9 5;, F+F+F+E 8 8 Q+m m m o.-+C.C.7 ) ) P.P.P.{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+K.K.9.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p r.r.k.a.b.b.<.-.-.;.Q R R q q r s t u u v w x y z S T T >.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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W$: b+b+< < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 6 {+P.P.) ) 7 7 C.C.-+o.m m ' 8 8 8 E F+F+F+, 9 9 9 &.I.^+^+]>]>> > $+$+l l ; ; ; 0 ,,F F T+- - - - H,a a a -'m@m@m@= 5'b b k k I@I@d&d&d&c '+'+'+Z=Z=& & & r+J%J%J%B.{&{&{&{&:!@>h!h!h!t!t!A!1]{.{.{.{.{.{.{.{.{.{.2]y.y.y.;+3~3~]+]+]+s~s~# # # # M~N~j j j +&+&,{(.!/%:<{*{*{h~6{6{6{<{<{&:*:{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.E]=:q=@ @ @ @ @ @ @ @ i i e@e@e@e@e@e@e@e@e@e@J J 7.7.!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.J J e@e@e@e@e@e@e@e@e@e@e@i @ @ @ @ @ @ @ @ q=E+E+J.J.J.J.J.M+M+d+d+d+d+d+d+D+D+D+g g g H H H 0{e#e#e#(.(.(.,{+&+&j j j N~M~# # # # s~s~]+]+]+3~3~;+y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.5.5.e e e :!:!{&{&{&{&B.J%J%J%r+& & & Z=Z='+'+'+c d&d&d&I@I@k k b b 5'= m@m@m@-'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+I.&.9 9 9 , F+F+F+E 8 8 8 ' m m o.o.C.C.7 7 ) ) P.P.{+6 6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.g.)={ { { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o V m.m.m. +y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R R q r r t u u v w x x y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=^ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t=K.b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m Q+8 8 8 E F+F+F+5;9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+- - - - H,a a a -'m@m@m@= 5'b b k k I@I@d&d&d&c '+'+'+Z=Z=& & & r+J%J%J%B.{&{&{&{&@>0!h!h!h!t!t!1]{.{.{.{.{.{.{.{.{.{.2]-~y.y.y.y.;+3~]+]+]+]+s~# # # # M~N~N~j j j +&+&,{(.-:z~*{*{*{h~6{6{6{<{<{A^.){.{.{.{.{.{.{.{.{.{.{.{.{.{.;:>:[^q=q=@ @ @ @ @ @ @ @ i i e@e@e@e@e@e@e@e@e@e@e@e@J J 7.7.7.!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.7.J J J e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.M+M+d+d+d+d+d+d+D+D+D+g g g g H H 0{e#e#e#(.(.(.,{+&+&j j j N~N~M~# # # # s~]+]+]+]+3~3~y.y.y.y.-~K f f f P!W#W#$ $ Y.Y.Y.5.5.e e e :!:!{&{&{&{&B.J%J%J%r+& & & Z=Z='+'+'+c c d&d&I@I@k k b b 5'= m@m@m@-'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.9 9 9 5;F+F+F+E 8 8 8 Q+m m m o.C.C.C.7 ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+Q.1+W.>@>@B B o @V m.m. +y+y+y+z+l+l+G.:.:.:.2+#+#+#+0.0.0.R.p p f.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d K.b+b+< < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+P.P.P.) ) 7 C.C.-+o.m m m Q+8 8 E F+F+F+F+5;9 9 &.I.^+^+^+]>]>> > $+$+l l ; ; 0 0 F F F T+- - - - H,a a a -'m@m@m@= b b b k k I@I@d&d&c c '+'+'+Z=Z=& & & r+J%J%J%B.B.{&{&J%0!0!h!h!h!t!^]{.{.{.{.{.{.{.{.{.{.6~K K y.y.y.y.;+3~]+]+]+]+s~s~# # # # M~N~j j j j +&,{(.%],:6{*{*{*{h~6{6{<{<{':):{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.y^!:J.E+q=q=@ @ @ @ @ @ @ @ @ i i e@e@e@e@e@e@e@e@e@e@e@e@e@J J J J 7.7.7.7.!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.7.7.J J J J e@e@e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ @ @ q=E+J.J.J.J.J.J.J.M+M+d+d+d+d+d+D+D+D+D+g g g g H H 0{e#e#e#(.(.(.(.,{+&j j j j N~M~# # # # s~s~]+]+]+]+3~;+y.y.y.y.K K f f f W#W#$ $ $ Y.Y.Y.5.5.e e e :!:!{&{&{&{&B.J%J%J%r+& & & Z=Z='+'+'+c c d&d&I@I@k k b b b = m@m@m@-'a a a H,H,- - - f,F F F ,,0 ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 5;F+F+F+F+E 8 8 Q+m m m o.-+C.C.7 ) ) ) P.P.{+6 6 P=O=*@*@_.t=D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.~+~+~+1+W.W.>@O B o o @m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q r r s t u u w x x y z S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=d.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4@: K.b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m ' 8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>> > > $+$+l ; ; ; 0 ,,F F F f,- - - H,H,a a +'-'m@m@m@= b b b k k I@I@d&d&c c '+'+'+Z=Z=& & & r+J%J%J%B.B.{&J%[![!0!h!h!h!^]{.{.{.{.{.{.{.{.{.{.6~f f K -~y.y.y.y.3~3~]+]+]+]+s~# # # # M~N~N~j j j +&+&,{(.~:U^*{*{*{*{h~6{6{<{<{,(l{{.{.{.{.{.{.{.{.{.{.{.{.{.{.s^~/a+J.J.E+q=q=@ @ @ @ @ @ @ @ @ @ i i e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@J J J J J J J J 7.7.7.7.7.7.7.J J J J J J J J e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.J.M+M+d+d+d+d+d+d+D+D+D+g g g g g H H H 0{e#e#(.(.(.(.,{+&+&j j j N~N~M~# # # # s~]+]+]+]+3~3~;+y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.Y.5.5.e e e :!:!{&{&{&B.B.J%J%J%r+& & & Z=Z='+'+'+c c d&d&I@I@I@k b b b = m@m@m@-'+'a a a H,- - - f,F F F ,,0 ; ; ; l $+$+$+> > ]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 ' m m o.o.C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D i=i=~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+Q.1+W.>@>@B B o o V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0..+p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *@K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+, 9 9 9 &.I.^+^+]>]>> > $+$+$+l ; ; ; 0 ,,F F F f,- - - H,a a a +'-'m@m@m@= b b b k k I@I@d&d&c c '+'+'+Z=Z=& & & .,J%J%J%B.B.J%[![![!0!h!h!`{{.{.{.{.{.{.{.{.{.{.6~f f f K -~y.y.y.y.;+3~]+]+]+]+s~s~# # # # M~N~N~j j j +&+&,{j U~6{*{*{*{*{h~6{6{6{{:]:g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.T{^:J.J.J.J.E+E+q=@ @ @ @ @ @ @ @ @ @ @ @ i i e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.J.M+M+M+d+d+d+d+d+d+D+D+D+g g g g g H H H 0{e#e#e#(.(.(.,{+&+&j j j j N~M~# # # # s~s~]+]+]+]+3~;+y.y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.Y.5.5.e e e :!{&{&{&{&B.B.J%J%J%r+& & & Z=Z='+'+'+c c d&d&I@I@I@k b b b = = m@m@m@+'a a a H,- - - f,F F F ,,0 ; ; ; l l $+$+> > ]>]>^+^+I.I.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.C.C.C.7 ) ) P.P.{+{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J%K.K.b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ i=D D t=_.*@*@O=P=6 6 {+P.P.P.) ) 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+5;9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; ; 0 ,,F F T+f,- - - H,a a a +'m@m@m@= = b b b k I@I@I@d&d&c c '+'+'+Z=Z=& & & .,J%J%J%J%.,[![![![!0!h!`{{.{.{.{.{.{.{.{.{.{.6~W#f f f K K -~y.y.y.;+3~3~]+]+]+]+s~# # # # # M~N~j j j j +&+&,{/:(:*{*{*{*{*{h~6{6{6{Z]M!{.{.{.{.{.{.{.{.{.{.{.{.{.{.J;_:l]J.J.J.J.J.E+E+q=q=@ @ @ @ @ @ @ @ @ @ @ @ @ i i i i e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@i i i @ @ @ @ @ @ @ @ @ @ @ @ @ q=q=E+E+J.J.J.J.J.J.J.M+M+M+d+d+d+d+d+d+D+D+D+D+g g g g H H H H 0{e#e#e#(.(.(.,{+&+&j j j j N~N~# # # # # s~]+]+]+]+3~3~;+y.y.y.y.K K f f f P!W#W#$ $ x!Y.Y.5.5.e e e e :!{&{&{&{&B.B.J%J%J%r+& & & Z=Z='+'+'+c c d&d&I@I@I@k b b b = = m@m@m@+'a a a H,- - - f,T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.9 9 9 5;F+F+F+F+E 8 8 Q+m m m o.-+C.C.7 ) ) ) P.P.{+6 6 P=O=*@*@*@t=D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.>@>@B B o o V m.m.m. +y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.;.R R R q r r s t u v w x x y z S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X.: K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=i=D D t=*@*@*@O=6 6 6 {+P.P.) ) 7 7 C.C.-+o.m m ' Q+8 8 E F+F+F+F+5;9 9 &.I.^+^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+f,- - - H,a a a +'m@m@m@= = b b b k I@I@I@d&d&c c '+'+'+G Z=& & & .,J%J%J%& ^![![![![!0!`{{.{.{.{.{.{.{.{.{.{.6~W#W#P!f f f K -~y.y.y.y.;+3~]+]+]+]+s~s~# # # # M~N~N~j j j j +&+&N~::q~*{*{*{*{*{h~6{6{Z~<:{,{.{.{.{.{.{.{.{.{.{.{.{.{.{.r(8]J.J.J.J.J.J.J.J.E+E+q=q=@ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ i i i i i i e@e@e@e@e@e@e@e@e@e@e@e@e@i i i i i i i @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ q=q=E+E+J.J.J.J.J.J.J.J.M+M+M+d+d+d+d+d+d+d+D+D+D+D+g g g g H H H 0{e#e#e#e#(.(.(.(.,{+&j j j j N~N~M~# # # # s~s~]+]+]+]+3~;+y.y.y.y.-~K f f f P!W#W#$ $ $ Y.Y.Y.5.5.e e e e :!{&{&{&{&B.B.J%J%J%.,& & & Z=Z='+'+'+c c d&d&I@I@I@k k b b 5'= m@m@m@+'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 5;, F+F+F+E 8 8 8 ' m m o.o.C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D D i=~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+0.0.0.R.p p f.r.k.k.b.b.<.[.-.-.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *@K.K.b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>> > > $+$+l l ; ; ; 0 F F F T+- - - - H,a a a +'m@m@m@= = b b b k I@I@I@d&d&c c '+'+'+G Z=& & & .,J%J%& G)^![![![![!`{{.{.{.{.{.{.{.{.{.{.6~$ W#W#P!f f f K K y.y.y.y.;+3~3~]+]+]+]+s~s~# # # # M~N~N~j j j j +&+&[:G{*{*{*{*{*{*{h~6{6{E_=~{.{.{.{.{.{.{.{.{.{.{.{.{.{.9;}:)]M+J.J.J.J.J.J.J.J.J.J.E+E+q=q=@ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ q=q=E+E+E+J.J.J.J.J.J.J.J.J.M+M+M+d+d+d+d+d+d+d+D+D+D+D+g g g g g H H H 0{e#e#e#e#(.(.(.(.,{+&+&j j j N~N~M~# # # # s~s~]+]+]+]+3~3~;+y.y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.Y.5.5.e e e e :!{&{&{&{&B.J%J%J%J%.,& & & Z=Z='+'+'+c c d&d&I@I@I@k k b b 5'= m@m@m@+'a a a H,- - - - T+F F F 0 0 ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 ' m m m o.C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@B B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X.T#K.K.b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ i=D D D t=*@*@*@O=6 6 6 {+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 E E F+F+F+5;9 9 9 I.I.^+^+]>]>> > $+$+$+l ; ; ; 0 ,,F F F T+- - - - H,a a a +'m@m@m@= 5'b b b k I@I@I@d&d&d&c '+'+'+G Z=& & & .,Z=G)G)G)^![![!K{{.{.{.{.{.{.{.{.{.{.6~Y.x!$ $ W#W#P!f f f K K y.y.y.y.y.3~3~]+]+]+]+s~s~# # # # # M~N~N~j j j j +&%{a~*{*{*{*{*{*{*{*{h~J_{({.{.{.{.{.{.{.{.{.{.{.{.{.{.g-W^S_d+d+M+M+M+M+J.J.J.J.J.J.J.J.J.J.J.J.J.E+E+E+E+q=q=q=q=q=q=@ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ q=q=q=q=q=E+E+E+E+J.J.J.J.J.J.J.J.J.J.J.J.J.M+M+M+M+d+d+d+d+d+d+d+d+D+D+D+D+g g g g g g H H H 0{0{e#e#e#(.(.(.(.,{+&+&+&j j j j N~M~# # # # # s~s~]+]+]+]+3~3~;+y.y.y.y.-~K f f f P!W#W#$ $ $ Y.Y.Y.5.5.5.e e e :!:!{&{&{&{&B.J%J%J%r+.,& & & Z=G '+'+'+c c d&d&I@I@I@k k b b 5'= m@m@m@-'a a a H,- - - - f,F F F ,,0 ; ; ; l l $+$+> > ]>]>^+^+^+I.9 9 9 5;F+F+F+F+E 8 8 Q+' m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@_.D D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p.9.K.K.b+< < < c+: : : [ [ [ j+_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D t=_.*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+F+5;9 9 &.I.^+^+^+]>]>> > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@= 5'b b b k k I@I@d&d&d&c c '+'+G Z=& & '+Q)G)G)G)G)G)n{{.{.{.{.{.{.{.{.{.{.6~5.Y.Y.Y.$ $ $ W#W#P!f f f K K -~y.y.y.y.;+3~]+]+]+]+]+s~s~# # # # # M~N~N~j j j j s{t{*{*{*{*{*{*{*{*{*{4:r/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.5:4^d+d+d+d+d+d+d+d+d+M+M+M+M+M+M+J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.M+M+M+M+M+d+d+d+d+d+d+d+d+d+d+d+D+D+D+D+D+g g g g g g H H H H 0{0{e#e#e#(.(.(.(.(.,{+&+&j j j j j N~N~M~# # # # s~s~]+]+]+]+]+3~3~y.y.y.y.y.-~K f f f P!W#W#W#$ $ x!Y.Y.Y.5.5.e e e e :!{&{&{&{&B.B.J%J%J%r+.,& & & Z=G '+'+'+c c d&d&I@I@I@k k b b 5'= m@m@m@-'a a a H,H,- - - f,F F F ,,0 ; ; ; l l $+$+> > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.C.C.C.7 ) ) P.P.P.{+6 6 P=O=*@*@*@t=D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p f.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+,+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4&!>K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ i=i=D D t=*@*@*@O=P=6 6 {+P.P.) ) ) 7 C.C.C.o.m m m Q+8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@= = b b b k k I@I@d&d&d&c c '+'+G Z=& '+Q)Q)Y)G)G)G)n{{.{.{.{.{.{.{.{.{.{.h{5.5.Y.Y.Y.x!$ $ W#W#W#f f f f K -~y.y.y.y.y.3~3~]+]+]+]+]+s~s~# # # # # M~N~N~j j j j T_x{*{*{*{*{*{*{*{*{*{E^K~{.{.{.{.{.{.{.{.{.{.{.{.{.{.!{H{D+D+d+d+d+d+d+d+d+d+d+d+d+d+M+M+M+M+M+M+M+M+M+J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.M+M+M+M+M+M+M+M+M+d+d+d+d+d+d+d+d+d+d+d+d+d+D+D+D+D+D+g g g g g g g H H H H 0{0{e#e#e#e#(.(.(.(.(.,{+&+&j j j j N~N~M~M~# # # # s~s~]+]+]+]+]+3~3~;+y.y.y.y.-~K K f f f P!W#W#$ $ x!Y.Y.Y.5.5.5.e e e :!:!{&{&{&{&B.J%J%J%J%r+& & & & Z=G '+'+c c d&d&d&I@I@I@k k b b 5'= m@m@m@-'a a a H,H,- - - f,T+F F F 0 ; ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@_.D D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#t#U#q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Z+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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P=9.K.K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>> > > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@= = b b b k k I@I@d&d&d&c c '+'+'+Z=c Q)Q)Q)Y)G)G)n{{.{.{.{.{.{.{.{.{.{.h{e 5.5.Y.Y.Y.x!$ $ $ W#W#P!f f f K K -~y.y.y.y.;+3~3~]+]+]+]+]+s~s~# # # # # M~N~N~j j j 6:V_*{*{*{*{*{*{*{*{*{7:D]{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.]:8:D+D+D+D+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+M+M+M+M+M+M+M+M+M+M+M+M+M+M+M+M+M+M+M+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+D+D+D+D+D+D+g g g g g g g g H H H H 0{0{e#e#e#e#(.(.(.(.(.,{+&+&+&j j j j N~N~M~# # # # # # s~]+]+]+]+]+3~3~;+y.y.y.y.-~K K f f f P!W#W#W#$ $ x!Y.Y.Y.5.5.e e e e :!{&{&{&{&{&B.J%J%J%J%.,& & & & Z=G '+'+c c d&d&d&I@I@I@k k b b 5'= m@m@m@-'a a a H,H,- - - f,T+F F F 0 ; ; ; l l $+$+> > > ]>]>^+^+I.I.9 9 9 5;F+F+F+F+E 8 8 Q+' m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+i+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . % r#K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m ' Q+8 8 E E F+F+F+, 9 9 9 &.I.^+^+^+]>> > > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@= = b b b k k I@I@d&d&d&c c '+'+'+c H)Q)Q)Q)Y)G)n{{.{.{.{.{.{.{.{.{.{.h{e e 5.5.5.Y.Y.Y.x!$ $ W#W#W#P!f f f K K -~y.y.y.y.;+3~3~]+]+]+]+]+s~s~# # # # # M~N~N~j j j ${A{*{*{*{*{*{*{*{*{*{9:7){.{.{.{.{.{.{.{.{.{.{.{.{.{.y'0:g g D+D+D+D+D+D+D+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+D+D+D+D+D+D+D+D+g g g g g g g g H H H H H 0{0{e#e#e#e#(.(.(.(.(.,{,{+&+&j j j j j N~N~M~# # # # # s~s~s~]+]+]+]+3~3~;+y.y.y.y.y.-~K f f f f P!W#W#$ $ $ Y.Y.Y.5.5.5.e e e e :!{&{&{&{&{&B.J%J%J%J%.,& & & Z=Z='+'+'+c c d&d&d&I@I@I@k b b b 5'= m@m@m@-'a a a a H,- - - f,T+F F F 0 ; ; ; l l $+$+$+> > ]>]>^+^+^+I.9 9 9 5;F+F+F+F+E 8 8 8 ' m m m o.C.C.7 7 ) ) P.P.P.{+6 6 P=O=*@*@*@t=D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.-.-.;.Q R R q q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z._ 9.K.K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+]>]>> > > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@= = b b b k k I@I@I@d&d&c c '+'+d&I)H)Q)Q)Q)Q)g{{.{.{.{.{.{.{.{.{.{.h{e e e e 5.5.Y.Y.Y.Y.$ $ $ W#W#P!f f f f K -~y.y.y.y.y.;+3~3~]+]+]+]+]+s~s~# # # # # M~M~N~N~j F~a:u~u~*{*{*{*{*{*{*{e~b:{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.~]c:g g g g g D+D+D+D+D+D+D+D+D+D+D+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+D+D+D+D+D+D+D+D+D+D+D+g g g g g g g g g g H H H H H 0{0{e#e#e#e#e#(.(.(.(.(.(.,{+&+&+&j j j j N~N~N~M~# # # # # s~s~]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f P!W#W#W#$ $ x!Y.Y.Y.5.5.e e e e :!:!{&{&{&{&B.B.J%J%J%r+.,& & & Z=Z='+'+'+c c d&d&d&I@I@k k b b b 5'= m@m@m@-'a a a a H,- - - f,T+F F F 0 0 ; ; ; l $+$+$+> > ]>]>^+^+^+I.&.9 9 5;, F+F+F+E 8 8 8 ' m m m o.-+C.C.7 ) ) ) P.P.{+6 6 6 O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u v w x x y z S T T >.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=*@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 r#K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C C ] ] ] Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=6 6 6 {+P.P.) ) ) 7 C.C.C.o.m m m ' 8 8 8 E F+F+F+F+5;9 9 9 I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@= = b b b k k I@I@I@d&d&c c '+d&F'I)H)Q)Q)Q):{{.{.{.{.{.{.{.{.{.{.9~:!:!e e e 5.5.5.Y.Y.Y.x!$ $ W#W#W#P!f f f K K -~y.y.y.y.y.;+3~3~]+]+]+]+]+s~s~# # # # # # M~N~N~j d:'_u~u~u~*{*{*{*{*{*{e:)!{.{.{.{.{.{.{.{.{.{.{.{.{.{.'~f:e#g g g g g g g g g g g D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+g g g g g g g g g g g g H H H H H H 0{0{e#e#e#e#e#(.(.(.(.(.(.(.,{+&+&+&j j j j j N~N~M~M~# # # # # s~s~]+]+]+]+]+]+3~;+y.y.y.y.y.-~K K f f f P!W#W#W#$ $ x!Y.Y.Y.Y.5.5.e e e e :!{&{&{&{&{&B.J%J%J%J%r+& & & & Z=G '+'+'+c c d&d&d&I@I@k k b b b 5'= m@m@m@-'a a a a H,- - - - T+F F F 0 0 ; ; ; l $+$+$+> > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p r.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~&J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^.r#9.K.K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+x+2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+, 5;9 9 9 I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 F F F F f,- - - - H,a a a +'m@m@m@m@= 5'b b k k I@I@I@d&d&d&c I@F'F'I)H)H)Q):{{.{.{.{.{.{.{.{.{.{.9~{&:!:!e e e e 5.5.Y.Y.Y.Y.x!$ $ W#W#W#P!f f f K K -~y.y.y.y.y.;+3~3~]+]+]+]+]+s~s~# # # # # # M~M~N~3~G~u~u~u~u~u~*{*{*{*{&:U{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{./~U~H H H g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g H H H H H H H H 0{0{e#e#e#e#e#e#(.(.(.(.(.(.,{,{+&+&+&j j j j j N~N~N~M~# # # # # # s~s~]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#$ $ $ x!Y.Y.Y.5.5.e e e e :!:!{&{&{&{&{&B.J%J%J%J%.,& & & & Z=G '+'+'+c c d&d&d&I@I@k k b b b 5'= m@m@m@-'a a a a H,- - - - T+F F F 0 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.;.Q R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g:r#K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ d#} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D t=_.*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+, 5;9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 F F F F f,- - - - H,a a a +'m@m@m@m@= 5'b b k k I@I@I@d&d&d&I@t)F'F'F'H)H):{{.{.{.{.{.{.{.{.{.{.9~{&{&{&:!e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#P!f f f f K K -~y.y.y.y.y.;+3~3~]+]+]+]+]+]+s~s~# # # # # # M~N~h:i:u~u~u~u~u~u~*{*{*{A^1^{.{.{.{.{.{.{.{.{.{.{.{.{.{.j:k:5@H H H H H H H H H H g g g g g g g g g g g g g g g g g g g g g g g g g g g g H H H H H H H H H H 0{0{0{e#e#e#e#e#e#e#(.(.(.(.(.(.(.,{,{+&+&+&j j j j j N~N~N~M~# # # # # # # s~s~]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ x!Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&B.B.J%J%J%r+.,& & & & Z=G '+'+c c c d&d&I@I@I@k k b b b = = m@m@m@-'a a a H,H,- - - - T+F F F ,,0 ; ; ; l l $+$+> > ]>]>^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 ' m m o.o.C.C.7 7 ) ) P.P.P.{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ >$U+U+1 1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.a.b.b.<.[.-.-.Q R R R q r r t u u v w x x y S S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=I@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . * r#9.K.K.b+< < < c+: : : #%[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 1 U+U+>$^ ^ ^ x+2 2 C y%] ] ] Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 F F F F f,- - - - H,a a a +'m@m@m@m@= 5'b b k k I@I@I@d&d&k t)t)F'F'F'I):{{.{.{.{.{.{.{.{.{.{.9~{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#P!f f f f K K -~y.y.y.y.y.;+3~3~]+]+]+]+]+]+s~s~# # # # # # # }{Y!Q~Q~u~u~u~u~u~u~*{s_0/0,{.{.{.{.{.{.{.{.{.{.{.{.{.{.D] :e#e#0{0{0{0{H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H 0{0{0{e#e#e#e#e#e#e#e#e#(.(.(.(.(.(.(.(.,{,{+&+&+&j j j j j j N~N~N~M~M~# # # # # # s~s~]+]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ Y.Y.Y.Y.5.5.e e e e :!:!{&{&{&{&{&B.J%J%J%J%r+.,& & & Z=Z='+'+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@-'a a a H,H,- - - - T+F F F ,,0 ; ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 ' m m m o.C.C.C.7 ) ) ) P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+b+K.K.r#r#n v.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q q r s t u u v w x y y S S T >.,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.T$r#K.K.b+b+< < c+: : : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.`.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.o.o.m m ' Q+8 8 E E F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 F F F F f,- - - - H,a a a +'-'m@m@m@= 5'b b b k k I@I@d&k d)t)t)F'F'F'~{{.{.{.{.{.{.{.{.{.{.9~B.{&{&{&{&{&:!:!e e e e 5.5.Y.Y.Y.Y.x!$ $ W#W#W#P!f f f f K K -~y.y.y.y.y.;+3~3~3~]+]+]+]+]+s~s~s~# # # # # # l:m:Q~Q~Q~u~u~u~u~u~u~k:l{{.{.{.{.{.{.{.{.{.{.{.{.{.{.'!n:}{e#e#e#e#e#e#e#e#e#0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{e#e#e#e#e#e#e#e#e#e#e#e#(.(.(.(.(.(.(.(.(.(.,{,{+&+&+&+&j j j j j j N~N~N~M~M~# # # # # # s~s~s~]+]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&B.B.J%J%J%J%.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@+'a a a H,H,- - - - T+F F F ,,0 ; ; ; l l $+$+> > > ]>^+^+^+I.I.9 9 9 5;F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+Z+] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m r#r#K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 {+{+P.P.) ) ) 7 C.C.C.o.m m m ' 8 8 8 E F+F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l ; ; ; ; 0 F F F F f,- - - - H,a a a +'-'m@m@m@= 5'b b b k k I@I@b d)d)d)t)t)F'W~{.{.{.{.{.{.{.{.{.{.9~J%B.B.{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.Y.$ $ $ W#W#W#P!f f f f K K -~y.y.y.y.y.y.;+3~3~]+]+]+]+]+]+s~s~s~# # # # ]+o:u~H~Q~Q~Q~Q~u~u~u~v{o]g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.m^p:(.(.(.(.(.e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#(.(.(.(.(.(.(.(.(.(.(.(.(.,{,{+&+&+&+&j j j j j j j j N~N~N~M~M~# # # # # # # s~s~]+]+]+]+]+]+3~3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.e e e e :!:!{&{&{&{&{&B.J%J%J%J%r+.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b 5'= m@m@m@m@+'a a a H,H,- - - - T+F F F ,,0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.9 9 9 5;F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D i=i=~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ >$>$U+U+1 / / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.[.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=M+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V#n r#9.K.K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X X ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 C C ] ] ] Z+6@6@3 w.w.X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D t=_.*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > $+$+$+l ; ; ; ; 0 ,,F F F f,- - - - H,a a a a -'m@m@m@= = b b b k k I@b 4)d)d)d)t)t)W~{.{.{.{.{.{.{.{.{.{.9~J%J%B.B.{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#W#P!f f f f K K -~y.y.y.y.y.y.;+3~3~]+]+]+]+]+]+]+s~s~s~# # # |{q:v~v~H~H~Q~Q~Q~Q~u~r:N_{.{.{.{.{.{.{.{.{.{.{.{.{.{.J;s:X~(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.,{,{,{+&+&+&+&+&j j j j j j j j N~N~N~M~M~# # # # # # # # s~s~s~]+]+]+]+]+]+3~3~;+;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.e e e e e :!{&{&{&{&{&B.B.J%J%J%J%r+& & & & Z=Z=G '+'+c c c d&d&I@I@I@k k b b b 5'= m@m@m@m@+'a a a H,H,- - - f,T+F F F ,,0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.9 9 9 5;, F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.| | ( ( X X Q%Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=D.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . N+r#r#K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ d#} } } Q%X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > $+$+$+l ; ; ; ; 0 ,,F F F f,- - - - H,a a a a -'m@m@m@= = b b b k k b 4)4)d)d)d)t)W~{.{.{.{.{.{.{.{.{.{.9~J%J%J%J%B.B.{&{&{&{&{&:!e e e e e 5.5.Y.Y.Y.Y.x!$ $ $ W#W#W#P!f f f f K K -~-~y.y.y.y.y.;+;+3~3~]+]+]+]+]+]+]+s~s~s~# !/t:u~v~v~v~v~H~H~Q~Q~`!u:1_{.{.{.{.{.{.{.{.{.{.{.{.{.{.S^$~,{,{,{,{(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.,{,{,{,{+&+&+&+&+&+&+&j j j j j j j j j j N~N~N~N~M~# # # # # # # # # s~s~s~]+]+]+]+]+]+3~3~3~;+y.y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&{&B.J%J%J%J%r+.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b b 5'= m@m@m@-'+'a a a H,- - - - f,T+F F F ,,0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.9 9 9 5;, F+F+F+E 8 8 8 Q+' m m o.o.C.C.7 7 ) ) P.P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.6@6@Z+Z+] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( X X X Q%} } d#u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#q$q$&%6%o%P%P%~&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . = n r#9.K.K.b+< < < c+: : : #%[ [ [ _ _ _ _ d#} } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,a a a a -'m@m@m@m@= 5'b b b = ~)4)4)4)d)d)W~{.{.{.{.{.{.{.{.{.{.9~.,r+J%J%J%J%B.{&{&{&{&{&:!:!e e e e e 5.5.Y.Y.Y.Y.x!$ $ $ W#W#W#P!f f f f f K K -~y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+]+s~s~s~v:(:v~v~v~v~v~v~v~H~H~E_6~{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-w:{{+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&j j j j j j j j j j j j j N~N~N~N~M~M~# # # # # # # # # s~s~s~]+]+]+]+]+]+]+]+3~3~;+y.y.y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%r+.,& & & Z=Z=G '+'+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@-'+'a a a H,- - - - f,T+F F F ,,0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E E 8 8 Q+' m m m o.C.C.C.7 ) ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ R&>$U+U+1 / / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.R R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=q+/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I < r#r#K.K.b+b+< < c+: : : T$#%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C ] ] ] Z+6@6@6@w.w.X&+={ { )=)=g.g.)+)+~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,H,a a a +'m@m@m@m@= 5'b b m@~)~)4)4)4)d)E~{.{.{.{.{.{.{.{.{.{.9~& .,r+J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.Y.x!$ $ $ W#W#W#P!f f f f f K K -~y.y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+]+s~s~x:h~v~v~v~v~v~v~v~v~`!y:/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.(!z:j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j N~N~N~N~N~M~M~M~# # # # # # # # # # s~s~s~]+]+]+]+]+]+]+]+3~3~;+;+y.y.y.y.y.y.-~K K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!{&{&{&{&{&{&B.J%J%J%J%r+.,& & & & Z=Z='+'+'+c c c d&d&d&I@I@I@k k b b b = = m@m@m@-'+'a a a H,- - - - f,T+F F F 0 0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E E 8 8 8 ' m m m o.C.C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D i=i=~ ~ ~ )+g.g.g.)={ { { X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.| | | ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=>$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . #=n r#9.K.K.b+< < < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ x+x+2 2 C y%] ] ] Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,H,a a a +'-'m@m@m@= 5'b m@~)~)~)4)4)4)E~{.{.{.{.{.{.{.{.{.{.9~& & & .,r+J%J%J%J%B.{&{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.Y.x!$ $ $ W#W#W#W#P!f f f f K K K -~y.y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+]+v:A:J!J!J!v~v~v~v~v~v~B:r({.{.{.{.{.{.{.{.{.{.{.{.{.{.{.C:-:j j j j j j j j j j j j j j j j j j j j j j j j j j N~N~N~N~N~N~N~N~M~M~M~# # # # # # # # # # # # s~s~s~]+]+]+]+]+]+]+]+]+3~3~;+;+y.y.y.y.y.y.y.-~K K f f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@-'a a a a H,- - - - f,F F F F 0 0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%: : : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q r r s t u u v w x y y S S T >.,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.n r#r#K.K.K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X X ( | | n.n.r$r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ i=i=D D t=_.*@*@O=O=6 6 {+{+P.P.) ) ) 7 C.C.C.o.o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+f,- - - - H,a a a +'-'m@m@m@= = m@~)~)~)~)~)4)r~{.{.{.{.{.{.{.{.{.{.9~& & & & & r+J%J%J%J%B.B.{&{&{&{&{&{&:!e e e e e 5.5.5.Y.Y.Y.Y.x!$ $ $ $ W#W#W#P!f f f f f K K -~-~y.y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+'{h~Z!J!J!J!J!J!v~v~Z!2:z,{.{.{.{.{.{.{.{.{.{.{.{.{.{.d~D:N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~M~M~M~M~M~# # # # # # # # # # # # # # s~s~s~s~]+]+]+]+]+]+]+]+]+3~3~3~;+;+y.y.y.y.y.y.y.-~K K K f f f f P!P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=Z='+'+'+'+c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@+'a a a a H,- - - - f,F F F F 0 0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ )+)+g.g.)=)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ R&>$U+U+1 / / r$r$`.n.| | ( ( X X Q%} } } d#_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=0.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . n.n r#r#K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 C.C.C.o.m m m ' Q+8 8 8 E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+f,- - - - H,a a a a -'m@m@m@m@+'&)~)~)~)~)~)r~{.{.{.{.{.{.{.{.{.{.9~Z=Z=& & & & .,r+J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e 5.5.5.Y.Y.Y.Y.x!x!$ $ $ W#W#W#P!P!f f f f f K K -~-~y.y.y.y.y.y.y.;+;+3~3~3~]+]+]+0~a~Z!Z!Z!Z!Z!J!J!J!J!E:^~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.F:${# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # s~s~s~s~]+]+]+]+]+]+]+]+]+]+3~3~3~3~;+;+y.y.y.y.y.y.y.-~K K K f f f f f P!W#W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.J%J%J%J%J%r+& & & & & Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@+'a a a H,H,- - - - f,F F F F 0 0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } d#_ _ _ _ [ [ [ #%: : : c+< < < b+K.K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=I.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F n n r#9.K.K.b+< < < c+: : : #%[ [ [ j+_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ ^ x+2 2 C y%] ] ] Z+6@6@6@w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.C.o.m m m ' Q+8 8 8 E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F F f,- - - - H,a a a a +'m@m@m@a *)&)~)~)~)~)f~{.{.{.{.{.{.{.{.{.{.9~'+G Z=Z=& & & & .,J%J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e 5.5.5.Y.Y.Y.Y.Y.x!$ $ $ W#W#W#W#P!f f f f f K K K -~-~y.y.y.y.y.y.y.y.;+3~3~3~3~]+4~q~Z!Z!Z!Z!Z!Z!Z!Z!Z!G:y,{.{.{.{.{.{.{.{.{.{.{.{.{.{.0;H:# # # # # # # # # # # # # # # # # # # # # # # # # # # # s~s~s~s~s~s~]+]+]+]+]+]+]+]+]+]+]+3~3~3~3~;+;+y.y.y.y.y.y.y.y.-~K K K f f f f f P!P!W#W#W#$ $ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=Z='+'+'+'+c c d&d&d&I@I@I@k k k b b 5'= = m@m@m@-'+'a a a H,H,- - - - T+F F F ,,0 ; ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 O=O=*@*@_.t=D D i=i=~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7@;@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J 9.n r#r#K.K.b+b+< < c+: : : : #%[ [ [ _ _ _ u%} } } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.)+)+~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.C.o.m m m ' Q+8 8 8 E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 0 F F F F f,- - - - H,H,a a a +'-'m@a Q'*)*)~)~)~)f~{.{.{.{.{.{.{.{.{.{.9~'+'+'+Z=Z=& & & & .,r+J%J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e 5.5.5.5.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#P!f f f f f K K K -~-~y.y.y.y.y.y.y.y.y.;+;+3~I:J:>~Z!Z!Z!Z!Z!Z!Z!Z!K:p!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.L:M:# # # # # # # # # # # # # # s~s~s~s~s~s~s~s~s~s~s~]+]+]+]+]+]+]+]+]+]+]+]+]+]+3~3~3~3~;+;+y.y.y.y.y.y.y.y.y.-~K K K f f f f f f P!W#W#W#W#$ $ $ x!x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@-'a a a a H,- - - - - T+F F F ,,0 ; ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 Q+m m m o.o.C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@6@Z+] ] ] C C 2 2 x+^ ^ ^ R&>$U+U+1 / / r$r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.d.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=} . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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N:n n r#9.K.K.b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 0 F F F F T+- - - - H,H,a a a +'-'a Q'Q'Q'*)&)~)2~{.{.{.{.{.{.{.{.{.{.9~c '+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%B.{&{&{&{&{&{&:!:!e e e e e e 5.5.5.Y.Y.Y.Y.Y.x!$ $ $ W#W#W#W#P!P!f f f f f f K K K -~-~y.y.y.y.y.y.y.y.y.;+O:P:>~>~>~>~Z!Z!Z!Z!Z!Q:7){.{.{.{.{.{.{.{.{.{.{.{.{.{.K)R:s~s~s~s~s~s~s~s~s~s~s~]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+S:n!T:x~U:;+;+y.y.y.y.y.y.y.y.y.-~-~K K K f f f f f f P!W#W#W#W#$ $ $ $ x!Y.Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.B.J%J%J%J%J%r+& & & & & Z=Z='+'+'+'+c c d&d&d&I@I@I@k k k b b b 5'= m@m@m@m@+'a a a a H,- - - - f,T+F F F ,,0 ; ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 Q+m m m o.o.C.C.C.7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%: : : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+5+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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Y.v.n r#r#K.K.K.b+< < < c+: : : #%[ [ [ j+_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ ^ x+2 2 2 C ] ] ] Z+Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 &.I.^+^+^+]>]>> > > $+$+l l ; ; ; ; 0 ,,F F F T+- - - - - H,a a a a V:Q'Q'Q'Q'*)&)2~{.{.{.{.{.{.{.{.{.{.=~c c c '+'+'+G Z=& & & & & .,r+J%J%J%J%B.B.{&{&{&{&{&{&:!:!e e e e e e 5.5.5.Y.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#P!P!f f f f f f K K K K -~y.y.y.y.y.y.y.y.I:W:{~>~>~>~>~>~>~>~>~X:&~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.Y:o:]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+-~Z:D:i~y:B~`_{.{.{.{.`:y.y.y.y.y.y.y.-~-~K K K f f f f f f f P!W#W#W#W#$ $ $ $ x!x!Y.Y.Y.Y.5.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.B.J%J%J%J%J%r+.,& & & & Z=Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b 5'= = m@m@m@-'+'a a a H,H,- - - - f,T+F F F ,,0 ; ; ; l l $+$+$+> > > ]>]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 Q+m m m o.o.C.C.C.7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=-.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X*n.n n r#r#K.K.b+b+< < c+: : : T$#%[ [ [ _ _ _ u%} } } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$R&^ ^ x+x+2 2 C y%] ] ] Z+6@6@6@w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=i=D D t=_.*@*@O=O=6 6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 &.I.^+^+^+]>]>> > > $+$+l l ; ; ; ; 0 ,,F F F T+f,- - - - H,a a a - G'R'Q'Q'Q'*)V!{.{.{.{.{.{.{.{.{.{.=~d&d&c c '+'+'+'+Z=Z=& & & & & .,r+J%J%J%J%B.B.{&{&{&{&{&{&:!:!:!e e e e e 5.5.5.5.Y.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#W#P!f f f f f f f K K K K -~-~y.y.y.y.y. <.<{~{~{~{~{~>~>~>~>~+<@<{.{.{.{.{.{.{.{.{.{.{.{.{.{.Z># > > ]>]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 Q+m m m m o.C.C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$>$U+U+1 / / r$r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+K.K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+,+}+5+5+i+q+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b q.n n r#9.K.K.b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=O=6 6 {+{+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 ,,F F F F f,- - - - H,H,a - i'G'R'Q'Q'Q'V!{.{.{.{.{.{.{.{.{.{.=~d&d&d&c c c '+'+'+G Z=Z=& & & & & .,J%J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!e e e e e e 5.5.5.Y.Y.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#W#P!P!f f f f f f f K K K K -~-~-~y.=<(~Z!{~{~{~{~{~{~{~{~e~-<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.}];<3~3~3~3~3~3~3~3~;+><;_,<'<) > > ]>^+^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 Q+' m m m o.C.C.C.7 7 ) ) P.P.{+{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < b+b+K.K.r#r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=,+/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;@[ v.n r#r#K.K.b+b+< < < c+: : : #%[ [ [ _ _ _ _ d#} } Q%X X X ( ( | | n.`.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.)+)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 0 F F F F T+- - - - - H,- i'i'i'G'Q'Q'V!{.{.{.{.{.{.{.{.{.{.=~I@I@d&d&d&c c '+'+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.x!$ $ $ $ $ W#W#W#W#W#P!P!f f f f f f f f K K K K K ~<{<{~{~{~{~{~{~{~{~{~3^)'{.{.{.{.{.{.{.{.{.{.{.{.{.{..>3^=<=<(~]<^ > ]>]>^+^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 Q+' m m m o.C.C.C.7 7 ) ) P.P.P.{+6 6 6 O=*@*@*@_.t=D D i=i=~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } d#_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > q.n n r#9.K.K.b+b+< < c+: : : T$[ [ [ [ _ _ _ u%} } } Q%X X X ( | | | n.`.r$/ / / 1 U+U+>$R&^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 0 ,,F F F T+f,- - - - f,i'i'i'i'G'R'V!{.{.{.{.{.{.{.{.{.{.W!I@I@I@d&d&d&d&c c '+'+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%J%B.B.{&{&{&{&{&{&:!:!:!e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.x!$ $ $ $ $ W#W#W#W#W#W#P!P!f f f f f f f f f K W#;~>~`!`!`!{~{~{~{~{~D:+:0,{.{.{.{.{.{.{.{.{.{.{.{.{.{.z,/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{._ > ]>]>^+^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) P.P.P.{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / r$r$`.n.| | ( ( X X X Q%} } d#_ _ _ _ [ [ [ #%: : : c+< < < b+b+K.K.r#r#n v.q.q.4.H+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t#h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@:$R&^ ^ x+x+2 2 C y%] ] ] Z+6@6@6@w.w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+^+]>]>> > $+$+$+l l ; ; ; ; 0 ,,F F F T+f,- - - F i'i'i'i'i'i'V!{.{.{.{.{.{.{.{.{.{.W!k I@I@I@I@d&d&d&c c c '+'+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!e e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ W#W#W#W#W#W#P!P!P!f f f f f f f #~{<`!`!`!`!`!`!`!`!`!< > > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+)+g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 / / / r$`.n.| | | ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=H.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 q.v.n r#r#K.K.b+b+< < < c+: : : #%[ [ [ j+_ _ _ d#} } Q%Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+l l ; ; ; ; 0 ,,F F F F f,- - F 8'8'i'i'i'i' ){.{.{.{.{.{.{.{.{.{.i)k k k I@I@I@I@d&d&d&c c c '+'+'+'+G Z=& & & & & .,.,r+J%J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!:!e e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ $ W#W#W#W#W#W#W#P!P!P!f f $ 4{>~`!`!`!`!`!`!`!`!&:o]g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.}<$ $ $ $ x!x!Y.Y.Y.Y.Y.Y.5.5.5.5.5.e e e e e e e :!:!{&{&{&{&{&{&{&{&B.B.J%J%J%J%J%r+.,& & & & & Z=Z=G '+'+'+'+c c c d&d&d&I@I@I@I@k k b b b b = = m@m@m@m@-'+'a a a a H,- - - - - T+F F F F 0 0 ; ; ; l l $+$+$+> > > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@Z+Z+] ] ] y%C 2 2 x+x+^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } d#_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#t#U#q$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=(*g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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H q.q.n n r#9.K.K.b+b+< < c+: : : T$[ [ [ [ _ _ _ u%} } } Q%X X X ( ( | | n.`.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+, 9 9 9 9 I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 0 F F F F T+f,F 8'8'8'i'i'i' ){.{.{.{.{.{.{.{.{.{.i)b b k k k I@I@I@d&d&d&d&c c c '+'+'+'+Z=Z=& & & & & & .,r+J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&:!:!:!e e e e e e e 5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ $ $ W#W#W#W#W#W#W#W#W#@~|< ~`!`!`!`!`!`!`!`!1<;{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;2 > > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } d#_ _ _ _ [ [ [ #%: : : : c+< < b+b+K.K.r#r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . )=q.v.n r#r#9.K.K.b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ i=i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+, 9 9 9 9 I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 ,,F F F T+,,8'8'8'8'8'i' ){.{.{.{.{.{.{.{.{.{.i)b b b b k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & .,r+J%J%J%J%J%J%B.B.{&{&{&{&{&{&{&{&:!:!:!e e e e e e e 5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ $ $ $ W#W#W#W#W#3<>~]!]!]!]!]! ~ ~ ~[!u:1_{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.v)4 > > ]>]>^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / / r$`.n.| | | ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f q.q.v.n r#r#K.K.b+b+< < < c+: : : #%[ [ [ j+_ _ _ d#} } } Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ i=i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+, 9 9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 ,,F F F ; ('8'8'8'8'8' ){.{.{.{.{.{.{.{.{.{.i)= 5'b b b b k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & .,r+J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e 5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.x!x!x!$ $ $ $ $ $ $ $ 5<6<]!]!]!]!]!]!]!]!]!5~6~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.7<$<5.5.5.5.e e e e e e e e :!:!:!{&{&{&{&{&{&{&{&B.B.J%J%J%J%J%J%r+r+.,& & & & & Z=Z=G '+'+'+'+c c c d&d&d&d&I@I@I@I@k k b b b b 5'= m@m@m@m@m@+'a a a a H,H,- - - - f,T+F F F F 0 0 ; ; ; ; l l $+$+$+> > ]>]>]>^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 Q+m m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.K.r#r#n v.q.q.4.H+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=p . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F=q.q.n n r#9.K.K.b+b+< < c+: : : T$#%[ [ [ _ _ _ _ d#} } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] ] Z+Z+6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+, 5;9 9 9 &.I.^+^+^+^+]>]>> > $+$+$+l l l ; ; ; 0 0 F F ; ('('('8'8'8' ){.{.{.{.{.{.{.{.{.{.i)m@= = 5'b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & .,.,r+J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e e 5.5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.x!x!x!x!$ $ $ 8<>~K!K!K!K!K!K!K!K!9 > > ]>]>^+^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 Q+m m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=i=~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] ] C C 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%Q%} } d#_ _ _ _ [ [ [ #%: : : : c+< < b+b+K.K.r#r#n n q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . '+q.q.v.n r#r#9.K.K.b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.`.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&{ { { )=g.g.g.)+)+~ ~ ~ i=D D D t=_.*@*@*@O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+, 5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 ,,; ('('('('8'8' ){.{.{.{.{.{.{.{.{.{.i)m@m@m@= = b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & & .,r+J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e e e 5.5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.4(R!g!g!g!g!g!g!g!K!a > > ]>]>^+^+^+^+I.&.9 9 9 5;F+F+F+F+E E 8 8 8 Q+m m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=i=~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.w.6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 1 / / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < < b+K.K.9.r#n n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i._ q.q.v.n r#r#K.K.b+b+< < < c+: : : #%[ [ [ j+_ _ _ u%} } } Q%X X X ( | | n.n.`.r$/ / / 1 U+U+>$>$^ ^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&{ { { )=g.g.g.)+)+~ ~ ~ i=D D D t=_.*@*@*@O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m m Q+8 8 8 E E F+F+F+F+5;9 9 9 &.I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 l ('('('('('(' ){.{.{.{.{.{.{.{.{.{.i)m@m@m@m@m@= 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=Z=& & & & & & .,r+J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&:!:!:!:!e e e e e e e e e e e 5.5.5.5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.4<-_A!A!A!A!A!A!t!e > > ]>]>^+^+^+I.I.9 9 9 9 5;F+F+F+F+E E 8 8 8 Q+m m m m o.C.C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ )+)+g.g.g.)={ { { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / / r$`.n.| | | ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=#=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e>4.q.q.n n r#9.K.K.b+b+< < c+: : : : #%[ [ [ _ _ _ _ d#} } } Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m m Q+8 8 8 E E F+F+F+F+5;9 9 9 9 I.I.^+^+^+]>]>> > > $+$+$+l l l ; ; ; l ,'_'('('('('7!{.{.{.{.{.{.{.{.{.{.i)+'-'m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G G Z=Z=& & & & & & .,r+r+J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!e e e e e e e e e e e e 5.5.5.5.5.5.5.5.5.5.5.5.Q!i > > ]>]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E E 8 8 8 Q+m m m o.o.C.C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ )+)+g.g.g.)={ { { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$>$U+U+1 [@/ / r$`.n.n.| | ( ( X X Q%} } } d#_ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_@X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h n$R&^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.o.o.m m m Q+8 8 8 8 E F+F+F+F+, 9 9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+l l ; ; $+$','_'('('('~!{.{.{.{.{.{.{.{.{.{.i)a a +'-'m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+'+G Z=Z=Z=& & & & & & .,r+r+J%J%J%J%J%J%J%B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!e e e e e e e e e e e e e e e e 5.5.5.5.5.o > > ]>]>^+^+^+^+I.&.9 9 9 9 , F+F+F+F+E 8 8 8 8 ' m m m o.o.C.C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+K.K.9.r#n n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=^ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ' 4.q.q.v.n r#r#K.K.b+b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.`.r$r$/ / [@1 U+U+>$R&^ ^ x+x+2 2 C C ] ] ] y*Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.C.o.o.m m m ' 8 8 8 8 E F+F+F+F+, 5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+l l ; $+$'$',','_'('~!{.{.{.{.{.{.{.{.{.{.i)a a a a -'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c c '+'+'+'+G G Z=Z=& & & & & & & .,r+r+J%J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!:!e e e e e e e e e e e e e e e e .,r > > ]>]>^+^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 8 ' m m m o.o.C.C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p=4.4.q.q.n n r#9.K.K.b+b+< < c+c+: : : #%[ [ [ j+_ _ _ d#} } } Q%X X X ( | | | n.`.r$/ / / 1 U+U+U+>$^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.P.) ) 7 7 C.C.C.o.o.m m m ' 8 8 8 8 E F+F+F+F+, 5;9 9 9 &.I.I.^+^+^+]>]>> > > $+$+$+$+l > $'$'$'$','_'~!{.{.{.{.{.{.{.{.{.{.i)H,a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&d&c c c '+'+'+'+'+G Z=Z=Z=& & & & & & & .,.,r+J%J%J%J%J%J%J%J%J%B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!:!:!:!e e e e e e e e e e O);_h!h!1 > > ]>]>]>^+^+^+I.I.&.9 9 9 5;F+F+F+F+F+E 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] ] C C 2 2 x+x+^ ^ ^ >$U+U+1 1 / / r$r$`.n.| | | ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : c+c+< < b+b+K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+Q.1+W.W.>@O B o o @V m.m. + +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ~ 4.q.q.v.n n r#9.K.K.b+< < < c+: : : T$#%[ [ [ _ _ _ _ d#} } } Q%X X ( ( | | n.n.`.r$/ / / 1 U+U+U+>$^ ^ ^ x+2 2 2 C y%] ] ] Z+Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.P.) ) 7 7 C.C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+F+5;9 9 9 9 I.I.^+^+^+^+]>]>> > > $+$+$+> (,$'$'$'$','-!{.{.{.{.{.{.{.{.{.{.i)- H,H,a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+G Z=Z=Z=& & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!:!:!:!:!:!d v > > ]>]>^+^+^+^+I.I.9 9 9 9 5;F+F+F+F+E E 8 8 8 Q+' m m m o.-+C.C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / / r$`.n.n.| | ( ( X X Q%} } } d#_ _ _ _ [ [ [ #%: : : : c+< < < b+K.K.9.r#n n v.q.q.4.H+H+H+`+`+=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # G+4.q.q.v.n r#r#K.K.K.b+< < < c+: : : T$[ [ [ [ _ _ _ u%d#} } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$>$^ ^ ^ x+2 2 2 C y%] ] ] Z+Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.P.) ) 7 7 C.C.C.-+o.m m m ' Q+8 8 8 E E F+F+F+F+, 9 9 9 9 &.I.^+^+^+^+]>]>> > > $+$+]>(,(,(,$'$'$']){.{.{.{.{.{.{.{.{.{.i)- - - H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@I@d&d&d&d&d&c c c '+'+'+'+'+'+G Z=Z=Z=& & & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&O)z > > ]>]>^+^+^+^+I.&.9 9 9 9 , F+F+F+F+E E 8 8 8 Q+' m m m o.-+C.C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } d#u%_ _ _ [ [ [ [ T$: : : c+< < < b+K.K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=D.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g.G+4.q.q.n n r#r#K.K.b+b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.-+o.m m m m Q+8 8 8 8 E F+F+F+F+, 5;9 9 9 &.I.I.^+^+^+]>]>]>> > > ]>R,R,(,(,$'$']){.{.{.{.{.{.{.{.{.{.i)- - - - H,H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k k I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+'+G Z=Z=Z=& & & & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&D > > ]>]>]>^+^+^+I.I.&.9 9 9 5;, F+F+F+F+E 8 8 8 8 Q+m m m m o.-+C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+b+K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j H+4.q.q.q.n n r#9.K.K.b+b+< < c+: : : : #%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.`.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.-+o.m m m m ' 8 8 8 8 E F+F+F+F+F+5;9 9 9 9 I.I.^+^+^+^+]>]>> > ^+R,R,R,(,(,(,]){.{.{.{.{.{.{.{.{.{.i)f,- - - - - H,H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b b k k k I@I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+'+G G Z=Z=Z=& & & & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&G > > ]>]>^+^+^+^+I.I.9 9 9 9 5;F+F+F+F+F+E 8 8 8 8 ' m m m m o.-+C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$`.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#n n v.q.q.4.H+H+H+`+`+=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ~ G+4.q.q.v.n r#r#9.K.K.b+< < < c+: : : T$#%[ [ [ _ _ _ _ d#} } } Q%X X X ( | | | n.`.r$r$/ / 1 1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.o.o.m m m ' Q+8 8 8 E E F+F+F+F+, 9 9 9 9 &.I.^+^+^+^+]>]>]>^+x,x,R,R,R,(,h){.{.{.{.{.{.{.{.{.{.i)F T+- - - - - - H,H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b b k k k k I@I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+'+'+G Z=Z=Z=Z=& & & & & & & & & & .,.,r+r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.B.B.B.B.K<]!A!R)L<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.0,M > > ]>]>]>^+^+^+^+I.&.9 9 9 9 , F+F+F+F+F+E 8 8 8 8 ' m m m o.o.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.w.6@6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 1 / / r$r$`.n.| | | ( X X X Q%} } } d#_ _ _ _ [ [ [ #%T$: : : c+< < < b+K.K.9.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@O B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (.H+G+4.q.q.n n r#r#K.K.b+b+< < < c+: : : T$[ [ [ [ _ _ _ _ d#} } Q%Q%X X ( ( | | n.n.`.r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.o.o.m m m ' Q+8 8 8 E E F+F+F+F+, 5;9 9 9 9 I.I.^+^+^+^+]>I.x,x,x,R,R,R,h){.{.{.{.{.{.{.{.{.{.i)F F T+f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@= = = 5'b b b b k k k k I@I@I@I@I@d&d&d&d&d&d&c c c c c '+'+'+'+'+'+G G Z=Z=Z=Z=& & & & & & & & & & & & .,.,r+r+r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%N<]!]!]!A~J;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.(;O<'+'+'+'+c c c c d&d&d&d&d&d&I@I@I@I@I@k k k k b b b b 5'= = = m@m@m@m@m@-'+'a a a a a H,H,- - - - - - f,T+F F F F ,,0 0 ; ; ; ; l l $+$+$+$+> > > ]>]>^+^+^+^+I.I.&.9 9 9 5;, F+F+F+F+E E 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) ) P.P.{+{+6 6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.6@6@6@Z+y*] ] ] C 2 2 2 x+x+^ ^ R&>$U+U+U+1 / / / r$`.n.n.| | ( ( X X Q%Q%} } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o o V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=1+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D H+4.q.q.q.n n r#9.K.K.b+b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.`.r$/ / / 1 U+U+U+>$^ ^ ^ x+x+2 2 2 C ] ] ] y*Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@O=P=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.-+o.m m m m Q+8 8 8 8 E F+F+F+F+F+5;9 9 9 9 &.I.^+^+^+^+I.o,o,x,x,x,R,h){.{.{.{.{.{.{.{.{.{.i)F F F F T+f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@m@= = 5'b b b b b k k k k I@I@I@I@I@d&d&d&d&d&d&c c c c c '+'+'+'+'+'+'+G G Z=Z=Z=Z=Z=& & & & & & & & & & & & & .,.,.,.,r+r+r+r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%P<]!]!]!Q<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.h{R > > ]>]>]>^+^+^+^+I.&.9 9 9 9 5;F+F+F+F+F+E 8 8 8 8 Q+m m m m o.-+C.C.C.7 7 ) ) ) P.P.{+{+6 6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.6@6@6@Z+y*] ] ] C C 2 2 x+x+^ ^ ^ >$U+U+U+1 / / / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : c+< < < b+b+K.K.9.r#n n q.q.q.4.H+H+H+`+`+=.=.<+~+~+~+1+1+W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H H+H+4.q.q.v.n n r#9.K.K.b+b+< < c+: : : : #%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+U+>$^ ^ ^ x+2 2 2 C C ] ] ] y*Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) 7 7 C.C.C.-+o.m m m m ' 8 8 8 8 E F+F+F+F+F+, 5;9 9 9 &.I.I.^+^+9 6,o,o,x,x,x,h){.{.{.{.{.{.{.{.{.{.i)0 ,,F F F F T+f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@m@= = 5'5'b b b b b k k k k I@I@I@I@I@d&d&d&d&d&d&d&c c c c c '+'+'+'+'+'+'+'+G G Z=Z=Z=Z=Z=& & & & & & & & & & & & & & & & & & .,.,.,.,.,.,.,.,.,.,r+r+S<]!]!]!T<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.C!@@d&d&d&d&d&d&I@I@I@I@I@k k k k b b b b b 5'5'= = m@m@m@m@m@m@-'+'a a a a a H,H,- - - - - - f,T+F F F F F 0 0 ; ; ; ; ; l l $+$+$+$+> > > ]>]>^+^+^+^+I.I.&.9 9 9 9 , F+F+F+F+F+E 8 8 8 8 ' m m m m o.-+C.C.C.7 7 ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] C C 2 2 2 x+^ ^ ^ >$>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < < b+K.K.9.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+<+~+~+Q.1+W.>@>@O B o o @V m.m. + +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _.H+G+4.q.q.v.n r#r#K.K.K.b+< < < c+: : : : #%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$>$^ ^ ^ x+2 2 2 C C ] ] ] y*Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.-+o.o.m m m ' Q+8 8 8 E E F+F+F+F+, 5;9 9 9 9 &.I.^+9 6,6,o,o,o,x,W'{.{.{.{.{.{.{.{.{.{.X'; 0 ,,F F F F F T+f,- - - - - - H,H,a a a a a +'+'-'m@m@m@m@m@m@= = 5'b b b b b b k k k k I@I@I@I@I@I@d&d&d&d&d&d&c c c c c c '+'+'+'+'+'+'+'+'+G G G Z=Z=Z=Z=Z=Z=& & & & & & & & & & & & & & & & & & & & & & & C<]!]!]!U<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.V > > ]>]>]>^+^+^+^+I.&.9 9 9 9 5;, F+F+F+F+E E 8 8 8 Q+' m m m o.o.-+C.C.7 7 7 ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ >$>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ #%T$: : : c+< < < b+K.K.K.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g 4.H+G+4.q.q.n n r#r#K.K.b+b+< < < c+: : : T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$>$^ ^ ^ x+2 2 2 C C ] ] ] y*Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=i=D D D _.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.o.o.m m m m Q+8 8 8 8 E F+F+F+F+F+, 9 9 9 9 &.I.5;6,6,6,6,o,o,W'{.{.{.{.{.{.{.{.{.{.X'; ; 0 0 ,,F F F F F T+f,- - - - - - H,H,a a a a a a +'-'m@m@m@m@m@m@= = = 5'b b b b b k k k k k I@I@I@I@I@I@d&d&d&d&d&d&d&c c c c c c c '+'+'+'+'+'+'+'+'+'+G G G Z=Z=Z=Z=Z=Z=Z=Z=Z=& & & & & & & & & & & & & & '+W<]!]!]!c>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-X > > > ]>]>^+^+^+^+I.I.&.9 9 9 9 5;F+F+F+F+F+E 8 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$`.n.| | | ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.r#r#n n q.q.4.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o V V m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=G+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P=H+H+4.q.q.q.n n r#9.K.K.b+b+< < < c+: : : T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( | | | n.`.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C C ] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=i=D D D t=*@*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' 8 8 8 8 E E F+F+F+F+, 5;9 9 9 9 , 6,6,6,6,6,o,W'{.{.{.{.{.{.{.{.{.{.X'; ; ; ; 0 0 ,,F F F F F T+f,- - - - - - H,H,H,a a a a a +'-'-'m@m@m@m@m@m@= = = 5'b b b b b b k k k k I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&c c c c c c c '+'+'+'+'+'+'+'+'+'+'+'+'+G G G G G Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Y<]!]!]!Z<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.|~` > > ]>]>]>^+^+^+^+I.&.9 9 9 9 5;, F+F+F+F+E E 8 8 8 8 Q+m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$`.n.| | | ( ( X X Q%Q%} } d#u%_ _ _ j+[ [ [ T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.H+H+H+g@`+=.=.<+<+~+~+Q.1+W.>@>@O B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d+q.H+H+4.q.q.v.n n r#9.K.K.b+b+< < c+c+: : : #%[ [ [ j+_ _ _ u%d#} } Q%Q%X X ( ( | | | n.`.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+)+~ ~ ~ i=i=D D D t=*@*@*@*@O=P=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.-+o.o.m m m ' Q+8 8 8 8 E F+F+F+F+F+, 9 9 9 F+7,6,6,6,6,6,W'{.{.{.{.{.{.{.{.{.{.X'l ; ; ; ; ; 0 0 ,,F F F F F T+f,- - - - - - - H,H,a a a a a a +'-'m@m@m@m@m@m@m@= = 5'5'b b b b b b k k k k k I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&c c c c c c c c c '+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+G G G []!]!]!.~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.c!.[b b b b b b 5'5'= = m@m@m@m@m@m@m@-'+'a a a a a a H,H,H,- - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l $+$+$+$+> > > > ]>]>^+^+^+^+I.I.&.9 9 9 9 5;F+F+F+F+F+E E 8 8 8 Q+' m m m m o.-+C.C.C.7 7 ) ) ) P.P.{+{+{+6 6 P=O=*@*@*@*@t=D D D i=i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 1 / / r$r$`.n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < < b+K.K.9.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {+H+H+G+4.q.q.v.n r#r#9.K.K.b+< < < c+: : : : #%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.`.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.o.o.m m m m Q+8 8 8 8 E E F+F+F+F+, 5;9 F+_,_,7,6,6,6,W'{.{.{.{.{.{.{.{.{.{.X'$+l l ; ; ; ; ; 0 0 ,,F F F F F T+f,- - - - - - - H,H,a a a a a a +'+'-'m@m@m@m@m@m@m@= = = 5'b b b b b b k k k k k k I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&c c c c c c c c c c c '+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'++[]!]!]!@[/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.#[b b b 5'5'= = = m@m@m@m@m@m@-'-'+'a a a a a a H,H,- - - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+> > > > ]>]>^+^+^+^+^+I.&.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+' m m m o.o.-+C.C.7 7 7 ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@t=D D D i=i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 1 / / / r$`.n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < < b+K.K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o V V m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=(*j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M+q.H+H+G+4.q.q.n n r#r#K.K.K.b+< < < c+: : : : #%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.`.r$/ / / 1 1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 E E F+F+F+F+F+, F+_,_,_,_,6,6,W'{.{.{.{.{.{.{.{.{.{.X'$+$+l l l ; ; ; ; ; 0 0 ,,F F F F F T+f,f,- - - - - - H,H,H,a a a a a a +'-'-'m@m@m@m@m@m@m@= = = 5'b b b b b b b k k k k k k I@I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&d&d&d&c c c c c c c c c c c c c c c c c c c c c $[]!]!]!Q<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.%[= = = m@m@m@m@m@m@m@-'-'+'a a a a a a H,H,H,- - - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+$+> > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;F+F+F+F+F+E E 8 8 8 8 ' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@_.t=D D D i=i=~ ~ ~ )+)+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 / / / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.r#r#n n q.q.q.4.H+H+H+`+`+=.=.<+~+~+~+Q.1+W.>@>@B B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=< . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ) H+H+H+4.q.q.q.n n r#r#K.K.b+b+< < < c+: : : T$#%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.`.r$/ / / 1 1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.o.m m m ' Q+8 8 8 8 E F+F+F+F+F+E ),_,_,_,_,7,N'{.{.{.{.{.{.{.{.{.{.U>> $+$+$+l l l ; ; ; ; ; 0 0 ,,F F F F F F T+f,- - - - - - - H,H,a a a a a a a +'-'-'m@m@m@m@m@m@m@= = = 5'5'b b b b b b b k k k k k k k I@I@I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&c c c c c c c c &[]!]!]!T<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{,*[m@m@m@m@m@m@m@-'+'a a a a a a a H,H,- - - - - - - f,T+T+F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+$+> > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 / / / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.H+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9*a+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+4.H+H+H+4.q.q.v.n n r#9.K.K.b+b+< < < c+: : : T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | n.n.`.r$/ / / 1 1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' 8 8 8 8 E E F+F+F+8 h>X>),_,_,_,A,{.{.{.{.{.{.{.{.{.{.U>> > $+$+$+$+l l l ; ; ; ; ; 0 0 ,,F F F F F F T+f,- - - - - - - - H,H,a a a a a a a +'-'-'m@m@m@m@m@m@m@m@= = = 5'5'b b b b b b b b k k k k k k k I@I@I@I@I@I@I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&=[]!]!]!U<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.F<-[m@m@-'-'+'a a a a a a a H,H,H,- - - - - - - f,T+F F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>^+^+^+^+^+I.I.9 9 9 9 9 , F+F+F+F+F+E E 8 8 8 8 Q+m m m m o.o.C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { +=X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+c+< < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.Q R R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 g@H+H+G+4.q.q.v.n r#r#9.K.K.b+b+< < c+c+: : : T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=i=D D D t=*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 8 E E F+8 h>h>h>),_,_,A,{.{.{.{.{.{.{.{.{.{.U>> > > > $+$+$+$+l l l ; ; ; ; ; 0 0 0 ,,F F F F F T+T+f,- - - - - - - H,H,H,a a a a a a a +'+'-'m@m@m@m@m@m@m@m@= = = = 5'5'b b b b b b b b b k k k k k k k k k I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@k >~]!]!]!(<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.;[>[+'a a a a a a a H,H,H,- - - - - - - - f,T+F F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$n.n.| | | ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%: : : : c+< < < b+K.K.K.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.>@>@B B o o @V m.m. + +y+y+y+l+l+l+l+:.:.:.:.#+#+#+3.3.0.0..+R.p p r.r.k.a.a.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ j@H+H+H+G+4.q.q.v.n r#r#K.K.K.b+< < < c+: : : : #%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.o.o.m m m m ' 8 8 8 8 E E 8 h>h>h>h>X>),A,{.{.{.{.{.{.{.{.{.{.U>]>]>> > > > $+$+$+$+l l l ; ; ; ; ; ; 0 0 ,,F F F F F F T+f,- - - - - - - - H,H,H,a a a a a a a +'+'-'-'m@m@m@m@m@m@m@m@m@= = = = 5'5'b b b b b b b b b b k k k k k k k k k k k k I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@,[]!]!]!T!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.'[a a a a a H,H,H,- - - - - - - - f,T+F F F F F F ,,0 0 0 ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+m m m m o.o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.| | | ( X X X Q%Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.<+~+~+~+Q.1+W.W.>@O B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.<.[.[.-.-.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E `+H+H+H+4.4.q.q.n n r#r#K.K.K.b+< < < c+: : : : #%[ [ [ j+_ _ _ u%d#} } } Q%X X X ( ( | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.)+~ ~ ~ ~ ~ i=D D D t=_.*@*@*@O=O=P=6 6 {+{+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 8 ' y>h>h>h>h>h>='{.{.{.{.{.{.{.{.{.{.U>^+]>]>]>> > > > $+$+$+$+l l l ; ; ; ; ; ; 0 0 ,,F F F F F F T+T+f,- - - - - - - - H,H,H,a a a a a a a a +'+'-'m@m@m@m@m@m@m@m@m@m@= = = = = 5'5'b b b b b b b b b b b b b b k k k k k k k k k k k k k k k k k k k k k )[]!]!]!![{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.~[a H,H,H,- - - - - - - - f,f,T+F F F F F F ,,0 0 ; ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.&.9 9 9 9 9 5;F+F+F+F+F+F+E 8 8 8 8 Q+' m m m m o.o.C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.| | | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.H+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@O B B o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8$J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I ;#g@H+H+H+4.q.q.q.n n r#r#K.K.b+b+< < < c+: : : : #%[ [ [ j+_ _ _ u%d#} } Q%Q%X X X ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C C ] ] ] y*Z+6@6@6@3 w.w.X&X&{ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D _.*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.o.m m m m ' Q+8 8 m y>y>h>h>h>h>='{.{.{.{.{.{.{.{.{.{.U>^+^+^+]>]>]>> > > > $+$+$+$+l l l l ; ; ; ; ; 0 0 0 ,,F F F F F F T+f,f,- - - - - - - - H,H,H,a a a a a a a a a +'-'-'m@m@m@m@m@m@m@m@m@m@m@= = = = = = 5'5'5'b b b b b b b b b b b b b b b b b b b b b b k k k k k k {[]!]!]!@[/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.J;J,- - - - - - - - - f,T+F F F F F F ,,,,0 0 ; ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.I.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+m m m m o.o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+{+6 6 P=O=O=*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.| | | ( ( X X X Q%} } } u%_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x y y S S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=+=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m@`+g@H+H+G+4.q.q.v.n n r#9.K.K.b+b+< < < c+: : : T$#%[ [ [ j+_ _ _ u%} } } Q%Q%X X X ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C C ] ] ] y*Z+6@6@6@3 w.w.X&X&{ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D t=*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.m m m m ' Q+8 m y>y>y>y>h>h>='{.{.{.{.{.{.{.{.{.{.U>^+^+^+^+^+]>]>]>> > > > $+$+$+$+$+l l l ; ; ; ; ; ; 0 0 ,,F F F F F F F T+f,f,- - - - - - - - - H,H,H,a a a a a a a a a +'+'-'-'m@m@m@m@m@m@m@m@m@m@m@m@= = = = = = = 5'5'5'5'5'b b b b b b b b b b b b b b b b b b b b ][]!]!]!^[{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.0;/[- - - - - f,T+F F F F F F F ,,0 0 0 ; ; ; ; ; l l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.C.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ ~ )+g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+c+< < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r r t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=N.;@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.| `+H+H+H+G+4.q.q.v.n r#r#9.K.K.b+b+< < < c+: : : T$[ [ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C C ] ] ] ] Z+Z+6@6@3 w.w.X&X&{ { { )=)=g.g.g.g.)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@O=O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.o.m m m m ' o.y>y>y>y>y>y>='{.{.{.{.{.{.{.{.{.{.U>I.I.^+^+^+^+^+]>]>]>> > > > > $+$+$+$+l l l ; ; ; ; ; ; 0 0 0 ,,F F F F F F F T+f,f,- - - - - - - - - H,H,H,H,a a a a a a a a a +'+'+'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@= = = = = = = = = = = 5'5'5'5'5'5'5'5'5'5'5'5'5'([]!]!]!j~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.a'>[- f,T+T+F F F F F F ,,,,0 0 ; ; ; ; ; ; l l l $+$+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+F+E 8 8 8 8 8 ' m m m m o.o.-+C.C.C.7 7 ) ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : : c+< < < b+K.K.K.r#r#n n q.q.4.4.H+H+H+`+`+=.=.<+~+~+~+Q.1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t t u u v w x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=$+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $ =.`+H+H+H+G+4.q.q.v.n r#r#9.K.K.b+b+< < < c+: : : T$[ [ [ [ _ _ _ _ u%} } } Q%X X X ( ( | | | n.n.r$r$/ / [@1 U+U+U+>$R&^ ^ ^ x+2 2 2 C C ] ] ] ] Z+Z+6@6@3 w.w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.m m m m C.z>y>y>y>y>y>='{.{.{.{.{.{.{.{.{.{.U>9 &.I.I.^+^+^+^+^+]>]>]>]>> > > > $+$+$+$+l l l l ; ; ; ; ; ; 0 0 0 ,,F F F F F F F T+f,f,- - - - - - - - - - H,H,H,H,a a a a a a a a a a +'+'+'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@= = = = = = = = = = = _[]!]!]!:[{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.<[F F F F F F F ,,,,0 0 ; ; ; ; ; ; ; l l l $+$+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.C.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=O=*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ #%: : : : c+< < < b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@O B B o o V V m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=r.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . { `+g@H+H+H+4.4.q.q.n n r#r#K.K.K.b+< < < c+c+: : : T$[ [ [ [ _ _ _ _ u%} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 2 C ] ] ] ] Z+Z+6@6@3 w.w.X&X&+={ { { )=)=g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=*@*@*@*@O=O=6 6 6 {+{+{+P.P.P.) ) ) 7 7 C.C.C.C.o.o.m m C.i>z>y>y>y>y>Q,{.{.{.{.{.{.{.{.{.{.U>9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>> > > > $+$+$+$+$+l l l ; ; ; ; ; ; ; 0 0 ,,,,F F F F F F F T+T+f,- - - - - - - - - - - H,H,H,H,a a a a a a a a a a a a a +'+'+'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@+'>~]!]!]![[[<}[i,{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.|[F F F F ,,0 0 0 ; ; ; ; ; ; l l l l $+$+$+$+> > > > > ]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 ) ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+g.g.g.g.)=)={ { { X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q q r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=Y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D+H+`+g@H+H+H+4.q.q.q.n n r#r#K.K.K.b+< < < c+: : : : T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@O=O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.o.C.i>i>i>z>y>y>Q,{.{.{.{.{.{.{.{.{.{.U>5;9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>> > > > > $+$+$+$+l l l l ; ; ; ; ; ; ; 0 0 ,,,,F F F F F F F F T+f,f,- - - - - - - - - - - H,H,H,H,H,a a a a a a a a a a a a a a a +'+'+'+'-'-'-'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@1[2[ ~]!]!]!]!3[+<4[c>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.=^o',,0 0 0 ; ; ; ; ; ; l l l l $+$+$+$+$+> > > > ]>]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 8 Q+m m m m m o.-+C.C.C.C.7 7 ) ) ) P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.3 6@6@6@Z+y*] ] ] C C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y S S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 =.`+g@H+H+H+4.q.q.q.n n r#r#K.K.b+b+< < < c+: : : : #%[ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=P=6 6 6 {+{+{+P.P.P.) ) ) 7 7 C.C.C.C.-+7 i>i>i>i>i>z>Q,{.{.{.{.{.{.{.{.{.{.U>F+5;9 9 9 9 9 &.&.I.I.^+^+^+^+^+]>]>]>> > > > > $+$+$+$+$+l l l l ; ; ; ; ; ; ; 0 0 0 ,,F F F F F F F F T+T+f,f,- - - - - - - - - - - - - H,H,H,H,H,a a a a a a a a a a a a a a a a a a a a a +'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'- 5[q!z!]!]!]!]!]!6[7[8[s^{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.(<9[; ; ; ; ; ; ; l l l l $+$+$+$+> > > > > ]>]>]>^+^+^+^+^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+F+E 8 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 ) ) ) ) P.P.P.{+{+6 6 6 P=O=O=*@*@*@_.t=D D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { +=X&X&w.w.3 6@6@Z+Z+] ] ] ] C C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.-.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8$M+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I < =.`+g@H+H+G+4.q.q.v.n n r#9.K.K.b+b+< < < c+: : : : #%[ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+x+2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&{ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=*@*@*@*@O=O=P=6 6 6 {+{+P.P.P.) ) ) ) 7 7 C.C.C.F,0>0>i>i>i>i>G,{.{.{.{.{.{.{.{.{.{.U>F+F+, 5;9 9 9 9 9 9 &.I.I.^+^+^+^+^+]>]>]>]>> > > > > $+$+$+$+$+l l l l ; ; ; ; ; ; ; 0 0 0 ,,F F F F F F F F F T+T+f,f,- - - - - - - - - - - - - - - H,H,H,H,H,H,a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a 0[a[ > > > > ]>]>]>^+^+^+^+^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { +=X&X&w.w.3 6@6@Z+Z+] ] ] ] C C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.4.H+H+H+g@`+=.=.<+<+~+~+Q.1+W.W.>@O B B o o V V m.m. +y+y+y+y+l+l+l+l+:.:.:.:.#+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q q r r t u u v v w x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=X&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -'=.=.`+H+H+H+G+4.q.q.v.n n r#9.K.K.b+b+< < < c+: : : : #%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 1 U+U+>$R&^ ^ ^ x+x+2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { )=)=)=g.g.g.)+)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@*@O=P=6 6 6 {+{+{+P.P.P.) ) ) 7 7 7 C.) |>0>0>0>i>i>j;{.{.{.{.{.{.{.{.{.{.U>F+F+F+F+F+, 5;9 9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>> > > > > $+$+$+$+$+l l l l l ; ; ; ; ; ; ; 0 0 0 ,,,,F F F F F F F F F F T+T+f,f,- - - - - - - - - - - - - - - - - H,H,H,H,H,H,H,H,H,a a a a a a a a a a a a a a a a a a a a a a a a a a a - g[h[z)]!]!]!]!]!i[j[k[Z>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.l[l l l l $+$+$+$+$+> > > > > ]>]>]>]>^+^+^+^+^+I.I.I.&.9 9 9 9 9 5;, F+F+F+F+F+F+E E 8 8 8 8 Q+' m m m m m o.-+C.C.C.C.7 7 ) ) ) ) P.P.P.{+{+6 6 6 P=O=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] ] C C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } } u%_ _ _ j+[ [ [ [ T$: : : c+c+< < b+b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y z S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==+X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.I&=.`+`+H+H+H+G+4.q.q.v.n r#r#9.K.K.b+b+< < < c+: : : : #%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 1 U+U+>$>$^ ^ ^ x+x+2 2 2 C y%] ] ] y*Z+Z+6@6@3 w.w.X&X&+={ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=6 6 6 6 {+{+P.P.P.) ) ) ) 7 7 ) |>|>|>0>0>i>j;{.{.{.{.{.{.{.{.{.{.U>E F+F+F+F+F+F+, 5;9 9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>]>> > > > > $+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; 0 0 0 ,,,,F F F F F F F F F F T+T+T+f,f,- - - - - - - - - - - - - - - - - - - - - - - H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,- - O'm[n[#!]!]!]!]!t!L!G!2]g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.o[$+$+$+$+$+$+> > > > > ]>]>]>^+^+^+^+^+^+I.I.&.9 9 9 9 9 9 5;, F+F+F+F+F+F+E E 8 8 8 8 8 Q+m m m m m o.o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { X&X&w.w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ j+[ [ [ [ T$: : : c+c+< < < b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+1+W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.-.Q R R R q r r s t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $ =.=.`+g@H+H+H+4.4.q.q.v.n r#r#9.K.K.b+b+< < < c+: : : : #%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 1 U+U+>$>$^ ^ ^ ^ x+2 2 2 C C ] ] ] ] Z+Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=P=6 6 6 {+{+{+P.P.P.) ) ) 7 P.};|>|>|>|>0>j;{.{.{.{.{.{.{.{.{.{.U>8 E E F+F+F+F+F+F+, 5;9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+]>]>]>> > > > > > $+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; ; 0 0 0 ,,,,F F F F F F F F F F F F T+T+T+f,f,f,- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - p[q[r[s[]!]!]!]!]!t[u[/{R-{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;7'$+$+> > > > > ]>]>]>]>^+^+^+^+^+^+I.I.&.9 9 9 9 9 9 5;, F+F+F+F+F+F+E E 8 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+6 6 6 6 O=O=*@*@*@*@_.D D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)=)={ { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ T$: : : : c+< < < b+b+K.K.r#r#n n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q q r r t u u u v w x y y S S T T ,.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=k.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . { =.=.`+g@H+H+H+4.4.q.q.n n r#r#9.K.K.b+b+< < < c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 1 U+U+>$>$^ ^ ^ ^ x+2 2 2 C C ] ] ] ] y*Z+6@6@6@w.w.w.X&X&{ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=P=6 6 6 {+{+P.P.P.P.) ) {+};};};|>|>|>j;{.{.{.{.{.{.{.{.{.{.U>8 8 8 E E F+F+F+F+F+F+, 5;9 9 9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>]>> > > > > > $+$+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; ; 0 0 0 0 ,,,,F F F F F F F F F F F F F T+T+T+T+f,f,f,f,- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - f,e!v[w[;_]!]!]!]!K!,4=> > > ]>]>]>]>^+^+^+^+^+^+I.I.I.&.9 9 9 9 9 5;5;, F+F+F+F+F+F+E E 8 8 8 8 8 Q+' m m m m o.o.-+C.C.C.C.7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o V V m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=5.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^.H+=.=.`+g@H+H+H+4.q.q.q.n n r#r#K.K.K.b+b+< < < c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / [@1 U+U+U+>$R&^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=P=6 6 6 {+{+{+P.P.P.) {+X;X;};};|>|>j;{.{.{.{.{.{.{.{.{.{.U>8 8 8 8 8 E E F+F+F+F+F+F+, 5;9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+]>]>]>]>> > > > > > $+$+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 ,,,,F F F F F F F F F F F F F F F F F T+T+T+T+T+f,f,f,f,f,f,f,f,f,- - - - - - - - - - - - - f,f,f,f,f,f,f,f,T+T+T+T+T+T+F F F F F F @'&!x[y[]!]!]!]!S!E~z[A[{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.B[C[]>]>]>^+^+^+^+^+^+^+I.I.&.9 9 9 9 9 9 5;, F+F+F+F+F+F+F+E E 8 8 8 8 8 Q+' m m m m m o.-+C.C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+6 6 6 P=O=O=*@*@*@*@_.t=D D D i=i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@Z+Z+] ] ] ] y%C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+H+`+`+=.=.<+<+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.-.Q R R R q r r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ' =.=.=.`+g@H+H+H+4.q.q.q.n n r#r#K.K.K.b+b+< < < c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / [@1 U+U+U+>$R&^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=P=6 6 6 {+{+{+P.P.6 X;X;X;X;};};j;{.{.{.{.{.{.{.{.{.{.U>' Q+8 8 8 8 8 E E F+F+F+F+F+F+, , 5;9 9 9 9 9 9 &.I.I.^+^+^+^+^+^+^+]>]>]>]>> > > > > > $+$+$+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 ,,,,,,F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F x.D[!)E[]!]!]!]!]!U^+^+^+^+^+^+I.I.I.&.9 9 9 9 9 9 5;, F+F+F+F+F+F+F+E E 8 8 8 8 8 Q+' m m m m m o.o.-+C.C.C.7 7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)=)={ { { X&X&w.w.w.6@6@6@Z+Z+] ] ] ] C C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+3.3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q q r r t u u u v w x y y S S T T >.,.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=q$M+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h n@=.=.=.`+H+H+H+G+4.q.q.q.n n r#r#K.K.K.b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.`.r$/ / / [@1 U+U+U+>$R&^ ^ ^ x+x+2 2 2 C y%] ] ] ] Z+Z+6@6@6@w.w.X&X&X&{ { { )=)=)=g.g.g.)+)+~ ~ ~ ~ i=i=D D D D t=_.*@*@*@*@O=P=6 6 6 6 {+{+P.6 Y;Y;X;X;X;};@,{.{.{.{.{.{.{.{.{.{.U>m m ' Q+8 8 8 8 8 E E F+F+F+F+F+F+F+, 5;9 9 9 9 9 9 &.&.I.I.^+^+^+^+^+^+^+]>]>]>]>> > > > > > > $+$+$+$+$+$+$+l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 0 ,,,,,,,,F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F ,,,,,,,,0 0 0 0 0 0 ; H[I[J[K[]!]!]!]!L[$^T!)'{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.M[&.^+^+I.I.I.&.9 9 9 9 9 9 5;5;, F+F+F+F+F+F+F+E E 8 8 8 8 8 Q+' m m m m m o.o.-+C.C.C.7 7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] ] C C 2 2 2 x+^ ^ ^ ^ >$>$U+U+1 1 / / / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+1+1+W.>@>@O B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a <+=.=.=.`+H+H+H+G+4.q.q.v.n n r#r#K.K.K.b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X X ( | | | n.n.`.r$r$/ / [@1 U+U+U+>$R&^ ^ ^ x+x+2 2 2 C C ] ] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=P=6 6 6 {+{+O=Y;Y;Y;Y;X;X;p>{.{.{.{.{.{.{.{.{.{.U>m m m m ' Q+8 8 8 8 8 E E F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+^+]>]>]>]>]>> > > > > > > $+$+$+$+$+$+$+l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 0 0 ,,,,,,,,,,,,,,,,F F F F F F F F F F F F F F F F F F F ,,,,,,,,,,,,,,0 0 0 0 0 0 0 0 0 ; ; ; ; ; ; ; ; ; ; ; N[O[`<][]!]!]!]!t!P[m)Q[z,{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.R[M,I.&.&.9 9 9 9 9 9 5;, F+F+F+F+F+F+F+E E 8 8 8 8 8 8 Q+' m m m m m o.o.-+C.C.C.C.7 7 ) ) ) ) P.P.P.P.{+{+6 6 6 6 P=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ >$>$U+U+1 1 / / / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.a.b.<.[.-.-.;.Q R R R q r r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=N.X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8^>$<+=.=.`+`+H+H+H+G+4.q.q.v.n n r#r#K.K.K.b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X X ( ( | | n.n.`.r$r$/ / [@1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 C C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ i=i=D D D D t=_.*@*@*@*@O=O=P=6 6 6 O=F;F;Y;Y;Y;X;p>{.{.{.{.{.{.{.{.{.{.J>o.m m m m m ' Q+8 8 8 8 8 E E E F+F+F+F+F+F+F+, 5;9 9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+^+]>]>]>]>]>> > > > > > > > $+$+$+$+$+$+$+$+l l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l S[T[U[W<]!]!V[W[d[7[X[Y[{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.z,-!E 9 9 9 9 5;5;, F+F+F+F+F+F+F+E E 8 8 8 8 8 8 Q+' m m m m m o.o.-+C.C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@_.D D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)=)={ { { X&X&X&w.w.6@6@6@Z+Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$>$U+U+1 1 / / / r$r$`.n.| | | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o V V m.m. + +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.<.[.-.-.Q R R R q q r r t u u u v w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (.`+=.=.=.`+`+H+H+H+G+4.q.q.v.n n r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X X ( ( | | n.n.`.r$r$/ / / 1 1 U+U+>$>$^ ^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+Z+6@6@3 w.w.X&X&X&{ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D t=*@*@*@*@*@O=P=6 6 *@F;F;F;Y;Y;Y;p>{.{.{.{.{.{.{.{.{.{.t--+o.o.m m m m m ' Q+8 8 8 8 8 8 E E F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+^+^+]>]>]>]>]>> > > > > > > > $+$+$+$+$+$+$+$+$+$+l l l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l l l l $+$+$+$+$+$+$+$+Z[`[U)g! }E{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.+}@}9 5;, F+F+F+F+F+F+F+F+E E 8 8 8 8 8 Q+Q+' m m m m m o.o.-+C.C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+Z+] ] ] ] y%C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.K.r#r#n n q.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+3.3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=`+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5;<+=.=.=.`+g@H+H+H+G+4.q.q.v.n n r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X X ( ( | | n.n.`.r$r$/ / / 1 1 U+U+>$>$R&^ ^ ^ x+2 2 2 2 C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=O=P=*@F;F;F;F;F;Y;p>{.{.{.{.{.{.{.{.{.{.t-C.C.-+o.o.m m m m m ' Q+8 8 8 8 8 8 E E E F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+^+^+^+]>]>]>]>]>> > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+l l l l l l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l l l l l l l $+$+$+$+$+$+$+$+$+$+$+> > > > > > 9 K'P'#}k$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.K.r#r#n n q.q.q.4.G+H+H+H+`+=.=.=.<+<+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7@@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.u%<+=.=.=.`+g@H+H+H+G+4.q.q.v.n n r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%Q%X X X ( ( | | n.n.`.r$r$/ / / [@1 U+U+U+>$R&^ ^ ^ x+x+2 2 2 C C ] ] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D t=_.*@*@*@*@O=t=G;F;F;F;F;F;7>{.{.{.{.{.{.{.{.{.{.t-C.C.C.C.-+o.o.m m m m m m ' Q+8 8 8 8 8 8 E E F+F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 9 &.&.I.I.I.^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>> > > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+$+$+l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l $+$+$+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > > > ]>]>]>]>]>f[%}&}*}k$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.K.r#r#n n v.q.q.4.G+H+H+H+`+`+=.=.<+<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.<.[.-.-.-.Q R R R q q r r t u u u v w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#~+<+=.=.=.`+g@H+H+H+4.4.q.q.v.n r#r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%Q%X X X ( ( | | | n.n.r$r$/ / / [@1 U+U+U+>$R&^ ^ ^ x+x+2 2 2 C C y%] ] ] y*Z+Z+6@6@6@w.w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D D t=*@*@*@*@D t;t;G;F;F;F;7>{.{.{.{.{.{.{.{.{.{.t-7 7 C.C.C.C.-+o.o.m m m m m m ' Q+8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 9 9 &.I.I.I.I.^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>> > > > > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+l l l l l l l l l l l l l l $+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > > > > > ]>]>]>]>]>]>^+^+^+^+^+^+-};}_,>},}'}k$>$U+U+U+1 [@/ / r$r$`.n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.K.r#r#n n v.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+1+W.W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q Q R R q q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=0.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . O=~+<+=.=.=.`+g@H+H+H+4.4.q.q.v.n r#r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ u%} } } Q%Q%X X X ( ( | | | n.n.r$r$/ / / [@1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&+={ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D t=_.*@*@D i;i;t;G;F;F;{>{.{.{.{.{.{.{.{.{.{.t-) 7 7 7 C.C.C.C.-+o.o.o.m m m m m ' ' Q+8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 9 &.&.I.I.I.I.^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>> > > > > > > > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > > > > > > > > ]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+I.I.^}R,7,7,z>/}1<(}k<}8 8 8 Q+' m m m m m m o.o.-+C.C.C.C.C.7 7 7 ) ) ) ) P.P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@*@t=D D D D D i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+y*] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ >$>$U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < < b+K.K.K.r#r#n n v.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+1+1+W.>@>@O B o o o V V m.m. + +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~&# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . s+b+~+<+=.=.=.`+g@H+H+H+4.4.q.q.v.n r#r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ u%} } } } Q%X X X ( ( | | | n.n.`.r$r$/ / [@1 1 U+U+>$>$^ ^ ^ ^ x+2 2 2 2 C C ] ] ] ] y*Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=D D D D t=_.D i;i;i;t;t;G;{>{.{.{.{.{.{.{.{.{.{.t-) ) ) 7 7 7 C.C.C.C.C.-+o.o.m m m m m m ' Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 9 9 &.&.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>]>> > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > ]>]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.&.&.9 [}}}_,_,_,_,),>}|}1}h>2}c<{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-3}e,' m m m m m m o.o.-+C.C.C.C.C.7 7 7 ) ) ) ) P.P.P.P.{+{+{+6 6 6 6 O=O=*@*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+g.g.g.g.g.)=)={ { { +=X&X&w.w.w.6@6@6@Z+Z+y*] ] ] y%C C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ _ [ [ [ [ #%: : : : c+< < < < b+K.K.K.r#r#n n v.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u v v w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . c ~+~+<+=.=.=.`+g@H+H+H+4.q.q.q.v.n r#r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ [ _ _ _ _ u%} } } } Q%X X X ( ( | | | n.n.`.r$r$/ / / 1 1 U+U+U+>$R&^ ^ ^ x+x+2 2 2 C C y%] ] ] y*Z+Z+6@6@6@3 w.w.X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D D 5 7;i;i;i;i;t;=>{.{.{.{.{.{.{.{.{.{.t-P.) ) ) ) 7 7 7 C.C.C.C.C.-+o.o.m m m m m m ' ' Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 9 9 9 &.&.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>]>]>]>]>]>> > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > ]>]>]>]>]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.&.&.9 9 9 9 9 9 9 9 4}(,),X>X>h>h>h>h>h>z>5}/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.2>!,m m m o.o.o.-+C.C.C.C.7 7 7 7 ) ) ) ) P.P.P.P.{+{+{+6 6 6 6 P=O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+Z+] ] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$`.n.n.| | ( ( X X X X Q%} } } d#u%_ _ _ _ [ [ [ [ #%: : : : c+< < < < b+K.K.K.9.r#n n v.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.<.[.[.-.-.Q R R R q q r r t t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=T + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z+~+~+<+=.=.=.`+g@H+H+H+4.q.q.q.v.n r#r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ [ _ _ _ _ u%d#} } } Q%X X X X ( ( | | n.n.`.r$r$/ / / [@1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] y*Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=D D D ~ z-7;i;i;i;i;B;{.{.{.{.{.{.{.{.{.{.t-P.P.P.) ) ) ) 7 7 7 7 C.C.C.C.-+-+o.o.m m m m m m ' Q+Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+, , 5;5;9 9 9 9 9 9 9 9 9 9 &.&.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.&.&.&.9 9 9 9 9 9 9 9 9 9 5;5;, [}}}h>h>h>h>h>h>h>h>y>6}7}{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.8}9}o.-+C.C.C.C.C.7 7 7 ) ) ) ) ) P.P.P.P.{+{+{+6 6 6 6 P=O=O=*@*@*@*@_.t=D D D D D i=~ ~ ~ ~ ~ ~ )+g.g.g.g.g.)=)={ { { +=X&X&w.w.w.3 6@6@6@Z+y*] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ >$>$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X X Q%} } } d#u%_ _ _ _ [ [ [ [ #%: : : : c+< < < < b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J.H+~+<+<+=.=.=.`+g@H+H+H+4.q.q.q.n n r#r#9.K.K.b+b+< < < c+c+: : : : #%[ [ [ [ _ _ _ _ u%d#} } } Q%X X X X ( ( | | n.n.n.r$r$/ / / [@1 U+U+U+>$>$^ ^ ^ ^ x+2 2 2 2 C C ] ] ] ] y*Z+Z+6@6@6@w.w.w.X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=D ~ z-z-7;7;i;i;B;{.{.{.{.{.{.{.{.{.{.t-{+P.P.P.P.) ) ) ) ) 7 7 7 C.C.C.C.C.-+o.o.o.m m m m m m ' Q+Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+F+, , 5;5;9 9 9 9 9 9 9 9 9 9 9 &.&.&.I.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.I.&.&.&.9 9 9 9 9 9 9 9 9 9 9 5;5;, F+F+F+F+F+F+0}<}h>h>h>y>y>y>y>y>i>3}$;{.{.{.{.{.{.{.{.{.{.{.{.{.{.a}b}C.C.C.C.7 7 7 ) ) ) ) P.P.P.P.P.{+{+{+6 6 6 6 P=O=O=*@*@*@*@_.t=D D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { { +=X&X&w.w.3 6@6@6@Z+Z+y*] ] ] y%C C 2 2 2 x+x+^ ^ ^ R&>$>$U+U+U+1 [@/ / r$r$r$n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ #%: : : : c+< < < < b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u v w w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 ~+~+<+<+=.=.=.`+H+H+H+H+4.q.q.q.n n r#r#9.K.K.b+b+< < < c+c+: : : : #%[ [ [ [ _ _ _ _ u%d#} } } Q%X X X X ( ( | | | n.n.r$r$r$/ / [@1 1 U+U+>$>$R&^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=g.g.g.g.g.)+)+~ ~ ~ ~ ~ i=z&z-z-z-z-7;7;B;{.{.{.{.{.{.{.{.{.{.t-{+{+{+P.P.P.P.P.) ) ) ) 7 7 7 7 C.C.C.C.-+-+o.o.m m m m m m m ' Q+Q+8 8 8 8 8 8 8 E E E E F+F+F+F+F+F+F+F+F+F+F+, , 5;5;9 9 9 9 9 9 9 9 9 9 9 9 &.&.&.I.I.I.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.I.I.&.&.&.9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;, , F+F+F+F+F+F+F+F+F+F+F+-}c}y>y>y>y>y>y>y>y>y>M>d}{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.e}->7 7 7 ) ) ) ) P.P.P.P.P.{+{+{+6 6 6 6 P=O=O=*@*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)=)={ { { +=X&X&w.w.w.3 6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ #%: : : : c+< < < < b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.3.0.0..+R.p p f.r.r.k.a.b.b.<.[.-.-.-.Q R R R q q r r t u u u v w x y y z S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@_@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=n+h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.n.~+~+<+<+=.=.=.`+H+H+H+H+4.q.q.q.n n r#r#9.K.K.b+b+< < < < c+: : : : #%[ [ [ [ j+_ _ _ _ d#} } } Q%Q%X X X ( ( | | | n.n.`.r$r$/ / / 1 1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.X&X&+={ { { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ g.z-z-z-z-z-z-4;{.{.{.{.{.{.{.{.{.{.t-6 6 {+{+{+P.P.P.P.P.) ) ) ) 7 7 7 7 C.C.C.C.C.-+o.o.o.m m m m m m m ' Q+Q+8 8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+F+F+F+, , 5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 &.&.&.&.I.I.I.I.I.I.I.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.I.I.I.I.I.I.I.&.&.&.&.9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;, , , F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 f}g}y>y>y>y>y>z>z>i>i>h}.>{.{.{.{.{.{.{.{.{.{.{.{.{.{.i}j}) ) ) ) P.P.P.P.{+{+{+{+6 6 6 6 P=O=O=*@*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ ~ )+g.g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+Z+y*] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ T$: : : : c+< < < < b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m. +y+y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.<.[.[.-.-.Q R R R q q r r s t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # a@~+~+<+<+=.=.=.`+H+H+H+H+4.q.q.q.v.n r#r#9.K.K.b+b+< < < < c+: : : : #%[ [ [ [ j+_ _ _ _ d#} } } Q%Q%X X X ( ( | | | n.n.`.r$r$/ / / [@1 U+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 C C y%] ] ] ] Z+Z+6@6@6@3 w.w.w.X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ ~ g. ;z-z-z-z-z-4;{.{.{.{.{.{.{.{.{.{.t-6 6 6 6 {+{+{+{+P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.-+o.o.o.m m m m m m m ' ' Q+8 8 8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+F+F+F+F+, , , 5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 &.&.&.&.&.&.&.&.&.I.I.I.I.I.I.I.I.I.I.I.I.I.I.I.&.&.&.&.&.&.&.&.&.9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;5;, , F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 8 8 8 8 8 k}l}y>z>z>i>i>i>i>i>i>m}T){.{.{.{.{.{.{.{.{.{.{.{.{.{.{.*,n}P.P.P.P.{+{+{+6 6 6 6 6 P=O=O=*@*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ ~ )+)+g.g.g.g.)=)=)={ { { +=X&X&w.w.w.3 6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ ^ >$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+<+~+~+~+1+W.W.>@>@O B o o o V V m.m. + +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.R.p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ' ~+~+~+<+=.=.=.=.`+H+H+H+H+4.q.q.q.v.n r#r#9.K.K.K.b+< < < < c+: : : : T$[ [ [ [ j+_ _ _ _ u%} } } } Q%X X X ( ( ( | | n.n.n.r$r$/ / / [@1 U+U+U+>$>$R&^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.X&X&X&{ { { { )=)=)=g.g.g.g.)+)+~ g. ; ; ;z-z-z-4;{.{.{.{.{.{.{.{.{.{.t-O=P=6 6 6 6 6 {+{+{+P.P.P.P.P.) ) ) ) ) 7 7 7 C.C.C.C.C.C.-+o.o.o.m m m m m m m m ' Q+Q+8 8 8 8 8 8 8 8 8 E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+, , , 5;5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;5;, , , , F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 8 8 8 8 8 8 8 Q+Q+' m o}<}i>i>i>i>i>0>0>0>0>p}(;{.{.{.{.{.{.{.{.{.{.{.{.{.{.(;q}P.{+{+{+6 6 6 6 6 P=O=O=*@*@*@*@*@_.t=D D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)=)={ { { +=X&X&X&w.w.3 6@6@6@Z+Z+y*] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / r$r$r$n.n.| | | ( ( X X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+<+~+~+~+1+W.W.>@>@O B o o o V V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u v v w x y y S S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t#d+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.|#~+~+~+<+=.=.=.=.`+H+H+H+H+4.q.q.q.v.n r#r#9.K.K.K.b+b+< < < c+: : : : T$[ [ [ [ j+_ _ _ _ u%} } } } Q%X X X X ( ( | | | n.n.`.r$r$/ / / 1 1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C C y%] ] ] ] Z+Z+6@6@6@3 w.w.w.X&X&+={ { { { )=)=g.g.g.g.g.)+)= ; ; ; ; ;z-6-{.{.{.{.{.{.{.{.{.{.t-*@O=O=P=P=6 6 6 6 {+{+{+P.P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.-+o.o.o.m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+, , , , 5;5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;5;5;, , , , F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m F,r}W(0>0>0>0>|>|>|>|>s}t}{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.'>u}6 6 6 6 P=O=O=O=*@*@*@*@*@_.t=D D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.g.)=)={ { { { +=X&X&w.w.w.3 6@6@6@Z+y*] ] ] ] y%C C 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X X Q%} } } d#u%_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.>@>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r t u u u v w x x y z S T T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=#=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K$1+~+~+~+<+=.=.=.=.`+H+H+H+H+4.q.q.q.v.n n r#9.K.K.K.b+b+< < < c+: : : : T$[ [ [ [ j+_ _ _ _ u%d#} } } Q%X X X X ( ( | | | n.n.`.r$r$/ / / [@1 U+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=)=g.g.g.g.{ U- ; ; ; ; ;6-{.{.{.{.{.{.{.{.{.{.t-*@*@*@*@O=O=P=6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.-+o.o.o.m m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 8 E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+, , , , , , , 5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;, , , , , , , F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m m m m o.o.o.v}w}|>|>|>|>|>|>};};};4;_>{.{.{.{.{.{.{.{.{.{.{.{.{.{.j:x}! P=O=O=*@*@*@*@*@*@_.t=D D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.g.)=)=)={ { { +=X&X&X&w.w.3 6@6@6@Z+Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ R&>$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#u%_ _ _ _ [ [ [ [ #%T$: : : : c+< < < b+b+K.K.K.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.>@>@O B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.3.0.0..+R.p p f.r.r.k.a.a.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=a.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P.1+~+~+~+<+=.=.=.=.`+H+H+H+H+4.q.q.q.v.n n r#9.K.K.K.b+b+< < < c+: : : : T$#%[ [ [ [ _ _ _ _ u%d#} } } Q%Q%X X X ( ( | | | n.n.`.r$r$/ / / [@1 1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C C y%] ] ] ] y*Z+6@6@6@6@w.w.w.X&X&X&+={ { { )=)=)=g.g.{ F-U-U- ; ; ;6-{.{.{.{.{.{.{.{.{.{.t-*@*@*@*@*@*@O=O=P=6 6 6 6 6 {+{+{+P.P.P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.-+-+o.o.o.m m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m m m m m o.o.o.-+-+C.C.) y}|>|>};};};};X;X;X;z}A}{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.Y-B}*@*@*@*@*@*@_.t=D D D D D i=i=~ ~ ~ ~ ~ ~ )+g.g.g.g.g.)=)=)={ { { +=X&X&X&w.w.3 6@6@6@6@Z+y*] ] ] ] y%C C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ _ [ [ [ [ #%T$: : : : c+< < < b+b+K.K.K.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.>@>@O B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.<.<.[.-.-.Q Q R R q q r r s t u u v w x x y y S S T T >.,.d.d.2.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8$j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.:%Q.~+~+~+<+=.=.=.=.`+H+H+H+H+4.q.q.q.v.n n r#r#K.K.K.b+b+< < < c+: : : : T$#%[ [ [ [ j+_ _ _ _ d#} } } } Q%X X X ( ( ( | | | n.n.r$r$r$/ / / 1 1 U+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&+={ { { { )=)=)={ F-F-F-U-U- ;6-{.{.{.{.{.{.{.{.{.{.t-t=t=_.*@*@*@*@*@O=O=P=P=6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.C.-+o.o.o.o.m m m m m m m m m ' ' Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' ' m m m m m m m m m o.o.o.o.-+C.C.C.C.C.C.C.7 r;C}};X;X;X;X;X;X;Y;Y;j;k>{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;{>D}*@_.t=D D D D D D i=i=~ ~ ~ ~ ~ ~ )+)+g.g.g.g.)=)=)={ { { { +=X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ ^ >$>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } d#_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < b+b+K.K.K.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.=.<+~+~+~+1+1+W.W.>@O B B o o @V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u v v w x y y z S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # <+Q.~+~+~+<+=.=.=.=.`+H+H+H+H+4.4.q.q.v.n n r#r#K.K.K.b+b+< < < c+c+: : : : #%[ [ [ [ j+_ _ _ _ u%} } } } Q%X X X X ( ( | | | n.n.`.r$r$/ / / [@1 U+U+U+>$>$R&^ ^ ^ ^ x+2 2 2 2 C C y%] ] ] ] y*Z+6@6@6@6@3 w.w.X&X&X&+={ { { { )=X&d-F-F-F-F-U-:-{.{.{.{.{.{.{.{.{.{.t-D D D t=_.*@*@*@*@*@*@O=O=P=6 6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.-+-+o.o.o.o.m m m m m m m m m m ' ' ' Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' ' m m m m m m m m m m o.o.o.o.-+-+C.C.C.C.C.C.7 7 7 7 7 ) {+u}|>X;X;Y;Y;Y;Y;Y;F;E}9,0,{.{.{.{.{.{.{.{.{.{.{.{.{.{.S;F}D D D D D D i=i=~ ~ ~ ~ ~ ~ )+)+g.g.g.g.)=)=)={ { { { +=X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 x+^ ^ ^ ^ R&>$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.K.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.=.<+~+~+~+1+1+W.W.>@O B B o o @V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r t u u u v w x x y z S T T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=>@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > 1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+4.4.q.q.v.n n r#r#K.K.K.b+b+< < < c+c+: : : : #%[ [ [ [ j+_ _ _ _ u%} } } } Q%X X X X ( ( | | | n.n.`.r$r$/ / / [@1 1 U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C C ] ] ] ] ] Z+Z+6@6@6@6@3 w.w.X&X&X&+={ { { w.d-d-F-F-F-F-:-{.{.{.{.{.{.{.{.{.{.t-D D D D D t=_.*@*@*@*@*@*@O=O=P=P=6 6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.C.-+-+o.o.o.o.m m m m m m m m m m m m ' ' Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E E E E E E E E E E E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+' ' m m m m m m m m m m m m o.o.o.o.-+-+C.C.C.C.C.C.C.7 7 7 7 7 ) ) ) ) ) ) r;C}Y;Y;Y;F;F;F;F;F;F;G}5!{.{.{.{.{.{.{.{.{.{.{.{.{.{.J;H}4 D i=i=i=~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.)=)={ { { { +=X&X&X&w.w.3 6@6@6@6@Z+Z+] ] ] ] ] C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$`.n.n.| | | ( ( X X X X Q%} } } d#u%_ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.K.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y z S S T T ,.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=q+e@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.>$1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+4.4.q.q.v.n n r#r#9.K.K.b+b+< < < c+c+: : : : T$[ [ [ [ j+_ _ _ _ u%d#} } } Q%Q%X X X ( ( ( | | | n.n.`.r$r$/ / / [@1 U+U+U+>$>$R&^ ^ ^ ^ x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&X&+={ w.2-d-d-d-F-F-:-{.{.{.{.{.{.{.{.{.{.t-i=i=D D D D D t=_._.*@*@*@*@*@*@O=O=P=6 6 6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.C.-+-+-+o.o.o.o.m m m m m m m m m m m m m ' ' ' Q+Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+Q+' ' ' m m m m m m m m m m m m m o.o.o.o.-+-+-+C.C.C.C.C.C.C.7 7 7 7 7 ) ) ) ) ) ) ) P.P.P.P.I}u}};F;F;F;F;F;F;F;F;J}K}g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.f)L}~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.)=)=)={ { { +=X&X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 x+^ ^ ^ ^ R&>$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( ( X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ T$: : : : c+c+< < < b+b+K.K.9.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J.v@1+Q.~+~+~+<+<+=.=.=.`+g@H+H+H+4.4.q.q.v.n n r#r#9.K.K.b+b+< < < < c+: : : : T$[ [ [ [ [ _ _ _ _ _ d#} } } } Q%X X X X ( ( | | | n.n.`.r$r$/ / / [@1 1 U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&X&3 2-2-2-d-d-d-:-{.{.{.{.{.{.{.{.{.{.t-~ ~ i=i=D D D D D D t=_.*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 7 7 C.C.C.C.C.C.C.C.-+-+o.o.o.o.o.m m m m m m m m m m m m m m m m ' ' ' ' ' Q+Q+Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+Q+Q+' ' ' ' ' m m m m m m m m m m m m m m m m o.o.o.o.o.-+-+C.C.C.C.C.C.C.C.7 7 7 7 7 7 ) ) ) ) ) ) P.P.P.P.P.P.{+{+{+{+M}N}F;F;F;F;G;t;t;t;i;|;O}{.{.{.{.{.{.{.{.{.{.{.{.{.{.{,@;A'~ ~ ~ )+)+g.g.g.g.g.)=)=)={ { { +=X&X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } d#_ _ _ _ _ [ [ [ [ [ T$: : : : c+< < < < b+b+K.K.9.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. + +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R q q r r s t u u v w w x y y z S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d&W.1+Q.~+~+~+<+<+=.=.=.`+g@H+H+H+G+4.q.q.v.n n r#r#9.K.K.b+b+< < < < c+: : : : T$#%[ [ [ [ j+_ _ _ _ u%} } } } Q%X X X X ( ( | | | n.n.n.r$r$r$/ / / [@1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] ] y*Z+6@6@6@6@3 w.w.w.X&6@--2-2-2-2-d-s-{.{.{.{.{.{.{.{.{.{.t-~ ~ ~ ~ i=i=D D D D D D t=_._.*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.) ) ) ) ) ) ) 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.-+-+-+o.o.o.o.o.m m m m m m m m m m m m m m m m m m m m m m ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' m m m m m m m m m m m m m m m m m m m m m m o.o.o.o.o.-+-+-+C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 ) ) ) ) ) ) ) P.P.P.P.P.P.{+{+{+{+{+6 6 6 6 P}h;G;t;t;i;i;i;i;i;Q}R}1_{.{.{.{.{.{.{.{.{.{.{.{.{.{.a,o-)+)+g.g.g.g.g.)=)=)={ { { { +=X&X&w.w.w.3 6@6@6@6@Z+y*] ] ] ] ] y%C 2 2 2 2 2 x+^ ^ ^ ^ R&>$>$U+U+U+1 [@/ / / r$r$r$n.n.n.| | | ( ( X X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < < b+b+K.K.9.r#r#n n v.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. + +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0..+R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u u v w x x y z S T T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%6%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=z ;@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z&W.1+1+~+~+~+<+<+=.=.=.`+g@H+H+H+G+4.q.q.q.n n r#r#9.K.K.K.b+b+< < < c+: : : : : #%[ [ [ [ j+_ _ _ _ u%d#} } } Q%Q%X X X ( ( ( | | | n.n.`.r$r$/ / / [@1 1 U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@6@3 w.w.Z+----1-2-2-2-l-{.{.{.{.{.{.{.{.{.{.S}~ ~ ~ ~ ~ ~ i=i=i=D D D D D D t=_.*@*@*@*@*@*@*@O=O=P=P=6 6 6 6 6 6 {+{+{+{+P.P.P.P.P.P.P.) ) ) ) ) ) ) ) 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.-+-+-+o.o.o.o.o.o.o.m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m o.o.o.o.o.o.o.-+-+-+C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.{+{+{+{+6 6 6 6 6 6 P=P=O=M}T}i;i;i;i;i;i;7;7;z-U}t-{.{.{.{.{.{.{.{.{.{.{.{.{.{.K-V}W}g.g.g.)=)=)={ { { { +=X&X&w.w.w.3 6@6@6@6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$`.n.n.| | | ( ( ( X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m. + +y+y+y+z+l+l+l+l+:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r t t u u v w x x y z S S T T ,.,.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I !>W.1+1+~+~+~+<+<+=.=.=.`+g@H+H+H+G+4.q.q.q.n n r#r#9.K.K.K.b+b+< < < c+c+: : : : #%[ [ [ [ j+_ _ _ _ u%d#} } } } Q%X X X X ( ( | | | n.n.`.r$r$r$/ / / [@1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@6@3 Z+--------1-2-l-{.{.{.{.{.{.{.{.{.{.X})+)+~ ~ ~ ~ ~ ~ ~ i=i=D D D D D D t=t=_.*@*@*@*@*@*@*@O=O=P=P=6 6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.P.) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.-+-+-+-+o.o.o.o.o.o.o.o.o.o.m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m o.o.o.o.o.o.o.o.o.o.-+-+-+-+C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.{+{+{+{+{+6 6 6 6 6 6 P=P=O=O=*@*@*@*@Y}h;i;7;7;7;z-z-z-z-Q}Z}`}{.{.{.{.{.{.{.{.{.{.{.{.{.{.c> |)=)=)={ { { { +=X&X&X&w.w.3 6@6@6@6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 1 / / / r$r$r$`.n.n.| | | ( ( X X X X Q%} } } } d#u%_ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m. + +y+y+y+z+l+l+l+l+:.:.:.:.2+#+#+#+#+3.0.0.0.R.R.p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#W.W.1+1+~+~+~+<+<+=.=.=.`+g@H+H+H+G+4.q.q.q.n n n r#r#K.K.K.b+b+< < < c+c+: : : : T$[ [ [ [ [ _ _ _ _ _ u%} } } } Q%X X X X ( ( | | | | n.n.`.r$r$/ / / [@1 1 U+U+U+>$>$^ ^ ^ ^ ^ x+2 2 2 2 2 C C ] ] ] ] ] y*Z+Z+6@6@6@] =-----------l-{.{.{.{.{.{.{.{.{.{.X}g.g.)+)+~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D t=_._.*@*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.-+-+-+-+-+-+o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.-+-+-+-+-+-+C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.{+{+{+{+{+{+6 6 6 6 6 6 P=O=O=O=*@*@*@*@*@*@*@_..|F}z-z-z-z-z-z-z-z-z-+|,>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.@|#|{ { { +=X&X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] ] y%C 2 2 2 2 2 x+^ ^ ^ ^ ^ >$>$U+U+U+1 1 [@/ / / r$r$`.n.n.n.| | | ( ( X X X X Q%} } } } d#_ _ _ _ _ [ [ [ [ [ T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.W.>@>@B B o o o V m.m.m.m. +y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=#+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Q+W.W.1+1+~+~+~+~+<+=.=.=.`+g@H+H+H+G+4.q.q.q.v.n n r#r#K.K.K.b+b+< < < < c+: : : : T$#%[ [ [ [ j+_ _ _ _ u%d#} } } Q%Q%X X X X ( ( | | | n.n.`.r$r$r$/ / / [@1 U+U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C y%] ] ] ] ] y*Z+Z+6@] =-=---------l-{.{.{.{.{.{.{.{.{.{.X}g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ i=i=D D D D D D D t=_._.*@*@*@*@*@*@*@O=O=O=P=P=6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.{+{+{+{+{+{+6 6 6 6 6 6 6 P=O=O=O=*@*@*@*@*@*@*@_._.t=D D D $|h;z-z-z-z- ; ; ; ;Q}%|3:{.{.{.{.{.{.{.{.{.{.{.{.{.{.&|*|+=X&X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] ] y%C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 [@/ / / / r$r$`.n.n.| | | ( ( X X X X Q%Q%} } } } u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.W.>@>@B B o o o V m.m.m.m. +y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.-.Q Q R R q q r r s t u u v v w x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7@D+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.X >@W.1+1+~+~+~+~+<+=.=.=.`+g@H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.b+b+< < < < c+: : : : : #%[ [ [ [ j+_ _ _ _ u%d#} } } } Q%X X X X ( ( | | | | n.n.`.r$r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] ] y*Z+y%=-=-=-=-----=|{.{.{.{.{.{.{.{.{.{.Z-)=g.g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=D D D D D D D t=_._.*@*@*@*@*@*@*@O=O=O=P=P=6 6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+6 6 6 6 6 6 6 P=P=O=O=O=*@*@*@*@*@*@*@_._.t=D D D D D D D { -|z- ; ; ; ; ; ; ;U-;|>|{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.,|'|w.w.w.3 6@6@6@6@Z+y*] ] ] ] ] y%C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$`.n.n.n.| | | ( ( X X X X Q%} } } } d#u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.W.>@>@B B o o o V m.m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.a.b.<.[.[.-.-.;.Q R R R q r r r t u u u v w x x y z S S T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e#f@>@W.1+1+~+~+~+~+<+=.=.=.`+`+H+H+H+H+4.4.q.q.v.n n r#r#9.K.K.K.b+b+< < < c+c+: : : : T$[ [ [ [ [ _ _ _ _ _ u%} } } } Q%Q%X X X ( ( ( | | | n.n.`.r$r$r$/ / / [@1 U+U+U+U+>$>$^ ^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] ] C *-*-=-=-=-=-)|{.{.{.{.{.{.{.{.{.{.Z-)=)=)=g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=_._.*@*@*@*@*@*@*@*@O=O=O=P=P=6 6 6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+6 6 6 6 6 6 6 P=P=O=O=O=*@*@*@*@*@*@*@*@_._.t=D D D D D D D i=i=i=~ ~ $|h; ; ; ;U-U-U-F-F-F-@;.>{.{.{.{.{.{.{.{.{.{.{.{.{.{._>!|3 6@6@6@6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 2 x+^ ^ ^ ^ ^ R&>$U+U+U+U+1 [@/ / / r$r$r$`.n.n.| | | ( ( ( X X X X Q%} } } } d#_ _ _ _ _ j+[ [ [ [ #%: : : : : c+< < < < b+b+K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B o o o V m.m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q r r r t t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - >@>@W.W.1+Q.~+~+~+<+=.=.=.`+`+H+H+H+H+4.4.q.q.v.n n r#r#9.K.K.K.b+b+< < < c+c+: : : : T$#%[ [ [ [ j+_ _ _ _ u%d#} } } } Q%X X X X ( ( | | | | n.n.`.r$r$/ / / / 1 1 U+U+U+U+>$R&^ ^ ^ ^ ^ x+2 2 2 2 2 C C y%] ] ] 2 a-*-*-*-=-=-k-{.{.{.{.{.{.{.{.{.{.Z-{ { )=)=)=)=g.g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=t=_.*@*@*@*@*@*@*@*@O=O=O=O=P=P=6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 P=P=O=O=O=O=*@*@*@*@*@*@*@*@_._.t=D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ L ~|U-U-F-F-F-F-F-F-d-{|R;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.W*]|6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$`.n.n.n.| | | ( ( X X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ [ T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n v.q.q.4.4.H+H+H+H+`+`+=.=.=.<+~+~+~+~+1+1+W.W.>@O B B o o o V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+}+5+5+i+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=N.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y%>@>@W.W.1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.q.q.q.n n r#r#9.K.K.K.b+b+< < < < c+: : : : T$#%[ [ [ [ j+_ _ _ _ _ d#} } } } Q%Q%X X X ( ( ( | | | n.n.n.r$r$r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] 2 a-a-a-*-*-*-k-{.{.{.{.{.{.{.{.{.{.Z-{ { { { { )=)=)=g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=t=_._.*@*@*@*@*@*@*@*@O=O=O=O=P=P=6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 P=P=O=O=O=O=*@*@*@*@*@*@*@*@*@_.t=t=D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ )+)+)+#|h;F-F-F-F-d-d-d-2-2-^|/|{.{.{.{.{.{.{.{.{.{.{.{.{.{.(|_|y*] ] ] ] y%C C 2 2 2 2 2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$r$`.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n v.q.q.4.4.H+H+H+H+`+`+=.=.=.<+~+~+~+~+1+1+W.>@>@O B B o o o V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=J%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J n@>@>@W.W.1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.q.q.q.v.n n r#r#K.K.K.b+b+< < < < c+: : : : : #%[ [ [ [ [ _ _ _ _ _ u%d#} } } Q%Q%X X X X ( ( | | | | n.n.`.r$r$/ / / / [@1 U+U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C C y%:|:|:|:|:|<|)-{.{.{.{.{.{.{.{.{.{.Z-X&+=+={ { { { )=)=)=)=g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D t=t=_.*@*@*@*@*@*@*@*@*@*@O=O=O=O=P=P=6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 6 P=P=O=O=O=O=*@*@*@*@*@*@*@*@*@*@_._.t=D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.T>~|d-d-d-d-2-2-2-2-2-[|}|{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.||4-] ] y%C 2 2 2 2 2 x+x+^ ^ ^ ^ ^ >$>$U+U+U+U+1 1 / / / / r$r$`.n.n.n.| | | ( ( X X X X Q%Q%} } } } u%_ _ _ _ _ j+[ [ [ [ #%: : : : : c+< < < < b+b+K.K.K.r#r#r#n n q.q.q.4.G+H+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o o V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w w x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@_@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=X&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.1+>@>@W.W.1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.b+b+b+< < < c+c+: : : : T$#%[ [ [ [ j+_ _ _ _ u%d#} } } } Q%X X X X ( ( ( | | | n.n.n.`.r$r$/ / / / 1 1 U+U+U+U+>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] ] ] ] e={.{.{.{.{.{.{.{.{.{.Z-X&X&X&X&+={ { { { { )=)=)=g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D D t=_._.*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 6 6 6 P=P=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.g.)=)=1|2|2-2-2-2-1---------3|Q-{.{.{.{.{.{.{.{.{.{.{.{.{.{. >4|x+C 2 2 2 2 x+x+^ ^ ^ ^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$r$`.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ j+[ [ [ [ [ T$: : : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u u v w x x y z S S T T ,.,.d.d.2.2.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f,O >@>@W.W.1+Q.~+~+~+<+<+=.=.=.`+g@H+H+H+G+4.4.q.q.v.n n r#r#9.K.K.K.b+b+< < < < c+: : : : T$#%[ [ [ [ j+_ _ _ _ _ u%} } } } Q%Q%X X X X ( ( | | | | n.n.`.r$r$r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] ] e={.{.{.{.{.{.{.{.{.{.Z-w.w.w.X&X&X&+={ { { { { )=)=)=)=g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D D t=t=_._.*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 P=P=P=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.g.)=)=)=)={ { w.5|d-1---------------6|7|{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.8|9|2 2 x+x+^ ^ ^ ^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$r$`.n.n.| | | | ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ #%T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R q q r r r t u u u v w x x y z S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+}+5+5+i+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u.!@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z&O >@>@W.W.1+Q.~+~+~+<+<+=.=.=.`+`+H+H+H+H+4.4.q.q.q.n n r#r#9.K.K.K.b+b+< < < < c+: : : : : T$[ [ [ [ [ j+_ _ _ _ u%d#} } } } Q%X X X X X ( ( | | | n.n.n.`.r$r$/ / / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C y%e={.{.{.{.{.{.{.{.{.{.Z-6@3 w.w.w.X&X&X&X&+={ { { { { )=)=)=)=g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D t=t=_._.*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 P=P=P=P=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.g.)=)=)=)={ { { { { +=X&l;0|----------=-=-=-=-:-k>{.{.{.{.{.{.{.{.{.{.{.{.{.{./;a|a&^ ^ ^ ^ ^ R&>$>$U+U+U+U+1 [@/ / / / r$r$`.n.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ _ [ [ [ [ [ #%: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p f.r.k.k.a.b.b.<.[.[.-.-.Q Q R R R q r r r t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o%f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X.d#B >@>@W.W.1+1+~+~+~+~+<+=.=.=.`+`+H+H+H+H+G+4.q.q.q.n n n r#r#K.K.K.b+b+b+< < < c+c+: : : : T$#%[ [ [ [ j+_ _ _ _ _ u%} } } } Q%Q%X X X X ( ( ( | | | n.n.n.`.r$r$/ / / / [@1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C b|{.{.{.{.{.{.{.{.{.{.Z-6@6@6@3 w.w.w.w.X&X&X&+=+={ { { { { )=)=)=)=g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D D D D t=t=_._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=O=O=P=P=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 P=P=P=P=P=O=O=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._.t=t=t=D D D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.)=)=)=)=)={ { { { { +=X&X&X&X&f;c|d-=-=-=-=-=-=-*-*-I-~-g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.d|e|^ ^ R&>$>$U+U+U+U+1 1 [@/ / / r$r$r$`.n.n.| | | | ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ [ T$: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.4.4.H+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R q q r r t t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@_@_@_@7@i@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D+g@B >@>@W.W.1+1+~+~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.K.b+b+< < < < c+: : : : : #%[ [ [ [ [ j+_ _ _ _ u%d#} } } } Q%Q%X X X X ( ( | | | | n.n.`.r$r$r$/ / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 b|{.{.{.{.{.{.{.{.{.{.Z-Z+6@6@6@6@3 3 w.w.w.X&X&X&X&+={ { { { { { )=)=)=)=g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D D D t=t=_._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=O=O=O=O=O=O=O=O=P=P=P=P=P=P=P=P=P=P=P=P=P=P=P=P=P=P=P=O=O=O=O=O=O=O=O=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._.t=t=t=D D D D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.g.)=)=)=)={ { { { { +=X&X&X&X&w.w.w.w.3 l;0|=-=-=-*-*-*-a-a-a-f|B-{.{.{.{.{.{.{.{.{.{.{.{.{.{.t]g|7%>$U+U+U+U+1 1 [@/ / / r$r$r$`.n.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ #%T$: : : : c+c+< < < b+b+b+K.K.K.r#r#n n n q.q.q.4.4.H+H+H+H+`+`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J%B B >@>@W.W.1+1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.K.b+b+< < < < c+: : : : : T$#%[ [ [ [ j+_ _ _ _ _ u%} } } } } Q%X X X X ( ( ( | | | n.n.n.`.r$r$r$/ / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 b|{.{.{.{.{.{.{.{.{.{.Z-y*Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&+={ { { { { { )=)=)=)=g.g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D D D D D t=t=_._._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._.t=t=t=D D D D D D D D D D D D i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.)=)=)=)=)={ { { { { +=+=X&X&X&w.w.w.w.3 6@6@6@6@6@h|i|*-*-a-a-a-a-a-__j|k|g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.l|m|U+U+1 1 [@/ / / / r$r$`.n.n.n.| | | ( ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ [ #%: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+`+=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B o o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q q r r s t u u v w w x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=[.z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 B B O >@>@W.W.1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+H+4.4.q.q.q.n n r#r#r#K.K.K.b+b+b+< < < c+c+: : : : T$#%[ [ [ [ [ j+_ _ _ _ u%d#} } } } Q%Q%X X X X ( ( ( | | | n.n.n.`.r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+n|o|o|o|o|o|o|o|o|o|o|p|] ] y*Z+Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&+={ { { { { { )=)=)=)=g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D D D D D D t=t=t=t=_._._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._._.t=t=t=t=D D D D D D D D D D D D D D i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.)=)=)=)=)={ { { { { +=+=X&X&X&X&w.w.w.w.3 6@6@6@6@6@Z+Z+y*y$q|a-a-a-a-__r|r|>->-s|t|{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-u|1 [@/ / / / r$r$r$n.n.n.| | | | ( ( X X X X X Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ #%T$: : : : c+c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B o o o @V m.m.m. + +y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q q r r s t u u v v w x y y z S S T T ,.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Y+D+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.^ B B O >@>@W.W.1+Q.~+~+~+<+<+=.=.=.`+`+H+H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.K.b+b+< < < < c+: : : : : T$[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } Q%X X X X X ( ( | | | | n.n.n.`.r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C C y%] ] ] ] ] ] y*Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&X&+={ { { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=D D D D D D D D D D D D D D D D D t=t=t=t=t=_._._._._._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._._._._._.t=t=t=t=t=D D D D D D D D D D D D D D D D D i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.g.)=)=)=)={ { { { { { +=+=X&X&X&X&w.w.w.w.3 6@6@6@6@6@Z+Z+Z+y*] ] ] ] v|M(__r|r|>->->->->-j|w|1_{.{.{.{.{.{.{.{.{.{.{.{.{.x|/ / / / r$r$r$`.n.n.| | | | ( ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ [ #%: : : : : c+c+< < < b+b+b+K.K.K.r#r#r#n n q.q.q.4.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+1+W.W.>@>@B B o o o @V m.m.m. + +y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v v w x x y z S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=d&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@b+B B O >@>@W.W.1+Q.~+~+~+~+<+=.=.=.`+`+g@H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.K.b+b+< < < < c+c+: : : : T$#%[ [ [ [ [ j+_ _ _ _ _ d#} } } } Q%Q%X X X X ( ( ( | | | | n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&X&+={ { { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=D D D D D D D D D D D D D D D D D D D D D D D D D t=t=t=t=t=t=t=t=t=t=t=t=t=t=t=t=t=t=t=t=D D D D D D D D D D D D D D D D D D D D D D D D D i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.g.)=)=)=)=)={ { { { { { +=+=X&X&X&X&w.w.w.w.3 6@6@6@6@6@6@Z+Z+y*] ] ] ] ] ] y%C y$y|>->->->->-%-%-S=S=z|A|{.{.{.{.{.{.{.{.{.{.{.{.9=/ / r$r$r$`.n.n.n.| | | ( ( ( X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ #%T$: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.4.H+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o o V V m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+1+B B O >@>@W.W.1+1+~+~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.4.q.q.q.n n r#r#r#K.K.K.b+b+b+< < < < c+: : : : : T$[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } Q%Q%X X X X ( ( ( | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%y%] ] ] ] ] ] y*Z+Z+6@6@6@6@6@6@3 w.w.w.w.X&X&X&X&X&+={ { { { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=i=i=D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D i=i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+g.g.g.g.g.g.g.g.g.)=)=)=)=)=)={ { { { { { +=+=X&X&X&X&w.w.w.w.3 3 6@6@6@6@6@Z+Z+y*y*] ] ] ] ] ] y%C C 2 2 2 B|M(>-%-%-S=S=S=S=S=A=C|/;{.{.{.{.{.{.{.{.{.{.9=r$r$r$`.n.n.n.| | | | ( ( X X X X X Q%} } } } } u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : c+c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+H+`+`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o o V V m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r r t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=>@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a o o B B >@>@W.W.1+1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+H+4.4.q.q.q.v.n n r#r#9.K.K.K.b+b+< < < < c+c+: : : : T$#%[ [ [ [ [ j+_ _ _ _ _ u%} } } } } Q%X X X X X ( ( ( | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%] ] ] ] ] ] y*y*Z+Z+6@6@6@6@6@6@3 w.w.w.w.w.X&X&X&X&+=+={ { { { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=i=i=i=i=i=D D D D D D D D D D D D D D D D D D D D D D D D D D D D D i=i=i=i=i=i=i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)={ { { { { { { +=X&X&X&X&X&w.w.w.w.3 3 6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] y%C C C 2 2 2 2 2 2 y$D|S=S=S=S=S=A=A=A=A=E|F|{.{.{.{.{.{.{.{.{.x|r$`.n.n.n.| | | | ( ( X X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ #%T$: : : : : c+< < < < b+b+b+K.K.K.r#r#r#n n v.q.q.4.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o V V m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r r t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+}+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D o o B B >@>@>@W.W.1+Q.~+~+~+<+<+=.=.=.`+`+H+H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.K.b+b+b+< < < < c+: : : : : T$#%[ [ [ [ j+_ _ _ _ _ u%d#} } } } Q%Q%X X X X X ( ( | | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%y%] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@6@3 w.w.w.w.w.X&X&X&X&X&+={ { { { { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)={ { { { { { { +=+=X&X&X&X&X&w.w.w.w.3 3 6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] ] y%C C 2 2 2 2 2 2 x+x+x+^ ^ G|L(S=A=A=A=A=A=A=A=H|~-/;{.{.{.{.{.{.{.I|n.n.n.| | | | ( ( ( X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : c+c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.4.H+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r r t t u u v w x x y y S S T T T ,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=q$y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.} o o B B O >@>@W.W.1+Q.~+~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.4.q.q.q.n n n r#r#9.K.K.K.b+b+< < < < c+c+: : : : T$#%[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } Q%Q%X X X X X ( ( | | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 C C y%] ] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@6@3 3 w.w.w.w.X&X&X&X&X&+=+={ { { { { { { { )=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)={ { { { { { { +=+=X&X&X&X&X&w.w.w.w.w.3 6@6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ `.J|A=A=A=A=A=A=A=K|L|M|N|{.{.{.{.{.{.O|n.| | | | ( ( ( X X X X Q%Q%} } } } } d#_ _ _ _ _ _ [ [ [ [ [ #%T$: : : : : c+< < < < b+b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+H+`+`+=.=.=.=.<+~+~+~+Q.1+1+W.W.>@>@B B B o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q R R R R q r r r t t u u v w x x y y z S T T T ,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p=H+o o B B O >@>@W.W.1+1+~+~+~+~+<+=.=.=.=.`+g@H+H+H+H+4.4.q.q.q.v.n n r#r#9.K.K.K.b+b+b+< < < < c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ u%} } } } } Q%Q%X X X X ( ( ( | | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@6@3 3 w.w.w.w.w.X&X&X&X&X&+=+={ { { { { { { { )=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)={ { { { { { { { +=+=X&X&X&X&X&w.w.w.w.w.3 3 6@6@6@6@6@6@Z+Z+Z+y*y*] ] ] ] ] ] y%y%C C 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&>$>$U+G|L(A=A=A=u=n=H|L|L|P|{.{.{.{.{.{.Q|| | | ( ( ( X X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%: : : : : c+c+< < < < b+b+K.K.K.9.r#r#n n n v.q.q.q.4.G+H+H+H+g@`+`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@>@B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q r r r t t u u v w w x y y z S T T T ,.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.O o o B B O >@>@W.W.1+1+~+~+~+~+<+<+=.=.=.`+`+H+H+H+H+G+4.q.q.q.v.n n r#r#r#9.K.K.K.b+b+< < < < c+c+: : : : : #%[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } } Q%Q%X X X X ( ( ( | | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] y*Z+Z+Z+Z+6@6@6@6@6@6@3 3 w.w.w.w.w.X&X&X&X&X&X&+=+={ { { { { { { { { )=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)={ { { { { { { { { +=+=X&X&X&X&X&X&w.w.w.w.w.3 3 6@6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+B*R|u=n=n=n=H|L|L|S|{.{.{.{.{.{.u|| ( ( ( X X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+< < < < b+b+b+K.K.K.9.r#r#n n v.q.q.q.4.4.H+H+H+H+g@`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q r r r s t u u v w w x y y z S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m@ @o o o B B >@>@W.W.W.1+Q.~+~+~+<+<+=.=.=.`+`+g@H+H+H+G+4.4.q.q.q.v.n n r#r#9.K.K.K.b+b+b+< < < < c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } } Q%X X X X X ( ( ( | | | | n.n.n.`.r$r$r$/ / / / [@[@1 1 U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@6@3 w.w.w.w.w.w.X&X&X&X&X&X&+=+={ { { { { { { { { { )=)=)=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)=)={ { { { { { { { { { +=+=X&X&X&X&X&X&w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&>$>$U+U+U+U+U+1 1 [@/ T|L(n=j=U|L|V|W|{.{.{.{.{.{.X|( ( X X X X X Q%Q%} } } } d#u%_ _ _ _ _ _ [ [ [ [ [ [ T$: : : : : c+c+< < < < b+b+K.K.K.K.r#r#r#n n v.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@O B B o o o V V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u v w w x y y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=T 6.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 @o o o B B O >@>@W.W.1+Q.~+~+~+~+<+=.=.=.=.`+g@H+H+H+H+G+4.q.q.q.v.n n r#r#r#K.K.K.K.b+b+< < < < c+c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } Q%Q%X X X X X ( ( ( | | | | n.n.n.`.r$r$r$/ / / / / [@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@6@6@6@3 w.w.w.w.w.w.X&X&X&X&X&X&X&+=+=+={ { { { { { { { { { { )=)=)=)=)=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)=)=)=)={ { { { { { { { { { { { +=+=X&X&X&X&X&X&X&w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@Z+Z+Z+y*y*] ] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ R&R&>$>$U+U+U+U+1 1 1 [@/ / / / H.Y|j=H|V|V|W|{.{.{.{.{.{.Z|X X X X X Q%Q%} } } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+< < < < b+b+b+K.K.K.9.r#r#n n n q.q.q.4.4.G+H+H+H+g@`+`+=.=.=.<+<+~+~+~+Q.1+1+W.W.>@>@O B B o o o V V m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u v v w x x y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=L+H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . { V o o o B B O >@>@W.W.1+1+~+~+~+~+<+=.=.=.=.`+`+H+H+H+H+G+4.4.q.q.q.n n n r#r#9.K.K.K.b+b+b+< < < < c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ _ u%d#} } } } Q%Q%X X X X X ( ( ( | | | | n.n.n.`.r$r$r$r$/ / / / [@1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@6@6@3 3 w.w.w.w.w.w.X&X&X&X&X&X&X&X&+=+=+={ { { { { { { { { { { { { )=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)={ { { { { { { { { { { { { { +=+=+=X&X&X&X&X&X&X&w.w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@Z+Z+Z+Z+y*] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$U+U+U+U+U+1 1 [@[@/ / / / r$r$r$`.T|z|V|`| 1{.{.{.{.{.{..1X X X Q%Q%} } } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+K.K.K.K.r#r#r#n n v.q.q.q.4.4.H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+Q.1+W.W.W.>@>@B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u v v w x x y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o%e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;@n.V o o o B B O >@>@W.W.1+1+Q.~+~+~+<+<+=.=.=.=.`+g@H+H+H+H+4.4.q.q.q.v.n n r#r#r#K.K.K.K.b+b+< < < < c+c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ _ u%} } } } } Q%Q%X X X X X ( ( ( | | | | n.n.n.`.`.r$r$r$/ / / / [@[@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@6@6@3 3 3 w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&+=+=+=+={ { { { { { { { { { { { { { { { { { { )=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)={ { { { { { { { { { { { { { { { { { { +=+=+=X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@6@Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 [@/ / / / / r$r$r$`.n.n.n.+1@1L|#1{.{.{.{.{.{.$1X Q%Q%} } } } } d#u%_ _ _ _ _ j+[ [ [ [ [ [ #%: : : : : : c+< < < < b+b+b+K.K.K.9.r#r#n n n q.q.q.q.4.G+H+H+H+H+`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.p p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u v v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+n+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.< V @o o o B B >@>@>@W.W.1+Q.~+~+~+~+<+=.=.=.=.`+`+H+H+H+H+G+4.q.q.q.q.n n n r#r#9.K.K.K.b+b+b+< < < < c+c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } } Q%Q%X X X X X ( ( ( | | | | n.n.n.n.`.r$r$r$/ / / / / [@1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+6@6@6@6@6@6@6@6@3 3 3 w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&X&X&+=+=+=+={ { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { +=+=+=+=X&X&X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&R&>$>$U+U+U+U+U+1 1 1 [@/ / / / r$r$r$r$`.n.n.n.| | %11=X|&1{.{.{.{.{.{.*1Q%} } } } } d#u%_ _ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+K.K.K.K.r#r#r#n n v.q.q.q.4.4.H+H+H+H+g@`+`+=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@O B B o o o @V m.m.m. + +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u v v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@=@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H =.V @o o o B B O >@>@W.W.1+1+~+~+~+~+<+<+=.=.=.`+`+g@H+H+H+H+4.4.q.q.q.v.n n r#r#r#9.K.K.K.b+b+< < < < < c+: : : : : : #%[ [ [ [ [ [ j+_ _ _ _ _ u%d#} } } } } Q%Q%X X X X X ( ( ( | | | | | n.n.n.`.r$r$r$r$/ / / / [@1 1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@3 3 3 w.w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&X&X&X&X&X&X&+=+=+=+=+=+=+=+={ { { { { { { { { { { { { { { { { { { { { +=+=+=+=+=+=+=+=+=X&X&X&X&X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.w.w.w.3 3 3 6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 [@/ / / / / r$r$r$`.`.n.n.n.| | | | =1/=/=-1{.{.{.{.{.{.;1} } } } d#u%_ _ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#n n n q.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+Q.1+W.W.W.>@>@O B B o o o V V m.m.m. + +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p f.r.r.k.a.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y S S T T T ,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#o V V o o o B B O >@>@W.W.1+1+Q.~+~+~+<+<+=.=.=.=.`+g@H+H+H+H+G+4.q.q.q.q.n n n r#r#9.K.K.K.b+b+b+< < < < c+c+: : : : : T$#%[ [ [ [ [ [ j+_ _ _ _ _ u%d#} } } } } Q%Q%X X X X X ( ( ( ( | | | | n.n.n.`.`.r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 C C C C y%y%] ] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@3 3 3 3 w.w.w.w.w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.w.w.w.w.w.3 3 3 6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 1 [@/ / / / / r$r$r$`.n.n.n.n.| | | | ( ( >1====,1{.{.{.{.{.{.'1} } d#u%_ _ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : : c+< < < < < b+b+K.K.K.9.r#r#r#n n v.q.q.q.4.4.G+H+H+H+g@`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@>@B B o o o @V m.m.m.m. +y+y+y+y+y+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y S S T T T ,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%6%o%P%P%3&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b m.V V @o o B B B >@>@>@W.W.1+Q.~+~+~+~+<+=.=.=.=.`+`+g@H+H+H+H+4.4.q.q.q.v.n n r#r#r#9.K.K.K.b+b+b+< < < < c+c+: : : : : T$#%[ [ [ [ [ [ _ _ _ _ _ _ u%d#} } } } } Q%Q%X X X X X X ( ( ( | | | | n.n.n.n.`.r$r$r$r$/ / / / [@[@1 1 U+U+U+U+U+U+>$>$R&R&^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 C C C C y%y%] ] ] ] ] ] ] ] ] ] y*y*y*Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@3 3 3 3 w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.3 3 3 3 6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] ] ] y%y%C C C C 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 1 [@/ / / / / r$r$r$r$`.n.n.n.| | | | | ( ( ( X =1====)1{.{.{.{.{.{.!1d#u%_ _ _ _ _ _ j+[ [ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#n n n q.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0..+R.p p p r.r.k.k.a.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y S S T T T ,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+}+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=z h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , m.m.V @o o o B B O >@>@W.W.1+1+~+~+~+~+<+<+=.=.=.=.`+g@H+H+H+H+G+4.q.q.q.q.v.n n r#r#r#K.K.K.K.b+b+< < < < < c+c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ _ u%d#} } } } } Q%Q%X X X X X X ( ( ( | | | | | n.n.n.`.r$r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 2 C C C C y%y%] ] ] ] ] ] ] ] ] ] ] ] y*y*y*Z+Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@3 3 3 3 3 3 3 w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.3 3 3 3 3 3 3 6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+y*y*y*] ] ] ] ] ] ] ] ] ] ] y%y%C C C C 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+U+1 1 [@/ / / / / / r$r$r$`.n.n.n.n.| | | | ( ( ( ( X X X =1==J*~1{.{.{.{.{.{.{1_ _ _ _ _ _ j+[ [ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#r#n n v.q.q.q.4.4.G+H+H+H+H+`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o V V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0..+R.p p p r.r.k.k.a.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.t.u.u.u.u.N.N.N.N.=+,+,+,+}+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=L+H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g.m.m.V @o o o B B O >@>@W.W.W.1+Q.~+~+~+~+<+=.=.=.=.`+`+g@H+H+H+H+4.4.q.q.q.v.n n n r#r#9.K.K.K.b+b+b+< < < < c+c+: : : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ _ u%d#} } } } } } Q%Q%X X X X X ( ( ( ( | | | | n.n.n.n.`.r$r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 2 C C C C y%y%] ] ] ] ] ] ] ] ] ] ] ] ] y*y*y*Z+Z+Z+Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+Z+y*y*y*] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%C C C C 2 2 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$U+U+U+U+U+U+1 1 [@[@/ / / / / r$r$r$r$`.n.n.n.n.| | | | ( ( ( ( X X X X X ]1J*J*~1{.{.{.{.{.{.)1_ _ _ _ j+[ [ [ [ [ [ #%T$: : : : : c+c+< < < < < b+b+K.K.K.K.9.r#r#n n n q.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+~+Q.1+W.W.>@>@>@B B B o o @V V m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.t.u.u.u.u.N.N.N.N.=+,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o%K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.r$m.m.V V @o o B B B >@>@>@W.W.1+1+~+~+~+~+<+<+=.=.=.=.`+g@H+H+H+H+G+4.4.q.q.q.v.n n r#r#r#9.K.K.K.b+b+b+< < < < c+c+: : : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ _ u%d#} } } } } } Q%Q%X X X X X ( ( ( ( | | | | | n.n.n.`.`.r$r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 2 C C C C C y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y*y*y*y*Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+y*y*y*y*] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%C C C C 2 2 2 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$U+U+U+U+U+U+1 1 [@[@/ / / / / r$r$r$r$`.n.n.n.n.| | | | | ( ( ( X X X X X X Q%Q%]1J*J*)1{.{.{.{.{.{.^1_ _ j+[ [ [ [ [ [ #%T$: : : : : : c+< < < < < b+b+b+K.K.K.9.r#r#n n n v.q.q.q.4.4.G+H+H+H+H+`+`+=.=.=.=.<+<+~+~+~+Q.1+1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+y+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+n+n+q+B+B+L+P+Y+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%6%o%o%P%P%3&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.T#m.m.m.V @o o o B B O >@>@W.W.1+1+Q.~+~+~+~+<+=.=.=.=.`+`+g@H+H+H+H+4.4.q.q.q.q.n n n r#r#9.K.K.K.K.b+b+b+< < < < c+c+: : : : : : #%[ [ [ [ [ [ j+_ _ _ _ _ _ u%u%d#} } } } } Q%Q%X X X X X X ( ( ( | | | | | n.n.n.n.`.r$r$r$r$/ / / / / / [@1 1 1 U+U+U+U+U+U+>$>$>$>$R&^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 C C C C C y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y*y*y*y*y*y*Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+y*y*y*y*y*y*y*] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%C C C C C 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$U+U+U+U+U+U+1 1 1 [@[@/ / / / / r$r$r$r$`.`.n.n.n.| | | | | ( ( ( ( X X X X X X Q%Q%} } ]1J*J*{1{.{.{.{.{.{.-1j+[ [ [ [ [ [ #%T$: : : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#r#n n v.q.q.q.q.4.G+H+H+H+H+g@`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q R R R R q q r r s t u u u v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D+!#m.m.m.V @o o o B B O >@>@>@W.W.1+Q.~+~+~+~+<+<+=.=.=.=.`+g@H+H+H+H+G+4.4.q.q.q.v.n n n r#r#9.K.K.K.K.b+b+< < < < < c+c+: : : : : T$#%[ [ [ [ [ [ j+_ _ _ _ _ _ _ u%d#} } } } } Q%Q%Q%X X X X X ( ( ( ( | | | | | n.n.n.n.`.r$r$r$r$/ / / / / / [@1 1 1 1 U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C y%y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$>$U+U+U+U+U+U+1 1 1 [@[@/ / / / / r$r$r$r$r$`.n.n.n.n.| | | | | ( ( ( X X X X X X Q%Q%} } } } } %1K*F*/1{.{.{.{.{.{.(1[ [ [ [ [ #%T$: : : : : : c+c+< < < < b+b+b+K.K.K.K.9.r#r#n n n v.q.q.q.4.4.H+H+H+H+H+`+`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@O B B B o o o V V m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.R.p p f.r.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R R q q r r s t u u u v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=[ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.W.m.m.m.V V @o o o B B O >@>@W.W.1+1+Q.~+~+~+~+<+=.=.=.=.`+`+g@H+H+H+H+G+4.q.q.q.q.v.n n r#r#r#9.K.K.K.b+b+b+< < < < < c+c+: : : : : T$#%[ [ [ [ [ [ j+_ _ _ _ _ _ _ u%d#} } } } } } Q%Q%X X X X X X ( ( ( ( | | | | | n.n.n.n.`.r$r$r$r$/ / / / / / [@[@1 1 1 U+U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C C C y%y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%y%C C C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$>$U+U+U+U+U+U+U+1 1 1 [@[@/ / / / / r$r$r$r$r$`.n.n.n.n.| | | | | ( ( ( ( X X X X X X Q%Q%} } } } } } d#]1r*r*_1{.{.{.{.{.{.:1[ [ [ #%T$: : : : : : c+c+< < < < < b+b+K.K.K.K.9.r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R R q q r r s t u u u v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K$B m.m.m.m.V @o o o B B O >@>@W.W.W.1+Q.~+~+~+~+<+<+=.=.=.=.`+g@H+H+H+H+G+4.4.q.q.q.v.n n n r#r#r#9.K.K.K.b+b+b+< < < < < c+c+: : : : : T$#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ u%d#} } } } } } Q%Q%X X X X X X ( ( ( ( | | | | | | n.n.n.n.`.r$r$r$r$/ / / / / / / [@1 1 1 1 U+U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C C C C C y%y%y%y%y%y%y%y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%y%y%y%y%y%y%y%C C C C C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$>$U+U+U+U+U+U+U+1 1 1 1 [@/ / / / / / r$r$r$r$r$`.n.n.n.n.| | | | | | ( ( ( X X X X X X Q%Q%Q%} } } } } d#d#u%_ +1r*r*!1{.{.{.{.{.{.<1[ #%T$: : : : : : c+c+< < < < < b+b+b+K.K.K.9.r#r#r#n n v.q.q.q.q.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@>@B B B o o o @V m.m.m.m. +y+y+y+y+y+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R R q r r r s t u u u v w x x y y S S T T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#8$8$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=#+;@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . & V m.m.m.m.V V o o o B B B O >@>@W.W.1+1+Q.~+~+~+~+<+=.=.=.=.`+`+g@H+H+H+H+G+4.4.q.q.q.v.n n n r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : T$#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ u%u%d#} } } } } Q%Q%Q%X X X X X X ( ( ( ( | | | | | n.n.n.n.n.`.r$r$r$r$r$/ / / / / / [@[@1 1 1 U+U+U+U+U+U+U+U+>$>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$>$U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / r$r$r$r$r$`.n.n.n.n.| | | | | | ( ( ( ( X X X X X X Q%Q%} } } } } } d#u%_ _ _ _ ]1r*r*[1{.{.{.{.{.{.}1T$: : : : : : c+c+< < < < < b+b+b+K.K.K.9.r#r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+=.=.=.=.=.<+~+~+~+~+Q.1+1+W.W.>@>@O B B o o o @V V m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0..+R.p p p r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q R R R q q r r r s t u u v v w x x y y S S T T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$q$&%6%o%o%P%P%3&3&t&t&>*9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=-.A.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b + +m.m.m.m.V @o o o B B O >@>@W.W.W.1+Q.~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+G+4.q.q.q.q.v.n n n r#r#9.K.K.K.K.b+b+b+< < < < < c+: : : : : : : T$#%[ [ [ [ [ [ j+_ _ _ _ _ _ _ u%d#} } } } } } Q%Q%X X X X X X X ( ( ( ( | | | | | n.n.n.n.n.`.r$r$r$r$r$/ / / / / / / [@[@1 1 1 U+U+U+U+U+U+U+U+>$>$>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$>$U+U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / / r$r$r$r$`.`.n.n.n.n.| | | | | | ( ( ( ( X X X X X X Q%Q%Q%} } } } } } d#u%_ _ _ _ _ _ ]1s*7*|1{.{.{.{.{.{.11: : : : : c+c+< < < < < b+b+b+K.K.K.K.9.r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@>@O B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p p r.r.k.k.a.a.b.b.<.[.-.-.-.;.Q R R R q q r r r s t u u v v w x x y y S S T T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w 7.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F y+ +m.m.m.m.V @o o o B B B >@>@>@W.W.1+1+Q.~+~+~+~+<+=.=.=.=.=.`+g@H+H+H+H+G+4.4.q.q.q.q.v.n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : T$#%[ [ [ [ [ [ j+_ _ _ _ _ _ _ u%d#d#} } } } } } Q%Q%X X X X X X X ( ( ( ( | | | | | | n.n.n.n.`.`.r$r$r$r$r$/ / / / / / / [@[@1 1 1 1 U+U+U+U+U+U+U+U+>$>$>$>$>$R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&>$>$>$>$U+U+U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / / r$r$r$r$r$`.`.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%} } } } } } d#u%u%_ _ _ _ _ _ _ j++17*7*|1{.{.{.{.{.{.11: : : c+c+< < < < < b+b+b+K.K.K.K.9.r#r#r#n n v.q.q.q.q.4.G+H+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@O B B o o o o V V m.m.m.m. +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.#+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.a.b.b.<.[.-.-.-.;.Q R R R q q r r r t t u u v v w x x y y S S T T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e.@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^+y+ + +m.m.m.V V @o o o B B O >@>@W.W.W.1+Q.~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+G+4.4.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : T$#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ _ u%d#} } } } } } Q%Q%Q%X X X X X X X ( ( ( ( | | | | | | n.n.n.n.n.`.r$r$r$r$r$r$/ / / / / / / [@[@1 1 1 1 U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&R&>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / / r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } d#u%_ _ _ _ _ _ _ j+[ [ [ +17*7*21{.{.{.{.{.{.31: c+c+< < < < < b+b+b+K.K.K.K.9.r#r#r#n n v.q.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+~+~+~+~+~+1+1+W.W.>@>@>@O B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r r t t u u v v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==+^.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . o.y+ + +m.m.m.m.V @o o o B B B >@>@>@W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+G+4.4.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : T$#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ _ u%d#d#} } } } } } Q%Q%Q%X X X X X X X ( ( ( ( | | | | | | n.n.n.n.n.`.`.r$r$r$r$r$r$/ / / / / / / / [@[@1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$R&R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&>$>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / / / r$r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } d#u%u%_ _ _ _ _ _ _ j+[ [ [ [ [ +17*1*41{.{.{.{.{.{.51c+< < < < < b+b+b+K.K.K.K.9.r#r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@O B B B o o o @V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r r t t u u v v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+}+5+5+5+n+n+q+B+B+L+P+P+Y++@+@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=B+j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *@y+y+ +m.m.m.m.V V @o o o B B O >@>@W.W.W.1+1+~+~+~+~+~+<+=.=.=.=.=.`+g@H+H+H+H+H+G+4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : T$#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ u%d#} } } } } } } Q%Q%Q%X X X X X X X ( ( ( ( | | | | | | | n.n.n.n.n.`.`.r$r$r$r$r$r$/ / / / / / / / [@[@[@1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$>$>$R&R&R&R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&R&R&>$>$>$>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 [@[@/ / / / / / / / / r$r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | ( ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } } d#u%_ _ _ _ _ _ _ j+j+[ [ [ [ [ [ #%61W&W&;1{.{.{.{.{.{.71< < < < b+b+b+K.K.K.K.9.r#r#r#n n n v.q.q.q.4.4.G+H+H+H+H+H+g@`+=.=.=.=.=.<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o @V V m.m.m.m. +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0..+R.p p p r.r.r.k.k.a.b.b.<.[.[.-.-.-.Q Q R R R q q r r r t t u u v w w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+n+n+q+B+B+L+P+P+Y++@+@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$8$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7@y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.81y+y+ + +m.m.m.m.V @o o o B B B O >@>@W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : : T$#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ _ u%u%d#} } } } } } } Q%Q%Q%X X X X X X X ( ( ( ( ( | | | | | | | n.n.n.n.n.`.`.r$r$r$r$r$r$/ / / / / / / / / / [@[@[@1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$>$>$>$>$>$>$>$R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&>$>$>$>$>$>$>$>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 [@[@[@/ / / / / / / / / r$r$r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | | ( ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } } d#u%_ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ #%T$: 91W&W&01{.{.{.{.{.{.a1< < b+b+b+K.K.K.K.9.r#r#r#n n n v.q.q.q.q.4.G+H+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+W.W.W.>@>@O B B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0.R.R.p p p r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q R R R R q q r r s t u u u v w w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$&%&%6%o%o%P%P%3&3&t&t&>*9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=U#e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.] y+y+y+ +m.m.m.m.V V @o o o B B O >@>@>@W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : : T$#%[ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ u%u%d#} } } } } } } Q%Q%Q%X X X X X X X X ( ( ( ( ( | | | | | | | n.n.n.n.n.n.`.`.r$r$r$r$r$r$/ / / / / / / / / / / [@[@[@1 1 1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 1 1 [@[@[@/ / / / / / / / / / r$r$r$r$r$r$r$`.`.n.n.n.n.n.n.| | | | | | | ( ( ( ( ( X X X X X X X X Q%Q%Q%} } } } } } } d#u%u%_ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ #%T$: : : 91W&W&b1{.{.{.{.{.{.c1b+b+b+K.K.K.K.9.r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o @V V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q R R R R q q r r s t u u u v w w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=P%G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.U+y+y+y+ + +m.m.m.m.V @o o o B B B O >@>@W.W.W.1+Q.~+~+~+~+~+<+=.=.=.=.=.`+`+g@H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : : T$#%#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ u%d#d#} } } } } } } Q%Q%Q%X X X X X X X X ( ( ( ( ( | | | | | | | | n.n.n.n.n.n.`.`.`.r$r$r$r$r$r$r$/ / / / / / / / / / / / [@[@[@[@1 1 1 1 1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 1 1 1 1 [@[@[@[@/ / / / / / / / / / / / r$r$r$r$r$r$r$`.`.`.n.n.n.n.n.n.| | | | | | | | ( ( ( ( ( X X X X X X X X Q%Q%Q%} } } } } } } d#d#u%_ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ #%T$T$: : : : : 91W&W&d1{.{.{.{.{.{.e1b+K.K.K.K.9.r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.=.<+~+~+~+~+~+1+1+W.W.W.>@>@O B B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.b.b.b.<.[.-.-.-.;.Q R R R R q q r r s t u u u v w w x x y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X.X y+y+y+y+ +m.m.m.m.V V @o o o B B O >@>@>@W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.=.`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < < c+c+: : : : : : : T$#%[ [ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ u%d#d#} } } } } } } Q%Q%Q%X X X X X X X X X ( ( ( ( ( | | | | | | | | | n.n.n.n.n.n.`.`.`.r$r$r$r$r$r$r$r$/ / / / / / / / / / / / / / / [@[@[@[@[@1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 [@[@[@[@[@[@/ / / / / / / / / / / / / / / r$r$r$r$r$r$r$r$`.`.n.n.n.n.n.n.n.| | | | | | | | | ( ( ( ( ( X X X X X X X X Q%Q%Q%Q%} } } } } } } d#d#u%_ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ [ #%T$: : : : : : : c+f1K&K&b1{.{.{.{.{.{.g1K.K.K.9.r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+=.=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@B B B o o o @V V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R q q r r r s t u u u v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I _ y+y+y+y+ + +m.m.m.m.V @o o o o B B O >@>@W.W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < < c+c+: : : : : : : T$#%#%[ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ u%d#d#} } } } } } } } Q%Q%Q%X X X X X X X X X ( ( ( ( ( ( | | | | | | | | | n.n.n.n.n.n.n.`.`.`.r$r$r$r$r$r$r$r$r$r$/ / / / / / / / / / / / / / / / / / / / / / [@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@/ / / / / / / / / / / / / / / / / / / / / / r$r$r$r$r$r$r$r$r$r$`.`.`.n.n.n.n.n.n.n.| | | | | | | | | ( ( ( ( ( ( X X X X X X X X X Q%Q%Q%} } } } } } } } d#u%u%_ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ #%T$T$: : : : : : : c+c+< 91K&K&h1{.{.{.{.{.{.i1K.9.r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o o @V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.R.p p p r.r.k.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r r s t u u u v w x x y y z S S T T T ,.d.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J < y+y+y+y+y+ +m.m.m.m.V V @o o o B B B O >@>@W.W.W.1+1+~+~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+b+< < < < < c+c+c+: : : : : : : T$#%[ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ u%u%d#} } } } } } } } Q%Q%Q%Q%X X X X X X X X X ( ( ( ( ( ( | | | | | | | | | | n.n.n.n.n.n.n.n.n.`.`.`.r$r$r$r$r$r$r$r$r$r$r$r$r$/ / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / r$r$r$r$r$r$r$r$r$r$r$r$r$`.`.`.n.n.n.n.n.n.n.n.n.| | | | | | | | | ( ( ( ( ( ( ( X X X X X X X X X Q%Q%Q%Q%} } } } } } } } d#u%u%_ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ #%T$: : : : : : : c+c+c+< < < 91K&x&j1{.{.{.{.{.{.k1r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+~+1+1+W.W.W.>@>@O B B B o o o @V V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.:.#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q Q R R R q q r r r t t u u u v w x x y y z S S T T >.,.d.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ < y+y+y+y+y+ + +m.m.m.m.V V o o o o B B O >@>@>@W.W.1+1+Q.~+~+~+~+~+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.K.b+b+b+< < < < < < c+c+: : : : : : : : T$#%[ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } Q%Q%Q%Q%X X X X X X X X X X ( ( ( ( ( ( ( | | | | | | | | | | n.n.n.n.n.n.n.n.n.n.n.`.`.`.`.r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$/ / / / / / / / / / r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$`.`.`.`.n.n.n.n.n.n.n.n.n.n.n.| | | | | | | | | | ( ( ( ( ( ( ( X X X X X X X X X X Q%Q%Q%Q%} } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ #%T$T$: : : : : : : c+c+< < < < < < l1x&x&m1{.{.{.{.{.{.n1r#n n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+~+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o o V V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.b.b.b.<.[.-.-.-.;.Q R R R R q q r r r t t u u v v w x x y y z S S T T >.,.d.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&3&t&t&>*9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J )@z+y+y+y+y+y+ +m.m.m.m.m.V @o o o B B B O >@>@>@W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.K.b+b+b+< < < < < < c+c+c+: : : : : : : T$T$#%[ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ u%u%d#} } } } } } } } } Q%Q%Q%Q%X X X X X X X X X X X ( ( ( ( ( ( ( | | | | | | | | | | | | | n.n.n.n.n.n.n.n.n.n.n.n.n.`.`.`.`.`.`.`.r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$`.`.`.`.`.`.`.n.n.n.n.n.n.n.n.n.n.n.n.n.| | | | | | | | | | | | | ( ( ( ( ( ( ( X X X X X X X X X X X Q%Q%Q%Q%} } } } } } } } } d#u%u%_ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ #%T$T$: : : : : : : c+c+c+< < < < < < b+b+o1j&j&R%{.{.{.{.{.{.p1n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B B o o o @V m.m.m.m.m. +y+y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0.0.R.R.p p p r.r.r.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r s t t u u v v w x x y y z S S T T >.,.d.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@t#t#U#8$8$q$&%&%6%o%P%P%P%3&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . s+_ l+y+y+y+y+y+ + +m.m.m.m.V V @o o o B B B O >@>@W.W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#r#9.K.K.K.K.b+b+b+b+< < < < < < c+c+: : : : : : : : T$#%#%[ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ u%d#d#} } } } } } } } } Q%Q%Q%Q%X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( | | | | | | | | | | | | | | | n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.| | | | | | | | | | | | | | | ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X Q%Q%Q%Q%} } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ #%#%T$: : : : : : : : c+c+< < < < < < b+b+b+b+K.l1j&j&R%{.{.{.{.{.{.q1v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.W.>@>@O B B B o o o @V V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R q q q r r s t u u u v w w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@t#t#U#8$8$q$&%&%6%o%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=F+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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A.( l+z+y+y+y+y+y+ + +m.m.m.m.V V o o o o B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n n r#r#r#9.K.K.K.K.K.b+b+b+< < < < < < c+c+c+: : : : : : : : T$#%#%[ [ [ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } } } Q%Q%Q%Q%X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( | | | | | | | | | | | | | | | | | | | | | | | | n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.| | | | | | | | | | | | | | | | | | | | | | | | ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X Q%Q%Q%Q%} } } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : c+c+c+< < < < < < b+b+b+K.K.K.K.91k&8&Y%{.{.{.{.{.{.r1q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+1+1+W.W.W.>@>@>@O B B o o o o @V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.-.Q Q R R R q q r r r s t u u u v w w x x y y S S T T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@P@t#U#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&9*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9*:@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X./ l+l+z+y+y+y+y+y+ +m.m.m.m.V V @o o o o B B O >@>@>@W.W.W.1+Q.~+~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.v.n n n r#r#r#9.K.K.K.K.K.b+b+b+b+< < < < < < c+c+c+: : : : : : : : T$#%#%[ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } } } } Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( ( ( ( | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ( ( ( ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%} } } } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : c+c+c+< < < < < < b+b+b+b+K.K.K.K.K.9.l18&8&Y%{.{.{.{.{.{.s1q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.>@>@>@O B B B o o o @V V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0..+R.R.p p p r.r.r.k.k.a.b.b.b.<.[.-.-.-.;.Q R R R R q q r r r s t u u u v w x x x y y S S T T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@P@t#U#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.^ l+l+z+y+y+y+y+y+ + +m.m.m.m.V V @o o o B B B O >@>@>@W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.q.v.n n n r#r#r#r#9.K.K.K.K.K.b+b+b+< < < < < < < c+c+c+: : : : : : : : T$T$#%[ [ [ [ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } } } } Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%} } } } } } } } } } } d#d#d#u%u%_ _ _ _ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : : c+c+< < < < < < < b+b+b+K.K.K.K.K.9.r#r#r#l12&2&2&{.{.{.{.{.{.t14.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.>@>@>@O B B B o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r t t u u u v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@P@t#U#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o%b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.y*l+l+l+z+y+y+y+y+y+ + +m.m.m.m.V V o o o o B B B O >@>@W.W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.4.q.q.q.q.v.n n n n r#r#r#9.K.K.K.K.K.b+b+b+b+< < < < < < < c+c+c+: : : : : : : : T$T$#%[ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ u%u%d#d#d#} } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ #%T$T$: : : : : : : : : c+c+< < < < < < < b+b+b+b+K.K.K.K.K.9.r#r#r#n n l12&<&Y%{.{.{.{.{.{.u1H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@O B B B o o o o @V m.m.m.m.m. +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0.0.R.R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.-.;.Q R R R R q q r r s t t u u v v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8$G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.{ l+l+l+z+y+y+y+y+y+ + +m.m.m.m.m.V @o o o o B B B O >@>@W.W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+H+G+4.4.q.q.q.q.v.v.n n n r#r#r#r#9.K.K.K.K.K.b+b+b+b+< < < < < < < c+c+c+: : : : : : : : : T$#%#%[ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ u%u%d#d#d#} } } } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } } d#d#d#u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : : : c+c+< < < < < < < b+b+b+b+K.K.K.K.K.9.r#r#r#r#n n n n v1Y%Y%Y%K-{.{.{.{.{.w1H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B o o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p r.r.r.k.k.a.b.b.b.<.[.[.-.-.;.Q Q R R R q q r r r s t u u u v v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=i@{&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.~ l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.V V @o o o o B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+H+G+4.4.q.q.q.q.q.v.n n n n r#r#r#9.9.K.K.K.K.K.b+b+b+b+< < < < < < < c+c+c+: : : : : : : : : T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%d#d#d#} } } } } } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } } } } } d#d#d#u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ [ [ #%T$T$: : : : : : : : : c+c+c+< < < < < < < b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#n n n v.q.q.x1Y%Y%Y%g-{.{.{.{.{.w1H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B o o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r s t u u u v w w x x y y z S S T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&t&>*9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w='@$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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P=l+l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.V V @o o o o B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.`+`+`+g@H+H+H+H+H+G+4.4.4.q.q.q.q.v.v.n n n r#r#r#r#9.K.K.K.K.K.K.b+b+b+b+< < < < < < < c+c+c+: : : : : : : : : : T$T$#%[ [ [ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%d#d#d#d#} } } } } } } } } } } } } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } } } } } } } } } } } } d#d#d#d#u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : : : c+c+c+< < < < < < < b+b+b+b+b+K.K.K.K.K.9.r#r#r#r#n n n n v.q.q.q.q.x1Y%Y%Y%g-{.{.{.{.{.y1`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o @V V m.m.m.m.m. +y+y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r t t u u u v w w x x y y S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&t&>*9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=L+y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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C.l+l+l+l+l+z+y+y+y+y+y+y+ +m.m.m.m.m.V V @o o o B B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.=.`+`+g@H+H+H+H+H+H+G+4.4.q.q.q.q.q.v.n n n n r#r#r#r#9.K.K.K.K.K.K.b+b+b+b+< < < < < < < c+c+c+: : : : : : : : : : : T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%u%d#d#d#d#} } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } d#d#d#d#u%u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : : : : c+c+c+< < < < < < < b+b+b+b+b+K.K.K.K.K.9.r#r#r#r#n n n n v.q.q.q.q.q.4.4.v1Y%Y%Y%9;{.{.{.{.{.z1=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.Q Q R R R q q q r r s t t u u v v w x x y y y S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=5+V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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E G.l+l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.m.V V @o o o B B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.=.`+`+g@H+H+H+H+H+H+G+4.4.4.q.q.q.q.v.v.n n n n r#r#r#r#9.K.K.K.K.K.K.b+b+b+b+< < < < < < < < c+c+c+: : : : : : : : : : : T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%u%u%d#d#d#d#d#d#} } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } d#d#d#d#d#d#u%u%u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : : c+c+c+< < < < < < < < b+b+b+b+b+K.K.K.K.K.9.9.r#r#r#r#n n n v.v.q.q.q.q.q.4.4.G+H+A1Y%Y%Y%{,{.{.{.{.{.B1=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o @V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p f.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r s t u u u v v w x x y y z S S T T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u.a+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.:.G.l+l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.m.V @o o o o B B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+~+<+<+=.=.=.=.=.`+`+g@g@H+H+H+H+H+G+G+4.4.q.q.q.q.q.v.n n n n r#r#r#r#r#9.K.K.K.K.K.K.b+b+b+b+< < < < < < < < c+c+c+c+: : : : : : : : : : : T$T$#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%u%u%u%u%u%u%u%u%d#d#d#d#d#d#d#d#d#d#d#d#u%u%u%u%u%u%u%u%u%u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : : c+c+c+c+< < < < < < < < b+b+b+b+b+K.K.K.K.K.9.9.r#r#r#r#n n n n v.q.q.q.q.q.4.4.4.G+H+H+H+A1Y%Y%R%1_{.{.{.{.{.C1=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+l+:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.r.k.k.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r s t u u u v w w x x y y z S S T T T ,.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&3&t&t&t&9*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=p^d+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V:l+G.l+l+l+l+l+l+y+y+y+y+y+y+ + +m.m.m.m.V V @o o o o B B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+~+<+<+=.=.=.=.=.=.`+`+g@H+H+H+H+H+H+G+4.4.4.q.q.q.q.q.v.n n n n r#r#r#r#r#9.K.K.K.K.K.K.b+b+b+b+b+< < < < < < < < c+c+c+c+: : : : : : : : : : : : T$T$#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : : : c+c+c+c+< < < < < < < < < b+b+b+b+K.K.K.K.K.K.9.9.r#r#r#r#n n n n v.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+D1O%O%O%/;{.{.{.{.{.E1<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.b.b.<.<.[.-.-.-.;.Q Q R R R q q q r r r t t u u u v w w x x y y z S S T T >.,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%~&3&t&t&t&9*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=;.@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . % V :.G.l+l+l+l+l+z+y+y+y+y+y+y+ + +m.m.m.m.V V @o o o o B B B O >@>@>@W.W.W.1+1+Q.Q.~+~+~+~+~+<+<+=.=.=.=.=.=.`+`+g@g@H+H+H+H+H+H+G+4.4.q.q.q.q.q.q.v.n n n n r#r#r#r#r#9.K.K.K.K.K.K.b+b+b+b+b+< < < < < < < < < c+c+c+c+: : : : : : : : : : : : : T$T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%T$T$: : : : : : : : : : : : : c+c+c+c+< < < < < < < < < b+b+b+b+b+K.K.K.K.K.K.9.9.r#r#r#r#n n n n v.q.q.q.q.q.q.4.4.G+G+H+H+H+H+H+H+g@`+A1v%v%v%/;{.{.{.{.{.F1~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.p p p p r.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r s t t u u v v w x x y y y S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&9*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=B X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # =.:.:.G.l+l+l+l+l+z+y+y+y+y+y+y+ + +m.m.m.m.V V @o o o o B B B O >@>@>@W.W.W.W.1+1+Q.~+~+~+~+~+<+<+<+=.=.=.=.=.`+`+`+g@H+H+H+H+H+H+G+G+4.4.q.q.q.q.q.q.v.n n n n r#r#r#r#r#9.K.K.K.K.K.K.K.b+b+b+b+b+< < < < < < < < < c+c+c+c+c+: : : : : : : : : : : : : : T$T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+j+j+j+j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+j+j+j+j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%T$T$T$: : : : : : : : : : : : : : c+c+c+c+< < < < < < < < < b+b+b+b+b+K.K.K.K.K.K.K.9.r#r#r#r#r#n n n n v.v.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+g@`+`+`+=.G1v%v%v%$;{.{.{.{.{.H1~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+l+:.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.Q Q R R R R q q r r r s t u u u v v w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=} . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+< :.:.:.G.l+l+l+l+l+z+y+y+y+y+y+y+ +m.m.m.m.m.V V @o o o o B B B O >@>@>@>@W.W.W.1+1+Q.~+~+~+~+~+~+<+<+=.=.=.=.=.=.`+`+g@g@H+H+H+H+H+H+G+4.4.4.q.q.q.q.q.q.v.n n n n n r#r#r#r#9.9.K.K.K.K.K.K.K.b+b+b+b+b+< < < < < < < < < < c+c+c+c+: : : : : : : : : : : : : : : : T$T$T$#%#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%#%T$T$T$: : : : : : : : : : : : : : : : c+c+c+c+< < < < < < < < < < b+b+b+b+b+b+K.K.K.K.K.K.9.9.r#r#r#r#r#n n n n v.v.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@`+`+=.=.=.=.G1v%n%n%$;{.{.{.{.{.I11+1+1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.p p p p r.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q Q R R R q q q r r r t t u u u v w w x x y y z S S T T T >.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I n.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.m.V V @o o o o B B B O O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+~+<+<+=.=.=.=.=.=.=.`+`+g@H+H+H+H+H+H+H+G+4.4.4.q.q.q.q.q.q.v.n n n n n r#r#r#r#r#9.K.K.K.K.K.K.K.K.b+b+b+b+b+< < < < < < < < < < < c+c+c+c+c+: : : : : : : : : : : : : : : : : : T$T$T$T$#%#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%#%#%T$T$T$T$: : : : : : : : : : : : : : : : : : c+c+c+c+< < < < < < < < < < < b+b+b+b+b+b+K.K.K.K.K.K.K.9.9.r#r#r#r#n n n n n v.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.J1n%<%<%K1{.{.{.{.{.L1W.W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r s t t u u u v w x x x y y z S S T T T ,.,.d.d.d.2.2.e.e.e.e.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~&; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.{ :.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.m.V V @o o o o B B B B O >@>@>@W.W.W.1+1+1+Q.~+~+~+~+~+~+<+<+=.=.=.=.=.=.`+`+`+g@H+H+H+H+H+H+H+G+4.4.4.q.q.q.q.q.q.v.v.n n n n r#r#r#r#r#9.9.K.K.K.K.K.K.K.K.b+b+b+b+b+b+< < < < < < < < < < < c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : T$T$T$T$T$T$#%#%#%#%#%#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%#%#%#%#%T$T$T$T$T$T$: : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+< < < < < < < < < < < < b+b+b+b+b+b+K.K.K.K.K.K.K.9.9.r#r#r#r#r#n n n n n v.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@g@`+`+=.=.=.=.=.=.<+<+<+G1<%<%<% >{.{.{.{.{.M1W.>@>@>@>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.0.0.0.0.0.R.R.p p p f.r.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q Q R R R R q q r r r s t u u u v v w x x y y y S S T T T >.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_@J%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Q+:.:.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.m.V V @o o o o o B B B O >@>@>@W.W.W.W.1+1+Q.~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.`+`+`+g@H+H+H+H+H+H+H+G+4.4.4.q.q.q.q.q.q.v.v.n n n n n r#r#r#r#r#9.9.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+< < < < < < < < < < < < c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+c+< < < < < < < < < < < < < b+b+b+b+b+b+K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#n n n n n v.v.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@g@`+`+=.=.=.=.=.=.=.<+<+~+~+~+G1<%<%[% >{.{.{.{.{.N1>@>@O B B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.p p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q q r r r t t u u u v w w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u.V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a l+:.:.:.:.:.G.l+l+l+l+l+z+y+y+y+y+y+y+ + +m.m.m.m.m.V V V @o o o o B B B O >@>@>@>@W.W.W.1+1+Q.Q.~+~+~+~+~+~+<+<+=.=.=.=.=.=.=.`+`+g@g@H+H+H+H+H+H+H+G+G+4.4.4.q.q.q.q.q.q.v.v.n n n n n r#r#r#r#r#9.9.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+< < < < < < < < < < < < < < c+c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+c+c+< < < < < < < < < < < < < < < b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#n n n n n v.q.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.<+<+<+~+~+~+~+~+G1[%'%'%.>{.{.{.{.{.O1O B B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.<.<.[.-.-.-.-.Q Q R R R R q q r r r s t u u u v v w x x x y y z S S T T T ,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=-.@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {& @:.:.:.:.:.:.G.l+l+l+l+l+z+y+y+y+y+y+y+ + +m.m.m.m.m.m.V V @o o o o B B B O O >@>@>@W.W.W.W.1+1+Q.~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.`+`+g@g@H+H+H+H+H+H+H+G+G+4.4.4.q.q.q.q.q.q.q.v.n n n n n n r#r#r#r#r#r#9.9.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < c+c+c+c+c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+c+c+c+c+c+< < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#n n n n n v.v.q.q.q.q.q.q.4.4.4.4.G+H+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+Q.1+P1'%p$p$#;{.{.{.{.{.Q1B B o o o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.0.0.0.0.0..+R.p p p p r.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q q r r r s t u u u v v w x x y y y S S S T T >.,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # R1:.:.:.:.:.:.:.G.l+l+l+l+l+z+y+y+y+y+y+y+ + + +m.m.m.m.m.V V @o o o o B B B B O >@>@>@W.W.W.W.1+1+1+Q.~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.`+`+`+g@H+H+H+H+H+H+H+H+G+4.4.4.4.q.q.q.q.q.q.q.v.n n n n n n r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < < < < < < c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+< < < < < < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#n n n n n n v.v.q.q.q.q.q.q.q.4.4.4.G+G+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.<+<+~+~+~+~+~+~+~+Q.1+1+W.S1p$p$p$T1{.{.{.{.{.U1o o o o @V V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.a.b.b.<.<.[.-.-.-.-.Q Q R R R R q q r r r s t t u u u v w w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+O.2+:.:.:.:.:.:.:.G.l+l+l+l+l+z+y+y+y+y+y+y+y+ + +m.m.m.m.m.V V @o o o o o B B B O >@>@>@>@W.W.W.W.1+1+Q.~+~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.`+`+`+g@H+H+H+H+H+H+H+H+G+G+4.4.4.q.q.q.q.q.q.q.q.v.v.n n n n n n r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#r#n n n n n n v.v.q.q.q.q.q.q.q.4.4.4.4.G+H+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.<+<+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.S1p$p$p$V1{.{.{.{.{.W1o o @V V m.m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q q r r r s t u u u v v w x x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I | #+2+:.:.:.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+y+y+ + +m.m.m.m.m.V V @ @o o o o B B B B O >@>@>@>@W.W.W.1+1+1+Q.~+~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.`+`+`+g@g@H+H+H+H+H+H+H+H+G+G+4.4.4.q.q.q.q.q.q.q.q.v.v.n n n n n n n r#r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#r#r#n n n n n n v.v.v.q.q.q.q.q.q.q.4.4.4.4.G+G+H+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+Q.Q.1+1+W.W.W.W.>@>@X1p$p$p$V1{.{.{.{.{.Y1 @V V m.m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0.0.R.R.p p p p f.r.r.k.k.k.a.b.b.b.<.<.[.-.-.-.-.Q Q R R R R q q r r r r t t u u u v w w x x y y y S S S T T T ,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+i+n+q+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@i@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=P%; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i.g.#+#+2+:.:.:.:.:.:.G.l+l+l+l+l+l+l+z+y+y+y+y+y+y+ + +m.m.m.m.m.m.V V @o o o o o B B B O >@>@>@>@W.W.W.W.1+1+1+Q.~+~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.`+`+`+g@g@H+H+H+H+H+H+H+H+H+G+G+4.4.4.q.q.q.q.q.q.q.q.q.v.v.n n n n n n n r#r#r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.r#r#r#r#r#r#r#r#n n n n n n n n v.v.q.q.q.q.q.q.q.q.4.4.4.4.G+G+H+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.1+1+W.W.W.W.>@>@>@>@O Z1p$p$p$V1{.{.{.{.{.`1V m.m.m.m.m. + + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0.0..+R.p p p p f.r.r.r.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q R R R R q q q r r r s t u u u u v w w x x y y z S S T T T >.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=P+B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F /+#+#+2+:.:.:.:.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+y+ + +m.m.m.m.m.m.V V @o o o o o B B B B O >@>@>@>@W.W.W.W.1+1+Q.Q.~+~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.=.`+`+`+g@g@H+H+H+H+H+H+H+H+H+G+G+4.4.4.4.q.q.q.q.q.q.q.q.q.v.v.n n n n n n n n r#r#r#r#r#r#r#r#r#9.9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.9.r#r#r#r#r#r#r#r#r#r#n n n n n n n v.v.v.q.q.q.q.q.q.q.q.q.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+g@`+`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.>@>@>@O O B B Z16$6$6$ 2{.{.{.{.{..2m.m.m.m. + +y+y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.0.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.b.<.[.[.-.-.-.;.Q Q R R R R q q r r r r t t u u u v v w x x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=-.d+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i &#+#+#+#+2+:.:.:.:.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+y+y+ + +m.m.m.m.m.m.V V @o o o o o B B B B O >@>@>@>@W.W.W.W.W.1+1+Q.Q.~+~+~+~+~+~+~+<+<+<+<+=.=.=.=.=.=.=.=.`+`+`+`+g@g@H+H+H+H+H+H+H+H+H+H+G+G+4.4.4.4.4.q.q.q.q.q.q.q.q.q.q.v.v.v.n n n n n n n n n n n r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#9.9.9.9.9.9.9.9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.9.9.9.9.9.9.9.9.r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#n n n n n n n n n n v.v.v.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.>@>@>@>@O B B B B o o o o #27$:$:$$2{.{.{.{.{.%2 + +y+y+y+y+y+y+z+z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p p f.r.r.k.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q Q R R R R q q r r r r t t u u u v v w x x x y y z S S T T T >.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@i@P@P@t#t#U#U#8$q$q$&%&%6%o%P%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", +" /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d+[ .+0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.G.l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+ + + + +m.m.m.m.m.m.m.m.V V V @ @o o o o o o o o B B B B B B O O >@>@>@>@>@>@>@W.W.W.W.W.W.W.W.1+1+1+1+1+1+Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.Q.1+1+1+1+1+1+W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@O O B B B B B B o o o o o o o o @ @V V V m.m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+G.:.:.:.(2c@c@c@62{.{.{.{.{.72#+#+#+3.3.0.0.0.0.0.0..+R.R.p p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q R R R R R q q q r r r r t t u u u u v w w x x x y y z S S S T T T >.,.,.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+5+5+5+5+i+n+q+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@P@P@t#t#t#U#8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&>*9*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=w=w=w=~&6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . )2 ", +" w(. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.m 3..+0.0.0.0.0.0.3.3.#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.G.l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+ + + +m.m.m.m.m.m.m.m.m.V V V @ @o o o o o o o o B B B B B B B O O >@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+Q.Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.Q.1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@O O B B B B B B B o o o o o o o o @ @V V V m.m.m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.(2c@c@d@62{.{.{.{.{.72#+3.3.0.0.0.0.0.0..+R.R.p p p p f.r.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R q q q r r r r s t u u u u v v w w x x y y y z S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#U#8$q$q$&%&%6%6%o%P%P%P%3&3&t&t&t&>*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=w=w=w=w=z y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2 ", +" 82. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#~+R..+0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+ + + + +m.m.m.m.m.m.m.m.m.V V V @ @o o o o o o o o o B B B B B B B O O O >@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+1+1+Q.Q.Q.Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.Q.Q.Q.1+1+1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@O O O B B B B B B B o o o o o o o o @ @V V V V m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.(2d@2@2@B-{.{.{.{.{.923.0.0.0.0.0..+.+R.R.p p p p f.r.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R q q q r r r r s t t u u u v v w w x x y y y z S S T T T T >.,.d.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+n+n+q+q+B+L+L+L+P+Y+Y++@+@+@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%6%o%o%P%P%P%3&3&t&t&t&>*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=w=w=w=w=_ X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 02 ", +" a2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I C R.R.R..+0.0.0.0.0.0.3.3.#+#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+z+y+y+y+y+y+y+y+y+y+y+ + + +m.m.m.m.m.m.m.m.m.m.V V V V @ @o o o o o o o o o B B B B B B B B O O O >@>@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@>@O O O B B B B B B B B o o o o o o o o o @ @V V V V m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+#+b22@2@2@c2{.{.{.{.{.h@0.0.0.0..+R.R.R.p p p p f.r.r.r.k.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q r r r r s t t u u u u v w w x x x y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+q+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#8$8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&t&>*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=w=w=w==@a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 ", +" d2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a I#p R.R..+0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+ + + +m.m.m.m.m.m.m.m.m.m.V V V V V @ @o o o o o o o o o o B B B B B B B B B O O O >@>@>@>@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@>@>@>@>@O O O B B B B B B B B B o o o o o o o o o o @ @V V V V V m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+b22@2@2@e2{.{.{.{.{.]@0.0..+R.R.p p p p p f.r.r.r.k.k.k.a.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r s t t u u u u v v w x x x y y y z S S T T T T ,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+i+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@P@P@P@t#t#U#8$8$q$q$&%&%6%o%P%P%P%~&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=l+J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f2 ", +" g2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^.: p p R.R.R..+0.0.0.0.0.0.3.3.#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.G.l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+ + + + +m.m.m.m.m.m.m.m.m.m.V V V V V @ @o o o o o o o o o o o B B B B B B B B B B B O O O O >@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@O O O O B B B B B B B B B B B o o o o o o o o o o o @ @V V V V V m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+h22@|@|@i2{.{.{.{.{.X+R.R.R.p p p p f.f.r.r.r.k.k.k.a.a.b.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r s t t u u u u v v w w x x y y y z S S S T T T >.,.,.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+}+5+5+5+i+n+n+q+q+B+L+L+L+P+Y+Y++@+@+@'@'@'@_@_@7@7@7@i@i@i@P@P@t#t#U#U#8$q$q$&%&%&%6%o%P%P%P%~&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=t&D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j2 ", +" k2/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.F,0.p p p R.R..+0.0.0.0.0.0.0.3.3.#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.G.l+l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+ + + + +m.m.m.m.m.m.m.m.m.m.m.V V V V V @ @ @o o o o o o o o o o o o o B B B B B B B B B B B B B O O O O O O >@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@O O O O O O B B B B B B B B B B B B B o o o o o o o o o o o o o @ @ @V V V V V m.m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.h2^@^@^@l2{.{.{.{.{.m+p p p p p f.r.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r r s t u u u u v v w w x x x y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+q+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&>*9*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=w=w=,.G]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . )2 ", +" m2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $ g@p p p p R.R.R..+0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+ + + + + +m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V @ @ @o o o o o o o o o o o o o o o B B B B B B B B B B B B B B B B B B B B B B O O O O O O O O O O O O O O O O O O O B B B B B B B B B B B B B B B B B B B B B B o o o o o o o o o o o o o o o @ @ @V V V V V V m.m.m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.3.3.0.b2^@^@^@l2{.{.{.{.{.n2p p p f.r.r.r.k.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u v v w w x x x y y y S S S T T T T ,.,.d.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+}+5+5+5+5+n+n+q+q+B+B+L+L+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#8$8$q$q$&%&%6%o%o%P%P%P%3&3&t&t&t&>*9*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=w=~=( X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2 ", +" 32. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;@V~.+p p p p p R.R..+.+0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.G.l+l+l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V @ @ @ @o o o o o o o o o o o o o o o o o o o o o B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B o o o o o o o o o o o o o o o o o o o o o @ @ @ @V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + +y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.b2^@{@{@o2{.{.{.{.{.p2f.r.r.r.r.k.k.k.a.a.a.b.b.b.<.<.[.[.-.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u v v w w x x x y y y z S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+q+q+q+B+L+L+L+P+Y+Y++@+@+@'@'@'@_@_@_@7@7@i@i@i@P@P@P@t#t#U#8$8$q$q$&%&%6%o%o%P%P%~&3&3&t&t&t&>*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=w=w=T {&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . q2 ", +" r2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+r#f.p p p p p R.R.R..+0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V V @ @ @ @o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o @ @ @ @V V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0.s2,@,@,@t2{.{.{.{.{.u2r.r.k.k.k.k.a.a.b.b.b.b.<.<.[.[.-.-.-.-.;.Q Q Q R R R R R q q q r r r r s t t u u u u v w w x x x y y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+}+5+5+5+5+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%&%6%o%P%P%P%~&3&t&t&t&t&>*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=w=t&C z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 ", +" v2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.y{3.r.f.p p p p p R.R.R..+0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V V V V V @ @ @ @ @ @ @ @o o o o o o o o o o o o o o o o o o o o o o o o o o o @ @ @ @ @ @ @ @V V V V V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.w2%@%@%@t2{.{.{.{.{.x2k.k.k.a.a.a.b.b.b.<.<.<.[.[.-.-.-.-.;.Q Q R R R R R R q q q r r r r s t t u u u u v v w x x x y y y z S S S T T T >.,.,.d.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+L+L+L+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=w=;.y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y2 ", +" z2w(. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e#[ r.r.f.f.p p p p p R.R.R..+0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.R.p p A2%@%@W+B2{.{.{.{.{.C2k.a.a.b.b.b.b.<.<.[.[.-.-.-.-.-.;.Q Q R R R R R R q q q r r r r s t t u u u u v v w w x x y y y z S S S T T T T >.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+B+B+L+L+P+P+Y+Y++@+@+@'@'@'@_@_@_@7@7@i@i@i@P@P@P@t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&>*9*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=6%D /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2D2 ", +" E2F2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $+:.r.r.r.f.p p p p p p R.R.R..+0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.R.p p p p p A2W+W+W+G2{.{.{.{.{.H2a.b.b.b.<.<.<.[.[.-.-.-.-.-.;.Q Q R R R R R q q q q r r r r s t t u u u u v v w w x x x y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%6%o%o%P%P%P%3&3&t&t&t&>*9*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=#+(.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2 ", +" J2K2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M+H.k.r.r.r.r.f.p p p p p p R.R.R..+0.0.0.0.0.0.0.3.3.3.3.#+#+#+#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0..+.+R.R.p p p p p p f.r.L2W+W+W+M2{.{.{.{.{.N2b.b.<.<.[.[.[.-.-.-.-.;.Q Q Q R R R R R q q q r r r r r s t t u u u u v v w w x x x y y y S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+L+L+L+P+Y+Y++@+@+@'@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%&%6%o%P%P%P%~&3&t&t&t&t&>*(*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=i@m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . O2 ", +" P2Q2k2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j.5$k.k.r.r.r.r.f.p p p p p p R.R.R..+0.0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0.0..+R.R.R.p p p p p p f.r.r.r.r.L2W+W+W+R2{.{.{.{.{.S2<.<.[.[.-.-.-.-.-.;.Q Q R R R R R R q q q r r r r s s t t u u u u v v w w x x x y y y z S S T T T T >.,.,.d.d.d.d.d.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@7@i@i@i@P@P@P@t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=O M+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T2 ", +" U2P2V2P2P2P2W2q2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@x+k.k.k.k.r.r.r.r.f.p p p p p p R.R.R..+0.0.0.0.0.0.0.0.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0..+R.R.R.p p p p p p f.r.r.r.r.k.k.k.L2S+S+S+R2{.{.{.{.{.S2[.[.-.-.-.-.-.;.Q Q R R R R R R q q q r r r r s t t u u u u u v v w w x x x y y y z S S S T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+L+L+L+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%6%o%o%P%P%P%~&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=P+l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 02X2 ", +" V2P2P2U2P2U2P2V2P2P2Y2r2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . G o k.k.k.k.r.r.r.r.r.f.p p p p p p R.R.R..+.+0.0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0.0..+.+R.R.R.p p p p p p f.r.r.r.r.r.k.k.k.k.a.Z2O+O+O+`2{.{.{.{.{. 3-.-.-.-.;.Q Q Q R R R R R q q q q r r r r s t t u u u u u v v w w x x x y y y z S S S T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%&%6%o%o%P%P%P%3&3&t&t&t&>*9*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=n J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3+3 ", +" V2P2V2P2V2P2P2U2P2V2P2V2P2@3v2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h g.f.a.k.k.k.k.r.r.r.r.r.f.p p p p p p R.R.R.R..+0.0.0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+2+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+z+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+z+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0.0.0..+.+R.R.R.p p p p p p f.r.r.r.r.r.k.k.k.k.a.a.a.b.#3O+J+J+$3{.{.{.{.{.%3-.-.;.Q Q R R R R R R q q q r r r r r s t t u u u u v v v w w x x x y y y z S S S T T T T >.,.d.d.d.d.d.2.2.e.e.e.e.e.e.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+5+n+n+q+q+q+B+L+L+L+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@7@i@i@i@P@P@P@t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&t&>*(*(*(*(*(*~=~=~=~=~=w=w=w=w=w=e.b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &3*3P2 ", +" P2P2U2P2V2P2V2P2P2U2P2V2P2V2P2P2U2=3/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # j+a.a.a.k.k.k.k.k.r.r.r.r.f.f.p p p p p p R.R.R..+.+0.0.0.0.0.0.0.0.0.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+2+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0..+.+R.R.R.p p p p p p p f.r.r.r.r.r.k.k.k.k.a.a.a.b.b.b.b.-3J+J+J+$3{.{.{.{.{.;3Q Q Q R R R R R R q q q r r r r r s t t u u u u v v w w x x x x y y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@+@'@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=~=w=w=w=w=U#g.z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.>3U2P2P2V2P2V2 ", +" V2P2P2P2P2U2P2V2P2V2P2P2U2P2V2P2V2P2P2U2P2,3I2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I@>@b.a.a.a.k.k.k.k.k.r.r.r.r.f.f.p p p p p p R.R.R.R..+.+0.0.0.0.0.0.0.0.0.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p f.f.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.<.<.<.#3J+A+A+'3{.{.{.{.{.)3R R R R R R q q q q r r r r s t t t u u u u v v w w x x x x y y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+B+L+L+L+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%&%6%o%o%P%P%P%3&3&t&t&t&>*9*(*(*(*(*@=~=~=~=~=~=w=w=w=~=K.E+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32!3P2U2P2P2V2P2V2P2U2 ", +" U2P2V2P2P2U2P2V2P2V2P2V2P2P2U2P2V2P2P2U2P2U2P2P2~3{3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;@' ]3b.b.b.a.a.k.k.k.k.k.r.r.r.r.r.f.p p p p p p p R.R.R.R..+.+0.0.0.0.0.0.0.0.0.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.G.G.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.G.G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.0.0.0.0.0.0.0.0.0.0..+R.R.R.R.p p p p p p p f.r.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.<.<.<.[.[.-.^3A+A+A+/3{.{.{.{.{.)3R R R R q q q r r r r r s t t u u u u u v v w w x x x y y y y z S S S T T T T >.,.,.d.d.d.d.d.2.e.e.e.e.e.e.t.u.u.u.u.u.u.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+B+L+L+P+P+Y+Y++@+@+@'@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&t&>*9*(*(*(*(*@=~=~=~=~=~=w=w=w=<.K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (3_3V2P2U2P2P2P2P2V2P2U2P2U2 ", +" U2P2V2P2V2P2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2:3<3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+2 b.b.b.b.b.a.a.a.k.k.k.k.r.r.r.r.r.f.f.p p p p p p p R.R.R.R..+.+0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+2+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p p f.f.r.r.r.r.r.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.[.[.[.-.-.-.^3A+w+p+/3{.{.{.{.{.[3R q q q q r r r r r s t t u u u u u v v w w x x x y y y z S S S S T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$q$&%&%6%o%o%P%P%P%~&3&t&t&t&t&>*(*(*(*(*(*~=~=~=~=~=w=w=w=n+&.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . }3|3P2V2P2V2P2U2P2P2V2P2V2P2U2P2U2 ", +" V2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P213<2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#K.<.b.b.b.b.b.a.a.a.k.k.k.k.k.r.r.r.r.r.f.f.p p p p p p p R.R.R.R..+.+0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+2+2+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p p f.f.r.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.;.23p+p+f+33{.{.{.{.{.43q q r r r r r s t t t u u u u v v w w w x x x y y y z S S S T T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+5+n+n+q+q+q+B+L+L+L+P+P+Y+Y++@+@=@'@'@'@_@_@_@7@7@i@i@i@H@P@P@P@t#t#U#8$8$q$q$&%&%&%6%o%o%P%P%P%3&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=~=w=w=~&^ A.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8253U2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2 ", +" V2P2V2P2P2U2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P26373. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p[y+<.<.<.b.b.b.b.a.a.a.a.k.k.k.k.k.r.r.r.r.r.f.f.p p p p p p p p R.R.R.R..+.+0.0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+2+2+2+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.R.p p p p p p p f.f.r.r.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.[.[.-.-.-.-.-.-.;.;.Q Q 83f+f+f+93{.{.{.{.{.43r r r r r s t t u u u u u v v w w x x x x y y y z S S S T T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.,+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@+@=@'@'@_@_@_@7@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%~&3&3&t&t&t&>*9*(*(*(*(*@=~=~=~=~=~=w=w=O (.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 03_3P2V2P2U2P2U2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2U2 ", +" V2P2P2U2P2U2P2V2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2V2P2P2V2P2V2P2P2V2P2P2V2P2P2a3b3/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.! f.[.<.<.<.b.b.b.b.b.a.a.a.k.k.k.k.k.r.r.r.r.r.r.f.f.p p p p p p p p R.R.R.R.R..+.+0.0.0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+2+2+2+2+2+2+2+2+2+2+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+2+2+2+2+2+2+2+2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.p p p p p p p p f.f.r.r.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.-.;.;.Q Q R R R c3f+f+f+[3{.{.{.{.{./3r r s t t t u u u u v v v w w x x x y y y y z S S S T T T T >.,.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+L+L+L+P+Y+Y+Y++@+@=@'@'@'@_@_@_@7@7@i@i@i@i@P@P@P@t#t#U#U#8$q$q$q$&%&%6%o%o%P%P%P%~&3&t&t&t&t&>*(*(*(*(*(*@=~=~=~=~=~=w=z d&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.d3Q2P2V2P2P2P2P2V2P2U2P2P2V2P2U2P2U2P2U2P2P2P2P2V2P2V2 ", +" U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2U2P2P2U2P2V2P2V2P2P2U2P2P2U2P2V2P2P2V2P2P2V2P2P2P2+3r2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H | [.[.[.<.<.<.<.b.b.b.b.b.a.a.a.k.k.k.k.k.k.r.r.r.r.r.f.f.p p p p p p p p p R.R.R.R.R..+.+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.R.p p p p p p p p p f.f.r.r.r.r.r.r.k.k.k.k.k.a.a.a.a.b.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.-.;.;.Q Q R R R R R R c33+3+3+e3{.{.{.{.{.$3s t t u u u u u v v w w w x x x y y y y z S S S T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+5+n+n+q+q+q+B+B+L+L+P+P+Y+Y++@+@+@=@'@'@_@_@_@7@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%P%3&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=~=w=7@6 /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f3g3V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2V2P2U2P2P2P2P2V2 ", +" V2P2V2P2P2P2P2U2P2U2P2U2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2V2U2P2V2U2P2P2P2P2P2h3i3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.f@-.-.[.[.[.<.<.<.b.b.b.b.b.a.a.a.a.k.k.k.k.k.k.r.r.r.r.r.r.f.f.p p p p p p p p p R.R.R.R.R.R..+.+.+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.R.p p p p p p p p p f.f.r.r.r.r.r.r.r.k.k.k.k.k.a.a.a.a.b.b.b.b.b.<.<.<.[.[.[.[.-.-.-.-.-.-.;.Q Q Q R R R R R R R q q 233+3+3+e3{.{.{.{.{.j3t u u u u v v v w w x x x x y y y z S S S S T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+,+}+5+5+5+5+5+i+n+q+q+q+B+B+L+L+P+P+Y+Y+Y++@+@=@'@'@'@_@_@_@7@7@i@i@i@i@P@P@P@t#t#U#U#8$q$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&t&>*9*(*(*(*(*@=~=~=~=~=~=Q=_ J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . k3l3V2P2U2P2P2U2P2P2V2P2V2P2U2P2P2V2P2U2P2U2P2P2P2P2V2P2V2P2U2P2U2 ", +" U2P2U2P2U2P2U2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2m332. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.F V -.-.-.[.[.[.<.<.<.<.b.b.b.b.b.a.a.a.a.k.k.k.k.k.k.r.r.r.r.r.r.r.f.f.p p p p p p p p p p R.R.R.R.R.R..+.+.+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.R.R.p p p p p p p p p p f.f.r.r.r.r.r.r.r.k.k.k.k.k.k.a.a.a.a.b.b.b.b.b.<.<.<.<.[.[.[.-.-.-.-.-.-.-.;.Q Q Q R R R R R R R q q q q q 833+3+3+)3{.{.{.{.{.j3u u u v v w w w x x x y y y y z S S S T T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+L+L+L+P+P+Y+Y++@+@+@'@'@'@_@_@_@7@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%&%6%o%o%P%P%P%~&3&t&t&t&t&>*(*(*(*(*(*@=~=~=~=~=(*<+]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . n3o3P2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2V2P2U2P2P2P2P2P2P2V2 ", +" V2P2V2P2V2P2P2U2P2U2P2U2P2V2P2V2P2P2U2P2U2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2p3q3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.> u+-.-.-.-.-.[.[.[.<.<.<.<.b.b.b.b.b.b.a.a.a.a.k.k.k.k.k.k.r.r.r.r.r.r.r.f.f.f.p p p p p p p p p p p R.R.R.R.R.R.R..+.+.+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+.+R.R.R.R.R.R.p p p p p p p p p p p p f.f.r.r.r.r.r.r.r.k.k.k.k.k.k.k.a.a.a.a.b.b.b.b.b.<.<.<.<.[.[.[.[.-.-.-.-.-.-.;.;.Q Q Q R R R R R R R q q q q q r r r 833+_+_+)3{.{.{.{.{.G2v v v w w x x x x y y y z z S S S T T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+q+B+L+L+L+P+P+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@i@i@i@i@P@P@P@t#t#U#U#8$q$q$q$&%&%6%6%o%P%P%P%~&3&3&t&t&t&>*9*(*(*(*(*@=~=~=~=~=~=V f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . r3s3U2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2U2 ", +" U2P2U2P2V2P2V2P2V2P2P2U2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2Q2t3]2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.F+>#-.-.-.-.-.-.-.[.[.[.<.<.<.<.b.b.b.b.b.b.a.a.a.a.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.f.f.f.p p p p p p p p p p p p R.R.R.R.R.R.R.R..+.+.+.+.+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+.+.+R.R.R.R.R.R.R.R.p p p p p p p p p p p p p f.f.f.r.r.r.r.r.r.r.k.k.k.k.k.k.k.a.a.a.a.b.b.b.b.b.b.<.<.<.<.[.[.[.[.-.-.-.-.-.-.-.;.Q Q Q Q R R R R R R R q q q q q r r r r r s u3_+_+*+v3{.{.{.{.{.w3w w w x x x y y y y z S S S S T T T T >.,.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+5+5+5+n+n+q+q+q+B+B+L+L+P+P+Y+Y+Y++@+@=@'@'@'@_@_@_@7@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%&%6%o%o%P%P%P%~&3&t&t&t&t&>*9*(*(*(*(*@=~=~=~=~=l+% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.x3Q2P2P2P2V2P2P2V2P2U2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2U2P2U2P2P2 ", +" P2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2P2V2P2P2P2P2y3z3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.7 P ;.-.-.-.-.-.-.-.-.[.[.[.<.<.<.<.b.b.b.b.b.b.b.a.a.a.a.k.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.f.f.f.p p p p p p p p p p p p p p p p R.R.R.R.R.R.R.R.R.R.R..+.+.+.+.+.+.+.+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+.+.+.+.+.+.+R.R.R.R.R.R.R.R.R.R.R.p p p p p p p p p p p p p p p f.f.f.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.<.<.<.<.[.[.[.[.-.-.-.-.-.-.-.;.;.Q Q Q R R R R R R R R q q q q q r r r r r s s t t A3*+*+*+v3{.{.{.{.{.t2x x x x y y y z z S S S T T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.,+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+B+B+L+L+L+P+Y+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@i@i@i@H@P@P@P@t#t#U#U#8$q$q$q$&%&%6%6%o%P%P%P%~&3&3&t&t&t&t&9*(*(*(*(*(*@=~=~=~=R.& . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B3C3P2P2P2P2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2U2P2P2P2P2V2P2V2 ", +" V2P2P2P2P2P2P2U2P2U2P2U2P2V2P2V2P2P2U2P2V2P2V2P2P2U2P2V2P2P2U2P2P2U2P2P2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2D3E3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@C;p Q ;.;.-.-.-.-.-.-.-.-.[.[.[.[.<.<.<.<.b.b.b.b.b.b.b.a.a.a.a.a.k.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.r.f.f.f.f.p p p p p p p p p p p p p p p p p p p p R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.p p p p p p p p p p p p p p p p p p p p f.f.f.f.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.<.<.<.<.<.[.[.[.[.-.-.-.-.-.-.-.;.;.Q Q Q R R R R R R R R R q q q q r r r r r r s s t t t u u A3*+*+*+%3{.{.{.{.{.F3x y y y y z S S S S T T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+B+B+L+L+L+P+P+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@i@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%&%6%o%o%P%P%P%~&3&t&t&t&t&>*9*(*(*(*(*@=~=~=~=Q b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . G3h3P2P2P2P2P2P2P2P2U2V2P2U2V2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2V2 ", +" V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2V2P2P2P2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2!3I2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i z&b.Q Q Q ;.;.-.-.-.-.-.-.-.-.[.[.[.[.<.<.<.<.<.b.b.b.b.b.b.b.a.a.a.a.a.a.k.k.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.r.r.r.f.f.f.f.f.p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p f.f.f.f.r.r.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.b.<.<.<.<.<.[.[.[.[.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R q q q q q r r r r r r s s t t t u u u u u A3*+*+@+%3{.{.{.{.{.H3y y z z S S S T T T T T >.,.,.,.d.d.d.d.d.2.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+q+B+L+L+L+P+P+Y+Y+Y++@+@=@'@'@'@_@_@_@7@7@7@i@i@i@H@P@P@P@t#t#U#U#8$q$q$q$&%&%6%6%o%P%P%P%P%3&3&t&t&t&t&>*(*(*(*(*(*@=~=~=u - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I3J3P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2V2P2U2V2P2U2P2P2V2P2U2P2P2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2V2P2V2P2U2 ", +" V2P2V2P2P2P2P2P2P2U2P2U2P2U2P2V2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2K3L3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J.w.-.R R Q Q Q Q ;.-.-.-.-.-.-.-.-.-.[.[.[.[.<.<.<.<.<.b.b.b.b.b.b.b.b.a.a.a.a.a.a.k.k.k.k.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.f.f.f.f.f.f.f.p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p f.f.f.f.f.f.f.f.r.r.r.r.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.a.b.b.b.b.b.b.b.b.<.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R R q q q q q r r r r r r s t t t u u u u u u v v v M3@+@+T. 3{.{.{.{.{.i2z S S S S T T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+P+P+Y+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@i@i@i@i@P@P@P@t#t#U#U#8$8$q$q$&%&%&%6%o%o%P%P%P%~&3&t&t&t&t&>*9*(*(*(*(*(*~=~=,.]>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g2N3P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2V2P2U2 ", +" V2P2V2P2V2P2P2P2P2U2P2U2P2U2P2V2P2V2P2P2U2P2U2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2O3n3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g 2 -.R R R R Q Q Q Q ;.;.-.-.-.-.-.-.-.-.-.[.[.[.[.[.<.<.<.<.<.b.b.b.b.b.b.b.b.b.a.a.a.a.a.a.a.k.k.k.k.k.k.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.a.a.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.;.;.;.Q Q Q Q R R R R R R R R R q q q q q r r r r r r r s t t t u u u u u u v v v w w w M3T.T.T. 3{.{.{.{.{.P3S S T T T T T >.,.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+}+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+Y+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@7@i@i@i@H@P@P@t#t#t#U#U#8$q$q$q$&%&%6%6%o%P%P%P%P%3&3&t&t&t&t&>*9*(*(*(*(*@=~=u.E /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2Q3U2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2U2P2P2V2P2P2V2P2U2P2P2U2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2V2P2U2 ", +" V2P2P2P2P2P2P2U2P2U2P2U2P2U2P2V2P2V2P2P2U2P2U2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2R3S3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j / -.R R R R R R Q Q Q Q Q ;.;.-.-.-.-.-.-.-.-.-.[.[.[.[.[.[.<.<.<.<.<.<.b.b.b.b.b.b.b.b.b.b.a.a.a.a.a.a.a.a.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.a.a.a.a.b.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R R R q q q q q r r r r r r r s s t t t u u u u u u v v v w w w x x x A3L.L.L. 3{.{.{.{.{.T3T T T T >.>.,.,.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y++@+@+@=@'@'@'@_@_@_@7@7@7@i@i@i@H@P@P@P@t#t#U#U#8$8$q$q$&%&%&%6%o%o%P%P%P%~&3&3&t&t&t&>*9*(*(*(*(*(*@=-@) + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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H T>r.R R R R R R R R R Q Q Q Q Q ;.;.-.-.-.-.-.-.-.-.-.-.[.[.[.[.[.[.<.<.<.<.<.<.<.b.b.b.b.b.b.b.b.b.b.b.b.b.a.a.a.a.a.a.a.a.a.a.a.a.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.a.a.a.a.a.a.a.a.b.b.b.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.<.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R R R R q q q q q r r r r r r r s s t t t u u u u u u u v v v w w w x x x x y y X3L.F.F.Y3{.{.{.{.{.Z3T T >.,.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@=@'@'@'@_@_@_@_@7@7@i@i@i@i@H@P@P@t#t#t#U#8$8$q$q$q$&%&%6%6%o%P%P%P%P%3&3&t&t&t&t&>*9*(*(*(*(*@=s 9 /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a2`3P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2V2P2U2V2P2U2P2P2V2P2V2P2U2P2P2V2P2V2P2U2P2U2P2U2P2P2P2P2V2P2V2P2V2 ", +" U2P2V2P2V2P2V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2P2P2U2P2V2P2P2U2P2P2U2P2P2U2P2P2P2P2P2V2P2P2P2P2P2P2U2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2 4E3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J F,#+q R R R R R R R R R R R Q Q Q Q Q ;.;.-.-.-.-.-.-.-.-.-.-.-.-.[.[.[.[.[.[.[.<.<.<.<.<.<.<.<.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.<.<.[.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.;.;.;.Q Q Q Q R R R R R R R R R R R q q q q q q r r r r r r r r s t t t t u u u u u u v v v v w w w x x x x y y y y z .4s.s.s.+4{.{.{.{.{.@4,.,.,.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+}+5+5+5+5+5+i+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@i@i@i@i@H@P@P@t#t#t#U#U#8$q$q$q$&%&%6%6%o%o%P%P%P%~&3&3&t&t&t&t&9*(*(*(*(*(*l+@@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . #4$4P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2V2P2U2P2P2U2P2U2P2P2V2P2U2P2P2P2P2V2P2V2P2U2P2U2P2U2P2U2P2P2P2P2 ", +" V2P2V2P2V2P2P2P2P2P2P2U2P2U2P2U2P2V2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2V2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2%4B3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.> @q q q q R R R R R R R R R R R Q Q Q Q Q Q ;.;.;.-.-.-.-.-.-.-.-.-.-.-.-.-.[.[.[.[.[.[.[.[.<.<.<.<.<.<.<.<.<.<.<.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.<.<.<.<.<.[.[.[.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.-.-.;.;.;.Q Q Q Q Q R R R R R R R R R R R R q q q q q q r r r r r r r r s s t t t u u u u u u u v v v w w w x x x x x y y y y z z S S &4s.c.c.+4{.{.{.{.{.*4d.d.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+5+5+5+5+i+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@7@i@i@i@H@P@P@P@t#t#U#U#8$8$q$q$&%&%&%6%6%o%P%P%P%P%3&3&t&t&t&t&>*9*(*(*(*P%n f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . =4-4P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2U2P2P2V2P2V2P2V2P2V2P2V2P2V2P2U2 ", +" U2P2U2P2U2P2U2P2U2P2U2P2U2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2;4>4/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.k n q q q q q q q R R R R R R R R R R R R Q Q Q Q Q Q ;.;.;.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.[.[.[.[.[.[.[.[.[.[.[.[.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.[.[.[.[.[.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.;.;.;.Q Q Q Q Q Q R R R R R R R R R R R R R q q q q q q q r r r r r r r r s s t t t u u u u u u u v v v v w w w x x x x x y y y y z z S S S S T ,4c.c.c.'4{.{.{.{.{.)#d.d.d.d.2.2.e.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+5+5+5+i+i+n+n+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@7@7@7@i@i@i@i@P@P@P@t#t#t#U#8$8$q$q$q$&%&%6%6%o%o%P%P%P%~&3&t&t&t&t&t&9*(*(*(*7@r$D+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.)4!4V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2U2P2U2P2U2P2P2P2P2P2P2V2P2V2P2V2 ", +" V2P2V2P2V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2V2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2~4j2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Y.X r r r q q q q q q q R R R R R R R R R R R R R R Q Q Q Q Q Q Q ;.;.;.;.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.;.;.;.;.Q Q Q Q Q Q Q R R R R R R R R R R R R R R q q q q q q q r r r r r r r r s s t t t t u u u u u u u u v v v w w w x x x x x y y y y y z S S S S S T T T T {4c.).).'4{.{.{.{.{.]4d.2.2.2.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@i@i@i@i@H@P@P@t#t#t#U#U#8$8$q$q$&%&%&%6%o%o%P%P%P%~&3&3&t&t&t&t&>*9*(*(*,+~ s+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {3^4P2P2V2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2U2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2V2P2U2P2U2P2U2P2U2 ", +" U2P2U2P2U2P2V2P2V2P2V2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2U2/4(4w(. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (.Z+<.r r r r r q q q q q q q q R R R R R R R R R R R R R R R R Q Q Q Q Q Q Q Q ;.;.;.;.;.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.;.;.;.;.;.Q Q Q Q Q Q Q Q R R R R R R R R R R R R R R R R q q q q q q q q r r r r r r r r r s s t t t t u u u u u u u u v v v w w w w x x x x x y y y y y z S S S S S T T T T T T >._4).).!.'4{.{.{.{.{.h+2.e.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@i@i@i@i@H@P@P@P@t#t#U#U#8$8$q$q$&%&%&%6%6%o%P%P%P%P%~&3&t&t&t&t&>*9*(*(*u F++ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w(t3/4P2P2P2P2V2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2V2P2U2P2U2P2U2P2P2P2P2P2P2V2P2V2 ", +" V2P2V2P2P2P2P2P2P2P2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2P2U2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2U2P2P2_3:4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@6 0.r r r r r r r r r q q q q q q q q R R R R R R R R R R R R R R R R R R R Q Q Q Q Q Q Q Q Q Q Q ;.;.;.;.;.;.;.;.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.;.;.;.;.;.;.;.;.;.Q Q Q Q Q Q Q Q Q Q Q R R R R R R R R R R R R R R R R R R q q q q q q q q q r r r r r r r r r r s s t t t t u u u u u u u u u v v v w w w w x x x x x y y y y y z z S S S S T T T T T T >.>.,.,.,.<4!.!.!.[4{.{.{.{.{.1.e.e.e.e.e.e.t.u.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@H@P@P@P@t#t#t#U#8$8$q$q$q$&%&%6%6%o%o%P%P%P%~&3&3&t&t&t&t&>*9*(*:.m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &3_3U2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2V2P2V2P2U2 ", +" U2P2V2P2V2P2V2P2V2P2P2P2P2P2P2U2P2U2P2U2P2P2P2P2U2P2V2P2P2U2P2P2U2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2U2P2P2P2P2U2}4<2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.I. @s s r r r r r r r r r r r q q q q q q q q q q R R R R R R R R R R R R R R R R R R R R R R R R Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q R R R R R R R R R R R R R R R R R R R R R R R R q q q q q q q q q q r r r r r r r r r r r s s t t t t t u u u u u u u u v v v v w w w w x x x x x y y y y y y z S S S S S T T T T T T >.>.,.,.,.d.d.d.<4!.!.!.[4{.{.{.{.{.|4e.e.e.t.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@P@P@P@t#t#t#U#U#8$q$q$q$&%&%&%6%o%o%P%P%P%P%3&3&t&t&t&t&>*9*&%q.14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2Q3U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2V2P2U2P2P2U2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2U2P2U2P2U2P2U2 ", +" U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2V324. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K$>$#@t t s s s r r r r r r r r r r r r q q q q q q q q q q q R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R q q q q q q q q q q q q r r r r r r r r r r r r s s t t t t t u u u u u u u u u u v v v v w w w w x x x x x y y y y y y z z S S S S S T T T T T T >.>.,.,.,.d.d.d.d.d.d.<4343434[4{.{.{.{.{.|4e.t.u.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@t#t#t#U#U#8$8$q$q$&%&%&%6%6%o%o%P%P%P%~&3&3&t&t&t&t&>*y D e@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . U3K3P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2U2P2U2P2U2P2P2P2P2 ", +" U2P2U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P24454. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@5;B u t t t t t s s s r r r r r r r r r r r r r r q q q q q q q q q q q q q q q R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R q q q q q q q q q q q q q q q r r r r r r r r r r r r r r s s s t t t t t t u u u u u u u u u u v v v v w w w w x x x x x x y y y y y y z z S S S S S T T T T T T T >.,.,.,.d.d.d.d.d.d.d.d.2.2.6434343474{.{.{.{.{.84u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#U#U#8$8$q$q$q$&%&%6%6%o%o%P%P%P%~&3&3&t&t&t&t&94n & . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d2,3P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2P2U2P2P2P2P2P2P2 ", +" U2P2U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2P2P2P2U2P2V2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P204a4<2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Y.^ -.u u u u t t t t t t s s s s r r r r r r r r r r r r r r r r r q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q r r r r r r r r r r r r r r r r r s s s s t t t t t t u u u u u u u u u u v v v v v w w w w w x x x x x x y y y y y y z z S S S S S T T T T T T T >.>.,.,.,.d.d.d.d.d.d.d.d.2.2.2.e.e.b4343434c4{.{.{.{.{.d4u.u.u.u.M.M.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+i+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#8$8$q$q$q$&%&%&%6%o%o%P%P%P%P%~&3&t&t&t&t&t O=J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2e404P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2U2P2U2P2P2V2P2V2P2U2P2U2P2U2P2U2P2P2P2P2P2P2P2P2V2 ", +" U2P2U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2P2P2P2U2P2V2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2P2f4g4,2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . s+I.~+u u u u u u u u u t t t t t t t s s s s r r r r r r r r r r r r r r r r r r r r r r r r r r q q q q q q q q q q q q q q q q q q q q q q q q q q r r r r r r r r r r r r r r r r r r r r r r r r r r s s s s t t t t t t t u u u u u u u u u u u u v v v v v w w w w w x x x x x x y y y y y y y z z S S S S S T T T T T T T >.>.,.,.,.,.d.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.b43434h474{.{.{.{.{.i4u.u.M.N.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+5+i+n+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$q$q$q$&%&%&%6%6%o%P%P%P%P%~&3&3&t&t&H@O.B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ,2g4f4U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2U2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2P2P2P2P2P2P2P2P2V2 ", +" U2P2U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2P2P2P2j4:4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . G]3,-.u u u u u u u u u u u u u u t t t t t t t t t s s s s s r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r s s s s s s t t t t t t t t t u u u u u u u u u u u u u v v v v v v w w w w w x x x x x x x x y y y y y y z z S S S S S S T T T T T T T T >.,.,.,.,.d.d.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.e.e.e.k4h4l4l4m4{.{.{.{.{.n4N.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+,+}+}+5+5+5+5+5+5+i+n+n+q+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$&%&%&%6%6%o%o%P%P%P%~&3&3&t&t&r P.6.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :4o4P2P2U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2P2U2P2P2P2P2P2P2 ", +" U2P2U2P2U2P2U2P2V2P2V2P2V2P2P2U2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2p4`3f3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I ]><+v v v v v u u u u u u u u u u u u u u u u u t t t t t t t t t t t t t s s s s s s s s s s s s s s s s r r r r r s s s s s s s s s s s s s s s s t t t t t t t t t t t t t t u u u u u u u u u u u u u u u u v v v v v v v w w w w w w x x x x x x x y y y y y y y z z z S S S S S S T T T T T T T T >.>.,.,.,.d.d.d.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.e.e.e.t.u.u.q4l4l4l4|.{.{.{.{.{.V1N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+i+i+n+n+q+q+q+B+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%6%6%o%o%P%P%P%P%3&3&t&7@c+% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . r4s4t4P2P2U2U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2V2P2P2U2P2P2V2P2U2V2P2U2P2P2V2P2U2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2P2U2P2U2P2U2 ", +" V2P2V2P2V2P2V2P2P2P2P2P2P2U2P2U2P2U2P2V2P2P2U2P2U2P2P2U2P2U2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2U2U2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2u4v402. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K y%k.w w w v v v v v v v v u u u u u u u u u u u u u u u u u u u u u u u u t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t u u u u u u u u u u u u u u u u u u u u u u u u v v v v v v v w w w w w w w x x x x x x x x x y y y y y y y z z z S S S S S S T T T T T T T T T >.,.,.,.,.d.d.d.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.e.e.e.e.t.u.u.u.u.u.q4l4l4l4w4{.{.{.{.{.T1N.N.N.N.=+,+,+,+,+,+,+,+,+}+}+5+5+5+5+5+5+i+n+n+n+q+q+q+B+B+L+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%o%o%P%P%P%P%~&3&t&b.7 s+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 02x4;4P2P2P2P2U2U2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2U2P2U2P2U2P2U2 ", +" P2P2P2P2U2P2U2P2U2P2U2P2V2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2V2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2K3y4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + c U+<.x w w w w w w w w v v v v v v v v v v u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u v v v v v v v v v v w w w w w w w w x x x x x x x x x y y y y y y y y y z z S S S S S S S S T T T T T T T T >.>.,.,.,.,.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.u.z4A4B4B4w4{.{.{.{.{.T1N.=+,+,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+5+i+n+n+q+q+q+q+B+B+L+L+L+P+P+Y+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%o%P%P%P%P%~&3&R 81(.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i3K3P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2U2P2U2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2P2P2V2P2V2P2V2P2V2 ", +" V2P2V2P2V2P2V2P2V2P2V2P2P2P2P2U2P2V2P2V2P2V2P2P2U2P2V2P2P2U2P2P2U2P2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2P2P2C3C4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4&b n.;.x x x x x x x w w w w w w w w w w v v v v v v v v v v v v v v v v v v u u u u u u u u u u u u u u u u u u u u v v v v v v v v v v v v v v v v v v w w w w w w w w w w x x x x x x x x x x x y y y y y y y y y y z z z S S S S S S S T T T T T T T T T T >.>.,.,.,.,.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.M.N.D4B4B4B4E4{.{.{.{.{.T1,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+5+i+n+n+n+q+q+q+B+B+B+L+L+L+P+P+Y+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%o%o%P%P%P%~&u w.# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C4C3P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2U2V2P2U2P2P2V2P2V2P2U2P2P2V2P2V2P2V2P2V2P2U2P2U2P2U2P2U2P2U2 ", +" V2P2V2P2P2P2P2P2P2U2P2U2P2U2P2V2P2V2P2P2P2P2V2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2V2P2P2P2P2P2V2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2U2P2P2P2p4F412. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.a } q y x x x x x x x x x x x x x x x w w w w w w w w w w w w w w w w w w w w w w v v v v v v v w w w w w w w w w w w w w w w w w w w w w w w x x x x x x x x x x x x x x x y y y y y y y y y y y z z z S S S S S S S S S T T T T T T T T T T >.>.,.,.,.,.d.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.u.u.u.M.N.N.N.N.D4B4B4B4G4{.{.{.{.{.H4,+,+,+,+,+}+}+5+5+5+5+5+5+5+i+n+n+q+q+q+q+B+B+L+L+L+L+P+P+Y+Y+Y++@+@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%o%o%P%P%P%z 2 y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12I4p4P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2P2V2P2V2P2P2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2V2P2V2P2U2P2U2 ", +" U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2U2P2V2P2P2U2P2V2P2P2V2P2P2U2P2V2U2P2P2P2P2P2P2P2P2U2P2P2P2U2P2P2P2U2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2U2P2P2P2P2h3=3:2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.T+`=s y y y y y y y y x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x y y y y y y y y y y y y y z z z z S S S S S S S S S T T T T T T T T T T T >.>.>.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.D4B4B4J4E4{.{.{.{.{.K4,+,+}+}+}+5+5+5+5+5+5+i+n+n+n+q+q+q+B+B+B+L+L+L+P+P+P+Y+Y+Y++@+@+@=@'@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%o%o%P%P%d.R&$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2L4h3P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2U2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2P2U2P2U2P2P2 ", +" P2P2U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2P2P2P2P2P2M4G3,2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@$+;#w z y y y y y y y y y y y y y y y y y y y y y x x x x x x x x x x x x x x x x x x x x x x x x x x x x y y y y y y y y y y y y y y y y y y y y y z z z z S S S S S S S S S S S S T T T T T T T T T T T T >.>.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N4J4O4O4G4{.{.{.{.{.P4}+}+5+5+5+5+5+5+i+i+n+n+q+q+q+q+B+B+L+L+L+L+P+P+Y+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%o%o%P%Q4r$e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ,2R4M4P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2U2P2P2P2P2V2P2V2P2V2P2V2 ", +" V2P2V2P2V2P2P2P2P2P2P2U2P2U2P2V2P2V2P2P2P2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2V2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2P2P2P2P2P2P2S4k3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@^+n x S S S S S z z z z z z z y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y z z z z z z z S S S S S S S S S S S S S S T T T T T T T T T T T T T T >.>.>.,.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.=+=+,+T4O4O4O4U4{.{.{.{.{.V45+5+5+5+5+5+i+n+n+q+q+q+q+B+B+B+L+L+L+P+P+P+Y+Y+Y++@+@+@+@=@'@'@'@_@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%o%o%|+X J%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . k3W4P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2U2P2P2U2P2U2V2P2V2P2U2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2V2P2U2P2U2P2U2 ", +" U2P2U2P2U2P2V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2U2P2P2P2P2P2P2P2X424. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@a [@U S S S S S S S S S S S S S S S S S S S S S S S S S S z z z z z z z z S S S S S S S S S S S S S S S S S S S S S S S S S S S S T T T T T T T T T T T T T T T T T >.>.>.,.,.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.N.N.N.N.=+,+,+,+,+,+D4O4O4O4U4{.{.{.{.{.Y45+5+5+i+n+n+n+q+q+q+q+B+B+L+L+L+L+P+P+Y+Y+Y+Y++@+@+@=@'@'@'@'@_@_@_@_@7@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%q$0.+=14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z4`4P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2P2U2P2U2 ", +" U2P2V2P2V2P2V2P2V2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2U2P2P2P2P2P2P2P2P2^4 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f 6 =.y T T T T T T T T T S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S T T T T T T T T T T T T T T T T T T T T T T T >.>.>.>.,.,.,.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+D4.5.5.5U4{.{.{.{.{.Y4i+n+n+n+q+q+q+q+B+B+L+L+L+L+P+P+P+Y+Y+Y++@+@+@+@=@'@'@'@'@_@_@_@_@7@7@7@i@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%,+K.]>J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5@5P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2U2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2U2P2U2P2P2P2P2 ", +" U2P2U2P2U2P2U2P2V2P2V2P2V2P2P2U2P2U2P2V2P2P2P2P2U2P2P2U2P2U2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2V2V2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2U2P2P2P2P2P2P2P2P2+3#5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J - `.a.T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T >.>.>.>.>.,.,.,.,.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+}+}+N4.5.5.5$5{.{.{.{.{.%5n+q+q+q+q+B+B+B+L+L+L+L+P+P+Y+Y+Y+Y++@+@+@=@=@'@'@'@_@_@_@_@_@7@7@7@i@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%U#p 3 e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g2&5U2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2V2P2P2P2P2V2P2V2P2U2P2U2P2U2P2P2P2P2P2P2V2 ", +" U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2P2P2P2P2P2P2P2P2%4y2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.$ *@1+>.>.>.>.>.>.>.>.>.T T T T T T T T T T T T T T T T T T T T T >.>.>.>.>.>.>.>.>.>.>.,.,.,.,.,.,.,.,.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+}+}+}+5+5+*5.5.5.5=5{.{.{.{.{.1_q+q+B+B+B+L+L+L+L+P+P+Y+Y+Y+Y++@+@+@+@=@'@'@'@'@_@_@_@_@7@7@7@7@i@i@i@i@H@P@P@P@P@t#t#t#U#U#8$8$q$q$q$&%}+r#&.@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5-4P2P2P2P2P2P2P2P2P2P2P2P2P2V2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2V2P2P2P2P2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2V2P2U2P2U2P2P2P2P2P2P2V2 ", +" U2P2U2P2U2P2V2P2V2P2V2P2P2U2P2U2P2V2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2P2P2P2P2P2P2P2P2t4;5>5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@,,( -.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+5+*5.5,5'5=5{.{.{.{.{.1_B+B+L+L+L+L+P+P+P+Y+Y+Y+Y++@+@+@=@=@'@'@'@_@_@_@_@_@7@7@7@i@i@i@i@i@H@P@P@P@t#t#t#t#U#U#8$8$q$q$q$a.)5B./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !544p4P2P2P2P2P2P2P2P2P2P2P2P2P2V2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2U2V2P2V2P2U2P2P2P2P2V2P2V2P2U2P2U2P2U2P2P2P2P2 ", +" V2P2V2P2V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2U2~5{5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.14C.[ [.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+5+5+5+i+Y+'5'5]5^5{.{.{.{.{.9;L+L+L+P+P+P+Y+Y+Y+Y++@+@+@+@=@'@'@'@'@_@_@_@_@_@7@7@7@i@i@i@i@i@H@P@P@P@t#t#t#U#U#U#8$8$t#/5X > J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {5(5_5U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2P2P2V2P2V2P2U2P2U2P2U2P2U2 ", +" V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2P2P2P2P2P2P2P2P2P2Q2:5d2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j ]>[@:.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.2.2.2.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+}+}+}+}+5+5+5+5+5+5+5+5+i+n+n+n+<5]5]5]5=5{.{.{.{.{.g-P+P+P+Y+Y+Y+Y++@+@+@+@=@'@'@'@'@_@_@_@_@_@7@7@7@7@i@i@i@i@H@P@P@P@P@t#t#t#U#U#8$Y+[5] b s+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d2m3}5U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2U2V2P2U2P2P2V2P2U2P2P2U2P2U2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2U2P2U2P2U2 ", +" P2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2/4I4z3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ m@w.|5,.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+5+5+5+5+5+5+5+5+i+i+n+n+n+q+q+q+<515151525{.{.{.{.{.0,Y+Y+Y+Y++@+@+@+@=@=@'@'@'@'@_@_@_@_@7@7@7@7@i@i@i@i@i@H@P@P@P@P@t#t#t#U#Q4g@C;e + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354504U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2V2P2P2U2P2P2V2P2U2P2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2 ", +" U2P2V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2Q255y2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4@J%*@9.t e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+5+5+5+5+i+n+n+n+n+q+q+q+q+B+B+<515151525{.{.{.{.{.{.Y+Y++@+@+@+@=@'@'@'@'@_@_@_@_@_@7@7@7@7@i@i@i@i@H@H@P@P@P@t#t#t#6+_ 9 j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y265}5P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2P2P2V2P2U2P2P2P2P2V2P2V2P2V2P2U2P2U2P2P2 ", +" V2P2P2P2P2U2P2U2P2U2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2V2P2P2U2P2P2U2P2V2U2P2V2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2P275}3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.y.F+X y+d.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.t.t.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+5+5+5+5+i+i+n+n+n+q+q+q+q+q+B+B+B+L+L+=@15858525{.{.{.{.{.{.+@+@+@=@'@'@'@'@_@_@_@_@_@7@7@7@7@i@i@i@i@i@H@P@P@P@P@M. +1@a e@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9505U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2V2P2P2V2P2U2P2P2U2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2U2 ", +" U2P2V2P2V2P2V2P2P2U2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2a5b5w(. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.y.; X&n [.e.e.e.e.t.t.t.t.t.t.t.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+5+5+5+5+5+5+5+5+5+i+i+n+n+n+q+q+q+q+q+B+B+B+B+L+L+L+L+P+c585d5d5e5{.{.{.{.{.{.f5'@'@'@'@_@_@_@_@_@_@7@7@7@i@i@i@i@i@H@H@'@a.;#D k J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w(b5_3P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2 ", +" U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2V2P2P2V2P2V2U2P2V2P2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2g5h5i5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Z=-+| D.,.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+5+5+5+5+5+5+5+5+5+i+i+n+n+n+n+q+q+q+q+q+B+B+B+L+L+L+L+L+P+P+P+Y+f5d5d5j5k5{.{.{.{.{.{.7@'@_@_@_@_@_@_@7@7@7@7@i@i@i@i@,.>@1@]>y.i.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i5l5m5P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2U2P2U2P2P2P2P2V2P2V2 ", +" V2P2P2P2P2U2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2V2P2V2P2P2V2P2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2n5}4z3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.# F g.b+a.u.u.u.u.u.u.u.u.u.u.u.M.M.M.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+5+5+5+5+5+5+5+5+5+5+i+i+n+n+n+n+q+q+q+q+q+B+B+B+B+L+L+L+L+L+P+P+P+Y+Y+Y+Y+_@j5j5j5k5{.{.{.{.{.{.#*_@_@_@_@7@7@7@7@i@q+0.j+{+'+e@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35}4n5P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2U2P2P2V2P2U2P2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2V2 ", +" V2P2V2P2P2P2P2U2P2U2P2V2P2P2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P2U2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2Q255y2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.f H,) ^ n #+d.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+=+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+}+5+5+5+5+5+5+5+5+5+5+i+i+n+n+n+n+q+q+q+q+q+B+B+B+B+L+L+L+L+L+P+P+P+Y+Y+Y+Y+Y++@+@+@'@j5o5o5p5{.{.{.{.{.{.q5_@7@d.:.O.] E * (./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5~5Q2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2 ", +" U2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2V2P2P2V2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P275}3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+K$; O=r$`+p e.N.N.N.N.N.N.N.N.N.N.=+=+=+=+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+5+5+5+5+5+5+5+5+5+5+5+5+i+i+n+n+n+n+q+q+q+q+q+B+B+B+B+L+L+L+L+L+P+P+P+P+Y+Y+Y+Y+Y++@+@+@+@=@=@r5o5o5o5s51_t5u5 >(|(;v5# X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w5+3P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2U2P2U2V2P2U2P2U2P2P2V2P2V2P2U2P2P2V2P2V2P2U2P2U2 ", +" U2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2V2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2V2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2x5b502. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.^.J%> ~ | b+B R.w N.,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+}+5+5+5+5+5+5+5+5+5+5+5+5+i+i+n+n+n+n+q+q+q+q+q+q+B+B+B+B+L+L+L+L+L+L+P+P+P+Y+Y+Y+Y+Y++@+@+@+@+@=@y5w .+O H#z5A5B5C5q^D5r4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m2b5E5P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2V2P2P2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2P2P2P2V2P2U2P2U2 ", +" U2P2V2P2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2m5F5B3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.e@V#% m@I.{+6@| K.G5r.y =+}+}+5+5+5+5+5+5+5+5+5+5+5+5+5+i+i+n+n+n+n+n+q+q+q+q+q+q+B+B+B+B+L+L+L+L+L+L+P+P+P+Y+Y+H5v 0.1+< / )=7 l d&G]^.X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B3F5m5P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2P2V2P2U2P2U2 ", +" V2P2P2U2P2V2P2V2P2V2P2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2U2P2P2U2P2V2U2P2V2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2U2I5<3:2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.(((.# 3_14{&Z=I@+'F $+&.8 C.6 D )=Z+1@[@( Q%n.>$C X&x)C>P.o.F+^+; - m@d&.,% $ <@j D+X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2<3I5U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2V2P2P2V2P2P2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2V2P2U2P2P2V2P2U2 ", +" U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2V2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2J5a4K5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K5a4J5P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2V2P2U2P2P2V2 ", +" V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2t405L5w(. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w(R405t4P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2V2P2U2V2P2U2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2 ", +" U2P2U2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2*3M5{5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {5N5*3P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2V2P2U2V2P2P2V2P2U2V2P2U2P2P2V2P2P2P2P2U2P2P2V2P2U2P2U2P2P2V2P2U2P2U2P2P2V2 ", +" V2P2P2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2t4+3E302. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 02E3C3t4P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2V2P2P2V2P2P2V2P2P2V2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2U2 ", +" U2P2V2P2P2U2P2V2P2P2U2P2U2P2V2U2P2U2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2U2P2P2P2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2@3}4!5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !5Q3@3P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2U2V2P2U2V2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2 ", +" U2P2V2P2V2U2P2V2P2V2P2P2U2P2V2P2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2V2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2O5P5q2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . q2Q5^4P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2U2P2P2U2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2 ", +" U2P2U2P2P2U2P2U2P2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2V2P2P2V2P2P2V2P2P2V2U2P2P2U2P2P2V2U2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2;4~5R502. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 02k3~5;4P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2U2P2P2U2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2V2P2U2V2P2U2P2P2U2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2 ", +" U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2V2U2P2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2U2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2D3!3S5w(. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w(}3T5D3P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2U2P2P2U2P2P2U2V2P2U2V2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2 ", +" U2P2V2P2P2U2P2V2U2P2V2P2P2U2P2V2P2P2V2P2P2U2P2V2U2P2V2U2P2V2U2P2V2U2P2P2V2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2l3m3U3]2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]2U3U5l3P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2V2P2P2U2V2P2P2V2P2P2U2P2P2V2P2P2V2P2P2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2 ", +" V2P2P2U2P2V2P2P2U2P2P2U2P2V2P2P2U2P2P2U2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2P2U2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2V5F4W5/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /. 5I4*3P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2V2P2P2U2V2P2P2V2P2P2U2P2P2V2P2P2U2P2P2V2P2P2V2P2U2V2P2U2P2P2V2P2U2P2P2U2P2U2P2P2U2 ", +" U2P2V2P2P2V2P2V2U2P2V2P2P2U2P2V2U2P2V2P2P2V2P2P2V2P2P2U2P2P2V2P2P2V2U2P2P2U2P2P2V2U2P2P2V2P2P2P2U2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2J5X5L3,2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ,2L3W2g5P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2U2V2P2P2U2P2P2U2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2P2U2V2P2U2P2P2V2P2U2P2P2V2P2P2V2 ", +" V2P2P2U2P2P2U2P2V2P2P2U2P2P2U2P2V2U2P2V2P2P2V2P2P2V2P2P2V2P2P2V2U2P2V2U2P2P2U2P2P2V2U2P2P2V2U2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2Y5Z5:4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &353Y5P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2U2V2P2P2U2P2P2U2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2P2P2V2P2U2P2P2U2 ", +" V2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2V2U2P2V2P2P2V2P2P2V2P2P2V2U2P2V2U2P2P2V2P2P2V2U2P2P2U2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2K3`5 6/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /. 6.6+6P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2U2V2P2P2U2P2P2P2V2P2P2U2P2P2P2V2P2P2V2P2P2V2P2P2U2P2P2U2P2P2V2P2P2V2P2U2V2P2U2P2P2U2P2U2V2P2V2 ", +" V2P2P2U2P2V2U2P2V2P2P2U2P2P2U2P2P2U2P2V2U2P2V2U2P2P2U2P2P2V2P2P2V2P2P2V2U2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2V2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2 4~5g412. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12@6#6 4P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2V2V2P2P2V2P2P2U2V2P2P2V2P2P2U2V2P2U2V2P2P2V2P2P2V2P2P2V2P2U2V2P2U2P2P2U2P2P2V2P2U2V2P2U2 ", +" V2P2P2U2P2P2U2P2V2U2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2V2U2P2P2V2P2P2V2U2P2P2V2P2P2P2U2P2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2a3`4$6g2/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.:4%6&6a3P2P2P2P2U2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2U2P2P2P2P2P2P2P2P2U2P2P2P2U2V2P2P2U2P2P2P2U2P2P2U2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2 ", +" V2U2P2V2P2P2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2P2P2V2P2P2V2U2P2P2U2P2P2V2U2P2P2V2U2P2P2V2U2P2P2V2U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2 4#6E3W3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W3*6!3 4P2U2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2P2V2P2P2P2V2P2P2P2V2P2P2U2V2P2P2V2P2P2U2P2P2U2V2P2U2V2P2U2V2P2P2V2P2P2V2P2U2V2P2U2P2P2U2P2P2V2 ", +" U2P2P2U2P2P2U2P2V2U2P2V2U2P2V2U2P2V2U2P2P2U2P2P2U2P2P2V2P2P2V2U2P2P2V2P2P2P2V2P2P2P2U2P2P2P2U2P2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2=6(4&3/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.-6;6o4U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2V2P2P2P2V2P2P2U2P2P2U2V2P2U2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2U2 ", +" V2U2P2V2P2P2V2P2P2V2P2P2V2P2P2V2U2P2V2U2P2P2V2P2P2U2P2P2V2U2P2P2V2P2P2V2U2P2P2V2U2P2P2V2U2P2P2P2U2P2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V5!3k2a2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F2#4`3*3P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2U2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2P2P2P2V2P2P2U2P2P2V2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2U2P2P2V2 ", +" V2P2P2V2P2P2V2P2P2V2U2P2V2U2P2P2U2P2P2U2P2P2V2P2P2V2U2P2P2V2P2P2P2U2P2P2V2U2P2P2V2U2P2P2V2U2P2P2P2U2U2P2P2V2U2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2o4$6U3I2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2U3>6Y2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2V2P2P2V2P2P2U2V2P2P2U2P2P2U2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2U2 ", +" V2U2P2V2U2P2V2U2P2P2U2P2P2U2P2P2V2P2P2V2U2P2P2U2P2P2V2U2P2P2V2P2P2P2U2P2P2V2U2P2P2V2U2P2P2P2V2U2P2P2P2U2P2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2S4,6*6d2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d2k2X5W4U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2P2P2U2V2P2P2P2U2V2P2P2P2V2V2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2V2P2P2V2P2P2U2V2P2P2V2P2P2V2P2P2U2V2P2U2V2P2P2V2P2P2V2P2P2V2 ", +" U2P2P2U2P2P2V2P2P2V2P2P2V2U2P2P2V2P2P2V2U2P2P2V2P2P2V2U2P2P2V2U2P2P2U2P2P2P2U2U2P2P2V2U2P2P2P2U2U2P2P2P2V2U2P2P2P2V2U2P2P2P2P2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2f4'6)6y2:2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2y2d3~5!6P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2V2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2P2U2P2P2P2U2V2P2P2U2P2P2P2V2P2P2U2V2P2P2U2P2P2U2V2P2P2V2P2P2U2P2P2V2P2P2U2V2P2U2V2 ", +" V2P2P2V2U2P2P2U2P2P2U2P2P2V2U2P2P2U2P2P2V2U2P2P2V2P2P2P2U2P2P2P2U2P2P2P2U2P2P2P2V2U2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2P2U2U2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2~605%6U3i5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2{6(4]6;4P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2P2P2P2V2P2P2U2V2P2P2V2P2P2U2P2P2U2V2P2P2V2P2P2U2 ", +" V2P2P2V2U2P2P2U2P2P2V2U2P2P2U2P2P2V2U2P2P2V2P2P2P2U2P2P2V2V2P2P2P2V2P2P2P2V2U2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2V2U2P2P2P2V2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2U2P2P2P2P2U2^6W2/635. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B3G3}4(6U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2V2P2P2P2P2U2V2P2P2P2U2V2P2P2P2U2U2P2P2P2U2V2P2P2P2U2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2P2P2P2V2P2P2U2V2P2P2U2P2P2U2V2P2P2V2P2P2U2 ", +" U2U2P2P2U2P2P2V2U2P2P2U2P2P2V2U2P2P2V2U2P2P2U2P2P2P2U2P2P2P2U2U2P2P2V2U2P2P2P2V2P2P2P2V2U2P2P2P2V2U2P2P2P2P2U2U2P2P2P2V2U2U2P2P2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2f4_6$6<3{5:2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2{5:6%6;5Y5P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2V2P2P2P2P2U2V2P2P2P2U2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2V2V2P2P2U2V2P2P2P2U2P2P2P2U2V2P2P2U2P2P2P2V2P2P2P2V2P2P2U2V2P2P2U2P2P2U2V2P2P2U2 ", +" U2P2P2V2U2P2P2V2P2P2P2U2P2P2V2U2P2P2V2U2P2P2V2U2P2P2V2U2P2P2P2V2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2P2V2U2U2P2P2P2V2V2U2P2P2P2P2V2V2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P204&6<6[6v2a2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a2}6|613o404P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2V2P2P2P2P2U2U2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2U2U2P2P2P2U2U2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2V2P2P2P2U2P2P2U2V2P2P2V2V2P2P2V2P2P2U2V2 ", +" V2U2P2P2V2U2P2P2V2P2P2P2V2P2P2P2V2P2P2P2V2U2P2P2V2U2P2P2P2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2U2P2P2P2V2U2U2P2P2P2P2V2U2P2P2P2P2V2V2U2P2P2P2P2P2V2U2U2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2Y516F5R4j2:2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2{3i3%6_6V3P2P2P2P2P2P2P2U2U2V2P2P2P2P2P2U2U2V2P2P2P2P2U2V2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2U2U2P2P2P2U2V2P2P2P2U2U2P2P2P2U2V2P2P2U2V2P2P2P2U2P2P2P2V2P2P2P2U2V2P2P2U2P2P2P2V2P2P2U2V2 ", +" U2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2V2U2P2P2V2U2P2P2P2U2U2P2P2V2U2P2P2P2V2U2P2P2P2V2U2U2P2P2P2V2U2P2P2P2P2V2U2P2P2P2P2V2U2U2P2P2P2P2V2V2U2P2P2P2P2P2V2V2U2U2P2P2P2P2P2V2V2U2U2U2P2P2P2P2P2P2P2P2/4X4<6)42612. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12v2[6364656V2P2P2P2P2P2U2U2U2V2P2P2P2P2P2U2V2V2P2P2P2P2U2U2V2P2P2P2P2U2U2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2P2U2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2V2 ", +" U2P2P2P2V2P2P2P2V2U2P2P2V2U2P2P2P2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2U2P2P2P2V2U2U2P2P2P2V2U2U2P2P2P2P2V2U2U2P2P2P2P2V2V2U2P2P2P2P2P2V2V2U2U2P2P2P2P2P2P2V2U2U2U2P2P2P2P2P2P2P2V2;4^6'6a466S3!5I3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76j2Z4869606`4;4V2P2P2P2P2P2U2U2V2V2P2P2P2P2P2U2U2V2P2P2P2P2P2U2V2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2P2U2P2P2P2U2V2P2P2U2V2 ", +" V2U2P2P2V2U2P2P2P2U2U2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2U2P2P2P2V2U2P2P2P2P2V2U2P2P2P2P2V2V2U2P2P2P2P2V2V2U2P2P2P2P2P2V2V2U2P2P2P2P2P2V2V2V2U2P2P2P2P2P2P2P2V2V2U2U2P2P2P2P2P2P2P2P2h3o4!3F5P5 5(3q2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . q2(3 5P5(4a6b6l3V2P2P2P2P2P2P2U2V2V2V2P2P2P2P2P2U2U2V2V2P2P2P2P2U2U2V2P2P2P2P2U2U2V2P2P2P2P2U2V2V2P2P2P2U2V2P2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2P2V2 ", +" U2U2P2P2P2V2U2P2P2V2U2P2P2P2V2U2P2P2P2P2U2U2P2P2P2V2U2P2P2P2P2V2U2P2P2P2P2V2V2U2P2P2P2P2V2V2U2P2P2P2P2V2U2U2P2P2P2P2P2V2V2U2U2P2P2P2P2P2P2V2V2U2U2P2P2P2P2P2P2P2V2V2V2U2U2U2P2P2P2P2P2f4C3c6h5k2d673d2i5/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.i5d2C4 5#4x3c6C3Y5P2P2P2P2P2P2U2U2V2V2P2P2P2P2P2P2U2U2V2V2P2P2P2P2P2U2U2V2P2P2P2P2P2U2V2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2 ", +" 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b/FreeEDA/images/sub.png new file mode 100644 index 0000000..134f72a Binary files /dev/null and b/FreeEDA/images/sub.png differ diff --git a/FreeEDA/kicadtoNgspice/KicadtoNgspice.py b/FreeEDA/kicadtoNgspice/KicadtoNgspice.py new file mode 100755 index 0000000..99b8cca --- /dev/null +++ b/FreeEDA/kicadtoNgspice/KicadtoNgspice.py @@ -0,0 +1,2695 @@ +import sys +import os.path +from PyQt4 import QtGui,QtCore +from PyQt4.QtGui import * +from random import choice + +class NewWindow(QtGui.QWidget): + def __init__(self): + QWidget.__init__(self) + self.horizontalLayout = QtGui.QVBoxLayout(self) + self.scrollArea = QtGui.QScrollArea(self) + self.scrollArea.setWidgetResizable(True) + self.scrollAreaWidgetContents = QtGui.QWidget() + self.scrollAreaWidgetContents.setGeometry(QtCore.QRect(0, 0, 100, 100)) + self.horizontalLayout_2 = QtGui.QHBoxLayout(self.scrollAreaWidgetContents) + self.grid = QtGui.QGridLayout() + self.horizontalLayout_2.addLayout(self.grid) + self.scrollArea.setWidget(self.scrollAreaWidgetContents) + self.SubmitButton = QtGui.QPushButton("Submit and Exit") + self.ClearButton= QtGui.QPushButton("Clear Button") + self.BackButton= QtGui.QPushButton("Back Button") + self.horizontalLayout.addWidget(self.scrollArea) + self.horizontalLayout.addWidget(self.BackButton) + self.horizontalLayout.addWidget(self.ClearButton) + self.horizontalLayout.addWidget(self.SubmitButton) + self.SubmitButton.clicked.connect(self.Submit) + self.ClearButton.clicked.connect(self.ClearModelParamValue) + self.BackButton.clicked.connect(self.BackAgain) + self.setGeometry(0,0,700, 400) + self.center() + + def ClearModelParamValue(self): + for line in guimodellisttrack: + #print "line",line + start=line[5] + end=line[6] + count=start + for item in range(end-start+1): + nextentry_var[count].setText("") + count=count+1 + + def BackAgain(self): + firstwindow=1 + w.show() + nw.close() + + def Submit(self): + try: + AddModelParametr() #Adding Model Parameter + for item in modelparamvalue: + schematicInfo.append(item[2]) #Adding Comment line + schematicInfo.append(item[1]) #Adding Model line + print "Successfully Closed" + #print "SchematicInfo" + #print SchematicInfo + self.close() + except: + QMessageBox.about(self,"Exception","Please Add before Submit") + create_ngspice_netlist() + + def center(self): + qr=self.frameGeometry() + cp = QtGui.QDesktopWidget().availableGeometry().center() + qr.moveCenter(cp) + self.move(qr.topLeft()) + +class Window(QtGui.QWidget): + def __init__(self): + super(Window,self).__init__() + def createrootwindow(self,sourcelist,sourcelisttrack): + self.backClicked=0 + global nextrow + self.nextrow=0 + self.horizontalLayout = QtGui.QVBoxLayout(self) + self.scrollArea = QtGui.QScrollArea(self) + self.scrollArea.setWidgetResizable(True) + self.scrollAreaWidgetContents = QtGui.QWidget() + self.scrollAreaWidgetContents.setGeometry(QtCore.QRect(0, 0, 100, 100)) + self.horizontalLayout_2 = QtGui.QHBoxLayout(self.scrollAreaWidgetContents) + self.grid = QtGui.QGridLayout() + self.horizontalLayout_2.addLayout(self.grid) + self.scrollArea.setWidget(self.scrollAreaWidgetContents) + self.Nextbutton = QtGui.QPushButton("Next Button") + self.Clearbutton= QtGui.QPushButton("Clear Button") + self.horizontalLayout.addWidget(self.scrollArea) + self.horizontalLayout.addWidget(self.Nextbutton) + self.horizontalLayout.addWidget(self.Clearbutton) + self.setGeometry(0,0,700, 400) + self.show() + self.Nextbutton.clicked.connect(self.NextPage) + self.Clearbutton.clicked.connect(self.ClearSourceValue) + self.center() + global count + global start + global end + count=1 + global row + row=0 + global entry_var + entry_var={} + if sourcelist: + for line in sourcelist: + #print "Voltage source line index: ",line[0] + #print "SourceList line Test: ",line + track_id=line[0] + print "track_id is ",track_id + + if line[2]=='ac': + label=QLabel(line[3]) + self.grid.addWidget(label,row,1) + row=row+1 + start=count + label=QLabel(line[4]) + self.grid.addWidget(label,row,0) + entry_var[count]=QLineEdit() + self.grid.addWidget(entry_var[count],row,1) + value=present_already(line[1],line[2]) + if value == 0: + entry_var[count].setText("") + else: + entry_var[count].setText(store_ans) + row=row+1 + end=count + count=count+1 + sourcelisttrack.append([track_id,'ac',start,end]) + elif line[2]=='dc': + label=QLabel(line[3]) + self.grid.addWidget(label,row,1) + row=row+1 + start=count + label=QLabel(line[4]) + self.grid.addWidget(label,row,0) + entry_var[count]=QLineEdit() + self.grid.addWidget(entry_var[count],row,1) + value=present_already(line[1],line[2]) + if value == 0: + entry_var[count].setText("") + else: + entry_var[count].setText(store_ans) + row=row+1 + end=count + count=count+1 + sourcelisttrack.append([track_id,'dc',start,end]) + elif line[2]=='sine': + label=QLabel(line[3]) + self.grid.addWidget(label,row,1) + row=row+1 + start=count + value=present_already(line[1],line[2]) + indi=0 + for it in range(4,9): + label=QLabel(line[it]) + self.grid.addWidget(label,row,0) + entry_var[count]=QLineEdit() + self.grid.addWidget(entry_var[count],row,1) + if value !=0: + store_ans_list=store_ans.split() + ans_list_size=len(store_ans_list) + if value==0 or indi >= ans_list_size : + entry_var[count].setText("") + else: + entry_var[count].setText(str(store_ans_list[indi])) + indi=indi+1 + row=row+1 + count=count+1 + + + end=count-1 + sourcelisttrack.append([track_id,'sine',start,end]) + elif line[2]=='pulse': + label=QLabel(line[3]) + self.grid.addWidget(label,row,1) + row=row+1 + start=count + value=present_already(line[1],line[2]) + indi=0; + for it in range(4,11): + label=QLabel(line[it]) + self.grid.addWidget(label,row,0) + entry_var[count]=QLineEdit() + self.grid.addWidget(entry_var[count],row,1) + if value!=0: + store_ans_list=store_ans.split() + ans_list_size=len(store_ans_list) + if value==0 or indi >= ans_list_size: + entry_var[count].setText("") + else: + entry_var[count].setText(str(store_ans_list[indi])) + indi=indi+1 + row=row+1 + count=count+1 + end=count-1 + sourcelisttrack.append([track_id,'pulse',start,end]) + elif line[2]=='pwl': + label=QLabel(line[3]) + self.grid.addWidget(label,row,1) + row=row+1 + start=count + label=QLabel(line[4]) + self.grid.addWidget(label,row,0) + entry_var[count]=QLineEdit() + self.grid.addWidget(entry_var[count],row,1) + value=present_already(line[1],line[2]) + if value==0: + entry_var[count].setText(""); + else: + entry_var[count].setText(str(store_ans)) + row=row+1 + end=count + count=count+1 + sourcelisttrack.append([track_id,'pwl',start,end]) + elif line[2]=='exp': + label=QLabel(line[3]) + self.grid.addWidget(label,row,1) + row=row+1 + start=count + indi=0 + value=present_already(line[1],line[2]) + for it in range(4,10): + label=QLabel(line[it]) + self.grid.addWidget(label,row,0) + entry_var[count]=QLineEdit() + self.grid.addWidget(entry_var[count],row,1) + if value != 0: + store_ans_list=store_ans.split() + ans_list_size=len(store_ans_list) + if value == 0 or indi >= ans_list_size: + entry_var[count].setText("") + else: + entry_var[count].setText(str(store_ans_list[indi])) + indi=indi+1 + + row=row+1 + count=count+1 + end=count-1 + sourcelisttrack.append([track_id,'exp',start,end]) + count=count+1 + #print "startcount ",start + #print "endcount ",end + else: + print "No source is present in your circuit" + + + + return sourcelist,sourcelisttrack + + def closeEvent(self,event): + print "window closed" + + def NextPage(self): + #print "next page" + AddSourceValue() + w.close() + nw.show() + firstwindow=0 + self.backClicked+=1 + global schematicInfo + global outputOption + global guimodelvalue + global guimodellisttrack + global guimodellist + if self.backClicked==1: + guimodelvalue=[] + outputOption=[] #check whether it affects the working + guimodellisttrack=[] + guimodellist=['adc8','dac8','gain','summer','multiplier','divider','limit','integrator','differentiator','limit8','controlledlimiter', +'analogswitch','zener','d_buffer','d_inverter','d_and','d_nand','d_or','d_nor','d_xor','d_xnor','d_tristate','d_pullup', +'d_pulldown','d_srlatch','d_jklatch','d_dlatch','d_tlatch','d_srff','d_jkff','d_dff','ic','transfo'] + ##Calling function which take information for entry and label + if self.backClicked==1: + schematicInfo,outputOption,guimodelvalue=convertICintoBasicBlocks(schematicInfo,outputOption,guimodelvalue) + + #print "Info is",schematicInfo + #print "outoption is",outputOption + #print "guivalue is",guimodelvalue + + global nextcount + nextcount=0 + global nextentry_var + if self.backClicked ==1: + nextentry_var={} + + ##Checking if any model is present + if guimodelvalue: + ## Calling Next frame generation function + for line in guimodelvalue: + print "line is ",line + if line[2] in guimodellist: + #print "ConvertICBlock index :",line[0] + if self.backClicked==1: + nextcount=self.nextframegeneration(line,nextentry_var,nextcount) + else: + print "Please look whether model is added in guimodellist inside code" + else: + print "There is no model in your circuit" + QMessageBox.about(self,"Model information","There is no model in your circuit") + + #AddModelParametr() + # tkMessageBox.showinfo("Model List Info","There is no model in your circuit, please click on Submit & Exit Button" ) + + def nextframegeneration(self,line,nextentry_var,nextcount): + print "Model Line in netlist is : ",line[1] + div=line[1].split() + #flag=present_already_model(div[0],line[2]) + flag=0 + #print "store ans here",stored_ans + store_ans_list=[] + if flag!=0: + store_ans_list=stored_ans.split() + print "list ",store_ans_list + indi=0 + label=QLabel(line[5]) + nw.grid.addWidget(label,self.nextrow,1) + start=nextcount + self.nextrow=self.nextrow+1 + if line[2]=='ic': + for item in range(len(line)-7): + label=QLabel(line[7+item]) + nw.grid.addWidget(label,self.nextrow,0) + nextentry_var[nextcount]=QLineEdit() + nw.grid.addWidget(nextentry_var[nextcount],self.nextrow,1) + nextcount=nextcount+1 + self.nextrow=self.nextrow+1 + end=nextcount-1 + guimodellisttrack.append([line[0],line[1],line[2],line[3],line[4],start,end,line[6]]) + else: + for item in range(len(line)-6): + label=QLabel(line[6+item]) + nw.grid.addWidget(label,self.nextrow,0) + nextentry_var[nextcount]=QLineEdit() + nw.grid.addWidget(nextentry_var[nextcount],self.nextrow,1) + if indi < len(store_ans_list) and flag ==1: + nextentry_var[nextcount].setText(store_ans_list[indi]) + indi=indi+1 + nextcount=nextcount+1 + self.nextrow=self.nextrow+1 + end=nextcount-1 + guimodellisttrack.append([line[0],line[1],line[2],line[3],line[4],start,end]) + + return nextcount + + def ClearSourceValue(self): + #print "Clear Source Value" + for line in sourcelisttrack: + start=line[2] + end=line[3] + count=start + for item in range(int(end-start+1)): + entry_var[count].setText("") + count=count+1 + def center(self): + qr=self.frameGeometry() + cp = QtGui.QDesktopWidget().availableGeometry().center() + qr.moveCenter(cp) + self.move(qr.topLeft()) + +'''def present_already_model(val,model_name): + global stored_ans + print "model name is ", model_name + if os.path.exists(last_input_file): + last_file=open(last_input_file) + else: + last_file=open(last_input_file,'w+') + stored_val=last_file.read().strip().split('\n') + print "model test val ",val + flag=0 + for line in stored_val: + word=line.split() + if len(word)==0: + continue + if word[0]=='.model': + print "word is ",word," len is ",len(word) + if word[1]==val: + if ((word[2].startswith(model_name))): + stored_ans="" + for tmp in range(2,len(word)-1): + try: + ind=word[tmp].index('=')+1 + stored_ans=stored_ans+word[tmp][ind:]+" " + except: + print "Exception" + store_ans.strip() + print "model ans ",stored_ans + flag=1 + break + + last_file.close() + return flag +''' + +def present_already(vol,inpscr): + words=vol.split() + volsrc=words[0] + global store_ans + if os.path.exists(last_input_file): + last_file=open(last_input_file) + else: + last_file=open(last_input_file,'w+') + stored_val=last_file.read().strip().split('\n') + flag=0 + for line in stored_val: + word=line.split() + if len(word)==0: + continue; + + if word[0] == volsrc : + if ((inpscr == 'ac' and inpscr == word[3]) or (inpscr == 'dc' and inpscr==word[3]) ): + if len(word)>4: + store_ans=word[4] + flag=1 + break + if ((inpscr == 'pwl' and word[3].startswith(inpscr)) or (inpscr=='exp' and word[3].startswith(inpscr)) or (inpscr=='pulse' and word[3].startswith(inpscr)) or (inpscr=='sine' and word[3].startswith(inpscr)) ): + store_ans="" + i=word[3].index('(')+1 + j=word[len(word)-1].index(')') + store_ans=word[3][i:]+" " + for num in range(4,len(word)-1): + store_ans=store_ans+word[num]+" " + store_ans=store_ans+word[len(word)-1][:j] + print store_ans + flag=1 + break + last_file.close() + return flag; + +def AddModelParametr(): + #print "models here" + #print "Adding Model Parameter" + #print "GuiModelValue",guimodelvalue + global guimodellisttrack + global modelparamvalue + global addmodelline + modelparamvalue=[] + addmodelline=[] + + for line in guimodellisttrack: + #print "model",line + if line[2]=='transfo': + try: + #print "here in transfo" + start=line[5] + end=line[6] + num_turns=str(nextentry_var[start].text()) + if num_turns=="": num_turns="310" + h_array= "H_array = [ " + b_array = "B_array = [ " + h1=str(nextentry_var[start+1].text()) + b1=str(nextentry_var[start+2].text()) + if len(h1)!=0 and len(b1)!=0: + h_array=h_array+h1+" " + b_array=b_array+b1+" " + bh_array = h_array+" ] " + b_array+" ]" + else: + bh_array = "H_array = [-1000 -500 -375 -250 -188 -125 -63 0 63 125 188 250 375 500 1000] B_array = [-3.13e-3 -2.63e-3 -2.33e-3 -1.93e-3 -1.5e-3 -6.25e-4 -2.5e-4 0 2.5e-4 6.25e-4 1.5e-3 1.93e-3 2.33e-3 2.63e-3 3.13e-3]" + area=str(nextentry_var[start+3].text()) + length=str(nextentry_var[start+4].text()) + if area=="": area="1" + if length=="":length="0.01" + num_turns2=str(nextentry_var[start+5].text()) + if num_turns2=="": + num_turns2="620" + addmodelline=".model "+line[3]+"_primary lcouple (num_turns= "+num_turns+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + addmodelline=".model "+line[3]+"_iron_core core ("+bh_array+" area = "+area+" length ="+length +")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + addmodelline=".model "+line[3]+"_secondary lcouple (num_turns ="+num_turns2+ ")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in transfo model ",line[1] + elif line[2]=='adc8': + try: + start=line[5] + end=line[6] + in_low=str(nextentry_var[start].text()) + in_high=str(nextentry_var[end].text()) + if in_low=="": in_low="0.8" + if in_high=="": in_high="2.0" + addmodelline=".model "+ line[3]+" adc_bridge(in_low="+in_low+" in_high="+in_high+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in adc8 model ",line[1] + + elif line[2]=='dac8': + try: + start=line[5] + end=line[6] + out_low=str(nextentry_var[start].text()) + out_high=str(nextentry_var[start+1].text()) + out_undef=str(nextentry_var[end].text()) + if out_low=="": out_low="0.2" + if out_high=="": out_high="5.0" + if out_undef=="": out_undef="5.0" + addmodelline=".model "+ line[3]+" dac_bridge(out_low="+out_low+" out_high="+out_high+" out_undef="+out_undef+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in dac8 model ",line[1] + + elif line[2]=='gain': + try: + start=line[5] + end=line[6] + in_offset=str(nextentry_var[start].text()) + gain=str(nextentry_var[start+1].text()) + out_offset=str(nextentry_var[end].text()) + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + if out_offset=="": out_offset="0.0" + addmodelline=".model "+ line[3]+" gain(in_offset="+in_offset+" out_offset="+out_offset+" gain="+gain+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in gain model ",line[1] + + elif line[2]=='summer': + try: + start=line[5] + end=line[6] + in1_offset=str(nextentry_var[start].text()) + in2_offset=str(nextentry_var[start+1].text()) + in1_gain=str(nextentry_var[start+2].text()) + in2_gain=str(nextentry_var[start+3].text()) + out_gain=str(nextentry_var[start+4].text()) + out_offset=str(nextentry_var[end].text()) + if in1_offset=="": in1_offset="0.0" + if in2_offset=="": in2_offset="0.0" + if in1_gain=="": in1_gain="1.0" + if in2_gain=="": in2_gain="1.0" + if out_gain=="": out_gain="1.0" + if out_offset=="": out_offset="0.0" + addmodelline=".model "+ line[3]+" summer(in_offset=["+in1_offset+" "+in2_offset+"] in_gain=["+in1_gain+" "+in2_gain+"] out_offset="+out_offset+" out_gain="+out_gain+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in summer model ",line[1] + + elif line[2]=='multiplier': + try: + start=line[5] + end=line[6] + in1_offset=str(nextentry_var[start].text()) + in2_offset=str(nextentry_var[start+1].text()) + in1_gain=str(nextentry_var[start+2].text()) + in2_gain=str(nextentry_var[start+3].text()) + out_gain=str(nextentry_var[start+4].text()) + out_offset=str(nextentry_var[end].text()) + if in1_offset=="": in1_offset="0.0" + if in2_offset=="": in2_offset="0.0" + if in1_gain=="": in1_gain="1.0" + if in2_gain=="": in2_gain="1.0" + if out_gain=="": out_gain="1.0" + if out_offset=="": out_offset="0.0" + addmodelline=".model "+ line[3]+" mult(in_offset=["+in1_offset+" "+in2_offset+"] in_gain=["+in1_gain+" "+in2_gain+"] out_offset="+out_offset+" out_gain="+out_gain+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in multiplier model ",line[1] + + elif line[2]=='divider': + try: + start=line[5] + end=line[6] + num_offset=str(nextentry_var[start].text()) + den_offset=str(nextentry_var[start+1].text()) + num_gain=str(nextentry_var[start+2].text()) + den_gain=str(nextentry_var[start+3].text()) + out_gain=str(nextentry_var[start+4].text()) + out_offset=str(nextentry_var[start+5].text()) + den_lower_limit=str(nextentry_var[end].text()) + if num_offset=="": num_offset="0.0" + if den_offset=="": den_offset="0.0" + if num_gain=="": num_gain="1.0" + if den_gain=="": den_gain="1.0" + if out_gain=="": out_gain="1.0" + if out_offset=="": out_offset="0.0" + if den_lower_limit=="": den_lower_limit="1.0e-10" + addmodelline=".model "+ line[3]+" divide(num_offset="+num_offset+" den_offset="+den_offset+" num_gain="+num_gain+" den_gain="+den_gain+" out_offset="+out_offset+" out_gain="+out_gain+" den_lower_limit="+den_lower_limit+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in divider model ",line[1] + + elif line[2]=='limit': + try: + start=line[5] + end=line[6] + lowerLimit=str(nextentry_var[start].text()) + upperLimit=str(nextentry_var[start+1].text()) + in_offset=str(nextentry_var[start+2].text()) + gain=str(nextentry_var[end].text()) + if lowerLimit=="": lowerLimit="0.0" + if upperLimit=="": upperLimit="5.0" + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + addmodelline=".model "+ line[3]+" limit(out_lower_limit="+lowerLimit+" out_upper_limit="+upperLimit+" in_offset="+in_offset+" gain="+gain+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in limit model ",line[1] + + elif line[2]=='integrator': + try: + start=line[5] + end=line[6] + out_lower_limit=str(nextentry_var[start].text()) + out_upper_limit=str(nextentry_var[start+1].text()) + in_offset=str(nextentry_var[start+2].text()) + gain=str(nextentry_var[start+3].text()) + out_ic=str(nextentry_var[end].text()) + if out_lower_limit=="": out_lower_limit="0.0" + if out_upper_limit=="": out_upper_limit="5.0" + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + if out_ic=="": out_ic="0.0" + addmodelline=".model "+ line[3]+" int(out_lower_limit="+out_lower_limit+" out_upper_limit="+out_upper_limit+" in_offset="+in_offset+" gain="+gain+" out_ic="+out_ic+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in integrator model ",line[1] + + elif line[2]=='differentiator': + try: + start=line[5] + end=line[6] + out_lower_limit=str(nextentry_var[start].text()) + out_upper_limit=str(nextentry_var[start+1].text()) + out_offset=str(nextentry_var[start+2].text()) + gain=str(nextentry_var[end].text()) + if out_lower_limit=="": out_lower_limit="0.0" + if out_upper_limit=="": out_upper_limit="5.0" + if out_offset=="": out_offset="0.0" + if gain=="": gain="1.0" + addmodelline=".model "+ line[3]+" d_dt(out_lower_limit="+out_lower_limit+" out_upper_limit="+out_upper_limit+" out_offset="+out_offset+" gain="+gain+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in differentiator model ",line[1] + + elif line[2]=='limit8': + try: + start=line[5] + end=line[6] + lowerLimit=str(nextentry_var[start].text()) + upperLimit=str(nextentry_var[start+1].text()) + in_offset=str(nextentry_var[start+2].text()) + gain=str(nextentry_var[end].text()) + if lowerLimit=="": lowerLimit="0.0" + if upperLimit=="": upperLimit="5.0" + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + addmodelline=".model "+ line[3]+" limit(out_lower_limit="+lowerLimit+" out_upper_limit="+upperLimit+" in_offset="+in_offset+" gain="+gain+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in limit8 model ",line[1] + + elif line[2]=='controlledlimiter': + try: + start=line[5] + end=line[6] + in_offset=str(nextentry_var[start].text()) + gain=str(nextentry_var[end].text()) + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + addmodelline=".model "+ line[3]+" climit(in_offset="+in_offset+" gain="+gain+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in controlledlimiter model ",line[1] + + elif line[2]=='analogswitch': + try: + start=line[5] + end=line[6] + cntl_on=str(nextentry_var[start].text()) + cntl_off=str(nextentry_var[start+1].text()) + r_on=str(nextentry_var[start+2].text()) + r_off=str(nextentry_var[end].text()) + if cntl_on=="": cntl_on="5.0" + if cntl_off=="": cntl_off="0.0" + if r_on=="": r_on="10.0" + if r_off=="": r_off="1e6" + addmodelline=".model "+ line[3]+" aswitch(cntl_on="+cntl_on+" cntl_off="+cntl_off+" r_on="+r_on+" r_off="+r_off+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in analogswitch model ",line[1] + + elif line[2]=='zener': + try: + start=line[5] + end=line[6] + v_breakdown=str(nextentry_var[start].text()) + i_breakdown=str(nextentry_var[start+1].text()) + i_sat=str(nextentry_var[start+2].text()) + n_forward=str(nextentry_var[end].text()) + if v_breakdown=="": v_breakdown="5.6" + if i_breakdown=="": i_breakdown="1.0e-2" + if i_sat=="": i_sat="1.0e-12" + if n_forward=="": n_forward="1.0" + addmodelline=".model "+ line[3]+" zener(v_breakdown="+v_breakdown+" i_breakdown="+i_breakdown+" i_sat="+i_sat+" n_forward="+n_forward+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in zener model ",line[1] + + elif line[2]=='d_buffer': + try: + start=line[5] + end=line[6] + rise_delay=str(nextentry_var[start].text()) + fall_delay=str(nextentry_var[start+1].text()) + input_load=str(nextentry_var[end].text()) + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_buffer(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_buffer model ",line[1] + + elif line[2]=='d_inverter': + try: + start=line[5] + end=line[6] + rise_delay=str(nextentry_var[start].text()) + fall_delay=str(nextentry_var[start+1].text()) + input_load=str(nextentry_var[end].text()) + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_inverter(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_inverter model ",line[1] + + elif line[2]=='d_and': + try: + start=line[5] + end=line[6] + rise_delay=str(nextentry_var[start].text()) + fall_delay=str(nextentry_var[start+1].text()) + input_load=str(nextentry_var[end].text()) + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_and(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_and model ",line[1] + + elif line[2]=='d_nand': + try: + start=line[5] + end=line[6] + rise_delay=str(nextentry_var[start].text()) + fall_delay=str(nextentry_var[start+1].text()) + input_load=str(nextentry_var[end].text()) + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_nand(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_nand model ",line[1] + + elif line[2]=='d_or': + try: + start=line[5] + end=line[6] + rise_delay=str(nextentry_var[start].text()) + fall_delay=str(nextentry_var[start+1].text()) + input_load=str(nextentry_var[end].text()) + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_or(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_or model ",line[1] + + elif line[2]=='d_nor': + try: + start=line[5] + end=line[6] + rise_delay=str(nextentry_var[start].text()) + fall_delay=str(nextentry_var[start+1].text()) + input_load=str(nextentry_var[end].text()) + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_nor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_nor model ",line[1] + + elif line[2]=='d_xor': + try: + start=line[5] + end=line[6] + rise_delay=str(nextentry_var[start].text()) + fall_delay=str(nextentry_var[start+1].text()) + input_load=str(nextentry_var[end].text()) + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_xor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_xor model ",line[1] + + elif line[2]=='d_xnor': + try: + start=line[5] + end=line[6] + rise_delay=str(nextentry_var[start].text()) + fall_delay=str(nextentry_var[start+1].text()) + input_load=str(nextentry_var[end].text()) + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_xnor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_xnor model ",line[1] + + elif line[2]=='d_tristate': + try: + start=line[5] + end=line[6] + delay=str(nextentry_var[start].text()) + input_load=str(nextentry_var[start+1].text()) + enable_load=str(nextentry_var[end].text()) + if delay=="": delay="1e-12" + if input_load=="": input_load="1e-12" + if enable_load=="": enable_load="1e-12" + addmodelline=".model "+ line[3]+" d_tristate(delay="+delay+" enable_load="+enable_load+" input_load="+input_load+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_tristate model ",line[1] + + elif line[2]=='d_pullup': + try: + start=line[5] + end=line[6] + load=str(nextentry_var[start].text()) + if load=="": load="1e-12" + addmodelline=".model "+ line[3]+" d_pullup(load="+load+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_pullup model ",line[1] + + elif line[2]=='d_pulldown': + try: + start=line[5] + end=line[6] + load=str(nextentry_var[start].text()) + if load=="": load="1e-12" + addmodelline=".model "+ line[3]+" d_pulldown(load="+load+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_pulldown model ",line[1] + + elif line[2]=='d_srlatch': + try: + start=line[5] + end=line[6] + sr_delay=str(nextentry_var[start].text()) + enable_delay=str(nextentry_var[start+1].text()) + set_delay=str(nextentry_var[start+2].text()) + reset_delay=str(nextentry_var[start+3].text()) + ic=str(nextentry_var[start+4].text()) + sr_load=str(nextentry_var[start+5].text()) + enable_load=str(nextentry_var[start+6].text()) + set_load=str(nextentry_var[start+7].text()) + reset_load=str(nextentry_var[start+8].text()) + rise_delay=str(nextentry_var[start+9].text()) + fall_delay=str(nextentry_var[end].text()) + if sr_delay=="": sr_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if sr_load=="": sr_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_srlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+sr_load="+sr_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+sr_delay="+sr_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_srlatch model ",line[1] + + elif line[2]=='d_jklatch': + try: + start=line[5] + end=line[6] + jk_delay=str(nextentry_var[start].text()) + enable_delay=str(nextentry_var[start+1].text()) + set_delay=str(nextentry_var[start+2].text()) + reset_delay=str(nextentry_var[start+3].text()) + ic=str(nextentry_var[start+4].text()) + jk_load=str(nextentry_var[start+5].text()) + enable_load=str(nextentry_var[start+6].text()) + set_load=str(nextentry_var[start+7].text()) + reset_load=str(nextentry_var[start+8].text()) + rise_delay=str(nextentry_var[start+9].text()) + fall_delay=str(nextentry_var[end].text()) + if jk_delay=="": jk_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if jk_load=="": jk_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_jklatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+jk_load="+jk_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+jk_delay="+jk_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_jklatch model ",line[1] + + elif line[2]=='d_dlatch': + try: + start=line[5] + end=line[6] + data_delay=str(nextentry_var[start].text()) + enable_delay=str(nextentry_var[start+1].text()) + set_delay=str(nextentry_var[start+2].text()) + reset_delay=str(nextentry_var[start+3].text()) + ic=str(nextentry_var[start+4].text()) + data_load=str(nextentry_var[start+5].text()) + enable_load=str(nextentry_var[start+6].text()) + set_load=str(nextentry_var[start+7].text()) + reset_load=str(nextentry_var[start+8].text()) + rise_delay=str(nextentry_var[start+9].text()) + fall_delay=str(nextentry_var[end].text()) + if data_delay=="": data_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if data_load=="": data_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_dlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+data_load="+data_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+data_delay="+data_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_dlatch model ",line[1] + + elif line[2]=='d_tlatch': + try: + start=line[5] + end=line[6] + t_delay=str(nextentry_var[start].text()) + enable_delay=str(nextentry_var[start+1].text()) + set_delay=str(nextentry_var[start+2].text()) + reset_delay=str(nextentry_var[start+3].text()) + ic=str(nextentry_var[start+4].text()) + t_load=str(nextentry_var[start+5].text()) + enable_load=str(nextentry_var[start+6].text()) + set_load=str(nextentry_var[start+7].text()) + reset_load=str(nextentry_var[start+8].text()) + rise_delay=str(nextentry_var[start+9].text()) + fall_delay=str(nextentry_var[end].text()) + if t_delay=="": t_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if t_load=="": t_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_tlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+t_load="+t_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+t_delay="+t_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_tlatch model ",line[1] + + elif line[2]=='d_srff': + try: + start=line[5] + end=line[6] + clk_delay=str(nextentry_var[start].text()) + set_delay=str(nextentry_var[start].text()) + reset_delay=str(nextentry_var[start].text()) + ic=str(nextentry_var[start].text()) + sr_load=str(nextentry_var[start].text()) + clk_load=str(nextentry_var[start].text()) + set_load=str(nextentry_var[start].text()) + reset_load=str(nextentry_var[start].text()) + rise_delay=str(nextentry_var[start].text()) + fall_delay=str(nextentry_var[start].text()) + if clk_delay=="": clk_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if sr_load=="": sr_load="1e-12" + if clk_load=="": clk_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_srff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+sr_load="+sr_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_srff model ",line[1] + + elif line[2]=='d_jkff': + try: + start=line[5] + end=line[6] + clk_delay=str(nextentry_var[start].text()) + set_delay=str(nextentry_var[start].text()) + reset_delay=str(nextentry_var[start].text()) + ic=str(nextentry_var[start].text()) + jk_load=str(nextentry_var[start].text()) + clk_load=str(nextentry_var[start].text()) + set_load=str(nextentry_var[start].text()) + reset_load=str(nextentry_var[start].text()) + rise_delay=str(nextentry_var[start].text()) + fall_delay=str(nextentry_var[start].text()) + if clk_delay=="": clk_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if jk_load=="": sr_load="1e-12" + if clk_load=="": clk_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_jkff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+jk_load="+jk_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_jkff model ",line[1] + + elif line[2]=='d_dff': + try: + start=line[5] + end=line[6] + clk_delay=str(nextentry_var[start].text()) + set_delay=str(nextentry_var[start+1].text()) + reset_delay=str(nextentry_var[start+2].text()) + ic=str(nextentry_var[start+3].text()) + data_load=str(nextentry_var[start+4].text()) + clk_load=str(nextentry_var[start+5].text()) + set_load=str(nextentry_var[start+6].text()) + reset_load=str(nextentry_var[start+7].text()) + rise_delay=str(nextentry_var[start+8].text()) + fall_delay=str(nextentry_var[end].text()) + if clk_delay=="": clk_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if data_load=="": data_load="1e-12" + if clk_load=="": clk_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_dff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+data_load="+data_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_dff model ",line[1] + + elif line[2]=='d_tff': + try: + start=line[5] + end=line[6] + clk_delay=str(nextentry_var[start].text()) + set_delay=str(nextentry_var[start+1].text()) + reset_delay=str(nextentry_var[start+2].text()) + ic=str(nextentry_var[start+3].text()) + t_load=str(nextentry_var[start+4].text()) + clk_load=str(nextentry_var[start+5].text()) + set_load=str(nextentry_var[start+6].text()) + reset_load=str(nextentry_var[start+7].text()) + rise_delay=str(nextentry_var[start+8].text()) + fall_delay=str(nextentry_var[end].text()) + if t_delay=="": t_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if t_load=="": t_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_tff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+t_load="+t_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_tff model ",line[1] + + elif line[2]=='ic': + try: + start=line[5] + end=line[6] + ic=str(nextentry_var[start].text()) + if ic=="": ic="0" + addmodelline=".ic v("+line[7]+")="+ic + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in ic initial condition ",line[1] + + else: + print "No model found" + QMessageBox.about(self,"Model Information","Please check whether used model is available inside code") + #tkMessageBox.showinfo("Model Info","Please check whether used model is available inside code") + + print "Model List has been added",modelparamvalue + + +def AddSourceValue(): + #print "Add Source Value" + + global sourcelistvalue + sourcelistvalue=[] + global start + global end + start=0 + end=0 + #print "Track Source List :",sourcelisttrack + #print "Initial Source List Value :",sourcelistvalue + for compline in sourcelisttrack: + print "compline ",compline + index=compline[0] + addline=schematicInfo[index] + #print "addline ",addline,"for index ",index + if compline[1]=='sine': + try: + start=compline[2] + end=compline[3] + vo_val=str(entry_var[start].text()) if len(str(entry_var[start].text()))>0 else '0' + va_val=str(entry_var[start+1].text()) if len(str(entry_var[start+1].text()))>0 else '0' + freq_val=str(entry_var[start+2].text()) if len(str(entry_var[start+2].text()))>0 else '0' + td_val=str(entry_var[start+3].text()) if len(str(entry_var[start+3].text()))>0 else '0' + theta_val=str(entry_var[end].text()) if len(str(entry_var[end].text()))>0 else '0' + addline=addline.partition('(')[0] + "("+vo_val+" "+va_val+" "+freq_val+" "+td_val+" "+theta_val+")" + #print "Line Added ",addline + sourcelistvalue.append([index,addline]) + except: + print "Caught an exception in sine voltage source ",addline + + elif compline[1]=='pulse': + try: + print "yessss" + start=compline[2] + end=compline[3] + v1_val=str(entry_var[start].text()) if len(str(entry_var[start].text()))>0 else '0' + v2_val=str(entry_var[start+1].text()) if len(str(entry_var[start+1].text()))>0 else '0' + td_val=str(entry_var[start+2].text()) if len(str(entry_var[start+2].text()))>0 else '0' + tr_val=str(entry_var[start+3].text()) if len(str(entry_var[start+3].text()))>0 else '0' + tf_val=str(entry_var[start+4].text()) if len(str(entry_var[start+4].text()))>0 else '0' + pw_val=str(entry_var[start+5].text()) if len(str(entry_var[start+5].text()))>0 else '0' + tp_val=str(entry_var[end].text()) if len(str(entry_var[end].text()))>0 else '0' + + addline=addline.partition('(')[0] + "("+v1_val+" "+v2_val+" "+td_val+" "+tr_val+" "+tf_val+" "+pw_val+" "+tp_val+")" + #print "Line Added ",addline + sourcelistvalue.append([index,addline]) + except: + print "Caught an exception in pulse voltage source ",addline + + elif compline[1]=='pwl': + try: + start=compline[2] + t_v_val=str(entry_var[start].text()) if len(str(entry_var[start].text()))>0 else '0 0' + addline=addline.partition('(')[0] + "("+t_v_val+")" + #print "Line Added ",addline + sourcelistvalue.append([index,addline]) + except: + print "Caught an exception in pwl voltage source ",addline + + elif compline[1]=='ac': + try: + start=compline[2] + va_val=str(entry_var[start].text()) if len(str(entry_var[start].text()))>0 else '0' + addline=' '.join(addline.split()) + addline=addline.partition('ac')[0] +" "+'ac'+" "+ va_val + #print "Line Added ",addline + sourcelistvalue.append([index,addline]) + except: + print "Caught an exception in ac voltage source ",addline + + elif compline[1]=='dc': + try: + start=compline[2] + v1_val=str(entry_var[start].text()) if len(str(entry_var[start].text()))>0 else '0' + addline=' '.join(addline.split()) + addline=addline.partition('dc')[0] + " " +'dc'+ " "+v1_val + #print "Line Added ",addline + sourcelistvalue.append([index,addline]) + except: + print "Caught an exception in dc voltage source",addline + + elif compline[1]=='exp': + try: + start=compline[2] + end=compline[3] + v1_val=str(entry_var[start].text()) if len(str(entry_var[start].text()))>0 else '0' + v2_val=str(entry_var[start+1].text()) if len(str(entry_var[start+1].text()))>0 else '0' + td1_val=str(entry_var[start+2].text()) if len(str(entry_var[start+2].text()))>0 else '0' + tau1_val=str(entry_var[start+3].text()) if len(str(entry_var[start+3].text()))>0 else '0' + td2_val=str(entry_var[start+4].text()) if len(str(entry_var[start+4].text()))>0 else '0' + tau2_val=str(entry_var[end].text()) if len(str(entry_var[end].text()))>0 else '0' + + addline=addline.partition('(')[0] + "("+v1_val+" "+v2_val+" "+td1_val+" "+tau1_val+" "+td2_val+" "+tau2_val+")" + #print "Line Added ",addline + sourcelistvalue.append([index,addline]) + except: + print "Caught an exception in exp voltage source ",addline + #print "Final Source List Value :",sourcelistvalue + ##Adding into schematicInfo + for item in sourcelistvalue: + del schematicInfo[item[0]] + schematicInfo.insert(item[0],item[1]) + +def create_ngspice_netlist(): + #print "sche in create_ng ",schematicInfo + last_file=open(last_input_file,"w"); + global spec_info + for info in schematicInfo: + spec_info=info.split() + if spec_info[0][0]=='v' or spec_info[0]=='.model': + last_file.writelines(info) + last_file.writelines('\n') + + #Add newline in the schematic information + for i in range(len(schematicInfo),0,-1): + schematicInfo.insert(i,'\n') + outfile=filename+".out" + cktfile=filename+".ckt" + out=open(outfile,"w") + ckt=open(cktfile,"w") + + out.writelines(infoline) + out.writelines('\n') + ckt.writelines(infoline) + ckt.writelines('\n') + + for modelName in modelList: + if os.path.exists(modelName+".lib"): + out.writelines('.include '+modelName+'.lib\n') + ckt.writelines('.include '+modelName+'.lib\n') + + for subcktName in subcktList: + out.writelines('.include '+subcktName+'.sub\n') + ckt.writelines('.include '+subcktName+'.sub\n') + if finalNetlist: + sections=[simulatorOption, initialCondOption, schematicInfo, analysisOption] + else: + sections=[simulatorOption, initialCondOption, schematicInfo] + for section in sections: + if len(section) == 0: + continue + else: + out.writelines('\n') + out.writelines(section) + ckt.writelines('\n') + ckt.writelines(section) + if finalNetlist: + out.writelines('\n* Control Statements \n') + out.writelines('.control\n') + out.writelines('run\n') + out.writelines(outputOption) + outputOption1=[] + for option in outputOption: + if (("plot" in option) or ("print" in option)): + outputOption1.append("."+option) + else: + outputOption1.append(option) + ckt.writelines(outputOption1) + out.writelines('print allv > plot_data_v.txt\n') + out.writelines('print alli > plot_data_i.txt\n') + out.writelines('.endc\n') + out.writelines('.end\n') + ckt.writelines('.end\n') + last_file.close() + out.close() + ckt.close() + + print "The ngspice netlist has been written in "+filename+".out" + print "The scilab netlist has been written in "+filename+".ckt" + + +def convertICintoBasicBlocks(schematicInfo,outputOption,guimodelvalue): + #Insert Special source parameters + k=1 + #print "schematicInfo is ",schematicInfo + #print "guimodelvalue is ",guimodelvalue + for compline in schematicInfo: + words=compline.split() + compName=words[0] + # Find the IC from schematic + if compName[0]=='u': + # Find the component from the circuit + index=schematicInfo.index(compline) + compType=words[len(words)-1]; + schematicInfo.remove(compline) + + if (compType=="7404" or compType=="74hc04" or compType=="74hct04" or compType=="74ls04" or compType=="74ls14"): + i=1; + # Add first three Not gates + while words[i]!="0": + # Add analog to digital converter for input A + schematicInfo.append("a"+str(k)+" ["+words[i]+"] ["+words[i]+"_in] "+" "+compName+"adc") + k=k+1 + # Add Not gate + schematicInfo.append("a"+str(k)+" "+words[i]+"_in "+words[i+1]+"_out "+compName) + k=k+1 + # Add digital to analog converter for output B + schematicInfo.append("a"+str(k)+" ["+words[i+1]+"_out] ["+words[i+1]+"] "+" "+compName+"dac") + k=k+1 + i=i+2 + i=i+1 + # Add last three Not gates + while i11: + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[12]+" "+words[11]+" "+words[10]+" "+words[13]+"] ["+words[12]+"_in "+words[11]+"_in "+words[10]+"_in "+words[13]+"_in] "+compName+"adc") + k=k+1 + # Add D Flip-flop + schematicInfo.append("a"+str(k)+" "+words[12]+"_in "+words[11]+"_in ~"+words[10]+"_in ~"+words[13]+"_in "+words[9]+"_out "+words[8]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[9]+"_out "+words[8]+"_out] ["+words[9]+" "+words[8]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for D Flip-Flop + schematicInfo.append(".model "+ compName+" d_dff") + # Add model for analog-to-digital bridge + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="7475" or compType=="74hc75" or compType=="74ls75"): + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[1]+"_in] "+compName+"adc") + k=k+1 + # Add T Flip-flop + schematicInfo.append("a"+str(k)+" "+words[2]+"_in "+words[3]+"_in ~"+words[4]+"_in ~"+words[1]+"_in "+words[5]+"_out "+words[6]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[5]+"_out "+words[6]+"_out] ["+words[5]+" "+words[6]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for T Flip-Flop + schematicInfo.append(".model "+ compName+" d_tff") + # Add model for analog-to-digital bridge + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="74107" or compType=="74hc107" or compType=="74ls107"): + if len(words)>11: + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[4]+" "+words[12]+" "+words[13]+"] ["+words[1]+"_in "+words[4]+"_in "+words[12]+"_in "+words[13]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[1]+"_in "+words[4]+"_in ~"+words[12]+"_in ~"+words[13]+"_in ~"+words[13]+"_in "+words[3]+"_out "+words[2]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[3]+"_out "+words[2]+"_out] ["+words[3]+" "+words[2]+"] "+" "+compName+"dac") + k=k+1 + + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[8]+" "+words[11]+" "+words[9]+" "+words[10]+"] ["+words[8]+"_in "+words[11]+"_in "+words[9]+"_in "+words[10]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[8]+"_in "+words[11]+"_in ~"+words[9]+"_in ~"+words[10]+"_in ~"+words[10]+"_in "+words[5]+"_out "+words[6]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[5]+"_out "+words[6]+"_out] ["+words[5]+" "+words[6]+"] "+" "+compName+"dac") + k=k+1 + else: + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[4]+" "+words[12]+" "+words[13]+"] ["+words[1]+"_in "+words[4]+"_in "+words[12]+"_in "+words[13]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[1]+"_in "+words[4]+"_in ~"+words[12]+"_in ~"+words[13]+"_in ~"+words[13]+"_in "+words[3]+"_out "+words[2]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[3]+"_out "+words[2]+"_out] ["+words[3]+" "+words[2]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for JK Flip-Flop + schematicInfo.append(".model "+ compName+" d_jkff") + # Add model for analog-to-digital bridge + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="74109" or compType=="74hc109" or compType=="74ls109"): + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[5]+"_in "+words[1]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[2]+"_in ~"+words[3]+"_in "+words[4]+"_in ~"+words[5]+"_in ~"+words[1]+"_in "+words[6]+"_out "+words[7]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[6]+"_out "+words[7]+"_out] ["+words[6]+" "+words[7]+"] "+" "+compName+"dac") + k=k+1 + if len(words)>12: + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[14]+" "+words[13]+" "+words[12]+" "+words[11]+" "+words[15]+"] ["+words[14]+"_in "+words[13]+"_in "+words[12]+"_in "+words[11]+"_in "+words[15]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[14]+"_in ~"+words[13]+"_in "+words[12]+"_in ~"+words[11]+"_in ~"+words[15]+"_in "+words[10]+"_out "+words[9]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[10]+"_out "+words[9]+"_out] ["+words[10]+" "+words[9]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for JK Flip-Flop + schematicInfo.append(".model "+ compName+" d_jkff") + # Add model for analog-to-digital bridge + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="7471" or compType=="74hc71" or compType=="74ls71"): + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[5]+"_in "+words[1]+"_in] "+compName+"adc") + k=k+1 + # Add S-R Flip-flop + schematicInfo.append("a"+str(k)+" "+words[2]+"_in ~"+words[3]+"_in "+words[4]+"_in ~"+words[5]+"_in ~"+words[1]+"_in "+words[6]+"_out "+words[7]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[6]+"_out "+words[7]+"_out] ["+words[6]+" "+words[7]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for SR Flip-Flop + schematicInfo.append(".model "+ compName+" d_srff") + # Add model for analog-to-digital bridge741 + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="74112" or compType=="74hc112" or compType=="74ls112"): + if len(words)>12: + schematicInfo.append("a"+str(k)+" "+words[3]+" "+words[2]+" ~"+words[1]+" ~"+words[4]+" ~"+words[15]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + schematicInfo.append("a"+str(k)+" "+words[11]+" "+words[12]+" ~"+words[13]+" ~"+words[10]+" ~"+words[14]+" "+words[9]+" "+words[7]+" "+compName) + k=k+1 + else: + schematicInfo.append("a"+str(k)+" "+words[3]+" "+words[2]+" ~"+words[1]+" ~"+words[4]+" ~"+words[8]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* "+compType) + schematicInfo.append(".model "+ compName+" d_jkff") + elif compType=="dac": + schematicInfo.append("a"+str(k)+" ["+words[1]+"] ["+words[2]+"] "+compName) + k=k+1 + schematicInfo.insert(index,"* Digital to Analog converter "+compType) + schematicInfo.append(".model "+ compName+" dac_bridge") + elif compType=="adc": + schematicInfo.append("a"+str(k)+" ["+words[1]+"] ["+words[2]+"] "+compName) + k=k+1 + schematicInfo.insert(index,"* Analog to Digital converter "+compType) + schematicInfo.append(".model "+ compName+" adc_bridge") + elif compType=="adc8": + for i in range(0,len(words)/2-1): + schematicInfo.append("a"+str(k)+" ["+words[i+1]+"] ["+words[i+len(words)/2]+"] "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Analog to Digital Converter" + Comment='* Analog to Digital converter '+compType + Title='Add parameters for analog to digital converter '+compName + in_low=' Enter input low level voltage (default=0.8): ' + in_high=' Enter input high level voltage (default=2.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,in_low,in_high]) + elif compType=="dac8": + for i in range(0,len(words)/2-1): + schematicInfo.append("a"+str(k)+" ["+words[i+1]+"] ["+words[i+len(words)/2]+"] "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Digital to Analog converter" + Comment='* Digital to Analog converter '+compType + Title='Add parameters for digital to analog converter '+compName + out_low=' Enter output low level voltage (default=0.2): ' + out_high=' Enter output high level voltage (default=5.0): ' + out_undef=' Enter output for undefined voltage level (default=2.2): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,out_low,out_high,out_undef]) + elif compType=="gain": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Gain" + Comment='* Gain '+compType + Title='Add parameters for Gain '+compName + in_offset=' Enter offset for input (default=0.0): ' + gain=' Enter gain (default=1.0): ' + out_offset=' Enter offset for output (default=0.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,in_offset,gain,out_offset]) + elif compType=="summer": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding summer" + Comment='* Summer '+compType + Title='Add parameters for Summer '+compName + in1_offset=' Enter offset for input 1 (default=0.0): ' + in2_offset=' Enter offset for input 2 (default=0.0): ' + in1_gain=' Enter gain for input 1 (default=1.0): ' + in2_gain=' Enter gain for input 2 (default=1.0): ' + out_gain=' Enter gain for output (default=1.0): ' + out_offset=' Enter offset for output (default=0.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,in1_offset,in2_offset,in1_gain,in2_gain,out_gain,out_offset]) + elif compType=="multiplier": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Multiplier" + Comment='* Multiplier '+compType + Title='Add parameters for Multiplier '+compName + in1_offset=' Enter offset for input 1 (default=0.0): ' + in2_offset=' Enter offset for input 2 (default=0.0): ' + in1_gain=' Enter gain for input 1 (default=1.0): ' + in2_gain=' Enter gain for input 2 (default=1.0): ' + out_gain=' Enter gain for output (default=1.0): ' + out_offset=' Enter offset for output (default=0.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,in1_offset,in2_offset,in1_gain,in2_gain,out_gain,out_offset]) + elif compType=="divider": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Divider" + Comment='Divider '+compType + Title='Add parameters for Divider '+compName + num_offset=' Enter offset for numerator (default=0.0): ' + den_offset=' Enter offset for denominator (default=0.0): ' + num_gain=' Enter gain for numerator (default=1.0): ' + den_gain=' Enter gain for denominator (default=1.0): ' + out_gain=' Enter gain for output (default=1.0): ' + out_offset=' Enter offset for output (default=0.0): ' + den_lower_limit=' Enter lower limit for denominator value (default=1.0e-10): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,num_offset,den_offset,num_gain,den_gain,out_gain,out_offset,den_lower_limit]) + elif compType=="limit": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding limiter" + Comment='* Limiter '+compType + Title='Add parameters for Limiter '+compName + lowerLimit=' Enter out lower limit (default=0.0): ' + upperLimit=' Enter out upper limit (default=5.0): ' + in_offset=' Enter offset for input (default=0.0): ' + gain=' Enter gain (default=1.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,lowerLimit,upperLimit,in_offset,gain]) + elif compType=="integrator": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding integrator" + Comment='* Integrator '+compType + Title='Add parameters for Integrator '+compName + out_lower_limit=' Enter out lower limit (default=0.0): ' + out_upper_limit=' Enter out upper limit (default=5.0): ' + in_offset=' Enter offset for input (default=0.0): ' + gain=' Enter gain (default=1.0): ' + out_ic=' Enter initial condition on output (default=0.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,out_lower_limit,out_upper_limit,in_offset,gain,out_ic]) + elif compType=="differentiator": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Differentiator" + Comment='* Differentiator '+compType + Title='Add parameters for Differentiator '+compName + out_lower_limit=' Enter out lower limit (default=0.0): ' + out_upper_limit=' Enter out upper limit (default=5.0): ' + out_offset=' Enter offset for output (default=0.0): ' + gain=' Enter gain (default=1.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,out_lower_limit,out_upper_limit,out_offset,gain]) + elif compType=="limit8": + for i in range(0,len(words)/2-1): + schematicInfo.append("a"+str(k)+" "+words[i+1]+" "+words[i+len(words)/2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding limiter" + Comment='* Limiter '+compType + Title='Add parameters for Limiter '+compName + lowerLimit=' Enter out lower limit (default=0.0): ' + upperLimit=' Enter out upper limit (default=5.0): ' + in_offset=' Enter offset for input (default=0.0): ' + gain=' Enter gain (default=1.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,lowerLimit,upperLimit,in_offset,gain]) + elif compType=="controlledlimiter": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding controlledlimiter" + Comment='* Controlled Limiter '+compType + Title='Add parameters for Controlled Limiter '+compName + in_offset=' Enter offset for input (default=0.0): ' + gain=' Enter gain (default=1.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,in_offset,gain]) + elif compType=="analogswitch": + schematicInfo.append("a"+str(k)+" "+words[1]+" ("+words[2]+" "+words[3]+") "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding analogswitch" + Comment='* Analog Switch '+compType + Title='Add parameters for Analog Switch '+compName + cntl_on=' Enter control ON voltage (default=5.0): ' + cntl_off=' Enter control OFF voltage (default=0.0): ' + r_on=' Enter ON resistance value (default=10.0): ' + r_off=' Enter OFF resistance value (default=1e6): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,cntl_on,cntl_off,r_on,r_off]) + elif compType=="zener": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Zener" + Comment='* Zener Diode '+compType + Title='Add parameters for Zener Diode '+compName + v_breakdown=' Enter Breakdown voltage (default=5.6): ' + i_breakdown=' Enter Breakdown current (default=2.0e-2): ' + i_sat=' Enter saturation current (default=1.0e-12): ' + n_forward=' Enter forward emission coefficient (default=0.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,v_breakdown,i_breakdown,i_sat,n_forward]) + elif compType=="d_buffer": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Buffer" + Comment='* Buffer '+compType + Title='Add parameters for Buffer '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_inverter": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Inverter" + Comment='* Inverter '+compType + Title='Add parameters for Inverter '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_and": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding AND" + Comment='* And '+compType + Title= 'Add parameters for And '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_nand": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding NAND" + Comment='* Nand '+compType + Title='Add parameters for Nand '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_or": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding OR" + Comment='* OR '+compType + Title='Add parameters for OR '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_nor": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding NOR" + Comment='* NOR '+compType + Title ='Add parameters for NOR '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_xor": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + print "-----------------------------------------------------------\n" + print "Adding XOR" + Comment='* XOR '+compType + Title='Add parameters for XOR '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_xnor": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding XNOR" + Comment='* XNOR '+compType + Title='Add parameters for XNOR '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_tristate": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Tristate" + Comment='* Tristate '+compType + Title='Add parameters for Tristate '+compName + delay=' Enter delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + enable_load=' Enter enable load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,delay,input_load,enable_load]) + elif compType=="d_pullup": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding pullup" + Comment='* Pullup '+compType + Title='Add parameters for Pullup '+compName + load=' Enter load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,load]) + elif compType=="d_pulldown": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding pulldown" + Comment='* Pulldown '+compType + Title='Add parameters for Pulldown '+compName + load=' Enter load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,load]) + elif compType=="d_srlatch": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding SR Latch" + Comment='* SR Latch '+compType + Title='Add parameters for SR Latch '+compName + sr_delay=' Enter input to set-reset delay (default=1e-12): ' + enable_delay=' Enter enable delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + sr_load=' Enter input to set-reset load (default=1e-12): ' + enable_load=' Enter enable load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,sr_delay,enable_delay,set_delay,reset_delay,ic,sr_load,enable_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_jklatch": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding JK Latch" + Comment='* JK Latch '+compType + Title= 'Add parameters for JK Latch '+compName + jk_delay=' Enter input to j-k delay (default=1e-12): ' + enable_delay=' Enter enable delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + jk_load=' Enter input to j-k load (default=1e-12): ' + enable_load=' Enter enable load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,jk_delay,enable_delay,set_delay,reset_delay,ic,enable_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_dlatch": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding D Latch" + Comment='* D Latch '+compType + Title= 'Add parameters for D Latch '+compName + data_delay=' Enter input to data delay (default=1e-12): ' + enable_delay=' Enter enable delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + data_load=' Enter input to data load (default=1e-12): ' + enable_load=' Enter enable load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,data_delay,enable_delay,set_delay,reset_delay,ic,data_load,enable_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_tlatch": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding T Latch" + Comment='* T Latch '+compType + Title= 'Add parameters for T Latch '+compName + t_delay=' Enter input to t delay (default=1e-12): ' + enable_delay=' Enter enable delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + t_load=' Enter input to t load (default=1e-12): ' + enable_load=' Enter enable load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,t_delay,enable_delay,set_delay,reset_delay,ic,t_load,enable_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_srff": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding SR Flip-Flop" + Comment='* SR Flip-Flop '+compType + Title='Add parameters for SR Flip-Flop '+compName + clk_delay=' Enter clk delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + sr_load=' Enter input to set-reset load (default=1e-12): ' + clk_load=' Enter clk load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,sr_load,clk_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_jkff": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding JK Flip-Flop" + Comment='* JK Flip-Flop '+compType + Title= 'Add parameters for JK Flip-Flop '+compName + clk_delay=' Enter clk delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + jk_load=' Enter input to j-k load (default=1e-12): ' + clk_load=' Enter clk load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,jk_load,clk_load,set_load,reset_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_dff": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding D Flip-Flop" + Comment='* D Flip-Flop '+compType + Title= 'Add parameters for D Flip-Flop '+compName + clk_delay=' Enter clk delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + data_load=' Enter input to data load (default=1e-12): ' + clk_load=' Enter clk load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,data_load,clk_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_tff": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding T Flip-Flop" + Comment='* T Flip-Flop '+compType + Title='Add parameters for T Flip-Flip '+compName + clk_delay=' Enter clk delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + t_load=' Enter input to t load (default=1e-12): ' + clk_load=' Enter clk load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,t_load,clk_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="vplot1": + outputOption.append("plot v("+words[1]+")\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vplot8_1": + outputOption.append("plot ") + for i in range(1,len(words)-1): + outputOption.append("v("+words[i]+") ") + outputOption.append("\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vdbplot8_1": + outputOption.append("plot ") + for i in range(1,len(words)-1): + outputOption.append("db(v("+words[i]+")) ") + outputOption.append("\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vphase_plot8_1": + outputOption.append("plot ") + for i in range(1,len(words)-1): + outputOption.append("ph(v("+words[i]+")) ") + outputOption.append("\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vprint1": + outputOption.append("print v("+words[1]+")\n") + schematicInfo.insert(index,"* Printing option "+compType) + elif compType=="calc": + outputOption.append("plot "+words[2]+"\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vprint8_1": + outputOption.append("print ") + for i in range(1,len(words)-1): + outputOption.append("v("+words[i]+") ") + outputOption.append("\n") + schematicInfo.insert(index,"* Printing option "+compType) + elif compType=="vplot": + outputOption.append("plot v("+words[1]+")-v("+words[2]+")\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vplot8": + outputOption.append("plot ") + for i in range(0,len(words)/2-1): + if words[i+1]=="0": + outputOption.append("-v("+words[i+len(words)/2]+") ") + elif words[i+len(words)/2]=="0": + outputOption.append("v("+words[i+1]+") ") + else: + outputOption.append("v("+words[i+1]+")-v("+words[i+len(words)/2]+") ") + outputOption.append("\n") + elif compType=="vprint": + outputOption.append("print v("+words[1]+")-v("+words[2]+")\n") + schematicInfo.insert(index,"* Printting option "+compType) + elif compType=="iplot": + schematicInfo.insert(index,"V_"+words[0]+" "+words[1]+" "+words[2]+" 0") + outputOption.append("plot i(V_"+words[0]+")\n") + elif compType=="powerplot": + outputOption.append("print ((v("+words[1]+")-v("+words[2]+"))^2)/("+words[3]+")\n") + schematicInfo.insert(index,"* Printting option "+compType) + elif compType=="ic": + Comment='*Adding initial Condition '+compType + Title=' Add initial condition ' +compName + print "-----------------------------------------------------------" + print "Adding initial condition" + ic=' Enter initial condition on output (default=0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,words[1],ic]) + elif compType=="opamp1": + f = open(FreeEDA_HOME) + data = f.read() + schematicInfo.insert(index,data) + elif compType=="transfo": + schematicInfo.append("a"+str(k)+" ("+words[1]+" "+words[2]+") (2mmf "+words[2]+") "+compName+"_primary") + k=k+1 + schematicInfo.insert(index,"* "+compline) + print "------------------------------------------------------------" + Comment="*Adding transformer "+compType + Title="Add parameters for primary and secondary "+compName + num_turns="Enter the number of turns in primary (default=310):" + schematicInfo.append("a"+str(k)+" (2mmf 3mmf) "+compName+"_iron_core") + k=k+1 + h1="Enter H value for B-H table seperated by spcae (default=blank)" + b1="Enter corresponding B value seperated by space (default=blank)" + area="Enter the cross-sectional area of the core: (default = 1)" + length ="Enter the core length: (default = 0.01)" + schematicInfo.append("a"+str(k)+" ("+words[4]+" "+words[3]+") (3mmf "+words[3]+") "+compName+"_secondary") + k=k+1 + num_turns2="Enter the number of turns in secondary (default=620):" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,num_turns,h1,b1,area,length,num_turns2]) + else: + schematicInfo.insert(index,compline) + # Update option information + return schematicInfo,outputOption,guimodelvalue + +def previous_file_open(filename): + """Read Pspice netList""" + # Open file if it exists + if os.path.exists(filename): + try: + f = open(filename) + global last_info + last_info=f.read() + f.close() + return 1; + except : + print("Error in opening file") + return 0; + else: + print filename + " does not exist" + return 0; + + + + + +def readNetlist(filename): + """Read Pspice netList""" + # Open file if it exists + if os.path.exists(filename): + try: + f = open(filename) + except : + print("Error in opening file") + sys.exit() + else: + print filename + " does not exist" + sys.exit() + # Read the data from file + data=f.read() + # Close the file + f.close() + return data.splitlines() + +def readParamInfo(data): + """Read Parameter information and store it into dictionary""" + print "data " + print data + param={} + for eachline in lines: + print eachline + eachline=eachline.strip() + if len(eachline)>1: + words=eachline.split(); + option=words[0].lower() + if option=='.param': + for i in range(1, len(words), 1): + paramList=words[i].split('=') + param[paramList[0]]=paramList[1] + return param + +def preprocessNetlist(lines,param): + """Preprocess netlist (replace parameters)""" + netlist=[] + for eachline in lines: + # Remove leading and trailing blanks spaces from line + eachline=eachline.strip() + # Remove special character $ + eachline=eachline.replace('$','') + # Replace parameter with values + for subParam in eachline.split(): + if '}' in subParam: + key=subParam.split()[0] + key=key.strip('{') + key=key.strip('}') + if key in param: + eachline=eachline.replace('{'+key+'}',param[key]) + else: + print "Parameter " + key +" does not exists" + value=raw_input('Enter parameter value: ') + eachline=eachline.replace('{'+key+'}',value) + # Convert netlist into lower case letter + eachline=eachline.lower() + # Construct netlist + if len(eachline)>1: + if eachline[0]=='+': + netlist.append(netlist.pop()+eachline.replace('+',' ')) + else: + netlist.append(eachline) + # Copy information line + infoline=netlist[0] + netlist.remove(netlist[0]) + return netlist,infoline + +def separateNetlistInfo(netlist): + optionInfo=[] + schematicInfo=[] + + for eachline in netlist: + if eachline[0]=='*': + continue + elif eachline[0]=='.': + optionInfo.append(eachline) + else: + schematicInfo.append(eachline) + return optionInfo,schematicInfo + +def addAnalysis(optionInfo): + """Open file if it exists""" + filename="analysis" + if os.path.exists(filename): + try: + f = open(filename) + except : + print("Error in opening file") + sys.exit() + else: + print filename + " does not exist" + sys.exit() + +# Read the data from file + data=f.read() + +# Close the file + f.close() + + analysisData=data.splitlines() + for eachline in analysisData: + eachline=eachline.strip() + if len(eachline)>1: + if eachline[0]=='.': + optionInfo.append(eachline) + else: + pass + return optionInfo + + + + +def findCurrent(schematicInfo,outputOption): + #Find current through component by placing voltage source series with the component + i=0 + for eachline in outputOption: + words=eachline.split() + option=words[0] + # Add voltage sources in series with component to find current + if option=="print" or option=="plot": + words.remove(option) + updatedline=eachline + for outputVar in words: + # Find component name if output variable is current + if outputVar[0]=='i': + outputVar=outputVar.strip('i') + outputVar=outputVar.strip('(') + compName=outputVar.strip(')') + # If component is voltage source, skip + if compName[0]=='v': + continue + # Find the component from the circuit + for compline in schematicInfo: + compInfo=compline.split() + if compInfo[0]==compName: + # Construct dummy node + dummyNode='dummy_'+str(i) + i+=1 + # Break the one node component and place zero value voltage source in between. + index=schematicInfo.index(compline) + schematicInfo.remove(compline) + compline=compline.replace(compInfo[2],dummyNode) + schematicInfo.insert(index,compline) + schematicInfo.append('v'+compName+' '+dummyNode+' '+compInfo[2]+' 0') + # Update option information + updatedline=updatedline.replace('i('+compName+')','i(v'+compName+')') + index=outputOption.index(eachline) + outputOption.remove(eachline) + outputOption.insert(index,updatedline) + return schematicInfo, outputOption + +def insertSpecialSourceParam(schematicInfo,sourcelist): + #Inser Special source parameter + schematicInfo1=[] + + for compline in schematicInfo: + words=compline.split() + compName=words[0] + # Ask for parameters of source + if compName[0]=='v' or compName=='i': + # Find the index component from circuit + index=schematicInfo.index(compline) + #schematicInfo.remove(compline) + if words[3]=="pulse": + Title="Add parameters for pulse source "+compName + v1=' Enter initial value(Volts/Amps): ' + v2=' Enter pulsed value(Volts/Amps): ' + td=' Enter delay time (seconds): ' + tr=' Enter rise time (seconds): ' + tf=' Enter fall time (seconds): ' + pw=' Enter pulse width (seconds): ' + tp=' Enter period (seconds): ' + sourcelist.append([index,compline,words[3],Title,v1,v2,td,tr,tf,pw,tp]) + + elif words[3]=="sine": + Title="Add parameters for sine source "+compName + vo=' Enter offset value (Volts/Amps): ' + va=' Enter amplitude (Volts/Amps): ' + freq=' Enter frequency (Hz): ' + td=' Enter delay time (seconds): ' + theta=' Enter damping factor (1/seconds): ' + sourcelist.append([index,compline,words[3],Title,vo,va,freq,td,theta]) + + elif words[3]=="pwl": + Title="Add parameters for pwl source"+compName + t_v=' Enter in pwl format without bracket i.e t1 v1 t2 v2.... ' + sourcelist.append([index,compline,words[3],Title,t_v]) + + elif words[3]=="ac": + Title="Add parameters for ac source "+compName + v_a=' Enter amplitude (Volts/Amps): ' + sourcelist.append([index,compline,words[3],Title,v_a]) + + elif words[3]=="exp": + Title="Add parameters for exponential source "+compName + v1=' Enter initial value(Volts/Amps): ' + v2=' Enter pulsed value(Volts/Amps): ' + td1=' Enter rise delay time (seconds): ' + tau1=' Enter rise time constant (seconds): ' + td2=' Enter fall time (seconds): ' + tau2=' Enter fall time constant (seconds): ' + sourcelist.append([index,compline,words[3],Title,v1,v2,td1,tau1,td2,tau2]) + + elif words[3]=="dc": + Title="Add parameters for DC source "+compName + v1=' Enter value(Volts/Amps): ' + v2=' Enter zero frequency: ' + sourcelist.append([index,compline,words[3],Title,v1,v2]) + #schematicInfo.insert(index,compline) + + elif compName[0]=='h' or compName[0]=='f': + # Find the index component from the circuit + index=schematicInfo.index(compline) + schematicInfo.remove(compline) + schematicInfo.insert(index,"* "+compName) + schematicInfo1.append("V"+compName+" "+words[3]+" "+words[4]+" 0") + schematicInfo1.append(compName+" "+words[1]+" "+words[2]+" "+"V"+compName+" "+words[5]) + schematicInfo=schematicInfo+schematicInfo1 + #print sourcelist + #print schematicInfo + return schematicInfo,sourcelist + + + +def main(): +# Accept input file name from user if not provided + global lines + global firstwindow #for checking whether first window in closed + global filename + global infoline,backClicked,last_input_file + global modelList,analysisOption + global subcktList,finalNetlist,simulatorOption,initialCondOption + firstwindow=1 + if len(sys.argv) < 2: + filename=raw_input('Enter file name: ') + else: + filename=sys.argv[1] + if len(sys.argv) < 3: + finalNetlist=int(raw_input('Do you want to create final file: ')) + else: + finalNetlist=int(sys.argv[2]) + + print "==================================" + print "Kicad to Ngspice netlist converter " + print "==================================" + print "converting "+filename + last_input_file=filename[:len(filename)-4] + last_input_file=last_input_file+"_last_input.txt" + print "input_file ",last_input_file + global schematicInfo + + # Read the netlist + lines=readNetlist(filename) + + # Construct parameter information + param=readParamInfo(lines) + + # Replace parameter with values + netlist, infoline=preprocessNetlist(lines,param) + + + # Separate option and schematic information + optionInfo, schematicInfo=separateNetlistInfo(netlist) + + if finalNetlist: + """Insert analysis from file""" + optionInfo=addAnalysis(optionInfo) + #print optionInfo + # Find the analysis option + analysisOption=[] + outputOption=[] + initialCondOption=[] + simulatorOption=[] + includeOption=[] + model=[] + + for eachline in optionInfo: + words=eachline.split() + option=words[0] + if (option=='.ac' or option=='.dc' or option=='.disto' or option=='.noise' or + option=='.op' or option=='.pz' or option=='.sens' or option=='.tf' or option=='.tran'): + analysisOption.append(eachline+'\n') + #print eachline + elif (option=='.save' or option=='.print' or option=='.plot' or option=='.four'): + eachline=eachline.strip('.') + outputOption.append(eachline+'\n') + elif (option=='.nodeset' or option=='.ic'): + initialCondOption.append(eachline+'\n') + elif option=='.option': + simulatorOption.append(eachline+'\n') + elif (option=='.include' or option=='.lib'): + includeOption.append(eachline+'\n') + elif (option=='.model'): + model.append(eachline+'\n') + elif option=='.end': + continue; + # Find the various model library required + modelList=[] + subcktList=[] + + for eachline in schematicInfo: + words=eachline.split() + if eachline[0]=='d': + modelName=words[3] + if modelName in modelList: + continue + modelList.append(modelName) + elif eachline[0]=='q': + modelName=words[4] + index=schematicInfo.index(eachline) + schematicInfo.remove(eachline) + schematicInfo.insert(index,words[0]+" "+words[3]+" "+words[2]+" "+words[1]+" "+words[4]) + if modelName in modelList: + continue + modelList.append(modelName) + elif eachline[0]=='m': + modelName=words[4] + index=schematicInfo.index(eachline) + schematicInfo.remove(eachline) + width=raw_input(' Enter width of mosfet '+words[0]+'(default=100u):') + length=raw_input(' Enter length of mosfet '+words[0]+'(default=100u):') + multiplicative_factor=raw_input(' Enter multiplicative factor of mosfet '+words[0]+'(default=1):') + if width=="": width="100u" + if multiplicative_factor=="": multiplicative_factor="100u" + if length=="": length="100u" + schematicInfo.insert(index,words[0]+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[3]+" "+words[4]+" "+'M='+multiplicative_factor+" "+'L='+length+" "+'W='+width) + if modelName in modelList: + continue + modelList.append(modelName) + elif eachline[0]=='j': + modelName=words[4] + index=schematicInfo.index(eachline) + schematicInfo.remove(eachline) + schematicInfo.insert(index,words[0]+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]) + if modelName in modelList: + continue + modelList.append(modelName) + elif eachline[0]=='x': + subcktName=words[len(words)-1] + if subcktName in subcktList: + continue + subcktList.append(subcktName) + + # Find current through components + schematicInfo,outputOption=findCurrent(schematicInfo,outputOption) + + #List for storing source and its value + global sourcelisttrack + sourcelist=[] + sourcelisttrack=[] + + # Add parameter to sources + schematicInfo,sourcelist=insertSpecialSourceParam(schematicInfo,sourcelist) + + sourcelist,sourcelisttrack=w.createrootwindow(sourcelist,sourcelisttrack) + + + + #print "Output Option",outputOption + #print "Sch Info",schematicInfo + #print "Src List",sourcelist + #print "Src Track",sourcelisttrack + + + +if __name__=='__main__': + app=QtGui.QApplication(sys.argv) + global w + global nw + w=Window() + nw=NewWindow() + nw.close() + main() + sys.exit(app.exec_()) diff --git a/FreeEDA/kicadtoNgspice/Tkinter_KicadtoNgspice.py b/FreeEDA/kicadtoNgspice/Tkinter_KicadtoNgspice.py new file mode 100755 index 0000000..d8c35cc --- /dev/null +++ b/FreeEDA/kicadtoNgspice/Tkinter_KicadtoNgspice.py @@ -0,0 +1,2560 @@ +#!/usr/bin/python +# KicadtoNgspice.py is a python script to convert a Kicad spice netlist to a ngspice netlist. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +import sys +import os.path +import tkMessageBox +from setPath import FreeEDA_HOME +from Tkinter import * + +def readNetlist(filename): + """Read Pspice netList""" +# Open file if it exists + if os.path.exists(filename): + try: + f = open(filename) + except : + print("Error in opening file") + sys.exit() + else: + print filename + " does not exist" + sys.exit() + +# Read the data from file + data=f.read() + +# Close the file + f.close() + return data.splitlines() + +def readParamInfo(data): + """Read Parameter information and store it into dictionary""" + param={} + for eachline in lines: + eachline=eachline.strip() + if len(eachline)>1: + words=eachline.split(); + option=words[0].lower() + if option=='.param': + for i in range(1, len(words), 1): + paramList=words[i].split('=') + param[paramList[0]]=paramList[1] + return param + +def preprocessNetlist(lines,param): + """Preprocess netlist (replace parameters)""" + netlist=[] + for eachline in lines: + # Remove leading and trailing blanks spaces from line + eachline=eachline.strip() + # Remove special character $ + eachline=eachline.replace('$','') + # Replace parameter with values + for subParam in eachline.split(): + if '}' in subParam: + key=subParam.split()[0] + key=key.strip('{') + key=key.strip('}') + if key in param: + eachline=eachline.replace('{'+key+'}',param[key]) + else: + print "Parameter " + key +" does not exists" + value=raw_input('Enter parameter value: ') + eachline=eachline.replace('{'+key+'}',value) + # Convert netlist into lower case letter + eachline=eachline.lower() + # Construct netlist + if len(eachline)>1: + if eachline[0]=='+': + netlist.append(netlist.pop()+eachline.replace('+',' ')) + else: + netlist.append(eachline) + # Copy information line + infoline=netlist[0] + netlist.remove(netlist[0]) + return netlist,infoline + +def separateNetlistInfo(netlist): + optionInfo=[] + schematicInfo=[] + + for eachline in netlist: + if eachline[0]=='*': + continue + elif eachline[0]=='.': + optionInfo.append(eachline) + else: + schematicInfo.append(eachline) + return optionInfo,schematicInfo + + +def addAnalysis(optionInfo): + """Open file if it exists""" + filename="analysis" + if os.path.exists(filename): + try: + f = open(filename) + except : + print("Error in opening file") + sys.exit() + else: + print filename + " does not exist" + sys.exit() + +# Read the data from file + data=f.read() + +# Close the file + f.close() + + analysisData=data.splitlines() + for eachline in analysisData: + eachline=eachline.strip() + if len(eachline)>1: + if eachline[0]=='.': + optionInfo.append(eachline) + else: + pass + return optionInfo + +def findCurrent(schematicInfo,outputOption): + #Find current through component by placing voltage source series with the component + i=0 + for eachline in outputOption: + words=eachline.split() + option=words[0] + # Add voltage sources in series with component to find current + if option=="print" or option=="plot": + words.remove(option) + updatedline=eachline + for outputVar in words: + # Find component name if output variable is current + if outputVar[0]=='i': + outputVar=outputVar.strip('i') + outputVar=outputVar.strip('(') + compName=outputVar.strip(')') + # If component is voltage source, skip + if compName[0]=='v': + continue + # Find the component from the circuit + for compline in schematicInfo: + compInfo=compline.split() + if compInfo[0]==compName: + # Construct dummy node + dummyNode='dummy_'+str(i) + i+=1 + # Break the one node component and place zero value voltage source in between. + index=schematicInfo.index(compline) + schematicInfo.remove(compline) + compline=compline.replace(compInfo[2],dummyNode) + schematicInfo.insert(index,compline) + schematicInfo.append('v'+compName+' '+dummyNode+' '+compInfo[2]+' 0') + # Update option information + updatedline=updatedline.replace('i('+compName+')','i(v'+compName+')') + index=outputOption.index(eachline) + outputOption.remove(eachline) + outputOption.insert(index,updatedline) + return schematicInfo, outputOption + +def insertSpecialSourceParam(schematicInfo,sourcelist): + #Inser Special source parameter + schematicInfo1=[] + + for compline in schematicInfo: + words=compline.split() + compName=words[0] + # Ask for parameters of source + if compName[0]=='v' or compName=='i': + # Find the index component from circuit + index=schematicInfo.index(compline) + #schematicInfo.remove(compline) + if words[3]=="pulse": + Title="Add parameters for pulse source "+compName + v1=' Enter initial value(Volts/Amps): ' + v2=' Enter pulsed value(Volts/Amps): ' + td=' Enter delay time (seconds): ' + tr=' Enter rise time (seconds): ' + tf=' Enter fall time (seconds): ' + pw=' Enter pulse width (seconds): ' + tp=' Enter period (seconds): ' + sourcelist.append([index,compline,words[3],Title,v1,v2,td,tr,tf,pw,tp]) + + elif words[3]=="sine": + Title="Add parameters for sine source "+compName + vo=' Enter offset value (Volts/Amps): ' + va=' Enter amplitude (Volts/Amps): ' + freq=' Enter frequency (Hz): ' + td=' Enter delay time (seconds): ' + theta=' Enter damping factor (1/seconds): ' + sourcelist.append([index,compline,words[3],Title,vo,va,freq,td,theta]) + + elif words[3]=="pwl": + Title="Add parameters for pwl source"+compName + t_v=' Enter in pwl format without bracket i.e t1 v1 t2 v2.... ' + sourcelist.append([index,compline,words[3],Title,t_v]) + + elif words[3]=="ac": + Title="Add parameters for ac source "+compName + v_a=' Enter amplitude (Volts/Amps): ' + sourcelist.append([index,compline,words[3],Title,v_a]) + + elif words[3]=="exp": + Title="Add parameters for exponential source "+compName + v1=' Enter initial value(Volts/Amps): ' + v2=' Enter pulsed value(Volts/Amps): ' + td1=' Enter rise delay time (seconds): ' + tau1=' Enter rise time constant (seconds): ' + td2=' Enter fall time (seconds): ' + tau2=' Enter fall time constant (seconds): ' + sourcelist.append([index,compline,words[3],Title,v1,v2,td1,tau1,td2,tau2]) + + elif words[3]=="dc": + Title="Add parameters for DC source "+compName + v1=' Enter value(Volts/Amps): ' + v2=' Enter zero frequency: ' + sourcelist.append([index,compline,words[3],Title,v1,v2]) + #schematicInfo.insert(index,compline) + + elif compName[0]=='h' or compName[0]=='f': + # Find the index component from the circuit + index=schematicInfo.index(compline) + schematicInfo.remove(compline) + schematicInfo.insert(index,"* "+compName) + schematicInfo1.append("V"+compName+" "+words[3]+" "+words[4]+" 0") + schematicInfo1.append(compName+" "+words[1]+" "+words[2]+" "+"V"+compName+" "+words[5]) + schematicInfo=schematicInfo+schematicInfo1 + print sourcelist + print schematicInfo + return schematicInfo,sourcelist + + +def createrootwindow(sourcelist,sourcelisttrack): + global frame + global canvas + global root_window + global window_height + global window_width + root_window=Tk() + window_width=700 + window_height=500 + canvas=Canvas(root_window,bg='#FFFFFF',width=window_width,height=window_height,scrollregion=(0,0,800,800)) + hbar=Scrollbar(root_window,orient=HORIZONTAL) + hbar.pack(side=BOTTOM,fill=X) + hbar.config(command=canvas.xview) + vbar=Scrollbar(root_window,orient=VERTICAL) + vbar.pack(side=RIGHT,fill=Y) + vbar.config(command=canvas.yview) + canvas.config(width=window_width,height=window_height) + canvas.config(xscrollcommand=hbar.set, yscrollcommand=vbar.set) + canvas.pack(side=LEFT,expand=True,fill=BOTH) + # make the canvas expandable + root_window.grid_rowconfigure(0, weight=1) + root_window.grid_columnconfigure(0, weight=1) + frame=Frame(canvas,height=window_height,width=window_width) + buttonframe=Frame(frame) + #Addbutton=Button(buttonframe,text='Add',command=AddSourceValue) + Nextbutton=Button(buttonframe,text='Next',command=NextPage) + Clearbutton=Button(buttonframe,text='Clear',command=ClearSourceValue) + global count + count=0 + global entry_var + entry_var={} + ##Checking if source is present" + if sourcelist: + for line in sourcelist: + print "Voltage source line index: ",line[0] + print "SourceList line Test: ",line + track_id=line[0] + if line[2]=='sine': + entry_var[count]=StringVar() + label=Label(frame,text=line[3],font=('Times', 15),anchor=CENTER,bg="Red") + label.grid(row=count,column=1,ipadx=5,ipady=5,padx=5,pady=5) + count=count+1 + start=count + entry_var[count]=StringVar() + label=Label(frame,text=line[4]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[5]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[6]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[7]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[8]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + end=count + count=count+1 + sourcelisttrack.append([track_id,'sine',start,end]) + + elif line[2]=='pulse': + entry_var[count]=StringVar() + label=Label(frame,text=line[3],font=('Times', 15),anchor=CENTER,bg="Red") + label.grid(row=count,column=1,ipadx=5,ipady=5,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + start=count + label=Label(frame,text=line[4]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[5]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[6]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[7]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[8]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[9]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[10]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + end=count + count=count+1 + sourcelisttrack.append([track_id,'pulse',start,end]) + + elif line[2]=='pwl': + entry_var[count]=StringVar() + label=Label(frame,text=line[3],font=('Times',15),anchor=CENTER,bg="Red") + label.grid(row=count,column=1,ipadx=5,ipady=5,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + start=count + label=Label(frame,text=line[4]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + end=count + count=count+1 + sourcelisttrack.append([track_id,'pwl',start,end]) + + + elif line[2]=='ac': + entry_var[count]=StringVar() + label=Label(frame,text=line[3],font=('Times', 15),anchor=CENTER,bg="Red") + label.grid(row=count,column=1,ipadx=5,ipady=5,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + start=count + label=Label(frame,text=line[4]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + end=count + count=count+1 + sourcelisttrack.append([track_id,'ac',start,end]) + + elif line[2]=='dc': + entry_var[count]=StringVar() + label=Label(frame,text=line[3],font=('Times', 15),anchor=CENTER,bg="Red") + label.grid(row=count,column=1,ipadx=5,ipady=5,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + start=count + label=Label(frame,text=line[4]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + end=count + count=count+1 + sourcelisttrack.append([track_id,'dc',start,end]) + + elif line[2]=='exp': + entry_var[count]=StringVar() + label=Label(frame,text=line[3],font=('Times', 15),anchor=CENTER,bg="Red") + label.grid(row=count,column=1,ipadx=5,ipady=5,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + start=count + label=Label(frame,text=line[4]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[5]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[6]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[7]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[8]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + count=count+1 + entry_var[count]=StringVar() + label=Label(frame,text=line[9]) + label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(frame,width=10,textvariable=entry_var[count]) + entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) + end=count + count=count+1 + sourcelisttrack.append([track_id,'exp',start,end]) + else: + print "No source is present in your circuit" + tkMessageBox.showinfo("Source List Info","There is no source in your circuit,Please click next button") + + + frame.grid() + buttonframe.grid() + #Addbutton.grid(row=count,column=1,padx=5,pady=5) + Nextbutton.grid(row=count,column=2,padx=5,pady=5) + Clearbutton.grid(row=count,column=3,padx=5,pady=5) + canvas.create_window(0, 0, anchor=NW, window=frame) + frame.update_idletasks() + canvas.config(scrollregion=canvas.bbox("all")) + #frame.mainloop() + root_window.title("Add Source and Model Parameter") + root_window.mainloop() + return sourcelist,sourcelisttrack + + + +def AddSourceValue(): + print "Add Source Value" + global sourcelistvalue + sourcelistvalue=[] + global start + global end + start=0 + end=0 + print "Track Source List :",sourcelisttrack + print "Initial Source List Value :",sourcelistvalue + for compline in sourcelisttrack: + index=compline[0] + addline=schematicInfo[index] + + if compline[1]=='sine': + try: + start=compline[2] + end=compline[3] + vo_val=entry_var[start].get() + va_val=entry_var[start+1].get() + freq_val=entry_var[start+2].get() + td_val=entry_var[start+3].get() + theta_val=entry_var[end].get() + addline=addline.partition('(')[0] + "("+vo_val+" "+va_val+" "+freq_val+" "+td_val+" "+theta_val+")" + print "Line Added ",addline + sourcelistvalue.append([index,addline]) + except: + print "Caught an exception in sine voltage source ",addline + + elif compline[1]=='pulse': + try: + start=compline[2] + end=compline[3] + v1_val=entry_var[start].get() + v2_val=entry_var[start+1].get() + td_val=entry_var[start+2].get() + tr_val=entry_var[start+3].get() + tf_val=entry_var[start+4].get() + pw_val=entry_var[start+5].get() + tp_val=entry_var[end].get() + addline=addline.partition('(')[0] + "("+v1_val+" "+v2_val+" "+td_val+" "+tr_val+" "+tf_val+" "+pw_val+" "+tp_val+")" + print "Line Added ",addline + sourcelistvalue.append([index,addline]) + except: + print "Caught an exception in pulse voltage source ",addline + + elif compline[1]=='pwl': + try: + start=compline[2] + t_v_val=entry_var[start].get() + addline=addline.partition('(')[0] + "("+t_v_val+")" + print "Line Added ",addline + sourcelistvalue.append([index,addline]) + except: + print "Caught an exception in pwl voltage source ",addline + + elif compline[1]=='ac': + try: + start=compline[2] + va_val=entry_var[start].get() + addline=' '.join(addline.split()) + addline=addline.partition('ac')[0] +" "+'ac'+" "+ va_val + print "Line Added ",addline + sourcelistvalue.append([index,addline]) + except: + print "Caught an exception in ac voltage source ",addline + + elif compline[1]=='dc': + try: + start=compline[2] + v1_val=entry_var[start].get() + addline=' '.join(addline.split()) + addline=addline.partition('dc')[0] + " " +'dc'+ " "+v1_val + print "Line Added ",addline + sourcelistvalue.append([index,addline]) + except: + print "Caught an exception in dc voltage source",addline + + elif compline[1]=='exp': + try: + start=compline[2] + end=compline[3] + v1_val=entry_var[start].get() + v2_val=entry_var[start+1].get() + td1_val=entry_var[start+2].get() + tau1_val=entry_var[start+3].get() + td2_val=entry_var[start+4].get() + tau2_val=entry_var[end].get() + addline=addline.partition('(')[0] + "("+v1_val+" "+v2_val+" "+td1_val+" "+tau1_val+" "+td2_val+" "+tau2_val+")" + print "Line Added ",addline + sourcelistvalue.append([index,addline]) + except: + print "Caught an exception in exp voltage source ",addline + print "Final Source List Value :",sourcelistvalue + ##Adding into schematicInfo + for item in sourcelistvalue: + del schematicInfo[item[0]] + schematicInfo.insert(item[0],item[1]) + + + +def NextPage(): + print "Next Page" + AddSourceValue() + ##Destroying Frame + frame.destroy() + #frame.grid_forget() + global schematicInfo + global outputOption + global guimodelvalue + global guimodellisttrack + global guimodellist + guimodelvalue=[] + guimodellisttrack=[] + guimodellist=['adc8','dac8','gain','summer','multiplier','divider','limit','integrator','differentiator','limit8','controlledlimiter', +'analogswitch','zener','d_buffer','d_inverter','d_and','d_nand','d_or','d_nor','d_xor','d_xnor','d_tristate','d_pullup', +'d_pulldown','d_srlatch','d_jklatch','d_dlatch','d_tlatch','d_srff','d_jkff','d_dff','ic'] + + ##Calling function which take information for entry and label + schematicInfo,outputOption,guimodelvalue=convertICintoBasicBlocks(schematicInfo,outputOption,guimodelvalue) + + #Creating Frame and buttons for next page + nextframe=Frame(canvas,height=window_height,width=window_width) + nextbuttonframe=Frame(nextframe) + #Addbutton=Button(nextbuttonframe,text='Add',command=AddModelParametr) + Submitbutton=Button(nextbuttonframe,text='Submit & Exit',command=Submit) + Clearbutton=Button(nextbuttonframe,text='Clear',command=ClearModelParamValue) + global nextcount + nextcount=0 + global nextentry_var + nextentry_var={} + + + ##Checking if any model is present + if guimodelvalue: + ## Calling Next frame generation function + for line in guimodelvalue: + if line[2] in guimodellist: + print "ConvertICBlock index :",line[0] + nextcount=nextframegeneration(nextframe,line,nextentry_var,nextcount) + else: + print "Please look whether model is added in guimodellist inside code" + else: + print "There is no model in your circuit" + AddModelParametr() + tkMessageBox.showinfo("Model List Info","There is no model in your circuit, please click on Submit & Exit Button" ) + + + """ + for line in guimodelvalue: + print "ConvertICBlock index :",line[0] + nextcount=nextframegeneration(nextframe,line,nextentry_var,nextcount) + if line[2]=='adc8': + nextcount=nextframegeneration(nextframe,line,nextentry_var,nextcount) + + nextentry_var[nextcount]=StringVar() + label=Label(nextframe,text=line[5],font=('Times', 15),anchor=CENTER,bg="Red") + label.grid(row=nextcount,column=1,ipadx=5,ipady=5,padx=5,pady=5) + nextcount=nextcount+1 + start=nextcount + for item in range(len(line)-6): + nextentry_var[nextcount]=StringVar() + label=Label(nextframe,text=line[6+item]) + label.grid(row=nextcount,column=0,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(nextframe,width=10,textvariable=nextentry_var[nextcount]) + entry.grid(row=nextcount,column=1,sticky=W+E+N+S,padx=5,pady=5) + nextcount=nextcount+1 + end=nextcount-1 + guimodellisttrack.append([line[0],line[1],line[2],line[3],line[4],start,end]) + + else: + print "Please check whether model is available or not" + """ + nextframe.grid() + nextbuttonframe.grid() + #Addbutton.grid(row=nextcount,column=1,padx=5,pady=5) + Submitbutton.grid(row=nextcount,column=2,padx=5,pady=5) + Clearbutton.grid(row=nextcount,column=3,padx=5,pady=5) + canvas.create_window(0, 0, anchor=NW, window=nextframe) + nextframe.update_idletasks() + canvas.config(scrollregion=canvas.bbox("all")) + + + + +def nextframegeneration(nextframe,line,nextentry_var,nextcount): + print "Model Line in netlist is : ",line[1] + nextentry_var[nextcount]=StringVar() + label=Label(nextframe,text=line[5],font=('Times', 14),anchor=CENTER,bg="Red") + label.grid(row=nextcount,column=1,ipadx=5,ipady=5,padx=5,pady=5) + nextcount=nextcount+1 + start=nextcount + if line[2]=='ic': + for item in range(len(line)-7): + nextentry_var[nextcount]=StringVar() + label=Label(nextframe,text=line[7+item]) + label.grid(row=nextcount,column=0,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(nextframe,width=10,textvariable=nextentry_var[nextcount]) + entry.grid(row=nextcount,column=1,sticky=W+E+N+S,padx=5,pady=5) + nextcount=nextcount+1 + end=nextcount-1 + guimodellisttrack.append([line[0],line[1],line[2],line[3],line[4],start,end,line[6]]) + else: + for item in range(len(line)-6): + nextentry_var[nextcount]=StringVar() + label=Label(nextframe,text=line[6+item]) + label.grid(row=nextcount,column=0,sticky=W+E+N+S,padx=5,pady=5) + entry=Entry(nextframe,width=10,textvariable=nextentry_var[nextcount]) + entry.grid(row=nextcount,column=1,sticky=W+E+N+S,padx=5,pady=5) + nextcount=nextcount+1 + end=nextcount-1 + guimodellisttrack.append([line[0],line[1],line[2],line[3],line[4],start,end]) + return nextcount + +def AddModelParametr(): + print "Adding Model Parameter" + print "GuiModelValue",guimodelvalue + global guimodellisttrack + global modelparamvalue + global addmodelline + modelparamvalue=[] + addmodelline=[] + + for line in guimodellisttrack: + print "GUI MODEL LIST TRACK",line + if line[2]=='adc8': + try: + start=line[5] + end=line[6] + in_low=nextentry_var[start].get() + in_high=nextentry_var[end].get() + if in_low=="": in_low="0.8" + if in_high=="": in_high="2.0" + addmodelline=".model "+ line[3]+" adc_bridge(in_low="+in_low+" in_high="+in_high+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in adc8 model ",line[1] + + elif line[2]=='dac8': + try: + start=line[5] + end=line[6] + out_low=nextentry_var[start].get() + out_high=nextentry_var[start+1].get() + out_undef=nextentry_var[end].get() + if out_low=="": out_low="0.2" + if out_high=="": out_high="5.0" + if out_undef=="": out_undef="5.0" + addmodelline=".model "+ line[3]+" dac_bridge(out_low="+out_low+" out_high="+out_high+" out_undef="+out_undef+" )" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in dac8 model ",line[1] + + elif line[2]=='gain': + try: + start=line[5] + end=line[6] + in_offset=nextentry_var[start].get() + gain=nextentry_var[start+1].get() + out_offset=nextentry_var[end].get() + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + if out_offset=="": out_offset="0.0" + addmodelline=".model "+ line[3]+" gain(in_offset="+in_offset+" out_offset="+out_offset+" gain="+gain+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in gain model ",line[1] + + elif line[2]=='summer': + try: + start=line[5] + end=line[6] + in1_offset=nextentry_var[start].get() + in2_offset=nextentry_var[start+1].get() + in1_gain=nextentry_var[start+2].get() + in2_gain=nextentry_var[start+3].get() + out_gain=nextentry_var[start+4].get() + out_offset=nextentry_var[end].get() + if in1_offset=="": in1_offset="0.0" + if in2_offset=="": in2_offset="0.0" + if in1_gain=="": in1_gain="1.0" + if in2_gain=="": in2_gain="1.0" + if out_gain=="": out_gain="1.0" + if out_offset=="": out_offset="0.0" + addmodelline=".model "+ line[3]+" summer(in_offset=["+in1_offset+" "+in2_offset+"] in_gain=["+in1_gain+" "+in2_gain+"] out_offset="+out_offset+" out_gain="+out_gain+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in summer model ",line[1] + + elif line[2]=='multiplier': + try: + start=line[5] + end=line[6] + in1_offset=nextentry_var[start].get() + in2_offset=nextentry_var[start+1].get() + in1_gain=nextentry_var[start+2].get() + in2_gain=nextentry_var[start+3].get() + out_gain=nextentry_var[start+4].get() + out_offset=nextentry_var[end].get() + if in1_offset=="": in1_offset="0.0" + if in2_offset=="": in2_offset="0.0" + if in1_gain=="": in1_gain="1.0" + if in2_gain=="": in2_gain="1.0" + if out_gain=="": out_gain="1.0" + if out_offset=="": out_offset="0.0" + addmodelline=".model "+ line[3]+" mult(in_offset=["+in1_offset+" "+in2_offset+"] in_gain=["+in1_gain+" "+in2_gain+"] out_offset="+out_offset+" out_gain="+out_gain+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in multiplier model ",line[1] + + elif line[2]=='divider': + try: + start=line[5] + end=line[6] + num_offset=nextentry_var[start].get() + den_offset=nextentry_var[start+1].get() + num_gain=nextentry_var[start+2].get() + den_gain=nextentry_var[start+3].get() + out_gain=nextentry_var[start+4].get() + out_offset=nextentry_var[start+5].get() + den_lower_limit=nextentry_var[end].get() + if num_offset=="": num_offset="0.0" + if den_offset=="": den_offset="0.0" + if num_gain=="": num_gain="1.0" + if den_gain=="": den_gain="1.0" + if out_gain=="": out_gain="1.0" + if out_offset=="": out_offset="0.0" + if den_lower_limit=="": den_lower_limit="1.0e-10" + addmodelline=".model "+ line[3]+" divide(num_offset="+num_offset+" den_offset="+den_offset+" num_gain="+num_gain+" den_gain="+den_gain+" out_offset="+out_offset+" out_gain="+out_gain+" den_lower_limit="+den_lower_limit+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in divider model ",line[1] + + elif line[2]=='limit': + try: + start=line[5] + end=line[6] + lowerLimit=nextentry_var[start].get() + upperLimit=nextentry_var[start+1].get() + in_offset=nextentry_var[start+2].get() + gain=nextentry_var[end].get() + if lowerLimit=="": lowerLimit="0.0" + if upperLimit=="": upperLimit="5.0" + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + addmodelline=".model "+ line[3]+" limit(out_lower_limit="+lowerLimit+" out_upper_limit="+upperLimit+" in_offset="+in_offset+" gain="+gain+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in limit model ",line[1] + + elif line[2]=='integrator': + try: + start=line[5] + end=line[6] + out_lower_limit=nextentry_var[start].get() + out_upper_limit=nextentry_var[start+1].get() + in_offset=nextentry_var[start+2].get() + gain=nextentry_var[start+3].get() + out_ic=nextentry_var[end].get() + if out_lower_limit=="": out_lower_limit="0.0" + if out_upper_limit=="": out_upper_limit="5.0" + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + if out_ic=="": out_ic="0.0" + addmodelline=".model "+ line[3]+" int(out_lower_limit="+out_lower_limit+" out_upper_limit="+out_upper_limit+" in_offset="+in_offset+" gain="+gain+" out_ic="+out_ic+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in integrator model ",line[1] + + elif line[2]=='differentiator': + try: + start=line[5] + end=line[6] + out_lower_limit=nextentry_var[start].get() + out_upper_limit=nextentry_var[start+1].get() + out_offset=nextentry_var[start+2].get() + gain=nextentry_var[end].get() + if out_lower_limit=="": out_lower_limit="0.0" + if out_upper_limit=="": out_upper_limit="5.0" + if out_offset=="": out_offset="0.0" + if gain=="": gain="1.0" + addmodelline=".model "+ line[3]+" d_dt(out_lower_limit="+out_lower_limit+" out_upper_limit="+out_upper_limit+" out_offset="+out_offset+" gain="+gain+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in differentiator model ",line[1] + + elif line[2]=='limit8': + try: + start=line[5] + end=line[6] + lowerLimit=nextentry_var[start].get() + upperLimit=nextentry_var[start+1].get() + in_offset=nextentry_var[start+2].get() + gain=nextentry_var[end].get() + if lowerLimit=="": lowerLimit="0.0" + if upperLimit=="": upperLimit="5.0" + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + addmodelline=".model "+ line[3]+" limit(out_lower_limit="+lowerLimit+" out_upper_limit="+upperLimit+" in_offset="+in_offset+" gain="+gain+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in limit8 model ",line[1] + + elif line[2]=='controlledlimiter': + try: + start=line[5] + end=line[6] + in_offset=nextentry_var[start].get() + gain=nextentry_var[end].get() + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + addmodelline=".model "+ line[3]+" climit(in_offset="+in_offset+" gain="+gain+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in controlledlimiter model ",line[1] + + elif line[2]=='analogswitch': + try: + start=line[5] + end=line[6] + cntl_on=nextentry_var[start].get() + cntl_off=nextentry_var[start+1].get() + r_on=nextentry_var[start+2].get() + r_off=nextentry_var[end].get() + if cntl_on=="": cntl_on="5.0" + if cntl_off=="": cntl_off="0.0" + if r_on=="": r_on="10.0" + if r_off=="": r_off="1e6" + addmodelline=".model "+ line[3]+" aswitch(cntl_on="+cntl_on+" cntl_off="+cntl_off+" r_on="+r_on+" r_off="+r_off+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in analogswitch model ",line[1] + + elif line[2]=='zener': + try: + start=line[5] + end=line[6] + v_breakdown=nextentry_var[start].get() + i_breakdown=nextentry_var[start+1].get() + i_sat=nextentry_var[start+2].get() + n_forward=nextentry_var[end].get() + if v_breakdown=="": v_breakdown="5.6" + if i_breakdown=="": i_breakdown="1.0e-2" + if i_sat=="": i_sat="1.0e-12" + if n_forward=="": n_forward="1.0" + addmodelline=".model "+ line[3]+" zener(v_breakdown="+v_breakdown+" i_breakdown="+i_breakdown+" i_sat="+i_sat+" n_forward="+n_forward+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in zener model ",line[1] + + elif line[2]=='d_buffer': + try: + start=line[5] + end=line[6] + rise_delay=nextentry_var[start].get() + fall_delay=nextentry_var[start+1].get() + input_load=nextentry_var[end].get() + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_buffer(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_buffer model ",line[1] + + elif line[2]=='d_inverter': + try: + start=line[5] + end=line[6] + rise_delay=nextentry_var[start].get() + fall_delay=nextentry_var[start+1].get() + input_load=nextentry_var[end].get() + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_inverter(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_inverter model ",line[1] + + elif line[2]=='d_and': + try: + start=line[5] + end=line[6] + rise_delay=nextentry_var[start].get() + fall_delay=nextentry_var[start+1].get() + input_load=nextentry_var[end].get() + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_and(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_and model ",line[1] + + elif line[2]=='d_nand': + try: + start=line[5] + end=line[6] + rise_delay=nextentry_var[start].get() + fall_delay=nextentry_var[start+1].get() + input_load=nextentry_var[end].get() + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_nand(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_nand model ",line[1] + + elif line[2]=='d_or': + try: + start=line[5] + end=line[6] + rise_delay=nextentry_var[start].get() + fall_delay=nextentry_var[start+1].get() + input_load=nextentry_var[end].get() + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_or(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_or model ",line[1] + + elif line[2]=='d_nor': + try: + start=line[5] + end=line[6] + rise_delay=nextentry_var[start].get() + fall_delay=nextentry_var[start+1].get() + input_load=nextentry_var[end].get() + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_nor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_nor model ",line[1] + + elif line[2]=='d_xor': + try: + start=line[5] + end=line[6] + rise_delay=nextentry_var[start].get() + fall_delay=nextentry_var[start+1].get() + input_load=nextentry_var[end].get() + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_xor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_xor model ",line[1] + + elif line[2]=='d_xnor': + try: + start=line[5] + end=line[6] + rise_delay=nextentry_var[start].get() + fall_delay=nextentry_var[start+1].get() + input_load=nextentry_var[end].get() + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + addmodelline=".model "+ line[3]+" d_xnor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_xnor model ",line[1] + + elif line[2]=='d_tristate': + try: + start=line[5] + end=line[6] + delay=nextentry_var[start].get() + input_load=nextentry_var[start+1].get() + enable_load=nextentry_var[end].get() + if delay=="": delay="1e-12" + if input_load=="": input_load="1e-12" + if enable_load=="": enable_load="1e-12" + addmodelline=".model "+ line[3]+" d_tristate(delay="+delay+" enable_load="+enable_load+" input_load="+input_load+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_tristate model ",line[1] + + elif line[2]=='d_pullup': + try: + start=line[5] + end=line[6] + load=nextentry_var[start].get() + if load=="": load="1e-12" + addmodelline=".model "+ line[3]+" d_pullup(load="+load+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_pullup model ",line[1] + + elif line[2]=='d_pulldown': + try: + start=line[5] + end=line[6] + load=nextentry_var[start].get() + if load=="": load="1e-12" + addmodelline=".model "+ line[3]+" d_pulldown(load="+load+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_pulldown model ",line[1] + + elif line[2]=='d_srlatch': + try: + start=line[5] + end=line[6] + sr_delay=nextentry_var[start].get() + enable_delay=nextentry_var[start+1].get() + set_delay=nextentry_var[start+2].get() + reset_delay=nextentry_var[start+3].get() + ic=nextentry_var[start+4].get() + sr_load=nextentry_var[start+5].get() + enable_load=nextentry_var[start+6].get() + set_load=nextentry_var[start+7].get() + reset_load=nextentry_var[start+8].get() + rise_delay=nextentry_var[start+9].get() + fall_delay=nextentry_var[end].get() + if sr_delay=="": sr_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if sr_load=="": sr_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_srlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+sr_load="+sr_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+sr_delay="+sr_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_srlatch model ",line[1] + + elif line[2]=='d_jklatch': + try: + start=line[5] + end=line[6] + jk_delay=nextentry_var[start].get() + enable_delay=nextentry_var[start+1].get() + set_delay=nextentry_var[start+2].get() + reset_delay=nextentry_var[start+3].get() + ic=nextentry_var[start+4].get() + jk_load=nextentry_var[start+5].get() + enable_load=nextentry_var[start+6].get() + set_load=nextentry_var[start+7].get() + reset_load=nextentry_var[start+8].get() + rise_delay=nextentry_var[start+9].get() + fall_delay=nextentry_var[end].get() + if jk_delay=="": jk_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if jk_load=="": jk_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_jklatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+jk_load="+jk_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+jk_delay="+jk_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_jklatch model ",line[1] + + elif line[2]=='d_dlatch': + try: + start=line[5] + end=line[6] + data_delay=nextentry_var[start].get() + enable_delay=nextentry_var[start+1].get() + set_delay=nextentry_var[start+2].get() + reset_delay=nextentry_var[start+3].get() + ic=nextentry_var[start+4].get() + data_load=nextentry_var[start+5].get() + enable_load=nextentry_var[start+6].get() + set_load=nextentry_var[start+7].get() + reset_load=nextentry_var[start+8].get() + rise_delay=nextentry_var[start+9].get() + fall_delay=nextentry_var[end].get() + if data_delay=="": data_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if data_load=="": data_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_dlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+data_load="+data_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+data_delay="+data_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_dlatch model ",line[1] + + elif line[2]=='d_tlatch': + try: + start=line[5] + end=line[6] + t_delay=nextentry_var[start].get() + enable_delay=nextentry_var[start+1].get() + set_delay=nextentry_var[start+2].get() + reset_delay=nextentry_var[start+3].get() + ic=nextentry_var[start+4].get() + t_load=nextentry_var[start+5].get() + enable_load=nextentry_var[start+6].get() + set_load=nextentry_var[start+7].get() + reset_load=nextentry_var[start+8].get() + rise_delay=nextentry_var[start+9].get() + fall_delay=nextentry_var[end].get() + if t_delay=="": t_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if t_load=="": t_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_tlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+t_load="+t_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+t_delay="+t_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_tlatch model ",line[1] + + elif line[2]=='d_srff': + try: + start=line[5] + end=line[6] + clk_delay=nextentry_var[start].get() + set_delay=nextentry_var[start].get() + reset_delay=nextentry_var[start].get() + ic=nextentry_var[start].get() + sr_load=nextentry_var[start].get() + clk_load=nextentry_var[start].get() + set_load=nextentry_var[start].get() + reset_load=nextentry_var[start].get() + rise_delay=nextentry_var[start].get() + fall_delay=nextentry_var[start].get() + if clk_delay=="": clk_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if sr_load=="": sr_load="1e-12" + if clk_load=="": clk_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_srff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+sr_load="+sr_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_srff model ",line[1] + + elif line[2]=='d_jkff': + try: + start=line[5] + end=line[6] + clk_delay=nextentry_var[start].get() + set_delay=nextentry_var[start].get() + reset_delay=nextentry_var[start].get() + ic=nextentry_var[start].get() + jk_load=nextentry_var[start].get() + clk_load=nextentry_var[start].get() + set_load=nextentry_var[start].get() + reset_load=nextentry_var[start].get() + rise_delay=nextentry_var[start].get() + fall_delay=nextentry_var[start].get() + if clk_delay=="": clk_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if jk_load=="": sr_load="1e-12" + if clk_load=="": clk_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_jkff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+jk_load="+jk_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_jkff model ",line[1] + + elif line[2]=='d_dff': + try: + start=line[5] + end=line[6] + clk_delay=nextentry_var[start].get() + set_delay=nextentry_var[start+1].get() + reset_delay=nextentry_var[start+2].get() + ic=nextentry_var[start+3].get() + data_load=nextentry_var[start+4].get() + clk_load=nextentry_var[start+5].get() + set_load=nextentry_var[start+6].get() + reset_load=nextentry_var[start+7].get() + rise_delay=nextentry_var[start+8].get() + fall_delay=nextentry_var[end].get() + if clk_delay=="": clk_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if data_load=="": data_load="1e-12" + if clk_load=="": clk_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_dff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+data_load="+data_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_dff model ",line[1] + + elif line[2]=='d_tff': + try: + start=line[5] + end=line[6] + clk_delay=nextentry_var[start].get() + set_delay=nextentry_var[start+1].get() + reset_delay=nextentry_var[start+2].get() + ic=nextentry_var[start+3].get() + t_load=nextentry_var[start+4].get() + clk_load=nextentry_var[start+5].get() + set_load=nextentry_var[start+6].get() + reset_load=nextentry_var[start+7].get() + rise_delay=nextentry_var[start+8].get() + fall_delay=nextentry_var[end].get() + if t_delay=="": t_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if t_load=="": t_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + addmodelline=".model "+ line[3]+" d_tff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+t_load="+t_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in d_tff model ",line[1] + + elif line[2]=='ic': + try: + start=line[5] + end=line[6] + ic=nextentry_var[start].get() + if ic=="": ic="0" + addmodelline=".ic v("+line[7]+")="+ic + modelparamvalue.append([line[0],addmodelline,line[4]]) + except: + print "Caught an exception in ic initial condition ",line[1] + + else: + print "No model found" + #tkMessageBox.showinfo("Model Info","Please check whether used model is available inside code") + + print "Model List has been added",modelparamvalue + + +def ClearSourceValue(): + print "Clear Source Value" + for line in sourcelisttrack: + start=line[2] + end=line[3] + count=start + for item in range(int(end-start+1)): + entry_var[count].set("") + count=count+1 + +def ClearModelParamValue(): + print "Clear Model Parameter value" + for line in guimodellisttrack: + print "line",line + start=line[5] + end=line[6] + count=start + for item in range(end-start+1): + nextentry_var[count].set("") + count=count+1 + + +def Submit(): + print "Submit button" + try: + AddModelParametr() #Adding Model Parameter + for item in modelparamvalue: + schematicInfo.append(item[2]) #Adding Comment line + schematicInfo.append(item[1]) #Adding Model line + print "Successfully Closed" + root_window.quit() + except: + tkMessageBox.showinfo("Exception","Please Add before Submit") + + + +def convertICintoBasicBlocks(schematicInfo,outputOption,guimodelvalue): + #Insert Special source parameters + k=1 + for compline in schematicInfo: + words=compline.split() + compName=words[0] + # Find the IC from schematic + if compName[0]=='u': + # Find the component from the circuit + index=schematicInfo.index(compline) + compType=words[len(words)-1]; + schematicInfo.remove(compline) + + if (compType=="7404" or compType=="74hc04" or compType=="74hct04" or compType=="74ls04" or compType=="74ls14"): + i=1; + # Add first three Not gates + while words[i]!="0": + # Add analog to digital converter for input A + schematicInfo.append("a"+str(k)+" ["+words[i]+"] ["+words[i]+"_in] "+" "+compName+"adc") + k=k+1 + # Add Not gate + schematicInfo.append("a"+str(k)+" "+words[i]+"_in "+words[i+1]+"_out "+compName) + k=k+1 + # Add digital to analog converter for output B + schematicInfo.append("a"+str(k)+" ["+words[i+1]+"_out] ["+words[i+1]+"] "+" "+compName+"dac") + k=k+1 + i=i+2 + i=i+1 + # Add last three Not gates + while i11: + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[12]+" "+words[11]+" "+words[10]+" "+words[13]+"] ["+words[12]+"_in "+words[11]+"_in "+words[10]+"_in "+words[13]+"_in] "+compName+"adc") + k=k+1 + # Add D Flip-flop + schematicInfo.append("a"+str(k)+" "+words[12]+"_in "+words[11]+"_in ~"+words[10]+"_in ~"+words[13]+"_in "+words[9]+"_out "+words[8]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[9]+"_out "+words[8]+"_out] ["+words[9]+" "+words[8]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for D Flip-Flop + schematicInfo.append(".model "+ compName+" d_dff") + # Add model for analog-to-digital bridge + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="7475" or compType=="74hc75" or compType=="74ls75"): + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[1]+"_in] "+compName+"adc") + k=k+1 + # Add T Flip-flop + schematicInfo.append("a"+str(k)+" "+words[2]+"_in "+words[3]+"_in ~"+words[4]+"_in ~"+words[1]+"_in "+words[5]+"_out "+words[6]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[5]+"_out "+words[6]+"_out] ["+words[5]+" "+words[6]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for T Flip-Flop + schematicInfo.append(".model "+ compName+" d_tff") + # Add model for analog-to-digital bridge + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="74107" or compType=="74hc107" or compType=="74ls107"): + if len(words)>11: + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[4]+" "+words[12]+" "+words[13]+"] ["+words[1]+"_in "+words[4]+"_in "+words[12]+"_in "+words[13]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[1]+"_in "+words[4]+"_in ~"+words[12]+"_in ~"+words[13]+"_in ~"+words[13]+"_in "+words[3]+"_out "+words[2]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[3]+"_out "+words[2]+"_out] ["+words[3]+" "+words[2]+"] "+" "+compName+"dac") + k=k+1 + + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[8]+" "+words[11]+" "+words[9]+" "+words[10]+"] ["+words[8]+"_in "+words[11]+"_in "+words[9]+"_in "+words[10]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[8]+"_in "+words[11]+"_in ~"+words[9]+"_in ~"+words[10]+"_in ~"+words[10]+"_in "+words[5]+"_out "+words[6]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[5]+"_out "+words[6]+"_out] ["+words[5]+" "+words[6]+"] "+" "+compName+"dac") + k=k+1 + else: + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[4]+" "+words[12]+" "+words[13]+"] ["+words[1]+"_in "+words[4]+"_in "+words[12]+"_in "+words[13]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[1]+"_in "+words[4]+"_in ~"+words[12]+"_in ~"+words[13]+"_in ~"+words[13]+"_in "+words[3]+"_out "+words[2]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[3]+"_out "+words[2]+"_out] ["+words[3]+" "+words[2]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for JK Flip-Flop + schematicInfo.append(".model "+ compName+" d_jkff") + # Add model for analog-to-digital bridge + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="74109" or compType=="74hc109" or compType=="74ls109"): + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[5]+"_in "+words[1]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[2]+"_in ~"+words[3]+"_in "+words[4]+"_in ~"+words[5]+"_in ~"+words[1]+"_in "+words[6]+"_out "+words[7]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[6]+"_out "+words[7]+"_out] ["+words[6]+" "+words[7]+"] "+" "+compName+"dac") + k=k+1 + if len(words)>12: + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[14]+" "+words[13]+" "+words[12]+" "+words[11]+" "+words[15]+"] ["+words[14]+"_in "+words[13]+"_in "+words[12]+"_in "+words[11]+"_in "+words[15]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[14]+"_in ~"+words[13]+"_in "+words[12]+"_in ~"+words[11]+"_in ~"+words[15]+"_in "+words[10]+"_out "+words[9]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[10]+"_out "+words[9]+"_out] ["+words[10]+" "+words[9]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for JK Flip-Flop + schematicInfo.append(".model "+ compName+" d_jkff") + # Add model for analog-to-digital bridge + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="7471" or compType=="74hc71" or compType=="74ls71"): + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[5]+"_in "+words[1]+"_in] "+compName+"adc") + k=k+1 + # Add S-R Flip-flop + schematicInfo.append("a"+str(k)+" "+words[2]+"_in ~"+words[3]+"_in "+words[4]+"_in ~"+words[5]+"_in ~"+words[1]+"_in "+words[6]+"_out "+words[7]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[6]+"_out "+words[7]+"_out] ["+words[6]+" "+words[7]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for SR Flip-Flop + schematicInfo.append(".model "+ compName+" d_srff") + # Add model for analog-to-digital bridge741 + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="74112" or compType=="74hc112" or compType=="74ls112"): + if len(words)>12: + schematicInfo.append("a"+str(k)+" "+words[3]+" "+words[2]+" ~"+words[1]+" ~"+words[4]+" ~"+words[15]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + schematicInfo.append("a"+str(k)+" "+words[11]+" "+words[12]+" ~"+words[13]+" ~"+words[10]+" ~"+words[14]+" "+words[9]+" "+words[7]+" "+compName) + k=k+1 + else: + schematicInfo.append("a"+str(k)+" "+words[3]+" "+words[2]+" ~"+words[1]+" ~"+words[4]+" ~"+words[8]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* "+compType) + schematicInfo.append(".model "+ compName+" d_jkff") + elif compType=="dac": + schematicInfo.append("a"+str(k)+" ["+words[1]+"] ["+words[2]+"] "+compName) + k=k+1 + schematicInfo.insert(index,"* Digital to Analog converter "+compType) + schematicInfo.append(".model "+ compName+" dac_bridge") + elif compType=="adc": + schematicInfo.append("a"+str(k)+" ["+words[1]+"] ["+words[2]+"] "+compName) + k=k+1 + schematicInfo.insert(index,"* Analog to Digital converter "+compType) + schematicInfo.append(".model "+ compName+" adc_bridge") + elif compType=="adc8": + for i in range(0,len(words)/2-1): + schematicInfo.append("a"+str(k)+" ["+words[i+1]+"] ["+words[i+len(words)/2]+"] "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Analog to Digital Converter" + Comment='* Analog to Digital converter '+compType + Title='Add parameters for analog to digital converter '+compName + in_low=' Enter input low level voltage (default=0.8): ' + in_high=' Enter input high level voltage (default=2.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,in_low,in_high]) + elif compType=="dac8": + for i in range(0,len(words)/2-1): + schematicInfo.append("a"+str(k)+" ["+words[i+1]+"] ["+words[i+len(words)/2]+"] "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Digital to Analog converter" + Comment='* Digital to Analog converter '+compType + Title='Add parameters for digital to analog converter '+compName + out_low=' Enter output low level voltage (default=0.2): ' + out_high=' Enter output high level voltage (default=5.0): ' + out_undef=' Enter output for undefined voltage level (default=2.2): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,out_low,out_high,out_undef]) + elif compType=="gain": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Gain" + Comment='* Gain '+compType + Title='Add parameters for Gain '+compName + in_offset=' Enter offset for input (default=0.0): ' + gain=' Enter gain (default=1.0): ' + out_offset=' Enter offset for output (default=0.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,in_offset,gain,out_offset]) + elif compType=="summer": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding summer" + Comment='* Summer '+compType + Title='Add parameters for Summer '+compName + in1_offset=' Enter offset for input 1 (default=0.0): ' + in2_offset=' Enter offset for input 2 (default=0.0): ' + in1_gain=' Enter gain for input 1 (default=1.0): ' + in2_gain=' Enter gain for input 2 (default=1.0): ' + out_gain=' Enter gain for output (default=1.0): ' + out_offset=' Enter offset for output (default=0.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,in1_offset,in2_offset,in1_gain,in2_gain,out_gain,out_offset]) + elif compType=="multiplier": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Multiplier" + Comment='* Multiplier '+compType + Title='Add parameters for Multiplier '+compName + in1_offset=' Enter offset for input 1 (default=0.0): ' + in2_offset=' Enter offset for input 2 (default=0.0): ' + in1_gain=' Enter gain for input 1 (default=1.0): ' + in2_gain=' Enter gain for input 2 (default=1.0): ' + out_gain=' Enter gain for output (default=1.0): ' + out_offset=' Enter offset for output (default=0.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,in1_offset,in2_offset,in1_gain,in2_gain,out_gain,out_offset]) + elif compType=="divider": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Divider" + Comment='Divider '+compType + Title='Add parameters for Divider '+compName + num_offset=' Enter offset for numerator (default=0.0): ' + den_offset=' Enter offset for denominator (default=0.0): ' + num_gain=' Enter gain for numerator (default=1.0): ' + den_gain=' Enter gain for denominator (default=1.0): ' + out_gain=' Enter gain for output (default=1.0): ' + out_offset=' Enter offset for output (default=0.0): ' + den_lower_limit=' Enter lower limit for denominator value (default=1.0e-10): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,num_offset,den_offset,num_gain,den_gain,out_gain,out_offset,den_lower_limit]) + elif compType=="limit": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding limiter" + Comment='* Limiter '+compType + Title='Add parameters for Limiter '+compName + lowerLimit=' Enter out lower limit (default=0.0): ' + upperLimit=' Enter out upper limit (default=5.0): ' + in_offset=' Enter offset for input (default=0.0): ' + gain=' Enter gain (default=1.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,lowerLimit,upperLimit,in_offset,gain]) + elif compType=="integrator": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding integrator" + Comment='* Integrator '+compType + Title='Add parameters for Integrator '+compName + out_lower_limit=' Enter out lower limit (default=0.0): ' + out_upper_limit=' Enter out upper limit (default=5.0): ' + in_offset=' Enter offset for input (default=0.0): ' + gain=' Enter gain (default=1.0): ' + out_ic=' Enter initial condition on output (default=0.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,out_lower_limit,out_upper_limit,in_offset,gain,out_ic]) + elif compType=="differentiator": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Differentiator" + Comment='* Differentiator '+compType + Title='Add parameters for Differentiator '+compName + out_lower_limit=' Enter out lower limit (default=0.0): ' + out_upper_limit=' Enter out upper limit (default=5.0): ' + out_offset=' Enter offset for output (default=0.0): ' + gain=' Enter gain (default=1.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,out_lower_limit,out_upper_limit,out_offset,gain]) + elif compType=="limit8": + for i in range(0,len(words)/2-1): + schematicInfo.append("a"+str(k)+" "+words[i+1]+" "+words[i+len(words)/2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding limiter" + Comment='* Limiter '+compType + Title='Add parameters for Limiter '+compName + lowerLimit=' Enter out lower limit (default=0.0): ' + upperLimit=' Enter out upper limit (default=5.0): ' + in_offset=' Enter offset for input (default=0.0): ' + gain=' Enter gain (default=1.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,lowerLimit,upperLimit,in_offset,gain]) + elif compType=="controlledlimiter": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding controlledlimiter" + Comment='* Controlled Limiter '+compType + Title='Add parameters for Controlled Limiter '+compName + in_offset=' Enter offset for input (default=0.0): ' + gain=' Enter gain (default=1.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,in_offset,gain]) + elif compType=="analogswitch": + schematicInfo.append("a"+str(k)+" "+words[1]+" ("+words[2]+" "+words[3]+") "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding analogswitch" + Comment='* Analog Switch '+compType + Title='Add parameters for Analog Switch '+compName + cntl_on=' Enter control ON voltage (default=5.0): ' + cntl_off=' Enter control OFF voltage (default=0.0): ' + r_on=' Enter ON resistance value (default=10.0): ' + r_off=' Enter OFF resistance value (default=1e6): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,cntl_on,cntl_off,r_on,r_off]) + elif compType=="zener": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Zener" + Comment='* Zener Diode '+compType + Title='Add parameters for Zener Diode '+compName + v_breakdown=' Enter Breakdown voltage (default=5.6): ' + i_breakdown=' Enter Breakdown current (default=2.0e-2): ' + i_sat=' Enter saturation current (default=1.0e-12): ' + n_forward=' Enter forward emission coefficient (default=0.0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,v_breakdown,i_breakdown,i_sat,n_forward]) + elif compType=="d_buffer": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Buffer" + Comment='* Buffer '+compType + Title='Add parameters for Buffer '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_inverter": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Inverter" + Comment='* Inverter '+compType + Title='Add parameters for Inverter '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_and": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding AND" + Comment='* And '+compType + Title= 'Add parameters for And '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_nand": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding NAND" + Comment='* Nand '+compType + Title='Add parameters for Nand '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_or": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding OR" + Comment='* OR '+compType + Title='Add parameters for OR '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_nor": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding NOR" + Comment='* NOR '+compType + Title ='Add parameters for NOR '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_xor": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + print "-----------------------------------------------------------\n" + print "Adding XOR" + Comment='* XOR '+compType + Title='Add parameters for XOR '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_xnor": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding XNOR" + Comment='* XNOR '+compType + Title='Add parameters for XNOR '+compName + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) + elif compType=="d_tristate": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding Tristate" + Comment='* Tristate '+compType + Title='Add parameters for Tristate '+compName + delay=' Enter delay (default=1e-12): ' + input_load=' Enter input load capacitance (default=1e-12): ' + enable_load=' Enter enable load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,delay,input_load,enable_load]) + elif compType=="d_pullup": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding pullup" + Comment='* Pullup '+compType + Title='Add parameters for Pullup '+compName + load=' Enter load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,load]) + elif compType=="d_pulldown": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding pulldown" + Comment='* Pulldown '+compType + Title='Add parameters for Pulldown '+compName + load=' Enter load capacitance (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,load]) + elif compType=="d_srlatch": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding SR Latch" + Comment='* SR Latch '+compType + Title='Add parameters for SR Latch '+compName + sr_delay=' Enter input to set-reset delay (default=1e-12): ' + enable_delay=' Enter enable delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + sr_load=' Enter input to set-reset load (default=1e-12): ' + enable_load=' Enter enable load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,sr_delay,enable_delay,set_delay,reset_delay,ic,sr_load,enable_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_jklatch": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding JK Latch" + Comment='* JK Latch '+compType + Title= 'Add parameters for JK Latch '+compName + jk_delay=' Enter input to j-k delay (default=1e-12): ' + enable_delay=' Enter enable delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + jk_load=' Enter input to j-k load (default=1e-12): ' + enable_load=' Enter enable load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,jk_delay,enable_delay,set_delay,reset_delay,ic,enable_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_dlatch": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding D Latch" + Comment='* D Latch '+compType + Title= 'Add parameters for D Latch '+compName + data_delay=' Enter input to data delay (default=1e-12): ' + enable_delay=' Enter enable delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + data_load=' Enter input to data load (default=1e-12): ' + enable_load=' Enter enable load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,data_delay,enable_delay,set_delay,reset_delay,ic,data_load,enable_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_tlatch": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding T Latch" + Comment='* T Latch '+compType + Title= 'Add parameters for T Latch '+compName + t_delay=' Enter input to t delay (default=1e-12): ' + enable_delay=' Enter enable delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + t_load=' Enter input to t load (default=1e-12): ' + enable_load=' Enter enable load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,t_delay,enable_delay,set_delay,reset_delay,ic,t_load,enable_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_srff": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding SR Flip-Flop" + Comment='* SR Flip-Flop '+compType + Title='Add parameters for SR Flip-Flop '+compName + clk_delay=' Enter clk delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + sr_load=' Enter input to set-reset load (default=1e-12): ' + clk_load=' Enter clk load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,sr_load,clk_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_jkff": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding JK Flip-Flop" + Comment='* JK Flip-Flop '+compType + Title= 'Add parameters for JK Flip-Flop '+compName + clk_delay=' Enter clk delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + jk_load=' Enter input to j-k load (default=1e-12): ' + clk_load=' Enter clk load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,jk_load,clk_load,set_load,reset_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_dff": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding D Flip-Flop" + Comment='* D Flip-Flop '+compType + Title= 'Add parameters for D Flip-Flop '+compName + clk_delay=' Enter clk delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + data_load=' Enter input to data load (default=1e-12): ' + clk_load=' Enter clk load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,data_load,clk_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="d_tff": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + #Insert comment at remove line + schematicInfo.insert(index,"* "+compline) + print "-----------------------------------------------------------\n" + print "Adding T Flip-Flop" + Comment='* T Flip-Flop '+compType + Title='Add parameters for T Flip-Flip '+compName + clk_delay=' Enter clk delay (default=1e-12): ' + set_delay=' Enter set delay (default=1e-12): ' + reset_delay=' Enter reset delay (default=1e-12): ' + ic=' Enter initial condition on output (default=0): ' + t_load=' Enter input to t load (default=1e-12): ' + clk_load=' Enter clk load (default=1e-12): ' + set_load=' Enter set load (default=1e-12): ' + reset_load=' Enter reset load (default=1e-12): ' + rise_delay=' Enter rise delay (default=1e-12): ' + fall_delay=' Enter fall delay (default=1e-12): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,t_load,clk_load,set_load,reset_load,rise_delay,fall_delay]) + elif compType=="vplot1": + outputOption.append("plot v("+words[1]+")\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vplot8_1": + outputOption.append("plot ") + for i in range(1,len(words)-1): + outputOption.append("v("+words[i]+") ") + outputOption.append("\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vdbplot8_1": + outputOption.append("plot ") + for i in range(1,len(words)-1): + outputOption.append("db(v("+words[i]+")) ") + outputOption.append("\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vphase_plot8_1": + outputOption.append("plot ") + for i in range(1,len(words)-1): + outputOption.append("ph(v("+words[i]+")) ") + outputOption.append("\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vprint1": + outputOption.append("print v("+words[1]+")\n") + schematicInfo.insert(index,"* Printing option "+compType) + elif compType=="calc": + outputOption.append("plot "+words[2]+"\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vprint8_1": + outputOption.append("print ") + for i in range(1,len(words)-1): + outputOption.append("v("+words[i]+") ") + outputOption.append("\n") + schematicInfo.insert(index,"* Printing option "+compType) + elif compType=="vplot": + outputOption.append("plot v("+words[1]+")-v("+words[2]+")\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vplot8": + outputOption.append("plot ") + for i in range(0,len(words)/2-1): + if words[i+1]=="0": + outputOption.append("-v("+words[i+len(words)/2]+") ") + elif words[i+len(words)/2]=="0": + outputOption.append("v("+words[i+1]+") ") + else: + outputOption.append("v("+words[i+1]+")-v("+words[i+len(words)/2]+") ") + outputOption.append("\n") + elif compType=="vprint": + outputOption.append("print v("+words[1]+")-v("+words[2]+")\n") + schematicInfo.insert(index,"* Printting option "+compType) + elif compType=="iplot": + schematicInfo.insert(index,"V_"+words[0]+" "+words[1]+" "+words[2]+" 0") + outputOption.append("plot i(V_"+words[0]+")\n") + elif compType=="powerplot": + outputOption.append("print ((v("+words[1]+")-v("+words[2]+"))^2)/("+words[3]+")\n") + schematicInfo.insert(index,"* Printting option "+compType) + elif compType=="ic": + Comment='*Adding initial Condition '+compType + Title=' Add initial condition ' +compName + print "-----------------------------------------------------------" + print "Adding initial condition" + ic=' Enter initial condition on output (default=0): ' + print "-----------------------------------------------------------" + guimodelvalue.append([index,compline,compType,compName,Comment,Title,words[1],ic]) + elif compType=="opamp1": + f = open(FreeEDA_HOME) + data = f.read() + schematicInfo.insert(index,data) + else: + schematicInfo.insert(index,compline) + # Update option information + return schematicInfo,outputOption,guimodelvalue + + + +# Accept input file name from user if not provided +if len(sys.argv) < 2: + filename=raw_input('Enter file name: ') +else: + filename=sys.argv[1] + +if len(sys.argv) < 3: + finalNetlist=int(raw_input('Do you want to create final file: ')) +else: + finalNetlist=int(sys.argv[2]) + +print "==================================" +print "Kicad to Ngspice netlist converter " +print "==================================" +print "converting "+filename + +# Read the netlist +lines=readNetlist(filename) + +# Construct parameter information +param=readParamInfo(lines) + +# Replace parameter with values +netlist, infoline=preprocessNetlist(lines,param) + + +# Separate option and schematic information +optionInfo, schematicInfo=separateNetlistInfo(netlist) + +if finalNetlist: + """Insert analysis from file""" + optionInfo=addAnalysis(optionInfo) + +# Find the analysis option +analysisOption=[] +outputOption=[] +initialCondOption=[] +simulatorOption=[] +includeOption=[] +model=[] + +for eachline in optionInfo: + words=eachline.split() + option=words[0] + if (option=='.ac' or option=='.dc' or + option=='.disto' or option=='.noise' or + option=='.op' or option=='.pz' or + option=='.sens' or option=='.tf' or + option=='.tran'): + analysisOption.append(eachline+'\n') + print eachline + elif (option=='.save' or option=='.print' or + option=='.plot' or option=='.four'): + eachline=eachline.strip('.') + outputOption.append(eachline+'\n') + elif (option=='.nodeset' or option=='.ic'): + initialCondOption.append(eachline+'\n') + elif option=='.option': + simulatorOption.append(eachline+'\n') + elif (option=='.include' or option=='.lib'): + includeOption.append(eachline+'\n') + elif (option=='.model'): + model.append(eachline+'\n') + elif option=='.end': + continue; + + +# Find the various model library required +modelList=[] +subcktList=[] + +for eachline in schematicInfo: + words=eachline.split() + if eachline[0]=='d': + modelName=words[3] + if modelName in modelList: + continue + modelList.append(modelName) + elif eachline[0]=='q': + modelName=words[4] + index=schematicInfo.index(eachline) + schematicInfo.remove(eachline) + schematicInfo.insert(index,words[0]+" "+words[3]+" "+words[2]+" "+words[1]+" "+words[4]) + if modelName in modelList: + continue + modelList.append(modelName) + elif eachline[0]=='m': + modelName=words[4] + index=schematicInfo.index(eachline) + schematicInfo.remove(eachline) + width=raw_input(' Enter width of mosfet '+words[0]+'(default=100u):') + length=raw_input(' Enter length of mosfet '+words[0]+'(default=100u):') + multiplicative_factor=raw_input(' Enter multiplicative factor of mosfet '+words[0]+'(default=1):') + if width=="": width="100u" + if multiplicative_factor=="": multiplicative_factor="100u" + if length=="": length="100u" + schematicInfo.insert(index,words[0]+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[3]+" "+words[4]+" "+'M='+multiplicative_factor+" "+'L='+length+" "+'W='+width) + if modelName in modelList: + continue + modelList.append(modelName) + elif eachline[0]=='j': + modelName=words[4] + index=schematicInfo.index(eachline) + schematicInfo.remove(eachline) + schematicInfo.insert(index,words[0]+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]) + if modelName in modelList: + continue + modelList.append(modelName) + elif eachline[0]=='x': + subcktName=words[len(words)-1] + if subcktName in subcktList: + continue + subcktList.append(subcktName) + + +# Find current through components +schematicInfo,outputOption=findCurrent(schematicInfo,outputOption) + +#List for storing source and its value +sourcelist=[] +sourcelisttrack=[] + + +# Add parameter to sources +schematicInfo,sourcelist=insertSpecialSourceParam(schematicInfo,sourcelist) + +#Calling createrootwindow +sourcelist,sourcelisttrack=createrootwindow(sourcelist,sourcelisttrack) +print "Output Option",outputOption +print schematicInfo + + +# Add newline in the schematic information +for i in range(len(schematicInfo),0,-1): + schematicInfo.insert(i,'\n') + +outfile=filename+".out" +cktfile=filename+".ckt" +out=open(outfile,"w") +ckt=open(cktfile,"w") +out.writelines(infoline) +out.writelines('\n') +ckt.writelines(infoline) +ckt.writelines('\n') + +for modelName in modelList: + if os.path.exists(modelName+".lib"): + out.writelines('.include '+modelName+'.lib\n') + ckt.writelines('.include '+modelName+'.lib\n') + +for subcktName in subcktList: + out.writelines('.include '+subcktName+'.sub\n') + ckt.writelines('.include '+subcktName+'.sub\n') + +if finalNetlist: + sections=[simulatorOption, initialCondOption, schematicInfo, analysisOption] +else: + sections=[simulatorOption, initialCondOption, schematicInfo] +for section in sections: + if len(section) == 0: + continue + else: + out.writelines('\n') + out.writelines(section) + ckt.writelines('\n') + ckt.writelines(section) + +if finalNetlist: + out.writelines('\n* Control Statements \n') + out.writelines('.control\n') + out.writelines('run\n') + out.writelines(outputOption) + outputOption1=[] + for option in outputOption: + if (("plot" in option) or ("print" in option)): + outputOption1.append("."+option) + else: + outputOption1.append(option) + ckt.writelines(outputOption1) + out.writelines('.endc\n') + out.writelines('.end\n') + ckt.writelines('.end\n') + +out.close() +ckt.close() + +print "The ngspice netlist has been written in "+filename+".out" +print "The scilab netlist has been written in "+filename+".ckt" +#dummy=raw_input('Press Enter to quit') diff --git a/FreeEDA/kicadtoNgspice/terminal_KicadtoNgspice.py b/FreeEDA/kicadtoNgspice/terminal_KicadtoNgspice.py new file mode 100755 index 0000000..d095143 --- /dev/null +++ b/FreeEDA/kicadtoNgspice/terminal_KicadtoNgspice.py @@ -0,0 +1,1474 @@ +#!/usr/bin/python +# KicadtoNgspice.py is a python script to convert a Kicad spice netlist to a ngspice netlist. It developed for FreeEDA software. It is written by FOSSEE team, IIT B. +# Copyright (C) FOSSEE Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +import sys +import os.path + +def readNetlist(filename): + """Read Pspice netList""" +# Open file if it exists + if os.path.exists(filename): + try: + f = open(filename) + except : + print("Error in opening file") + sys.exit() + else: + print filename + " does not exist" + sys.exit() + +# Read the data from file + data=f.read() + +# Close the file + f.close() + return data.splitlines() + +def readParamInfo(data): + """Read Parameter information and store it into dictionary""" + param={} + for eachline in lines: + eachline=eachline.strip() + if len(eachline)>1: + words=eachline.split(); + option=words[0].lower() + if option=='.param': + for i in range(1, len(words), 1): + paramList=words[i].split('=') + param[paramList[0]]=paramList[1] + return param + +def preprocessNetlist(lines,param): + """Preprocess netlist (replace parameters)""" + netlist=[] + for eachline in lines: + # Remove leading and trailing blanks spaces from line + eachline=eachline.strip() + # Remove special character $ + eachline=eachline.replace('$','') + # Replace parameter with values + for subParam in eachline.split(): + if '}' in subParam: + key=subParam.split()[0] + key=key.strip('{') + key=key.strip('}') + if key in param: + eachline=eachline.replace('{'+key+'}',param[key]) + else: + print "Parameter " + key +" does not exists" + value=raw_input('Enter parameter value: ') + eachline=eachline.replace('{'+key+'}',value) + # Convert netlist into lower case letter + eachline=eachline.lower() + # Construct netlist + if len(eachline)>1: + if eachline[0]=='+': + netlist.append(netlist.pop()+eachline.replace('+',' ')) + else: + netlist.append(eachline) + # Copy information line + infoline=netlist[0] + netlist.remove(netlist[0]) + return netlist,infoline + +def separateNetlistInfo(netlist): + optionInfo=[] + schematicInfo=[] + + for eachline in netlist: + if eachline[0]=='*': + continue + elif eachline[0]=='.': + optionInfo.append(eachline) + else: + schematicInfo.append(eachline) + return optionInfo,schematicInfo + + +def addAnalysis(optionInfo): + """Add Analysis to the netlist""" +# Open file if it exists + filename="analysis" + if os.path.exists(filename): + try: + f = open(filename) + except : + print("Error in opening file") + sys.exit() + else: + print filename + " does not exist" + sys.exit() + +# Read the data from file + data=f.read() + +# Close the file + f.close() + + analysisData=data.splitlines() + for eachline in analysisData: + eachline=eachline.strip() + if len(eachline)>1: + if eachline[0]=='.': + optionInfo.append(eachline) + else: + pass + return optionInfo + +def findCurrent(schematicInfo,outputOption): + """Find current through component by placing voltage source series with the component""" + i=0 + for eachline in outputOption: + words=eachline.split() + option=words[0] + # Add voltage sources in series with component to find current + if option=="print" or option=="plot": + words.remove(option) + updatedline=eachline + for outputVar in words: + # Find component name if output variable is current + if outputVar[0]=='i': + outputVar=outputVar.strip('i') + outputVar=outputVar.strip('(') + compName=outputVar.strip(')') + # If component is voltage source, skip + if compName[0]=='v': + continue + # Find the component from the circuit + for compline in schematicInfo: + compInfo=compline.split() + if compInfo[0]==compName: + # Construct dummy node + dummyNode='dummy_'+str(i) + i+=1 + # Break the one node component and place zero value voltage source in between. + index=schematicInfo.index(compline) + schematicInfo.remove(compline) + compline=compline.replace(compInfo[2],dummyNode) + schematicInfo.insert(index,compline) + schematicInfo.append('v'+compName+' '+dummyNode+' '+compInfo[2]+' 0') + # Update option information + updatedline=updatedline.replace('i('+compName+')','i(v'+compName+')') + index=outputOption.index(eachline) + outputOption.remove(eachline) + outputOption.insert(index,updatedline) + return schematicInfo, outputOption + +def insertSpecialSourceParam(schematicInfo): + """Insert Special source parameters""" + schematicInfo1=[] + for compline in schematicInfo: + words=compline.split() + compName=words[0] + # Ask for parameters of the source + if compName[0]=='v' or compName[0]=='i': + # Find the index component from the circuit + index=schematicInfo.index(compline) + schematicInfo.remove(compline) + if words[3]=="pulse": + print "----------------------------------------------\n" + print "Add parameters for pulse source "+compName + v1=raw_input(' Enter initial value(Volts/Amps): ') + v2=raw_input(' Enter pulsed value(Volts/Amps): ') + td=raw_input(' Enter delay time (seconds): ') + tr=raw_input(' Enter rise time (seconds): ') + tf=raw_input(' Enter fall time (seconds): ') + pw=raw_input(' Enter pulse width (seconds): ') + tp=raw_input(' Enter period (seconds): ') + print "----------------------------------------------" + compline=compline + "("+v1+" "+v2+" "+td+" "+tr+" "+tf+" "+pw+" "+tp+")" + elif words[3]=="sine": + print "----------------------------------------------\n" + print "Add parameters for sine source "+compName + vo=raw_input(' Enter offset value (Volts/Amps): ') + va=raw_input(' Enter amplitude (Volts/Amps): ') + freq=raw_input(' Enter frequency (Hz): ') + td=raw_input(' Enter delay time (seconds): ') + theta=raw_input(' Enter damping factor (1/seconds): ') + print "----------------------------------------------" + compline=compline + "("+vo+" "+va+" "+freq+" "+td+" "+theta+")" + elif words[3]=="ac": + print "----------------------------------------------\n" + print "Add parameters for ac source "+compName + v_a=raw_input(' Enter amplitude (Volts/Amps): ') + print "----------------------------------------------" + compline=compline + " " + v_a + elif words[3]=="exp": + print "----------------------------------------------\n" + print "Add parameters for exponential source "+compName + v1=raw_input(' Enter initial value(Volts/Amps): ') + v2=raw_input(' Enter pulsed value(Volts/Amps): ') + td1=raw_input(' Enter rise delay time (seconds): ') + tau1=raw_input(' Enter rise time constant (seconds): ') + td2=raw_input(' Enter fall time (seconds): ') + tau2=raw_input(' Enter fall time constant (seconds): ') + print "----------------------------------------------" + compline=compline + "("+v1+" "+v2+" "+td1+" "+tau1+" "+td2+" "+tau2+")" + elif words[3]=="pwl": + print "----------------------------------------------\n" + print "Add parameters for piecewise linear source "+compName + inp="y" + compline=compline + "(" + while inp=="y": + t1=raw_input(' Enter time (seconds): ') + v1=raw_input(' Enter value(Volts/Amps): ') + compline=compline + t1+" "+v1+" " + inp=raw_input(' Do you want to continue(y/n): ') + print "----------------------------------------------" + compline=compline + ")" + elif words[3]=="dc": + print "----------------------------------------------\n" + print "Add parameters for DC source "+compName + v1=raw_input(' Enter value(Volts/Amps): ') + print "----------------------------------------------" + compline=compline + " "+v1 + schematicInfo.insert(index,compline) + elif compName[0]=='h' or compName[0]=='f': + # Find the index component from the circuit + index=schematicInfo.index(compline) + schematicInfo.remove(compline) + schematicInfo.insert(index,"* "+compName) + schematicInfo1.append("V"+compName+" "+words[3]+" "+words[4]+" 0") + schematicInfo1.append(compName+" "+words[1]+" "+words[2]+" "+"V"+compName+" "+words[5]) + schematicInfo=schematicInfo+schematicInfo1 + return schematicInfo + +def convertICintoBasicBlocks(schematicInfo,outputOption): + """Insert Special source parameters""" + k=1 + for compline in schematicInfo: + words=compline.split() + compName=words[0] + # Find the IC from schematic + if compName[0]=='u': + # Find the component from the circuit + index=schematicInfo.index(compline) + schematicInfo.remove(compline) + compType=words[len(words)-1]; + if (compType=="7404" or compType=="74hc04" or compType=="74hct04" or compType=="74ls04" or compType=="74ls14"): + i=1; + # Add first three Not gates + while words[i]!="0": + # Add analog to digital converter for input A + schematicInfo.append("a"+str(k)+" ["+words[i]+"] ["+words[i]+"_in] "+" "+compName+"adc") + k=k+1 + # Add Not gate + schematicInfo.append("a"+str(k)+" "+words[i]+"_in "+words[i+1]+"_out "+compName) + k=k+1 + # Add digital to analog converter for output B + schematicInfo.append("a"+str(k)+" ["+words[i+1]+"_out] ["+words[i+1]+"] "+" "+compName+"dac") + k=k+1 + i=i+2 + i=i+1 + # Add last three Not gates + while i11: + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[12]+" "+words[11]+" "+words[10]+" "+words[13]+"] ["+words[12]+"_in "+words[11]+"_in "+words[10]+"_in "+words[13]+"_in] "+compName+"adc") + k=k+1 + # Add D Flip-flop + schematicInfo.append("a"+str(k)+" "+words[12]+"_in "+words[11]+"_in ~"+words[10]+"_in ~"+words[13]+"_in "+words[9]+"_out "+words[8]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[9]+"_out "+words[8]+"_out] ["+words[9]+" "+words[8]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for D Flip-Flop + schematicInfo.append(".model "+ compName+" d_dff") + # Add model for analog-to-digital bridge + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="74107" or compType=="74hc107" or compType=="74ls107"): + if len(words)>11: + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[4]+" "+words[12]+" "+words[13]+"] ["+words[1]+"_in "+words[4]+"_in "+words[12]+"_in "+words[13]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[1]+"_in "+words[4]+"_in ~"+words[12]+"_in ~"+words[13]+"_in ~"+words[13]+"_in "+words[3]+"_out "+words[2]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[3]+"_out "+words[2]+"_out] ["+words[3]+" "+words[2]+"] "+" "+compName+"dac") + k=k+1 + + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[8]+" "+words[11]+" "+words[9]+" "+words[10]+"] ["+words[8]+"_in "+words[11]+"_in "+words[9]+"_in "+words[10]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[8]+"_in "+words[11]+"_in ~"+words[9]+"_in ~"+words[10]+"_in ~"+words[10]+"_in "+words[5]+"_out "+words[6]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[5]+"_out "+words[6]+"_out] ["+words[5]+" "+words[6]+"] "+" "+compName+"dac") + k=k+1 + else: + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[4]+" "+words[12]+" "+words[13]+"] ["+words[1]+"_in "+words[4]+"_in "+words[12]+"_in "+words[13]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[1]+"_in "+words[4]+"_in ~"+words[12]+"_in ~"+words[13]+"_in ~"+words[13]+"_in "+words[3]+"_out "+words[2]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[3]+"_out "+words[2]+"_out] ["+words[3]+" "+words[2]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for JK Flip-Flop + schematicInfo.append(".model "+ compName+" d_jkff") + # Add model for analog-to-digital bridge + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="74109" or compType=="74hc109" or compType=="74ls109"): + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[5]+"_in "+words[1]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[2]+"_in ~"+words[3]+"_in "+words[4]+"_in ~"+words[5]+"_in ~"+words[1]+"_in "+words[6]+"_out "+words[7]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[6]+"_out "+words[7]+"_out] ["+words[6]+" "+words[7]+"] "+" "+compName+"dac") + k=k+1 + if len(words)>12: + # Add analog to digital converter for inputs + schematicInfo.append("a"+str(k)+" ["+words[14]+" "+words[13]+" "+words[12]+" "+words[11]+" "+words[15]+"] ["+words[14]+"_in "+words[13]+"_in "+words[12]+"_in "+words[11]+"_in "+words[15]+"_in] "+compName+"adc") + k=k+1 + # Add J-K Flip-flop + schematicInfo.append("a"+str(k)+" "+words[14]+"_in ~"+words[13]+"_in "+words[12]+"_in ~"+words[11]+"_in ~"+words[15]+"_in "+words[10]+"_out "+words[9]+"_out "+compName) + k=k+1 + # Add digital to analog converter for outputs + schematicInfo.append("a"+str(k)+" ["+words[10]+"_out "+words[9]+"_out] ["+words[10]+" "+words[9]+"] "+" "+compName+"dac") + k=k+1 + # Insert comment in-place of components + schematicInfo.insert(index,"* "+compType) + # Add model for JK Flip-Flop + schematicInfo.append(".model "+ compName+" d_jkff") + # Add model for analog-to-digital bridge + schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") + # Add model for digital-to-analog bridge + schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") + elif (compType=="74112" or compType=="74hc112" or compType=="74ls112"): + if len(words)>12: + schematicInfo.append("a"+str(k)+" "+words[3]+" "+words[2]+" ~"+words[1]+" ~"+words[4]+" ~"+words[15]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + schematicInfo.append("a"+str(k)+" "+words[11]+" "+words[12]+" ~"+words[13]+" ~"+words[10]+" ~"+words[14]+" "+words[9]+" "+words[7]+" "+compName) + k=k+1 + else: + schematicInfo.append("a"+str(k)+" "+words[3]+" "+words[2]+" ~"+words[1]+" ~"+words[4]+" ~"+words[8]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* "+compType) + schematicInfo.append(".model "+ compName+" d_jkff") + elif compType=="dac": + schematicInfo.append("a"+str(k)+" ["+words[1]+"] ["+words[2]+"] "+compName) + k=k+1 + schematicInfo.insert(index,"* Digital to Analog converter "+compType) + schematicInfo.append(".model "+ compName+" dac_bridge") + elif compType=="adc": + schematicInfo.append("a"+str(k)+" ["+words[1]+"] ["+words[2]+"] "+compName) + k=k+1 + schematicInfo.insert(index,"* Analog to Digital converter "+compType) + schematicInfo.append(".model "+ compName+" adc_bridge") + elif compType=="adc8": + for i in range(0,len(words)/2-1): + schematicInfo.append("a"+str(k)+" ["+words[i+1]+"] ["+words[i+len(words)/2]+"] "+compName) + k=k+1 + schematicInfo.insert(index,"* Analog to Digital converter "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for analog to digital converter "+compName + in_low=raw_input(' Enter input low level voltage (default=0.8): ') + in_high=raw_input(' Enter input high level voltage (default=2.0): ') + print "-----------------------------------------------------------" + if in_low=="": in_low="0.8" + if in_high=="": in_high="2.0" + schematicInfo.append(".model "+ compName+" adc_bridge(in_low="+in_low+" in_high="+in_high+" )") + elif compType=="dac8": + for i in range(0,len(words)/2-1): + schematicInfo.append("a"+str(k)+" ["+words[i+1]+"] ["+words[i+len(words)/2]+"] "+compName) + k=k+1 + schematicInfo.insert(index,"* Digital to Analog converter "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for digital to analog converter "+compName + out_low=raw_input(' Enter output low level voltage (default=0.2): ') + out_high=raw_input(' Enter output high level voltage (default=5.0): ') + out_undef=raw_input(' Enter output for undefined voltage level (default=2.2): ') + print "-----------------------------------------------------------" + if out_low=="": out_low="0.2" + if out_high=="": out_high="5.0" + if out_undef=="": out_undef="5.0" + schematicInfo.append(".model "+ compName+" dac_bridge(out_low="+out_low+" out_high="+out_high+" out_undef="+out_undef+" )") + elif compType=="gain": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Gain "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Gain "+compName + in_offset=raw_input(' Enter offset for input (default=0.0): ') + gain=raw_input(' Enter gain (default=1.0): ') + out_offset=raw_input(' Enter offset for output (default=0.0): ') + print "-----------------------------------------------------------" + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + if out_offset=="": out_offset="0.0" + schematicInfo.append(".model "+ compName+" gain(in_offset="+in_offset+" out_offset="+out_offset+" gain="+gain+")") + elif compType=="summer": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Summer "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Summer "+compName + in1_offset=raw_input(' Enter offset for input 1 (default=0.0): ') + in2_offset=raw_input(' Enter offset for input 2 (default=0.0): ') + in1_gain=raw_input(' Enter gain for input 1 (default=1.0): ') + in2_gain=raw_input(' Enter gain for input 2 (default=1.0): ') + out_gain=raw_input(' Enter gain for output (default=1.0): ') + out_offset=raw_input(' Enter offset for output (default=0.0): ') + print "-----------------------------------------------------------" + if in1_offset=="": in1_offset="0.0" + if in2_offset=="": in2_offset="0.0" + if in1_gain=="": in1_gain="1.0" + if in2_gain=="": in2_gain="1.0" + if out_gain=="": out_gain="1.0" + if out_offset=="": out_offset="0.0" + schematicInfo.append(".model "+ compName+" summer(in_offset=["+in1_offset+" "+in2_offset+"] in_gain=["+in1_gain+" "+in2_gain+"] out_offset="+out_offset+" out_gain="+out_gain+")") + elif compType=="multiplier": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Multiplier "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Multiplier "+compName + in1_offset=raw_input(' Enter offset for input 1 (default=0.0): ') + in2_offset=raw_input(' Enter offset for input 2 (default=0.0): ') + in1_gain=raw_input(' Enter gain for input 1 (default=1.0): ') + in2_gain=raw_input(' Enter gain for input 2 (default=1.0): ') + out_gain=raw_input(' Enter gain for output (default=1.0): ') + out_offset=raw_input(' Enter offset for output (default=0.0): ') + print "-----------------------------------------------------------" + if in1_offset=="": in1_offset="0.0" + if in2_offset=="": in2_offset="0.0" + if in1_gain=="": in1_gain="1.0" + if in2_gain=="": in2_gain="1.0" + if out_gain=="": out_gain="1.0" + if out_offset=="": out_offset="0.0" + schematicInfo.append(".model "+ compName+" mult(in_offset=["+in1_offset+" "+in2_offset+"] in_gain=["+in1_gain+" "+in2_gain+"] out_offset="+out_offset+" out_gain="+out_gain+")") + elif compType=="divider": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Divider "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Divider "+compName + num_offset=raw_input(' Enter offset for numerator (default=0.0): ') + den_offset=raw_input(' Enter offset for denominator (default=0.0): ') + num_gain=raw_input(' Enter gain for numerator (default=1.0): ') + den_gain=raw_input(' Enter gain for denominator (default=1.0): ') + out_gain=raw_input(' Enter gain for output (default=1.0): ') + out_offset=raw_input(' Enter offset for output (default=0.0): ') + den_lower_limit=raw_input(' Enter lower limit for denominator value (default=1.0e-10): ') + print "-----------------------------------------------------------" + if num_offset=="": num_offset="0.0" + if den_offset=="": den_offset="0.0" + if num_gain=="": num_gain="1.0" + if den_gain=="": den_gain="1.0" + if out_gain=="": out_gain="1.0" + if out_offset=="": out_offset="0.0" + if den_lower_limit=="": den_lower_limit="1.0e-10" + schematicInfo.append(".model "+ compName+" divide(num_offset="+num_offset+" den_offset="+den_offset+" num_gain="+num_gain+" den_gain="+den_gain+" out_offset="+out_offset+" out_gain="+out_gain+" den_lower_limit="+den_lower_limit+")") + elif compType=="limit": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Limiter "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Limiter "+compName + lowerLimit=raw_input(' Enter out lower limit (default=0.0): ') + upperLimit=raw_input(' Enter out upper limit (default=5.0): ') + in_offset=raw_input(' Enter offset for input (default=0.0): ') + gain=raw_input(' Enter gain (default=1.0): ') + print "-----------------------------------------------------------" + if lowerLimit=="": lowerLimit="0.0" + if upperLimit=="": upperLimit="5.0" + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + schematicInfo.append(".model "+ compName+" limit(out_lower_limit="+lowerLimit+" out_upper_limit="+upperLimit+" in_offset="+in_offset+" gain="+gain+")") + elif compType=="integrator": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Integrator "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Integrator "+compName + out_lower_limit=raw_input(' Enter out lower limit (default=0.0): ') + out_upper_limit=raw_input(' Enter out upper limit (default=5.0): ') + in_offset=raw_input(' Enter offset for input (default=0.0): ') + gain=raw_input(' Enter gain (default=1.0): ') + out_ic=raw_input(' Enter initial condition on output (default=0.0): ') + print "-----------------------------------------------------------" + if out_lower_limit=="": out_lower_limit="0.0" + if out_upper_limit=="": out_upper_limit="5.0" + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + if out_ic=="": out_ic="0.0" + schematicInfo.append(".model "+ compName+" int(out_lower_limit="+out_lower_limit+" out_upper_limit="+out_upper_limit+" in_offset="+in_offset+" gain="+gain+" out_ic="+out_ic+")") + elif compType=="differentiator": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Differentiator "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Differentiator "+compName + out_lower_limit=raw_input(' Enter out lower limit (default=0.0): ') + out_upper_limit=raw_input(' Enter out upper limit (default=5.0): ') + out_offset=raw_input(' Enter offset for output (default=0.0): ') + gain=raw_input(' Enter gain (default=1.0): ') + print "-----------------------------------------------------------" + if out_lower_limit=="": out_lower_limit="0.0" + if out_upper_limit=="": out_upper_limit="5.0" + if out_offset=="": out_offset="0.0" + if gain=="": gain="1.0" + schematicInfo.append(".model "+ compName+" d_dt(out_lower_limit="+out_lower_limit+" out_upper_limit="+out_upper_limit+" out_offset="+out_offset+" gain="+gain+")") + elif compType=="limit8": + for i in range(0,len(words)/2-1): + schematicInfo.append("a"+str(k)+" "+words[i+1]+" "+words[i+len(words)/2]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Limiter "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Limiter "+compName + lowerLimit=raw_input(' Enter out lower limit (default=0.0): ') + upperLimit=raw_input(' Enter out upper limit (default=5.0): ') + in_offset=raw_input(' Enter offset for input (default=0.0): ') + gain=raw_input(' Enter gain (default=1.0): ') + print "-----------------------------------------------------------" + if lowerLimit=="": lowerLimit="0.0" + if upperLimit=="": upperLimit="5.0" + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + schematicInfo.append(".model "+ compName+" limit(out_lower_limit="+lowerLimit+" out_upper_limit="+upperLimit+" in_offset="+in_offset+" gain="+gain+")") + elif compType=="controlledlimiter": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Controlled Limiter "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Controlled Limiter "+compName + in_offset=raw_input(' Enter offset for input (default=0.0): ') + gain=raw_input(' Enter gain (default=1.0): ') + print "-----------------------------------------------------------" + if in_offset=="": in_offset="0.0" + if gain=="": gain="1.0" + schematicInfo.append(".model "+ compName+" climit(in_offset="+in_offset+" gain="+gain+")") + elif compType=="analogswitch": + schematicInfo.append("a"+str(k)+" "+words[1]+" ("+words[2]+" "+words[3]+") "+compName) + k=k+1 + schematicInfo.insert(index,"* Analog Switch "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Analog Switch "+compName + cntl_on=raw_input(' Enter control ON voltage (default=5.0): ') + cntl_off=raw_input(' Enter control OFF voltage (default=0.0): ') + r_on=raw_input(' Enter ON resistance value (default=10.0): ') + r_off=raw_input(' Enter OFF resistance value (default=1e6): ') + print "-----------------------------------------------------------" + if cntl_on=="": cntl_on="5.0" + if cntl_off=="": cntl_off="0.0" + if r_on=="": r_on="10.0" + if r_off=="": r_off="1e6" + schematicInfo.append(".model "+ compName+" aswitch(cntl_on="+cntl_on+" cntl_off="+cntl_off+" r_on="+r_on+" r_off="+r_off+")") + elif compType=="zener": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Zener Diode "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Zener Diode "+compName + v_breakdown=raw_input(' Enter Breakdown voltage (default=5.6): ') + i_breakdown=raw_input(' Enter Breakdown current (default=2.0e-2): ') + i_sat=raw_input(' Enter saturation current (default=1.0e-12): ') + n_forward=raw_input(' Enter forward emission coefficient (default=0.0): ') + print "-----------------------------------------------------------" + if v_breakdown=="": v_breakdown="5.6" + if i_breakdown=="": i_breakdown="1.0e-2" + if i_sat=="": i_sat="1.0e-12" + if n_forward=="": n_forward="1.0" + schematicInfo.append(".model "+ compName+" zener(v_breakdown="+v_breakdown+" i_breakdown="+i_breakdown+" i_sat="+i_sat+" n_forward="+n_forward+")") + elif compType=="d_buffer": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Buffer "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Buffer "+compName + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + input_load=raw_input(' Enter input load capacitance (default=1e-12): ') + print "-----------------------------------------------------------" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + schematicInfo.append(".model "+ compName+" d_buffer(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") + elif compType=="d_inverter": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Inverter "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Inverter "+compName + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + input_load=raw_input(' Enter input load capacitance (default=1e-12): ') + print "-----------------------------------------------------------" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + schematicInfo.append(".model "+ compName+" d_inverter(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") + elif compType=="d_and": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* And "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for And "+compName + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + input_load=raw_input(' Enter input load capacitance (default=1e-12): ') + print "-----------------------------------------------------------" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + schematicInfo.append(".model "+ compName+" d_and(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") + elif compType=="d_nand": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Nand "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Nand "+compName + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + input_load=raw_input(' Enter input load capacitance (default=1e-12): ') + print "-----------------------------------------------------------" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + schematicInfo.append(".model "+ compName+" d_nand(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") + elif compType=="d_or": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* OR "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for OR "+compName + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + input_load=raw_input(' Enter input load capacitance (default=1e-12): ') + print "-----------------------------------------------------------" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + schematicInfo.append(".model "+ compName+" d_or(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") + elif compType=="d_nor": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* NOR "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for NOR "+compName + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + input_load=raw_input(' Enter input load capacitance (default=1e-12): ') + print "-----------------------------------------------------------" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + schematicInfo.append(".model "+ compName+" d_nor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") + elif compType=="d_xor": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* XOR "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for XOR "+compName + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + input_load=raw_input(' Enter input load capacitance (default=1e-12): ') + print "-----------------------------------------------------------" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + schematicInfo.append(".model "+ compName+" d_xor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") + elif compType=="d_xnor": + schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* XNOR "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for XNOR "+compName + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + input_load=raw_input(' Enter input load capacitance (default=1e-12): ') + print "-----------------------------------------------------------" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + if input_load=="": input_load="1e-12" + schematicInfo.append(".model "+ compName+" d_xnor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") + elif compType=="d_tristate": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Tristate "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Tristate "+compName + delay=raw_input(' Enter delay (default=1e-12): ') + input_load=raw_input(' Enter input load capacitance (default=1e-12): ') + enable_load=raw_input(' Enter enable load capacitance (default=1e-12): ') + print "-----------------------------------------------------------" + if delay=="": delay="1e-12" + if input_load=="": input_load="1e-12" + if enable_load=="": enable_load="1e-12" + schematicInfo.append(".model "+ compName+" d_tristate(delay="+delay+" enable_load="+enable_load+" input_load="+input_load+")") + elif compType=="d_pullup": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Pullup "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Pullup "+compName + load=raw_input(' Enter load capacitance (default=1e-12): ') + print "-----------------------------------------------------------" + if load=="": load="1e-12" + schematicInfo.append(".model "+ compName+" d_pullup(load="+load+")") + elif compType=="d_pulldown": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* Pullup "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for Pullup "+compName + load=raw_input(' Enter load capacitance (default=1e-12): ') + print "-----------------------------------------------------------" + if load=="": load="1e-12" + schematicInfo.append(".model "+ compName+" d_pulldown(load="+load+")") + elif compType=="d_srlatch": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* SR Latch "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for SR Latch "+compName + sr_delay=raw_input(' Enter input to set-reset delay (default=1e-12): ') + enable_delay=raw_input(' Enter enable delay (default=1e-12): ') + set_delay=raw_input(' Enter set delay (default=1e-12): ') + reset_delay=raw_input(' Enter reset delay (default=1e-12): ') + ic=raw_input(' Enter initial condition on output (default=0): ') + sr_load=raw_input(' Enter input to set-reset load (default=1e-12): ') + enable_load=raw_input(' Enter enable load (default=1e-12): ') + set_load=raw_input(' Enter set load (default=1e-12): ') + reset_load=raw_input(' Enter reset load (default=1e-12): ') + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + print "-----------------------------------------------------------" + if sr_delay=="": sr_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if sr_load=="": sr_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + schematicInfo.append(".model "+ compName+" d_srlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+sr_load="+sr_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+sr_delay="+sr_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") + elif compType=="d_jklatch": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* JK Latch "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for JK Latch "+compName + jk_delay=raw_input(' Enter input to j-k delay (default=1e-12): ') + enable_delay=raw_input(' Enter enable delay (default=1e-12): ') + set_delay=raw_input(' Enter set delay (default=1e-12): ') + reset_delay=raw_input(' Enter reset delay (default=1e-12): ') + ic=raw_input(' Enter initial condition on output (default=0): ') + jk_load=raw_input(' Enter input to j-k load (default=1e-12): ') + enable_load=raw_input(' Enter enable load (default=1e-12): ') + set_load=raw_input(' Enter set load (default=1e-12): ') + reset_load=raw_input(' Enter reset load (default=1e-12): ') + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + print "-----------------------------------------------------------" + if jk_delay=="": jk_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if jk_load=="": jk_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + schematicInfo.append(".model "+ compName+" d_jklatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+jk_load="+jk_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+jk_delay="+jk_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") + elif compType=="d_dlatch": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* D Latch "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for D Latch "+compName + data_delay=raw_input(' Enter input to data delay (default=1e-12): ') + enable_delay=raw_input(' Enter enable delay (default=1e-12): ') + set_delay=raw_input(' Enter set delay (default=1e-12): ') + reset_delay=raw_input(' Enter reset delay (default=1e-12): ') + ic=raw_input(' Enter initial condition on output (default=0): ') + data_load=raw_input(' Enter input to data load (default=1e-12): ') + enable_load=raw_input(' Enter enable load (default=1e-12): ') + set_load=raw_input(' Enter set load (default=1e-12): ') + reset_load=raw_input(' Enter reset load (default=1e-12): ') + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + print "-----------------------------------------------------------" + if data_delay=="": data_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if data_load=="": data_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + schematicInfo.append(".model "+ compName+" d_dlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+data_load="+data_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+data_delay="+data_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") + elif compType=="d_tlatch": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* T Latch "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for T Latch "+compName + t_delay=raw_input(' Enter input to t delay (default=1e-12): ') + enable_delay=raw_input(' Enter enable delay (default=1e-12): ') + set_delay=raw_input(' Enter set delay (default=1e-12): ') + reset_delay=raw_input(' Enter reset delay (default=1e-12): ') + ic=raw_input(' Enter initial condition on output (default=0): ') + t_load=raw_input(' Enter input to t load (default=1e-12): ') + enable_load=raw_input(' Enter enable load (default=1e-12): ') + set_load=raw_input(' Enter set load (default=1e-12): ') + reset_load=raw_input(' Enter reset load (default=1e-12): ') + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + print "-----------------------------------------------------------" + if t_delay=="": t_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if t_load=="": t_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + schematicInfo.append(".model "+ compName+" d_tlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+t_load="+t_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+t_delay="+t_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") + elif compType=="d_srff": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* SR Flip-Flop "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for SR Flip-Flop "+compName + clk_delay=raw_input(' Enter clk delay (default=1e-12): ') + set_delay=raw_input(' Enter set delay (default=1e-12): ') + reset_delay=raw_input(' Enter reset delay (default=1e-12): ') + ic=raw_input(' Enter initial condition on output (default=0): ') + sr_load=raw_input(' Enter input to set-reset load (default=1e-12): ') + clk_load=raw_input(' Enter clk load (default=1e-12): ') + set_load=raw_input(' Enter set load (default=1e-12): ') + reset_load=raw_input(' Enter reset load (default=1e-12): ') + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + print "-----------------------------------------------------------" + if clk_delay=="": clk_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if sr_load=="": sr_load="1e-12" + if clk_load=="": clk_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + schematicInfo.append(".model "+ compName+" d_srff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+sr_load="+sr_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") + elif compType=="d_jkff": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* JK Flip-Flop "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for JK Flip-Flop "+compName + clk_delay=raw_input(' Enter clk delay (default=1e-12): ') + set_delay=raw_input(' Enter set delay (default=1e-12): ') + reset_delay=raw_input(' Enter reset delay (default=1e-12): ') + ic=raw_input(' Enter initial condition on output (default=0): ') + jk_load=raw_input(' Enter input to j-k load (default=1e-12): ') + clk_load=raw_input(' Enter clk load (default=1e-12): ') + set_load=raw_input(' Enter set load (default=1e-12): ') + reset_load=raw_input(' Enter reset load (default=1e-12): ') + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + print "-----------------------------------------------------------" + if clk_delay=="": clk_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if jk_load=="": jk_load="1e-12" + if clk_load=="": clk_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + schematicInfo.append(".model "+ compName+" d_jkff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+jk_load="+jk_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") + elif compType=="d_dff": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* D Flip-Flop "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for D Flip-Flop "+compName + clk_delay=raw_input(' Enter clk delay (default=1e-12): ') + set_delay=raw_input(' Enter set delay (default=1e-12): ') + reset_delay=raw_input(' Enter reset delay (default=1e-12): ') + ic=raw_input(' Enter initial condition on output (default=0): ') + data_load=raw_input(' Enter input to data load (default=1e-12): ') + clk_load=raw_input(' Enter clk load (default=1e-12): ') + set_load=raw_input(' Enter set load (default=1e-12): ') + reset_load=raw_input(' Enter reset load (default=1e-12): ') + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + print "-----------------------------------------------------------" + if clk_delay=="": clk_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if data_load=="": data_load="1e-12" + if clk_load=="": clk_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + schematicInfo.append(".model "+ compName+" d_dff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+data_load="+data_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") + elif compType=="d_tff": + schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) + k=k+1 + schematicInfo.insert(index,"* T Flip-Flop "+compType) + print "-----------------------------------------------------------\n" + print "Add parameters for T Flip-Flip "+compName + clk_delay=raw_input(' Enter clk delay (default=1e-12): ') + set_delay=raw_input(' Enter set delay (default=1e-12): ') + reset_delay=raw_input(' Enter reset delay (default=1e-12): ') + ic=raw_input(' Enter initial condition on output (default=0): ') + t_load=raw_input(' Enter input to t load (default=1e-12): ') + clk_load=raw_input(' Enter clk load (default=1e-12): ') + set_load=raw_input(' Enter set load (default=1e-12): ') + reset_load=raw_input(' Enter reset load (default=1e-12): ') + rise_delay=raw_input(' Enter rise delay (default=1e-12): ') + fall_delay=raw_input(' Enter fall delay (default=1e-12): ') + print "-----------------------------------------------------------" + if t_delay=="": t_delay="1e-12" + if enable_delay=="": enable_delay="1e-12" + if set_delay=="": set_delay="1e-12" + if reset_delay=="": reset_delay="1e-12" + if ic=="": ic="0" + if t_load=="": t_load="1e-12" + if enable_load=="": enable_load="1e-12" + if set_load=="": set_load="1e-12" + if reset_load=="": reset_load="1e-12" + if rise_delay=="": rise_delay="1e-12" + if fall_delay=="": fall_delay="1e-12" + schematicInfo.append(".model "+ compName+" d_tff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+t_load="+t_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") + elif compType=="vplot1": + outputOption.append("plot v("+words[1]+")\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vplot8_1": + outputOption.append("plot ") + for i in range(1,len(words)-1): + outputOption.append("v("+words[i]+") ") + outputOption.append("\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vprint1": + outputOption.append("print v("+words[1]+")\n") + schematicInfo.insert(index,"* Printing option "+compType) + elif compType=="vprint8_1": + outputOption.append("print ") + for i in range(1,len(words)-1): + outputOption.append("v("+words[i]+") ") + outputOption.append("\n") + schematicInfo.insert(index,"* Printing option "+compType) + elif compType=="vplot": + outputOption.append("plot v("+words[1]+")-v("+words[2]+")\n") + schematicInfo.insert(index,"* Plotting option "+compType) + elif compType=="vplot8": + outputOption.append("plot ") + for i in range(0,len(words)/2-1): + if words[i+1]=="0": + outputOption.append("-v("+words[i+len(words)/2]+") ") + elif words[i+len(words)/2]=="0": + outputOption.append("v("+words[i+1]+") ") + else: + outputOption.append("v("+words[i+1]+")-v("+words[i+len(words)/2]+") ") + outputOption.append("\n") + elif compType=="vprint": + outputOption.append("print v("+words[1]+")-v("+words[2]+")\n") + schematicInfo.insert(index,"* Printting option "+compType) + elif compType=="iplot": + schematicInfo.insert(index,"V_"+words[0]+" "+words[1]+" "+words[2]+" 0") + outputOption.append("plot i(V_"+words[0]+")\n") + elif compType=="ic": + print "-----------------------------------------------------------" + ic=raw_input(' Enter initial condition on output (default=0): ') + print "-----------------------------------------------------------" + if ic=="": ic="0" + schematicInfo.insert(index,".ic v("+words[1]+")="+ic) + elif compType=="transfo": + schematicInfo.append("a"+str(k)+" ("+words[1]+" "+words[2]+") (2mmf "+words[2]+") primary") + k=k+1 + print "-----------------------------------------------------------\n" + print "Add parameters for primary " + num_turns=raw_input(' Enter the number of turns in primary (default=310): ') + print "-----------------------------------------------------------\n" + if num_turns=="": num_turns="310" + schematicInfo.append(".model primary lcouple (num_turns = "+num_turns+ ")") + schematicInfo.append("a"+str(k)+" (2mmf 3mmf) iron_core") + k=k+1 + print "-----------------------------------------------------------\n" + inp1=raw_input(' Do you want to populate the B-H table?y/n (if n, default values will be used): ') + if inp1=='y' or inp1=='Y': + print "Enter the values in the H, B table to construct B-H curve " + inp="y" + h_array= "H_array = [ " + b_array = "B_array = [ " + while inp=="y": + h1=raw_input(' Enter H value: ') + h_array = h_array+ h1+" " + b1=raw_input(' Enter corresponding B value: ') + b_array = b_array+ b1+" " + inp=raw_input(' Do you want to continue(y/n): ') + modelline = h_array+" ] " + b_array+" ]" + else: + modelline = "H_array = [-1000 -500 -375 -250 -188 -125 -63 0 63 125 188 250 375 500 1000] B_array = [-3.13e-3 -2.63e-3 -2.33e-3 -1.93e-3 -1.5e-3 -6.25e-4 -2.5e-4 0 2.5e-4 6.25e-4 1.5e-3 1.93e-3 2.33e-3 2.63e-3 3.13e-3]" + area =raw_input( 'Enter the cross-sectional area of the core: (default = 1)') + length =raw_input( 'Enter the core length: (default = 0.01)') + print "----------------------------------------------\n" + if area=="": area="1" + if length=="":length="0.01" + schematicInfo.append(".model iron_core core ("+modelline+" area = "+area+" length = "+length +")") + schematicInfo.append("a"+str(k)+" ("+words[4]+" "+words[3]+") (3mmf "+words[3]+") secondary") + k=k+1 + print "-----------------------------------------------------------\n" + print "Add parameters for secondary " + num_turns2=raw_input(' Enter the number of turns in secondary (default=620): ') + print "-----------------------------------------------------------\n" + if num_turns2=="": num_turns2="620" + schematicInfo.append(".model secondary lcouple (num_turns = "+num_turns2+ ")") + else: + schematicInfo.insert(index,compline) + # Update option information + return schematicInfo,outputOption + +# Accept input file name from user if not provided +if len(sys.argv) < 2: + filename=raw_input('Enter file name: ') +else: + filename=sys.argv[1] + +if len(sys.argv) < 3: + finalNetlist=int(raw_input('Do you want to create final file: ')) +else: + finalNetlist=int(sys.argv[2]) + +print "==================================" +print "Kicad to Ngspice netlist converter " +print "==================================" +print "converting "+filename + +# Read the netlist +lines=readNetlist(filename) + +# Construct parameter information +param=readParamInfo(lines) + +# Replace parameter with values +netlist, infoline=preprocessNetlist(lines,param) + +# Separate option and schematic information +optionInfo, schematicInfo=separateNetlistInfo(netlist) + +if finalNetlist: + # Insert analysis from file + optionInfo=addAnalysis(optionInfo) + +# Find the analysis option +analysisOption=[] +outputOption=[] +initialCondOption=[] +simulatorOption=[] +includeOption=[] +model=[] + +for eachline in optionInfo: + words=eachline.split() + option=words[0] + if (option=='.ac' or option=='.dc' or + option=='.disto' or option=='.noise' or + option=='.op' or option=='.pz' or + option=='.sens' or option=='.tf' or + option=='.tran'): + analysisOption.append(eachline+'\n') + print eachline + elif (option=='.save' or option=='.print' or + option=='.plot' or option=='.four'): + eachline=eachline.strip('.') + outputOption.append(eachline+'\n') + elif (option=='.nodeset' or option=='.ic'): + initialCondOption.append(eachline+'\n') + elif option=='.option': + simulatorOption.append(eachline+'\n') + elif (option=='.include' or option=='.lib'): + includeOption.append(eachline+'\n') + elif (option=='.model'): + model.append(eachline+'\n') + elif option=='.end': + continue; + +# Find the various model library required +modelList=[] +subcktList=[] +for eachline in schematicInfo: + words=eachline.split() + if eachline[0]=='d': + modelName=words[3] + if modelName in modelList: + continue + modelList.append(modelName) + elif eachline[0]=='q': + modelName=words[4] + index=schematicInfo.index(eachline) + schematicInfo.remove(eachline) + schematicInfo.insert(index,words[0]+" "+words[3]+" "+words[2]+" "+words[1]+" "+words[4]) + if modelName in modelList: + continue + modelList.append(modelName) + elif eachline[0]=='m': + modelName=words[4] + index=schematicInfo.index(eachline) + schematicInfo.remove(eachline) + width=raw_input(' Enter width of mosfet '+words[0]+'(default=100u):') + length=raw_input(' Enter length of mosfet '+words[0]+'(default=5u):') + multiplicative_factor=raw_input(' Enter multiplicative factor of mosfet '+words[0]+'(default=1):') + AD=raw_input(' Enter drain area, AD of mosfet '+words[0]+'(default=5*(L/2)*W): ') + AS=raw_input(' Enter source area, AS of mosfet '+words[0]+'(default=5*(L/2)*W): ') + PD=raw_input(' Enter drain perimeter, PD of mosfet '+words[0]+'(default=2*W+10*L/2): ') + PS=raw_input(' Enter source perimeter, PS of mosfet '+words[0]+'(default=2*W+10*L/2): ') + if width=="": width="0.0001" + if multiplicative_factor=="": multiplicative_factor="1" + if length=="": length="0.000005" + if PD=="": PD = 2*float(width)+10*float(length)/2 + if PS=="": PS = 2*float(width)+10*float(length)/2 + if AD=="": AD = 5*(float(length)/2)*float(width) + if AS=="": AS = 5*(float(length)/2)*float(width) + + schematicInfo.insert(index,words[0]+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[3]+" "+words[4]+" "+'M='+multiplicative_factor+" "+'L='+length+" "+'W='+width+" "+'PD='+str(PD)+" "+'PS='+str(PS)+" "+'AD='+str(AD)+" "+'AS='+str(AS)) + if modelName in modelList: + continue + modelList.append(modelName) + elif eachline[0]=='j': + modelName=words[4] + index=schematicInfo.index(eachline) + schematicInfo.remove(eachline) + schematicInfo.insert(index,words[0]+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]) + if modelName in modelList: + continue + modelList.append(modelName) + elif eachline[0]=='x': + subcktName=words[len(words)-1] + if subcktName in subcktList: + continue + subcktList.append(subcktName) + +# Find current through components +schematicInfo,outputOption=findCurrent(schematicInfo,outputOption) + +# Add parameter to sources +schematicInfo=insertSpecialSourceParam(schematicInfo) + +schematicInfo,outputOption=convertICintoBasicBlocks(schematicInfo,outputOption) + +# Add newline in the schematic information +for i in range(len(schematicInfo),0,-1): + schematicInfo.insert(i,'\n') + +outfile=filename+".out" +cktfile=filename+".ckt" +out=open(outfile,"w") +ckt=open(cktfile,"w") +out.writelines(infoline) +out.writelines('\n') +ckt.writelines(infoline) +ckt.writelines('\n') + +for modelName in modelList: + if os.path.exists(modelName+".lib"): + out.writelines('.include '+modelName+'.lib\n') + ckt.writelines('.include '+modelName+'.lib\n') + +for subcktName in subcktList: + out.writelines('.include '+subcktName+'.sub\n') + ckt.writelines('.include '+subcktName+'.sub\n') + +if finalNetlist: + sections=[simulatorOption, initialCondOption, schematicInfo, analysisOption] +else: + sections=[simulatorOption, initialCondOption, schematicInfo] +for section in sections: + if len(section) == 0: + continue + else: + out.writelines('\n') + out.writelines(section) + ckt.writelines('\n') + ckt.writelines(section) + +if finalNetlist: + out.writelines('\n* Control Statements \n') + out.writelines('.control\n') + out.writelines('run\n') + out.writelines(outputOption) + outputOption1=[] + for option in outputOption: + if (("plot" in option) or ("print" in option)): + outputOption1.append("."+option) + else: + outputOption1.append(option) + ckt.writelines(outputOption1) + out.writelines('.endc\n') + out.writelines('.end\n') + ckt.writelines('.end\n') + +out.close() +ckt.close() + +print "The ngspice netlist has been written in "+filename+".out" +print "The scilab netlist has been written in "+filename+".ckt" +dummy=raw_input('Press Enter to quit') diff --git a/FreeEDA/library/analogSpice.bak b/FreeEDA/library/analogSpice.bak new file mode 100644 index 0000000..302e12e --- /dev/null +++ b/FreeEDA/library/analogSpice.bak @@ -0,0 +1,185 @@ +EESchema-LIBRARY Version 2.3 Date: Friday 19 October 2012 06:30:49 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# CP +# +DEF CP C 0 10 N N 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "CP" 50 -100 50 H V L CNN +ALIAS CAPAPOL +$FPLIST + CP* + SM* +$ENDFPLIST +DRAW +P 4 0 1 8 -100 50 -100 -50 100 -50 100 50 N +P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F +X ~ 1 0 200 150 D 40 40 1 1 P +X ~ 2 0 -200 150 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# INDUCTOR +# +DEF INDUCTOR L 0 40 N N 1 F N +F0 "L" -50 0 40 V V C CNN +F1 "INDUCTOR" 100 0 40 V V C CNN +DRAW +A 0 -150 50 -889 889 0 1 0 N 1 -199 1 -100 +A 0 -49 51 -889 889 0 1 0 N 1 -99 1 2 +A 0 51 51 -889 889 0 1 0 N 1 1 1 102 +A 0 148 48 -889 889 0 1 0 N 1 101 1 196 +X 1 1 0 300 100 D 70 70 1 1 P +X 2 2 0 -300 100 U 70 70 1 1 P +ENDDRAW +ENDDEF +# +# MOS_N +# +DEF MOS_N M 0 0 N Y 1 F N +F0 "M" 10 170 60 H V R CNN +F1 "MOS_N" 10 -150 60 H V R CNN +ALIAS MOSFET_N +DRAW +P 2 0 1 8 -50 -100 -50 100 N +P 2 0 1 10 0 -150 0 150 N +P 2 0 1 0 100 -100 0 -100 N +P 2 0 1 0 100 100 0 100 N +P 3 0 1 8 100 -100 100 0 50 0 N +P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N +X D D 100 200 100 D 40 40 1 1 P +X G G -200 0 150 R 40 40 1 1 I +X S S 100 -200 100 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# MOS_P +# +DEF MOS_P M 0 40 Y N 1 F N +F0 "M" 0 190 60 H V R CNN +F1 "MOS_P" 0 -180 60 H V R CNN +ALIAS MOSFET_P +DRAW +P 2 0 1 8 -50 -100 -50 100 N +P 2 0 1 10 0 -150 0 150 N +P 2 0 1 8 30 0 0 0 N +P 2 0 1 0 100 -100 0 -100 N +P 2 0 1 0 100 100 0 100 N +P 3 0 1 0 80 0 100 0 100 -100 N +P 5 0 1 8 30 40 30 -30 80 0 30 40 30 40 N +X D D 100 200 100 D 40 40 1 1 P +X G G -200 0 150 R 40 40 1 1 I +X S S 100 -200 100 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PNP +# +DEF PNP Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 60 H V R CNN +F1 "PNP" 0 150 60 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 F +P 3 0 1 0 25 -25 0 0 0 0 N +P 3 0 1 0 100 -100 65 -65 65 -65 N +P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# Port +# +DEF Port U 0 0 N Y 8 F N +F0 "U" -20 -50 30 H V C CNN +F1 "Port" 0 0 30 H V C CNN +DRAW +A -425 -475 708 478 421 0 1 0 N 50 50 100 0 +A -225 275 426 -497 -402 0 1 0 N 50 -50 100 0 +S -50 50 50 -50 0 1 0 N +X p 1 200 0 100 L 30 30 1 1 B +X p 1 200 0 100 L 30 30 2 1 B +X p 1 200 0 100 L 30 30 3 1 B +X p 1 200 0 100 L 30 30 4 1 B +X p 1 200 0 100 L 30 30 5 1 B +X p 1 200 0 100 L 30 30 6 1 B +X p 1 200 0 100 L 30 30 7 1 B +X p 1 200 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/analogSpice.bck b/FreeEDA/library/analogSpice.bck new file mode 100644 index 0000000..c1326b4 --- /dev/null +++ b/FreeEDA/library/analogSpice.bck @@ -0,0 +1,50 @@ +EESchema-DOCLIB Version 2.0 Date: Friday 19 October 2012 06:30:49 PM IST +# +$CMP CAPAPOL +D Condensateur polarise +$ENDCMP +# +$CMP CP +D Condensateur polarise +$ENDCMP +# +$CMP DIODE +D Diode simple +K DEV DIODE +$ENDCMP +# +$CMP MOS_N +F transistors/mos/*.* +$ENDCMP +# +$CMP MOS_P +F transistors/mos/*.* +$ENDCMP +# +$CMP MOSFET_N +F transistors/mos/*.* +$ENDCMP +# +$CMP MOSFET_P +F transistors/mos/*.* +$ENDCMP +# +$CMP NPN +F transistors/bipolar/*.* +$ENDCMP +# +$CMP PNP +F transistors/bipolar/*.* +$ENDCMP +# +$CMP Port +D Port Connection +K U port +$ENDCMP +# +$CMP R +D Resistance +K R DEV +$ENDCMP +# +#End Doc Library diff --git a/FreeEDA/library/analogSpice.dcm b/FreeEDA/library/analogSpice.dcm new file mode 100644 index 0000000..a409fcd --- /dev/null +++ b/FreeEDA/library/analogSpice.dcm @@ -0,0 +1,45 @@ +EESchema-DOCLIB Version 2.0 Date: Saturday 20 October 2012 08:45:14 PM IST +# +$CMP CAPAPOL +D Condensateur polarise +$ENDCMP +# +$CMP CP +D Condensateur polarise +$ENDCMP +# +$CMP DIODE +D Diode simple +K DEV DIODE +$ENDCMP +# +$CMP MOS_N +F transistors/mos/*.* +$ENDCMP +# +$CMP MOS_P +F transistors/mos/*.* +$ENDCMP +# +$CMP MOSFET_N +F transistors/mos/*.* +$ENDCMP +# +$CMP MOSFET_P +F transistors/mos/*.* +$ENDCMP +# +$CMP NPN +F transistors/bipolar/*.* +$ENDCMP +# +$CMP PNP +F transistors/bipolar/*.* +$ENDCMP +# +$CMP R +D Resistance +K R DEV +$ENDCMP +# +#End Doc Library diff --git a/FreeEDA/library/analogSpice.lib b/FreeEDA/library/analogSpice.lib new file mode 100644 index 0000000..881d349 --- /dev/null +++ b/FreeEDA/library/analogSpice.lib @@ -0,0 +1,165 @@ +EESchema-LIBRARY Version 2.3 Date: Saturday 20 October 2012 08:45:14 PM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# CP +# +DEF CP C 0 10 N N 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "CP" 50 -100 50 H V L CNN +ALIAS CAPAPOL +$FPLIST + CP* + SM* +$ENDFPLIST +DRAW +P 4 0 1 8 -100 50 -100 -50 100 -50 100 50 N +P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F +X ~ 1 0 200 150 D 40 40 1 1 P +X ~ 2 0 -200 150 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# DIODE +# +DEF DIODE D 0 40 N N 1 F N +F0 "D" 0 100 40 H V C CNN +F1 "DIODE" 0 -100 40 H V C CNN +$FPLIST + D? + S* +$ENDFPLIST +DRAW +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# INDUCTOR +# +DEF INDUCTOR L 0 40 N N 1 F N +F0 "L" -50 0 40 V V C CNN +F1 "INDUCTOR" 100 0 40 V V C CNN +DRAW +A 0 -150 50 -889 889 0 1 0 N 1 -199 1 -100 +A 0 -49 51 -889 889 0 1 0 N 1 -99 1 2 +A 0 51 51 -889 889 0 1 0 N 1 1 1 102 +A 0 148 48 -889 889 0 1 0 N 1 101 1 196 +X 1 1 0 300 100 D 70 70 1 1 P +X 2 2 0 -300 100 U 70 70 1 1 P +ENDDRAW +ENDDEF +# +# MOS_N +# +DEF MOS_N M 0 0 N Y 1 F N +F0 "M" 10 170 60 H V R CNN +F1 "MOS_N" 10 -150 60 H V R CNN +ALIAS MOSFET_N +DRAW +P 2 0 1 8 -50 -100 -50 100 N +P 2 0 1 10 0 -150 0 150 N +P 2 0 1 0 100 -100 0 -100 N +P 2 0 1 0 100 100 0 100 N +P 3 0 1 8 100 -100 100 0 50 0 N +P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N +X D D 100 200 100 D 40 40 1 1 P +X G G -200 0 150 R 40 40 1 1 I +X S S 100 -200 100 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# MOS_P +# +DEF MOS_P M 0 40 Y N 1 F N +F0 "M" 0 190 60 H V R CNN +F1 "MOS_P" 0 -180 60 H V R CNN +ALIAS MOSFET_P +DRAW +P 2 0 1 8 -50 -100 -50 100 N +P 2 0 1 10 0 -150 0 150 N +P 2 0 1 8 30 0 0 0 N +P 2 0 1 0 100 -100 0 -100 N +P 2 0 1 0 100 100 0 100 N +P 3 0 1 0 80 0 100 0 100 -100 N +P 5 0 1 8 30 40 30 -30 80 0 30 40 30 40 N +X D D 100 200 100 D 40 40 1 1 P +X G G -200 0 150 R 40 40 1 1 I +X S S 100 -200 100 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# NPN +# +DEF NPN Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 50 H V R CNN +F1 "NPN" 0 150 50 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 N +P 3 0 1 0 50 -50 0 0 0 0 N +P 3 0 1 0 90 -90 100 -100 100 -100 N +P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PNP +# +DEF PNP Q 0 0 Y Y 1 F N +F0 "Q" 0 -150 60 H V R CNN +F1 "PNP" 0 150 60 H V R CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 0 0 100 100 N +P 3 0 1 10 0 75 0 -75 0 -75 F +P 3 0 1 0 25 -25 0 0 0 0 N +P 3 0 1 0 100 -100 65 -65 65 -65 N +P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F +X E 1 100 -200 100 U 40 40 1 1 P +X B 2 -200 0 200 R 40 40 1 1 I +X C 3 100 200 100 D 40 40 1 1 P +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/analogXSpice.bak b/FreeEDA/library/analogXSpice.bak new file mode 100644 index 0000000..17b9bff --- /dev/null +++ b/FreeEDA/library/analogXSpice.bak @@ -0,0 +1,151 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 11:31:12 PM IST +#encoding utf-8 +# +# AnalogSwitch +# +DEF AnalogSwitch U 0 20 Y Y 1 F N +F0 "U" -200 50 30 H V C CNN +F1 "AnalogSwitch" 0 0 30 H V C CNN +DRAW +T 0 100 -100 30 0 0 0 cntl_in Normal 0 C C +S -150 50 150 -50 0 1 0 N +X ~ 1 0 -200 150 U 25 25 1 1 I +X ~ 2 -300 0 150 R 25 25 1 1 B +X ~ 3 300 0 150 L 25 25 1 1 B +ENDDRAW +ENDDEF +# +# ControlledLimiter +# +DEF ControlledLimiter U 0 20 Y Y 1 F N +F0 "U" 150 50 40 H V C CNN +F1 "ControlledLimiter" 0 100 40 H V C CNN +DRAW +P 4 0 1 0 -150 150 -150 -150 150 0 -150 150 N +X in 1 -300 0 150 R 30 30 1 1 I +X Ul 2 -50 250 150 D 30 30 1 1 I +X Ll 3 -50 -250 150 U 30 30 1 1 I +X out 4 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# Divider +# +DEF Divider U 0 20 Y Y 1 F N +F0 "U" 100 150 40 H V C CNN +F1 "Divider" 100 50 40 H V C CNN +DRAW +S -150 100 150 -100 0 1 0 N +X num 1 -300 50 150 R 30 30 1 1 I +X den 2 -300 -50 150 R 30 30 1 1 I +X out 3 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# GAIN +# +DEF GAIN U 0 20 Y Y 1 F N +F0 "U" 0 100 40 H V C CNN +F1 "GAIN" 50 50 40 H V C CNN +DRAW +P 4 0 1 0 -100 100 -100 -100 100 0 -100 100 N +X in 1 -250 0 150 R 30 30 1 1 I +X out 2 250 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# INTEGRATOR +# +DEF INTEGRATOR U 0 20 Y Y 1 F N +F0 "U" 0 0 40 H V C CNN +F1 "INTEGRATOR" 50 100 40 H V C CNN +DRAW +P 4 0 1 0 -150 -150 -150 150 150 0 -150 -150 N +X in 1 -300 0 150 R 30 30 1 1 I +X out 2 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# LIMIT +# +DEF LIMIT U 0 20 Y Y 1 F N +F0 "U" 0 100 30 H V C CNN +F1 "LIMIT" 0 0 30 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in 1 -300 0 150 R 25 25 1 1 I +X out 2 300 0 150 L 25 25 1 1 O +ENDDRAW +ENDDEF +# +# LIMIT8 +# +DEF LIMIT8 U 0 40 Y Y 8 F N +F0 "U" 0 100 30 H V C CNN +F1 "LIMIT8" 0 0 30 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in 1 -300 0 150 R 25 25 1 1 I +X out 9 300 0 150 L 25 25 1 1 O +X in 2 -300 0 150 R 25 25 2 1 I +X out 10 300 0 150 L 25 25 2 1 O +X in 3 -300 0 150 R 25 25 3 1 I +X out 11 300 0 150 L 25 25 3 1 O +X in 4 -300 0 150 R 25 25 4 1 I +X out 12 300 0 150 L 25 25 4 1 O +X in 5 -300 0 150 R 25 25 5 1 I +X out 13 300 0 150 L 25 25 5 1 O +X in 6 -300 0 150 R 25 25 6 1 I +X out 14 300 0 150 L 25 25 6 1 O +X in 7 -300 0 150 R 25 25 7 1 I +X out 15 300 0 150 L 25 25 7 1 O +X in 8 -300 0 150 R 25 25 8 1 I +X out 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# Multiplier +# +DEF Multiplier U 0 20 Y Y 1 F N +F0 "U" 100 150 40 H V C CNN +F1 "Multiplier" 100 50 40 H V C CNN +DRAW +S -150 100 150 -100 0 1 0 N +X in1 1 -300 50 150 R 30 30 1 1 I +X in2 2 -300 -50 150 R 30 30 1 1 I +X out 3 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# SUMMER +# +DEF SUMMER U 0 20 Y Y 1 F N +F0 "U" 100 150 40 H V C CNN +F1 "SUMMER" 100 50 40 H V C CNN +DRAW +S -150 100 150 -100 0 1 0 N +X in1 1 -300 50 150 R 30 30 1 1 I +X in2 2 -300 -50 150 R 30 30 1 1 I +X out 3 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# ZENER +# +DEF ZENER U 0 40 N N 1 F N +F0 "U" 0 100 50 H V C CNN +F1 "ZENER" 0 -100 40 H V C CNN +$FPLIST + D? + SO* + SM* +$ENDFPLIST +DRAW +P 5 0 1 0 50 0 -50 50 -50 -50 50 0 50 0 F +P 5 0 1 8 70 50 50 30 50 -30 30 -50 30 -50 N +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/analogXSpice.bck b/FreeEDA/library/analogXSpice.bck new file mode 100644 index 0000000..4e105c7 --- /dev/null +++ b/FreeEDA/library/analogXSpice.bck @@ -0,0 +1,8 @@ +EESchema-DOCLIB Version 2.0 Date: Wednesday 19 December 2012 11:31:12 PM IST +# +$CMP ZENER +D Diode zener +K DEV DIODE +$ENDCMP +# +#End Doc Library diff --git a/FreeEDA/library/analogXSpice.dcm b/FreeEDA/library/analogXSpice.dcm new file mode 100644 index 0000000..cefed4e --- /dev/null +++ b/FreeEDA/library/analogXSpice.dcm @@ -0,0 +1,8 @@ +EESchema-DOCLIB Version 2.0 Date: Wednesday 19 December 2012 11:31:52 PM IST +# +$CMP ZENER +D Diode zener +K DEV DIODE +$ENDCMP +# +#End Doc Library diff --git a/FreeEDA/library/analogXSpice.lib b/FreeEDA/library/analogXSpice.lib new file mode 100644 index 0000000..13e6a63 --- /dev/null +++ b/FreeEDA/library/analogXSpice.lib @@ -0,0 +1,163 @@ +EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 11:31:52 PM IST +#encoding utf-8 +# +# AnalogSwitch +# +DEF AnalogSwitch U 0 20 Y Y 1 F N +F0 "U" -200 50 30 H V C CNN +F1 "AnalogSwitch" 0 0 30 H V C CNN +DRAW +T 0 100 -100 30 0 0 0 cntl_in Normal 0 C C +S -150 50 150 -50 0 1 0 N +X ~ 1 0 -200 150 U 25 25 1 1 I +X ~ 2 -300 0 150 R 25 25 1 1 B +X ~ 3 300 0 150 L 25 25 1 1 B +ENDDRAW +ENDDEF +# +# ControlledLimiter +# +DEF ControlledLimiter U 0 20 Y Y 1 F N +F0 "U" 150 50 40 H V C CNN +F1 "ControlledLimiter" 0 100 40 H V C CNN +DRAW +P 4 0 1 0 -150 150 -150 -150 150 0 -150 150 N +X in 1 -300 0 150 R 30 30 1 1 I +X Ul 2 -50 250 150 D 30 30 1 1 I +X Ll 3 -50 -250 150 U 30 30 1 1 I +X out 4 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# differentiator +# +DEF differentiator U 0 20 Y Y 1 F N +F0 "U" 0 0 40 H V C CNN +F1 "differentiator" 50 100 40 H V C CNN +DRAW +P 4 0 1 0 -150 -150 -150 150 150 0 -150 -150 N +X in 1 -300 0 150 R 30 30 1 1 I +X out 2 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# Divider +# +DEF Divider U 0 20 Y Y 1 F N +F0 "U" 100 150 40 H V C CNN +F1 "Divider" 100 50 40 H V C CNN +DRAW +S -150 100 150 -100 0 1 0 N +X num 1 -300 50 150 R 30 30 1 1 I +X den 2 -300 -50 150 R 30 30 1 1 I +X out 3 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# GAIN +# +DEF GAIN U 0 20 Y Y 1 F N +F0 "U" 0 100 40 H V C CNN +F1 "GAIN" 50 50 40 H V C CNN +DRAW +P 4 0 1 0 -100 100 -100 -100 100 0 -100 100 N +X in 1 -250 0 150 R 30 30 1 1 I +X out 2 250 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# INTEGRATOR +# +DEF INTEGRATOR U 0 20 Y Y 1 F N +F0 "U" 0 0 40 H V C CNN +F1 "INTEGRATOR" 50 100 40 H V C CNN +DRAW +P 4 0 1 0 -150 -150 -150 150 150 0 -150 -150 N +X in 1 -300 0 150 R 30 30 1 1 I +X out 2 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# LIMIT +# +DEF LIMIT U 0 20 Y Y 1 F N +F0 "U" 0 100 30 H V C CNN +F1 "LIMIT" 0 0 30 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in 1 -300 0 150 R 25 25 1 1 I +X out 2 300 0 150 L 25 25 1 1 O +ENDDRAW +ENDDEF +# +# LIMIT8 +# +DEF LIMIT8 U 0 40 Y Y 8 F N +F0 "U" 0 100 30 H V C CNN +F1 "LIMIT8" 0 0 30 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in 1 -300 0 150 R 25 25 1 1 I +X out 9 300 0 150 L 25 25 1 1 O +X in 2 -300 0 150 R 25 25 2 1 I +X out 10 300 0 150 L 25 25 2 1 O +X in 3 -300 0 150 R 25 25 3 1 I +X out 11 300 0 150 L 25 25 3 1 O +X in 4 -300 0 150 R 25 25 4 1 I +X out 12 300 0 150 L 25 25 4 1 O +X in 5 -300 0 150 R 25 25 5 1 I +X out 13 300 0 150 L 25 25 5 1 O +X in 6 -300 0 150 R 25 25 6 1 I +X out 14 300 0 150 L 25 25 6 1 O +X in 7 -300 0 150 R 25 25 7 1 I +X out 15 300 0 150 L 25 25 7 1 O +X in 8 -300 0 150 R 25 25 8 1 I +X out 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# Multiplier +# +DEF Multiplier U 0 20 Y Y 1 F N +F0 "U" 100 150 40 H V C CNN +F1 "Multiplier" 100 50 40 H V C CNN +DRAW +S -150 100 150 -100 0 1 0 N +X in1 1 -300 50 150 R 30 30 1 1 I +X in2 2 -300 -50 150 R 30 30 1 1 I +X out 3 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# SUMMER +# +DEF SUMMER U 0 20 Y Y 1 F N +F0 "U" 100 150 40 H V C CNN +F1 "SUMMER" 100 50 40 H V C CNN +DRAW +S -150 100 150 -100 0 1 0 N +X in1 1 -300 50 150 R 30 30 1 1 I +X in2 2 -300 -50 150 R 30 30 1 1 I +X out 3 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# ZENER +# +DEF ZENER U 0 40 N N 1 F N +F0 "U" 0 100 50 H V C CNN +F1 "ZENER" 0 -100 40 H V C CNN +$FPLIST + D? + SO* + SM* +$ENDFPLIST +DRAW +P 5 0 1 0 50 0 -50 50 -50 -50 50 0 50 0 F +P 5 0 1 8 70 50 50 30 50 -30 30 -50 30 -50 N +X A 1 -200 0 150 R 40 40 1 1 P +X K 2 200 0 150 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/convergenceAidSpice.bak b/FreeEDA/library/convergenceAidSpice.bak new file mode 100644 index 0000000..917157d --- /dev/null +++ b/FreeEDA/library/convergenceAidSpice.bak @@ -0,0 +1,16 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 10 December 2012 09:12:56 AM IST +#encoding utf-8 +# +# IC +# +DEF IC U? 0 0 Y N 1 F N +F0 "U?" 0 270 30 H V C CNN +F1 "IC" 0 230 30 H V C CNN +DRAW +X ic 1 0 0 0 U 20 20 0 0 P +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/convergenceAidSpice.bck b/FreeEDA/library/convergenceAidSpice.bck new file mode 100644 index 0000000..b5b0560 --- /dev/null +++ b/FreeEDA/library/convergenceAidSpice.bck @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 Date: Monday 10 December 2012 09:12:56 AM IST +# +#End Doc Library diff --git a/FreeEDA/library/convergenceAidSpice.dcm b/FreeEDA/library/convergenceAidSpice.dcm new file mode 100644 index 0000000..554f862 --- /dev/null +++ b/FreeEDA/library/convergenceAidSpice.dcm @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 Date: Monday 10 December 2012 09:16:36 AM IST +# +#End Doc Library diff --git a/FreeEDA/library/convergenceAidSpice.lib b/FreeEDA/library/convergenceAidSpice.lib new file mode 100644 index 0000000..c3a2f35 --- /dev/null +++ b/FreeEDA/library/convergenceAidSpice.lib @@ -0,0 +1,16 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 10 December 2012 09:16:36 AM IST +#encoding utf-8 +# +# IC +# +DEF IC U? 0 0 Y N 1 F N +F0 "U?" 0 270 30 H V C CNN +F1 "IC" 0 230 30 H V C CNN +DRAW +X ic 1 0 0 0 U 20 20 0 0 P +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/converterSpice.bak b/FreeEDA/library/converterSpice.bak new file mode 100644 index 0000000..a40ead7 --- /dev/null +++ b/FreeEDA/library/converterSpice.bak @@ -0,0 +1,54 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 20 November 2012 09:07:15 AM IST +#encoding utf-8 +# +# ADC +# +DEF ADC U 0 40 Y Y 1 F N +F0 "U" 0 150 60 H V C CNN +F1 "ADC" 0 -50 60 H V C CNN +DRAW +S 200 -100 -150 100 0 1 0 N +X A 1 -450 0 300 R 50 50 1 1 I +X D 2 500 0 300 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# ADC8 +# +DEF ADC8 U 0 10 Y Y 8 L N +F0 "U" -100 100 40 H V C CNN +F1 "ADC8" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in1 1 -300 0 150 R 25 25 1 1 I +X out1 9 300 0 150 L 25 25 1 1 O +X in2 2 -300 0 150 R 25 25 2 1 I +X out2 10 300 0 150 L 25 25 2 1 O +X in3 3 -300 0 150 R 25 25 3 1 I +X out3 11 300 0 150 L 25 25 3 1 O +X in4 4 -300 0 150 R 25 25 4 1 I +X out4 12 300 0 150 L 25 25 4 1 O +X in5 5 -300 0 150 R 25 25 5 1 I +X out5 13 300 0 150 L 25 25 5 1 O +X in6 6 -300 0 150 R 25 25 6 1 I +X out6 14 300 0 150 L 25 25 6 1 O +X in7 7 -300 0 150 R 25 25 7 1 I +X out7 15 300 0 150 L 25 25 7 1 O +X in8 8 -300 0 150 R 25 25 8 1 I +X out8 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# DAC +# +DEF DAC U 0 40 Y Y 1 F N +F0 "U" 0 150 60 H V C CNN +F1 "DAC" 0 -50 60 H V C CNN +DRAW +S 200 -100 -150 100 0 1 0 N +X D 1 -450 0 300 R 50 50 1 1 I +X A 2 500 0 300 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/converterSpice.bck b/FreeEDA/library/converterSpice.bck new file mode 100644 index 0000000..8d08b40 --- /dev/null +++ b/FreeEDA/library/converterSpice.bck @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 Date: Tuesday 20 November 2012 09:07:16 AM IST +# +#End Doc Library diff --git a/FreeEDA/library/converterSpice.dcm b/FreeEDA/library/converterSpice.dcm new file mode 100644 index 0000000..37c6a47 --- /dev/null +++ b/FreeEDA/library/converterSpice.dcm @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 Date: Tuesday 20 November 2012 09:07:52 AM IST +# +#End Doc Library diff --git a/FreeEDA/library/converterSpice.lib b/FreeEDA/library/converterSpice.lib new file mode 100644 index 0000000..7e8b371 --- /dev/null +++ b/FreeEDA/library/converterSpice.lib @@ -0,0 +1,80 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 20 November 2012 09:07:52 AM IST +#encoding utf-8 +# +# ADC +# +DEF ADC U 0 40 Y Y 1 F N +F0 "U" 0 150 60 H V C CNN +F1 "ADC" 0 -50 60 H V C CNN +DRAW +S 200 -100 -150 100 0 1 0 N +X A 1 -450 0 300 R 50 50 1 1 I +X D 2 500 0 300 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# ADC8 +# +DEF ADC8 U 0 10 Y Y 8 L N +F0 "U" -100 100 40 H V C CNN +F1 "ADC8" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in1 1 -300 0 150 R 25 25 1 1 I +X out1 9 300 0 150 L 25 25 1 1 O +X in2 2 -300 0 150 R 25 25 2 1 I +X out2 10 300 0 150 L 25 25 2 1 O +X in3 3 -300 0 150 R 25 25 3 1 I +X out3 11 300 0 150 L 25 25 3 1 O +X in4 4 -300 0 150 R 25 25 4 1 I +X out4 12 300 0 150 L 25 25 4 1 O +X in5 5 -300 0 150 R 25 25 5 1 I +X out5 13 300 0 150 L 25 25 5 1 O +X in6 6 -300 0 150 R 25 25 6 1 I +X out6 14 300 0 150 L 25 25 6 1 O +X in7 7 -300 0 150 R 25 25 7 1 I +X out7 15 300 0 150 L 25 25 7 1 O +X in8 8 -300 0 150 R 25 25 8 1 I +X out8 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +# DAC +# +DEF DAC U 0 40 Y Y 1 F N +F0 "U" 0 150 60 H V C CNN +F1 "DAC" 0 -50 60 H V C CNN +DRAW +S 200 -100 -150 100 0 1 0 N +X D 1 -450 0 300 R 50 50 1 1 I +X A 2 500 0 300 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# DAC8 +# +DEF DAC8 U 0 10 Y Y 8 L N +F0 "U" -100 100 40 H V C CNN +F1 "DAC8" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X in1 1 -300 0 150 R 25 25 1 1 I +X out1 9 300 0 150 L 25 25 1 1 O +X in2 2 -300 0 150 R 25 25 2 1 I +X out2 10 300 0 150 L 25 25 2 1 O +X in3 3 -300 0 150 R 25 25 3 1 I +X out3 11 300 0 150 L 25 25 3 1 O +X in4 4 -300 0 150 R 25 25 4 1 I +X out4 12 300 0 150 L 25 25 4 1 O +X in5 5 -300 0 150 R 25 25 5 1 I +X out5 13 300 0 150 L 25 25 5 1 O +X in6 6 -300 0 150 R 25 25 6 1 I +X out6 14 300 0 150 L 25 25 6 1 O +X in7 7 -300 0 150 R 25 25 7 1 I +X out7 15 300 0 150 L 25 25 7 1 O +X in8 8 -300 0 150 R 25 25 8 1 I +X out8 16 300 0 150 L 25 25 8 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/digitalSpice.bak b/FreeEDA/library/digitalSpice.bak new file mode 100644 index 0000000..e02e3aa --- /dev/null +++ b/FreeEDA/library/digitalSpice.bak @@ -0,0 +1,376 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 09 October 2012 08:20:22 PM IST +#encoding utf-8 +# +# 74HCT04 +# +DEF 74HCT04 U 0 30 Y Y 6 F N +F0 "U" 150 100 40 H V C CNN +F1 "74HCT04" 200 -100 40 H V C CNN +ALIAS 74HC14 74HC04 74LS14 +DRAW +P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N +X GND 7 -50 -100 0 U 30 20 0 0 W N +X VCC 14 -50 100 0 D 30 20 0 0 W N +X ~ 1 -450 0 300 R 60 60 1 1 I +X ~ 2 450 0 300 L 60 60 1 1 O I +X ~ 3 -450 0 300 R 60 60 2 1 I +X ~ 4 450 0 300 L 60 60 2 1 O I +X ~ 5 -450 0 300 R 60 60 3 1 I +X ~ 6 450 0 300 L 60 60 3 1 O I +X ~ 8 450 0 300 L 60 60 4 1 O I +X ~ 9 -450 0 300 R 60 60 4 1 I +X ~ 10 450 0 300 L 60 60 5 1 O I +X ~ 11 -450 0 300 R 60 60 5 1 I +X ~ 12 450 0 300 L 60 60 6 1 O I +X ~ 13 -450 0 300 R 60 60 6 1 I +X ~ 1 -450 0 300 R 60 60 1 2 I I +X ~ 2 450 0 300 L 60 60 1 2 O +X ~ 3 -450 0 300 R 60 60 2 2 I I +X ~ 4 450 0 300 L 60 60 2 2 O +X ~ 5 -450 0 300 R 60 60 3 2 I I +X ~ 6 450 0 300 L 60 60 3 2 O +X ~ 8 450 0 300 L 60 60 4 2 O +X ~ 9 -450 0 300 R 60 60 4 2 I I +X ~ 10 450 0 300 L 60 60 5 2 O +X ~ 11 -450 0 300 R 60 60 5 2 I I +X ~ 12 450 0 300 L 60 60 6 2 O +X ~ 13 -450 0 300 R 60 60 6 2 I I +ENDDRAW +ENDDEF +# +# 74LS00 +# +DEF 74LS00 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS00" 0 -100 60 H V C CNN +ALIAS 74LS37 7400 74HCT00 74HC00 +$FPLIST + 14DIP300* + SO14* +$ENDFPLIST +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O I +X ~ 4 -600 100 300 R 60 60 2 1 I +X ~ 5 -600 -100 300 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O I +X ~ 8 600 0 300 L 60 60 3 1 O I +X ~ 9 -600 100 300 R 60 60 3 1 I +X ~ 10 -600 -100 300 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O I +X ~ 12 -600 100 300 R 60 60 4 1 I +X ~ 13 -600 -100 300 R 60 60 4 1 I +A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 +A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 +A -10 -141 340 244 883 0 2 0 N 300 0 0 200 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O +X ~ 4 -600 100 370 R 60 60 2 2 I I +X ~ 5 -600 -100 370 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O +X ~ 8 600 0 300 L 60 60 3 2 O +X ~ 9 -600 100 370 R 60 60 3 2 I I +X ~ 10 -600 -100 370 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O +X ~ 12 -600 100 370 R 60 60 4 2 I I +X ~ 13 -600 -100 370 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# 74LS02 +# +DEF 74LS02 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS02" 50 -50 60 H V C CNN +ALIAS 74HC02 74HCT02 7402 74LS28 +$FPLIST + SO14* + 14DIP* +$ENDFPLIST +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 +A -1 -127 327 898 228 0 1 8 N 0 200 300 0 +A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 +P 2 0 1 8 -300 -200 0 -200 N +P 2 0 1 8 -300 200 0 200 N +X ~ 1 600 0 300 L 60 60 1 1 O I +X ~ 2 -600 100 370 R 60 60 1 1 I +X ~ 3 -600 -100 370 R 60 60 1 1 I +X ~ 4 600 0 300 L 60 60 2 1 O I +X ~ 5 -600 100 370 R 60 60 2 1 I +X ~ 6 -600 -100 370 R 60 60 2 1 I +X ~ 8 -600 100 370 R 60 60 3 1 I +X ~ 9 -600 -100 370 R 60 60 3 1 I +X ~ 10 600 0 300 L 60 60 3 1 O I +X ~ 11 -600 100 370 R 60 60 4 1 I +X ~ 12 -600 -100 370 R 60 60 4 1 I +X ~ 13 600 0 300 L 60 60 4 1 O I +A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 +P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 600 0 300 L 60 60 1 2 O +X ~ 2 -600 100 300 R 60 60 1 2 I I +X ~ 3 -600 -100 300 R 60 60 1 2 I I +X ~ 4 600 0 300 L 60 60 2 2 O +X ~ 5 -600 100 300 R 60 60 2 2 I I +X ~ 6 -600 -100 300 R 60 60 2 2 I I +X ~ 8 -600 100 300 R 60 60 3 2 I I +X ~ 9 -600 -100 300 R 60 60 3 2 I I +X ~ 10 600 0 300 L 60 60 3 2 O +X ~ 11 -600 100 300 R 60 60 4 2 I I +X ~ 12 -600 -100 300 R 60 60 4 2 I I +X ~ 13 600 0 300 L 60 60 4 2 O +ENDDRAW +ENDDEF +# +# 74LS08 +# +DEF 74LS08 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS08" 0 -50 60 H V C CNN +ALIAS 74LS09 +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 U 40 40 0 0 W N +A 100 0 200 896 -896 0 1 0 N 101 200 101 -199 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O +X ~ 4 -600 100 300 R 60 60 2 1 I +X ~ 5 -600 -100 300 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O +X ~ 8 600 0 300 L 60 60 3 1 O +X ~ 9 -600 100 300 R 60 60 3 1 I +X ~ 10 -600 -100 300 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O +X ~ 12 -600 100 300 R 60 60 4 1 I +X ~ 13 -600 -100 300 R 60 60 4 1 I +A -470 0 262 495 -495 0 2 0 N -300 199 -300 -198 +A -2 126 326 -897 -225 0 2 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 2 0 N 2 200 300 0 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O I +X ~ 4 -600 100 370 R 60 60 2 2 I I +X ~ 5 -600 -100 370 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O I +X ~ 8 600 0 300 L 60 60 3 2 O I +X ~ 9 -600 100 370 R 60 60 3 2 I I +X ~ 10 -600 -100 370 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O I +X ~ 12 -600 100 370 R 60 60 4 2 I I +X ~ 13 -600 -100 370 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# 74LS107 +# +DEF 74LS107 U 0 30 Y Y 2 F N +F0 "U" 0 100 60 H V C CNN +F1 "74LS107" 0 -100 60 H V C CNN +DRAW +S -350 -400 350 400 0 0 0 N +X GND 7 -250 -400 0 U 60 60 0 0 W N +X VCC 14 -250 400 0 U 60 60 0 0 W N +X J 1 -650 250 300 R 60 60 1 1 I +X ~Q 2 650 -250 300 L 60 60 1 1 O I +X Q 3 650 250 300 L 60 60 1 1 O +X K 4 -650 -250 300 R 60 60 1 1 I +X Cp 12 -650 0 300 R 60 60 1 1 I IC +X Cd 13 0 -700 300 U 60 60 1 1 I I +X Q 5 650 250 300 L 60 60 2 1 O +X ~Q 6 650 -250 300 L 60 60 2 1 O I +X J 8 -650 250 300 R 60 60 2 1 I +X Cp 9 -650 0 300 R 60 60 2 1 I IC +X Cd 10 0 -700 300 U 60 60 2 1 I I +X K 11 -650 -250 300 R 60 60 2 1 I +ENDDRAW +ENDDEF +# +# 74LS109 +# +DEF 74LS109 U 0 30 Y Y 2 F N +F0 "U" 0 100 60 H V C CNN +F1 "74LS109" 0 -100 60 H V C CNN +DRAW +S -350 -400 350 400 0 0 0 N +X GND 8 -250 -400 0 U 60 60 0 0 W N +X VCC 16 -250 400 0 U 60 60 0 0 W N +X Q 6 650 250 300 L 60 60 0 1 O +X Cd 1 0 -700 300 U 60 60 1 1 I I +X J 2 -650 250 300 R 60 60 1 1 I +X K 3 -650 -250 300 R 60 60 1 1 I I +X Cp 4 -650 0 300 R 60 60 1 1 I C +X Sd 5 0 700 300 D 60 60 1 1 I I +X ~Q 7 650 -250 300 L 60 60 1 1 O I +X ~Q 9 750 -250 400 L 60 60 2 1 I I +X Q 10 750 250 400 L 60 60 2 1 I +X Sd 11 0 800 400 D 60 60 2 1 I I +X Cp 12 -750 0 400 R 60 60 2 1 I C +X K 13 -750 -250 400 R 60 60 2 1 I I +X J 14 -750 250 400 R 60 60 2 1 I +X Cd 15 0 -800 400 U 60 60 2 1 I I +ENDDRAW +ENDDEF +# +# 74LS112 +# +DEF 74LS112 U 0 30 Y Y 2 F N +F0 "U" 0 100 60 H V C CNN +F1 "74LS112" 0 -100 60 H V C CNN +DRAW +S -350 -400 350 400 0 0 0 N +X GND 8 -250 -400 0 U 60 60 0 0 W N +X VCC 16 -250 400 0 U 60 60 0 0 W N +X Cp 1 -650 0 300 R 60 60 1 1 I IC +X K 2 -650 -250 300 R 60 60 1 1 I +X J 3 -650 250 300 R 60 60 1 1 I +X Sd 4 0 700 300 D 60 60 1 1 I I +X Q 5 650 250 300 L 60 60 1 1 O +X ~Q 6 650 -250 300 L 60 60 1 1 O I +X Cd 15 0 -700 300 U 60 60 1 1 I I +X ~Q 7 650 -250 300 L 60 60 2 1 O I +X Q 9 650 250 300 L 60 60 2 1 O +X Sd 10 0 700 300 D 60 60 2 1 I I +X J 11 -650 250 300 R 60 60 2 1 I +X K 12 -650 -250 300 R 60 60 2 1 I +X Cp 13 -650 0 300 R 60 60 2 1 I IC +X Cd 14 0 -800 300 U 60 60 2 1 I I +ENDDRAW +ENDDEF +# +# 74LS114 +# +DEF 74LS114 U 0 10 Y Y 2 F N +F0 "U" 0 100 60 H V C CNN +F1 "74LS114" 0 -100 60 H V C CNN +DRAW +S -350 -400 350 400 0 0 0 N +X GND 7 -250 -400 0 U 60 60 0 0 W N +X VCC 14 -250 400 0 U 60 60 0 0 W N +X ~ 1 0 -700 300 U 60 60 0 1 I I +X Cp 1 -650 0 300 R 60 60 1 1 I I +X K 2 -650 -250 300 R 60 60 1 1 I +X J 3 -650 250 300 R 60 60 1 1 I +X Sd 4 0 700 300 D 60 60 1 1 I I +X Q 5 650 250 300 L 60 60 1 1 O +X ~Q 6 650 -250 300 L 60 60 1 1 O I +X ~Q 8 650 -250 300 L 60 60 2 1 I I +X Q 9 650 250 300 L 60 60 2 1 I +X Sd 10 0 800 300 D 60 60 2 1 I I +X J 11 -650 250 300 R 60 60 2 1 I +X K 12 -650 -250 300 R 60 60 2 1 I +X Cp 13 -650 0 300 R 60 60 2 1 I I +ENDDRAW +ENDDEF +# +# 74LS32 +# +DEF 74LS32 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS32" 0 -50 60 H V C CNN +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 U 40 40 0 0 W N +A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 +A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 1 0 N 2 200 300 0 +P 2 0 1 0 -300 -200 0 -200 N +P 2 0 1 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 1 I +X ~ 2 -600 -100 370 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O +X ~ 4 -600 100 370 R 60 60 2 1 I +X ~ 5 -600 -100 370 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O +X ~ 8 600 0 300 L 60 60 3 1 O +X ~ 9 -600 100 370 R 60 60 3 1 I +X ~ 10 -600 -100 370 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O +X ~ 12 -600 100 370 R 60 60 4 1 I +X ~ 13 -600 -100 370 R 60 60 4 1 I +A 100 0 200 896 -896 0 2 0 N 101 200 101 -199 +P 4 0 2 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 2 I I +X ~ 2 -600 -100 300 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O I +X ~ 4 -600 100 300 R 60 60 2 2 I I +X ~ 5 -600 -100 300 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O I +X ~ 8 600 0 300 L 60 60 3 2 O I +X ~ 9 -600 100 300 R 60 60 3 2 I I +X ~ 10 -600 -100 300 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O I +X ~ 12 -600 100 300 R 60 60 4 2 I I +X ~ 13 -600 -100 300 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# 74LS74 +# +DEF 74LS74 U 0 40 Y Y 2 F N +F0 "U" 150 300 60 H V C CNN +F1 "74LS74" 300 -295 60 H V C CNN +ALIAS 74HC74 +DRAW +X GND 7 -200 -250 0 U 30 30 0 0 W N +X VCC 14 -200 250 0 D 30 30 0 0 W N +S -300 250 300 -250 0 1 0 N +X Cd 1 0 -550 300 U 60 60 1 1 I I +X D 2 -600 200 300 R 60 60 1 1 I +X Cp 3 -600 0 300 R 60 60 1 1 I C +X Sd 4 0 550 300 D 60 60 1 1 I I +X Q 5 600 200 300 L 60 60 1 1 O +X ~Q 6 600 -200 300 L 60 60 1 1 O I +X ~Q 8 600 -200 300 L 60 60 2 1 O I +X Q 9 600 200 300 L 60 60 2 1 O +X Sd 10 0 550 300 D 60 60 2 1 I I +X Cp 11 -600 0 300 R 60 60 2 1 I C +X D 12 -600 200 300 R 60 60 2 1 I +X Cd 13 0 -550 300 U 60 60 2 1 I I +ENDDRAW +ENDDEF +# +# 74LS86 +# +DEF 74LS86 U 0 30 Y N 4 F N +F0 "U" 50 50 50 H V C CNN +F1 "74LS86" 50 -50 40 H V C CNN +ALIAS 74HC86 +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 +A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 +A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 1 0 N 2 200 300 0 +P 2 0 1 0 -200 -200 0 -200 N +P 2 0 1 0 -200 200 0 200 N +X IN1 1 -600 100 370 R 60 60 1 1 I +X IN2 2 -600 -100 370 R 60 60 1 1 I +X OUT 3 600 0 300 L 60 60 1 1 O +X IN1 4 -600 100 370 R 60 60 2 1 I +X IN2 5 -600 -100 370 R 60 60 2 1 I +X OUT 6 600 0 300 L 60 60 2 1 O +X OUT 8 600 0 300 L 60 60 3 1 O +X IN1 9 -600 100 370 R 60 60 3 1 I +X IN2 10 -600 -100 370 R 60 60 3 1 I +X OUT 11 600 0 300 L 60 60 4 1 O +X IN1 12 -600 100 370 R 60 60 4 1 I +X IN2 13 -600 -100 370 R 60 60 4 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/digitalSpice.bck b/FreeEDA/library/digitalSpice.bck new file mode 100644 index 0000000..04a33bc --- /dev/null +++ b/FreeEDA/library/digitalSpice.bck @@ -0,0 +1,96 @@ +EESchema-DOCLIB Version 2.0 Date: Tuesday 09 October 2012 08:20:22 PM IST +# +$CMP 7402 +D Quad Nor2 +K TTL Nor2 +$ENDCMP +# +$CMP 74HC02 +D Quad Nor2 +K HCMOS Nor2 +$ENDCMP +# +$CMP 74HC04 +D Hex Inverseur +K HCMOS not inv +$ENDCMP +# +$CMP 74HC74 +D Dual D FlipFlop, Set & Reset +K TTL DFF +F 74xx/74hc_hct74.pdf +$ENDCMP +# +$CMP 74HCT02 +D Quad Nor2 +K HCTMOS Nor2 +$ENDCMP +# +$CMP 74HCT04 +D Hex Inverseur +K HCTMOS not inv +$ENDCMP +# +$CMP 74LS02 +D Quad Nor2 +K TTL Nor2 +$ENDCMP +# +$CMP 74LS08 +D Quad And2 +K TTL and2 +$ENDCMP +# +$CMP 74LS09 +D Quad And2 Open Collect +K TTL and2 OpenCol +$ENDCMP +# +$CMP 74LS107 +D Double JK FlipFlop, reset +K TTL JK +$ENDCMP +# +$CMP 74LS109 +D Double JK FlipFlop, Set & Reset +K TTL JK +$ENDCMP +# +$CMP 74LS112 +D Double JK FlipFlop, Set & Reset +K TTL JK +$ENDCMP +# +$CMP 74LS114 +D Double JK, common Clock & Reset, Set +K TTL JK +$ENDCMP +# +$CMP 74LS14 +D Hex inverseur schmitt trigger +K TTL not inv +$ENDCMP +# +$CMP 74LS28 +D Quad Buffer Nor2 +K TTL Nor2 Buffer +$ENDCMP +# +$CMP 74LS32 +D Quad Or 2 inputs +K TTL Or2 +$ENDCMP +# +$CMP 74LS74 +D Dual D FlipFlop, Set & Reset +K TTL DFF +F 74xx/74hc_hct74.pdf +$ENDCMP +# +$CMP 74LS86 +D Quad XOR 2 inputs +K TTL XOR2 +F 74xx/74ls86.pdf +$ENDCMP +# +#End Doc Library diff --git a/FreeEDA/library/digitalSpice.dcm b/FreeEDA/library/digitalSpice.dcm new file mode 100644 index 0000000..2f348b5 --- /dev/null +++ b/FreeEDA/library/digitalSpice.dcm @@ -0,0 +1,96 @@ +EESchema-DOCLIB Version 2.0 Date: Monday 22 October 2012 05:14:04 PM IST +# +$CMP 7402 +D Quad Nor2 +K TTL Nor2 +$ENDCMP +# +$CMP 74HC02 +D Quad Nor2 +K HCMOS Nor2 +$ENDCMP +# +$CMP 74HC04 +D Hex Inverseur +K HCMOS not inv +$ENDCMP +# +$CMP 74HC74 +D Dual D FlipFlop, Set & Reset +K TTL DFF +F 74xx/74hc_hct74.pdf +$ENDCMP +# +$CMP 74HCT02 +D Quad Nor2 +K HCTMOS Nor2 +$ENDCMP +# +$CMP 74HCT04 +D Hex Inverseur +K HCTMOS not inv +$ENDCMP +# +$CMP 74LS02 +D Quad Nor2 +K TTL Nor2 +$ENDCMP +# +$CMP 74LS08 +D Quad And2 +K TTL and2 +$ENDCMP +# +$CMP 74LS09 +D Quad And2 Open Collect +K TTL and2 OpenCol +$ENDCMP +# +$CMP 74LS107 +D Double JK FlipFlop, reset +K TTL JK +$ENDCMP +# +$CMP 74LS109 +D Double JK FlipFlop, Set & Reset +K TTL JK +$ENDCMP +# +$CMP 74LS112 +D Double JK FlipFlop, Set & Reset +K TTL JK +$ENDCMP +# +$CMP 74LS114 +D Double JK, common Clock & Reset, Set +K TTL JK +$ENDCMP +# +$CMP 74LS14 +D Hex inverseur schmitt trigger +K TTL not inv +$ENDCMP +# +$CMP 74LS28 +D Quad Buffer Nor2 +K TTL Nor2 Buffer +$ENDCMP +# +$CMP 74LS32 +D Quad Or 2 inputs +K TTL Or2 +$ENDCMP +# +$CMP 74LS74 +D Dual D FlipFlop, Set & Reset +K TTL DFF +F 74xx/74hc_hct74.pdf +$ENDCMP +# +$CMP 74LS86 +D Quad XOR 2 inputs +K TTL XOR2 +F 74xx/74ls86.pdf +$ENDCMP +# +#End Doc Library diff --git a/FreeEDA/library/digitalSpice.lib b/FreeEDA/library/digitalSpice.lib new file mode 100644 index 0000000..353c90a --- /dev/null +++ b/FreeEDA/library/digitalSpice.lib @@ -0,0 +1,376 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 22 October 2012 05:14:04 PM IST +#encoding utf-8 +# +# 74HCT04 +# +DEF 74HCT04 U 0 30 Y Y 6 F N +F0 "U" 150 100 40 H V C CNN +F1 "74HCT04" 200 -100 40 H V C CNN +ALIAS 74HC14 74HC04 74LS14 +DRAW +P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N +X GND 7 -50 -100 0 U 30 20 0 0 W N +X VCC 14 -50 100 0 D 30 20 0 0 W N +X ~ 1 -450 0 300 R 60 60 1 1 I +X ~ 2 450 0 300 L 60 60 1 1 O I +X ~ 3 -450 0 300 R 60 60 2 1 I +X ~ 4 450 0 300 L 60 60 2 1 O I +X ~ 5 -450 0 300 R 60 60 3 1 I +X ~ 6 450 0 300 L 60 60 3 1 O I +X ~ 8 450 0 300 L 60 60 4 1 O I +X ~ 9 -450 0 300 R 60 60 4 1 I +X ~ 10 450 0 300 L 60 60 5 1 O I +X ~ 11 -450 0 300 R 60 60 5 1 I +X ~ 12 450 0 300 L 60 60 6 1 O I +X ~ 13 -450 0 300 R 60 60 6 1 I +X ~ 1 -450 0 300 R 60 60 1 2 I I +X ~ 2 450 0 300 L 60 60 1 2 O +X ~ 3 -450 0 300 R 60 60 2 2 I I +X ~ 4 450 0 300 L 60 60 2 2 O +X ~ 5 -450 0 300 R 60 60 3 2 I I +X ~ 6 450 0 300 L 60 60 3 2 O +X ~ 8 450 0 300 L 60 60 4 2 O +X ~ 9 -450 0 300 R 60 60 4 2 I I +X ~ 10 450 0 300 L 60 60 5 2 O +X ~ 11 -450 0 300 R 60 60 5 2 I I +X ~ 12 450 0 300 L 60 60 6 2 O +X ~ 13 -450 0 300 R 60 60 6 2 I I +ENDDRAW +ENDDEF +# +# 74LS00 +# +DEF 74LS00 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS00" 0 -100 60 H V C CNN +ALIAS 74LS37 7400 74HCT00 74HC00 +$FPLIST + 14DIP300* + SO14* +$ENDFPLIST +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O I +X ~ 4 -600 100 300 R 60 60 2 1 I +X ~ 5 -600 -100 300 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O I +X ~ 8 600 0 300 L 60 60 3 1 O I +X ~ 9 -600 100 300 R 60 60 3 1 I +X ~ 10 -600 -100 300 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O I +X ~ 12 -600 100 300 R 60 60 4 1 I +X ~ 13 -600 -100 300 R 60 60 4 1 I +A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 +A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 +A -10 -141 340 244 883 0 2 0 N 300 0 0 200 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O +X ~ 4 -600 100 370 R 60 60 2 2 I I +X ~ 5 -600 -100 370 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O +X ~ 8 600 0 300 L 60 60 3 2 O +X ~ 9 -600 100 370 R 60 60 3 2 I I +X ~ 10 -600 -100 370 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O +X ~ 12 -600 100 370 R 60 60 4 2 I I +X ~ 13 -600 -100 370 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# 74LS02 +# +DEF 74LS02 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS02" 50 -50 60 H V C CNN +ALIAS 74HC02 74HCT02 7402 74LS28 +$FPLIST + SO14* + 14DIP* +$ENDFPLIST +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 +A -1 -127 327 898 228 0 1 8 N 0 200 300 0 +A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 +P 2 0 1 8 -300 -200 0 -200 N +P 2 0 1 8 -300 200 0 200 N +X ~ 1 600 0 300 L 60 60 1 1 O I +X ~ 2 -600 100 370 R 60 60 1 1 I +X ~ 3 -600 -100 370 R 60 60 1 1 I +X ~ 4 600 0 300 L 60 60 2 1 O I +X ~ 5 -600 100 370 R 60 60 2 1 I +X ~ 6 -600 -100 370 R 60 60 2 1 I +X ~ 8 -600 100 370 R 60 60 3 1 I +X ~ 9 -600 -100 370 R 60 60 3 1 I +X ~ 10 600 0 300 L 60 60 3 1 O I +X ~ 11 -600 100 370 R 60 60 4 1 I +X ~ 12 -600 -100 370 R 60 60 4 1 I +X ~ 13 600 0 300 L 60 60 4 1 O I +A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 +P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 600 0 300 L 60 60 1 2 O +X ~ 2 -600 100 300 R 60 60 1 2 I I +X ~ 3 -600 -100 300 R 60 60 1 2 I I +X ~ 4 600 0 300 L 60 60 2 2 O +X ~ 5 -600 100 300 R 60 60 2 2 I I +X ~ 6 -600 -100 300 R 60 60 2 2 I I +X ~ 8 -600 100 300 R 60 60 3 2 I I +X ~ 9 -600 -100 300 R 60 60 3 2 I I +X ~ 10 600 0 300 L 60 60 3 2 O +X ~ 11 -600 100 300 R 60 60 4 2 I I +X ~ 12 -600 -100 300 R 60 60 4 2 I I +X ~ 13 600 0 300 L 60 60 4 2 O +ENDDRAW +ENDDEF +# +# 74LS08 +# +DEF 74LS08 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS08" 0 -50 60 H V C CNN +ALIAS 74LS09 +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 U 40 40 0 0 W N +A 100 0 200 896 -896 0 1 0 N 101 200 101 -199 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O +X ~ 4 -600 100 300 R 60 60 2 1 I +X ~ 5 -600 -100 300 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O +X ~ 8 600 0 300 L 60 60 3 1 O +X ~ 9 -600 100 300 R 60 60 3 1 I +X ~ 10 -600 -100 300 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O +X ~ 12 -600 100 300 R 60 60 4 1 I +X ~ 13 -600 -100 300 R 60 60 4 1 I +A -470 0 262 495 -495 0 2 0 N -300 199 -300 -198 +A -2 126 326 -897 -225 0 2 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 2 0 N 2 200 300 0 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O I +X ~ 4 -600 100 370 R 60 60 2 2 I I +X ~ 5 -600 -100 370 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O I +X ~ 8 600 0 300 L 60 60 3 2 O I +X ~ 9 -600 100 370 R 60 60 3 2 I I +X ~ 10 -600 -100 370 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O I +X ~ 12 -600 100 370 R 60 60 4 2 I I +X ~ 13 -600 -100 370 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# 74LS107 +# +DEF 74LS107 U 0 30 Y Y 2 F N +F0 "U" 0 100 60 H V C CNN +F1 "74LS107" 0 -100 60 H V C CNN +DRAW +S -350 -400 350 400 0 0 0 N +X GND 7 -250 -400 0 U 60 60 0 0 W N +X VCC 14 -250 400 0 U 60 60 0 0 W N +X J 1 -650 250 300 R 60 60 1 1 I +X ~Q 2 650 -250 300 L 60 60 1 1 O I +X Q 3 650 250 300 L 60 60 1 1 O +X K 4 -650 -250 300 R 60 60 1 1 I +X Cp 12 -650 0 300 R 60 60 1 1 I IC +X Cd 13 0 -700 300 U 60 60 1 1 I I +X Q 5 650 250 300 L 60 60 2 1 O +X ~Q 6 650 -250 300 L 60 60 2 1 O I +X J 8 -650 250 300 R 60 60 2 1 I +X Cp 9 -650 0 300 R 60 60 2 1 I IC +X Cd 10 0 -700 300 U 60 60 2 1 I I +X K 11 -650 -250 300 R 60 60 2 1 I +ENDDRAW +ENDDEF +# +# 74LS109 +# +DEF 74LS109 U 0 30 Y Y 2 F N +F0 "U" 0 100 60 H V C CNN +F1 "74LS109" 0 -100 60 H V C CNN +DRAW +S -350 -400 350 400 0 0 0 N +X GND 8 -250 -400 0 U 60 60 0 0 W N +X VCC 16 -250 400 0 U 60 60 0 0 W N +X Cd 1 0 -700 300 U 60 60 1 1 I I +X J 2 -650 250 300 R 60 60 1 1 I +X K 3 -650 -250 300 R 60 60 1 1 I I +X Cp 4 -650 0 300 R 60 60 1 1 I C +X Sd 5 0 700 300 D 60 60 1 1 I I +X Q 6 650 250 300 L 60 60 1 1 O +X ~Q 7 650 -250 300 L 60 60 1 1 O I +X ~Q 9 750 -250 400 L 60 60 2 1 I I +X Q 10 750 250 400 L 60 60 2 1 O +X Sd 11 0 800 400 D 60 60 2 1 I I +X Cp 12 -750 0 400 R 60 60 2 1 I C +X K 13 -750 -250 400 R 60 60 2 1 I I +X J 14 -750 250 400 R 60 60 2 1 I +X Cd 15 0 -800 400 U 60 60 2 1 I I +ENDDRAW +ENDDEF +# +# 74LS112 +# +DEF 74LS112 U 0 30 Y Y 2 F N +F0 "U" 0 100 60 H V C CNN +F1 "74LS112" 0 -100 60 H V C CNN +DRAW +S -350 -400 350 400 0 0 0 N +X GND 8 -250 -400 0 U 60 60 0 0 W N +X VCC 16 -250 400 0 U 60 60 0 0 W N +X Cp 1 -650 0 300 R 60 60 1 1 I IC +X K 2 -650 -250 300 R 60 60 1 1 I +X J 3 -650 250 300 R 60 60 1 1 I +X Sd 4 0 700 300 D 60 60 1 1 I I +X Q 5 650 250 300 L 60 60 1 1 O +X ~Q 6 650 -250 300 L 60 60 1 1 O I +X Cd 15 0 -700 300 U 60 60 1 1 I I +X ~Q 7 650 -250 300 L 60 60 2 1 O I +X Q 9 650 250 300 L 60 60 2 1 O +X Sd 10 0 700 300 D 60 60 2 1 I I +X J 11 -650 250 300 R 60 60 2 1 I +X K 12 -650 -250 300 R 60 60 2 1 I +X Cp 13 -650 0 300 R 60 60 2 1 I IC +X Cd 14 0 -800 300 U 60 60 2 1 I I +ENDDRAW +ENDDEF +# +# 74LS114 +# +DEF 74LS114 U 0 10 Y Y 2 F N +F0 "U" 0 100 60 H V C CNN +F1 "74LS114" 0 -100 60 H V C CNN +DRAW +S -350 -400 350 400 0 0 0 N +X GND 7 -250 -400 0 U 60 60 0 0 W N +X VCC 14 -250 400 0 U 60 60 0 0 W N +X ~ 1 0 -700 300 U 60 60 0 1 I I +X Cp 1 -650 0 300 R 60 60 1 1 I I +X K 2 -650 -250 300 R 60 60 1 1 I +X J 3 -650 250 300 R 60 60 1 1 I +X Sd 4 0 700 300 D 60 60 1 1 I I +X Q 5 650 250 300 L 60 60 1 1 O +X ~Q 6 650 -250 300 L 60 60 1 1 O I +X ~Q 8 650 -250 300 L 60 60 2 1 I I +X Q 9 650 250 300 L 60 60 2 1 I +X Sd 10 0 800 300 D 60 60 2 1 I I +X J 11 -650 250 300 R 60 60 2 1 I +X K 12 -650 -250 300 R 60 60 2 1 I +X Cp 13 -650 0 300 R 60 60 2 1 I I +ENDDRAW +ENDDEF +# +# 74LS32 +# +DEF 74LS32 U 0 30 Y Y 4 F N +F0 "U" 0 50 60 H V C CNN +F1 "74LS32" 0 -50 60 H V C CNN +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 U 40 40 0 0 W N +A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 +A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 1 0 N 2 200 300 0 +P 2 0 1 0 -300 -200 0 -200 N +P 2 0 1 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 1 I +X ~ 2 -600 -100 370 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O +X ~ 4 -600 100 370 R 60 60 2 1 I +X ~ 5 -600 -100 370 R 60 60 2 1 I +X ~ 6 600 0 300 L 60 60 2 1 O +X ~ 8 600 0 300 L 60 60 3 1 O +X ~ 9 -600 100 370 R 60 60 3 1 I +X ~ 10 -600 -100 370 R 60 60 3 1 I +X ~ 11 600 0 300 L 60 60 4 1 O +X ~ 12 -600 100 370 R 60 60 4 1 I +X ~ 13 -600 -100 370 R 60 60 4 1 I +A 100 0 200 896 -896 0 2 0 N 101 200 101 -199 +P 4 0 2 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 2 I I +X ~ 2 -600 -100 300 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O I +X ~ 4 -600 100 300 R 60 60 2 2 I I +X ~ 5 -600 -100 300 R 60 60 2 2 I I +X ~ 6 600 0 300 L 60 60 2 2 O I +X ~ 8 600 0 300 L 60 60 3 2 O I +X ~ 9 -600 100 300 R 60 60 3 2 I I +X ~ 10 -600 -100 300 R 60 60 3 2 I I +X ~ 11 600 0 300 L 60 60 4 2 O I +X ~ 12 -600 100 300 R 60 60 4 2 I I +X ~ 13 -600 -100 300 R 60 60 4 2 I I +ENDDRAW +ENDDEF +# +# 74LS74 +# +DEF 74LS74 U 0 40 Y Y 2 F N +F0 "U" 150 300 60 H V C CNN +F1 "74LS74" 300 -295 60 H V C CNN +ALIAS 74HC74 +DRAW +X GND 7 -200 -250 0 U 30 30 0 0 W N +X VCC 14 -200 250 0 D 30 30 0 0 W N +S -300 250 300 -250 0 1 0 N +X Cd 1 0 -550 300 U 60 60 1 1 I I +X D 2 -600 200 300 R 60 60 1 1 I +X Cp 3 -600 0 300 R 60 60 1 1 I C +X Sd 4 0 550 300 D 60 60 1 1 I I +X Q 5 600 200 300 L 60 60 1 1 O +X ~Q 6 600 -200 300 L 60 60 1 1 O I +X ~Q 8 600 -200 300 L 60 60 2 1 O I +X Q 9 600 200 300 L 60 60 2 1 O +X Sd 10 0 550 300 D 60 60 2 1 I I +X Cp 11 -600 0 300 R 60 60 2 1 I C +X D 12 -600 200 300 R 60 60 2 1 I +X Cd 13 0 -550 300 U 60 60 2 1 I I +ENDDRAW +ENDDEF +# +# 74LS86 +# +DEF 74LS86 U 0 30 Y N 4 F N +F0 "U" 50 50 50 H V C CNN +F1 "74LS86" 50 -50 40 H V C CNN +ALIAS 74HC86 +DRAW +X GND 7 -200 -200 0 U 40 40 0 0 W N +X VCC 14 -200 200 0 D 40 40 0 0 W N +A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 +A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 +A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 1 0 N 2 200 300 0 +P 2 0 1 0 -200 -200 0 -200 N +P 2 0 1 0 -200 200 0 200 N +X IN1 1 -600 100 370 R 60 60 1 1 I +X IN2 2 -600 -100 370 R 60 60 1 1 I +X OUT 3 600 0 300 L 60 60 1 1 O +X IN1 4 -600 100 370 R 60 60 2 1 I +X IN2 5 -600 -100 370 R 60 60 2 1 I +X OUT 6 600 0 300 L 60 60 2 1 O +X OUT 8 600 0 300 L 60 60 3 1 O +X IN1 9 -600 100 370 R 60 60 3 1 I +X IN2 10 -600 -100 370 R 60 60 3 1 I +X OUT 11 600 0 300 L 60 60 4 1 O +X IN1 12 -600 100 370 R 60 60 4 1 I +X IN2 13 -600 -100 370 R 60 60 4 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/digitalXSpice.bak b/FreeEDA/library/digitalXSpice.bak new file mode 100644 index 0000000..08f1cb0 --- /dev/null +++ b/FreeEDA/library/digitalXSpice.bak @@ -0,0 +1,303 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 18 December 2012 11:53:32 PM IST +#encoding utf-8 +# +# d_and +# +DEF d_and U 0 30 Y Y 1 F N +F0 "U" 0 50 60 H V C CNN +F1 "d_and" 0 -100 60 H V C CNN +$FPLIST + 14DIP300* + SO14* +$ENDFPLIST +DRAW +A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O +A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 +A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 +A -10 -141 340 244 883 0 2 0 N 300 0 0 200 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O +ENDDRAW +ENDDEF +# +# d_buffer +# +DEF d_buffer U 0 40 Y Y 1 F N +F0 "U" -150 100 40 H V C CNN +F1 "d_buffer" 100 100 40 H V C CNN +DRAW +P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N +X in 1 -250 0 150 R 25 25 1 1 I +X out 2 250 0 150 L 25 25 1 1 O +ENDDRAW +ENDDEF +# +# D_DLatch +# +DEF D_DLatch U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_DLatch" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X D 1 -600 150 300 R 50 50 1 1 I +X Enable 2 -600 0 300 R 50 50 1 1 I +X Set 3 150 -500 300 U 50 50 1 1 I +X Reset 4 -150 -500 300 U 50 50 1 1 I +X Q 5 600 150 300 L 50 50 1 1 O +X ~Q 6 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_inverter +# +DEF d_inverter U 0 40 Y Y 1 F N +F0 "U" -150 100 40 H V C CNN +F1 "d_inverter" 100 100 40 H V C CNN +DRAW +P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N +X in 1 -250 0 150 R 25 25 1 1 I +X out 2 250 0 150 L 25 25 1 1 O I +ENDDRAW +ENDDEF +# +# D_JKFF +# +DEF D_JKFF U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_JKFF" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X J 1 -600 150 300 R 50 50 1 1 I +X K 2 -600 -150 300 R 50 50 1 1 I +X CLK 3 -600 0 300 R 50 50 1 1 O C +X set 4 150 -500 300 U 50 50 1 1 I +X reset 5 -150 -500 300 U 50 50 1 1 I +X Q 6 600 150 300 L 50 50 1 1 O +X ~Q 7 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# D_JKLatch +# +DEF D_JKLatch U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_JKLatch" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X J 1 -600 150 300 R 50 50 1 1 I +X K 2 -600 -150 300 R 50 50 1 1 I +X Enable 3 -600 0 300 R 50 50 1 1 I +X Set 4 150 -500 300 U 50 50 1 1 I +X Reset 5 -150 -500 300 U 50 50 1 1 I +X Q 6 600 150 300 L 50 50 1 1 O +X ~Q 7 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_nand +# +DEF d_nand U 0 30 Y Y 1 F N +F0 "U" 0 50 60 H V C CNN +F1 "d_nand" 0 -100 60 H V C CNN +$FPLIST + 14DIP300* + SO14* +$ENDFPLIST +DRAW +A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O I +A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 +A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 +A -10 -141 340 244 883 0 2 0 N 300 0 0 200 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O +ENDDRAW +ENDDEF +# +# d_nor +# +DEF d_nor U 0 30 Y Y 1 F N +F0 "U" 0 50 60 H V C CNN +F1 "d_nor" 50 -50 60 H V C CNN +$FPLIST + SO14* + 14DIP* +$ENDFPLIST +DRAW +A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 +A -1 -127 327 898 228 0 1 8 N 0 200 300 0 +A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 +P 2 0 1 8 -300 -200 0 -200 N +P 2 0 1 8 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 1 I +X ~ 2 -600 -100 370 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O I +A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 +P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 600 0 300 L 60 60 1 2 O +X ~ 2 -600 100 300 R 60 60 1 2 I I +X ~ 3 -600 -100 300 R 60 60 1 2 I I +ENDDRAW +ENDDEF +# +# d_or +# +DEF d_or U 0 30 Y Y 1 F N +F0 "U" 0 50 60 H V C CNN +F1 "d_or" 50 -50 60 H V C CNN +$FPLIST + SO14* + 14DIP* +$ENDFPLIST +DRAW +A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 +A -1 -127 327 898 228 0 1 8 N 0 200 300 0 +A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 +P 2 0 1 8 -300 -200 0 -200 N +P 2 0 1 8 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 1 I +X ~ 2 -600 -100 370 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O +A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 +P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 600 0 300 L 60 60 1 2 O +X ~ 2 -600 100 300 R 60 60 1 2 I I +X ~ 3 -600 -100 300 R 60 60 1 2 I I +ENDDRAW +ENDDEF +# +# d_pulldown +# +DEF d_pulldown U 0 20 Y Y 1 F N +F0 "U" -100 100 40 H V C CNN +F1 "d_pulldown" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X ~ 1 -300 0 150 R 30 30 1 1 B +ENDDRAW +ENDDEF +# +# D_PULLUP +# +DEF D_PULLUP U 0 20 Y Y 1 F N +F0 "U" -100 100 40 H V C CNN +F1 "D_PULLUP" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X ~ 1 -300 0 150 R 30 30 1 1 B +ENDDRAW +ENDDEF +# +# D_SRFF +# +DEF D_SRFF U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_SRFF" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X S 1 -600 150 300 R 50 50 1 1 I +X R 2 -600 -150 300 R 50 50 1 1 I +X CLK 3 -600 0 300 R 50 50 1 1 O C +X set 4 150 -500 300 U 50 50 1 1 I +X reset 5 -150 -500 300 U 50 50 1 1 I +X Q 6 600 150 300 L 50 50 1 1 O +X ~Q 7 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# D_SRLatch +# +DEF D_SRLatch U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_SRLatch" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X S 1 -600 150 300 R 50 50 1 1 I +X R 2 -600 -150 300 R 50 50 1 1 I +X Enable 3 -600 0 300 R 50 50 1 1 I +X Set 4 150 -500 300 U 50 50 1 1 I +X Reset 5 -150 -500 300 U 50 50 1 1 I +X Q 6 600 150 300 L 50 50 1 1 O +X ~Q 7 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# D_TLatch +# +DEF D_TLatch U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_TLatch" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X T 1 -600 150 300 R 50 50 1 1 I +X Enable 2 -600 0 300 R 50 50 1 1 I +X Set 3 150 -500 300 U 50 50 1 1 I +X Reset 4 -150 -500 300 U 50 50 1 1 I +X Q 5 600 150 300 L 50 50 1 1 O +X ~Q 6 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_tristate +# +DEF d_tristate U 0 20 Y Y 1 F N +F0 "U" 150 50 40 H V C CNN +F1 "d_tristate" 0 100 40 H V C CNN +DRAW +P 4 0 1 0 -150 150 -150 -150 150 0 -150 150 N +X in 1 -300 0 150 R 30 30 1 1 I +X en 2 -50 -250 150 U 30 30 1 1 I +X out 3 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# d_xnor +# +DEF d_xnor U 0 30 Y N 1 F N +F0 "U" 50 50 50 H V C CNN +F1 "d_xnor" 50 -50 40 H V C CNN +DRAW +A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 +A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 +A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 1 0 N 2 200 300 0 +P 2 0 1 0 -200 -200 0 -200 N +P 2 0 1 0 -200 200 0 200 N +X IN1 1 -600 100 370 R 60 60 1 1 I +X IN2 2 -600 -100 370 R 60 60 1 1 I +X OUT 3 600 0 300 L 60 60 1 1 O I +ENDDRAW +ENDDEF +# +# d_xor +# +DEF d_xor U 0 30 Y N 1 F N +F0 "U" 50 50 50 H V C CNN +F1 "d_xor" 50 -50 40 H V C CNN +DRAW +A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 +A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 +A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 1 0 N 2 200 300 0 +P 2 0 1 0 -200 -200 0 -200 N +P 2 0 1 0 -200 200 0 200 N +X IN1 1 -600 100 370 R 60 60 1 1 I +X IN2 2 -600 -100 370 R 60 60 1 1 I +X OUT 3 600 0 300 L 60 60 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/digitalXSpice.bck b/FreeEDA/library/digitalXSpice.bck new file mode 100644 index 0000000..0d10ba3 --- /dev/null +++ b/FreeEDA/library/digitalXSpice.bck @@ -0,0 +1,23 @@ +EESchema-DOCLIB Version 2.0 Date: Tuesday 18 December 2012 11:53:32 PM IST +# +$CMP D_NOR +D Nor2 +K Nor2 +$ENDCMP +# +$CMP D_OR +D Or2 +K Or2 +$ENDCMP +# +$CMP D_XNOR +D XNOR 2 inputs +K XNOR2 +$ENDCMP +# +$CMP D_XOR +D XOR 2 inputs +K XOR2 +$ENDCMP +# +#End Doc Library diff --git a/FreeEDA/library/digitalXSpice.dcm b/FreeEDA/library/digitalXSpice.dcm new file mode 100644 index 0000000..b8d289a --- /dev/null +++ b/FreeEDA/library/digitalXSpice.dcm @@ -0,0 +1,23 @@ +EESchema-DOCLIB Version 2.0 Date: Tuesday 18 December 2012 11:55:07 PM IST +# +$CMP D_NOR +D Nor2 +K Nor2 +$ENDCMP +# +$CMP D_OR +D Or2 +K Or2 +$ENDCMP +# +$CMP D_XNOR +D XNOR 2 inputs +K XNOR2 +$ENDCMP +# +$CMP D_XOR +D XOR 2 inputs +K XOR2 +$ENDCMP +# +#End Doc Library diff --git a/FreeEDA/library/digitalXSpice.lib b/FreeEDA/library/digitalXSpice.lib new file mode 100644 index 0000000..e20d547 --- /dev/null +++ b/FreeEDA/library/digitalXSpice.lib @@ -0,0 +1,319 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 18 December 2012 11:55:07 PM IST +#encoding utf-8 +# +# d_and +# +DEF d_and U 0 30 Y Y 1 F N +F0 "U" 0 50 60 H V C CNN +F1 "d_and" 0 -100 60 H V C CNN +$FPLIST + 14DIP300* + SO14* +$ENDFPLIST +DRAW +A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O +A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 +A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 +A -10 -141 340 244 883 0 2 0 N 300 0 0 200 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O +ENDDRAW +ENDDEF +# +# d_buffer +# +DEF d_buffer U 0 40 Y Y 1 F N +F0 "U" -150 100 40 H V C CNN +F1 "d_buffer" 100 100 40 H V C CNN +DRAW +P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N +X in 1 -250 0 150 R 25 25 1 1 I +X out 2 250 0 150 L 25 25 1 1 O +ENDDRAW +ENDDEF +# +# D_DLatch +# +DEF D_DLatch U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_DLatch" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X D 1 -600 150 300 R 50 50 1 1 I +X Enable 2 -600 0 300 R 50 50 1 1 I +X Set 3 150 -500 300 U 50 50 1 1 I +X Reset 4 -150 -500 300 U 50 50 1 1 I +X Q 5 600 150 300 L 50 50 1 1 O +X ~Q 6 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_inverter +# +DEF d_inverter U 0 40 Y Y 1 F N +F0 "U" -150 100 40 H V C CNN +F1 "d_inverter" 100 100 40 H V C CNN +DRAW +P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N +X in 1 -250 0 150 R 25 25 1 1 I +X out 2 250 0 150 L 25 25 1 1 O I +ENDDRAW +ENDDEF +# +# D_JKFF +# +DEF D_JKFF U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_JKFF" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X J 1 -600 150 300 R 50 50 1 1 I +X K 2 -600 -150 300 R 50 50 1 1 I +X CLK 3 -600 0 300 R 50 50 1 1 O C +X set 4 150 -500 300 U 50 50 1 1 I +X reset 5 -150 -500 300 U 50 50 1 1 I +X Q 6 600 150 300 L 50 50 1 1 O +X ~Q 7 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# D_JKLatch +# +DEF D_JKLatch U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_JKLatch" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X J 1 -600 150 300 R 50 50 1 1 I +X K 2 -600 -150 300 R 50 50 1 1 I +X Enable 3 -600 0 300 R 50 50 1 1 I +X Set 4 150 -500 300 U 50 50 1 1 I +X Reset 5 -150 -500 300 U 50 50 1 1 I +X Q 6 600 150 300 L 50 50 1 1 O +X ~Q 7 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_nand +# +DEF d_nand U 0 30 Y Y 1 F N +F0 "U" 0 50 60 H V C CNN +F1 "d_nand" 0 -100 60 H V C CNN +$FPLIST + 14DIP300* + SO14* +$ENDFPLIST +DRAW +A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 +P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 -600 100 300 R 60 60 1 1 I +X ~ 2 -600 -100 300 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O I +A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 +A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 +A -10 -141 340 244 883 0 2 0 N 300 0 0 200 +P 2 0 2 0 -300 -200 0 -200 N +P 2 0 2 0 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 2 I I +X ~ 2 -600 -100 370 R 60 60 1 2 I I +X ~ 3 600 0 300 L 60 60 1 2 O +ENDDRAW +ENDDEF +# +# d_nor +# +DEF d_nor U 0 30 Y Y 1 F N +F0 "U" 0 50 60 H V C CNN +F1 "d_nor" 50 -50 60 H V C CNN +$FPLIST + SO14* + 14DIP* +$ENDFPLIST +DRAW +A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 +A -1 -127 327 898 228 0 1 8 N 0 200 300 0 +A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 +P 2 0 1 8 -300 -200 0 -200 N +P 2 0 1 8 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 1 I +X ~ 2 -600 -100 370 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O I +A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 +P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 600 0 300 L 60 60 1 2 O +X ~ 2 -600 100 300 R 60 60 1 2 I I +X ~ 3 -600 -100 300 R 60 60 1 2 I I +ENDDRAW +ENDDEF +# +# d_or +# +DEF d_or U 0 30 Y Y 1 F N +F0 "U" 0 50 60 H V C CNN +F1 "d_or" 50 -50 60 H V C CNN +$FPLIST + SO14* + 14DIP* +$ENDFPLIST +DRAW +A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 +A -1 -127 327 898 228 0 1 8 N 0 200 300 0 +A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 +P 2 0 1 8 -300 -200 0 -200 N +P 2 0 1 8 -300 200 0 200 N +X ~ 1 -600 100 370 R 60 60 1 1 I +X ~ 2 -600 -100 370 R 60 60 1 1 I +X ~ 3 600 0 300 L 60 60 1 1 O +A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 +P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N +X ~ 1 600 0 300 L 60 60 1 2 O +X ~ 2 -600 100 300 R 60 60 1 2 I I +X ~ 3 -600 -100 300 R 60 60 1 2 I I +ENDDRAW +ENDDEF +# +# d_pulldown +# +DEF d_pulldown U 0 20 Y Y 1 F N +F0 "U" -100 100 40 H V C CNN +F1 "d_pulldown" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X ~ 1 -300 0 150 R 30 30 1 1 B +ENDDRAW +ENDDEF +# +# D_PULLUP +# +DEF D_PULLUP U 0 20 Y Y 1 F N +F0 "U" -100 100 40 H V C CNN +F1 "D_PULLUP" 0 0 40 H V C CNN +DRAW +S -150 50 150 -50 0 1 0 N +X ~ 1 -300 0 150 R 30 30 1 1 B +ENDDRAW +ENDDEF +# +# D_SRFF +# +DEF D_SRFF U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_SRFF" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X S 1 -600 150 300 R 50 50 1 1 I +X R 2 -600 -150 300 R 50 50 1 1 I +X CLK 3 -600 0 300 R 50 50 1 1 O C +X set 4 150 -500 300 U 50 50 1 1 I +X reset 5 -150 -500 300 U 50 50 1 1 I +X Q 6 600 150 300 L 50 50 1 1 O +X ~Q 7 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# D_SRLatch +# +DEF D_SRLatch U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_SRLatch" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X S 1 -600 150 300 R 50 50 1 1 I +X R 2 -600 -150 300 R 50 50 1 1 I +X Enable 3 -600 0 300 R 50 50 1 1 I +X Set 4 150 -500 300 U 50 50 1 1 I +X Reset 5 -150 -500 300 U 50 50 1 1 I +X Q 6 600 150 300 L 50 50 1 1 O +X ~Q 7 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# D_TFF +# +DEF D_TFF U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_TFF" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X T 1 -600 150 300 R 50 50 1 1 I +X CLK 2 -600 0 300 R 50 50 1 1 O C +X set 3 150 -500 300 U 50 50 1 1 I +X reset 4 -150 -500 300 U 50 50 1 1 I +X Q 5 600 150 300 L 50 50 1 1 O +X ~Q 6 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# D_TLatch +# +DEF D_TLatch U 0 40 Y Y 1 F N +F0 "U" -200 250 60 H V C CNN +F1 "D_TLatch" 0 100 60 H V C CNN +DRAW +S -300 200 300 -200 0 1 0 N +X T 1 -600 150 300 R 50 50 1 1 I +X Enable 2 -600 0 300 R 50 50 1 1 I +X Set 3 150 -500 300 U 50 50 1 1 I +X Reset 4 -150 -500 300 U 50 50 1 1 I +X Q 5 600 150 300 L 50 50 1 1 O +X ~Q 6 600 -150 300 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_tristate +# +DEF d_tristate U 0 20 Y Y 1 F N +F0 "U" 150 50 40 H V C CNN +F1 "d_tristate" 0 100 40 H V C CNN +DRAW +P 4 0 1 0 -150 150 -150 -150 150 0 -150 150 N +X in 1 -300 0 150 R 30 30 1 1 I +X en 2 -50 -250 150 U 30 30 1 1 I +X out 3 300 0 150 L 30 30 1 1 O +ENDDRAW +ENDDEF +# +# d_xnor +# +DEF d_xnor U 0 30 Y N 1 F N +F0 "U" 50 50 50 H V C CNN +F1 "d_xnor" 50 -50 40 H V C CNN +DRAW +A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 +A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 +A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 1 0 N 2 200 300 0 +P 2 0 1 0 -200 -200 0 -200 N +P 2 0 1 0 -200 200 0 200 N +X IN1 1 -600 100 370 R 60 60 1 1 I +X IN2 2 -600 -100 370 R 60 60 1 1 I +X OUT 3 600 0 300 L 60 60 1 1 O I +ENDDRAW +ENDDEF +# +# d_xor +# +DEF d_xor U 0 30 Y N 1 F N +F0 "U" 50 50 50 H V C CNN +F1 "d_xor" 50 -50 40 H V C CNN +DRAW +A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 +A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 +A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 +A 4 -120 320 906 221 0 1 0 N 2 200 300 0 +P 2 0 1 0 -200 -200 0 -200 N +P 2 0 1 0 -200 200 0 200 N +X IN1 1 -600 100 370 R 60 60 1 1 I +X IN2 2 -600 -100 370 R 60 60 1 1 I +X OUT 3 600 0 300 L 60 60 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/linearSpice.bak b/FreeEDA/library/linearSpice.bak new file mode 100644 index 0000000..794e1a5 --- /dev/null +++ b/FreeEDA/library/linearSpice.bak @@ -0,0 +1,37 @@ +EESchema-LIBRARY Version 2.3 Date: Saturday 20 October 2012 12:02:13 PM IST +#encoding utf-8 +# +# LM741 +# +DEF LM741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "LM741" 150 250 60 H V C CNN +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X ~ 1 0 -400 300 U 40 40 1 1 I +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X V- 4 -100 -400 250 U 40 40 1 1 I +X ~ 5 100 -400 350 U 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +X V+ 7 -100 400 250 D 40 40 1 1 I +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/linearSpice.bck b/FreeEDA/library/linearSpice.bck new file mode 100644 index 0000000..31cd117 --- /dev/null +++ b/FreeEDA/library/linearSpice.bck @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 Date: Saturday 20 October 2012 12:02:13 PM IST +# +#End Doc Library diff --git a/FreeEDA/library/linearSpice.dcm b/FreeEDA/library/linearSpice.dcm new file mode 100644 index 0000000..44165c3 --- /dev/null +++ b/FreeEDA/library/linearSpice.dcm @@ -0,0 +1,7 @@ +EESchema-DOCLIB Version 2.0 Date: Monday 19 November 2012 01:00:18 AM IST +# +$CMP LM555N +F ns/lm555.pdf +$ENDCMP +# +#End Doc Library diff --git a/FreeEDA/library/linearSpice.lib b/FreeEDA/library/linearSpice.lib new file mode 100644 index 0000000..7f9ea68 --- /dev/null +++ b/FreeEDA/library/linearSpice.lib @@ -0,0 +1,55 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 19 November 2012 01:00:18 AM IST +#encoding utf-8 +# +# LM555N +# +DEF LM555N X 0 40 Y Y 1 F N +F0 "X" 0 100 70 H V C CNN +F1 "LM555N" 0 -100 70 H V C CNN +DRAW +X GND 1 0 -400 0 U 60 60 0 0 W N +X VCC 8 0 400 0 D 60 60 0 0 W N +S -400 -400 400 400 0 1 0 N +X TR 2 -700 200 300 R 60 60 1 1 I +X Q 3 700 200 300 L 60 60 1 1 O +X R 4 -700 -300 300 R 60 60 1 1 I I +X CV 5 -700 -50 300 R 60 60 1 1 I +X THR 6 700 -200 300 L 60 60 1 1 I +X DIS 7 700 0 300 L 60 60 1 1 I +ENDDRAW +ENDDEF +# +# LM741 +# +DEF LM741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "LM741" 150 250 60 H V C CNN +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X ~ 1 0 -400 300 U 40 40 1 1 I +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X V- 4 -100 -400 250 U 40 40 1 1 I +X ~ 5 100 -400 350 U 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +X V+ 7 -100 400 250 D 40 40 1 1 I +ENDDRAW +ENDDEF +# +# uA741 +# +DEF uA741 X 0 20 Y Y 1 F N +F0 "X" 150 150 60 H V C CNN +F1 "uA741" 150 250 60 H V C CNN +$FPLIST + DIP-8__300 +$ENDFPLIST +DRAW +P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N +X - 2 -500 -100 300 R 40 40 1 1 I +X + 3 -500 100 300 R 40 40 1 1 I +X ~ 6 500 0 300 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/measurementSpice.bak b/FreeEDA/library/measurementSpice.bak new file mode 100644 index 0000000..c97377b --- /dev/null +++ b/FreeEDA/library/measurementSpice.bak @@ -0,0 +1,162 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 10:28:24 AM IST +#encoding utf-8 +# +# iplot +# +DEF iplot U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -400 0 300 R 50 50 1 1 O +X - 2 400 0 300 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# iprint +# +DEF iprint U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iprint" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -400 0 300 R 50 50 1 1 O +X - 2 400 0 300 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# vplot +# +DEF vplot U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 2 300 0 200 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot1 +# +DEF vplot1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +# vplot8 +# +DEF vplot8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +# vprint +# +DEF vprint U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 2 300 0 200 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vprint1 +# +DEF vprint1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +# vprint8 +# +DEF vprint8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +# vprint8_1 +# +DEF vprint8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/measurementSpice.bck b/FreeEDA/library/measurementSpice.bck new file mode 100644 index 0000000..6e06956 --- /dev/null +++ b/FreeEDA/library/measurementSpice.bck @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 Date: Sunday 09 December 2012 10:28:24 AM IST +# +#End Doc Library diff --git a/FreeEDA/library/measurementSpice.dcm b/FreeEDA/library/measurementSpice.dcm new file mode 100644 index 0000000..c68d516 --- /dev/null +++ b/FreeEDA/library/measurementSpice.dcm @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 Date: Monday 17 December 2012 11:59:11 PM IST +# +#End Doc Library diff --git a/FreeEDA/library/measurementSpice.lib b/FreeEDA/library/measurementSpice.lib new file mode 100644 index 0000000..4ee18b7 --- /dev/null +++ b/FreeEDA/library/measurementSpice.lib @@ -0,0 +1,162 @@ +EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:59:11 PM IST +#encoding utf-8 +# +# iplot +# +DEF iplot U 0 20 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -250 0 150 R 30 30 1 1 I +X - 2 250 0 150 L 30 30 1 1 I +ENDDRAW +ENDDEF +# +# iprint +# +DEF iprint U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "iprint" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -400 0 300 R 50 50 1 1 O +X - 2 400 0 300 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# vplot +# +DEF vplot U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 2 300 0 200 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vplot1 +# +DEF vplot1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +# vplot8 +# +DEF vplot8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +# vplot8_1 +# +DEF vplot8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vplot8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +# vprint +# +DEF vprint U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 2 300 0 200 L 40 40 1 1 O +ENDDRAW +ENDDEF +# +# vprint1 +# +DEF vprint1 U 0 40 Y Y 1 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +ENDDRAW +ENDDEF +# +# vprint8 +# +DEF vprint8 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint8" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 -300 0 200 R 40 40 1 1 O +X - 9 300 0 200 L 40 40 1 1 O +X + 2 -300 0 200 R 40 40 2 1 O +X - 10 300 0 200 L 40 40 2 1 O +X + 3 -300 0 200 R 40 40 3 1 O +X - 11 300 0 200 L 40 40 3 1 O +X + 4 -300 0 200 R 40 40 4 1 O +X - 12 300 0 200 L 40 40 4 1 O +X + 5 -300 0 200 R 40 40 5 1 O +X - 13 300 0 200 L 40 40 5 1 O +X + 6 -300 0 200 R 40 40 6 1 O +X - 14 300 0 200 L 40 40 6 1 O +X + 7 -300 0 200 R 40 40 7 1 O +X - 15 300 0 200 L 40 40 7 1 O +X + 8 -300 0 200 R 40 40 8 1 O +X - 16 300 0 200 L 40 40 8 1 O +ENDDRAW +ENDDEF +# +# vprint8_1 +# +DEF vprint8_1 U 0 40 Y Y 8 F N +F0 "U" -150 100 50 H V C CNN +F1 "vprint8_1" 150 100 50 H V C CNN +DRAW +C 0 0 100 0 0 0 N +X + 1 0 -300 200 U 40 40 1 1 I +X + 2 0 -300 200 U 40 40 2 1 I +X + 3 0 -300 200 U 40 40 3 1 I +X + 4 0 -300 200 U 40 40 4 1 I +X + 5 0 -300 200 U 40 40 5 1 I +X + 6 0 -300 200 U 40 40 6 1 I +X + 7 0 -300 200 U 40 40 7 1 I +X + 8 0 -300 200 U 40 40 8 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/portSpice.bak b/FreeEDA/library/portSpice.bak new file mode 100644 index 0000000..989c366 --- /dev/null +++ b/FreeEDA/library/portSpice.bak @@ -0,0 +1,24 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 11:52:34 PM IST +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 U +X ~ 2 250 0 100 L 30 30 2 1 U +X ~ 3 250 0 100 L 30 30 3 1 U +X ~ 4 250 0 100 L 30 30 4 1 U +X ~ 5 250 0 100 L 30 30 5 1 U +X ~ 6 250 0 100 L 30 30 6 1 U +X ~ 7 250 0 100 L 30 30 7 1 U +X ~ 8 250 0 100 L 30 30 8 1 U +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/portSpice.bck b/FreeEDA/library/portSpice.bck new file mode 100644 index 0000000..8d0e0c0 --- /dev/null +++ b/FreeEDA/library/portSpice.bck @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 Date: Sunday 09 December 2012 11:52:34 PM IST +# +#End Doc Library diff --git a/FreeEDA/library/portSpice.dcm b/FreeEDA/library/portSpice.dcm new file mode 100644 index 0000000..79fed10 --- /dev/null +++ b/FreeEDA/library/portSpice.dcm @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 Date: Sunday 09 December 2012 11:53:42 PM IST +# +#End Doc Library diff --git a/FreeEDA/library/portSpice.lib b/FreeEDA/library/portSpice.lib new file mode 100644 index 0000000..65fda22 --- /dev/null +++ b/FreeEDA/library/portSpice.lib @@ -0,0 +1,24 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 11:53:42 PM IST +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/sourcesSpice.bak b/FreeEDA/library/sourcesSpice.bak new file mode 100644 index 0000000..5298df9 --- /dev/null +++ b/FreeEDA/library/sourcesSpice.bak @@ -0,0 +1,167 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 23 October 2012 11:24:51 AM IST +#encoding utf-8 +# +# CCCS +# +DEF CCCS F 0 40 Y Y 1 F N +F0 "F" -200 100 50 H V C CNN +F1 "CCCS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# CCVS +# +DEF CCVS H 0 40 Y Y 1 F N +F0 "H" -200 100 50 H V C CNN +F1 "CCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 I +X - 2 0 -450 300 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +# exp +# +DEF exp v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "exp" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A 1 -50 100 905 1800 0 1 0 N 0 50 -100 -50 +A 100 51 100 -1794 -900 0 1 0 N 0 50 100 -50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# pwl +# +DEF pwl v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pwl" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50 +A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50 +A -75 -700 750 919 880 0 1 0 N -100 50 -50 50 +A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50 +A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# VCCS +# +DEF VCCS G 0 40 Y Y 1 F N +F0 "G" -200 100 50 H V C CNN +F1 "VCCS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/library/sourcesSpice.bck b/FreeEDA/library/sourcesSpice.bck new file mode 100644 index 0000000..f62a6c9 --- /dev/null +++ b/FreeEDA/library/sourcesSpice.bck @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 Date: Tuesday 23 October 2012 11:24:51 AM IST +# +#End Doc Library diff --git a/FreeEDA/library/sourcesSpice.dcm b/FreeEDA/library/sourcesSpice.dcm new file mode 100644 index 0000000..16f5191 --- /dev/null +++ b/FreeEDA/library/sourcesSpice.dcm @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 Date: Tuesday 23 October 2012 11:25:34 AM IST +# +#End Doc Library diff --git a/FreeEDA/library/sourcesSpice.lib b/FreeEDA/library/sourcesSpice.lib new file mode 100644 index 0000000..ff9d82c --- /dev/null +++ b/FreeEDA/library/sourcesSpice.lib @@ -0,0 +1,201 @@ +EESchema-LIBRARY Version 2.3 Date: Tuesday 28 May 2013 03:57:34 PM IST +#encoding utf-8 +# +# AC +# +DEF AC v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "AC" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# CCCS +# +DEF CCCS F 0 40 Y Y 1 F N +F0 "F" -200 100 50 H V C CNN +F1 "CCCS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# CCVS +# +DEF CCVS H 0 40 Y Y 1 F N +F0 "H" -200 100 50 H V C CNN +F1 "CCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# dc +# +DEF dc v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# exp +# +DEF exp v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "exp" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A 1 -50 100 905 1800 0 1 0 N 0 50 -100 -50 +A 100 51 100 -1794 -900 0 1 0 N 0 50 100 -50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# idc +# +DEF idc IDC 0 40 Y Y 1 F N +F0 "IDC" -200 100 60 H V C CNN +F1 "idc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# pwl +# +DEF pwl v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pwl" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50 +A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50 +A -75 -700 750 919 880 0 1 0 N -100 50 -50 50 +A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50 +A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +# VCCS +# +DEF VCCS G 0 40 Y Y 1 F N +F0 "G" -200 100 50 H V C CNN +F1 "VCCS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/modelEditor/1n4007.lib b/FreeEDA/modelEditor/1n4007.lib new file mode 100644 index 0000000..1e66174 --- /dev/null +++ b/FreeEDA/modelEditor/1n4007.lib @@ -0,0 +1,4 @@ +.model 1n4007 D( Vj=.75 Nbvl=14.976 Cjo=175p Rs=.25 Isr=1.859n ++ Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u ++ Bv=8.1 Fc=.5 Ikf=0 Nr=2 Ibv=20.245m ++ Is=880.5E-18 Xti=3 Ibvl=1.9556m ) \ No newline at end of file diff --git a/FreeEDA/modelEditor/CORE.lib b/FreeEDA/modelEditor/CORE.lib new file mode 100755 index 0000000..c48c4b5 --- /dev/null +++ b/FreeEDA/modelEditor/CORE.lib @@ -0,0 +1,2 @@ +.model K3019PL_3C8 Core(MS=415.2K A=44.82 C=.4112 K=25.74 ++ Area=1.38 Path=4.52) diff --git a/FreeEDA/modelEditor/D.hlp b/FreeEDA/modelEditor/D.hlp new file mode 100755 index 0000000..fd0b2f8 --- /dev/null +++ b/FreeEDA/modelEditor/D.hlp @@ -0,0 +1,16 @@ + name parameter units default example +1 IS saturation current A 1.0e-14 1.0e-14 +2 RS ohmic resistanc Ohm 0 10 +3 N emission coefficient - 1 1.0 +4 TT transit-time sec 0 0.1ns +5 CJO zero-bias junction capacitance F 0 2pF +6 VJ junction potential V 1 0.6 +7 M grading coefficient - 0.5 0.5 +8 EG band-gap energy eV 1.11 1.11 Si +9 XTI saturation-current temp.exp - 3.0 3.0 pn/ 2.0 Schottky +10 KF flicker noise coefficient - 0 +11 AF flicker noise exponent - 1 +12 FC coefficient for forward-bias depletion capacitance formula - 0.5 +13 BV reverse breakdown voltage V infinite 40.0 +14 IBV current at breakdown voltage V 1.0e-3 +15 TNOM parameter measurement temperature deg C 27 50 diff --git a/FreeEDA/modelEditor/D.lib b/FreeEDA/modelEditor/D.lib new file mode 100755 index 0000000..890c37f --- /dev/null +++ b/FreeEDA/modelEditor/D.lib @@ -0,0 +1,3 @@ +.model D1N750 D( Is=880.5E-18 Rs=.25 Ikf=0 N=1 Xti=3 Eg=1.11 Cjo=175p M=.5516 ++ Vj=.75 Fc=.5 Isr=1.859n Nr=2 Bv=8.1 Ibv=20.245m Nbv=1.6989 Ibvl=1.9556m ++ Nbvl=14.976 Tbv1=-21.277u) diff --git a/FreeEDA/modelEditor/NIGBT.lib b/FreeEDA/modelEditor/NIGBT.lib new file mode 100755 index 0000000..8c09dcb --- /dev/null +++ b/FreeEDA/modelEditor/NIGBT.lib @@ -0,0 +1,10 @@ +.MODEL IXGH40N60 NIGBT ( ++ TAU=287.56E-9 ++ KP=50.034 ++ AREA=37.500E-6 ++ AGD=18.750E-6 ++ VT=4.1822 ++ KF=.36047 ++ CGS=31.942E-9 ++ COXD=53.188E-9 ++ VTD=2.6570) diff --git a/FreeEDA/modelEditor/NJF.lib b/FreeEDA/modelEditor/NJF.lib new file mode 100755 index 0000000..dbb2cba --- /dev/null +++ b/FreeEDA/modelEditor/NJF.lib @@ -0,0 +1,4 @@ +.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 ++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u ++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 ++ Af=1) diff --git a/FreeEDA/modelEditor/NMOS-0.5um.lib b/FreeEDA/modelEditor/NMOS-0.5um.lib new file mode 100644 index 0000000..2e6f463 --- /dev/null +++ b/FreeEDA/modelEditor/NMOS-0.5um.lib @@ -0,0 +1,6 @@ +.model mos_n NMOS( TPG=1 TOX=9.5n CJ=550u ETA=0.02125 VMAX=1.8E05 ++ GAMMA=0.62 CGSO=0.3n LD=50n MJSW=0.35 PB=1.1 ++ CGBO=0.45n XJ=0.2U CGDO=0.3n KAPPA=0.1 LEVEL=3 ++ VTO=0.6 NFS=7.20E11 THETA=0.23 CJSW=0.3n PHI=0.7 ++ RSH=2.0 MJ=0.6 UO=420 KP=156u DELTA=0.88 ++ NSUB=1.40E17 ) \ No newline at end of file diff --git a/FreeEDA/modelEditor/NMOS-180nm.lib b/FreeEDA/modelEditor/NMOS-180nm.lib new file mode 100644 index 0000000..51e9b11 --- /dev/null +++ b/FreeEDA/modelEditor/NMOS-180nm.lib @@ -0,0 +1,13 @@ +.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 ++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 ++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18 ++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4 ++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0 ++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0 ++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3 ++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1 ++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 ++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12 ++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 ++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 ++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3) diff --git a/FreeEDA/modelEditor/NMOS-5um.lib b/FreeEDA/modelEditor/NMOS-5um.lib new file mode 100755 index 0000000..a237e1f --- /dev/null +++ b/FreeEDA/modelEditor/NMOS-5um.lib @@ -0,0 +1,5 @@ +* 5um technology + +.model mos_n NMOS( Cgso=0.4n Tox=85n Vto=1 phi=0.7 ++ Level=1 ++ Mj=.5 UO=750 Cgdo=0.4n Gamma=1.4 LAMBDA=0.01 LD=0.7u JS=1u CJ=0.4m CJSW=0.8n MJSW=0.5 PB=0.7 CGBO=0.2n ) diff --git a/FreeEDA/modelEditor/NMOS.lib b/FreeEDA/modelEditor/NMOS.lib new file mode 100755 index 0000000..51e9b11 --- /dev/null +++ b/FreeEDA/modelEditor/NMOS.lib @@ -0,0 +1,13 @@ +.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 ++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 ++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18 ++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4 ++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0 ++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0 ++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3 ++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1 ++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 ++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12 ++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 ++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 ++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3) diff --git a/FreeEDA/modelEditor/NMOS12.lib b/FreeEDA/modelEditor/NMOS12.lib new file mode 100755 index 0000000..721c592 --- /dev/null +++ b/FreeEDA/modelEditor/NMOS12.lib @@ -0,0 +1,5 @@ +.model IRF150 NMOS(Level=3 Gamma=0 Delta=0 Eta=0 Theta=0 Kappa=0 Vmax=0 Xj=0 ++ Tox=100n Uo=600 Phi=.6 Rs=1.624m Kp=20.53u W=.3 L=2u Vto=2.831 ++ Rd=1.031m Rds=444.4K Cbd=3.229n Pb=.8 Mj=.5 Fc=.5 Cgso=9.027n ++ Cgdo=1.679n Rg=13.89 Is=194E-18 N=1 Tt=288n) + diff --git a/FreeEDA/modelEditor/NPN.hlp b/FreeEDA/modelEditor/NPN.hlp new file mode 100755 index 0000000..e492ea1 --- /dev/null +++ b/FreeEDA/modelEditor/NPN.hlp @@ -0,0 +1,17 @@ +1) BF Forward active current gain +2) VJE Base-emitter built-in potential +3) BR Reverse active current gain +4) VJC Base-collector built-in potential +5) IS Transport saturation current +6) VAF Forward mode Early voltage +7) CJE Base-emitter zero-bias Junction capacitance +8) VAR Reverse mode Early voltage +9) NF Forward mode ideality factor +10) CJC Base-collector zero-bias Junction capacitance +11) NR Reverse mode ideality factor +12) RB zero bias base resistance +13) MJE base-emitter capacitance exponent +14) RE emitter resistance +15) MJC base-collector capacitance exponent +16) RC collector resistance +17) EG energy gap for temperature effect on IS diff --git a/FreeEDA/modelEditor/NPN.lib b/FreeEDA/modelEditor/NPN.lib new file mode 100755 index 0000000..6509fe7 --- /dev/null +++ b/FreeEDA/modelEditor/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p ++ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/FreeEDA/modelEditor/PIGBT.lib b/FreeEDA/modelEditor/PIGBT.lib new file mode 100755 index 0000000..d4f9e81 --- /dev/null +++ b/FreeEDA/modelEditor/PIGBT.lib @@ -0,0 +1,10 @@ +.MODEL IXGH40N60 PIGBT ( ++ TAU=287.56E-9 ++ KP=50.034 ++ AREA=37.500E-6 ++ AGD=18.750E-6 ++ VT=4.1822 ++ KF=.36047 ++ CGS=31.942E-9 ++ COXD=53.188E-9 ++ VTD=2.6570) diff --git a/FreeEDA/modelEditor/PJF.lib b/FreeEDA/modelEditor/PJF.lib new file mode 100755 index 0000000..5589571 --- /dev/null +++ b/FreeEDA/modelEditor/PJF.lib @@ -0,0 +1,5 @@ +.model J2N3820 PJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 ++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u ++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 ++ Af=1) + diff --git a/FreeEDA/modelEditor/PMOS .lib b/FreeEDA/modelEditor/PMOS .lib new file mode 100755 index 0000000..6c9bb83 --- /dev/null +++ b/FreeEDA/modelEditor/PMOS .lib @@ -0,0 +1,4 @@ +.model IRF9140 PMOS(Level=3 Gamma=0 Delta=0 Eta=0 Theta=0 Kappa=0 Vmax=0 Xj=0 ++ Tox=100n Uo=300 Phi=.6 Rs=70.6m Kp=10.15u W=1.9 L=2u Vto=-3.67 ++ Rd=60.66m Rds=444.4K Cbd=2.141n Pb=.8 Mj=.5 Fc=.5 Cgso=877.2p ++ Cgdo=369.3p Rg=.811 Is=52.23E-18 N=2 Tt=140n) diff --git a/FreeEDA/modelEditor/PMOS-0.5um.lib b/FreeEDA/modelEditor/PMOS-0.5um.lib new file mode 100644 index 0000000..848e8b0 --- /dev/null +++ b/FreeEDA/modelEditor/PMOS-0.5um.lib @@ -0,0 +1,6 @@ +.model mos_p PMOS( TPG=-1 TOX=9.5n CJ=950u ETA=0.025 VMAX=0.3u ++ GAMMA=0.52 CGSO=0.35n LD=70n MJSW=0.25 PB=1 ++ CGBO=0.45n XJ=0.2U CGDO=0.35n KAPPA=8.0 LEVEL=3 ++ VTO=-0.6 NFS=6.50E11 THETA=0.2 CJSW=0.2n PHI=0.7 ++ RSH=2.5 MJ=0.5 UO=130 KP=48u DELTA=0.25 ++ NSUB=1.0E17 ) \ No newline at end of file diff --git a/FreeEDA/modelEditor/PMOS-180nm.lib b/FreeEDA/modelEditor/PMOS-180nm.lib new file mode 100644 index 0000000..032b5b9 --- /dev/null +++ b/FreeEDA/modelEditor/PMOS-180nm.lib @@ -0,0 +1,11 @@ +.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015 ++ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363 ++ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478 ++ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677 ++ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 ++ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148 ++ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10 ++ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 ++ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 ++ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3 ++ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3) diff --git a/FreeEDA/modelEditor/PMOS-5um.lib b/FreeEDA/modelEditor/PMOS-5um.lib new file mode 100755 index 0000000..9c3ed97 --- /dev/null +++ b/FreeEDA/modelEditor/PMOS-5um.lib @@ -0,0 +1,5 @@ +*5um technology + +.model mos_p PMOS( Cgso=0.4n Tox=85n Vto=-1 phi=0.65 ++ Level=1 ++ Mj=.5 UO=250 Cgdo=0.4n Gamma=0.65 LAMBDA=0.03 LD=0.6u JS=1u CJ=0.18m CJSW=0.6n MJSW=0.5 PB=0.7 CGBO=0.2n ) diff --git a/FreeEDA/modelEditor/PMOS.lib b/FreeEDA/modelEditor/PMOS.lib new file mode 100755 index 0000000..032b5b9 --- /dev/null +++ b/FreeEDA/modelEditor/PMOS.lib @@ -0,0 +1,11 @@ +.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015 ++ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363 ++ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478 ++ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677 ++ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 ++ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148 ++ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10 ++ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 ++ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 ++ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3 ++ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3) diff --git a/FreeEDA/modelEditor/PMOS11.lib b/FreeEDA/modelEditor/PMOS11.lib new file mode 100755 index 0000000..6c9bb83 --- /dev/null +++ b/FreeEDA/modelEditor/PMOS11.lib @@ -0,0 +1,4 @@ +.model IRF9140 PMOS(Level=3 Gamma=0 Delta=0 Eta=0 Theta=0 Kappa=0 Vmax=0 Xj=0 ++ Tox=100n Uo=300 Phi=.6 Rs=70.6m Kp=10.15u W=1.9 L=2u Vto=-3.67 ++ Rd=60.66m Rds=444.4K Cbd=2.141n Pb=.8 Mj=.5 Fc=.5 Cgso=877.2p ++ Cgdo=369.3p Rg=.811 Is=52.23E-18 N=2 Tt=140n) diff --git a/FreeEDA/modelEditor/PNP.lib b/FreeEDA/modelEditor/PNP.lib new file mode 100755 index 0000000..7edda0e --- /dev/null +++ b/FreeEDA/modelEditor/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/FreeEDA/modelEditor/exportModel.py b/FreeEDA/modelEditor/exportModel.py new file mode 100755 index 0000000..10eebd7 --- /dev/null +++ b/FreeEDA/modelEditor/exportModel.py @@ -0,0 +1,77 @@ +#!/usr/bin/python +# exportModel.py is a python script to export a component model to the library. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from setPath import FreeEDA_HOME +from Tkinter import * +from Tkinter import * +import template +import tkMessageBox +import os.path +import os +import Pmw +from string import maketrans + +class ExportModel(): + """Class for exporting the model to the model library""" + def __init__(self,parent): + self.parent=parent + self.modelName="" + # Collect model information available in the project directory + fileList=os.listdir(".") + modelList=[] + + for fileName in fileList: + if "lib" in fileName: + modelList.append(fileName) + + # Create the dialog. + self.dialog = Pmw.SelectionDialog(parent, + title = 'Model Selector', + buttons = ('OK', 'Cancel'), + defaultbutton = 'OK', + scrolledlist_labelpos = 'n', + label_text = 'Please select the model', + scrolledlist_items=modelList, + command = self.apply, + ) + self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) + self.dialog.activate() + + # ProtGocol when window is deleted. + self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) + + def apply(self,result): + sels = self.dialog.getcurselection() + if result=="OK": + if len(sels) == 0: + print 'You clicked on', result, '(no selection)' + return + else: + self.modelName=sels[0] + self.status=1 + else: + self.status=0 + self.dialog.withdraw() + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.dialog.deactivate() + +# Action taken when cancel pressed + def cancel(self, event=None, status=0): + # Catch the status + self.status=status + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.destroy() + +if __name__=='__main__': + root=Tk() + model= ExportModel(root,"xxx") + mainloop() + diff --git a/FreeEDA/modelEditor/helpEditor.py b/FreeEDA/modelEditor/helpEditor.py new file mode 100755 index 0000000..0123842 --- /dev/null +++ b/FreeEDA/modelEditor/helpEditor.py @@ -0,0 +1,43 @@ +#!/usr/bin/python +# helpEditor.py is a python script to display help for the model editor. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com) and Shalini Shrivastava. +# Copyright (C) 2012 Yogesh Dilip Save and Shalini Shrivastava, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from Tkinter import * +import template +import tkMessageBox +import os.path +from string import maketrans +from newModel import readSpecs + +class HelpInfo(template.MyTemplate): + """ Class for displaying help information """ + def body(self, master): + # Help heading + master.configure(width=768, height=576) + Label(master, text="Ngspice Model Editor Help", font=("Helvetica", 16), padx=20, pady=20).grid(row=0) + +# Add standard button box (OK) + def buttonbox(self): + # Construct a new frame + box = Frame(self) + # Create buttons + w = Button(box, text="OK", width=10, command=self.ok, default=ACTIVE) + w.pack(padx=5, pady=5) + + # Bind Return and escape keys + self.bind("", self.ok) + self.bind("", self.ok) + # Create the frame "box" + box.pack() + + def statusBar(self): + pass + +if __name__=='__main__': + root=Tk() + model= HelpInfo(root) + mainloop() + diff --git a/FreeEDA/modelEditor/importModel.py b/FreeEDA/modelEditor/importModel.py new file mode 100755 index 0000000..a645fd6 --- /dev/null +++ b/FreeEDA/modelEditor/importModel.py @@ -0,0 +1,86 @@ +#!/usr/bin/python +# importModel.py is a python script to import a component model from library. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from setPath import FreeEDA_HOME +from Tkinter import * +from Tkinter import * +import template +import tkMessageBox +import os.path +import os +import Pmw +from string import maketrans + +class ImportModel(): + """Class for importing a model from the library""" + def __init__(self,parent): + self.parent=parent + self.modelName="" + # Collect model information available in the model library + try: + self.FreeEDA_HOME=FreeEDA_HOME + except NameError: + try: + self.FreeEDA_HOME=os.environ["FreeEDA_HOME"] + except KeyError: + tkMessageBox.showerror("Error FreeEDA_HOME is not set","Please set FreeEDA_HOME variable in .bashrc\n\nStep to set FreeEDA_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export FreeEDA_HOME=\" to it.\n 3) source ~/.bashrc") + exit(0) + + fileList=os.listdir(self.FreeEDA_HOME+"/modelLibrary") + modelList=[] + + for fileName in fileList: + if "lib" in fileName: + modelList.append(fileName) + + # Create the dialog. + self.dialog = Pmw.SelectionDialog(parent, + title = 'Model Selector', + buttons = ('OK', 'Cancel'), + defaultbutton = 'OK', + scrolledlist_labelpos = 'n', + label_text = 'Please select the model', + scrolledlist_items=modelList, + command = self.apply, + ) + self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) + self.dialog.activate() + + # Protocol when window is deleted. + self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) + + def apply(self,result): + sels = self.dialog.getcurselection() + if result=="OK": + if len(sels) == 0: + print 'You clicked on', result, '(no selection)' + return + else: + self.modelName=sels[0] + self.status=1 + else: + self.status=0 + self.dialog.withdraw() + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.dialog.deactivate() + +# Action taken when cancel pressed + def cancel(self, event=None, status=0): + # Catch the status + self.status=status + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.destroy() + +if __name__=='__main__': + root=Tk() + model= ImportModel(root,"xxx") + mainloop() + diff --git a/FreeEDA/modelEditor/modelEditor.py b/FreeEDA/modelEditor/modelEditor.py new file mode 100755 index 0000000..b12b8db --- /dev/null +++ b/FreeEDA/modelEditor/modelEditor.py @@ -0,0 +1,166 @@ +#!/usr/bin/python +# modelEditor.py is a python script to display fornt end of the model editor. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com) and Shalini Shrivastava. +# Copyright (C) 2012 Yogesh Dilip Save and Shalini Shrivastava, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from setPath import FreeEDA_HOME +from Tkinter import * +import tkMessageBox +import newModel +import openModel +import selectModel +import importModel +import exportModel +import os +import sys + +# Create a new model +def newEditor(e=None): +# Read model information (name and type) + model= newModel.ModelInfo(root) +# Create model file + if model.status: + modelParam = newModel.ModelParam(root,model.modelName,model.modelType) + +# Open an existing model +def openEditor(e=None): + model= openModel.ExistingModelInfo(root) +# Open model file + if model.status: + modelParam = openModel.ExistingModelParam(root,model.modelName) + +# Import an existing model from library +def importEditor(e=None): + model=importModel.ImportModel(root) + temp_model_name=model.modelName + if temp_model_name.startswith('NMOS',0,4): + if os.system("cp "+FreeEDA_HOME+"/modelLibrary/"+model.modelName+" mos_n.lib"): + tkMessageBox.showerror("Import Failed","Unable to import model file "+model.modelName) + else: + tkMessageBox.showinfo("Successfully imported","Model file "+model.modelName+" is successfully imported to the project.") + elif temp_model_name.startswith('PMOS',0,4): + if os.system("cp "+FreeEDA_HOME+"/modelLibrary/"+model.modelName+" mos_p.lib"): + tkMessageBox.showerror("Import Failed","Unable to import model file "+model.modelName) + else: + tkMessageBox.showinfo("Successfully imported","Model file "+model.modelName+" is successfully imported to the project.") + elif temp_model_name.startswith('D',0,1): + if os.system("cp "+FreeEDA_HOME+"/modelLibrary/"+model.modelName+" 1n4007.lib"): + tkMessageBox.showerror("Import Failed","Unable to import model file "+model.modelName) + else: + tkMessageBox.showinfo("Successfully imported","Model file "+model.modelName+" is successfully imported to the project.") + else: + if os.system("cp "+FreeEDA_HOME+"/modelLibrary/"+model.modelName+" ."): + tkMessageBox.showerror("Import Failed","Unable to import model file "+model.modelName) + else: + tkMessageBox.showinfo("Successfully imported","Model file "+model.modelName+" is successfully imported to the project.") + + +# Export an existing model to library +def exportEditor(e=None): + model=exportModel.ExportModel(root) + if os.system("cp "+model.modelName+" "+FreeEDA_HOME+"/modelLibrary/"): + tkMessageBox.showerror("Export Failed","Unable to export model file "+model.modelName) + else: + tkMessageBox.showinfo("Successfully exported","Model file "+model.modelName+" is successfully exported to the model library") + +# Exit an model editor +def exitEditor(e=None): + if tkMessageBox.askokcancel("QUIT","Do you really wish to quit?"): + root.destroy() + +# Display help content +def helpEditor(e=None): + pass + +# Display help content +def aboutEditor(): + tkMessageBox.showinfo("About Editor","Created by Yogesh Dilip Save and Shalini Shrivastava") + +##Function to open select model from the list to modify it +def openSelectModel(e=None): + filename=sys.argv[1] + #Getting lenght of Model List and clicked result + lenght_modlist,result=callModel(root,filename) + response=result + if result=="OK": + for item in range(lenght_modlist-1): + if response=="OK": + temp_lenght,temp_result=callModel(root,filename) + response=temp_result + else: + break + + else: + pass + +def callModel(root,filename): + model=selectModel.ModelNameList(root, filename) + if model.status: + # Open the circuit file + modelFile=model.modelName+".lib" + # Check model file already exists + if os.path.exists(modelFile): + if tkMessageBox.askokcancel("Model already exists","Do you want to edit?"): + modelParam = openModel.ExistingModelParam(root,model.modelName) + else: + modelParam = newModel.ModelParam(root,model.modelName,model.modelType) + return len(model.modelList),model.click_result + + +root = Tk() +root.title("Ngspice Model Editor") +root.geometry("600x400+300+125") + +# Create and configure a menu +menu = Menu(root) +root.config(menu=menu) + +# Create File menu +filemenu= Menu(menu) +menu.add_cascade(label="File", menu=filemenu) +filemenu.add_command(label="New F2", command=newEditor) +#filemenu.add_command(label="Open F3", command=openEditor) +filemenu.add_command(label="Edit F7",command=openSelectModel) +filemenu.add_separator() +filemenu.add_command(label="Import F4", command=importEditor) +filemenu.add_command(label="Export F5", command=exportEditor) +filemenu.add_separator() +filemenu.add_command(label="Exit F6", command=exitEditor) + +# Create help menu +helpmenu=Menu(menu) +menu.add_cascade(label="Help", menu=helpmenu) +helpmenu.add_command(label="Help F1",command=helpEditor) +helpmenu.add_command(label="About...",command=aboutEditor) + +# Select device from devices in circuit file + +"""model=selectModel.ModelNameList(root, filename) +print "Model",model.modelList + + +if model.status: + # Open the circuit file + modelFile=model.modelName+".lib" + # Check model file already exists + if os.path.exists(modelFile): + if tkMessageBox.askokcancel("Model already exists","Do you want to edit?"): + modelParam = openModel.ExistingModelParam(root,model.modelName) + else: + modelParam = newModel.ModelParam(root,model.modelName,model.modelType) +""" +# Protocol for deletion of main window +root.protocol("WM_DELETE_WINDOW",exitEditor) + +# Create shortcut keys +root.bind("", newEditor) +#root.bind("", openEditor) +root.bind("", importEditor) +root.bind("", exportEditor) +root.bind("", exitEditor) +root.bind("", helpEditor) +root.bind("", openSelectModel) + +mainloop() diff --git a/FreeEDA/modelEditor/newModel.py b/FreeEDA/modelEditor/newModel.py new file mode 100755 index 0000000..353acbe --- /dev/null +++ b/FreeEDA/modelEditor/newModel.py @@ -0,0 +1,187 @@ +#!/usr/bin/python +# newModel.py is a python script to create a new model. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com) and Shalini Shrivastava. +# Copyright (C) 2012 Yogesh Dilip Save and Shalini Shrivastava, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from setPath import FreeEDA_HOME +from Tkinter import * +import template +import tkMessageBox +import os.path +from string import maketrans + +class ModelInfo(template.MyTemplate): + """ Class for accept model information from user """ + def body(self, master): + # Define component type and set it to Diode + self.component = StringVar() + self.component.set("D") + + # Ask for compoent name + Label(master, text="Enter Component name:").grid(row=0) + self.e1 = Entry(master) + self.e1.grid(row=0, column=1,pady=10,columnspan=2) + + # Ask for component type + Label(master, text="Enter type of Component:").grid(row=1) + Label(master,text="Diode").grid(row=2,column=1,columnspan=2,sticky=W) + Radiobutton(master, text="Diode", variable=self.component, value="D").grid(row=3,column=1,columnspan=2,sticky=W) + Label(master, text="Bipolar Junction Transistor (BJT)").grid(row=4,column=1,columnspan=2,sticky=W) + Radiobutton(master, text="NPN", variable=self.component, value="NPN").grid(row=5,column=1,sticky=W) + Radiobutton(master, text="PNP", variable=self.component, value="PNP").grid(row=5,column=2,sticky=W) + Label(master, text="Metal Oxide Semiconductor (MOS)").grid(row=6,column=1,columnspan=2,sticky=W) + Radiobutton(master, text="NMOS(Level-1 5um)", variable=self.component, value="NMOS-5um").grid(row=7,column=1,sticky=W) + Radiobutton(master, text="PMOS(Level-1 5um)", variable=self.component, value="PMOS-5um").grid(row=7,column=2,sticky=W) + Radiobutton(master, text="NMOS(Level-3 0.5um)", variable=self.component, value="NMOS-0.5um").grid(row=8,column=1,sticky=W) + Radiobutton(master, text="PMOS(Level-3 0.5um)", variable=self.component, value="PMOS-0.5um").grid(row=8,column=2,sticky=W) + Radiobutton(master, text="NMOS(Level-8 180nm)", variable=self.component, value="NMOS-180nm").grid(row=9,column=1,sticky=W) + Radiobutton(master, text="PMOS(Level-8 180nm)", variable=self.component, value="PMOS-180nm").grid(row=9,column=2,sticky=W) + Label(master, text="Junction Field Effect Transistor (JFET)").grid(row=10,column=1,columnspan=2,sticky=W) + Radiobutton(master, text="N-JFET", variable=self.component, value="NJF").grid(row=11,column=1,sticky=W) + Radiobutton(master, text="P-JFET", variable=self.component, value="PJF").grid(row=11,column=2,sticky=W) + Label(master, text="IGBT").grid(row=12,column=1,columnspan=2,sticky=W) + Radiobutton(master, text="N-IGBT", variable=self.component, value="NIGBT").grid(row=13,column=1,sticky=W) + Radiobutton(master, text="P-IGBT", variable=self.component, value="PIGBT").grid(row=13,column=2,sticky=W) + Label(master, text="Magnetic Core").grid(row=14,column=1,columnspan=2,sticky=W) + Radiobutton(master, text="Magnetic Core", variable=self.component, value="CORE").grid(row=15,column=1,columnspan=2,sticky=W) + +# Collect model information + def apply(self): + self.modelType=self.component.get() + +# Validate the model information + def validate(self): + # Remove trailing and leading spaces from modelName + self.modelName=self.e1.get().strip() + if len(self.modelName): + return 1 + else: + tkMessageBox.showwarning("Bad input","Component Name is not specified, please try again") + return 0 + +class ModelParam(template.MyTemplate): + """Class for specifying parameter of the model""" + def __init__(self,parent,name,type): + # Collect model information + self.modelName=name + self.modelType=type + + # Call base class MyTemplate + template.MyTemplate.__init__(self,parent) + + def body(self, master): + try: + self.FreeEDA_HOME=FreeEDA_HOME + except NameError: + try: + self.FreeEDA_HOME=os.environ["FreeEDA_HOME"] + except KeyError: + tkMessageBox.showerror("Error FreeEDA_HOME is not set","Please set FreeEDA_HOME variable in .bashrc\n\nStep to set FreeEDA_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export FreeEDA_HOME=\" to it.\n 3) source ~/.bashrc") + exit(0) + + HOME=self.FreeEDA_HOME+"/modelEditor/" + # Open template of the library file corresponding model + fileName=HOME+self.modelType+".lib" + # Find model information and parameters + self.info, self.params=readSpecs(fileName) + + # Construct parameter editor window + i,j=0,0 + for each in self.params.keys(): + # Display parameter name + Label(master, text=each, padx=5, pady=5).grid(row=j, column=2*i, sticky=W) + + # Create entry for parameter value + vars(self)[each] = Entry(master) + vars(self)[each].insert(0,self.params[each]) + vars(self)[each].grid(row=j, column=2*i+1) + + # Display help information in the status bar + vars(self)[each].bind('', self.enterSpec) + vars(self)[each].bind('', self.leaveSpec) + + # Column and row adjustment for proper display + i+=1 + if i%5==0: + i,j=0,j+1 + + def enterSpec(self,event): + self.statusbar.configure(text="Find help in the " +self.modelType+".hlp file") + + def leaveSpec(self,event): + self.statusbar.configure(text='') + + def apply(self): + # Copy model infomation + self.info[1]=self.modelName + self.info[2]=self.modelType + # Write model parameters to file + if self.writeModelFile(): + tkMessageBox.showinfo("Info","Model file " +self.modelName+" is created") + + def writeModelFile(self): + """ a method for writing model file""" + # Create model file for writing + try: + f = open(self.info[1]+".lib","w") + except : + tkMessageBox.showwarning("Error","Model file can not be wriiten. please check the file system permission") + return 0 + f.write(".model " + self.info[1] + " " + self.info[2] + "( ") + i=0 + for param in self.params.keys(): + paramName = getattr(self,param) + paramValueGet = getattr(paramName,'get') + f.write(param + "=" + paramValueGet()+" ") + i+=1 + # Column and row adjustment for proper display + if i%5==0: + i=0 + f.write("\n+ ") + f.write(")") + f.close() + return 1 + +def readSpecs(fileName): + """Read parameters and model information""" +# Variable to store parameter and model information + params={} + info=[] + +# Open parameter file + if os.path.exists(fileName): + try: + f = open(fileName) + except : + tkMessageBox.showwarning("Bad input","Model file does not exit, please try again") + return info, params + else: + tkMessageBox.showwarning("Bad input","Model file does not exit, please try again") + return info, params + data=f.read() + f.close() + +# Seperate model and parameter information + data=data.split('(') + infoData=data[0] + paramsData=data[1] + +# Collect model information in the list + info=infoData.split() + +# Collect model parameter in the dictionary + paramsData=paramsData.translate(maketrans('\n+)',' ')) + paramsData=paramsData.split() + for each in paramsData: + paramdata=each.split('=') + params[paramdata[0]]=paramdata[1] + return info, params + +if __name__=='__main__': + root=Tk() + model= ModelInfo(root) + modelParam = ModelParam(root,model.modelName,model.modelType) + mainloop() + diff --git a/FreeEDA/modelEditor/openModel.py b/FreeEDA/modelEditor/openModel.py new file mode 100755 index 0000000..2d3703d --- /dev/null +++ b/FreeEDA/modelEditor/openModel.py @@ -0,0 +1,116 @@ +#!/usr/bin/python +# openModel.py is a python script to open an existing model. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com) and Shalini Shrivastava. +# Copyright (C) 2012 Yogesh Dilip Save and Shalini Shrivastava, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from Tkinter import * +import template +import tkMessageBox +import os.path +from string import maketrans +from newModel import readSpecs + +class ExistingModelInfo(template.MyTemplate): + """ Class for accept model information from user """ + def body(self, master): + # Ask for compoent name + Label(master, text="Enter Component name:").grid(row=0) + self.e1 = Entry(master) + self.e1.grid(row=0, column=1,pady=10,columnspan=2) + +# Collect model information + def apply(self): + pass + +# Validate the model information + def validate(self): + # Remove trailing and leading spaces from modelName + self.modelName=self.e1.get().strip() + if len(self.modelName): + return 1 + else: + tkMessageBox.showwarning("Bad input","Component Name is not specified, please try again") + return 0 + +class ExistingModelParam(template.MyTemplate): + """Class for specifying parameter of the model""" + def __init__(self,parent,name): + # Collect model information + self.modelName=name + + # Call base class MyTemplate + template.MyTemplate.__init__(self,parent) + + + def body(self, master): + # Open template of the library file corresponding model + fileName=self.modelName+".lib" + # Find model information and parameters + self.info, self.params=readSpecs(fileName) + + # Return if model information is not available + if len(self.info) == 0: + self.cancel() + + # Construct parameter editor window + i,j=0,0 + for each in self.params.keys(): + # Display parameter name + Label(master, text=each, padx=5, pady=5).grid(row=j, column=2*i, sticky=W) + + # Create entry for parameter value + vars(self)[each] = Entry(master) + vars(self)[each].insert(0,self.params[each]) + vars(self)[each].grid(row=j, column=2*i+1) + + # Display help information in the status bar + vars(self)[each].bind('', self.enterSpec) + vars(self)[each].bind('', self.leaveSpec) + + # Column and row adjustment for proper display + i+=1 + if i%5==0: + i,j=0,j+1 + + def enterSpec(self,event): + self.statusbar.configure(text="Find help in the " +self.info[2]+".hlp file") + + def leaveSpec(self,event): + self.statusbar.configure(text='') + + def apply(self): + # Write model parameters to file + if self.writeModelFile(): + tkMessageBox.showinfo("Info","Model file " +self.modelName+" is modified") + + def writeModelFile(self): + """ a method for writing model file""" + # Create model file for writing + try: + f = open(self.info[1]+".lib","w") + except : + tkMessageBox.showwarning("Error","Model file can not be wriiten. please check the file system permission") + return 0 + f.write(".model " + self.info[1] + " " + self.info[2] + "( ") + i=0 + for param in self.params.keys(): + paramName = getattr(self,param) + paramValueGet = getattr(paramName,'get') + f.write(param + "=" + paramValueGet()+" ") + i+=1 + # Column and row adjustment for proper display + if i%5==0: + i=0 + f.write("\n+ ") + f.write(")") + f.close() + return 1 + +if __name__=='__main__': + root=Tk() + model= ExistingModelInfo(root) + modelParam = ExistingModelParam(root,model.modelName) + mainloop() + diff --git a/FreeEDA/modelEditor/selectModel.py b/FreeEDA/modelEditor/selectModel.py new file mode 100755 index 0000000..33e8ef2 --- /dev/null +++ b/FreeEDA/modelEditor/selectModel.py @@ -0,0 +1,155 @@ +#!/usr/bin/python +# selectModel.py is a python script to select a component to create a model. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from setPath import FreeEDA_HOME +from Tkinter import * +import template +import tkMessageBox +import os.path +import os +import Pmw +from string import maketrans + +class ModelNameList(): + """Class for specifying parameter of the model""" + def __init__(self,parent,filename): + self.parent=parent + self.modelName="" + self.modelType="" + self.modelList=[] + self.click_result="" + + # Collect model information from the circuit file + try: + self.FreeEDA_HOME=FreeEDA_HOME + except NameError: + try: + self.FreeEDA_HOME=os.environ["FreeEDA_HOME"] + except KeyError: + tkMessageBox.showerror("Error FreeEDA_HOME is not set","Please set FreeEDA_HOME variable in .bashrc\n\nStep to set FreeEDA_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export FreeEDA_HOME=\" to it.\n 3) source ~/.bashrc") + exit(0) + + HOME=self.FreeEDA_HOME="/modelEditor/" + # Open the circuit file + self.fileName=filename + # Open parameter file + if os.path.exists(self.fileName): + try: + f = open(self.fileName) + except : + tkMessageBox.showwarning("Bad input","Circuit netlist does not exit, please try again") + return + else: + tkMessageBox.showwarning("Bad input","Circuit netlist does not exit, please try again") + return + + # Read the data from file + data=f.read() + + # Close the file + f.close() + netlist=data.splitlines() + # Find the various model library required + self.modelInfo={} + + for eachline in netlist: + eachline=eachline.strip() + if len(eachline)>1: + eachline=eachline.lower() + words=eachline.split() + if eachline[0]=='d': + modelName=words[3] + modelType=words[3] + self.modelList.append(words[0]+":"+modelName) + self.modelInfo[modelName]=modelType + elif eachline[0]=='q': + modelName=words[4] + if words[4]=='npn': + modelType="NPN" + elif words[4]=='pnp': + modelType="PNP" + else: + modelType=words[4] + + self.modelList.append(words[0]+":"+modelName) + self.modelInfo[modelName]=modelType + + elif eachline[0]=='m': + modelName=words[4] + if words[4]=='nmos': + modelType="NMOS" + elif words[4]=='pmos': + modelType="PMOS" + else: + modelType=words[4] + self.modelList.append(words[0]+":"+modelName) + self.modelInfo[modelName]=modelType + + elif eachline[0]=='j': + modelName=words[4] + if words[4]=='pjf': + modelType='PJF' + elif words[4]=='njf': + modelType='NJF' + else: + modelType=words[4] + self.modelList.append(words[0]+":"+modelName) + self.modelInfo[modelName]=modelType + else: + continue + + # Create the dialog. + + self.dialog = Pmw.SelectionDialog(parent, + title = 'Model Selector', + buttons = ('OK', 'Cancel'), + defaultbutton = 'OK', + scrolledlist_labelpos = 'n', + label_text = 'Please select the model', + scrolledlist_items=self.modelList, + command = self.apply, + ) + self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) + self.dialog.activate() + + # Protocol when window is deleted. + self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) + + def apply(self,result): + sels = self.dialog.getcurselection() + self.click_result=result + if result=="OK": + if len(sels) == 0: + print 'You clicked on', result, '(no selection)' + return + else: + self.modelName=sels[0].partition(':')[2] + self.modelType=self.modelInfo[self.modelName] + self.status=1 + + else: + self.status=0 + self.dialog.withdraw() + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.dialog.deactivate() + +# Action taken when cancel pressed + def cancel(self, event=None, status=0): + # Catch the status + self.status=status + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.destroy() + +if __name__=='__main__': + root=Tk() + model= ModelNameList(root,"xxx") + mainloop() + diff --git a/FreeEDA/modelEditor/setPath.py b/FreeEDA/modelEditor/setPath.py new file mode 100755 index 0000000..03a4e29 --- /dev/null +++ b/FreeEDA/modelEditor/setPath.py @@ -0,0 +1,2 @@ +#!/usr/bin/python +FreeEDA_HOME="/home/ambi/FreeEDA" diff --git a/FreeEDA/modelEditor/template.py b/FreeEDA/modelEditor/template.py new file mode 100755 index 0000000..5b2ee06 --- /dev/null +++ b/FreeEDA/modelEditor/template.py @@ -0,0 +1,114 @@ +#!/usr/bin/python +from Tkinter import * +import os + + +class MyTemplate(Toplevel): + """Template to construct new window""" +# Define constructor + def __init__(self, parent, title=None): + # Set new window properties same as parent + Toplevel.__init__(self, parent) + # Create a new window on top of the parent such that don't appear in taskbar + self.transient(parent) + + # Set the title + if title: + self.title(title) + # Set Parent of active window + self.parent =parent + + # Create a new frame + body =Frame (self) + + # Call body method + self.initial_focus = self.body(body) + # Display body + body.pack(padx=5, pady=5) + + # Create buttons + self.buttonbox() + # Create status bar + self.statusBar() + # Take control of all the events + self.grab_set() + + # Take control of all the keyboard events + if not self.initial_focus: + self.initial_focus=self + + # Protocol when window is deleted. + self.protocol("WM_DELETE_WINDOW",self.cancel) + + # Position the geometry respect to main window + self.geometry("+%d+%d" % (parent.winfo_rootx()+50,parent.winfo_rooty()+50)) + self.initial_focus.focus_set() + + + # Wait for widget to be destroyed + self.wait_window(self) + +# Construction of body of the window + def body(self, master): + # Create dialog body. This method should be overridden + pass + +# Add standard button box (OK, Cancel). Override if you don't want the standard buttons + def buttonbox(self): + # Construct a new frame + box = Frame(self) + # Create buttons + w = Button(box, text="OK", width=10, command=self.ok, default=ACTIVE) + w.pack(side=LEFT, padx=5, pady=5) + w = Button(box, text="Cancel", width=10, command=self.cancel) + w.pack(side=LEFT, padx=5, pady=5) + + # Bind Return and escape keys + self.bind("", self.ok) + self.bind("", self.cancel) + # Create the frame "box" + box.pack() + +# Add standard status bar. Override if you don't want the status bar + def statusBar(self): + self.statusbar = Label(self, text="", bd=1, relief=SUNKEN, anchor=W) + self.statusbar.pack(side=BOTTOM, fill=X) + +# Template for action taken when OK is pressed + def ok(self, event=None): + # If data is not valid then put the focus back + if not self.validate(): + self.initial_focus.focus_set() + return + # Remove the window from the screen (without destroying it) + self.withdraw() + # Call all pending idle tasks, without processing any other events. + self.update_idletasks() + # Perform required task (collection of result, inputs etc.) + self.apply() + # Take action when all task has finished + self.cancel(status=1) + +# Template for action taken when cancel pressed + def cancel(self, event=None, status=0): + # Catch the status + self.status=status + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.destroy() + +# Template for validation of data + def validate(self): + return 1 + +# Template for required action (Saving Data, results) + def apply(self): + pass + +# Test case +if __name__=='__main__': + root=Tk() + d =MyTemplate(root) + mainloop() + diff --git a/FreeEDA/modelLibrary/1n4007.lib b/FreeEDA/modelLibrary/1n4007.lib new file mode 100755 index 0000000..89d421d --- /dev/null +++ b/FreeEDA/modelLibrary/1n4007.lib @@ -0,0 +1,2 @@ +.model 1n4007 D( IS=7.02767e-09 RS=0.0341512 N=1.80803 EG=1.05743 XTI=5 BV=1000 IBV=5e-08 CJO=1E-11 ++VJ=0.7 M=0.5 FC=0.5 TT=1E-07 KF=0 AF=1 ) diff --git a/FreeEDA/modelLibrary/1n4148.lib b/FreeEDA/modelLibrary/1n4148.lib new file mode 100755 index 0000000..b32fdf8 --- /dev/null +++ b/FreeEDA/modelLibrary/1n4148.lib @@ -0,0 +1,2 @@ +.model 1n4148 D( Is=2.495E-09 Rs=4.755E-01 n=1.679 tt=3.030E-09 Cjo=1.700E-12 M=1.959E-01 ++ Vj=1 Bv=1.000E+02 ibv=1.000E-04 ) diff --git a/FreeEDA/modelLibrary/CORE.lib b/FreeEDA/modelLibrary/CORE.lib new file mode 100755 index 0000000..c48c4b5 --- /dev/null +++ b/FreeEDA/modelLibrary/CORE.lib @@ -0,0 +1,2 @@ +.model K3019PL_3C8 Core(MS=415.2K A=44.82 C=.4112 K=25.74 ++ Area=1.38 Path=4.52) diff --git a/FreeEDA/modelLibrary/D.lib b/FreeEDA/modelLibrary/D.lib new file mode 100755 index 0000000..890c37f --- /dev/null +++ b/FreeEDA/modelLibrary/D.lib @@ -0,0 +1,3 @@ +.model D1N750 D( Is=880.5E-18 Rs=.25 Ikf=0 N=1 Xti=3 Eg=1.11 Cjo=175p M=.5516 ++ Vj=.75 Fc=.5 Isr=1.859n Nr=2 Bv=8.1 Ibv=20.245m Nbv=1.6989 Ibvl=1.9556m ++ Nbvl=14.976 Tbv1=-21.277u) diff --git a/FreeEDA/modelLibrary/NIGBT.lib b/FreeEDA/modelLibrary/NIGBT.lib new file mode 100755 index 0000000..8c09dcb --- /dev/null +++ b/FreeEDA/modelLibrary/NIGBT.lib @@ -0,0 +1,10 @@ +.MODEL IXGH40N60 NIGBT ( ++ TAU=287.56E-9 ++ KP=50.034 ++ AREA=37.500E-6 ++ AGD=18.750E-6 ++ VT=4.1822 ++ KF=.36047 ++ CGS=31.942E-9 ++ COXD=53.188E-9 ++ VTD=2.6570) diff --git a/FreeEDA/modelLibrary/NJF.lib b/FreeEDA/modelLibrary/NJF.lib new file mode 100755 index 0000000..dbb2cba --- /dev/null +++ b/FreeEDA/modelLibrary/NJF.lib @@ -0,0 +1,4 @@ +.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 ++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u ++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 ++ Af=1) diff --git a/FreeEDA/modelLibrary/NMOS-0.5um.lib b/FreeEDA/modelLibrary/NMOS-0.5um.lib new file mode 100755 index 0000000..2e6f463 --- /dev/null +++ b/FreeEDA/modelLibrary/NMOS-0.5um.lib @@ -0,0 +1,6 @@ +.model mos_n NMOS( TPG=1 TOX=9.5n CJ=550u ETA=0.02125 VMAX=1.8E05 ++ GAMMA=0.62 CGSO=0.3n LD=50n MJSW=0.35 PB=1.1 ++ CGBO=0.45n XJ=0.2U CGDO=0.3n KAPPA=0.1 LEVEL=3 ++ VTO=0.6 NFS=7.20E11 THETA=0.23 CJSW=0.3n PHI=0.7 ++ RSH=2.0 MJ=0.6 UO=420 KP=156u DELTA=0.88 ++ NSUB=1.40E17 ) \ No newline at end of file diff --git a/FreeEDA/modelLibrary/NMOS-180nm.lib b/FreeEDA/modelLibrary/NMOS-180nm.lib new file mode 100644 index 0000000..51e9b11 --- /dev/null +++ b/FreeEDA/modelLibrary/NMOS-180nm.lib @@ -0,0 +1,13 @@ +.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 ++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 ++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18 ++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4 ++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0 ++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0 ++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3 ++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1 ++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 ++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12 ++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 ++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 ++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3) diff --git a/FreeEDA/modelLibrary/NMOS-5um.lib b/FreeEDA/modelLibrary/NMOS-5um.lib new file mode 100755 index 0000000..a237e1f --- /dev/null +++ b/FreeEDA/modelLibrary/NMOS-5um.lib @@ -0,0 +1,5 @@ +* 5um technology + +.model mos_n NMOS( Cgso=0.4n Tox=85n Vto=1 phi=0.7 ++ Level=1 ++ Mj=.5 UO=750 Cgdo=0.4n Gamma=1.4 LAMBDA=0.01 LD=0.7u JS=1u CJ=0.4m CJSW=0.8n MJSW=0.5 PB=0.7 CGBO=0.2n ) diff --git a/FreeEDA/modelLibrary/NPN.lib b/FreeEDA/modelLibrary/NPN.lib new file mode 100755 index 0000000..6509fe7 --- /dev/null +++ b/FreeEDA/modelLibrary/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p ++ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/FreeEDA/modelLibrary/PIGBT.lib b/FreeEDA/modelLibrary/PIGBT.lib new file mode 100755 index 0000000..d4f9e81 --- /dev/null +++ b/FreeEDA/modelLibrary/PIGBT.lib @@ -0,0 +1,10 @@ +.MODEL IXGH40N60 PIGBT ( ++ TAU=287.56E-9 ++ KP=50.034 ++ AREA=37.500E-6 ++ AGD=18.750E-6 ++ VT=4.1822 ++ KF=.36047 ++ CGS=31.942E-9 ++ COXD=53.188E-9 ++ VTD=2.6570) diff --git a/FreeEDA/modelLibrary/PJF.lib b/FreeEDA/modelLibrary/PJF.lib new file mode 100755 index 0000000..5589571 --- /dev/null +++ b/FreeEDA/modelLibrary/PJF.lib @@ -0,0 +1,5 @@ +.model J2N3820 PJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 ++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u ++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 ++ Af=1) + diff --git a/FreeEDA/modelLibrary/PMOS-0.5um.lib b/FreeEDA/modelLibrary/PMOS-0.5um.lib new file mode 100755 index 0000000..848e8b0 --- /dev/null +++ b/FreeEDA/modelLibrary/PMOS-0.5um.lib @@ -0,0 +1,6 @@ +.model mos_p PMOS( TPG=-1 TOX=9.5n CJ=950u ETA=0.025 VMAX=0.3u ++ GAMMA=0.52 CGSO=0.35n LD=70n MJSW=0.25 PB=1 ++ CGBO=0.45n XJ=0.2U CGDO=0.35n KAPPA=8.0 LEVEL=3 ++ VTO=-0.6 NFS=6.50E11 THETA=0.2 CJSW=0.2n PHI=0.7 ++ RSH=2.5 MJ=0.5 UO=130 KP=48u DELTA=0.25 ++ NSUB=1.0E17 ) \ No newline at end of file diff --git a/FreeEDA/modelLibrary/PMOS-180nm.lib b/FreeEDA/modelLibrary/PMOS-180nm.lib new file mode 100644 index 0000000..032b5b9 --- /dev/null +++ b/FreeEDA/modelLibrary/PMOS-180nm.lib @@ -0,0 +1,11 @@ +.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015 ++ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363 ++ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478 ++ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677 ++ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 ++ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148 ++ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10 ++ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 ++ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 ++ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3 ++ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3) diff --git a/FreeEDA/modelLibrary/PMOS-5um.lib b/FreeEDA/modelLibrary/PMOS-5um.lib new file mode 100755 index 0000000..9c3ed97 --- /dev/null +++ b/FreeEDA/modelLibrary/PMOS-5um.lib @@ -0,0 +1,5 @@ +*5um technology + +.model mos_p PMOS( Cgso=0.4n Tox=85n Vto=-1 phi=0.65 ++ Level=1 ++ Mj=.5 UO=250 Cgdo=0.4n Gamma=0.65 LAMBDA=0.03 LD=0.6u JS=1u CJ=0.18m CJSW=0.6n MJSW=0.5 PB=0.7 CGBO=0.2n ) diff --git a/FreeEDA/modelLibrary/PNP.lib b/FreeEDA/modelLibrary/PNP.lib new file mode 100755 index 0000000..7edda0e --- /dev/null +++ b/FreeEDA/modelLibrary/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/FreeEDA/report/presentation/FreeEDA.tex b/FreeEDA/report/presentation/FreeEDA.tex new file mode 100644 index 0000000..8c05f23 --- /dev/null +++ b/FreeEDA/report/presentation/FreeEDA.tex @@ -0,0 +1,179 @@ +%$Header: /cvsroot/latex-beamer/latex-beamer/solutions/generic-talks/generic-ornate-15min-45min.en.tex,v 1.4 2004/10/07 20:53:08 tantau Exp $ +\documentclass{beamer} +\mode +{ + \usecolortheme{seahorse} + \usefonttheme{professionalfonts} + \useinnertheme{rounded} + \useoutertheme{shadow} +% \useoutertheme{smoothbars} +} +%\setbeamertemplate{background canvas}[vertical shading][bottom=white!10,top=blue!5] +\usepackage{verbatim} +\usepackage[english]{babel} +\usepackage[latin1]{inputenc} +\usepackage{pgf,pgfarrows,pgfnodes,pgfautomata,pgfheaps,pgfshade} +\usepackage{amsmath,amsfonts,amsthm,amssymb} +\usepackage{times} +\usepackage[T1]{fontenc} +\usepackage{graphics} +\usepackage{graphicx} +%\usepackage{psfig} +\usepackage{algorithmic} + +\title +{Open source CAD tool for electronic and electrical engineers} + +\author[] +{Yogesh Dilip Save} +\institute +{ + Indian Institute of Technology, Bombay +} +%\pgfdeclareimage[height=0.7cm]{university-logo}{iitblogo.eps} +%\logo{\pgfuseimage{university-logo}} + + +\date[seminar] % (optional) +{\today} + + +\begin{document} +%*************************************************************************************** +\begin{frame} + \titlepage +\end{frame} +%*************************************************************************************** +\begin{frame} + \frametitle{Presentation Outline} + \tableofcontents +\end{frame} +%*************************************************************************************** + +\section{Modules} +\begin{frame} + \frametitle{Modules} +\begin{block}{} +\begin{itemize} +\item eeschema -- Schematic Editor +\item CvPCB -- Component-Footprint mapper +\item pcbnew -- PCB Layout Editor +\item Analysis Inserter +\item Component Model Builder +\item Component Sub-circuit Builder +\item Kicad to Ngspice netlist converter +\item Circuit Simulator -- Ngspice +\item Scilab based circuit simulator -- SMCSim +\end{itemize} +\end{block} +\end{frame} + +\begin{frame} +\frametitle{eeschema} +\begin{block}{Problems} +\begin{itemize} +\item No fictitious components (sources) +\item[Sol:] Build a library of different kind of voltage and current sources (pulse, sine, exponential etc.) +\item Too many components +\item[Sol:] Build own libraries (include the components supported by ngspice (explicitly or implicitly)). \\ + Libraries (analogSpice (analog components) and digitalSpice (digital components)) can be built by + \begin{enumerate} + \item Creating own components. + \item Coping components from existing libraries. + \end{enumerate} +\item No measurement modules +\item[Sol:] Build a library which gives you functionality of printing and plotting solution. +\end{itemize} +\end{block} +\end{frame} + +\begin{frame} +\begin{block}{ CvPCB and pcbnew} +Add footprint for new components. +\end{block} +\end{frame} + +\begin{frame} +\begin{block}{Netlist Converter} +\begin{itemize} +\item Insert parameters for fictitious components +\item Convert IC into discrete blocks +\item Insert D-A and A-D converter at appropriate place, +\item Insert plotting and printing statement in netlist. +\item Find current through all components. +\end{itemize} +\end{block} +\end{frame} + +\begin{frame} +\begin{block}{Analysis Inserter} +\begin{itemize} +\item Insert type of analysis +\item Option of analysis +\item Option of simulator +\end{itemize} +\end{block} +\end{frame} + +\begin{frame} + \begin{block}{Model Editor} + \begin{itemize} + \item Provides facility to define new model. + \begin{itemize} + \item Diode + \item Bipolar Junction Transistor (BJT) + \item Metal Oxide Semiconductor (MOS) + \item Junction Field Effect Transistor (JFET) + \item IGBT + \item Magnetic core + \end{itemize} + \item Provides facility to edit existing model. + \item Provides help related to model parameter. + \end{itemize} + \end{block} +\end{frame} + +\begin{frame} + \begin{block}{Sub-circuit Editor} + \begin{itemize} + \item Provides facility to define new components. + \begin{itemize} + \item Op-amp + \item Timer-IC555 + \end{itemize} + \item Provides facility to edit existing sub-circuit. + \item Provides help related to components parameters. + \end{itemize} + \end{block} +\end{frame} + +\begin{frame} +\begin{block}{Circuit Simulator} +\begin{itemize} +\item Ngspice +\item SMCSim +\end{itemize} +\end{block} +\end{frame} + +\begin{frame} +\begin{block}{Future Plan} +\begin{itemize} +\item More consolidation of Kicad NgSpice netlist converter (nearly 10 days). +\item Build a descent GUI and remove the bugs in integration (nearly 10 days). +\item Simulate more examples which cover most of the syllabus of undergraduate in circuit theory (nearly 10 days). +\end{itemize} +\end{block} +\end{frame} + +\begin{frame} +\begin{block}{May be...........} +\begin{itemize} +\item Scilab based simulator +\item Extend Scilab based simulator for mix circuit simulation +\end{itemize} +\end{block} +\end{frame} + +\end{document} + diff --git a/FreeEDA/report/presentation/Makefile b/FreeEDA/report/presentation/Makefile new file mode 100644 index 0000000..4dd8b5b --- /dev/null +++ b/FreeEDA/report/presentation/Makefile @@ -0,0 +1,39 @@ +LATEX=latex +BIBTEX=bibtex +PDFLATEX=pdflatex +RM=rm +CP=cp +MAKEINDEX=makeindex +DVITOPS=dvips +DVIPDF=dvipdf +PSTOPDF=ps2pdf + +DEPENDENCIES= *.tex Makefile +MAINFILE=FreeEDA + +all: $(MAINFILE).pdf + +$(MAINFILE).dvi: $(DEPENDENCIES) + $(LATEX) $(MAINFILE) +# $(BIBTEX) $(MAINFILE) +# $(LATEX) $(MAINFILE) +# $(LATEX) $(MAINFILE) +# $(CP) $(MAINFILE).idx $(MAINFILE).ind +# $(MAKEINDEX) $(MAINFILE).idx +# $(LATEX) $(MAINFILE).tex + +#-Ppdf option +#Type fonts are scalable and looks good on pdf file +#default is bitmaps which are suitable for printer only not scalable + +#$(MAINFILE).ps: $(MAINFILE).dvi +# $(DVITOPS) -Ppdf -G0 $(MAINFILE).dvi -o $(MAINFILE).ps +#$(MAINFILE).pdf: $(MAINFILE).ps +# $(PSTOPDF) -sPAPERSIZE=a4 -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 -dSubsetFonts=true -dEmbedAllFonts=true $(MAINFILE).ps +$(MAINFILE).pdf: $(MAINFILE).dvi + $(DVIPDF) $(MAINFILE).dvi + +clean: + $(RM) -f $(MAINFILE).pdf $(MAINFILE).ps $(MAINFILE).dvi +cleanall: + $(RM) -f $(MAINFILE).pdf $(MAINFILE).ps $(MAINFILE).dvi *.aux *.log *.ind *.ilg *.idx *.toc diff --git a/FreeEDA/report/presentation/runlatex b/FreeEDA/report/presentation/runlatex new file mode 100644 index 0000000..1e21dcf --- /dev/null +++ b/FreeEDA/report/presentation/runlatex @@ -0,0 +1,3 @@ +#!/bin/bash +latex $1.tex +dvipdf $1.dvi diff --git a/FreeEDA/setPath.py b/FreeEDA/setPath.py new file mode 100644 index 0000000..334e805 --- /dev/null +++ b/FreeEDA/setPath.py @@ -0,0 +1,2 @@ +#!/usr/bin/python +FreeEDA_HOME="/home/hardik/FreeEDA" diff --git a/FreeEDA/setPathInstall.py b/FreeEDA/setPathInstall.py new file mode 100644 index 0000000..df1180c --- /dev/null +++ b/FreeEDA/setPathInstall.py @@ -0,0 +1,2 @@ +#!/usr/bin/python +FreeEDA_HOME=set_PATH_to_FreeEDA diff --git a/FreeEDA/subcktEditor/createSubckt.py b/FreeEDA/subcktEditor/createSubckt.py new file mode 100644 index 0000000..fce1292 --- /dev/null +++ b/FreeEDA/subcktEditor/createSubckt.py @@ -0,0 +1,72 @@ +#!/usr/bin/python +# createSubckt.py is a python script to convert a Kicad spice netlist to a ngspice subcircuit netlist. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +import sys +import os.path +from setPath import FreeEDA_HOME + +def createSubckt(subcktName): + """Read subcircuit netList""" + command="xterm -e \""+FreeEDA_HOME+"/kicadtoNgspice/KicadtoNgspice.py "+subcktName+".cir 0\"" + os.system(command) + +# Open file if it exists + if os.path.exists(subcktName+".cir.out"): + try: + f = open(subcktName+".cir.out") + except : + print("Error in opening circuit file.") + return 1 + else: + print subcktName + ".cir.out does not exist. Please create a spice netlist." + return 1 + +# Read the data from file + data=f.read() + +# Close the file + f.close() + netlist=data.splitlines() + + newNetlist=[] + for eachline in netlist: + eachline=eachline.strip() + if len(eachline)<1: + continue + words=eachline.split() + if eachline[0]=='u': + if words[len(words)-1]=="port": + subcktInfo=".subckt "+subcktName+" " + for i in range(1,len(words)-1): + subcktInfo+=words[i]+" " + continue + if words[0]==".end": + continue + else: + newNetlist.append(eachline) + + outfile=subcktName+".sub" + out=open(outfile,"w") + out.writelines("* Subcircuit " + subcktName) + out.writelines('\n') + out.writelines(subcktInfo) + out.writelines('\n') + + # for subcktName in subcktList: + # out.writelines('.include '+subcktName+'.sub\n') + # ckt.writelines('.include '+subcktName+'.sub\n') + + # Add newline in the schematic information + for i in range(len(newNetlist),0,-1): + newNetlist.insert(i,'\n') + + out.writelines(newNetlist) + out.writelines('\n') + + out.writelines('.ends ' + subcktName) + print "The subcircuit has been written in "+subcktName+".sub" + return 0 diff --git a/FreeEDA/subcktEditor/exportSubckt.py b/FreeEDA/subcktEditor/exportSubckt.py new file mode 100644 index 0000000..28de120 --- /dev/null +++ b/FreeEDA/subcktEditor/exportSubckt.py @@ -0,0 +1,78 @@ +#!/usr/bin/python +# exportSubckt.py is a python script to export a component difinition to the library. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from setPath import FreeEDA_HOME +from Tkinter import * +from Tkinter import * +import template +import tkMessageBox +import os.path +import os +import Pmw +from string import maketrans + +class ExportSubckt(): + """Class for exporting the model to the model library""" + def __init__(self,parent): + self.parent=parent + self.Name="" + # Collect model information available in the project directory + fileList=os.listdir(".") + subcktList=[] + + for fileName in fileList: + if "sub" in fileName: + subcktName=fileName.split('.') + subcktList.append(subcktName[0]) + + # Create the dialog. + self.dialog = Pmw.SelectionDialog(parent, + title = 'Subckt Selector', + buttons = ('OK', 'Cancel'), + defaultbutton = 'OK', + scrolledlist_labelpos = 'n', + label_text = 'Please select the subckt', + scrolledlist_items=subcktList, + command = self.apply, + ) + self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) + self.dialog.activate() + + # Protocol when window is deleted. + self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) + + def apply(self,result): + sels = self.dialog.getcurselection() + if result=="OK": + if len(sels) == 0: + print 'You clicked on', result, '(no selection)' + return + else: + self.Name=sels[0] + self.status=1 + else: + self.status=0 + self.dialog.withdraw() + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.dialog.deactivate() + +# Action taken when cancel pressed + def cancel(self, event=None, status=0): + # Catch the status + self.status=status + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.destroy() + +if __name__=='__main__': + root=Tk() + subckt= ExportSubckt(root,"xxx") + mainloop() + diff --git a/FreeEDA/subcktEditor/exportSubckt_back b/FreeEDA/subcktEditor/exportSubckt_back new file mode 100644 index 0000000..ee03e63 --- /dev/null +++ b/FreeEDA/subcktEditor/exportSubckt_back @@ -0,0 +1,99 @@ +#!/usr/bin/python +# exportSubckt.py is a python script to export a subcircuit model from a subckt library. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from setPath import FreeEDA_HOME +from Tkinter import * +import template +import tkMessageBox +import os.path +import os +import Pmw +from string import maketrans + +class SubcktLibInfo(): + """Class for specifying parameter of the subckt""" + def __init__(self,parent): + self.parent=parent + self.subcktName="" + # Collect subckt information from the circuit file + try: + self.FreeEDA_HOME=FreeEDA_HOME + except NameError: + try: + self.FreeEDA_HOME=os.environ["FreeEDA_HOME"] + except KeyError: + tkMessageBox.showerror("Error FreeEDA_HOME is not set","Please set FreeEDA_HOME variable in .bashrc\n\nStep to set FreeEDA_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export FreeEDA_HOME=\" to it.\n 3) source ~/.bashrc") + exit(0) + + HOME=self.FreeEDA_HOME+"/subcktLibrary/" + # List all the subcircuit file + subcktList=os.popen("ls "+HOME+"*.sub").read() + subcktList1=[] + i=0 + subcktList1.append("") + for char in subcktList: + if char!='\n': + subcktList1[i]=subcktList1[i]+char + else: + i=i+1 + subcktList1.append("") + + subcktList=[] + for subckt in subcktList1: + words=subckt.split('/') + if len(words): + subckt1=words[len(words)-1] + subcktList.append(subckt1) + subcktList.remove('') + + # Create the dialog. + self.dialog = Pmw.SelectionDialog(parent, + title = 'Subckt Selector', + buttons = ('OK', 'Cancel'), + defaultbutton = 'OK', + scrolledlist_labelpos = 'n', + label_text = 'Please select the subckt', + scrolledlist_items=subcktList, + command = self.apply, + ) + self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) + self.dialog.activate() + + # Protocol when window is deleted. + self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) + + def apply(self,result): + sels = self.dialog.getcurselection() + if result=="OK": + if len(sels) == 0: + print 'You clicked on', result, '(no selection)' + return + else: + self.subcktName=self.FreeEDA_HOME+"/subcktLibrary/"+sels[0] + self.status=1 + else: + self.status=0 + self.dialog.withdraw() + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.dialog.deactivate() + +# Action taken when cancel pressed + def cancel(self, event=None, status=0): + # Catch the status + self.status=status + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.destroy() + +if __name__=='__main__': + root=Tk() + subckt= SubcktLibInfo(root) + mainloop() + diff --git a/FreeEDA/subcktEditor/helpEditor.py b/FreeEDA/subcktEditor/helpEditor.py new file mode 100644 index 0000000..55c8370 --- /dev/null +++ b/FreeEDA/subcktEditor/helpEditor.py @@ -0,0 +1,37 @@ +#!/usr/bin/python +from Tkinter import * +import template +import tkMessageBox +import os.path +from string import maketrans +from newModel import readSpecs + +class HelpInfo(template.MyTemplate): + """ Class for displaying help information """ + def body(self, master): + # Help heading + master.configure(width=768, height=576) + Label(master, text="Ngspice Model Editor Help", font=("Helvetica", 16), padx=20, pady=20).grid(row=0) + +# Add standard button box (OK) + def buttonbox(self): + # Construct a new frame + box = Frame(self) + # Create buttons + w = Button(box, text="OK", width=10, command=self.ok, default=ACTIVE) + w.pack(padx=5, pady=5) + + # Bind Return and escape keys + self.bind("", self.ok) + self.bind("", self.ok) + # Create the frame "box" + box.pack() + + def statusBar(self): + pass + +if __name__=='__main__': + root=Tk() + model= HelpInfo(root) + mainloop() + diff --git a/FreeEDA/subcktEditor/importSubckt.py b/FreeEDA/subcktEditor/importSubckt.py new file mode 100644 index 0000000..618a2c7 --- /dev/null +++ b/FreeEDA/subcktEditor/importSubckt.py @@ -0,0 +1,87 @@ +#!/usr/bin/python +# importSubckt.py is a python script to import a component subcircuit definition from library. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from setPath import FreeEDA_HOME +from Tkinter import * +from Tkinter import * +import template +import tkMessageBox +import os.path +import os +import Pmw +from string import maketrans + +class ImportSubckt(): + """Class for importing a subckt from the library""" + def __init__(self,parent): + self.parent=parent + self.Name="" + # Collect model information available in the model library + try: + self.FreeEDA_HOME=FreeEDA_HOME + except NameError: + try: + self.FreeEDA_HOME=os.environ["FreeEDA_HOME"] + except KeyError: + tkMessageBox.showerror("Error FreeEDA_HOME is not set","Please set FreeEDA_HOME variable in .bashrc\n\nStep to set FreeEDA_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export FreeEDA_HOME=\" to it.\n 3) source ~/.bashrc") + exit(0) + + fileList=os.listdir(self.FreeEDA_HOME+"/subcktLibrary") + subcktList=[] + + for fileName in fileList: + if "sub" in fileName: + subcktName=fileName.split('.') + subcktList.append(subcktName[0]) + + # Create the dialog. + self.dialog = Pmw.SelectionDialog(parent, + title = 'Sub-circuit Selector', + buttons = ('OK', 'Cancel'), + defaultbutton = 'OK', + scrolledlist_labelpos = 'n', + label_text = 'Please select the subcircuit', + scrolledlist_items=subcktList, + command = self.apply, + ) + self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) + self.dialog.activate() + + # Protocol when window is deleted. + self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) + + def apply(self,result): + sels = self.dialog.getcurselection() + if result=="OK": + if len(sels) == 0: + print 'You clicked on', result, '(no selection)' + return + else: + self.Name=sels[0] + self.status=1 + else: + self.status=0 + self.dialog.withdraw() + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.dialog.deactivate() + +# Action taken when cancel pressed + def cancel(self, event=None, status=0): + # Catch the status + self.status=status + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.destroy() + +if __name__=='__main__': + root=Tk() + subckt= ImportSubckt(root,"xxx") + mainloop() + diff --git a/FreeEDA/subcktEditor/newSubckt.py b/FreeEDA/subcktEditor/newSubckt.py new file mode 100644 index 0000000..4d7c913 --- /dev/null +++ b/FreeEDA/subcktEditor/newSubckt.py @@ -0,0 +1,40 @@ +#!/usr/bin/python +# newSubckt.py is a python script to create a new subcircuit for a component. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from Tkinter import * +import template +import tkMessageBox +import os.path +from string import maketrans + +class SubcktInfo(template.MyTemplate): + """ Class for accept subckt information from user """ + def body(self, master): + # Ask for compoent name + Label(master, text="Enter Component name:").grid(row=0) + self.e1 = Entry(master) + self.e1.grid(row=0, column=1,pady=10,columnspan=2) + +# Collect subckt information + def apply(self): + pass + +# Validate the subckt information + def validate(self): + # Remove trailing and leading spaces from subcktName + self.subcktName=self.e1.get().strip() + if len(self.subcktName): + return 1 + else: + tkMessageBox.showwarning("Bad input","Component Name is not specified, please try again") + return 0 + +if __name__=='__main__': + root=Tk() + subckt= SubcktInfo(root) + mainloop() + diff --git a/FreeEDA/subcktEditor/openSubckt.py b/FreeEDA/subcktEditor/openSubckt.py new file mode 100644 index 0000000..e724bc5 --- /dev/null +++ b/FreeEDA/subcktEditor/openSubckt.py @@ -0,0 +1,40 @@ +#!/usr/bin/python +# openSubckt.py is a python script to open an existing subcircuit. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from Tkinter import * +import template +import tkMessageBox +import os.path +from string import maketrans + +class ExistingSubcktInfo(template.MyTemplate): + """ Class for accept subckt information from user """ + def body(self, master): + # Ask for compoent name + Label(master, text="Enter Component name:").grid(row=0) + self.e1 = Entry(master) + self.e1.grid(row=0, column=1,pady=10,columnspan=2) + +# Collect subckt information + def apply(self): + pass + +# Validate the subckt information + def validate(self): + # Remove trailing and leading spaces from subcktName + self.subcktName=self.e1.get().strip() + if len(self.subcktName): + return 1 + else: + tkMessageBox.showwarning("Bad input","Component Name is not specified, please try again") + return 0 + +if __name__=='__main__': + root=Tk() + subckt= ExistingSubcktInfo(root) + mainloop() + diff --git a/FreeEDA/subcktEditor/selectSubckt.py b/FreeEDA/subcktEditor/selectSubckt.py new file mode 100644 index 0000000..5d878a4 --- /dev/null +++ b/FreeEDA/subcktEditor/selectSubckt.py @@ -0,0 +1,107 @@ +#!/usr/bin/python +from setPath import FreeEDA_HOME +from Tkinter import * +import template +import tkMessageBox +import os.path +import os +import Pmw +from string import maketrans + +class SubcktNameList(): + """Class for specifying parameter of the subckt""" + def __init__(self,parent,filename): + self.parent=parent + self.subcktName="" + # Collect subckt information from the circuit file + try: + self.FreeEDA_HOME=FreeEDA_HOME + except NameError: + try: + self.FreeEDA_HOME=os.environ["FreeEDA_HOME"] + except KeyError: + tkMessageBox.showerror("Error FreeEDA_HOME is not set","Please set FreeEDA_HOME variable in .bashrc\n\nStep to set FreeEDA_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export FreeEDA_HOME=\" to it.\n 3) source ~/.bashrc") + exit(0) + + HOME=self.FreeEDA_HOME+"/subcktEditor/" + # Open the circuit file + self.fileName=filename + # Open parameter file + if os.path.exists(self.fileName): + try: + f = open(self.fileName) + except : + tkMessageBox.showwarning("Bad input","Circuit netlist does not exit, please try again") + return + else: + tkMessageBox.showwarning("Bad input","Circuit netlist does not exit, please try again") + return + + # Read the data from file + data=f.read() + + # Close the file + f.close() + netlist=data.splitlines() + # Find the various subckt library required + subcktList=[] + for eachline in netlist: + eachline=eachline.strip() + if len(eachline)>1: + eachline=eachline.lower() + words=eachline.split() + if eachline[0]=='x': + subcktName=words[len(words)-1] + else: + continue + if subcktName in subcktList: + continue + subcktList.append(subcktName) + + # Create the dialog. + self.dialog = Pmw.SelectionDialog(parent, + title = 'Subckt Selector', + buttons = ('OK', 'Cancel'), + defaultbutton = 'OK', + scrolledlist_labelpos = 'n', + label_text = 'Please select the subckt', + scrolledlist_items=subcktList, + command = self.apply, + ) + self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) + self.dialog.activate() + + # Protocol when window is deleted. + self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) + + def apply(self,result): + sels = self.dialog.getcurselection() + if result=="OK": + if len(sels) == 0: + print 'You clicked on', result, '(no selection)' + return + else: + self.subcktName=sels[0] + self.status=1 + else: + self.status=0 + self.dialog.withdraw() + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.dialog.deactivate() + +# Action taken when cancel pressed + def cancel(self, event=None, status=0): + # Catch the status + self.status=status + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.destroy() + +if __name__=='__main__': + root=Tk() + subckt= SubcktNameList(root,"xxx") + mainloop() + diff --git a/FreeEDA/subcktEditor/setPath.py b/FreeEDA/subcktEditor/setPath.py new file mode 100644 index 0000000..3cd5660 --- /dev/null +++ b/FreeEDA/subcktEditor/setPath.py @@ -0,0 +1 @@ +../setPath.py \ No newline at end of file diff --git a/FreeEDA/subcktEditor/subcktEditor.py b/FreeEDA/subcktEditor/subcktEditor.py new file mode 100644 index 0000000..f6946b2 --- /dev/null +++ b/FreeEDA/subcktEditor/subcktEditor.py @@ -0,0 +1,124 @@ +#!/usr/bin/python +# subcktEditor.py is a python script to create a fornt for subcircuit editor. It developed for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. +# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. +# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +from setPath import FreeEDA_HOME +from Tkinter import * +from createSubckt import createSubckt +import tkMessageBox +import setPath +import newSubckt +import openSubckt +import selectSubckt +import exportSubckt +import importSubckt +import os +import sys + +# Create a new subckt +def newEditor(e=None): +# Read subckt information (name and type) + subckt= newSubckt.SubcktInfo(root) +# Create subckt file + if subckt.status: + os.system("eeschema "+subckt.subcktName+".sch") + +# Open an existing subckt +def openEditor(e=None): + subckt= openSubckt.ExistingSubcktInfo(root) +# Open subckt file + if subckt.status: + os.system("eeschema "+subckt.subcktName+".sch") + +# Import an existing model from library +def importEditor(e=None): + subckt=importSubckt.ImportSubckt(root) + if os.system("cp "+FreeEDA_HOME+"/subcktLibrary/"+subckt.Name+".* ."): + tkMessageBox.showerror("Import Failed","Unable to import subcircuit file "+subckt.Name) + else: + tkMessageBox.showinfo("Successfully imported","Sub-circuit file "+subckt.Name+" is successfully imported to the project.") + +# Export an existing model to library +def exportEditor(e=None): + subckt=exportSubckt.ExportSubckt(root) + if os.system("cp "+subckt.Name+".* "+FreeEDA_HOME+"/subcktLibrary/"): + tkMessageBox.showerror("Export Failed","Unable to export subcircuit file "+subckt.Name) + else: + tkMessageBox.showinfo("Successfully exported","Subcircuit file "+subckt.Name+" is successfully exported to the subckt library") + +# Exit an subckt editor +def exitEditor(e=None): + if tkMessageBox.askokcancel("QUIT","Do you really wish to quit?"): + root.destroy() + +# Display help content +def helpEditor(e=None): + pass + +# Display help content +def aboutEditor(): + tkMessageBox.showinfo("About Editor","Created by Yogesh Dilip Save.") + +root = Tk() +root.title("Sub-circuit Editor") +root.geometry("600x400+300+125") + +# Create and configure a menu +menu = Menu(root) +root.config(menu=menu) + +# Create File menu +filemenu= Menu(menu) +menu.add_cascade(label="File", menu=filemenu) +filemenu.add_command(label="New F2", command=newEditor) +filemenu.add_command(label="Open F3", command=openEditor) +filemenu.add_separator() +filemenu.add_command(label="Import F4", command=importEditor) +filemenu.add_command(label="Export F5", command=exportEditor) +filemenu.add_separator() +filemenu.add_command(label="Exit F6", command=exitEditor) + +# Create help menu +helpmenu=Menu(menu) +menu.add_cascade(label="Help", menu=helpmenu) +helpmenu.add_command(label="Help F1",command=helpEditor) +helpmenu.add_command(label="About...",command=aboutEditor) + +# Select device from devices in circuit file +filename=sys.argv[1] +subckt=selectSubckt.SubcktNameList(root, filename) + +if subckt.status: + # Open the circuit file + subcktFile=subckt.subcktName+".sch" + # Check subckt file already exists + if os.path.exists(subcktFile): + if tkMessageBox.askokcancel("Subckt already exists","Do you want to edit?"): + # Call all pending idle tasks, without processing any other events. + root.update_idletasks() + os.system("eeschema "+subckt.subcktName+".sch") + else: + exitEditor() + else: + os.system("eeschema "+subckt.subcktName+".sch") + status=createSubckt(subckt.subcktName) + if status: + tkMessageBox.showinfo("Error","Error while creating subcircuit") + else: + tkMessageBox.showinfo("Successful","Created sub-circuit "+subckt.subcktName+".sub") + +# Protocol for deletion of main window +root.protocol("WM_DELETE_WINDOW",exitEditor) + +# Create shortcut keys +root.bind("", newEditor) +root.bind("", openEditor) +root.bind("", importEditor) +root.bind("", exportEditor) +root.bind("", exitEditor) +root.bind("", helpEditor) + +mainloop() diff --git a/FreeEDA/subcktEditor/template.py b/FreeEDA/subcktEditor/template.py new file mode 100644 index 0000000..3353328 --- /dev/null +++ b/FreeEDA/subcktEditor/template.py @@ -0,0 +1,110 @@ +#!/usr/bin/python +from Tkinter import * +import os + +class MyTemplate(Toplevel): + """Template to construct new window""" +# Define constructor + def __init__(self, parent, title=None): + # Set new window properties same as parent + Toplevel.__init__(self, parent) + # Create a new window on top of the parent such that don't appear in taskbar + self.transient(parent) + + # Set the title + if title: + self.title(title) + # Set Parent of active window + self.parent =parent + + # Create a new frame + body =Frame (self) + # Call body method + self.initial_focus = self.body(body) + # Display body + body.pack(padx=5, pady=5) + # Create buttons + self.buttonbox() + # Create status bar + self.statusBar() + # Take control of all the events + self.grab_set() + + # Take control of all the keyboard events + if not self.initial_focus: + self.initial_focus=self + + # Protocol when window is deleted. + self.protocol("WM_DELETE_WINDOW",self.cancel) + + # Position the geometry respect to main window + self.geometry("+%d+%d" % (parent.winfo_rootx()+50,parent.winfo_rooty()+50)) + self.initial_focus.focus_set() + + # Wait for widget to be destroyed + self.wait_window(self) + +# Construction of body of the window + def body(self, master): + # Create dialog body. This method should be overridden + pass + +# Add standard button box (OK, Cancel). Override if you don't want the standard buttons + def buttonbox(self): + # Construct a new frame + box = Frame(self) + # Create buttons + w = Button(box, text="OK", width=10, command=self.ok, default=ACTIVE) + w.pack(side=LEFT, padx=5, pady=5) + w = Button(box, text="Cancel", width=10, command=self.cancel) + w.pack(side=LEFT, padx=5, pady=5) + + # Bind Return and escape keys + self.bind("", self.ok) + self.bind("", self.cancel) + # Create the frame "box" + box.pack() + +# Add standard status bar. Override if you don't want the status bar + def statusBar(self): + self.statusbar = Label(self, text="", bd=1, relief=SUNKEN, anchor=W) + self.statusbar.pack(side=BOTTOM, fill=X) + +# Template for action taken when OK is pressed + def ok(self, event=None): + # If data is not valid then put the focus back + if not self.validate(): + self.initial_focus.focus_set() + return + # Remove the window from the screen (without destroying it) + self.withdraw() + # Call all pending idle tasks, without processing any other events. + self.update_idletasks() + # Perform required task (collection of result, inputs etc.) + self.apply() + # Take action when all task has finished + self.cancel(status=1) + +# Template for action taken when cancel pressed + def cancel(self, event=None, status=0): + # Catch the status + self.status=status + # Put focus back to the parent window + self.parent.focus_set() + # Destroy child window + self.destroy() + +# Template for validation of data + def validate(self): + return 1 + +# Template for required action (Saving Data, results) + def apply(self): + pass + +# Test case +if __name__=='__main__': + root=Tk() + d =MyTemplate(root) + mainloop() + diff --git a/FreeEDA/subcktLibrary/lm555n.bak b/FreeEDA/subcktLibrary/lm555n.bak new file mode 100644 index 0000000..92d1f7a --- /dev/null +++ b/FreeEDA/subcktLibrary/lm555n.bak @@ -0,0 +1,435 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 10:48:46 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:digitalXSpice +LIBS:lm555n-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L D_INVERTER U5 +U 1 1 50CEA9C5 +P 6700 4050 +F 0 "U5" H 6550 4150 40 0000 C CNN +F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN + 1 6700 4050 + 1 0 0 -1 +$EndComp +$Comp +L D_SRLATCH U6 +U 1 1 50CEA9AE +P 7100 3400 +F 0 "U6" H 6900 3650 60 0000 C CNN +F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN + 1 7100 3400 + 1 0 0 -1 +$EndComp +Text Notes 5750 3050 0 60 ~ 0 +IC 555 +Wire Wire Line + 4700 3000 4900 3000 +Wire Wire Line + 4700 4750 4700 4650 +Connection ~ 4400 3550 +Connection ~ 4400 4900 +Wire Wire Line + 4300 4900 7700 4900 +Wire Wire Line + 4400 4200 4400 4100 +Wire Wire Line + 7700 4900 7700 4800 +Wire Wire Line + 7700 3250 7850 3250 +Wire Wire Line + 7400 4600 7100 4600 +Wire Wire Line + 7100 4600 7100 4250 +Wire Wire Line + 7700 3650 7700 3550 +Wire Wire Line + 6350 4050 6450 4050 +Wire Wire Line + 6950 3900 6950 4000 +Wire Wire Line + 7150 4000 7150 4050 +Wire Wire Line + 7150 4050 6950 4050 +Wire Wire Line + 6500 3550 6200 3550 +Wire Wire Line + 6350 3250 6500 3250 +Wire Wire Line + 5400 3250 5100 3250 +Wire Wire Line + 5100 3250 5100 3750 +Wire Wire Line + 5550 4500 5550 4350 +Wire Wire Line + 5700 3550 5800 3550 +Wire Wire Line + 5900 3250 6000 3250 +Wire Wire Line + 6000 3850 6350 3850 +Wire Wire Line + 5800 4150 6200 4150 +Wire Wire Line + 5200 3550 5200 3700 +Wire Wire Line + 5200 3700 5550 3700 +Wire Wire Line + 5550 3700 5550 3750 +Connection ~ 5550 4450 +Wire Wire Line + 5750 4400 5750 4450 +Wire Wire Line + 5100 4350 5100 4450 +Wire Wire Line + 5100 4450 5750 4450 +Wire Wire Line + 6500 3400 6450 3400 +Wire Wire Line + 6450 3400 6450 4050 +Wire Wire Line + 6950 4000 7250 4000 +Wire Wire Line + 7250 4000 7250 3900 +Connection ~ 7150 4000 +Wire Wire Line + 7600 4250 7700 4250 +Wire Wire Line + 7700 4400 7700 4350 +Wire Wire Line + 7700 4350 7800 4350 +Wire Wire Line + 7850 3850 7900 3850 +Wire Wire Line + 4400 4900 4400 4700 +Wire Wire Line + 4400 3600 4400 3500 +Wire Wire Line + 4300 3000 4400 3000 +Wire Wire Line + 4400 4150 4700 4150 +Connection ~ 4400 4150 +Wire Wire Line + 4300 3550 4700 3550 +Wire Wire Line + 4700 3550 4700 3500 +Wire Wire Line + 6350 4750 6350 4650 +Text Label 4850 4100 0 60 ~ 0 +d +$Comp +L VCVS E2 +U 1 1 50AA12FF +P 5050 4050 +F 0 "E2" H 4850 4150 50 0000 C CNN +F 1 "10000" H 4850 4000 50 0000 C CNN + 1 5050 4050 + 0 1 1 0 +$EndComp +$Comp +L LIMIT8 U4 +U 2 1 50B4E21B +P 6000 3550 +F 0 "U4" H 6000 3650 30 0000 C CNN +F 1 "LIMIT8" H 6000 3550 30 0000 C CNN + 2 6000 3550 + 0 1 1 0 +$EndComp +$Comp +L LIMIT8 U4 +U 1 1 50B4E215 +P 5800 3850 +F 0 "U4" H 5800 3950 30 0000 C CNN +F 1 "LIMIT8" H 5800 3850 30 0000 C CNN + 1 5800 3850 + 0 1 1 0 +$EndComp +$Comp +L DAC8 U3 +U 2 1 50AAFCE7 +P 7700 3950 +F 0 "U3" H 7600 4050 40 0000 C CNN +F 1 "DAC8" H 7700 3950 40 0000 C CNN + 2 7700 3950 + 0 1 1 0 +$EndComp +$Comp +L DAC8 U3 +U 1 1 50AAFC9A +P 7850 3550 +F 0 "U3" H 7750 3650 40 0000 C CNN +F 1 "DAC8" H 7850 3550 40 0000 C CNN + 1 7850 3550 + 0 1 1 0 +$EndComp +$Comp +L ADC8 U2 +U 3 1 50AAFB76 +P 6350 4350 +F 0 "U2" H 6250 4450 40 0000 C CNN +F 1 "ADC8" H 6350 4350 40 0000 C CNN + 3 6350 4350 + 0 -1 -1 0 +$EndComp +$Comp +L ADC8 U2 +U 2 1 50AAFB64 +P 6350 3550 +F 0 "U2" H 6250 3650 40 0000 C CNN +F 1 "ADC8" H 6350 3550 40 0000 C CNN + 2 6350 3550 + 0 -1 -1 0 +$EndComp +$Comp +L ADC8 U2 +U 1 1 50AAFB55 +P 6200 3850 +F 0 "U2" H 6100 3950 40 0000 C CNN +F 1 "ADC8" H 6200 3850 40 0000 C CNN + 1 6200 3850 + 0 -1 -1 0 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 50AA39A3 +P 5750 4400 +F 0 "#FLG01" H 5750 4670 30 0001 C CNN +F 1 "PWR_FLAG" H 5750 4630 30 0000 C CNN + 1 5750 4400 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 5 1 50AA2210 +P 4050 3550 +F 0 "U1" H 4050 3500 30 0000 C CNN +F 1 "PORT" H 4050 3550 30 0000 C CNN + 5 4050 3550 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 1 1 50AA21C7 +P 4050 4900 +F 0 "U1" H 4050 4850 30 0000 C CNN +F 1 "PORT" H 4050 4900 30 0000 C CNN + 1 4050 4900 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 50AA21BC +P 4700 5000 +F 0 "U1" H 4700 4950 30 0000 C CNN +F 1 "PORT" H 4700 5000 30 0000 C CNN + 2 4700 5000 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 4 1 50AA21A9 +P 6350 5000 +F 0 "U1" H 6350 4950 30 0000 C CNN +F 1 "PORT" H 6350 5000 30 0000 C CNN + 4 6350 5000 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 7 1 50AA21A0 +P 8050 4350 +F 0 "U1" H 8050 4300 30 0000 C CNN +F 1 "PORT" H 8050 4350 30 0000 C CNN + 7 8050 4350 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 3 1 50AA2181 +P 8150 3850 +F 0 "U1" H 8150 3800 30 0000 C CNN +F 1 "PORT" H 8150 3850 30 0000 C CNN + 3 8150 3850 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 6 1 50AA2171 +P 5150 3000 +F 0 "U1" H 5150 2950 30 0000 C CNN +F 1 "PORT" H 5150 3000 30 0000 C CNN + 6 5150 3000 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 8 1 50AA2162 +P 4050 3000 +F 0 "U1" H 4050 2950 30 0000 C CNN +F 1 "PORT" H 4050 3000 30 0000 C CNN + 8 4050 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R8 +U 1 1 50AA20DA +P 7350 4250 +F 0 "R8" V 7430 4250 50 0000 C CNN +F 1 "1500" V 7350 4250 50 0000 C CNN + 1 7350 4250 + 0 1 1 0 +$EndComp +$Comp +L NPN Q1 +U 1 1 50AA2050 +P 7600 4600 +F 0 "Q1" H 7600 4450 50 0000 R CNN +F 1 "QNOM" H 7600 4750 50 0000 R CNN + 1 7600 4600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50AA140C +P 5550 4500 +F 0 "#PWR02" H 5550 4500 30 0001 C CNN +F 1 "GND" H 5550 4430 30 0001 C CNN + 1 5550 4500 + 1 0 0 -1 +$EndComp +Text Label 4850 4000 0 60 ~ 0 +c +Text Label 4700 4650 0 60 ~ 0 +d +Text Label 4700 4150 0 60 ~ 0 +c +$Comp +L R R7 +U 1 1 50AA12F7 +P 5650 3250 +F 0 "R7" V 5730 3250 50 0000 C CNN +F 1 "25" V 5650 3250 50 0000 C CNN + 1 5650 3250 + 0 -1 -1 0 +$EndComp +$Comp +L R R6 +U 1 1 50AA12B0 +P 5450 3550 +F 0 "R6" V 5530 3550 50 0000 C CNN +F 1 "25" V 5450 3550 50 0000 C CNN + 1 5450 3550 + 0 -1 -1 0 +$EndComp +Text Label 5300 4000 0 60 ~ 0 +b +Text Label 5300 4100 0 60 ~ 0 +a +Text Label 4700 3000 0 60 ~ 0 +b +Text Label 4700 3500 0 60 ~ 0 +a +$Comp +L VCVS E1 +U 1 1 50AA11B6 +P 5500 4050 +F 0 "E1" H 5300 4150 50 0000 C CNN +F 1 "10000" H 5300 4000 50 0000 C CNN + 1 5500 4050 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 50A9E00B +P 4700 3250 +F 0 "R4" V 4780 3250 50 0000 C CNN +F 1 "2E6" V 4700 3250 50 0000 C CNN + 1 4700 3250 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 50A9E001 +P 4700 4400 +F 0 "R5" V 4780 4400 50 0000 C CNN +F 1 "2E6" V 4700 4400 50 0000 C CNN + 1 4700 4400 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50A9DF09 +P 4400 4450 +F 0 "R3" V 4480 4450 50 0000 C CNN +F 1 "5000" V 4400 4450 50 0000 C CNN + 1 4400 4450 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50A9DF03 +P 4400 3850 +F 0 "R2" V 4480 3850 50 0000 C CNN +F 1 "5000" V 4400 3850 50 0000 C CNN + 1 4400 3850 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50A9DEFE +P 4400 3250 +F 0 "R1" V 4480 3250 50 0000 C CNN +F 1 "5000" V 4400 3250 50 0000 C CNN + 1 4400 3250 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/subcktLibrary/lm555n.cir b/FreeEDA/subcktLibrary/lm555n.cir new file mode 100644 index 0000000..9483a64 --- /dev/null +++ b/FreeEDA/subcktLibrary/lm555n.cir @@ -0,0 +1,25 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 10:57:49 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U5 5 21 D_INVERTER +U6 1 4 5 21 21 8 10 D_SRLATCH +E2 18 0 23 14 10000 +U4 19 20 11 12 LIMIT8 +U3 8 10 7 9 DAC8 +U2 11 12 6 4 1 5 ADC8 +U1 22 14 7 6 15 16 3 13 PORT +R8 9 2 1500 +Q1 22 2 3 QNOM +R7 18 20 25 +R6 17 19 25 +E1 17 0 16 15 10000 +R4 16 15 2E6 +R5 23 14 2E6 +R3 23 22 5000 +R2 15 23 5000 +R1 13 15 5000 + +.end diff --git a/FreeEDA/subcktLibrary/lm555n.cir.ckt b/FreeEDA/subcktLibrary/lm555n.cir.ckt new file mode 100644 index 0000000..90f04a3 --- /dev/null +++ b/FreeEDA/subcktLibrary/lm555n.cir.ckt @@ -0,0 +1,35 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist + +* Inverter d_inverter +* SR Latch d_srlatch +e2 18 0 23 14 10000 +* Limiter limit8 +* Digital to Analog converter dac8 +* Analog to Digital converter adc8 +u1 22 14 7 6 15 16 3 13 port +r8 9 2 1500 +q1 3 2 22 qnom +r7 18 20 25 +r6 17 19 25 +e1 17 0 16 15 10000 +r4 16 15 2e6 +r5 23 14 2e6 +r3 23 22 5000 +r2 15 23 5000 +r1 13 15 5000 +a1 5 21 u5 +.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) +a2 1 4 5 21 21 8 10 u6 +.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 ++sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 ++sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) +a3 19 11 u4 +a4 20 12 u4 +.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) +a5 [8] [7] u3 +a6 [10] [9] u3 +.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) +a7 [11] [4] u2 +a8 [12] [1] u2 +a9 [6] [5] u2 +.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/FreeEDA/subcktLibrary/lm555n.cir.out b/FreeEDA/subcktLibrary/lm555n.cir.out new file mode 100644 index 0000000..90f04a3 --- /dev/null +++ b/FreeEDA/subcktLibrary/lm555n.cir.out @@ -0,0 +1,35 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist + +* Inverter d_inverter +* SR Latch d_srlatch +e2 18 0 23 14 10000 +* Limiter limit8 +* Digital to Analog converter dac8 +* Analog to Digital converter adc8 +u1 22 14 7 6 15 16 3 13 port +r8 9 2 1500 +q1 3 2 22 qnom +r7 18 20 25 +r6 17 19 25 +e1 17 0 16 15 10000 +r4 16 15 2e6 +r5 23 14 2e6 +r3 23 22 5000 +r2 15 23 5000 +r1 13 15 5000 +a1 5 21 u5 +.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) +a2 1 4 5 21 21 8 10 u6 +.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 ++sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 ++sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) +a3 19 11 u4 +a4 20 12 u4 +.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) +a5 [8] [7] u3 +a6 [10] [9] u3 +.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) +a7 [11] [4] u2 +a8 [12] [1] u2 +a9 [6] [5] u2 +.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/FreeEDA/subcktLibrary/lm555n.pro b/FreeEDA/subcktLibrary/lm555n.pro new file mode 100644 index 0000000..c8e151f --- /dev/null +++ b/FreeEDA/subcktLibrary/lm555n.pro @@ -0,0 +1,73 @@ +update=Monday 19 November 2012 04:56:38 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=analogXSpice +LibName33=converterSpice +LibName34=digitalSpice +LibName35=linearSpice +LibName36=measurementSpice +LibName37=portSpice +LibName38=sourcesSpice +LibName39=digitalXSpice diff --git a/FreeEDA/subcktLibrary/lm555n.sch b/FreeEDA/subcktLibrary/lm555n.sch new file mode 100644 index 0000000..fabbb66 --- /dev/null +++ b/FreeEDA/subcktLibrary/lm555n.sch @@ -0,0 +1,435 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 10:57:52 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:analogXSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:digitalXSpice +LIBS:lm555n-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "17 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L D_INVERTER U5 +U 1 1 50CEA9C5 +P 6700 4050 +F 0 "U5" H 6550 4150 40 0000 C CNN +F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN + 1 6700 4050 + 1 0 0 -1 +$EndComp +$Comp +L D_SRLATCH U6 +U 1 1 50CEA9AE +P 7100 3400 +F 0 "U6" H 6900 3650 60 0000 C CNN +F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN + 1 7100 3400 + 1 0 0 -1 +$EndComp +Text Notes 5750 3050 0 60 ~ 0 +IC 555 +Wire Wire Line + 4700 3000 4900 3000 +Wire Wire Line + 4700 4750 4700 4650 +Connection ~ 4400 3550 +Connection ~ 4400 4900 +Wire Wire Line + 4300 4900 7700 4900 +Wire Wire Line + 4400 4200 4400 4100 +Wire Wire Line + 7700 4900 7700 4800 +Wire Wire Line + 7700 3250 7850 3250 +Wire Wire Line + 7400 4600 7100 4600 +Wire Wire Line + 7100 4600 7100 4250 +Wire Wire Line + 7700 3650 7700 3550 +Wire Wire Line + 6350 4050 6450 4050 +Wire Wire Line + 6950 3900 6950 4000 +Wire Wire Line + 7150 4000 7150 4050 +Wire Wire Line + 7150 4050 6950 4050 +Wire Wire Line + 6500 3550 6200 3550 +Wire Wire Line + 6350 3250 6500 3250 +Wire Wire Line + 5400 3250 5100 3250 +Wire Wire Line + 5100 3250 5100 3750 +Wire Wire Line + 5550 4500 5550 4350 +Wire Wire Line + 5700 3550 5800 3550 +Wire Wire Line + 5900 3250 6000 3250 +Wire Wire Line + 6000 3850 6350 3850 +Wire Wire Line + 5800 4150 6200 4150 +Wire Wire Line + 5200 3550 5200 3700 +Wire Wire Line + 5200 3700 5550 3700 +Wire Wire Line + 5550 3700 5550 3750 +Connection ~ 5550 4450 +Wire Wire Line + 5750 4400 5750 4450 +Wire Wire Line + 5100 4350 5100 4450 +Wire Wire Line + 5100 4450 5750 4450 +Wire Wire Line + 6500 3400 6450 3400 +Wire Wire Line + 6450 3400 6450 4050 +Wire Wire Line + 6950 4000 7250 4000 +Wire Wire Line + 7250 4000 7250 3900 +Connection ~ 7150 4000 +Wire Wire Line + 7600 4250 7700 4250 +Wire Wire Line + 7700 4400 7700 4350 +Wire Wire Line + 7700 4350 7800 4350 +Wire Wire Line + 7850 3850 7900 3850 +Wire Wire Line + 4400 4900 4400 4700 +Wire Wire Line + 4400 3600 4400 3500 +Wire Wire Line + 4300 3000 4400 3000 +Wire Wire Line + 4400 4150 4700 4150 +Connection ~ 4400 4150 +Wire Wire Line + 4300 3550 4700 3550 +Wire Wire Line + 4700 3550 4700 3500 +Wire Wire Line + 6350 4750 6350 4650 +Text Label 4850 4100 0 60 ~ 0 +d +$Comp +L VCVS E2 +U 1 1 50AA12FF +P 5050 4050 +F 0 "E2" H 4850 4150 50 0000 C CNN +F 1 "10000" H 4850 4000 50 0000 C CNN + 1 5050 4050 + 0 1 1 0 +$EndComp +$Comp +L LIMIT8 U4 +U 2 1 50B4E21B +P 6000 3550 +F 0 "U4" H 6000 3650 30 0000 C CNN +F 1 "LIMIT8" H 6000 3550 30 0000 C CNN + 2 6000 3550 + 0 1 1 0 +$EndComp +$Comp +L LIMIT8 U4 +U 1 1 50B4E215 +P 5800 3850 +F 0 "U4" H 5800 3950 30 0000 C CNN +F 1 "LIMIT8" H 5800 3850 30 0000 C CNN + 1 5800 3850 + 0 1 1 0 +$EndComp +$Comp +L DAC8 U3 +U 2 1 50AAFCE7 +P 7700 3950 +F 0 "U3" H 7600 4050 40 0000 C CNN +F 1 "DAC8" H 7700 3950 40 0000 C CNN + 2 7700 3950 + 0 1 1 0 +$EndComp +$Comp +L DAC8 U3 +U 1 1 50AAFC9A +P 7850 3550 +F 0 "U3" H 7750 3650 40 0000 C CNN +F 1 "DAC8" H 7850 3550 40 0000 C CNN + 1 7850 3550 + 0 1 1 0 +$EndComp +$Comp +L ADC8 U2 +U 3 1 50AAFB76 +P 6350 4350 +F 0 "U2" H 6250 4450 40 0000 C CNN +F 1 "ADC8" H 6350 4350 40 0000 C CNN + 3 6350 4350 + 0 -1 -1 0 +$EndComp +$Comp +L ADC8 U2 +U 2 1 50AAFB64 +P 6350 3550 +F 0 "U2" H 6250 3650 40 0000 C CNN +F 1 "ADC8" H 6350 3550 40 0000 C CNN + 2 6350 3550 + 0 -1 -1 0 +$EndComp +$Comp +L ADC8 U2 +U 1 1 50AAFB55 +P 6200 3850 +F 0 "U2" H 6100 3950 40 0000 C CNN +F 1 "ADC8" H 6200 3850 40 0000 C CNN + 1 6200 3850 + 0 -1 -1 0 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 50AA39A3 +P 5750 4400 +F 0 "#FLG01" H 5750 4670 30 0001 C CNN +F 1 "PWR_FLAG" H 5750 4630 30 0000 C CNN + 1 5750 4400 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 5 1 50AA2210 +P 4050 3550 +F 0 "U1" H 4050 3500 30 0000 C CNN +F 1 "PORT" H 4050 3550 30 0000 C CNN + 5 4050 3550 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 1 1 50AA21C7 +P 4050 4900 +F 0 "U1" H 4050 4850 30 0000 C CNN +F 1 "PORT" H 4050 4900 30 0000 C CNN + 1 4050 4900 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 50AA21BC +P 4700 5000 +F 0 "U1" H 4700 4950 30 0000 C CNN +F 1 "PORT" H 4700 5000 30 0000 C CNN + 2 4700 5000 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 4 1 50AA21A9 +P 6350 5000 +F 0 "U1" H 6350 4950 30 0000 C CNN +F 1 "PORT" H 6350 5000 30 0000 C CNN + 4 6350 5000 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 7 1 50AA21A0 +P 8050 4350 +F 0 "U1" H 8050 4300 30 0000 C CNN +F 1 "PORT" H 8050 4350 30 0000 C CNN + 7 8050 4350 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 3 1 50AA2181 +P 8150 3850 +F 0 "U1" H 8150 3800 30 0000 C CNN +F 1 "PORT" H 8150 3850 30 0000 C CNN + 3 8150 3850 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 6 1 50AA2171 +P 5150 3000 +F 0 "U1" H 5150 2950 30 0000 C CNN +F 1 "PORT" H 5150 3000 30 0000 C CNN + 6 5150 3000 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 8 1 50AA2162 +P 4050 3000 +F 0 "U1" H 4050 2950 30 0000 C CNN +F 1 "PORT" H 4050 3000 30 0000 C CNN + 8 4050 3000 + 1 0 0 -1 +$EndComp +$Comp +L R R8 +U 1 1 50AA20DA +P 7350 4250 +F 0 "R8" V 7430 4250 50 0000 C CNN +F 1 "1500" V 7350 4250 50 0000 C CNN + 1 7350 4250 + 0 1 1 0 +$EndComp +$Comp +L NPN Q1 +U 1 1 50AA2050 +P 7600 4600 +F 0 "Q1" H 7600 4450 50 0000 R CNN +F 1 "QNOM" H 7600 4750 50 0000 R CNN + 1 7600 4600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50AA140C +P 5550 4500 +F 0 "#PWR02" H 5550 4500 30 0001 C CNN +F 1 "GND" H 5550 4430 30 0001 C CNN + 1 5550 4500 + 1 0 0 -1 +$EndComp +Text Label 4850 4000 0 60 ~ 0 +c +Text Label 4700 4650 0 60 ~ 0 +d +Text Label 4700 4150 0 60 ~ 0 +c +$Comp +L R R7 +U 1 1 50AA12F7 +P 5650 3250 +F 0 "R7" V 5730 3250 50 0000 C CNN +F 1 "25" V 5650 3250 50 0000 C CNN + 1 5650 3250 + 0 -1 -1 0 +$EndComp +$Comp +L R R6 +U 1 1 50AA12B0 +P 5450 3550 +F 0 "R6" V 5530 3550 50 0000 C CNN +F 1 "25" V 5450 3550 50 0000 C CNN + 1 5450 3550 + 0 -1 -1 0 +$EndComp +Text Label 5300 4000 0 60 ~ 0 +b +Text Label 5300 4100 0 60 ~ 0 +a +Text Label 4700 3000 0 60 ~ 0 +b +Text Label 4700 3500 0 60 ~ 0 +a +$Comp +L VCVS E1 +U 1 1 50AA11B6 +P 5500 4050 +F 0 "E1" H 5300 4150 50 0000 C CNN +F 1 "10000" H 5300 4000 50 0000 C CNN + 1 5500 4050 + 0 1 1 0 +$EndComp +$Comp +L R R4 +U 1 1 50A9E00B +P 4700 3250 +F 0 "R4" V 4780 3250 50 0000 C CNN +F 1 "2E6" V 4700 3250 50 0000 C CNN + 1 4700 3250 + 1 0 0 -1 +$EndComp +$Comp +L R R5 +U 1 1 50A9E001 +P 4700 4400 +F 0 "R5" V 4780 4400 50 0000 C CNN +F 1 "2E6" V 4700 4400 50 0000 C CNN + 1 4700 4400 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 50A9DF09 +P 4400 4450 +F 0 "R3" V 4480 4450 50 0000 C CNN +F 1 "5000" V 4400 4450 50 0000 C CNN + 1 4400 4450 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 50A9DF03 +P 4400 3850 +F 0 "R2" V 4480 3850 50 0000 C CNN +F 1 "5000" V 4400 3850 50 0000 C CNN + 1 4400 3850 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 50A9DEFE +P 4400 3250 +F 0 "R1" V 4480 3250 50 0000 C CNN +F 1 "5000" V 4400 3250 50 0000 C CNN + 1 4400 3250 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/subcktLibrary/lm555n.sub b/FreeEDA/subcktLibrary/lm555n.sub new file mode 100644 index 0000000..254c530 --- /dev/null +++ b/FreeEDA/subcktLibrary/lm555n.sub @@ -0,0 +1,37 @@ +* Subcircuit lm555n +.subckt lm555n 22 14 7 6 15 16 3 13 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist +* Inverter d_inverter +* SR Latch d_srlatch +e2 18 0 23 14 10000 +* Limiter limit8 +* Digital to Analog converter dac8 +* Analog to Digital converter adc8 +r8 9 2 1500 +q1 3 2 22 qnom +r7 18 20 25 +r6 17 19 25 +e1 17 0 16 15 10000 +r4 16 15 2e6 +r5 23 14 2e6 +r3 23 22 5000 +r2 15 23 5000 +r1 13 15 5000 +a1 5 21 u5 +.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) +a2 1 4 5 21 21 8 10 u6 +.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 ++sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 ++sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) +a3 19 11 u4 +a4 20 12 u4 +.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) +a5 [8] [7] u3 +a6 [10] [9] u3 +.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) +a7 [11] [4] u2 +a8 [12] [1] u2 +a9 [6] [5] u2 +.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) + +.ends lm555n \ No newline at end of file diff --git a/FreeEDA/subcktLibrary/lm741.sub b/FreeEDA/subcktLibrary/lm741.sub new file mode 100644 index 0000000..aabd579 --- /dev/null +++ b/FreeEDA/subcktLibrary/lm741.sub @@ -0,0 +1,14 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Saturday 20 October 2012 08:46:50 PM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +.subckt ua741 7 6 3 +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 +.ends ua741 diff --git a/FreeEDA/subcktLibrary/ua741-cache.bak b/FreeEDA/subcktLibrary/ua741-cache.bak new file mode 100644 index 0000000..eaad34a --- /dev/null +++ b/FreeEDA/subcktLibrary/ua741-cache.bak @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 21 October 2012 01:22:10 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 I +X ~ 2 250 0 100 L 30 30 2 1 I +X ~ 3 250 0 100 L 30 30 3 1 I +X ~ 4 250 0 100 L 30 30 4 1 I +X ~ 5 250 0 100 L 30 30 5 1 I +X ~ 6 250 0 100 L 30 30 6 1 I +X ~ 7 250 0 100 L 30 30 7 1 I +X ~ 8 250 0 100 L 30 30 8 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/subcktLibrary/ua741-cache.lib b/FreeEDA/subcktLibrary/ua741-cache.lib new file mode 100644 index 0000000..9114d34 --- /dev/null +++ b/FreeEDA/subcktLibrary/ua741-cache.lib @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 Date: Saturday 17 November 2012 08:10:48 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 I +X ~ 2 250 0 100 L 30 30 2 1 I +X ~ 3 250 0 100 L 30 30 3 1 I +X ~ 4 250 0 100 L 30 30 4 1 I +X ~ 5 250 0 100 L 30 30 5 1 I +X ~ 6 250 0 100 L 30 30 6 1 I +X ~ 7 250 0 100 L 30 30 7 1 I +X ~ 8 250 0 100 L 30 30 8 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/FreeEDA/subcktLibrary/ua741.bak b/FreeEDA/subcktLibrary/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/FreeEDA/subcktLibrary/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/FreeEDA/subcktLibrary/ua741.cir b/FreeEDA/subcktLibrary/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/FreeEDA/subcktLibrary/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/FreeEDA/subcktLibrary/ua741.cir.ckt b/FreeEDA/subcktLibrary/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/subcktLibrary/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/subcktLibrary/ua741.cir.out b/FreeEDA/subcktLibrary/ua741.cir.out new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/FreeEDA/subcktLibrary/ua741.cir.out @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/FreeEDA/subcktLibrary/ua741.pro b/FreeEDA/subcktLibrary/ua741.pro new file mode 100644 index 0000000..5dbb81a --- /dev/null +++ b/FreeEDA/subcktLibrary/ua741.pro @@ -0,0 +1,72 @@ +update=Monday 17 December 2012 06:14:06 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice diff --git a/FreeEDA/subcktLibrary/ua741.sch b/FreeEDA/subcktLibrary/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/FreeEDA/subcktLibrary/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C 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File Version 2 date Tuesday 04 June 2013 10:39:51 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:BJT_amplifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "4 jun 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 7050 4450 -Wire Wire Line - 7600 4450 5100 4450 -Wire Wire Line - 7600 4450 7600 4050 -Wire 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-#encoding utf-8 -# -# 74HCT04 -# -DEF 74HCT04 U 0 30 Y Y 6 F N -F0 "U" 150 100 40 H V C CNN -F1 "74HCT04" 200 -100 40 H V C CNN -ALIAS 74HC14 74HC04 74LS14 -DRAW -P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N -X GND 7 -50 -100 0 U 30 20 0 0 W N -X VCC 14 -50 100 0 D 30 20 0 0 W N -X ~ 1 -450 0 300 R 60 60 1 1 I -X ~ 2 450 0 300 L 60 60 1 1 O I -X ~ 3 -450 0 300 R 60 60 2 1 I -X ~ 4 450 0 300 L 60 60 2 1 O I -X ~ 5 -450 0 300 R 60 60 3 1 I -X ~ 6 450 0 300 L 60 60 3 1 O I -X ~ 8 450 0 300 L 60 60 4 1 O I -X ~ 9 -450 0 300 R 60 60 4 1 I -X ~ 10 450 0 300 L 60 60 5 1 O I -X ~ 11 -450 0 300 R 60 60 5 1 I -X ~ 12 450 0 300 L 60 60 6 1 O I -X ~ 13 -450 0 300 R 60 60 6 1 I -X ~ 1 -450 0 300 R 60 60 1 2 I I -X ~ 2 450 0 300 L 60 60 1 2 O -X ~ 3 -450 0 300 R 60 60 2 2 I I -X ~ 4 450 0 300 L 60 60 2 2 O -X ~ 5 -450 0 300 R 60 60 3 2 I I -X ~ 6 450 0 300 L 60 60 3 2 O -X ~ 8 450 0 300 L 60 60 4 2 O -X ~ 9 -450 0 300 R 60 60 4 2 I I -X ~ 10 450 0 300 L 60 60 5 2 O -X ~ 11 -450 0 300 R 60 60 5 2 I I -X ~ 12 450 0 300 L 60 60 6 2 O -X ~ 13 -450 0 300 R 60 60 6 2 I I -ENDDRAW -ENDDEF -# -# 74LS00 -# -DEF 74LS00 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS00" 0 -100 60 H V C CNN -ALIAS 74LS37 7400 74HCT00 74HC00 -$FPLIST - 14DIP300* - SO14* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O I -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O I -X ~ 8 600 0 300 L 60 60 3 1 O I -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O I -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 -A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 -A -10 -141 340 244 883 0 2 0 N 300 0 0 200 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O -X ~ 8 600 0 300 L 60 60 3 2 O -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS02 -# -DEF 74LS02 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS02" 50 -50 60 H V C CNN -ALIAS 74HC02 74HCT02 7402 74LS28 -$FPLIST - SO14* - 14DIP* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 -A -1 -127 327 898 228 0 1 8 N 0 200 300 0 -A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 -P 2 0 1 8 -300 -200 0 -200 N -P 2 0 1 8 -300 200 0 200 N -X ~ 1 600 0 300 L 60 60 1 1 O I -X ~ 2 -600 100 370 R 60 60 1 1 I -X ~ 3 -600 -100 370 R 60 60 1 1 I -X ~ 4 600 0 300 L 60 60 2 1 O I -X ~ 5 -600 100 370 R 60 60 2 1 I -X ~ 6 -600 -100 370 R 60 60 2 1 I -X ~ 8 -600 100 370 R 60 60 3 1 I -X ~ 9 -600 -100 370 R 60 60 3 1 I -X ~ 10 600 0 300 L 60 60 3 1 O I -X ~ 11 -600 100 370 R 60 60 4 1 I -X ~ 12 -600 -100 370 R 60 60 4 1 I -X ~ 13 600 0 300 L 60 60 4 1 O I -A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 -P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 600 0 300 L 60 60 1 2 O -X ~ 2 -600 100 300 R 60 60 1 2 I I -X ~ 3 -600 -100 300 R 60 60 1 2 I I -X ~ 4 600 0 300 L 60 60 2 2 O -X ~ 5 -600 100 300 R 60 60 2 2 I I -X ~ 6 -600 -100 300 R 60 60 2 2 I I -X ~ 8 -600 100 300 R 60 60 3 2 I I -X ~ 9 -600 -100 300 R 60 60 3 2 I I -X ~ 10 600 0 300 L 60 60 3 2 O -X ~ 11 -600 100 300 R 60 60 4 2 I I -X ~ 12 -600 -100 300 R 60 60 4 2 I I -X ~ 13 600 0 300 L 60 60 4 2 O -ENDDRAW -ENDDEF -# -# 74LS08 -# -DEF 74LS08 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS08" 0 -50 60 H V C CNN -ALIAS 74LS09 -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 U 40 40 0 0 W N -A 100 0 200 896 -896 0 1 0 N 101 200 101 -199 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O -X ~ 8 600 0 300 L 60 60 3 1 O -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -470 0 262 495 -495 0 2 0 N -300 199 -300 -198 -A -2 126 326 -897 -225 0 2 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 2 0 N 2 200 300 0 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O I -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O I -X ~ 8 600 0 300 L 60 60 3 2 O I -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O I -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS32 -# -DEF 74LS32 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS32" 0 -50 60 H V C CNN -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 U 40 40 0 0 W N -A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 -A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 1 0 N 2 200 300 0 -P 2 0 1 0 -300 -200 0 -200 N -P 2 0 1 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 1 I -X ~ 2 -600 -100 370 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O -X ~ 4 -600 100 370 R 60 60 2 1 I -X ~ 5 -600 -100 370 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O -X ~ 8 600 0 300 L 60 60 3 1 O -X ~ 9 -600 100 370 R 60 60 3 1 I -X ~ 10 -600 -100 370 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O -X ~ 12 -600 100 370 R 60 60 4 1 I -X ~ 13 -600 -100 370 R 60 60 4 1 I -A 100 0 200 896 -896 0 2 0 N 101 200 101 -199 -P 4 0 2 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 2 I I -X ~ 2 -600 -100 300 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O I -X ~ 4 -600 100 300 R 60 60 2 2 I I -X ~ 5 -600 -100 300 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O I -X ~ 8 600 0 300 L 60 60 3 2 O I -X ~ 9 -600 100 300 R 60 60 3 2 I I -X ~ 10 -600 -100 300 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O I -X ~ 12 -600 100 300 R 60 60 4 2 I I -X ~ 13 -600 -100 300 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS86 -# -DEF 74LS86 U 0 30 Y N 4 F N -F0 "U" 50 50 50 H V C CNN -F1 "74LS86" 50 -50 40 H V C CNN -ALIAS 74HC86 -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 -A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 -A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 1 0 N 2 200 300 0 -P 2 0 1 0 -200 -200 0 -200 N -P 2 0 1 0 -200 200 0 200 N -X IN1 1 -600 100 370 R 60 60 1 1 I -X IN2 2 -600 -100 370 R 60 60 1 1 I -X OUT 3 600 0 300 L 60 60 1 1 O -X IN1 4 -600 100 370 R 60 60 2 1 I -X IN2 5 -600 -100 370 R 60 60 2 1 I -X OUT 6 600 0 300 L 60 60 2 1 O -X OUT 8 600 0 300 L 60 60 3 1 O -X IN1 9 -600 100 370 R 60 60 3 1 I -X IN2 10 -600 -100 370 R 60 60 3 1 I -X OUT 11 600 0 300 L 60 60 4 1 O -X IN1 12 -600 100 370 R 60 60 4 1 I -X IN2 13 -600 -100 370 R 60 60 4 1 I -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/BasicGates/BasicGates.bak b/OSCAD/Examples/BasicGates/BasicGates.bak deleted file mode 100644 index b0c177c..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.bak +++ /dev/null @@ -1,347 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 09 December 2012 08:00:09 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:BasicGates-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "30 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 9700 3000 -Wire Wire Line - 9700 3000 9700 2800 -Wire Wire Line - 9900 3100 9900 3000 -Wire Wire Line - 9900 3000 9100 3000 -Wire Wire Line - 1700 3800 3750 3800 -Wire Wire Line - 7900 3100 7850 3100 -Wire Wire Line - 7850 3100 7850 3400 -Wire Wire Line - 7850 3400 7750 3400 -Connection ~ 5300 2300 -Wire Wire Line - 5300 2300 5300 3300 -Wire Wire Line - 5300 3300 5500 3300 -Wire Wire Line - 5100 3500 5500 3500 -Wire Wire Line - 7900 2900 7350 2900 -Wire Wire Line - 7350 2900 7350 2400 -Wire Wire Line - 7350 2400 7000 2400 -Connection ~ 3750 2200 -Wire Wire Line - 3900 3400 3750 3400 -Wire Wire Line - 3750 3400 3750 2200 -Wire Wire Line - 3850 2200 3650 2200 -Wire Wire Line - 3650 2200 3650 1700 -Connection ~ 2400 1700 -Wire Wire Line - 2400 1700 2400 1550 -Connection ~ 2250 1700 -Connection ~ 2000 2900 -Wire Wire Line - 2000 2900 2000 2700 -Wire Wire Line - 2250 3800 2250 4150 -Wire Wire Line - 1700 3800 1700 3950 -Wire Wire Line - 2250 2500 2250 2900 -Wire Wire Line - 2250 2900 1750 2900 -Connection ~ 1700 5050 -Wire Wire Line - 1700 5050 2250 5050 -Wire Wire Line - 2250 5050 2250 4650 -Wire Wire Line - 1700 4850 1700 5200 -Wire Wire Line - 1750 1800 1750 1700 -Wire Wire Line - 2250 1700 2250 2000 -Wire Wire Line - 1750 3150 1750 2700 -Connection ~ 1750 2900 -Connection ~ 2250 3800 -Wire Wire Line - 2400 3800 2400 3600 -Connection ~ 2400 3800 -Wire Wire Line - 3900 3600 3750 3600 -Wire Wire Line - 3750 3600 3750 3800 -Wire Wire Line - 3500 3800 3500 2400 -Wire Wire Line - 3500 2400 3850 2400 -Connection ~ 3500 3800 -Wire Wire Line - 5050 2300 5800 2300 -Wire Wire Line - 6200 2200 6200 1900 -Wire Wire Line - 5800 2500 5200 2500 -Wire Wire Line - 5200 2500 5200 3500 -Connection ~ 5200 3500 -Wire Wire Line - 6700 3400 6850 3400 -Wire Wire Line - 1750 1700 3650 1700 -Wire Wire Line - 9900 3600 9900 3900 -Text Notes 9150 2850 0 60 ~ 0 -~A.B -Text Notes 9050 2850 0 60 ~ 0 -+ -Text Notes 8900 2850 0 60 ~ 0 -A.B -Text Notes 8000 2300 0 60 ~ 0 -~B -Text Notes 7900 2300 0 60 ~ 0 -+ -Text Notes 7750 2300 0 60 ~ 0 -=~A -Text Notes 7900 3650 0 60 ~ 0 -=A+B -Text Notes 7850 3500 0 60 ~ 0 -A.B+A+B -Text Notes 6450 3600 0 60 ~ 0 -~((A.B)+(A+B)) -Text Notes 7100 2300 0 60 ~ 0 -~((A.B).(A+B)) -$Comp -L 74HC86 U12 -U 1 1 507253B2 -P 8500 3000 -F 0 "U12" H 8550 3050 50 0000 C CNN -F 1 "74HC86" H 8550 2950 40 0000 C CNN - 1 8500 3000 - 1 0 0 -1 -$EndComp -Text Notes 5150 3650 0 60 ~ 0 -A+B -Text Notes 5100 2250 0 60 ~ 0 -A.B -Text Notes 3600 3950 0 60 ~ 0 -B -Text Notes 3500 1650 0 60 ~ 0 -A -$Comp -L 74LS32 U8 -U 1 1 50725446 -P 4500 3500 -F 0 "U8" H 4500 3550 60 0000 C CNN -F 1 "74LS32" H 4500 3450 60 0000 C CNN - 1 4500 3500 - 1 0 0 -1 -$EndComp -$Comp -L 74LS08 U7 -U 1 1 50725428 -P 4450 2300 -F 0 "U7" H 4450 2350 60 0000 C CNN -F 1 "74LS08" H 4450 2250 60 0000 C CNN - 1 4450 2300 - 1 0 0 -1 -$EndComp -$Comp -L 74HC02 U9 -U 1 1 50725415 -P 6100 3400 -F 0 "U9" H 6100 3450 60 0000 C CNN -F 1 "74HC02" H 6150 3350 60 0000 C CNN - 1 6100 3400 - 1 0 0 -1 -$EndComp -$Comp -L 74HC04 U11 -U 1 1 507253DF -P 7300 3400 -F 0 "U11" H 7450 3500 40 0000 C CNN -F 1 "74HC04" H 7500 3300 40 0000 C CNN - 1 7300 3400 - 1 0 0 -1 -$EndComp -$Comp -L 7400 U10 -U 1 1 5072539F -P 6400 2400 -F 0 "U10" H 6400 2450 60 0000 C CNN -F 1 "7400" H 6400 2300 60 0000 C CNN - 1 6400 2400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 5072534B -P 9900 3900 -F 0 "#PWR01" H 9900 3900 30 0001 C CNN -F 1 "GND" H 9900 3830 30 0001 C CNN - 1 9900 3900 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT1 U1 -U 1 1 50725278 -P 2400 1250 -F 0 "U1" H 2250 1350 50 0000 C CNN -F 1 "VPLOT1" H 2550 1350 50 0000 C CNN - 1 2400 1250 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 507251F2 -P 2000 2700 -F 0 "#FLG02" H 2000 2970 30 0001 C CNN -F 1 "PWR_FLAG" H 2000 2930 30 0000 C CNN - 1 2000 2700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 507251E5 -P 1750 3150 -F 0 "#PWR03" H 1750 3150 30 0001 C CNN -F 1 "GND" H 1750 3080 30 0001 C CNN - 1 1750 3150 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 507251A7 -P 2250 2250 -F 0 "R3" V 2330 2250 50 0000 C CNN -F 1 "1000" V 2250 2250 50 0000 C CNN - 1 2250 2250 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v2 -U 1 1 50725192 -P 1750 2250 -F 0 "v2" H 1550 2350 60 0000 C CNN -F 1 "PULSE" H 1550 2200 60 0000 C CNN - 1 1750 2250 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT1 U5 -U 1 1 50653344 -P 9700 2500 -F 0 "U5" H 9550 2600 50 0000 C CNN -F 1 "VPLOT1" H 9850 2600 50 0000 C CNN - 1 9700 2500 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG04 -U 1 1 50653022 -P 6200 1900 -F 0 "#FLG04" H 6200 2170 30 0001 C CNN -F 1 "PWR_FLAG" H 6200 2130 30 0000 C CNN - 1 6200 1900 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50652FB6 -P 9900 3350 -F 0 "R2" V 9980 3350 50 0000 C CNN -F 1 "1000" V 9900 3350 50 0000 C CNN - 1 9900 3350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT1 U2 -U 1 1 5061678B -P 2400 3300 -F 0 "U2" H 2250 3400 50 0000 C CNN -F 1 "VPLOT1" H 2550 3400 50 0000 C CNN - 1 2400 3300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 505C9F25 -P 2250 4400 -F 0 "R1" V 2330 4400 50 0000 C CNN -F 1 "1000" V 2250 4400 50 0000 C CNN - 1 2250 4400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR05 -U 1 1 505C9EE8 -P 1700 5200 -F 0 "#PWR05" H 1700 5200 30 0001 C CNN -F 1 "GND" H 1700 5130 30 0001 C CNN - 1 1700 5200 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 505C9ECF -P 1700 4400 -F 0 "v1" H 1500 4500 60 0000 C CNN -F 1 "PULSE" H 1500 4350 60 0000 C CNN - 1 1700 4400 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/BasicGates/BasicGates.cir b/OSCAD/Examples/BasicGates/BasicGates.cir deleted file mode 100644 index 839fbc6..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.cir +++ /dev/null @@ -1,20 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Sunday 09 December 2012 08:37:15 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 8 4 9 VPLOT8_1 -U12 5 6 9 0 3 74HC86 -U8 8 4 10 0 3 74LS32 -U7 8 4 2 0 3 74LS08 -U9 7 2 10 0 3 74HC02 -U11 7 6 0 3 74HC04 -U10 2 10 5 0 3 7400 -R3 8 0 1000 -v2 8 0 PULSE -R2 9 0 1000 -R1 4 0 1000 -v1 4 0 PULSE - -.end diff --git a/OSCAD/Examples/BasicGates/BasicGates.cir.ckt b/OSCAD/Examples/BasicGates/BasicGates.cir.ckt deleted file mode 100644 index 857c283..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.cir.ckt +++ /dev/null @@ -1,59 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 08:37:15 am ist - -* Plotting option vplot8_1 -* 74hc86 -* 74ls32 -* 74ls08 -* 74hc02 -* 74hc04 -* 7400 -r3 8 0 1000 -v2 8 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) -r2 9 0 1000 -r1 4 0 1000 -v1 4 0 pulse(0 5 0 0 0 0.125e-6 0.5e-6) -a1 [5] [5_in] u12adc -a2 [6] [6_in] u12adc -a3 [5_in 6_in] 9_out u12 -a4 [9_out] [9] u12dac -.model u12 d_xor -.model u12adc adc_bridge(in_low=0.8 in_high=2.0) -.model u12dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a5 [8] [8_in] u8adc -a6 [4] [4_in] u8adc -a7 [8_in 4_in] 10_out u8 -a8 [10_out] [10] u8dac -.model u8 d_or -.model u8adc adc_bridge(in_low=0.8 in_high=2.0) -.model u8dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a9 [8] [8_in] u7adc -a10 [4] [4_in] u7adc -a11 [8_in 4_in] 2_out u7 -a12 [2_out] [2] u7dac -.model u7 d_and -.model u7adc adc_bridge(in_low=0.8 in_high=2.0) -.model u7dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a13 [2] [2_in] u9adc -a14 [10] [10_in] u9adc -a15 [2_in 10_in] 7_out u9 -a16 [7_out] [7] u9dac -.model u9 d_nor -.model u9adc adc_bridge(in_low=0.8 in_high=2.0) -.model u9dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a17 [7] [7_in] u11adc -a18 7_in 6_out u11 -a19 [6_out] [6] u11dac -.model u11 d_inverter -.model u11adc adc_bridge(in_low=0.8 in_high=2.0) -.model u11dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a20 [2] [2_in] u10adc -a21 [10] [10_in] u10adc -a22 [2_in 10_in] 5_out u10 -a23 [5_out] [5] u10dac -.model u10 d_nand -.model u10adc adc_bridge(in_low=0.8 in_high=2.0) -.model u10dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 -.plot .v(8) .v(4) .v(9) . -.end diff --git a/OSCAD/Examples/BasicGates/BasicGates.cir.out b/OSCAD/Examples/BasicGates/BasicGates.cir.out deleted file mode 100644 index 4e7ccde..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.cir.out +++ /dev/null @@ -1,64 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 08:37:15 am ist - -* Plotting option vplot8_1 -* 74hc86 -* 74ls32 -* 74ls08 -* 74hc02 -* 74hc04 -* 7400 -r3 8 0 1000 -v2 8 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) -r2 9 0 1000 -r1 4 0 1000 -v1 4 0 pulse(0 5 0 0 0 0.125e-6 0.5e-6) -a1 [5] [5_in] u12adc -a2 [6] [6_in] u12adc -a3 [5_in 6_in] 9_out u12 -a4 [9_out] [9] u12dac -.model u12 d_xor -.model u12adc adc_bridge(in_low=0.8 in_high=2.0) -.model u12dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a5 [8] [8_in] u8adc -a6 [4] [4_in] u8adc -a7 [8_in 4_in] 10_out u8 -a8 [10_out] [10] u8dac -.model u8 d_or -.model u8adc adc_bridge(in_low=0.8 in_high=2.0) -.model u8dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a9 [8] [8_in] u7adc -a10 [4] [4_in] u7adc -a11 [8_in 4_in] 2_out u7 -a12 [2_out] [2] u7dac -.model u7 d_and -.model u7adc adc_bridge(in_low=0.8 in_high=2.0) -.model u7dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a13 [2] [2_in] u9adc -a14 [10] [10_in] u9adc -a15 [2_in 10_in] 7_out u9 -a16 [7_out] [7] u9dac -.model u9 d_nor -.model u9adc adc_bridge(in_low=0.8 in_high=2.0) -.model u9dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a17 [7] [7_in] u11adc -a18 7_in 6_out u11 -a19 [6_out] [6] u11dac -.model u11 d_inverter -.model u11adc adc_bridge(in_low=0.8 in_high=2.0) -.model u11dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a20 [2] [2_in] u10adc -a21 [10] [10_in] u10adc -a22 [2_in 10_in] 5_out u10 -a23 [5_out] [5] u10dac -.model u10 d_nand -.model u10adc adc_bridge(in_low=0.8 in_high=2.0) -.model u10dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 - -* Control Statements -.control -run -plot v(8) v(4) v(9) -.endc -.end diff --git a/OSCAD/Examples/BasicGates/BasicGates.cmp b/OSCAD/Examples/BasicGates/BasicGates.cmp deleted file mode 100644 index 70877a7..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.cmp +++ /dev/null @@ -1,101 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Monday 22 October 2012 05:06:15 PM IST - -BeginCmp -TimeStamp = /505C9F25; -Reference = R1; -ValeurCmp = 1000; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /50652FB6; -Reference = R2; -ValeurCmp = 1000; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /507251A7; -Reference = R3; -ValeurCmp = 1000; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /505FD8A0; -Reference = U3; -ValeurCmp = ADC; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /505FDC21; -Reference = U4; -ValeurCmp = DAC; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50725212; -Reference = U6; -ValeurCmp = ADC; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50725428; -Reference = U7; -ValeurCmp = 74LS08; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50725446; -Reference = U8; -ValeurCmp = 74LS32; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50725415; -Reference = U9; -ValeurCmp = 74HC02; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /5072539F; -Reference = U10; -ValeurCmp = 7400; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /507253DF; -Reference = U11; -ValeurCmp = 74HC04; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /507253B2; -Reference = U12; -ValeurCmp = 74HC86; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /505C9ECF; -Reference = v1; -ValeurCmp = PULSE; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50725192; -Reference = v2; -ValeurCmp = PULSE; -IdModule = ; -EndCmp - -EndListe diff --git a/OSCAD/Examples/BasicGates/BasicGates.net b/OSCAD/Examples/BasicGates/BasicGates.net deleted file mode 100644 index e5b57d3..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.net +++ /dev/null @@ -1,112 +0,0 @@ -# EESchema Netlist Version 1.1 created Monday 22 October 2012 05:06:15 PM IST -( - ( /505C9F25 R3 R1 1000 - ( 1 N-000006 ) - ( 2 GND ) - ) - ( /50652FB6 R3 R2 1000 - ( 1 N-000007 ) - ( 2 GND ) - ) - ( /507251A7 R3 R3 1000 - ( 1 N-000009 ) - ( 2 GND ) - ) - ( /505FD8A0 $noname$ U3 ADC - ( 1 N-000006 ) - ( 2 N-000005 ) - ) - ( /505FDC21 $noname$ U4 DAC - ( 1 N-000008 ) - ( 2 N-000007 ) - ) - ( /50725212 $noname$ U6 ADC - ( 1 N-000009 ) - ( 2 N-000011 ) - ) - ( /50725428 $noname$ U7 74LS08 - ( 1 N-000011 ) - ( 2 N-000005 ) - ( 3 N-000003 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /50725446 $noname$ U8 74LS32 - ( 1 N-000011 ) - ( 2 N-000005 ) - ( 3 N-000013 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /50725415 $noname$ U9 74HC02 - ( 1 N-000004 ) - ( 2 N-000003 ) - ( 3 N-000013 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /5072539F $noname$ U10 7400 - ( 1 N-000003 ) - ( 2 N-000013 ) - ( 3 N-000010 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /507253DF $noname$ U11 74HC04 - ( 1 N-000004 ) - ( 2 N-000012 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /507253B2 $noname$ U12 74HC86 - ( 1 N-000010 ) - ( 2 N-000012 ) - ( 3 N-000008 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /505C9ECF $noname$ v1 PULSE - ( 1 N-000006 ) - ( 2 GND ) - ) - ( /50725192 $noname$ v2 PULSE - ( 1 N-000009 ) - ( 2 GND ) - ) -) -* -{ Allowed footprints by component: -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component U9 - SO14* - 14DIP* -$endlist -$component U10 - 14DIP300* - SO14* -$endlist -$component v1 - 1_pin -$endlist -$component v2 - 1_pin -$endlist -$endfootprintlist -} diff --git a/OSCAD/Examples/BasicGates/BasicGates.pro b/OSCAD/Examples/BasicGates/BasicGates.pro deleted file mode 100644 index 067b52d..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Monday 22 October 2012 05:04:10 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/BasicGates/BasicGates.proj b/OSCAD/Examples/BasicGates/BasicGates.proj deleted file mode 100644 index f8a0441..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile BasicGates.sch diff --git a/OSCAD/Examples/BasicGates/BasicGates.sch b/OSCAD/Examples/BasicGates/BasicGates.sch deleted file mode 100644 index 050f6d4..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.sch +++ /dev/null @@ -1,347 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 09 December 2012 08:37:05 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:BasicGates-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "9 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L VPLOT8_1 U1 -U 3 1 50C3FFE2 -P 9700 2500 -F 0 "U1" H 9550 2600 50 0000 C CNN -F 1 "VPLOT8_1" H 9850 2600 50 0000 C CNN - 3 9700 2500 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 50C3FFDB -P 2400 3300 -F 0 "U1" H 2250 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 2550 3400 50 0000 C CNN - 2 2400 3300 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50C3FFD3 -P 2400 1250 -F 0 "U1" H 2250 1350 50 0000 C CNN -F 1 "VPLOT8_1" H 2550 1350 50 0000 C CNN - 1 2400 1250 - 1 0 0 -1 -$EndComp -Connection ~ 9700 3000 -Wire Wire Line - 9700 3000 9700 2800 -Wire Wire Line - 9900 3100 9900 3000 -Wire Wire Line - 9900 3000 9100 3000 -Wire Wire Line - 1700 3800 3750 3800 -Wire Wire Line - 7900 3100 7850 3100 -Wire Wire Line - 7850 3100 7850 3400 -Wire Wire Line - 7850 3400 7750 3400 -Connection ~ 5300 2300 -Wire Wire Line - 5300 2300 5300 3300 -Wire Wire Line - 5300 3300 5500 3300 -Wire Wire Line - 5100 3500 5500 3500 -Wire Wire Line - 7900 2900 7350 2900 -Wire Wire Line - 7350 2900 7350 2400 -Wire Wire Line - 7350 2400 7000 2400 -Connection ~ 3750 2200 -Wire Wire Line - 3900 3400 3750 3400 -Wire Wire Line - 3750 3400 3750 2200 -Wire Wire Line - 3850 2200 3650 2200 -Wire Wire Line - 3650 2200 3650 1700 -Connection ~ 2400 1700 -Wire Wire Line - 2400 1700 2400 1550 -Connection ~ 2250 1700 -Connection ~ 2000 2900 -Wire Wire Line - 2000 2900 2000 2700 -Wire Wire Line - 2250 3800 2250 4150 -Wire Wire Line - 1700 3800 1700 3950 -Wire Wire Line - 2250 2500 2250 2900 -Wire Wire Line - 2250 2900 1750 2900 -Connection ~ 1700 5050 -Wire Wire Line - 1700 5050 2250 5050 -Wire Wire Line - 2250 5050 2250 4650 -Wire Wire Line - 1700 4850 1700 5200 -Wire Wire Line - 1750 1800 1750 1700 -Wire Wire Line - 2250 1700 2250 2000 -Wire Wire Line - 1750 3150 1750 2700 -Connection ~ 1750 2900 -Connection ~ 2250 3800 -Wire Wire Line - 2400 3800 2400 3600 -Connection ~ 2400 3800 -Wire Wire Line - 3900 3600 3750 3600 -Wire Wire Line - 3750 3600 3750 3800 -Wire Wire Line - 3500 3800 3500 2400 -Wire Wire Line - 3500 2400 3850 2400 -Connection ~ 3500 3800 -Wire Wire Line - 5050 2300 5800 2300 -Wire Wire Line - 6200 2200 6200 1900 -Wire Wire Line - 5800 2500 5200 2500 -Wire Wire Line - 5200 2500 5200 3500 -Connection ~ 5200 3500 -Wire Wire Line - 6700 3400 6850 3400 -Wire Wire Line - 1750 1700 3650 1700 -Wire Wire Line - 9900 3600 9900 3900 -Text Notes 9150 2850 0 60 ~ 0 -~A.B -Text Notes 9050 2850 0 60 ~ 0 -+ -Text Notes 8900 2850 0 60 ~ 0 -A.B -Text Notes 8000 2300 0 60 ~ 0 -~B -Text Notes 7900 2300 0 60 ~ 0 -+ -Text Notes 7750 2300 0 60 ~ 0 -=~A -Text Notes 7900 3650 0 60 ~ 0 -=A+B -Text Notes 7850 3500 0 60 ~ 0 -A.B+A+B -Text Notes 6450 3600 0 60 ~ 0 -~((A.B)+(A+B)) -Text Notes 7100 2300 0 60 ~ 0 -~((A.B).(A+B)) -$Comp -L 74HC86 U12 -U 1 1 507253B2 -P 8500 3000 -F 0 "U12" H 8550 3050 50 0000 C CNN -F 1 "74HC86" H 8550 2950 40 0000 C CNN - 1 8500 3000 - 1 0 0 -1 -$EndComp -Text Notes 5150 3650 0 60 ~ 0 -A+B -Text Notes 5100 2250 0 60 ~ 0 -A.B -Text Notes 3600 3950 0 60 ~ 0 -B -Text Notes 3500 1650 0 60 ~ 0 -A -$Comp -L 74LS32 U8 -U 1 1 50725446 -P 4500 3500 -F 0 "U8" H 4500 3550 60 0000 C CNN -F 1 "74LS32" H 4500 3450 60 0000 C CNN - 1 4500 3500 - 1 0 0 -1 -$EndComp -$Comp -L 74LS08 U7 -U 1 1 50725428 -P 4450 2300 -F 0 "U7" H 4450 2350 60 0000 C CNN -F 1 "74LS08" H 4450 2250 60 0000 C CNN - 1 4450 2300 - 1 0 0 -1 -$EndComp -$Comp -L 74HC02 U9 -U 1 1 50725415 -P 6100 3400 -F 0 "U9" H 6100 3450 60 0000 C CNN -F 1 "74HC02" H 6150 3350 60 0000 C CNN - 1 6100 3400 - 1 0 0 -1 -$EndComp -$Comp -L 74HC04 U11 -U 1 1 507253DF -P 7300 3400 -F 0 "U11" H 7450 3500 40 0000 C CNN -F 1 "74HC04" H 7500 3300 40 0000 C CNN - 1 7300 3400 - 1 0 0 -1 -$EndComp -$Comp -L 7400 U10 -U 1 1 5072539F -P 6400 2400 -F 0 "U10" H 6400 2450 60 0000 C CNN -F 1 "7400" H 6400 2300 60 0000 C CNN - 1 6400 2400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 5072534B -P 9900 3900 -F 0 "#PWR01" H 9900 3900 30 0001 C CNN -F 1 "GND" H 9900 3830 30 0001 C CNN - 1 9900 3900 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 507251F2 -P 2000 2700 -F 0 "#FLG02" H 2000 2970 30 0001 C CNN -F 1 "PWR_FLAG" H 2000 2930 30 0000 C CNN - 1 2000 2700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 507251E5 -P 1750 3150 -F 0 "#PWR03" H 1750 3150 30 0001 C CNN -F 1 "GND" H 1750 3080 30 0001 C CNN - 1 1750 3150 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 507251A7 -P 2250 2250 -F 0 "R3" V 2330 2250 50 0000 C CNN -F 1 "1000" V 2250 2250 50 0000 C CNN - 1 2250 2250 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v2 -U 1 1 50725192 -P 1750 2250 -F 0 "v2" H 1550 2350 60 0000 C CNN -F 1 "PULSE" H 1550 2200 60 0000 C CNN - 1 1750 2250 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG04 -U 1 1 50653022 -P 6200 1900 -F 0 "#FLG04" H 6200 2170 30 0001 C CNN -F 1 "PWR_FLAG" H 6200 2130 30 0000 C CNN - 1 6200 1900 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50652FB6 -P 9900 3350 -F 0 "R2" V 9980 3350 50 0000 C CNN -F 1 "1000" V 9900 3350 50 0000 C CNN - 1 9900 3350 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 505C9F25 -P 2250 4400 -F 0 "R1" V 2330 4400 50 0000 C CNN -F 1 "1000" V 2250 4400 50 0000 C CNN - 1 2250 4400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR05 -U 1 1 505C9EE8 -P 1700 5200 -F 0 "#PWR05" H 1700 5200 30 0001 C CNN -F 1 "GND" H 1700 5130 30 0001 C CNN - 1 1700 5200 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 505C9ECF -P 1700 4400 -F 0 "v1" H 1500 4500 60 0000 C CNN -F 1 "PULSE" H 1500 4350 60 0000 C CNN - 1 1700 4400 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/BasicGates/analysis b/OSCAD/Examples/BasicGates/analysis deleted file mode 100644 index bf5e632..0000000 --- a/OSCAD/Examples/BasicGates/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 10e-09 1e-06 0e-00 diff --git a/OSCAD/Examples/FlipFlops/FlipFlops-cache.bak b/OSCAD/Examples/FlipFlops/FlipFlops-cache.bak deleted file mode 100644 index 71dbe1a..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops-cache.bak +++ /dev/null @@ -1,140 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 04:03:52 PM IST -#encoding utf-8 -# -# 74LS74 -# -DEF 74LS74 U 0 40 Y Y 2 F N -F0 "U" 150 300 60 H V C CNN -F1 "74LS74" 300 -295 60 H V C CNN -ALIAS 74HC74 -DRAW -X GND 7 -200 -250 0 U 30 30 0 0 W N -X VCC 14 -200 250 0 D 30 30 0 0 W N -S -300 250 300 -250 0 1 0 N -X Cd 1 0 -550 300 U 60 60 1 1 I I -X D 2 -600 200 300 R 60 60 1 1 I -X Cp 3 -600 0 300 R 60 60 1 1 I C -X Sd 4 0 550 300 D 60 60 1 1 I I -X Q 5 600 200 300 L 60 60 1 1 O -X ~Q 6 600 -200 300 L 60 60 1 1 O I -X ~Q 8 600 -200 300 L 60 60 2 1 O I -X Q 9 600 200 300 L 60 60 2 1 O -X Sd 10 0 550 300 D 60 60 2 1 I I -X Cp 11 -600 0 300 R 60 60 2 1 I C -X D 12 -600 200 300 R 60 60 2 1 I -X Cd 13 0 -550 300 U 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 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1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.bak b/OSCAD/Examples/FlipFlops/FlipFlops.bak deleted file mode 100644 index e821e8b..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.bak +++ /dev/null @@ -1,303 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 09 December 2012 04:03:52 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:FlipFlops-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "9 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 2800 4400 -Wire Wire Line - 2800 4400 2800 4050 -Wire Wire Line - 6000 2900 6000 3400 -Wire Wire Line - 3950 5200 3950 5450 -Wire Wire Line - 3950 5450 4500 5450 -Wire Wire Line - 2150 3200 4000 3200 -Connection ~ 6000 3400 -Connection ~ 2350 5300 -Wire Wire Line - 2350 5300 2350 5150 -Connection ~ 6950 4550 -Wire Wire Line - 5100 4550 5100 4150 -Connection ~ 9150 4550 -Wire Wire Line - 5700 3400 6350 3400 -Connection ~ 5100 2050 -Wire Wire Line - 6950 3050 6950 2050 -Wire Wire Line - 4000 3200 4000 3400 -Wire Wire Line - 4000 3400 4500 3400 -Connection ~ 2500 4400 -Connection ~ 2500 4100 -Wire Wire Line - 2500 4250 2500 3950 -Wire Wire Line - 2500 3200 2500 3450 -Wire Wire Line - 2500 2950 2150 2950 -Wire Wire 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a/OSCAD/Examples/FlipFlops/FlipFlops.cir b/OSCAD/Examples/FlipFlops/FlipFlops.cir deleted file mode 100644 index 92a4982..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Sunday 09 December 2012 04:06:26 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 6 2 10 VPLOT8_1 -R2 2 0 1000 -v2 2 0 PWL -R3 6 0 1000 -v3 6 0 PULSE -R4 1 0 1000 -v4 1 0 5 -v1 11 0 5 -R1 11 0 1000 -U1 1 2 6 11 10 3 0 5 4 11 6 10 1 7 74HC74 - -.end diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.cir.ckt b/OSCAD/Examples/FlipFlops/FlipFlops.cir.ckt deleted file mode 100644 index 5f457bc..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.cir.ckt +++ /dev/null @@ -1,25 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 04:06:26 pm ist - -* Plotting option vplot8_1 -r2 2 0 1000 -v2 2 0 pwl(0 0 2.6 0 2.60000000001 5 3 5 ) -r3 6 0 1000 -v3 6 0 pulse(0 5 0 0 0 0.5 1) -r4 1 0 1000 -v4 1 0 5 -v1 11 0 5 -r1 11 0 1000 -* 74hc74 -a1 [2 6 11 1] [2_in 6_in 11_in 1_in] u1adc -a2 2_in 6_in ~11_in ~1_in 10_out 3_out u1 -a3 [10_out 3_out] [10 3] u1dac -a4 [10 6 11 1] [10_in 6_in 11_in 1_in] u1adc -a5 10_in 6_in ~11_in ~1_in 4_out 5_out u1 -a6 [4_out 5_out] [4 5] u1dac -.model u1 d_dff -.model u1adc adc_bridge(in_low=0.8 in_high=2.0) -.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-03 4e-00 0e-00 -.plot v(6) v(2) v(10) -.end diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.cir.out b/OSCAD/Examples/FlipFlops/FlipFlops.cir.out deleted file mode 100644 index 9410f5b..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.cir.out +++ /dev/null @@ -1,30 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 04:06:26 pm ist - -* Plotting option vplot8_1 -r2 2 0 1000 -v2 2 0 pwl(0 0 2.6 0 2.60000000001 5 3 5 ) -r3 6 0 1000 -v3 6 0 pulse(0 5 0 0 0 0.5 1) -r4 1 0 1000 -v4 1 0 5 -v1 11 0 5 -r1 11 0 1000 -* 74hc74 -a1 [2 6 11 1] [2_in 6_in 11_in 1_in] u1adc -a2 2_in 6_in ~11_in ~1_in 10_out 3_out u1 -a3 [10_out 3_out] [10 3] u1dac -a4 [10 6 11 1] [10_in 6_in 11_in 1_in] u1adc -a5 10_in 6_in ~11_in ~1_in 4_out 5_out u1 -a6 [4_out 5_out] [4 5] u1dac -.model u1 d_dff -.model u1adc adc_bridge(in_low=0.8 in_high=2.0) -.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-03 4e-00 0e-00 - -* Control Statements -.control -run -plot v(6) v(2) v(10) -.endc -.end diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.cir.out1 b/OSCAD/Examples/FlipFlops/FlipFlops.cir.out1 deleted file mode 100644 index c855d5e..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.cir.out1 +++ /dev/null @@ -1,34 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 30 october 2012 07:12:51 pm ist - -* Plotting option vplot1 -* Plotting option vplot1 -* Plotting option vplot1 -r2 1 0 1000 -v2 1 0 pwl(0 0 2.6 0 2.6000000000001 5 3 5 ) -r3 4 0 1000 -v3 4 0 pulse(0 5 0 0 0 0.5 1) -r4 9 0 1000 -v4 9 0 dc 5 -v1 10 0 dc 5 -r1 10 0 1000 -* 74hc74 -a1 [1 4 10 9] [1_in 4_in 10_in 9_in] u1adc -a2 1_in 4_in ~10_in ~9_in 2_out 3_out u1 -a3 [2_out 3_out] [2 3] u1dac -a4 [2 4 10 9] [2_in 4_in 10_in 9_in] u1adc -a5 2_in 4_in ~10_in ~9_in 6_out 7_out u1 -a6 [6_out 7_out] [6 7] dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -.model u1 d_dff -.model u1adc adc_bridge(in_low=0.8 in_high=2.0) -.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-03 4e-00 0e-00 - -* Control Statements -.control -run -plot v(4) -plot v(1) -plot v(2) -.endc -.end diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.pro b/OSCAD/Examples/FlipFlops/FlipFlops.pro deleted file mode 100644 index 529955f..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.pro +++ /dev/null @@ -1,70 +0,0 @@ -update=Monday 22 October 2012 05:17:18 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=cmos4000 -LibName8=adc-dac -LibName9=memory -LibName10=xilinx -LibName11=special -LibName12=microcontrollers -LibName13=dsp -LibName14=microchip -LibName15=analog_switches -LibName16=motorola -LibName17=texas -LibName18=intel -LibName19=audio -LibName20=interface -LibName21=digital-audio -LibName22=philips -LibName23=display -LibName24=cypress -LibName25=siliconi -LibName26=opto -LibName27=atmel -LibName28=contrib -LibName29=valves -LibName30=analogSpice -LibName31=converterSpice -LibName32=digitalSpice -LibName33=linearSpice -LibName34=measurementSpice -LibName35=portSpice -LibName36=sourcesSpice diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.proj b/OSCAD/Examples/FlipFlops/FlipFlops.proj deleted file mode 100644 index cc7b7c9..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile FlipFlops.sch diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.sch b/OSCAD/Examples/FlipFlops/FlipFlops.sch deleted file mode 100644 index d8fbb5e..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.sch +++ /dev/null @@ -1,303 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 09 December 2012 04:06:09 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip 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H 7100 3900 60 0000 C CNN -F 1 "74HC74" H 7250 3305 60 0000 C CNN - 2 6950 3600 - 1 0 0 -1 -$EndComp -$Comp -L 74HC74 U1 -U 1 1 507274E2 -P 5100 3600 -F 0 "U1" H 5250 3900 60 0000 C CNN -F 1 "74HC74" H 5400 3305 60 0000 C CNN - 1 5100 3600 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/FlipFlops/analysis b/OSCAD/Examples/FlipFlops/analysis deleted file mode 100644 index df1e38d..0000000 --- a/OSCAD/Examples/FlipFlops/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 10e-03 4e-00 0e-00 diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.bak b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.bak deleted file mode 100644 index 6b90b1a..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.bak +++ /dev/null @@ -1,145 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 10 December 2012 10:40:22 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 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- R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.bak b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.bak deleted file mode 100644 index 93f021b..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.bak +++ /dev/null @@ -1,252 +0,0 @@ -EESchema Schematic File Version 2 date Monday 10 December 2012 10:40:22 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:convergenceAidSpice -LIBS:IC555AstableMultivibrator-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "10 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L IC U2 -U 1 1 50C55B25 -P 4450 4050 -F 0 "U2" H 4450 4320 30 0000 C CNN -F 1 "IC" H 4450 4280 30 0000 C CNN - 1 4450 4050 - 1 0 0 -1 -$EndComp -Connection ~ 4450 4100 -Wire Wire Line - 4450 4050 4450 4100 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Line - 5900 4100 3500 4100 -Connection ~ 3950 4100 -Wire Wire Line - 5200 2850 3500 2850 -Wire Wire Line - 4150 4000 4150 3600 -Wire Wire Line - 4150 3600 4500 3600 -Wire Wire Line - 6300 3350 5900 3350 -Wire Wire Line - 4450 2850 4450 2700 -Connection ~ 4450 2850 -Wire Wire Line - 4450 2700 2650 2700 -Wire Wire Line - 2650 2700 2650 3150 -Wire Wire Line - 5200 2650 5200 3150 -Connection ~ 5200 2850 -Wire Wire Line - 5900 4550 5900 4800 -Connection ~ 5900 4550 -Wire Wire Line - 3750 4100 3750 4000 -Connection ~ 3750 4100 -$Comp -L VPLOT8_1 U1 -U 2 1 50C4B392 -P 6300 2850 -F 0 "U1" H 6150 2950 50 0000 C CNN -F 1 "VPLOT8_1" H 6450 2950 50 0000 C CNN - 2 6300 2850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50C4B386 -P 3750 3700 -F 0 "U1" H 3600 3800 50 0000 C CNN -F 1 "VPLOT8_1" H 3900 3800 50 0000 C CNN - 1 3750 3700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 50A93D02 -P 5900 4800 -F 0 "#PWR01" H 5900 4800 30 0001 C CNN -F 1 "GND" H 5900 4730 30 0001 C CNN - 1 5900 4800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 50A93CC0 -P 5700 4300 -F 0 "#FLG02" H 5700 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 5700 4530 30 0000 C CNN - 1 5700 4300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 50A93CB7 -P 5200 2650 -F 0 "#FLG03" H 5200 2920 30 0001 C CNN -F 1 "PWR_FLAG" H 5200 2880 30 0000 C CNN - 1 5200 2650 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 50A93C56 -P 2650 3600 -F 0 "v1" H 2450 3700 60 0000 C CNN -F 1 "5" H 2450 3550 60 0000 C CNN -F 2 "R1" H 2350 3600 60 0000 C CNN - 1 2650 3600 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A93BFE -P 6300 3800 -F 0 "R3" V 6380 3800 50 0000 C CNN -F 1 "1000" V 6300 3800 50 0000 C CNN - 1 6300 3800 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 50A93ACA -P 4150 4200 -F 0 "C2" H 4200 4300 50 0000 L CNN -F 1 "0.01e-6" H 4200 4100 50 0000 L CNN - 1 4150 4200 - 1 0 0 -1 -$EndComp -$Comp -L CP C1 -U 1 1 50A93893 -P 3500 4350 -F 0 "C1" H 3550 4450 50 0000 L CNN -F 1 "100e-12" H 3550 4250 50 0000 L CNN - 1 3500 4350 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A93858 -P 3500 3750 -F 0 "R2" V 3580 3750 50 0000 C CNN -F 1 "10000" V 3500 3750 50 0000 C CNN - 1 3500 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A93852 -P 3500 3100 -F 0 "R1" V 3580 3100 50 0000 C CNN -F 1 "1000" V 3500 3100 50 0000 C CNN - 1 3500 3100 - 1 0 0 -1 -$EndComp -$Comp -L LM555N X1 -U 1 1 50A937B9 -P 5200 3550 -F 0 "X1" H 5200 3650 70 0000 C CNN -F 1 "LM555N" H 5200 3450 70 0000 C CNN - 1 5200 3550 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.brd b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.brd deleted file mode 100644 index fce068e..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.brd +++ /dev/null @@ -1,84 +0,0 @@ -PCBNEW-BOARD Version 1 date Tuesday 02 April 2013 02:48:05 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 0 -NoConn 0 -Di 0 0 117000 82670 -Ndraw 0 -Ntrack 0 -Nzone 0 -BoardThickness 630 -Nmodule 0 -Nnets 1 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "2 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -$EndNCLASS -$TRACK -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir deleted file mode 100644 index b1689e6..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 06 June 2013 11:44:39 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 4 IC -U1 4 5 VPLOT8_1 -v1 3 0 5 -R3 5 0 1000 -C2 2 0 0.01e-6 -C1 4 0 100e-12 -R2 6 4 10000 -R1 3 6 1000 -X1 0 4 5 3 2 4 6 3 LM555N - -.end diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.ckt b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.ckt deleted file mode 100644 index 58dd7f4..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 06 june 2013 11:44:39 pm ist -.include lm555n.sub - -.ic v(3)=0 - -.ic v(4)=0 -* Plotting option vplot8_1 -v1 3 0 5 -r3 5 0 1000 -c2 2 0 0.01e-6 -c1 4 0 100e-12 -r2 6 4 10000 -r1 3 6 1000 -x1 0 4 5 3 2 4 6 3 lm555n - -.tran 50e-09 5e-06 0e-00 -.plot v(4) v(5) -.end diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.out b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.out deleted file mode 100644 index 06e4c85..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 06 june 2013 11:44:39 pm ist -.include lm555n.sub - -.ic v(3)=0 - -.ic v(4)=0 -* Plotting option vplot8_1 -v1 3 0 5 -r3 5 0 1000 -c2 2 0 0.01e-6 -c1 4 0 100e-12 -r2 6 4 10000 -r1 3 6 1000 -x1 0 4 5 3 2 4 6 3 lm555n - -.tran 50e-09 5e-06 0e-00 - -* Control Statements -.control -run -plot v(4) v(5) -.endc -.end diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.net b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.net deleted file mode 100644 index ed060b3..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.net +++ /dev/null @@ -1,110 +0,0 @@ -# EESchema Netlist Version 1.1 created Tuesday 02 April 2013 02:47:19 PM IST -( - ( /50C55B25 $noname U2 IC {Lib=IC} - ( 1 N-000004 ) - ) - ( /50C4B392 $noname U1 VPLOT8_1 {Lib=VPLOT8_1} - ( 1 N-000004 ) - ( 2 N-000005 ) - ) - ( /50A93C56 R1 v1 5 {Lib=DC} - ( 1 VCC ) - ( 2 GND ) - ) - ( /50A93BFE $noname R3 1000 {Lib=R} - ( 1 N-000005 ) - ( 2 GND ) - ) - ( /50A93ACA $noname C2 0.01e-6 {Lib=C} - ( 1 N-000002 ) - ( 2 GND ) - ) - ( /50A93893 $noname C1 100e-12 {Lib=CP} - ( 1 N-000004 ) - ( 2 GND ) - ) - ( /50A93858 $noname R2 10000 {Lib=R} - ( 1 N-000006 ) - ( 2 N-000004 ) - ) - ( /50A93852 $noname R1 1000 {Lib=R} - ( 1 VCC ) - ( 2 N-000006 ) - ) - ( /50A937B9 $noname X1 LM555N {Lib=LM555N} - ( 1 GND ) - ( 2 N-000004 ) - ( 3 N-000005 ) - ( 4 VCC ) - ( 5 N-000002 ) - ( 6 N-000004 ) - ( 7 N-000006 ) - ( 8 VCC ) - ) -) -* -{ Allowed footprints by component: -$component v1 - 1_pin -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component C2 - SM* - C? - C1-1 -$endlist -$component C1 - CP* - SM* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$endfootprintlist -} -{ Pin List by Nets -Net 1 "GND" "GND" - C1 2 - C2 2 - X1 1 - R3 2 - v1 2 -Net 2 "" "" - X1 5 - C2 1 -Net 3 "VCC" "VCC" - X1 4 - R1 1 - X1 8 - v1 1 -Net 4 "" "" - U2 1 - U1 1 - C1 1 - X1 6 - R2 2 - X1 2 -Net 5 "" "" - R3 1 - U1 2 - X1 3 -Net 6 "" "" - X1 7 - R1 2 - R2 1 -} -#End diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.pro b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.pro deleted file mode 100644 index 8fb611c..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Monday 10 December 2012 09:07:41 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=regul -LibName6=74xx -LibName7=cmos4000 -LibName8=adc-dac -LibName9=memory -LibName10=xilinx -LibName11=special -LibName12=microcontrollers -LibName13=dsp -LibName14=microchip -LibName15=analog_switches -LibName16=motorola -LibName17=texas -LibName18=intel -LibName19=audio -LibName20=interface -LibName21=digital-audio -LibName22=philips -LibName23=display -LibName24=cypress -LibName25=siliconi -LibName26=opto -LibName27=atmel -LibName28=contrib -LibName29=valves -LibName30=analogSpice -LibName31=converterSpice -LibName32=digitalSpice -LibName33=linearSpice -LibName34=measurementSpice -LibName35=portSpice -LibName36=sourcesSpice -LibName37=convergenceAidSpice diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.proj b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.proj deleted file mode 100644 index 0a193f0..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile IC555AstableMultivibrator.sch diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.sch b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.sch deleted file mode 100644 index 9d4e53b..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.sch +++ /dev/null @@ -1,244 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 02 April 2013 02:52:17 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:IC555AstableMultivibrator-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "2 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L IC U2 -U 1 1 50C55B25 -P 4450 4050 -F 0 "U2" H 4450 4320 30 0000 C CNN -F 1 "IC" H 4450 4280 30 0000 C CNN - 1 4450 4050 - 1 0 0 -1 -$EndComp -Connection ~ 4450 4100 -Wire Wire Line - 4450 4050 4450 4100 -Connection ~ 6300 3350 -Wire Wire Line - 6300 3150 6300 3550 -Connection ~ 5700 4550 -Wire Wire Line - 5700 4550 5700 4300 -Wire Wire Line - 2650 4050 2650 4700 -Wire Wire Line - 2650 4700 4850 4700 -Connection ~ 4850 4550 -Wire Wire Line - 4850 4700 4850 4550 -Connection ~ 5200 4550 -Wire Wire Line - 3500 4550 6300 4550 -Wire Wire Line - 6300 4550 6300 4050 -Connection ~ 5200 4400 -Wire Wire Line - 4150 4400 5200 4400 -Connection ~ 4250 2850 -Wire Wire Line - 4250 2850 4250 3850 -Wire Wire Line - 4250 3850 4500 3850 -Wire Wire Line - 5900 3550 6100 3550 -Wire Wire Line - 6100 3550 6100 3000 -Wire Wire Line - 6100 3000 3750 3000 -Wire Wire Line - 3750 3000 3750 3450 -Connection ~ 3500 3450 -Wire Wire Line - 3750 3450 3500 3450 -Connection ~ 3500 4100 -Wire Wire Line - 3950 4100 3950 3350 -Wire Wire Line - 3950 3350 4500 3350 -Wire Wire Line - 3500 4150 3500 4000 -Wire Wire Line - 3500 3500 3500 3350 -Wire Wire Line - 5200 4550 5200 3950 -Wire Wire Line - 5900 3750 5900 4100 -Wire Wire Line - 5900 4100 3500 4100 -Connection ~ 3950 4100 -Wire Wire Line - 5200 2850 3500 2850 -Wire Wire Line - 4150 4000 4150 3600 -Wire Wire Line - 4150 3600 4500 3600 -Wire Wire Line - 6300 3350 5900 3350 -Wire Wire Line - 4450 2850 4450 2700 -Connection ~ 4450 2850 -Wire Wire Line - 4450 2700 2650 2700 -Wire Wire Line - 2650 2700 2650 3150 -Wire Wire Line - 5200 2650 5200 3150 -Connection ~ 5200 2850 -Wire Wire Line - 5900 4550 5900 4800 -Connection ~ 5900 4550 -Wire Wire Line - 3750 4100 3750 4000 -Connection ~ 3750 4100 -$Comp -L VPLOT8_1 U1 -U 2 1 50C4B392 -P 6300 2850 -F 0 "U1" H 6150 2950 50 0000 C CNN -F 1 "VPLOT8_1" H 6450 2950 50 0000 C CNN - 2 6300 2850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50C4B386 -P 3750 3700 -F 0 "U1" H 3600 3800 50 0000 C CNN -F 1 "VPLOT8_1" H 3900 3800 50 0000 C CNN - 1 3750 3700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 50A93D02 -P 5900 4800 -F 0 "#PWR01" H 5900 4800 30 0001 C CNN -F 1 "GND" H 5900 4730 30 0001 C CNN - 1 5900 4800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 50A93CC0 -P 5700 4300 -F 0 "#FLG02" H 5700 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 5700 4530 30 0000 C CNN - 1 5700 4300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 50A93CB7 -P 5200 2650 -F 0 "#FLG03" H 5200 2920 30 0001 C CNN -F 1 "PWR_FLAG" H 5200 2880 30 0000 C CNN - 1 5200 2650 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 50A93C56 -P 2650 3600 -F 0 "v1" H 2450 3700 60 0000 C CNN -F 1 "5" H 2450 3550 60 0000 C CNN -F 2 "R1" H 2350 3600 60 0000 C CNN - 1 2650 3600 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A93BFE -P 6300 3800 -F 0 "R3" V 6380 3800 50 0000 C CNN -F 1 "1000" V 6300 3800 50 0000 C CNN - 1 6300 3800 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 50A93ACA -P 4150 4200 -F 0 "C2" H 4200 4300 50 0000 L CNN -F 1 "0.01e-6" H 4200 4100 50 0000 L CNN - 1 4150 4200 - 1 0 0 -1 -$EndComp -$Comp -L CP C1 -U 1 1 50A93893 -P 3500 4350 -F 0 "C1" H 3550 4450 50 0000 L CNN -F 1 "100e-12" H 3550 4250 50 0000 L CNN - 1 3500 4350 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A93858 -P 3500 3750 -F 0 "R2" V 3580 3750 50 0000 C CNN -F 1 "10000" V 3500 3750 50 0000 C CNN - 1 3500 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A93852 -P 3500 3100 -F 0 "R1" V 3580 3100 50 0000 C CNN -F 1 "1000" V 3500 3100 50 0000 C CNN - 1 3500 3100 - 1 0 0 -1 -$EndComp -$Comp -L LM555N X1 -U 1 1 50A937B9 -P 5200 3550 -F 0 "X1" H 5200 3650 70 0000 C CNN -F 1 "LM555N" H 5200 3450 70 0000 C CNN - 1 5200 3550 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/IC555AstableMultivibrator/analysis b/OSCAD/Examples/IC555AstableMultivibrator/analysis deleted file mode 100644 index a715127..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/analysis +++ /dev/null @@ -1,2 +0,0 @@ -.tran 50e-09 5e-06 0e-00 -.ic v(3)=0 diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n-cache.bak b/OSCAD/Examples/IC555AstableMultivibrator/lm555n-cache.bak deleted file mode 100644 index 29460f2..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n-cache.bak +++ /dev/null @@ -1,207 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:00:30 AM IST -#encoding utf-8 -# -# ADC8 -# -DEF ADC8 U 0 10 Y Y 8 L N -F0 "U" -100 100 40 H V C CNN -F1 "ADC8" 0 0 40 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in1 1 -300 0 150 R 25 25 1 1 I -X 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0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.bak b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.bak deleted file mode 100644 index 6b8426e..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.bak +++ /dev/null @@ -1,435 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:00:30 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:digitalXSpice -LIBS:lm555n-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L D_INVERTER U5 -U 1 1 50CEA9C5 -P 6700 4050 -F 0 "U5" H 6550 4150 40 0000 C CNN -F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN - 1 6700 4050 - 1 0 0 -1 -$EndComp -$Comp -L D_SRLATCH U6 -U 1 1 50CEA9AE -P 7100 3400 -F 0 "U6" H 6900 3650 60 0000 C CNN -F 1 "D_SRLATCH" H 7100 3500 60 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1 5050 4050 - 0 1 1 0 -$EndComp -$Comp -L LIMIT8 U4 -U 2 1 50B4E21B -P 6000 3550 -F 0 "U4" H 6000 3650 30 0000 C CNN -F 1 "LIMIT8" H 6000 3550 30 0000 C CNN - 2 6000 3550 - 0 1 1 0 -$EndComp -$Comp -L LIMIT8 U4 -U 1 1 50B4E215 -P 5800 3850 -F 0 "U4" H 5800 3950 30 0000 C CNN -F 1 "LIMIT8" H 5800 3850 30 0000 C CNN - 1 5800 3850 - 0 1 1 0 -$EndComp -$Comp -L DAC8 U3 -U 2 1 50AAFCE7 -P 7700 3950 -F 0 "U3" H 7600 4050 40 0000 C CNN -F 1 "DAC8" H 7700 3950 40 0000 C CNN - 2 7700 3950 - 0 1 1 0 -$EndComp -$Comp -L DAC8 U3 -U 1 1 50AAFC9A -P 7850 3550 -F 0 "U3" H 7750 3650 40 0000 C CNN -F 1 "DAC8" H 7850 3550 40 0000 C CNN - 1 7850 3550 - 0 1 1 0 -$EndComp -$Comp -L ADC8 U2 -U 3 1 50AAFB76 -P 6350 4350 -F 0 "U2" H 6250 4450 40 0000 C CNN -F 1 "ADC8" H 6350 4350 40 0000 C CNN - 3 6350 4350 - 0 -1 -1 0 -$EndComp -$Comp -L ADC8 U2 -U 2 1 50AAFB64 -P 6350 3550 -F 0 "U2" H 6250 3650 40 0000 C CNN -F 1 "ADC8" H 6350 3550 40 0000 C CNN - 2 6350 3550 - 0 -1 -1 0 -$EndComp -$Comp -L ADC8 U2 -U 1 1 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30 0000 C CNN -F 1 "PORT" H 8050 4350 30 0000 C CNN - 7 8050 4350 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 3 1 50AA2181 -P 8150 3850 -F 0 "U1" H 8150 3800 30 0000 C CNN -F 1 "PORT" H 8150 3850 30 0000 C CNN - 3 8150 3850 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 6 1 50AA2171 -P 5150 3000 -F 0 "U1" H 5150 2950 30 0000 C CNN -F 1 "PORT" H 5150 3000 30 0000 C CNN - 6 5150 3000 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 8 1 50AA2162 -P 4050 3000 -F 0 "U1" H 4050 2950 30 0000 C CNN -F 1 "PORT" H 4050 3000 30 0000 C CNN - 8 4050 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R8 -U 1 1 50AA20DA -P 7350 4250 -F 0 "R8" V 7430 4250 50 0000 C CNN -F 1 "1500" V 7350 4250 50 0000 C CNN - 1 7350 4250 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 50AA2050 -P 7600 4600 -F 0 "Q1" H 7600 4450 50 0000 R CNN -F 1 "QNOM" H 7600 4750 50 0000 R CNN - 1 7600 4600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50AA140C -P 5550 4500 -F 0 "#PWR02" H 5550 4500 30 0001 C CNN -F 1 "GND" H 5550 4430 30 0001 C CNN - 1 5550 4500 - 1 0 0 -1 -$EndComp -Text Label 4850 4000 0 60 ~ 0 -c -Text Label 4700 4650 0 60 ~ 0 -d -Text Label 4700 4150 0 60 ~ 0 -c -$Comp -L R R7 -U 1 1 50AA12F7 -P 5650 3250 -F 0 "R7" V 5730 3250 50 0000 C CNN -F 1 "25" V 5650 3250 50 0000 C CNN - 1 5650 3250 - 0 -1 -1 0 -$EndComp -$Comp -L R R6 -U 1 1 50AA12B0 -P 5450 3550 -F 0 "R6" V 5530 3550 50 0000 C CNN -F 1 "25" V 5450 3550 50 0000 C CNN - 1 5450 3550 - 0 -1 -1 0 -$EndComp -Text Label 5300 4000 0 60 ~ 0 -b -Text Label 5300 4100 0 60 ~ 0 -a -Text Label 4700 3000 0 60 ~ 0 -b -Text Label 4700 3500 0 60 ~ 0 -a -$Comp -L VCVS E1 -U 1 1 50AA11B6 -P 5500 4050 -F 0 "E1" H 5300 4150 50 0000 C CNN -F 1 "10000" H 5300 4000 50 0000 C CNN - 1 5500 4050 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 50A9E00B -P 4700 3250 -F 0 "R4" V 4780 3250 50 0000 C CNN -F 1 "2E6" V 4700 3250 50 0000 C CNN - 1 4700 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 50A9E001 -P 4700 4400 -F 0 "R5" V 4780 4400 50 0000 C CNN -F 1 "2E6" V 4700 4400 50 0000 C CNN - 1 4700 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A9DF09 -P 4400 4450 -F 0 "R3" V 4480 4450 50 0000 C CNN -F 1 "5000" V 4400 4450 50 0000 C CNN - 1 4400 4450 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A9DF03 -P 4400 3850 -F 0 "R2" V 4480 3850 50 0000 C CNN -F 1 "5000" V 4400 3850 50 0000 C CNN - 1 4400 3850 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A9DEFE -P 4400 3250 -F 0 "R1" V 4480 3250 50 0000 C CNN -F 1 "5000" V 4400 3250 50 0000 C CNN - 1 4400 3250 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir deleted file mode 100644 index 144b715..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir +++ /dev/null @@ -1,25 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:00:36 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U5 5 21 D_INVERTER -U6 1 4 5 21 21 8 10 D_SRLATCH -E2 18 0 23 14 10000 -U4 19 20 11 12 LIMIT8 -U3 8 10 7 9 DAC8 -U2 11 12 6 4 1 5 ADC8 -U1 22 14 7 6 15 16 3 13 PORT -R8 9 2 1500 -Q1 22 2 3 QNOM -R7 18 20 25 -R6 17 19 25 -E1 17 0 16 15 10000 -R4 16 15 2E6 -R5 23 14 2E6 -R3 23 22 5000 -R2 15 23 5000 -R1 13 15 5000 - -.end diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir.ckt b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir.ckt deleted file mode 100644 index f45920f..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir.ckt +++ /dev/null @@ -1,35 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:00:36 am ist - -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -u1 22 14 7 6 15 16 3 13 port -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0 in_offset=0.0 gain=1.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir.out b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir.out deleted file mode 100644 index f45920f..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir.out +++ /dev/null @@ -1,35 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:00:36 am ist - -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -u1 22 14 7 6 15 16 3 13 port -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0 in_offset=0.0 gain=1.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.pro b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.pro deleted file mode 100644 index 09fa54e..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.pro +++ /dev/null @@ -1,73 +0,0 @@ -update=Monday 19 November 2012 04:56:38 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=analogXSpice -LibName33=converterSpice -LibName34=digitalSpice -LibName35=linearSpice -LibName36=measurementSpice -LibName37=portSpice -LibName38=sourcesSpice -LibName39=digitalXSpice diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.sch b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.sch deleted file mode 100644 index 417063b..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.sch +++ /dev/null @@ -1,435 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:00:43 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:digitalXSpice -LIBS:lm555n-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L D_INVERTER U5 -U 1 1 50CEA9C5 -P 6700 4050 -F 0 "U5" H 6550 4150 40 0000 C CNN -F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN - 1 6700 4050 - 1 0 0 -1 -$EndComp -$Comp -L D_SRLATCH U6 -U 1 1 50CEA9AE -P 7100 3400 -F 0 "U6" H 6900 3650 60 0000 C CNN -F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN - 1 7100 3400 - 1 0 0 -1 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-U 1 1 50A9DF09 -P 4400 4450 -F 0 "R3" V 4480 4450 50 0000 C CNN -F 1 "5000" V 4400 4450 50 0000 C CNN - 1 4400 4450 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A9DF03 -P 4400 3850 -F 0 "R2" V 4480 3850 50 0000 C CNN -F 1 "5000" V 4400 3850 50 0000 C CNN - 1 4400 3850 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A9DEFE -P 4400 3250 -F 0 "R1" V 4480 3250 50 0000 C CNN -F 1 "5000" V 4400 3250 50 0000 C CNN - 1 4400 3250 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.sub b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.sub deleted file mode 100644 index beeefc4..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.sub +++ /dev/null @@ -1,37 +0,0 @@ -* Subcircuit lm555n -.subckt lm555n 22 14 7 6 15 16 3 13 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:00:36 am ist -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0 in_offset=0.0 gain=1.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) - -.ends lm555n \ No newline at end of file diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier-cache.bak b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier-cache.bak deleted file mode 100644 index 0c195d8..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier-cache.bak +++ /dev/null @@ -1,97 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:09:30 AM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN 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40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.bak b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.bak deleted file mode 100644 index 54b3539..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.bak +++ /dev/null @@ -1,194 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:09:30 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:InvertingAmplifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4300 3550 -Wire Wire Line - 4300 3550 3400 3550 -Wire Wire Line - 3400 3550 3400 3100 -Wire Wire Line - 6550 3400 6550 4050 -Wire Wire Line - 6550 4050 6050 4050 -Wire Wire Line - 6850 4150 6850 4400 -Connection ~ 5150 3500 -Wire Wire Line - 5550 4050 5150 4050 -Wire Wire Line - 5150 4050 5150 3500 -Wire Wire Line - 4300 3400 4300 3300 -Wire Wire Line - 4300 3300 5300 3300 -Wire Wire Line - 4400 3500 4300 3500 -Wire Wire Line - 4300 3500 4300 3650 -Wire Wire Line - 4900 3500 5300 3500 -Wire Wire Line - 4300 4550 4300 4700 -Wire Wire Line - 4600 4400 4600 4650 -Wire Wire Line - 4600 4650 4300 4650 -Connection ~ 4300 4650 -Connection ~ 6850 3400 -Wire Wire Line - 6850 3100 6850 3650 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deleted file mode 100644 index f995c1d..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir +++ /dev/null @@ -1,14 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 19 December 2012 10:36:45 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 3 4 VPLOT8_1 -X1 2 0 4 UA741 -v1 3 0 SINE -R3 4 0 10000 -R1 2 3 1000 -R2 4 2 2000 - -.end diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt deleted file mode 100644 index 543e15f..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:36:45 am ist -.include ua741.sub - -* Plotting option vplot8_1 -x1 2 0 4 ua741 -v1 3 0 sine(0 5 50 0 0) -r3 4 0 10000 -r1 2 3 1000 -r2 4 2 2000 - -.tran 100e-06 40e-03 0e-00 -.plot v(3) v(4) -.end diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.out b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.out deleted file mode 100644 index e67a64a..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:36:45 am ist -.include ua741.sub - -* Plotting option vplot8_1 -x1 2 0 4 ua741 -v1 3 0 sine(0 5 50 0 0) -r3 4 0 10000 -r1 2 3 1000 -r2 4 2 2000 - -.tran 100e-06 40e-03 0e-00 - -* Control Statements -.control -run -plot v(3) v(4) -.endc -.end diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cmp b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cmp deleted file mode 100644 index c3e04af..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cmp 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5400 3550 5400 3800 -Wire Wire Line - 5900 3550 4650 3550 -Wire Wire Line - 4650 2650 5100 2650 -Wire Wire Line - 5900 2650 5900 2900 -$Comp -L VPLOT8_1 U1 -U 2 1 519F22B7 -P 5900 2350 -F 0 "U1" H 5750 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 6050 2450 50 0000 C CNN - 2 5900 2350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 519F229B -P 5400 3550 -F 0 "#FLG1" H 5400 3820 30 0001 C CNN -F 1 "PWR_FLAG" H 5400 3780 30 0000 C CNN - 1 5400 3550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR1 -U 1 1 519F2294 -P 5400 3800 -F 0 "#PWR1" H 5400 3800 30 0001 C CNN -F 1 "GND" H 5400 3730 30 0001 C CNN - 1 5400 3800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 519F228E -P 4650 2350 -F 0 "U1" H 4500 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 4800 2450 50 0000 C CNN - 1 4650 2350 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 519F2283 -P 5350 2650 -F 0 "R1" V 5430 2650 50 0000 C CNN -F 1 "1k" V 5350 2650 50 0000 C CNN - 1 5350 2650 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 519F227E -P 5900 3100 -F 0 "C1" H 5950 3200 50 0000 L CNN -F 1 "1u" H 5950 3000 50 0000 L CNN - 1 5900 3100 - -1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/RC/RC.cir b/OSCAD/Examples/RC/RC.cir deleted file mode 100644 index 17738ac..0000000 --- a/OSCAD/Examples/RC/RC.cir +++ /dev/null @@ -1,12 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 24 May 2013 02:23:51 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 1 0 SINE -U1 1 3 VPLOT8_1 -R1 3 1 1k -C1 0 3 1u - -.end diff --git a/OSCAD/Examples/RC/RC.cir.ckt b/OSCAD/Examples/RC/RC.cir.ckt deleted file mode 100644 index 7a8138f..0000000 --- a/OSCAD/Examples/RC/RC.cir.ckt +++ /dev/null @@ -1,10 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 02:23:51 pm ist - -v1 1 0 sine(0 5 300 0 0) -* Plotting option vplot8_1 -r1 3 1 1k -c1 0 3 1u - -.tran 5e-03 30e-03 0e-00 -.plot v(1) v(3) -.end diff --git a/OSCAD/Examples/RC/RC.cir.out b/OSCAD/Examples/RC/RC.cir.out deleted file mode 100644 index 01e68ad..0000000 --- a/OSCAD/Examples/RC/RC.cir.out +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 02:23:51 pm ist - -v1 1 0 sine(0 5 300 0 0) -* Plotting option vplot8_1 -r1 3 1 1k -c1 0 3 1u - -.tran 5e-03 30e-03 0e-00 - -* Control Statements -.control -run -plot v(1) v(3) -.endc -.end diff --git a/OSCAD/Examples/RC/RC.pro b/OSCAD/Examples/RC/RC.pro deleted file mode 100644 index cfb5fa1..0000000 --- a/OSCAD/Examples/RC/RC.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Friday 24 May 2013 02:22:07 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/RC/RC.proj b/OSCAD/Examples/RC/RC.proj deleted file mode 100644 index 396e6d0..0000000 --- a/OSCAD/Examples/RC/RC.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile RC.sch diff --git a/OSCAD/Examples/RC/RC.sch b/OSCAD/Examples/RC/RC.sch deleted file mode 100644 index 6afd4fa..0000000 --- a/OSCAD/Examples/RC/RC.sch +++ /dev/null @@ -1,137 +0,0 @@ -EESchema Schematic File Version 2 date Friday 24 May 2013 02:54:22 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:RC-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "24 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5200 3550 -Connection ~ 4650 2650 -Connection ~ 5900 2650 -$Comp -L SINE v1 -U 1 1 519F2A93 -P 4650 3100 -F 0 "v1" H 4450 3200 60 0000 C CNN -F 1 "SINE" H 4450 3050 60 0000 C CNN -F 2 "R1" H 4350 3100 60 0000 C CNN - 1 4650 3100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5900 3300 5900 3550 -Wire Wire Line - 5600 2650 5900 2650 -Connection ~ 5400 3550 -Wire Wire Line - 5400 3550 5400 3800 -Wire Wire Line - 5900 3550 4650 3550 -Wire Wire Line - 4650 2650 5100 2650 -Wire Wire Line - 5900 2650 5900 2900 -$Comp -L VPLOT8_1 U1 -U 2 1 519F22B7 -P 5900 2350 -F 0 "U1" H 5750 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 6050 2450 50 0000 C CNN - 2 5900 2350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 519F229B -P 5200 3550 -F 0 "#FLG1" H 5200 3820 30 0001 C CNN -F 1 "PWR_FLAG" H 5200 3780 30 0000 C CNN - 1 5200 3550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR1 -U 1 1 519F2294 -P 5400 3800 -F 0 "#PWR1" H 5400 3800 30 0001 C CNN -F 1 "GND" H 5400 3730 30 0001 C CNN - 1 5400 3800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 519F228E -P 4650 2350 -F 0 "U1" H 4500 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 4800 2450 50 0000 C CNN - 1 4650 2350 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 519F2283 -P 5350 2650 -F 0 "R1" V 5430 2650 50 0000 C CNN -F 1 "1k" V 5350 2650 50 0000 C CNN - 1 5350 2650 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 519F227E -P 5900 3100 -F 0 "C1" H 5950 3200 50 0000 L CNN -F 1 "1u" H 5950 3000 50 0000 L CNN - 1 5900 3100 - -1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/RC/analysis b/OSCAD/Examples/RC/analysis deleted file mode 100644 index 4d26811..0000000 --- a/OSCAD/Examples/RC/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 5e-03 30e-03 0e-00 diff --git a/OSCAD/Examples/RC_ac/RC_ac-cache.bak b/OSCAD/Examples/RC_ac/RC_ac-cache.bak deleted file mode 100644 index 8073555..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac-cache.bak +++ /dev/null @@ -1,99 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 24 May 2013 01:55:44 PM IST -#encoding utf-8 -# -# AC -# -DEF AC AC 0 40 Y Y 1 F N -F0 "AC" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/RC_ac/RC_ac-cache.lib b/OSCAD/Examples/RC_ac/RC_ac-cache.lib deleted file mode 100644 index 0dca988..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac-cache.lib +++ /dev/null @@ -1,99 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 24 May 2013 01:59:22 PM IST -#encoding utf-8 -# -# AC -# -DEF AC AC 0 40 Y Y 1 F N -F0 "AC" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/RC_ac/RC_ac.bak b/OSCAD/Examples/RC_ac/RC_ac.bak deleted file mode 100644 index 037cb21..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.bak +++ /dev/null @@ -1,136 +0,0 @@ -EESchema Schematic File Version 2 date Friday 24 May 2013 01:55:44 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:RC_ac-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "24 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5900 3300 5900 3550 -Wire Wire Line - 5600 2650 5900 2650 -Connection ~ 4900 2650 -Connection ~ 5750 2650 -Connection ~ 5400 3550 -Wire Wire Line - 5400 3550 5400 3800 -Wire Wire Line - 5900 3550 4650 3550 -Wire Wire Line - 4650 2650 5100 2650 -Wire Wire Line - 5900 2650 5900 2900 -$Comp -L VPLOT8_1 U1 -U 2 1 519F22B7 -P 5750 2350 -F 0 "U1" H 5600 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 2450 50 0000 C CNN - 2 5750 2350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 519F229B -P 5400 3550 -F 0 "#FLG01" H 5400 3820 30 0001 C CNN -F 1 "PWR_FLAG" H 5400 3780 30 0000 C CNN - 1 5400 3550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 519F2294 -P 5400 3800 -F 0 "#PWR02" H 5400 3800 30 0001 C CNN -F 1 "GND" H 5400 3730 30 0001 C CNN - 1 5400 3800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 519F228E -P 4900 2350 -F 0 "U1" H 4750 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 5050 2450 50 0000 C CNN - 1 4900 2350 - 1 0 0 -1 -$EndComp -$Comp -L AC v1 -U 1 1 519F2287 -P 4650 3100 -F 0 "v1" H 4450 3200 60 0000 C CNN -F 1 "AC" H 4450 3050 60 0000 C CNN -F 2 "R1" H 4350 3100 60 0000 C CNN - 1 4650 3100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 519F2283 -P 5350 2650 -F 0 "R1" V 5430 2650 50 0000 C CNN -F 1 "R" V 5350 2650 50 0000 C CNN - 1 5350 2650 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 519F227E -P 5900 3100 -F 0 "C1" H 5950 3200 50 0000 L CNN -F 1 "C" H 5950 3000 50 0000 L CNN - 1 5900 3100 - -1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/RC_ac/RC_ac.cir b/OSCAD/Examples/RC_ac/RC_ac.cir deleted file mode 100644 index 5393d72..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.cir +++ /dev/null @@ -1,12 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 24 May 2013 01:58:56 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 1 3 VPLOT8_1 -v1 1 0 AC -R1 3 1 1k -C1 0 3 1u - -.end diff --git a/OSCAD/Examples/RC_ac/RC_ac.cir.ckt b/OSCAD/Examples/RC_ac/RC_ac.cir.ckt deleted file mode 100644 index 8cbaa41..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.cir.ckt +++ /dev/null @@ -1,10 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 01:58:56 pm ist - -* Plotting option vplot8_1 -v1 1 0 ac 2 -r1 3 1 1k -c1 0 3 1u - -.ac lin 10 1Hz 10Meg -.plot v(1) v(3) -.end diff --git a/OSCAD/Examples/RC_ac/RC_ac.cir.out b/OSCAD/Examples/RC_ac/RC_ac.cir.out deleted file mode 100644 index ad45dbf..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.cir.out +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 01:58:56 pm ist - -* Plotting option vplot8_1 -v1 1 0 ac 2 -r1 3 1 1k -c1 0 3 1u - -.ac lin 10 1Hz 10Meg - -* Control Statements -.control -run -plot v(1) v(3) -.endc -.end diff --git a/OSCAD/Examples/RC_ac/RC_ac.pro b/OSCAD/Examples/RC_ac/RC_ac.pro deleted file mode 100644 index 270d2dd..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Friday 24 May 2013 01:49:03 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/RC_ac/RC_ac.proj b/OSCAD/Examples/RC_ac/RC_ac.proj deleted file mode 100644 index 3b990b8..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile RC_ac.sch diff --git a/OSCAD/Examples/RC_ac/RC_ac.sch b/OSCAD/Examples/RC_ac/RC_ac.sch deleted file mode 100644 index 8d14d8e..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.sch +++ /dev/null @@ -1,136 +0,0 @@ -EESchema Schematic File Version 2 date Friday 24 May 2013 01:59:22 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice 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-$EndComp -$Comp -L GND #PWR02 -U 1 1 519F2294 -P 5400 3800 -F 0 "#PWR02" H 5400 3800 30 0001 C CNN -F 1 "GND" H 5400 3730 30 0001 C CNN - 1 5400 3800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 519F228E -P 4900 2350 -F 0 "U1" H 4750 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 5050 2450 50 0000 C CNN - 1 4900 2350 - 1 0 0 -1 -$EndComp -$Comp -L AC v1 -U 1 1 519F2287 -P 4650 3100 -F 0 "v1" H 4450 3200 60 0000 C CNN -F 1 "AC" H 4450 3050 60 0000 C CNN -F 2 "R1" H 4350 3100 60 0000 C CNN - 1 4650 3100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 519F2283 -P 5350 2650 -F 0 "R1" V 5430 2650 50 0000 C CNN -F 1 "1k" V 5350 2650 50 0000 C CNN - 1 5350 2650 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 519F227E -P 5900 3100 -F 0 "C1" H 5950 3200 50 0000 L CNN -F 1 "1u" H 5950 3000 50 0000 L CNN - 1 5900 3100 - -1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/RC_ac/analysis b/OSCAD/Examples/RC_ac/analysis deleted file mode 100644 index 2f4e6f2..0000000 --- a/OSCAD/Examples/RC_ac/analysis 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file mode 100644 index 3b20495..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb-cache.bak +++ /dev/null @@ -1,75 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 12:09:45 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# CONN_2 -# -DEF CONN_2 P 0 40 Y N 1 F N -F0 "P" -50 0 40 V V C CNN -F1 "CONN_2" 50 0 40 V V C CNN -DRAW -S -100 150 100 -150 0 1 0 N -X P1 1 -350 100 250 R 60 60 1 1 P I -X PM 2 -350 -100 250 R 60 60 1 1 P I -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/RC_pcb/RC_pcb-cache.lib b/OSCAD/Examples/RC_pcb/RC_pcb-cache.lib deleted file mode 100644 index a8a529e..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb-cache.lib +++ /dev/null @@ -1,75 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 06:47:37 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# CONN_2 -# -DEF CONN_2 P 0 40 Y N 1 F N -F0 "P" -50 0 40 V V C CNN -F1 "CONN_2" 50 0 40 V V C CNN -DRAW -S -100 150 100 -150 0 1 0 N -X P1 1 -350 100 250 R 60 60 1 1 P I -X PM 2 -350 -100 250 R 60 60 1 1 P I -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.bak b/OSCAD/Examples/RC_pcb/RC_pcb.bak deleted file mode 100644 index 7ad2473..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.bak +++ /dev/null @@ -1,125 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 14 May 2013 12:09:45 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:RC-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6100 2200 6100 2050 -Wire Wire Line - 4900 2600 4900 3050 -Connection ~ 6100 2050 -Connection ~ 5550 3050 -Wire Wire Line - 5550 3050 5550 3200 -Wire Wire Line - 6100 2600 6100 3050 -Wire Wire Line - 6100 3050 4900 3050 -Wire Wire Line - 5400 2050 5400 2000 -Wire Wire Line - 5400 2000 4900 2000 -Wire Wire Line - 6100 2050 5900 2050 -Wire Wire Line - 5400 2900 5400 3050 -Connection ~ 5400 3050 -Wire Wire Line - 4900 2000 4900 2400 -$Comp -L CONN_2 P1 -U 1 1 51868B92 -P 4550 2500 -F 0 "P1" V 4500 2500 40 0000 C CNN -F 1 "CONN_2" V 4600 2500 40 0000 C CNN - 1 4550 2500 - -1 0 0 1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 51863585 -P 5400 2900 -F 0 "#FLG01" H 5400 3170 30 0001 C CNN -F 1 "PWR_FLAG" H 5400 3130 30 0000 C CNN - 1 5400 2900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5186344D -P 5550 3200 -F 0 "#PWR02" H 5550 3200 30 0001 C CNN -F 1 "GND" H 5550 3130 30 0001 C CNN - 1 5550 3200 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 5186342E -P 6100 2400 -F 0 "C1" H 6150 2500 50 0000 L CNN -F 1 "1u" H 6150 2300 50 0000 L CNN - 1 6100 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 51863417 -P 5650 2050 -F 0 "R1" V 5730 2050 50 0000 C CNN -F 1 "1k" V 5650 2050 50 0000 C CNN - 1 5650 2050 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.brd b/OSCAD/Examples/RC_pcb/RC_pcb.brd deleted file mode 100644 index 335c0b9..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.brd +++ /dev/null @@ -1,225 +0,0 @@ -PCBNEW-BOARD Version 1 date Sunday 05 May 2013 10:20:45 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 3 -NoConn 0 -Di 55424 33924 63076 39076 -Ndraw 4 -Ntrack 3 -Nzone 0 -BoardThickness 630 -Nmodule 3 -Nnets 4 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "5 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 315 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000001" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 315 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000001" -AddNet "N-000003" -$EndNCLASS -$MODULE SIL-2 -Po 61000 37000 900 15 00200000 51868CE1 ~~ -Li SIL-2 -Cd Connecteurs 2 pins -Kw CONN DEV -Sc 51868CE1 -AR /51868B92 -Op 0 0 0 -T0 0 -1000 681 428 900 107 N V 21 N "P1" -T1 0 -1000 600 400 900 100 N I 21 N "CONN_2" -DS -1000 500 -1000 -500 120 21 -DS -1000 -500 1000 -500 120 21 -DS 1000 -500 1000 500 120 21 -DS 1000 500 -1000 500 120 21 -$PAD -Sh "1" R 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 500 0 -$EndPAD -$EndMODULE SIL-2 -$MODULE R3 -Po 58500 35500 0 15 00200000 51868CE2 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 51868CE2 -AR /51863417 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R1" -T1 0 0 550 500 0 80 N I 21 N "1k" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE C1 -Po 57500 37500 0 15 3F92C496 51868CE3 ~~ -Li C1 -Cd Condensateur e = 1 pas -Kw C -Sc 51868CE3 -AR /5186342E -Op 0 0 0 -T0 100 -900 400 400 0 80 N V 21 N "C1" -T1 0 -900 400 400 0 80 N I 21 N "1u" -DS -980 -500 1000 -500 120 21 -DS 1000 -500 1000 500 120 21 -DS 1000 500 -1000 500 120 21 -DS -1000 500 -1000 -500 120 21 -DS -1000 -250 -750 -500 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/capa_1_pas.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE C1 -$DRAWSEGMENT -Po 0 55500 39000 55500 34000 150 -De 28 0 900 0 0 -$EndDRAWSEGMENT -$DRAWSEGMENT -Po 0 63000 39000 55500 39000 150 -De 28 0 900 0 0 -$EndDRAWSEGMENT -$DRAWSEGMENT -Po 0 63000 34000 63000 39000 150 -De 28 0 900 0 0 -$EndDRAWSEGMENT -$DRAWSEGMENT -Po 0 55500 34000 63000 34000 150 -De 28 0 900 0 0 -$EndDRAWSEGMENT -$TRACK -Po 0 58000 37500 61000 37500 315 -1 -De 0 0 1 0 C00000 -Po 0 57000 35500 57000 37500 315 -1 -De 0 0 2 0 C00000 -Po 0 60000 35500 61000 36500 315 -1 -De 0 0 3 0 C00000 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.cir.ckt.sol b/OSCAD/Examples/RC_pcb/RC_pcb.cir.ckt.sol deleted file mode 100644 index 29b1351..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.cir.ckt.sol +++ /dev/null @@ -1,6 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -V 1 0 0.0000000000 0.0000000000 -C 3 0 0.0000000000 0.0000000000 -I 0 3 -0.0000000000 0.0000000000 -R 3 1 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.cmp b/OSCAD/Examples/RC_pcb/RC_pcb.cmp deleted file mode 100644 index 14cc046..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.cmp +++ /dev/null @@ -1,24 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Thursday 16 May 2013 01:22:40 AM IST - -BeginCmp -TimeStamp = /5186342E; -Reference = C1; -ValeurCmp = 1u; -IdModule = C1; -EndCmp - -BeginCmp -TimeStamp = /51868B92; -Reference = P1; -ValeurCmp = CONN_2; -IdModule = SIL-2; -EndCmp - -BeginCmp -TimeStamp = /51863417; -Reference = R1; -ValeurCmp = 1k; -IdModule = R3; -EndCmp - -EndListe diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.net b/OSCAD/Examples/RC_pcb/RC_pcb.net deleted file mode 100644 index 1cda301..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.net +++ /dev/null @@ -1,30 +0,0 @@ -# EESchema Netlist Version 1.1 created Thursday 16 May 2013 01:22:40 AM IST -( - ( /5186342E C1 C1 1u - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /51868B92 SIL-2 P1 CONN_2 - ( 1 GND ) - ( 2 N-000003 ) - ) - ( /51863417 R3 R1 1k - ( 1 N-000001 ) - ( 2 N-000003 ) - ) -) -* -{ Allowed footprints by component: -$component C1 - SM* - C? - C1-1 -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$endfootprintlist -} diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.pro b/OSCAD/Examples/RC_pcb/RC_pcb.pro deleted file mode 100644 index 952e2e1..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 13 May 2013 07:10:16 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/rakhi/OSCAD/library/analogSpice -LibName32=/home/rakhi/OSCAD/library/analogXSpice -LibName33=/home/rakhi/OSCAD/library/convergenceAidSpice -LibName34=/home/rakhi/OSCAD/library/converterSpice -LibName35=/home/rakhi/OSCAD/library/digitalSpice -LibName36=/home/rakhi/OSCAD/library/digitalXSpice -LibName37=/home/rakhi/OSCAD/library/linearSpice -LibName38=/home/rakhi/OSCAD/library/measurementSpice -LibName39=/home/rakhi/OSCAD/library/portSpice -LibName40=/home/rakhi/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.proj b/OSCAD/Examples/RC_pcb/RC_pcb.proj deleted file mode 100644 index 396e6d0..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile RC.sch diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.sch b/OSCAD/Examples/RC_pcb/RC_pcb.sch deleted file mode 100644 index 8661fb3..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.sch +++ /dev/null @@ -1,123 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 15 May 2013 06:47:37 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:RC-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 4900 2050 5400 2050 -Wire Wire Line - 4900 2050 4900 2400 -Connection ~ 5400 3050 -Wire Wire Line - 5400 2900 5400 3050 -Wire Wire Line - 5900 2050 6100 2050 -Wire Wire Line - 6100 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-ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot8 -# -DEF vplot8 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 9 300 0 200 L 40 40 1 1 O -X + 2 -300 0 200 R 40 40 2 1 O -X - 10 300 0 200 L 40 40 2 1 O -X + 3 -300 0 200 R 40 40 3 1 O -X - 11 300 0 200 L 40 40 3 1 O -X + 4 -300 0 200 R 40 40 4 1 O -X - 12 300 0 200 L 40 40 4 1 O -X + 5 -300 0 200 R 40 40 5 1 O -X - 13 300 0 200 L 40 40 5 1 O -X + 6 -300 0 200 R 40 40 6 1 O -X - 14 300 0 200 L 40 40 6 1 O -X + 7 -300 0 200 R 40 40 7 1 O -X - 15 300 0 200 L 40 40 7 1 O -X + 8 -300 0 200 R 40 40 8 1 O -X - 16 300 0 200 L 40 40 8 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.bak b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.bak deleted file mode 100644 index 542665c..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.bak +++ /dev/null @@ -1,203 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 09 December 2012 10:56:29 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:bridgeRectifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "9 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6600 4000 4900 4000 -Wire Wire Line - 6600 4000 6600 3550 -Connection ~ 6300 2600 -Wire Wire Line - 6600 2950 6600 2600 -Wire Wire Line - 6600 2600 4900 2600 -Connection ~ 5150 3350 -Wire Wire Line - 5150 2450 5150 3350 -Connection ~ 5950 4000 -Wire Wire Line - 5950 4000 5950 3700 -Connection ~ 4900 3200 -Wire Wire Line - 4900 3200 4650 3200 -Wire Wire Line - 4650 3200 4650 2650 -Wire Wire Line - 4650 2650 4400 2650 -Wire Wire Line - 4400 2650 4400 2850 -Connection ~ 5500 2600 -Wire Wire Line - 5500 3150 5500 3400 -Wire Wire Line - 4900 3400 4900 3150 -Wire Wire Line - 4900 2600 4900 2750 -Wire Wire Line - 5500 2600 5500 2750 -Wire Wire Line - 4900 4000 4900 3800 -Wire Wire Line - 5500 4000 5500 3800 -Wire Wire Line - 6300 4000 6300 3500 -Connection ~ 5500 4000 -Wire Wire Line - 4400 3750 4400 3950 -Wire Wire Line - 4400 3950 4650 3950 -Wire Wire Line - 4650 3950 4650 3350 -Wire Wire Line - 4650 3350 5500 3350 -Connection ~ 5500 3350 -Wire Wire Line - 5650 4000 5650 4200 -Connection ~ 5650 4000 -Wire Wire Line - 6300 2600 6300 3000 -Wire Wire Line - 4550 2450 4550 2650 -Connection ~ 4550 2650 -Connection ~ 6300 4000 -$Comp -L VPLOT8 U1 -U 2 1 50C41A9A -P 6600 3250 -F 0 "U1" H 6450 3350 50 0000 C CNN -F 1 "VPLOT8" H 6750 3350 50 0000 C CNN - 2 6600 3250 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8 U1 -U 1 1 50C41A90 -P 4850 2450 -F 0 "U1" H 4700 2550 50 0000 C CNN -F 1 "VPLOT8" H 5000 2550 50 0000 C CNN - 1 4850 2450 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 506BDF52 -P 5950 3700 -F 0 "#FLG01" H 5950 3970 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 3930 30 0000 C CNN - 1 5950 3700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 506BDF42 -P 5650 4200 -F 0 "#PWR02" H 5650 4200 30 0001 C CNN -F 1 "GND" H 5650 4130 30 0001 C CNN - 1 5650 4200 - 1 0 0 -1 -$EndComp -$Comp -L SINE V1 -U 1 1 506BDD71 -P 4400 3300 -F 0 "V1" H 4200 3400 60 0000 C CNN -F 1 "SINE" H 4200 3250 60 0000 C CNN -F 2 "R1" H 4100 3300 60 0000 C CNN - 1 4400 3300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 506BDD54 -P 6300 3250 -F 0 "R1" V 6380 3250 50 0000 C CNN -F 1 "1000" V 6300 3250 50 0000 C CNN - 1 6300 3250 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D3 -U 1 1 506BDD38 -P 4900 3600 -F 0 "D3" H 4900 3700 40 0000 C CNN -F 1 "1n4007" H 4900 3500 40 0000 C CNN - 1 4900 3600 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D4 -U 1 1 506BDD2F -P 5500 3600 -F 0 "D4" H 5500 3700 40 0000 C CNN -F 1 "1n4007" H 5500 3500 40 0000 C CNN - 1 5500 3600 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D2 -U 1 1 506BDD29 -P 5500 2950 -F 0 "D2" H 5500 3050 40 0000 C CNN -F 1 "1n4007" H 5500 2850 40 0000 C CNN - 1 5500 2950 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 506BDD23 -P 4900 2950 -F 0 "D1" H 4900 3050 40 0000 C CNN -F 1 "1n4007" H 4900 2850 40 0000 C CNN - 1 4900 2950 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.brd b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.brd deleted file mode 100644 index 1f56fcf..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.brd +++ /dev/null @@ -1,374 +0,0 @@ -PCBNEW-BOARD Version 1 date Thursday 04 October 2012 12:24:14 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 8 -NoConn 0 -Di 39125 25379 48489 31041 -Ndraw 0 -Ntrack 17 -Nzone 0 -BoardThickness 630 -Nmodule 6 -Nnets 5 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "4 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000002" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000002" -AddNet "N-000003" -AddNet "N-000004" -$EndNCLASS -$MODULE R3 -Po 46500 30000 1800 15 00200000 506D2FD9 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 506D2FD9 -AR /506BDD54 -Op 0 A 0 -T0 0 0 550 500 1800 80 N V 21 N "R1" -T1 0 0 550 500 1800 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R1 -Po 41500 30000 1800 15 00200000 506D2FDA ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 506D2FDA -AR /506BDD71 -Op A A 0 -T0 -400 1000 550 500 1800 80 N V 21 N "V1" -T1 -450 1000 550 500 1800 80 N I 21 N "SINE" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po 500 0 -$EndPAD -$SHAPE3D -Na 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-Po 46500 26000 0 15 00200000 506D2FDD ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D2FDD -AR /506BDD29 -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D2" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$MODULE D3 -Po 41000 28000 0 15 00200000 506D2FDF ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D2FDF -AR /506BDD38 -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D3" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$MODULE D3 -Po 41000 26000 0 15 00200000 506D31A5 ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D31A5 -AR /506BDD2F -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D4" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$TRACK -Po 0 45000 30000 44000 30000 80 -1 -De 0 0 1 0 400000 -Po 0 39500 30000 39500 28000 80 -1 -De 0 0 1 0 800000 -Po 0 40500 31000 39500 30000 80 -1 -De 0 0 1 0 0 -Po 0 43000 31000 40500 31000 80 -1 -De 0 0 1 0 0 -Po 0 44000 30000 43000 31000 80 -1 -De 0 0 1 0 0 -Po 0 39500 28000 39500 26000 80 -1 -De 0 0 1 0 C00000 -Po 0 41000 30000 41000 27000 80 -1 -De 0 0 2 0 400000 -Po 0 42000 26000 42500 26000 80 -1 -De 0 0 2 0 800000 -Po 0 41000 27000 42000 26000 80 -1 -De 0 0 2 0 0 -Po 0 42500 26000 45000 26000 80 -1 -De 0 0 2 0 C00000 -Po 0 42500 28000 45000 28000 80 -1 -De 0 0 3 0 C00000 -Po 0 42000 30000 42500 30000 80 -1 -De 0 0 3 0 400000 -Po 0 43000 28500 42500 28000 80 -1 -De 0 0 3 0 800000 -Po 0 43000 29500 43000 28500 80 -1 -De 0 0 3 0 0 -Po 0 42500 30000 43000 29500 80 -1 -De 0 0 3 0 0 -Po 0 48000 28000 48000 30000 80 -1 -De 0 0 4 0 C00000 -Po 0 48000 26000 48000 28000 80 -1 -De 0 0 4 0 C00000 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir deleted file mode 100644 index 4eab418..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 12:01:55 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 3 4 1 0 VPLOT8 -V1 3 1 SINE -R1 4 0 1000 -D3 0 3 1n4007 -D4 0 1 1n4007 -D2 1 4 1n4007 -D1 3 4 1n4007 - -.end diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.ckt b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.ckt deleted file mode 100644 index 2ac10e3..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 12:01:55 pm ist -.include 1n4007.lib - -v1 3 1 sine(0 5 50 0 0) -r1 4 0 1000 -d3 0 3 1n4007 -d4 0 1 1n4007 -d2 1 4 1n4007 -d1 3 4 1n4007 - -.tran 100e-06 40e-03 0e-00 -.plot v(3)-v(1) v(4) -.end diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.ckt.sol b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.ckt.sol deleted file mode 100644 index d25e686..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.ckt.sol +++ /dev/null @@ -1,8 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -V 3 1 0.0000000000 0.0000000000 -R 4 0 0.0000000000 0.0000000000 -D 0 3 -0.0000000000 0.0000000000 -D 0 1 -0.0000000000 0.0000000000 -D 1 4 0.0000000000 0.0000000000 -D 3 4 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.out b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.out deleted file mode 100644 index 367e3ee..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 12:01:55 pm ist -.include 1n4007.lib - -v1 3 1 sine(0 5 50 0 0) -r1 4 0 1000 -d3 0 3 1n4007 -d4 0 1 1n4007 -d2 1 4 1n4007 -d1 3 4 1n4007 - -.tran 100e-06 40e-03 0e-00 - -* Control Statements -.control -run -plot v(3)-v(1) v(4) -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cmp b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cmp deleted file mode 100644 index 2420597..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cmp +++ /dev/null @@ -1,45 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Monday 22 October 2012 04:28:50 PM IST - -BeginCmp -TimeStamp = /506BDD23; -Reference = D1; -ValeurCmp = 1n4007; -IdModule = D3; -EndCmp - -BeginCmp -TimeStamp = /506BDD29; -Reference = D2; -ValeurCmp = 1n4007; -IdModule = D3; -EndCmp - -BeginCmp -TimeStamp = /506BDD38; -Reference = D3; -ValeurCmp = 1n4007; -IdModule = D3; -EndCmp - -BeginCmp -TimeStamp = /506BDD2F; -Reference = D4; -ValeurCmp = 1n4007; -IdModule = D3; -EndCmp - -BeginCmp -TimeStamp = /506BDD54; -Reference = R1; -ValeurCmp = 1000; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /506BDD71; -Reference = V1; -ValeurCmp = SINE; -IdModule = R1; -EndCmp - -EndListe diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.lst b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.lst 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col0 s gr -% Polyline -n 2100 2400 m - 2100 2475 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 0 -% Ellipse -7.500 slw -n 4200 1800 165 165 0 360 DrawEllipse gs col-1 s gr - -% Polyline -0 slj -0 slc -n 4125 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4275 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1725 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1500 m - 4200 1650 l gs col-1 s gr -% Polyline -n 4200 1950 m - 4200 2100 l gs col-1 s gr -% Polyline -n 2101 2250 m - 2101 1950 l gs col-1 s gr -% Polyline -n 2101 1652 m - 2101 1352 l gs col-1 s gr -% Polyline -n 2250 1950 m - 1950 1950 l gs 0.00 setgray ef gr gs col-1 s gr -% Polyline -n 2101 1950 m 2250 1652 l 1950 1652 l - cp gs col7 1.00 shd ef gr gs col0 s gr -% here ends figure; -$F2psEnd -rs -showpage -%%Trailer -%EOF diff --git a/OSCAD/Examples/bridgeRectifier/diode_Dref.pstex_t b/OSCAD/Examples/bridgeRectifier/diode_Dref.pstex_t deleted file mode 100644 index 65c5d99..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_Dref.pstex_t +++ /dev/null @@ -1,19 +0,0 @@ -\begin{picture}(0,0)% -\includegraphics{diode_Dref.pstex}% -\end{picture}% -\setlength{\unitlength}{3947sp}% -% -\begingroup\makeatletter\ifx\SetFigFont\undefined% -\gdef\SetFigFont#1#2#3#4#5{% - \reset@font\fontsize{#1}{#2pt}% - \fontfamily{#3}\fontseries{#4}\fontshape{#5}% - \selectfont}% -\fi\endgroup% -\begin{picture}(2435,1374)(1939,-1648) -\put(2251,-661){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$D_{dnumber}$}% -}}}} -\put(3076,-961){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$R_{D_{dnumber}}$}% -}}}} -\put(4351,-886){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$I_{D_{dnumber}}$}% -}}}} -\end{picture}% diff --git a/OSCAD/Examples/bridgeRectifier/latfont b/OSCAD/Examples/bridgeRectifier/latfont deleted file mode 100644 index 90e1eb3..0000000 --- a/OSCAD/Examples/bridgeRectifier/latfont +++ /dev/null @@ -1,8 +0,0 @@ -echo {\\input{$*.pstex_t}} >& dummy_font.tex -cat latfont1.tex dummy_font.tex latfont2.tex >& dummy_fig.tex -latex dummy_fig.tex -dvips -E -o dummy_fig.eps dummy_fig.dvi -mv dummy_fig.eps $*.eps -rm dummy_fig.* -rm -rf dummy_font.tex -evince $1.eps & diff --git a/OSCAD/Examples/bridgeRectifier/latfont1.tex b/OSCAD/Examples/bridgeRectifier/latfont1.tex deleted file mode 100644 index e6301a4..0000000 --- a/OSCAD/Examples/bridgeRectifier/latfont1.tex +++ /dev/null @@ -1,20 +0,0 @@ -\documentclass[12pt]{book} -\textwidth 6.5in -\textheight 9.0in -\topmargin 0.0in -\oddsidemargin 0.2in -\evensidemargin 0.2in -\textfloatsep 0.6cm -\abovecaptionskip 0.1cm -\usepackage[dvips]{graphicx} -\usepackage{makeidx} -\usepackage{epsfig} -\usepackage{color} -\setlength{\textwidth}{50cm} -\setlength{\textheight}{50cm} -\begin{document} -\pagestyle{empty} - -\begin{center} -%\resizebox{!}{5cm}{\input{cap_trns.pstex_t}} - diff --git a/OSCAD/Examples/bridgeRectifier/latfont2.tex b/OSCAD/Examples/bridgeRectifier/latfont2.tex deleted file mode 100644 index 3f4cd92..0000000 --- a/OSCAD/Examples/bridgeRectifier/latfont2.tex +++ /dev/null @@ -1,2 +0,0 @@ -\end{center} -\end{document} \ No newline at end of file diff --git a/OSCAD/Examples/bridgeRectifierFilter/1n4007.lib b/OSCAD/Examples/bridgeRectifierFilter/1n4007.lib deleted file mode 100644 index e95f7ea..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/1n4007.lib +++ /dev/null @@ -1,3 +0,0 @@ -.model 1n4007 D( VJ=0.7 CJO=1E-11 RS=0.0341512 IS=7.02767e-09 AF=1 -+ M=0.5 N=1.80803 BV=1000 FC=0.5 IBV=5e-08 -+ TT=1E-07 EG=1.05743 XTI=5 KF=0 ) \ No newline at end of file diff --git a/OSCAD/Examples/bridgeRectifierFilter/analysis b/OSCAD/Examples/bridgeRectifierFilter/analysis deleted file mode 100644 index 888b3aa..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 100e-06 40e-03 0e-00 diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.bak b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.bak deleted file mode 100644 index 0708079..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.bak +++ /dev/null @@ -1,121 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 20 November 2012 11:18:10 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot -# -DEF vplot U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -400 0 300 R 50 50 1 1 O -X - 2 400 0 300 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# vplot1 -# -DEF vplot1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.lib b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.lib deleted file mode 100644 index c2529f8..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.lib +++ /dev/null @@ -1,121 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 03:22:19 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot -# -DEF vplot U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 2 300 0 200 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot1 -# -DEF vplot1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.bak b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.bak deleted file mode 100644 index acc6cf8..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.bak +++ /dev/null @@ -1,209 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 20 November 2012 11:18:10 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:bridgeRectifierFilter-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 nov 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3750 4400 0 80 Italic 0 -Bridge Rectifier with Capacitor Filter -Wire Wire Line - 5850 2900 5850 2850 -Wire Wire Line - 3700 2950 3700 2650 -Connection ~ 5350 4100 -Wire Wire Line - 5350 4100 5350 3900 -Connection ~ 5850 2900 -Connection ~ 5650 2900 -Wire Wire Line - 6200 3300 6200 2900 -Wire Wire Line - 6200 2900 4250 2900 -Connection ~ 3700 2950 -Connection ~ 4250 3400 -Wire Wire Line - 4250 3400 3850 3400 -Wire Wire Line - 3850 3400 3850 2950 -Wire Wire Line - 3850 2950 3400 2950 -Wire Wire Line - 3400 2950 3400 3000 -Connection ~ 4850 2900 -Wire Wire Line - 5650 2900 5650 3300 -Wire Wire Line - 4250 3700 4250 3300 -Wire Wire Line - 4850 3700 4850 3300 -Wire Wire Line - 5650 4100 5650 3800 -Connection ~ 4850 4100 -Wire Wire Line - 3400 3900 3400 4000 -Wire Wire Line - 3400 4000 3850 4000 -Wire Wire Line - 3850 4000 3850 3600 -Wire Wire Line - 3850 3600 4850 3600 -Connection ~ 4850 3600 -Connection ~ 4500 3600 -Wire Wire Line - 4250 4100 6200 4100 -Wire Wire Line - 6200 4100 6200 3700 -Connection ~ 5650 4100 -Connection ~ 5200 4100 -Wire Wire Line - 5200 4100 5200 4200 -Wire Wire Line - 4500 3600 4500 2650 -$Comp -L PWR_FLAG #FLG01 -U 1 1 50852DDA -P 5350 3900 -F 0 "#FLG01" H 5350 4170 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4130 30 0000 C CNN - 1 5350 3900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5070FDD5 -P 5200 4200 -F 0 "#PWR02" H 5200 4200 30 0001 C CNN -F 1 "GND" H 5200 4130 30 0001 C CNN - 1 5200 4200 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT1 U2 -U 1 1 5070F9F8 -P 5850 2550 -F 0 "U2" H 5700 2650 50 0000 C CNN -F 1 "VPLOT1" H 6000 2650 50 0000 C CNN - 1 5850 2550 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT U1 -U 1 1 5070F9E6 -P 4100 2650 -F 0 "U1" H 3950 2750 50 0000 C CNN -F 1 "VPLOT" H 4250 2750 50 0000 C CNN - 1 4100 2650 - 1 0 0 -1 -$EndComp -$Comp -L SINE V1 -U 1 1 5070F9A6 -P 3400 3450 -F 0 "V1" H 3200 3550 60 0000 C CNN -F 1 "SINE" H 3200 3400 60 0000 C CNN -F 2 "R1" H 3100 3450 60 0000 C CNN - 1 3400 3450 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 5070F977 -P 6200 3500 -F 0 "C1" H 6250 3600 50 0000 L CNN -F 1 "1e-06" H 6250 3400 50 0000 L CNN - 1 6200 3500 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D4 -U 1 1 5070F878 -P 4850 3900 -F 0 "D4" H 4850 4000 40 0000 C CNN -F 1 "1n4007" H 4850 3800 40 0000 C CNN - 1 4850 3900 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D2 -U 1 1 5070F85B -P 4850 3100 -F 0 "D2" H 4850 3200 40 0000 C CNN -F 1 "1n4007" H 4850 3000 40 0000 C CNN - 1 4850 3100 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D3 -U 1 1 5070F84B -P 4250 3900 -F 0 "D3" H 4250 4000 40 0000 C CNN -F 1 "1n4007" H 4250 3800 40 0000 C CNN - 1 4250 3900 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 5070F83D -P 4250 3100 -F 0 "D1" H 4250 3200 40 0000 C CNN -F 1 "1n4007" H 4250 3000 40 0000 C CNN - 1 4250 3100 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 5070F82C -P 5650 3550 -F 0 "R1" V 5730 3550 50 0000 C CNN -F 1 "100000" V 5650 3550 50 0000 C CNN - 1 5650 3550 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir deleted file mode 100644 index 4597fee..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Sunday 09 December 2012 03:22:39 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 3 VPLOT1 -U1 4 1 VPLOT -V1 4 1 SINE -C1 3 0 1e-06 -D4 0 1 1n4007 -D2 1 3 1n4007 -D3 0 4 1n4007 -D1 4 3 1n4007 -R1 3 0 100000 - -.end diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt deleted file mode 100644 index f6731c0..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 03:22:39 pm ist -.include 1n4007.lib - -* Plotting option vplot1 -* Plotting option vplot -v1 4 1 sine(0 5 50 0 0) -c1 3 0 1e-06 -d4 0 1 1n4007 -d2 1 3 1n4007 -d3 0 4 1n4007 -d1 4 3 1n4007 -r1 3 0 100000 - -.tran 100e-06 40e-03 0e-00 -.plot v(3) -.plot v(4)-v(1) -.end diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt.sol b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt.sol deleted file mode 100644 index 6403344..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt.sol +++ /dev/null @@ -1,10 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -V 4 1 0.0000000000 0.0000000000 -C 3 0 0.0000000000 0.0000000000 -I 0 3 -0.0000000000 0.0000000000 -D 0 1 -0.0000000000 0.0000000000 -D 1 3 0.0000000000 0.0000000000 -D 0 4 -0.0000000000 0.0000000000 -D 4 3 0.0000000000 0.0000000000 -R 3 0 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.out b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.out deleted file mode 100644 index f4a26cd..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 03:22:39 pm ist -.include 1n4007.lib - -* Plotting option vplot1 -* Plotting option vplot -v1 4 1 sine(0 5 50 0 0) -c1 3 0 1e-06 -d4 0 1 1n4007 -d2 1 3 1n4007 -d3 0 4 1n4007 -d1 4 3 1n4007 -r1 3 0 100000 - -.tran 100e-06 40e-03 0e-00 - -* Control Statements -.control -run -plot v(3) -plot v(4)-v(1) -.endc -.end diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.net b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.net deleted file mode 100644 index 5ff5b10..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.net +++ /dev/null @@ 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30 0001 C CNN -F 1 "PWR_FLAG" H 5700 4530 30 0000 C CNN - 1 5700 4300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 50A93CB7 -P 5200 2850 -F 0 "#FLG03" H 5200 3120 30 0001 C CNN -F 1 "PWR_FLAG" H 5200 3080 30 0000 C CNN - 1 5200 2850 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 50A93C56 -P 3650 3600 -F 0 "v1" H 3450 3700 60 0000 C CNN -F 1 "5" H 3450 3550 60 0000 C CNN -F 2 "R1" H 3350 3600 60 0000 C CNN - 1 3650 3600 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A93BFE -P 6100 3850 -F 0 "R3" V 6180 3850 50 0000 C CNN -F 1 "1000" V 6100 3850 50 0000 C CNN - 1 6100 3850 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 50A93ACA -P 4300 4200 -F 0 "C2" H 4350 4300 50 0000 L CNN -F 1 "0.01e-6" H 4350 4100 50 0000 L CNN - 1 4300 4200 - 1 0 0 -1 -$EndComp -$Comp -L CP C1 -U 1 1 50A93893 -P 4000 4350 -F 0 "C1" H 4050 4450 50 0000 L CNN -F 1 "100e-12" H 4050 4250 50 0000 L CNN - 1 4000 4350 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A93858 -P 4000 3750 -F 0 "R2" V 4080 3750 50 0000 C CNN -F 1 "10000" V 4000 3750 50 0000 C CNN - 1 4000 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A93852 -P 4000 3100 -F 0 "R1" V 4080 3100 50 0000 C CNN -F 1 "1000" V 4000 3100 50 0000 C CNN - 1 4000 3100 - 1 0 0 -1 -$EndComp -$Comp -L LM555N X1 -U 1 1 50A937B9 -P 5200 3550 -F 0 "X1" H 5200 3650 70 0000 C CNN -F 1 "LM555N" H 5200 3450 70 0000 C CNN - 1 5200 3550 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.cir b/OSCAD/Examples/frequencyDivider/frequencyDivider.cir deleted file mode 100644 index 5989740..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 10:57:14 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 2 VPLOT8_1 -U2 5 IC -U3 3 3 0 6 3 2 1 0 3 74LS109 -v1 3 0 5 -R3 6 0 1000 -C2 7 0 0.01e-6 -C1 5 0 100e-12 -R2 8 5 10000 -R1 3 8 1000 -X1 0 5 6 3 7 5 8 3 LM555N - -.end diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.cir.ckt b/OSCAD/Examples/frequencyDivider/frequencyDivider.cir.ckt deleted file mode 100644 index 293ca2e..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.cir.ckt +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:14 am ist -.include lm555n.sub - -* Plotting option vplot8_1 -.ic v(5)=0 -* 74ls109 -v1 3 0 5 -r3 6 0 1000 -c2 7 0 0.01e-6 -c1 5 0 100e-12 -r2 8 5 10000 -r1 3 8 1000 -x1 0 5 6 3 7 5 8 3 lm555n -a1 [3 0 6 3 3] [3_in 0_in 6_in 3_in 3_in] u3adc -a2 3_in ~0_in 6_in ~3_in ~3_in 2_out 1_out u3 -a3 [2_out 1_out] [2 1] u3dac -.model u3 d_jkff -.model u3adc adc_bridge(in_low=0.8 in_high=2.0) -.model u3dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 50e-09 5e-06 0e-00 -.plot v(6) v(2) -.end diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.cir.out b/OSCAD/Examples/frequencyDivider/frequencyDivider.cir.out deleted file mode 100644 index 97db1fc..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.cir.out +++ /dev/null @@ -1,28 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:14 am ist -.include lm555n.sub - -* Plotting option vplot8_1 -.ic v(5)=0 -* 74ls109 -v1 3 0 5 -r3 6 0 1000 -c2 7 0 0.01e-6 -c1 5 0 100e-12 -r2 8 5 10000 -r1 3 8 1000 -x1 0 5 6 3 7 5 8 3 lm555n -a1 [3 0 6 3 3] [3_in 0_in 6_in 3_in 3_in] u3adc -a2 3_in ~0_in 6_in ~3_in ~3_in 2_out 1_out u3 -a3 [2_out 1_out] [2 1] u3dac -.model u3 d_jkff -.model u3adc adc_bridge(in_low=0.8 in_high=2.0) -.model u3dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 50e-09 5e-06 0e-00 - -* Control Statements -.control -run -plot v(6) v(2) -.endc -.end diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.pro b/OSCAD/Examples/frequencyDivider/frequencyDivider.pro deleted file mode 100644 index a4e7e69..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Monday 17 December 2012 08:48:56 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=regul -LibName6=74xx -LibName7=cmos4000 -LibName8=adc-dac -LibName9=memory -LibName10=xilinx -LibName11=special -LibName12=microcontrollers -LibName13=dsp -LibName14=microchip -LibName15=analog_switches -LibName16=motorola -LibName17=texas -LibName18=intel -LibName19=audio -LibName20=interface -LibName21=digital-audio -LibName22=philips -LibName23=display -LibName24=cypress -LibName25=siliconi -LibName26=opto -LibName27=atmel -LibName28=contrib -LibName29=valves -LibName30=analogSpice -LibName31=converterSpice -LibName32=digitalSpice -LibName33=linearSpice -LibName34=measurementSpice -LibName35=portSpice -LibName36=sourcesSpice -LibName37=convergenceAidSpice diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.proj b/OSCAD/Examples/frequencyDivider/frequencyDivider.proj deleted file mode 100644 index 0a193f0..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile IC555AstableMultivibrator.sch diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.sch b/OSCAD/Examples/frequencyDivider/frequencyDivider.sch deleted file mode 100644 index 3f76d3a..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.sch +++ /dev/null @@ -1,280 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 10:57:17 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:convergenceAidSpice -LIBS:frequencyDivider-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L VPLOT8_1 U1 -U 2 1 50CE9193 -P 7700 3000 -F 0 "U1" H 7550 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 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0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 50A93C56 -P 3650 3600 -F 0 "v1" H 3450 3700 60 0000 C CNN -F 1 "5" H 3450 3550 60 0000 C CNN -F 2 "R1" H 3350 3600 60 0000 C CNN - 1 3650 3600 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A93BFE -P 6100 3850 -F 0 "R3" V 6180 3850 50 0000 C CNN -F 1 "1000" V 6100 3850 50 0000 C CNN - 1 6100 3850 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 50A93ACA -P 4300 4200 -F 0 "C2" H 4350 4300 50 0000 L CNN -F 1 "0.01e-6" H 4350 4100 50 0000 L CNN - 1 4300 4200 - 1 0 0 -1 -$EndComp -$Comp -L CP C1 -U 1 1 50A93893 -P 4000 4350 -F 0 "C1" H 4050 4450 50 0000 L CNN -F 1 "100e-12" H 4050 4250 50 0000 L CNN - 1 4000 4350 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A93858 -P 4000 3750 -F 0 "R2" V 4080 3750 50 0000 C CNN -F 1 "10000" V 4000 3750 50 0000 C CNN - 1 4000 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A93852 -P 4000 3100 -F 0 "R1" V 4080 3100 50 0000 C CNN -F 1 "1000" V 4000 3100 50 0000 C CNN - 1 4000 3100 - 1 0 0 -1 -$EndComp -$Comp -L LM555N X1 -U 1 1 50A937B9 -P 5200 3550 -F 0 "X1" H 5200 3650 70 0000 C CNN -F 1 "LM555N" H 5200 3450 70 0000 C CNN - 1 5200 3550 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/frequencyDivider/lm555n-cache.bak b/OSCAD/Examples/frequencyDivider/lm555n-cache.bak deleted file mode 100644 index 2cfdb3a..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n-cache.bak +++ /dev/null @@ -1,207 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 10:48:46 AM IST -#encoding utf-8 -# -# ADC8 -# -DEF ADC8 U 0 10 Y Y 8 L N -F0 "U" -100 100 40 H V C CNN -F1 "ADC8" 0 0 40 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in1 1 -300 0 150 R 25 25 1 1 I -X out1 9 300 0 150 L 25 25 1 1 O -X in2 2 -300 0 150 R 25 25 2 1 I -X out2 10 300 0 150 L 25 25 2 1 O -X in3 3 -300 0 150 R 25 25 3 1 I -X out3 11 300 0 150 L 25 25 3 1 O -X in4 4 -300 0 150 R 25 25 4 1 I -X out4 12 300 0 150 L 25 25 4 1 O -X in5 5 -300 0 150 R 25 25 5 1 I -X out5 13 300 0 150 L 25 25 5 1 O -X in6 6 -300 0 150 R 25 25 6 1 I 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4480 3250 50 0000 C CNN -F 1 "5000" V 4400 3250 50 0000 C CNN - 1 4400 3250 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/frequencyDivider/lm555n.cir b/OSCAD/Examples/frequencyDivider/lm555n.cir deleted file mode 100644 index 9483a64..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n.cir +++ /dev/null @@ -1,25 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 10:57:49 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U5 5 21 D_INVERTER -U6 1 4 5 21 21 8 10 D_SRLATCH -E2 18 0 23 14 10000 -U4 19 20 11 12 LIMIT8 -U3 8 10 7 9 DAC8 -U2 11 12 6 4 1 5 ADC8 -U1 22 14 7 6 15 16 3 13 PORT -R8 9 2 1500 -Q1 22 2 3 QNOM -R7 18 20 25 -R6 17 19 25 -E1 17 0 16 15 10000 -R4 16 15 2E6 -R5 23 14 2E6 -R3 23 22 5000 -R2 15 23 5000 -R1 13 15 5000 - -.end diff --git a/OSCAD/Examples/frequencyDivider/lm555n.cir.ckt b/OSCAD/Examples/frequencyDivider/lm555n.cir.ckt deleted file mode 100644 index 90f04a3..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n.cir.ckt +++ /dev/null @@ -1,35 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist - -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -u1 22 14 7 6 15 16 3 13 port -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/OSCAD/Examples/frequencyDivider/lm555n.cir.out b/OSCAD/Examples/frequencyDivider/lm555n.cir.out deleted file mode 100644 index 90f04a3..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n.cir.out +++ /dev/null @@ -1,35 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist - -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -u1 22 14 7 6 15 16 3 13 port -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/OSCAD/Examples/frequencyDivider/lm555n.pro b/OSCAD/Examples/frequencyDivider/lm555n.pro deleted file mode 100644 index 09fa54e..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n.pro +++ /dev/null @@ -1,73 +0,0 @@ -update=Monday 19 November 2012 04:56:38 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 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-a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) - -.ends lm555n \ No newline at end of file diff --git a/OSCAD/Examples/linear1/analysis b/OSCAD/Examples/linear1/analysis deleted file mode 100644 index 162ad08..0000000 --- a/OSCAD/Examples/linear1/analysis +++ /dev/null @@ -1 +0,0 @@ -.op \ No newline at end of file diff --git a/OSCAD/Examples/linear1/linear1-cache.bak b/OSCAD/Examples/linear1/linear1-cache.bak deleted file mode 100644 index b2b47b7..0000000 --- a/OSCAD/Examples/linear1/linear1-cache.bak +++ /dev/null @@ -1,106 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:21:41 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 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CNN - 1 6400 2550 - 1 0 0 -1 -$EndComp -$Comp -L R R6 -U 1 1 506955DC -P 7300 3250 -F 0 "R6" V 7380 3250 50 0000 C CNN -F 1 "1" V 7300 3250 50 0000 C CNN - 1 7300 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 506955D8 -P 6400 3250 -F 0 "R3" V 6480 3250 50 0000 C CNN -F 1 "1" V 6400 3250 50 0000 C CNN - 1 6400 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 506955D1 -P 6800 2900 -F 0 "R5" V 6880 2900 50 0000 C CNN -F 1 "0.5" V 6800 2900 50 0000 C CNN - 1 6800 2900 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 506955CC -P 6000 2900 -F 0 "R4" V 6080 2900 50 0000 C CNN -F 1 "1" V 6000 2900 50 0000 C CNN - 1 6000 2900 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 506955C7 -P 4600 3250 -F 0 "R2" V 4680 3250 50 0000 C CNN -F 1 "1" V 4600 3250 50 0000 C CNN - 1 4600 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 506955C2 -P 4200 2900 -F 0 "R1" V 4280 2900 50 0000 C CNN -F 1 "1" V 4200 2900 50 0000 C CNN - 1 4200 2900 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/linear1/linear1.brd b/OSCAD/Examples/linear1/linear1.brd deleted file mode 100644 index a04a203..0000000 --- a/OSCAD/Examples/linear1/linear1.brd +++ /dev/null @@ -1,84 +0,0 @@ -PCBNEW-BOARD Version 1 date Thursday 04 October 2012 03:56:07 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 0 -NoConn 0 -Di 0 0 117000 82670 -Ndraw 0 -Ntrack 0 -Nzone 0 -BoardThickness 630 -Nmodule 0 -Nnets 1 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "4 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -$EndNCLASS -$TRACK -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/linear1/linear1.cir b/OSCAD/Examples/linear1/linear1.cir deleted file mode 100644 index 349f95a..0000000 --- a/OSCAD/Examples/linear1/linear1.cir +++ /dev/null @@ -1,19 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:24:34 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 1 VPRINT1 -E1 4 6 1 2 0.5 -I1 0 6 1 -V1 3 0 1 -G1 6 1 0 2 0.5 -R6 1 0 1 -R3 2 0 1 -R5 1 2 0.5 -R4 2 6 1 -R2 4 0 1 -R1 4 3 1 - -.end diff --git a/OSCAD/Examples/linear1/linear1.cir.ckt b/OSCAD/Examples/linear1/linear1.cir.ckt deleted file mode 100644 index 6738a45..0000000 --- a/OSCAD/Examples/linear1/linear1.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:24:34 am ist - -* Printing option vprint1 -e1 4 6 1 2 0.5 -i1 0 6 1 -v1 3 0 1 -g1 6 1 0 2 0.5 -r6 1 0 1 -r3 2 0 1 -r5 1 2 0.5 -r4 2 6 1 -r2 4 0 1 -r1 4 3 1 - -.op -.print v(1) -.end diff --git a/OSCAD/Examples/linear1/linear1.cir.ckt.sol b/OSCAD/Examples/linear1/linear1.cir.ckt.sol deleted file mode 100644 index 5727235..0000000 --- a/OSCAD/Examples/linear1/linear1.cir.ckt.sol +++ /dev/null @@ -1,14 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -E 4 6 0.0000000000 0.0000000000 -I 1 2 0.0000000000 0.0000000000 -I 0 6 -0.0000000000 0.0000000000 -V 3 0 0.0000000000 0.0000000000 -G 6 1 0.0000000000 -0.0000000000 -I 0 2 -0.0000000000 0.0000000000 -R 1 0 0.0000000000 0.0000000000 -R 2 0 0.0000000000 0.0000000000 -R 1 2 0.0000000000 0.0000000000 -R 2 6 0.0000000000 0.0000000000 -R 4 0 0.0000000000 0.0000000000 -R 4 3 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/linear1/linear1.cir.out b/OSCAD/Examples/linear1/linear1.cir.out deleted file mode 100644 index b996360..0000000 --- a/OSCAD/Examples/linear1/linear1.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:24:34 am ist - -* Printing option vprint1 -e1 4 6 1 2 0.5 -i1 0 6 1 -v1 3 0 1 -g1 6 1 0 2 0.5 -r6 1 0 1 -r3 2 0 1 -r5 1 2 0.5 -r4 2 6 1 -r2 4 0 1 -r1 4 3 1 - -.op - -* Control Statements -.control -run -print v(1) -.endc -.end diff --git a/OSCAD/Examples/linear1/linear1.cmp b/OSCAD/Examples/linear1/linear1.cmp deleted file mode 100644 index 84671d7..0000000 --- a/OSCAD/Examples/linear1/linear1.cmp +++ /dev/null @@ -1,73 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Monday 22 October 2012 04:10:55 PM IST - -BeginCmp -TimeStamp = /50695730; -Reference = E1; -ValeurCmp = 0.5; -IdModule = bornier4; -EndCmp - -BeginCmp -TimeStamp = /5069566A; -Reference = G1; -ValeurCmp = 0.5; -IdModule = bornier4; -EndCmp - -BeginCmp -TimeStamp = /506956A6; -Reference = I1; -ValeurCmp = DC; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /506955C2; -Reference = R1; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /506955C7; -Reference = R2; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /506955D8; -Reference = R3; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /506955CC; -Reference = R4; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /506955D1; -Reference = R5; -ValeurCmp = 0.5; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /506955DC; -Reference = R6; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /50695694; -Reference = V1; -ValeurCmp = DC; -IdModule = R1; -EndCmp - -EndListe diff --git a/OSCAD/Examples/linear1/linear1.net b/OSCAD/Examples/linear1/linear1.net deleted file mode 100644 index c615a65..0000000 --- a/OSCAD/Examples/linear1/linear1.net +++ /dev/null @@ -1,99 +0,0 @@ -# EESchema Netlist Version 1.1 created Monday 22 October 2012 04:10:55 PM IST -( - ( /50695730 bornier4 E1 0.5 - ( 1 N-000005 ) - ( 2 N-000006 ) - ( 3 /a ) - ( 4 /b ) - ) - ( /5069566A bornier4 G1 0.5 - ( 1 N-000006 ) - ( 2 /a ) - ( 3 GND ) - ( 4 /b ) - ) - ( /506956A6 R1 I1 DC - ( 1 GND ) - ( 2 N-000006 ) - ) - ( /506955C2 R3 R1 1 - ( 1 N-000005 ) - ( 2 N-000004 ) - ) - ( /506955C7 R3 R2 1 - ( 1 N-000005 ) - ( 2 GND ) - ) - ( /506955D8 R3 R3 1 - ( 1 /b ) - ( 2 GND ) - ) - ( /506955CC R3 R4 1 - ( 1 /b ) - ( 2 N-000006 ) - ) - ( /506955D1 R3 R5 0.5 - ( 1 /a ) - ( 2 /b ) - ) - ( /506955DC R3 R6 1 - ( 1 /a ) - ( 2 GND ) - ) - ( /50695694 R1 V1 DC - ( 1 N-000004 ) - ( 2 GND ) - ) -) -* -{ Allowed footprints by component: -$component E1 - 1_pin -$endlist -$component G1 - 1_pin -$endlist -$component I1 - 1_pin -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R4 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R5 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R6 - R? - SM0603 - SM0805 - R?-* -$endlist -$component V1 - 1_pin -$endlist -$endfootprintlist -} diff --git a/OSCAD/Examples/linear1/linear1.pro b/OSCAD/Examples/linear1/linear1.pro deleted file mode 100644 index 0a485f9..0000000 --- a/OSCAD/Examples/linear1/linear1.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Monday 22 October 2012 04:08:41 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/linear1/linear1.proj b/OSCAD/Examples/linear1/linear1.proj deleted file mode 100644 index e532113..0000000 --- a/OSCAD/Examples/linear1/linear1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile linear1.sch diff --git a/OSCAD/Examples/linear1/linear1.sch b/OSCAD/Examples/linear1/linear1.sch deleted file mode 100644 index 452dbd0..0000000 --- a/OSCAD/Examples/linear1/linear1.sch +++ /dev/null @@ -1,234 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:24:11 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:linear1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5500 2900 -Wire Wire Line - 5350 2900 5750 2900 -Connection ~ 7300 2750 -Wire Wire Line - 7300 2750 7700 2750 -Wire Wire Line - 6700 2500 7300 2500 -Connection ~ 5800 3800 -Wire Wire Line - 5800 3800 5800 4000 -Connection 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0000 C CNN - 1 6850 3600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50695EE6 -P 5800 4000 -F 0 "#PWR02" H 5800 4000 30 0001 C CNN -F 1 "GND" H 5800 3930 30 0001 C CNN - 1 5800 4000 - 1 0 0 -1 -$EndComp -Text Label 6100 3800 0 60 ~ 0 -c -Text Label 6350 2750 0 60 ~ 0 -c -Text Label 6450 2750 0 60 ~ 0 -b -Text Label 6550 2900 0 60 ~ 0 -b -Text Label 5100 3150 0 60 ~ 0 -b -Text Label 5000 3150 0 60 ~ 0 -a -Text Label 7150 2900 0 60 ~ 0 -a -$Comp -L VCVS E1 -U 1 1 50695730 -P 5050 2950 -F 0 "E1" H 4850 3050 50 0000 C CNN -F 1 "0.5" H 4850 2900 50 0000 C CNN - 1 5050 2950 - 1 0 0 -1 -$EndComp -$Comp -L DC I1 -U 1 1 506956A6 -P 5500 3350 -F 0 "I1" H 5300 3450 60 0000 C CNN -F 1 "1" H 5300 3300 60 0000 C CNN -F 2 "R1" H 5200 3350 60 0000 C CNN - 1 5500 3350 - -1 0 0 1 -$EndComp -$Comp -L DC V1 -U 1 1 50695694 -P 3750 3350 -F 0 "V1" H 3550 3450 60 0000 C CNN -F 1 "1" H 3550 3300 60 0000 C CNN -F 2 "R1" H 3450 3350 60 0000 C CNN - 1 3750 3350 - 1 0 0 -1 -$EndComp -$Comp -L VCCS G1 -U 1 1 5069566A -P 6400 2550 -F 0 "G1" H 6200 2650 50 0000 C CNN -F 1 "0.5" H 6200 2500 50 0000 C CNN - 1 6400 2550 - 1 0 0 -1 -$EndComp -$Comp -L R R6 -U 1 1 506955DC -P 7300 3250 -F 0 "R6" V 7380 3250 50 0000 C CNN -F 1 "1" V 7300 3250 50 0000 C CNN - 1 7300 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 506955D8 -P 6400 3250 -F 0 "R3" V 6480 3250 50 0000 C CNN -F 1 "1" V 6400 3250 50 0000 C CNN - 1 6400 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 506955D1 -P 6800 2900 -F 0 "R5" V 6880 2900 50 0000 C CNN -F 1 "0.5" V 6800 2900 50 0000 C CNN - 1 6800 2900 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 506955CC -P 6000 2900 -F 0 "R4" V 6080 2900 50 0000 C CNN -F 1 "1" V 6000 2900 50 0000 C CNN - 1 6000 2900 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 506955C7 -P 4600 3250 -F 0 "R2" V 4680 3250 50 0000 C CNN -F 1 "1" V 4600 3250 50 0000 C CNN - 1 4600 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 506955C2 -P 4200 2900 -F 0 "R1" V 4280 2900 50 0000 C CNN -F 1 "1" V 4200 2900 50 0000 C CNN - 1 4200 2900 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/linear2/analysis b/OSCAD/Examples/linear2/analysis deleted file mode 100644 index 162ad08..0000000 --- a/OSCAD/Examples/linear2/analysis +++ /dev/null @@ -1 +0,0 @@ -.op \ No newline at end of file diff --git a/OSCAD/Examples/linear2/linear2-cache.bak b/OSCAD/Examples/linear2/linear2-cache.bak deleted file mode 100644 index df2206b..0000000 --- a/OSCAD/Examples/linear2/linear2-cache.bak +++ /dev/null @@ -1,89 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:32:27 AM IST -#encoding utf-8 -# -# CCVS -# -DEF CCVS H 0 40 Y Y 1 F N -F0 "H" -200 100 50 H V C CNN -F1 "CCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vprint1 -# -DEF vprint1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vprint1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/linear2/linear2-cache.lib b/OSCAD/Examples/linear2/linear2-cache.lib deleted file mode 100644 index 79f9376..0000000 --- a/OSCAD/Examples/linear2/linear2-cache.lib +++ /dev/null @@ -1,89 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:32:49 AM IST -#encoding utf-8 -# -# CCVS -# -DEF CCVS H 0 40 Y Y 1 F N -F0 "H" -200 100 50 H V C CNN -F1 "CCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vprint1 -# -DEF vprint1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vprint1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/linear2/linear2.bak b/OSCAD/Examples/linear2/linear2.bak deleted file mode 100644 index e9d9386..0000000 --- a/OSCAD/Examples/linear2/linear2.bak +++ /dev/null @@ -1,181 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:32:27 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:linear2-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 6450 4000 -Wire Wire Line - 6450 4000 6450 3800 -Connection ~ 6750 3000 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VPRINT1 U1 -U 1 1 5069E9D3 -P 6750 2550 -F 0 "U1" H 6600 2650 50 0001 C CNN -F 1 "VPRINT1" H 6900 2650 50 0000 C CNN - 1 6750 2550 - 1 0 0 -1 -$EndComp -Text Label 6600 3550 0 60 ~ 0 -b -Text Label 6600 3450 0 60 ~ 0 -a -Text Label 6000 3300 0 60 ~ 0 -b -Text Label 6000 3150 0 60 ~ 0 -a -$Comp -L R R4 -U 1 1 5069E7B0 -P 6350 3000 -F 0 "R4" V 6430 3000 50 0000 C CNN -F 1 "0.1" V 6350 3000 50 0000 C CNN - 1 6350 3000 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 5069E7AC -P 5300 3550 -F 0 "R1" V 5380 3550 50 0000 C CNN -F 1 "0.2" V 5300 3550 50 0000 C CNN - 1 5300 3550 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5069E7A9 -P 5600 3000 -F 0 "R2" V 5680 3000 50 0000 C CNN -F 1 "0.1" V 5600 3000 50 0000 C CNN - 1 5600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 5069E7A6 -P 6000 3550 -F 0 "R3" V 6080 3550 50 0000 C CNN -F 1 "0.2" V 6000 3550 50 0000 C CNN - 1 6000 3550 - 1 0 0 -1 -$EndComp -$Comp -L CCVS H1 -U 1 1 5069E78C -P 6800 3500 -F 0 "H1" H 6600 3600 50 0000 C CNN -F 1 "2" H 6600 3450 50 0000 C CNN - 1 6800 3500 - 0 1 1 0 -$EndComp -$Comp -L DC I1 -U 1 1 5069E6DB -P 4800 3500 -F 0 "I1" H 4600 3600 60 0000 C CNN -F 1 "1" H 4600 3450 60 0000 C CNN -F 2 "R1" H 4500 3500 60 0000 C CNN - 1 4800 3500 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/linear2/linear2.brd b/OSCAD/Examples/linear2/linear2.brd deleted file mode 100644 index ab9dee7..0000000 --- a/OSCAD/Examples/linear2/linear2.brd +++ /dev/null @@ -1,398 +0,0 @@ -PCBNEW-BOARD Version 1 date Tuesday 02 October 2012 12:48:38 AM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 9 -NoConn 0 -Di 48825 32959 59875 43721 -Ndraw 0 -Ntrack 25 -Nzone 0 -BoardThickness 630 -Nmodule 6 -Nnets 6 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "1 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "/a" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "/b" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 5 "N-000005" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "/a" -AddNet "/b" -AddNet "GND" -AddNet "N-000004" -AddNet "N-000005" -$EndNCLASS -$MODULE R3 -Po 58000 34500 0 15 00200000 5069EAF6 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5069EAF6 -AR /5069E7AC -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R1" -T1 0 0 550 500 0 80 N I 21 N "0.2" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 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3 0 400000 -Po 0 58500 33500 59500 34500 80 -1 -De 0 0 3 0 800000 -Po 0 55500 33500 58500 33500 80 -1 -De 0 0 3 0 0 -Po 0 55000 34000 55500 33500 80 -1 -De 0 0 3 0 0 -Po 0 56500 34500 57500 34500 80 -1 -De 0 0 4 0 400000 -Po 0 58500 38500 59500 39500 80 -1 -De 0 0 4 0 800000 -Po 0 58500 35500 58500 38500 80 -1 -De 0 0 4 0 0 -Po 0 57500 34500 58500 35500 80 -1 -De 0 0 4 0 0 -Po 0 51500 34000 52000 34500 80 -1 -De 0 0 4 0 400000 -Po 0 52000 34500 56500 34500 80 -1 -De 0 0 4 0 800000 -Po 0 52000 42500 56500 42500 80 -1 -De 0 0 5 0 C00000 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/linear2/linear2.cir b/OSCAD/Examples/linear2/linear2.cir deleted file mode 100644 index f3a43b2..0000000 --- a/OSCAD/Examples/linear2/linear2.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:32:43 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 5 VPRINT1 -R4 5 2 0.1 -R1 4 0 0.2 -R2 2 4 0.1 -R3 3 0 0.2 -H1 5 0 2 3 2 -I1 4 0 1 - -.end diff --git a/OSCAD/Examples/linear2/linear2.cir.ckt b/OSCAD/Examples/linear2/linear2.cir.ckt deleted file mode 100644 index 04d0eb4..0000000 --- a/OSCAD/Examples/linear2/linear2.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:32:43 am ist - -* Printing option vprint1 -r4 5 2 0.1 -r1 4 0 0.2 -r2 2 4 0.1 -r3 3 0 0.2 -* h1 -i1 4 0 1 -Vh1 2 3 0 -h1 5 0 Vh1 2 - -.op -.print v(5) -.end diff --git a/OSCAD/Examples/linear2/linear2.cir.ckt.sol b/OSCAD/Examples/linear2/linear2.cir.ckt.sol deleted file mode 100644 index 924ce9b..0000000 --- a/OSCAD/Examples/linear2/linear2.cir.ckt.sol +++ /dev/null @@ -1,9 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -R 5 2 0.0000000000 0.0000000000 -R 4 0 0.0000000000 0.0000000000 -R 2 4 0.0000000000 0.0000000000 -R 3 0 0.0000000000 0.0000000000 -I 4 0 0.0000000000 0.0000000000 -V 2 3 0.0000000000 0.0000000000 -H 5 0 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/linear2/linear2.cir.out b/OSCAD/Examples/linear2/linear2.cir.out deleted file mode 100644 index e0328e7..0000000 --- a/OSCAD/Examples/linear2/linear2.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:32:43 am ist - -* Printing option vprint1 -r4 5 2 0.1 -r1 4 0 0.2 -r2 2 4 0.1 -r3 3 0 0.2 -* h1 -i1 4 0 1 -Vh1 2 3 0 -h1 5 0 Vh1 2 - -.op - -* Control Statements -.control -run -print v(5) -.endc -.end diff --git a/OSCAD/Examples/linear2/linear2.cmp b/OSCAD/Examples/linear2/linear2.cmp deleted file mode 100644 index 3d50822..0000000 --- a/OSCAD/Examples/linear2/linear2.cmp +++ /dev/null @@ -1,45 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Tuesday 02 October 2012 12:41:01 AM IST - -BeginCmp -TimeStamp = /5069E78C; -Reference = H1; -ValeurCmp = 2; -IdModule = bornier4; -EndCmp - -BeginCmp -TimeStamp = /5069E6DB; -Reference = I1; -ValeurCmp = DC; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /5069E7AC; -Reference = R1; -ValeurCmp = 0.2; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /5069E7A9; -Reference = R2; -ValeurCmp = 0.1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /5069E7A6; -Reference = R3; -ValeurCmp = 0.2; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /5069E7B0; -Reference = R4; -ValeurCmp = 0.1; -IdModule = R3; -EndCmp - -EndListe diff --git a/OSCAD/Examples/linear2/linear2.net b/OSCAD/Examples/linear2/linear2.net deleted file mode 100644 index 11706cb..0000000 --- a/OSCAD/Examples/linear2/linear2.net +++ /dev/null @@ -1,63 +0,0 @@ -# EESchema Netlist Version 1.1 created Tuesday 02 October 2012 12:41:01 AM IST -( - ( /5069E78C bornier4 H1 2 - ( 1 N-000005 ) - ( 2 GND ) - ( 3 /a ) - ( 4 /b ) - ) - ( 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350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000001" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000004" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000005" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 5 "N-000006" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 6 "VCC" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000001" -AddNet "N-000004" -AddNet "N-000005" -AddNet "N-000006" -AddNet "VCC" -$EndNCLASS -$MODULE R1 -Po 47000 39000 0 15 00200000 50653175 ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 50653175 -AR /505C9F25 -Op A A 0 -T0 -400 1000 550 500 0 80 N V 21 N "R1" -T1 -450 1000 550 500 0 80 N I 21 N "1000" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 5 "N-000006" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$MODULE R1 -Po 46000 43000 0 15 00200000 50653177 ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 50653177 -AR /50652FB6 -Op A A 0 -T0 -400 1000 550 500 0 80 N V 21 N "R2" -T1 -450 1000 550 500 0 80 N I 21 N "R" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$MODULE DIP-14__300_ELL -Po 52500 34000 0 15 00200000 50653178 ~~ -Li DIP-14__300_ELL -Cd 14 pins DIL package, elliptical pads -Kw DIL -Sc 50653178 -AR /505FDE5C -Op 0 0 0 -T0 -2000 -500 600 450 0 113 N V 21 N "U2" -T1 500 500 600 450 0 113 N V 21 N "74HC04" -DS -4000 -1000 4000 -1000 150 21 -DS 4000 1000 -4000 1000 150 21 -DS -4000 1000 -4000 -1000 150 21 -DS -4000 -500 -3500 -500 150 21 -DS -3500 -500 -3500 500 150 21 -DS -3500 500 -4000 500 150 21 -DS 4000 -1000 4000 1000 150 21 -$PAD -Sh "1" R 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000005" -Po -3000 1500 -$EndPAD -$PAD -Sh "2" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000004" -Po -2000 1500 -$EndPAD -$PAD -Sh "3" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po -1000 1500 -$EndPAD -$PAD -Sh "4" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 0 1500 -$EndPAD -$PAD -Sh "5" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 1000 1500 -$EndPAD -$PAD -Sh "6" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 2000 1500 -$EndPAD -$PAD -Sh "7" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 3000 1500 -$EndPAD -$PAD -Sh "8" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 3000 -1500 -$EndPAD -$PAD -Sh "9" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 2000 -1500 -$EndPAD -$PAD -Sh "10" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 1000 -1500 -$EndPAD -$PAD -Sh "11" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 0 -1500 -$EndPAD -$PAD -Sh "12" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po -1000 -1500 -$EndPAD -$PAD -Sh "13" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po -2000 -1500 -$EndPAD -$PAD -Sh "14" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 6 "VCC" -Po -3000 -1500 -$EndPAD -$SHAPE3D -Na "dil/dil_14.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE DIP-14__300_ELL -$MODULE 2PIN_6mm -Po 55000 50500 0 15 00200000 50653179 ~~ -Li 2PIN_6mm -Cd module 2 pin (trou 6 mm) -Kw DEV -Sc 50653179 -AR /505C9ECF -Op 0 0 0 -T0 0 500 600 600 0 120 N V 21 N "v1" -T1 0 -500 600 600 0 120 N V 21 N "PULSE" -DS -8500 -2500 8500 -2500 150 21 -DS 8500 -2500 8500 2500 150 21 -DS 8500 2500 -8500 2500 150 21 -DS -8500 2500 -8500 -2500 150 21 -$PAD -Sh "1" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 5 "N-000006" -Po -5900 0 -$EndPAD -$PAD -Sh "2" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 5900 0 -$EndPAD -$SHAPE3D -Na "device/douille_4mm(red).wrl" -Sc 1.800000 1.800000 1.800000 -Of -0.590000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$SHAPE3D -Na "device/douille_4mm(red).wrl" -Sc 1.800000 1.800000 1.800000 -Of 0.590000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE 2PIN_6mm -$MODULE 1pin -Po 50000 44000 0 15 00200000 5065317A ~~ -Li 1pin -Cd module 1 pin (ou trou mecanique de percage) -Kw DEV -Sc 5065317A -AR /505FD8A0 -Op 0 0 0 -T0 0 -1200 400 400 0 100 N V 21 N "U1" -T1 0 1100 400 400 0 100 N I 21 N "ADC" -DC 0 0 0 -900 150 21 -$PAD -Sh "1" C 1600 1600 0 0 0 -Dr 1200 0 0 -At STD N 00E0FFFF -Ne 5 "N-000006" -Po 0 0 -$EndPAD -$EndMODULE 1pin -$MODULE 1pin -Po 59500 43500 0 15 00200000 5065317C ~~ -Li 1pin -Cd module 1 pin (ou trou mecanique de percage) -Kw DEV -Sc 5065317C -AR /505FDC21 -Op 0 0 0 -T0 0 -1200 400 400 0 100 N V 21 N "U3" -T1 0 1100 400 400 0 100 N I 21 N "DAC" -DC 0 0 0 -900 150 21 -$PAD -Sh "1" C 1600 1600 0 0 0 -Dr 1200 0 0 -At STD N 00E0FFFF -Ne 3 "N-000004" -Po 0 0 -$EndPAD -$EndMODULE 1pin -$MODULE 1pin -Po 41500 45500 0 15 00200000 5065317E ~~ -Li 1pin -Cd module 1 pin (ou trou mecanique de percage) -Kw DEV -Sc 5065317E -AR /5061678B -Op 0 0 0 -T0 0 -1200 400 400 0 100 N V 21 N "U4" -T1 0 1100 400 400 0 100 N I 21 N "VPLOT1" -DC 0 0 0 -900 150 21 -$PAD -Sh "1" C 1600 1600 0 0 0 -Dr 1200 0 0 -At STD N 00E0FFFF -Ne 5 "N-000006" -Po 0 0 -$EndPAD -$EndMODULE 1pin -$TRACK -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/mixMode/mixMode.cir b/OSCAD/Examples/mixMode/mixMode.cir deleted file mode 100644 index 3db9950..0000000 --- a/OSCAD/Examples/mixMode/mixMode.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:41:09 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 3 4 VPLOT8_1 -R2 4 0 1000 -U2 3 4 0 2 74HC04 -R1 3 0 1000 -v1 3 0 PULSE - -.end diff --git a/OSCAD/Examples/mixMode/mixMode.cir.ckt b/OSCAD/Examples/mixMode/mixMode.cir.ckt deleted file mode 100644 index 590cf66..0000000 --- a/OSCAD/Examples/mixMode/mixMode.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:41:09 am ist - -* Plotting option vplot8_1 -r2 4 0 1000 -* 74hc04 -r1 3 0 1000 -v1 3 0 pulse(0 5 0 1e-8 1e-8 0.25e-6 0.5e-6) -a1 [3] [3_in] u2adc -a2 3_in 4_out u2 -a3 [4_out] [4] u2dac -.model u2 d_inverter -.model u2adc adc_bridge(in_low=0.8 in_high=2.0) -.model u2dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 -.plot v(3) v(4) -.end diff --git a/OSCAD/Examples/mixMode/mixMode.cir.out b/OSCAD/Examples/mixMode/mixMode.cir.out deleted file mode 100644 index 27f8a8c..0000000 --- a/OSCAD/Examples/mixMode/mixMode.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:41:09 am ist - -* Plotting option vplot8_1 -r2 4 0 1000 -* 74hc04 -r1 3 0 1000 -v1 3 0 pulse(0 5 0 1e-8 1e-8 0.25e-6 0.5e-6) -a1 [3] [3_in] u2adc -a2 3_in 4_out u2 -a3 [4_out] [4] u2dac -.model u2 d_inverter -.model u2adc adc_bridge(in_low=0.8 in_high=2.0) -.model u2dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 - -* Control Statements -.control -run -plot v(3) v(4) -.endc -.end diff --git a/OSCAD/Examples/mixMode/mixMode.cmp b/OSCAD/Examples/mixMode/mixMode.cmp deleted file mode 100644 index 8a56a56..0000000 --- a/OSCAD/Examples/mixMode/mixMode.cmp +++ /dev/null @@ -1,52 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Friday 28 September 2012 10:41:02 AM IST - -BeginCmp -TimeStamp = /505C9F25; -Reference = R1; -ValeurCmp = 1000; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /50652FB6; -Reference = R2; -ValeurCmp = R; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /505FD8A0; -Reference = U1; -ValeurCmp = ADC; -IdModule = 1pin; -EndCmp - -BeginCmp -TimeStamp = /505FDE5C; -Reference = U2; -ValeurCmp = 74HC04; -IdModule = DIP-14__300_ELL; -EndCmp - -BeginCmp -TimeStamp = /505FDC21; -Reference = U3; -ValeurCmp = DAC; -IdModule = 1pin; -EndCmp - -BeginCmp -TimeStamp = /5061678B; -Reference = U4; -ValeurCmp = VPLOT1; -IdModule = 1pin; -EndCmp - -BeginCmp -TimeStamp = /505C9ECF; -Reference = v1; -ValeurCmp = PULSE; -IdModule = 2PIN_6mm; -EndCmp - -EndListe diff --git a/OSCAD/Examples/mixMode/mixMode.net b/OSCAD/Examples/mixMode/mixMode.net deleted file mode 100644 index 0175d5c..0000000 --- a/OSCAD/Examples/mixMode/mixMode.net +++ /dev/null @@ -1,77 +0,0 @@ -# EESchema Netlist Version 1.1 created Friday 28 September 2012 12:26:55 PM IST -( - ( /50653344 $noname U5 VPLOT1 {Lib=VPLOT1} - ( 1 N-000005 ) - ) - ( /50652FB6 $noname R2 1000 {Lib=R} - ( 1 N-000005 ) - ( 2 GND ) - ) - ( /5061678B $noname U4 VPLOT1 {Lib=VPLOT1} - ( 1 N-000001 ) - ) - ( /505FDE5C $noname U2 74HC04 {Lib=74HC04} - ( 1 N-000006 ) - ( 2 N-000004 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /505FDC21 $noname U3 DAC {Lib=DAC} - ( 1 N-000004 ) - ( 2 N-000005 ) - ) - ( /505FD8A0 $noname U1 ADC {Lib=ADC} - ( 1 N-000001 ) - ( 2 N-000006 ) - ) - ( /505C9F25 $noname R1 1000 {Lib=R} - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /505C9ECF $noname v1 PULSE {Lib=PULSE} - ( 1 N-000001 ) - ( 2 GND ) - ) -) -* -{ Allowed footprints by component: -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component v1 - 1_pin -$endlist -$endfootprintlist -} -{ Pin List by Nets -Net 1 "" "" - U1 1 - v1 1 - R1 1 - U4 1 -Net 2 "GND" "GND" - v1 2 - R2 2 - R1 2 - U2 7 -Net 4 "" "" - U2 2 - U3 1 -Net 5 "" "" - U3 2 - U5 1 - R2 1 -Net 6 "" "" - U1 2 - U2 1 -} -#End diff --git a/OSCAD/Examples/mixMode/mixMode.pro b/OSCAD/Examples/mixMode/mixMode.pro deleted file mode 100644 index 353cc12..0000000 --- a/OSCAD/Examples/mixMode/mixMode.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Tuesday 30 October 2012 11:12:31 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/mixMode/mixMode.proj b/OSCAD/Examples/mixMode/mixMode.proj deleted file mode 100644 index 465ba2d..0000000 --- a/OSCAD/Examples/mixMode/mixMode.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile mixMode.sch diff --git a/OSCAD/Examples/mixMode/mixMode.sch b/OSCAD/Examples/mixMode/mixMode.sch deleted file mode 100644 index 493dc4e..0000000 --- a/OSCAD/Examples/mixMode/mixMode.sch +++ /dev/null @@ -1,165 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:41:04 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:mixMode-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L VPLOT8_1 U1 -U 2 1 50CEB729 -P 7150 2900 -F 0 "U1" H 7000 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 7300 3000 50 0000 C CNN - 2 7150 2900 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CEB722 -P 5600 2950 -F 0 "U1" H 5450 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 5750 3050 50 0000 C CNN - 1 5600 2950 - 1 0 0 -1 -$EndComp -Connection ~ 5750 4400 -Wire Wire Line - 5750 4400 5750 4300 -Connection ~ 7150 3350 -Wire Wire Line - 7150 3350 7150 3200 -Wire Wire Line - 5950 3350 4800 3350 -Wire Wire Line - 7350 4000 7350 4400 -Wire Wire Line - 7350 4400 4800 4400 -Connection ~ 5600 3350 -Wire Wire Line - 5600 3250 5600 3350 -Wire Wire Line - 5350 3350 5350 3650 -Wire Wire Line - 4800 4550 4800 4250 -Connection ~ 4800 4400 -Connection ~ 5350 3350 -Wire Wire Line - 6850 3350 7350 3350 -Wire Wire Line - 7350 3350 7350 3500 -Wire Wire Line - 6350 3000 6350 3250 -Wire Wire Line - 5350 4400 5350 4150 -Connection ~ 5350 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 50653022 -P 6350 3000 -F 0 "#FLG01" H 6350 3270 30 0001 C CNN -F 1 "PWR_FLAG" H 6350 3230 30 0000 C CNN - 1 6350 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50652FB6 -P 7350 3750 -F 0 "R2" V 7430 3750 50 0000 C CNN -F 1 "1000" V 7350 3750 50 0000 C CNN - 1 7350 3750 - 1 0 0 -1 -$EndComp -$Comp -L 74HC04 U2 -U 1 1 505FDE5C -P 6400 3350 -F 0 "U2" H 6550 3450 40 0000 C CNN -F 1 "74HC04" H 6600 3250 40 0000 C CNN - 1 6400 3350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 505CA177 -P 5750 4300 -F 0 "#FLG02" H 5750 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 4530 30 0000 C CNN - 1 5750 4300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 505C9F25 -P 5350 3900 -F 0 "R1" V 5430 3900 50 0000 C CNN -F 1 "1000" V 5350 3900 50 0000 C CNN - 1 5350 3900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 505C9EE8 -P 4800 4550 -F 0 "#PWR03" H 4800 4550 30 0001 C CNN -F 1 "GND" H 4800 4480 30 0001 C CNN - 1 4800 4550 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 505C9ECF -P 4800 3800 -F 0 "v1" H 4600 3900 60 0000 C CNN -F 1 "PULSE" H 4600 3750 60 0000 C CNN - 1 4800 3800 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/modifiedNodalExample/$savepcb.brd b/OSCAD/Examples/modifiedNodalExample/$savepcb.brd deleted file mode 100644 index d688470..0000000 --- a/OSCAD/Examples/modifiedNodalExample/$savepcb.brd +++ /dev/null @@ -1,366 +0,0 @@ -PCBNEW-BOARD Version 1 date Monday 01 October 2012 11:13:48 AM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 8 -NoConn 2 -Di 48625 31085 56375 36121 -Ndraw 0 -Ntrack 20 -Nzone 0 -BoardThickness 630 -Nmodule 6 -Nnets 5 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "1 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 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(Spice format) creation date: Monday 17 December 2012 11:47:07 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 4 VPRINT1 -R3 2 4 1 -R4 2 3 1 -R1 4 3 1 -R2 4 0 1 -v2 2 0 10 -v1 3 0 5 - -.end diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt deleted file mode 100644 index 3a980a1..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:47:07 am ist - -* Printing option vprint1 -r3 2 4 1 -r4 2 3 1 -r1 4 3 1 -r2 4 0 1 -v2 2 0 10 -v1 3 0 5 - -.op -.print v(4) -.end diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt.sol b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt.sol deleted file mode 100644 index 9332aad..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt.sol +++ /dev/null @@ -1,8 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -R 2 4 0.0000000000 0.0000000000 -R 2 3 0.0000000000 0.0000000000 -R 4 3 0.0000000000 0.0000000000 -R 4 0 0.0000000000 0.0000000000 -V 2 0 0.0000000000 0.0000000000 -V 3 0 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.out b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.out deleted file mode 100644 index 8ee50f6..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:47:07 am ist - -* Printing option vprint1 -r3 2 4 1 -r4 2 3 1 -r1 4 3 1 -r2 4 0 1 -v2 2 0 10 -v1 3 0 5 - -.op - -* Control Statements -.control -run -print v(4) -.endc -.end diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cmp b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cmp deleted file mode 100644 index 8d4d327..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cmp +++ /dev/null @@ -1,45 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Monday 01 October 2012 11:03:36 AM IST - -BeginCmp -TimeStamp = /50692613; -Reference = R1; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /5067FEAC; -Reference = R2; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /50692628; -Reference = R3; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /5069261E; -Reference = R4; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /5067FE8A; -Reference = v1; -ValeurCmp = DC; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /5067FE8E; -Reference = v2; -ValeurCmp = DC; -IdModule = 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38000 38500 80 -1 -De 0 0 4 0 800000 -Po 0 41500 39000 38500 39000 80 -1 -De 0 0 4 0 0 -Po 0 38000 36500 37500 37000 80 -1 -De 0 0 4 0 400000 -Po 0 37500 38000 38000 38500 80 -1 -De 0 0 4 0 800000 -Po 0 37500 37000 37500 38000 80 -1 -De 0 0 4 0 0 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/nodalExample/nodalExample.bak b/OSCAD/Examples/nodalExample/nodalExample.bak deleted file mode 100644 index 60ad6aa..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.bak +++ /dev/null @@ -1,184 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:49:30 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:nodalExample-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6100 2850 6100 3250 -Connection ~ 5600 4000 -Wire Wire Line - 5600 3900 5600 4000 -Connection ~ 6100 4000 -Wire Wire Line - 6100 3750 6100 4000 -Wire Wire Line - 7850 3900 7850 4000 -Wire Wire Line - 7850 4000 4700 4000 -Wire Wire Line - 4700 4000 4700 3950 -Connection ~ 5250 3000 -Wire Wire Line - 5250 3300 5250 3000 -Wire Wire Line - 5850 3000 6350 3000 -Wire Wire Line - 4700 3050 4700 3000 -Wire Wire Line - 4700 3000 5350 3000 -Wire Wire Line - 6850 3000 7850 3000 -Wire Wire Line - 7100 3200 7100 3000 -Connection ~ 7100 3000 -Connection ~ 6100 3000 -Wire Wire Line - 7100 3700 7100 4000 -Connection ~ 7100 4000 -Wire Wire Line - 5250 3800 5250 4000 -Connection ~ 5250 4000 -Wire Wire Line - 5450 4100 5450 4000 -Connection ~ 5450 4000 -$Comp -L VPRINT1 U1 -U 1 1 506489B3 -P 6100 2550 -F 0 "U1" H 5950 2650 50 0000 C CNN -F 1 "VPRINT1" H 6250 2650 50 0000 C CNN - 1 6100 2550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 50641423 -P 5450 4100 -F 0 "#PWR01" H 5450 4100 30 0001 C CNN -F 1 "GND" H 5450 4030 30 0001 C CNN - 1 5450 4100 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 506413F9 -P 5600 3900 -F 0 "#FLG02" H 5600 4170 30 0001 C CNN -F 1 "PWR_FLAG" H 5600 4130 30 0000 C CNN - 1 5600 3900 - 1 0 0 -1 -$EndComp -$Comp -L DC i2 -U 1 1 50641279 -P 7850 3450 -F 0 "i2" H 7650 3550 60 0000 C CNN -F 1 "1" H 7650 3400 60 0000 C CNN -F 2 "R3" H 7550 3450 60 0000 C CNN - 1 7850 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 50641261 -P 7100 3450 -F 0 "R5" V 7180 3450 50 0000 C CNN -F 1 "1" V 7100 3450 50 0000 C CNN - 1 7100 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50640DC3 -P 5600 3000 -F 0 "R2" V 5680 3000 50 0000 C CNN -F 1 "1" V 5600 3000 50 0000 C CNN - 1 5600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 50640DAA -P 6600 3000 -F 0 "R4" V 6680 3000 50 0000 C CNN -F 1 "2" V 6600 3000 50 0000 C CNN - 1 6600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 50640DA8 -P 6100 3500 -F 0 "R3" V 6180 3500 50 0000 C CNN -F 1 "1" V 6100 3500 50 0000 C CNN - 1 6100 3500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50640DA0 -P 5250 3550 -F 0 "R1" V 5330 3550 50 0000 C CNN -F 1 "1" V 5250 3550 50 0000 C CNN - 1 5250 3550 - 1 0 0 -1 -$EndComp -$Comp -L DC i1 -U 1 1 5063F506 -P 4700 3500 -F 0 "i1" H 4500 3600 60 0000 C CNN -F 1 "1" H 4500 3450 60 0000 C CNN -F 2 "R3" H 4400 3500 60 0000 C CNN - 1 4700 3500 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/nodalExample/nodalExample.brd b/OSCAD/Examples/nodalExample/nodalExample.brd deleted file mode 100644 index 375772b..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.brd +++ /dev/null @@ -1,423 +0,0 @@ -PCBNEW-BOARD Version 1 date Sunday 30 September 2012 12:21:31 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 10 -NoConn 0 -Di 36959 32379 45541 37621 -Ndraw 0 -Ntrack 29 -Nzone 0 -BoardThickness 630 -Nmodule 7 -Nnets 5 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "30 sep 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000001" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000001" -AddNet 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800000 -Po 0 40000 34000 41000 34000 80 -1 -De 0 0 2 0 400000 -Po 0 41000 34000 42000 33000 80 -1 -De 0 0 2 0 800000 -Po 0 40500 35500 41000 35000 80 -1 -De 0 0 3 0 400000 -Po 0 41000 35000 42000 35000 80 -1 -De 0 0 3 0 800000 -Po 0 42000 37000 41500 36500 80 -1 -De 0 0 3 0 400000 -Po 0 41500 35500 42000 35000 80 -1 -De 0 0 3 0 800000 -Po 0 41500 36500 41500 35500 80 -1 -De 0 0 3 0 0 -Po 0 37500 35500 37000 35000 80 -1 -De 0 0 4 0 400000 -Po 0 37500 34000 38000 34000 80 -1 -De 0 0 4 0 800000 -Po 0 37000 34500 37500 34000 80 -1 -De 0 0 4 0 0 -Po 0 37000 35000 37000 34500 80 -1 -De 0 0 4 0 0 -Po 0 37500 37000 37000 36500 80 -1 -De 0 0 4 0 400000 -Po 0 37000 36000 37500 35500 80 -1 -De 0 0 4 0 800000 -Po 0 37000 36500 37000 36000 80 -1 -De 0 0 4 0 0 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/nodalExample/nodalExample.cir b/OSCAD/Examples/nodalExample/nodalExample.cir deleted file mode 100644 index 73cd5c1..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:49:47 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 4 VPRINT1 -i2 1 0 1 -R5 1 0 1 -R2 4 3 1 -R4 1 4 2 -R3 4 0 1 -R1 3 0 1 -i1 3 0 1 - -.end diff --git a/OSCAD/Examples/nodalExample/nodalExample.cir.ckt b/OSCAD/Examples/nodalExample/nodalExample.cir.ckt deleted file mode 100644 index 84ba089..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.cir.ckt +++ /dev/null @@ -1,14 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:49:47 am ist - -* Printing option vprint1 -i2 1 0 1 -r5 1 0 1 -r2 4 3 1 -r4 1 4 2 -r3 4 0 1 -r1 3 0 1 -i1 3 0 1 - -.op -.print v(4) -.end diff --git a/OSCAD/Examples/nodalExample/nodalExample.cir.ckt.sol b/OSCAD/Examples/nodalExample/nodalExample.cir.ckt.sol deleted file mode 100644 index 5c5bae8..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.cir.ckt.sol +++ /dev/null @@ -1,9 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -I 1 0 0.0000000000 0.0000000000 -R 1 0 0.0000000000 0.0000000000 -R 4 3 0.0000000000 0.0000000000 -R 1 4 0.0000000000 0.0000000000 -R 4 0 0.0000000000 0.0000000000 -R 3 0 0.0000000000 0.0000000000 -I 3 0 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/nodalExample/nodalExample.cir.out b/OSCAD/Examples/nodalExample/nodalExample.cir.out deleted file mode 100644 index c1fe81b..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.cir.out +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:49:47 am ist - -* Printing option vprint1 -i2 1 0 1 -r5 1 0 1 -r2 4 3 1 -r4 1 4 2 -r3 4 0 1 -r1 3 0 1 -i1 3 0 1 - -.op - -* Control Statements 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-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -R4 1 4 1000 -U1 4 3 VPLOT8_1 -X1 5 1 3 UA741 -v1 4 0 SINE -R3 3 0 10000 -R1 5 0 1000 -R2 3 5 2000 - -.end diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.ckt b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.ckt deleted file mode 100644 index 1aac163..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.ckt +++ /dev/null @@ -1,14 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:47:55 am ist -.include ua741.sub - -r4 1 4 1000 -* Plotting option vplot8_1 -x1 5 1 3 ua741 -v1 4 0 sine(0 5 50 0 0) -r3 3 0 10000 -r1 5 0 1000 -r2 3 5 2000 - -.tran 100e-06 40e-03 0e-00 -.plot v(4) v(3) -.end diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.out b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.out deleted file mode 100644 index 6417831..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.out +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:47:55 am ist -.include ua741.sub - -r4 1 4 1000 -* Plotting option vplot8_1 -x1 5 1 3 ua741 -v1 4 0 sine(0 5 50 0 0) -r3 3 0 10000 -r1 5 0 1000 -r2 3 5 2000 - -.tran 100e-06 40e-03 0e-00 - -* Control Statements -.control -run -plot v(4) v(3) -.endc -.end diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cmp b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cmp deleted file mode 100644 index c3e04af..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cmp +++ /dev/null @@ -1,38 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Saturday 20 October 2012 11:59:17 AM IST - -BeginCmp -TimeStamp = /50824062; -Reference = R1; -ValeurCmp = 1000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824045; -Reference = R2; -ValeurCmp = 2000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824073; -Reference = R3; -ValeurCmp = 10000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824091; -Reference = v1; -ValeurCmp = SINE; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /50823E96; -Reference = X1; -ValeurCmp = LM741; -IdModule = DIP-8__300; -EndCmp - -EndListe diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.net b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.net deleted file mode 100644 index 938591e..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.net +++ /dev/null @@ -1,70 +0,0 @@ -# EESchema Netlist Version 1.1 created Saturday 20 October 2012 12:03:26 PM IST -( - ( /50824595 $noname X1 UA741 {Lib=UA741} - ( 2 N-000004 ) - ( 3 GND ) - ( 6 N-000001 ) - ) - ( /50824091 R1 v1 SINE {Lib=SINE} - ( 1 N-000002 ) - ( 2 GND ) - ) - ( /50824073 $noname R3 10000 {Lib=R} - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /50824062 $noname R1 1000 {Lib=R} - ( 1 N-000004 ) - ( 2 N-000002 ) - ) - ( /50824045 $noname R2 2000 {Lib=R} - ( 1 N-000001 ) - ( 2 N-000004 ) - ) -) -* -{ Allowed footprints by component: -$component X1 - DIP-8__300 -$endlist -$component v1 - 1_pin -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R2 - 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-u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/nonInvertingAmplifier/ua741.pro b/OSCAD/Examples/nonInvertingAmplifier/ua741.pro deleted file mode 100644 index 9aa118e..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/ua741.pro +++ /dev/null @@ -1,72 +0,0 @@ -update=Monday 17 December 2012 06:14:06 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice diff --git a/OSCAD/Examples/nonInvertingAmplifier/ua741.sch b/OSCAD/Examples/nonInvertingAmplifier/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 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-.ends ua741 \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/analysis b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/analysis deleted file mode 100644 index ea22c29..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 1e-00 3e-00 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.bak b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.bak deleted file mode 100644 index c0bd60e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.bak +++ /dev/null @@ -1,145 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 07 May 2013 12:28:25 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 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-.end diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.ckt deleted file mode 100644 index 903850c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 02:05:33 pm ist - -v3 0 5 23 -V_u1 6 4 0 -* Plotting option vplot8_1 -v1 2 0 sine( 17.9 1000 ) -v2 1 0 23 -r1 4 0 8 -q2 5 2 6 pnp -q1 1 2 6 npn - -.tran 1e-00 3e-00 0e-00 -.plot i(V_u1) -.plot v(2) v(6) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.out b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.out deleted file mode 100644 index 061ce43..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 02:05:33 pm ist - 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R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.bak deleted file mode 100644 index 3314c60..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.bak +++ /dev/null @@ -1,133 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 14 May 2013 11:21:47 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:example_2.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "14 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5750 5050 -Wire Wire Line - 5550 3150 5650 3150 -Wire Wire Line - 5050 4550 5050 5050 -Wire Wire Line - 6500 4900 6500 5050 -Wire Wire Line - 6050 3150 6500 3150 -Wire Wire Line - 5750 5050 5750 5800 -Connection ~ 5750 5550 -Connection ~ 6500 3150 -Wire Wire Line - 6500 3150 6500 3350 -Wire Wire Line - 6500 3850 6500 4000 -Wire Wire Line - 5050 3150 5050 3650 -Wire Wire Line - 6500 5050 5050 5050 -$Comp -L DC v2 -U 1 1 516BA020 -P 6500 4450 -F 0 "v2" H 6300 4550 60 0000 C CNN -F 1 "DC" H 6300 4400 60 0000 C CNN -F 2 "R1" H 6200 4450 60 0000 C CNN - 1 6500 4450 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5167CC3A -P 5750 5550 -F 0 "#FLG01" H 5750 5645 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 5730 30 0000 C CNN - 1 5750 5550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5167CC15 -P 5750 5800 -F 0 "#PWR02" H 5750 5800 30 0001 C CNN -F 1 "GND" H 5750 5730 30 0001 C CNN - 1 5750 5800 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 5166A34A -P 6500 3600 -F 0 "U1" H 6350 3700 50 0000 C CNN -F 1 "IPLOT" H 6650 3700 50 0000 C CNN - 1 6500 3600 - 0 1 1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 5166A210 -P 5850 3150 -F 0 "D1" H 5850 3250 40 0000 C CNN -F 1 "DIODE" H 5850 3050 40 0000 C CNN - 1 5850 3150 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166A1EB -P 5300 3150 -F 0 "R1" V 5380 3150 50 0000 C CNN -F 1 "100" V 5300 3150 50 0000 C CNN - 1 5300 3150 - 0 -1 -1 0 -$EndComp -$Comp -L SINE v1 -U 1 1 5166A1AC -P 5050 4100 -F 0 "v1" H 4850 4200 60 0000 C CNN -F 1 "SINE" H 4850 4050 60 0000 C CNN -F 2 "R1" H 4750 4100 60 0000 C CNN - 1 5050 4100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.brd b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.brd deleted file mode 100644 index bf4bd89..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.brd +++ /dev/null @@ -1,172 +0,0 @@ -PCBNEW-BOARD Version 1 date Friday 12 April 2013 02:43:29 PM IST - -# Created by Pcbnew(2012-apr-16-27)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 0 -NoConn 0 -Di 40424 25540 76751 39450 -Ndraw 0 -Ntrack 0 -Nzone 0 -BoardThickness 630 -Nmodule 2 -Nnets 4 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "12 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000018" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000019" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000018" -AddNet "N-000019" -$EndNCLASS -$MODULE 1pin -Po 41500 38000 0 15 00200000 5167CFD9 ~~ -Li 1pin -Cd module 1 pin (ou trou mecanique de percage) -Kw DEV -Sc 5167CFD9 -AR 1pin -Op 0 0 0 -T0 0 -1200 400 400 0 100 N V 21 N "1PIN" -T1 0 1100 400 400 0 100 N I 21 N "P***" -DC 0 0 0 -900 150 21 -$PAD -Sh "1" C 1600 1600 0 0 0 -Dr 1200 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 0 0 -$EndPAD -$EndMODULE 1pin -$MODULE 3PIN_6mm -Po 68000 29000 0 15 00200000 5167CFEC ~~ -Li 3PIN_6mm -Cd module 2 pin (trou 6 mm) -Kw DEV -Sc 5167CFEC -AR -Op 0 0 0 -T0 4000 -3000 600 600 0 120 N V 21 N "K1" -T1 -3000 -3000 600 600 0 120 N V 21 N "CONN_3" -DS -8500 -2500 8500 -2500 150 21 -DS 8500 -2500 8500 2500 150 21 -DS 8500 2500 -8500 2500 150 21 -DS -8500 2500 -8500 -2500 150 21 -$PAD -Sh "1" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 2 "N-000018" -Po -5900 0 -$EndPAD -$PAD -Sh "3" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 3 "N-000019" -Po 5900 0 -$EndPAD -$PAD -Sh "2" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 0 0 -$EndPAD -$SHAPE3D -Na "device/douille_4mm(black).wrl" -Sc 1.800000 1.800000 1.800000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$SHAPE3D -Na "device/douille_4mm(red).wrl" -Sc 1.800000 1.800000 1.800000 -Of -0.590000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$SHAPE3D -Na "device/douille_4mm(green).wrl" -Sc 1.800000 1.800000 1.800000 -Of 0.590000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE 3PIN_6mm -$TRACK -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir deleted file mode 100644 index 16861f7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 12:08:03 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v2 1 0 DC -U1 3 1 IPLOT -D1 5 3 DIODE -R1 2 5 100 -v1 2 0 SINE - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.ckt deleted file mode 100644 index 6d02b34..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.ckt +++ /dev/null @@ -1,11 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 12:08:03 pm ist - -v2 1 0 dc 12 -V_u1 3 1 0 -d1 5 3 diode -r1 2 5 100 -v1 2 0 sine(0 24 50 0 0) - -.tran 10e-03 1e-01 0e-00 -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.out deleted file mode 100644 index 52cc067..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.out +++ /dev/null @@ -1,16 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 12:08:03 pm ist - -v2 1 0 dc 12 -V_u1 3 1 0 -d1 5 3 diode -r1 2 5 100 -v1 2 0 sine(0 24 50 0 0) - -.tran 10e-03 1e-01 0e-00 - -* Control Statements -.control -run -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cmp b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cmp deleted file mode 100644 index 779ff51..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cmp +++ /dev/null @@ -1,38 +0,0 @@ -Cmp-Mod V01 Created by CvPcb (2012-apr-16-27)-stable date = Friday 12 April 2013 02:41:23 PM IST - -BeginCmp -TimeStamp = /5166A210; -Reference = D1; -ValeurCmp = DIODE; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /5166A1EB; -Reference = R1; -ValeurCmp = 100; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /5166A34A; -Reference = U1; -ValeurCmp = IPLOT; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /5166A1AC; -Reference = v1; -ValeurCmp = SINE; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /5166A26E; -Reference = v2; -ValeurCmp = 12V; -IdModule = R1; -EndCmp - -EndListe diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.net b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.net deleted file mode 100644 index eeea8db..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.net +++ /dev/null @@ -1,44 +0,0 @@ -# EESchema Netlist Version 1.1 created Friday 12 April 2013 02:41:23 PM IST -( - ( /5166A210 $noname$ D1 DIODE - ( 1 N-000002 ) - ( 2 N-000004 ) - ) - ( /5166A1EB $noname$ R1 100 - ( 1 N-000001 ) - ( 2 N-000002 ) - ) - ( /5166A34A $noname$ U1 IPLOT - ( 1 N-000004 ) - ( 2 N-000003 ) - ) - ( /5166A1AC R1 v1 SINE - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /5166A26E R1 v2 12V - ( 1 N-000003 ) - ( 2 GND ) - ) -) -* -{ Allowed footprints by component: -$component D1 - D? - S* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* - SM1206 -$endlist -$component v1 - 1_pin -$endlist -$component v2 - 1_pin -$endlist -$endfootprintlist -} diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.pro b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.pro deleted file mode 100644 index f5826c2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Thursday 11 April 2013 05:12:20 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.proj deleted file mode 100644 index 3cb5076..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.1.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.sch deleted file mode 100644 index dfa5e1d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.sch +++ /dev/null @@ -1,133 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 14 May 2013 11:52:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:example_2.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "14 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5750 5050 -Wire Wire Line - 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1 4150 4400 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D1 -U 1 1 5167D869 -P 4150 5550 -F 0 "D1" H 4150 5650 40 0000 C CNN -F 1 "DIODE" H 4150 5450 40 0000 C CNN - 1 4150 5550 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/analysis b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/analysis deleted file mode 100644 index f481193..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 50e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/diode.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/diode.lib deleted file mode 100644 index f4b7c8a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/diode.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model diode D( Vj=.65 Nbvl=14.976 Cjo=175p Rs=.20 Isr=1.859n -+ Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u -+ Bv=8.1 Fc=.5 Ikf=0 Nr=2 Ibv=20.245m -+ Is=880.5E-18 Xti=3 Ibvl=1.9556m ) \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.bak deleted file mode 100644 index f7ad596..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.bak +++ /dev/null @@ -1,105 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 12 April 2013 03:08:39 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 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0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 5166A8EF -P 4900 2850 -F 0 "R1" V 4980 2850 50 0000 C CNN -F 1 "1000" V 4900 2850 50 0000 C CNN - 1 4900 2850 - 0 -1 -1 0 -$EndComp -$Comp -L DC v1 -U 1 1 5166A8CD -P 4200 3650 -F 0 "v1" H 4000 3750 60 0000 C CNN -F 1 "5V" H 4000 3600 60 0000 C CNN -F 2 "R1" H 3900 3650 60 0000 C CNN - 1 4200 3650 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir deleted file mode 100644 index 3731a3e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 12:59:00 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 2 VPLOT8_1 -U2 3 0 IPLOT -D1 2 3 DIODE -R1 1 2 1000 -v1 1 0 5V - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.ckt deleted file mode 100644 index 43a6aa9..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:59:00 pm ist -.include diode.lib - -* Plotting option vplot8_1 -V_u2 3 0 0 -d1 2 3 diode -r1 1 2 1000 -v1 1 0 5v - -.dc v1 0e-00 5e-00 50e-03 -.plot v(2) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.out deleted file mode 100644 index 3ce4892..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:59:00 pm ist -.include diode.lib - -* Plotting option vplot8_1 -V_u2 3 0 0 -d1 2 3 diode -r1 1 2 1000 -v1 1 0 5v - -.dc v1 0e-00 5e-00 50e-03 - -* Control Statements -.control -run -plot v(2) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.pro b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.pro deleted file mode 100644 index 9718ce6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 13 May 2013 12:58:14 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.proj deleted file mode 100644 index eb6337b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.4.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.sch deleted file mode 100644 index 7aac593..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.sch +++ /dev/null @@ -1,139 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 12:59:04 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PWR_FLAG #FLG01 -U 1 1 51909635 -P 5200 4200 -F 0 "#FLG01" H 5200 4470 30 0001 C CNN -F 1 "PWR_FLAG" H 5200 4430 30 0000 C CNN - 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0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 5166A8EF -P 4900 2850 -F 0 "R1" V 4980 2850 50 0000 C CNN -F 1 "1000" V 4900 2850 50 0000 C CNN - 1 4900 2850 - 0 -1 -1 0 -$EndComp -$Comp -L DC v1 -U 1 1 5166A8CD -P 4200 3650 -F 0 "v1" H 4000 3750 60 0000 C CNN -F 1 "5V" H 4000 3600 60 0000 C CNN -F 2 "R1" H 3900 3650 60 0000 C CNN - 1 4200 3650 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/analysis b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/analysis deleted file mode 100644 index 0a70a74..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 1e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/diode.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/diode.lib deleted file mode 100644 index d5c42a7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/diode.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model diode D( Is=880.5E-18 Nbvl=14.976 Cjo=175p Rs=20 Isr=1.859n -+ Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u -+ Bv=8.1 Fc=.5 Ikf=0 Xti=3 Nr=2 -+ Vj=.65 Ibv=20.245m Ibvl=1.9556m ) \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.bak deleted file mode 100644 index 4dd86fe..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.bak +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 02:41:15 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 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-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 1 0 DC -U1 5 VPLOT8_1 -U2 4 0 IPLOT -R2 3 2 20m -v2 2 4 65m -R1 1 5 1000 -D1 5 3 DIODE - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.ckt deleted file mode 100644 index eb19daf..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 14 may 2013 02:41:09 pm ist -.include diode.lib - -v1 1 0 dc 5 -* Plotting option vplot8_1 -V_u2 4 0 0 -r2 3 2 20m -v2 2 4 65m -r1 1 5 1000 -d1 5 3 diode - -.dc v1 0e-00 5e-00 1e-00 -.plot v(5) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.out deleted file mode 100644 index a3bbe2c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 14 may 2013 02:41:09 pm ist -.include diode.lib - -v1 1 0 dc 5 -* Plotting option vplot8_1 -V_u2 4 0 0 -r2 3 2 20m -v2 2 4 65m -r1 1 5 1000 -d1 5 3 diode - -.dc v1 0e-00 5e-00 1e-00 - -* Control Statements -.control -run -plot v(5) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.pro b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.pro deleted file mode 100644 index 8e9a0fd..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 13 May 2013 01:04:04 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.proj deleted file mode 100644 index 1148c23..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.5.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.sch deleted file mode 100644 index ff9da18..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.sch +++ /dev/null @@ -1,168 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 21 May 2013 11:07:18 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.5-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "21 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 6650 2050 0 90 Italic 18 -Vd -Text Notes 6450 3850 0 90 Italic 18 -Id -$Comp -L DC v1 -U 1 1 5191FF90 -P 5000 3850 -F 0 "v1" H 4800 3950 60 0000 C CNN -F 1 "DC" H 4800 3800 60 0000 C CNN -F 2 "R1" H 4700 3850 60 0000 C CNN - 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-* Control Statements -.control -run -plot -v(1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.proj deleted file mode 100644 index e0d6a2f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.8.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.sch deleted file mode 100644 index ddb3704..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.sch +++ /dev/null @@ -1,123 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 03:25:17 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:example_2.8-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 7200 2400 -Connection ~ 7200 1800 -Wire Wire Line - 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5750 5350 5750 5950 -Connection ~ 4300 4400 -Connection ~ 5750 4100 -Wire Wire Line - 4300 4500 4300 4400 -Wire Wire Line - 4300 4400 5450 4400 -Connection ~ 4750 4400 -Wire Wire Line - 4750 4600 4750 4050 -Wire Wire Line - 4750 3150 4750 2750 -Wire Wire Line - 4750 2750 5750 2750 -Wire Wire Line - 5750 4600 5750 4850 -Wire Wire Line - 4750 5500 4750 5950 -Wire Wire Line - 4750 5950 5750 5950 -Wire Wire Line - 5750 4200 5750 3250 -$Comp -L DC v1 -U 1 1 517A27AF -P 4750 3600 -F 0 "v1" H 4550 3700 60 0000 C CNN -F 1 "DC" H 4550 3550 60 0000 C CNN -F 2 "R1" H 4450 3600 60 0000 C CNN - 1 4750 3600 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 517A278C -P 4750 5050 -F 0 "v2" H 4550 5150 60 0000 C CNN -F 1 "DC" H 4550 5000 60 0000 C CNN -F 2 "R1" H 4450 5050 60 0000 C CNN - 1 4750 5050 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5178C864 -P 6050 4100 -F 0 "U1" H 5900 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 6200 4200 50 0000 C CNN - 1 6050 4100 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 5178C812 -P 5650 4400 -F 0 "Q1" H 5650 4250 50 0000 R CNN -F 1 "NPN" H 5650 4550 50 0000 R CNN - 1 5650 4400 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516BDAF0 -P 4300 4400 -F 0 "#FLG01" H 4300 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4300 4630 30 0000 C CNN - 1 4300 4400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516BDAE0 -P 4300 4500 -F 0 "#PWR02" H 4300 4500 30 0001 C CNN -F 1 "GND" H 4300 4430 30 0001 C CNN - 1 4300 4500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516BD9B5 -P 5750 3000 -F 0 "R1" V 5830 3000 50 0000 C CNN -F 1 "5k" V 5750 3000 50 0000 C CNN - 1 5750 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516BD9A9 -P 5750 5100 -F 0 "R2" V 5850 5100 50 0000 C CNN -F 1 "7.07k" V 5750 5100 50 0000 C CNN - 1 5750 5100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir deleted file mode 100644 index bdacb65..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 15 May 2013 06:59:18 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 4 3 IPLOT -v1 1 0 DC -v2 0 5 DC -U1 3 VPLOT8_1 -Q1 2 0 3 NPN -R1 1 4 5k -R2 2 5 7.07k - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.ckt deleted file mode 100644 index 055c4d2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 06:59:18 pm ist -.include npn.lib - -V_u2 4 3 0 -v1 1 0 dc 15 -v2 0 5 dc 15 -* Plotting option vplot8_1 -q1 3 0 2 npn -r1 1 4 5k -r2 2 5 7.07k - -.dc v2 0e-00 15e-00 15e-00 -.plot i(V_u2) -.plot v(3) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.out deleted file mode 100644 index 17c61c2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 06:59:18 pm ist -.include npn.lib - -V_u2 4 3 0 -v1 1 0 dc 15 -v2 0 5 dc 15 -* Plotting option vplot8_1 -q1 3 0 2 npn -r1 1 4 5k -r2 2 5 7.07k - -.dc v2 0e-00 15e-00 15e-00 - -* Control Statements -.control -run -plot i(V_u2) -plot v(3) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.pro deleted file mode 100644 index 5bf994d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 04:46:53 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.proj deleted file mode 100644 index 3a2ba21..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.1.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.sch deleted file mode 100644 index 7873ea6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.sch +++ /dev/null @@ -1,165 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 15 May 2013 06:59:23 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 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1 6050 4100 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 5178C812 -P 5650 4400 -F 0 "Q1" H 5650 4250 50 0000 R CNN -F 1 "NPN" H 5650 4550 50 0000 R CNN - 1 5650 4400 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 516BDAF0 -P 4300 4400 -F 0 "#FLG1" H 4300 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4300 4630 30 0000 C CNN - 1 4300 4400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR1 -U 1 1 516BDAE0 -P 4300 4500 -F 0 "#PWR1" H 4300 4500 30 0001 C CNN -F 1 "GND" H 4300 4430 30 0001 C CNN - 1 4300 4500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516BD9B5 -P 5750 3000 -F 0 "R1" V 5830 3000 50 0000 C CNN -F 1 "5k" V 5750 3000 50 0000 C CNN - 1 5750 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516BD9A9 -P 5750 5100 -F 0 "R2" V 5850 5100 50 0000 C CNN -F 1 "7.07k" V 5750 5100 50 0000 C CNN - 1 5750 5100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/npn.lib deleted file mode 100644 index 1ff6b05..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 -+ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 -+ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 -+ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 -+ Is=6.734f Eg=1.11 ) diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/analysis deleted file mode 100644 index bd0d4e6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 15e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10-cache.lib deleted file mode 100644 index a66f15e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 10:01:35 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir deleted file mode 100644 index 6cc7243..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 10:01:31 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 1 3 7 VPLOT8_1 -R2 1 0 50000 -R1 5 1 100000 -R4 4 0 3000 -U4 7 4 IPLOT -v1 5 0 15V -U3 6 3 IPLOT -R3 5 6 5000 -Q1 7 1 3 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.ckt deleted file mode 100644 index 6b82c7f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:01:31 pm ist - -* Plotting option vplot8_1 -r2 1 0 50000 -r1 5 1 100000 -r4 4 0 3000 -V_u4 7 4 0 -v1 5 0 15v -V_u3 6 3 0 -r3 5 6 5000 -q1 3 1 7 npn - -.dc v1 0e-00 15e-00 5e-03 -.plot v(1) v(3) v(7) -.plot i(V_u4) -.plot i(V_u3) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.out deleted file mode 100644 index 0e51a81..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:01:31 pm ist - -* Plotting option vplot8_1 -r2 1 0 50000 -r1 5 1 100000 -r4 4 0 3000 -V_u4 7 4 0 -v1 5 0 15v -V_u3 6 3 0 -r3 5 6 5000 -q1 3 1 7 npn - -.dc v1 0e-00 15e-00 5e-03 - -* Control Statements -.control -run -plot v(1) v(3) v(7) -plot i(V_u4) -plot i(V_u3) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.pro deleted file mode 100644 index 78f9f3c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 09:51:55 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.proj deleted file mode 100644 index 6fef01d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.10.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.sch deleted file mode 100644 index 54adb65..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.sch +++ /dev/null @@ -1,209 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 10:01:35 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5050 3350 4200 3350 -Wire Wire Line - 6850 2850 6850 1300 -Wire Wire Line - 6850 1300 4200 1300 -Wire Wire Line - 4200 1300 4200 2200 -Connection ~ 4200 3350 -Wire Wire Line - 4200 2700 4200 3800 -Wire Wire Line - 6850 3750 6850 5150 -Wire Wire Line - 5350 3550 5350 3750 -Wire Wire Line - 5350 2050 5350 2250 -Wire Wire Line - 5350 1550 5350 1300 -Wire Wire Line - 5350 2750 5350 3150 -Wire Wire Line - 5350 4250 5350 4400 -Wire Wire Line - 4200 4300 4200 5150 -Wire Wire Line - 4200 5150 6850 5150 -Connection ~ 5350 5150 -Connection ~ 5350 1300 -Wire Wire Line - 5350 5650 5350 4900 -Connection ~ 5350 5500 -Connection ~ 5350 3650 -Connection ~ 5350 2900 -Connection ~ 5000 3350 -$Comp -L VPLOT8_1 U2 -U 3 1 516C2B0C -P 5650 3650 -F 0 "U2" H 5500 3750 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3750 50 0000 C CNN - 3 5650 3650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516C2B05 -P 5650 2900 -F 0 "U2" H 5500 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3000 50 0000 C CNN - 2 5650 2900 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516C2AFE -P 5000 3050 -F 0 "U2" H 4850 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5150 3150 50 0000 C CNN - 1 5000 3050 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C2AB7 -P 5350 5500 -F 0 "#FLG01" H 5350 5770 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 5730 30 0000 C CNN - 1 5350 5500 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C2AAB -P 5350 5650 -F 0 "#PWR02" H 5350 5650 30 0001 C CNN -F 1 "GND" H 5350 5580 30 0001 C CNN - 1 5350 5650 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516C2A3E -P 4200 4050 -F 0 "R2" V 4280 4050 50 0000 C CNN -F 1 "50000" V 4200 4050 50 0000 C CNN - 1 4200 4050 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C2A13 -P 4200 2450 -F 0 "R1" V 4280 2450 50 0000 C CNN -F 1 "100000" V 4200 2450 50 0000 C CNN - 1 4200 2450 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 516C29D9 -P 5350 4650 -F 0 "R4" V 5430 4650 50 0000 C CNN -F 1 "3000" V 5350 4650 50 0000 C CNN - 1 5350 4650 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C29CD -P 5350 4000 -F 0 "U4" H 5200 4100 50 0000 C CNN -F 1 "IPLOT" H 5500 4100 50 0000 C CNN - 1 5350 4000 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C296E -P 6850 3300 -F 0 "v1" H 6650 3400 60 0000 C CNN -F 1 "15V" H 6650 3250 60 0000 C CNN -F 2 "R1" H 6550 3300 60 0000 C CNN - 1 6850 3300 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C2958 -P 5350 2500 -F 0 "U3" H 5200 2600 50 0000 C CNN -F 1 "IPLOT" H 5500 2600 50 0000 C CNN - 1 5350 2500 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C293A -P 5350 1800 -F 0 "R3" V 5430 1800 50 0000 C CNN -F 1 "5000" V 5350 1800 50 0000 C CNN - 1 5350 1800 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516C2934 -P 5250 3350 -F 0 "Q1" H 5250 3200 50 0000 R CNN -F 1 "NPN" H 5250 3500 50 0000 R CNN - 1 5250 3350 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/analysis deleted file mode 100644 index bd0d4e6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 15e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11-cache.lib deleted file mode 100644 index c412639..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11-cache.lib +++ /dev/null @@ -1,127 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 10:18:23 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir deleted file mode 100644 index 72eb140..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir +++ /dev/null @@ -1,23 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 10:18:19 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - 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1 6500 5400 - -1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166EC91 -P 6500 3000 -F 0 "v1" H 6300 3100 60 0000 C CNN -F 1 "5V" H 6300 2950 60 0000 C CNN -F 2 "R1" H 6200 3000 60 0000 C CNN - 1 6500 3000 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q2 -U 1 1 5166EC64 -P 5250 5100 -F 0 "Q2" H 5250 4950 60 0000 R CNN -F 1 "PNP" H 5250 5250 60 0000 R CNN - 1 5250 5100 - 1 0 0 1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166EC56 -P 5250 3200 -F 0 "Q1" H 5250 3050 50 0000 R CNN -F 1 "NPN" H 5250 3350 50 0000 R CNN - 1 5250 3200 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir deleted file mode 100644 index 1961478..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:31:53 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 5 1 IPLOT -U1 3 8 IPLOT -U2 1 7 IPLOT -v3 4 0 5V -R2 4 2 10000 -R1 5 0 1000 -v2 0 6 5V -v1 3 0 5V -Q2 7 2 6 PNP -Q1 1 2 8 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.ckt deleted file mode 100644 index 2283488..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:31:53 pm ist - -V_u3 5 1 0 -V_u1 3 8 0 -V_u2 1 7 0 -v3 4 0 5v -r2 4 2 10000 -r1 5 0 1000 -v2 0 6 5v -v1 3 0 5v -q2 6 2 7 pnp -q1 8 2 1 npn - -.dc v3 0e-00 5e-00 1e-00 -.plot i(V_u3) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.out deleted file mode 100644 index 61a3934..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:31:53 pm ist - -V_u3 5 1 0 -V_u1 3 8 0 -V_u2 1 7 0 -v3 4 0 5v -r2 4 2 10000 -r1 5 0 1000 -v2 0 6 5v -v1 3 0 5v -q2 6 2 7 pnp -q1 8 2 1 npn - -.dc v3 0e-00 5e-00 1e-00 - -* Control Statements -.control -run -plot i(V_u3) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.pro deleted file mode 100644 index d4fedff..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 15 April 2013 10:21:09 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.proj deleted file mode 100644 index cf8b515..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.12.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.sch deleted file mode 100644 index a133513..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.sch +++ /dev/null @@ -1,222 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 01:31:57 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.12-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5350 4000 -Connection ~ 6300 4100 -Wire Wire Line - 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1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.bak deleted file mode 100644 index db1ff38..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.bak +++ /dev/null @@ -1,210 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:16:49 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.10-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 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1 5000 3050 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C2AB7 -P 5350 5500 -F 0 "#FLG01" H 5350 5770 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 5730 30 0000 C CNN - 1 5350 5500 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C2AAB -P 5350 5650 -F 0 "#PWR02" H 5350 5650 30 0001 C CNN -F 1 "GND" H 5350 5580 30 0001 C CNN - 1 5350 5650 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516C2A3E -P 4200 4050 -F 0 "R2" V 4280 4050 50 0000 C CNN -F 1 "50000" V 4200 4050 50 0000 C CNN - 1 4200 4050 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C2A13 -P 4200 2450 -F 0 "R1" V 4280 2450 50 0000 C CNN -F 1 "100000" V 4200 2450 50 0000 C CNN - 1 4200 2450 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 516C29D9 -P 5350 4650 -F 0 "R4" V 5430 4650 50 0000 C CNN -F 1 "3000" V 5350 4650 50 0000 C CNN - 1 5350 4650 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C29CD -P 5350 4000 -F 0 "U4" H 5200 4100 50 0000 C CNN -F 1 "IPLOT" H 5500 4100 50 0000 C CNN - 1 5350 4000 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C296E -P 6850 3300 -F 0 "v1" H 6650 3400 60 0000 C CNN -F 1 "15V" H 6650 3250 60 0000 C CNN -F 2 "R1" H 6550 3300 60 0000 C CNN - 1 6850 3300 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C2958 -P 5350 2500 -F 0 "U3" H 5200 2600 50 0000 C CNN -F 1 "IPLOT" H 5500 2600 50 0000 C CNN - 1 5350 2500 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C293A -P 5350 1800 -F 0 "R3" V 5430 1800 50 0000 C CNN -F 1 "5000" V 5350 1800 50 0000 C CNN - 1 5350 1800 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516C2934 -P 5250 3350 -F 0 "Q1" H 5250 3200 50 0000 R CNN -F 1 "NPN" H 5250 3500 50 0000 R CNN - 1 5250 3350 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir deleted file mode 100644 index 2015439..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 11:31:17 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -R1 5 7 80000 -U2 7 2 1 VPLOT8_1 -R2 7 0 40000 -R4 4 0 3300 -U4 1 4 IPLOT -v1 5 0 12V -U3 6 2 IPLOT -R3 5 6 4000 -Q1 1 7 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.ckt deleted file mode 100644 index cc4fac4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 11:31:17 am ist - -r1 5 7 80000 -* Plotting option vplot8_1 -r2 7 0 40000 -r4 4 0 3300 -V_u4 1 4 0 -v1 5 0 12v -V_u3 6 2 0 -r3 5 6 4000 -q1 2 7 1 npn - -.dc v1 0e-00 12e-00 12e-03 -.plot v(7) v(2) v(1) -.plot i(V_u4) -.plot i(V_u3) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.out deleted file mode 100644 index d5ce68a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 11:31:17 am ist - -r1 5 7 80000 -* Plotting option vplot8_1 -r2 7 0 40000 -r4 4 0 3300 -V_u4 1 4 0 -v1 5 0 12v -V_u3 6 2 0 -r3 5 6 4000 -q1 2 7 1 npn - -.dc v1 0e-00 12e-00 12e-03 - -* Control Statements -.control -run -plot v(7) v(2) v(1) -plot i(V_u4) -plot i(V_u3) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.pro deleted file mode 100644 index 9ed7c71..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 11:12:52 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.proj deleted file mode 100644 index a04af44..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.13.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.sch deleted file mode 100644 index d0ef771..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.sch +++ /dev/null @@ -1,209 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:31:21 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L R R1 -U 1 1 516CE8DE -P 4200 2450 -F 0 "R1" V 4280 2450 50 0000 C CNN -F 1 "80000" V 4200 2450 50 0000 C CNN - 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1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.bak deleted file mode 100644 index 850e6be..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.bak +++ /dev/null @@ -1,227 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:42:22 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example3.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 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0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 5166BF83 -P 5000 5600 -F 0 "#FLG02" H 5000 5695 30 0001 C CNN -F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN - 1 5000 5600 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166BF64 -P 5000 5750 -F 0 "#PWR03" H 5000 5750 30 0001 C CNN -F 1 "GND" H 5000 5680 30 0001 C CNN - 1 5000 5750 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166BEE6 -P 2900 4750 -F 0 "v1" H 2700 4850 60 0000 C CNN -F 1 "3V" H 2700 4700 60 0000 C CNN -F 2 "R1" H 2600 4750 60 0000 C CNN - 1 2900 4750 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5166BED7 -P 5900 3000 -F 0 "v2" H 5700 3100 60 0000 C CNN -F 1 "10V" H 5700 2950 60 0000 C CNN -F 2 "R1" H 5600 3000 60 0000 C CNN - 1 5900 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166BE8E -P 5000 1300 -F 0 "R1" V 5080 1300 50 0000 C CNN -F 1 "3000" V 5000 1300 50 0000 C CNN - 1 5000 1300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166BE53 -P 4900 3050 -F 0 "Q1" H 4900 2900 50 0000 R CNN -F 1 "NPN" H 4900 3200 50 0000 R CNN - 1 4900 3050 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir deleted file mode 100644 index e9d15ad..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir +++ /dev/null @@ -1,20 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:35:51 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U6 8 VPLOT8_1 -U5 9 VPLOT8_1 -U4 9 1 IPLOT -R2 1 8 100000 -v3 8 4 PULSE -U3 2 3 VPLOT8_1 -U2 3 0 IPLOT -U1 7 2 IPLOT -v1 4 0 3V -v2 6 0 10V -R1 6 7 3000 -Q1 3 9 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.ckt deleted file mode 100644 index b1e99c7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.ckt +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:35:51 pm ist - -* Plotting option vplot8_1 -* Plotting option vplot8_1 -V_u4 9 1 0 -r2 1 8 100000 -v3 8 4 pulse(0 1 0 0 0 2 ) -* Plotting option vplot8_1 -V_u2 3 0 0 -V_u1 7 2 0 -v1 4 0 3v -v2 6 0 10v -r1 6 7 3000 -q1 2 9 3 npn - -.tran 5e-00 100e-00 0e-00 -.plot v(8) -.plot v(9) -.plot i(V_u4) -.plot v(2) v(3) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.out deleted file mode 100644 index be85aa9..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.out +++ /dev/null @@ -1,28 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:35:51 pm ist - -* Plotting option vplot8_1 -* Plotting option vplot8_1 -V_u4 9 1 0 -r2 1 8 100000 -v3 8 4 pulse(0 1 0 0 0 2 ) -* Plotting option vplot8_1 -V_u2 3 0 0 -V_u1 7 2 0 -v1 4 0 3v -v2 6 0 10v -r1 6 7 3000 -q1 2 9 3 npn - -.tran 5e-00 100e-00 0e-00 - -* Control Statements -.control -run -plot v(8) -plot v(9) -plot i(V_u4) -plot v(2) v(3) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.pro deleted file mode 100644 index b5f9bd7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 11:34:19 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.proj deleted file mode 100644 index 2c95037..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.14.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.sch deleted file mode 100644 index 4f4f51a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.sch +++ /dev/null @@ -1,236 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 01:35:55 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 3050 3050 -$Comp -L VPLOT8_1 U6 -U 1 1 51909ECA -P 3050 3350 -F 0 "U6" H 2900 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 3200 3450 50 0000 C CNN - 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0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG2 -U 1 1 5166BF83 -P 5000 5600 -F 0 "#FLG2" H 5000 5695 30 0001 C CNN -F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN - 1 5000 5600 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 5166BF64 -P 5000 5750 -F 0 "#PWR1" H 5000 5750 30 0001 C CNN -F 1 "GND" H 5000 5680 30 0001 C CNN - 1 5000 5750 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166BEE6 -P 2900 4750 -F 0 "v1" H 2700 4850 60 0000 C CNN -F 1 "3V" H 2700 4700 60 0000 C CNN -F 2 "R1" H 2600 4750 60 0000 C CNN - 1 2900 4750 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5166BED7 -P 5900 3000 -F 0 "v2" H 5700 3100 60 0000 C CNN -F 1 "10V" H 5700 2950 60 0000 C CNN -F 2 "R1" H 5600 3000 60 0000 C CNN - 1 5900 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166BE8E -P 5000 1300 -F 0 "R1" V 5080 1300 50 0000 C CNN -F 1 "3000" V 5000 1300 50 0000 C CNN - 1 5000 1300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166BE53 -P 4900 3050 -F 0 "Q1" H 4900 2900 50 0000 R CNN -F 1 "NPN" H 4900 3200 50 0000 R CNN - 1 4900 3050 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/analysis deleted file mode 100644 index 05351e0..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 1e-00 10e-00 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16-cache.lib deleted file mode 100644 index e8eb963..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16-cache.lib +++ /dev/null @@ -1,131 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 12:27:16 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 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R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.bak deleted file mode 100644 index 8773c0d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.bak +++ /dev/null @@ -1,221 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 12:24:14 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 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-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 7 0 PULSE -R1 1 0 5000 -U2 2 7 6 VPLOT8_1 -U1 2 0 IPLOT -R2 4 5 10000 -U3 5 7 IPLOT -v2 4 0 10V -U4 6 1 IPLOT -Q1 6 2 7 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.ckt deleted file mode 100644 index 3741239..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 12:27:13 pm ist - -v1 7 0 pulse(0 5 0 0 0 1 2) -r1 1 0 5000 -* Plotting option vplot8_1 -V_u1 2 0 0 -r2 4 5 10000 -V_u3 5 7 0 -v2 4 0 10v -V_u4 6 1 0 -q1 7 2 6 npn - -.tran 1e-00 10e-00 0e-00 -.plot v(2) v(7) v(6) -.plot i(V_u1) -.plot i(V_u3) -.plot i(V_u4) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.out deleted file mode 100644 index 86e4303..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 12:27:13 pm ist - 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1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# Idc -# -DEF Idc i 0 40 Y Y 1 F N -F0 "i" -200 100 60 H V C CNN -F1 "Idc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak deleted file mode 100644 index 65ec82c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak +++ /dev/null @@ -1,188 +0,0 @@ -EESchema Schematic File Version 2 date Friday 26 April 2013 04:00:58 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.20-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "26 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 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1 5650 3950 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 517A172B -P 5950 4450 -F 0 "U4" H 5800 4550 50 0000 C CNN -F 1 "IPLOT" H 6100 4550 50 0000 C CNN - 1 5950 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 517A1709 -P 5200 4200 -F 0 "U2" H 5050 4300 50 0000 C CNN -F 1 "IPLOT" H 5350 4300 50 0000 C CNN - 1 5200 4200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 517A16C8 -P 5950 3050 -F 0 "U3" H 5800 3150 50 0000 C CNN -F 1 "IPLOT" H 6100 3150 50 0000 C CNN - 1 5950 3050 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5166CA3C -P 5650 4100 -F 0 "U1" H 5500 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN - 2 5650 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5166C9F3 -P 5650 3450 -F 0 "U1" H 5500 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN - 1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166C87D -P 5950 5600 -F 0 "#PWR03" H 5950 5600 30 0001 C CNN -F 1 "GND" H 5950 5530 30 0001 C CNN - 1 5950 5600 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "2" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir deleted file mode 100644 index 419bc05..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 26 April 2013 03:55:55 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -i1 5 0 IDC -U4 0 1 IPLOT -U2 3 5 IPLOT -U3 4 6 IPLOT -U1 6 1 VPLOT8_1 -v1 4 0 2 -Q1 1 3 6 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt deleted file mode 100644 index a91b990..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 26 april 2013 03:55:55 pm ist -.include npn.lib - -i1 5 0 idc -V_u4 0 1 0 -V_u2 3 5 0 -V_u3 4 6 0 -* Plotting option vplot8_1 -v1 4 0 2 -q1 6 3 1 npn - -.dc v1 0e-00 2e-00 2e-03 -.plot i(V_u4) -.plot i(V_u2) -.plot i(V_u3) -.plot v(6) v(1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out deleted file mode 100644 index b2caa59..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 26 april 2013 03:55:55 pm ist -.include npn.lib - -i1 5 0 idc -V_u4 0 1 0 -V_u2 3 5 0 -V_u3 4 6 0 -* Plotting option vplot8_1 -v1 4 0 2 -q1 6 3 1 npn - -.dc v1 0e-00 2e-00 2e-03 - -* Control Statements -.control -run -plot i(V_u4) -plot i(V_u2) -plot i(V_u3) -plot v(6) v(1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro deleted file mode 100644 index d4ac2ef..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 12:53:24 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj deleted file mode 100644 index 231747a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.20.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch deleted file mode 100644 index a694eb1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch +++ /dev/null @@ -1,183 +0,0 @@ -EESchema Schematic File Version 2 date Friday 26 April 2013 04:23:31 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.20-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "26 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6350 4200 6350 5100 -Wire Wire Line - 6350 3300 6350 2800 -Wire Wire Line - 6350 2800 5950 2800 -Wire Wire Line - 4750 4200 4950 4200 -Wire Wire Line - 5450 4200 5650 4200 -Wire Wire Line - 5950 3300 5950 3650 -Wire Wire Line - 5950 4200 5950 4050 -Connection ~ 5950 5100 -Connection ~ 5950 3450 -Connection ~ 5950 4100 -Wire Wire Line - 5650 4200 5650 3850 -Connection ~ 5650 3850 -Connection ~ 5650 3950 -Wire Wire Line - 6350 5100 4750 5100 -Wire Wire Line - 5950 5200 5950 4700 -$Comp -L IDC i1 -U 1 1 517A17EC -P 4750 4650 -F 0 "i1" H 4550 4750 60 0000 C CNN -F 1 "IDC" H 4550 4600 60 0000 C CNN -F 2 "R1" H 4450 4650 60 0000 C CNN - 1 4750 4650 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 517A1753 -P 5950 5100 -F 0 "#FLG01" H 5950 5370 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 5330 30 0000 C CNN - 1 5950 5100 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 517A174B -P 5650 3950 -F 0 "#FLG02" H 5650 4220 30 0001 C CNN -F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN - 1 5650 3950 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 517A172B -P 5950 4450 -F 0 "U4" H 5800 4550 50 0000 C CNN -F 1 "IPLOT" H 6100 4550 50 0000 C CNN - 1 5950 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 517A1709 -P 5200 4200 -F 0 "U2" H 5050 4300 50 0000 C CNN -F 1 "IPLOT" H 5350 4300 50 0000 C CNN - 1 5200 4200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 517A16C8 -P 5950 3050 -F 0 "U3" H 5800 3150 50 0000 C CNN -F 1 "IPLOT" H 6100 3150 50 0000 C CNN - 1 5950 3050 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5166CA3C -P 5650 4100 -F 0 "U1" H 5500 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN - 2 5650 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5166C9F3 -P 5650 3450 -F 0 "U1" H 5500 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN - 1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166C87D -P 5950 5200 -F 0 "#PWR03" H 5950 5200 30 0001 C CNN -F 1 "GND" H 5950 5130 30 0001 C CNN - 1 5950 5200 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "2" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/npn.lib deleted file mode 100644 index 1ff6b05..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 -+ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 -+ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 -+ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 -+ Is=6.734f Eg=1.11 ) diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/analysis deleted file mode 100644 index 10c280a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib deleted file mode 100644 index a8411e8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model bjt NPN( Vtf=1.7 Cjc=7.306p Nc=2 Tr=46.91n Ne=1.307 -+ Cje=22.01p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=411.1p Xti=3 Ikr=0 Bf=50 Fc=.5 -+ Ise=14.34f Br=6.092 Ikf=.2847 Mje=.377 Mjc=.3416 -+ Vaf=74.03 Vjc=.2 Vje=.75 Xtf=3 Itf=.6 -+ Is=14.34f Eg=1.11 ) \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak deleted file mode 100644 index dad7e0c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak +++ /dev/null @@ -1,218 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:57:15 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4000 3300 -Wire Wire Line - 5450 4200 5450 5350 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 4300 3300 3500 3300 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 3500 3300 3500 3550 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Connection ~ 5450 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CE13E -P 3750 3300 -F 0 "R1" V 3830 3300 50 0000 C CNN -F 1 "2200" V 3750 3300 50 0000 C CNN - 1 3750 3300 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "1000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir deleted file mode 100644 index 2e072a8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 12:03:45 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -Q1 7 1 5 PNP -v1 7 0 PULSE -R1 6 0 5000 -U2 1 7 5 VPLOT8_1 -U1 1 0 IPLOT -R2 3 4 10000 -U3 4 7 IPLOT -v2 3 0 10V -U4 5 6 IPLOT - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch deleted file mode 100644 index e0eb696..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch +++ /dev/null @@ -1,235 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 12:03:50 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CF0A9 -P 4000 3050 -F 0 "#FLG01" H 4000 3320 30 0001 C CNN -F 1 "PWR_FLAG" H 4000 3280 30 0000 C CNN - 1 4000 3050 - 1 0 0 -1 -$EndComp -Wire Wire Line - 3500 4200 3500 5050 -Connection ~ 4300 5050 -Wire Wire Line - 4300 5050 4300 3300 -Connection ~ 3500 3300 -Wire Wire Line - 3500 3550 3500 3050 -Wire Wire Line - 5450 4200 5450 4350 -Connection ~ 4000 3050 -Wire Wire Line - 3500 5050 6650 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Wire Wire Line - 5450 5350 5450 4850 -Wire Wire Line - 5150 3300 4800 3300 -Wire Wire Line - 3500 3050 5450 3050 -Wire Wire Line - 5450 3050 5450 3000 -Connection ~ 5450 3000 -$Comp -L PNP Q1 -U 1 1 516CEFD3 -P 5350 3300 -F 0 "Q1" H 5350 3150 60 0000 R CNN -F 1 "PNP" H 5350 3450 60 0000 R CNN - 1 5350 3300 - 1 0 0 1 -$EndComp -$Comp -L PULSE v1 -U 1 1 516CEF97 -P 3500 3750 -F 0 "v1" H 3300 3850 60 0000 C CNN -F 1 "PULSE" H 3300 3700 60 0000 C CNN -F 2 "R1" H 3200 3750 60 0000 C CNN - 1 3500 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CEF60 -P 5450 4600 -F 0 "R1" V 5530 4600 50 0000 C CNN -F 1 "5000" V 5450 4600 50 0000 C CNN - 1 5450 4600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG02" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG03" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR04" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "10000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak deleted file mode 100644 index f265808..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 12:24:14 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib deleted file mode 100644 index 8652c69..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 25 April 2013 02:05:06 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak deleted file mode 100644 index 246ba5c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak +++ /dev/null @@ -1,217 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:04:07 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4000 3300 -Wire Wire Line - 5450 4200 5450 5350 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 4300 3300 3500 3300 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 3500 3300 3500 3550 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Connection ~ 5450 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CE13E -P 3750 3300 -F 0 "R1" V 3830 3300 50 0000 C CNN -F 1 "2200" V 3750 3300 50 0000 C CNN - 1 3750 3300 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "1000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir deleted file mode 100644 index 97a0042..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 25 April 2013 02:05:01 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 7 2 5 VPLOT8_1 -U1 7 1 IPLOT -v1 1 0 5V -R1 1 1 2200 -R2 3 4 1k -U3 4 2 IPLOT -v2 3 0 10V -U4 5 0 IPLOT -Q1 5 7 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt deleted file mode 100644 index 51d6e2f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 02:05:01 pm ist -.include npn.lib - -* Plotting option vplot8_1 -V_u1 7 1 0 -v1 1 0 5v -r1 1 1 2200 -r2 3 4 1k -V_u3 4 2 0 -v2 3 0 10v -V_u4 5 0 0 -q1 2 7 5 npn - -.dc v1 0e-00 5e-00 5e-00 -.plot v(7) v(2) v(5) -.plot i(V_u1) -.plot i(V_u3) -.plot i(V_u4) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out deleted file mode 100644 index 30154d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out +++ /dev/null @@ -1,24 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 02:05:01 pm ist -.include npn.lib - -* Plotting option vplot8_1 -V_u1 7 1 0 -v1 1 0 5v -r1 1 1 2200 -r2 3 4 1k -V_u3 4 2 0 -v2 3 0 10v -V_u4 5 0 0 -q1 2 7 5 npn - -.dc v1 0e-00 5e-00 5e-00 - -* Control Statements -.control -run -plot v(7) v(2) v(5) -plot i(V_u1) -plot i(V_u3) -plot i(V_u4) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro deleted file mode 100644 index f37394e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 10:53:01 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj deleted file mode 100644 index 00153d6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.3.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch deleted file mode 100644 index 0bfa3f7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch +++ /dev/null @@ -1,218 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 25 April 2013 02:05:06 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "25 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4000 3300 -Wire Wire Line - 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1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/npn.lib deleted file mode 100644 index 5aecc2e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf= Cjc= Nc= Tr= Ne= -+ Cje= Vjc= Xtb= Rb= Rc= -+ Tf= Xti= Ikr= Bf=50 Fc= -+ Ikf= Br= Mje= Mjc= Vaf= -+ Isc= Ise= Xtf= Vje= Is= -+ Itf= Eg= ) \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/analysis deleted file mode 100644 index 35318bb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 10e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.bak deleted file mode 100644 index ea673cb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 10:43:17 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - 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1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.bak deleted file mode 100644 index 6e5ac9b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.bak +++ /dev/null @@ -1,172 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 07:53:26 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.6-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 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1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5166C8C4 -P 5950 5450 -F 0 "#FLG01" H 5950 5545 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 5630 30 0000 C CNN - 1 5950 5450 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5166C87D -P 5950 5600 -F 0 "#PWR02" H 5950 5600 30 0001 C CNN -F 1 "GND" H 5950 5530 30 0001 C CNN - 1 5950 5600 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166C822 -P 5950 2400 -F 0 "R1" V 6030 2400 50 0000 C CNN -F 1 "4700" V 5950 2400 50 0000 C CNN - 1 5950 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166C7EC -P 5950 5100 -F 0 "R2" V 6030 5100 50 0000 C CNN -F 1 "3300" V 5950 5100 50 0000 C CNN - 1 5950 5100 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "10V" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir deleted file mode 100644 index c9bc6a1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 10:43:13 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U4 0 7 IPLOT -U3 4 1 IPLOT -U2 2 3 IPLOT -U1 2 1 VPLOT8_1 -R1 5 3 4700 -R2 4 0 3300 -v1 5 0 10V -Q1 1 7 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.ckt deleted file mode 100644 index f76426b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 10:43:13 am ist -.include npn.lib - -V_u4 0 7 0 -V_u3 4 1 0 -V_u2 2 3 0 -* Plotting option vplot8_1 -r1 5 3 4700 -r2 4 0 3300 -v1 5 0 10v -q1 2 7 1 npn - -.dc v1 0e-00 10e-00 5e-03 -.plot i(V_u4) -.plot i(V_u3) -.plot i(V_u2) -.plot v(2) v(1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.out deleted file mode 100644 index c87b0a7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 10:43:13 am ist -.include npn.lib - -V_u4 0 7 0 -V_u3 4 1 0 -V_u2 2 3 0 -* Plotting option vplot8_1 -r1 5 3 4700 -r2 4 0 3300 -v1 5 0 10v -q1 2 7 1 npn - -.dc v1 0e-00 10e-00 5e-03 - -* Control Statements -.control -run -plot i(V_u4) -plot i(V_u3) -plot i(V_u2) -plot v(2) v(1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.pro deleted file mode 100644 index 36d0202..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Tuesday 16 April 2013 12:39:39 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.proj deleted file mode 100644 index 3ace945..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.6.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.sch deleted file mode 100644 index d3d6988..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.sch +++ /dev/null @@ -1,195 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 10:43:17 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.6-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5650 3950 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CDDBE -P 5650 3950 -F 0 "#FLG01" H 5650 4220 30 0001 C CNN -F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN - 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R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak deleted file mode 100644 index ca1bf82..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak +++ /dev/null @@ -1,172 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 08:09:14 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5050 4700 -Connection ~ 5050 3500 -Connection ~ 4500 5050 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C10CC -P 4500 5050 -F 0 "#FLG01" H 4500 5320 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 5280 30 0000 C CNN - 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1 5350 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C0FB5 -P 5050 5100 -F 0 "R2" V 5130 5100 50 0000 C CNN -F 1 "R" V 5050 5100 50 0000 C CNN - 1 5050 5100 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C0FAB -P 5050 4300 -F 0 "U2" H 4900 4400 50 0000 C CNN -F 1 "IPLOT" H 5200 4400 50 0000 C CNN - 1 5050 4300 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C0F0F -P 5050 3200 -F 0 "U1" H 4900 3300 50 0000 C CNN -F 1 "IPLOT" H 5200 3300 50 0000 C CNN - 1 5050 3200 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 516C0F01 -P 5050 2600 -F 0 "R1" V 5130 2600 50 0000 C CNN -F 1 "R" V 5050 2600 50 0000 C CNN - 1 5050 2600 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C0EEC -P 4950 3750 -F 0 "Q1" H 4950 3600 60 0000 R CNN -F 1 "PNP" H 4950 3900 60 0000 R CNN - 1 4950 3750 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir deleted file mode 100644 index 7d111e3..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 08:10:56 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 4 6 VPLOT8_1 -v1 3 5 10 -R2 6 3 2000 -U2 6 2 IPLOT -U1 4 1 IPLOT -R1 5 1 1000 -Q1 2 0 4 PNP - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt deleted file mode 100644 index d569e7a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:10:56 pm ist - -* Plotting option vplot8_1 -v1 3 5 10 -r2 6 3 2000 -V_u2 6 2 0 -V_u1 4 1 0 -r1 5 1 1000 -q1 4 0 2 pnp - -.dc v1 0e-00 10e-00 5e-03 -.plot v(4) v(6) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out deleted file mode 100644 index 946ba9b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:10:56 pm ist - -* Plotting option vplot8_1 -v1 3 5 10 -r2 6 3 2000 -V_u2 6 2 0 -V_u1 4 1 0 -r1 5 1 1000 -q1 4 0 2 pnp - -.dc v1 0e-00 10e-00 5e-03 - -* Control Statements -.control -run -plot v(4) v(6) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro deleted file mode 100644 index 7b4f272..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 07:58:37 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj deleted file mode 100644 index b07d448..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.7.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch deleted file mode 100644 index c9780ef..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch +++ /dev/null @@ -1,173 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 08:10:59 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.7-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5050 4700 -Connection ~ 5050 3500 -Connection ~ 4500 5050 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C10CC -P 4500 5050 -F 0 "#FLG01" H 4500 5320 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 5280 30 0000 C CNN - 1 4500 5050 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C10B9 -P 4450 5350 -F 0 "#PWR02" H 4450 5350 30 0001 C CNN -F 1 "GND" H 4450 5280 30 0001 C CNN - 1 4450 5350 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4450 5350 4500 5350 -Wire Wire Line - 4500 5350 4500 3750 -Wire Wire Line - 4500 3750 4750 3750 -Wire Wire Line - 5050 4550 5050 4850 -Wire Wire Line - 5050 5350 5650 5350 -Wire Wire Line - 5050 3450 5050 3550 -Wire Wire Line - 5050 2850 5050 2950 -Wire Wire Line - 5050 3950 5050 4050 -Wire Wire Line - 5050 2350 5650 2350 -Wire Wire Line - 5650 2350 5650 3200 -Wire Wire Line - 5650 5350 5650 4100 -$Comp -L VPLOT8_1 U3 -U 2 1 516C107A -P 5350 4700 -F 0 "U3" H 5200 4800 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 4800 50 0000 C CNN - 2 5350 4700 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C103D -P 5650 3650 -F 0 "v1" H 5450 3750 60 0000 C CNN -F 1 "10" H 5450 3600 60 0000 C CNN -F 2 "R1" H 5350 3650 60 0000 C CNN - 1 5650 3650 - 1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516C1001 -P 5350 3500 -F 0 "U3" H 5200 3600 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 3600 50 0000 C CNN - 1 5350 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C0FB5 -P 5050 5100 -F 0 "R2" V 5130 5100 50 0000 C CNN -F 1 "2000" V 5050 5100 50 0000 C CNN - 1 5050 5100 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C0FAB -P 5050 4300 -F 0 "U2" H 4900 4400 50 0000 C CNN -F 1 "IPLOT" H 5200 4400 50 0000 C CNN - 1 5050 4300 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C0F0F -P 5050 3200 -F 0 "U1" H 4900 3300 50 0000 C CNN -F 1 "IPLOT" H 5200 3300 50 0000 C CNN - 1 5050 3200 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 516C0F01 -P 5050 2600 -F 0 "R1" V 5130 2600 50 0000 C CNN -F 1 "1000" V 5050 2600 50 0000 C CNN - 1 5050 2600 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C0EEC -P 4950 3750 -F 0 "Q1" H 4950 3600 60 0000 R CNN -F 1 "PNP" H 4950 3900 60 0000 R CNN - 1 4950 3750 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/analysis deleted file mode 100644 index 7946c35..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8-cache.lib deleted file mode 100644 index c582dbc..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 08:58:27 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir deleted file mode 100644 index 073dc21..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 08:58:23 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 3 0 5V -v2 2 0 10V -R1 6 3 100 -U3 1 4 VPLOT8_1 -U2 0 4 IPLOT -U1 1 5 IPLOT -R2 2 5 2000 -Q1 4 6 1 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.ckt deleted file mode 100644 index bf04d00..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.ckt +++ /dev/null @@ -1,16 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:58:23 pm ist - -v1 3 0 5v -v2 2 0 10v -r1 6 3 100 -* Plotting option vplot8_1 -V_u2 0 4 0 -V_u1 1 5 0 -r2 2 5 2000 -q1 1 6 4 npn - -.dc v1 0e-00 5e-00 5e-03 -.plot v(1) v(4) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.out deleted file mode 100644 index 4fa87ff..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.out +++ /dev/null @@ -1,21 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:58:23 pm ist - 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1 5400 3200 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/analysis deleted file mode 100644 index 7946c35..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.bak deleted file mode 100644 index ab4ac6a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 09:47:58 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 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1 6500 3350 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C1DAD -P 5100 3000 -F 0 "U3" H 4950 3100 50 0000 C CNN -F 1 "IPLOT" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C1D7F -P 5100 2400 -F 0 "R2" V 5180 2400 50 0000 C CNN -F 1 "1000" V 5100 2400 50 0000 C CNN - 1 5100 2400 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C1D57 -P 5000 3600 -F 0 "Q1" H 5000 3450 60 0000 R CNN -F 1 "PNP" H 5000 3750 60 0000 R CNN - 1 5000 3600 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir deleted file mode 100644 index 484dfb8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:19:49 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v2 0 4 5 -U2 2 6 3 VPLOT8_1 -R1 2 0 10000 -R3 5 4 10000 -U4 3 5 IPLOT -v1 7 0 5 -U3 8 6 IPLOT -R2 7 8 1000 -Q1 3 2 6 PNP - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.ckt deleted file mode 100644 index 3c4d3e8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:19:49 pm ist - -v2 0 4 5 -* Plotting option vplot8_1 -r1 2 0 10000 -r3 5 4 10000 -V_u4 3 5 0 -v1 7 0 5 -V_u3 8 6 0 -r2 7 8 1000 -q1 6 2 3 pnp - -.dc v1 0e-00 5e-00 5e-03 -.plot v(2) v(6) v(3) -.plot i(V_u4) -.plot i(V_u3) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.out deleted file mode 100644 index 00c3815..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:19:49 pm ist - -v2 0 4 5 -* Plotting option vplot8_1 -r1 2 0 10000 -r3 5 4 10000 -V_u4 3 5 0 -v1 7 0 5 -V_u3 8 6 0 -r2 7 8 1000 -q1 6 2 3 pnp - -.dc v1 0e-00 5e-00 5e-03 - -* Control Statements -.control -run -plot v(2) v(6) v(3) -plot i(V_u4) -plot i(V_u3) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.pro deleted file mode 100644 index 50bea06..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 09:01:17 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.proj deleted file mode 100644 index cf438f1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.9.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.sch deleted file mode 100644 index da988b4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.sch +++ /dev/null @@ -1,221 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 01:19:52 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.9-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L GND #PWR01 -U 1 1 51909AF0 -P 6700 3550 -F 0 "#PWR01" H 6700 3550 30 0001 C CNN -F 1 "GND" H 6700 3480 30 0001 C CNN - 1 6700 3550 - 1 0 0 -1 -$EndComp -Connection ~ 6500 3550 -Wire Wire Line - 6500 3550 6700 3550 -Wire Wire Line - 4800 3600 4150 3600 -Wire Wire Line - 6500 2050 5100 2050 -Wire Wire Line - 5100 5100 5100 5250 -Wire Wire Line - 5100 3800 5100 3950 -Wire Wire Line - 5100 3250 5100 3400 -Wire Wire Line - 5100 2650 5100 2750 -Wire Wire Line - 5100 4450 5100 4600 -Wire Wire Line - 5100 2050 5100 2150 -Connection ~ 5100 3350 -Connection ~ 5100 3900 -Wire Wire Line - 3650 3600 3650 5100 -Connection ~ 5100 2050 -Connection ~ 5100 2050 -Connection ~ 5100 2050 -Wire Wire Line - 5100 5250 6500 5250 -Connection ~ 4750 3600 -Connection ~ 3650 3600 -Connection ~ 4150 3600 -Connection ~ 3950 3600 -Connection ~ 4800 3600 -Connection ~ 3650 4850 -Wire Wire Line - 6500 2950 6500 4350 -$Comp -L DC v2 -U 1 1 51909ACB -P 6500 4800 -F 0 "v2" H 6300 4900 60 0000 C CNN -F 1 "5" H 6300 4750 60 0000 C CNN -F 2 "R1" H 6200 4800 60 0000 C CNN - 1 6500 4800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516C1E89 -P 3650 4850 -F 0 "#FLG02" H 3650 5120 30 0001 C CNN -F 1 "PWR_FLAG" H 3650 5080 30 0000 C CNN - 1 3650 4850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516C1EFD -P 4750 3300 -F 0 "U2" H 4600 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 4900 3400 50 0000 C CNN - 1 4750 3300 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516C1E7B -P 3650 5100 -F 0 "#PWR03" H 3650 5100 30 0001 C CNN -F 1 "GND" H 3650 5030 30 0001 C CNN - 1 3650 5100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C1E56 -P 3900 3600 -F 0 "R1" V 3980 3600 50 0000 C CNN -F 1 "10000" V 3900 3600 50 0000 C CNN - 1 3900 3600 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516C1E37 -P 5400 3900 -F 0 "U2" H 5250 4000 50 0000 C CNN -F 1 "VPLOT8_1" H 5550 4000 50 0000 C CNN - 3 5400 3900 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C1E04 -P 5100 4850 -F 0 "R3" V 5180 4850 50 0000 C CNN -F 1 "10000" V 5100 4850 50 0000 C CNN - 1 5100 4850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C1DF8 -P 5100 4200 -F 0 "U4" H 4950 4300 50 0000 C CNN -F 1 "IPLOT" H 5250 4300 50 0000 C CNN - 1 5100 4200 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516C1DCB -P 5400 3350 -F 0 "U2" H 5250 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 5550 3450 50 0000 C CNN - 2 5400 3350 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C1DBD -P 6500 2500 -F 0 "v1" H 6300 2600 60 0000 C CNN -F 1 "5" H 6300 2450 60 0000 C CNN -F 2 "R1" H 6200 2500 60 0000 C CNN - 1 6500 2500 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C1DAD -P 5100 3000 -F 0 "U3" H 4950 3100 50 0000 C CNN -F 1 "IPLOT" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C1D7F -P 5100 2400 -F 0 "R2" V 5180 2400 50 0000 C CNN -F 1 "1000" V 5100 2400 50 0000 C CNN - 1 5100 2400 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C1D57 -P 5000 3600 -F 0 "Q1" H 5000 3450 60 0000 R CNN -F 1 "PNP" H 5000 3750 60 0000 R CNN - 1 5000 3600 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/npn.lib deleted file mode 100644 index caa3cb7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 -+ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 -+ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 -+ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 -+ Is=6.734 Eg=1.11 ) \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/1n4007.lib b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/1n4007.lib deleted file mode 100644 index 89d421d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/1n4007.lib +++ /dev/null @@ -1,2 +0,0 @@ -.model 1n4007 D( IS=7.02767e-09 RS=0.0341512 N=1.80803 EG=1.05743 XTI=5 BV=1000 IBV=5e-08 CJO=1E-11 -+VJ=0.7 M=0.5 FC=0.5 TT=1E-07 KF=0 AF=1 ) diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/analysis b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/analysis deleted file mode 100644 index f74e3c8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 10e-00 1e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/cd4007.txt b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/cd4007.txt deleted file mode 100644 index 0552575..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/cd4007.txt +++ /dev/null @@ -1,22 +0,0 @@ -* CD4007 NMOS and PMOS transistor SPICE models - -* Typical - Typical Condition - -.model mos_n NMOS -+ Level=1 Gamma= 0 Xj=0 -+ Tox=1200n Phi=.6 Rs=0 Kp=111u Vto=1.4 Lambda=0.01 -+ Rd=0 Cbd=2.0p Cbs=2.0p Pb=.8 Cgso=0.1p -+ Cgdo=0.1p Is=16.64p N=1 - -*The default W and L is 30 and 10 um respectively and AD and AS -*should not be included. - - -.model mos_p PMOS -+ Level=1 Gamma= 0 Xj=0 -+ Tox=1200n Phi=.6 Rs=0 Kp=1u Vto=-1.2 Lambda=0.04 -+ Rd=0 Cbd=4.0p Cbs=4.0p Pb=.8 Cgso=0.2p -+ Cgdo=0.2p Is=16.64p N=1 - -*The default W and L is 60 and 10 um respectively and AD and AS -*should not be included. diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.bak b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.bak deleted file mode 100644 index 5cb1eee..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.bak +++ /dev/null @@ -1,110 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 16 May 2013 11:39:19 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# MOS_N -# -DEF MOS_N M 0 0 N Y 1 F N -F0 "M" 10 170 60 H V R CNN -F1 "MOS_N" 10 -150 60 H V R CNN -ALIAS MOSFET_N -DRAW -P 2 0 1 8 -50 -100 -50 100 N -P 2 0 1 10 0 -150 0 150 N -P 2 0 1 0 100 -100 0 -100 N -P 2 0 1 0 100 100 0 100 N -P 3 0 1 8 100 -100 100 0 50 0 N -P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N -X D D 100 200 100 D 40 40 1 1 P -X G G -200 0 150 R 40 40 1 1 I -X S S 100 -200 100 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - 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2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.bak deleted file mode 100644 index abf9a53..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.bak +++ /dev/null @@ -1,181 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 09 May 2013 05:04:50 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "9 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L LM741 U? -U 1 1 518B89AE -P 8800 3550 -F 0 "U?" H 8950 3700 60 0000 C CNN -F 1 "LM741" H 8950 3800 60 0000 C CNN - 1 8800 3550 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X? -U 1 1 518B899E -P 9050 2450 -F 0 "X?" H 9200 2600 60 0000 C CNN -F 1 "UA741" H 9200 2700 60 0000 C CNN - 1 9050 2450 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 516F84E1 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "SINE" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -Wire Wire Line - 7150 3300 6350 3300 -Wire Wire Line - 5300 2400 5300 3200 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 4200 5350 3400 -Connection ~ 5300 3200 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 6900 2400 7050 2400 -Wire Wire Line - 7050 2400 7050 3300 -Wire Wire Line - 6400 2400 5800 2400 -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7050 3600 -F 0 "U3" H 6900 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 7200 3700 50 0000 C CNN - 1 7050 3600 - -1 0 0 1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG1" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2400 -F 0 "U2" H 5400 2500 50 0000 C CNN -F 1 "IPLOT" H 5700 2500 50 0000 C CNN - 1 5550 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6650 2400 -F 0 "R2" V 6730 2400 50 0000 C CNN -F 1 "10000" V 6650 2400 50 0000 C CNN - 1 6650 2400 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR1" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir deleted file mode 100644 index d11b7e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir +++ /dev/null @@ -1,24 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 18 April 2013 10:42:46 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 4 0 PULSE -v2 11 0 10V -U3 8 3 VPLOT8_1 -R5 13 3 10000 -R4 0 13 10000 -R3 1 11 10000 -U5 8 2 IPLOT -Q2 1 1 2 NPN -X2 1 13 3 UA741 -U4 10 8 IPLOT -Q1 10 0 9 NPN -U1 6 7 IPLOT -U2 7 9 IPLOT -R2 8 5 10000 -R1 6 4 1000 -X1 7 0 5 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.ckt deleted file mode 100644 index db0e45e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.ckt +++ /dev/null @@ -1,16 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 02:25:09 pm ist -.include ua741.sub - -* Plotting option vplot8_1 -V_u1 6 5 0 -V_u2 5 4 0 -r2 1 4 100000 -v1 3 0 100m -r1 6 3 1000 -x1 5 0 1 ua741 - -.dc v1 0e-00 100e-03 100e-06 -.plot v(1) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.out deleted file mode 100644 index d01be76..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.out +++ /dev/null @@ -1,21 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 02:25:09 pm ist -.include ua741.sub - -* Plotting option vplot8_1 -V_u1 6 5 0 -V_u2 5 4 0 -r2 1 4 100000 -v1 3 0 100m -r1 6 3 1000 -x1 5 0 1 ua741 - -.dc v1 0e-00 100e-03 100e-06 - -* Control Statements -.control -run -plot v(1) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.net b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.net deleted file mode 100644 index 6696e60..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.net +++ /dev/null @@ -1,76 +0,0 @@ -# EESchema Netlist Version 1.1 created Thursday 18 April 2013 11:00:24 AM IST -( - ( /516F84E1 R1 v1 SINE {Lib=SINE} - ( 1 N-000005 ) - ( 2 GND ) - ) - ( /516D117B $noname U3 VPLOT8_1 {Lib=VPLOT8_1} - ( 1 N-000004 ) - ) - ( /516D1019 $noname U1 IPLOT {Lib=IPLOT} - ( 1 N-000002 ) - ( 2 N-000003 ) - ) - ( /516D0FEC $noname U2 IPLOT {Lib=IPLOT} - ( 1 N-000003 ) - ( 2 N-000001 ) - ) - ( /516D0FE2 $noname R2 10000 {Lib=R} - ( 1 N-000004 ) - ( 2 N-000001 ) - ) - ( /516D0F10 $noname R1 1000 {Lib=R} - ( 1 N-000002 ) - ( 2 N-000005 ) - ) - ( /516D0E60 $noname X1 UA741 {Lib=UA741} - ( 2 N-000003 ) - ( 3 GND ) - ( 6 N-000004 ) - ) -) -* -{ Allowed footprints by component: -$component v1 - 1_pin -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component X1 - DIP-8__300 -$endlist -$endfootprintlist -} -{ Pin List by Nets -Net 1 "" "" - R2 2 - U2 2 -Net 2 "" "" - R1 1 - U1 1 -Net 3 "" "" - X1 2 - U2 1 - U1 2 -Net 4 "" "" - U3 1 - R2 1 - X1 6 -Net 5 "" "" - v1 1 - R1 2 -Net 6 "GND" "GND" - X1 3 - v1 2 -} -#End diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.pro deleted file mode 100644 index 2d33bde..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 02:06:21 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.proj deleted file mode 100644 index fb6ad90..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.1.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.sch deleted file mode 100644 index 9267154..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.sch +++ /dev/null @@ -1,163 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 10:18:21 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L SINE v1 -U 1 1 516F84E1 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "SINE" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 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1 5550 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6650 2400 -F 0 "R2" V 6730 2400 50 0000 C CNN -F 1 "10000" V 6650 2400 50 0000 C CNN - 1 6650 2400 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR1" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741-cache.lib b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741-cache.lib deleted file mode 100644 index e9ec641..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741-cache.lib +++ /dev/null @@ -1,63 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 02:55:26 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 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2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.pro deleted file mode 100644 index 46bdf8d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Tuesday 16 April 2013 02:56:39 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 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-.ends ua741 \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/analysis deleted file mode 100644 index 63f4a40..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/analysis +++ /dev/null @@ -1,8 +0,0 @@ - -.ac lin 20 1Hz 10Meg - - -.end -.control -run -.endc diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.bak deleted file mode 100644 index 3c7e9ce..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.bak +++ /dev/null @@ -1,97 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 12 May 2013 08:39:09 PM IST -#encoding utf-8 -# -# AC -# -DEF AC AC 0 40 Y Y 1 F N -F0 "AC" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 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-u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.pro deleted file mode 100644 index e55b2df..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Sunday 12 May 2013 08:34:27 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 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-.ends ua741 \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/analysis deleted file mode 100644 index 7946c35..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2-cache.lib b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2-cache.lib deleted file mode 100644 index 40f51d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2-cache.lib +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 03:05:48 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 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-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U5 3 8 IPLOT -U4 2 VPLOT8_1 -R3 0 2 100000 -R4 3 2 100000 -U3 8 VPLOT8_1 -U1 6 4 IPLOT -U2 4 5 IPLOT -R2 2 5 100000 -v1 7 0 100m -R1 6 7 1000 -X1 4 0 8 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.ckt deleted file mode 100644 index ea512f4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.ckt +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 03:05:45 pm ist -.include ua741.sub - -V_u5 3 8 0 -* Plotting option vplot8_1 -r3 0 2 100000 -r4 3 2 100000 -* Plotting option vplot8_1 -V_u1 6 4 0 -V_u2 4 5 0 -r2 2 5 100000 -v1 7 0 100m -r1 6 7 1000 -x1 4 0 8 ua741 - -.dc v1 0e-00 5e-00 5e-03 -.plot i(V_u5) -.plot v(2) -.plot v(8) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.out deleted file mode 100644 index fdcc306..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.out +++ /dev/null @@ -1,27 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 03:05:45 pm ist -.include ua741.sub - -V_u5 3 8 0 -* Plotting option vplot8_1 -r3 0 2 100000 -r4 3 2 100000 -* Plotting option vplot8_1 -V_u1 6 4 0 -V_u2 4 5 0 -r2 2 5 100000 -v1 7 0 100m -r1 6 7 1000 -x1 4 0 8 ua741 - -.dc v1 0e-00 5e-00 5e-03 - -* Control Statements -.control -run -plot i(V_u5) -plot v(2) -plot v(8) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.pro deleted file mode 100644 index 4197879..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 02:59:20 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.proj deleted file mode 100644 index e56c1d2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.2.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.sch deleted file mode 100644 index 5dbaecc..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.sch +++ /dev/null @@ -1,224 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 03:05:48 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 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1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.pro deleted file mode 100644 index 34303c7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Tuesday 16 April 2013 03:06:44 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 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-.ends ua741 \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/analysis deleted file mode 100644 index 7946c35..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.bak deleted file mode 100644 index e6f6afe..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.bak +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 09:35:11 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 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7050 3300 7050 2950 -Wire Wire Line - 6450 3300 6350 3300 -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 3400 5350 4200 -Connection ~ 5300 3200 -Wire Wire Line - 5300 2950 5300 3200 -Wire Wire Line - 5250 3200 5350 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 7050 3300 6950 3300 -Wire Wire Line - 7050 2950 6400 2950 -$Comp -L R R3 -U 1 1 516D1D5E -P 6700 3300 -F 0 "R3" V 6780 3300 50 0000 C CNN -F 1 "100k" V 6700 3300 50 0000 C CNN - 1 6700 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG01" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7350 3300 -F 0 "U3" H 7200 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN - 1 7350 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG02" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "1000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516D0FD3 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "10" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR03" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "10" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir deleted file mode 100644 index 25f7e67..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 15 May 2013 09:29:30 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -R3 1 7 100k -U3 1 VPLOT8_1 -U1 5 2 IPLOT -U2 2 3 IPLOT -R2 1 3 1000 -v1 6 0 10 -R1 5 6 10 -X1 2 0 7 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.ckt deleted file mode 100644 index 5cc8d66..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 09:29:30 pm ist -.include ua741.sub - -r3 1 7 100k -* Plotting option vplot8_1 -V_u1 5 2 0 -V_u2 2 3 0 -r2 1 3 1000 -v1 6 0 10 -r1 5 6 10 -x1 2 0 7 ua741 - -.dc v1 0e-00 5e-00 5e-03 -.plot v(1) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.out deleted file mode 100644 index 1d3b745..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 09:29:30 pm ist -.include ua741.sub - -r3 1 7 100k -* Plotting option vplot8_1 -V_u1 5 2 0 -V_u2 2 3 0 -r2 1 3 1000 -v1 6 0 10 -r1 5 6 10 -x1 2 0 7 ua741 - -.dc v1 0e-00 5e-00 5e-03 - -* Control Statements -.control -run -plot v(1) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.pro deleted file mode 100644 index 68ef472..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 03:20:48 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.proj deleted file mode 100644 index 36f23a8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.3.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.sch deleted file mode 100644 index a549a57..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.sch +++ /dev/null @@ -1,183 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 21 May 2013 11:13:50 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "21 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 7050 3300 7050 2950 -Wire Wire Line - 6450 3300 6350 3300 -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 3400 5350 4200 -Connection ~ 5300 3200 -Wire Wire Line - 5300 2950 5300 3200 -Wire Wire Line - 5250 3200 5350 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 7050 3300 6950 3300 -Wire Wire Line - 7050 2950 6400 2950 -$Comp -L R RL -U 1 1 516D1D5E -P 6700 3300 -F 0 "RL" V 6780 3300 50 0000 C CNN -F 1 "100k" V 6700 3300 50 0000 C CNN - 1 6700 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG01" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7350 3300 -F 0 "U3" H 7200 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN - 1 7350 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG02" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R Rf -U 1 1 516D0FE2 -P 6150 2950 -F 0 "Rf" V 6230 2950 50 0000 C CNN -F 1 "1000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516D0FD3 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "10" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR03" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "10" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.pro deleted file mode 100644 index 1f35813..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Wednesday 15 May 2013 09:42:35 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 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-.ends ua741 \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/analysis deleted file mode 100644 index 35318bb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 10e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.bak deleted file mode 100644 index c4ca8fc..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.bak +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 17 April 2013 12:43:16 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 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1 2900 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516D264E -P 4150 4400 -F 0 "U3" H 4000 4500 50 0000 C CNN -F 1 "IPLOT" H 4300 4500 50 0000 C CNN - 1 4150 4400 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D2648 -P 4150 3450 -F 0 "U2" H 4000 3550 50 0000 C CNN -F 1 "IPLOT" H 4300 3550 50 0000 C CNN - 1 4150 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 516D2600 -P 4800 4050 -F 0 "R5" V 4880 4050 50 0000 C CNN -F 1 "R" V 4800 4050 50 0000 C CNN - 1 4800 4050 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 516D25EC -P 4800 3850 -F 0 "R4" V 4880 3850 50 0000 C CNN -F 1 "R" V 4800 3850 50 0000 C CNN - 1 4800 3850 - 0 1 1 0 -$EndComp -$Comp -L UA741 X3 -U 1 1 516D25CD -P 5650 3950 -F 0 "X3" H 5800 4100 60 0000 C CNN -F 1 "UA741" H 5800 4200 60 0000 C CNN - 1 5650 3950 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir deleted file mode 100644 index 4788ef3..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir +++ /dev/null @@ -1,24 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 17 April 2013 12:47:21 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v2 5 0 10V -v1 9 0 20V -U1 3 4 6 2 11 VPLOT8_1 -R6 0 7 R -R3 4 12 R -R2 3 8 R -R1 4 3 R -R7 11 10 R -U4 13 10 IPLOT -X2 4 5 12 UA741 -X1 3 9 8 UA741 -U3 12 2 IPLOT -U2 8 6 IPLOT -R5 7 2 R -R4 13 6 R -X3 13 7 11 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.ckt deleted file mode 100644 index 2fc3967..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.ckt +++ /dev/null @@ -1,26 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 17 april 2013 12:47:21 pm ist -.include ua741.sub - -v2 5 0 10v -v1 9 0 20v -* Plotting option vplot8_1 -r6 0 7 r -r3 4 12 r -r2 3 8 r -r1 4 3 r -r7 11 10 r -V_u4 13 10 0 -x2 4 5 12 ua741 -x1 3 9 8 ua741 -V_u3 12 2 0 -V_u2 8 6 0 -r5 7 2 r -r4 13 6 r -x3 13 7 11 ua741 - -.dc v1 0e-00 10e-00 5e-03 -.plot v(3) v(4) v(6) v(2) v(11) -.plot i(V_u4) -.plot i(V_u3) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.out deleted file mode 100644 index 98912a5..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.out +++ /dev/null @@ -1,31 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 17 april 2013 12:47:21 pm ist -.include ua741.sub - -v2 5 0 10v -v1 9 0 20v -* Plotting option vplot8_1 -r6 0 7 r -r3 4 12 r -r2 3 8 r -r1 4 3 r -r7 11 10 r -V_u4 13 10 0 -x2 4 5 12 ua741 -x1 3 9 8 ua741 -V_u3 12 2 0 -V_u2 8 6 0 -r5 7 2 r -r4 13 6 r -x3 13 7 11 ua741 - -.dc v1 0e-00 10e-00 5e-03 - -* Control Statements -.control -run -plot v(3) v(4) v(6) v(2) v(11) -plot i(V_u4) -plot i(V_u3) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.pro deleted file mode 100644 index ac34f0e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 03:49:31 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.proj deleted file mode 100644 index 799253b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.4.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.sch deleted file mode 100644 index 8b83c0d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.sch +++ /dev/null @@ -1,345 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 17 April 2013 12:47:25 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 1400 6300 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D2826 -P 1400 6300 -F 0 "#FLG01" H 1400 6570 30 0001 C CNN -F 1 "PWR_FLAG" H 1400 6530 30 0000 C CNN - 1 1400 6300 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516D27F8 -P 1400 6450 -F 0 "#PWR02" H 1400 6450 30 0001 C CNN -F 1 "GND" H 1400 6380 30 0001 C CNN - 1 1400 6450 - 1 0 0 -1 -$EndComp -Connection ~ 1400 6100 -Wire Wire Line - 1400 6100 1400 6450 -Connection ~ 2400 3250 -Connection ~ 4500 3450 -Connection ~ 4500 4400 -Connection ~ 6750 3900 -Wire Wire Line - 5100 4700 5100 4850 -Wire Wire Line - 1600 5200 1600 5000 -Wire Wire Line - 1600 5000 2400 5000 -Connection ~ 3650 4900 -Wire Wire Line - 3900 4400 3900 4900 -Wire Wire Line - 3900 4900 3400 4900 -Connection ~ 2400 4500 -Wire Wire Line - 2400 4500 2600 4500 -Wire Wire Line - 3650 3000 3650 3550 -Wire Wire Line - 3650 3550 3100 3550 -Wire Wire Line - 2400 4250 2400 4800 -Wire Wire Line - 6750 3900 6750 3950 -Wire Wire Line - 6750 3950 6150 3950 -Wire Wire Line - 5300 3350 5100 3350 -Connection ~ 5100 3850 -Wire Wire Line - 5100 3350 5100 3850 -Wire Wire Line - 4400 3450 4550 3450 -Wire Wire Line - 4550 3450 4550 3850 -Wire Wire Line - 5150 3850 5050 3850 -Wire Wire Line - 5150 4050 5050 4050 -Wire Wire Line - 4550 4050 4550 4400 -Wire Wire Line - 4550 4400 4400 4400 -Wire Wire Line - 5800 3350 5950 3350 -Wire Wire Line - 6450 3350 6450 3950 -Connection ~ 6450 3950 -Wire Wire Line - 2400 3750 2400 3100 -Wire Wire Line - 2400 3550 2600 3550 -Connection ~ 2400 3550 -Wire Wire Line - 3400 3000 3900 3000 -Wire Wire Line - 3900 3000 3900 3450 -Connection ~ 3650 3000 -Wire Wire Line - 3100 4500 3650 4500 -Wire Wire Line - 3650 4500 3650 4900 -Wire Wire Line - 2400 2900 1150 2900 -Wire Wire Line - 1150 2900 1150 3600 -Wire Wire Line - 5100 4050 5100 4200 -Connection ~ 5100 4050 -Wire Wire Line - 1150 4500 1150 6100 -Wire Wire Line - 1150 6100 1600 6100 -$Comp -L DC v2 -U 1 1 516D27D5 -P 1600 5650 -F 0 "v2" H 1400 5750 60 0000 C CNN -F 1 "10V" H 1400 5600 60 0000 C CNN -F 2 "R1" H 1300 5650 60 0000 C CNN - 1 1600 5650 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 516D27D0 -P 1150 4050 -F 0 "v1" H 950 4150 60 0000 C CNN -F 1 "20V" H 950 4000 60 0000 C CNN -F 2 "R1" H 850 4050 60 0000 C CNN - 1 1150 4050 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 516D27AE -P 2400 4200 -F 0 "U1" H 2250 4300 50 0000 C CNN -F 1 "VPLOT8_1" H 2550 4300 50 0000 C CNN - 2 2400 4200 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 516D27A5 -P 2400 3250 -F 0 "U1" H 2250 3350 50 0000 C CNN -F 1 "VPLOT8_1" H 2550 3350 50 0000 C CNN - 1 2400 3250 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 5 1 516D278E -P 6750 3600 -F 0 "U1" H 6600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 6900 3700 50 0000 C CNN - 5 6750 3600 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 4 1 516D2789 -P 4500 4100 -F 0 "U1" H 4350 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 4650 4200 50 0000 C CNN - 4 4500 4100 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 3 1 516D2785 -P 4500 3150 -F 0 "U1" H 4350 3250 50 0000 C CNN -F 1 "VPLOT8_1" H 4650 3250 50 0000 C CNN - 3 4500 3150 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D274C -P 5100 4850 -F 0 "#PWR03" H 5100 4850 30 0001 C CNN -F 1 "GND" H 5100 4780 30 0001 C CNN - 1 5100 4850 - 1 0 0 -1 -$EndComp -$Comp -L R R6 -U 1 1 516D2736 -P 5100 4450 -F 0 "R6" V 5180 4450 50 0000 C CNN -F 1 "R" V 5100 4450 50 0000 C CNN - 1 5100 4450 - -1 0 0 1 -$EndComp -$Comp -L R R3 -U 1 1 516D26F4 -P 2850 4500 -F 0 "R3" V 2930 4500 50 0000 C CNN -F 1 "R" V 2850 4500 50 0000 C CNN - 1 2850 4500 - 0 -1 -1 0 -$EndComp -$Comp -L R R2 -U 1 1 516D26CE -P 2850 3550 -F 0 "R2" V 2930 3550 50 0000 C CNN -F 1 "R" V 2850 3550 50 0000 C CNN - 1 2850 3550 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 516D26AE -P 2400 4000 -F 0 "R1" V 2480 4000 50 0000 C CNN -F 1 "R" V 2400 4000 50 0000 C CNN - 1 2400 4000 - -1 0 0 1 -$EndComp -$Comp -L R R7 -U 1 1 516D268C -P 6200 3350 -F 0 "R7" V 6280 3350 50 0000 C CNN -F 1 "R" V 6200 3350 50 0000 C CNN - 1 6200 3350 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516D267F -P 5550 3350 -F 0 "U4" H 5400 3450 50 0000 C CNN -F 1 "IPLOT" H 5700 3450 50 0000 C CNN - 1 5550 3350 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X2 -U 1 1 516D2661 -P 2900 4900 -F 0 "X2" H 3050 5050 60 0000 C CNN -F 1 "UA741" H 3050 5150 60 0000 C CNN - 1 2900 4900 - 1 0 0 1 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D2656 -P 2900 3000 -F 0 "X1" H 3050 3150 60 0000 C CNN -F 1 "UA741" H 3050 3250 60 0000 C CNN - 1 2900 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516D264E -P 4150 4400 -F 0 "U3" H 4000 4500 50 0000 C CNN -F 1 "IPLOT" H 4300 4500 50 0000 C CNN - 1 4150 4400 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D2648 -P 4150 3450 -F 0 "U2" H 4000 3550 50 0000 C CNN -F 1 "IPLOT" H 4300 3550 50 0000 C CNN - 1 4150 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 516D2600 -P 4800 4050 -F 0 "R5" V 4880 4050 50 0000 C CNN -F 1 "R" V 4800 4050 50 0000 C CNN - 1 4800 4050 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 516D25EC -P 4800 3850 -F 0 "R4" V 4880 3850 50 0000 C CNN -F 1 "R" V 4800 3850 50 0000 C CNN - 1 4800 3850 - 0 1 1 0 -$EndComp -$Comp -L UA741 X3 -U 1 1 516D25CD -P 5650 3950 -F 0 "X3" H 5800 4100 60 0000 C CNN -F 1 "UA741" H 5800 4200 60 0000 C CNN - 1 5650 3950 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.pro deleted file mode 100644 index 0d94955..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Wednesday 17 April 2013 12:46:01 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 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-.ends ua741 \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/analysis deleted file mode 100644 index c9183fa..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 10e-03 20e-03 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.bak deleted file mode 100644 index 79f0251..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 17 April 2013 11:57:44 AM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 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1 4050 3650 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 6350 3300 7050 3300 -Wire Wire Line - 6400 2950 7050 2950 -Connection ~ 7050 3300 -Connection ~ 6350 3300 -Connection ~ 5350 4100 -Wire Wire Line - 4150 3200 4050 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 5300 2950 5300 3200 -Connection ~ 5300 3200 -Wire Wire Line - 5350 4200 5350 3400 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 7050 2950 7050 3300 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG01" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7350 3300 -F 0 "U3" H 7200 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN - 1 7350 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG02" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "9000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR03" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir deleted file mode 100644 index cbcca2f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 17 April 2013 12:50:50 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -R3 6 0 1000 -v1 5 0 SINE -U3 6 VPLOT8_1 -U1 4 2 IPLOT -U2 2 3 IPLOT -R2 6 3 9000 -R1 4 5 1000 -X1 2 0 6 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.ckt deleted file mode 100644 index 6843d47..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 17 april 2013 12:50:50 pm ist -.include ua741.sub - -r3 6 0 1000 -v1 5 0 sine(0 5 50 0 0) -* Plotting option vplot8_1 -V_u1 4 2 0 -V_u2 2 3 0 -r2 6 3 9000 -r1 4 5 1000 -x1 2 0 6 ua741 - -.tran 10e-03 20e-03 0e-00 -.plot v(6) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.out deleted file mode 100644 index 9e60789..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 17 april 2013 12:50:50 pm ist -.include ua741.sub - -r3 6 0 1000 -v1 5 0 sine(0 5 50 0 0) -* Plotting option vplot8_1 -V_u1 4 2 0 -V_u2 2 3 0 -r2 6 3 9000 -r1 4 5 1000 -x1 2 0 6 ua741 - -.tran 10e-03 20e-03 0e-00 - -* Control Statements -.control -run -plot v(6) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.pro deleted file mode 100644 index ead436b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Wednesday 17 April 2013 11:37:31 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.proj deleted file mode 100644 index 8554126..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.6.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.sch deleted file mode 100644 index 73864f6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.sch +++ /dev/null @@ -1,183 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 17 April 2013 12:50:53 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.6-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 4050 4100 7050 4100 -Wire Wire Line - 7050 4100 7050 4000 -Wire Wire Line - 7050 3300 6350 3300 -Wire Wire Line - 6400 2950 7050 2950 -Connection ~ 7050 3300 -Connection ~ 6350 3300 -Connection ~ 5350 4100 -Wire Wire Line - 4150 3200 4050 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 5300 2950 5300 3200 -Connection ~ 5300 3200 -Wire Wire Line - 5350 4200 5350 3400 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 7050 2950 7050 3500 -$Comp -L R R3 -U 1 1 516E4D07 -P 7050 3750 -F 0 "R3" V 7130 3750 50 0000 C CNN -F 1 "1000" V 7050 3750 50 0000 C CNN - 1 7050 3750 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 516E3BC9 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "SINE" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG01" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7350 3300 -F 0 "U3" H 7200 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN - 1 7350 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG02" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "9000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR03" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.pro deleted file mode 100644 index 1235eb1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Wednesday 17 April 2013 12:51:39 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 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2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.sub b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741 \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/analysis deleted file mode 100644 index 234e759..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/analysis +++ /dev/null @@ -1,8 +0,0 @@ - -.ac lin 10 1Hz 1Meg - - -.end -.control -run -.endc diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.bak deleted file mode 100644 index bef6862..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.bak +++ /dev/null @@ -1,127 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 10:40:53 PM IST -#encoding utf-8 -# -# AC -# -DEF AC AC 0 40 Y Y 1 F N -F0 "AC" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 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1 4050 3650 - 1 0 0 -1 -$EndComp -Wire Wire Line - 7050 3500 7050 2950 -Connection ~ 6500 2950 -Wire Wire Line - 6500 2950 6500 2550 -Wire Wire Line - 6500 2550 6300 2550 -Connection ~ 5300 2950 -Wire Wire Line - 5300 2550 5300 3200 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 4200 5350 3400 -Connection ~ 5300 3200 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 7050 2950 6400 2950 -Wire Wire Line - 6350 3300 7050 3300 -Wire Wire Line - 5800 2550 5900 2550 -Wire Wire Line - 4050 4100 7050 4100 -Wire Wire Line - 7050 4100 7050 4000 -Connection ~ 7050 3400 -$Comp -L R R3 -U 1 1 516E71B7 -P 7050 3750 -F 0 "R3" V 7130 3750 50 0000 C CNN -F 1 "R" V 7050 3750 50 0000 C CNN - 1 7050 3750 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG2 -U 1 1 516E6E61 -P 5350 4100 -F 0 "#FLG2" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - -1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516E6E43 -P 7350 3400 -F 0 "U3" H 7200 3500 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3500 50 0000 C CNN - 1 7350 3400 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG1" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L C C1 -U 1 1 516E6B62 -P 6100 2550 -F 0 "C1" H 6150 2650 50 0000 L CNN -F 1 "1.59n" H 6150 2450 50 0000 L CNN - 1 6100 2550 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516E6B56 -P 5550 2550 -F 0 "U4" H 5400 2650 50 0000 C CNN -F 1 "IPLOT" H 5700 2650 50 0000 C CNN - 1 5550 2550 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "10000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR1" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir deleted file mode 100644 index 944330f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 15 May 2013 10:41:20 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 6 0 AC -R3 7 0 R -U3 7 VPLOT8_1 -C1 7 3 1.59n -U4 1 3 IPLOT -U1 5 1 IPLOT -U2 1 4 IPLOT -R2 7 4 10000 -R1 5 6 1000 -X1 1 0 7 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.ckt deleted file mode 100644 index 28de072..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.ckt +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 10:41:20 pm ist -.include ua741.sub - -v1 6 0 ac 1 -r3 7 0 r -* Plotting option vplot8_1 -c1 7 3 1.59n -V_u4 1 3 0 -V_u1 5 1 0 -V_u2 1 4 0 -r2 7 4 10000 -r1 5 6 1000 -x1 1 0 7 ua741 - -.ac lin 10 1Hz 1Meg -.plot v(7) -.plot i(V_u4) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.out deleted file mode 100644 index 9002bf8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.out +++ /dev/null @@ -1,25 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 10:41:20 pm ist -.include ua741.sub - -v1 6 0 ac 1 -r3 7 0 r -* Plotting option vplot8_1 -c1 7 3 1.59n -V_u4 1 3 0 -V_u1 5 1 0 -V_u2 1 4 0 -r2 7 4 10000 -r1 5 6 1000 -x1 1 0 7 ua741 - -.ac lin 10 1Hz 1Meg - -* Control Statements -.control -run -plot v(7) -plot i(V_u4) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.pro deleted file mode 100644 index a2b4ce1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Wednesday 17 April 2013 12:56:50 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.proj deleted file mode 100644 index 304c734..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.7.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.sch deleted file mode 100644 index d7677e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.sch +++ /dev/null @@ -1,210 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 15 May 2013 10:41:23 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.7-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L AC v1 -U 1 1 5193C186 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "AC" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -Wire Wire Line - 7050 3500 7050 2950 -Connection ~ 6500 2950 -Wire Wire Line - 6500 2950 6500 2550 -Wire Wire Line - 6500 2550 6300 2550 -Connection ~ 5300 2950 -Wire Wire Line - 5300 2550 5300 3200 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 4200 5350 3400 -Connection ~ 5300 3200 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 7050 2950 6400 2950 -Wire Wire Line - 6350 3300 7050 3300 -Wire Wire Line - 5800 2550 5900 2550 -Wire Wire Line - 4050 4100 7050 4100 -Wire Wire Line - 7050 4100 7050 4000 -Connection ~ 7050 3400 -$Comp -L R R3 -U 1 1 516E71B7 -P 7050 3750 -F 0 "R3" V 7130 3750 50 0000 C CNN -F 1 "R" V 7050 3750 50 0000 C CNN - 1 7050 3750 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516E6E61 -P 5350 4100 -F 0 "#FLG01" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - -1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516E6E43 -P 7350 3400 -F 0 "U3" H 7200 3500 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3500 50 0000 C CNN - 1 7350 3400 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG02" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L C C1 -U 1 1 516E6B62 -P 6100 2550 -F 0 "C1" H 6150 2650 50 0000 L CNN -F 1 "1.59n" H 6150 2450 50 0000 L CNN - 1 6100 2550 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516E6B56 -P 5550 2550 -F 0 "U4" H 5400 2650 50 0000 C CNN -F 1 "IPLOT" H 5700 2650 50 0000 C CNN - 1 5550 2550 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "10000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR03" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.pro deleted file mode 100644 index 9aa118e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.pro +++ /dev/null @@ -1,72 +0,0 @@ -update=Monday 17 December 2012 06:14:06 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 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1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 516E8BE7 -P 6100 2600 -F 0 "C1" H 6150 2700 50 0000 L CNN -F 1 "10n" H 6150 2500 50 0000 L CNN - 1 6100 2600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516E8BCF -P 5550 2600 -F 0 "U4" H 5400 2700 50 0000 C CNN -F 1 "IPLOT" H 5700 2700 50 0000 C CNN - 1 5550 2600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG2 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG2" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7350 3300 -F 0 "U3" H 7200 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN - 1 7350 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG1" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "1000000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR1" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "10000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir deleted file mode 100644 index b53502b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 18 April 2013 10:25:46 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U5 5 0 VPLOT8 -v1 5 0 PULSE -C1 6 1 10n -U4 2 1 IPLOT -U3 6 VPLOT8_1 -U1 4 2 IPLOT -U2 2 3 IPLOT -R2 6 3 1000000 -R1 4 5 10000 -X1 2 0 6 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.ckt deleted file mode 100644 index 63570ef..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.ckt +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 18 april 2013 10:25:46 am ist -.include ua741.sub - -v1 5 0 pulse(1 0 0 0 0 0.001 0.002) -c1 6 1 10n -V_u4 2 1 0 -* Plotting option vplot8_1 -V_u1 4 2 0 -V_u2 2 3 0 -r2 6 3 1000000 -r1 4 5 10000 -x1 2 0 6 ua741 - -.tran 1e-03 2e-03 0e-00 -.plot v(5) -.plot i(V_u4) -.plot v(6) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.out deleted file mode 100644 index ed95f2f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.out +++ /dev/null @@ -1,25 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 18 april 2013 10:25:46 am ist -.include ua741.sub - -v1 5 0 pulse(1 0 0 0 0 0.001 0.002) -c1 6 1 10n -V_u4 2 1 0 -* Plotting option vplot8_1 -V_u1 4 2 0 -V_u2 2 3 0 -r2 6 3 1000000 -r1 4 5 10000 -x1 2 0 6 ua741 - -.tran 1e-03 2e-03 0e-00 - -* Control Statements -.control -run -plot v(5) -plot i(V_u4) -plot v(6) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.pro deleted file mode 100644 index 62130f3..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Wednesday 17 April 2013 05:14:42 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.proj deleted file mode 100644 index a7ce942..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.8.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.sch deleted file mode 100644 index 976a836..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.sch +++ /dev/null @@ -1,214 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 18 April 2013 10:25:50 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.8-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "18 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 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1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "1000000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR02" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "10000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.pro deleted file mode 100644 index 9aa118e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.pro +++ /dev/null @@ -1,72 +0,0 @@ -update=Monday 17 December 2012 06:14:06 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.sub b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741 \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/analysis deleted file mode 100644 index 48302a3..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 2e-03 4e-03 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir deleted file mode 100644 index d30b232..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir +++ /dev/null @@ -1,24 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 18 April 2013 10:53:39 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 4 0 PULSE -v2 11 0 10V -U3 8 3 VPLOT8_1 -R5 13 3 10000 -R4 0 13 10000 -R3 1 11 10000 -U5 8 2 IPLOT -Q2 1 1 2 NPN -X2 1 13 3 UA741 -U4 10 8 IPLOT -Q1 10 0 9 NPN -U1 6 7 IPLOT -U2 7 9 IPLOT -R2 8 5 10000 -R1 6 4 1000 -X1 7 0 5 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.ckt deleted file mode 100644 index 0decb7c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.ckt +++ /dev/null @@ -1,27 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 18 april 2013 10:53:39 am ist -.include ua741.sub - -v1 4 0 pulse(0 1 0.002 0.004) -v2 11 0 10v -* Plotting option vplot8_1 -r5 13 3 10000 -r4 0 13 10000 -r3 1 11 10000 -V_u5 8 2 0 -q2 2 1 1 npn -x2 1 13 3 ua741 -V_u4 10 8 0 -q1 10 0 9 npn -V_u1 6 7 0 -V_u2 7 9 0 -r2 8 5 10000 -r1 6 4 1000 -x1 7 0 5 ua741 - -.tran 2e-03 4e-03 0e-00 -.plot v(8) v(3) -.plot i(V_u5) -.plot i(V_u4) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.out deleted file mode 100644 index f4b917f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.out +++ /dev/null @@ -1,32 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 18 april 2013 10:53:39 am ist -.include ua741.sub - -v1 4 0 pulse(0 1 0.002 0.004) -v2 11 0 10v -* Plotting option vplot8_1 -r5 13 3 10000 -r4 0 13 10000 -r3 1 11 10000 -V_u5 8 2 0 -q2 2 1 1 npn -x2 1 13 3 ua741 -V_u4 10 8 0 -q1 10 0 9 npn -V_u1 6 7 0 -V_u2 7 9 0 -r2 8 5 10000 -r1 6 4 1000 -x1 7 0 5 ua741 - -.tran 2e-03 4e-03 0e-00 - -* Control Statements -.control -run -plot v(8) v(3) -plot i(V_u5) -plot i(V_u4) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.pro deleted file mode 100644 index 6a09490..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Thursday 18 April 2013 10:31:10 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.proj deleted file mode 100644 index da8b8d1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.9.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.sch deleted file mode 100644 index 481506c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.sch +++ /dev/null @@ -1,324 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 18 April 2013 10:52:19 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "18 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L GND #PWR01 -U 1 1 516F8096 -P 6150 2850 -F 0 "#PWR01" H 6150 2850 30 0001 C CNN -F 1 "GND" H 6150 2780 30 0001 C CNN - 1 6150 2850 - 1 0 0 -1 -$EndComp -Connection ~ 6150 2750 -$Comp -L PWR_FLAG #FLG02 -U 1 1 516F807F -P 6150 2750 -F 0 "#FLG02" H 6150 3020 30 0001 C CNN -F 1 "PWR_FLAG" H 6150 2980 30 0000 C CNN - 1 6150 2750 - 0 -1 -1 0 -$EndComp -Wire Wire Line - 6150 2700 6150 2850 -Wire Wire Line - 10200 3750 10200 5050 -Wire Wire Line - 10200 2850 10200 2400 -Wire Wire Line - 10200 2400 8100 2400 -Wire Wire Line - 9250 3700 9400 3700 -Wire Wire Line - 8250 3800 8250 4100 -Connection ~ 8100 3300 -Wire Wire Line - 8100 3050 8100 3600 -Wire Wire Line - 7900 3600 8250 3600 -Wire Wire Line - 7150 3300 6950 3300 -Wire Wire Line - 6350 2400 6400 2400 -Wire Wire Line - 5300 2400 5300 3200 -Wire Wire Line - 6350 3300 6450 3300 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 4200 5350 3400 -Connection ~ 5300 3200 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 5800 2400 5950 2400 -Wire Wire Line - 6900 2400 7050 2400 -Wire Wire Line - 7050 2400 7050 3300 -Wire Wire Line - 7650 3300 7700 3300 -Connection ~ 8100 3600 -Wire Wire Line - 8100 2400 8100 2550 -Wire Wire Line - 8250 4000 8450 4000 -Connection ~ 8250 4000 -Wire Wire Line - 9300 3700 9300 4000 -Wire Wire Line - 9300 4000 8950 4000 -Connection ~ 9300 3700 -Connection ~ 9400 3700 -Connection ~ 8100 2400 -Wire Wire Line - 10200 5050 8250 5050 -Wire Wire Line - 8250 5250 8250 4600 -Connection ~ 8250 5050 -Connection ~ 8250 5150 -$Comp -L GND #PWR03 -U 1 1 516F8034 -P 8250 5250 -F 0 "#PWR03" H 8250 5250 30 0001 C CNN -F 1 "GND" H 8250 5180 30 0001 C CNN - 1 8250 5250 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 516F801F -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "PULSE" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 516F7FED -P 10200 3300 -F 0 "v2" H 10000 3400 60 0000 C CNN -F 1 "10V" H 10000 3250 60 0000 C CNN -F 2 "R1" H 9900 3300 60 0000 C CNN - 1 10200 3300 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 516F7F85 -P 9400 4000 -F 0 "U3" H 9250 4100 50 0000 C CNN -F 1 "VPLOT8_1" H 9550 4100 50 0000 C CNN - 2 9400 4000 - -1 0 0 1 -$EndComp -$Comp -L R R5 -U 1 1 516F7F66 -P 8700 4000 -F 0 "R5" V 8780 4000 50 0000 C CNN -F 1 "10000" V 8700 4000 50 0000 C CNN - 1 8700 4000 - 0 -1 -1 0 -$EndComp -$Comp -L R R4 -U 1 1 516F7F56 -P 8250 4350 -F 0 "R4" V 8330 4350 50 0000 C CNN -F 1 "10000" V 8250 4350 50 0000 C CNN - 1 8250 4350 - -1 0 0 1 -$EndComp -$Comp -L R R3 -U 1 1 516F7F35 -P 8100 2800 -F 0 "R3" V 8180 2800 50 0000 C CNN -F 1 "10000" V 8100 2800 50 0000 C CNN - 1 8100 2800 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U5 -U 1 1 516F7EEB -P 7400 3300 -F 0 "U5" H 7250 3400 50 0000 C CNN -F 1 "IPLOT" H 7550 3400 50 0000 C CNN - 1 7400 3300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q2 -U 1 1 516F7EDC -P 7900 3400 -F 0 "Q2" H 7900 3250 50 0000 R CNN -F 1 "NPN" H 7900 3550 50 0000 R CNN - 1 7900 3400 - 0 -1 -1 0 -$EndComp -$Comp -L UA741 X2 -U 1 1 516F7ED1 -P 8750 3700 -F 0 "X2" H 8900 3850 60 0000 C CNN -F 1 "UA741" H 8900 3950 60 0000 C CNN - 1 8750 3700 - 1 0 0 1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516F7EB1 -P 6650 2400 -F 0 "U4" H 6500 2500 50 0000 C CNN -F 1 "IPLOT" H 6800 2500 50 0000 C CNN - 1 6650 2400 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516F7E9D -P 6150 2500 -F 0 "Q1" H 6150 2350 50 0000 R CNN -F 1 "NPN" H 6150 2650 50 0000 R CNN - 1 6150 2500 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7050 3600 -F 0 "U3" H 6900 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 7200 3700 50 0000 C CNN - 1 7050 3600 - -1 0 0 1 -$EndComp -$Comp -L PWR_FLAG #FLG04 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG04" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2400 -F 0 "U2" H 5400 2500 50 0000 C CNN -F 1 "IPLOT" H 5700 2500 50 0000 C CNN - 1 5550 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6700 3300 -F 0 "R2" V 6780 3300 50 0000 C CNN -F 1 "10000" V 6700 3300 50 0000 C CNN - 1 6700 3300 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR05 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR05" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.pro deleted file mode 100644 index df98e42..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Thursday 18 April 2013 01:48:22 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 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-.ends ua741 \ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/analysis b/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/analysis deleted file mode 100644 index 0e8f996..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 2e-03 20e-03 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.bak b/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.bak deleted file mode 100644 index 6284625..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.bak +++ /dev/null @@ -1,98 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 22 April 2013 12:05:40 PM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - 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-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 8 7 VPLOT8_1 -v1 2 0 SINE -R6 3 6 10k -R1 1 2 10k -C1 6 1 1m -R3 6 0 15k -R9 7 0 1k -C2 11 0 1m -R7 4 9 8k -R8 8 0 3.4k -C4 7 9 1m -R5 11 0 870 -R4 4 10 10k -v2 4 0 12 -C3 8 3 1m -R2 4 6 100k -Q2 8 10 9 NPN -Q1 11 6 10 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.ckt deleted file mode 100644 index d627f6f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.ckt +++ /dev/null @@ -1,24 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 23 april 2013 12:03:40 pm ist - -* Plotting option vplot8_1 -v1 2 0 sine(0 1 50 ) -r6 3 6 10k -r1 1 2 10k -c1 6 1 1m -r3 6 0 15k -r9 7 0 1k -c2 11 0 1m -r7 4 9 8k -r8 8 0 3.4k -c4 7 9 1m -r5 11 0 870 -r4 4 10 10k -v2 4 0 12 -c3 8 3 1m -r2 4 6 100k -q2 9 10 8 npn -q1 10 6 11 npn - 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1 4750 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 517794C9 -P 5800 1900 -F 0 "R5" V 5880 1900 50 0000 C CNN -F 1 "10k" V 5800 1900 50 0000 C CNN - 1 5800 1900 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 517794BE -P 4750 1900 -F 0 "R3" V 4830 1900 50 0000 C CNN -F 1 "10k" V 4750 1900 50 0000 C CNN - 1 4750 1900 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q2 -U 1 1 5177949E -P 5900 2700 -F 0 "Q2" H 5900 2550 50 0000 R CNN -F 1 "NPN" H 5900 2850 50 0000 R CNN - 1 5900 2700 - -1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 51779433 -P 3850 5000 -F 0 "R2" V 3930 5000 50 0000 C CNN -F 1 "R" V 3850 5000 50 0000 C CNN - 1 3850 5000 - 0 1 1 0 -$EndComp -$Comp -L DC v3 -U 1 1 51779424 -P 6600 3300 -F 0 "v3" H 6400 3400 60 0000 C CNN -F 1 "15" H 6400 3250 60 0000 C CNN -F 2 "R1" H 6300 3300 60 0000 C CNN - 1 6600 3300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 51779415 -P 4650 2700 -F 0 "Q1" H 4650 2550 50 0000 R CNN -F 1 "NPN" H 4650 2850 50 0000 R CNN - 1 4650 2700 - 1 0 0 -1 -$EndComp -$Comp -L IDC v2 -U 1 1 5177940C -P 5300 4300 -F 0 "v2" H 5100 4400 60 0000 C CNN -F 1 "1m" H 5100 4250 60 0000 C CNN -F 2 "R1" H 5000 4300 60 0000 C CNN - 1 5300 4300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir deleted file mode 100644 index b1cc053..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir +++ /dev/null @@ -1,21 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 25 April 2013 11:19:59 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -R7 9 0 150 -v1 2 5 SINE -U1 1 11 VPLOT8 -R1 8 2 5k -R6 3 9 150 -R4 7 9 150 -R5 12 11 10k -R3 12 1 10k -Q2 3 4 11 NPN -R2 4 5 R -v3 12 6 15 -Q1 7 8 1 NPN -v2 9 6 1m - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.ckt deleted file mode 100644 index d42cb97..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 11:19:59 am ist - -r7 9 0 150 -v1 2 5 sine( 5 50 ) -r1 8 2 5k -r6 3 9 150 -r4 7 9 150 -r5 12 11 10k -r3 12 1 10k -q2 11 4 3 npn -r2 4 5 r -v3 12 6 15 -q1 1 8 7 npn -v2 9 6 1m - -.tran 2e-03 20e-03 0e-00 -.plot v(1)-v(11) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.out b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.out deleted file mode 100644 index 95b8ceb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 11:19:59 am ist - -r7 9 0 150 -v1 2 5 sine( 5 50 ) -r1 8 2 5k -r6 3 9 150 -r4 7 9 150 -r5 12 11 10k -r3 12 1 10k -q2 11 4 3 npn -r2 4 5 r -v3 12 6 15 -q1 1 8 7 npn -v2 9 6 1m - -.tran 2e-03 20e-03 0e-00 - -* Control Statements -.control -run -plot v(1)-v(11) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.pro b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.pro deleted file mode 100644 index 71bd9f1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Thursday 18 April 2013 03:16:09 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.proj b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.proj deleted file mode 100644 index fe0de23..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_8.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.sch b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.sch deleted file mode 100644 index 06b9dfa..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.sch +++ /dev/null @@ -1,245 +0,0 @@ -EESchema Schematic File Version 2 date Friday 26 April 2013 04:42:05 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_8.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "26 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5450 5400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 5178C3EF -P 5450 5400 -F 0 "#FLG01" H 5450 5670 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5630 30 0000 C CNN - 1 5450 5400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5178C3E3 -P 5450 5500 -F 0 "#PWR02" H 5450 5500 30 0001 C CNN -F 1 "GND" H 5450 5430 30 0001 C CNN - 1 5450 5500 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5450 5300 5450 5500 -Connection ~ 6550 3150 -Wire Wire Line - 6350 3150 6550 3150 -Wire Wire Line - 4350 5050 4350 5800 -Wire Wire Line - 6850 3500 6850 5800 -Wire Wire Line - 7350 4550 7350 5550 -Wire Wire Line - 7350 5550 6050 5550 -Wire Wire Line - 5200 3500 4850 3500 -Wire Wire Line - 5500 2450 6550 2450 -Wire Wire Line - 6550 3700 6550 4000 -Wire Wire Line - 5500 3700 5500 4000 -Wire Wire Line - 5500 2950 5500 3300 -Wire Wire Line - 6550 2950 6550 3300 -Wire Wire Line - 6550 4500 5500 4500 -Wire Wire Line - 6850 5800 4850 5800 -Wire Wire Line - 6050 4500 6050 4650 -Connection ~ 6050 4500 -Wire Wire Line - 6500 2450 6500 2200 -Connection ~ 6500 2450 -Wire Wire Line - 6500 2200 7350 2200 -Wire Wire Line - 7350 2200 7350 3650 -Wire Wire Line - 4350 3500 4350 4150 -Wire Wire Line - 5750 3150 5500 3150 -Connection ~ 5500 3150 -Wire Wire Line - 6050 4600 5450 4600 -Connection ~ 6050 4600 -Wire Wire Line - 5450 4600 5450 4800 -$Comp -L R R7 -U 1 1 5178C3D2 -P 5450 5050 -F 0 "R7" V 5530 5050 50 0000 C CNN -F 1 "150" V 5450 5050 50 0000 C CNN - 1 5450 5050 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 5178C33C -P 4350 4600 -F 0 "v1" H 4150 4700 60 0000 C CNN -F 1 "SINE" H 4150 4550 60 0000 C CNN -F 2 "R1" H 4050 4600 60 0000 C CNN - 1 4350 4600 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8 U1 -U 1 1 51779652 -P 6050 3150 -F 0 "U1" H 5900 3250 50 0000 C CNN -F 1 "VPLOT8" H 6200 3250 50 0000 C CNN - 1 6050 3150 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 517794FF -P 4600 3500 -F 0 "R1" V 4680 3500 50 0000 C CNN -F 1 "5k" V 4600 3500 50 0000 C CNN - 1 4600 3500 - 0 1 1 0 -$EndComp -$Comp -L R R6 -U 1 1 517794EA -P 6550 4250 -F 0 "R6" V 6630 4250 50 0000 C CNN -F 1 "150" V 6550 4250 50 0000 C CNN - 1 6550 4250 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 517794E3 -P 5500 4250 -F 0 "R4" V 5580 4250 50 0000 C CNN -F 1 "150" V 5500 4250 50 0000 C CNN - 1 5500 4250 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 517794C9 -P 6550 2700 -F 0 "R5" V 6630 2700 50 0000 C CNN -F 1 "10k" V 6550 2700 50 0000 C CNN - 1 6550 2700 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 517794BE -P 5500 2700 -F 0 "R3" V 5580 2700 50 0000 C CNN -F 1 "10k" V 5500 2700 50 0000 C CNN - 1 5500 2700 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q2 -U 1 1 5177949E -P 6650 3500 -F 0 "Q2" H 6650 3350 50 0000 R CNN -F 1 "NPN" H 6650 3650 50 0000 R CNN - 1 6650 3500 - -1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 51779433 -P 4600 5800 -F 0 "R2" V 4680 5800 50 0000 C CNN -F 1 "R" V 4600 5800 50 0000 C CNN - 1 4600 5800 - 0 1 1 0 -$EndComp -$Comp -L DC v3 -U 1 1 51779424 -P 7350 4100 -F 0 "v3" H 7150 4200 60 0000 C CNN -F 1 "15" H 7150 4050 60 0000 C CNN -F 2 "R1" H 7050 4100 60 0000 C CNN - 1 7350 4100 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 51779415 -P 5400 3500 -F 0 "Q1" H 5400 3350 50 0000 R CNN -F 1 "NPN" H 5400 3650 50 0000 R CNN - 1 5400 3500 - 1 0 0 -1 -$EndComp -$Comp -L IDC v2 -U 1 1 5177940C -P 6050 5100 -F 0 "v2" H 5850 5200 60 0000 C CNN -F 1 "1m" H 5850 5050 60 0000 C CNN -F 2 "R1" H 5750 5100 60 0000 C CNN - 1 6050 5100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/analysis b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/analysis deleted file mode 100644 index 722124c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 15e-00 1e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.lib b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.lib deleted file mode 100644 index e93b428..0000000 Binary files a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.lib and /dev/null differ diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir deleted file mode 100644 index 7f3611e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir +++ /dev/null @@ -1,41 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 29 April 2013 11:24:11 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 0 25 0 21 25 24 22 21 VPLOT8_1 -U13 23 VPLOT8_1 -v2 0 8 15 -U14 12 6 IPLOT -U11 5 18 IPLOT -R7 7 8 3k -U15 9 7 IPLOT -Q9 9 23 6 NPN -U12 23 1 IPLOT -R6 1 8 15.7k -U9 2 8 IPLOT -U6 11 8 IPLOT -U2 10 8 IPLOT -Q6 2 25 4 NPN -U8 3 4 IPLOT -R5 12 5 2.3k -U10 19 22 IPLOT -U7 13 21 IPLOT -U4 14 24 IPLOT -U5 15 16 IPLOT -U1 17 25 IPLOT -Q8 23 22 18 NPN -R4 12 19 3k -Q7 3 21 22 NPN -Q5 3 24 12 NPN -R1 0 17 28.6k -Q1 10 25 25 NPN -Q3 11 25 16 NPN -R3 12 13 20k -Q4 15 0 21 NPN -v1 12 0 15 -R2 12 14 20k -Q2 15 0 24 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt deleted file mode 100644 index 14076b8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt +++ /dev/null @@ -1,53 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 29 april 2013 11:24:11 am ist - -* Plotting option vplot8_1 -* Plotting option vplot8_1 -v2 0 8 15 -V_u14 12 6 0 -V_u11 5 18 0 -r7 7 8 3k -V_u15 9 7 0 -q9 6 23 9 npn -V_u12 23 1 0 -r6 1 8 15.7k -V_u9 2 8 0 -V_u6 11 8 0 -V_u2 10 8 0 -q6 4 25 2 npn -V_u8 3 4 0 -r5 12 5 2.3k -V_u10 19 22 0 -V_u7 13 21 0 -V_u4 14 24 0 -V_u5 15 16 0 -V_u1 17 25 0 -q8 18 22 23 npn -r4 12 19 3k -q7 22 21 3 npn -q5 12 24 3 npn -r1 0 17 28.6k -q1 25 25 10 npn -q3 16 25 11 npn -r3 12 13 20k -q4 21 0 15 npn -v1 12 0 15 -r2 12 14 20k -q2 24 0 15 npn - -.dc v1 0e-00 15e-00 1e-00 -.plot v(0) v(25) v(0) v(21) v(25) v(24) v(22) v(21) -.plot v(23) -.plot i(V_u14) -.plot i(V_u11) -.plot i(V_u15) -.plot i(V_u12) -.plot i(V_u9) -.plot i(V_u6) -.plot i(V_u2) -.plot i(V_u8) -.plot i(V_u10) -.plot i(V_u7) -.plot i(V_u4) -.plot i(V_u5) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out deleted file mode 100644 index a08c832..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out +++ /dev/null @@ -1,58 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 29 april 2013 11:24:11 am ist - -* Plotting option vplot8_1 -* Plotting option vplot8_1 -v2 0 8 15 -V_u14 12 6 0 -V_u11 5 18 0 -r7 7 8 3k -V_u15 9 7 0 -q9 6 23 9 npn -V_u12 23 1 0 -r6 1 8 15.7k -V_u9 2 8 0 -V_u6 11 8 0 -V_u2 10 8 0 -q6 4 25 2 npn -V_u8 3 4 0 -r5 12 5 2.3k -V_u10 19 22 0 -V_u7 13 21 0 -V_u4 14 24 0 -V_u5 15 16 0 -V_u1 17 25 0 -q8 18 22 23 npn -r4 12 19 3k -q7 22 21 3 npn -q5 12 24 3 npn -r1 0 17 28.6k -q1 25 25 10 npn -q3 16 25 11 npn -r3 12 13 20k -q4 21 0 15 npn -v1 12 0 15 -r2 12 14 20k -q2 24 0 15 npn - -.dc v1 0e-00 15e-00 1e-00 - -* Control Statements -.control -run -plot v(0) v(25) v(0) v(21) v(25) v(24) v(22) v(21) -plot v(23) -plot i(V_u14) -plot i(V_u11) -plot i(V_u15) -plot i(V_u12) -plot i(V_u9) -plot i(V_u6) -plot i(V_u2) -plot i(V_u8) -plot i(V_u10) -plot i(V_u7) -plot i(V_u4) -plot i(V_u5) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro deleted file mode 100644 index 767e17f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 29 April 2013 10:50:36 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj deleted file mode 100644 index c332699..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_8.4.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch deleted file mode 100644 index cc68262..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch +++ /dev/null @@ -1,573 +0,0 @@ -EESchema Schematic File Version 2 date Monday 29 April 2013 11:24:17 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "29 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 3450 1150 -Connection ~ 3300 5050 -Connection ~ 4900 2900 -$Comp -L VPLOT8_1 U3 -U 8 1 517E0976 -P 4900 2600 -F 0 "U3" H 4750 2700 50 0000 C CNN -F 1 "VPLOT8_1" H 5050 2700 50 0000 C CNN - 8 4900 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3750 3100 -Connection ~ 3900 2550 -Connection ~ 4000 3000 -Connection ~ 4750 2600 -Connection ~ 5500 2950 -Connection ~ 3900 4150 -$Comp -L VPLOT8_1 U3 -U 5 1 517E0908 -P 3900 3850 -F 0 "U3" H 3750 3950 50 0000 C CNN -F 1 "VPLOT8_1" H 4050 3950 50 0000 C CNN - 5 3900 3850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 517E0903 -P 2950 3850 -F 0 "U3" H 2800 3950 50 0000 C CNN -F 1 "VPLOT8_1" H 3100 3950 50 0000 C CNN - 2 2950 3850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 517E08FC -P 2750 2650 -F 0 "U3" H 2600 2750 50 0000 C CNN -F 1 "VPLOT8_1" H 2900 2750 50 0000 C CNN - 1 2750 2650 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 3 1 517E08F3 -P 3750 2800 -F 0 "U3" H 3600 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 3900 2900 50 0000 C CNN - 3 3750 2800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 6 1 517E08EB -P 4000 2700 -F 0 "U3" H 3850 2800 50 0000 C CNN -F 1 "VPLOT8_1" H 4150 2800 50 0000 C CNN - 6 4000 2700 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 4 1 517E08E7 -P 3900 2250 -F 0 "U3" H 3750 2350 50 0000 C CNN -F 1 "VPLOT8_1" H 4050 2350 50 0000 C CNN - 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-* Typical - Typical Condition - -.model MbreakND NMOS -+ Level=1 Gamma= 0 Xj=0 -+ Tox=1200n Phi=.6 Rs=0 Kp=111u Vto=1.4 Lambda=0.01 -+ Rd=0 Cbd=2.0p Cbs=2.0p Pb=.8 Cgso=0.1p -+ Cgdo=0.1p Is=16.64p N=1 - -*The default W and L is 30 and 10 um respectively and AD and AS -*should not be included. - - -.model MbreakPD PMOS -+ Level=1 Gamma= 0 Xj=0 -+ Tox=1200n Phi=.6 Rs=0 Kp=55u Vto=-1.2 Lambda=0.04 -+ Rd=0 Cbd=4.0p Cbs=4.0p Pb=.8 Cgso=0.2p -+ Cgdo=0.2p Is=16.64p N=1 - -*The default W and L is 60 and 10 um respectively and AD and AS -*should not be included. diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.bak b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.bak deleted file mode 100644 index cc8bedb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.bak +++ /dev/null @@ -1,118 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 10 May 2013 04:54:25 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - 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5750 3600 5300 3600 -Wire Wire Line - 5300 3600 5300 3850 -Connection ~ 5600 3450 -Wire Wire Line - 5600 3650 5600 3450 -Wire Wire Line - 6050 3450 6400 3450 -Connection ~ 6050 4300 -Wire Wire Line - 6050 4050 6050 4350 -Wire Wire Line - 6050 4350 5100 4350 -Wire Wire Line - 6650 3900 6650 4300 -Wire Wire Line - 6050 2850 6050 2700 -Wire Wire Line - 6050 3250 6050 3650 -Wire Wire Line - 5750 3050 5750 3850 -Connection ~ 6050 3450 -Wire Wire Line - 6400 3450 6400 3750 -Connection ~ 6400 4300 -Wire Wire Line - 6050 2700 6650 2700 -Wire Wire Line - 6650 2700 6650 3000 -Wire Wire Line - 5750 3450 5100 3450 -Connection ~ 5750 3450 -Wire Wire Line - 5100 3450 5100 3550 -Wire Wire Line - 6400 4400 6400 4150 -Connection ~ 5500 3450 -Wire Wire Line - 6650 4300 6050 4300 -Connection ~ 6200 3450 -Wire Wire Line - 5600 4050 5600 4350 -Connection ~ 5600 4350 -$Comp -L MOS_N M3 -U 1 1 518CD8BE -P 5500 3850 -F 0 "M3" H 5510 4020 60 0000 R CNN -F 1 "MOS_N" H 5510 3700 60 0000 R CNN - 1 5500 3850 - 1 0 0 -1 -$EndComp -$Comp -L MOS_P M1 -U 1 1 5188E486 -P 5950 3050 -F 0 "M1" H 5950 3240 60 0000 R CNN -F 1 "MOS_P" H 5950 2870 60 0000 R CNN - 1 5950 3050 - 1 0 0 1 -$EndComp -$Comp -L MOS_N M2 -U 1 1 5188E477 -P 5950 3850 -F 0 "M2" H 5960 4020 60 0000 R CNN -F 1 "MOS_N" H 5960 3700 60 0000 R CNN - 1 5950 3850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 5188E0A2 -P 6200 3150 -F 0 "U2" H 6050 3250 50 0000 C CNN -F 1 "VPLOT8_1" H 6350 3250 50 0000 C CNN - 2 6200 3150 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5188E094 -P 6400 4300 -F 0 "#FLG01" H 6400 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 6400 4530 30 0000 C CNN - 1 6400 4300 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 517F5425 -P 6650 3450 -F 0 "v2" H 6450 3550 60 0000 C CNN -F 1 "10" H 6450 3400 60 0000 C CNN -F 2 "R1" H 6350 3450 60 0000 C CNN - 1 6650 3450 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 517F5879 -P 5500 3150 -F 0 "U2" H 5350 3250 50 0000 C CNN -F 1 "VPLOT8_1" H 5650 3250 50 0000 C CNN - 1 5500 3150 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 517F5470 -P 6400 4400 -F 0 "#PWR02" H 6400 4400 30 0001 C CNN -F 1 "GND" H 6400 4330 30 0001 C CNN - 1 6400 4400 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 517F544C -P 5100 3900 -F 0 "v1" H 4900 4000 60 0000 C CNN -F 1 "DC" H 4900 3850 60 0000 C CNN -F 2 "R1" H 4800 3900 60 0000 C CNN - 1 5100 3900 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 517F53E7 -P 6400 3950 -F 0 "C1" H 6450 4050 50 0000 L CNN -F 1 ".5p" H 6450 3850 50 0000 L CNN - 1 6400 3950 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir deleted file mode 100644 index f3aa33e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir +++ /dev/null @@ -1,14 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 16 May 2013 11:24:53 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -M1 4 3 1 MOS_P -M2 4 3 0 MOS_N -U2 3 4 VPLOT8_1 -v2 1 0 10 -v1 3 0 DC -C1 4 0 .5p - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.ckt deleted file mode 100644 index 0699b0a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.ckt +++ /dev/null @@ -1,14 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 16 may 2013 11:24:53 am ist -.include mos_p.lib -.include mos_n.lib - -m1 4 3 1 1 mos_p -m2 4 3 0 0 mos_n -* Plotting option vplot8_1 -v2 1 0 10 -v1 3 0 dc 10 -c1 4 0 .5p - -.dc v1 0e-00 10e-00 1e-00 -.plot v(3) v(4) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.out deleted file mode 100644 index 4fc3ec2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.out +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 16 may 2013 11:24:53 am ist -.include mos_p.lib -.include mos_n.lib - -m1 4 3 1 1 mos_p -m2 4 3 0 0 mos_n -* Plotting option vplot8_1 -v2 1 0 10 -v1 3 0 dc 10 -c1 4 0 .5p - -.dc v1 0e-00 10e-00 1e-00 - -* Control Statements -.control -run -plot v(3) v(4) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.pro b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.pro deleted file mode 100644 index d4ca737..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 30 April 2013 10:42:25 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.proj b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.proj deleted file mode 100644 index 8fac45c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_9.4.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.sch b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.sch deleted file mode 100644 index de8111b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.sch +++ /dev/null @@ -1,175 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 16 May 2013 11:24:57 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_9.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5750 3600 -Wire Wire Line - 6050 3450 6400 3450 -Connection ~ 6050 4300 -Wire Wire Line - 6050 4050 6050 4350 -Wire Wire Line - 6050 4350 5100 4350 -Wire Wire Line - 6650 3900 6650 4300 -Wire Wire Line - 6050 2850 6050 2700 -Wire Wire Line - 6050 3250 6050 3650 -Wire Wire Line - 5750 3050 5750 3850 -Connection ~ 6050 3450 -Wire Wire Line - 6400 3450 6400 3750 -Connection ~ 6400 4300 -Wire Wire Line - 6050 2700 6650 2700 -Wire Wire Line - 6650 2700 6650 3000 -Wire Wire Line - 5750 3450 5100 3450 -Connection ~ 5750 3450 -Wire Wire Line - 5100 3450 5100 3550 -Wire Wire Line - 6400 4400 6400 4150 -Connection ~ 5500 3450 -Wire Wire Line - 6650 4300 6050 4300 -Connection ~ 6200 3450 -$Comp -L MOS_P M1 -U 1 1 5188E486 -P 5950 3050 -F 0 "M1" H 5950 3240 60 0000 R CNN -F 1 "MOS_P" H 5950 2870 60 0000 R CNN - 1 5950 3050 - 1 0 0 1 -$EndComp -$Comp -L MOS_N M2 -U 1 1 5188E477 -P 5950 3850 -F 0 "M2" H 5960 4020 60 0000 R CNN -F 1 "MOS_N" H 5960 3700 60 0000 R CNN - 1 5950 3850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 5188E0A2 -P 6200 3150 -F 0 "U2" H 6050 3250 50 0000 C CNN -F 1 "VPLOT8_1" H 6350 3250 50 0000 C CNN - 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1 6400 3950 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/mos_n.lib b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/mos_n.lib deleted file mode 100644 index 23ac1f6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/mos_n.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model mos_n NMOS( Cgso=877.2p Tox=100n Rs=70.6m Tt=140n Vto=-3.67 -+ Pb=.8 Rg=.811 Theta=0 Phi=.6 Fc=.5 -+ Delta=0 Vmax=0 Kappa=0 Rds=444.4K Level=3 -+ L=2u Mj=.5 Uo=300 Eta=0 W=1.9 -+ Cgdo=369.3p Gamma=0 Xj=0 Rd=60.66m Cbd=2.141n -+ Is=52.23E-18 N=2 Kp=10.15u ) diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/mos_p.lib b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/mos_p.lib deleted file mode 100644 index 2c58d87..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/mos_p.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model mos_p PMOS( Cgso=877.2p Tox=100n Rs=70.6m Tt=140n Vto=-3.67 -+ Pb=.8 Rg=.811 Theta=0 Phi=.6 Fc=.5 -+ Delta=0 Vmax=0 Kappa=0 Rds=444.4K Level=3 -+ L=2u Mj=.5 Uo=300 Eta=0 W=1.9 -+ Cgdo=369.3p Gamma=0 Xj=0 Rd=60.66m Cbd=2.141n -+ Is=52.23E-18 N=2 Kp=10.15u ) \ No newline at end of file diff --git a/OSCAD/Examples/simpleTTL/analysis b/OSCAD/Examples/simpleTTL/analysis deleted file mode 100644 index bf5e632..0000000 --- a/OSCAD/Examples/simpleTTL/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 10e-09 1e-06 0e-00 diff --git a/OSCAD/Examples/simpleTTL/simpleTTL-cache.bak b/OSCAD/Examples/simpleTTL/simpleTTL-cache.bak deleted file mode 100644 index 4bb51e9..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL-cache.bak +++ /dev/null @@ -1,148 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 20 December 2012 12:04:47 AM IST -#encoding utf-8 -# -# 74LS00 -# -DEF 74LS00 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS00" 0 -100 60 H V C CNN -ALIAS 74LS37 7400 74HCT00 74HC00 -$FPLIST - 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R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.bak b/OSCAD/Examples/simpleTTL/simpleTTL.bak deleted file mode 100644 index 2bf0b11..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.bak +++ /dev/null @@ -1,166 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 20 December 2012 12:04:47 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:digitalXSpice -LIBS:analogXSpice -LIBS:simpleTTL-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5550 3450 -Wire Wire Line - 5550 3300 5550 3600 -Wire Wire Line - 2950 4600 5550 4600 -Connection ~ 4500 4600 -Wire Wire Line - 4500 4300 4500 4600 -Wire Wire Line - 3700 4600 3700 4450 -Connection ~ 2950 4600 -Wire Wire Line - 2950 3350 4150 3350 -Wire Wire Line - 2950 4250 2950 4800 -Wire Wire Line - 3700 3550 4150 3550 -Connection ~ 3700 4600 -Wire Wire Line - 4550 2900 4550 3250 -Wire Wire Line - 3450 3350 3450 3250 -Connection ~ 3450 3350 -Wire Wire Line - 5550 3450 5350 3450 -Wire Wire Line - 5550 4600 5550 4100 -$Comp -L VPLOT8_1 U2 -U 2 1 50CEBA04 -P 5550 3000 -F 0 "U2" H 5400 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5700 3100 50 0000 C CNN - 2 5550 3000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 50CEBA01 -P 3450 2950 -F 0 "U2" H 3300 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 3600 3050 50 0000 C CNN - 1 3450 2950 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50862FAD -P 4550 2900 -F 0 "#FLG01" H 4550 3170 30 0001 C CNN -F 1 "PWR_FLAG" H 4550 3130 30 0000 C CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 50862FA6 -P 4500 4300 -F 0 "#FLG02" H 4500 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 4530 30 0000 C CNN - 1 4500 4300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50862F73 -P 5550 3850 -F 0 "R1" V 5630 3850 50 0000 C CNN -F 1 "1000" V 5550 3850 50 0000 C CNN - 1 5550 3850 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 50862F55 -P 2950 3800 -F 0 "v1" H 2750 3900 60 0000 C CNN -F 1 "PULSE" H 2750 3750 60 0000 C CNN -F 2 "R1" H 2650 3800 60 0000 C CNN - 1 2950 3800 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 50862CF3 -P 2950 4800 -F 0 "#PWR03" H 2950 4800 30 0001 C CNN -F 1 "GND" H 2950 4730 30 0001 C CNN - 1 2950 4800 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 50862BA3 -P 3700 4000 -F 0 "v2" H 3500 4100 60 0000 C CNN -F 1 "5" H 3500 3950 60 0000 C CNN -F 2 "R1" H 3400 4000 60 0000 C CNN - 1 3700 4000 - 1 0 0 -1 -$EndComp -$Comp -L 7400 U1 -U 3 1 50862B5B -P 4750 3450 -F 0 "U1" H 4750 3500 60 0000 C CNN -F 1 "7400" H 4750 3350 60 0000 C CNN - 3 4750 3450 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.cir b/OSCAD/Examples/simpleTTL/simpleTTL.cir deleted file mode 100644 index b4463d3..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 02 April 2013 03:00:52 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -XU2 1 5 VPLOT8_1 -R1 5 0 1000 -v1 1 0 PULSE -v2 4 0 5 -XU1 0 5 1 4 3 7400 - -.end diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt b/OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt deleted file mode 100644 index 7bbb5a4..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 20 december 2012 12:05:00 am ist - -* Plotting option vplot8_1 -r1 5 0 1000 -v1 1 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) -v2 4 0 5 -* 7400 -a1 [1] [1_in] u1adc -a2 [4] [4_in] u1adc -a3 [1_in 4_in] 5_out u1 -a4 [5_out] [5] u1dac -.model u1 d_nand -.model u1adc adc_bridge(in_low=0.8 in_high=2.0) -.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 -.plot v(1) v(5) -.end diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.cir.out b/OSCAD/Examples/simpleTTL/simpleTTL.cir.out deleted file mode 100644 index 666b204..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 20 december 2012 12:05:00 am ist - -* Plotting option vplot8_1 -r1 5 0 1000 -v1 1 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) -v2 4 0 5 -* 7400 -a1 [1] [1_in] u1adc -a2 [4] [4_in] u1adc -a3 [1_in 4_in] 5_out u1 -a4 [5_out] [5] u1dac -.model u1 d_nand -.model u1adc adc_bridge(in_low=0.8 in_high=2.0) -.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 - -* Control Statements -.control -run -plot v(1) v(5) -.endc -.end diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.pro b/OSCAD/Examples/simpleTTL/simpleTTL.pro deleted file mode 100644 index b16deac..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.pro +++ /dev/null @@ -1,73 +0,0 @@ -update=Tuesday 18 December 2012 10:13:38 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=digitalXSpice -LibName39=analogXSpice diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.proj b/OSCAD/Examples/simpleTTL/simpleTTL.proj deleted file mode 100644 index 72370e2..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile simpleTTL.sch diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.sch b/OSCAD/Examples/simpleTTL/simpleTTL.sch deleted file mode 100644 index cb6e4f2..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.sch +++ /dev/null @@ -1,157 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 02 April 2013 03:01:00 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:simpleTTL-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "2 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5550 3450 -Wire Wire Line - 5550 3300 5550 3600 -Wire Wire Line - 2950 4600 5550 4600 -Connection ~ 4500 4600 -Wire Wire Line - 4500 4300 4500 4600 -Wire Wire Line - 3700 4600 3700 4450 -Connection ~ 2950 4600 -Wire Wire Line - 2950 3350 4150 3350 -Wire Wire Line - 2950 4250 2950 4800 -Wire Wire Line - 3700 3550 4150 3550 -Connection ~ 3700 4600 -Wire Wire Line - 4550 2900 4550 3250 -Wire Wire Line - 3450 3350 3450 3250 -Connection ~ 3450 3350 -Wire Wire Line - 5550 3450 5350 3450 -Wire Wire Line - 5550 4600 5550 4100 -$Comp -L VPLOT8_1 U2 -U 2 1 50CEBA04 -P 5550 3000 -F 0 "U2" H 5400 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5700 3100 50 0000 C CNN - 2 5550 3000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 50CEBA01 -P 3450 2950 -F 0 "U2" H 3300 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 3600 3050 50 0000 C CNN - 1 3450 2950 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50862FAD -P 4550 2900 -F 0 "#FLG01" H 4550 3170 30 0001 C CNN -F 1 "PWR_FLAG" H 4550 3130 30 0000 C CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 50862FA6 -P 4500 4300 -F 0 "#FLG02" H 4500 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 4530 30 0000 C CNN - 1 4500 4300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50862F73 -P 5550 3850 -F 0 "R1" V 5630 3850 50 0000 C CNN -F 1 "1000" V 5550 3850 50 0000 C CNN - 1 5550 3850 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 50862F55 -P 2950 3800 -F 0 "v1" H 2750 3900 60 0000 C CNN -F 1 "PULSE" H 2750 3750 60 0000 C CNN -F 2 "R1" H 2650 3800 60 0000 C CNN - 1 2950 3800 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 50862CF3 -P 2950 4800 -F 0 "#PWR03" H 2950 4800 30 0001 C CNN -F 1 "GND" H 2950 4730 30 0001 C CNN - 1 2950 4800 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 50862BA3 -P 3700 4000 -F 0 "v2" H 3500 4100 60 0000 C CNN -F 1 "5" H 3500 3950 60 0000 C CNN -F 2 "R1" H 3400 4000 60 0000 C CNN - 1 3700 4000 - 1 0 0 -1 -$EndComp -$Comp -L 7400 U1 -U 3 1 50862B5B -P 4750 3450 -F 0 "U1" H 4750 3500 60 0000 C CNN -F 1 "7400" H 4750 3350 60 0000 C CNN - 3 4750 3450 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/slewRateExample/analysis b/OSCAD/Examples/slewRateExample/analysis deleted file mode 100644 index f635959..0000000 --- a/OSCAD/Examples/slewRateExample/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 1e-09 1e-06 0e-00 diff --git a/OSCAD/Examples/slewRateExample/slewRateExample-cache.bak b/OSCAD/Examples/slewRateExample/slewRateExample-cache.bak deleted file mode 100644 index 96fc3bb..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample-cache.bak +++ /dev/null @@ -1,101 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 03:22:05 PM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/slewRateExample/slewRateExample-cache.lib b/OSCAD/Examples/slewRateExample/slewRateExample-cache.lib deleted file mode 100644 index eb08e6b..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample-cache.lib +++ /dev/null @@ -1,101 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 03:24:18 PM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.bak b/OSCAD/Examples/slewRateExample/slewRateExample.bak deleted file mode 100644 index 1f8a1ee..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.bak +++ /dev/null @@ -1,193 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 03:22:05 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:slewRateExample-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PULSE v1 -U 1 1 50CEEB0C -P 4300 4100 -F 0 "v1" H 4100 4200 60 0000 C CNN -F 1 "PULSE" H 4100 4050 60 0000 C CNN -F 2 "R1" H 4000 4100 60 0000 C CNN - 1 4300 4100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6850 3100 6850 3650 -Connection ~ 6850 3400 -Connection ~ 4300 4650 -Wire Wire Line - 4300 4650 4600 4650 -Wire Wire Line - 4600 4650 4600 4400 -Wire Wire Line - 6850 3400 6300 3400 -Wire Wire Line - 4300 4550 4300 4700 -Wire Wire Line - 4900 3500 5300 3500 -Wire Wire Line - 4300 3650 4300 3500 -Wire Wire Line - 4300 3500 4400 3500 -Wire Wire Line - 5300 3300 4300 3300 -Wire Wire Line - 4300 3300 4300 3400 -Wire Wire Line - 5150 3500 5150 4050 -Wire Wire Line - 5150 4050 5550 4050 -Connection ~ 5150 3500 -Wire Wire Line - 6850 4150 6850 4400 -Wire Wire Line - 6050 4050 6550 4050 -Wire Wire Line - 6550 4050 6550 3400 -Connection ~ 6550 3400 -Wire Wire Line - 3400 3100 3400 3550 -Wire Wire Line - 3400 3550 4300 3550 -Connection ~ 4300 3550 -$Comp -L VPLOT8_1 U1 -U 2 1 50CEB089 -P 6850 2800 -F 0 "U1" H 6700 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN - 2 6850 2800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CEB075 -P 3400 2800 -F 0 "U1" H 3250 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 3550 2900 50 0000 C CNN - 1 3400 2800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 508245D2 -P 4600 4400 -F 0 "#FLG01" H 4600 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN - 1 4600 4400 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X1 -U 1 1 50824595 -P 5800 3400 -F 0 "X1" H 5950 3550 60 0000 C CNN -F 1 "UA741" H 5950 3650 60 0000 C CNN - 1 5800 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 508240CB -P 4300 3400 -F 0 "#PWR02" H 4300 3400 30 0001 C CNN -F 1 "GND" H 4300 3330 30 0001 C CNN - 1 4300 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 508240B7 -P 4300 4700 -F 0 "#PWR03" H 4300 4700 30 0001 C CNN -F 1 "GND" H 4300 4630 30 0001 C CNN - 1 4300 4700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 508240AD -P 6850 4400 -F 0 "#PWR04" H 6850 4400 30 0001 C CNN -F 1 "GND" H 6850 4330 30 0001 C CNN - 1 6850 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50824073 -P 6850 3900 -F 0 "R3" V 6930 3900 50 0000 C CNN -F 1 "10000" V 6850 3900 50 0000 C CNN - 1 6850 3900 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50824062 -P 4650 3500 -F 0 "R1" V 4730 3500 50 0000 C CNN -F 1 "1000" V 4650 3500 50 0000 C CNN - 1 4650 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 50824045 -P 5800 4050 -F 0 "R2" V 5880 4050 50 0000 C CNN -F 1 "2000" V 5800 4050 50 0000 C CNN - 1 5800 4050 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.cir b/OSCAD/Examples/slewRateExample/slewRateExample.cir deleted file mode 100644 index 67bfed1..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.cir +++ /dev/null @@ -1,14 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 03:24:15 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 2 0 PULSE -U1 2 3 VPLOT8_1 -X1 4 0 3 UA741 -R3 3 0 10000 -R1 4 2 1000 -R2 3 4 2000 - -.end diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.cir.ckt b/OSCAD/Examples/slewRateExample/slewRateExample.cir.ckt deleted file mode 100644 index 99770a5..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.cir.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 03:24:15 pm ist -.include ua741.sub - -v1 2 0 pulse(0 5 0 0 0 0.5e-4 1e-4) -* Plotting option vplot8_1 -x1 4 0 3 ua741 -r3 3 0 10000 -r1 4 2 1000 -r2 3 4 2000 - -.tran 1e-09 1e-06 0e-00 -.plot v(2) v(3) -.end diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.cir.out b/OSCAD/Examples/slewRateExample/slewRateExample.cir.out deleted file mode 100644 index c771986..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 03:24:15 pm ist -.include ua741.sub - -v1 2 0 pulse(0 5 0 0 0 0.5e-4 1e-4) -* Plotting option vplot8_1 -x1 4 0 3 ua741 -r3 3 0 10000 -r1 4 2 1000 -r2 3 4 2000 - -.tran 1e-09 1e-06 0e-00 - -* Control Statements -.control -run -plot v(2) v(3) -.endc -.end diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.cmp b/OSCAD/Examples/slewRateExample/slewRateExample.cmp deleted file mode 100644 index c3e04af..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.cmp +++ /dev/null @@ -1,38 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Saturday 20 October 2012 11:59:17 AM IST - -BeginCmp -TimeStamp = /50824062; -Reference = R1; -ValeurCmp = 1000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824045; -Reference = R2; -ValeurCmp = 2000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824073; -Reference = R3; -ValeurCmp = 10000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824091; -Reference = v1; -ValeurCmp = SINE; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /50823E96; -Reference = X1; -ValeurCmp = LM741; -IdModule = DIP-8__300; -EndCmp - -EndListe diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.net b/OSCAD/Examples/slewRateExample/slewRateExample.net deleted file mode 100644 index 938591e..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.net +++ /dev/null @@ -1,70 +0,0 @@ -# EESchema Netlist Version 1.1 created Saturday 20 October 2012 12:03:26 PM IST -( - ( /50824595 $noname X1 UA741 {Lib=UA741} - ( 2 N-000004 ) - ( 3 GND ) - ( 6 N-000001 ) - ) - ( /50824091 R1 v1 SINE {Lib=SINE} - ( 1 N-000002 ) - ( 2 GND ) - ) - ( /50824073 $noname R3 10000 {Lib=R} - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /50824062 $noname R1 1000 {Lib=R} - ( 1 N-000004 ) - ( 2 N-000002 ) - ) - ( /50824045 $noname R2 2000 {Lib=R} - ( 1 N-000001 ) - ( 2 N-000004 ) - ) -) -* -{ Allowed footprints by component: -$component X1 - DIP-8__300 -$endlist -$component v1 - 1_pin -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$endfootprintlist -} -{ Pin List by Nets -Net 1 "" "" - R2 1 - X1 6 - R3 1 -Net 2 "" "" - R1 2 - v1 1 -Net 3 "GND" "GND" - X1 3 - v1 2 - R3 2 -Net 4 "" "" - X1 2 - R1 1 - R2 2 -} -#End diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.pro b/OSCAD/Examples/slewRateExample/slewRateExample.pro deleted file mode 100644 index 4d957be..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Saturday 20 October 2012 07:46:26 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.proj b/OSCAD/Examples/slewRateExample/slewRateExample.proj deleted file mode 100644 index c78c533..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile InvertingAmplifier.sch diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.sch b/OSCAD/Examples/slewRateExample/slewRateExample.sch deleted file mode 100644 index 4508864..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.sch +++ /dev/null @@ -1,193 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 03:24:18 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:slewRateExample-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PULSE v1 -U 1 1 50CEEB0C -P 4300 4100 -F 0 "v1" H 4100 4200 60 0000 C CNN -F 1 "PULSE" H 4100 4050 60 0000 C CNN -F 2 "R1" H 4000 4100 60 0000 C CNN - 1 4300 4100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6850 3100 6850 3650 -Connection ~ 6850 3400 -Connection ~ 4300 4650 -Wire Wire Line - 4300 4650 4600 4650 -Wire Wire Line - 4600 4650 4600 4400 -Wire Wire Line - 6850 3400 6300 3400 -Wire Wire Line - 4300 4550 4300 4700 -Wire Wire Line - 4900 3500 5300 3500 -Wire Wire Line - 4300 3650 4300 3500 -Wire Wire Line - 4300 3500 4400 3500 -Wire Wire Line - 5300 3300 4300 3300 -Wire Wire Line - 4300 3300 4300 3400 -Wire Wire Line - 5150 3500 5150 4050 -Wire Wire Line - 5150 4050 5550 4050 -Connection ~ 5150 3500 -Wire Wire Line - 6850 4150 6850 4400 -Wire Wire Line - 6050 4050 6550 4050 -Wire Wire Line - 6550 4050 6550 3400 -Connection ~ 6550 3400 -Wire Wire Line - 3400 3100 3400 3550 -Wire Wire Line - 3400 3550 4300 3550 -Connection ~ 4300 3550 -$Comp -L VPLOT8_1 U1 -U 2 1 50CEB089 -P 6850 2800 -F 0 "U1" H 6700 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN - 2 6850 2800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CEB075 -P 3400 2800 -F 0 "U1" H 3250 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 3550 2900 50 0000 C CNN - 1 3400 2800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 508245D2 -P 4600 4400 -F 0 "#FLG01" H 4600 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN - 1 4600 4400 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X1 -U 1 1 50824595 -P 5800 3400 -F 0 "X1" H 5950 3550 60 0000 C CNN -F 1 "UA741" H 5950 3650 60 0000 C CNN - 1 5800 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 508240CB -P 4300 3400 -F 0 "#PWR02" H 4300 3400 30 0001 C CNN -F 1 "GND" H 4300 3330 30 0001 C CNN - 1 4300 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 508240B7 -P 4300 4700 -F 0 "#PWR03" H 4300 4700 30 0001 C CNN -F 1 "GND" H 4300 4630 30 0001 C CNN - 1 4300 4700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 508240AD -P 6850 4400 -F 0 "#PWR04" H 6850 4400 30 0001 C CNN -F 1 "GND" H 6850 4330 30 0001 C CNN - 1 6850 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50824073 -P 6850 3900 -F 0 "R3" V 6930 3900 50 0000 C CNN -F 1 "10000" V 6850 3900 50 0000 C CNN - 1 6850 3900 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50824062 -P 4650 3500 -F 0 "R1" V 4730 3500 50 0000 C CNN -F 1 "1000" V 4650 3500 50 0000 C CNN - 1 4650 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 50824045 -P 5800 4050 -F 0 "R2" V 5880 4050 50 0000 C CNN -F 1 "2000" V 5800 4050 50 0000 C CNN - 1 5800 4050 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/slewRateExample/ua741-cache.bak b/OSCAD/Examples/slewRateExample/ua741-cache.bak deleted file mode 100644 index 1ac0925..0000000 --- a/OSCAD/Examples/slewRateExample/ua741-cache.bak +++ /dev/null @@ -1,100 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 19 November 2012 12:14:01 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 I -X ~ 2 250 0 100 L 30 30 2 1 I -X ~ 3 250 0 100 L 30 30 3 1 I -X ~ 4 250 0 100 L 30 30 4 1 I -X ~ 5 250 0 100 L 30 30 5 1 I -X ~ 6 250 0 100 L 30 30 6 1 I -X ~ 7 250 0 100 L 30 30 7 1 I -X ~ 8 250 0 100 L 30 30 8 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/slewRateExample/ua741-cache.lib b/OSCAD/Examples/slewRateExample/ua741-cache.lib deleted file mode 100644 index e2ece32..0000000 --- a/OSCAD/Examples/slewRateExample/ua741-cache.lib +++ /dev/null @@ -1,100 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:17:01 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/slewRateExample/ua741.bak b/OSCAD/Examples/slewRateExample/ua741.bak deleted file mode 100644 index 5237bd8..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 19 November 2012 12:14:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG1 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG1" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR1" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/slewRateExample/ua741.cir b/OSCAD/Examples/slewRateExample/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/slewRateExample/ua741.cir.ckt b/OSCAD/Examples/slewRateExample/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/slewRateExample/ua741.cir.out b/OSCAD/Examples/slewRateExample/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/slewRateExample/ua741.pro b/OSCAD/Examples/slewRateExample/ua741.pro deleted file mode 100644 index a87f185..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Sunday 18 November 2012 03:20:54 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/slewRateExample/ua741.sch b/OSCAD/Examples/slewRateExample/ua741.sch deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.sch +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/slewRateExample/ua741.sub b/OSCAD/Examples/slewRateExample/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741 \ No newline at end of file diff --git a/OSCAD/LPCSim/LPCSim/ACAnalysis.sci b/OSCAD/LPCSim/LPCSim/ACAnalysis.sci deleted file mode 100644 index 79d9796..0000000 --- a/OSCAD/LPCSim/LPCSim/ACAnalysis.sci +++ /dev/null @@ -1,79 +0,0 @@ -// ACAnalysis.sci is a scilab file to perform AC Analysis. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -function [A,B,x]=ACAnalysis(A,B,f) -// Modify Sweep Source Value and update matrices - [C,d]=buildMatricesAC(A,B,f); - -// Find node potetial and current through devices whose device characteristic can not be expressed in terms of voltage - x=findNodePotential(C,d); - -// Find branch voltage from node potential - voltage=findBranchVoltage(x); - -// Find branch current from branch voltage using device characteristic - current=findBranchCurrent(x,voltage); -endfunction - -function [C,d]=buildMatricesAC(A,B,f); - global g; - pi=3.14; - _C=1; - Edges=edge_number(g); - Nodes=node_number(g); - [rows cols]=size(A); - A2 = zeros(rows,cols); - b2 = zeros(cols,1); - for edge_cnt = 1:Edges, - if(g.edges.data.type(edge_cnt)=='C') - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - if(~(source==0)) - A2(source,source) = A2(source,source)+2*pi*f*cValue(_C); - end - if(~(sink==0)) - A2(sink,sink) = A2(sink,sink)+2*pi*f*cValue(_C); - end - if(~(sink==0) & ~(source==0)) - A2(source,sink) = A2(source,sink)-2*pi*f*cValue(_C); - A2(sink,source) = A2(sink,source)-2*pi*f*cValue(_C); - end - _C=_C+1; - end - end - C=[A -A2;A2 A]; - d=[B;b2]; -endfunction - -function buildDCOutput(x,s,itr) - global vPrintList; - global iPrintList; - global sweepArray; - global vPrintArray; - global iPrintArray; - sweepArray(itr)=s; -// Store voltage output for printing - if(~(vPrintList(1)==0)) - fill_vPrintArray(x,itr); - vPrintArray(itr,1)=s; - end - -// Store voltage output for plotting - if(~(vPlotList(1)==0)) - fill_vPlotArray(x,itr); - end - -// Store current output for printing - if(~(iPrintList(1)==0)) - fill_iPrintArray(x,itr); - iPrintArray(itr,1)=s; - end - -// Store current output for plotting - if(~(iPlotList(1)==0)) - fill_iPlotArray(x,itr); - end -endfunction diff --git a/OSCAD/LPCSim/LPCSim/DCAnalysis.sci b/OSCAD/LPCSim/LPCSim/DCAnalysis.sci deleted file mode 100644 index 7a2c691..0000000 --- a/OSCAD/LPCSim/LPCSim/DCAnalysis.sci +++ /dev/null @@ -1,58 +0,0 @@ -// DCAnalysis.sci is a scilab file to perform DC Analysis. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -function [A,B,x]=DCAnalysis(A,B,_X,s) -// Modify Sweep Source Value and update matrices - [A,B]=modifySourceValue(A,B,s); -// Perform Operating Point Analysis on static circuit - [A,B,x]=OPAnalysis(A,B); -endfunction - -function [A,B]=modifySourceValue(A,B,s); - global g; - global wave; - waveIndex=1; - _T=1; - Edges=edge_number(g); - Nodes=node_number(g); - for edge_cnt = 1:Edges, - if(g.edges.data.type(edge_cnt)=='V') - tempWave=wave(waveIndex); - if(tempWave(1)=='dc') - waveIndex=waveIndex+1; - elseif(tempWave(1)=='sweep') - waveIndex=waveIndex+1; - g.edges.data.value(edge_cnt)=s; - B(Nodes-1+_T) = g.edges.data.value(edge_cnt); - elseif(tempWave(1)=='sine') - waveIndex=waveIndex+1; - end - _T=_T+1; - clear tempWave; - elseif(g.edges.data.type(edge_cnt)=='I') - tempWave=wave(waveIndex); - if(tempWave(1)=='dc') - waveIndex=waveIndex+1; - elseif(tempWave(1)=='sine') - waveIndex=waveIndex+1; - elseif(tempWave(1)=='sweep') - waveIndex=waveIndex+1; - oldCurrent=g.edges.data.value(edge_cnt); - g.edges.data.value(edge_cnt)=s; - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - if(~(source==0)) - B(source) = B(source)-(g.edges.data.value(edge_cnt)-oldCurrent); - end - if(~(sink==0)) - B(sink) =B(sink) + (g.edges.data.value(edge_cnt)-oldCurrent); - end - end - clear tempWave; - end - end -endfunction - diff --git a/OSCAD/LPCSim/LPCSim/Main.sci b/OSCAD/LPCSim/LPCSim/Main.sci deleted file mode 100644 index 867bdec..0000000 --- a/OSCAD/LPCSim/LPCSim/Main.sci +++ /dev/null @@ -1,293 +0,0 @@ -// Main.sci is a main scilab file of a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -// It is modified by Yogesh Dilip Save for OSCAD Software on October 2012 -warning('off'); -clear -global('LPCSim_HOME') -OSCAD_HOME="/home/hardik/OSCAD" -LPCSim_HOME=OSCAD_HOME+'/LPCSim/LPCSim/' -//%format('e',10); -MaxNRitr=100; -symbolic=%F; -displayMatrix=%F; - -// Open the circuit file -try - fid = mopen(LPCSim_HOME+"option", 'r'); - if (fid == -1) - error("cannot open file for reading"); - end - tempStr=mgetl(fid,1); - tempStr=stripblanks(tempStr); - [option] = sscanf(tempStr, "%d"); -catch - disp("Can not open option. Running default mode"); - option=1 -end - -if (option == 1) - symbolic=%T -elseif (option == 2) - symbolic=%T - displayMatrix=%T -end - -// Metanet Graph library - // exec('metanet-0.4/loader.sce',-1); - -// Supporting function library -exec(LPCSim_HOME+'support/atof.sci',-1); -exec(LPCSim_HOME+'support/findIndex.sci',-1); - -exec(LPCSim_HOME+'lib/mos.sci',-1); -exec(LPCSim_HOME+'readfile.sci',-1); -exec(LPCSim_HOME+'buildMatrices.sci',-1); -exec(LPCSim_HOME+'buildMatricesSymbolic.sci',-1); -exec(LPCSim_HOME+'OpAnalysis.sci',-1); -exec(LPCSim_HOME+'NR.sci',-1); -exec(LPCSim_HOME+'genrateCallingLibF.sci',-1); -exec(LPCSim_HOME+'printSolution.sci',-1); -exec(LPCSim_HOME+'tranAnalysis.sci',-1); -exec(LPCSim_HOME+'DCAnalysis.sci',-1); -exec(LPCSim_HOME+'ACAnalysis.sci',-1); -//getf('LUT/ids.sce'); -fileName = 'ckt/nodalExample.ckt'; -fileName = 'ckt/ModifiednodalExample.ckt'; -fileName = 'ckt/linear.ckt'; -fileName = 'ckt/ForwardBiasedDiode.ckt'; -fileName = 'ckt/bridge.ckt'; -//fileName='ckt/Vsweep.ckt'; -//fileName='ckt/myCompSweep.ckt'; -//fileName='ckt/rc1.ckt'; -//fileName='ckt/rc_ac.ckt' -fileName='ckt/HWRectifierFilter.ckt'; -//fileName = readc_(); -args=sciargs(); -fileName= args(5); - -global('g'); -global('model') -global('wave') -global('cValue','cInitial') -global('vPrintList','vPlotList') -global('iPrintList','iPlotList') -global('initialVoltage') -global('displayNLFlag'); -global('NLFlag'); -global('dynamicFlag'); -global('currentAnalysis') -global('nodeMap') -displayNLFlag=%T; -dynamicFlag=%F; -NLFlag=%F; -currentAnalysis=0; - -// Get circuit analysis option from circuit file -[transParameter,sweep,Analysis,_Nodes]=getAnalysisOption(fileName); - -// Read circuit form file and convert it into graph -_T=convertCircuitIntoGraph(fileName,_Nodes); - -// Build Modified Nodal Matrix for linear devices -[A,B]=buildMatrices(_T); - -if symbolic then - mprintf("-----------------------------------------------------------\n"); - mprintf("Simulation of %s: \n",fileName); - [Asymb,Bsymb,Dsymb,Csymb,xsymb,fxsymb]=buildMatricesSymbolic(_T); - if displayMatrix then - mprintf("The system of equations Ax+D_f(w)+C(dx/dt)=b (Symbolically):\n"); - mprintf("Where A, D and C represent matrices corresponding to linear,\n nonlinear and time dependent electrical elements respectively.\n"); - mprintf(" b represents the vector corresponding to sources.\n"); - mprintf("-----------------------------------------------------------\n"); - if dynamicFlag then - disp(fxsymb,"w=",xsymb,"x=",Csymb,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); - elseif NLFlag then - disp(fxsymb,"w=",xsymb,"x=",0,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); - else - disp(fxsymb,"w=",xsymb,"x=",0,"C=",0,"D_f=",Bsymb,"B=",Asymb,"A="); - end - mprintf("The number of equations are %d\n",_Nodes+_T-1); - mprintf("Unknowns:\n"); - mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); - mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); - pause; - end -end - -// Perform Operating Point Analysis on static circuit -if symbolic then - mprintf("-----------------------------------------------------------\n"); - mprintf("Operating Point (DC) Analysis: \n"); - mprintf("All capacitors are open circuited and inductors are short circuited \n"); - [Asymb,Bsymb,Dsymb,xsymb,fxsymb]=buildMatricesSymbStatic(_T); - if displayMatrix then - mprintf("The system of equations Ax+D_f(w))=b (Symbolically):\n"); - mprintf("Where A and D represent matrices corresponding to linear,\n and nonlinear electrical elements respectively.\n"); - mprintf(" b represents the vector corresponding to sources.\n"); - mprintf("-----------------------------------------------------------\n"); - if NLFlag then - disp(fxsymb,"w=",xsymb,"x=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); - else - disp(fxsymb,"w=",xsymb,"x=",0,"D_f=",Bsymb,"B=",Asymb,"A="); - end - mprintf("The number of equations are %d\n",_Nodes+_T-1); - mprintf("Unknowns:\n"); - mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); - mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); - pause; - end -end -[A,B,x]=OPAnalysis(A,B); -if displayMatrix then - mprintf("-----------------------------------------------------------\n"); - mprintf("Operating Point (DC) Analysis: \n"); - mprintf("All capacitors are open circuited and inductors are short circuited \n"); - mprintf("The system of equations Ax=b (Numerically):\n"); - mprintf("-----------------------------------------------------------\n"); - format('e',10); - disp(B,"B=",A,"A="); - pause; -end - -if displayMatrix then - mprintf("-----------------------------------------------------\n"); - mprintf("The solution of the circuit x:\n"); - mprintf("-----------------------------------------------------\n"); - format('e',10); - disp(x,"x="); - pause; -end - -// Find branch voltage from node potential -voltage=findBranchVoltage(x); - -// Find branch current from branch voltage using device characteristic -current=findBranchCurrent(x,voltage); - -// Print the Operating Point Solution -fileName=fileName+".sol"; -Wmode="w"; -printOPSolution(fileName,voltage,current,Wmode); -mprintf("-----------------------------------------------------\n"); -mprintf("The complete solution (Operating Point) of the circuit\n\t is written in %s\n",fileName); -mprintf("-----------------------------------------------------\n"); - -if(Analysis==1) // Transient Analysis - currentAnalysis=1; - mprintf("-----------------------------------------------------\n"); - mprintf("Transient Analysis: \n"); - mprintf("-----------------------------------------------------\n"); - global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray'); - - if symbolic then - [Asymb,Bsymb,Dsymb,Csymb,xsymb,fxsymb]=buildMatricesSymbolic(_T); - if displayMatrix then - mprintf("The system of equations Ax+D_f(w)+C(dx/dt)=b (Symbolically):\n"); - mprintf("Where A, D and C represent matrices corresponding to linear,\n nonlinear and time dependent electrical elements respectively.\n"); - mprintf(" b represents the vector corresponding to sources.\n"); - mprintf("-----------------------------------------------------------\n"); - if dynamicFlag then - disp(fxsymb,"w=",xsymb,"x=",Csymb,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); - elseif NLFlag then - disp(fxsymb,"w=",xsymb,"x=",0,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); - else - disp(fxsymb,"w=",xsymb,"x=",0,"C=",0,"D_f=",Bsymb,"B=",Asymb,"A="); - end - mprintf("The number of equations are %d\n",_Nodes+_T-1); - mprintf("Unknowns:\n"); - mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); - mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); - pause; - end - end - - // Perform Transient Analysis on static circuit - if symbolic then - mprintf("-----------------------------------------------------------\n"); - mprintf("A static circuit at time t: \n"); - [Asymb,Bsymb,Dsymb,xsymb,fxsymb]=buildMatricesSymbStatic(_T); - if displayMatrix then - mprintf("The system of equations Ax+D_f(w))=b (Symbolically):\n"); - mprintf("Where A and D represent matrices corresponding to linear,\n and nonlinear electrical elements respectively.\n"); - mprintf(" b represents the vector corresponding to sources.\n"); - mprintf("-----------------------------------------------------------\n"); - if NLFlag then - disp(fxsymb,"w=",xsymb,"x=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); - else - disp(fxsymb,"w=",xsymb,"x=",0,"D_f=",Bsymb,"B=",Asymb,"A="); - end - mprintf("The number of equations are %d\n",_Nodes+_T-1); - mprintf("Unknowns:\n"); - mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); - mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); - pause; - end - end - - t_start=transParameter(1); - t_end=transParameter(2); - t_step=transParameter(3); - UIC=transParameter(4); - t_itr=(t_end-t_start)/t_step+2; - initArrays(t_itr); - sweepArray = zeros(t_itr,1); - i=1; - // Find Initial condition at t=0 - [x]=setIntialCondition(A,B,x,_T,UIC); - // Store Output Variable for plotting/printing - buildOutput(x,0,i); - i=i+1; - for t=t_start:t_step:t_end - if(i==2) t=t+t_step/100; end; - [A,B,x]=transientAnalysis(A,B,x,t,i); - i=i+1; - end - xaxis='time(sec)'; - printSolution(sweepArray,xaxis,'lin'); -end - -if(Analysis==2) // DC Analysis - global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray'); - s_start=sweep(1); - s_end=sweep(2); - s_step=sweep(3); - s_itr=(s_end-s_start)/s_step+1; - initArrays(s_itr); - sweepArray = zeros(s_itr,1); - i=1; - for s=s_start:s_step:s_end - [A,B,x]=DCAnalysis(A,B,s); - buildOutput(x,s,i); - i=i+1; - end - xaxis='Voltage(V)'; - printSolution(sweepArray,xaxis,'lin'); -end - -if(Analysis==3) // AC Analysis - global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray'); - f_start=sweep(1); - f_end=sweep(2); - f_itr=sweep(3)+1; - axisType=sweep(4); - f_step=(f_end-f_start)/(f_itr-1); - initArrays(f_itr); - sweepArray = zeros(f_itr,1); - i=1; - buildOutput(x,0,i); - i=i+1; - for f=f_start:f_step:f_end - [A,B,x]=ACAnalysis(A,B,f); - buildDCOutput(x,f,i); - i=i+1; - end - xaxis='frequency(Hz)'; - printSolution(sweepArray,xaxis,axisType); -end -clearglobal(); -//quit -/////////////////////////////////////////////////////////////////////////////// diff --git a/OSCAD/LPCSim/LPCSim/MainInstall.sci b/OSCAD/LPCSim/LPCSim/MainInstall.sci deleted file mode 100644 index 9c7415e..0000000 --- a/OSCAD/LPCSim/LPCSim/MainInstall.sci +++ /dev/null @@ -1,293 +0,0 @@ -// Main.sci is a main scilab file of a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -// It is modified by Yogesh Dilip Save for OSCAD Software on October 2012 -warning('off'); -clear -global('LPCSim_HOME') -OSCAD_HOME=set_PATH_to_OSCAD -LPCSim_HOME=OSCAD_HOME+'/LPCSim/LPCSim/' -//%format('e',10); -MaxNRitr=100; -symbolic=%F; -displayMatrix=%F; - -// Open the circuit file -try - fid = mopen(LPCSim_HOME+"option", 'r'); - if (fid == -1) - error("cannot open file for reading"); - end - tempStr=mgetl(fid,1); - tempStr=stripblanks(tempStr); - [option] = sscanf(tempStr, "%d"); -catch - disp("Can not open option. Running default mode"); - option=1 -end - -if (option == 1) - symbolic=%T -elseif (option == 2) - symbolic=%T - displayMatrix=%T -end - -// Metanet Graph library - // exec('metanet-0.4/loader.sce',-1); - -// Supporting function library -exec(LPCSim_HOME+'support/atof.sci',-1); -exec(LPCSim_HOME+'support/findIndex.sci',-1); - -exec(LPCSim_HOME+'lib/mos.sci',-1); -exec(LPCSim_HOME+'readfile.sci',-1); -exec(LPCSim_HOME+'buildMatrices.sci',-1); -exec(LPCSim_HOME+'buildMatricesSymbolic.sci',-1); -exec(LPCSim_HOME+'OpAnalysis.sci',-1); -exec(LPCSim_HOME+'NR.sci',-1); -exec(LPCSim_HOME+'genrateCallingLibF.sci',-1); -exec(LPCSim_HOME+'printSolution.sci',-1); -exec(LPCSim_HOME+'tranAnalysis.sci',-1); -exec(LPCSim_HOME+'DCAnalysis.sci',-1); -exec(LPCSim_HOME+'ACAnalysis.sci',-1); -//getf('LUT/ids.sce'); -fileName = 'ckt/nodalExample.ckt'; -fileName = 'ckt/ModifiednodalExample.ckt'; -fileName = 'ckt/linear.ckt'; -fileName = 'ckt/ForwardBiasedDiode.ckt'; -fileName = 'ckt/bridge.ckt'; -//fileName='ckt/Vsweep.ckt'; -//fileName='ckt/myCompSweep.ckt'; -//fileName='ckt/rc1.ckt'; -//fileName='ckt/rc_ac.ckt' -fileName='ckt/HWRectifierFilter.ckt'; -//fileName = readc_(); -args=sciargs(); -fileName= args(5); - -global('g'); -global('model') -global('wave') -global('cValue','cInitial') -global('vPrintList','vPlotList') -global('iPrintList','iPlotList') -global('initialVoltage') -global('displayNLFlag'); -global('NLFlag'); -global('dynamicFlag'); -global('currentAnalysis') -global('nodeMap') -displayNLFlag=%T; -dynamicFlag=%F; -NLFlag=%F; -currentAnalysis=0; - -// Get circuit analysis option from circuit file -[transParameter,sweep,Analysis,_Nodes]=getAnalysisOption(fileName); - -// Read circuit form file and convert it into graph -_T=convertCircuitIntoGraph(fileName,_Nodes); - -// Build Modified Nodal Matrix for linear devices -[A,B]=buildMatrices(_T); - -if symbolic then - mprintf("-----------------------------------------------------------\n"); - mprintf("Simulation of %s: \n",fileName); - [Asymb,Bsymb,Dsymb,Csymb,xsymb,fxsymb]=buildMatricesSymbolic(_T); - if displayMatrix then - mprintf("The system of equations Ax+D_f(w)+C(dx/dt)=b (Symbolically):\n"); - mprintf("Where A, D and C represent matrices corresponding to linear,\n nonlinear and time dependent electrical elements respectively.\n"); - mprintf(" b represents the vector corresponding to sources.\n"); - mprintf("-----------------------------------------------------------\n"); - if dynamicFlag then - disp(fxsymb,"w=",xsymb,"x=",Csymb,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); - elseif NLFlag then - disp(fxsymb,"w=",xsymb,"x=",0,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); - else - disp(fxsymb,"w=",xsymb,"x=",0,"C=",0,"D_f=",Bsymb,"B=",Asymb,"A="); - end - mprintf("The number of equations are %d\n",_Nodes+_T-1); - mprintf("Unknowns:\n"); - mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); - mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); - pause; - end -end - -// Perform Operating Point Analysis on static circuit -if symbolic then - mprintf("-----------------------------------------------------------\n"); - mprintf("Operating Point (DC) Analysis: \n"); - mprintf("All capacitors are open circuited and inductors are short circuited \n"); - [Asymb,Bsymb,Dsymb,xsymb,fxsymb]=buildMatricesSymbStatic(_T); - if displayMatrix then - mprintf("The system of equations Ax+D_f(w))=b (Symbolically):\n"); - mprintf("Where A and D represent matrices corresponding to linear,\n and nonlinear electrical elements respectively.\n"); - mprintf(" b represents the vector corresponding to sources.\n"); - mprintf("-----------------------------------------------------------\n"); - if NLFlag then - disp(fxsymb,"w=",xsymb,"x=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); - else - disp(fxsymb,"w=",xsymb,"x=",0,"D_f=",Bsymb,"B=",Asymb,"A="); - end - mprintf("The number of equations are %d\n",_Nodes+_T-1); - mprintf("Unknowns:\n"); - mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); - mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); - pause; - end -end -[A,B,x]=OPAnalysis(A,B); -if displayMatrix then - mprintf("-----------------------------------------------------------\n"); - mprintf("Operating Point (DC) Analysis: \n"); - mprintf("All capacitors are open circuited and inductors are short circuited \n"); - mprintf("The system of equations Ax=b (Numerically):\n"); - mprintf("-----------------------------------------------------------\n"); - format('e',10); - disp(B,"B=",A,"A="); - pause; -end - -if displayMatrix then - mprintf("-----------------------------------------------------\n"); - mprintf("The solution of the circuit x:\n"); - mprintf("-----------------------------------------------------\n"); - format('e',10); - disp(x,"x="); - pause; -end - -// Find branch voltage from node potential -voltage=findBranchVoltage(x); - -// Find branch current from branch voltage using device characteristic -current=findBranchCurrent(x,voltage); - -// Print the Operating Point Solution -fileName=fileName+".sol"; -Wmode="w"; -printOPSolution(fileName,voltage,current,Wmode); -mprintf("-----------------------------------------------------\n"); -mprintf("The complete solution (Operating Point) of the circuit\n\t is written in %s\n",fileName); -mprintf("-----------------------------------------------------\n"); - -if(Analysis==1) // Transient Analysis - currentAnalysis=1; - mprintf("-----------------------------------------------------\n"); - mprintf("Transient Analysis: \n"); - mprintf("-----------------------------------------------------\n"); - global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray'); - - if symbolic then - [Asymb,Bsymb,Dsymb,Csymb,xsymb,fxsymb]=buildMatricesSymbolic(_T); - if displayMatrix then - mprintf("The system of equations Ax+D_f(w)+C(dx/dt)=b (Symbolically):\n"); - mprintf("Where A, D and C represent matrices corresponding to linear,\n nonlinear and time dependent electrical elements respectively.\n"); - mprintf(" b represents the vector corresponding to sources.\n"); - mprintf("-----------------------------------------------------------\n"); - if dynamicFlag then - disp(fxsymb,"w=",xsymb,"x=",Csymb,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); - elseif NLFlag then - disp(fxsymb,"w=",xsymb,"x=",0,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); - else - disp(fxsymb,"w=",xsymb,"x=",0,"C=",0,"D_f=",Bsymb,"B=",Asymb,"A="); - end - mprintf("The number of equations are %d\n",_Nodes+_T-1); - mprintf("Unknowns:\n"); - mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); - mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); - pause; - end - end - - // Perform Transient Analysis on static circuit - if symbolic then - mprintf("-----------------------------------------------------------\n"); - mprintf("A static circuit at time t: \n"); - [Asymb,Bsymb,Dsymb,xsymb,fxsymb]=buildMatricesSymbStatic(_T); - if displayMatrix then - mprintf("The system of equations Ax+D_f(w))=b (Symbolically):\n"); - mprintf("Where A and D represent matrices corresponding to linear,\n and nonlinear electrical elements respectively.\n"); - mprintf(" b represents the vector corresponding to sources.\n"); - mprintf("-----------------------------------------------------------\n"); - if NLFlag then - disp(fxsymb,"w=",xsymb,"x=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A="); - else - disp(fxsymb,"w=",xsymb,"x=",0,"D_f=",Bsymb,"B=",Asymb,"A="); - end - mprintf("The number of equations are %d\n",_Nodes+_T-1); - mprintf("Unknowns:\n"); - mprintf(" Node potentials: %d Current Variables: %d\n",_Nodes-1,_T); - mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n"); - pause; - end - end - - t_start=transParameter(1); - t_end=transParameter(2); - t_step=transParameter(3); - UIC=transParameter(4); - t_itr=(t_end-t_start)/t_step+2; - initArrays(t_itr); - sweepArray = zeros(t_itr,1); - i=1; - // Find Initial condition at t=0 - [x]=setIntialCondition(A,B,x,_T,UIC); - // Store Output Variable for plotting/printing - buildOutput(x,0,i); - i=i+1; - for t=t_start:t_step:t_end - if(i==2) t=t+t_step/100; end; - [A,B,x]=transientAnalysis(A,B,x,t,i); - i=i+1; - end - xaxis='time(sec)'; - printSolution(sweepArray,xaxis,'lin'); -end - -if(Analysis==2) // DC Analysis - global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray'); - s_start=sweep(1); - s_end=sweep(2); - s_step=sweep(3); - s_itr=(s_end-s_start)/s_step+1; - initArrays(s_itr); - sweepArray = zeros(s_itr,1); - i=1; - for s=s_start:s_step:s_end - [A,B,x]=DCAnalysis(A,B,s); - buildOutput(x,s,i); - i=i+1; - end - xaxis='Voltage(V)'; - printSolution(sweepArray,xaxis,'lin'); -end - -if(Analysis==3) // AC Analysis - global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray'); - f_start=sweep(1); - f_end=sweep(2); - f_itr=sweep(3)+1; - axisType=sweep(4); - f_step=(f_end-f_start)/(f_itr-1); - initArrays(f_itr); - sweepArray = zeros(f_itr,1); - i=1; - buildOutput(x,0,i); - i=i+1; - for f=f_start:f_step:f_end - [A,B,x]=ACAnalysis(A,B,f); - buildDCOutput(x,f,i); - i=i+1; - end - xaxis='frequency(Hz)'; - printSolution(sweepArray,xaxis,axisType); -end -clearglobal(); -//quit -/////////////////////////////////////////////////////////////////////////////// diff --git a/OSCAD/LPCSim/LPCSim/NR.sci b/OSCAD/LPCSim/LPCSim/NR.sci deleted file mode 100644 index 6e0baa2..0000000 --- a/OSCAD/LPCSim/LPCSim/NR.sci +++ /dev/null @@ -1,233 +0,0 @@ -// NR.sci is a scilab file to perform linearization of nonlinear element using Newton-Raphson method. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -// It is modified by Yogesh Dilip Save for OSCAD Software on October 2012 - - -function flag=checkForDeviceChar(voltage,current) - global g; - global model; - Edges=edge_number(g); - flag=%t; - X=1; - for edge_cnt = 1:Edges, - if(g.edges.data.type(edge_cnt)=='D') - tempModel=model(X); - Is=tempModel(2); Vt=tempModel(3); - currentByDiodeChar=Is*(exp(voltage(edge_cnt)/Vt)-1); - diodeCurrent=current(edge_cnt)+current(edge_cnt+1); - if(abs(currentByDiodeChar)<1d-9) - err=(diodeCurrent-currentByDiodeChar); - else - err=(diodeCurrent-currentByDiodeChar)*100/currentByDiodeChar; - end - if(abs(err)>0.001) - flag=%f; break; - end - X=X+1; - clear tempModel; - elseif(g.edges.data.type(edge_cnt)=='X') - tempModel=model(X); - generateCallingLibF(tempModel(1)); - exec('getlib.sci',-1); - currentByFunc=func(voltage(edge_cnt),model(X)); - currentByAnalysis=current(edge_cnt)+current(edge_cnt+1); - if(abs(currentByFunc)<1d-9) - err=(currentByAnalysis-currentByFunc); - else - err=(currentByAnalysis-currentByFunc)*100/currentByFunc; - end - if(abs(err)>0.001) - flag=%f; break; - end - X=X+1; - clear tempModel; - elseif(g.edges.data.type(edge_cnt)=='M') - Vgs=voltage(edge_cnt+2); - Vds=voltage(edge_cnt); - tempModel=model(X); - [Vt,beta1]=getMosPara(tempModel); - if(tempModel(1)=='P') - if(Vgs>Vt) //Cut-OFF region - currentByFunc=0; - elseif((Vgs<=Vt) & (Vds<(Vgs-Vt))) // Saturation region - currentByFunc=-beta1/2*(Vgs-Vt)*(Vgs-Vt); - else // Linear region - currentByFunc=-beta1*((Vgs-Vt)*Vds-Vds*Vds/2); - end - else - if(Vgs=Vt) & (Vds>(Vgs-Vt))) // Saturation region - currentByFunc=beta1/2*(Vgs-Vt)*(Vgs-Vt); - else // Linear region - currentByFunc=beta1*((Vgs-Vt)*Vds-Vds*Vds/2); - end - end - currentByAnalysis=current(edge_cnt)+current(edge_cnt+1); - if(abs(currentByFunc)<1d-9) - err=(currentByAnalysis-currentByFunc); - else - err=(currentByAnalysis-currentByFunc)*100/currentByFunc; - end - if(abs(err)>0.0001) - flag=%f; break; - end - X=X+1; - clear tempModel; - end - end -endfunction - -function [A,B]=NR(A,B,voltage,current,NRitr) - global g; - global model; - X=1; - Edges=edge_number(g); - for edge_cnt = 1:Edges, - if(g.edges.data.type(edge_cnt)=='D') - tempModel=model(X); - Is=tempModel(2); Vt=tempModel(3); Vtlimit=80*Vt; // Diode Parameter - tempVoltage=voltage(edge_cnt); - tempCurrent=current(edge_cnt)+current(edge_cnt+1); -// Voltage Limiting - if(~(tempVoltage==0)) - while(tempVoltage > Vtlimit) - tempVoltage = log(tempVoltage); - end - while(tempVoltage < -Vtlimit) - tempVoltage = -log(-tempVoltage); - end - end -// In forword bisaed use diode current to find voltage - if(tempVoltage>=0 & tempCurrent>=0) - tempVoltage = Vt*log(tempCurrent/Is+1); - end -// Update diode conductance and current source - Gnew=Is/Vt*exp(tempVoltage/Vt); - Gupdate=Gnew-g.edges.data.value(edge_cnt) - g.edges.data.value(edge_cnt)=Gnew; - Inew=Is*(exp(tempVoltage/Vt)-1)-Gnew*tempVoltage; - Iupdate=Inew-g.edges.data.value(edge_cnt+1); - g.edges.data.value(edge_cnt+1)=Inew; -// Update matrix A and rhs vector - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - if(~(source==0)) - A(source,source) = A(source,source) + Gupdate; - B(source) = B(source)-Iupdate; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + Gupdate; - B(sink) =B(sink) + Iupdate; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - Gupdate; - A(sink,source) = A(sink,source) - Gupdate; - end - X=X+1; - clear tempModel; - elseif(g.edges.data.type(edge_cnt)=='X') - tempVoltage=voltage(edge_cnt); - tempCurrent=current(edge_cnt)+current(edge_cnt+1); - tempModel=model(X); - generateCallingLibF(tempModel(1)); - exec('getlib.sci',-1); -// Update conductance and current source of nonlinear device - Gnew=jacobian(tempVoltage,model(X)); - Gupdate=Gnew-g.edges.data.value(edge_cnt) - g.edges.data.value(edge_cnt)=Gnew; - Inew=func(tempVoltage,model(X))-Gnew*tempVoltage; - Iupdate=Inew-g.edges.data.value(edge_cnt+1); - g.edges.data.value(edge_cnt+1)=Inew; -// Update matrix A and rhs vector - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - if(~(source==0)) - A(source,source) = A(source,source) + Gupdate; - B(source) = B(source)-Iupdate; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + Gupdate; - B(sink) =B(sink) + Iupdate; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - Gupdate; - A(sink,source) = A(sink,source) - Gupdate; - end - X=X+1; - clear tempModel; - elseif(g.edges.data.type(edge_cnt)=='M') - Vgs=voltage(edge_cnt+2); - Vds=voltage(edge_cnt); - tempModel=model(X); - [Vt,beta1]=getMosPara(tempModel); - Vtlimit=abs(80*Vt); -// MOS Voltage Limiting - if(~(Vgs==0)) - while(Vgs > Vtlimit) - Vgs = log(Vgs) - end - while(Vgs < -Vtlimit) - Vgs = -log(-Vgs) - end - end - if(~(Vds==0)) - while(Vds > Vtlimit) - Vds = log(Vds); - end - while(Vds < -Vtlimit) - Vds = -log(-Vds); - end - end -// Update conductance and current source of MOSFET - if(tempModel(1)=='P') - if(Vgs>Vt) //Cut-OFF region - Gnew=1e-12; - Inew=0; - elseif((Vgs<=Vt) & (Vds<(Vgs-Vt))) // Saturation region - Gnew=1e-12; - Inew=-beta1/2*(Vgs-Vt)*(Vgs-Vt); - else // Linear region - Gnew=abs(beta1*((-Vgs+Vt)+Vds)); - Inew=-beta1/2*Vds*Vds; - end - else - if(Vgs=Vt) & (Vds>(Vgs-Vt))) // Saturation region - Gnew=1e-12; - Inew=beta1/2*(Vgs-Vt)*(Vgs-Vt); - else // Linear region - Gnew=abs(beta1*((Vgs-Vt)-Vds)); - Inew=beta1/2*Vds*Vds; - end - end - Gupdate=Gnew-g.edges.data.value(edge_cnt) - g.edges.data.value(edge_cnt)=Gnew; - Iupdate=Inew-g.edges.data.value(edge_cnt+1); - g.edges.data.value(edge_cnt+1)=Inew; -// Update matrix A and rhs vector - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - if(~(source==0)) - A(source,source) = A(source,source) + Gupdate; - B(source) = B(source)-Iupdate; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + Gupdate; - B(sink) =B(sink) + Iupdate; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - Gupdate; - A(sink,source) = A(sink,source) - Gupdate; - end - X=X+1; - clear tempModel; - end - end -endfunction - diff --git a/OSCAD/LPCSim/LPCSim/OpAnalysis.sci b/OSCAD/LPCSim/LPCSim/OpAnalysis.sci deleted file mode 100644 index 57e2d98..0000000 --- a/OSCAD/LPCSim/LPCSim/OpAnalysis.sci +++ /dev/null @@ -1,138 +0,0 @@ -// OpAnalysis.sci is a scilab file to perform Operating point Analysis. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -// It is modified by Yogesh Dilip Save for OSCAD Software on October 2012 - -function [A,B,x]=OPAnalysis(A,B) - global displayNLFlag; - global g; - global model; - global LPCSim_HOME; -// Find node potetial and current through devices whose device characteristic can not be expressed in terms of voltage - x=findNodePotential(A,B); - -// Find branch voltage from node potential - voltage=findBranchVoltage(x); - -// Find branch current from branch voltage using device characteristic - current=findBranchCurrent(x,voltage); - - if(NLFlag) then - if symbolic then - if displayNLFlag then - mprintf("-----------------------------------------------------------\n"); - mprintf("Application of Newton-Raphson method: \n"); - disp('Nonliner models:'); - Edges=edge_number(g); - X=1; - for edge_cnt = 1:Edges, - if(g.edges.data.type(edge_cnt)=='D') - tempModel=model(X); - Is=tempModel(2); Vt=tempModel(3); - X=X+1; - devName=strsplit(g.edges.data.devName(edge_cnt),1); - devSubscript=devName(2); - mprintf("See linearized model for diode D%s in diode_D%s.eps\n",devSubscript,devSubscript); - unix_g('cp '+LPCSim_HOME+'/diode_Dref.pstex .'); - unix_g('cp '+LPCSim_HOME+'/diode_Dref.pstex_t .'); - unix_g('cp '+LPCSim_HOME+'/latfont* .'); - unix_g(LPCSim_HOME+'/nonlinearDevice.sh ' + devSubscript); - displayNLFlag=%F; - end - end - [Asymb,Bsymb,Csymb,xsymb]=buildMatricesSymbLin(_T); - if displayMatrix then - mprintf("The system of equations Ax=b (Symbolically):\n"); - mprintf("Where Ax=b represents equations after linearization of nonlinear elements.\n"); - mprintf("-----------------------------------------------------------\n"); - disp(xsymb,"x=",Bsymb,"B=",Asymb,"A="); - pause; - end - end - end - - for i=1:MaxNRitr -// Check device characteristic of non-linear devices - flag=checkForDeviceChar(voltage,current); - if(flag) break; end -// Call Newton Raphson method to update the value of linearized model of nonlinear devices - [A,B]=NR(A,B,voltage,current,i-1); - if displayMatrix then - mprintf("-----------------------------------------------------------\n"); - mprintf("Operating Point (DC) Analysis: \n"); - mprintf("NR Iteration: %d \n",i); - mprintf("The system of equations Ax=b (Numerically):\n"); - mprintf("-----------------------------------------------------------\n"); - format('e',10); - disp(B,"B=",A,"A="); - end - - x=findNodePotential(A,B); - if displayMatrix then - mprintf("-----------------------------------------------------\n"); - mprintf("The solution of the circuit x:\n"); - mprintf("-----------------------------------------------------\n"); - format('e',10); - disp(x,"x="); - pause; - end - voltage=findBranchVoltage(x); - current=findBranchCurrent(x,voltage); - end - end -endfunction - -function x=findNodePotential(A,B) -// START: Solving Ax=B for Node potential x - A_sparse=sparse(A); - x=lusolve(A_sparse,B); - clear A_sparse; -// END: Solving Ax=B for x -endfunction - -function voltage=findBranchVoltage(x) -// Find voltages of complete network - global g; - Edges=edge_number(g); - voltage=zeros(Edges,1) - for edge_cnt = 1:Edges, - if(g.edges.head(edge_cnt)==1) - voltage(edge_cnt)=x(g.edges.tail(edge_cnt)-1); - elseif(g.edges.tail(edge_cnt)==1) - voltage(edge_cnt)=-x(g.edges.head(edge_cnt)-1); - else - voltage(edge_cnt)=x(g.edges.tail(edge_cnt)-1)-x(g.edges.head(edge_cnt)-1); - end - end -endfunction - -function current=findBranchCurrent(x,voltage) - global g; - T=1; - Nodes=node_number(g); - Edges=edge_number(g); - current=zeros(Edges,1) - for edge_cnt = 1:Edges, - if(g.edges.data.type(edge_cnt)=='R'|g.edges.data.type(edge_cnt)=='D'|g.edges.data.type(edge_cnt)=='X'|g.edges.data.type(edge_cnt)=='M') - current(edge_cnt)=g.edges.data.value(edge_cnt)*voltage(edge_cnt); - elseif(g.edges.data.type(edge_cnt)=='V') - current(edge_cnt)=x(Nodes-1+T); - T=T+1; - elseif(g.edges.data.type(edge_cnt)=='E') - current(edge_cnt)=x(Nodes-1+T); - T=T+1; - elseif(g.edges.data.type(edge_cnt)=='F') - current(edge_cnt)=x(Nodes-1+T); - T=T+1; - elseif(g.edges.data.type(edge_cnt)=='H') - current(edge_cnt)=x(Nodes-1+T); - T=T+1; - elseif(g.edges.data.type(edge_cnt)=='G') - current(edge_cnt)=voltage(edge_cnt+1)*g.edges.data.value(edge_cnt); - else - current(edge_cnt)=g.edges.data.value(edge_cnt); - end - end -endfunction diff --git a/OSCAD/LPCSim/LPCSim/buildMatrices.sci b/OSCAD/LPCSim/LPCSim/buildMatrices.sci deleted file mode 100644 index 6323b17..0000000 --- a/OSCAD/LPCSim/LPCSim/buildMatrices.sci +++ /dev/null @@ -1,415 +0,0 @@ -// buildMatrices.sci is a scilab file to construct a system matrix representing the circuit equations. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -function [A,B]=buildMatrices(_T) - /////////////////////////////////////////////////////////////////////////////// - // Create Matrice A and vector B corresponding to circuit equation - global g; - Nodes=node_number(g); - A = zeros(Nodes-1+_T,Nodes-1+_T); - B = zeros(Nodes-1+_T,1); - - _T=1; - for edge_cnt = 1:edge_number(g), - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - value=g.edges.data.value(edge_cnt); - select (g.edges.data.type(edge_cnt)) - case 'R' then // Resistor - if(~(source==0)) - A(source,source) = A(source,source) + value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - value; - A(sink,source) = A(sink,source) - value; - end - - case 'I' then // Current source - if(~(source==0)) - B(source) = B(source)-value; - end - if(~(sink==0)) - B(sink) =B(sink) + value; - end - - case 'V' then // Voltage source - if(~(source==0)) - A(Nodes-1+_T,source) = 1; - A(source,Nodes-1+_T) = 1; - end - if(~(sink==0)) - A(Nodes-1+_T,sink) = -1; - A(sink,Nodes-1+_T) = -1; - end - B(Nodes-1+_T) = value; - _T=_T+1; - - case 'C' then // Capacitor - if(~(source==0)) - A(source,source) = A(source,source) + value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - value; - A(sink,source) = A(sink,source) - value; - end - - case 'D' then // Diode - if(~(source==0)) - A(source,source) = A(source,source) + value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - value; - A(sink,source) = A(sink,source) - value; - end - - case 'G' then // Voltage controlled current source - if(~(source==0)) - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) + value; - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) - value; - end - end - if(~(sink==0)) - if(~(g.edges.tail(edge_cnt+1)==1)) - A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) - value; - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) + value; - end - end - - case 'E' then // Voltage controlled voltage source - if(~(source==0)) - A(source,Nodes-1+_T) = 1; - A(Nodes-1+_T,source) = 1; - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = value; - end - if(~(g.edges.head(edge_cnt+1)==1)) - A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = - value; - end - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = -1; - A(Nodes-1+_T,sink) = -1; - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = -value; - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = value; - end - end - _T=_T+1; - - case 'F' then // Current controlled current source - A(Nodes-1+_T,Nodes-1+_T) = 1; - A(Nodes-1+_T,Nodes-1+_T-1) = -value; - if(~(source==0)) - A(source,Nodes-1+_T) = 1; - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = -1; - end - _T=_T+1; - - case 'H' then // Current controlled voltage source - A(Nodes-1+_T,Nodes-1+_T-1) = -value; - if(~(source==0)) - A(source,Nodes-1+_T) = 1; - A(Nodes-1+_T,source) = 1; - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = -1; - A(Nodes-1+_T,sink) = -1; - end - _T=_T+1; - - case 'M' then // MOSFET - if(~(source==0)) - A(source,source) = A(source,source) + value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - value; - A(sink,source) = A(sink,source) - value; - end - - case 'X' then // User defined component - if(~(source==0)) - A(source,source) = A(source,source) + value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - value; - A(sink,source) = A(sink,source) - value; - end - - else - exit(0); - end - end -endfunction - -function [A,B]=buildMatrices2(g,x) - /////////////////////////////////////////////////////////////////////////////// - // Create Matrices A and B - Nodes=node_number(g); - _T=0; - for edge_cnt = 1:edge_number(g), - if(g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H'|g.edges.data.type(edge_cnt)=='C') - _T=_T+1; - end - end - A = zeros(Nodes+_T-1,Nodes+_T-1); - B = zeros(Nodes+_T-1,1); - - _T=1; - for edge_cnt = 1:edge_number(g), - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - value=g.edges.data.value(edge_cnt); - select (g.edges.data.type(edge_cnt)) - case 'R' then // Resistor - if(~(source==0)) - A(source,source) = A(source,source) + value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - value; - A(sink,source) = A(sink,source) - value; - end - - case 'M' then // MOSFET - if(~(source==0)) - A(source,source) = A(source,source) + value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - value; - A(sink,source) = A(sink,source) - value; - end - - case 'C' then // Capacitor - if(~(source==0)) - A(Nodes-1+_T,source) = 1; - A(source,Nodes-1+_T) = 1; - end - if(~(sink==0)) - A(Nodes-1+_T,sink) = -1; - A(sink,Nodes-1+_T) = -1; - end - if(~(source==0)) - B(Nodes-1+_T) = B(Nodes-1+_T)+x(source); - end - if(~(sink==0)) - B(Nodes-1+_T) = B(Nodes-1+_T)-x(sink); - end - _T=_T+1; - - case 'D' then // Diode - if(~(source==0)) - A(source,source) = A(source,source) + value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - value; - A(sink,source) = A(sink,source) - value; - end - - case 'G' then // Voltage controlled current source - if(~(source==0)) - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) + value; - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) - value; - end - end - if(~(sink==0)) - if(~(g.edges.tail(edge_cnt+1)==1)) - A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) - value; - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) + value; - end - end - - case 'I' then // Current source - if(~(source==0)) - B(source) = B(source)-value; - end - if(~(sink==0)) - B(sink) =B(sink) + value; - end - - case 'V' then // Voltage Source - if(~(source==0)) - A(Nodes-1+_T,source) = 1; - A(source,Nodes-1+_T) = 1; - end - if(~(sink==0)) - A(Nodes-1+_T,sink) = -1; - A(sink,Nodes-1+_T) = -1; - end - B(Nodes-1+_T) = value; - _T=_T+1; - - case 'E' then - if(~(source==0)) - A(source,Nodes-1+_T) = 1; - A(Nodes-1+_T,source) = -1; - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = value; - end - if(~(g.edges.head(edge_cnt+1)==1)) - A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = - value; - end - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = -1; - A(Nodes-1+_T,sink) = 1; - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = -value; - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = value; - end - end - _T=_T+1; - case 'F' then - A(Nodes-1+_T,Nodes-1+_T) = 1; - A(Nodes-1+_T,Nodes-1+_T-1) = -value; - if(~(source==0)) - A(source,Nodes-1+_T) = 1; - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = -1; - end - _T=_T+1; - case 'H' then - A(Nodes-1+_T,Nodes-1+_T-1) = -value; - if(~(source==0)) - A(source,Nodes-1+_T) = 1; - A(Nodes-1+_T,source) = 1; - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = -1; - A(Nodes-1+_T,sink) = -1; - end - _T=_T+1; - else - exit(0); - end - end -endfunction - -function [A,B]=buildMatrices3(g) - /////////////////////////////////////////////////////////////////////////////// - // Create Matrices A and B - Nodes=node_number(g); - _T=0; - for edge_cnt = 1:edge_number(g), - if(g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H') - _T=_T+1; - end - end - A = zeros(Nodes+_T-1,Nodes+_T-1); - B = zeros(Nodes+_T-1,1); - - _T=1; - for edge_cnt = 1:edge_number(g), - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - value=g.edges.data.value(edge_cnt); - select (g.edges.data.type(edge_cnt)) - case 'R' then - if(~(source==0)) - A(source,source) = A(source,source) + value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - value; - A(sink,source) = A(sink,source) - value; - end - case 'I' then - if(~(source==0)) - B(source) = B(source)-value; - end - if(~(sink==0)) - B(sink) =B(sink) + value; - end - case 'V' then - if(~(source==0)) - A(Nodes-1+_T,source) = 1; - A(source,Nodes-1+_T) = 1; - end - if(~(sink==0)) - A(Nodes-1+_T,sink) = -1; - A(sink,Nodes-1+_T) = -1; - end - B(Nodes-1+_T) = value; - _T=_T+1; - case 'E' then - if(~(source==0)) - A(source,Nodes-1+_T) = 1; - A(Nodes-1+_T,source) = -1; - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = value; - end - if(~(g.edges.head(edge_cnt+1)==1)) - A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = - value; - end - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = -1; - A(Nodes-1+_T,sink) = 1; - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = -value; - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = value; - end - end - _T=_T+1; - case 'H' then - A(Nodes-1+_T,Nodes-1+_T-1) = -value; - if(~(source==0)) - A(source,Nodes-1+_T) = 1; - A(Nodes-1+_T,source) = 1; - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = -1; - A(Nodes-1+_T,sink) = -1; - end - _T=_T+1; - else - exit(0); - end - end -endfunction diff --git a/OSCAD/LPCSim/LPCSim/buildMatricesSymbolic.sci b/OSCAD/LPCSim/LPCSim/buildMatricesSymbolic.sci deleted file mode 100644 index 66faf87..0000000 --- a/OSCAD/LPCSim/LPCSim/buildMatricesSymbolic.sci +++ /dev/null @@ -1,802 +0,0 @@ -// buildMatricesSymbolic.sci is a scilab file to build equations of the circuit symbolically. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -// It is modified by Yogesh Dilip Save for OSCAD Software on October 2012 -warning('off'); -function [A,B,D,C,x,fx]=buildMatricesSymbolic(_T) -// Create Matrice A, D, C and vector b corresponding to circuit equation - global g; - global('model') - Nodes=node_number(g); - Edges=edge_number(g); - A = emptystr(Nodes-1+_T,Nodes-1+_T); - D = emptystr(Nodes-1+_T,length(model)); - C = emptystr(Nodes-1+_T,Nodes-1+_T); - B = emptystr(Nodes-1+_T,1); - x = emptystr(Nodes-1+_T,1); - fx = emptystr(length(model),1); - - _T=1; - X=1; - controlledSourceFlag=%F - for i=1:Nodes-1, - x(i,1)="v_"+ msprintf("%d",i) - end - for edge_cnt = 1:edge_number(g), - if(controlledSourceFlag) - controlledSourceFlag=%F - continue - end - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - value=g.edges.data.devName(edge_cnt); - select (g.edges.data.type(edge_cnt)) - case 'R' then // Resistor - if(~(source==0)) - A(source,source) = A(source,source) + "+"+ value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) +"+"+ value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) +"-"+ value; - A(sink,source) = A(sink,source) +"-"+ value; - end - - case 'I' then // Current source - if(sscanf(value, "%c")=='I') - if(~(source==0)) - B(source) = B(source)+"-"+value; - end - if(~(sink==0)) - B(sink) =B(sink) +"+"+ value; - end - end - - case 'V' then // Voltage source - if(~(source==0)) - A(Nodes-1+_T,source) = "1"; - A(source,Nodes-1+_T) = "1"; - end - if(~(sink==0)) - A(Nodes-1+_T,sink) = "-1"; - A(sink,Nodes-1+_T) = "-1"; - end - B(Nodes-1+_T) = value; - x(Nodes-1+_T)="i_"+ value; - _T=_T+1; - - case 'C' then // Capacitor - if(~(source==0)) - C(source,source) = C(source,source) +"+"+ value; - end - if(~(sink==0)) - C(sink,sink) = C(sink,sink) +" + "+ value; - end - if(~(sink==0) & ~(source==0)) - C(source,sink) = C(source,sink) +"-"+value; - C(sink,source) = C(sink,source) +"-"+value; - end - - case 'D' then // Diode - if(~(source==0)) - D(source,X) = value+"_f"; - end - if(~(sink==0)) - D(sink,X) = "-"+ value+"_f"; - end - if(source==0) - fx(X)="(v_"+string(sink)+")"; - elseif(sink==0) - fx(X)="(v_"+string(source)+")"; - else - fx(X)="(v_"+string(source)+",v_"+string(sink)+")"; - end - X=X+1; - - case 'G' then // Voltage controlled current source - if(~(source==0)) - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) +"+"+ convstr(value,'l'); - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) +"-"+ convstr(value,'l'); - end - end - if(~(sink==0)) - if(~(g.edges.tail(edge_cnt+1)==1)) - A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) +"-"+ convstr(value,'l'); - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) +"+"+ convstr(value,'l'); - end - end - controlledSourceFlag=%T - - case 'E' then // Voltage controlled voltage source - if(~(source==0)) - A(source,Nodes-1+_T) = "1"; - A(Nodes-1+_T,source) = "1"; - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = convstr(value,'l'); - end - if(~(g.edges.head(edge_cnt+1)==1)) - A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = "-"+convstr(value,'l'); - end - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = "-1"; - A(Nodes-1+_T,sink) = "-1"; - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = "-"+convstr(value,'l'); - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = convstr(value,'l'); - end - end - x(Nodes-1+_T)="i_"+ value; - _T=_T+1; - controlledSourceFlag=%T - - case 'F' then // Current controlled current source - A(Nodes-1+_T,Nodes-1+_T) = 1; - A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l'); - if(~(source==0)) - A(source,Nodes-1+_T) = 1; - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = -1; - end - x(Nodes-1+_T)="i_"+ value; - _T=_T+1; - - case 'H' then // Current controlled voltage source - A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l'); - if(~(source==0)) - A(source,Nodes-1+_T) = "1"; - A(Nodes-1+_T,source) = "1"; - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = "-1"; - A(Nodes-1+_T,sink) = "-1"; - end - x(Nodes-1+_T)="i_"+ value; - _T=_T+1; - - case 'M' then // MOSFET - if(~(source==0)) - A(source,source) = A(source,source) + value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - value; - A(sink,source) = A(sink,source) - value; - end - - case 'X' then // User defined component - if(~(source==0)) - A(source,source) = A(source,source) +" + "+ value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) +" + "+ value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) +" - "+value; - A(sink,source) = A(sink,source) +" - "+value; - end - - else - exit(0); - end - end - _T=_T-1; - - firstValue=%T - mprintf("-----------------------------------------------------------\n"); - mprintf("System of Equations representing the electrical circuit:\n"); - mprintf("-----------------------------------------------------------\n"); -// Fill zero entries - for i=1:Nodes-1+_T, - mprintf("\n "); - for j=1:Nodes-1+_T, - if(length(A(i,j))==0) - A(i,j)="0"; - elseif(sscanf(A(i,j), "%c")=='+') - tempstr=strsplit(A(i,j),1); - A(i,j)=tempstr(2); - if firstValue then - if ~(strcmp(A(i,j),'1')) then - mprintf("%s",x(j)); - else - mprintf("(%s)%s",A(i,j),x(j)); - end - firstValue=%F; - else - if ~(strcmp(A(i,j),'1')) then - mprintf(" + %s",x(j)); - else - mprintf(" + (%s)%s",A(i,j),x(j)); - end - end - else - if firstValue then - if ~(strcmp(A(i,j),'1')) then - mprintf("%s",x(j)); - else - mprintf("(%s)%s",A(i,j),x(j)); - end - firstValue=%F; - else - if ~(strcmp(A(i,j),'1')) then - mprintf(" + %s",x(j)); - else - mprintf(" + (%s)%s",A(i,j),x(j)); - end - end - end - if(length(C(i,j))==0) - C(i,j)="0"; - elseif(sscanf(C(i,j), "%c")=='+') - tempstr=strsplit(C(i,j),1); - C(i,j)=tempstr(2); - if firstValue then - mprintf("(%s)d%s/dt",C(i,j),x(j)); - firstValue=%F; - else - mprintf(" + (%s)d%s/dt",C(i,j),x(j)); - end - else - if firstValue then - mprintf("(%s)d%s/dt",C(i,j),x(j)); - firstValue=%F; - else - mprintf(" + (%s)d%s/dt",C(i,j),x(j)); - end - end - end - for j=1:length(model), - if(length(D(i,j))==0) - D(i,j)="0"; - elseif(firstValue) - mprintf("%s%s",D(i,j),fx(j)); - firstValue=%F; - else - mprintf(" + %s%s",D(i,j),fx(j)); - end - end - if(length(B(i,1))==0) - B(i,1)="0"; - elseif(sscanf(B(i,1), "%c")=='+') - tempstr=strsplit(B(i,1),1); - B(i,1)=tempstr(2); - end - mprintf(" = %s\n",B(i,1)); - firstValue=%T - end - global('NLFlag'); - if NLFlag then - mprintf("-----------------------------------------------------------\n"); - mprintf(" Dn_f(v_a,v_b)=Is_n(1-e^((v_a-v_b)/vt_n))\n where Is_n=reverse saturation current and vt_n=threshold voltage of diode n\n") - end - mprintf("-----------------------------------------------------------\n"); -endfunction - -function [A,B,D,x,fx]=buildMatricesSymbStatic(_T) -global('currentAnalysis'); -// Create Matrice A, D, C and vector b corresponding to circuit equation - global g; - global('model') - Nodes=node_number(g); - Edges=edge_number(g); - A = emptystr(Nodes-1+_T,Nodes-1+_T); - D = emptystr(Nodes-1+_T,length(model)); - B = emptystr(Nodes-1+_T,1); - x = emptystr(Nodes-1+_T,1); - fx = emptystr(length(model),1); - - _T=1; - X=1; - controlledSourceFlag=%F - for i=1:Nodes-1, - x(i,1)="v_"+ msprintf("%d",i) - end - for edge_cnt = 1:edge_number(g), - if(controlledSourceFlag) - controlledSourceFlag=%F - continue - end - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - value=g.edges.data.devName(edge_cnt); - select (g.edges.data.type(edge_cnt)) - case 'R' then // Resistor - if(~(source==0)) - A(source,source) = A(source,source) + "+"+ value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) +"+"+ value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) +"-"+ value; - A(sink,source) = A(sink,source) +"-"+ value; - end - - case 'I' then // Current source - if(sscanf(value, "%c")=='I') - if(~(source==0)) - B(source) = B(source)+"-"+value; - end - if(~(sink==0)) - B(sink) =B(sink) +"+"+ value; - end - elseif((sscanf(value, "%c")=='C') & currentAnalysis) - if(~(source==0)) - B(source) = B(source)+"-i_"+value; - end - if(~(sink==0)) - B(sink) =B(sink) +"+i_"+ value; - end - end - - case 'V' then // Voltage source - if(~(source==0)) - A(Nodes-1+_T,source) = "1"; - A(source,Nodes-1+_T) = "1"; - end - if(~(sink==0)) - A(Nodes-1+_T,sink) = "-1"; - A(sink,Nodes-1+_T) = "-1"; - end - B(Nodes-1+_T) = value; - x(Nodes-1+_T)="i_"+ value; - _T=_T+1; - - case 'C' then // Capacitor - if currentAnalysis then - if(~(source==0)) - A(source,source) = A(source,source) +"+R_"+ value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) +"+R_"+ value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) +"-R_"+value; - A(sink,source) = A(sink,source) +"-R_"+value; - end - end - - case 'D' then // Diode - if(~(source==0)) - D(source,X) = value+"_f"; - end - if(~(sink==0)) - D(sink,X) = "-"+ value+"_f"; - end - if(source==0) - fx(X)="(v_"+string(sink)+")"; - elseif(sink==0) - fx(X)="(v_"+string(source)+")"; - else - fx(X)="(v_"+string(source)+",v_"+string(sink)+")"; - end - X=X+1; - - case 'G' then // Voltage controlled current source - if(~(source==0)) - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) +"+"+ convstr(value,'l'); - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) +"-"+ convstr(value,'l'); - end - end - if(~(sink==0)) - if(~(g.edges.tail(edge_cnt+1)==1)) - A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) +"-"+ convstr(value,'l'); - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) +"+"+ convstr(value,'l'); - end - end - controlledSourceFlag=%T - - case 'E' then // Voltage controlled voltage source - if(~(source==0)) - A(source,Nodes-1+_T) = "1"; - A(Nodes-1+_T,source) = "1"; - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = convstr(value,'l'); - end - if(~(g.edges.head(edge_cnt+1)==1)) - A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = "-"+convstr(value,'l'); - end - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = "-1"; - A(Nodes-1+_T,sink) = "-1"; - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = "-"+convstr(value,'l'); - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = convstr(value,'l'); - end - end - x(Nodes-1+_T)="i_"+ value; - _T=_T+1; - controlledSourceFlag=%T - - case 'F' then // Current controlled current source - A(Nodes-1+_T,Nodes-1+_T) = 1; - A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l'); - if(~(source==0)) - A(source,Nodes-1+_T) = 1; - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = -1; - end - x(Nodes-1+_T)="i_"+ value; - _T=_T+1; - - case 'H' then // Current controlled voltage source - A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l'); - if(~(source==0)) - A(source,Nodes-1+_T) = "1"; - A(Nodes-1+_T,source) = "1"; - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = "-1"; - A(Nodes-1+_T,sink) = "-1"; - end - x(Nodes-1+_T)="i_"+ value; - _T=_T+1; - - case 'M' then // MOSFET - if(~(source==0)) - A(source,source) = A(source,source) + value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - value; - A(sink,source) = A(sink,source) - value; - end - - case 'X' then // User defined component - if(~(source==0)) - A(source,source) = A(source,source) +" + "+ value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) +" + "+ value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) +" - "+value; - A(sink,source) = A(sink,source) +" - "+value; - end - - else - exit(0); - end - end - _T=_T-1; - - firstValue=%T - mprintf("-----------------------------------------------------------\n"); - mprintf("System of Equations representing the electrical circuit:\n"); - mprintf("-----------------------------------------------------------\n"); -// Fill zero entries - for i=1:Nodes-1+_T, - mprintf("\n "); - for j=1:Nodes-1+_T, - if(length(A(i,j))==0) - A(i,j)="0"; - elseif(sscanf(A(i,j), "%c")=='+') - tempstr=strsplit(A(i,j),1); - A(i,j)=tempstr(2); - if firstValue then - if ~(strcmp(A(i,j),'1')) then - mprintf("%s",x(j)); - else - mprintf("(%s)%s",A(i,j),x(j)); - end - firstValue=%F; - else - if ~(strcmp(A(i,j),'1')) then - mprintf(" + %s",x(j)); - else - mprintf(" + (%s)%s",A(i,j),x(j)); - end - end - else - if firstValue then - if ~(strcmp(A(i,j),'1')) then - mprintf("%s",x(j)); - else - mprintf("(%s)%s",A(i,j),x(j)); - end - firstValue=%F; - else - if ~(strcmp(A(i,j),'1')) then - mprintf(" + %s",x(j)); - else - mprintf(" + (%s)%s",A(i,j),x(j)); - end - end - end - end - for j=1:length(model), - if(length(D(i,j))==0) - D(i,j)="0"; - elseif(firstValue) - mprintf("%s%s",D(i,j),fx(j)); - firstValue=%F; - else - mprintf(" + %s%s",D(i,j),fx(j)); - end - end - if(length(B(i,1))==0) - B(i,1)="0"; - elseif(sscanf(B(i,1), "%c")=='+') - tempstr=strsplit(B(i,1),1); - B(i,1)=tempstr(2); - end - mprintf(" = %s\n",B(i,1)); - firstValue=%T - end - if NLFlag then - mprintf("-----------------------------------------------------------\n"); - mprintf(" Dn_f(v_a,v_b)=Is_n(1-e^((v_a-v_b)/vt_n))\n where Is_n=reverse saturation current and vt_n=threshold voltage of diode n\n") - end - mprintf("-----------------------------------------------------------\n"); -endfunction - -function [A,B,C,x]=buildMatricesSymbLin(_T) -// Create Matrice A, D, C and vector b corresponding to circuit equation - global g; - global('currentAnalysis'); - Nodes=node_number(g); - A = emptystr(Nodes-1+_T,Nodes-1+_T); - C = emptystr(Nodes-1+_T,Nodes-1+_T); - B = emptystr(Nodes-1+_T,1); - x = emptystr(Nodes-1+_T,1); - - _T=1; - controlledSourceFlag=%F - for i=1:Nodes-1, - x(i,1)="v_"+ msprintf("%d",i) - end - for edge_cnt = 1:edge_number(g), - if(controlledSourceFlag) - controlledSourceFlag=%F - continue - end - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - value=g.edges.data.devName(edge_cnt); - select (g.edges.data.type(edge_cnt)) - case 'R' then // Resistor - if(~(source==0)) - A(source,source) = A(source,source) + "+"+ value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) +"+"+ value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) +"-"+ value; - A(sink,source) = A(sink,source) +"-"+ value; - end - - case 'I' then // Current source - if(sscanf(value, "%c")=='I') - if(~(source==0)) - B(source) = B(source)+"-"+value; - end - if(~(sink==0)) - B(sink) =B(sink) +"+"+ value; - end - elseif(~(sscanf(value, "%c")=='C') | currentAnalysis) - if(~(source==0)) - B(source) = B(source)+"-i_"+value; - end - if(~(sink==0)) - B(sink) =B(sink) +"+i_"+ value; - end - end - - case 'V' then // Voltage source - if(~(source==0)) - A(Nodes-1+_T,source) = "1"; - A(source,Nodes-1+_T) = "1"; - end - if(~(sink==0)) - A(Nodes-1+_T,sink) = "-1"; - A(sink,Nodes-1+_T) = "-1"; - end - B(Nodes-1+_T) = value; - x(Nodes-1+_T)="i_"+ value; - _T=_T+1; - - case 'C' then // Capacitor - if currentAnalysis then - if(~(source==0)) - C(source,source) = C(source,source) +"+"+ value; - end - if(~(sink==0)) - C(sink,sink) = C(sink,sink) +" + "+ value; - end - if(~(sink==0) & ~(source==0)) - C(source,sink) = C(source,sink) +"-"+value; - C(sink,source) = C(sink,source) +"-"+value; - end - end - - case 'D' then // Diode - if(~(source==0)) - A(source,source) = A(source,source) +"+R_"+ value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) +"+R_"+ value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) +"-R_"+ value; - A(sink,source) = A(sink,source) +"-R_"+ value; - end - - case 'G' then // Voltage controlled current source - if(~(source==0)) - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) +"+"+ convstr(value,'l'); - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) +"-"+ convstr(value,'l'); - end - end - if(~(sink==0)) - if(~(g.edges.tail(edge_cnt+1)==1)) - A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) +"-"+ convstr(value,'l'); - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) +"+"+ convstr(value,'l'); - end - end - controlledSourceFlag=%T - - case 'E' then // Voltage controlled voltage source - if(~(source==0)) - A(source,Nodes-1+_T) = "1"; - A(Nodes-1+_T,source) = "1"; - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = convstr(value,'l'); - end - if(~(g.edges.head(edge_cnt+1)==1)) - A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = "-"+convstr(value,'l'); - end - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = "-1"; - A(Nodes-1+_T,sink) = "-1"; - if(~(g.edges.tail(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = "-"+convstr(value,'l'); - end - if(~(g.edges.head(edge_cnt+1)-1==0)) - A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = convstr(value,'l'); - end - end - x(Nodes-1+_T)="i_"+ value; - _T=_T+1; - controlledSourceFlag=%T - - case 'F' then // Current controlled current source - A(Nodes-1+_T,Nodes-1+_T) = 1; - A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l'); - if(~(source==0)) - A(source,Nodes-1+_T) = 1; - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = -1; - end - x(Nodes-1+_T)="i_"+ value; - _T=_T+1; - - case 'H' then // Current controlled voltage source - A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l'); - if(~(source==0)) - A(source,Nodes-1+_T) = 1; - A(Nodes-1+_T,source) = 1; - end - if(~(sink==0)) - A(sink,Nodes-1+_T) = -1; - A(Nodes-1+_T,sink) = -1; - end - x(Nodes-1+_T)="i"+ value; - _T=_T+1; - - case 'M' then // MOSFET - if(~(source==0)) - A(source,source) = A(source,source) + value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - value; - A(sink,source) = A(sink,source) - value; - end - - case 'X' then // User defined component - if(~(source==0)) - A(source,source) = A(source,source) +" + "+ value; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) +" + "+ value; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) +" - "+value; - A(sink,source) = A(sink,source) +" - "+value; - end - - else - exit(0); - end - end - _T=_T-1; - - firstValue=%T - mprintf("-----------------------------------------------------------\n"); - mprintf("System of Equations representing the electrical circuit:\n"); - mprintf("-----------------------------------------------------------\n"); -// Fill zero entries - for i=1:Nodes-1+_T, - mprintf("\n "); - for j=1:Nodes-1+_T, - if(length(A(i,j))==0) - A(i,j)="0"; - elseif(sscanf(A(i,j), "%c")=='+') - tempstr=strsplit(A(i,j),1); - A(i,j)=tempstr(2); - if firstValue then - if ~(strcmp(A(i,j),'1')) then - mprintf("%s",x(j)); - else - mprintf("(%s)%s",A(i,j),x(j)); - end - firstValue=%F; - else - if ~(strcmp(A(i,j),'1')) then - mprintf(" + %s",x(j)); - else - mprintf(" + (%s)%s",A(i,j),x(j)); - end - end - else - if firstValue then - if ~(strcmp(A(i,j),'1')) then - mprintf("%s",x(j)); - else - mprintf("(%s)%s",A(i,j),x(j)); - end - firstValue=%F; - else - if ~(strcmp(A(i,j),'1')) then - mprintf(" + %s",x(j)); - else - mprintf(" + (%s)%s",A(i,j),x(j)); - end - end - end - end - if(length(B(i,1))==0) - B(i,1)="0"; - elseif(sscanf(B(i,1), "%c")=='+') - tempstr=strsplit(B(i,1),1); - B(i,1)=tempstr(2); - end - mprintf(" = %s\n",B(i,1)); - firstValue=%T - end - mprintf("-----------------------------------------------------------\n"); -endfunction diff --git a/OSCAD/LPCSim/LPCSim/ckt/ForwardBiasedDiode.ckt b/OSCAD/LPCSim/LPCSim/ckt/ForwardBiasedDiode.ckt deleted file mode 100644 index 4501665..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/ForwardBiasedDiode.ckt +++ /dev/null @@ -1,6 +0,0 @@ -* Diode in forward biased -V1 1 0 dc 1 -D1 1 2 mymodel (1e-8 0.026) -R1 2 0 100 -.op -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/HWRectifier.ckt b/OSCAD/LPCSim/LPCSim/ckt/HWRectifier.ckt deleted file mode 100644 index cba98ec..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/HWRectifier.ckt +++ /dev/null @@ -1,6 +0,0 @@ -V1 1 0 sine (5 50) -D2 1 2 mymodel (1e-8 0.026) -R3 2 0 1 -.tran 0 100 0.5 -.plot v(1) v(2) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/HWRectifierFilter.ckt b/OSCAD/LPCSim/LPCSim/ckt/HWRectifierFilter.ckt deleted file mode 100644 index 8df0e6b..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/HWRectifierFilter.ckt +++ /dev/null @@ -1,8 +0,0 @@ -* Half-Wave Rectifier -V1 1 0 sine (5 50) -D1 1 2 mymodel (1e-8 0.026) -R1 2 0 10000 -C1 2 0 10e-3 -.tran 0 100 0.5 -.plot v(1) v(2) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/NMOS.ckt b/OSCAD/LPCSim/LPCSim/ckt/NMOS.ckt deleted file mode 100644 index c9e1c78..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/NMOS.ckt +++ /dev/null @@ -1,7 +0,0 @@ -V1 2 0 dc 2.5 -M1 1 0 2 N (20e-6 0.18e-6 1 1e-3 1e-1) -V2 3 0 sweep 0 -V3 3 1 dc 0 -.dc 0 5 0.1 -.plot i(V3) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/RC.ckt b/OSCAD/LPCSim/LPCSim/ckt/RC.ckt deleted file mode 100644 index e3ec032..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/RC.ckt +++ /dev/null @@ -1,6 +0,0 @@ -V1 1 0 dc 5 -R1 1 2 1e3 -C1 2 0 0.1e-6 -.tran 0 5e-3 0.5e-3 -.plot v(2) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/RingOsc.ckt b/OSCAD/LPCSim/LPCSim/ckt/RingOsc.ckt deleted file mode 100644 index f30dcf2..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/RingOsc.ckt +++ /dev/null @@ -1,66 +0,0 @@ -V1 1 0 dc 1.8 -M1 3 1 2 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M2 3 0 2 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M3 4 1 3 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M4 4 0 3 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M5 5 1 4 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M6 5 0 4 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M7 6 1 5 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M8 6 0 5 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M9 7 1 6 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M10 7 0 6 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M11 8 1 7 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M12 8 0 7 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M13 9 1 8 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M14 9 0 8 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M15 10 1 9 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M16 10 0 9 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M17 11 1 10 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M18 11 0 10 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M19 12 1 11 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M20 12 0 11 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M21 13 1 12 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M22 13 0 12 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M23 14 1 13 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M24 14 0 13 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M25 15 1 14 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M26 15 0 14 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M27 16 1 15 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M28 16 0 15 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M29 17 1 16 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M30 17 0 16 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M31 18 1 17 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M32 18 0 17 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M33 19 1 18 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M34 19 0 18 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M35 20 1 19 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M36 20 0 19 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M37 21 1 20 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M38 21 0 20 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M39 22 1 21 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M40 22 0 21 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M41 23 1 22 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M42 23 0 22 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M43 24 1 23 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M44 24 0 23 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M45 25 1 24 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M46 25 0 24 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M47 26 1 25 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M48 26 0 25 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M49 27 1 26 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M50 27 0 26 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M51 28 1 27 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M52 28 0 27 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M53 29 1 28 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M54 29 0 28 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M55 30 1 29 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M56 30 0 29 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M57 31 1 30 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M58 31 0 30 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M59 32 1 31 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M60 32 0 31 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -M61 2 1 32 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -M62 2 0 32 N (20e-6 0.18e-6 0.4 1e-3 1e-1) -.tran 0 20e-9 1e-9 -.plot v(2) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/Vsweep.ckt b/OSCAD/LPCSim/LPCSim/ckt/Vsweep.ckt deleted file mode 100644 index 7fd7e27..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/Vsweep.ckt +++ /dev/null @@ -1,6 +0,0 @@ -V1 1 0 sweep 0 -R1 1 2 1 -R2 2 0 1 -.dc 0 5 0.1 -.plot v(1) v(2) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/bridge.ckt b/OSCAD/LPCSim/LPCSim/ckt/bridge.ckt deleted file mode 100644 index 3c6f4eb..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/bridge.ckt +++ /dev/null @@ -1,10 +0,0 @@ -* Bridge Rectifier -V1 1 2 sine (5 50) -D1 1 3 mymodel (1e-8 0.026) -D2 2 3 mymodel (1e-8 0.026) -D3 0 1 mymodel (1e-8 0.026) -D4 0 2 mymodel (1e-8 0.026) -R1 3 0 1 -.tran 0.0005 0.04 0 -.plot v(1)-v(2) v(3) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/bridgeFilter.ckt b/OSCAD/LPCSim/LPCSim/ckt/bridgeFilter.ckt deleted file mode 100644 index a153700..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/bridgeFilter.ckt +++ /dev/null @@ -1,10 +0,0 @@ -V1 1 2 sine (5 50) -D1 1 3 mymodel (1e-8 0.026) -D2 2 3 mymodel (1e-8 0.026) -D3 0 1 mymodel (1e-8 0.026) -D4 0 2 mymodel (1e-8 0.026) -R1 3 0 10000 -C1 3 0 1e-2 -.tran 0 100 0.5 -.plot v(1)-v(2) v(3) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/cmos.ckt b/OSCAD/LPCSim/LPCSim/ckt/cmos.ckt deleted file mode 100644 index c04311c..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/cmos.ckt +++ /dev/null @@ -1,7 +0,0 @@ -V1 1 0 dc 1.8 -M1 3 1 2 P (20e-6 0.18e-6 -0.4 8.56e-3) -M2 3 0 2 N (10e-6 0.18e-6 0.4 8.56e-3) -V2 2 0 sweep 0 -.dc 0 1.8 0.05 -.plot v(3) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/inverter.ckt b/OSCAD/LPCSim/LPCSim/ckt/inverter.ckt deleted file mode 100644 index c04311c..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/inverter.ckt +++ /dev/null @@ -1,7 +0,0 @@ -V1 1 0 dc 1.8 -M1 3 1 2 P (20e-6 0.18e-6 -0.4 8.56e-3) -M2 3 0 2 N (10e-6 0.18e-6 0.4 8.56e-3) -V2 2 0 sweep 0 -.dc 0 1.8 0.05 -.plot v(3) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/linear1.ckt b/OSCAD/LPCSim/LPCSim/ckt/linear1.ckt deleted file mode 100644 index 2f4a3ee..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/linear1.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* linear circuit -V1 1 0 dc 1 -R1 1 2 1 -R2 2 0 1 -E1 2 3 4 5 0.5 -I1 0 3 dc 1 -R3 4 0 1 -R4 3 4 1 -G1 3 5 0 4 0.5 -R5 5 4 0.5 -R6 5 0 1 -.op -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/linear2.ckt b/OSCAD/LPCSim/LPCSim/ckt/linear2.ckt deleted file mode 100644 index 19c7c48..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/linear2.ckt +++ /dev/null @@ -1,10 +0,0 @@ -* Example of current controlled voltage source -I1 0 1 dc 1 -R1 1 0 0.2 -R2 1 2 0.1 -R3 4 0 0.2 -R4 2 3 0.1 -V1 2 4 dc 0 -H1 3 0 V1 2 -.op -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/modifiedNodalExample.ckt b/OSCAD/LPCSim/LPCSim/ckt/modifiedNodalExample.ckt deleted file mode 100644 index d3b09bf..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/modifiedNodalExample.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* Example to explain modified nodal analyis -V1 1 0 dc 5 -R1 1 2 1 -R2 2 0 1 -R3 2 3 1 -R4 1 3 1 -V2 3 0 dc 10 -.op -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/mosfet.sci b/OSCAD/LPCSim/LPCSim/ckt/mosfet.sci deleted file mode 100644 index 319a9ec..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/mosfet.sci +++ /dev/null @@ -1,6 +0,0 @@ -M1 2 0 3 N (20e-6 0.18e-6 1 1e-3 1e-2) -V1 3 0 dc 2.5 -V2 1 0 dc 5 -R2 1 3 1 -.op -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/myComp.ckt b/OSCAD/LPCSim/LPCSim/ckt/myComp.ckt deleted file mode 100644 index 7709b3c..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/myComp.ckt +++ /dev/null @@ -1,5 +0,0 @@ -V1 1 0 dc 5 -X2 1 2 myR (2) -R3 2 0 1 -.op -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/myCompSweep.ckt b/OSCAD/LPCSim/LPCSim/ckt/myCompSweep.ckt deleted file mode 100644 index d72be10..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/myCompSweep.ckt +++ /dev/null @@ -1,6 +0,0 @@ -V1 1 0 sweep 0 -R1 1 2 1 -X2 2 0 myR (1) -.dc 0 5 0.1 -.plot v(1) v(2) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/nodalExample.ckt b/OSCAD/LPCSim/LPCSim/ckt/nodalExample.ckt deleted file mode 100644 index 828ad04..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/nodalExample.ckt +++ /dev/null @@ -1,10 +0,0 @@ -*Nodal Analysis Example -I1 0 1 dc 1 -R1 1 0 1 -R2 1 2 1 -R3 2 0 1 -R4 2 3a 2 -R5 3a 0 1 -I2 0 3a dc 1 -.op -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/pmos.ckt b/OSCAD/LPCSim/LPCSim/ckt/pmos.ckt deleted file mode 100644 index 635a0d0..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/pmos.ckt +++ /dev/null @@ -1,7 +0,0 @@ -V1 2 0 dc 0 -M1 1 0 2 P (20e-6 0.18e-6 -0.4 1e-3 1e-1) -V2 3 0 sweep 0 -V3 3 1 dc 0 -.dc 0 1.8 0.1 -.plot i(V3) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/rc1.ckt b/OSCAD/LPCSim/LPCSim/ckt/rc1.ckt deleted file mode 100644 index 3793f46..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/rc1.ckt +++ /dev/null @@ -1,8 +0,0 @@ -V1 1 0 dc 5 -R1 1 2 1000 -R2 2 3 1000 -C1 3 0 0.1e-6 ic=3 -.tran 0 0.5e-3 0.01e-3 UIC -.ic v(2)=1 -.print v(3) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/rc_ac.ckt b/OSCAD/LPCSim/LPCSim/ckt/rc_ac.ckt deleted file mode 100644 index 1a7403b..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/rc_ac.ckt +++ /dev/null @@ -1,6 +0,0 @@ -V1 1 0 ac 5 -R1 1 2 100 -C1 2 0 1e-6 -.ac lin 10 1 10000 -.plot v(2) -.end diff --git a/OSCAD/LPCSim/LPCSim/ckt/rc_ac.spice b/OSCAD/LPCSim/LPCSim/ckt/rc_ac.spice deleted file mode 100644 index d09f0f8..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/rc_ac.spice +++ /dev/null @@ -1,12 +0,0 @@ -* AC Analysis -V1 1 0 ac 1 -R1 1 2 100 -C1 2 0 1e-6 -.ac lin 10 100 10000 - -.control -run -plot v(2) -.endc -.end - diff --git a/OSCAD/LPCSim/LPCSim/ckt/test.ckt b/OSCAD/LPCSim/LPCSim/ckt/test.ckt deleted file mode 100644 index d72be10..0000000 --- a/OSCAD/LPCSim/LPCSim/ckt/test.ckt +++ /dev/null @@ -1,6 +0,0 @@ -V1 1 0 sweep 0 -R1 1 2 1 -X2 2 0 myR (1) -.dc 0 5 0.1 -.plot v(1) v(2) -.end diff --git a/OSCAD/LPCSim/LPCSim/diode_Dref.fig b/OSCAD/LPCSim/LPCSim/diode_Dref.fig deleted file mode 100644 index 507de5c..0000000 --- a/OSCAD/LPCSim/LPCSim/diode_Dref.fig +++ /dev/null @@ -1,59 +0,0 @@ -#FIG 3.2 Produced by xfig version 3.2.5 -Landscape -Center -Inches -Letter -100.00 -Single --2 -1200 2 -# Current source -6 3975 1500 4425 2100 -1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4200 1800 165 165 4200 1800 4350 1875 -2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 - 4125 1800 4200 1875 -2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 - 4275 1800 4200 1875 -2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 - 4200 1725 4200 1875 -2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 - 4200 1500 4200 1650 -2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 - 4200 1950 4200 2100 --6 -# Resistor -6 3375 1425 3525 2100 -2 1 0 1 0 7 100 0 -1 0.000 0 0 -1 0 0 12 - 3450 1425 3450 1570 3375 1594 3525 1642 3375 1690 3525 1738 - 3375 1786 3525 1834 3375 1882 3525 1930 3450 1954 3450 2100 --6 -# Diode -6 1950 1352 2250 2250 -2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 - 2101 2250 2101 1950 -2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 - 2101 1652 2101 1352 -2 1 0 1 -1 -1 0 0 20 0.000 0 0 -1 0 0 2 - 2250 1950 1950 1950 -2 3 0 1 0 7 0 0 20 0.000 0 0 -1 0 0 4 - 2101 1950 2250 1652 1950 1652 2101 1950 --6 -2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 - 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-\begingroup\makeatletter\ifx\SetFigFont\undefined% -\gdef\SetFigFont#1#2#3#4#5{% - \reset@font\fontsize{#1}{#2pt}% - \fontfamily{#3}\fontseries{#4}\fontshape{#5}% - \selectfont}% -\fi\endgroup% -\begin{picture}(2435,1374)(1939,-1648) -\put(2251,-661){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$D_{dnumber}$}% -}}}} -\put(3076,-961){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$R_{D_{dnumber}}$}% -}}}} -\put(4351,-886){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$I_{D_{dnumber}}$}% -}}}} -\end{picture}% diff --git a/OSCAD/LPCSim/LPCSim/discretization.sci b/OSCAD/LPCSim/LPCSim/discretization.sci deleted file mode 100644 index f020b3b..0000000 --- a/OSCAD/LPCSim/LPCSim/discretization.sci +++ /dev/null @@ -1,104 +0,0 @@ -// discretization.sci is a scilab file to discretize time dependent components. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - - -function [A,B]=discretization(A,B,x,t,i) - global LPCSim_HOME; - exec(LPCSim_HOME+'lib/waveform.sci',-1); - global g; - global wave; - global timeArray; - global cValue; - waveIndex=1; - _T=1; - _C=1; - Edges=edge_number(g); - Nodes=node_number(g); - if(i>1) h=t-sweepArray(i-1); end - - for edge_cnt = 1:Edges, -// Compute time dependent voltage source value at time t - if(g.edges.data.type(edge_cnt)=='V') - tempWave=wave(waveIndex); - if(tempWave(1)=='DC') - waveIndex=waveIndex+1; - elseif(tempWave(1)=='SWEEP') - waveIndex=waveIndex+1; - elseif(tempWave(1)=='SINE'|tempWave(1)=='PULSE') - waveIndex=waveIndex+1; - if(tempWave(1)=='SINE') - g.edges.data.value(edge_cnt)=sine(tempWave,t); - else - g.edges.data.value(edge_cnt)=pulse(tempWave,t); - end -// Update rhs vector - B(Nodes-1+_T) = g.edges.data.value(edge_cnt); - end - _T=_T+1; - clear tempWave; -// Compute time dependent current source value at time t - elseif(g.edges.data.type(edge_cnt)=='I'&~(g.edges.data.type(edge_cnt-1)=='X')&~(g.edges.data.type(edge_cnt-1)=='D')&~(g.edges.data.type(edge_cnt-1)=='C')) - tempWave=wave(waveIndex); - if(tempWave(1)=='DC') - waveIndex=waveIndex+1; - elseif(tempWave(1)=='SWEEP') - waveIndex=waveIndex+1; - elseif(tempWave(1)=='SINE'|tempWave(1)=='PULSE') - waveIndex=waveIndex+1; - oldCurrent=g.edges.data.value(edge_cnt); - if(tempWave(1)=='SINE') - g.edges.data.value(edge_cnt)=sine(tempWave,t); - else - g.edges.data.value(edge_cnt)=pulse(tempWave,t); - end -// Update rhs vector - B(Nodes-1+_T) = g.edges.data.value(edge_cnt); - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - if(~(source==0)) - B(source) = B(source)-(g.edges.data.value(edge_cnt)-oldCurrent); - end - if(~(sink==0)) - B(sink) =B(sink) + (g.edges.data.value(edge_cnt)-oldCurrent); - end - end - clear tempWave; -// Update conductance and current source of dynamic device - elseif(g.edges.data.type(edge_cnt)=='C') - if(i>1) - if(g.edges.head(edge_cnt)==1) - tempVoltage=x(g.edges.tail(edge_cnt)-1); - elseif(g.edges.tail(edge_cnt)==1) - tempVoltage=-x(g.edges.head(edge_cnt)-1); - else - tempVoltage=x(g.edges.tail(edge_cnt)-1)-x(g.edges.head(edge_cnt)-1); - end - Gnew=cValue(_C)/h; - Gupdate=Gnew-g.edges.data.value(edge_cnt) - g.edges.data.value(edge_cnt)=Gnew; - Inew=cValue(_C)/h*tempVoltage; - Iupdate=Inew-g.edges.data.value(edge_cnt+1); - g.edges.data.value(edge_cnt+1)=Inew; -// Update matrix A and rhs vector - source=g.edges.tail(edge_cnt)-1; - sink=g.edges.head(edge_cnt)-1; - if(~(source==0)) - A(source,source) = A(source,source) + Gupdate; - B(source) = B(source)+Iupdate; - end - if(~(sink==0)) - A(sink,sink) = A(sink,sink) + Gupdate; - B(sink) =B(sink) - Iupdate; - end - if(~(sink==0) & ~(source==0)) - A(source,sink) = A(source,sink) - Gupdate; - A(sink,source) = A(sink,source) - Gupdate; - end - _C=_C+1; - end - end - end -endfunction diff --git a/OSCAD/LPCSim/LPCSim/genrateCallingLibF.sci b/OSCAD/LPCSim/LPCSim/genrateCallingLibF.sci deleted file mode 100644 index 8a2188b..0000000 --- a/OSCAD/LPCSim/LPCSim/genrateCallingLibF.sci +++ /dev/null @@ -1,24 +0,0 @@ -// genrateCallingLibF.sci is a scilab file to create library function for a new components. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - - -function generateCallingLibF(f_name) -fid = mopen('getlib.sci', 'w'); -if (fid == -1) - error("cannot open file for reading"); -end -libName=f_name+".sci"; -mfprintf(fid,'function I=func(voltage,parameter)\n'); -mfprintf(fid,"\texec("'%s"',-1);\n",libName); -mfprintf(fid,'\tI=%s_func(voltage,parameter);\n',f_name); -mfprintf(fid,'endfunction\n\n'); - -mfprintf(fid,'function Gj=jacobian(voltage,parameter)\n'); -mfprintf(fid,"\texec("'%s"',-1);\n",libName); -mfprintf(fid,'\tGj=%s_Jacobian(voltage,parameter);\n',f_name); -mfprintf(fid,'endfunction'); -mclose(fid) -endfunction diff --git a/OSCAD/LPCSim/LPCSim/getlib.sci b/OSCAD/LPCSim/LPCSim/getlib.sci deleted file mode 100644 index ac01e7c..0000000 --- a/OSCAD/LPCSim/LPCSim/getlib.sci +++ /dev/null @@ -1,14 +0,0 @@ -// MNA based Circuit Simulator -// Yogesh Dilip Save -// Research Scholor -// IIT Bombay, Mumbai-400076 - -function I=func(voltage,parameter) - exec('myr.sci',-1); - I=myr_func(voltage,parameter); -endfunction - -function Gj=jacobian(voltage,parameter) - exec('myr.sci',-1); - Gj=myr_Jacobian(voltage,parameter); -endfunction diff --git a/OSCAD/LPCSim/LPCSim/latfont b/OSCAD/LPCSim/LPCSim/latfont deleted file mode 100644 index 90e1eb3..0000000 --- a/OSCAD/LPCSim/LPCSim/latfont +++ /dev/null @@ -1,8 +0,0 @@ -echo {\\input{$*.pstex_t}} >& dummy_font.tex -cat latfont1.tex dummy_font.tex latfont2.tex >& dummy_fig.tex -latex dummy_fig.tex -dvips -E -o dummy_fig.eps dummy_fig.dvi -mv dummy_fig.eps $*.eps -rm dummy_fig.* -rm -rf dummy_font.tex -evince $1.eps & diff --git a/OSCAD/LPCSim/LPCSim/latfont1.tex b/OSCAD/LPCSim/LPCSim/latfont1.tex deleted file mode 100644 index e6301a4..0000000 --- a/OSCAD/LPCSim/LPCSim/latfont1.tex +++ /dev/null @@ -1,20 +0,0 @@ -\documentclass[12pt]{book} -\textwidth 6.5in -\textheight 9.0in -\topmargin 0.0in -\oddsidemargin 0.2in -\evensidemargin 0.2in -\textfloatsep 0.6cm -\abovecaptionskip 0.1cm -\usepackage[dvips]{graphicx} -\usepackage{makeidx} -\usepackage{epsfig} -\usepackage{color} -\setlength{\textwidth}{50cm} -\setlength{\textheight}{50cm} -\begin{document} -\pagestyle{empty} - -\begin{center} -%\resizebox{!}{5cm}{\input{cap_trns.pstex_t}} - diff --git a/OSCAD/LPCSim/LPCSim/latfont2.tex b/OSCAD/LPCSim/LPCSim/latfont2.tex deleted file mode 100644 index 3f4cd92..0000000 --- a/OSCAD/LPCSim/LPCSim/latfont2.tex +++ /dev/null @@ -1,2 +0,0 @@ -\end{center} -\end{document} \ No newline at end of file diff --git a/OSCAD/LPCSim/LPCSim/lib/mos.sci b/OSCAD/LPCSim/LPCSim/lib/mos.sci deleted file mode 100644 index 38067e5..0000000 --- a/OSCAD/LPCSim/LPCSim/lib/mos.sci +++ /dev/null @@ -1,18 +0,0 @@ -// mos.sci is a scilab file to read MOSFET parameters. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -function [Vt,beta1]=getMosPara(parameter) - W=parameter(2); - L=parameter(3); - Vt=parameter(4); - Cox=parameter(5); - if(parameter(1)=='P') - u=0.4; - else - u=0.8; - end - beta1=W/L*Cox*u; -endfunction diff --git a/OSCAD/LPCSim/LPCSim/lib/waveform.sci b/OSCAD/LPCSim/LPCSim/lib/waveform.sci deleted file mode 100644 index e882ec5..0000000 --- a/OSCAD/LPCSim/LPCSim/lib/waveform.sci +++ /dev/null @@ -1,43 +0,0 @@ -// waveform.sci is a scilab file to read source parameters. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -function value=sine(param,t) - pi=3.14; - value=param(3)*sin(2*pi*param(4)*t); -endfunction - -function value=pulse(param,t) - v1=param(2); // Initial value - v2=param(3); // Pulsed value - td=param(4); // Delay time - tr=param(5); // Rise time - tf=param(6); // Fall time - pw=param(7); // Pulse width - per=param(8); // Pulse period - while(t>per) - t=t-per; - end - if(v1>v2) - tr_back=tr; - tr=tf; - tf=tr_back; - end - if(t '' ) - token = strtok(" "); - if(length(token)) - [NodeNumber,potential]=sscanf(token,"V(%d)=%f"); - initialVoltage(icIndex)=[NodeNumber,potential]; - icIndex=icIndex+1; - end - end -// Get Output variable for printing - elseif (dev=='.PRINT') - token = strtok(tempStr," "); - while( token <> '' ) - token = strtok(" "); - if(length(token)) - if(msscanf(token,"%c")=='V') - if(length(strchr(token,'-'))) - if(length(strchr(token,'-'))==length(token)) - printNode=sscanf(token,"-V(%d)"); - vPrintList(vPrintIndex)=-findIndexStrList(string(printNode),nodeMap); - else - [printNode,printNode1]=sscanf(token,"V(%d)-V(%d)"); - vPrintList(vPrintIndex)=[findIndexStrList(string(printNode),nodeMap),findIndexStrList(string(printNode1),nodeMap)]; - end - else - printNode=sscanf(token,"V(%d)"); - vPrintList(vPrintIndex)=findIndexStrList(string(printNode),nodeMap); - end - vPrintIndex=vPrintIndex+1; - elseif(msscanf(token,"%c")=='I') - if(length(strchr(token,'-'))) - printNode=msscanf(token,"-I(%*c%d)"); - iPrintList(iPrintIndex)=-printNode; - else - printNode=msscanf(token,"I(%*c%d)"); - iPrintList(iPrintIndex)=printNode; - end - iPrintIndex=iPrintIndex+1; - end - end - end -// Get Output variable for plotting - elseif (dev=='.PLOT') - token = strtok(tempStr," "); - while( token <> '' ) - token = strtok(" "); - if(length(token)) - if(msscanf(token,"%c")=='V') - if(length(strchr(token,'-'))) - if(length(strchr(token,'-'))==length(token)) - printNode=sscanf(token,"-V(%d)"); - vPlotList(vPlotIndex)=-findIndexStrList(string(printNode),nodeMap); - else - [printNode,printNode1]=sscanf(token,"V(%d)-V(%d)"); - vPlotList(vPlotIndex)=[findIndexStrList(string(printNode),nodeMap),findIndexStrList(string(printNode1),nodeMap)]; - end - else - printNode=sscanf(token,"V(%d)"); - vPlotList(vPlotIndex)=findIndexStrList(string(printNode),nodeMap); - end - vPlotIndex=vPlotIndex+1; - elseif(msscanf(token,"%c")=='I') - if(length(strchr(token,'-'))) - printNode=msscanf(token,"-I(%*c%d)"); - iPlotList(iPlotIndex)=-printNode; - else - printNode=msscanf(token,"I(%*c%d)"); - iPlotList(iPlotIndex)=printNode; - end - iPlotIndex=iPlotIndex+1; - end - end - end -// Find number of nodes in the circuit - else - devtype=sscanf(tempStr, "%c"); - if(devtype=='M') - [source,sink,gate] = sscanf(tempStr, "%*s %s %s %s"); - Index=findIndexStrList(gate,nodeMap); - if(Index==-1) - nodeMap(Nodes)=gate; - Nodes=Nodes+1; - end - else - [source,sink] = sscanf(tempStr, "%*s %s %s"); - end - Index=findIndexStrList(source,nodeMap); - if(Index==-1) - nodeMap(Nodes)=source; - Nodes=Nodes+1; - end - Index=findIndexStrList(sink,nodeMap); - if(Index==-1) - nodeMap(Nodes)=sink; - Nodes=Nodes+1 - end - end - end -err=mclose(fid) - -Nodes=Nodes-1; -//catch -// disp("Error in circuit file. Error code:110. Exiting......."); -// abort; -//end -endfunction - -function T=convertCircuitIntoGraph(filename,Nodes) -global g; -global model; -global wave; -global iPrintList; -global iPlotList; -global cValue; -global cInitial; -global NLFlag; -global dynamicFlag; -global nodeMap; - -model=list(0); -wave=list(0); -Edges=0; -T=0; -X=0; - -//try -// Open the circuit file -fid=mopen(filename,'r'); -firstEdge=%t -X=1; -C=1; -waveIndex=1; - -// Scan each line of the circuit file -while (1) - tempStr=mgetl(fid,1); - tempStr=stripblanks(tempStr); - if (length(tempStr)==0) - continue; - end - if (part(tempStr,1)=='*') - continue; - end - tempStr=convstr(tempStr,'u') - [dev] = sscanf(tempStr, "%s"); - if (dev=='.END') - break; - elseif (dev=='.OP'|dev=='.TRAN'|dev=='.DC'|dev=='.IC'|dev=='.PLOT'|dev=='.PRINT'|dev=='.AC'|dev=='.INCLUDE') - continue; - else - [sourceS, sinkS] = sscanf(tempStr, "%*s %s %s"); - source=findIndexStrList(sourceS,nodeMap); - sink=findIndexStrList(sinkS,nodeMap); - Edges=Edges+1; - if(firstEdge) // initializing graph with first edge - g = make_graph('my_graph',1,Nodes,source,sink); - g = add_edge_data(g,'type'); - g = add_edge_data(g,'value'); - g = add_edge_data(g,'devName'); - firstEdge=%f; - else - g=add_edge(source,sink,g); - end - [device_type] = sscanf(dev, "%c"); - g.edges.data.devName(Edges) = dev; - select (device_type) - case 'R' then // Resistance - g.edges.data.type(Edges) = device_type; - [value] = sscanf(tempStr, "%*s %*s %*s %f"); - g.edges.data.value(Edges) = 1/value; - - case 'I' then // Current Source - tempWave=list(0); - g.edges.data.type(Edges) = device_type; - wavtype = sscanf(tempStr, "%*s %*s %*s %s"); - [wave(waveIndex),g.edges.data.value(Edges)] = getSourceParam(tempStr,wavtype); - waveIndex=waveIndex+1; - - case 'V' then // Voltage Source - tempWave=list(0); - g.edges.data.type(Edges) = device_type; - Index=msscanf(tempStr, "%*c%d"); - wavtype1 = sscanf(tempStr, "%*s %*s %*s %s"); - wavtype2=strsplit(wavtype1,'('); - wavtype=wavtype2(1); - [wave(waveIndex),g.edges.data.value(Edges)] = getSourceParam(tempStr,wavtype); - waveIndex=waveIndex+1; - T=T+1; - // For printing and plotting current variables - if(~(iPlotList(1)==0)) - Index=findIndex(Index,iPlotList); - if(~(Index==0)) - iPlotList(Index)=T; - end - end - if(~(iPrintList(1)==0)) - Index=findIndex(Index,iPrintList); - if(~(Index==0)) - iPrintList(Index)=T; - end - end - - case 'G' then // Voltage Controlled Current Source - g.edges.data.type(Edges) = device_type; - [sourceCS sinkCS value] = sscanf(tempStr, "%*s %*s %*s %s %s %f"); - sourceC=findIndexStrList(sourceCS,nodeMap); - sinkC=findIndexStrList(sinkCS,nodeMap); - g.edges.data.value(Edges) = value; - Edges=Edges+1; - // Add Current Source for voltage sensing - g=add_edge(sourceC,sinkC,g); - g.edges.data.type(Edges) = 'I'; - g.edges.data.value(Edges) = 0; - tempWave=list(0); - tempWave(1)='dc'; - wave(waveIndex)=tempWave; - waveIndex=waveIndex+1; - clear tempWave; - - case 'E' then // Voltage Controlled Voltage Source - g.edges.data.type(Edges) = device_type; - [sourceCS sinkCS value] = sscanf(tempStr, "%*s %*s %*s %s %s %f"); - sourceC=findIndexStrList(sourceCS,nodeMap); - sinkC=findIndexStrList(sinkCS,nodeMap); - g.edges.data.value(Edges) = value; - Edges=Edges+1; - // Add Current Source for voltage sensing - g=add_edge(sourceC,sinkC,g); - g.edges.data.type(Edges) = 'I'; - g.edges.data.value(Edges) = 0; - T=T+1; - tempWave=list(0); - tempWave(1)='dc'; - wave(waveIndex)=tempWave; - waveIndex=waveIndex+1; - clear tempWave; - - case 'F' then // Current Controlled Current Source - g.edges.data.type(Edges) = device_type; - [value] = sscanf(tempStr, "%*s %*s %*s %*s %f"); - g.edges.data.value(Edges) = value; - Edges=Edges+1; - T=T+1; - - case 'H' then // Current Controlled Voltage Source - g.edges.data.type(Edges) = device_type; - [value] = sscanf(tempStr, "%*s %*s %*s %*s %f"); - g.edges.data.value(Edges) = value; - Edges=Edges+1; - T=T+1; - - case 'D' then // Diode - NLFlag=%T; - tempModel=list(0); - g.edges.data.type(Edges) = 'D'; - tempModel(1) = sscanf(tempStr, "%*s %*s %*s %s"); - token = strtok(tempStr,"("); - i=2; - while( token <> '' ) - token = strtok(" )"); - if(length(token)) - tempModel(i)=atof(token); - i=i+1; - end - end - if(length(tempModel)==1) - tempModel(2)=1e-14; - tempModel(3)=0.026; - end - Is=tempModel(2); - Vt=tempModel(3); - model(X)=tempModel; - g.edges.data.value(Edges) = Is/Vt; - Edges=Edges+1; - // Add Current Source parallel with resistance(linearization) - g=add_edge(source,sink,g); - g.edges.data.type(Edges) = 'I'; - g.edges.data.value(Edges) = 0; - tempWave=list(0); - tempWave(1)='dc'; - wave(waveIndex)=tempWave; - waveIndex=waveIndex+1; - clear tempWave; - X=X+1; - clear tempModel; - - case 'M' then // MOSFET - tempModel=list(0); - g.edges.data.type(Edges) = device_type; - g.edges.data.value(Edges) = 1e-12; - Edges=Edges+1; - [gateNodeS,tempModel(1)] = sscanf(tempStr, "%*s %*s %*s %s %s"); - gateNode=findIndexStrList(gateNode,nodeMap); - token = strtok(tempStr,"("); - i=2; - while( token <> '' ) - token = strtok(" )"); - if(length(token)) - tempModel(i)=atof(token); - i=i+1; - end - end - model(X)=tempModel; - - // Add current source drain to source - g=add_edge(source,sink,g); - g.edges.data.type(Edges) = 'I'; - g.edges.data.value(Edges) = 0; - tempWave=list(0); - tempWave(1)='dc'; - wave(waveIndex)=tempWave; - waveIndex=waveIndex+1; - clear tempWave; - Edges=Edges+1; - - // Add current source gate to source - g=add_edge(gateNode,sink,g); - g.edges.data.type(Edges) = 'I'; - g.edges.data.value(Edges) = 0; - tempWave=list(0); - tempWave(1)='dc'; - wave(waveIndex)=tempWave; - waveIndex=waveIndex+1; - clear tempWave; - X=X+1; - Edges=Edges+1; - - // Add capactior gate to drain - g=add_edge(gateNode,source,g); - g.edges.data.type(Edges) = 'C'; - cValue(C)=0.5*tempModel(4)*tempModel(2)*tempModel(3); - g.edges.data.value(Edges) = 1e-12; - Edges=Edges+1; - - g=add_edge(source,gateNode+1,g); - g.edges.data.type(Edges) = 'I'; - g.edges.data.value(Edges) = 0; - tempWave=list(0); - tempWave(1)='dc'; - wave(waveIndex)=tempWave; - waveIndex=waveIndex+1; - clear tempWave; - C=C+1; - Edges=Edges+1; - - // Add capacitor gate to source - g=add_edge(gateNode,sink,g); - g.edges.data.type(Edges) = 'C'; - cValue(C)=0.5*tempModel(4)*tempModel(2)*tempModel(3); - g.edges.data.value(Edges) = 1e-12; - Edges=Edges+1; - - g=add_edge(sink,gateNode,g); - g.edges.data.type(Edges) = 'I'; - g.edges.data.value(Edges) = 0; - tempWave=list(0); - tempWave(1)='dc'; - wave(waveIndex)=tempWave; - waveIndex=waveIndex+1; - clear tempWave; - C=C+1; - clear tempModel; - - case 'C' then // Capacitor - dynamicFlag=%T; - g.edges.data.type(Edges) = 'C'; - [value] = sscanf(tempStr, "%*s %*s %*s %f"); - token=strtok(tempStr,"="); - token = strtok(" "); - if(token <> '') - cInitial(C)=atof(token); - else - cInitial(C)=0.0; - end - cValue(C)=value; - g.edges.data.value(Edges) = 0.0; - Edges=Edges+1; - g=add_edge(sink,source,g); - g.edges.data.type(Edges) = 'I'; - g.edges.data.value(Edges) = 0; - tempWave=list(0); - tempWave(1)='dc'; - wave(waveIndex)=tempWave; - waveIndex=waveIndex+1; - clear tempWave; - C=C+1; - - case 'X' then // UserDefined Component - tempModel=list(0); - g.edges.data.type(Edges) = 'X'; - tempModel(1) = sscanf(tempStr, "%*s %*s %*s %s"); - i=2; - token = strtok(tempStr,"("); - while( token <> '' ) - token = strtok(" )"); - if(length(token)) - tempModel(i)=atof(token); - i=i+1; - end - end - model(X)=tempModel; - generateCallingLibF(tempModel(1)); - exec('getlib.sci',-1); - value=jacobian(0.0,model(X)); - if(value>1d-6) - g.edges.data.value(Edges) = value; - else - g.edges.data.value(Edges) = 1d-6; - end - Edges=Edges+1; - g=add_edge(source,sink,g); - g.edges.data.type(Edges) = 'I'; - g.edges.data.value(Edges) = 0; - tempWave=list(0); - tempWave(1)='dc'; - wave(waveIndex)=tempWave; - waveIndex=waveIndex+1; - clear tempWave; - X=X+1; - clear tempModel; - else - printf("Incorrect input file\n"); - exit(0); - end - end -end //while -mclose(fid); -//catch -// disp("Error in circuit file. Error code: 120 Exiting......."); -// abort; -//end -endfunction - -function [tempWave,value]=getSourceParam(tempStr,wavtype) - tempWave=list(0); - tempWave(1)=wavtype; - if(wavtype=='DC') - value = sscanf(tempStr, "%*s %*s %*s %*s %f"); - elseif(wavtype=='SWEEP') - value = sscanf(tempStr, "%*s %*s %*s %*s %f"); - elseif(wavtype=='AC') - value = sscanf(tempStr, "%*s %*s %*s %*s %f"); - else - token = strtok(tempStr,"("); - i=2; - while( token <> '' ) - token = strtok(" )"); - if(length(token)) - tempWave(i)=atof(token); - i=i+1; - end - end - value = 0; - end -endfunction diff --git a/OSCAD/LPCSim/LPCSim/support/atof.sci b/OSCAD/LPCSim/LPCSim/support/atof.sci deleted file mode 100644 index 2933af1..0000000 --- a/OSCAD/LPCSim/LPCSim/support/atof.sci +++ /dev/null @@ -1,7 +0,0 @@ -function value=atof(tempStr) - value=sscanf(tempStr,"%e"); -endfunction - -function value=atoi(tempStr) - value=sscanf(tempStr,"%d"); -endfunction diff --git a/OSCAD/LPCSim/LPCSim/support/findIndex.sci b/OSCAD/LPCSim/LPCSim/support/findIndex.sci deleted file mode 100644 index 90293cc..0000000 --- a/OSCAD/LPCSim/LPCSim/support/findIndex.sci +++ /dev/null @@ -1,9 +0,0 @@ -function Index=findIndex(Index,searchList) - for i=1:1:length(searchList) - if(searchList(i)==Index) - Index=i; - return; - end - end - Index=0; -endfunction diff --git a/OSCAD/LPCSim/LPCSim/tranAnalysis.sci b/OSCAD/LPCSim/LPCSim/tranAnalysis.sci deleted file mode 100644 index 5f35a0c..0000000 --- a/OSCAD/LPCSim/LPCSim/tranAnalysis.sci +++ /dev/null @@ -1,383 +0,0 @@ -// tranAnalysis.sci is a scilab file to perform Transient Analysis. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com). -// Copyright (C) 2012 Yogesh Dilip Save -// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - - -function [A,B,x]=transientAnalysis(A,B,x,t,i) - global LPCSim_HOME; - exec(LPCSim_HOME+'discretization.sci',-1); - MaxNRitr=50; - if(i-2) -// Discretize time dependent component and update matrices - [A,B]=discretization(A,B,x,t,i); - -// Perform Operating Point Analysis on static circuit - [A,B,x]=OPAnalysis(A,B); - -// Store Output Variable for plotting/printing - buildOutput(x,t,i); - else -// Perform Operating Point Analysis on static circuit at t=0+ - // Build Modified Nodal Matrix for linear devices - [C,d]=buildMatrices2(g,x); - - // Perform Operating Point Analysis on static circuit - [C,d,x]=OPAnalysis(C,d); - - // Store Output Variable for plotting/printing - buildOutput(x,t,i); - end -endfunction - -function [x]=setIntialCondition(K,y,x,_T,UIC) -// Compute fictitious node potential at t=0 - global g; - _C=1; - first_edge=%t; - Nodes=node_number(g); - nodeCovered=zeros(Nodes,1); - xnew=zeros(Nodes,1); - Edges=1; - -// Build a tree of Voltage sources - for edge_cnt = 1:edge_number(g), - if(g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H') - source=g.edges.tail(edge_cnt); - sink=g.edges.head(edge_cnt); - if(first_edge) - g1 = make_graph('mygraph1',1,Nodes,source,sink); - g1 = add_edge_data(g1,'voltage'); - g1 = add_edge_data(g1,'number'); - if(g.edges.data.type(edge_cnt)=='V') - g1.edges.data.voltage(Edges) = g.edges.data.value(edge_cnt); - else - g1.edges.data.voltage(Edges) = x(source)-x(sink); - end - g1.edges.data.number(Edges) = edge_cnt; - Edges=Edges+1; - first_edge=%f; - else - g1=add_edge(source,sink,g1); - if(g.edges.data.type(edge_cnt)=='V') - g1.edges.data.voltage(Edges) = g.edges.data.value(edge_cnt); - else - g1.edges.data.voltage(Edges) = x(source)-x(sink); - end - g1.edges.data.number(Edges) = edge_cnt; - Edges=Edges+1; - end - if(~nodeCovered(source)) - nodeCovered(source)=1; - end - if(~nodeCovered(sink)) - nodeCovered(sink)=1; - end - end - end - - chargeBalanceRequired=%f; -// If UIC is set then use device intial condition (with highest priority) - if(UIC==1) - // Extend the tree by adding voltage source corresponding to capacitor with initial condition - global cInitial; - for edge_cnt = 1:edge_number(g), - if(g.edges.data.type(edge_cnt)=='C') - source=g.edges.tail(edge_cnt); - sink=g.edges.head(edge_cnt); - if(~nodeCovered(source)) - if(~nodeCovered(sink)) - nodeCovered(sink)=1; - end - nodeCovered(source)=1; - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=cInitial(_C); - elseif(~nodeCovered(sink)) - nodeCovered(sink)=1; - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=cInitial(_C); - else - [nc,ncomp]=connex(g1); - if(ncomp(source)~=ncomp(sink)) - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=cInitial(_C); - else - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=cInitial(_C); - if(~chargeBalanceRequired) - cap=list(Edges); - chargeBalanceRequired=%t; - else - cap($+1)=Edges; - end - end - end - g1.edges.data.number(Edges) = edge_cnt; - Edges=Edges+1; - _C=_C+1; - end - end - end - - if(~chargeBalanceRequired) - // Insert voltage sources corresponding to intial condition - global initialVoltage; - for j=1:1:length(initialVoltage); - templist=initialVoltage(j); - source=templist(1)+1; - sink=1; - if(~nodeCovered(source)) - nodeCovered(source)=1; - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=templist(2); - g1.edges.data.number(Edges) = Edges; - Edges=Edges+1; - end - end - - // Extend the tree to complete graph - if(UIC==1) - for edge_cnt = 1:edge_number(g), - if(edge_number(g1)==Nodes-1) break; end; - if(~(g.edges.data.type(edge_cnt)=='C'|g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H'|g.edges.data.type(edge_cnt)=='I')) - source=g.edges.tail(edge_cnt); - sink=g.edges.head(edge_cnt); - if(~nodeCovered(source)) - if(~nodeCovered(sink)) - nodeCovered(sink)=1; - end - nodeCovered(source)=1; - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=0.0; - g1.edges.data.number(Edges) = Edges; - Edges=Edges+1; - elseif(~nodeCovered(sink)) - nodeCovered(sink)=1; - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=0.0; - g1.edges.data.number(Edges) = Edges; - Edges=Edges+1; - else - [nc,ncomp]=connex(g1); - if(nc==1) break; end; - if(ncomp(source)~=ncomp(sink)) - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=0.0; - g1.edges.data.number(Edges) = Edges; - Edges=Edges+1; - end - end - end - end - else - for edge_cnt = 1:edge_number(g), - if(~(g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H'|g.edges.data.type(edge_cnt)=='I')) - source=g.edges.tail(edge_cnt); - sink=g.edges.head(edge_cnt); - if(~nodeCovered(source)) - if(~nodeCovered(sink)) - nodeCovered(sink)=1; - end - nodeCovered(source)=1; - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=0.0; - g1.edges.data.number(Edges) = Edges; - Edges=Edges+1; - elseif(~nodeCovered(sink)) - nodeCovered(sink)=1; - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=0.0; - g1.edges.data.number(Edges) = Edges; - Edges=Edges+1; - else - [nc,ncomp]=connex(g1); - if(nc==1) break; end; - if(ncomp(source)~=ncomp(sink)) - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=0.0; - g1.edges.data.number(Edges) = Edges; - Edges=Edges+1; - end - end - end - end - end - // Find the node potentials from tree branch voltages at t=0 - g1.directed=0; - listOfNodes=list(1); - nodeCovered(1)=0; - for i=1:Nodes - predecessor=listOfNodes(i); - neNodes=neighbors(predecessor,g1); - [k1 k2]=size(neNodes); - for j=1:k2 - sucessor=neNodes(j); - if(nodeCovered(sucessor)) - listOfNodes=lstcat(listOfNodes,sucessor); - nodeCovered(sucessor)=0; - e=nodes_2_path([predecessor sucessor],g1); - if(g.edges.tail(e)==predecessor) - xnew(sucessor)=xnew(predecessor)-g1.edges.data.voltage(e); - else - xnew(sucessor)=xnew(predecessor)+g1.edges.data.voltage(e); - end - end - end - end - x(1:Nodes-1,1)=xnew(2:Nodes,1); - - // Charge Balance scheme using equivalent electrical representation - else - // Find the components which require charge balancing - [nc,ncomp]=connex(g1); - for j=1:1:length(cap), - if(j==1) - CBcomp=list(ncomp(g.edges.tail(g1.edges.data.number(cap(j))))); - else - tempBlock=ncomp(g.edges.tail(g1.edges.data.number(cap(j)))); - blockFound=%f - for j=1:1:length(CBcomp), - if(CBcomp(j)==tempBlock) - blockFound=%t; - end - end - if(~blockFound) - CBcomp($+1)=ncomp(g.edges.tail(g1.edges.data.number(cap(j)))); - end - end - end - - // Find edge voltages of the components by operating point analysis - for j=1:1:length(CBcomp), - disp(length(CBcomp)); - firstEdge=%t; - Edges=1; - k=1; - _C=0; - for i=1:Nodes - if(ncomp(i)==CBcomp(j)) - nodeMap(k)=i; - nodeReverseMap(i)=k; - k=k+1; - end - end - for edge_cnt = 1:edge_number(g1), - edge_cnt1=g1.edges.data.number(edge_cnt); - source=g.edges.tail(edge_cnt1); - sink=g.edges.head(edge_cnt1); - if(g.edges.data.type(edge_cnt1)=='C') - _C=_C+1; - end - if(~(ncomp(source)==CBcomp(j))) - continue; - end - source=nodeReverseMap(source); - sink=nodeReverseMap(sink); - if(firstEdge) // initializing graph with first edge - g2 = make_graph('mygraph2',1,k-1,source,sink); - g2 = add_edge_data(g2,'type'); - g2 = add_edge_data(g2,'value'); - g2 = add_edge_data(g2,'number'); - firstEdge=%f; - else - g2=add_edge(source,sink,g2); - end - if(g.edges.data.type(edge_cnt1)=='V') - g2.edges.data.type(Edges) = 'V'; - g2.edges.data.value(Edges) = g.edges.data.value(edge_cnt1); - g2.edges.data.number(Edges) = edge_cnt; - Edges=Edges+1; - // Replace capacitor with conductance parallel with conductance - else - g2.edges.data.type(Edges) = 'R' - g2.edges.data.value(Edges) = g.edges.data.value(edge_cnt1); - g2.edges.data.number(Edges) = edge_cnt; - Edges=Edges+1; - g2=add_edge(source,sink,g2); - g2.edges.data.type(Edges) = 'I' - g2.edges.data.value(Edges) =-g.edges.data.value(edge_cnt1)*cInitial(_C); - g2.edges.data.number(Edges) = edge_cnt; - Edges=Edges+1; - end - end - // Build Modified Nodal Matrix for linear devices - [C,d]=buildMatrices3(g2); - - // Find node potetial - xnew=findNodePotential(C,d); - - // Find branch voltages from node potential - Edges=edge_number(g2); - for edge_cnt = 1:Edges, - if(g2.edges.head(edge_cnt)==1) - g1.edges.data.voltage(g2.edges.data.number(edge_cnt))=xnew(g2.edges.tail(edge_cnt)-1); - elseif(g.edges.tail(edge_cnt)==1) - g1.edges.data.voltage(g2.edges.data.number(edge_cnt))=-xnew(g2.edges.head(edge_cnt)-1); - else - g1.edges.data.voltage(g2.edges.data.number(edge_cnt))=xnew(g2.edges.tail(edge_cnt)-1)-xnew(g2.edges.head(edge_cnt)-1); - end - end - clear g2; - clear xnew; - end - // Extend it to form tree of complete graph - Nodes=node_number(g); - for edge_cnt = 1:edge_number(g), - if(edge_number(g1)==Nodes-1) break; end; - if(~(g.edges.data.type(edge_cnt)=='C'|g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H'|g.edges.data.type(edge_cnt)=='I')) - source=g.edges.tail(edge_cnt); - sink=g.edges.head(edge_cnt); - if(~nodeCovered(source)) - if(~nodeCovered(sink)) - nodeCovered(sink)=1; - end - nodeCovered(source)=1; - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=0.0; - g1.edges.data.number(Edges) = Edges; - Edges=Edges+1; - elseif(~nodeCovered(sink)) - nodeCovered(sink)=1; - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=0.0; - g1.edges.data.number(Edges) = Edges; - Edges=Edges+1; - else - [nc,ncomp]=connex(g1); - if(nc==1) break; end; - if(ncomp(source)~=ncomp(sink)) - g1=add_edge(source,sink,g1); - g1.edges.data.voltage(Edges)=0.0; - g1.edges.data.number(Edges) = Edges; - Edges=Edges+1; - end - end - end - end - - xnew=zeros(Nodes,1); - g1.directed=0; - listOfNodes=list(1); - nodeCovered(1)=0; - for i=1:Nodes - predecessor=listOfNodes(i); - neNodes=neighbors(predecessor,g1); - [k1 k2]=size(neNodes); - for j=1:k2 - sucessor=neNodes(j); - if(nodeCovered(sucessor)) - listOfNodes=lstcat(listOfNodes,sucessor); - nodeCovered(sucessor)=0; - e=nodes_2_path([predecessor sucessor],g1); - if(g.edges.tail(e)==predecessor) - xnew(sucessor)=xnew(predecessor)-g1.edges.data.voltage(e); - else - xnew(sucessor)=xnew(predecessor)+g1.edges.data.voltage(e); - end - end - end - end - x(1:Nodes-1,1)=xnew(2:Nodes,1); - end -endfunction diff --git a/OSCAD/LPCSim/LUT/ids.cpp b/OSCAD/LPCSim/LUT/ids.cpp deleted file mode 100644 index cc6f489..0000000 --- a/OSCAD/LPCSim/LUT/ids.cpp +++ /dev/null @@ -1,394 +0,0 @@ -/**************************************************************************** - This routine assumes the existance of file named "vbs_files.txt" - and the files decribed in the that file in current directory. - File vbs_files.txt contains vbs values and corresponding Id-Vds_Vgs file names - e.g. one entry may be 0.2 vbs_0.2.txt -*****************************************************************************/ - -/******************* Header *********************************/ -#include -#include -#include -#include -#include -#include - - -struct CoeffStruct{ - double x; - double y; - double z; -}; - -class NaturalCubicSpline1D{ -public: - double ValueAtX(double x); - void initialize(int n,double* xData,double* yData); - NaturalCubicSpline1D(int NO_OF_POINTS,double* xData,double* yData); //Read from array - NaturalCubicSpline1D(); //User input - ~NaturalCubicSpline1D(); - -private: - void DetermineCoeff(); - int NO_OF_POINTS; - CoeffStruct* coeffsArray; -}; - -class yCSpair{ -public: - double y; - NaturalCubicSpline1D xCubicSpline; - yCSpair(); - ~yCSpair(); -}; - -class CubicCubic{ -public: - double evaluate(double x,double y); - void Initialize(char* Id_Vd_Vg); - const CubicCubic & operator=(const CubicCubic &rhs); - CubicCubic(char* Id_Vd_Vg); - CubicCubic(char* yfileName,char* xzfileName); - CubicCubic(int no_yPoints, double yArray[],int *pxArray,double** xArray,double** zArray); - CubicCubic(); - ~CubicCubic(); -private: - int noYPoints; - yCSpair *CubicSplines1D; -}; - -class IdVbs{ -public: - double Evaluate(double vds,double vgs,double vbs); - void Initialize(double vbs); - IdVbs(); - ~IdVbs(); -private: - double vbs_l,vbs_h; //vbs lies in interval [vbs_l,vbs_h] - CubicCubic cc_l; - CubicCubic cc_h; -}; -/******************* Header *********************************/ - - -/********************* SciLab Callable Routine *******************************/ -//extern "C" _declspec(dllexport) -extern "C" -void ids_c( double *vds, - double *vgs, - double *vbs, - double *ids){ - IdVbs id; - *ids=id.Evaluate(*vds,*vgs,*vbs); -} - - -/****************************************************/ -using namespace std; - -double NaturalCubicSpline1D::ValueAtX(double x){ - /* x < Start Point first polynomial to be used - x > End Point last polynomial to be used - */ - - // Find the segment where x lies - int i=0; // i is used outside loop - for(i=0;i0;--i){ - h1=coeffsArray[i+1].x - coeffsArray[i].x; - coeffsArray[i].z = (v[i] - h1*coeffsArray[i+1].z ) / u[i]; - } -} - -void NaturalCubicSpline1D::initialize(int n,double* xData,double* yData){ - NO_OF_POINTS=n; - coeffsArray=new CoeffStruct[NO_OF_POINTS]; - for(int i=0;i>n_diffVgs; - idvdvg_file>>n_diffVds; - - noYPoints=n_diffVgs; - CubicSplines1D= new yCSpair[noYPoints]; - - double* vds_array; - double* ids_array; - vds_array=new double[n_diffVds]; - ids_array=new double[n_diffVds]; - - int index; - double vds; - double ids; - double vgs; - - for(int i=0;i>index; - idvdvg_file>>vds; - idvdvg_file>>ids; - idvdvg_file>>vgs; - CubicSplines1D[i].y=vgs; //repeat avoid - vds_array[j]=vds; - ids_array[j]=ids; - } - CubicSplines1D[i].xCubicSpline.initialize(n_diffVds,vds_array,ids_array); - } -} -const CubicCubic & CubicCubic::operator=(const CubicCubic &rhs){ - if (this != &rhs) { // make sure not same object - - for(int i=0;i>n_diffVgs; - idvdvg_file>>n_diffVds; - - noYPoints=n_diffVgs; - CubicSplines1D= new yCSpair[noYPoints]; - - double* vds_array; - double* ids_array; - vds_array=new double[n_diffVds]; - ids_array=new double[n_diffVds]; - - int index; - double vds; - double ids; - double vgs; - - for(int i=0;i>index; - idvdvg_file>>vds; - idvdvg_file>>ids; - idvdvg_file>>vgs; - CubicSplines1D[i].y=vgs; - vds_array[j]=vds; - ids_array[j]=ids; - } - CubicSplines1D[i].xCubicSpline.initialize(n_diffVds,vds_array,ids_array); - } -} - - -CubicCubic::CubicCubic(int no_yPoints, double yArray[],int *pxArray,double* xArray[],double* zArray[]){ - noYPoints=no_yPoints; - CubicSplines1D= new yCSpair[noYPoints]; - for(int i=0;i>n; - double* vds_array; - double* ids_array; - vds_array=new double[n]; - ids_array=new double[n]; - - if(!yf.is_open() || !xzf.is_open()){cout<<"Failed to open file "<>noYPoints; - CubicSplines1D= new yCSpair[noYPoints]; - for(int i=0;i>CubicSplines1D[i].y; - for(int j=0;j>vds_array[j]; - xzf>>ids_array[j]; - } - - CubicSplines1D[i].xCubicSpline.initialize(n,vds_array,ids_array); - } - } -} - -CubicCubic::CubicCubic(){ -} - -CubicCubic::~CubicCubic(){ - delete [] CubicSplines1D; - CubicSplines1D=0; -} - -yCSpair::yCSpair(){ -} - -yCSpair::~yCSpair(){ -} - -double IdVbs::Evaluate(double vds,double vgs,double vbs){ - if(vbs_l<=vbs && vbs>vbs_lp; - vbsf>>filename_l; - - bool found=false; - - while(!found || !vbsf.eof()){ - vbsf>>vbs_hp; - vbsf>>filename_h; - - if(vbs>=vbs_lp && vbs), with Reserved Font Name CMR6. -% This Font Software is licensed under the SIL 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suitable for printer only not scalable - -#$(MAINFILE).ps: $(MAINFILE).dvi -# $(DVITOPS) -Ppdf -G0 $(MAINFILE).dvi -o $(MAINFILE).ps -#$(MAINFILE).pdf: $(MAINFILE).ps -# $(PSTOPDF) -sPAPERSIZE=a4 -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 -dSubsetFonts=true -dEmbedAllFonts=true $(MAINFILE).ps -$(MAINFILE).pdf: $(MAINFILE).dvi - $(DVIPDF) $(MAINFILE).dvi - -clean: - $(RM) -f $(MAINFILE).pdf $(MAINFILE).ps $(MAINFILE).dvi -cleanall: - $(RM) -f $(MAINFILE).pdf $(MAINFILE).ps $(MAINFILE).dvi *.aux *.log *.ind *.ilg *.idx *.toc diff --git a/OSCAD/LPCSim/report/presentation/SMCSim.tex b/OSCAD/LPCSim/report/presentation/SMCSim.tex deleted file mode 100644 index 03c1dc1..0000000 --- a/OSCAD/LPCSim/report/presentation/SMCSim.tex +++ /dev/null @@ -1,732 +0,0 @@ -%$Header: /cvsroot/latex-beamer/latex-beamer/solutions/generic-talks/generic-ornate-15min-45min.en.tex,v 1.4 2004/10/07 20:53:08 tantau Exp $ -\documentclass{beamer} -\mode -{ - \usecolortheme{seahorse} - \usefonttheme{professionalfonts} - \useinnertheme{rounded} - \useoutertheme{shadow} -% \useoutertheme{smoothbars} -} -%\setbeamertemplate{background canvas}[vertical shading][bottom=white!10,top=blue!5] -\usepackage{verbatim} -\usepackage[english]{babel} -\usepackage[latin1]{inputenc} -\usepackage{pgf,pgfarrows,pgfnodes,pgfautomata,pgfheaps,pgfshade} -\usepackage{amsmath,amsfonts,amsthm,amssymb} -\usepackage{times} -\usepackage[T1]{fontenc} -\usepackage{graphics} -\usepackage{graphicx} -%\usepackage{psfig} -\usepackage{algorithmic} - -\title -{Scilab based Mini Circuit Simulator for Academic Purpose} - -\author[] -{Yogesh Dilip Save} -\institute -{ - Indian Institute of Technology, Bombay -} -%\pgfdeclareimage[height=0.7cm]{university-logo}{iitblogo.eps} -%\logo{\pgfuseimage{university-logo}} - - -\date[seminar] % (optional) -{\today} - - -\begin{document} -%*************************************************************************************** -\begin{frame} - \titlepage -\end{frame} -%*************************************************************************************** -\begin{frame} - \frametitle{Presentation Outline} - \tableofcontents -\end{frame} -%*************************************************************************************** - -\section{Introduction} -\begin{frame} - \frametitle{Motivation} -\begin{block}{Objective} -To assist students in improving their knowledge in field of circuit simulation. -\end{block} -\begin{block}{Problem with commercial simulators} -\begin{itemize} -\item Generally software codes are not available. -\item Software codes are written in higher level language (C Programming and Fortran....). -\item Complex due to implementation of many features and complex modeling. -\end{itemize} -\end{block} -\end{frame} - -\begin{frame} - \frametitle{Motivation} -\begin{block}{Objective} -To assist students in improving their knowledge in field of circuit simulation. -\end{block} -\begin{block}{Mini simulator} -\begin{itemize} -\item used Scilab for coding. -\item integrated least number of component. -\item different versions for add-on features. -\end{itemize} -\end{block} -\end{frame} - -\begin{frame} - \frametitle{Plan} -\begin{block}{Display Symbolic Equations} -\end{block} -\begin{block}{Display Numerical Values} -\end{block} -\begin{block}{Complete Report Generation} -\end{block} -\begin{block}{GUI for circuit drawing} -\end{block} -\begin{block}{GUI for simulator option} -\end{block} -\begin{block}{Spoken Tutorial} -\end{block} -%\begin{block} -%\begin{itemize} -%\item Display Numerical Values -%\item Complete Report Generation -%\item Graphical User Interface -%\item Spoken Tutorial -%\end{itemize} -%\end{block} -\end{frame} - -\begin{frame} - \frametitle{Core of circuit simulator} -\begin{itemize} -\item Operating Point Analysis plays an important role in a circuit simulation. -\item DC Analysis is equivalent to performing OP Analysis at each voltages/currents. -\item Transient Analysis is equivalent to performing OP Analysis at each time step. -\item AC Analysis computes the small-signal behavior of a circuit about an operating point -\item Thus implementation of Operating Point Analysis affects overall performance of the circuit simulator. -\end{itemize} -\end{frame} - -\section{Operating Point Analysis} -\begin{frame} -\begin{block}{Operating Point (OP) Analysis} -\begin{itemize} -\item OP Analysis is the central part of a circuit simulator. -\item The equations that describe the electrical system are nonlinear and algebraic and their solution gives operating point. -\item Systems of nonlinear equations are solved by iteratively formulating and solving systems of linear algebraic equations. -\item The overall efficiency of a circuit simulator is dependent upon the performance of the linear DC analyzer. -%\item Thus, our work is towards improving the performance of linear DC Analyzers and handling convergence issues related to large size nonlinear circuits. -\end{itemize} -\end{block} -\end{frame} - -\begin{frame} -\begin{block}{Circuit with linear elements} -\end{block} -\end{frame} - -\begin{frame} -\begin{block}{\small Nodal Analysis} -\begin{itemize} -\begin{small} -\item Applicable when the network has only current sources and conductances type devices i.e., $i=g(v)$. -\item Let, $\mathbf{A}_r$ be the reduced incidence matrix of $\cal{G}$ which is a representative matrix of $V_v(\cal{G})$. \\ -\end{small} -\begin{tiny} -The KCL constraints are -$$\mathbf{A_ri}=\mathbf{0}$$ -$$\left[\begin{array}{cc} - \mathbf{A}_{rG} & \mathbf{A}_{rJ} -\end{array}\right] -\left[\begin{array}{c} - \mathbf{i}_{G} \\ - \mathbf{i}_{J} -\end{array}\right] -=\mathbf{0}$$ -$$\mathbf{A}_{rG}\mathbf{i}_{G}=-\mathbf{A}_{rJ}\mathbf{i}_{J}$$ - -$$\mathbf{A}_{rG}\mathbf{G}\mathbf{v}_{G}=-\mathbf{A}_{rJ}\mathbf{i}_{J}\ \ \ \ \ \ \ \ (As, \mathbf{i}_{G}=\mathbf{G}\mathbf{v}_{G})$$ - -The KVE constraints are -$$\left[\begin{array}{c} - \mathbf{v}_{G} \\ - \mathbf{v}_{J} -\end{array}\right] -= -\left[\begin{array}{c} - \mathbf{A}_{rG}^T \\ - \mathbf{A}_{rJ}^T -\end{array}\right] -\mathbf{v}_n$$ - -\begin{equation} -\mathbf{A}_{rG}\mathbf{G}\mathbf{A}_{rG}^{T}\mathbf{v}_{n}=-\mathbf{A}_{rJ}\mathbf{i}_{J} -\label{nodal_equation} -\end{equation} -\end{tiny} -\end{itemize} -\end{block} -\end{frame} - -\begin{frame}[fragile] -\begin{block}{Matrix Formulation} -\begin{itemize} -\item The diagonal entries of the matrix are the sum of conductances incident on the corresponding nodes. -\item The off diagonal entries $(i,j)^{th}$ of the matrix is the negative of conductances between node $i$ and $j$. -\item The $\mathbf{A}_{rJ}\mathbf{i}_{J}$ is the sum of current sources leaving the nodes. -\end{itemize} -\end{block} -\begin{block}{Example} -\end{block} -\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.35]{../figures/nodal_figure.eps} -\end{figure} -\end{minipage} -\begin{minipage}[!b]{0.55\linewidth} % A minipage that covers half the page -\begin{tiny} -$$\left[ -\begin{array}{ccc} -\widehat{R}_{1}+\widehat{R}_{2} & -\widehat{R}_{2} & 0\\ --\widehat{R}_{2} & \widehat{R}_{2}+\widehat{R}_{3}+\widehat{R}_{4} & -\widehat{R}_{4}\\ -0 & -\widehat{R}_{4} & \widehat{R}_{4}+\widehat{R}_{5} -\end{array} -\right] \left[ -\begin{array}{c} -v_{1}\\ -v_{2}\\ -v_{3} -\end{array} -\right]= \left[ -\begin{array}{c} -I_{1}\\ -0\\ -I_{2} -\end{array} -\right]$$ -\end{tiny} -\end{minipage} -\tiny $$\mbox{Note that } \widehat{R}=1/R$$ -\tiny \href{run:../../LPCSim_1.0/ckt/nodalExample.ckt}{\color{red} Click here to see the example} -\end{frame} - - -\begin{frame} -\begin{block}{Modified Nodal Analysis} -\begin{small} -\begin{itemize} -\item applicable to all kinds of networks. -\item Let $\mathbf{A}_{r}$ be the reduced incidence matrix of ${\cal{G}}$ -By Tellegan's theorem, -\begin{tiny} -$$\mathbf{A_ri}=\mathbf{0}$$ -$$\left[\begin{array}{ccc} - \mathbf{A}_{rG} & \mathbf{A}_{rT} & \mathbf{A}_{rJ} -\end{array}\right] -\left[\begin{array}{c} - \mathbf{i}_{G} \\ - \mathbf{i}_{T} \\ - \mathbf{i}_{J} -\end{array}\right] -=\mathbf{0}$$ - -$$\left[\begin{array}{cc} - \mathbf{A}_{rG}\mathbf{G} & \mathbf{A}_{rT} -\end{array}\right] -\left[\begin{array}{c} - \mathbf{v}_{G} \\ - \mathbf{i}_{T} -\end{array}\right] -=-\mathbf{A}_{rJ}\mathbf{i}_{J}$$ - -\begin{equation} -\label{mna_eq1} -\left[\begin{array}{cc} - \mathbf{A}_{rG}\mathbf{G}\mathbf{A}_{rG}^{T} & \mathbf{A}_{rT} -\end{array}\right] -\left[\begin{array}{c} - \mathbf{v}_{n} \\ - \mathbf{i}_{T} -\end{array}\right] -=-\mathbf{A}_{rJ}\mathbf{i}_{J} -\end{equation} - -Device characteristics of the branches in $T$ be -$$\left[\begin{array}{cc} - \mathbf{M} & \mathbf{N} -\end{array}\right] -\left[\begin{array}{c} - \mathbf{i}_{T} \\ - \mathbf{v}_{T} -\end{array}\right] -=\mathbf{S}_{T}$$ - -\begin{equation} -\label{mna_eq2} -\left[\begin{array}{cc} - \mathbf{NA}_{rT}^{T} & \mathbf{M} -\end{array}\right] -\left[\begin{array}{c} - \mathbf{v}_{n} \\ - \mathbf{i}_{T} -\end{array}\right] -=\mathbf{S}_{T} -\end{equation} -\end{tiny} -\end{itemize} -\end{small} -\end{block} -\end{frame} - -\begin{frame} -\begin{block}{Example} -\begin{figure}[!ht] -\begin{center} -\includegraphics[scale=0.35]{../figures/modified_figure.eps} -\caption{ Example for MNA } \label{modifiedfig} -\end{center} -\end{figure} -\begin{tiny} -$$\left[ -\begin{array}{cccccc} -\widehat{R}_{1}+\widehat{R}_{4} & -\widehat{R}_{1} & -\widehat{R}_{4} & 1 & 0 \\ --\widehat{R}_{1} & \widehat{R}_{1}+\widehat{R}_{2}+\widehat{R}_{3} & -\widehat{R}_{3} & 0 & 0 \\ --\widehat{R}_{4} & -\widehat{R}_{3} & \widehat{R}_{3}+\widehat{R}_{4} & 0 & 1 \\ -1 & 0 & 0 & 0 & 0 \\ -0 & 0 & 1 & 0 & 0 -\end{array} -\right] \left[ -\begin{array}{c} -v_{1}\\ -v_{2}\\ -v_{3}\\ -i_{V_1}\\ -i_{V_2}\\ -\end{array} -\right]= \left[ -\begin{array}{c} -0\\ -0\\ -0\\ -V_{1}\\ -V_{2} -\end{array} -\right]$$ -\end{tiny} -\tiny $$\mbox{Note that } \widehat{R}=1/R$$ -\tiny \href{run:../../LPCSim_1.0/ckt/modifiedNodalExample.ckt}{\color{red} Click here to see the example} -\end{block} -\end{frame} - -\begin{frame} -\frametitle{Controlled Sources} -\begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page - \begin{figure}[!ht] - \centering - \includegraphics[scale=0.6]{../figures/VCCS.eps} - \caption{\scriptsize Voltage Controlled Current Source (VCCS)} - \label{vccs} - \end{figure} -\end{minipage} -%\hspace{0.5cm} % To get a little bit of space between the figures -\begin{minipage}[!b]{0.47\linewidth} - \begin{figure}[!ht] - \centering - \includegraphics[scale=0.6]{../figures/VCVS.eps} - \caption{\scriptsize Voltage Controlled Voltage Source (VCVS) } - \label{vcvs} - \end{figure} - \end{minipage} -\begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page - \begin{figure}[!ht] - \centering - \includegraphics[scale=0.6]{../figures/CCCS.eps} - \caption{\scriptsize Current Controlled Current Source (CCCS)} - \label{cccs} - \end{figure} -\end{minipage} -%\hspace{0.5cm} % To get a little bit of space between the figures -\begin{minipage}[!b]{0.47\linewidth} - \begin{figure}[!ht] - \centering - \includegraphics[scale=0.6]{../figures/CCVS.eps} - \caption{\scriptsize Current Controlled Voltage Source (CCVS) } - \label{ccvs} - \end{figure} - \end{minipage} -\begin{scriptsize} -\begin{itemize} -\item In voltage controlled devices, we have added a $0A$ current source as controlling branch -%without disturbing the incidence relationship of existing edges (i.e., the addition is 'soldering type') and its voltage is used for calculating the value of the devices. -\item In current controlled devices, we have added a $0V$ voltage source as controlling branch -%by splitting a node (i.e., plier type entry) and the current through it is used for calculating the value of the devices. -\end{itemize} -\end{scriptsize} -\end{frame} - -\begin{frame} -\begin{block}{Example with controlled sources} -\begin{figure}[!ht] -\begin{center} -\includegraphics[scale=0.6]{../figures/linearckt.eps} -\caption{ \scriptsize Example with controlled source (MNA)} \label{modifiedfig} -\end{center} -\end{figure} -\begin{tiny} -$$\left[ -\begin{array}{ccccccc} -\widehat{R}_{1} & -\widehat{R}_{1} & 0 & 0 & 0 & 1 & 0 \\ --\widehat{R}_{1} & \widehat{R}_{1}+\widehat{R}_{2} & 0 & 0 & 0 & 0 &1\\ -0 & 0& \widehat{R}_{4} & -\widehat{R}_{4}-g_1 & 0 & 0 & -1 \\ -0 & 0& -\widehat{R}_{4} & \widehat{R}_{3}+ \widehat{R}_{4}+\widehat{R}_{5} &-\widehat{R}_{5} & 0 & 0 \\ -0 & 0& 0 &g_1-\widehat{R}_{5} & \widehat{R}_{5}+\widehat{R}_{6} & 0 & 0 \\ -1 & 0 & 0 & 0 & 0 &0 &0\\ -0 & 1 & -1 &-e1 &e1 &0 & 0 -\end{array} -\right] \left[ -\begin{array}{c} -v_{1}\\ -v_{2}\\ -v_{3}\\ -v_{4}\\ -v_{5}\\ -i_{V_1}\\ -i_{E_1}\\ -\end{array} -\right]= \left[ -\begin{array}{c} -0\\ -0\\ -I_1\\ -0\\ -0\\ -V_{1}\\ -0 -\end{array} -\right]$$ -\end{tiny} -\tiny $$\mbox{Note that } \widehat{R}=1/R$$ -\tiny \href{run:../../LPCSim_1.0/ckt/linear1.ckt}{\color{red} Click here to see the example} -\end{block} -\end{frame} - -\begin{frame} -\begin{block}{Example with controlled sources-2} -\begin{figure}[!ht] -\begin{center} -\includegraphics[scale=0.6]{../figures/linearckt2.eps} -\caption{ \scriptsize Example2 with controlled source (MNA)} \label{modifiedfig} -\end{center} -\end{figure} -\begin{tiny} -$$\left[ -\begin{array}{cccccc} -\widehat{R}_{1}+\widehat{R}_{2} & -\widehat{R}_{2} & 0 & 0 & 0 &0\\ --\widehat{R}_{2} &\widehat{R}_{2}+\widehat{R}_{4} &0& -\widehat{R}_{4} & 1 & 0 \\ -0 & -\widehat{R}_{4} & 0 & \widehat{R}_{4} & 0 & 1 \\ -0 & 1& -1 &0 & 0 & 0 \\ -0 & 0 & 0 & 1 & -h_1 &0 -\end{array} -\right] \left[ -\begin{array}{c} -v_{1}\\ -v_{2}\\ -v_{3}\\ -v_{4}\\ -i_{V_1}\\ -i_{H_1}\\ -\end{array} -\right]= \left[ -\begin{array}{c} -I_1\\ -0\\ -0\\ -0\\ -V_{1}\\ -0 -\end{array} -\right]$$ -\end{tiny} -\tiny $$\mbox{Note that } \widehat{R}=1/R$$ -\tiny \href{run:../../LPCSim_1.0/ckt/linear2.ckt}{\color{red} Click here to see the example} -\end{block} -\end{frame} - -\begin{frame} -\frametitle{Circuit with nonlinear elements} -Simulation of circuit with nonlinear element is done in two steps: -\begin{itemize} -\item Formulating the nonlinear equilibrium equations using topological constraints (i.e., KCE, KVE). -\item Solving these equations using appropriate numerical technique. -\end{itemize} -Newton-Raphson method -- Numerical technique to solve nonlinear equations -\begin{itemize} -\item fast convergence rate -\item needs good initial guess -\item does not guaranteed to converge -\item slower when multiple solution -\end{itemize} -\end{frame} - -\begin{frame} -\frametitle{Linearization of Nonlinear Elements} -\begin{minipage}[!b]{0.5\linewidth} -Diode characteristics, -$$I_D=I_S(e^{qV/kT}-1)$$ -$$I_D=I_D|_{V=V_0} + (V-V_0)\frac{I_D}{V}|_{V=V_0}$$ -$$I_D=I_{D0}+(V-V_0)G_{D0}$$ -\begin{figure}[h] -\begin{center} -\includegraphics[scale=0.4]{../figures/diodeI.eps} -\begin{small}Modeling of Diode\end{small} -\label{diodeI} -\end{center} -\end{figure} -\end{minipage} -\begin{minipage}[!b]{0.4\linewidth} -\begin{figure}[h] -\begin{center} -\includegraphics[scale=0.3]{../figures/diodechar1.eps} -\begin{small}Linearized approximation of diode model\end{small} -\begin{tiny}$$I_{DN0}=I_{D0}-V_0G_{D0}$$\end{tiny} -\end{center} -\end{figure} -\end{minipage} -\end{frame} - - -\begin{frame} -{\bf Procedure:}{Operating Point Analysis} -\small -\begin{algorithmic}[1] -\STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage. -\STATE Find branch voltage and node potential. -\STATE Find branch current from branch voltage using device characteristics. -\IF{Non-linear component} -\STATE {\bf NR:} Check device characteristics of non-linear devices. -\IF {Device characteristics is not satisfied} -\STATE Call Newton Raphson procedure -\STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage. -\STATE Find branch current from branch voltage using device characteristics. -\STATE Go to {\bf NR} -\ENDIF -\STATE Check for KCL -\ENDIF -\end{algorithmic} -\normalsize -\end{frame} - -\begin{frame} -\frametitle{Full Wave Bridge Rectifier} -\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.5]{../figures/bridge.eps} -\end{figure} -\end{minipage} -\hspace{0.5cm} % To get a little bit of space between the figures -\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.3]{../figures/bridgeOutput.eps} -\end{figure} -\end{minipage} -\end{frame} - -\section{DC Analysis} -\begin{frame} -\frametitle{DC Analysis} -{\bf Procedure:}{DC Analysis} -\small -\begin{algorithmic}[1] -\STATE Modify the value of the sweep source and update Modified Nodal matrix. -\STATE Do Operating Point Analysis. -\end{algorithmic} -\normalsize -\end{frame} - -\begin{frame} -\frametitle{Voltage Sweep} -\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.8]{../figures/V_Sweep.eps} -\caption{Example of DC Analysis (Vsweep.ckt)} -\end{figure} -\end{minipage} -\hspace{0.5cm} % To get a little bit of space between the figures -\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.3]{../figures/V_SweepOutput.eps} -\end{figure} -\end{minipage} -\end{frame} - -\begin{frame} -\frametitle{User defined Components} -Consider, a non-linear resistance, -$$I=\frac{1}{R}V^3$$ - -\begin{itemize} -\item Create a file \$CompName.sci -\item Define -\begin{itemize} -\item Function in the $i=g(v)$ form -\item Jacobian of the function -\end{itemize} -\end{itemize} - -%{\bf Syntax:-} -%\newline -%function I=\$CompName\_func(voltage,parameter) -%\$par\_2=parameter(2) -%\$par\_3=parameter(3) -\end{frame} - -\begin{frame} -\frametitle{Non-linear Resistance} -\begin{minipage}[!b]{0.43\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.7]{../figures/myR.eps} -\end{figure} -\begin{tiny} -function I=myR\_func(voltage,parameter) -\begin{center} - R=parameter(2); \newline - I=1/R*(voltage\^3); -\end{center} -endfunction \newline - - -function Gj=myR\_Jacobian(voltage,parameter) -\begin{center} - R=parameter(2); \newline - Gj=3/R*(voltage\^2); -\end{center} -endfunction -\end{tiny} -\end{minipage} -\hspace{0.5cm} % To get a little bit of space between the figures -\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.3]{../figures/myROutput.eps} -\end{figure} -\end{minipage} -\end{frame} - -\section{Transient Analysis} -\begin{frame} - \begin{block}{What is Transient Analysis?} - \begin{itemize} - \item Computes the response of a circuit as function of time. - \item Time is discretized and the solution is computed piecewise. - \end{itemize} - \end{block} - \begin{block}{Important factors} - \begin{itemize} - \item Proper time Stepping. - \item Integration methods. - \end{itemize} - \end{block} -\end{frame} - -\begin{frame} -\frametitle{Discreatization} -Consider, a capacitor -\begin{tiny} -$$I_C(t_n)=C\frac{\partial{V}_C(t_n)}{\partial{t}}$$ -Using Backward Euler's method, -$$I_C(t_n)=C\frac{V(t_n)-V(t_{n-1})}{t_n-t_{n-1}}$$ -$$I_C(t_n)=\frac{C}{h}V(t_n)-\frac{C}{h}V(t_{n-1})$$ -$$I_C(t_n)=G_C^{(k)}V(t_n)-I_C^{(k)}$$ -\end{tiny} -\begin{figure}[h] -\centering -\includegraphics[scale=0.8]{../figures/Ceq.eps} -\end{figure} -\end{frame} - -\begin{frame} -\frametitle{RC Circuit} -\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.8]{../figures/RC.eps} -\end{figure} -\end{minipage} -\hspace{0.5cm} % To get a little bit of space between the figures -\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.3]{../figures/RCOutput.eps} -\end{figure} -\end{minipage} -\end{frame} - -\begin{frame} -\frametitle{Full Wave Bridge Rectifier with Filter} -\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.4]{../figures/bridgeFilter.eps} -\end{figure} -\end{minipage} -\hspace{0.5cm} % To get a little bit of space between the figures -\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.3]{../figures/bridgeFilterOutput.eps} -\end{figure} -\end{minipage} -\end{frame} - -\begin{frame} -\frametitle{PseudoCode} -{\bf Procedure:}{Transient Analysis} -\small -\begin{algorithmic}[1] -\STATE Discretize time dependent Component and Update Modified Nodal matrix. -\STATE Do Operating Point Analysis. -\end{algorithmic} -\normalsize - -{\bf Procedure:}{Discretization} -\small -\begin{algorithmic}[1] -\STATE Compute time dependent source value at time t. -\STATE Compute the values of static model of dynamic component at time t. -\STATE Update Modified Nodal matrix. -\end{algorithmic} -\normalsize -\end{frame} - -%\begin{frame} -%\frametitle{CMOS Inverter} -%\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -%\begin{figure}[h] -%\centering -%\includegraphics[scale=0.4]{../figures/inverter.eps} -%\end{figure} -%\end{minipage} -%\hspace{0.5cm} % To get a little bit of space between the figures -%\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page -%\begin{figure}[h] -%\centering -%\includegraphics[scale=0.3]{../figures/inverterOutput.eps} -%\end{figure} -%\end{minipage} -%\end{frame} - -\end{document} - diff --git a/OSCAD/LPCSim/report/presentation/SMCSim_SFD.tex b/OSCAD/LPCSim/report/presentation/SMCSim_SFD.tex deleted file mode 100644 index f2cd6dd..0000000 --- a/OSCAD/LPCSim/report/presentation/SMCSim_SFD.tex +++ /dev/null @@ -1,737 +0,0 @@ -%$Header: /cvsroot/latex-beamer/latex-beamer/solutions/generic-talks/generic-ornate-15min-45min.en.tex,v 1.4 2004/10/07 20:53:08 tantau Exp $ -\documentclass{beamer} -\mode -{ - \usecolortheme{seahorse} - \usefonttheme{professionalfonts} - \useinnertheme{rounded} - \useoutertheme{shadow} -% \useoutertheme{smoothbars} -} -%\setbeamertemplate{background canvas}[vertical shading][bottom=white!10,top=blue!5] -\usepackage{verbatim} -\usepackage[english]{babel} -\usepackage[latin1]{inputenc} -\usepackage{pgf,pgfarrows,pgfnodes,pgfautomata,pgfheaps,pgfshade} -\usepackage{amsmath,amsfonts,amsthm,amssymb} -\usepackage{times} -\usepackage[T1]{fontenc} -\usepackage{graphics} -\usepackage{graphicx} -%\usepackage{psfig} -\usepackage{algorithmic} - -\title -{Scilab based Mini Circuit Simulator} - -\author[] -{Yogesh Dilip Save} -\institute -{ - Department of Electrical Engineering\\ - Indian Institute of Technology, Bombay -} -%\pgfdeclareimage[height=0.7cm]{university-logo}{iitblogo.eps} -%\logo{\pgfuseimage{university-logo}} - - -\date[seminar] % (optional) -{Sept., 2011 / \small{Software Freedom Day}} - - -\begin{document} -%*************************************************************************************** -\begin{frame} - \titlepage -\end{frame} -%*************************************************************************************** -%\begin{frame} -% \frametitle{Presentation Outline} -% \setcounter{tocdepth}{1} -% \tableofcontents -%\end{frame} -%*************************************************************************************** - -\section{Introduction} -\begin{frame} - \frametitle{Motivation} -\begin{block}{Objective} -To assist students in improving their knowledge in field of circuit simulation. -\end{block} -\begin{block}{Problem with commercial simulators} -\begin{itemize} -\item Generally software codes are not available. -\item Software codes are written in higher level language (C Programming and Fortran....). -\item Complex due to implementation of many features and complex modelling. -\end{itemize} -\end{block} -\end{frame} - -\begin{frame} - \frametitle{Motivation} -\begin{block}{Objective} -To assist students in improving their knowledge in field of circuit simulation. -\end{block} -\begin{block}{Mini simulator} -\begin{itemize} -\item used Scilab for coding. -\item integrated least number of component. -\item different versions for add-on features. -\end{itemize} -\end{block} -\end{frame} - -\section{Features} -\begin{frame} - \frametitle{Features} -\begin{itemize} - \item {\color{red} Various Analysis options.} - \begin{itemize} - \item Operating Point Analysis - \item DC Analysis - \item Transient Analysis - \item AC Analysis - \end{itemize} - \item Facility to define a new component. - \item Provides circuit equations for debugging as well as learning circuit simulator. - \item Easy to integrate and test a new method such as convergence technique, integration method etc. -\end{itemize} -\end{frame} - -\begin{frame} -\frametitle{Full Wave Bridge Rectifier with Filter} -\begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page - \begin{small} {\bf Circuit Diagram and Netlist} \end{small} -\vspace{-0.5cm} -\begin{figure}[h] -\centering -\includegraphics[scale=0.47]{../figures/bridgeFilter.eps} -\end{figure} -\vspace{-0.5cm} -\begin{tiny} -* Full Wave Bridge Rectifier -\newline -\vspace{-0.1cm} -V1 1 2 sine (5 50) -\newline -\vspace{-0.1cm} -D1 1 3 mymodel (1e-8 0.026) -\newline -\vspace{-0.1cm} -D2 2 3 mymodel (1e-8 0.026) -\newline -\vspace{-0.1cm} -D3 0 1 mymodel (1e-8 0.026) -\newline -\vspace{-0.1cm} -D4 0 2 mymodel (1e-8 0.026) -\newline -\vspace{-0.1cm} -R1 3 0 10000 -\newline -\vspace{-0.1cm} -C1 3 0 1e-2 -\newline -\vspace{-0.1cm} -.tran 0 100 0.5 -\newline -\vspace{-0.1cm} -.plot v(1)-v(2) v(3) -\newline -\vspace{-0.1cm} -.end -\end{tiny} -\end{minipage} -\hspace{0.1cm} % To get a little bit of space between the figures -\begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.3]{../figures/bridgeFilterOutput.eps} -\caption{Input-Output Waveform} -\end{figure} -\end{minipage} -\end{frame} - -\begin{frame} - \frametitle{Features} -\begin{itemize} - \item Various Analysis options. - \begin{itemize} - \item Operating Point Analysis - \item DC Analysis - \item Transient Analysis - \item AC Analysis - \end{itemize} - \item {\color{red} Facility to define a new component.} - \item Provides circuit equations for debugging as well as learning circuit simulator. - \item Easy to integrate and test a new method such as convergence technique, integration method etc. -\end{itemize} -\end{frame} - -\begin{frame} -\frametitle{User defined Components} -Consider, a non-linear resistance, -$$I=\frac{1}{R}V^3$$ - -\begin{itemize} -\item Create a file \$CompName.sci -\item Define -\begin{itemize} -\item Function in the $i=g(v)$ form -\item Jacobian of the function -\end{itemize} -\end{itemize} - -%{\bf Syntax:-} -%\newline -%function I=\$CompName\_func(voltage,parameter) -%\$par\_2=parameter(2) -%\$par\_3=parameter(3) -\end{frame} - -\begin{frame} -\frametitle{Non-linear Resistance} -\begin{minipage}[!b]{0.43\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.7]{../figures/myR.eps} -\end{figure} -\begin{tiny} -function I=myR\_func(voltage,param)\newline -\hspace*{1cm}R=param(2); \newline -\hspace*{1cm}I=1/R*(voltage$^3$);\newline -endfunction - -function Gj=myR\_Jacobian(voltage,param)\newline -\hspace*{1cm}R=param(2); \newline -\hspace*{1cm}Gj=3/R*(voltage$^2$);\newline -endfunction -\end{tiny} -\end{minipage} -\hspace{0.5cm} % To get a little bit of space between the figures -\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page -\begin{figure}[h] -\centering -\includegraphics[scale=0.3]{../figures/myROutput.eps} -\end{figure} -\end{minipage} -\end{frame} - -\begin{frame} - \frametitle{Features} -\begin{itemize} - \item Various Analysis options. - \begin{itemize} - \item Operating Point Analysis - \item DC Analysis - \item Transient Analysis - \item AC Analysis - \end{itemize} - \item Facility to define a new component. - \item {\color{red} Provides circuit equations for debugging as well as learning circuit simulator.} - \item Easy to integrate and test a new method such as convergence technique, integration method etc. -\end{itemize} -\end{frame} - -\begin{frame} -\begin{block}{Example} -%\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -\begin{figure}[!ht] -\begin{center} -\includegraphics[scale=0.35]{../figures/modified_figure.eps} -\caption{ Example for MNA } \label{modifiedfig} -\end{center} -\end{figure} -%\end{minipage} -%\begin{minipage}[!b]{0.55\linewidth} % A minipage that covers half the page -\begin{tiny} -$$\left[ -\begin{array}{cccccc} -G_{1}+G_{4} & -G_{1} & -G_{4} & 1 & 0 \\ --G_{1} & G_{1}+G_{2}+G_{3} & -G_{3} & 0 & 0 \\ --G_{4} & -G_{3} & G_{3}+G_{4} & 0 & 1 \\ -1 & 0 & 0 & 0 & 0 \\ -0 & 0 & 1 & 0 & 0 -\end{array} -\right] \left[ -\begin{array}{c} -v_{1}\\ -v_{2}\\ -v_{3}\\ -i_{V_1}\\ -i_{V_2}\\ -\end{array} -\right]= \left[ -\begin{array}{c} -0\\ -0\\ -0\\ -V_{1}\\ -V_{2} -\end{array} -\right]$$ -\end{tiny} -%\end{minipage} -\end{block} -\end{frame} - -\begin{frame} - \frametitle{Features} -\begin{itemize} - \item Various Analysis options. - \begin{itemize} - \item Operating Point Analysis - \item DC Analysis - \item Transient Analysis - \item AC Analysis - \end{itemize} - \item Facility to define a new component. - \item Provides circuit equations for debugging as well as learning circuit simulator. - \item {\color{red} Easy to integrate and test a new method such as convergence technique, integration method etc.} -\end{itemize} -\end{frame} - -\begin{frame} - \begin{center} - {\Huge Thank You} -\end{center} -% \smiley -\end{frame} -% -% \section{Operating Point Analysis} -% \begin{frame} -% \begin{block}{Operating Point (OP) Analysis} -% \begin{itemize} -% \item OP Analysis is the central part of a circuit simulator. -% \item The equations that describe the electrical system are nonlinear and algebraic and their solution gives operating point. -% \item Systems of nonlinear equations are solved by iteratively formulating and solving systems of linear algebraic equations. -% \item The overall efficiency of a circuit simulator is dependent upon the performance of the linear DC analyzer. -% %\item Thus, our work is towards improving the performance of linear DC Analyzers and handling convergence issues related to large size nonlinear circuits. -% \end{itemize} -% \end{block} -% \end{frame} -% -% \begin{frame} -% \begin{block}{\small Nodal Analysis} -% \begin{itemize} -% \begin{small} -% \item Applicable when the network has only current sources and conductances type devices i.e., $i=g(v)$. -% \item Let, $\mathbf{A}_r$ be the reduced incidence matrix of $\cal{G}$ which is a representative matrix of $V_v(\cal{G})$. \\ -% \end{small} -% \begin{tiny} -% The KCL constraints are -% $$\mathbf{A_ri}=\mathbf{0}$$ -% $$\left[\begin{array}{cc} -% \mathbf{A}_{rG} & \mathbf{A}_{rJ} -% \end{array}\right] -% \left[\begin{array}{c} -% \mathbf{i}_{G} \\ -% \mathbf{i}_{J} -% \end{array}\right] -% =\mathbf{0}$$ -% $$\mathbf{A}_{rG}\mathbf{i}_{G}=-\mathbf{A}_{rJ}\mathbf{i}_{J}$$ -% -% $$\mathbf{A}_{rG}\mathbf{G}\mathbf{v}_{G}=-\mathbf{A}_{rJ}\mathbf{i}_{J}\ \ \ \ \ \ \ \ (As, \mathbf{i}_{G}=\mathbf{G}\mathbf{v}_{G})$$ -% -% The KVE constraints are -% $$\left[\begin{array}{c} -% \mathbf{v}_{G} \\ -% \mathbf{v}_{J} -% \end{array}\right] -% = -% \left[\begin{array}{c} -% \mathbf{A}_{rG}^T \\ -% \mathbf{A}_{rJ}^T -% \end{array}\right] -% \mathbf{v}_n$$ -% -% \begin{equation} -% \mathbf{A}_{rG}\mathbf{G}\mathbf{A}_{rG}^{T}\mathbf{v}_{n}=-\mathbf{A}_{rJ}\mathbf{i}_{J} -% \label{nodal_equation} -% \end{equation} -% \end{tiny} -% \end{itemize} -% \end{block} -% \end{frame} -% -% \begin{frame} -% \begin{block}{Matrix Formulation} -% \begin{itemize} -% \item The diagonal entries of the matrix are the sum of conductances incident on the corresponding nodes. -% \item The off diagonal entries $(i,j)^{th}$ of the matrix is the negative of conductances between node $i$ and $j$. -% \item The $\mathbf{A}_{rJ}\mathbf{i}_{J}$ is the sum of current sources leaving the nodes. -% \end{itemize} -% \end{block} -% \begin{block}{Example} -% \end{block} -% \begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -% \begin{figure}[h] -% \centering -% \includegraphics[scale=0.35]{../figures/nodal_figure.eps} -% \end{figure} -% \end{minipage} -% \begin{minipage}[!b]{0.55\linewidth} % A minipage that covers half the page -% \begin{tiny} -% $$\left[ -% \begin{array}{ccc} -% G_{1}+G_{2} & -G_{2} & 0\\ -% -G_{2} & G_{2}+G_{3}+G_{4} & -G_{4}\\ -% 0 & -G_{4} & G_{4}+G_{5} -% \end{array} -% \right] \left[ -% \begin{array}{c} -% v_{1}\\ -% v_{2}\\ -% v_{3} -% \end{array} -% \right]= \left[ -% \begin{array}{c} -% I_{1}\\ -% 0\\ -% I_{2} -% \end{array} -% \right]$$ -% \end{tiny} -% \end{minipage} -% \end{frame} -% -% -% \begin{frame} -% \begin{block}{Modified Nodal Analysis} -% \begin{small} -% \begin{itemize} -% \item applicable to all kinds of networks. -% \item Let $\mathbf{A}_{r}$ be the reduced incidence matrix of ${\cal{G}}$ -% By Tellegan's theorem, -% \begin{tiny} -% $$\mathbf{A_ri}=\mathbf{0}$$ -% $$\left[\begin{array}{ccc} -% \mathbf{A}_{rG} & \mathbf{A}_{rT} & \mathbf{A}_{rJ} -% \end{array}\right] -% \left[\begin{array}{c} -% \mathbf{i}_{G} \\ -% \mathbf{i}_{T} \\ -% \mathbf{i}_{J} -% \end{array}\right] -% =\mathbf{0}$$ -% -% $$\left[\begin{array}{cc} -% \mathbf{A}_{rG}\mathbf{G} & \mathbf{A}_{rT} -% \end{array}\right] -% \left[\begin{array}{c} -% \mathbf{v}_{G} \\ -% \mathbf{i}_{T} -% \end{array}\right] -% =-\mathbf{A}_{rJ}\mathbf{i}_{J}$$ -% -% \begin{equation} -% \label{mna_eq1} -% \left[\begin{array}{cc} -% \mathbf{A}_{rG}\mathbf{G}\mathbf{A}_{rG}^{T} & \mathbf{A}_{rT} -% \end{array}\right] -% \left[\begin{array}{c} -% \mathbf{v}_{n} \\ -% \mathbf{i}_{T} -% \end{array}\right] -% =-\mathbf{A}_{rJ}\mathbf{i}_{J} -% \end{equation} -% -% Device characteristics of the branches in $T$ be -% $$\left[\begin{array}{cc} -% \mathbf{M} & \mathbf{N} -% \end{array}\right] -% \left[\begin{array}{c} -% \mathbf{i}_{T} \\ -% \mathbf{v}_{T} -% \end{array}\right] -% =\mathbf{S}_{T}$$ -% -% \begin{equation} -% \label{mna_eq2} -% \left[\begin{array}{cc} -% \mathbf{NA}_{rT}^{T} & \mathbf{M} -% \end{array}\right] -% \left[\begin{array}{c} -% \mathbf{v}_{n} \\ -% \mathbf{i}_{T} -% \end{array}\right] -% =\mathbf{S}_{T} -% \end{equation} -% \end{tiny} -% \end{itemize} -% \end{small} -% \end{block} -% \end{frame} -% -% \begin{frame} -% \begin{block}{Example} -% %\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -% \begin{figure}[!ht] -% \begin{center} -% \includegraphics[scale=0.35]{../figures/modified_figure.eps} -% \caption{ Example for MNA } \label{modifiedfig} -% \end{center} -% \end{figure} -% %\end{minipage} -% %\begin{minipage}[!b]{0.55\linewidth} % A minipage that covers half the page -% \begin{tiny} -% $$\left[ -% \begin{array}{cccccc} -% G_{1}+G_{4} & -G_{1} & -G_{4} & 1 & 0 \\ -% -G_{1} & G_{1}+G_{2}+G_{3} & -G_{3} & 0 & 0 \\ -% -G_{4} & -G_{3} & G_{3}+G_{4} & 0 & 1 \\ -% 1 & 0 & 0 & 0 & 0 \\ -% 0 & 0 & 1 & 0 & 0 -% \end{array} -% \right] \left[ -% \begin{array}{c} -% v_{1}\\ -% v_{2}\\ -% v_{3}\\ -% i_{V_1}\\ -% i_{V_2}\\ -% \end{array} -% \right]= \left[ -% \begin{array}{c} -% 0\\ -% 0\\ -% 0\\ -% V_{1}\\ -% V_{2} -% \end{array} -% \right]$$ -% \end{tiny} -% %\end{minipage} -% \end{block} -% \end{frame} -% -% \begin{frame} -% \frametitle{Controlled Sources} -% \begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page -% \begin{figure}[!ht] -% \centering -% \includegraphics[scale=0.6]{../figures/VCCS.eps} -% \caption{Voltage Controlled Current Source (VCCS)} -% \label{vccs} -% \end{figure} -% \end{minipage} -% %\hspace{0.5cm} % To get a little bit of space between the figures -% \begin{minipage}[!b]{0.47\linewidth} -% \begin{figure}[!ht] -% \centering -% \includegraphics[scale=0.6]{../figures/VCVS.eps} -% \caption{Voltage Controlled Voltage Source (VCVS) } -% \label{vcvs} -% \end{figure} -% \end{minipage} -% \begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page -% \begin{figure}[!ht] -% \centering -% \includegraphics[scale=0.6]{../figures/CCCS.eps} -% \caption{Current Controlled Current Source (CCCS)} -% \label{cccs} -% \end{figure} -% \end{minipage} -% %\hspace{0.5cm} % To get a little bit of space between the figures -% \begin{minipage}[!b]{0.47\linewidth} -% \begin{figure}[!ht] -% \centering -% \includegraphics[scale=0.6]{../figures/CCVS.eps} -% \caption{Current Controlled Voltage Source (CCVS) } -% \label{ccvs} -% \end{figure} -% \end{minipage} -% \begin{small} -% \begin{itemize} -% \item In voltage controlled devices, we have added a $0A$ current source as controlling branch -% %without disturbing the incidence relationship of existing edges (i.e., the addition is 'soldering type') and its voltage is used for calculating the value of the devices. -% \item In current controlled devices, we have added a $0V$ voltage source as controlling branch -% %by splitting a node (i.e., plier type entry) and the current through it is used for calculating the value of the devices. -% \end{itemize} -% \end{small} -% \end{frame} -% -% \begin{frame} -% \frametitle{Linearization of Nonlinear Elements} -% \begin{minipage}[!b]{0.5\linewidth} -% Diode characteristics, -% $$I_D=I_S(e^{qV/kT}-1)$$ -% $$I_D=I_D|_{V=V_0} + (V-V_0)\frac{I_D}{V}|_{V=V_0}$$ -% $$I_D=I_{D0}+(V-V_0)G_{D0}$$ -% \begin{figure}[h] -% \begin{center} -% \includegraphics[scale=0.4]{../figures/diodeI.eps} -% \begin{small}Modeling of Diode\end{small} -% \label{diodeI} -% \end{center} -% \end{figure} -% \end{minipage} -% \begin{minipage}[!b]{0.4\linewidth} -% \begin{figure}[h] -% \begin{center} -% \includegraphics[scale=0.3]{../figures/diodechar1.eps} -% \begin{small}Linearized approximation of diode model\end{small} -% \begin{tiny}$$I_{DN0}=I_{D0}-V_0G_{D0}$$\end{tiny} -% \end{center} -% \end{figure} -% \end{minipage} -% \end{frame} -% -% -% \begin{frame} -% {\bf Procedure:}{Operating Point Analysis} -% \small -% \begin{algorithmic}[1] -% \STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage. -% \STATE Find branch voltage and node potentail. -% \STATE Find branch current from branch voltage using device characteristics. -% \IF{Non-linear component} -% \STATE {\bf NR:} Check device characteristics of non-linear devices. -% \IF {Device characteristics is not satisfied} -% \STATE Call Newton Raphson procedure -% \STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage. -% \STATE Find branch current from branch voltage using device characteristics. -% \STATE Go to {\bf NR} -% \ENDIF -% \STATE Check for KCL -% \ENDIF -% \end{algorithmic} -% \normalsize -% \end{frame} -% -% \begin{frame} -% \frametitle{Full Wave Bridge Rectifier} -% \begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -% \begin{figure}[h] -% \centering -% \includegraphics[scale=0.5]{../figures/bridge.eps} -% \end{figure} -% \end{minipage} -% \hspace{0.5cm} % To get a little bit of space between the figures -% \begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page -% \begin{figure}[h] -% \centering -% \includegraphics[scale=0.3]{../figures/bridgeOutput.eps} -% \end{figure} -% \end{minipage} -% \end{frame} -% -% \section{DC Analysis} -% \begin{frame} -% \frametitle{DC Analysis} -% {\bf Procedure:}{DC Analysis} -% \small -% \begin{algorithmic}[1] -% \STATE Modify the value of the sweep source and update Modified Nodal matrix. -% \STATE Do Operating Point Analysis. -% \end{algorithmic} -% \normalsize -% \end{frame} -% -% \begin{frame} -% \frametitle{Voltage Sweep} -% \begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -% \begin{figure}[h] -% \centering -% \includegraphics[scale=0.8]{../figures/V_Sweep.eps} -% \caption{Example of DC Analysis (Vsweep.ckt)} -% \end{figure} -% \end{minipage} -% \hspace{0.5cm} % To get a little bit of space between the figures -% \begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page -% \begin{figure}[h] -% \centering -% \includegraphics[scale=0.3]{../figures/V_SweepOutput.eps} -% \end{figure} -% \end{minipage} -% \end{frame} -% -% \section{Transient Analysis} -% \begin{frame} -% \begin{block}{What is Transient Analysis?} -% \begin{itemize} -% \item Computes the response of a circuit as function of time. -% \item Time is discretized and the solution is computed piecewise. -% \end{itemize} -% \end{block} -% \begin{block}{Important factors} -% \begin{itemize} -% \item Proper time Stepping. -% \item Integration methods. -% \end{itemize} -% \end{block} -% \end{frame} -% -% \begin{frame} -% \frametitle{Discreatization} -% Consider, a capacitor -% \begin{tiny} -% $$I_C(t_n)=C\frac{\partial{V}_C(t_n)}{\partial{t}}$$ -% Using Backward Euler's method, -% $$I_C(t_n)=C\frac{V(t_n)-V(t_{n-1})}{t_n-t_{n-1}}$$ -% $$I_C(t_n)=\frac{C}{h}V(t_n)-\frac{C}{h}V(t_{n-1})$$ -% $$I_C(t_n)=G_C^{(k)}V(t_n)-I_C^{(k)}$$ -% \end{tiny} -% \begin{figure}[h] -% \centering -% \includegraphics[scale=0.8]{../figures/Ceq.eps} -% \end{figure} -% \end{frame} -% -% \begin{frame} -% \frametitle{RC Circuit} -% \begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -% \begin{figure}[h] -% \centering -% \includegraphics[scale=0.8]{../figures/RC.eps} -% \end{figure} -% \end{minipage} -% \hspace{0.5cm} % To get a little bit of space between the figures -% \begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page -% \begin{figure}[h] -% \centering -% \includegraphics[scale=0.3]{../figures/RCOutput.eps} -% \end{figure} -% \end{minipage} -% \end{frame} -% -% -% \begin{frame} -% \frametitle{PseudoCode} -% {\bf Procedure:}{Transient Analysis} -% \small -% \begin{algorithmic}[1] -% \STATE Discretize time dependent Component and Update Modified Nodal matrix. -% \STATE Do Operating Point Analysis. -% \end{algorithmic} -% \normalsize -% -% {\bf Procedure:}{Discretization} -% \small -% \begin{algorithmic}[1] -% \STATE Compute time dependent source value at time t. -% \STATE Compute the values of static model of dynamic component at time t. -% \STATE Update Modified Nodal matrix. -% \end{algorithmic} -% \normalsize -% \end{frame} -% -% %\begin{frame} -% %\frametitle{CMOS Inverter} -% %\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page -% %\begin{figure}[h] -% %\centering -% %\includegraphics[scale=0.4]{../figures/inverter.eps} -% %\end{figure} -% %\end{minipage} -% %\hspace{0.5cm} % To get a little bit of space between the figures -% %\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page -% %\begin{figure}[h] -% %\centering -% %\includegraphics[scale=0.3]{../figures/inverterOutput.eps} -% %\end{figure} -% %\end{minipage} -% %\end{frame} -% -\end{document} - diff --git a/OSCAD/LPCSim/report/presentation/runlatex b/OSCAD/LPCSim/report/presentation/runlatex deleted file mode 100644 index 1e21dcf..0000000 --- a/OSCAD/LPCSim/report/presentation/runlatex +++ /dev/null @@ -1,3 +0,0 @@ -#!/bin/bash -latex $1.tex -dvipdf $1.dvi diff --git a/OSCAD/LPCSim/report/report.tex b/OSCAD/LPCSim/report/report.tex deleted file mode 100644 index 0a090c1..0000000 --- a/OSCAD/LPCSim/report/report.tex +++ /dev/null @@ -1,208 +0,0 @@ -\documentclass[a4paper,10pt]{report} -\pagestyle{plain} -\usepackage{graphicx} -\usepackage{caption} -\usepackage{algorithmic} -% Title Page -\title{MiniSim} -\author{Yogesh Dilip Save} - -\begin{document} -\maketitle -\chapter*{Introduction} -MiniSim is a circuit simulator to assist students in improving their knowledge in field of circuit simulation. The purpose of this project is not only to improve the understanding of student toward building simulator but also add some features which are not available in commercial simulator. - -\section*{Features} -Analysis Options -\begin{enumerate} -\item Operating Point Analysis -\item DC Analysis -\item Transient Analysis -\end{enumerate} -Devices Suported -\begin{enumerate} -\item All linear components (Resistances, Independent voltage and current sources, controlled sources). -\item Non-linear components (Diode) -\item User Defined Non-linear component -\item Time Dependent Component (Capacitor) -\item MOSFET -\end{enumerate} - -\chapter*{User Defined Components} -How to define a new component? -\par -Consider, a non-linear resistance, -$$I=\frac{1}{R}V^2$$ - -It is two step processs: -\begin{enumerate} -\item Create a file \$CompName.sci -\item Define -\begin{enumerate} -\item Function in the $i=g(v)$ form -\item Jacobian of the function -\end{enumerate} -\end{enumerate} - -{\bf Syntax:-} -\newline -function I=\$CompName\_func(voltage,parameter) -\$par\_2=parameter(2) -\$par\_3=parameter(3) - -\chapter*{Algorithms} -{\bf Circuit Simulator} (Main Program) -\small -\begin{algorithmic}[1] -\STATE Get Analysis Options. -\STATE Read Circuit from file and convert it into graph. -\STATE Linearize non-linear components. -\STATE Build Modified Nodal Matrix. -\STATE Do Operating Point Analysis. -\STATE Print Operating Point Solution. -\IF {DC Analysis} -\FOR{Sweep Voltage = Intial : Final} -\STATE Do DC Analysis. -\STATE Store output variables. -\ENDFOR -\STATE Print/Plot output. -\ENDIF -\IF {Transient Analysis} -\FOR{time = Intial : Final} -\STATE Do Transient Analysis. -\STATE Store output variables. -\ENDFOR -\STATE Print/Plot output. -\ENDIF -\end{algorithmic} -\normalsize - -{\bf Procedure:}{Get Analysis Options} -\small -\begin{algorithmic}[1] -\IF{Operating Point Analysis} -\STATE Analysis=Operating Point Analysis -\ENDIF -\IF{Transient Analysis} -\STATE Analysis=Transient Analysis -\STATE Get Start time, Stop time and Step size -\ENDIF -\IF{DC Analysis} -\STATE Analysis=DC Analysis -\STATE Get Start voltage, Stop voltage and Step size -\ENDIF -\STATE Get output variables for printing and plotting. -\STATE Find number of nodes in the circuit. -\end{algorithmic} - -{\bf Procedure:}{Build Modified Nodal Matrix (Stamp table approach)} -\small -\begin{algorithmic}[1] -\STATE $Size(A,b) \gets N-1+T$ -\FORALL {Edges} -\IF {Conductance} -\STATE A(Source,Source)+=conductance value -\STATE A(Source,Sink)-=conductance value -\STATE A(Sink,Source)-=conductance value -\ENDIF -\IF {Current Source} -\STATE b(Source)+= value -\STATE b(Sink)-= value -\ENDIF -\IF {Voltage Source} -\STATE A(Source,i*)=1; A(Sink,i*)=-1 -\STATE A(i*,Source)=1; A(i*,Sink)=-1 -\STATE b(i*)= value -\ENDIF -\IF {Voltage Controlled Current Source} -\STATE A(Source,CSource)+= value; A(Source,CSink)-= value -\STATE A(Sink,CSource)-= value; A(Sink,CSink)+= value -\ENDIF -\IF {Voltage controlled Voltage Source} -\STATE A(Source,i*)=1; A(Sink,i*)=-1 -\STATE A(i*,Source)=1; A(i*,Sink)=-1 -\STATE A(i*,CSource)=-value; A(i*,CSink)=value -\ENDIF -\IF {Current controlled Current Source} -\STATE A(Source,i*)=1; A(Sink,i*)=-1 -\STATE A(i*,i*)=1; A(i*,j*)=-value -\ENDIF -\IF {Current controlled Voltage Source} -\STATE A(Source,i*)=1; A(Sink,i*)=-1 -\STATE A(i*,Source)=1; A(i*,Sink)=-1 -\STATE A(i*,i*)=-value -\ENDIF -\ENDFOR -\end{algorithmic} -$N$=Number of Nodes.\newline -$T$=Number of devices whose device characteristic can not be expressed in terms of voltage. -\normalsize -\newline - -{\bf Procedure:}{Operating Point Analysis} -\small -\begin{algorithmic}[1] -\STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage. -\STATE Find branch voltage and node potentail. -\STATE Find branch current from branch voltage using device characteristics. -\IF{Non-linear component} -\STATE {\bf NR:} Check device characteristics of non-linear devices. -\IF {Device characteristics is not satisfied} -\STATE Call Newton Raphson procedure -\STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage. -\STATE Find branch current from branch voltage using device characteristics. -\STATE Go to {\bf NR} -\ENDIF -\STATE Check for KCL -\ENDIF -\end{algorithmic} -\normalsize - -{\bf Procedure}{Check for Device characteristics of Non-linear elements} -\small -\begin{algorithmic}[1] -\FORALL {Non-linear devices} -\STATE Compute actual current/voltage by its device characteristics. -\STATE Compare actual current/voltage with that of by anlysis. -\ENDFOR -\end{algorithmic} -\normalsize - -{\bf Procedure:}{Newton Raphson} -\small -\begin{algorithmic}[1] -\STATE Update the value of the linearized model of non-linear elements. -\STATE Update Modified Nodal matrix. -\end{algorithmic} -\normalsize - -{\bf Procedure:}{Transient Analysis} -\small -\begin{algorithmic}[1] -\STATE Discretize time dependent Component and Update Modified Nodal matrix. -\STATE Do Operating Point Analysis. -\end{algorithmic} -\normalsize - -{\bf Procedure:}{Discretization} -\small -\begin{algorithmic}[1] -\STATE Compute time dependent source value at time t. -\STATE Compute the values of static model of dynamic component at time t. -\STATE Update Modified Nodal matrix. -\end{algorithmic} -\normalsize - -{\bf Procedure:}{DC Analysis} -\small -\begin{algorithmic}[1] -\STATE Modify the value of the sweep source and update Modified Nodal matrix. -\STATE Do Operating Point Analysis. -\end{algorithmic} -\normalsize - -\chapter*{Examples} -In this chapter, some basic circuits and simulation results with minsim are presented. -\section*{RC Circuit} - -\end{document} diff --git a/OSCAD/LPCSim/report/simulationReport.aux b/OSCAD/LPCSim/report/simulationReport.aux deleted file mode 100644 index c17061a..0000000 --- a/OSCAD/LPCSim/report/simulationReport.aux +++ /dev/null @@ -1,3 +0,0 @@ -\relax -\@writefile{lof}{\contentsline {figure}{\numberline {1}{\ignorespaces linearization of diode $D_1$\relax }}{2}} -\@writefile{lof}{\contentsline {figure}{\numberline {2}{\ignorespaces plot\relax }}{3}} diff --git a/OSCAD/LPCSim/report/simulationReport.dvi b/OSCAD/LPCSim/report/simulationReport.dvi deleted file mode 100644 index c4ac162..0000000 Binary files a/OSCAD/LPCSim/report/simulationReport.dvi and /dev/null differ diff --git a/OSCAD/LPCSim/report/simulationReport.tex b/OSCAD/LPCSim/report/simulationReport.tex deleted file mode 100644 index 2e06242..0000000 --- a/OSCAD/LPCSim/report/simulationReport.tex +++ /dev/null @@ -1,173 +0,0 @@ -\documentclass[a4paper,10pt]{report} -\pagestyle{plain} -\usepackage{graphicx} -\usepackage{caption} -\usepackage{algorithmic} -% Title Page -\title{Half-Wave Rectifier} -\author{Generated by SMCSim} - -\begin{document} -\maketitle -\hrule\vspace{5mm} -\begin{center} {\bf Simulation of ckt/HWRectifierFilter.ckt} \end{center} -\hrule\vspace{5mm} - -{\bf Circuit Diagram:} \\ -\vspace{2mm} -\hrule\vspace{5mm} - -{\bf NetList:} \\ -{\it * Half-Wave Rectifier} \\ -V1 1 0 sine (5 50) \\ -D1 1 2 mymodel (1e-8 0.026) \\ -R1 2 0 10000 \\ -C1 2 0 10e-3 \\ -.tran 0 100 0.5 \\ -.plot v(1) v(2) \\ -.end -\vspace{2mm} -\hrule\vspace{5mm} - -{\bf System of Equations representing the electrical circuit:} -\vspace{2mm} -\begin{equation} - i_{V_1} + D_{1f}(v_1,v_2) = 0 -\end{equation} -\begin{equation} - (R_1)v_2 + (C_1)\frac{dv_2}{dt} + -D_{1f}(v_1,v_2) = 0 -\end{equation} -\begin{equation} - v_1 = V_1 -\end{equation} -\vspace{2mm} -$$ D_{nf}(v_a,v_b)=Is_n(1-e^{(v_a-v_b)/vt_n})$$ - where $Is_n$=reverse saturation current and $vt_n$=threshold voltage of diode $n$\\ -\hrule\vspace{5mm} - -{\bf Matrix form:}\\ -The system of equations $\mathbf{A}\mathbf{x}+\mathbf{D}_f(\mathbf{\widehat{x}})+\mathbf{C}(d\mathbf{x}/dt)=b$ (Symbolically)\\ -Where $\mathbf{A}$, $\mathbf{D}_f$ and $\mathbf{C}$ represent matrices corresponding to linear, - nonlinear and time dependent electrical elements respectively. - $\mathbf{b}$ represents the vector corresponding to sources. - -\begin{equation} -\mathbf{A}= -\left[ -\begin{array}{ccc} -0 &0 &1 \\ -0 &\widehat{R}_1 &0 \\ -1 &0 &0 -\end{array} -\right] -\end{equation} -\begin{equation} -\mathbf{b}= -\left[ -\begin{array}{c} -0 \\ -0 \\ -V_1 -\end{array} -\right] -\end{equation} -\begin{equation} -\mathbf{D}_f= -\left[ -\begin{array}{c} -D_{1f} \\ --D_{1f} \\ -0 -\end{array} -\right] -\end{equation} -\begin{equation} -\mathbf{C}= -\left[ -\begin{array}{ccc} -0 &0 &0 \\ -0 &C_1 &0 \\ -0 &0 &0 -\end{array} -\right] -\end{equation} -\begin{equation} -\mathbf{x}= -\left[ -\begin{array}{c} -v_1 \\ -v_2 \\ -i_{V_1} -\end{array} -\right] -\end{equation} -\begin{equation} -\mathbf{\widehat{x}}= -\left[ -\begin{array}{c} -(v_1,v_2) -\end{array} -\right] -\end{equation} -Note that the matrix contains $\widehat{R}$ entries (corresponding to resistors) whose values are equal to 1/$R$\\ -\hrule\vspace{2mm} -The number of equations are $3$ \\ -Unknowns: \\ - Node potentials: $2$ Current Variables: $1$ \\ -\hrule\vspace{5mm} - -{\bf Operating Point (DC) Analysis: } \\ -{\it All capacitors are open circuited and inductors are short circuited.} -\vspace{2mm} - -{\bf System of Equations representing the electrical circuit:} -\begin{equation} - i_{V_1} + D_{1f}(v_1,v_2) = 0 -\end{equation} -\begin{equation} - (R_1)v_2 + -D_{1f}(v_1,v_2) = 0 -\end{equation} -\begin{equation} - v_1 = V_1 -\end{equation} -\vspace{2mm} -$$ D_{nf}(v_a,v_b)=Is_n(1-e^{(v_a-v_b)/vt_n})$$ - where $Is_n$=reverse saturation current and $vt_n$=threshold voltage of diode $n$\\ -\hrule\vspace{5mm} - -{\bf Application of Newton-Raphson method: }\\ -\vspace{2mm} -{\it Nonliner models: }\\ -See linearized model for diode $D_1$ in diode\_D1.eps -\begin{figure}[h] -\centering -\includegraphics{diode_D1.eps} -\caption{linearization of diode $D_1$} -\end{figure} -\vspace{2mm} - -{\bf System of Equations representing the electrical circuit:}\\ -\begin{equation} - (R_{D_1})v_1 + (-R_{D_1})v_2 + i_{V_1} = -i_{D_1} -\end{equation} -\begin{equation} - (R_{D_1})v_1 + (R_{D_1}+R_1)v_2 = i_{D_1} -\end{equation} -\begin{equation} - v_1 = V_1 -\end{equation} -\hrule\vspace{5mm} - -{\bf Transient Analysis:} \\ -\hrule\vspace{5mm} - -{\bf Results:} \\ -\begin{figure}[h] -\centering -\includegraphics[scale=0.5]{output.eps} -\caption{plot} -\end{figure} - - -\end{document} - diff --git a/OSCAD/README.md b/OSCAD/README.md deleted file mode 100644 index e69de29..0000000 diff --git a/OSCAD/analysisInserter/convertgui.py b/OSCAD/analysisInserter/convertgui.py deleted file mode 100644 index 4345ed2..0000000 --- a/OSCAD/analysisInserter/convertgui.py +++ /dev/null @@ -1,392 +0,0 @@ -#!/usr/bin/python -# convertgui.py is a python script to create analysis option for ngspice. It is developed for OSCAD software. It is written by Saket Choudhary (saketkc@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# It is modified by Yogesh Dilip Save on 9th October 2012. - -import wx -import os,re -ID_ABOUT=101 -ID_OPEN=102 -ID_SAVE=103 -ID_BUTTON1=300 -ID_EXIT=200 - -# Some classes to use for the notebook pages. Obviously you would -# want to use something more meaningful for your application, these -# are just for illustration. - -def convertintoScientificForm(str): - if str[0]=='p': - return "e-12" - elif str[0]=='n' : - return "e-09" - elif str[0]=='u' : - return "e-06" - elif str[0]=='m' : - return "e-03" - else: - return "e-00" - -class PageOne(wx.Panel): - def __init__(self, parent): - wx.Panel.__init__(self, parent) - - grid1 = wx.GridSizer(5, 2) - grid1.Add(wx.StaticText(self,-1,'Enter Source Name:'),1) - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.source = wx.TextCtrl(self, -1, '', (150, 75), (120, -1)) - hbox.Add(self.source) - grid1.Add(hbox) - - grid1.Add(wx.StaticText(self,-1,'Start'),1) - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.start = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) - hbox.Add(self.start) - self.startscale = wx.ComboBox(self, -1, value = 'Volts or Amperes', choices=['mV or mA', 'uV or uA', 'nV or nA', 'pV or pA'], size=(160, -1), style=wx.CB_DROPDOWN) - hbox.Add(self.startscale) - grid1.Add(hbox) - - grid1.Add(wx.StaticText(self,-1,'Increment'),1) - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.step = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) - hbox.Add(self.step) - self.stepscale = wx.ComboBox(self, -1, value = 'Volts or Amperes', choices=['mV or mA', 'uV or uA', 'nV or nA', 'pV or pA'], size=(160, -1), style=wx.CB_DROPDOWN) - hbox.Add(self.stepscale) - grid1.Add(hbox) - - grid1.Add(wx.StaticText(self,-1,'Stop'),1) - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.stop = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) - hbox.Add(self.stop) - self.stopscale = wx.ComboBox(self, -1, value = 'Volts or Amperes', choices=['mV or mA', 'uV or uA', 'nV or nA', 'pV or pA'], size=(160, -1), style=wx.CB_DROPDOWN) - hbox.Add(self.stopscale) - grid1.Add(hbox) - - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.cb = wx.CheckBox(self, -1, 'Operating Point analysis', (10, 10)) - hbox.Add(self.cb) - grid1.Add(wx.StaticText(self,-1,''),1) - grid1.Add(hbox) - - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.button = wx.Button(self,901,"Add Simulation Data") - hbox.Add(self.button) - self.button.Bind(wx.EVT_BUTTON, self.enter_simulation) - grid1.Add(wx.StaticText(self,-1,''),1) - grid1.Add(hbox) - self.SetSizer(grid1) - self.Centre() - self.Show(True) - - def enter_simulation(self,e): - txtctrl = self.GetParent().GetParent().control - previous_data = txtctrl.GetValue() - start = str(self.start.GetValue()) +convertintoScientificForm(str(self.startscale.GetValue())) - stop = str(self.stop.GetValue()) +convertintoScientificForm(str(self.stopscale.GetValue())) - step = str(self.step.GetValue()) +convertintoScientificForm(str(self.stepscale.GetValue())) - source = str(self.source.GetValue()) - if self.cb.GetValue(): - appendline = ".op" - else: - appendline = ".dc " + " " + str(source)+" "+ str(start) + " " + str(stop) + " " + str(step) + "\n" - txtctrl.AppendText(appendline) - -class PageTwo(wx.Panel): - def __init__(self, parent): - wx.Panel.__init__(self, parent) - sizer = wx.StaticBoxSizer(wx.StaticBox(self, -1, 'Scale'), orient=wx.HORIZONTAL) - self.lin = wx.RadioButton(self, -1, 'Lin') - self.dec = wx.RadioButton(self, -1, 'Dec') - self.octal = wx.RadioButton(self, -1, 'Oct') - sizer.Add(self.lin) - sizer.Add(self.dec) - sizer.Add(self.octal) - grid1 = wx.GridSizer(5, 2) - grid1.Add(sizer,1) - grid1.Add(wx.StaticText(self,-1,'')) - grid1.Add(wx.StaticText(self,-1,'Start Frequency'),1) - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.start = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) - hbox.Add(self.start) - self.startscale = wx.ComboBox(self, -1, value = 'Hz', choices=['THz', 'GHz', 'Meg', 'KHz', 'Hz'], size=(60, -1), style=wx.CB_DROPDOWN) - hbox.Add(self.startscale) - grid1.Add(hbox) - grid1.Add(wx.StaticText(self,-1,'Stop Frequency'),1) - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.stop = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) - hbox.Add(self.stop) - self.stopscale = wx.ComboBox(self, -1, value = 'Hz', choices=['THz', 'GHz', 'Meg', 'KHz', 'Hz'], size=(60, -1), style=wx.CB_DROPDOWN) - hbox.Add(self.stopscale) - grid1.Add(hbox) - - grid1.Add(wx.StaticText(self,-1,'Number of points'),1) - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.datapoints = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) - hbox.Add(self.datapoints) - grid1.Add(hbox) - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.button = wx.Button(self,901,"Add Simulation Data") - hbox.Add(self.button) - self.button.Bind(wx.EVT_BUTTON, self.enter_simulation) - grid1.Add(wx.StaticText(self,-1,''),1) - grid1.Add(hbox) - self.SetSizer(grid1) - self.Centre() - self.Show(True) - def OnButton(self,e): - print self.lin.GetValue() - print self.GetParent().GetParent().control.GetValue() - def enter_simulation(self,e): - txtctrl = self.GetParent().GetParent().control - if self.lin.GetValue(): - ac_scale="lin" - elif self.dec.GetValue(): - ac_scale="dec" - elif self.octal.GetValue(): - ac_scale = "octal" - previous_data = txtctrl.GetValue() - #print previous_data - data_real = re.sub(r'.end.*',"",previous_data) - txtctrl.SetValue(data_real) - number_of_data_points = str(self.datapoints.GetValue()) - start_frequency = str(self.start.GetValue())+ str(self.startscale.GetValue()) - stop_frequency = str(self.stop.GetValue())+ str(self.stopscale.GetValue()) - appendline_ac = ".ac " + str(ac_scale) + " " + str(number_of_data_points)+" " + str(start_frequency) + " " + str(stop_frequency) + "\n" - #appendline_end = ".end\n" - #appendline_control=".control\n" + "run\n" + ".endc\n" - #with open(filename,"a") as myfile: - txtctrl.AppendText("\n") - txtctrl.AppendText(appendline_ac) - #txtctrl.AppendText("\n\n") - #txtctrl.AppendText(appendline_end) - #txtctrl.AppendText(appendline_control) - - -class PageThree(wx.Panel): - def __init__(self, parent): - wx.Panel.__init__(self, parent) - - grid1 = wx.GridSizer(5, 2) - grid1.Add(wx.StaticText(self,-1,'Start Time'),1) - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.start = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) - hbox.Add(self.start) - self.startscale = wx.ComboBox(self, -1, value = 'Sec', choices=['ms', 'us', 'ns', 'ps'], size=(60, -1), style=wx.CB_DROPDOWN) - hbox.Add(self.startscale) - - grid1.Add(hbox) - grid1.Add(wx.StaticText(self,-1,'Step Time'),1) - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.step = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) - hbox.Add(self.step) - self.stepscale = wx.ComboBox(self, -1, value = 'sec', choices=['ms', 'us', 'ns', 'ps'], size=(60, -1), style=wx.CB_DROPDOWN) - hbox.Add(self.stepscale) - - grid1.Add(hbox) - grid1.Add(wx.StaticText(self,-1,'Stop Time'),1) - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.stop = wx.SpinCtrl(self, -1, '', (150, 75), (60, -1)) - hbox.Add(self.stop) - self.stopscale = wx.ComboBox(self, -1, value = 'sec', choices=['ms', 'us', 'ns', 'ps'], size=(60, -1), style=wx.CB_DROPDOWN) - hbox.Add(self.stopscale) - grid1.Add(hbox) - - hbox = wx.BoxSizer(wx.HORIZONTAL) - self.button = wx.Button(self,901,"Add Simulation Data") - hbox.Add(self.button) - self.button.Bind(wx.EVT_BUTTON, self.enter_simulation) - grid1.Add(wx.StaticText(self,-1,''),1) - grid1.Add(hbox) - self.SetSizer(grid1) - self.Centre() - self.Show(True) - - def enter_simulation(self,e): - txtctrl = self.GetParent().GetParent().control - - previous_data = txtctrl.GetValue() - #print previous_data -# data_real = re.sub(r'.end.*',"",previous_data) -# txtctrl.SetValue(data_real) - start_time = str(self.start.GetValue()) +convertintoScientificForm(str(self.startscale.GetValue())) - stop_time = str(self.stop.GetValue()) +convertintoScientificForm(str(self.stopscale.GetValue())) - step_time = str(self.step.GetValue()) +convertintoScientificForm(str(self.stepscale.GetValue())) - appendline_trans = ".tran " + " " + str(step_time) + " " + str(stop_time) + " " + str(start_time) + "\n" -# appendline_end = ".end\n" -# appendline_control=".control\n" + "run\n" + ".endc\n" - #with open(filename,"a") as myfile: -# txtctrl.AppendText("\n") - txtctrl.AppendText(appendline_trans) -# txtctrl.AppendText("\n\n") -# txtctrl.AppendText(appendline_end) -# txtctrl.AppendText(appendline_control) - - -class PageFour(wx.Panel): - def __init__(self, parent): - wx.Panel.__init__(self, parent) - t = wx.StaticText(self, -1, "Fourier", (60,60)) - - -class PageFive(wx.Panel): - def __init__(self, parent): - wx.Panel.__init__(self, parent) - t = wx.StaticText(self, -1, "Pole Zero", (60,60)) - - -class PageSix(wx.Panel): - def __init__(self, parent): - wx.Panel.__init__(self, parent) - t = wx.StaticText(self, -1, "Transfer Function", (60,60)) -class MainFrame(wx.Frame): - def __init__(self):#self,parent,wx.ID_ANY, title - wx.Frame.__init__(self,None, wx.ID_ANY, title="kicad ngspice") - self.CreateStatusBar(style=0) - self.control = wx.TextCtrl(self, 1, style=wx.TE_MULTILINE) - filemenu= wx.Menu() - # use ID_ for future easy reference - much better that "48", "404" etc - # The & character indicates the short cut key - filemenu.Append(ID_OPEN, "&Open"," Open a file to edit") - filemenu.AppendSeparator() - filemenu.Append(ID_SAVE, "&Save"," Save file") - filemenu.AppendSeparator() - filemenu.Append(ID_ABOUT, "&About"," Information about this program") - filemenu.AppendSeparator() - filemenu.Append(ID_EXIT,"E&xit"," Terminate the program") - - # Creating the menubar. - menuBar = wx.MenuBar() - menuBar.Append(filemenu,"&File") # Adding the "filemenu" to the MenuBar - self.SetMenuBar(menuBar) # Adding the MenuBar to the Frame content. - # Note - previous line stores the whole of the menu into the current object - - # Define the code to be run when a menu option is selected - wx.EVT_MENU(self, ID_ABOUT, self.OnAbout) - wx.EVT_MENU(self, ID_EXIT, self.OnExit) - wx.EVT_MENU(self, ID_OPEN, self.OnOpen) - wx.EVT_MENU(self, ID_SAVE, self.OnSave); # just "pass" in our demo - - self.aboutme = wx.MessageDialog( self, " Converter for kicad \n" - " in wxPython","Beta mode", wx.OK) - self.doiexit = wx.MessageDialog( self, " Exit - R U Sure? \n", - "GOING away ...", wx.YES_NO) - - # dirname is an APPLICATION variable that we're choosing to store - # in with the frame - it's the parent directory for any file we - # choose to edit in this frame - self.dirname = os.getcwd() - - #self.sizer2 = wx.BoxSizer(wx.HORIZONTAL) - #self.sizer=wx.BoxSizer(wx.VERTICAL) - #self.sizer.Add(self.control,1,wx.EXPAND) - #self.sizer.Add(self.sizer2,0,wx.EXPAND) - #self.SetSizer(self.sizer) - - # Here we create a panel and a notebook on the panel - p = wx.Panel(self) - nb = wx.Notebook(self) - - # create the page windows as children of the notebook - page1 = PageOne(nb) - page2 = PageTwo(nb) - page3 = PageThree(nb) - page4 = PageFour(nb) - page5 = PageFive(nb) - page6 = PageSix(nb) - - # add the pages to the notebook with the label to show on the tab - nb.AddPage(page1, "DC") - nb.AddPage(page2, "AC") - nb.AddPage(page3, "Transient") - nb.AddPage(page4, "Fourier") - nb.AddPage(page5, "Pole Zero") - nb.AddPage(page6, "Transfer Function") - - # finally, put the notebook in a sizer for the panel to manage - # the layout - sizer = wx.BoxSizer(wx.VERTICAL) - sizer.Add(nb, 1, wx.EXPAND) - sizer.Add(self.control,1,wx.EXPAND) - self.SetSizer(sizer) - - #wx.Frame.__init__(self,parent,wx.ID_ANY, title) - - # Add a text editor and a status bar - # Each of these is within the current instance - # so that we can refer to them later. - #self.SetAutoLayout(1) - #self.sizer.Fit(self) - - # Show it !!! - #self.Show(1) - self.Maximize() - - - def OnAbout(self,e): - # A modal show will lock out the other windows until it has - # been dealt with. Very useful in some programming tasks to - # ensure that things happen in an order that the programmer - # expects, but can be very frustrating to the user if it is - # used to excess! - self.aboutme.ShowModal() # Shows it - def OnExit(self,e): - # A modal with an "are you sure" check - we don't want to exit - # unless the user confirms the selection in this case ;-) - igot = self.doiexit.ShowModal() # Shows it - if igot == wx.ID_YES: - self.Close(True) # Closes out this simple application - - def OnOpen(self,e): - # In this case, the dialog is created within the method because - # the directory name, etc, may be changed during the running of the - # application. In theory, you could create one earlier, store it in - # your frame object and change it when it was called to reflect - # current parameters / values - dlg = wx.FileDialog(self, "Choose a file", self.dirname, "", "*.*", wx.OPEN) - if dlg.ShowModal() == wx.ID_OK: - self.filename=dlg.GetFilename() - self.dirname=dlg.GetDirectory() - - # Open the file, read the contents and set them into - # the text edit window - filehandle=open(os.path.join(self.dirname, self.filename),'r') - self.control.SetValue(filehandle.read()) - filehandle.close() - - # Report on name of latest file read - self.SetTitle("Editing ... "+self.filename) - # Later - could be enhanced to include a "changed" flag whenever - # the text is actually changed, could also be altered on "save" ... - dlg.Destroy() - - def OnSave(self,e): - # Save away the edited text - # Open the file, do an RU sure check for an overwrite! - dlg = wx.FileDialog(self, "Choose a file", self.dirname, "analysis", "*.*", \ - wx.SAVE | wx.OVERWRITE_PROMPT) - if dlg.ShowModal() == wx.ID_OK: - # Grab the content to be saved - itcontains = self.control.GetValue() - - # Open the file for write, write, close - self.filename=dlg.GetFilename() - self.dirname=dlg.GetDirectory() - filehandle=open(os.path.join(self.dirname, self.filename),'w') - filehandle.write(itcontains) - filehandle.close() - # Get rid of the dialog to keep things tidy - dlg.Destroy() - - - - -if __name__ == "__main__": - app = wx.App() - - MainFrame().Show(1) - #MainFrame().Maximize() - #MainFrame().Layout() - app.MainLoop() diff --git a/OSCAD/copyProject.sh b/OSCAD/copyProject.sh deleted file mode 100644 index f392a6e..0000000 --- a/OSCAD/copyProject.sh +++ /dev/null @@ -1,14 +0,0 @@ -sourceProject=IC555AstableMultivibrator -targetProject=frequencyDivider -cp -r $sourceProject $targetProject -cd $targetProject -mv $sourceProject.bak $targetProject.bak -mv $sourceProject-cache.bak $targetProject-cache.bak -mv $sourceProject-cache.lib $targetProject-cache.lib -mv $sourceProject.cir $targetProject.cir -mv $sourceProject.cir.ckt $targetProject.cir.ckt -mv $sourceProject.cir.out $targetProject.cir.out -mv $sourceProject.pro $targetProject.pro -mv $sourceProject.proj $targetProject.proj -mv $sourceProject.sch $targetProject.sch - diff --git a/OSCAD/forntEnd/my_oscad.py b/OSCAD/forntEnd/my_oscad.py deleted file mode 100755 index b83dd41..0000000 --- a/OSCAD/forntEnd/my_oscad.py +++ /dev/null @@ -1,301 +0,0 @@ -from setPath import OSCAD_HOME -from Tkinter import * -import thread -import ttk -import template -import tkMessageBox -import os.path -import os -import toolTip -import selectOption -from string import maketrans -from PIL import Image, ImageTk -import tkFileDialog -import os -import Image -import ImageTk - -def new_Project(e=None): - text.insert(END,"Select the directory to save the project\n") - directory=tkFileDialog.askdirectory() - if directory: - try: - os.chdir(directory) - text.insert(END, "Changing directory to "+directory+"\n\n") - text.yview(END) - except OSError, msg: - tkMessageBox.showerror("Change Directory Failed",msg) - else: - tkMessageBox.showwarning("Bad input","Directory is not specified, please try again") - text.insert(END, "In Main window:\n") - text.insert(END, "Please select the proper option from File Menu\n") - text.yview(END) - text.insert(END, "Please enter a project Name\n") - text.yview(END) -# Read project information (name) - project= newProject.ProjectInfo(root,text) -# Create project files - if project.status: - projectParam = newProject.ProjectParam(root,text,project.projectName) - -# Open an existing model -def open_Project(e=None): -# Read project information (name) - text.insert(END, "Please enter the project Name\n") - text.yview(END) - project= openProject.ProjectInfo(root,text) -# Open model file - if project.status: - projectParam = newProject.ProjectParam(root,text,project.projectName) - text.insert(END, "In Main window:\n") - text.insert(END, "Please select the proper option from File Menu\n") - -# Change the current directory to new directory -def changeDirectory(event=None): - folderName=tkFileDialog.askdirectory() - if folderName: - try: - os.chdir(folderName) - text.insert(END, "Changing directory to "+folderName+"\n\n") - text.yview(END) - open_Project() - except OSError, msg: - tkMessageBox.showerror("Change Directory Failed",msg) - else: - tkMessageBox.showwarning("Bad input","Directory is not specified, please try again") - text.insert(END, "In Main window:\n") - text.insert(END, "Please select the proper option from File Menu\n") - text.yview(END) - -def exit_Project(e=None): - if tkMessageBox.askokcancel("QUIT","Do you really wish to quit?"): - text.insert(END, "Bye Bye......\n") - root.destroy() - -# Display help content -def help_Project(e=None): - pass - -# Display help content -def about_Project(): - tkMessageBox.showinfo("About Editor","Created by Yogesh Dilip Save") - -def createButtonForCommand(frameName,commandName,imagePath,textlabel): - # Open images - im = Image.open(imagePath) - photo = ImageTk.PhotoImage(im) - - # Create button and set label for tools - w = Button(frameName, image=photo, width=20, height=14, command=commandName, default=ACTIVE) - w.image=photo - w.pack(side=TOP, padx=1, pady=1) - toolTip.createToolTip(w,textlabel) - -def call_system(command): - os.system(command) - -def openSchematic(e=None): - text.insert(END, " Opening schematic editor .........\n") - text.yview(END) - # Call all pending idle tasks, without processing any other events. - #update_idletasks() - command="eeschema "+self.projectName+".sch " - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - text.insert(END, "Select a tool from tool menu\n") - text.yview(END) - -def openFootprint(e=None): - text.insert(END, " Opening footprint editor .........\n") - text.yview(END) - # Call all pending idle tasks, without processing any other events. - update_idletasks() - command="cvpcb "+self.projectName+".net " - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - text.insert(END, "Select a tool from tool menu\n") - text.yview(END) - -def openLayout(e=None): - text.insert(END, " Opening layout editor .........\n") - text.yview(END) - # Call all pending idle tasks, without processing any other events. - update_idletasks() - command="pcbnew "+self.projectName+".net " - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - text.insert(END, "Select a tool from tool menu\n") - text.yview(END) - -def openNetConverter(e=None): - text.insert(END, " Running netlist converter .........\n") - text.yview(END) - # Call all pending idle tasks, without processing any other events. - update_idletasks() - command="xterm -e \""+self.OSCAD_HOME+"/kicadtoNgspice/KicadtoNgspice.py "+self.projectName+".cir 1\"" - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - text.insert(END, "Select a tool from tool menu\n") - text.yview(END) - -def openAnalysisInserter(e=None): - text.insert(END, " Opening analysis inserter .........\n") - text.yview(END) - # Call all pending idle tasks, without processing any other events. - update_idletasks() - command=self.OSCAD_HOME+"/analysisInserter/convertgui.py" - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - text.insert(END, "Select a tool from tool menu\n") - text.yview(END) - -def openModelBuilder(e=None): - text.insert(END, " Opening model editor .........\n") - text.yview(END) - # Call all pending idle tasks, without processing any other events. - update_idletasks() - command=self.OSCAD_HOME+"/modelEditor/modelEditor.py " +self.projectName+".cir " - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - text.insert(END, "Select a tool from tool menu\n") - text.yview(END) - -def openSubcircuitBuilder(e=None): - text.insert(END, " Opening Sub-circuit editor ................\n") - text.yview(END) - # Call all pending idle tasks, without processing any other events. - update_idletasks() - command=self.OSCAD_HOME+"/subcktEditor/subcktEditor.py " +self.projectName+".cir " - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - text.insert(END, "Select a tool from tool menu\n") - text.yview(END) - -def openNgspice(e=None): - text.insert(END, " Running ngspice circuit simulator .........\n") - text.yview(END) - # Call all pending idle tasks, without processing any other events. - update_idletasks() - command="xterm -e \"ngspice "+self.projectName+".cir.out \"" - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - text.insert(END, "Select a tool from tool menu\n") - text.yview(END) - -def openSMCSim(e=None): - text.insert(END, " Running scilab based circuit simulator .........\n") - text.yview(END) - # Call all pending idle tasks, without processing any other events. - update_idletasks() - Option=selectOption.SelectOption(self,self.text,"LPCSim") - command=self.OSCAD_HOME+"/bin/scilab54 -f " +self.OSCAD_HOME+"/LPCSim/LPCSim/Main.sci -args "+self.projectName+".cir.ckt " - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - text.insert(END, "Select a tool from tool menu\n") - text.yview(END) - - -# Create and configure a graphical window -root = Tk() -root.title("OSCAD for Electronics and Electrical Engineers") - -# make it cover the entire screen -w, h = root.winfo_screenwidth(), root.winfo_screenheight() -root.geometry("%dx%d" % (0.65*w, 0.65*h)) -root.focus_set() - -# Create and configure a menu -menu = Menu(root) -root.config(menu=menu) - -# Create File menu -filemenu= Menu(menu) -menu.add_cascade(label="File", menu=filemenu) -filemenu.add_command(label="New F2", command=new_Project) -filemenu.add_command(label="Open F3", command=changeDirectory) -filemenu.add_separator() -filemenu.add_command(label="Exit F4", command=exit_Project) - -# Create help menu -helpmenu=Menu(menu) -menu.add_cascade(label="Help", menu=helpmenu) -helpmenu.add_command(label="Help F1",command=help_Project) -helpmenu.add_command(label="About...",command=about_Project) - -# Protocol for deletion of main window -root.protocol("WM_DELETE_WINDOW",exit_Project) - -# Create shortcut keys -root.bind("", new_Project) -root.bind("", open_Project) -root.bind("", exit_Project) -root.bind("", help_Project) -root.bind("", changeDirectory) - -mainWindow = LabelFrame(root, bd=4, relief=SUNKEN,text="Main Window", bg='lightblue') -mainWindow.pack(side=TOP,fill="both", padx=5, pady=5,expand="Y") -mainWindow.place(relheight=0.85, relwidth=0.99, rely=0.0) - -c = Canvas(mainWindow, bg='white',width=745, height=320) -c.pack() -im = Image.open(OSCAD_HOME+"/images/OSCADlogo.jpeg") -tkim = ImageTk.PhotoImage(im) -c.create_image(375, 150, image=tkim) - -buttonWindow = Frame(root, bd=4, relief=SUNKEN) -buttonWindow.pack(side=RIGHT,fill="both", padx=2, pady=2,expand="Y") -buttonWindow.place(relheight=0.6, relwidth=0.06, rely=0.04, relx=0.01) - -createButtonForCommand(buttonWindow,openSchematic,OSCAD_HOME+"/images/seLogo.jpg","Schematic Editor") -createButtonForCommand(buttonWindow,openFootprint,OSCAD_HOME+"/images/feLogo.jpg","Footprint Editor") -createButtonForCommand(buttonWindow,openLayout,OSCAD_HOME+"/images/leLogo.jpg","Layout Editor") -createButtonForCommand(buttonWindow,openAnalysisInserter,OSCAD_HOME+"/images/anLogo.jpg","Analysis Insertor") -createButtonForCommand(buttonWindow,openModelBuilder,OSCAD_HOME+"/images/mbLogo.jpg","Model builder") -createButtonForCommand(buttonWindow,openSubcircuitBuilder,OSCAD_HOME+"/images/sbLogo.jpg","Subcircuit builder") -createButtonForCommand(buttonWindow,openNetConverter,OSCAD_HOME+"/images/knLogo.jpg","NetList Converter") -createButtonForCommand(buttonWindow,openNgspice,OSCAD_HOME+"/images/ngLogo.jpg","Ngspice") -createButtonForCommand(buttonWindow,openSMCSim,OSCAD_HOME+"/images/slLogo.jpg","SMCSim") - -reportWindow = LabelFrame(root, bd=4, relief=SUNKEN,text="Report Window") -reportWindow.pack(side=BOTTOM,fill="both", padx=5, pady=5,expand="Y") -reportWindow.place(relheight=0.35, relwidth=0.99, rely=0.65) - -text = Text(reportWindow) -text.insert(INSERT, "Welcome.....\n") -text.insert(END, "First select project working directory using File Menu\n") -text.insert(END, "Then select the proper option in File Menu\n") -text.focus_set() -text.pack() -text.place(relheight=0.98, relwidth=0.99, rely=0.02) -text.config(borderwidth=5) - -scrollY = Scrollbar(reportWindow,orient=VERTICAL,command=text.yview) -scrollY.pack(fill=Y) -scrollY.place(relheight=0.98,relwidth=0.01, rely=0.02, relx=0.99) -text.config(yscrollcommand=scrollY.set) -scrollY.set(0,0.5) - - -def execute(event): - print "yogesh" - -text.bind("",execute) -mainloop() diff --git a/OSCAD/forntEnd/newProject.py b/OSCAD/forntEnd/newProject.py deleted file mode 100755 index f4987f1..0000000 --- a/OSCAD/forntEnd/newProject.py +++ /dev/null @@ -1,362 +0,0 @@ -#!/usr/bin/python -# newProject.py is a python script to create a new project. It is developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - - -from setPath import OSCAD_HOME -from Tkinter import * -import thread -import ttk -import sys -import subprocess, time -import template -import tkMessageBox -import os.path -import os -import toolTip -import selectOption -from string import maketrans -from PIL import Image, ImageTk - -class ProjectInfo(template.MyTemplate): - """ Class for accept model information from user """ - def body(self, master): - # Ask for project name - try: - Label(master, text="Enter Project name:").grid(row=0) - self.e1 = Entry(master) - self.e1.grid(row=0, column=1,pady=10,columnspan=2) - except: - print "error" -# Collect project information - def apply(self): - """ a method for writing project information to the file""" - self.text.insert(END, "Creating new project " + self.projectName+" ...... \n") - self.text.yview(END) - # Cerate directory for the project - try: - os.mkdir(self.projectName) - except: - tkMessageBox.showwarning("Error","Directory already exists") - self.text.insert(END, " The project directory "+self.projectName+"has been created.\n") - self.text.yview(END) - os.chdir(self.projectName) - self.text.insert(END, " Entered into the project directory "+self.projectName+"\n") - self.text.yview(END) - # Create model file for writing - try: - f = open(self.projectName+".proj","w") - except : - tkMessageBox.showwarning("Error","Project information file can not be wriiten. please check the file system permission") - return 0 - f.write("schematicFile " + self.projectName+".sch\n") - f.close() - self.text.insert(END, "Successfully Created new project " + self.projectName+". \n") - self.text.yview(END) - return 1 - -# Validate the model information - def validate(self): - # Remove trailing and leading spaces from modelName - self.projectName=self.e1.get().strip() - if len(self.projectName): - if os.path.exists(self.projectName+".proj"): - tkMessageBox.showwarning("Bad input","Project already exists, please try again") - return 0 - return 1 - else: - tkMessageBox.showwarning("Bad input","Project Name is not specified, please try again") - return 0 - -class ProjectParam(template.MyTemplate): - """Class for specifying parameter of the model""" - def __init__(self,parent,text,name): - # Collect model information - self.projectName=name - try: - self.OSCAD_HOME=OSCAD_HOME - except NameError: - try: - self.OSCAD_HOME=os.environ["OSCAD_HOME"] - except KeyError: - tkMessageBox.showerror("Error OSCAD_HOME is not set","Please set OSCAD_HOME variable in .bashrc\n\nStep to set OSCAD_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export OSCAD_HOME=\" to it.\n 3) source ~/.bashrc") - exit(0) - - # Call base class MyTemplate - template.MyTemplate.__init__(self,parent,text,name, buttonbox=False) - - def body(self, master): - w, h = master.winfo_screenwidth(), master.winfo_screenheight() - self.geometry("%dx%d" % (0.075*w, 0.6*h)) - self.resizable(0,0) - self.attributes("-topmost",True) - - # Create and configure a menu - """menu = Menu(self) - self.config(menu=menu) - - # Create File menu - toolmenu= Menu(menu) - menu.add_cascade(label="Tool", menu=toolmenu) - toolmenu.add_command(label="Schematic Editor F2", command=self.openSchematic) - toolmenu.add_separator() - toolmenu.add_command(label="Footprint Editor F3", command=self.openFootprint) - toolmenu.add_command(label="Layout Editor F4", command=self.openLayout) - toolmenu.add_separator() - toolmenu.add_command(label="Analysis Insertor F5", command=self.openAnalysisInserter) - toolmenu.add_command(label="Model builder F6", command=self.openModelBuilder) - toolmenu.add_command(label="Subcircuit builder F7", command=self.openSubcircuitBuilder) - toolmenu.add_separator() - toolmenu.add_command(label="NetList Converter F8", command=self.openNetConverter) - toolmenu.add_separator() - toolmenu.add_command(label="Ngspice F9", command=self.openNgspice) - toolmenu.add_command(label="SMCSim F10", command=self.openSMCSim) - toolmenu.add_separator() - toolmenu.add_command(label="Exit F11", command=self.exitProject) - - # Create help menu - helpmenu=Menu(menu) - menu.add_cascade(label="Help", menu=helpmenu) - helpmenu.add_command(label="Help F1",command=self.helpProject) - helpmenu.add_command(label="About...",command=self.aboutProjectManager) - - - - self.mainWindow = LabelFrame(self, bd=4, relief=SUNKEN,text="Tool Window",bg="lightblue") - self.mainWindow.pack(side=TOP,fill="both", padx=5, pady=5, expand="Y") - self.mainWindow.place(relheight=0.85, relwidth=0.99)""" - - # Set frame for command buttons - buttonWindow = Frame(self, bd=4, relief=SUNKEN) - buttonWindow.pack(side=LEFT,fill="both", padx=2, pady=2,expand="Y") - buttonWindow.place(relheight=0.95, relwidth=0.87, rely=0.02, relx=0.07) - - """buttonWindow1 = Frame(self, bd=4, relief=SUNKEN) - buttonWindow1.pack(side=TOP,fill="both", padx=2, pady=2,expand="Y") - buttonWindow1.place(relheight=0.9, relwidth=0.25, rely=0.02, relx=0.37) - - buttonWindow2 = Frame(self, bd=4, relief=SUNKEN) - buttonWindow2.pack(side=BOTTOM,fill="both", padx=2, pady=2,expand="Y") - buttonWindow2.place(relheight=0.9, relwidth=0.25, rely=0.02, relx=0.67)""" - - def createToolboxWithScilab(): - self.createButtonForCommandWithScilab(buttonWindow,self.openSchematic,self.OSCAD_HOME+"/images/se.png","Schematic Editor") - self.createButtonForCommandWithScilab(buttonWindow,self.openAnalysisInserter,self.OSCAD_HOME+"/images/an.png","Analysis Insertor") - self.createButtonForCommandWithScilab(buttonWindow,self.openNetConverter,self.OSCAD_HOME+"/images/kn.png","NetList Converter") - self.createButtonForCommandWithScilab(buttonWindow,self.openNgspice,self.OSCAD_HOME+"/images/ng.png","Ngspice") - self.createButtonForCommandWithScilab(buttonWindow,self.openFootprint,self.OSCAD_HOME+"/images/fp.png","Footprint Editor") - self.createButtonForCommandWithScilab(buttonWindow,self.openLayout,self.OSCAD_HOME+"/images/lout.png","Layout Editor") - self.createButtonForCommandWithScilab(buttonWindow,self.openSMCSim,self.OSCAD_HOME+"/images/sci.png","SMCSim") - self.createButtonForCommandWithScilab(buttonWindow,self.openModelBuilder,self.OSCAD_HOME+"/images/mb.png","Model builder") - self.createButtonForCommandWithScilab(buttonWindow,self.openSubcircuitBuilder,self.OSCAD_HOME+"/images/sub.png","Subcircuit builder") - - def createToolboxWithoutScilab(): - self.createButtonForCommandWithoutScilab(buttonWindow,self.openSchematic,self.OSCAD_HOME+"/images/se.png","Schematic Editor") - self.createButtonForCommandWithoutScilab(buttonWindow,self.openAnalysisInserter,self.OSCAD_HOME+"/images/an.png","Analysis Insertor") - self.createButtonForCommandWithoutScilab(buttonWindow,self.openNetConverter,self.OSCAD_HOME+"/images/kn.png","NetList Converter") - self.createButtonForCommandWithoutScilab(buttonWindow,self.openNgspice,self.OSCAD_HOME+"/images/ng.png","Ngspice") - self.createButtonForCommandWithoutScilab(buttonWindow,self.openFootprint,self.OSCAD_HOME+"/images/fp.png","Footprint Editor") - self.createButtonForCommandWithoutScilab(buttonWindow,self.openLayout,self.OSCAD_HOME+"/images/lout.png","Layout Editor") - self.createButtonForCommandWithoutScilab(buttonWindow,self.openModelBuilder,self.OSCAD_HOME+"/images/mb.png","Model builder") - self.createButtonForCommandWithoutScilab(buttonWindow,self.openSubcircuitBuilder,self.OSCAD_HOME+"/images/sub.png","Subcircuit builder") - - if os.path.isfile(OSCAD_HOME + "/bin/scilab54"): - createToolboxWithScilab() - else: - createToolboxWithoutScilab() - - # Protocol for deletion of main window - self.protocol("WM_DELETE_WINDOW",self.exitProject) - - # Create shortcut keys - """self.bind("", self.openSchematic) - self.bind("", self.openFootprint) - self.bind("", self.openLayout) - self.bind("", self.openAnalysisInserter) - self.bind("", self.openModelBuilder) - self.bind("", self.openSubcircuitBuilder) - self.bind("", self.openNetConverter) - self.bind("", self.openNgspice) - self.bind("",self.openSMCSim) - self.bind("",self.exitProject) - self.bind("", self.helpProject) - self.focus_set()""" - - def createButtonForCommandWithScilab(self,frameName,commandName,imagePath,textlabel): - # Open images - im = Image.open(imagePath) - photo = ImageTk.PhotoImage(im) - - # Create button and set label for tools - w = Button(frameName, image=photo, width=45, height=30, command=commandName, default=ACTIVE) - w.image=photo - w.pack(side=TOP, padx=1, pady=1) - toolTip.createToolTip(w,textlabel) - - def createButtonForCommandWithoutScilab(self,frameName,commandName,imagePath,textlabel): - # Open images - im = Image.open(imagePath) - photo = ImageTk.PhotoImage(im) - - # Create button and set label for tools - w = Button(frameName, image=photo, width=45, height=35, command=commandName, default=ACTIVE) - w.image=photo - w.pack(side=TOP, padx=1, pady=1) - toolTip.createToolTip(w,textlabel) - - def call_system(self,command): - os.system(command) - - def openSchematic(self,e=None): - self.text.insert(END, " Opening schematic editor .........\n") - self.text.yview(END) - # Call all pending idle tasks, without processing any other events. - self.update_idletasks() - command="eeschema "+self.projectName+".sch " - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - self.text.insert(END, "Select a tool from tool menu\n") - self.text.yview(END) - - def openFootprint(self,e=None): - self.text.insert(END, " Opening footprint editor .........\n") - self.text.yview(END) - # Call all pending idle tasks, without processing any other events. - self.update_idletasks() - command="cvpcb "+self.projectName+".net " - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - self.text.insert(END, "Select a tool from tool menu\n") - self.text.yview(END) - - def openLayout(self,e=None): - self.text.insert(END, " Opening layout editor .........\n") - self.text.yview(END) - # Call all pending idle tasks, without processing any other events. - self.update_idletasks() - command="pcbnew "+self.projectName+".net " - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - self.text.insert(END, "Select a tool from tool menu\n") - self.text.yview(END) - - def openNetConverter(self,e=None): - self.text.insert(END, " Running netlist converter .........\n") - self.text.yview(END) - # Call all pending idle tasks, without processing any other events. - self.update_idletasks() - command="xterm -e python "+self.OSCAD_HOME+"/kicadtoNgspice/KicadtoNgspice.py "+self.projectName+".cir 1" - #command=self.OSCAD_HOME+"/kicadtoNgspice/KicadtoNgspice.py "+self.projectName+".cir 1\"" - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - self.text.insert(END, "Select a tool from tool menu\n") - self.text.yview(END) - - def openAnalysisInserter(self,e=None): - self.text.insert(END, " Opening analysis inserter .........\n") - self.text.yview(END) - # Call all pending idle tasks, without processing any other events. - self.update_idletasks() - command=self.OSCAD_HOME+"/analysisInserter/convertgui.py" - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - self.text.insert(END, "Select a tool from tool menu\n") - self.text.yview(END) - - def openModelBuilder(self,e=None): - self.text.insert(END, " Opening model editor .........\n") - self.text.yview(END) - # Call all pending idle tasks, without processing any other events. - self.update_idletasks() - #command="xterm -e \""+self.OSCAD_HOME+"/modelEditor/modelEditor.py " +self.projectName+".cir 1\"" - command=self.OSCAD_HOME+"/modelEditor/modelEditor.py "+self.projectName+".cir 1" - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - self.text.insert(END, "Select a tool from tool menu\n") - self.text.yview(END) - - def openSubcircuitBuilder(self,e=None): - self.text.insert(END, " Opening Sub-circuit editor ................\n") - self.text.yview(END) - # Call all pending idle tasks, without processing any other events. - self.update_idletasks() - command=self.OSCAD_HOME+"/subcktEditor/subcktEditor.py " +self.projectName+".cir " - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - self.text.insert(END, "Select a tool from tool menu\n") - self.text.yview(END) - - def openNgspice(self,e=None): - self.text.insert(END, " Running ngspice circuit simulator .........\n") - self.text.yview(END) - # Call all pending idle tasks, without processing any other events. - self.update_idletasks() - command="xterm -e \"ngspice "+self.projectName+".cir.out \"" - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - self.text.insert(END, "Select a tool from tool menu\n") - self.text.yview(END) - - # opening pythonplotting: - command ="python " + self.OSCAD_HOME+"/forntEnd/pythonPlotting.py "+os.getcwd()+" "+self.projectName - - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - - - - def openSMCSim(self,e=None): - self.text.insert(END, " Running scilab based circuit simulator .........\n") - self.text.yview(END) - # Call all pending idle tasks, without processing any other events. - self.update_idletasks() - Option=selectOption.SelectOption(self,self.text,"LPCSim") - command=self.OSCAD_HOME+"/bin/scilab54 -f " +self.OSCAD_HOME+"/LPCSim/LPCSim/Main.sci -args "+self.projectName+".cir.ckt " - try: - thread.start_new_thread(self.call_system,(command,)) - except Exception,err: - print err - self.text.insert(END, "Select a tool from tool menu\n") - self.text.yview(END) - - def helpProject(self,e=None): - pass - -# Display help content - def aboutProjectManager(self,e=None): - tkMessageBox.showinfo("About Project Manager","Created by Yogesh Dilip Save") - -# Exit an Project Manager - def exitProject(self): - if tkMessageBox.askokcancel("QUIT","Do you really wish to quit?"): - self.destroy() - - def apply(self): - pass - -if __name__=='__main__': - root = Tk() - project= ProjectInfo(root) - projectParam = ProjectParam(root,project.modelName,project.modelType) - mainloop() diff --git a/OSCAD/forntEnd/openProject.py b/OSCAD/forntEnd/openProject.py deleted file mode 100755 index 6625229..0000000 --- a/OSCAD/forntEnd/openProject.py +++ /dev/null @@ -1,57 +0,0 @@ -#!/usr/bin/python -# openProject.py is a python script to open an existing project. It is developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from Tkinter import * -import template -import tkMessageBox -import os.path -from string import maketrans - -class ProjectInfo(template.MyTemplate): - """ Class for accept model information from user """ - def body(self, master): - # Ask for compoent name - Label(master, text="Enter Project name:").grid(row=0) - self.e1 = Entry(master) - self.e1.grid(row=0, column=1,pady=10,columnspan=2) - tempStr=os.getcwd() - tempStr2=tempStr.split('/') - self.e1.insert(0,tempStr2[len(tempStr2)-1]) - -# Collect project information - def apply(self): - """ a method for writing project information to the file""" - self.text.insert(END, "Successfully opened project " + self.projectName+". \n") - self.text.yview(END) - pass - -# Validate the model information - def validate(self): - # Remove trailing and leading spaces from modelName - self.projectName=self.e1.get().strip() - if len(self.projectName): - self.text.insert(END, "Opening project " + self.projectName+" ...... \n") - self.text.yview(END) - # Read project file - try: - self.text.insert(END, " Checking project information file " + self.projectName+".proj. ...... \n") - self.text.yview(END) - f = open(self.projectName+".proj","r") - except : - tkMessageBox.showwarning("Error","Project information file does not exist, Try again") - return 0 - f.close() - return 1 - else: - tkMessageBox.showwarning("Bad input","Project Name is not specified, please try again") - return 0 - -if __name__=='__main__': - root=Tk() - project= ProjectInfo(root) - mainloop() - diff --git a/OSCAD/forntEnd/oscad.py b/OSCAD/forntEnd/oscad.py deleted file mode 100755 index 5015e0c..0000000 --- a/OSCAD/forntEnd/oscad.py +++ /dev/null @@ -1,184 +0,0 @@ -#!/usr/bin/python -# oscad.py is a python script to create fornt end for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from setPath import OSCAD_HOME -from Tkinter import * -import ttk -import tkMessageBox -import tkFileDialog -import newProject -import openProject -import os -import Image -import ImageTk -import os -import sys -# T=os.popen("ls -l").read() -# text.insert(END, T) - -# Create a new model -def new_Project(e=None): - #text.insert(END,"Select the directory to save the project\n") - directory=tkFileDialog.askdirectory() - if directory: - try: - os.chdir(directory) - text.insert(END, "Changing directory to "+directory+"\n\n") - text.yview(END) - project= newProject.ProjectInfo(root,text) - except msg: - tkMessageBox.showerror("Change Directory Failed",msg) - else: - tkMessageBox.showwarning("Bad input","Directory is not specified, please try again") -# Create project files - try: - if project.status: - projectParam = newProject.ProjectParam(root,text,project.projectName) - except: - pass - -# Open an existing model -def open_Project(e=None): -# Read project information (name) - text.insert(END, "Please enter the project Name\n") - text.yview(END) - project= openProject.ProjectInfo(root,text) -# Open model file - if project.status: - projectParam = newProject.ProjectParam(root,text,project.projectName) - #text.insert(END, "In Main window:\n") - #text.insert(END, "Please select the proper option from File Menu\n") - -# Change the current directory to new directory -def changeDirectory(event=None): - folderName=tkFileDialog.askdirectory() - if folderName: - try: - os.chdir(folderName) - text.insert(END, "Changing directory to "+folderName+"\n\n") - text.yview(END) - open_Project() - except OSError, msg: - tkMessageBox.showerror("Change Directory Failed",msg) - else: - tkMessageBox.showwarning("Bad input","Directory is not specified, please try again") - -# Exit an model editor -def exit_Project(e=None): - if tkMessageBox.askokcancel("QUIT","Do you really wish to quit, this will close all OSCAD projects that are running ?"): - text.insert(END, "Good Bye !!\n") - root.destroy() - -# Display help content -def help_Project(e=None): - pass - -# Display help content -def about_Project(): - tkMessageBox.showinfo("About Oscad","Oscad is a free & open source CAD tool for\ - Electronics & Electrical Engineers.\n \ - \nDeveloped by putting together open source soft like:\neeschema(kicad), \nPCB layout editor (kicad), \nNGSpice, \nScilab.\n\ - \nDeveloped at IIT Bombay by FOSSEE team") - -# Create and configure a graphical window -root = Tk() -root.title("Oscad") -"""img = PhotoImage(file="an.jpg") -root.tk.call('wm', 'iconphoto', root._w, img)""" - -# make it cover the entire screen -w, h = root.winfo_screenwidth(), root.winfo_screenheight() -root.geometry("%dx%d" % (0.15*w, 0.25*h)) -root.focus_set() -root.resizable(0,0) - -"""mainWindow = Frame(root) - -b1 = Button(mainWindow, text="New", width=18, command=new_Project) -b1.pack() -b2 = Button(mainWindow, text="Open", width=18, command=changeDirectory) -b2.pack() -b3 = Button(mainWindow, text="Exit", width=18, command=exit_Project) -b3.pack() - -mainWindow.pack()""" - -"""c = Canvas(root, bg='lightblue') -c.pack(side=LEFT) -c.place(relheight=0.99, relwidth=0.99, rely=0.0,relx=0.2) -im = Image.open(OSCAD_HOME+"/images/logo.png") -tkim = ImageTk.PhotoImage(im) -c.create_image(75, 75, image=tkim)""" - -img = ImageTk.PhotoImage(Image.open(OSCAD_HOME+"/images/logo.png")) -panel = Label(root, image = img) -panel.place(relheight=0.8,relwidth=0.8,rely=0.0,relx=0.1) -panel.pack() - -# Create and configure a menu -menu = Menu(root) -root.config(menu=menu) - -# Create File menu -filemenu= Menu(menu) -menu.add_cascade(label="Project", menu=filemenu) -filemenu.add_command(label="New F2", command=new_Project) -filemenu.add_command(label="Open F3", command=changeDirectory) -filemenu.add_separator() -filemenu.add_command(label="Exit F4", command=exit_Project) - -# Create help menu -helpmenu=Menu(menu) -menu.add_cascade(label="Help", menu=helpmenu) -helpmenu.add_command(label="Help F1",command=help_Project) -helpmenu.add_command(label="About...",command=about_Project) - -# Protocol for deletion of main window - - -# Create shortcut keys -root.bind("", new_Project) -root.bind("", changeDirectory) -root.bind("", exit_Project) -root.bind("", help_Project) - -"""mainWindow = LabelFrame(root, bd=4, relief=SUNKEN,text="Main Window", bg='lightblue') -mainWindow.pack(side=TOP,fill="both", padx=5, pady=5,expand="Y") -mainWindow.place(relheight=0.85, relwidth=0.99, rely=0.0) - -c = Canvas(mainWindow, bg='white',width=750, height=325) -c.pack() -im = Image.open(OSCAD_HOME+"/images/OSCADlogo.jpeg") -tkim = ImageTk.PhotoImage(im) -c.create_image(375, 150, image=tkim)""" - -reportWindow = LabelFrame(root, bd=4, relief=SUNKEN,text="Report Window") -#reportWindow.pack(side=BOTTOM,fill="both", padx=5, pady=5,expand="Y") -#reportWindow.place(relheight=0.52, relwidth=0.98, rely=0.47) - -text = Text(reportWindow) -"""text.insert(INSERT, "Welcome !!\n") -text.insert(END, "New: Create a New Project\n") -text.insert(END, "Open: Open an Exising Project\n") -text.focus_set() -text.pack() -text.place(relheight=0.99, relwidth=0.99) -text.config(borderwidth=5) - -scrollY = Scrollbar(reportWindow,orient=VERTICAL,command=text.yview) -scrollY.pack(fill=Y) -scrollY.place(relheight=0.98,relwidth=0.01, rely=0.02, relx=0.99) -text.config(yscrollcommand=scrollY.set) -scrollY.set(0,0.5)""" - -root.protocol("WM_DELETE_WINDOW",exit_Project) - -def execute(event): - print "yogesh" - -#text.bind("",execute) -mainloop() diff --git a/OSCAD/forntEnd/pythonPlotting.py b/OSCAD/forntEnd/pythonPlotting.py deleted file mode 100755 index 3564aab..0000000 --- a/OSCAD/forntEnd/pythonPlotting.py +++ /dev/null @@ -1,696 +0,0 @@ -from __future__ import division # Used for decimal division eg 2/3=0.66 and not '0' 6/2=3.0 and 6//2=3 -import sys, os -from PyQt4.QtCore import * -from PyQt4.QtGui import * -from PyQt4 import QtGui, uic -from PyQt4 import QtCore -from decimal import * -import matplotlib -from matplotlib.backends.backend_qt4agg import FigureCanvasQTAgg as FigureCanvas -from matplotlib.backends.backend_qt4agg import NavigationToolbar2QTAgg as NavigationToolbar -from matplotlib.figure import Figure -import tkMessageBox - - -class File_data: - def __init__(self,parent=None): - - self.data=[] #consists of all the columns of data belonging to nodes and branches - self.y=[] #stores y-axis data - self.x=[] #stores x-axis data - -#new function for finding no of points to be plotted: - - def numberFinder(self,fpath): - - with open (fpath+"/analysis") as f3: - info = f3.read() - - info = info.split(" ") - #info[0] = info[0][-3:] - #print info - - with open (fpath+"/plot_data_v.txt") as f2: - ilines = f2.read() - - p = l = vnumber = inumber = 0 - ilines = ilines.split("\n") - - for i in ilines[3:]: - if "V(" in i or "x1" in i or "u3" in i: #it has possible names of voltage nodes in ngspice - vnumber+=1 - #print "vno:",vnumber - - # for finding no of branches: - - with open (fpath+"/plot_data_i.txt") as f2: - current = f2.read() - - - current = current.split("\n") - - for i in current[3:]: - if "#branch" in i: - inumber+=1 - #print "current no:",inumber - - dec = 0 - - # For AC: - if info[0][-3:]==".ac": - - if "dec" in info: - dec = 1 - - for i in ilines[3:]: - p+=1 #'p' gives no. of lines of data for each node/branch - if "Index" in i: - l+=1 # 'l' gives the no of partitions for a single voltage node - #print "l:",l - if "AC" in i: #DC for dc files and AC for ac ones - break - analysis_type = 0 - - elif ".tran" in info: - analysis_type = 1 - for i in ilines[3:]: - p+=1 - if "Index" in i: - l+=1 # 'l' gives the no of partitions for a single voltage node - #print "l:",l - if "Transient" in i: #DC for dc files and AC for ac ones - break - - - # For DC: - else: - for i in ilines[3:]: - p+=1 - if "Index" in i: - l+=1 # 'l' gives the no of partitions for a single voltage node - #print "l:",l - if "DC" in i: #DC for dc files and AC for ac ones - break - analysis_type = 2 - - - #if ac!=1: - vnumber = vnumber//l #vnumber gives the no of voltage nodes - inumber = inumber//l #inumber gives the no of branches - #print "i'm p:",p - p=[p,vnumber,analysis_type,dec,inumber] - #print p - return p - - def openFile(self,fpath): - - # For Current: - - try: - with open (fpath+"/plot_data_i.txt") as f2: #Checking whether the files Plot_data_i.txt - I = f2.read() # and plot_data_v.txt are present or not - - I = I.split("\n") - self.butnamesi = [] - - with open (fpath+"/plot_data_v.txt") as f1: - idata = f1.read() - - except: - tkMessageBox.showinfo("Warning!!", "Click on KI->Ng button before simulation ") - exit(1) - try: - for l in I[3].split(" "): - if len(l)>0: - self.butnamesi.append(l) - self.butnamesi=self.butnamesi[2:] - len_bnamesi = len(self.butnamesi) - #print "length_new",len_bnamesi - #print self.butnamesi - except: - tkMessageBox.showinfo("Warning!!", "Error in Analysis File") - - d = self.numberFinder(fpath) - d1 = int(d[0] + 1) - #print "I'm D1:", d1 #for debugging - d2 = int(d[1]) - d3 = d[2] - d4 = d[4] - #print "I'm D4:", d4 #for debugging - dec = [d3,d[3]] - #print "No. of Nodes:", d2 - self.butnames=[] - idata=idata.split("\n") - for l in idata[3].split(" "): - if len(l)>0: - self.butnames.append(l) - self.butnames=self.butnames[2:] - len_bnames = len(self.butnames) - #print len_bnames - #print self.butnames - - ivals=[] - inum = len(idata[5].split("\t")) - inum_i = len(I[5].split("\t")) - #print inum - - full_data = [] - - # Creating list of data: - if d3 < 3 : - - for i in range(1,d2): - - for l in idata[3+i*d1].split(" "): - if len(l)>0: - self.butnames.append(l) - self.butnames.pop(len_bnames) - self.butnames.pop(len_bnames) - len_bnames = len(self.butnames) - #print "volts:",self.butnames - - for n in range(1,d4): - - for l in I[3+n*d1].split(" "): - if len(l)>0: - self.butnamesi.append(l) - #print "names:",self.butnamesi - self.butnamesi.pop(len_bnamesi) - self.butnamesi.pop(len_bnamesi) - len_bnamesi = len(self.butnamesi) - #print "current",self.butnamesi - - p=0 - k = 0 - m=0 - - for i in I[5:d1-1]: - - #print "hello:" - - if len(i.split("\t"))==inum_i: - j2=i.split("\t") - #print j2 - j2.pop(0) - j2.pop(0) - j2.pop() - if d3 == 0: #not in trans - j2.pop() - #print j2 - - for l in range(1,d4): - j3 = I[5+l*d1+k].split("\t") - j3.pop(0) - j3.pop(0) - if d3==0: - j3.pop() #not required for dc - j3.pop() - j2 = j2 + j3 - #print j2 - full_data.append(j2) - k+=1 - #print full_data - - - for i in idata[5:d1-1]: - - if len(i.split("\t"))==inum: - j=i.split("\t") - j.pop() - if d3==0: - j.pop() - - for l in range(1,d2): - j1 = idata[5+l*d1+p].split("\t") - j1.pop(0) - j1.pop(0) - if d3==0: - j1.pop() #not required for dc - if self.butnames[len(self.butnames)-1] == 'v-sweep': - self.butnames.pop() - j1.pop() - #if l==d2-1 and d3==2: - #j1.pop() - j1.pop() - j = j + j1 - #self.volts_length = len(j)-2 - j = j + full_data[m] - #print j - m+=1 - #print j[:20] - j = "\t".join(j[1:]) - j = j.replace(",","") - ivals.append(j) - - p+=1 - - self.data = ivals - #print self.data - - #print "volts:",self.butnames - self.volts_length = len(self.butnames) - #print "volts_length:",self.volts_length - self.butnames = self.butnames + self.butnamesi - #print "new butnames:",self.butnames - - #print self.data - return dec - - - def numVals(self): - a = self.volts_length # No of voltage nodes - b = len(self.data[0].split("\t")) - #print "numvals:",b - return [b,a] - - def computeAxes(self): - nums = len(self.data[0].split("\t")) - #print "i'm nums:",nums - self.y=[] - var=self.data[0].split("\t") - for i in range(1,nums): - self.y.append([Decimal(var[i])]) - #print self.y - #print y,nums - for i in self.data[1:]: - temp=i.split("\t") - for j in range(1,nums): - self.y[j-1].append(Decimal(temp[j])) - #print len(self.y) - #print self.y[3] - - for i in self.data: - temp=i.split("\t") - self.x.append(Decimal(temp[0])) - - -class Window(QMainWindow): - def __init__(self,fpath,projName, parent=None): - super(Window, self).__init__(parent) - #self.setWindowTitle('AC Analysis') - self.fpath=fpath - self.projName=projName - self.createMainFrame() - self.combo = [] - self.combo1 = [] - self.combo1_rev = [] - - def createMainFrame(self): - - self.main_frame = QWidget() - self.dpi = 100 - self.fig = Figure((7.0, 7.0), dpi=self.dpi) - self.canvas = FigureCanvas(self.fig) - self.canvas.setParent(self.main_frame) - self.axes = self.fig.add_subplot(111) - self.mpl_toolbar = NavigationToolbar(self.canvas, self.main_frame) - - left_vbox = QVBoxLayout() - left_vbox.addWidget(self.mpl_toolbar) - left_vbox.addWidget(self.canvas) - - right_vbox = QVBoxLayout() - right_grid = QGridLayout() - top_grid = QGridLayout() - - self.fobj = File_data() - plot_type = self.fobj.openFile(self.fpath) - #print "hi:",plot_type - self.fobj.computeAxes() - self.chkbox=[] - self.a = self.fobj.numVals() - - ########### Generating list of colours : - self.full_colors = ['r','b','g','y','c','m','k']#,(0.4,0.5,0.2),(0.1,0.4,0.9),(0.4,0.9,0.2),(0.9,0.4,0.9)] - self.color = [] - for i in range(0,self.a[0]-1): - if i%7 == 0: - self.color.append(self.full_colors[0]) - elif (i-1)%7 == 0: - self.color.append(self.full_colors[1]) - elif (i-2)%7 == 0: - self.color.append(self.full_colors[2]) - elif (i-3)%7 == 0: - self.color.append(self.full_colors[3]) - elif (i-4)%7 == 0: - self.color.append(self.full_colors[4]) - elif (i-5)%7 == 0: - self.color.append(self.full_colors[5]) - elif (i-6)%7 == 0: - self.color.append(self.full_colors[6]) - - ########### - - self.volts_length = self.a[1] - #print "I'm Volts length:",self.volts_length - self.heading1 = QLabel() - top_grid.addWidget(self.heading1,1,0) - self.heading2 = QLabel() - top_grid.addWidget(self.heading2,self.a[1]+2,0) - for i in range(0,self.a[1]):#a[0]-1 - self.chkbox.append(QCheckBox(self.fobj.butnames[i])) - self.chkbox[i].setToolTip('Tick Me!' ) - top_grid.addWidget(self.chkbox[i],i+2,0) - - for i in range(self.a[1],self.a[0]-1):#a[0]-1 - self.chkbox.append(QCheckBox(self.fobj.butnames[i])) - self.chkbox[i].setToolTip('Tick Me!' ) - top_grid.addWidget(self.chkbox[i],i+3,0) - - self.clear = QPushButton("Clear") - self.Note = QLabel() - self.Note1 = QLabel() - self.Note2 = QLabel() - - self.btn = QPushButton("Plot") - self.btn.setToolTip('Press to Plot' ) - self.text = QLineEdit() - self.funcLabel = QLabel() - self.palette1 = QPalette() - self.palette2 = QPalette() - self.btn1 = QPushButton("Plot Function") - self.btn1.setToolTip('Press to Plot the function' ) - - self.palette1.setColor(QtGui.QPalette.Foreground,QtCore.Qt.blue) - self.palette2.setColor(QtGui.QPalette.Foreground,QtCore.Qt.red) - self.Note1.setPalette(self.palette1) - self.Note2.setPalette(self.palette2) - - right_vbox.addLayout(top_grid) - right_vbox.addWidget(self.btn) - - right_grid.addWidget(self.funcLabel,1,0) - right_grid.addWidget(self.text,1,1) - right_grid.addWidget(self.btn1,2,1) - right_grid.addWidget(self.clear,2,0) - right_grid.addWidget(self.Note,3,0) - right_grid.addWidget(self.Note1,4,0) - right_grid.addWidget(self.Note2,4,1) - - right_vbox.addLayout(right_grid) - - netlist = QTextEdit() - with open (self.fpath+"/"+self.projName+'.cir.out') as f2: - fdata = f2.read() - netlist.setText(fdata) - netlist.setReadOnly(True) - - '''down_box = QHBoxLayout() - down_box.addWidget(netlist) - - left_vbox.addLayout(down_box)''' - left_vbox.addWidget(netlist) - - hbox = QHBoxLayout() - hbox.addLayout(left_vbox) - hbox.addLayout(right_vbox) - - '''finalvbox = QVBoxLayout() - finalvbox.addLayout(hbox)''' - - widget = QWidget() - widget.setLayout(hbox)#finalvbox - self.scrollArea = QScrollArea() - self.scrollArea.setWidgetResizable(True) - self.scrollArea.setWidget(widget) - - finalhbox = QHBoxLayout() - finalhbox.addWidget(self.scrollArea) - - self.main_frame.setLayout(finalhbox) - - self.showMaximized() - - self.heading1.setText("List of Nodes:") - - self.heading2.setText("List of Branches:") - - self.funcLabel.setText("Function:") - - self.Note1.setText("Examples:\ -

Addition:
Subtraction:
Multiplication:
Division:
Comparison:") - - self.Note2.setText("\n\n"+self.fobj.butnames[0]+" + "+self.fobj.butnames[1]+"\n"+self.fobj.butnames[0]+" - "+self.fobj.butnames[1]+ \ - "\n"+self.fobj.butnames[0]+" * "+self.fobj.butnames[1]+"\n"+self.fobj.butnames[0]+" / "+self.fobj.butnames[1]+ \ - "\n"+self.fobj.butnames[0]+" vs "+self.fobj.butnames[1]) - - - self.connect(self.clear,SIGNAL('clicked()'),self.pushedClear) - - self.connect(self.btn1,SIGNAL('clicked()'), self.pushedPlotFunc) - - if plot_type[0]==0: - - self.setWindowTitle('AC Analysis') - if plot_type[1]==1: - - self.connect(self.btn, SIGNAL('clicked()'), self.onPush_decade) - - else: - - self.connect(self.btn, SIGNAL('clicked()'), self.onPush_ac) - - elif plot_type[0]==1: - - self.setWindowTitle('Transient Analysis') - self.connect(self.btn, SIGNAL('clicked()'), self.onPush_trans) - - else: - - self.setWindowTitle('DC Analysis') - self.connect(self.btn, SIGNAL('clicked()'), self.onPush_dc) - - self.setCentralWidget(self.main_frame) - - - def pushedPlotFunc(self): - - self.parts = str(self.text.text()) - self.parts = self.parts.split(" ") - #print self.parts - if self.parts[len(self.parts)-1] == '': - self.parts = self.parts[0:-1] - #print self.parts - self.values = self.parts - self.comboAll = [] - self.axes.cla() - plot_type2 = self.fobj.openFile(self.fpath) - - if len(self.parts) <= 2: - self.Note.setText("Too few arguments!\nRefer syntax below!") - QMessageBox.about(self, "Warning!!", "Too Few Arguments/SYNTAX Error!\n Refer Examples") - else: - self.Note.setText("") - - a = [] - finalResult = [] - p = 0 - #print "values:",self.values - #print "parts:",self.parts - - for i in range(len(self.parts)): - #print "hello" - if i%2 == 0: - #print "I'm in:" - for j in range(len(self.fobj.butnames)): - if self.parts[i]==self.fobj.butnames[j]: - #print "I got you:",i - a.append(j) - - #print "positions",a - - if len(a) != len(self.parts)//2 + 1: - QMessageBox.about(self, "Warning!!", "One of the operands doesn't belong to the above list!!") - - for i in a: - self.comboAll.append(self.fobj.y[i]) - - #print self.comboAll - - for i in range(len(a)): - - if a[i] == len(self.fobj.butnames): - QMessageBox.about(self, "Warning!!", "One of the operands doesn't belong to the above list!!") - self.Note.setText("To Err Is Human!
One of the operands doesn't belong to the above list!!") - - if self.parts[1] == 'vs': - - if len(self.parts) > 3: - self.Note.setText("Enter two operands only!!") - QMessageBox.about(self, "Warning!!", "Recheck the expression syntax!") - - else: - self.axes.cla() - #print "plotting wait" - for i in range(len(self.fobj.y[a[0]])): - self.combo.append(self.fobj.y[a[0]][i]) - self.combo1.append(self.fobj.y[a[1]][i]) - - '''for i in reversed(self.combo1): - self.combo1_rev.append(i)''' - #print self.combo - #print "\ncombo1_rev\n",self.combo1_rev - self.axes.plot(self.combo,self.combo1,c=self.color[1],label=str(2))#_rev - if max(a) < self.volts_length: - self.axes.set_ylabel('Voltage(V)-->') - self.axes.set_xlabel('Voltage(V)-->') - else: - self.axes.set_ylabel('Current(I)-->') - self.axes.set_ylabel('Current(I)-->') - - - elif max(a) >= self.volts_length and min(a) < self.volts_length: - QMessageBox.about(self, "Warning!!", "Do not combine Voltage and Current!!") - - else: - - for j in range(len(self.comboAll[0])): - for i in range(len(self.values)): - if i%2==0: - self.values[i] = str(self.comboAll[i//2][j]) - re = " ".join(self.values[:]) - #print re - try: - finalResult.append(eval(re)) - except ArithmeticError: - QMessageBox.about(self, "Warning!!", "Dividing by zero!!") - ############################################ - if plot_type2[0]==0: - - self.setWindowTitle('AC Analysis') - if plot_type2[1]==1: - - self.axes.semilogx(self.fobj.x,finalResult,c=self.color[0],label=str(1)) - - else: - - self.axes.plot(self.fobj.x,finalResult,c=self.color[0],label=str(1)) - self.axes.set_xlabel('freq-->') - if max(a) < self.volts_length: - self.axes.set_ylabel('Voltage(V)-->') - else: - self.axes.set_ylabel('Current(I)-->') - - - elif plot_type2[0]==1: - - self.setWindowTitle('Transient Analysis') - self.axes.plot(self.fobj.x,finalResult,c=self.color[0],label=str(1)) - self.axes.set_xlabel('time-->') - if max(a) < self.volts_length: - self.axes.set_ylabel('Voltage(V)-->') - else: - self.axes.set_ylabel('Current(I)-->') - - - else: - - self.setWindowTitle('DC Analysis') - self.axes.plot(self.fobj.x,finalResult,c=self.color[0],label=str(1)) - self.axes.set_xlabel('I/P Voltage-->') - if max(a) < self.volts_length: - self.axes.set_ylabel('Voltage(V)-->') - else: - self.axes.set_ylabel('Current(I)-->') - - ########################################## - - #self.axes.plot(self.fobj.x,finalResult,c=self.color[0],label=str(1)) - - - self.axes.grid(True) - self.canvas.draw() - self.combo = [] - self.combo1 = [] - self.combo1_rev = [] - #print "succes:",self.parts - - def pushedClear(self): - - self.text.clear() - self.axes.cla() - self.canvas.draw() - QtCore.SLOT('quit()') - - def onPush_ac(self): - self.axes.cla() - boxCheck = 0 - for i,j in zip(self.chkbox,range(len(self.chkbox))): - if i.isChecked(): - boxCheck += 1 - self.axes.plot(self.fobj.x,self.fobj.y[j],c=self.color[j],label=str(j+1)) - self.axes.set_xlabel('freq-->') - if j < self.volts_length: - self.axes.set_ylabel('Voltage(V)-->') - else: - self.axes.set_ylabel('Current(I)-->') - self.axes.grid(True) - if boxCheck == 0: - QMessageBox.about(self, "Warning!!","Please select atleast one Node OR Branch") - self.canvas.draw() - - - def onPush_decade(self): - boxCheck = 0 - self.axes.cla() - - for i,j in zip(self.chkbox,range(len(self.chkbox))): - if i.isChecked(): - boxCheck += 1 - self.axes.semilogx(self.fobj.x,self.fobj.y[j],c=self.color[j],label=str(j+1)) - if j < self.volts_length: - self.axes.set_ylabel('Voltage(V)-->') - else: - self.axes.set_ylabel('Current(I)-->') - self.axes.set_xlabel('freq-->') - self.axes.grid(True) - if boxCheck == 0: - QMessageBox.about(self, "Warning!!","Please select atleast one Node OR Branch") - self.canvas.draw() - - def onPush_trans(self): - boxCheck = 0 - self.axes.cla() - for i,j in zip(self.chkbox,range(len(self.chkbox))): - if i.isChecked(): - boxCheck += 1 - #print self.fobj.y[j] - self.axes.plot(self.fobj.x,self.fobj.y[j],c=self.color[j],label=str(j+1)) - self.axes.set_xlabel('time-->') - - if j < self.volts_length: - self.axes.set_ylabel('Voltage(V)-->') - - else: - self.axes.set_ylabel('Current(I)-->') - self.axes.grid(True) - if boxCheck == 0: - QMessageBox.about(self,"Warning!!", "Please select atleast one Node OR Branch") - self.canvas.draw() - - def onPush_dc(self): - boxCheck = 0 - self.axes.cla() - for i,j in zip(self.chkbox,range(len(self.chkbox))): - if i.isChecked(): - boxCheck += 1 - self.axes.plot(self.fobj.x,self.fobj.y[j],c=self.color[j],label=str(j+1)) - self.axes.set_xlabel('Voltage Sweep(V)-->') - - if j < self.volts_length: - self.axes.set_ylabel('Voltage(V)-->') - else: - self.axes.set_ylabel('Current(I)-->') - self.axes.grid(True) - if boxCheck == 0: - QMessageBox.about(self,"Warning!!", "Please select atleast one Node OR Branch") - self.canvas.draw() - -if __name__=="__main__": - app = QtGui.QApplication(sys.argv) - fpath = sys.argv[1] - projName = sys.argv[2] - global main - main = Window(fpath,projName) - main.show() - sys.exit(app.exec_()) diff --git a/OSCAD/forntEnd/selectOption.py b/OSCAD/forntEnd/selectOption.py deleted file mode 100755 index 447179b..0000000 --- a/OSCAD/forntEnd/selectOption.py +++ /dev/null @@ -1,55 +0,0 @@ -#!/usr/bin/python -# selectOption.py is a python script to select option for Scilab based circuit simulator. It is developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from setPath import OSCAD_HOME -from Tkinter import * -import template -import tkMessageBox -import os.path -from string import maketrans - -class SelectOption(template.MyTemplate): - """ Class for accept model information from user """ - def body(self, master): - # Define default mode type and set it to symbolic - self.option = StringVar() - self.option.set("1") - - # Ask for scilab option - Label(master, text="Enter mode for scilab based circuit simulator:").grid(row=1) - Radiobutton(master, text="Normal", variable=self.option, value="0").grid(row=2,column=0,columnspan=2,sticky=W) - Radiobutton(master, text="Symbolic", variable=self.option, value="1").grid(row=3,column=0,columnspan=2,sticky=W) - Radiobutton(master, text="Matrix", variable=self.option, value="2").grid(row=4,column=0,columnspan=2,sticky=W) - -# Collect model information - def apply(self): - self.mode=self.option.get() - try: - self.OSCAD_HOME=OSCAD_HOME - except NameError: - try: - self.OSCAD_HOME=os.environ["OSCAD_HOME"] - except KeyError: - tkMessageBox.showerror("Error OSCAD_HOME is not set","Please set OSCAD_HOME variable in .bashrc\n\nStep to set OSCAD_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export OSCAD_HOME=\" to it.\n 3) source ~/.bashrc") - exit(0) - HOME=self.OSCAD_HOME+"/LPCSim/LPCSim/" - # Open file for writing option - fileName=HOME+"option" - os.system("rm -rf "+ fileName) - # Create model file for writing - try: - f = open(fileName,"w") - except : - tkMessageBox.showwarning("Error","Model file can not be wriiten. please check the file system permission") - f.write(self.mode) - f.close() - -if __name__=='__main__': - root=Tk() - model= SelectOption(root) - mainloop() - diff --git a/OSCAD/forntEnd/setPath.py b/OSCAD/forntEnd/setPath.py deleted file mode 100755 index 778e6f3..0000000 --- a/OSCAD/forntEnd/setPath.py +++ /dev/null @@ -1,2 +0,0 @@ -#!/usr/bin/python -OSCAD_HOME="/home/hardik/OSCAD" diff --git a/OSCAD/forntEnd/template.py b/OSCAD/forntEnd/template.py deleted file mode 100755 index e5f843b..0000000 --- a/OSCAD/forntEnd/template.py +++ /dev/null @@ -1,117 +0,0 @@ -#!/usr/bin/python -from Tkinter import * -import os - -class MyTemplate(Toplevel): - """Template to construct new window""" -# Define constructor - def __init__(self, parent, text=None, title=None, buttonbox=True): - # Set new window properties same as parent - Toplevel.__init__(self, parent) - - # Set report window - if text: - self.text=text - - # Create a new window on top of the parent such that don't appear in taskbar - self.transient(parent) - - # Set the title - if title: - self.title("Tools") - # Set Parent of active window - self.parent =parent - - # Create a new frame - body =Frame (self) - # Call body method - self.initial_focus = self.body(body) - # Display body - body.pack(padx=5, pady=5) - # Create buttons - if buttonbox: - self.buttonbox() - # Create status bar - self.statusBar() - # Take control of all the events - self.grab_set() - - # Take control of all the keyboard events - if not self.initial_focus: - self.initial_focus=self - - # Protocol when window is deleted. - self.protocol("WM_DELETE_WINDOW",self.cancel) - - # Position the geometry respect to main window - self.geometry("+%d+%d" % (parent.winfo_rootx()+10,parent.winfo_rooty()+22)) - self.initial_focus.focus_set() - - # Wait for widget to be destroyed - self.wait_window(self) - -# Construction of body of the window - def body(self, master): - # Create dialog body. This method should be overridden - pass - -# Add standard button box (OK, Cancel). Override if you don't want the standard buttons - def buttonbox(self): - # Construct a new frame - box = Frame(self) - # Create buttons - w = Button(box, text="OK", width=10, command=self.ok, default=ACTIVE) - w.pack(side=LEFT, padx=5, pady=5) - w = Button(box, text="Cancel", width=10, command=self.cancel) - w.pack(side=LEFT, padx=5, pady=5) - - # Bind Return and escape keys - self.bind("", self.ok) - self.bind("", self.cancel) - # Create the frame "box" - box.pack(side=BOTTOM) - -# Add standard status bar. Override if you don't want the status bar - def statusBar(self): - pass - # self.statusbar = Label(self, text="", bd=1, relief=SUNKEN, anchor=W) - # self.statusbar.pack(side=BOTTOM, fill=X) - -# Template for action taken when OK is pressed - def ok(self, event=None): - # If data is not valid then put the focus back - if not self.validate(): - self.initial_focus.focus_set() - return - # Remove the window from the screen (without destroying it) - self.withdraw() - # Call all pending idle tasks, without processing any other events. - self.update_idletasks() - # Perform required task (collection of result, inputs etc.) - self.apply() - # Take action when all task has finished - self.cancel(status=1) - -# Template for action taken when cancel pressed - def cancel(self, event=None, status=0): - # Catch the status - self.status=status - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.destroy() - -# Template for validation of data - def validate(self): - return 1 - -# Template for required action (Saving Data, results) - def apply(self): - pass - -# Test case -if __name__=='__main__': - root=Tk() - d =MyTemplate(root) - mainloop() - diff --git a/OSCAD/forntEnd/test.py b/OSCAD/forntEnd/test.py deleted file mode 100755 index 225030d..0000000 --- a/OSCAD/forntEnd/test.py +++ /dev/null @@ -1,35 +0,0 @@ -##------------------------------- -# file: test.py -# simple demonstration of the Tkinter notebook - -from Tkinter import * -from notebook import * - -a = Tk() -n = notebook(a, LEFT) - -# uses the notebook's frame -f1 = Frame(n()) -b1 = Button(f1, text="Button 1") -e1 = Entry(f1) -# pack your widgets before adding the frame -# to the notebook (but not the frame itself)! -b1.pack(fill=BOTH, expand=1) -e1.pack(fill=BOTH, expand=1) - -f2 = Frame(n()) -# this button destroys the 1st screen radiobutton -b2 = Button(f2, text='Button 2', command=lambda:x1.destroy()) -b3 = Button(f2, text='Beep 2', command=lambda:Tk.bell(a)) -b2.pack(fill=BOTH, expand=1) -b3.pack(fill=BOTH, expand=1) - -f3 = Frame(n()) - -# keeps the reference to the radiobutton (optional) -x1 = n.add_screen(f1, "Screen 1") -n.add_screen(f2, "Screen 2") -n.add_screen(f3, "dummy") - -if __name__ == "__main__": - a.mainloop() diff --git a/OSCAD/forntEnd/toolTip.py b/OSCAD/forntEnd/toolTip.py deleted file mode 100755 index 0409390..0000000 --- a/OSCAD/forntEnd/toolTip.py +++ /dev/null @@ -1,48 +0,0 @@ -#!/usr/bin/python -from Tkinter import * - -class ToolTip(object): - - def __init__(self, widget): - self.widget = widget - self.tipwindow = None - self.id = None - self.x = self.y = 0 - - def showtip(self, text): - "Display text in tooltip window" - self.text = text - if self.tipwindow or not self.text: - return - x, y, cx, cy = self.widget.bbox("insert") - x = x + self.widget.winfo_rootx() + 27 - y = y + cy + self.widget.winfo_rooty() +27 - self.tipwindow = tw = Toplevel(self.widget) - tw.wm_overrideredirect(1) - tw.wm_geometry("+%d+%d" % (x, y)) - try: - # For Mac OS - tw.tk.call("::tk::unsupported::MacWindowStyle", - "style", tw._w, - "help", "noActivates") - except TclError: - pass - label = Label(tw, text=self.text, justify=LEFT, - background="#ffffe0", relief=SOLID, borderwidth=1, - font=("tahoma", "8", "normal")) - label.pack(ipadx=1) - - def hidetip(self): - tw = self.tipwindow - self.tipwindow = None - if tw: - tw.destroy() - -def createToolTip(widget, text): - toolTip = ToolTip(widget) - def enter(event): - toolTip.showtip(text) - def leave(event): - toolTip.hidetip() - widget.bind('', enter) - widget.bind('', leave) diff --git a/OSCAD/images/OSCADlogo.jpeg b/OSCAD/images/OSCADlogo.jpeg deleted file mode 100644 index b28687e..0000000 Binary files a/OSCAD/images/OSCADlogo.jpeg and /dev/null differ diff --git a/OSCAD/images/OSCADlogo.jpg b/OSCAD/images/OSCADlogo.jpg deleted file mode 100644 index e3b5812..0000000 Binary files a/OSCAD/images/OSCADlogo.jpg and /dev/null differ diff --git a/OSCAD/images/an-mask.xbm b/OSCAD/images/an-mask.xbm deleted file mode 100644 index d817f18..0000000 --- a/OSCAD/images/an-mask.xbm +++ /dev/null @@ -1,21 +0,0 @@ -#define an_mask_width 45 -#define an_mask_height 35 -static unsigned char an_mask_bits[] = { - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f }; diff --git a/OSCAD/images/an.ico b/OSCAD/images/an.ico deleted file mode 100644 index 85125d9..0000000 Binary files a/OSCAD/images/an.ico and /dev/null differ diff --git a/OSCAD/images/an.jpg b/OSCAD/images/an.jpg deleted file mode 100644 index 82646b2..0000000 Binary files a/OSCAD/images/an.jpg and /dev/null differ diff --git a/OSCAD/images/an.png b/OSCAD/images/an.png deleted file mode 100644 index 46d62b5..0000000 Binary files a/OSCAD/images/an.png and /dev/null differ diff --git a/OSCAD/images/an.xbm b/OSCAD/images/an.xbm deleted file mode 100644 index 47229ae..0000000 --- a/OSCAD/images/an.xbm +++ /dev/null @@ -1,21 +0,0 @@ -#define an_width 45 -#define an_height 35 -static unsigned char an_bits[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x07, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x01, 0x00, 0x20, 0x00, 0x00, 0x00, 0x01, 0x00, 0x70, 0x00, 0x00, - 0x00, 0x03, 0x00, 0x30, 0x00, 0x00, 0x00, 0x04, 0x00, 0x20, 0x00, 0x00, - 0x00, 0x10, 0x00, 0x20, 0x00, 0x00, 0x00, 0x10, 0x00, 0x22, 0x04, 0x00, - 0x00, 0x08, 0x80, 0x22, 0x80, 0x00, 0x00, 0x04, 0x00, 0x22, 0x00, 0x00, - 0x00, 0x10, 0x00, 0x20, 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x00, 0x00, - 0x00, 0x10, 0x80, 0x00, 0x01, 0x00, 0x04, 0x07, 0x00, 0x00, 0x00, 0x00, - 0x20, 0x10, 0x00, 0x6d, 0x03, 0x00, 0x00, 0x00, 0x60, 0x20, 0x00, 0x00, - 0x00, 0x20, 0xd8, 0xf8, 0x18, 0x00, 0x00, 0x10, 0xf0, 0x2c, 0x40, 0x01, - 0x00, 0x04, 0xf8, 0x3c, 0x00, 0x00, 0x00, 0x08, 0xa9, 0x70, 0x00, 0x00, - 0x00, 0x10, 0x00, 0x20, 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x00, 0x00, - 0x00, 0x04, 0x00, 0x70, 0x00, 0x00, 0x00, 0x01, 0x18, 0x20, 0x00, 0x00, - 0x00, 0x01, 0x78, 0xeb, 0xb0, 0x01, 0x00, 0x01, 0x18, 0xc3, 0x33, 0x03, - 0x00, 0x01, 0x18, 0xf3, 0x33, 0x03, 0x80, 0x03, 0x79, 0xf3, 0x33, 0x03, - 0x80, 0x83, 0x38, 0x01, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x57, 0x01, 0x00, 0x00, 0x00, 0x00, 0x8a, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x30, 0x00, 0x00, 0x00 }; diff --git a/OSCAD/images/feLogo.jpg b/OSCAD/images/feLogo.jpg deleted file mode 100644 index bb7a797..0000000 Binary files a/OSCAD/images/feLogo.jpg and /dev/null differ diff --git a/OSCAD/images/fp.png b/OSCAD/images/fp.png deleted file mode 100644 index 6993967..0000000 Binary files a/OSCAD/images/fp.png and /dev/null differ diff --git a/OSCAD/images/kn.png b/OSCAD/images/kn.png deleted file mode 100644 index 36845d0..0000000 Binary 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J K = E L M N O P Q Q Q Q R R R R R R R R R R R R R q q q q q q q r r r r r r r r s s t t t t u u u u u u u v v v w w w x x x x x y y y y y z S S S S T T T T T T w U V W X Y Z ` ...+.+.@.#.#.$.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.(.& > _.1 n :.<.<.<.<.<.<.[.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.-.;.;.;.Q Q Q Q Q R R R R R R R R R R R q q q q q q r r r r r r r s s t t t u u u u u u u v v v w w w x x x x y y y y y z S S S S T T T T T }.).).).|.{.{.{.{.{.1.2.,.3.4.1 6 F 5.6.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.e 8.3 9.0.a.b.b.b.b.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.<.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.;.;.Q Q Q Q Q R R R R R R R R R R q q q q q q r r r r r r r s s t t t u u u u u u v v v w w w x x x x x y y y y z S S S S T T }.c.c.).~.{.{.{.{.{.1.d.d.2.2.2.e.e.e.e.f.< g.h.# /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i.# j.6 ( V k.k.k.k.k.k.k.k.a.a.a.a.a.a.a.a.a.b.b.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R R R q q q q q q r r r r r r s s t t t u u u u u u v v v w w w x x x x x y y y y z S S S l.c.c.c.~.{.{.{.{.{.1.d.d.d.d.d.2.2.e.e.e.e.e.e.e.,.m.n.o.& i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i p.9 ] q.A r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.a.a.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R R q q q q q r r r r r r r s s t t t u u u u u u v v v w w x x x x x y y y y z l.s.s.s.~.{.{.{.{.{.1.,.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.t.u.u.u.-.v.w.x.y.z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.B.C.M D.p f.f.f.f.f.f.f.f.f.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.a.b.b.b.b.b.b.b.b.<.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R R q q q q q r r r r r r s s t t t u u u u u u v v v w w x x x x y y y E.F.F.s.~.{.{.{.{.{.1.>.,.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.d.G.H.I.# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J.b ~ K.0.p p p p p p p p p p p p p p p p p p p p p p f.f.f.f.f.r.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.b.b.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.;.Q Q Q Q R R R R R R R R R q q q q q r r r r r r s t t t u u u u u u v v v w w x x x x E.L.L.L.~.{.{.{.{.{.1.T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.u O.P.e z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.# ; ] Q.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.p p p p p p p p p p p p p p p p p p p p p p f.f.f.f.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.b.<.<.<.<.[.[.[.[.-.-.-.-.-.-.-.-.;.Q Q Q Q R R R R R R R R q q q q q r r r r r r s t t t u u u u u u v v w w w x S.T.T.L.U.{.{.{.{.{.V.T T T T T >.,.,.,.d.d.d.d.d.2.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.d.W.{ b J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.Y.Z.`. +0.0.0.0.0.0.0.0.0.0.0..+.+.+.+.+.+.+.+.+.+R.R.R.R.R.R.R.R.R.R.R.R.p p p p p p p p p p p p p p p p f.f.f.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.<.<.<.<.[.[.[.[.-.-.-.-.-.-.-.-.;.Q Q Q Q R R R R R R R R q q q q r r r r r r s t t t u u u u u u v v w ++@+T.T.U.{.{.{.{.{.V.S S S T T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.#+/ $+(.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.G 6 [ %+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+.+.+R.R.R.R.R.R.R.R.R.p p p p p p p p p p p p p f.f.f.r.r.r.r.r.r.r.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.<.<.<.<.[.[.[.-.-.-.-.-.-.-.;.;.Q Q Q R R R R R R R R q q q q r r r r r r s t t t u u u u u v &+*+@+@+U.{.{.{.{.{.V.y z S S S T T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+q : -+;+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j &.M %+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+.+R.R.R.R.R.R.p p p p p p p p p p p p f.f.f.r.r.r.r.r.r.r.k.k.k.k.k.k.a.a.a.a.b.b.b.b.b.b.<.<.<.<.[.[.[.-.-.-.-.-.-.-.;.Q Q Q Q R R R R R R R q q q q r r r r r r s t t t u u u >+*+*+*+U.{.{.{.{.{.V.y y y z S S S S T T T T >.,.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+Q `.a I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.'+)+Q.3.3.3.3.3.3.3.3.#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.R.R.p p p p p p p p p p f.f.f.r.r.r.r.r.r.k.k.k.k.k.k.k.a.a.a.b.b.b.b.b.b.<.<.<.[.[.[.[.-.-.-.-.-.-.;.;.Q Q Q R R R R R R R q q q q r r r r r r s t t t >+*+*+*+!+{.{.{.{.{.V.x x y y y y z S S S T T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+u.~+{+]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j ^+( /+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.R.p p p p p p p p p p f.f.r.r.r.r.r.r.k.k.k.k.k.k.a.a.a.b.b.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.-.-.;.Q Q Q R R R R R R R q q q q r r r r r s s (+_+*+*+!+{.{.{.{.{.V.w x x x x y y y z S S S S T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+:+n.a h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.G ~ <+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.p p p p p p p p p f.f.r.r.r.r.r.r.k.k.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.<.[.[.[.-.-.-.-.-.-.;.Q Q Q R R R R R R R q q q q r r r r [+_+_+_+!+{.{.{.{.{.V.v w w w x x x y y y z S S S S T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+}+|+1+6 ]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j ^+( /+#+#+#+#+#+#+#+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p p p p f.f.r.r.r.r.r.k.k.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.-.;.Q Q Q R R R R R R R q q q q r [+3+3+3+4+{.{.{.{.{.V.u v v v w w x x x y y y y z S S S T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+6+`.a I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j 7+8+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p p p f.f.r.r.r.r.r.k.k.k.k.k.a.a.a.a.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.-.;.Q Q Q R R R R R R R q q 9+3+3+3+4+{.{.{.{.{.V.u u u u v v w w x x x x y y y z S S S T T T T >.,.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+0+9.x.A.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a+E b+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.p p p p p p p f.f.r.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.-.;.Q Q Q R R R R R R 9+3+3+3+4+{.{.{.{.{.V.t u u u u u v v w w w x x x y y y z S S S T T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+t.c+- X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d+&.: :.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p p f.f.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.[.[.-.-.-.-.-.-.;.Q Q Q R R R e+f+f+3+g+{.{.{.{.{.h+s s t t u u u u v v v w w x x x y y y z S S S S T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+e.j+k+z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ $+_ :.:.:.:.:.:.:.:.:.:.:.:.G.G.G.G.G.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.G.G.G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p f.f.r.r.r.r.r.k.k.k.k.a.a.a.b.b.b.b.b.<.<.[.[.[.-.-.-.-.-.-.;.Q Q R e+f+f+f+m+{.{.{.{.{.h+r r r s t t u u u u u v v w w x x x y y y z z S S S T T T T >.,.,.d.d.d.d.d.2.e.e.e.e.e.e.t.u.u.u.u.u.u.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+d.X * /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J F X :.:.:.:.G.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0..+.+R.R.R.p p p p p p p f.f.r.r.r.r.k.k.k.k.k.a.a.b.b.b.b.b.<.<.[.[.[.-.-.-.-.-.;.;.o+p+f+f+m+{.{.{.{.{.h+q r r r r s t t t u u u u v v w w x x x y y y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+,+}+5+5+5+5+5+n+n+q+S / r+/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . s+a t+u+G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0..+.+R.R.R.p p p p p p f.f.r.r.r.r.k.k.k.k.k.a.a.b.b.b.b.b.<.<.[.[.[.-.-.-.-.v+w+p+p+m+{.{.{.{.{.h+q q q r r r r r s t t u u u u v v w w x x x x y y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+v x+e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.B.C y+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+z+z+z+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+z+z+z+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0..+R.R.R.R.p p p p p p f.r.r.r.r.k.k.k.k.k.a.a.b.b.b.b.<.<.<.[.[.[.-.v+A+A+A+m+{.{.{.{.{.h+R R q q q r r r r r s t t u u u u v v v w w x x x y y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+C+g.D+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+F+G+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0..+.+R.R.R.p p p p p p f.r.r.r.r.k.k.k.k.k.a.a.b.b.b.b.<.<.<.[.v+A+A+A+m+{.{.{.{.{.h+R R R R q q q q r r r r s t t u u u u u v v w w x x x y y y z S S S T T T T >.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.N.N.N.N.N.N.N.,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+n+H+j./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.r+x+y+l+l+l+l+l+l+z+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0..+R.R.R.p p p p p p f.r.r.r.r.k.k.k.k.a.a.a.b.b.b.b.<.I+J+J+J+m+{.{.{.{.{.K+Q R R R R R R q q q r r r r s t t t u u u u v v w w x x x y y y z S S S T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+L+L+u { H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M+8 H+l+l+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0.0..+R.R.R.p p p p p p f.r.r.r.r.k.k.k.k.a.a.a.b.b.6+J+J+J+m+{.{.{.{.{.K+;.Q Q R R R R R R q q q r r r r r s t t u u u u v v w w x x x y y y z S S S T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+B+L+L+q+=.a i.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.& N+ +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0..+R.R.R.p p p p p p f.r.r.r.r.k.k.k.k.a.a.6+O+O+O+m+{.{.{.{.{.K+-.-.;.;.Q Q R R R R R q q q r r r r r s t t u u u u v v w w x x x y y y z S S T T T T >.,.,.d.d.d.d.d.2.e.e.e.e.e.e.u.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+L+L+L+P+y 3 a+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d+Q+H+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.R.p p p p p p f.r.r.r.r.k.k.k.R+S+S+O+m+{.{.{.{.{.K+-.-.-.-.-.;.Q Q R R R R R q q q q r r r r s t t u u u u v v w w x x x y y y z S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+B+Q.T+i.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.'+U+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.R.p p p p p f.f.r.r.r.k.V+W+W+S+X+{.{.{.{.{.K+[.[.[.-.-.-.-.;.Q Q R R R R R R q q q r r r r s t t u u u u v v w w x x x y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+L+L+L+P+Y+Y+T Z+(.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J E `+y+y+y+y+y+y+ + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V V V V V V @ @ @ @ @ @ @ @ @ @ @o o o o o o o o o o o o o o o o @ @ @ @ @ @ @ @ @ @ @V V V V V V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.R.p p p p p f.r.r.;.W+W+W+.@{.{.{.{.{.K+<.<.<.[.[.-.-.-.-.;.Q Q Q R R R R R q q q r r r r s t t u u u u v v w w x x x y y z S S S T T T T >.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y++@W.@@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H D o y+y+y+ + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V V V @ @ @ @ @o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o @ @ @ @ @V V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.R.p p p p p #@W+W+W+.@{.{.{.{.{.K+b.b.b.<.<.[.[.-.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u u v v w w x x y y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+L+L+P+P+Y+Y++@+@p ^+z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f ] y+ + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V @ @ @o o o o o o o o o o o o o o o o o o o o o o o B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B o o o o o o o o o o o o o o o o o o o o o o @ @ @ @V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0..+.+R.R.p p p $@%@W+W+.@{.{.{.{.{.K+a.a.b.b.b.<.<.[.[.-.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u u v v w x x x y y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+Y+Y+Y++@+@&@*@s+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.& ( + +m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V @ @ @o o o o o o o o o o o o o o o o B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B o o o o o o o o o o o o o o o o @ @ @V V V V V V m.m.m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0..+R.R.R.$@%@%@%@.@{.{.{.{.{.K+k.k.a.a.b.b.b.<.<.[.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u u v w w x x x y y y z S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+i+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@-@x+d+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;@- c+m.m.m.m.m.m.m.m.m.m.m.V V V V V @ @ @o o o o o o o o o o o o o B B B B B B B B B B B B B O O O O O O O >@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@O O O O O O O B B B B B B B B B B B B B o o o o o o o o o o o o o @ @ @V V V V V m.m.m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0..+<.,@%@%@.@{.{.{.{.{.K+r.k.k.k.a.a.b.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u v v w w x x x y y y S S S T T T T ,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+L+L+L+P+Y+Y++@+@+@'@B+)@y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@9 H+m.m.m.m.m.m.m.V V V V V @ @ @o o o o o o o o o o o B B B B B B B B B B B O O O O >@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@O O O O B B B B B B B B B B B o o o o o o o o o o o @ @ @V V V V V m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.3.0.0.0.0.0.~@{@{@,@]@{.{.{.{.{.K+r.r.r.k.k.k.a.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u v v w w x x x y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@W.* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D+6 >@m.m.m.m.m.V V V V @ @o o o o o o o o o o B B B B B B B B B B O O O >@>@>@>@>@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@>@>@>@>@O O O B B B B B B B B B B o o o o o o o o o o @ @V V V V m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+3.3.3.0.0.~@^@^@^@/@{.{.{.{.{.(@p f.r.r.r.k.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r r s t u u u u v v w w x x y y y z S S S T T T >.,.,.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+q+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@R.:@i.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <@w.o m.m.V V V V @ @o o o o o o o o o o B B B B B B B B O O O >@>@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@>@O O O B B B B B B B B o o o o o o o o o o @ @V V V V m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+3.3.~@^@^@^@/@{.{.{.{.{.(@p p p f.r.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r s t t u u u u v v w x x x y y y z S S T T T T ,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+n+n+q+q+B+B+L+L+P+Y+Y++@+@+@'@'@'@_@x 6 I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f [@m.V V V V @ @o o o o o o o o B B B B B B B B O O >@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+1+1+1+Q.Q.Q.Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.Q.Q.Q.1+1+1+1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@O O B B B B B B B B o o o o o o o o @ @V V V V m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+}@|@|@^@/@{.{.{.{.{.(@R.p p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r s t t u u u u v w w x x x y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@N.{ h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+1@V V @ @o o o o o o o o B B B B B B B O O O >@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+Q.Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.Q.1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@O O O B B B B B B B o o o o o o o o @ @V V V m.m.m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+}@2@2@|@/@{.{.{.{.{.(@.+R.R.p p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q r r r r s t t u u u v v w w x x x y y z S S T T T T >.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+}+5+5+5+i+n+n+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@u.3@4@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5@6@ @ @o o o o o o o o B B B B B B O O >@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.1+1+1+1+1+1+Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@O O B B B B B B o o o o o o o o @ @V V V m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.2+#+#+}@2@2@2@/@{.{.{.{.{.(@0.0..+R.R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q r r r r s t t u u u v v w w x x y y y z S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+n+n+q+q+B+B+L+L+P+Y+Y++@+@+@'@'@_@_@_@7@d.) z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g g.o o o o o o o o B B B B B B O O >@>@>@>@>@>@W.W.W.W.W.W.8@8@9@9@9@9@1+Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+<+<+<+<+<+<+<+<+<+<+<+<+<+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+<+<+<+<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.1+1+1+1+1+1+W.W.W.W.W.W.W.>@>@>@>@>@>@O O O B B B B B o o o o o o o o @V V V V m.m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.p 2@2@2@/@{.{.{.{.{.(@0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R q q q r r r r s t u u u u v v w x x x y y z S S S T T T >.,.d.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+5+5+5+5+i+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@z E i.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J.0@>@o o o o o B B B B B O O >@>@>@>@>@>@W.W.W.W.W.W.8@9@9@9@9@9@<+<+<+=.a@a@~+~+~+~+~+~+~+~+~+~+~+~+<+<+<+<+<+<+<+<+<+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.1+1+1+1+1+W.W.W.W.W.W.W.>@>@>@>@>@>@O O B B B B B o o o o o o o @ @V V V m.m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.b@c@d@2@/@{.{.{.{.{.(@3.0.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R q q q r r r s t t u u u v v w w x x y y y z S S T T T T ,.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+n+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@u ^+/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@P.>@o o o B B B B B O O >@>@>@>@>@>@W.W.W.W.W.W.1+1+1+9@<+f@f@g@g@g@G+G+g@=.a@a@a@~+~+~+~+<+<+<+<+<+<+<+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.1+1+1+1+W.W.W.W.W.W.>@>@>@>@>@>@O O B B B B B o o o o o o o @ @V V V m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+G.:.:.:.:.b@c@c@c@h@{.{.{.{.{.(@#+3.3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q R R R R R q q q r r r s t t u u u v v w w x x y y y S S S T T T >.,.,.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+n+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@-.F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@m Q.o B B B B B O O >@>@>@>@>@>@W.W.W.W.W.1+1+1+1+9@<+<+=.g@G+j@j@n k@k@k@n j@G+`+l@l@<+<+<+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.`+`+`+`+`+`+`+`+`+`+`+`+`+`+g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@g@`+`+`+`+`+`+`+`+`+`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.1+1+1+1+1+W.W.W.W.W.W.>@>@>@>@>@O O B B B B B o o o o o o @ @V V V m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+G.:.b@c@c@c@h@{.{.{.{.{.(@#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.;.Q Q R R R R R q q r r r r s t u u u u v v w x x x y y z S S T T T T ,.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.N.,+,+,+,+,+}+5+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@+@'@'@_@_@_@7@7@i@i@U m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I , f@B B B B B O >@>@>@>@>@>@W.W.W.W.W.1+1+1+1+<+<+a@=.g@g@G+j@n n@n@o@p@q@q@r@s@t@k@v.H+g@=.=.=.=.=.=.=.=.=.=.=.=.=.`+`+`+`+`+`+`+`+g@g@g@g@g@g@H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+g@g@g@g@g@g@`+`+`+`+`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+Q.Q.1+1+1+1+W.W.W.W.W.W.>@>@>@>@>@O O B B B B B o o o o o o @V V V m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+u@c@c@c@h@{.{.{.{.{.(@#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.;.Q Q R R R R q q q r r r s t t u u u v v w w x x y y y z S S T T T >.,.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@2+c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.> v@B B B O O >@>@>@>@>@W.W.W.W.W.1+1+1+1+Q.<+a@a@=.=.g@j@n k@n@p@w@x@y@z@z@A@B@C@D@E@K.v.H+g@g@=.=.=.=.`+`+`+`+`+`+`+g@g@g@g@H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+g@g@g@g@`+`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+Q.1+1+1+1+W.W.W.W.W.W.>@>@>@>@>@O B B B B B o o o o o o @V V V m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+z+l+l+l+l+l+F@G@G@G@h@{.{.{.{.{.(@:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.-.-.-.-.;.Q Q R R R R q q q r r r s t t u u u v v w x x x y y z S S T T T T ,.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@y+B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I@K.B B O >@>@>@>@>@W.W.W.W.W.1+1+1+1+Q.Q.~+~+a@=.=.G+G+n k@s@q@x@y@z@J@K@L@M@M@L@N@A@C@E@K.v.G+O@`+`+`+`+g@g@g@H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+G+G+G+G+G+G+G+G+G+4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.4.G+G+G+G+G+G+G+G+G+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+g@g@g@`+`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+Q.Q.1+1+1+W.W.W.W.W.>@>@>@>@>@O O B B B B o o o o o o @V V V m.m.m.m.m.m.m. + +y+y+y+y+y+y+y+y+z+l+l+F@G@G@G@h@{.{.{.{.{.(@:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.[.[.-.-.-.-.;.Q R R R R R q q r r r r s t u u u u v w w x x y y y z S S T T T >.,.,.d.d.d.2.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@P@v.g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+n.O O >@>@>@>@>@W.W.W.W.1+1+1+1+Q.Q.~+~+~+a@a@=.g@j@n Q@s@q@y@B@R@K@S@T@U@V@W@V@X@Y@Z@`@y@p@n@j@ # #H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+G+G+G+G+G+4.4.4.4.4.4.4.4.4.4.4.4.4.4.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.4.4.4.4.4.4.4.4.4.G+G+G+G+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+g@g@g@`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+~+~+~+~+~+~+~+~+~+~+Q.1+1+1+1+W.W.W.W.W.>@>@>@>@O O B B B B o o o o o o @V V V m.m.m.m.m.m. + + +y+y+y+y+y+y+y+z+F@G@G@G@h@{.{.{.{.{.(@:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.a.b.b.<.<.[.[.-.-.-.-.Q Q R R R R q q q r r r s t t u u u v v w x x x y y z S S S T T T ,.,.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@+@'@'@_@_@_@7@7@i@i@i@P@P+w.4@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@3@O >@>@>@>@W.W.W.W.W.1+1+1+Q.Q.~+~+~+~+a@a@=.g@G+.#Q@t@q@C@A@N@L@T@U@+#@###$#%#&#*#U@Y@=#A@-#;#9.q.4.H+H+H+H+H+H+H+H+H+H+G+G+G+G+4.4.4.4.4.4.4.4.4.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.4.4.4.G+G+G+G+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.=.<+<+<+<+~+~+~+~+~+~+~+~+Q.Q.1+1+1+W.W.W.W.W.>@>@>@>@>@O B B B B o o o o o o @V V V m.m.m.m.m.m. + + +y+y+y+y+y+>#,#'#G@h@{.{.{.{.{.)#:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.k.a.b.b.b.<.<.[.[.-.-.-.;.Q Q R R R R q q q r r r s t t u u u v w w x x y y y z S S T T T >.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@i@H@P@>.$+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.$+!#>@>@>@W.W.W.W.1+1+1+1+Q.~+~+~+~+~+a@a@=.g@O@.#k@;#~#{#A@N@M@]#W@@#$#^#/#(#_#/#:#<#*#[#K@}#D@|#n@q.q.4.H+H+H+G+G+G+4.4.4.4.4.4.4.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.v.v.v.v.v.v.v.v.v.v.v.v.n n n n n n n n n n n n v.v.v.v.v.v.v.v.v.v.v.v.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.4.4.G+G+G+H+H+H+H+H+H+H+H+H+H+H+H+H+g@g@g@`+`+`+`+=.=.=.=.=.=.=.=.=.=.<+<+<+<+~+~+~+~+~+~+~+~+Q.Q.1+1+1+W.W.W.W.>@>@>@>@>@O B B B B o o o o o o @V V V m.m.m.m.m.m. + +y+y+y+>#,#,#,#1#{.{.{.{.{.)#l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.r.k.k.a.a.b.b.b.<.<.[.-.-.-.-.;.Q Q R R R R q q r r r r t t u u u v v w w x x y y z S S T T T T ,.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@H@P@P@/+$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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B.[ >@>@W.W.W.W.1+1+1+Q.Q.~+~+~+~+~+~+a@a@`+O@2#K.;#E@D@B@J@M@]#W@#_#4#5#6#6#7#8#9#0#+#a#b#A@D@|#n@q.j@j@G+4.4.4.4.4.4.q.q.q.q.q.q.q.q.q.q.q.q.q.q.v.v.v.v.v.n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n v.v.v.v.v.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+`+=.=.=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+~+Q.Q.1+1+1+W.W.W.W.W.>@>@>@>@O B B B B o o o o o @ @V V m.m.m.m.m.m. + + +>#,#,#,#c#{.{.{.{.{.)#l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.k.k.k.a.a.b.b.b.<.[.[.-.-.-.-.Q Q R R R R q q q r r r s t t u u u v w w x x y y y z S S T T T >.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@i@d#i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e#C >@W.W.W.W.1+1+1+Q.Q.~+~+~+~+~+~+a@l@`+`+O@v.n@;#f#C@A@N@Y@V@#_#g#h#i#j#j#k#l#m#9###n#S@o#B@p#p@n@n q#q#4.q.q.q.q.q.q.q.q.q.q.q.q.v.v.v.v.n n n n n n n n n n n n n n n r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#n n n n n n n n n n n n n n v.v.v.v.q.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.G+G+G+H+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+`+=.=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.W.>@>@>@>@O B B B B o o o o o @V V V m.m.m.m.m.m.s#,#,#,#c#{.{.{.{.{.)#l+l+l+l+l+G.:.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p p f.r.r.k.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q Q R R R R q q r r r r s t u u u v v w w x x y y z S S T T T >.,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#}+6 i.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h 7 ~+W.W.W.1+1+1+Q.~+~+~+~+~+~+~+~+<+l@`+4.v.k@;#~#{#B@N@M@u#v#w#x#g#y#z#A#B#B#C#j#D#8#E#@#X@Z@F#G#f#H#K.r#n n q.q.q.q.q.q.q.v.v.v.n n n n n n n n n n n r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.9.r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#n n n n n n n n n n n v.v.v.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.>@>@>@>@>@O B B B B o o o o o @V V m.m.m.m.I#J#,#,#c#{.{.{.{.{.K#z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p f.r.r.r.k.k.k.a.b.b.b.<.<.[.[.-.-.-.;.Q R R R R R q q r r r s t t u u u v w w x x y y y S S S T T T >.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+i+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#t#s b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.a n W.W.1+1+1+Q.~+~+~+~+~+~+~+~+<+<+l@H+4.v.k@;#~#C@A@L#a#M#<#/#8#l#j#A#N#O#O#P#B#z#Q#R#w#W@S@S#B@D@T#O.K.n n q.q.q.v.v.v.n n n n n n n n n r#r#r#r#r#r#r#r#r#r#r#r#9.9.9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.9.9.9.r#r#r#r#r#r#r#r#r#r#r#r#n n n n n n n n n v.v.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+g@g@`+`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.Q.1+1+W.W.W.W.>@>@>@>@O O B B B o o o o o @V V V m.I#J#J#J#c#{.{.{.{.{.K#y+y+z+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.b.<.[.[.-.-.-.-.Q Q R R R R q q q r r r s t u u u v v w x x x y y z S S T T T >.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@i@P@P@t#t#U#Q.V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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W#X W.1+1+1+Q.~+~+~+~+~+~+~+<+<+<+g@g@H+4.v.K.;#f#X#Y#Z#u#`#E# $.$i#C#N#+$@$@$@$#$$$j#5#/#%$X@K@&$*$|#< K.n k@v.v.n n n n n n n n r#r#r#r#r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.9.r#r#r#r#r#r#r#r#r#n n n n n n n n n v.v.q.q.q.q.q.q.q.q.q.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.>@>@>@>@O B B B B o o o o o @V =$J#J#J#-${.{.{.{.{.K#y+y+y+y+z+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.#+#+#+#+#+#+3.3.0.0.0.0.0..+R.p p p p f.r.r.r.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q Q R R R R q q r r r s t t u u u v w w x x y y y S S S T T T ,.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@i@P@P@t#t#U#;$>$s+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i ,$1+1+1+Q.~+~+~+~+~+~+~+<+<+<+=.g@g@g@4.v.k@;#w@'$N@)$!$~$9#m#D#z#B#+$@${$]$]$^$O#/$y#8#w#W@S@R@($f#;#n@k@N n n n n n n r#r#r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.r#r#r#r#r#r#r#r#r#n n n n n n n v.v.q.q.q.q.q.q.q.q.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+g@`+`+`+`+=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.>@>@>@>@O B B B o o o o o _$:$:$:$-${.{.{.{.{.K#y+y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p p f.r.r.k.k.k.a.a.b.b.<.<.[.-.-.-.-.;.Q R R R R q q q r r r s t u u u v v w x x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#U#<$^+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m@j@1+Q.Q.~+~+~+~+~+~+<+<+<+=.=.=.g@g@4.v.n@p@w@X#=#a#+#w#[$.$i#A#P#@$]$}$}$|$]$@$1$2$7#3$4$[#b#'$-#|#;#K.N N n r#r#r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.r#r#r#r#r#r#r#n n n n n n n v.v.q.q.q.q.q.q.q.q.4.4.4.G+G+H+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.>@>@>@>@O B B B B o o 5$6$7$7$-${.{.{.{.{.K# + +y+y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.b.<.[.[.-.-.-.;.Q Q R R R R q q r r r s t t u u u v w w x x y y z S S T T T >.,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@H@P@P@t#U#U#8$B H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d+1@1+Q.~+~+~+~+~+~+<+<+<+=.=.=.=.g@g@4.9$n@p@G#A@b#a#*#w# $l#z#B#0$]$}$a$a$a$b$]$+$A#D# $c$d$e$R@C@f#f$H#b+K.r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#r#n n n n n n v.v.q.q.q.q.q.q.q.q.4.4.4.G+G+H+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.1+1+W.W.W.W.>@>@>@>@O B B B 5$6$6$6$-${.{.{.{.{.K#m.m. + + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q R R R R q q q r r r s t u u u v v w x x y y y S S S T T T ,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@H@P@P@t#t#U#8$L+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.; !#~+~+~+~+~+~+~+<+<+=.=.=.=.=.g@g@j@9$n@E@G#A@K@[#*#w# $l#g$h$^$]$a$i$j$j$k$l$@$1$m$7#n$`#T@o#B@D@: < b+r#r#r#9.9.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < < < < < < < c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+< < < < < < < < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#r#n n n n n v.v.q.q.q.q.q.q.q.4.4.4.4.G+H+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+Q.Q.1+1+W.W.W.W.>@>@>@O B o$p$p$6$-${.{.{.{.{.K#m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.0.0.0.0.0..+R.p p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.;.Q Q R R R R q q r r r s t u u u u v w w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@i@i@i@H@P@P@t#t#U#8$q$#+]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j r$~+~+~+~+~+~+<+<+=.=.=.=.=.=.g@G+j@9$n@|#($A@K@a#*#w#s$l#/$t$u$|$a$j$v$v$i$b$]$w$C#l#x$$#n#L@y$($z$T#b+b+9.9.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < c+c+c+c+c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+c+c+c+c+c+c+< < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#n n n n n v.v.q.q.q.q.q.q.q.4.4.4.G+G+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+Q.1+1+W.W.W.W.>@>@>@A$p$p$p$B${.{.{.{.{.K#V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q R R R R q q q r r r t t u u u v w w x x y y z S S T T T >.,.d.d.d.d.2.2.e.e.e.e.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$C${ + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.9 =.~+~+~+~+<+<+<+=.=.=.=.=.=.O@O@G+k@n@|#D@A@K@[#*#w#D$y#/$O#E$b$i$v$F$F$v$G$H$^$I$j#8#:#+#T@o#J$D@|#;#H#H#K.K.K.K.K.K.K.b+b+b+b+b+b+b+< < < < < < < < < < < < < < c+c+c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+c+c+< < < < < < < < < < < < < < < b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#n n n n n v.v.q.q.q.q.q.q.4.4.4.G+G+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.=.<+<+~+~+~+~+~+~+Q.Q.1+1+W.W.W.>@D.p$p$p$B${.{.{.{.{.K#o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.a.b.b.<.<.[.-.-.-.;.Q Q R R R R q q r r r s t u u u v v w x x x y y z S S T T T ,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$Q K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.} ~+~+~+~+<+<+=.=.=.=.=.=.`+`+O@4.n n@|#D@B@b#a#@#L$m#k#A#+$E$b$i$v$F$M$N$F$a$]$+$g$O$P$Q$R$S$}#*$z$|#< H#H#K.K.K.b+b+b+b+b+b+< < < < < < < < < < < < < c+c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : T$T$T$T$T$T$T$T$T$: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+c+< < < < < < < < < < < < < b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.9.r#r#r#r#r#r#n n n n n v.q.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+Q.1+1+W.W.U$p$p$p$V${.{.{.{.{.K#o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.:.#+#+#+#+#+#+3.0.0.0.0.0..+R.p p p p f.r.r.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q R R R R q q r r r s t t u u u v w w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$U#1 4@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W$C.~+~+~+<+<+<+=.=.=.=.=.=.`+`+ #4.n 9.;#-#B@N@a#*#:#8#k#A#+$]$b$j$F$M$X$Y$Z$j$H$`$ %i#8#.%+%S@o#B@D@@%< H#H#b+b+b+b+b+b+b+< < < < < < < < < < < c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : T$T$T$T$T$T$#%#%#%#%#%#%#%#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%#%#%#%#%#%#%T$T$T$T$T$T$: : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+< < < < < < < < < < < < b+b+b+b+b+b+K.K.K.K.K.K.K.K.9.r#r#r#r#r#n n n n n v.v.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.<+<+~+~+~+~+~+~+Q.1+1+$%p$p$p$V${.{.{.{.{.%%B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q Q R R R R q q r r r s t u u u v v w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+i+n+q+q+B+B+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%y * . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e #%~+~+<+<+=.=.=.=.=.=.`+`+`+ #4.n 9.O.f#C@R@Y@*%:#=%y#C#+$]$b$j$N$Y$X$X$Y$F$i$-%+$;%>%[$,%[#b#&$G#z$f$c+< < b+b+b+< < < < < < < < < < < c+c+c+c+c+: : : : : : : : : : : : : : : : : : T$T$T$T$#%#%#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%#%T$T$T$T$: : : : : : : : : : : : : : : : : : : c+c+c+c+c+< < < < < < < < < < < b+b+b+b+b+K.K.K.K.K.K.K.9.9.r#r#r#r#r#n n n n n v.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@`+`+=.=.=.=.=.=.=.<+<+~+~+~+~+~+~+ @'%'%p$V${.{.{.{.{.%%B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r s t u u u v v w x x x y y S S S T T >.,.,.d.d.d.2.2.e.e.e.e.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%[ !@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.D ~+<+<+<+=.=.=.=.=.=.`+`+g@H+4.q.n O.|#($)%S@W@$# $D#C#!%E$~%j$Z$X$X$X${%Y$v$k$`$P#m$]%^%/%e$(%_%:%)@c+< < b+< < < < < < < < < < c+c+c+c+: : : : : : : : : : : : : : : : T$T$T$T$#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%#%T$T$T$: : : : : : : : : : : : : : : : c+c+c+c+c+< < < < < < < < < < b+b+b+b+b+K.K.K.K.K.K.K.9.9.r#r#r#r#n n n n n v.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+g@g@`+`+=.=.=.=.=.=.<+<+~+~+~+~+ @<%[%'%V${.{.{.{.{.%%>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0.0.R.R.p p p f.r.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q Q R R R q q q r r r t t u u u v w w x x y y z S S T T T ,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%<$F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . '+b+<+<+=.=.=.=.=.=.`+`+g@g@H+4.q.n n@|#{#A@L@U@##P$O$;%O#u$b$j$Z$X$}%|%|%Y$Y$i$1%2%C#3%4%,%[#b#5%($[ : c+f$< < < < < < < < c+c+c+c+: : : : : : : : : : : : : : : T$T$T$#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+j+j+j+j+j+j+j+j+j+j+_ _ _ _ _ _ _ _ j+j+j+j+j+j+j+j+j+j+j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%T$T$T$: : : : : : : : : : : : : : c+c+c+c+< < < < < < < < < < b+b+b+b+b+K.K.K.K.K.K.9.9.r#r#r#r#r#n n n n v.q.q.q.q.q.q.4.4.G+G+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.<+<+<+~+ @<%<%<%V${.{.{.{.{.%%>@>@>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.b.b.<.<.[.[.-.-.-.Q Q R R R R q q r r r s t u u u v v w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%=.@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W$_.<+<+=.=.=.=.=.=.`+`+g@H+H+H+q.n n@p@p#7%8%X@4$3$7#2$P#@$H$9%F$X$|%|%|%{%0%a%a$E$O#j#]%^%/%b%c%J$d%z$@%f$< < < < < < c+c+c+c+: : : : : : : : : : : : : T$T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%T$T$: : : : : : : : : : : : : : c+c+c+c+< < < < < < < < < b+b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#r#n n n n v.q.q.q.q.q.q.4.4.G+H+H+H+H+H+H+H+g@`+`+=.=.=.=.=.=.<+e%<%<%<%V${.{.{.{.{.%%W.W.>@>@>@O B B B o o o o @V V m.m.m.m.m. +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.r.k.k.a.a.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r s t u u u v v w x x y y y S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%N.b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+_ =.=.=.=.=.=.`+`+g@g@H+H+4.4.q.n f%g%h%o#i%+#E#8#i#B#j%l$9%F${%|%|%|%|%0%Z$j$l$2%C#3%[$%$k%l%y$m%z$@%f$f$< < < c+c+c+c+: : : : : : : : : : : : T$T$#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$T$: : : : : : : : : : : : c+c+c+c+< < < < < < < < b+b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#r#n n n n v.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+g@`+`+`+=.=.=.=.O n%n%<%V${.{.{.{.{.%%1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p f.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q Q R R R q q q r r r t t u u u v w w x x y y z S S T T >.,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%/ z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.$+H+=.=.=.=.=.`+`+g@H+H+H+H+4.4.v.H#f#G#R@S@W@0# $y#$$2%]$a$F$Y$|%p%q%|%|%X$F$k$E$1$2$r%s%t%T@o#7%:%@%: f$< c+c+c+c+: : : : : : : : : : : T$T$#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : : : c+c+c+< < < < < < < < < b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#r#n n n n v.q.q.q.q.q.4.4.G+G+H+H+H+H+H+g@g@`+`+=.=.O v%v%n%w%{.{.{.{.{.%%Q.1+1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+l+:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.r.k.k.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r s t u u u v w w x x y y z S S T T T ,.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%x%# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ y%=.=.=.=.`+`+`+g@H+H+H+H+H+4.v.n@;#z$5%K@X@%$[$l#C##$]$z%v$Y${%q%q%q%A%|%Z$j$B%C%D%D#[$E%F%G%y$m%H%@%: : c+c+: : : : : : : : : : : T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%u%u%d#d#d#d#d#d#d#} } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } d#d#d#d#d#d#d#u%u%u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : : c+c+c+< < < < < < < < b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#n n n n v.v.q.q.q.q.4.4.4.G+H+H+H+H+H+H+g@`+`+O v%v%v%I%{.{.{.{.{.%%~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o @V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p f.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r s t u u u v v w x x y y z S S T T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.u.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%;$m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J%b+=.=.=.`+`+g@g@H+H+H+H+H+j@q#N H#f#($K%i%+#E#.$j#N#^$k$v$Y$|%|%q%q%q%A%X$L%z%-%1$2$M%E#+#T@o#7%:%d%T$: : : : : : : : : : : : T$T$#%[ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%u%d#d#d#d#} } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } d#d#d#d#u%u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : c+c+c+c+< < < < < < < b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#n n n n v.q.q.q.q.q.4.4.G+H+H+H+H+H+H+g@N%O%v%v%I%{.{.{.{.{.%%~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.Q Q R R R q q q r r r t t u u u v w x x y y y S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%f@J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.) =.=.=.`+`+g@H+H+H+H+H+H+G+q#n O.T#D@5%G%V@.%=%y#A#C%l$i$F$|%A%q%q%q%A%|%Y$v$B%@$D%y# $E%n#G%y$M d%[ @%: : : : : : : : : T$T$#%[ [ [ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%d#d#d#} } } } } } } } } } } } } } } } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } } } } } } } } } } } } } } } d#d#d#u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : c+c+c+< < < < < < < b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#n n n n v.q.q.q.q.4.4.4.G+H+H+H+H+1+R%R%O%I%{.{.{.{.{.%%<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o @V V m.m.m.m.m. +y+y+y+y+y+y+l+l+l+l+l+l+:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r s t u u u v w w x x y y S S S T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%u.'+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j X =.=.`+`+g@H+H+H+H+H+H+G+q#n K.< f#S%o#T%@#4%O$;%w$]$z%N$X$A%q%q%q%q%p%{%L%z%U%+$V%M%3$+#T@W%5%X%:%[ @%: : : : : : T$T$#%[ [ [ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%d#d#d#} } } } } } } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } } } } } } } d#d#u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : c+c+c+< < < < < < < b+b+b+b+K.K.K.K.K.9.9.r#r#r#n n n n v.q.q.q.q.q.4.4.G+H+H+1+Y%Y%Y%Z%{.{.{.{.{.%%=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B o o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r s t u u u v w w x x y y z S S T T >.,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%&%2 + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F H+=.`+`+g@H+H+H+H+H+G+4.q#q#r#O.|#*$}#e$W@w#=%i# %`$k$v$Y$|%A%q%q%q%p%|%Y$F$k$^$B#y# $E%`%b%W%J$ &H%@%@%: : : : T$#%#%[ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%d#d#} } } } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } } } d#d#u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : : c+c+c+< < < < < < < b+b+b+b+K.K.K.K.K.9.r#r#r#r#n n n v.v.q.q.q.q.4.4.G+.&Y%Y%Y%Z%{.{.{.{.{.%%=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B o o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p r.r.r.k.k.a.b.b.b.<.[.[.-.-.-.Q Q R R R q q q r r s t u u u v v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%r.+&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J 6@=.`+`+g@H+H+H+H+H+G+4.4.n n r#< f#C@=#]#@#P$O$C#+$]$i$Z$X$A%q%q%q%q%p%|%Y$i$U%+$V%M%@&#&[#b#y$$&H%[ @%@%: T$T$#%[ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ u%u%d#d#d#} } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } d#d#u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : c+c+c+< < < < < < < b+b+b+b+K.K.K.K.K.9.r#r#r#n n n n v.q.q.q.q.4.9@Y%Y%Y%Z%{.{.{.{.{.%%=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@O B B B o o o o @V m.m.m.m.m. +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r t t u u u v w x x y y z S S T T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%+@9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e c+`+`+g@H+H+H+H+H+G+4.4.q.n r#O.%&{#y$e$*%&&8#i#1$E$a$F$Y$|%q%q%q%q%*&A%X$F$k$^$B#=&s$.%-&b%W%J$ &H%[ @%T$#%#%[ [ [ [ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } } } } } Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%} } } } } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ #%T$T$: : : : : : : : c+c+c+< < < < < < < b+b+b+K.K.K.K.K.9.r#r#r#r#n n n v.q.q.q.<+Y%Y%Y%Z%{.{.{.{.{.%%`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@O B B B o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r s t u u u v w x x x y y S S T T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%W s+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.m `+`+g@H+H+H+H+H+G+4.4.q.q.n K.f%g%_%o#]#%$[$O$A#2%H$j$Y$|%q%q%;&;&*&>&|%Y$j$l$,&'&)&P$!&[#b#y$$&:%[ [ #%#%[ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } } } } Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( ( ( ( ( | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ( ( ( ( ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%} } } } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : c+c+c+< < < < < < b+b+b+b+K.K.K.K.K.9.r#r#r#n n n n v.<+Y%Y%Y%Z%{.{.{.{.{.%%H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.>@>@>@O B B B o o o @V V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0.0.R.R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q Q R R R q q r r r s t u u u v w w x x y y S S T T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&2.{&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i >$`+g@H+H+H+H+H+G+4.4.q.q.q.r#n@|#D@A@e$/%&&]&2$O#]$a$F${%p%q%q%^&^&*&A%X$F$z%/&1$(&r%.%-&_&c%J$:%_ :&:&[ [ [ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } } } Q%Q%Q%Q%Q%X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | n.| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X Q%Q%Q%Q%Q%} } } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : c+c+c+< < < < < < b+b+b+K.K.K.K.K.9.r#r#r#r#n n l@<&Y%Y%[&{.{.{.{.{.%%H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+W.W.W.>@>@>@O B B o o o o @V m.m.m.m.m. +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.-.Q Q R R R q q q r r s t u u u v w w x x y y z S S T T >.,.d.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&q$7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.: g@H+H+H+H+H+G+4.4.q.q.n n 9.;#f#C@o#T@4$[$3%}&@$H$j$Y$|%p%q%*&^&*&>&A%X$|&B%^$D%)&P$%$[#G%y$1&} j+H%[ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } } Q%Q%Q%Q%Q%X X X X X X X X X X X X ( ( ( ( ( ( ( ( | | | | | | | | | | | | | | | | n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.| | | | | | | | | | | | | | | | | ( ( ( ( ( ( ( ( X X X X X X X X X X X X Q%Q%Q%Q%} } } } } } } } } } d#d#u%_ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ #%#%T$: : : : : : : : c+c+< < < < < < b+b+b+b+K.K.K.K.9.r#r#r#r#l@2&2&<&[&{.{.{.{.{.%%H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.W.>@>@>@B B B o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0..+R.R.p p p r.r.r.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r t t u u v v w x x y y z S S T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%6%6%o%P%P%~&3&c+4&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 4.H+H+H+H+H+G+4.4.q.q.q.n k@K.f$g%5&b#F%c$8#j#O#]$a$L%{%p%*&*&^&*&*&>&6&Y$v$U%!%2$7&E#-&_&l%H.Q% &H%H%[ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ u%u%d#} } } } } } } } } Q%Q%Q%Q%X X X X X X X X X X X ( ( ( ( ( ( ( ( | | | | | | | | | | | | n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.`.`.`.`.`.`.`.`.r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$`.`.`.`.`.`.`.`.n.n.n.n.n.n.n.n.n.n.n.n.n.n.| | | | | | | | | | | | | ( ( ( ( ( ( ( ( X X X X X X X X X X X Q%Q%Q%Q%} } } } } } } } } d#u%u%_ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ #%T$T$: : : : : : : c+c+c+< < < < < < b+b+b+K.K.K.K.K.9.r#`+8&2&2&[&{.{.{.{.{.%%4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.W.>@>@O B B B o o o @V V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0.0.R.R.p p p f.r.r.k.k.a.b.b.b.<.[.-.-.-.;.Q R R R R q q r r r t t u u v v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$q$&%6%6%o%P%P%~&3&[.H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4&*@H+H+H+H+H+G+4.4.q.q.q.q.k@N H#|#($y$i%+#3$>%C#2%B%v$Y$|%>&*&^&^&*&*&p%{%F$z%`$1$=&9&E%0&b%a&5%$&_ H%H%[ [ [ j+j+_ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } Q%Q%Q%Q%X X X X X X X X X X ( ( ( ( ( ( ( | | | | | | | | | | | n.n.n.n.n.n.n.n.n.n.n.`.`.`.`.r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$`.`.`.`.n.n.n.n.n.n.n.n.n.n.n.| | | | | | | | | | | ( ( ( ( ( ( ( X X X X X X X X X X Q%Q%Q%Q%} } } } } } } } d#d#u%_ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ #%T$T$: : : : : : : c+c+< < < < < < b+b+b+b+K.K.K.K.b&8&8&8&[&{.{.{.{.{.c&q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o o @V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.-.Q Q R R R q q r r r s t u u u v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$q$&%6%o%o%P%P%~&3&n+d&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J./ H+H+H+H+G+4.4.q.q.q.q.v.N H#f$z$S%W%X@~$x$y#I$E$z%L%|%>&*&^&^&^&;&>&p%{%|&l$,&C#M%e&f&g&h&i&M &_ [ [ [ j+j+_ _ _ _ _ _ _ _ u%u%d#} } } } } } } } Q%Q%Q%Q%X X X X X X X X X ( ( ( ( ( ( ( | | | | | | | | | | n.n.n.n.n.n.n.n.`.`.`.`.r$r$r$r$r$r$r$r$r$r$r$r$r$/ / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / r$r$r$r$r$r$r$r$r$r$r$r$r$`.`.`.`.n.n.n.n.n.n.n.n.| | | | | | | | | | ( ( ( ( ( ( ( X X X X X X X X X Q%Q%Q%Q%} } } } } } } } d#u%u%_ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ #%T$: : : : : : : c+c+c+< < < < < b+b+b+b+K.K.O@j&k&8&[&{.{.{.{.{.c&q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+~+~+~+~+~+Q.1+W.W.W.>@>@>@B B B o o o @V V m.m.m.m. + +y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.R.p p p r.r.k.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r r s t u u u v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@t#t#U#8$8$q$&%&%6%o%o%P%P%~&3&6%l&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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Y.c+H+H+H+G+4.4.q.q.q.q.v.N K.H#: :%&$m&/%^%7&2$!%U%i$X$A%>&*&^&^&;&;&>&p%Y$n&-%o&(&r%p&q&r&s&5%$&_ H%[ j+j+_ _ _ _ _ _ _ _ u%d#d#} } } } } } } } Q%Q%Q%X X X X X X X X X ( ( ( ( ( ( | | | | | | | | | n.n.n.n.n.n.n.n.`.`.`.r$r$r$r$r$r$r$r$r$r$/ / / / / / / / / / / / / / / / / / / / / / / / / [@[@[@[@[@[@[@[@[@[@[@[@[@[@[@/ / / / / / / / / / / / / / / / / / / / / / / / / r$r$r$r$r$r$r$r$r$r$`.`.`.n.n.n.n.n.n.n.n.| | | | | | | | | ( ( ( ( ( ( X X X X X X X X X Q%Q%Q%} } } } } } } } d#u%u%_ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ #%#%T$: : : : : : : c+c+< < < < < < b+b+b+O@j&j&j&[&{.{.{.{.{.c&v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+~+1+1+W.W.W.>@>@O B B B o o o @V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0.R.R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R q q q r r s t u u u v w w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@t#t#U#8$8$q$&%&%6%o%P%P%P%3&3&t&`+A.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . l 4.H+H+G+4.4.q.q.q.q.v.n N K.< )@S%K%T@4$4%O$'&@$k$F$X$>&*&*&^&^&;&*&p%{%|&k$C%D%u&v&w&F%G%c%1&$&_ H%j+_ _ _ _ _ _ _ _ u%d#d#} } } } } } } Q%Q%Q%X X X X X X X X X ( ( ( ( ( ( | | | | | | | | n.n.n.n.n.n.n.`.`.r$r$r$r$r$r$r$r$r$/ / / / / / / / / / / / / / / [@[@[@[@[@[@1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 [@[@[@[@[@/ / / / / / / / / / / / / / / / r$r$r$r$r$r$r$r$r$`.`.n.n.n.n.n.n.n.| | | | | | | | ( ( ( ( ( ( X X X X X X X X Q%Q%Q%Q%} } } } } } } d#d#u%_ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ [ #%T$: : : : : : : c+c+c+< < < < < b+O@x&j&j&y&{.{.{.{.{.c&n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o o V V m.m.m.m. + +y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.:.#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.a.b.b.<.[.-.-.-.;.Q R R R R q q r r s t u u u v w w x x y y S S T T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&u V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W$z&H+H+G+4.4.q.q.q.q.v.n n N b+T#z$B@b#A&~$B&C&1$-%i$Y$|%>&*&^&;&^&*&>&p%Y$n&-%!%D&E&e&F&g&s&5%$&_ u% &_ _ _ _ _ _ _ u%d#d#} } } } } } } Q%Q%Q%X X X X X X X X ( ( ( ( ( ( | | | | | | | n.n.n.n.n.n.n.`.`.r$r$r$r$r$r$r$/ / / / / / / / / / / / / [@[@[@[@1 1 1 1 1 1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 1 1 1 1 1 [@[@[@[@/ / / / / / / / / / / / r$r$r$r$r$r$r$r$`.`.n.n.n.n.n.n.n.| | | | | | | ( ( ( ( ( ( X X X X X X X X Q%Q%Q%} } } } } } } d#d#u%_ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ #%#%T$: : : : : : : c+c+< < < < G&x&x&x&y&{.{.{.{.{.c&r#n n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+=.=.=.=.=.<+<+~+~+~+~+Q.1+W.W.W.>@>@O B B B o o o @V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.R.p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q R R R R q q r r r t t u u v v w x x y y S S T T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&+@H&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g I&H+G+4.4.q.q.q.q.v.n n n K.b+|#G#&$M@/%E#M%J&,&k$|&Y$A%>&^&^&^&^&*&>&{%F$k$`$ %=&9&.%`%b%c%5%X } & &_ _ _ _ _ u%u%d#} } } } } } } Q%Q%Q%X X X X X X X X ( ( ( ( ( | | | | | | | n.n.n.n.n.n.`.`.r$r$r$r$r$r$r$/ / / / / / / / / / / [@[@[@1 1 1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 1 1 [@[@[@/ / / / / / / / / / / r$r$r$r$r$r$r$`.`.n.n.n.n.n.n.| | | | | | | ( ( ( ( ( X X X X X X X X Q%Q%Q%} } } } } } } d#u%u%_ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ #%T$: : : : : : : c+c+< < G&K&K&x&L&{.{.{.{.{.M&r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.=.<+~+~+~+~+~+1+1+W.W.W.>@>@O B B o o o o V V m.m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0.R.R.p p p r.r.k.k.k.a.b.b.<.[.[.-.-.-.Q Q R R R q q r r r t t u u v v w x x y y z S S T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&P%Z+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.b+G+4.4.q.q.q.q.v.n n n r#b+< N&($o#T@#&P$D#D%^$a$Y$|%>&;&^&O&^&^&*&p%Y$v$B%P&C#)&Q&!&[#b#i&( M } &_ _ _ _ u%u%d#} } } } } } } Q%Q%Q%X X X X X X X ( ( ( ( ( | | | | | | | n.n.n.n.n.`.`.r$r$r$r$r$r$r$/ / / / / / / / / [@[@[@1 1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 1 [@[@[@/ / / / / / / / / r$r$r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | | ( ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } } d#u%u%_ _ _ _ _ _ _ j+[ [ [ [ [ [ [ #%T$T$: : : : : : c+c+G&K&K&K&S&{.{.{.{.{.M&K.9.r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@B B B o o o @V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r r s t u u v v w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&V !@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.9 H+4.4.q.q.q.q.v.n n n r#K.b+%&z$B@=#F%E%9&2$O#U%i$Y$|%>&;&^&O&^&*&>&{%L%T&/&1$U&r%V&-&i%>$i&1&} } _ _ _ _ u%d#} } } } } } } Q%Q%Q%X X X X X X X ( ( ( ( ( | | | | | | n.n.n.n.n.`.`.r$r$r$r$r$r$/ / / / / / / / / [@[@1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$>$>$>$R&R&R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&R&R&>$>$>$>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 [@[@/ / / / / / / / / r$r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | ( ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } } d#u%_ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ #%T$: : : : : : j@W&K&K&S&{.{.{.{.{.M&K.K.K.9.r#r#r#n n n v.q.q.q.q.4.4.H+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o o V V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R q q r r r s t u u u v w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&,.y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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W$X&G+4.q.q.q.q.v.n n n r#r#K.O.|#D@7%Y&Z&&&M%C#+$k$|&Y$p%;&^&^&^&^&*&p%`&|&k$C%D%D# *%$.*+*a&5%M & &_ _ u%d#d#} } } } } } Q%Q%Q%X X X X X X X ( ( ( ( | | | | | | n.n.n.n.n.n.`.r$r$r$r$r$r$/ / / / / / / / [@[@1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$R&R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&R&>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 [@[@/ / / / / / / / r$r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } d#d#u%_ _ _ _ _ _ _ j+[ [ [ [ [ [ [ #%T$: : : : @*W&W&W&S&{.{.{.{.{.M&b+b+K.K.K.9.r#r#r#n n n v.q.q.q.q.4.G+H+H+H+H+H+g@`+=.=.=.=.=.<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+#+3.0.0.0..+R.R.p p f.r.r.k.k.a.a.b.b.<.[.-.-.-.;.Q R R R q q r r r s t u u u v w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&#*F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i [@4.4.q.q.q.v.n n n r#r#r#n@< |#G#R@b%t%$*D#D%^$k$L%6&*&^&^&O&O&^&>&p%%*v$-%&*V%**=*f&-*h&i&H.} & &_ u%d#} } } } } } Q%Q%Q%X X X X X X X ( ( ( ( | | | | | | n.n.n.n.n.`.`.r$r$r$r$r$/ / / / / / / [@[@1 1 1 1 1 U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+1 1 1 1 1 [@[@/ / / / / / / r$r$r$r$r$r$`.n.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } d#u%_ _ _ _ _ _ _ j+j+[ [ [ [ [ [ #%T$: : @*W&W&W&;*{.{.{.{.{.M&< b+b+K.K.K.K.9.r#r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o o V V m.m.m.m. +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.#+#+#+#+#+3.0.0.0.0.R.R.p p p r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q R R R R q q r r s t u u u v w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$&%&%6%o%o%P%P%3&3&t&t&>*3&*@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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(.u%4.q.q.q.q.n n n r#r#r#9.H#< @%($c%,*#&x$=&1$'*)*Y$p%*&^&^&O&^&*&!*~*Y$z%`$D%{*]*^*`%b%s&5%M } &/*d#d#} } } } } } Q%Q%X X X X X X X ( ( ( ( | | | | | | n.n.n.n.`.`.r$r$r$r$r$/ / / / / / / [@[@1 1 1 1 U+U+U+U+U+U+U+U+U+>$>$>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$>$>$U+U+U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / / r$r$r$r$r$`.`.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%} } } } } } } d#u%_ _ _ _ _ _ _ j+[ [ [ [ [ [ #%T$@*W&W&W&;*{.{.{.{.{.M&< < < b+b+K.K.K.K.9.r#r#r#n n n q.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+~+~+~+~+~+1+1+W.W.>@>@>@O B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R R q q r r s t u u u v w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@P@t#U#8$8$q$&%&%6%o%P%P%P%3&t&t&t&>*(*H.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#< q.q.q.q.v.n n r#r#r#9.K.< f$z$J$W%[#~$9&2$O#U%|&{%>&^&O&O&O&_*;&:*A%|&<*P&[*M%}*!&.*G%i&H.M } /*d#} } } } } } Q%Q%Q%X X X X X X ( ( ( ( | | | | | | n.n.n.n.`.`.r$r$r$r$/ / / / / / / [@[@1 1 1 1 U+U+U+U+U+U+U+U+>$>$>$>$R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&>$>$>$>$U+U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / / r$r$r$r$r$`.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%} } } } } } d#u%_ _ _ _ _ _ _ j+[ [ [ [ [ [ |*1*W&W&;*{.{.{.{.{.M&< < < < b+b+b+K.K.K.K.9.r#r#r#n n v.q.q.q.q.4.4.H+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o @V V m.m.m.m. +y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&t&>*(*Q.X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d&n q.q.q.v.n n n r#r#9.K.H#< f$:%5%l%n#w#**2*+$k$Y$A%>&^&O&O&3*_*^&>&%*v$-%&*U&4*s%5*r&6*i&1&Q%/*d#} } } } } } Q%Q%X X X X X X ( ( ( ( | | | | | | n.n.n.n.`.r$r$r$r$r$/ / / / / / [@[@1 1 1 1 U+U+U+U+U+U+U+>$>$>$>$R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C C C C C C C C C C C C C C C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$>$U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / r$r$r$r$r$`.n.n.n.n.n.| | | | | ( ( ( ( X X X X X X Q%Q%Q%} } } } } d#d#u%_ _ _ _ _ _ j+[ [ [ [ |*7*7*1*;*{.{.{.{.{.8*c+c+< < < < b+b+b+K.K.K.K.9.r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@>@B B B o o o @V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+#+3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r s t u u u v w w x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*k.i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $+q.q.q.v.n n n r#r#r#9.K.H#< )@($0*e$-&E#O$C#a*b*Y$p%*&^&O&3*c*^&;&p%Y$z%`$D%d*]*e*.*+*a&5%f*Q%M } } } } } Q%Q%X X X X X X X ( ( ( | | | | | | n.n.n.n.`.r$r$r$r$r$/ / / / / / [@1 1 1 1 U+U+U+U+U+U+U+>$>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C C C C C C C y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%y%C C C C C C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$>$U+U+U+U+U+U+U+1 1 1 1 [@/ / / / / / / r$r$r$r$`.n.n.n.n.| | | | | | ( ( ( ( X X X X X X Q%Q%} } } } } } d#u%_ _ _ _ _ _ j+j+[ |*7*7*7*g*{.{.{.{.{.8*: : c+c+< < < < b+b+b+K.K.K.K.9.r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o @V V m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r r t u u u v w w x y y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.=+,+,+,+,+}+5+5+5+n+n+q+B+B+L+P+P+Y++@+@=@'@_@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*d.j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i.P.q.q.q.v.n n r#r#r#9.K.K.H#c+)@($h*_&4$$*y#i*/&v${%p%*&^&3*c*3*^&;&A%L%k$j*k*l*@&#&g&h&i&H.m*M M } } } } Q%Q%X X X X X X ( ( ( ( | | | | | n.n.n.n.`.r$r$r$r$/ / / / / / [@[@1 1 1 U+U+U+U+U+U+U+>$>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C C C y%y%y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%y%C C C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$>$U+U+U+U+U+U+U+1 1 1 [@[@/ / / / / / r$r$r$r$`.n.n.n.n.| | | | | ( ( ( ( X X X X X X Q%Q%} } } } } } d#u%_ _ _ _ _ _ _ H#7*7*7*g*{.{.{.{.{.8*: : : : c+< < < < < b+b+b+K.K.K.9.r#r#r#n n n q.q.q.q.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@>@B B B o o o V V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0..+R.p p p r.r.k.k.a.a.b.b.<.[.-.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.u.N.N.N.N.=+,+,+,+,+}+5+5+5+n+n+q+B+B+L+P+Y+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&9*(*L+B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W$X&q.q.v.n n n r#r#9.K.K.K.H#c+[ J$o#[#%$ $C&&*U%|&{%>&*&3*c*n*3*^&>&{%v$o*,&D&r%p*5*r&s&q*| X M } } } Q%Q%Q%X X X X X ( ( ( ( | | | | | n.n.n.n.`.r$r$r$r$/ / / / / / [@[@1 1 1 U+U+U+U+U+U+>$>$>$>$R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C y%y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%y%C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$>$U+U+U+U+U+U+1 1 1 [@[@/ / / / / / r$r$r$r$`.n.n.n.n.| | | | | ( ( ( ( X X X X X X Q%Q%} } } } } d#u%_ _ _ _ _ o@r*s*7*g*{.{.{.{.{.8*: : : : : c+c+< < < < < b+b+b+K.K.K.9.r#r#r#n n v.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+y+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p r.r.k.k.a.a.b.b.<.[.-.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%6%o%o%P%P%3&3&t&t&>*(*(*q$; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i 1 q.v.n n n r#r#9.K.K.K.H#< : [ 7%b#F%E%]&D&,&k$F$A%>&^&_*n*3*3*;&p%%*t*/&&*=&u*v*w*+*x*n.H.M M } } Q%Q%X X X X X X ( ( ( ( | | | | n.n.n.n.`.`.r$r$r$r$/ / / / / [@[@1 1 U+U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 C C C C C y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y*y*y*y*y*y*y*Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+y*y*y*y*y*y*y*y*] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%C C C C C 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+U+U+1 1 1 [@/ / / / / / r$r$r$r$`.n.n.n.n.| | | | | ( ( ( X X X X X X Q%Q%} } } } } } d#u%_ _ o@r*r*r*g*{.{.{.{.{.8*#%T$: : : : : c+c+< < < < < b+b+K.K.K.K.9.r#r#n n n v.q.q.q.4.4.G+H+H+H+H+`+`+=.=.=.=.<+<+~+~+~+Q.1+1+W.W.>@>@O B B o o o @V V m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.[.-.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*t&*@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (.d#q.v.n n r#r#r#9.K.K.K.< < : :%7%Y&n#&&E&D%^$k$Y$A%*&_*c*n*3*3*;&A%z*z%`$D%)&Q&!&A*x+[@B*X M } } Q%Q%X X X X X X ( ( ( | | | | | n.n.n.n.`.r$r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 2 2 2 C C C C C y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y*y*y*y*Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+y*y*y*y*] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%C C C C 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$U+U+U+U+U+U+1 1 1 [@/ / / / / / r$r$r$`.`.n.n.n.| | | | | ( ( ( ( X X X X X Q%Q%} } } } } } d#u%o@r*r*r*g*{.{.{.{.{.8*[ [ #%T$: : : : : c+c+< < < < b+b+b+K.K.K.K.r#r#r#n n v.q.q.q.q.4.G+H+H+H+H+g@`+`+=.=.=.<+<+~+~+~+~+Q.1+W.W.>@>@>@O B B o o o V V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+#+3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+}+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#8$8$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#c+v.n n n r#r#9.K.K.K.b+< < @%($&$G%/%=*O$D%'*z%Y$p%;&_*n*3*3*^&>&C*z*<*,&J&r%p*D*E*l%i&H.M M } Q%Q%X X X X X ( ( ( ( | | | | n.n.n.n.`.r$r$r$r$/ / / / / [@[@1 1 U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 2 2 C C C C y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] y*y*y*Z+Z+Z+Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+Z+Z+y*y*y*] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%C C C C 2 2 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+U+1 1 1 [@/ / / / / r$r$r$r$`.n.n.n.n.| | | | | ( ( ( X X X X X Q%Q%Q%} } } } } f$F*r*r*g*{.{.{.{.{.8*[ [ [ [ T$: : : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#r#n n v.q.q.q.4.4.G+H+H+H+H+`+`+=.=.=.=.<+<+~+~+~+Q.1+1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+y+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.R.p p f.r.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*W.X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I@r#v.n n r#r#r#K.K.K.K.b+b+f$@%($y$e$5*@&D#1$'*n&Y$p%^&n*n*n*3*^&>&{%v$B%&*U&G*v*H*I*6*`.H.M } Q%Q%X X X X X ( ( ( | | | | | n.n.n.`.`.r$r$r$/ / / / / [@[@1 1 U+U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 C C C C y%y%] ] ] ] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@3 3 3 3 3 3 3 3 3 w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.3 3 3 3 3 3 3 3 3 6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+y*y*y*] ] ] ] ] ] ] ] ] ] ] y%y%y%C C C C 2 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+U+1 1 1 [@/ / / / / r$r$r$r$`.n.n.n.| | | | | ( ( ( X X X X X X Q%Q%} } } E@J*K*F*g*{.{.{.{.{.8*[ [ [ [ [ #%T$: : : : : : c+< < < < < b+b+K.K.K.K.9.r#r#n n n q.q.q.q.4.G+H+H+H+H+g@`+`+=.=.=.<+<+~+~+~+~+Q.1+W.W.>@>@O B B o o o @V V m.m.m. + +y+y+y+y+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*<.i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > v.n n r#r#r#9.K.K.K.b+b+< : z$($y$i%t%P$=&o&U%|&{%!*3*3*n*n*3*^&L*%*M*/& %{* *N*0&+*a&B*X f*Q%X X X X X X ( ( ( | | | | | n.n.n.`.r$r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] ] ] ] y*y*y*Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@3 3 3 3 3 w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.3 3 3 3 6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] ] ] y%y%C C C C 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+U+1 1 [@[@/ / / / / r$r$r$`.n.n.n.n.| | | | ( ( ( X X X X X X Q%Q%} E@J*J*J*g*{.{.{.{.{.8*_ j+[ [ [ [ [ #%T$: : : : : c+c+< < < < < b+b+K.K.K.9.r#r#r#n n v.q.q.q.4.4.G+H+H+H+H+`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o V V m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%6%o%o%P%P%3&3&t&t&>*(*(*(*(*O*j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 n n n r#r#9.K.K.K.K.b+b+f$: z$m%P*r&%$9&(&!%l$Q*p%;&3*3*n*n*3*^&!*%*z%`$D%R*S*!&T*U*i&H.( f*X X X X X X ( ( ( | | | | n.n.n.n.`.r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@3 3 3 3 w.w.w.w.w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.w.w.w.w.w.w.3 3 3 6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] ] y%y%C C C C 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 1 [@/ / / / / r$r$r$r$`.n.n.n.| | | | ( ( ( ( X X X X X Q%V*J*J*J*W*{.{.{.{.{.8*_ _ _ [ [ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#n n n v.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+B+B+L+P+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*q+y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X*Y*n n r#r#r#9.K.K.K.b+b+< f$: z$m%W%[#E%9&2$+$k$L%p%^&3*3*n*n*Z*^&!*Y$z%P&[*`* =D*T*6*`..=( X X X X X ( ( ( ( | | | | n.n.n.`.r$r$r$r$/ / / / / [@1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@3 3 w.w.w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&+=+=+=+=+=+=+=+=+=+=+={ { { { { { { { { { { +=+=+=+=+=+=+=+=+=+=+=X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.w.w.w.3 3 3 6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 1 [@/ / / / r$r$r$r$`.n.n.n.| | | | | ( ( ( X X X X f#J*J*J*W*{.{.{.{.{.8*_ _ _ _ j+[ [ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+K.K.K.K.r#r#r#n n v.q.q.q.4.4.G+H+H+H+H+`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R q q r r r t t u u v w w x x y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#8$8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=+@$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.#=n n r#r#9.K.K.K.b+b+b+< f$: H%1&W%[#.%r%2*,&b*z*>&^&3*3*n*c*c*^&p%z*b*,&$=%=p*&=I*a&*=( H.X X X X ( ( ( | | | | | n.n.n.`.r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@3 3 3 w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&X&X&+=+=+=+=+={ { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { +=+=+=+=+=X&X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 [@/ / / / / r$r$r$`.n.n.n.n.| | | | ( ( ( X X f#====J*W*{.{.{.{.{.8*u%_ _ _ _ _ j+[ [ [ [ [ [ T$: : : : : : c+< < < < b+b+b+K.K.K.9.r#r#n n n v.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+Q.1+W.W.W.>@>@O B B o o o V V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R R q r r r t t u u v w w x y y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=_@% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i.3@n r#r#r#9.K.K.K.b+b+< f$f$: _ 1&b#F%.%7&C#-=T&%*>&^&3*n*;=n*n*^&p%z*<*>=,=r%^*w*b%'=`.| H.X X X ( ( ( | | | | | n.n.n.`.r$r$r$/ / / / / [@1 1 U+U+U+U+U+>$>$R&R&^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+6@6@6@6@6@6@6@6@3 3 w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&+=+=+=+={ { { { { { { { { { { { { { { { { { { { { )=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)={ { { { { { { { { { { { { { { { { { { { { +=+=+=X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@6@6@Z+Z+Z+y*y*] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$U+U+U+U+U+1 1 1 [@/ / / / r$r$r$r$`.n.n.n.| | | | ( ( ( f#======!={.{.{.{.{.8*} d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+K.K.K.K.9.r#r#n n v.q.q.q.4.4.G+H+H+H+g@`+`+=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@O B B o o o V V m.m.m. + +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.a.b.<.<.[.-.-.-.Q R R R R q r r r t t u u v w w x y y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=t#G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.~ n r#r#9.K.K.K.b+b+b+< f$f$@%_ 1&G%F%s%M%C#`$n&{%>&^&3*n*;=n*c*;&p%Q*U%&*{=]=w&.*+*'=`.| H.X X ( ( ( | | | | n.n.n.n.`.r$r$r$/ / / / [@1 1 1 U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] y*Z+Z+Z+Z+6@6@6@6@6@6@6@3 3 w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&+=+=+={ { { { { { { { { { { { { { )=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)={ { { { { { { { { { { { { { +=+=+=X&X&X&X&X&X&X&w.w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@6@Z+Z+Z+y*y*] ] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 [@/ / / / r$r$r$r$`.n.n.n.| | | | ( ^=/=====!={.{.{.{.{.8*} } } u%_ _ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+< < < < < b+b+K.K.K.9.r#r#n n n v.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.a.b.<.<.[.-.-.-.Q R R R R q r r r t t u u v w w x y y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+}+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&>*(*(*(*(*~=q$@@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.{ r#r#r#9.K.K.K.b+b+< < < f$T$_ y$e$-&E#M%D%(=v${%>&3*3*;=;=n*c*;&p%|&_=&*=&v&:=T*h&x*`.| H.X ( ( ( | | | | n.n.n.`.r$r$r$r$/ / / / [@1 1 U+U+U+U+U+>$>$R&R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@6@3 3 w.w.w.w.w.w.X&X&X&X&X&X&X&+=+={ { { { { { { { { { { { )=)=)=)=)=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)=)=)=)=)={ { { { { { { { { { { { +=+=X&X&X&X&X&X&X&w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@Z+Z+Z+Z+y*] ] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&>$>$U+U+U+U+U+1 1 [@/ / / / / r$r$r$`.n.n.n.| | | D@/=/=/=!={.{.{.{.{.8*} } } } d#u%_ _ _ _ _ _ [ [ [ [ [ [ T$: : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#n n v.q.q.q.4.4.H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+Q.1+W.W.>@>@>@B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p f.r.k.k.a.a.b.b.<.[.-.-.-.Q R R R R q r r r t t u u v w w x y y z S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%P%3&t&t&t&9*(*(*(*@=~=P%a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4@w.r#r#9.K.K.K.b+b+b+< < < f$[ $&h*e$-&e&u& %-%|&A%;&^&c*;=n*n*c*;&~*<=_= %[=Q&!&}=|=[@`.H.X ( ( ( | | | | n.n.n.`.r$r$r$/ / / / / [@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@6@6@3 3 w.w.w.w.w.w.X&X&X&X&X&X&+=+={ { { { { { { { { { )=)=)=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)=)={ { { { { { { { { { +=+=X&X&X&X&X&X&X&w.w.w.w.w.3 3 6@6@6@6@6@6@6@Z+Z+Z+y*y*] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ R&R&>$>$U+U+U+U+1 1 1 [@/ / / / r$r$r$`.n.n.n.| D@1=1=/=2={.{.{.{.{.8*Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+K.K.K.9.r#r#n n n q.q.q.q.4.G+H+H+H+H+`+`+=.=.=.<+<+~+~+~+Q.1+1+W.W.>@>@O B B o o @V V m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p f.r.k.k.a.a.b.b.<.[.-.-.-.Q R R R q q r r r t t u u v w x x y y z S T T T ,.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@=@'@_@_@7@7@i@i@H@P@P@t#U#8$8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=3&x.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.y%r#r#9.K.K.K.b+b+< < < f$T$[ $&h*b%-&3${*1$-%v${%;&^&n*n*n*n*c*;&~*M*/&3=)&}*4=-*U*[@`.H.X ( ( | | | | n.n.n.`.r$r$r$/ / / / / [@1 1 U+U+U+U+>$>$R&R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@3 3 w.w.w.w.w.X&X&X&X&X&X&+=+={ { { { { { { { { )=)=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)={ { { { { { { { { +=+=X&X&X&X&X&X&w.w.w.w.w.3 3 6@6@6@6@6@6@Z+Z+Z+y*y*] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&>$>$U+U+U+U+U+1 1 [@/ / / / r$r$r$`.n.n.5=1=1=1=2={.{.{.{.{.8*X X Q%} } } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+< < < < b+b+b+K.K.K.r#r#r#n n v.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@O B B o o o V V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.p p p f.r.r.k.a.a.b.b.<.[.-.-.-.Q R R R q q r r r t t u u v w x x y y z S T T T ,.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=>*9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . s+6=r#r#K.K.K.b+b+b+< < < f$: H% &y$b%-&P$d*&*U%|&A%;&c*n*;=;=n*^&7=8=M*/&3=l* =4=E*6*[@| H.( ( | | | | n.n.n.`.r$r$r$/ / / / [@1 1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 2 C C y%y%] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@3 3 w.w.w.w.w.X&X&X&X&X&+=+={ { { { { { { { )=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)={ { { { { { { { +=+=X&X&X&X&X&X&w.w.w.w.w.3 3 6@6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+1 1 [@/ / / / r$r$r$`.5=9=9=1=2={.{.{.{.{.8*X X X Q%Q%} } } } } d#_ _ _ _ _ _ [ [ [ [ [ [ T$: : : : : c+c+< < < < b+b+K.K.K.9.r#r#n n n q.q.q.4.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.0.0.0.0.R.p p p f.r.r.k.a.a.b.b.<.[.-.-.-.Q R R R q q r r r t t u u v w x x y y z S T T T ,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+n+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&>*(*(*(*(*~=~=(*m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.U+r#9.K.K.K.b+b+< < < < c+: H%$&h*b%-&P$i#>=<*L%A%^&n*n*;=;=n*c*7=0=t*a='&b= =c=r&6*d=| .=( ( | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C C y%] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@3 w.w.w.w.w.X&X&X&X&X&+=+={ { { { { { { { )=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)={ { { { { { { { +=X&X&X&X&X&X&w.w.w.w.3 3 6@6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] ] y%C C 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ R&R&>$>$U+U+U+U+1 1 [@/ / / / r$r$($e=9=9=2={.{.{.{.{.8*( X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+< < < < b+b+K.K.K.K.r#r#r#n n v.q.q.q.4.G+H+H+H+H+`+`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@>@B B o o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.a.a.b.b.<.[.-.-.-.Q R R R q q r r r t u u u v w x x y y S S T T T ,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%P%3&t&t&t&9*(*(*(*@=~=~=~=6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f=r$r#K.K.K.K.b+b+< < < < c+@%H%$&h*b%f& *i#>=k$L%p%^&n*n*;=;=c*g=!*%*t*-=[*h=p&&=r&6*d=.=.=( | | | | n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 C C C y%] ] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@3 3 w.w.w.w.X&X&X&X&X&+=+={ { { { { { { )=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)={ { { { { { { +=+=X&X&X&X&X&w.w.w.w.w.3 6@6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] y%y%C C 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ R&>$>$U+U+U+U+1 1 [@/ / / / ($j=j=e=2={.{.{.{.{.8*( ( X X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ T$: : : : : c+c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B B o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.a.a.b.b.<.[.-.-.;.Q R R R q q r r r t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+}+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+| 9.K.K.K.b+b+< < < < c+: [ H%$&h*b%k=]*U&>=<*L%p%c*n*n*;=n*l=Z*!*%*b*-=$=h=m=&=I*6*[@.=.=| | | | n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+>$>$R&R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%y%] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@3 3 w.w.w.w.X&X&X&X&X&+={ { { { { { { )=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=i=i=i=i=i=i=i=D D D D D D D D D D D D D D D D D D D D D D D i=i=i=i=i=i=i=i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)={ { { { { { { +=+=X&X&X&X&w.w.w.w.w.3 6@6@6@6@6@6@Z+Z+y*y*] ] ] ] ] ] y%C C C 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ R&>$>$U+U+U+U+1 1 [@/ / m%n=j=j=o={.{.{.{.{.8*| | ( ( X X X X X Q%} } } } } d#_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+< < < < b+b+K.K.K.9.r#r#n n n q.q.q.4.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.b.<.[.-.-.;.Q R R R q q r r r t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@=@'@_@_@7@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=y*. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p=X 9.K.K.K.b+b+< < < < c+@%@%H% &h*r&k= *U&+$k$Y$!*c*n*;=;=l=c*c*!*`&<*P&D&4*^*w*+*a&*=.=`.| | | n.n.n.`.r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@3 3 w.w.w.w.X&X&X&X&+=+={ { { { { { )=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=i=D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D i=i=i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.g.g.)=)=)=)=)={ { { { { { { +=X&X&X&X&X&w.w.w.w.3 6@6@6@6@6@6@Z+Z+y*] ] ] ] ] ] y%y%C C 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ R&>$>$U+U+U+U+1 1 [@m%n=n=n=o={.{.{.{.{.8*| | | ( ( ( X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%: : : : : c+c+< < < b+b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+`+=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o V V m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=[@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . q=m*K.K.K.b+b+b+< < < c+c+: @%[ &h*I*!& *i#+$k$%*!*c*n*;=;=l=;=c*p%z*B%>=,=G*r=w*s='=*=r$`.| | n.n.n.`.r$r$r$/ / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C y%y%] ] ] ] ] ] y*Z+Z+6@6@6@6@6@3 3 w.w.w.w.X&X&X&X&+=+={ { { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D t=t=t=t=t=t=t=t=D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.g.g.)=)=)=)=)={ { { { { { +=X&X&X&X&X&w.w.w.w.3 6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] y%C C 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ R&>$>$U+U+U+U+1 J$u=n=n=v={.{.{.{.{.8*n.| | | | ( ( ( X X X X Q%Q%} } } } d#u%_ _ _ _ _ [ [ [ [ [ #%T$: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+H+`+`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o o V V m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q q r r s t u u u v w x x y z S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+n+n+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=w=x+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J `.K.K.K.b+b+< < < < c+c+: @%H%$&P*I*!& *i#>=k$Y$!*c*n*n*;=;=n*c*p%z*<*x=,=]=r=y=+*'=*=r$| | n.n.n.`.r$r$r$/ / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&+=+={ { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=D D D D D D D D D D D D D D D D D D t=t=t=t=t=t=_._._._._._._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._._._._._._._.t=t=t=t=t=t=D D D D D D D D D D D D D D D D D i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.)=)=)=)=)={ { { { { { +=X&X&X&X&X&w.w.w.w.3 6@6@6@6@6@Z+Z+y*] ] ] ] ] ] y%C C C 2 2 2 2 2 x+x+^ ^ ^ ^ ^ R&>$>$U+U+U+z=A=A=u=v={.{.{.{.{.B=`.n.n.| | | | ( ( X X X X X Q%} } } } } u%_ _ _ _ _ j+[ [ [ [ [ #%: : : : : c+< < < < b+b+b+K.K.K.r#r#n n n q.q.q.4.4.H+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o o @V m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q q r r s t u u v v w x x y z S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h >$K.K.K.b+b+< < < < c+: @%@%H%$&i&r&F& *i#>=C=Y$!*c*n*n*;=;=n*_*p%D=o*&*{=v&:=E=+*F=[@`.| | n.n.`.r$r$r$/ / / / [@1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%] ] ] ] ] ] y*Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&+=+={ { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D D D D D D D t=t=t=_._._._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._._.t=t=t=t=D D D D D D D D D D D D D D i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.)=)=)=)={ { { { { { +=X&X&X&X&w.w.w.w.3 3 6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] y%C C 2 2 2 2 2 x+x+^ ^ ^ ^ ^ R&>$>$U+z=A=A=A=v={.{.{.{.{.B=r$`.n.n.n.| | | | ( ( X X X X Q%Q%} } } } d#u%_ _ _ _ _ [ [ [ [ [ #%T$: : : : c+c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B o o o @V m.m.m. + +y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q q r r s t u u v v w x y y z S S T T ,.,.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*(*~=~=~=~=w=P.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W$y%K.K.b+b+b+< < < c+c+: : @%[ G=a&r&F& *i#>=z%Y$!*c*n*;=;=;=n*_*p%D=H=&*d*v&k=}=I=>$r$`.| n.n.`.r$r$r$/ / / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C C y%] ] ] ] ] y*Z+Z+Z+6@6@6@6@3 3 w.w.w.X&X&X&X&+=+={ { { { { )=)=)=)=)=g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D D D D D t=t=t=_._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._.t=t=t=D D D D D D D D D D D D i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.g.)=)=)=)={ { { { { { +=X&X&X&X&w.w.w.w.3 6@6@6@6@6@Z+Z+y*] ] ] ] ] ] y%C C 2 2 2 2 2 x+x+^ ^ ^ ^ ^ R&>$7%A=A=A=v={.{.{.{.{.B=/ r$r$`.n.n.n.| | | ( ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ [ T$: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+`+=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B o o o @V m.m.m. + +y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.k.k.a.a.b.<.<.[.-.-.;.Q R R R q q r r s t u u v w w x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=~=, . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;@w.K.K.b+b+< < < < c+: : : @%H%} x*i%F&P$i#J=b*%*!*c*n*;=K=;=n*_*C*|&L= %[=Q&k=M=I=N=r$`.n.n.n.`.r$r$/ / / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] ] ] ] ] ] y*Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&+={ { { { { )=)=)=)=g.g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D D D t=t=_._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=P=P=P=P=P=P=P=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._.t=t=t=D D D D D D D D D D D i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.)=)=)=)={ { { { { { +=X&X&X&X&w.w.w.3 3 6@6@6@6@Z+Z+Z+y*] ] ] ] ] y%C C 2 2 2 2 2 x+x+^ ^ ^ ^ ^ 5%A=A=A=v={.{.{.{.{.B=/ / r$r$r$`.n.n.| | | | ( ( X X X X X Q%} } } } d#u%_ _ _ _ _ [ [ [ [ [ #%T$: : : : c+c+< < < b+b+b+K.K.9.r#r#n n n q.q.q.4.G+H+H+H+H+`+`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=Q=; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i.R=K.K.b+b+< < < < c+: : : @%[ Q%c%i%F&P$i#>=b*Y$!*c*l=;=K=;=n*^&C*Q*L= %u&}*k=M=U*N=r$*=n.n.`.r$r$r$/ / / [@1 1 U+U+U+U+>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] ] ] ] ] ] y*Z+Z+6@6@6@6@6@3 w.w.w.X&X&X&X&+={ { { { { )=)=)=)=g.g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D D D D t=t=_._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=O=O=P=P=P=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 P=P=P=P=P=O=O=O=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._.t=t=D D D D D D D D D D i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.)=)=)=)={ { { { { +=+=X&X&X&w.w.w.w.3 6@6@6@6@6@Z+Z+y*] ] ] ] ] y%C C 2 2 2 2 2 x+x+^ ^ ^ q*S=A=A=T={.{.{.{.{.B=/ / / / r$r$r$`.n.n.| | | | ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ [ T$: : : : : c+< < < < b+b+K.K.K.9.r#r#n n q.q.q.4.4.H+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R q q r r t t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+n+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@i@P@P@t#U#8$8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=t&m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.*@K.b+b+b+< < < c+c+: : : @%_ Q%c%i%F&P$U=,&b*Y$!*c*l=K=;=;=c*^&C*M*/&V=l*S*W=X=U*N=r$*=n.`.r$r$r$/ / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] ] ] ] ] y*y*Z+Z+6@6@6@6@3 w.w.w.w.X&X&X&+=+={ { { { { )=)=)=)=g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D D D t=t=_._.*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=P=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 P=P=P=P=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D D i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.)=)=)=)={ { { { { +=X&X&X&X&w.w.w.3 6@6@6@6@6@Z+Z+y*] ] ] ] ] y%C C 2 2 2 2 2 x+x+^ q*S=S=S=T={.{.{.{.{.Y=1 [@/ / / / r$r$`.n.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ _ [ [ [ [ [ #%: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R q r r r t t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=w=o%Z=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 K.b+b+< < < < c+: : : : @%`=M i&b%t%P$U=>=b*Y$p%g=;=;=;=;=c*7=C*t*a='&b= -&=.-U*N=/ *=n.`.r$r$/ / / / [@1 U+U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] ] ] ] ] y*Z+Z+6@6@6@6@6@3 w.w.w.X&X&X&X&+={ { { { { )=)=)=)=g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D t=_._.*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 P=P=P=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.)=)=)=)={ { { { { +=X&X&X&w.w.w.w.3 6@6@6@6@Z+Z+y*] ] ] ] ] y%C C 2 2 2 2 2 x+y$S=S=S=T={.{.{.{.{.Y=U+1 1 [@/ / / r$r$r$`.n.n.| | | | ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ #%T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q r r r t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=U#K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z.K.b+b+< < < < c+: : : : @%j+$&i&b%t%Q&=&>=<*Y$p%c*;=;=;=;=c*^&%*t*-=k*b= -W=.-U*N=/ *=`.r$r$r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ ^ x+2 2 2 2 2 C C y%] ] 2 +-+-@-#-#-#-#-#-#-#-#-$-w.w.X&X&X&+=+={ { { { )=)=)=)=g.g.g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D D t=_._.*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 6 6 6 P=P=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.)=)=)={ { { { { +=X&X&X&X&w.w.w.3 6@6@6@6@Z+Z+y*] ] ] ] ] ] C C 2 2 2 2 x*%-%-S=T={.{.{.{.{.Y=U+U+U+1 1 [@/ / / r$r$r$n.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ j+[ [ [ [ [ T$: : : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o o V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R q q r r r t u u u v w x x y z S S T T ,.,.d.d.2.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=~=~=w=w=_@y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > K.b+b+< < < c+c+: : : : [ j+$&5%b%`%}*=&&*<*z*7=Z*;=;=;=;=c*^&%*&--=$=%=p&c=.-6*F=/ *=r$r$r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] 2 *-*-*-=-=-=-=-=-------;-X&X&X&+={ { { { { )=)=)=g.g.g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D t=_._.*@*@*@*@*@*@*@*@*@*@O=O=O=O=P=P=6 6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 6 P=P=P=O=O=O=O=*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.)=)=)=)={ { { { +=+=X&X&X&w.w.w.3 6@6@6@6@Z+Z+Z+y*] ] ] ] ] C C 2 2 x*>->-%-T={.{.{.{.{.Y=>$U+U+U+U+1 [@/ / / / r$r$`.n.n.n.| | | ( ( X X X X Q%Q%} } } } u%_ _ _ _ _ j+[ [ [ [ #%: : : : : c+< < < < b+b+K.K.K.9.r#r#n n q.q.q.4.4.H+H+H+H+`+`+=.=.=.<+~+~+~+~+1+1+W.>@>@O B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v v w x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+n+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=w=w=B+j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - b+b+b+< < < c+c+: : : : [ _ $&5%h&`%}*{*&*B%z*:*Z*;=;=;=l=c*^&%*T&P&$=,-m='-I*6*F=*=`.r$r$/ / / / [@1 U+U+U+U+>$>$^ ^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] ] y*y%*-=-=-=-=-=-----------$-X&+={ { { { )=)=)=)=g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=t=_.*@*@*@*@*@*@*@*@*@O=O=O=O=P=P=6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 P=P=O=O=O=O=*@*@*@*@*@*@*@*@*@_._.t=D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.)=)=)={ { { { { +=X&X&X&w.w.w.3 6@6@6@6@6@Z+Z+y*] ] ] ] y%C C x*)-!-S=~-{.{.{.{.{.Y=R&>$>$U+U+U+1 1 [@/ / / r$r$r$`.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n v.q.q.4.4.H+H+H+H+`+`+=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w w x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=,+g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b b+b+< < < < c+: : : : : :&_ $&5%h&&=e&)& %B%Q*L*c*;=;=;=;=c*!*`&T&{-]-]=^-'-/-N+F=x*r$r$r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C y%] ] ] ] ] y*Z+Z+] =-=-=-=---------------$-{ { { { )=)=)=)=g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=_._.*@*@*@*@*@*@*@*@O=O=O=O=P=P=6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 P=P=O=O=O=*@*@*@*@*@*@*@*@*@_.t=t=D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.)=)=)=)={ { { { +=X&X&X&w.w.w.w.3 6@6@6@6@Z+Z+y*] ] ] ] (-_-:-<-[-~-{.{.{.{.{.Y=^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$`.n.n.n.| | | ( ( X X X X Q%Q%} } } } u%_ _ _ _ _ [ [ [ [ [ T$: : : : c+c+< < < b+b+b+K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=e.E+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . & b+b+< < < < c+: : : : T$:&H% &5%b#E=p*l*}-U%D=L*c*;=;=;=;=c*^&`&T&{-]-|-^*'-/-N+/ x*r$r$/ / / / 1 1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C C ] ] ] ] ] y*Z+Z+6@6@] =-=-------------1-2-2-3-{ { )=)=)=g.g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=_._.*@*@*@*@*@*@*@*@O=O=O=P=P=6 6 6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+6 6 6 6 6 6 6 6 P=P=O=O=O=*@*@*@*@*@*@*@*@_._.t=D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.)=)=)={ { { { +=X&X&X&X&w.w.w.3 6@6@6@6@Z+Z+y*2 4-5-u=6-:-7-W*{.{.{.{.{.Y=^ ^ ^ ^ R&>$U+U+U+U+1 [@/ / / / r$r$`.n.n.| | | ( ( ( X X X X Q%} } } } d#_ _ _ _ _ j+[ [ [ [ #%: : : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@i@P@P@t#U#8$8$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=x 7.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e c+b+< < < c+c+: : : : T$[ H% &5%s&E=s%M%D%/&D=p%_*n*;=;=;=8-^&`&C=J=U=]=r=w*I*N+'=[@[@r$/ / / [@1 U+U+U+U+>$R&^ ^ ^ ^ ^ x+2 2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@6@y*------------1-2-2-2-2-3-)=)=)=g.g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=_.*@*@*@*@*@*@*@*@O=O=O=P=P=6 6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+6 6 6 6 6 6 6 P=O=O=O=O=*@*@*@*@*@*@*@_._.t=D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.)=)=)={ { { { +=+=X&X&X&w.w.w.3 6@6@6@6@9-0-a-a-u=b-b-6-c-{.{.{.{.{.Y=x+^ ^ ^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$r$n.n.n.| | | ( ( X X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.r.k.k.a.b.<.<.[.-.-.;.Q R R R q q r r t t u u v w x x y z S S T T >.,.d.d.2.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+n+q+B+L+L+P+Y+Y++@=@'@_@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=;.W$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j T$b+< < < c+c+: : : : T$[ H% &1&a&.*v*E&'&E$Q*p%_*n*;=;=;=8-^&%*T&J=,=|-r=y=I*>$[@[@r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@6@3 w.Z+--------1-2-2-2-2-d-d-Z+)=g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=D D D D D D D t=_.*@*@*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.{+{+{+{+{+{+6 6 6 6 6 6 P=P=O=O=O=*@*@*@*@*@*@*@_._.t=D D D D D D D i=i=~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.)=)=)={ { { { { +=X&X&X&w.w.w.3 C e---*-*-*-u=b-<-f-g-{.{.{.{.{.Y=2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 1 / / / / r$r$`.n.n.| | | ( ( ( X X X Q%Q%} } } } u%_ _ _ _ _ [ [ [ [ [ T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q r r r t u u u v w x x y z S S T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ m*b+< < < c+: : : : : #%[ H%_ 1&>$g&E%r%[*h-<=p%_*;=;=;=K=8-^&`&T&{-,=]=^*E=$->$1 [@r$/ / / [@1 U+U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] ] y*Z+6@6@6@6@3 w.w.w.6@----1-2-2-2-i-j-j-j-j-k-l-l-l-l-l-m-~ ~ ~ ~ ~ ~ ~ i=i=D D D D D D D t=_._.*@*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.-+-+-+-+-+-+o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.-+-+-+-+-+-+C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.{+{+{+{+{+6 6 6 6 6 6 6 P=O=O=O=*@*@*@*@*@*@*@_._.t=D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.)=)=)=)={ { { { +=X&X&X&w.n-o-=-=-=-=-*-p-q-Y={.{.{.{.{.{.{.Y=2 2 2 x+^ ^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$r$n.n.n.| | | ( ( X X X X Q%} } } } d#_ _ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.b.b.<.[.[.-.-.Q Q R R q q r r s t u u v v w x y y z S T T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W$^ < < < < c+: : : : T$#%[ H%_ M '=g&!&u*D&a=M*p%_*n*;=;=K=8-^&r-T&{-,=]=r=E=$-|=1 [@/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ x+2 2 2 2 2 C y%] ] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&6@1-2-2-2-2-d-s-{.{.{.{.{.{.{.{.{.{.t-~ ~ ~ ~ ~ i=i=D D D D D D t=_._.*@*@*@*@*@*@O=O=O=P=P=6 6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.P.) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.-+-+-+-+o.o.o.o.o.o.o.o.o.o.m m m m m m m m m m m m m m m m m m m m m m m m m m m m m o.o.o.o.o.o.o.o.o.o.o.-+-+-+-+C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.{+{+{+{+{+6 6 6 6 6 6 P=O=O=O=*@*@*@*@*@*@*@_.t=t=D D D D D D i=i=~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.)=)=)={ { { { +=I=u---------=-=-S=v-g-{.{.{.{.{.{.{.{.Y=2 2 2 2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 1 / / / / r$r$`.n.n.| | | ( ( X X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ #%: : : : : c+< < < b+b+b+K.K.9.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w w x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.)+< < < < c+: : : : T$#%[ H%_ M a&r&#&]*U&j*t*0=_*n*;=K=K=8-^&r-t*j*,=|-w-x-$-x+1 [@/ / / [@1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&X&+=w.2-2-2-d-d-d-:-{.{.{.{.{.{.{.{.{.{.t-~ ~ i=i=i=D D D D D D t=_.*@*@*@*@*@*@*@O=O=P=P=6 6 6 6 6 6 {+{+{+{+P.P.P.P.P.P.P.) ) ) ) ) ) ) ) 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.-+-+-+o.o.o.o.o.o.o.m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m o.o.o.o.o.o.o.-+-+-+C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.{+{+{+{+6 6 6 6 6 6 P=P=O=O=*@*@*@*@*@*@*@_.t=D D D D D D i=i=i=~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.)=)=)={ { y-z-1-----------A-B-{.{.{.{.{.{.{.{.{.{.Y=C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+U+1 [@/ / / r$r$`.n.n.n.| | | ( ( X X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < < b+b+K.K.9.r#r#n n v.q.q.4.4.H+H+H+H+`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=Q=m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Q+< < < c+c+: : : : T$[ [ H%_ $&i&b%5*Q&C-J=z%0=^&n*;=K=K=8-_*C*t*-=D-|-^*x-I*E-1 F=F=/ [@1 1 U+U+U+>$>$^ ^ ^ ^ ^ x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@6@3 w.w.X&X&X&+={ { w.2-d-d-d-F-F-:-{.{.{.{.{.{.{.{.{.{.t-i=i=D D D D D D t=_.*@*@*@*@*@*@*@O=O=P=P=6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.) ) ) ) ) ) ) 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.-+-+o.o.o.o.o.o.m m m m m m m m m m m m m m m m m m m m m m m m ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' m m m m m m m m m m m m m m m m m m m m m m m m o.o.o.o.o.o.-+-+C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 ) ) ) ) ) ) ) ) P.P.P.P.P.P.{+{+{+{+6 6 6 6 6 6 P=O=O=O=*@*@*@*@*@*@_._.t=D D D D D D i=i=~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.)=G-H-2-2-2-2-1---I-J-K-{.{.{.{.{.{.{.{.{.{.{.Y=] y%C 2 2 2 2 2 x+^ ^ ^ ^ R&>$>$U+U+U+1 1 / / / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } d#_ _ _ _ _ [ [ [ [ [ T$: : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.4.4.H+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0.R.R.p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v w x x y z S S T T >.,.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=U#K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . L-< < < c+c+: : : : #%[ [ H%_ Q%i&+*5*@&d*M-b*%*^&l=;=K=K=;=Z*C*t*N-D-|-^*x-I*E-1 F=/ / [@1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] ] y*Z+6@6@6@6@3 w.w.w.X&X&+={ { { { X&d-d-F-F-F-F-:-{.{.{.{.{.{.{.{.{.{.t-D D D D D t=t=_.*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.) ) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.C.C.-+-+-+o.o.o.o.o.m m m m m m m m m m m m m m m m ' ' ' ' ' Q+Q+Q+Q+Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+Q+Q+Q+Q+' ' ' ' ' m m m m m m m m m m m m m m m m o.o.o.o.o.-+-+-+C.C.C.C.C.C.C.C.7 7 7 7 7 ) ) ) ) ) ) ) P.P.P.P.P.P.{+{+{+{+{+6 6 6 6 6 P=O=O=O=*@*@*@*@*@*@_.t=D D D D D D i=i=~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.O-z-d-d-d-2-2-2-P-Q-{.{.{.{.{.{.{.{.{.{.{.{.{.R-] ] ] C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( ( X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ T$: : : : c+c+< < < b+b+K.K.K.r#r#n n v.q.q.q.4.H+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+z+l+l+l+l+:.:.:.:.2+#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u u v w x x y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=,+J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . % < < < c+: : : : : #%[ [ [ H%Q%5%h&w*p*R*&*B%`&!*c*K=K=K=;=c*:*D=/&k*%=S-q&T-x+U+F=/ / 1 1 U+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&+={ { { { )=)=X&F-F-F-F-F-U-:-{.{.{.{.{.{.{.{.{.{.t-D D D t=_.*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.) ) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.C.C.-+-+o.o.o.o.m m m m m m m m m m m m m m ' ' ' Q+Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+Q+' ' ' m m m m m m m m m m m m m m o.o.o.o.-+-+C.C.C.C.C.C.C.C.7 7 7 7 7 ) ) ) ) ) ) P.P.P.P.P.P.{+{+{+{+6 6 6 6 6 6 P=O=O=*@*@*@*@*@*@_._.t=D D D D D i=i=i=~ ~ ~ ~ ~ ~ )+V-W-F-F-F-F-d-d-X-Y-{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.Z-] ] ] ] y%C C 2 2 2 2 x+^ ^ ^ ^ ^ >$>$U+U+U+1 1 / / / r$r$r$n.n.n.| | | ( ( X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V V m.m.m. +y+y+y+z+l+l+l+l+:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p r.r.k.k.a.b.<.<.[.-.-.;.Q R R R q r r r t u u v v w x y y z S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=~=~=w=w=w=w=w=R X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j [ < < c+: : : : T$#%[ [ [ H%Q%5%6*.*V&`* %_=z*!*c*K=K=K=;=;=7=`-_=}-l* =D*.-x+N+F=F=[@1 U+U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&X&+={ { { )=)=)=g.{ F-F-F-U-U- ;6-{.{.{.{.{.{.{.{.{.{.t-D t=_.*@*@*@*@*@*@O=O=P=P=6 6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.C.-+-+o.o.o.o.m m m m m m m m m m m m ' ' ' Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E E E E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+' ' ' m m m m m m m m m m m m o.o.o.o.-+-+C.C.C.C.C.C.C.7 7 7 7 7 ) ) ) ) ) ) P.P.P.P.P.{+{+{+{+6 6 6 6 6 P=P=O=O=*@*@*@*@*@*@_.t=D D D D D D i=i=~ ~ ~ g..;+;U-U-F-F-F-F-@;#;{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;k-I=Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < b+b+K.K.K.9.r#n n v.q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.a.b.<.[.[.-.-.Q Q R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ X < < c+: : : : T$#%[ [ [ H%} H.a&r&e*4*'&/&Q*:*c*K=K=K=%;;=^&8=C=&;*;S*f&E*U*U+U+/ [@1 U+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+6@6@6@6@3 w.w.X&X&X&+={ { { )=)=)=g.g.g.{ F-U-U- ; ; ;6-{.{.{.{.{.{.{.{.{.{.t-_.*@*@*@*@*@O=O=O=P=6 6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.-+-+o.o.o.o.m m m m m m m m m m m ' ' Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E E E E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E E E E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+' ' m m m m m m m m m m m o.o.o.o.-+-+C.C.C.C.C.C.7 7 7 7 7 ) ) ) ) ) ) P.P.P.P.P.{+{+{+{+6 6 6 6 6 P=O=O=O=*@*@*@*@*@_.t=D D D D D D i=i==;-; ; ; ; ;U-U-i-;;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.>;,;6@6@6@Z+y*] ] ] ] y%C C 2 2 2 2 x+x+^ ^ ^ R&>$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } d#_ _ _ _ _ [ [ [ [ #%T$: : : : c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m. + +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=`.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.^ < < c+: : : : T$[ [ [ [ H%} H.i&r&!&]=D&a=M*:*Z*;=K=K=%;';);C*&-{-U=v&:=!;I=N+F=[@1 1 U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&+={ { { { )=)=g.g.g.g.g.)=U- ; ; ; ; ;6-{.{.{.{.{.{.{.{.{.{.t-*@*@*@*@O=O=P=6 6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.C.-+o.o.o.o.m m m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m m m m m m o.o.o.o.-+C.C.C.C.C.C.C.7 7 7 7 ) ) ) ) ) ) P.P.P.P.P.{+{+{+{+6 6 6 6 P=P=O=O=*@*@*@*@*@_._.t=D D D ~;{;z-z- ; ; ; ;];^;/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.(;_;:;w.3 6@6@6@Z+Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#u%_ _ _ _ [ [ [ [ [ T$: : : : c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m. + +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r t t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.R=< < c+: : : : T$[ [ [ [ j+ &1&i&+*D*Q&U&,&z%C*c*;=K=K=%;';);<;t*a=$=]=r=y=$-N+F=[@1 U+U+U+>$>$R&^ ^ ^ x+x+2 2 2 2 C C ] ] ] ] ] Z+Z+6@6@6@3 w.w.w.X&X&+={ { { { )=)=)=g.g.g.g.)+)+g. ; ; ; ; ;z-6-{.{.{.{.{.{.{.{.{.{.t-*@*@O=O=P=6 6 6 6 6 {+{+{+P.P.P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.-+-+o.o.o.m m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m m m m m o.o.o.-+-+C.C.C.C.C.C.7 7 7 7 ) ) ) ) ) P.P.P.P.P.P.{+{+{+6 6 6 6 6 P=O=O=*@*@*@*@*@*@_.t=[;};z-z-z-z-z- ;|;Z-{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.1;2;X&X&w.w.w.3 6@6@6@Z+Z+] ] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ R&>$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X X Q%} } } d#u%_ _ _ _ j+[ [ [ [ T$: : : : c+< < < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m. +y+y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u u v w x y y z S T T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=(*b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ' < < c+: : : : T$[ [ [ [ j+ &M i&G%q&}*{*!%b*r-_*;=K=K=%;';);L*Q*3;D-%=^-'-$-x+U+>$1 U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+6@6@6@6@3 w.w.X&X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ g. ; ; ;z-z-z-4;{.{.{.{.{.{.{.{.{.{.t-O=O=P=6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.-+o.o.o.o.m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 8 E E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+, , , , , , , , , , 5;5;5;5;5;5;5;5;5;5;5;5;, , , , , , , , , , F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E E 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m m m m o.o.o.o.-+C.C.C.C.C.C.7 7 7 7 ) ) ) ) ) P.P.P.P.P.{+{+{+{+6 6 6 6 P=O=O=O=*@*@*@4 6;7;7;z-z-z-z-8;v-9;{.{.{.{.{.{.{.{.{.{.{.{.{.{.0;a;{ { +=X&X&X&w.w.3 6@6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ T$: : : : c+< < < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.R.p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r s t u u v w w x y y S S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=t#y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - < c+c+: : : : #%[ [ [ [ j+ &M 5%6*E=p*)& %B%z*^&;=K=%;%;';8-!*D=H=b;c;d;e;f;1@>$1 1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C C ] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&+={ { { )=)=)=g.g.g.g.g.)+~ ~ ~ ~ g. ;z-z-z-z-z-4;{.{.{.{.{.{.{.{.{.{.t-6 6 6 6 6 {+{+{+P.P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.-+o.o.o.m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+, , , , , 5;5;5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;5;5;5;, , , , , F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m m m m o.o.o.-+C.C.C.C.C.C.7 7 7 7 ) ) ) ) ) P.P.P.P.P.{+{+{+6 6 6 6 6 P=O=O=g;h;i;i;i;7;7;z-j;0;{.{.{.{.{.{.{.{.{.{.{.{.{.{.K-k;l;)=)={ { { +=X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$n.n.n.| | ( ( ( X X X Q%} } } } d#_ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.<.<.[.-.-.Q Q R R q q r r s t u u v w x x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+}+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=,+E+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . % < c+c+: : : : #%[ [ [ [ j+ &} H.s&E*m;%=n;/&D=!*8-K=%;%;o;8-!*p;o*&*[=d;q;E*1@>$>$U+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+6@6@6@6@w.w.w.X&X&+={ { { { )=)=g.g.g.g.g.)+)+~ ~ ~ ~ ~ z&z-z-z-z-z-z-4;{.{.{.{.{.{.{.{.{.{.t-6 6 6 {+{+{+P.P.P.P.P.) ) ) ) ) 7 7 7 C.C.C.C.C.C.-+o.o.o.m m m m m m m m ' Q+Q+8 8 8 8 8 8 8 8 8 E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+, , , 5;5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;5;5;, , , F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 8 8 8 8 8 8 8 Q+Q+' m m m m m m m m o.o.o.-+C.C.C.C.C.C.7 7 7 ) ) ) ) ) P.P.P.P.P.{+{+{+6 6 6 6 r;s;t;t;i;i;i;i;u;v;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.Z-z-g.g.g.)=)={ { { { +=X&X&w.w.w.6@6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ ^ >$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.3.0.0..+R.p p f.r.r.k.a.a.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=Q X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H [ c+c+: : : : #%[ [ [ [ _ _ } 1&'=I*:=]=D&a=<=L*c*K=%;%;w;;=_*%*x;x=y;z;A;M=I=|=>$U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C C y%] ] ] y*Z+Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=~ z-z-z-z-7;7;B;{.{.{.{.{.{.{.{.{.{.t-{+{+{+{+P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.-+o.o.o.m m m m m m m ' ' Q+8 8 8 8 8 8 8 8 8 E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+, , 5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 &.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.&.9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;5;, , F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 8 8 8 8 8 8 8 Q+' ' m m m m m m m o.o.o.-+C.C.C.C.C.7 7 7 7 ) ) ) ) ) P.P.P.P.{+{+{+C;D;E;F;F;G;t;t;i;H;I;{.{.{.{.{.{.{.{.{.{.{.{.{.{.J;K;Z+)+g.g.g.g.)=)=)={ { { +=X&X&X&w.w.3 6@6@6@Z+Z+y*] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#u%_ _ _ _ [ [ [ [ #%: : : : c+c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R R q q r r t u u u v w x y y z S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=q.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.F=c+c+: : : T$#%[ [ [ [ _ _ &M x*+*D*Q&{=P&t*p%_*;=%;%;w;;=_*L;x;P&M;N;O;X=I=x+R&N+U+U+>$R&^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+6@6@6@6@w.w.w.X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ ~ ~ ~ ~ i=D D ~ z-z-7;7;i;i;B;{.{.{.{.{.{.{.{.{.{.t-{+P.P.P.P.P.) ) ) ) 7 7 7 7 C.C.C.C.C.-+o.o.o.m m m m m m m ' ' Q+8 8 8 8 8 8 8 8 E E E E F+F+F+F+F+F+F+F+F+F+F+F+, , 5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 &.&.&.&.I.I.I.I.I.I.I.I.I.I.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.I.I.I.I.I.I.I.I.I.I.&.&.&.&.9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;, , F+F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 8 8 8 8 8 8 Q+Q+' m m m m m m m o.o.o.-+C.C.C.C.C.7 7 7 7 ) ) ) ) P.P.P.P.A*P;F;F;F;F;F;F;Q;R;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.S;s;~ ~ ~ )+)+g.g.g.g.)=)=)={ { { +=X&X&w.w.w.3 6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 1 [@/ / r$r$r$n.n.| | | ( ( X X X X Q%} } } d#u%_ _ _ _ [ [ [ [ #%T$: : : c+c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u v w w x y y S S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=#=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3@c+c+: : : T$#%[ [ [ [ _ _ &} .=x+w*p*[=x=T&%*_*;=%;%;w;o;_*C*T;j*,=U;V;E=I*x+N+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 C C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=g.g.g.g.g.)+~ ~ ~ ~ ~ ~ i=i=D D D ~ 7;7;i;i;i;i;B;{.{.{.{.{.{.{.{.{.{.t-P.P.P.P.) ) ) ) 7 7 7 7 C.C.C.C.-+-+o.o.m m m m m m m ' Q+Q+8 8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+F+F+, , 5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 &.&.&.I.I.I.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.I.I.I.&.&.&.9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;, , F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 8 8 8 8 8 Q+Q+' m m m m m m m o.o.-+-+C.C.C.C.C.7 7 7 ) ) ) ) C;W;X;Y;Y;F;F;F;Z;`; >{.{.{.{.{.{.{.{.{.{.{.{.{.{..>+>z&~ ~ ~ ~ ~ ~ )+g.g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+Z+y*] ] ] y%C C 2 2 2 x+x+^ ^ ^ ^ >$>$U+U+U+1 [@/ / / r$r$n.n.n.| | ( ( X X X X Q%} } } } u%_ _ _ _ [ [ [ [ #%T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+1+1+W.>@>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y y S S T T ,.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=t&@>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - c+c+: : : T$#%[ [ [ [ _ _ &} .=6*T*m;%=}-<*`-!*8-%;%;w;;=#>L*t*N-$>%>w-&>I**>N+N+U+>$R&^ ^ ^ ^ x+2 2 2 2 C C ] ] ] ] y*Z+6@6@6@6@w.w.w.X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=D D D D t=i=i;i;i;i;i;t;=>{.{.{.{.{.{.{.{.{.{.t-P.) ) ) ) ) 7 7 7 C.C.C.C.C.-+o.o.o.m m m m m m ' Q+Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+F+F+, , 5;5;9 9 9 9 9 9 9 9 9 9 9 &.&.I.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.I.&.&.9 9 9 9 9 9 9 9 9 9 9 9 5;5;, F+F+F+F+F+F+F+F+F+F+F+E E E 8 8 8 8 8 8 8 Q+Q+' m m m m m m m o.o.-+C.C.C.C.C.7 7 7 ) ->;>X;X;Y;Y;Y;Y;>>,>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.'>)>D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)=)={ { { +=X&X&w.w.w.3 6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ j+[ [ [ #%T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+1+1+W.>@>@O B B o o V V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.<.[.[.-.-.Q R R R q q r r s t u u v w x x y z S T T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=5+@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f !>: : : : T$#%[ [ [ j+_ _ _ &H.a&r&!&]=$=~>Q*L*;=%;w;w;o;#>L*<=~>k*%=S-H*T-*>^ N+U+>$R&^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&X&{ { { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=D D D D D _.*@D i;i;i;t;t;G;{>{.{.{.{.{.{.{.{.{.{.t-) ) ) 7 7 7 7 C.C.C.C.-+-+o.o.m m m m m m ' ' Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 9 9 9 9 9 &.&.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.&.&.&.9 9 9 9 9 9 9 9 9 9 5;5;, F+F+F+F+F+F+F+F+F+F+E E E 8 8 8 8 8 8 8 Q+Q+' m m m m m m o.o.o.-+C.C.C.C.! ^>};};X;X;X;X;/>(>/;{.{.{.{.{.{.{.{.{.{.{.{.{.{._>:>_.t=D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+Z+] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+1+1+W.>@>@O B o o o V V m.m. + +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.-.Q R R R q q r r t u u u v w x y y z S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=0./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i m*: : : : T$#%[ [ [ j+_ _ _ &f*i&+*&=Q&C-P&t*C*Z*';w;w;o;;=L*D=L=V=<> -e;Y *>^ U+>$>$R&^ ^ ^ x+x+2 2 2 C C y%] ] ] y*Z+Z+6@6@6@w.w.w.X&X&+={ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ ~ i=D D D D D t=_.*@*@D i;t;t;G;F;F;{>{.{.{.{.{.{.{.{.{.{.t-) 7 7 7 C.C.C.C.C.-+o.o.m m m m m m m ' Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 9 9 9 &.&.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>]>]>]>]>]>]>> > > > > > > > > > > > > > > > > > > > > > > > > > > > > > ]>]>]>]>]>]>]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.&.&.9 9 9 9 9 9 9 9 9 9 5;, , F+F+F+F+F+F+F+F+F+E E E 8 8 8 8 8 8 8 Q+' ' m m m m m m o.o.-+C.[>}>|>|>};};};X;1>2>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.3>4>*@*@*@t=D D D D D i=i=~ ~ ~ ~ ~ )+g.g.g.g.g.)=)={ { { +=X&X&w.w.w.6@6@6@6@Z+y*] ] ] ] C C 2 2 2 x+x+^ ^ ^ ^ >$>$U+U+1 1 [@/ / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+=.=.=.<+<+~+~+~+1+W.W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u v w x x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=[@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.6@: : : : T$#%[ [ [ j+_ _ _ &Q%`.l%.*p&l*&;C=%*Z*;=w;w;w;;=7=z*_=5>6>d;W=!;y%1@N+>$>$^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] y*Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=D D D D t=_.*@*@*@*@t=t;G;F;F;F;F;7>{.{.{.{.{.{.{.{.{.{.t-7 7 C.C.C.C.C.-+o.o.m m m m m m ' Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 9 9 &.&.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>]>]>> > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > ]>]>]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.&.&.9 9 9 9 9 9 9 9 5;5;, , F+F+F+F+F+F+F+F+E E E 8 8 8 8 8 8 8 Q+' m m m m m m 8>9>0>0>|>|>|>|>a>b>g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.c>d>O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+=.=.=.<+<+~+~+~+1+W.W.>@>@B B o o o V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=e>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 : : : : T$[ [ [ [ j+_ _ _ _ m*B*6*T*N*U;'&L=Q*7=;=w;w;w;';Z*8=C=M-*;f>k=!;$-^ N+>$R&^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&+={ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D t=_.*@*@*@*@*@O=_.F;F;F;F;F;F;7>{.{.{.{.{.{.{.{.{.{.t-C.C.C.C.-+o.o.o.m m m m m ' ' Q+8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 9 9 &.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>> > > > > > > > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > > > > > > > > ]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.&.&.9 9 9 9 9 9 9 9 5;, , F+F+F+F+F+F+F+F+E E E 8 8 8 8 8 8 Q+' ' m m g>h>i>0>0>0>0>|>j>k>{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-l>m>6 6 P=O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { +=X&X&w.w.w.6@6@6@Z+Z+y*] ] ] y%C 2 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$n.n.n.| | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.R.p p r.r.k.k.a.b.<.<.[.-.-.Q R R R q q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=U## . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z=: : : : T$[ [ [ [ j+_ _ _ _ Q%H.a&b%D*n>,=-=M*:*c*o;w;w;';Z*C*t*{-M;o>N*X=$-1@N+|=R&^ ^ ^ x+x+2 2 2 C C y%] ] ] y*Z+6@6@6@3 w.w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D D t=*@*@*@*@*@O=O=P=*@F;F;F;F;F;Y;p>{.{.{.{.{.{.{.{.{.{.t-C.C.-+o.o.m m m m m m ' Q+8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 9 &.&.I.I.I.^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>> > > > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > > > > ]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+I.I.I.I.&.9 9 9 9 9 9 9 9 5;5;, F+F+F+F+F+F+F+F+E E E 8 8 8 8 8 8 q>r>i>i>i>i>i>i>s>'>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.t>P;{+{+6 6 6 6 P=O=*@*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+y*] ] ] ] C C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | ( ( X X X X Q%} } } d#_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p p r.r.k.a.a.b.<.[.-.-.-.Q R R R q q r r t u u v v w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=T A.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (._ : : : T$[ [ [ [ j+_ _ _ _ Q%X `.l%w*p&[=&*T&C*Z*o;w;u>o;;=L*v>N-D-U;w>'-$-1@N+>$R&^ ^ ^ x+x+2 2 2 C C ] ] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D t=_.*@*@*@*@O=O=P=6 6 *@F;F;F;Y;Y;Y;p>{.{.{.{.{.{.{.{.{.{.t--+o.o.m m m m m m ' Q+8 8 8 8 8 8 E E F+F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 &.&.I.I.I.^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>> > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+$+$+$+$+l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l $+$+$+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > > > ]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+I.I.I.&.&.9 9 9 9 9 9 9 5;5;, F+F+F+F+F+F+F+F+E E 8 8 m x>h>y>y>z>z>i>i>A>(;{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;B>C>P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+Z+] ] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ >$>$U+U+1 1 / / / r$r$`.n.n.| | ( ( X X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0..+R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w==.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I t+: : : T$[ [ [ [ j+_ _ _ _ d#X B*a&}=^*E&V=_=p;^&;=o;u>o;;=D>E>F>G>%=H>I>f;C |=>$^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=O=P=6 6 6 6 O=F;Y;Y;Y;Y;X;p>{.{.{.{.{.{.{.{.{.{.J>o.m m m m m ' ' Q+8 8 8 8 8 E E E F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 &.&.I.I.I.^+^+^+^+^+^+^+^+]>]>]>]>]>]>> > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+l l l l l l l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l l l l l l l $+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > ]>]>]>]>]>]>^+^+^+^+^+^+^+^+I.I.I.I.&.9 9 9 9 9 9 9 5;5;, F+F+F+F+F+F+F+E K>L>y>y>y>y>y>y>M>N>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.O>P>) ) P.P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.w.6@6@6@Z+Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ >$>$U+U+U+1 [@/ / r$r$`.n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o V V m.m. + +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+}+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=*@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X*D : : : T$[ [ [ [ j+_ _ _ _ d#M H.i&;-f&v&D&a=<=L*8-o;u>u>%;Z*8=Q>R>`*d;S>T>C x+|=^ ^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+Z+6@6@3 w.w.X&X&X&{ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D t=*@*@*@*@*@O=P=6 6 6 6 {+{+O=Y;Y;Y;X;X;X;p>{.{.{.{.{.{.{.{.{.{.U>m m m m ' Q+8 8 8 8 8 8 E E F+F+F+F+F+F+F+F+, 5;9 9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+^+^+]>]>]>]>]>]>> > > > > > > > $+$+$+$+$+$+$+$+$+l l l l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l l l l $+$+$+$+$+$+$+$+$+$+> > > > > > > > ]>]>]>]>]>^+^+^+^+^+^+^+^+I.I.I.&.9 9 9 9 9 9 9 5;, , F+F+F+V>W>X>h>y>y>y>y>i>Y>$;{.{.{.{.{.{.{.{.{.{.{.{.{.{.Z>`> ,7 ) ) ) ) P.P.P.P.{+{+6 6 6 6 P=O=O=*@*@*@*@_.D D D D D i=~ ~ ~ ~ ~ )+)+g.g.g.)=)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C C 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.<.[.-.-.Q R R R q q r r t u u u v w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=9*.,. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 : : : T$#%[ [ [ j+_ _ _ _ d#} X `.h&+,p*u&J=T&r-);;=u>u>%;);8=x;M-d*z;O;X=y%x+x+^ ^ ^ ^ x+2 2 2 C C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=O=P=6 6 6 {+{+{+P.6 Y;X;X;X;X;};@,{.{.{.{.{.{.{.{.{.{.U>m m ' Q+8 8 8 8 8 8 E E F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+^+^+]>]>]>]>]>> > > > > > > $+$+$+$+$+$+$+$+$+l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l l l $+$+$+$+$+$+$+$+> > > > > > > ]>]>]>]>]>^+^+^+^+^+^+^+^+I.I.I.&.9 9 9 9 9 9 9 5;, #,$,h>h>h>h>h>y>%,&,{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.*,=,C.C.7 7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 6 O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] ] C C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+1+1+W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.a.b.<.[.-.-.;.Q R R R q r r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+B+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=B+J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#: : : T$#%[ [ [ j+_ _ _ _ d#} M H.'=T*w&-,V=F>%*_*;=u>u>w;;=<;;,j*,=>,V;&>$-I=x+^ ^ ^ x+x+2 2 2 C C ] ] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=P=6 6 6 {+{+{+P.P.P.6 X;X;X;};};};j;{.{.{.{.{.{.{.{.{.{.U>' Q+8 8 8 8 8 E E E F+F+F+F+F+F+, , 5;9 9 9 9 9 9 &.&.I.I.^+^+^+^+^+^+^+^+]>]>]>]>> > > > > > > $+$+$+$+$+$+$+$+l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 0 0 0 ,,,,,,,,,,,,,,,,,,,,F F F F F F F F F F ,,,,,,,,,,,,,,,,,,,,0 0 0 0 0 0 0 0 0 0 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l $+$+$+$+$+$+$+$+> > > > > > > ]>]>]>]>]>^+^+^+^+^+^+^+I.I.I.&.9 9 9 9 V>',),),X>h>h>h>!,~,{,{.{.{.{.{.{.{.{.{.{.{.{.{.{.k>],o.-+C.C.C.C.7 7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+)+g.g.g.)=)=)={ { { X&X&X&w.w.6@6@6@Z+Z+] ] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y z S T T T ,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=p /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . q=M : : T$#%[ [ [ j+_ _ _ _ d#} M X x*+*c=Q&U=a=Q*L*8-u>u>w;;=D>D=(=k*^,S-H*f;I=x+^ ^ ^ x+x+2 2 2 C y%] ] ] ] Z+Z+6@6@6@w.w.X&X&X&{ { { )=)=)=g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=O=6 6 6 6 {+{+P.P.P.P.) {+X;X;};};|>|>j;{.{.{.{.{.{.{.{.{.{.U>8 8 8 8 8 E E F+F+F+F+F+F+F+, 5;9 9 9 9 9 9 9 &.I.I.^+^+^+^+^+^+^+]>]>]>]>]>> > > > > > $+$+$+$+$+$+$+l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 0 ,,,,,,,,F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F ,,,,,,,,0 0 0 0 0 0 0 ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l $+$+$+$+$+$+$+> > > > > > > ]>]>]>]>^+^+^+^+^+^+^+I.I.&.&./,(,_,_,_,_,),X>:,<,{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.[,},m m o.o.-+C.C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@*@t=D D D D i=i=~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+H+`+`+=.=.<+<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+3.3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q Q R R q q r r t t u u v w x y y z S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=H.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.{ : : T$#%[ [ [ j+_ _ _ _ d#} } X `.U*y=V&R*&;T&C*);o;u>w;|,Z*p;o*}-c;1,S>f;2,3,1@^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=P=6 6 6 {+{+{+P.P.P.) ) ) {+};};|>|>|>|>j;{.{.{.{.{.{.{.{.{.{.U>8 8 8 E E F+F+F+F+F+F+F+, 5;9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+]>]>]>]>]>> > > > > > $+$+$+$+$+$+l l l l l l ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 ,,,,,,F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F ,,,,,,0 0 0 0 0 ; ; ; ; ; ; ; ; ; ; ; l l l l l l $+$+$+$+$+$+$+> > > > > > ]>]>]>]>^+^+^+^+^+^+4,5,6,7,_,_,_,_,8,9,0,{.{.{.{.{.{.{.{.{.{.{.{.{.{.a,b,' m m m m m o.o.-+C.C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+6 6 6 6 O=O=*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ >$>$U+U+1 1 / / / r$r$n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+H+`+=.=.=.<+<+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.-.Q R R R q q r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F : : T$#%[ [ [ j+_ _ _ _ d#} } M .=6*r&k=c,$=/&D=_*';o;w;o;Z*L;x;M-y;d,e,T>$-3,^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=P=6 6 6 6 {+{+P.P.P.) ) ) ) 7 P.};|>|>|>0>0>j;{.{.{.{.{.{.{.{.{.{.U>8 E E F+F+F+F+F+F+, 5;5;9 9 9 9 9 &.&.I.I.^+^+^+^+^+^+]>]>]>]>]>> > > > > $+$+$+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 ,,,,F F F F F F F F F F F F F F F F F T+T+T+T+T+T+f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,f,T+T+T+T+T+T+F F F F F F F F F F F F F F F F F ,,,,,,0 0 0 0 ; ; ; ; ; ; ; ; ; ; l l l l l l $+$+$+$+$+$+> > > > > > ]>]>]>]>^+&.g,(,6,6,6,6,6,7,h,R-{.{.{.{.{.{.{.{.{.{.{.{.{.{.i,j,k,8 8 Q+' m m m m m o.o.-+C.C.C.C.7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@t=D D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)=)={ { { X&X&w.w.w.6@6@6@Z+y*] ] ] ] C C 2 2 2 x+^ ^ ^ ^ >$>$U+U+1 1 / / / r$r$`.n.| | | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : : c+< < < b+K.K.K.r#r#n n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o V V m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y z S T T T ,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=L+@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j [ : : #%[ [ [ j+_ _ _ _ d#} } M ( d=s=w* =*;J=&-<;#>o;w;o;#>L*;,a=,=l,V;E=$-y%1@^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { )=)=)=g.g.g.)+)+~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=P=6 6 6 {+{+P.P.P.P.) ) ) 7 7 7 ) |>|>|>0>0>i>j;{.{.{.{.{.{.{.{.{.{.U>E F+F+F+F+F+F+, 5;9 9 9 9 9 9 &.I.I.^+^+^+^+^+^+^+]>]>]>]>> > > > > $+$+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; ; 0 0 0 0 ,,,,,,F F F F F F F F F F F F F T+T+T+T+f,f,f,f,- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - f,f,f,f,T+T+T+T+F F F F F F F F F F F F F F ,,,,0 0 0 0 ; ; ; ; ; ; ; ; ; l l l l l $+$+$+$+$+$+> > > > > > ]>m,n,o,6,6,6,6,6,p,q,{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.S;r,E E 8 8 8 8 Q+' m m m m m o.o.-+C.C.C.7 7 7 ) ) ) ) P.P.P.{+{+6 6 6 6 O=O=*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@Z+Z+] ] ] ] y%C 2 2 2 x+x+^ ^ ^ R&>$U+U+1 1 / / / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : c+c+< < < b+K.K.K.r#r#n n q.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=o . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.^ : : #%[ [ [ j+_ _ _ _ d#} } } f*`.6*E*s,,-V=_=%*Z*';w;w;t,u,E>H=G><>v,H*I*y%1@^ ^ x+2 2 2 C C ] ] ] ] Z+Z+6@6@6@w.w.X&X&X&{ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=P=6 6 6 {+{+{+P.P.P.) ) ) ) 7 7 C.C.) |>0>0>i>i>i>j;{.{.{.{.{.{.{.{.{.{.U>F+F+F+F+F+, 5;9 9 9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>]>> > > > > $+$+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; 0 0 0 0 ,,,,F F F F F F F F F F F F T+T+T+f,f,f,- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - f,f,f,T+T+T+F F F F F F F F F F F ,,,,0 0 0 0 ; ; ; ; ; ; ; ; ; l l l l $+$+$+$+$+$+> > I.w,(,x,o,o,o,6,6,j,y,{.{.{.{.{.{.{.{.{.{.{.{.{.{.z,A,' F+F+F+E E 8 8 8 8 Q+' m m m m m o.o.-+C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+6 6 6 P=O=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ [ T$: : : c+c+< < < b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+1+W.>@>@O B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.<.<.[.-.-.Q R R R q q r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=-+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 : : #%[ [ [ [ _ _ _ _ d#} } } Q%| [@+*&=S*M;j*B,L*#>w;w;o;Z*8=C,D,*;E,W=E*y*2 1@^ x+2 2 2 C C ] ] ] ] Z+Z+6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=*@*@*@*@O=O=P=6 6 6 {+{+P.P.P.P.) ) ) 7 7 7 C.C.C.F,0>0>i>i>i>i>G,{.{.{.{.{.{.{.{.{.{.U>F+F+F+, 5;9 9 9 9 9 &.I.I.I.^+^+^+^+^+]>]>]>]>> > > > > $+$+$+$+$+$+l l l l ; ; ; ; ; ; ; ; 0 0 0 0 ,,,,F F F F F F F F F F T+T+T+f,f,- - - - - - - - - - - - - - - - - - - - - - - - - H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,- - - - - - - - - - - - - - - - - - - - - - - - f,f,f,T+T+F F F F F F F F F F F ,,,,0 0 0 ; ; ; ; ; ; ; ; l l l l l $+$+$+I,J,x,x,x,x,x,o,K,S;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.L,M,, F+F+F+F+F+F+E E 8 8 8 8 Q+' m m m m m o.-+C.C.C.C.7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)=)={ { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.R.p p r.r.k.a.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=6%V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.: : #%[ [ [ [ _ _ _ _ d#} } } Q%| d=6*}=w-N,}-C=%*Z*o;w;u>;=O,B,j*P,l,N*y=Z+2 1@x+x+2 2 2 C y%] ] ] y*Z+Z+6@6@3 w.w.X&X&+={ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@*@O=P=6 6 6 {+{+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.7 i>i>i>i>z>y>Q,{.{.{.{.{.{.{.{.{.{.U>F+, 5;9 9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>]>> > > > > $+$+$+$+$+l l l l ; ; ; ; ; ; ; ; 0 0 0 ,,,,F F F F F F F F F T+T+f,f,f,- - - - - - - - - - - - - - - - - H,H,H,H,H,H,H,H,H,H,H,a a a a a a a a a a a a a a a a a a a a a a a a a H,H,H,H,H,H,H,H,H,H,- - - - - - - - - - - - - - - - - - f,f,T+T+F F F F F F F F F F ,,0 0 0 0 ; ; ; ; ; ; ; l l l &.M,R,R,R,R,R,x,),S,/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.I;T,9 9 9 5;, F+F+F+F+F+F+E 8 8 8 8 8 Q+' m m m m o.o.-+C.C.C.C.7 7 ) ) ) P.P.P.P.{+{+6 6 6 P=O=O=*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@>@B B o o @V m.m. + +y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y S S T T >.,.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=Q /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.( : #%[ [ [ [ _ _ _ _ u%} } } Q%H.| [@;-e;v&,=-=D=L*|,w;u>t,u,E>U,G>^,S-'-f;2 1@x+x+2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { )=)=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D t=_.*@*@*@O=O=P=6 6 6 {+{+P.P.P.P.) ) ) 7 7 C.C.C.C.-+o.m C.i>i>i>z>y>y>Q,{.{.{.{.{.{.{.{.{.{.U>5;9 9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>> > > > > $+$+$+$+$+l l l l ; ; ; ; ; ; ; 0 0 0 ,,,,F F F F F F F F F T+T+f,f,- - - - - - - - - - - - - - - H,H,H,H,H,H,a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a H,H,H,H,H,H,H,- - - - - - - - - - - - - - - f,f,T+T+F F F F F F F F ,,,,0 0 0 ; ; ; ; ; ; V,W,(,(,(,R,R,R,X,Y,{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.Z,#,&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+{+6 6 6 O=O=*@*@*@*@_.D D D D i=i=~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+`+`+=.=.<+~+~+~+Q.1+W.W.>@O B B o o V m.m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q q r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=x+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D : T$[ [ [ [ _ _ _ _ u%} } } Q%X H.`.6*E=^-l*`,x;L;);o;u>t,Z*8=C=R> 'd;.'T>y*2 I=x+2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&{ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D _.*@*@*@*@O=O=6 6 6 {+{+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.o.m m C.i>z>y>y>y>y>Q,{.{.{.{.{.{.{.{.{.{.U>9 9 9 9 &.I.I.^+^+^+^+^+]>]>]>]>> > > > $+$+$+$+$+l l l l ; ; ; ; ; ; ; 0 0 0 ,,,,F F F F F F F F T+T+f,f,- - - - - - - - - - - - H,H,H,H,H,H,a a a a a a a a a a a a a a a a a a a a a a a +'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'a a a a a a a a a a a a a a a a a a a a a a a a H,H,H,H,H,- - - - - - - - - - - - - f,f,T+T+F F F F F F F F ,,0 0 0 ; @'#'$'$'$'$'(,(,z>%'g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.c>8,^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 8 Q+m m m m m o.o.C.C.C.C.7 7 ) ) ) P.P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { +=X&X&w.w.3 6@6@Z+Z+] ] ] ] C C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=Q=J%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b : T$[ [ [ [ _ _ _ _ u%} } } Q%X H.| [@;-W=v&,=a=D=_*|,u>o;#>L*B,&'M;v&*'&>Z+2 x+x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&X&{ { { )=)=g.g.g.g.)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) ) 7 7 C.C.C.-+o.o.m m m m -+y>y>y>y>y>y>='{.{.{.{.{.{.{.{.{.{.U>9 9 &.I.I.^+^+^+^+^+]>]>]>> > > > > $+$+$+$+$+l l l ; ; ; ; ; ; ; 0 0 0 ,,F F F F F F F F T+T+f,f,- - - - - - - - - - - H,H,H,H,H,a a a a a a a a a a a a a a a a +'+'+'+'-'-'-'-'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@-'-'-'-'-'-'+'+'+'+'+'a a a a a a a a a a a a a a a a H,H,H,H,- - - - - - - - - - - - f,f,T+F F F F F F F F ,,;'>','$'$'$'$'$''')'{.{.{.{.{.{.{.{.{.{.{.{.{.{.0,!'~'^+^+^+^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 6 O=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ )+)+g.g.g.)=)=)={ { +=X&X&w.w.3 6@6@Z+Z+] ] ] ] C C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+1+1+W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y S S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=N.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D+_ T$[ [ [ [ j+_ _ _ u%} } } Q%Q%X H.`.|=y=^-N,&;C=C*);o;o;;=_*E>{'D-^,^-]'f;y%I=x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D t=_.*@*@*@O=O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.m m m m m Q+m y>y>y>y>y>y>='{.{.{.{.{.{.{.{.{.{.U>&.I.I.^+^+^+^+^+]>]>]>> > > > > $+$+$+$+l l l l ; ; ; ; ; ; 0 0 0 ,,F F F F F F F F T+f,f,- - - - - - - - - - - H,H,H,H,a a a a a a a a a a a a a +'+'+'-'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@-'-'-'-'+'+'+'a a a a a a a a a a a a a H,H,H,H,- - - - - - - - - - - f,T+T+F F F ^'/'('('_'_',',':'<'{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.t>[']>]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 9 5;F+F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 ) ) ) P.P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.3 6@6@6@Z+y*] ] ] C C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m. + +y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q q r r t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.y*T$#%[ [ [ j+_ _ _ u%} } } Q%Q%X X | [@/-c=z;P,&'Q*D>;=o;o;);8=x;R>[=d;S>T>y%I=y%2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D t=*@*@*@*@O=P=6 6 6 {+{+P.P.P.P.) ) ) 7 7 C.C.C.-+o.o.m m m m ' Q+8 m y>y>y>y>h>h>='{.{.{.{.{.{.{.{.{.{.U>I.^+^+^+^+^+]>]>]>> > > > $+$+$+$+$+l l l ; ; ; ; ; ; 0 0 0 ,,F F F F F F F T+T+f,- - - - - - - - - - - H,H,H,a a a a a a a a a a a +'+'+'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@= = = = = = = m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@-'-'+'+'+'a a a a a a a a a a a H,H,H,H,- - - - - - - - - - f,,,}'|'('('('('('('1'I;{.{.{.{.{.{.{.{.{.{.{.{.{.{.J;2'Z.> > > > ]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+F+E 8 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=O=*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+g.g.g.g.)=)={ { { X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ #%: : : : c+< < < b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@O B B o o V m.m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=$+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > : #%[ [ [ j+_ _ _ u%d#} } } Q%X X H.*=|=T*r=%=b;C=8=#>t,o;;=L*3'&'M;N;4'&>y*C y%2 2 2 C y%] ] ] Z+Z+6@6@3 w.w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D _.*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 m y>y>h>h>h>h>='{.{.{.{.{.{.{.{.{.{.U>^+^+^+^+]>]>]>> > > > $+$+$+$+l l l l ; ; ; ; ; ; 0 0 ,,,,F F F F F F T+T+f,- - - - - - - - - - H,H,H,a a a a a a a a a a +'+'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@= = = = = = = = = = = = = 5'5'5'5'5'5'5'5'5'5'5'5'5'5'5'= = = = = = = = = = = = = m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@-'-'+'+'a a a a a a a a a a H,H,H,H,- - - - - - 6'7'8'('('('('('9'0'{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.a'b'$+$+$+> > > > > ]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+{+6 6 6 O=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+c+< < < b+K.K.K.r#r#n n q.q.4.G+H+H+H+`+`+=.=.<+~+~+~+Q.1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u u v w x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=7@D+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;+: #%[ [ [ j+_ _ _ u%d#} } } Q%X X H.n.[@2,&=E,c'j*v>d';=t,|,_*e'{'k*f'S-]'f;$-y%2 2 2 C y%] ] ] Z+Z+6@6@3 w.w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@O=O=6 6 6 {+{+{+P.P.P.) ) ) 7 7 C.C.C.-+o.o.m m m m ' 8 8 8 8 8 ' h>h>h>h>h>h>='{.{.{.{.{.{.{.{.{.{.U>^+^+]>]>]>> > > > $+$+$+$+l l l ; ; ; ; ; ; 0 0 0 ,,F F F F F F T+T+f,- - - - - - - - - H,H,H,a a a a a a a a a a +'+'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@= = = = = = = 5'5'5'5'5'b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b 5'5'5'5'5'= = = = = = = m@m@m@m@m@m@m@m@m@m@m@m@m@-'-'+'+'a a a a a a a a a H,H,H,- g'h'i'8'8'8'8'8'('j' >{.{.{.{.{.{.{.{.{.{.{.{.{.{.y,k'> l l $+$+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.I.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } u%_ _ _ _ [ [ [ [ T$: : : c+c+< < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r r t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=#+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A./ #%[ [ [ j+_ _ _ _ d#} } } Q%X X X .=*=6*T*N*U;k*_=8=Z*t,o;);L;x;&;l'm'S>T>$-y%2 2 2 C ] ] ] ] Z+Z+6@6@3 w.w.X&X&{ { { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D D t=*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 8 E E 8 h>h>h>h>X>),A,{.{.{.{.{.{.{.{.{.{.U>]>]>]>> > > > $+$+$+$+l l l ; ; ; ; ; ; 0 0 ,,F F F F F F F T+f,- - - - - - - - - H,H,H,a a a a a a a a +'+'-'-'m@m@m@m@m@m@m@m@m@m@m@= = = = = = 5'5'5'b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b b 5'5'5'5'= = = = = m@m@m@m@m@m@m@m@m@m@m@-'-'+'+'a a a a a a a a n'o'i'i'8'8'8'8'p'q'{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.r'}'; ; ; l l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 ' m m m m o.o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=O=*@*@*@_.t=D D D i=~ ~ ~ ~ ~ )+g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.| | | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ [ T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m. + +y+y+y+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x y y S S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F,T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( .=N=U*E= -l*M-s'L*#>|,);L*3'j*M;t'4'&>T-] y%2 2 C ] ] ] ] Z+Z+6@6@3 w.w.X&X&{ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D _.*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.o.m m m m ' 8 8 8 8 E E F+F+8 h>h>X>),_,_,A,{.{.{.{.{.{.{.{.{.{.U>]>> > > > $+$+$+$+l l l ; ; ; ; ; 0 0 0 ,,F F F F F F T+f,f,- - - - - - - - H,H,H,a a a a a a a a +'-'-'m@m@m@m@m@m@m@m@m@m@= = = = = 5'5'b b b b b b b b b b b b b b k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k b b b b b b b b b b b b b b 5'5'5'= = = = m@m@m@m@m@m@m@m@m@m@m@-'+'+'a a u'v'i'i'i'i'i'i'w'x'i,{.{.{.{.{.{.{.{.{.{.{.{.{.{.y'z'0 0 ; ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 9 , F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.| | | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@O B B o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u v w w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=t&f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( .=r$>$A'W=B',=(=D=u,;=;=u,E>(=C'D'S-]'E*Z+y%2 2 C ] ] ] ] Z+Z+6@6@3 w.w.X&X&{ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D _.*@*@*@O=O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 8 E E F+F+F+8 h>),_,_,_,_,A,{.{.{.{.{.{.{.{.{.{.U>> > > $+$+$+$+l l l ; ; ; ; ; 0 0 ,,,,F F F F F T+T+f,- - - - - - - - H,H,a a a a a a a a +'+'-'m@m@m@m@m@m@m@m@m@= = = = = 5'5'b b b b b b b b b b b k k k k k k k k k k k k I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@k k k k k k k k k k k k k b b b b b b b b b b b 5'5'= = = = m@m@m@m@m@m@m@m@m@-'E'F'G'i'i'i'i'i'H'I'{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.J'K'F F ,,0 0 ; ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+m m m m o.o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.| | | ( ( X X Q%Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.<+<+~+~+Q.1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=x + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I | [ [ [ [ j+_ _ _ u%} } } Q%X X X ( ( `.r$|=}=w&-,V=Q>8=Z*;=Z*L;T&L'M'E,S>X=3 y%2 2 C ] ] ] ] Z+6@6@6@3 w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ ~ i=D D D t=_.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.o.o.m m m m ' 8 8 8 8 E E F+F+F+F+F+E ),_,_,_,_,7,N'{.{.{.{.{.{.{.{.{.{.U>> $+$+$+$+l l l ; ; ; ; ; 0 0 ,,F F F F F F T+f,- - - - - - - - H,H,H,a a a a a a a +'-'-'m@m@m@m@m@m@m@m@= = = = 5'5'b b b b b b b b b k k k k k k k k k I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@k k k k k k k k k b b b b b b b b b b 5'5'= = = m@m@m@m@O'P'Q'Q'Q'R'G'G'S'T'g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.I'o,T+F F F F F ,,0 0 0 ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>^+^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$n.n.| | | ( X X X Q%Q%} } d#u%_ _ _ j+[ [ [ #%: : : : c+< < < b+K.K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.>@>@B B o o @V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+#+3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=X&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ' #%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | `.F=I=q&d;c;M-s':*U'U'V'B,j*P,t'4'&>3 ] y%2 C ] ] ] ] Z+6@6@6@3 w.w.X&+={ { { )=)=g.g.g.)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 8 E F+F+F+F+F+, 5;F+_,_,_,7,6,6,W'{.{.{.{.{.{.{.{.{.{.X'$+$+$+l l l ; ; ; ; ; 0 0 ,,F F F F F F T+f,- - - - - - - H,H,H,a a a a a a a +'-'m@m@m@m@m@m@m@m@= = = = 5'5'b b b b b b b b k k k k k k k I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&I@I@I@I@I@I@I@I@I@I@I@I@I@I@k k k k k k k k b b b b b b b b 5'5'= Y'Z'`'Q'Q'Q'Q'Q'Q' ).){.{.{.{.{.{.{.{.{.{.{.{.{.{.{,+)@)- - f,T+F F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>^+^+^+^+^+I.&.9 9 9 9 9 , F+F+F+F+F+E E 8 8 8 8 Q+m m m m o.o.C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$n.n.| | | ( X X X Q%} } } d#_ _ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.Q Q R R q q r r t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=~&V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;+#%[ [ [ j+_ _ _ u%} } } Q%Q%X X ( ( | `.r$>$r&#)B'M;&'v>L*Z*L*D=(=G>D'v,H*T>] y%2 C ] ] ] ] Z+6@6@6@3 w.w.X&+={ { { )=)=g.g.g.)+~ ~ ~ ~ i=i=D D D t=*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' 8 8 8 8 E E F+F+F+F+F+, 9 9 F+_,_,7,6,6,6,W'{.{.{.{.{.{.{.{.{.{.X'$+l l l ; ; ; ; ; 0 0 ,,F F F F F T+f,- - - - - - - - H,H,a a a a a a a +'-'m@m@m@m@m@m@m@m@= = = 5'5'b b b b b b b k k k k k k k I@I@I@I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&c c c c c d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&I@I@I@I@I@I@I@I@I@I@I@k k k k k k b b b b b b $)%)&)&)*)*)*)Q'=)-){.{.{.{.{.{.{.{.{.{.{.{.{.{.{.;)>)- - - - - - f,T+F F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+$+> > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@O B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.[.-.-.Q R R R q r r s t u u v w x y y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=0.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.,)[ [ [ j+_ _ _ u%d#} } } Q%X X X ( | | `./ h&!;:=%>')H=E>L*L*p;Q>)) 'E,W=X=Z+y%2 C ] ] ] ] Z+6@6@6@3 w.X&X&+={ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@*@O=P=6 6 {+{+{+P.P.) ) ) 7 7 7 C.C.-+o.o.m m m ' Q+8 8 8 8 E F+F+F+F+F+, 5;9 9 9 F+7,6,6,6,6,6,W'{.{.{.{.{.{.{.{.{.{.X'l l ; ; ; ; ; 0 0 ,,F F F F F T+f,- - - - - - - H,H,a a a a a a a +'-'m@m@m@m@m@m@m@m@= = = 5'b b b b b b b k k k k k k I@I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&d&d&d&d&c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c c d&d&d&d&d&d&d&d&d&d&d&d&d&I@I@I@I@I@I@I@I@I@I@k k k k k = !)~)~)~)~)~)&)&){)(;{.{.{.{.{.{.{.{.{.{.{.{.{.{.z,])^)H,H,H,- - - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+> > > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;F+F+F+F+F+E E 8 8 8 8 ' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@t=D D D i=i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 / / / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.9.r#n n q.q.q.4.H+H+H+g@`+=.=.<+<+~+~+Q.1+W.>@>@O B o o @V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+#+3.0.0..+R.p p r.r.k.a.a.b.<.[.-.-.;.Q R R q q r r t u u v v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x.[ [ [ [ _ _ _ _ d#} } } Q%X X X ( | | | *=F=2,&>S-<>}-Q>/)L;/)C,()P,t'A;&>3 ] y%C ] ] ] ] Z+6@6@6@3 w.X&X&+={ { { )=g.g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 E E F+F+F+F+F+, 9 9 9 9 &.5;6,6,6,6,6,o,W'{.{.{.{.{.{.{.{.{.{.X'; ; ; ; ; 0 0 ,,F F F F F T+f,- - - - - - - H,H,a a a a a a +'-'-'m@m@m@m@m@m@= = = 5'5'b b b b b b k k k k k k I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&c c c c c c c c c c c c '+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+c c c c c c c c c c c d&d&d&d&d&d&d&d&d&d&d&I@I@I@I@I@I@I@I@_):)~)~)~)~)~)~)<)[){.{.{.{.{.{.{.{.{.{.{.{.{.{.{.})|)a a a a a H,H,- - - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+> > > > ]>]>^+^+^+^+^+I.&.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+' m m m o.o.-+C.C.7 7 7 ) ) ) P.P.{+{+6 6 6 P=O=*@*@*@*@t=D D D i=i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 / / / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.r#r#n n q.q.4.4.H+H+H+`+=.=.=.<+~+~+~+1+1+W.>@>@B B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.Q R R R q r r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=7@@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H _ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | *=/ E-2,e;d;[=M-C,e'e't*1)D-%>w-H*T>Z+y%C y%] ] ] Z+6@6@6@3 w.X&X&+={ { { )=g.g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m Q+8 8 8 8 E E F+F+F+F+, 5;9 9 9 9 &.I.9 6,6,6,6,o,o,W'{.{.{.{.{.{.{.{.{.{.X'; ; ; 0 0 ,,F F F F F T+f,- - - - - - H,H,H,a a a a a +'+'-'m@m@m@m@m@m@= = = 5'5'b b b b b b k k k k k I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&c c c c c c c c c '+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+c c c c c c c c d&d&d&d&d&d&d&d&d&I@I@j.2)3)4)4)4)~)~)5)6)$;{.{.{.{.{.{.{.{.{.{.{.{.{.{.7)8)9)-'+'a a a a a a H,H,- - - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l $+$+$+$+> > > > ]>]>^+^+^+^+I.I.&.9 9 9 9 5;F+F+F+F+F+E E 8 8 8 Q+' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 1 / / / r$`.n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < < b+K.K.K.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=`+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0)[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.*=1 E-f;q;f>M;()x;v>t*U,b;<>a)S>T>Z+y%C y%] ] ] Z+6@6@6@3 w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.o.o.m m m ' Q+8 8 8 8 E F+F+F+F+F+, 9 9 9 9 &.I.I.^+9 6,6,o,o,o,x,W'{.{.{.{.{.{.{.{.{.{.X'; 0 0 ,,F F F F F T+f,- - - - - - H,H,a a a a a a +'-'m@m@m@m@m@m@m@= = 5'5'b b b b b k k k k k I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&c c c c c c c '+'+'+'+'+'+'+'+'+'+'+'+'+'+G G G G G Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=G G G G G G '+'+'+'+'+'+'+'+'+'+'+'+'+c c c c c c c c d&d&d&d&b)c)d)d)4)4)4)4)e)f){.{.{.{.{.{.{.{.{.{.{.{.{.{.{.T'g)m@m@m@m@-'-'+'a a a a a a H,H,- - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l $+$+$+$+> > > ]>]>]>^+^+^+^+I.I.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 1 / / / r$`.n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@O B o o @V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+3.3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . k [ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.x*1 1@M=A;l,]-()Q>T&U,R>M'm'A;4 3 y%C y%] ] ] Z+Z+6@6@3 w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 6 {+{+P.P.P.) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 E E F+F+F+F+, 5;9 9 9 9 &.I.^+^+^+9 o,o,o,x,x,x,h){.{.{.{.{.{.{.{.{.{.i)0 ,,F F F F F T+f,- - - - - - H,H,a a a a a a +'-'m@m@m@m@m@m@= = 5'5'b b b b b k k k k k I@I@I@I@I@I@d&d&d&d&d&d&d&c c c c c c c '+'+'+'+'+'+'+'+'+'+G G G G Z=Z=Z=Z=Z=Z=Z=Z=Z=& & & & & & & & & & & & & & & & & & & & & & & & & & & & & Z=Z=Z=Z=Z=Z=Z=Z=Z=G G G '+'+'+'+'+'+'+'+'+'+'+c c c c j)k)d)d)d)d)d)d)l)m)9;{.{.{.{.{.{.{.{.{.{.{.{.{.{.)'=)= = = m@m@m@m@m@m@-'+'a a a a a a H,H,- - - - - - f,T+F F F F F ,,0 0 ; ; ; ; l l l $+$+$+> > > > ]>]>^+^+^+^+I.I.&.9 9 9 9 5;F+F+F+F+F+E 8 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$`.n.| | | ( ( X X Q%Q%} } d#u%_ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.9.r#n n q.q.q.4.H+H+H+g@`+=.=.<+~+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w==+W$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@X [ [ j+_ _ _ u%d#} } Q%Q%X X ( ( | | n.n.`.[@U+I=X=r=>,]-n)N-1)R>o)p)*'q)3 ] $-y%] ] ] Z+Z+6@6@3 w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.-+o.m m m m Q+8 8 8 8 E F+F+F+F+F+, 5;9 9 9 &.I.I.^+^+^+^+I.o,x,x,x,x,R,h){.{.{.{.{.{.{.{.{.{.i)F F F F F T+f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@m@= = = 5'b b b b b k k k k k I@I@I@I@I@I@d&d&d&d&d&d&c c c c c c '+'+'+'+'+'+'+'+'+G G G Z=Z=Z=Z=Z=Z=& & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & Z=Z=Z=Z=Z=Z=G G G '+'+'+'+'+'+'+r)s)t)t)t)t)t)d)u)v){.{.{.{.{.{.{.{.{.{.{.{.{.{.0,w)@)b b b 5'= = m@m@m@m@m@m@-'+'+'a a a a a H,H,- - - - - - f,T+F F F F F ,,0 0 ; ; ; ; l l l $+$+$+> > > ]>]>]>^+^+^+^+I.I.9 9 9 9 5;, F+F+F+F+E E 8 8 8 8 ' m m m m o.-+C.C.C.7 7 ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$`.n.| | | ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=( . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 [ [ [ _ _ _ _ d#} } } Q%X X X ( | | | n.`.r$[@N+I=w*r=%>M;}-))b;o)t'w-x)w.] $-3-] ] ] Z+Z+6@6@3 w.w.X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.o.o.m m m ' Q+8 8 8 8 E F+F+F+F+F+5;9 9 9 9 &.I.^+^+^+^+]>]>I.x,x,x,R,R,R,h){.{.{.{.{.{.{.{.{.{.i)F F F T+f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@m@= = 5'b b b b b k k k k k I@I@I@I@I@d&d&d&d&d&d&d&c c c c c '+'+'+'+'+'+'+'+G G Z=Z=Z=Z=Z=& & & & & & & & & & & & & & & & & & & & .,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,& & & & & & & & & & & & & & & & & & & & Z=Z=Z=Z=Z=G G y)z)F'F'F'F'F'F'A)B)0,{.{.{.{.{.{.{.{.{.{.{.{.{.{.i)t)k k b b b b b 5'5'= = m@m@m@m@m@m@-'+'a a a a a H,H,- - - - - - f,T+F F F F F ,,0 ; ; ; ; ; l l $+$+$+$+> > > ]>]>^+^+^+^+I.I.&.9 9 9 9 , F+F+F+F+F+E 8 8 8 8 Q+m m m m o.-+C.C.C.7 7 ) ) ) P.P.{+{+6 6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ #%T$: : : c+< < < b+K.K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@O B o o o V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=5.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e [ [ [ _ _ _ _ d#} } } Q%X X X ( | | | n.`.r$r$F=N+I*'-w-l,*;$>C)o)l,S-D)T>Z+$-y%] ] ] Z+Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D t=*@*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.o.o.m m m ' Q+8 8 8 E E F+F+F+F+, 5;9 9 9 9 I.I.^+^+^+^+]>]>> ^+x,R,R,R,R,(,h){.{.{.{.{.{.{.{.{.{.i)F T+f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@= = = 5'b b b b b k k k k I@I@I@I@I@d&d&d&d&d&d&c c c c c '+'+'+'+'+'+'+G G Z=Z=Z=Z=Z=& & & & & & & & & & & & & & .,.,.,.,r+r+r+r+r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%r+r+r+r+r+r+.,.,.,.,& & & & & & & & & & & & & & E)F)G)H)I)I)F'F'F'J)K){.{.{.{.{.{.{.{.{.{.{.{.{.{.i,L)M)I@I@k k k k b b b b b 5'= = m@m@m@m@m@m@-'+'a a a a a H,H,- - - - - - f,T+F F F F ,,0 0 ; ; ; ; l l l $+$+$+> > > > ]>]>^+^+^+^+I.I.9 9 9 9 5;, F+F+F+F+E E 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ >$>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#r#n v.q.q.4.H+H+H+g@`+=.=.<+<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A./ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ F=|=2,&>4'B'^,N)<>t'S-D)4 Z+$-3-] ] ] y*Z+6@6@3 w.w.X&+={ { { )=g.g.g.)+)+~ ~ ~ ~ i=D D D t=*@*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.-+o.m m m m ' 8 8 8 8 E F+F+F+F+F+, 9 9 9 9 &.I.^+^+^+^+]>]>]>> > ^+R,R,R,(,(,(,]){.{.{.{.{.{.{.{.{.{.i)f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@= = 5'5'b b b b k k k k I@I@I@I@I@d&d&d&d&d&d&c c c c '+'+'+'+'+'+'+G G Z=Z=Z=Z=& & & & & & & & & & & & .,.,.,r+r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%r+r+r+.,.,.,& & & & & & O)P)Q)Q)Q)Q)H)H)R)S){.{.{.{.{.{.{.{.{.{.{.{.{.{.{.T)U)d&d&I@I@I@I@I@k k k k b b b b 5'= = = m@m@m@m@m@-'+'a a a a a H,H,- - - - - - f,T+F F F F ,,0 0 ; ; ; ; l l l $+$+$+> > > ]>]>]>^+^+^+I.I.&.9 9 9 5;, F+F+F+F+E E 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] C C 2 2 2 x+^ ^ ^ >$U+U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : c+c+< < b+b+K.K.9.r#n n q.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ / '=x+$-V)A;S-p)p)E,w-D)4 3 y*3-] ] ] y*Z+6@6@3 w.w.X&+={ { { )=g.g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.P.) ) 7 7 C.C.C.-+o.m m m m Q+8 8 8 8 E F+F+F+F+F+5;9 9 9 9 I.I.^+^+^+^+]>]>> > > $+]>R,R,(,(,$'$']){.{.{.{.{.{.{.{.{.{.i)- - - - - H,H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b b k k k I@I@I@I@I@d&d&d&d&d&d&c c c c '+'+'+'+'+'+G G Z=Z=Z=Z=& & & & & & & & & & .,.,.,r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.B.B.B.B.B.B.B.B.B.B.B.B.B.J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%r+r+.,W)X)Y)Q)Q)Q)Q)Q)I)Z)y,{.{.{.{.{.{.{.{.{.{.{.{.{.{.`) !.!d&d&d&d&d&I@I@I@I@I@I@k k k b b b b b 5'= = m@m@m@m@m@-'+'a a a a a H,H,- - - - - - f,F F F F F ,,0 ; ; ; ; ; l l $+$+$+> > > > ]>]>^+^+^+^+I.&.9 9 9 9 5;F+F+F+F+F+E 8 8 8 8 ' m m m m o.-+C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] C C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / / r$`.n.n.| | ( ( X X X Q%} } d#u%_ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o o V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o%(.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # [ [ [ _ _ _ _ d#} } Q%Q%X X ( ( | | n.n.`.r$/ / / >$1@y%T>+!4'V;V;A;D)4 3 f;$-] ] ] y*Z+6@6@3 w.w.X&X&{ { { )=g.g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.P.) ) 7 7 C.C.C.-+o.m m m m Q+8 8 8 E E F+F+F+F+, 5;9 9 9 &.I.I.^+^+^+]>]>]>> > > $+$+]>(,(,(,$'$'$']){.{.{.{.{.{.{.{.{.{.i)- - - H,H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k k I@I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+'+G G Z=Z=Z=& & & & & & & & & .,.,r+r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&B.B.B.B.B.B.B.B.B.B.B.J%J%J%J%J%J%J%J%J%J%J%@!#!G)G)G)Y)Y)Y)$!N>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.%!&!'+c c c c d&d&d&d&d&I@I@I@I@I@k k k k b b b b 5'= = m@m@m@m@m@-'+'a a a a a H,H,- - - - - f,T+F F F F F 0 0 ; ; ; ; l l l $+$+$+> > > ]>]>^+^+^+^+I.I.9 9 9 9 5;, F+F+F+F+E 8 8 8 8 Q+m m m m o.-+C.C.C.7 7 ) ) P.P.P.{+{+6 6 6 O=*@*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] C 2 2 2 x+x+^ ^ R&>$U+U+U+1 / / / r$`.n.n.| | ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+K.K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + C [ [ _ _ _ _ d#} } } Q%X X X ( | | | n.`.r$r$/ / 1 >$^ y%E**!]'=!+!&>4 w.Z+$-Z+] ] y*Z+6@6@3 w.w.X&X&{ { { )=g.g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.-+o.m m m ' Q+8 8 8 E E F+F+F+F+, 9 9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+$+> (,$'$'$'$','-!{.{.{.{.{.{.{.{.{.{.i)- H,H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+'+G Z=Z=Z=& & & & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&B.B.B.B.B.B.B.J%J%* ;!G)G)G)G)G)G)>!,!'!{.{.{.{.{.{.{.{.{.{.{.{.{.{.)!!!'+'+'+'+'+'+c c c c d&d&d&d&d&I@I@I@I@k k k k b b b b 5'= = m@m@m@m@m@-'+'a a a a a H,H,- - - - - f,T+F F F F ,,0 0 ; ; ; ; l l $+$+$+> > > > ]>]>^+^+^+^+I.&.9 9 9 9 , F+F+F+F+E E 8 8 8 Q+' m m m o.-+C.C.C.7 7 ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.6@6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 1 / / r$r$`.n.| | | ( X X X Q%} } } d#_ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#n n v.q.q.4.H+H+H+`+`+=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=, . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.`.r$r$/ / [@1 N+^ 2,y*T>T>T>X=T>3 Z+y*Z+Z+] y*Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.o.o.m m m ' 8 8 8 8 E F+F+F+F+F+5;9 9 9 9 I.I.^+^+^+^+]>]>> > > $+$+$+l l > $'$'$'$','_'~!{.{.{.{.{.{.{.{.{.{.i)H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@I@d&d&d&d&c c c c '+'+'+'+'+'+G Z=Z=Z=& & & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{!]!^!^!^!G)G)G)/!(!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.m)_!Z=Z=Z=G '+'+'+'+'+'+c c c d&d&d&d&d&I@I@I@I@I@k k k b b b b 5'= = m@m@m@m@m@-'+'a a a a a H,H,- - - - - f,T+F F F F ,,0 ; ; ; ; l l l $+$+$+> > > ]>]>^+^+^+^+I.&.9 9 9 9 5;F+F+F+F+F+E 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.6@6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : c+< < < b+b+K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==@!@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J } [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+N+|=3,y%Z+Z+f;w.3 3 f;Z+Z+Z+y*Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.o.o.m m m ' 8 8 8 8 E F+F+F+F+, 5;9 9 9 &.I.I.^+^+^+]>]>]>> > > $+$+$+l l ; $+$'$',','_'('~!{.{.{.{.{.{.{.{.{.{.i)a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+G Z=Z=Z=& & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!:!{&{&{&{&{&{&{&{&{&{&{&{&@@ > > ]>]>]>^+^+^+I.I.&.9 9 9 5;, F+F+F+F+E 8 8 8 8 ' m m m o.o.C.C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=( . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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' [ [ _ _ _ _ d#} } Q%Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$x+1@2 2 $-Z+3 3 f;Z+6@Z+] Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m m Q+8 8 8 8 E F+F+F+F+, 5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+l l l ; ; $+$','_'('('('~!{.{.{.{.{.{.{.{.{.{.i)a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c c '+'+'+'+'+G Z=Z=Z=& & & & & & & .,.,r+J%J%J%J%J%J%J%J%J%B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!:!:!:!e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e :!:!:!:!:!:!:!:!{&{&3!` [![![![![![!4!5!{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-6!y).,.,& & & & & & & Z=Z=Z=G '+'+'+'+'+c c c d&d&d&d&d&I@I@I@I@k k k b b b b 5'= = m@m@m@m@m@-'+'a a a a H,H,- - - - - f,T+F F F F ,,0 ; ; ; ; l l l $+$+$+> > > ]>]>^+^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 8 ' m m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%Q%} } d#_ _ _ _ [ [ [ #%T$: : : c+< < < b+K.K.9.r#n n v.q.q.4.H+H+H+g@`+=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9*# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +&[ [ j+_ _ _ d#} } } Q%X X X ( | | n.n.`.r$/ / / 1 U+U+U+>$1@1@1@C ] Z+Z+f;:;6@6@Z+Z+Z+6@6@w.w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m m Q+8 8 8 E E F+F+F+F+, 9 9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+l l ; ; ; ; l ,'('('('('('7!{.{.{.{.{.{.{.{.{.{.i)+'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c c '+'+'+'+G G Z=Z=& & & & & & & .,r+r+J%J%J%J%J%J%J%J%B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e 8!9!0!0!0!0![![!a!b!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.c!d!J%J%J%J%r+r+.,& & & & & & & Z=Z=G G '+'+'+'+c c c c d&d&d&d&I@I@I@I@k k k b b b b 5'= = m@m@m@m@m@-'+'a a a a H,H,- - - - - f,F F F F F 0 0 ; ; ; ; l l $+$+$+> > > ]>]>^+^+^+^+I.&.9 9 9 9 , F+F+F+F+E E 8 8 8 Q+m m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.w.6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / / r$`.n.n.| | ( X X X Q%} } } d#_ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g.[ j+_ _ _ u%} } } Q%X X X ( | | | n.`.r$r$/ / 1 U+U+U+>$^ ^ 1@I=] ] ] f;:;w.6@Z+f;Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m m Q+8 8 8 E E F+F+F+F+5;9 9 9 9 I.I.^+^+^+]>]>]>> > $+$+$+l l l ; ; ; ; 0 e!('('('('('(' ){.{.{.{.{.{.{.{.{.{.i)m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+'+G Z=Z=& & & & & & & .,r+r+J%J%J%J%J%J%J%B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!e e e e e e e e e e e e e e e e e e 5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.e e e e e e e e e {&f!g!h!h!h!h!h!h!i!j!{.{.{.{.{.{.{.{.{.{.{.{.{.{.'!k!l!B.J%J%J%J%J%J%J%r+r+.,& & & & & & & Z=Z=G '+'+'+'+'+c c c d&d&d&d&I@I@I@I@k k k b b b b 5'= = m@m@m@m@m@+'a a a a a H,- - - - - f,T+F F F F ,,0 ; ; ; ; l l l $+$+> > > ]>]>]>^+^+^+I.I.9 9 9 9 5;F+F+F+F+E E 8 8 8 Q+m m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+1 1 / / r$r$`.n.| | | ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=@@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . % [ [ _ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+I=y%] y*y*6@Z+Z+f;Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+F+5;9 9 9 &.I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 0 ,,; ('('('('8'8' ){.{.{.{.{.{.{.{.{.{.i)m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G G Z=Z=& & & & & & .,r+r+J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!e e e e e e e e e e e e e 5.5.5.5.5.5.5.5.5.5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.5.5.5.5.5.5.5.5.5.5.5.5.5.m!n!h!h!h!h!h!h!R)o!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.p!q!{&{&{&B.B.B.J%J%J%J%J%J%J%r+r+.,& & & & & & Z=Z=G G '+'+'+'+c c c d&d&d&d&I@I@I@I@k k k b b b b 5'= = m@m@m@m@-'+'a a a a H,H,- - - - - f,T+F F F ,,0 0 ; ; ; ; l l $+$+$+> > > ]>]>^+^+^+^+I.&.9 9 9 5;F+F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] ] C C 2 2 x+x+^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < < b+K.K.9.r#r#n v.q.q.4.H+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=z /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.>$[ _ _ _ _ d#} } Q%Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 y%y%$-Z+Z+Z+f;Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+, 5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 ,,F F ; ('('('8'8'8' ){.{.{.{.{.{.{.{.{.{.i)m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & & .,.,r+J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e e e e e 5.5.5.5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.{&r!s!t!t!t!t!t!0!u! >{.{.{.{.{.{.{.{.{.{.{.{.{.{.v!w!B.{&{&{&{&{&{&{&B.B.B.J%J%J%J%J%J%J%r+.,.,& & & & & & Z=Z=G '+'+'+'+c c c d&d&d&d&d&I@I@I@k k k b b b b 5'= = m@m@m@m@-'+'a a a a H,H,- - - - f,T+F F F F ,,0 ; ; ; ; l l $+$+$+> > > ]>]>^+^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%Q%} } d#_ _ _ _ [ [ [ #%: : : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+Q.1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - [ j+_ _ _ u%} } } Q%X X X ( | | n.n.`.r$/ / / 1 U+U+>$>$^ ^ ^ x+2 2 2 $-3-Z+Z+f;Z+6@6@3 w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+, 5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+l l l ; ; ; 0 0 ,,F F F ; ('8'8'8'8'8' ){.{.{.{.{.{.{.{.{.{.i)= 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & & .,r+J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e e e 5.5.5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!x!Y.Y.Y.Y.Y.Y.y!z!A!A!A!A!A!A!B!c!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.C!D!:!:!:!{&{&{&{&{&{&{&{&{&B.B.B.J%J%J%J%J%J%J%r+.,& & & & & & Z=Z=G '+'+'+'+c c c c d&d&d&I@I@I@I@k k k b b b b 5'= m@m@m@m@m@-'a a a a a H,- - - - - f,T+F F F ,,0 0 ; ; ; l l l $+$+> > > ]>]>^+^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.C.7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } } d#_ _ _ j+[ [ [ #%: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==@!@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J } j+_ _ _ u%} } } Q%X X X ( | | | n.`.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=O=6 6 6 {+{+P.P.) ) ) 7 C.C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+, 9 9 9 9 I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 0 F F F F T+,,8'8'8'8'i'i' ){.{.{.{.{.{.{.{.{.{.i)5'b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & .,.,r+J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&:!:!:!:!e e e e e e e e e 5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.x!x!x!x!$ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ E!F!g!g!g!g!A!A!Y)G!J;{.{.{.{.{.{.{.{.{.{.{.{.{.{.)'H!e e e e e e :!:!:!{&{&{&{&{&{&{&{&B.B.B.J%J%J%J%J%J%r+.,.,& & & & & Z=Z=G '+'+'+'+'+c c c d&d&d&I@I@I@I@k k k b b b 5'= = m@m@m@m@-'+'a a a a H,H,- - - - f,T+F F F F ,,0 ; ; ; ; l l $+$+$+> > > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 8 ' m m m o.-+C.C.C.7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / / r$`.n.| | | ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=H.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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' [ _ _ _ _ d#} } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] ] Z+Z+6@6@w.w.X&X&{ { { )=g.g.g.)+)+~ ~ ~ i=D D D t=_.*@*@*@O=6 6 6 {+{+P.P.) ) ) 7 C.C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+, 9 9 9 9 I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 ,,F F F F f,- F 8'8'8'i'i'i' ){.{.{.{.{.{.{.{.{.{.i)b b k k k I@I@I@I@d&d&d&d&c c '+'+'+'+'+G Z=Z=& & & & & .,r+J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e 5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ $ $ $ $ $ $ $ W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#W#$ I!J!K!K!K!K!K!K!L!M!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.N!O!5.5.e e e e e e e e :!:!:!{&{&{&{&{&{&{&{&B.B.B.J%J%J%J%J%J%r+.,& & & & & Z=Z=Z=G '+'+'+'+c c c d&d&d&I@I@I@I@k k k b b b 5'= = m@m@m@m@-'+'a a a a H,- - - - - f,F F F F ,,0 ; ; ; ; l l $+$+$+> > > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 8 ' m m m o.-+C.C.C.7 ) ) ) P.P.{+{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+1 1 / / r$r$n.n.| | ( ( X X X Q%} } d#u%_ _ _ [ [ [ #%T$: : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.>$j+_ _ _ d#} } } Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 ,,F F F T+f,- - - - H,H,- i'i'i'R'Q'Q'V!{.{.{.{.{.{.{.{.{.{.=~I@I@d&d&d&c c c '+'+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!e e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.Y.x!$ $ $ $ $ $ W#W#W#W#W#W#P!P!f f f f f f f f f f f f K K K K K K K K K K K K -~-~-~-~-~-~-~-~-~-~-~-~-~-~-~K $ ;~>~`!`!`!`!`!`!,~'~{.{.{.{.{.{.{.{.{.{.{.{.{.{..>)~:!W#W#W#$ $ $ $ $ $ x!x!Y.Y.Y.Y.Y.Y.5.5.5.5.e e e e e e e :!:!{&{&{&{&{&{&{&B.B.J%J%J%J%J%J%r+.,& & & & & Z=Z='+'+'+'+c c c d&d&d&I@I@I@I@k k b b b b = = m@m@m@m@-'+'a a a H,H,- - - - f,T+F F F ,,0 0 ; ; ; l l $+$+$+> > > ]>]>^+^+^+I.&.9 9 9 5;, F+F+F+E E 8 8 8 Q+m m m o.o.C.C.C.7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=i=~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ >$U+U+1 1 / / r$r$n.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - j+_ _ _ u%} } } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 C C ] ] ] Z+Z+6@6@w.w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 0 F F F F T+- - - - - H,a a - i'G'R'Q'Q'Q'V!{.{.{.{.{.{.{.{.{.{.=~d&d&d&d&c c '+'+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%J%B.B.{&{&{&{&{&{&:!:!:!e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ W#W#W#W#W#P!P!f f f f f f f f f f K K K K K K K -~-~-~-~y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.!~~~{~{~{~{~{~{~]~^~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{./~(~f f P!P!W#W#W#W#W#W#$ $ $ $ $ x!Y.Y.Y.Y.Y.Y.5.5.5.5.e e e e e e :!:!:!{&{&{&{&{&{&B.B.B.J%J%J%J%J%r+.,& & & & & Z=G '+'+'+'+c c c d&d&d&I@I@I@k k k b b b 5'= = m@m@m@-'+'a a a a H,- - - - - T+F F F F 0 0 ; ; ; l l $+$+$+> > > ]>]>^+^+^+I.&.9 9 9 5;, F+F+F+E E 8 8 8 Q+m m m o.-+C.C.C.7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==@6.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J M _ _ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 0 F F F F f,- - - - - H,a a a - G'Q'Q'Q'Q'*)V!{.{.{.{.{.{.{.{.{.{.=~d&d&c c c '+'+'+G Z=Z=& & & & & r+J%J%J%J%J%B.B.B.{&{&{&{&{&{&:!:!e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.x!$ $ $ $ $ W#W#W#W#W#P!P!f f f f f f f f K K K K K -~-~-~y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y._~:~{~{~{~{~{~{~<~[~}~{.{.{.{.{.{.{.{.{.{.{.{.{.{.|~1~f f f f f f f f P!P!W#W#W#W#W#$ $ $ $ $ x!Y.Y.Y.Y.Y.Y.5.5.5.5.e e e e e e :!:!{&{&{&{&{&{&{&B.B.J%J%J%J%J%r+.,& & & & Z=Z=G '+'+'+'+c c d&d&d&d&I@I@I@k k b b b b = = m@m@m@m@-'a a a a H,H,- - - - f,F F F F ,,0 ; ; ; ; l l $+$+> > > ]>]>^+^+^+I.I.9 9 9 5;, F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.C.7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@Z+Z+] ] ] C C 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$`.n.| | | ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%~&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 j+_ _ _ d#} } } Q%X X ( ( | | n.n.r$r$/ / 1 1 U+U+>$^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 &.I.^+^+^+]>]>> > > $+$+l l ; ; ; ; 0 ,,F F F F f,- - - - H,H,a a a +'H,Q'Q'Q'Q'*)&)2~{.{.{.{.{.{.{.{.{.{.=~c c c '+'+'+G Z=Z=& & & & & .,r+J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.x!$ $ $ $ $ W#W#W#W#P!P!f f f f f f f f K K K K -~-~y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.y.;+;+;+;+;+;+;+;+3~3~3~3~3~3~3~3~3~4~n!>~>~>~>~>~>~5~6~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.7~8~-~K K K K K f f f f f f f P!P!W#W#W#W#W#$ $ $ $ x!Y.Y.Y.Y.Y.Y.5.5.5.e e e e e e :!:!{&{&{&{&{&{&{&B.B.J%J%J%J%J%r+.,& & & & Z=Z=G '+'+'+c c c d&d&d&I@I@I@I@k k b b b 5'= m@m@m@m@-'+'a a a H,H,- - - - f,T+F F F ,,0 ; ; ; ; l l $+$+> > > ]>]>^+^+^+I.I.9 9 9 5;, F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / r$r$`.n.| | ( ( X X X Q%} } d#_ _ _ _ [ [ [ #%: : : c+< < < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d+[ _ _ _ u%} } } Q%X X X ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] ] Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=O=6 6 {+{+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 &.I.^+^+^+]>]>> > > $+$+l l ; ; ; ; 0 ,,F F F T+f,- - - - H,a a a a +'-'a Q'Q'*)*)&)~)2~{.{.{.{.{.{.{.{.{.{.9~c '+'+'+'+G Z=& & & & & .,r+J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!e e e e e 5.5.5.5.Y.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#W#P!P!f f f f f f K K K K -~-~y.y.y.y.y.y.y.y.y.y.y.y.y.;+;+;+;+3~3~3~3~3~3~3~3~3~3~3~]+]+]+]+]+]+]+]+]+]+0~a~Z!Z!Z!>~>~>~b~c~9;{.{.{.{.{.{.{.{.{.{.{.{.{.{.d~e~y.y.y.y.y.y.-~-~K K K K f f f f f f f P!W#W#W#W#W#$ $ $ $ x!Y.Y.Y.Y.Y.5.5.5.5.e e e e e :!:!:!{&{&{&{&{&{&B.B.J%J%J%J%J%r+& & & & & Z=Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b b = = m@m@m@m@+'a a a a H,- - - - - T+F F F ,,0 ; ; ; ; l l $+$+$+> > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+)+g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x x y z S T T >.d.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=H+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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C._ _ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ ^ x+2 2 C C ] ] ] Z+Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=i=D D t=_.*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > > $+$+l l ; ; ; ; 0 ,,F F F T+- - - - - H,a a a a +'m@m@a Q'*)&)~)~)~)f~{.{.{.{.{.{.{.{.{.{.9~'+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%B.{&{&{&{&{&{&:!:!:!e e e e e 5.5.5.Y.Y.Y.Y.Y.x!x!$ $ $ $ W#W#W#W#P!f f f f f f f K K K -~-~y.y.y.y.y.y.y.y.y.y.y.;+;+3~3~3~3~3~3~3~]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+g~h~Z!Z!Z!Z!Z!Z!i~v){.{.{.{.{.{.{.{.{.{.{.{.{.{.0,j~k~y.y.y.y.y.y.y.y.y.y.y.-~-~K K K K f f f f f f P!P!W#W#W#W#$ $ $ $ x!Y.Y.Y.Y.Y.5.5.5.e e e e e e :!:!{&{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & & Z=G '+'+'+'+c c d&d&d&I@I@I@I@k k b b b 5'= m@m@m@m@-'a a a a H,H,- - - - T+F F F F 0 0 ; ; ; l l $+$+$+> > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^.j+_ _ _ d#} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 0 F F F F T+- - - - H,H,a a a +'-'m@m@m@a *)&)~)~)~)~)f~{.{.{.{.{.{.{.{.{.{.9~'+G Z=Z=& & & & .,r+J%J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e e 5.5.5.Y.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#P!f f f f f f K K K -~-~y.y.y.y.y.y.y.y.y.y.;+;+3~3~3~3~3~]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+l~m~Z!Z!Z!Z!Z!Z!n~o~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.p~q~3~3~3~3~3~;+;+;+y.y.y.y.y.y.y.y.y.-~-~K K K f f f f f f P!P!W#W#W#W#$ $ $ x!x!Y.Y.Y.Y.5.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b 5'= = m@m@m@-'+'a a a H,H,- - - - f,F F F F 0 0 ; ; ; l l $+$+$+> > ]>]>^+^+^+^+I.9 9 9 9 , F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 O=O=*@*@_.t=D D i=i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@Z+Z+] ] ] C C 2 2 x+^ ^ ^ R&>$U+U+1 / / / r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+K.K.9.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+q+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ) _ _ _ u%} } } Q%X X X ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 0 F F F F f,- - - - H,H,a a a +'-'m@m@m@= +'&)~)~)~)~)~)r~{.{.{.{.{.{.{.{.{.{.9~G Z=& & & & & r+J%J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e e 5.5.5.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#P!f f f f f f K K K -~y.y.y.y.y.y.y.y.y.;+;+3~3~3~3~]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+s~s~s~s~s~s~s~s~s~s~s~s~s~# # ]+t~u~v~v~v~v~J!J!w~)!{.{.{.{.{.{.{.{.{.{.{.{.{.{./;x~0~]+]+]+]+]+]+]+3~3~3~3~;+;+y.y.y.y.y.y.y.y.y.-~K K K f f f f f f P!W#W#W#W#$ $ $ $ x!Y.Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.J%J%J%J%J%r+.,& & & & Z=Z=G '+'+'+c c d&d&d&I@I@I@k k k b b b 5'= m@m@m@m@+'a a a a H,- - - - f,T+F F F ,,0 ; ; ; l l $+$+$+> > ]>]>^+^+^+^+I.9 9 9 9 , F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 1 / / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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H j+_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ ^ x+2 2 C y%] ] ] Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.C.o.m m m ' Q+8 8 8 E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 0 F F F F f,- - - - H,a a a a +'m@m@m@m@= 5'm@~)~)~)~)4)4)r~{.{.{.{.{.{.{.{.{.{.9~Z=& & & & .,r+J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e 5.5.5.5.Y.Y.Y.Y.x!$ $ $ $ W#W#W#P!f f f f f f K K K -~y.y.y.y.y.y.y.y.;+;+3~3~3~3~]+]+]+]+]+]+]+]+]+]+]+s~s~s~s~s~s~s~# # # # # # # # # # # # # # # y~z~v~v~v~v~v~v~A~B~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.C~D~s~s~]+]+]+]+]+]+]+]+]+]+]+]+3~3~3~;+;+y.y.y.y.y.y.y.y.-~-~K K K f f f f f P!W#W#W#W#$ $ $ x!Y.Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%J%r+& & & & & Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@-'a a a a H,- - - - f,T+F F F ,,0 ; ; ; l l $+$+$+> > > ]>^+^+^+^+I.9 9 9 9 , F+F+F+E E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%: : : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=1+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ) _ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 C.C.C.o.m m m ' Q+8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+f,- - - - H,a a a a -'m@m@m@m@= 5'b m@~)~)~)4)4)4)E~{.{.{.{.{.{.{.{.{.{.9~& & & .,r+J%J%J%J%B.B.{&{&{&{&{&{&:!e e e e e 5.5.5.Y.Y.Y.Y.Y.x!$ $ $ W#W#W#W#P!f f f f f K K K -~y.y.y.y.y.y.y.;+;+3~3~3~3~]+]+]+]+]+]+]+]+]+]+s~s~s~s~s~# # # # # # # # # # # # # # # # # # # # F~G~H~v~v~v~v~v~I~J~K~{.{.{.{.{.{.{.{.{.{.{.{.{.{.v!L~]+# # # s~s~s~s~s~s~]+]+]+]+]+]+]+]+]+]+3~3~3~;+;+y.y.y.y.y.y.y.-~-~K K f f f f f P!P!W#W#W#$ $ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=Z=G '+'+'+c c d&d&d&I@I@I@k k k b b 5'= = m@m@m@-'+'a a a H,- - - - - T+F F F ,,0 ; ; ; ; l $+$+$+> > > ]>^+^+^+^+I.9 9 9 9 , F+F+F+E E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ )+)+g.g.)=)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ R&>$U+U+1 / / / r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+Q.1+W.>@>@B B o o V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v w x y y S T T >.,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e#_ _ _ u%} } } Q%X X X ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D t=_.*@*@O=O=6 6 {+{+P.P.) ) ) 7 C.C.C.o.o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+f,- - - - H,a a a +'-'m@m@m@= = 5'b b = ~)~)4)4)4)d)E~{.{.{.{.{.{.{.{.{.{.9~& & .,J%J%J%J%J%B.{&{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.Y.x!x!$ $ $ W#W#W#P!f f f f f K K K -~y.y.y.y.y.y.y.;+;+3~3~3~]+]+]+]+]+]+]+]+]+s~s~s~s~# # # # # # # # # # # # # # # M~M~M~M~M~M~N~N~N~N~O~P~Q~Q~Q~Q~Q~Q~R~S~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.T~U~# # # # # # # # # # # s~s~s~s~]+]+]+]+]+]+]+]+]+3~3~3~3~;+y.y.y.y.y.y.y.-~-~K K f f f f f P!W#W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b = = m@m@m@-'+'a a a H,H,- - - - T+F F F ,,0 ; ; ; ; l l $+$+> > > ]>^+^+^+^+I.9 9 9 9 , F+F+F+E E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@Z+Z+] ] ] C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x x y S S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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V~_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ x+x+2 2 C y%] ] ] Z+6@6@3 w.w.X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - - H,a a a +'-'m@m@m@= = b b b k = 4)4)4)d)d)d)W~{.{.{.{.{.{.{.{.{.{.9~.,r+J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.Y.x!$ $ $ $ W#W#W#P!f f f f f K K -~y.y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+]+]+]+s~s~s~s~# # # # # # # # # # # # M~M~M~N~N~N~N~N~N~N~N~j j j j X~Y~u~u~u~u~u~u~Z~`~/;{.{.{.{.{.{.{.{.{.{.{.{.{.{..) {N~N~N~M~M~M~# # # # # # # # # # # # s~s~s~s~]+]+]+]+]+]+]+]+3~3~3~;+y.y.y.y.y.y.y.-~K K K f f f f P!P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!{&{&{&{&{&{&B.J%J%J%J%J%.,& & & & Z=Z=G '+'+'+c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@+'a a a H,H,- - - - f,F F F ,,0 ; ; ; ; l l $+$+> > > ]>]>^+^+^+I.9 9 9 5;, F+F+F+E E 8 8 8 ' m m m o.C.C.C.7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)={ { { X&X&w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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(._ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C ] ] ] Z+6@6@6@w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,H,a a a +'m@m@m@m@= 5'b b b k k b 4)4)d)d)d)t)W~{.{.{.{.{.{.{.{.{.{.9~J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e 5.5.Y.Y.Y.Y.x!$ $ $ W#W#W#W#P!f f f f K K K -~y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+]+]+s~s~s~# # # # # # # # # # # M~M~N~N~N~N~N~N~j j j j j j j j j j j j .{+{u~u~u~u~u~u~@{(!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.#{${j j j j N~N~N~N~N~N~M~M~M~# # # # # # # # # # s~s~s~]+]+]+]+]+]+]+]+3~3~3~;+y.y.y.y.y.y.y.-~K K f f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@-'a a a a H,- - - - f,F F F F 0 0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.9 9 9 5;, F+F+F+E 8 8 8 Q+' m m m o.C.C.C.7 ) ) ) P.P.{+{+6 6 O=O=*@*@_.t=D D i=~ ~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+y*] ] y%C 2 2 x+x+^ ^ R&>$U+U+1 / / / r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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P=_ _ _ d#} } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,H,a a a +'m@m@m@m@= 5'b b b k k I@b 4)d)d)d)t)t)W~{.{.{.{.{.{.{.{.{.{.9~J%J%J%B.{&{&{&{&{&{&:!e e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#W#P!f f f f f K K -~y.y.y.y.y.y.;+;+3~3~]+]+]+]+]+]+]+]+s~s~s~# # # # # # # # # M~M~N~N~N~N~N~j j j j j j j j j j j j j +&+&+&%{&{*{*{*{*{*{*{={-{g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.;{>{j j j j j j j j j j j j j N~N~N~N~M~M~M~# # # # # # # # # s~s~s~]+]+]+]+]+]+]+3~3~3~;+y.y.y.y.y.y.-~K K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%.,& & & & Z=Z=G '+'+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@-'a a a a H,- - - - f,F F F F 0 0 ; ; ; l l $+$+> > > ]>^+^+^+^+I.9 9 9 5;, F+F+F+E 8 8 8 Q+m m m o.o.C.C.7 7 ) ) P.P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ )+)+g.g.)=)={ { +=X&w.w.6@6@6@Z+] ] ] C C 2 2 x+^ ^ ^ >$U+U+U+1 / / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u v x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+q+L+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j _ _ _ u%} } } Q%X X ( ( | | n.`.r$r$/ / 1 U+U+>$R&^ ^ ^ x+2 2 C y%] ] y*Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ i=i=D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E F+F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,a a a a -'m@m@m@m@= 5'b b k k k I@I@k d)d)t)t)t)F'W~{.{.{.{.{.{.{.{.{.{.9~J%B.B.{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#W#P!f f f f f K K -~y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+s~s~s~# # # # # # # # # M~M~N~N~N~N~j j j j j j j j j j +&+&+&+&+&+&+&,{,{,{'{q~*{*{*{*{*{*{){!{{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-J~0~,{,{+&+&+&+&+&+&+&j j j j j j j j j j N~N~N~N~M~M~# # # # # # # # s~s~s~]+]+]+]+]+]+]+3~3~;+;+y.y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.e e e e e :!:!{&{&{&{&{&B.J%J%J%J%r+.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@-'+'a a a H,- - - - f,T+F F F 0 0 ; ; ; l l $+$+> > > ]>^+^+^+^+I.9 9 9 5;, F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.P.{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.[.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *@_ _ u%} } } Q%X X X ( | | n.n.r$r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] Z+6@6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D D _.*@*@O=O=6 6 {+{+P.P.) ) ) 7 C.C.C.o.m m m ' 8 8 8 E F+F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,a a a a -'m@m@m@= = b b b k k I@I@I@d&k d)t)t)F'F'F'~{{.{.{.{.{.{.{.{.{.{.9~B.{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.Y.x!$ $ W#W#W#P!f f f f K K K -~y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+s~s~s~# # # # # # # # M~M~N~N~N~j j j j j j j j j +&+&+&+&+&,{,{,{(.(.(.(.(.(.{{]{*{*{*{*{*{*{^{/{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.({_{(.(.(.(.(.(.(.(.,{,{,{,{+&+&+&+&+&j j j j j j j j N~N~N~N~M~M~# # # # # # # s~s~s~]+]+]+]+]+]+]+3~3~;+y.y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%.,& & & & Z=Z='+'+'+c c d&d&d&I@I@I@k k b b b 5'= m@m@m@-'+'a a a H,- - - - f,T+F F F 0 0 ; ; ; l l $+$+> > > ]>^+^+^+I.I.9 9 9 5;F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)={ { { X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 / / / r$`.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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N~_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.o.o.m m ' Q+8 8 E E F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a a -'m@m@m@= = b b b k k I@I@I@d&d&k t)t)F'F'F'I):{{.{.{.{.{.{.{.{.{.{.9~{&{&{&{&{&:!e e e e e 5.5.Y.Y.Y.Y.x!$ $ W#W#W#P!f f f f K K -~y.y.y.y.y.y.;+3~3~]+]+]+]+]+]+]+s~s~# # # # # # # M~M~N~N~N~j j j j j j j j +&+&+&+&,{,{,{(.(.(.(.(.(.(.(.(.(.j U~<{*{*{*{*{*{*{x~j!{.{.{.{.{.{.{.{.{.{.{.{.{.{.}~[{}{e#e#(.(.(.(.(.(.(.(.(.(.(.(.(.(.,{,{+&+&+&+&+&j j j j j j j N~N~N~M~M~# # # # # # # s~s~s~]+]+]+]+]+]+3~3~;+;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&{&B.J%J%J%J%r+.,& & & Z=Z=G '+'+'+c c d&d&d&I@I@k k b b b 5'= m@m@m@m@+'a a a H,- - - - f,T+F F F 0 0 ; ; ; l l $+$+> > > ]>^+^+^+I.I.9 9 9 5;F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D i=~ ~ ~ ~ )+g.g.g.)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ >$U+U+U+1 / / r$r$n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=l+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *@_ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ ^ x+2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'-'m@m@m@= 5'b b b k k I@I@I@d&d&c I@t)F'F'F'H)H):{{.{.{.{.{.{.{.{.{.{.9~{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#P!f f f f K K -~y.y.y.y.y.y.;+3~3~]+]+]+]+]+]+s~s~# # # # # # # M~M~N~N~N~j j j j j j +&+&+&+&,{,{(.(.(.(.(.(.(.(.(.(.(.e#e#e#e#|{1{*{*{*{*{*{*{2{3{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.&~4{e#e#e#e#e#e#e#e#e#e#e#e#e#(.(.(.(.(.(.(.(.(.(.,{,{+&+&+&+&j j j j j j j N~N~N~M~# # # # # # # s~s~s~]+]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ Y.Y.Y.Y.5.5.5.e e e e :!{&{&{&{&{&B.B.J%J%J%J%.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b 5'= m@m@m@m@+'a a a H,H,- - - f,T+F F F 0 0 ; ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 ' m m m o.C.C.C.7 ) ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ )+)+g.g.)=)={ { +=X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.b.b.<.[.-.-.Q R R R q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . s~_ _ _ d#} } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] Z+6@6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+, 5;9 9 9 I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'-'m@m@m@= 5'b b b k k I@I@d&d&d&c c d&F'F'I)H)Q)Q):{{.{.{.{.{.{.{.{.{.{.9~{&{&:!e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#W#P!f f f K K -~y.y.y.y.y.;+3~3~3~]+]+]+]+]+s~s~s~# # # # # # M~M~N~N~j j j j j j j +&+&+&,{,{(.(.(.(.(.(.(.(.(.e#e#e#e#e#e#e#e#M~5{<{h~6{6{6{6{*{7{z,{.{.{.{.{.{.{.{.{.{.{.{.{.{.8{9{(.H H H H H H H 0{0{0{0{e#e#e#e#e#e#e#e#e#(.(.(.(.(.(.(.(.,{,{+&+&+&+&j j j j j j N~N~N~M~# # # # # # # s~s~]+]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ x!Y.Y.Y.Y.5.5.e e e e :!:!{&{&{&{&{&B.J%J%J%J%r+& & & & Z=Z='+'+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@+'a a a H,H,- - - f,T+F F F 0 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 ' m m m o.C.C.C.7 ) ) ) P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q q r s t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=#+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D _ _ u%} } } Q%X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=O=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 I.^+^+^+]>]>> > > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'-'m@m@m@= 5'b b b k k I@I@d&d&d&c c '+d&F'I)H)Q)Q)Q):{{.{.{.{.{.{.{.{.{.{.9~:!:!e e e e 5.5.Y.Y.Y.Y.x!$ $ W#W#W#P!f f f K K -~y.y.y.y.y.;+3~3~]+]+]+]+]+]+s~s~# # # # # # M~M~N~N~j j j j j j +&+&+&,{,{(.(.(.(.(.(.(.(.e#e#e#e#e#e#e#0{0{H H H a{b{6{6{6{6{6{6{c{d{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.e{f{g g g g g g H H H H H H H H H H H 0{0{0{e#e#e#e#e#e#e#(.(.(.(.(.(.(.,{,{+&+&+&j j j j j j N~N~N~M~# # # # # # s~s~s~]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#$ $ $ x!Y.Y.Y.5.5.5.e e e e :!{&{&{&{&{&B.B.J%J%J%r+.,& & & Z=Z=G '+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@-'a a a H,H,- - - f,T+F F F 0 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E E 8 8 Q+' m m o.o.C.C.7 7 ) ) P.P.P.{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.a.b.b.<.[.-.-.Q R R R q r r t u u v w x x y S S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=& . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 C y%] ] ] Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+P.P.) ) ) 7 C.C.C.o.m m m ' 8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+]>]>> > > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'-'m@m@m@= 5'b b k k I@I@I@d&d&d&c c '+'+d&H)H)Q)Q)Q)Y)g{{.{.{.{.{.{.{.{.{.{.h{e e e e 5.5.5.Y.Y.Y.x!$ $ W#W#W#P!f f f f K -~y.y.y.y.y.;+3~3~]+]+]+]+]+]+s~s~# # # # # # M~N~N~N~j j j j j +&+&+&,{,{(.(.(.(.(.(.e#e#e#e#e#e#0{0{0{H H H H H H i{j{<{<{<{<{<{<{Z~k{i,{.{.{.{.{.{.{.{.{.{.{.{.{.{.l{m{g g g g g g g g g g g g g g g g g H H H H H H H H 0{0{e#e#e#e#e#e#(.(.(.(.(.(.(.,{+&+&+&j j j j j j N~N~N~M~# # # # # # s~s~]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f W#W#W#$ $ $ x!Y.Y.Y.5.5.e e e e :!:!{&{&{&{&B.B.J%J%J%J%.,& & & & Z=G '+'+'+c c d&d&I@I@I@k k b b b = = m@m@m@-'a a a H,H,- - - f,T+F F F 0 0 ; ; ; l $+$+$+> > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.;.Q R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=0.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^._ _ u%} } } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.)+)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 E E F+F+F+, 9 9 9 &.I.^+^+^+]>> > > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@m@= 5'b b k k I@I@I@d&d&d&c c '+'+G Z='+Q)Q)Q)Y)G)G)n{{.{.{.{.{.{.{.{.{.{.h{e 5.5.5.Y.Y.Y.x!$ $ W#W#W#P!f f f K K -~y.y.y.y.;+3~3~]+]+]+]+]+s~s~# # # # # # M~N~N~j j j j j +&+&+&,{(.(.(.(.(.(.e#e#e#e#e#0{0{H H H H H H g g g g g g s{t{<{u{u{u{u{u{v{w{g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.6~x{d+d+d+d+d+d+d+d+d+D+D+D+D+D+D+D+D+D+D+D+D+g g g g g g g g g g H H H H H H 0{0{e#e#e#e#(.(.(.(.(.(.,{,{+&+&j j j j j N~N~N~M~# # # # # s~s~]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f P!W#W#$ $ $ x!Y.Y.Y.5.5.e e e e :!:!{&{&{&{&B.B.J%J%J%r+.,& & & Z=Z='+'+'+c c d&d&d&I@I@k k b b b 5'= m@m@m@-'a a a H,H,- - - f,T+F F F 0 0 ; ; ; l $+$+$+> > ]>]>^+^+^+I.9 9 9 5;, F+F+F+E 8 8 8 ' m m m o.-+C.C.7 ) ) ) P.P.{+6 6 6 O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p f.r.k.k.a.b.<.[.-.-.;.R R R q r r s t u u w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#q$q$&%6%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :@_ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+{+P.P.) ) 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+5;9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+- - - - H,a a a +'m@m@m@= 5'b b k k I@I@I@d&d&c c '+'+G Z=& & & .,r+J%J%J%B.{&{&{&{&@>h!h!h!h!t!t!1]{.{.{.{.{.{.{.{.{.{.2]K y.y.y.y.;+3~]+]+]+]+s~s~# # # # M~N~N~j j j +&+&,{(.(.(.e#e#e#0{H H H g g g g D+D+D+D+d+d+d+d+d+M+M+M+J.J.J.J.J.J.g 3]4]+]+]+]+]+]+]5]y,{.{.{.{.{.{.{.{.{.{.{.{.{.{.7)6]7]e@e@e@e@e@e@e@J J J J J J J J J J J J J J J J J J J e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.J.M+M+d+d+d+d+d+d+D+D+D+g g g g g H H H 0{e#e#(.(.(.(.,{+&+&j j j N~N~M~# # # # s~]+]+]+]+3~3~;+y.y.y.-~K K f f f W#W#$ $ x!Y.Y.Y.5.5.e e e :!:!{&{&{&{&B.J%J%J%r+& & & & Z='+'+'+c c d&d&I@I@I@k k b b 5'= m@m@m@+'a a a H,- - - f,T+F F ,,0 ; ; ; l l $+$+> > ]>]>^+^+I.I.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q r r s t u v w x x y z S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~&@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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W$H._ d#} } Q%X X X ( | | n.n.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+, 9 9 9 I.I.^+^+]>]>> > $+$+l l ; ; ; 0 ,,F F T+f,- - - H,a a a +'m@m@m@= 5'b b k k I@I@I@d&d&c c '+'+G Z=& & & .,r+J%J%J%B.{&{&{&{&:!{&h!h!h!t!t!A!1]{.{.{.{.{.{.{.{.{.{.2]y.y.y.y.;+3~]+]+]+]+s~# # # # M~N~N~j j j +&+&,{(.(.(.(.e#e#0{H H H g g g g D+D+D+d+d+d+d+d+d+M+M+J.J.J.J.J.J.J.E+r{8]+]+]+]+]+]+]9]({{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.0]a]J J J 7.7.7.7.7.!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.7.7.J J J J e@e@e@e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.J.M+M+d+d+d+d+d+D+D+D+D+g g g g H H H e#e#e#(.(.(.(.,{+&j j j j N~N~# # # # s~s~]+]+]+]+3~;+y.y.y.y.K K f f f P!W#W#$ $ Y.Y.Y.5.5.e e e e :!{&{&{&{&B.J%J%J%r+& & & & Z='+'+'+c c d&d&I@I@I@k b b b = = m@m@m@+'a a a H,- - - f,F F F ,,0 ; ; ; l $+$+$+> > ]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 ' m m o.-+C.C.7 7 ) ) P.P.{+6 6 6 O=*@*@*@t=D D i=~ ~ ~ )+)+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p f.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . = _ u%} } } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=P=6 6 {+P.P.) ) 7 7 C.C.-+o.m m ' 8 8 8 E F+F+F+, 5;9 9 &.I.^+^+^+]>> > $+$+$+l ; ; ; 0 ,,F F F f,- - - H,a a a +'m@m@m@= = b b k k I@I@I@d&d&c c '+'+G Z=& & & .,r+J%J%J%B.{&{&{&{&:!e {&h!h!t!t!A!A!1]{.{.{.{.{.{.{.{.{.{.2]y.y.;+3~3~]+]+]+s~s~# # # # M~N~j j j j +&,{(.(.(.(.e#e#0{H H H g g g g D+D+D+d+d+d+d+d+d+M+M+J.J.J.J.J.J.E+q=a+b]+]+]+]+]+]+]c]d]'!{.{.{.{.{.{.{.{.{.{.{.{.{.{.!{e]7.!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.7.J J e@e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.M+M+d+d+d+d+d+d+D+D+D+g g g g H H 0{e#e#e#(.(.(.(.+&+&j j j N~N~M~# # # # s~]+]+]+]+3~3~y.y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.5.5.e e e e :!{&{&{&{&B.J%J%J%r+.,& & & Z='+'+'+c c d&d&I@I@I@k b b b = m@m@m@-'+'a a H,H,- - - f,F F F ,,0 ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 5;F+F+F+F+E 8 8 Q+m m m o.-+C.C.7 ) ) P.P.P.{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+~+1+W.W.>@B B o o V m.m.m. +y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.a.b.<.[.-.-.Q R R R q r r t u u v w x x y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==@X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.R&_ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+{+P.P.) ) 7 C.C.-+o.m m m Q+8 8 E E F+F+F+5;9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; 0 ,,F F F f,- - - H,H,a a +'-'m@m@= = b b b k I@I@I@d&d&c c '+'+G Z=& & & .,r+J%J%J%B.{&{&{&{&:!e e {&t!t!A!A!A!g!f]{.{.{.{.{.{.{.{.{.{.2]y.;+3~]+]+]+]+s~s~# # # M~N~N~j j j +&+&,{(.(.(.e#e#e#0{H H g g g g D+D+D+d+d+d+d+d+M+M+J.J.J.J.J.J.E+E+q=@ ]g]+]+]+]+]+]h]6]i]{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.j]k]!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.J J e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ q=E+E+J.J.J.J.J.M+M+M+d+d+d+d+d+D+D+D+g g g H H H 0{e#e#e#(.(.(.,{+&+&j j j N~N~# # # # s~s~]+]+]+]+3~;+y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.5.5.e e e e :!{&{&{&{&B.J%J%J%r+.,& & & Z='+'+'+c c d&d&I@I@k k b b b = m@m@m@-'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.9 9 9 5;F+F+F+E 8 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@_.D D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ : : : c+< < < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p r.r.k.a.b.b.[.-.-.;.Q R R q r r s t u u v w x y z S T T >.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e _ u%} } } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+, 9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+- - - - H,a a a -'m@m@m@= b b b k I@I@I@d&d&c c '+'+G Z=& & & .,r+J%J%J%B.{&{&{&{&:!e e e :!t!A!A!A!g!K!f]{.{.{.{.{.{.{.{.{.{.2];+3~]+]+]+]+s~# # # # M~N~j j j j +&,{(.(.(.e#e#e#0{H H H g g g D+D+D+d+d+d+d+d+M+M+J.J.J.J.J.J.E+q=@ @ l]&]+]+]+]+]h]m]n]o]g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.p]q]!@!@!@!@!@!@!@!@!@!@s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+s+!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.J J e@e@e@e@e@e@e@e@e@e@i @ @ @ @ @ @ @ @ q=E+J.J.J.J.J.J.M+M+d+d+d+d+d+D+D+D+g g g H H H 0{e#e#(.(.(.(.,{+&j j j N~N~M~# # # # s~]+]+]+]+3~;+y.y.y.y.K K f f f W#W#$ $ x!Y.Y.Y.5.5.e e e :!{&{&{&{&B.J%J%J%r+.,& & & Z='+'+'+c c d&d&I@I@k k b b 5'= m@m@m@-'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+I.I.9 9 9 , F+F+F+E 8 8 8 ' m m o.o.C.C.7 7 ) ) P.P.{+6 6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.>@>@B B o o V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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O=} } } Q%X X ( | | n.n.r$/ / [@1 U+U+>$^ ^ x+2 2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ $ W#P!f f K -~y.y.;+3~]+]+]+s~# # # N~j j !/*{*{*{*{*{*{){{.{.{.{.{.{.{.{.{.{.S^J.J.q=@ 4^5^+]m]m]m]m]S]|/S^{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.1/k]4&#^z.z.z.+ /^/././././.9^9^. . . . . o^o^v^v^v^v^v^K^L^L^Q^Q^Q^Q^Y^Y^Y^Y^*/=/=/=/=/=/>/>/>/>/>/>/>/(/(/[/[/[/[/[/[/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/[/[/(/(/>/>/>/>/>/>/>/>/=/=/=/=/*/*/Y^Y^Y^Y^Q^Q^Q^L^L^K^v^v^v^v^v^v^o^o^. . . . 9^9^8^/././././^+ + z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h s+s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H 0{e#e#(.(.,{+&j j N~M~# # # s~]+]+3~3~y.y.y.K K f f W#W#$ $ Y.Y.5.5.e e :!:!{&{&{&B.J%J%r+& & & Z=G '+'+c d&d&I@I@k k b b = m@m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.7 7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@6@y*] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I Q%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 7 C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#P!f f K -~y.y.y.3~]+]+]+s~# # # M~N~j j 2/*{*{*{*{*{6{){{.{.{.{.{.{.{.{.{.{.S^J.q=0^a^+]+]m]m]m]m]T]k{{,{.{.{.{.{.{.{.{.{.{.{.{.{.{.M!3/4&4&z.z.z.+ + /^/./././.8^9^9^. . . . o^o^v^v^v^v^v^K^L^L^Q^Q^Q^Y^Y^Y^Y^*/=/=/=/=/>/>/>/>/>/>/>/(/(/[/[/[/[/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/[/(/(/>/>/>/>/>/>/=/=/=/=/*/Y^Y^Y^Y^Q^Q^Q^L^L^L^K^v^v^v^v^v^o^. . . . . 9^9^8^/././././^+ z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h h s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H 0{e#(.(.(.+&+&j j N~M~# # s~]+]+]+3~;+y.y.y.K f f P!W#W#$ x!Y.Y.5.5.e e :!{&{&{&B.J%J%J%r+& & & Z='+'+c c d&d&I@I@k b b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.n.| ( ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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O=} } } Q%X X ( | | n.n.r$/ / [@1 U+U+R&^ ^ x+2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#P!f f K y.y.y.;+3~]+]+]+s~# # M~N~j j +&,{V#*{*{*{h~6{<{4/{.{.{.{.{.{.{.{.{.{.2]k^+]+]+]m]m]m]9/0/g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.{]a/4&4&#^z.z.z.+ /^/./././.8^9^. . . . o^o^v^v^v^v^v^K^L^L^Q^Q^Q^Y^Y^Y^*/=/=/=/=/>/>/>/>/>/(/(/[/[/[/}/}/}/}/}/}/}/}/}/8/8/8/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/8/8/}/}/}/}/}/}/}/}/}/}/[/[/[/(/>/>/>/>/>/>/=/=/=/*/Y^Y^Y^Y^Q^Q^Q^L^L^K^v^v^v^v^o^o^. . . . 9^9^8^/./././.+ + z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~N~# # # s~]+]+]+3~y.y.y.-~K f f W#W#$ $ Y.Y.5.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+{+6 P=O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { +=X&w.3 6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w={&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h m*} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&X&{ { )=g.g.g.)+~ ~ ~ D D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & & r+J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#P!f f K -~y.y.;+3~]+]+]+s~# # # N~j j j +&(.V#*{*{h~6{6{<{4/{.{.{.{.{.{.{.{.{.{.c/+]+]+]m]m]m]d/:/{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;e/f/4&4&z.z.z.+ + /./././.8^9^9^. . . . o^o^v^v^v^v^K^L^L^Q^Q^Q^Y^Y^Y^*/=/=/=/>/>/>/>/>/(/(/[/[/}/}/}/}/}/}/}/}/}/8/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/8/}/}/}/}/}/}/}/}/[/[/[/(/>/>/>/>/>/=/=/=/=/*/Y^Y^Y^Q^Q^Q^L^L^K^v^v^v^v^o^o^. . . . 9^8^/././././^+ z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h s+!@!@!@!@7.J e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # # s~]+]+3~3~y.y.y.K f f f W#W#$ x!Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=( . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . & d#} } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e 5.5.Y.Y.x!$ W#W#f f K -~y.y.y.3~]+]+]+s~# # # N~N~j j +&(.(.V#*{h~6{6{<{<{i~{.{.{.{.{.{.{.{.{.{.M!+]+]m]m]g/h/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.i/j/4&4&#^z.z.z.+ /^/./././.8^9^. . . . o^o^v^v^v^v^K^L^L^Q^Q^Q^Y^Y^Y^*/=/=/=/>/>/>/>/>/(/[/[/}/}/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/k/k/k/k/k/k/k/k/k/k/k/k/k/k/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/8/}/}/}/}/}/}/}/[/[/[/(/>/>/>/>/>/=/=/=/*/Y^Y^Y^Q^Q^Q^L^K^v^v^v^v^v^o^. . . . 9^9^8^/./././^+ + z.z.z.4&4&X.X.P]W$W$W$A.A.h h h s+!@!@!@!@7.J e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # s~s~]+]+3~;+y.y.y.K f f P!W#$ $ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@6@y*] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m. +y+y+z+l+l+G.:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=,+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ) } } } Q%X X ( | | n.`.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@6@w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 E F+F+F+, 9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#P!f f K y.y.y.;+3~]+]+s~# # # M~N~j j +&,{(.(.l/*{6{6{<{<{u{i~{.{.{.{.{.{.{.{.{.{.M!+]m]+]m/Z>{.{.{.{.{.{.{.{.{.{.{.{.{.{.v!n/o/4&4&#^z.z.z.+ /^/././.8^9^9^. . . . o^v^v^v^v^v^L^L^Q^Q^Q^Y^Y^Y^*/=/=/=/>/>/>/>/(/[/[/[/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/k/k/k/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/k/k/k/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/}/}/[/[/(/>/>/>/>/>/=/=/=/*/Y^Y^Y^Q^Q^L^L^K^v^v^v^v^o^o^. . . . 9^8^/././././^+ z.z.z.#^4&4&X.X.W$W$W$A.A.h h h s+s+!@!@!@7.J e@e@e@i @ @ @ q=E+J.J.J.M+d+d+d+D+g g g H 0{e#e#(.(.+&+&j j N~# # # s~]+]+]+3~;+y.y.-~K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) ) P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.;.R R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.n.} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.g.~ ~ ~ i=D D D _.*@*@O=6 6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#P!f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&,{(.(.e#l/6{6{<{<{u{u{i~{.{.{.{.{.{.{.{.{.{.M!m]q/r/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.w{s/X.4&4&#^z.z.+ + /./././.8^9^. . . . o^o^v^v^v^v^K^L^Q^Q^Q^Y^Y^Y^*/=/=/=/>/>/>/>/(/[/[/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/b/k/k/k/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/k/k/b/b/b/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/}/[/[/[/(/>/>/>/>/=/=/=/*/Y^Y^Q^Q^Q^L^L^K^v^v^v^v^o^. . . . 9^9^/././././^+ z.z.z.#^4&4&X.X.W$W$W$A.A.h h h s+s+!@!@!@7.J e@e@e@i @ @ @ q=E+J.J.M+M+d+d+d+D+g g g H 0{e#(.(.(.+&j j j N~# # # s~]+]+]+3~y.y.y.K K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] y%2 2 2 x+^ ^ R&U+U+1 [@/ / r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.~+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.<.[.-.;.Q R R q r r s u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+d#} } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.-+o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.x!$ W#W#f f K -~y.y.y.3~]+]+]+s~# # # N~j j j +&(.(.e#e#+&6{<{<{<{u{B{i~{.{.{.{.{.{.{.{.{.{.M!t/'!{.{.{.{.{.{.{.{.{.{.{.{.{.{.!{u/X.X.4&4&z.z.z.+ /^/./././.8^9^. . . . o^v^v^v^v^K^L^L^Q^Q^Y^Y^Y^*/=/=/=/>/>/>/>/(/[/[/}/}/}/}/}/}/8/8/b/b/b/b/b/b/b/b/b/k/k/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/v/v/v/v/v/v/v/v/v/v/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/}/[/[/(/>/>/>/>/=/=/=/*/Y^Y^Q^Q^Q^L^K^v^v^v^v^o^o^. . . . 9^8^/./././^+ + z.z.#^4&4&X.X.P]W$W$A.A.h h h s+s+!@!@!@7.e@e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H H 0{e#(.(.,{+&j j N~M~# # # s~]+]+3~;+y.y.y.K f f P!W#$ $ Y.Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : : c+< < b+K.K.r#r#n v.q.q.G+H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=#+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w/} } } Q%X X ( | | n.`.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ $ W#P!f f K y.y.y.3~3~]+]+s~# # # M~N~j j +&(.(.(.e#0{5@6{<{<{u{B{B{i~{.{.{.{.{.{.{.{.{.{.'!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.x/y/X.X.4&4&z.z.z.+ /^/./././.9^9^. . . o^o^v^v^v^v^K^L^Q^Q^Q^Y^Y^*/=/=/=/>/>/>/>/(/[/[/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/p/p/p/p/p/v/v/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/v/p/p/p/p/p/p/p/p/p/p/p/p/k/k/b/b/b/b/b/b/b/b/8/8/}/}/}/}/}/}/[/[/(/>/>/>/>/=/=/*/Y^Y^Y^Q^Q^L^L^K^v^v^v^v^o^. . . . 9^8^/./././.+ + z.z.#^4&4&X.X.P]W$W$A.A.h h h s+s+!@!@!@7.e@e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&A.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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A/} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l l ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&,{(.(.e#e#H 5@<{<{u{u{B{B{B/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.C/D^X.X.4&4&#^z.z.z.+ /^/././.8^9^. . . . o^o^v^v^v^K^L^L^Q^Q^Y^Y^Y^*/=/=/>/>/>/>/(/[/[/}/}/}/}/}/8/8/b/b/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/p/p/v/v/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/p/p/p/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/[/[/(/>/>/>/=/=/=/*/Y^Y^Q^Q^Q^L^L^v^v^v^v^o^o^. . . 9^9^/././././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+s+!@!@!@7.e@e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.+&+&j j N~# # # s~]+]+]+3~y.y.y.K K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+> > ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 P=O=*@*@_.D D D ~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@Z+y*] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#n n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.d#} } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; ; ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K K y.y.y.3~]+]+]+s~# # # N~j j +&,{(.(.e#e#H H D/<{u{u{B{B{*]E/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.t]F/G/X.X.4&4&#^z.z.z.+ /^/././.8^9^. . . . o^v^v^v^v^K^L^Q^Q^Q^Y^Y^*/=/=/>/>/>/>/(/[/[/}/}/}/}/}/8/8/b/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/p/v/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/p/p/p/p/p/p/p/p/k/k/b/b/b/b/b/b/b/8/8/}/}/}/}/}/[/[/(/>/>/>/=/=/=/*/Y^Y^Q^Q^L^L^K^v^v^v^o^o^. . . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@7.e@e@e@e@@ @ @ @ E+J.J.J.M+d+d+d+D+g g g H 0{e#(.(.(.+&j j N~N~# # # s~]+]+3~;+y.y.y.K f f P!W#$ $ Y.Y.5.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'm@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 F+F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n v.q.4.G+H+H+g@=.=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=[ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J%} } } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 ,,F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.;+3~]+]+s~# # # N~N~j j +&(.(.e#e#0{H g D/u{u{B{B{B{R{H/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.T{I/W$X.X.4&4&#^z.z.z.+ /./././.8^9^. . . o^o^v^v^v^v^L^L^Q^Q^Y^Y^Y^=/=/=/>/>/>/(/[/[/}/}/}/}/}/8/8/b/b/b/b/b/b/k/k/p/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/J/J/J/J/J/J/K/K/K/K/K/K/K/K/K/J/J/J/J/J/J/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/b/8/8/}/}/}/}/}/[/[/>/>/>/>/=/=/*/Y^Y^Y^Q^Q^L^K^v^v^v^v^o^. . . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@7.e@e@e@e@@ @ @ @ E+J.J.J.M+d+d+d+D+g g H H 0{e#(.(.,{+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.&.9 9 , F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m. +y+y+z+l+l+G.:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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V>} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.-+o.m m ' 8 8 8 F+F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; ; 0 F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&,{(.(.e#0{H H g D/u{B{B{B{R{+]L/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.z,M/J W$X.X.4&4&#^z.z.+ + /./././.9^9^. . . o^o^v^v^v^K^L^Q^Q^Q^Y^Y^*/=/=/>/>/>/>/[/[/}/}/}/}/}/8/8/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/z/z/J/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/8/8/}/}/}/}/[/[/(/>/>/>/=/=/=/*/Y^Y^Q^Q^L^L^v^v^v^v^o^. . . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@J e@e@e@e@@ @ @ @ E+J.J.M+M+d+d+D+D+g g H H e#e#(.(.,{+&j j N~# # # s~]+]+]+3~y.y.y.K f f P!W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@+'a a H,- - - f,F F F 0 ; ; l l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 8 m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { X&X&w.3 6@6@y*] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /./ } } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> $+$+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # # N~j j +&,{(.(.e#e#H H g g a+u{B{B{R{R{+]N/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.O/F]W$W$X.X.4&4&#^z.z.+ + /./././.9^9^. . . o^v^v^v^v^K^L^Q^Q^Y^Y^Y^=/=/=/>/>/>/(/[/[/}/}/}/}/8/8/b/b/b/b/b/b/k/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/z/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/p/k/b/b/b/b/b/b/8/8/}/}/}/}/[/[/(/>/>/>/=/=/*/Y^Y^Q^Q^Q^L^K^v^v^v^o^o^. . . 9^8^/./././^+ z.z.z.#^4&X.X.P]W$W$A.A.h h h s+!@!@!@!@J e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.+&j j j N~# # # s~]+]+3~;+y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=*@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j } } } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.;+3~]+]+s~# # # M~N~j j +&(.(.e#e#0{H g g D+a+B{B{B{R{+]+]N/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.J]K]s+W$W$P]X.4&4&#^z.z.+ + /././.8^9^. . . . o^v^v^v^v^L^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/[/}/}/}/}/8/8/b/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/p/k/b/b/b/b/b/b/8/8/}/}/}/}/[/(/>/>/>/=/=/=/Y^Y^Y^Q^Q^L^K^v^v^v^v^o^. . . 9^9^/./././^+ z.z.z.#^4&X.X.P]W$W$A.A.h h h s+!@!@!@!@J e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+g g g H 0{e#(.(.,{+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'm@m@m@+'a a H,- - - f,F F F 0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=l+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - } } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> > $+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K K y.y.y.3~]+]+]+s~# # M~N~j j +&,{(.(.e#0{H g g g D+L{B{B{R{+]+]+]s]{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.Q/R/A.W$W$P]X.4&4&#^z.z.+ + /././.8^9^. . . . o^v^v^v^K^L^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/}/}/}/}/}/8/b/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/K/K/K/P/P/P/P/P/P/P/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/P/P/P/P/P/P/K/K/K/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/k/b/b/b/b/b/8/8/}/}/}/}/[/[/(/>/>/>/=/=/*/Y^Y^Q^Q^L^L^v^v^v^v^o^. . . 9^9^/./././.+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@7.J e@e@e@i @ @ @ E+J.J.J.M+d+d+d+D+g g H H e#e#(.(.,{+&j j N~# # # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@D D D i=~ ~ ~ g.g.g.)={ { X&X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @m.m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o%X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . )+} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l l ; ; 0 F F F f,- - - H,a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#e#H H g g D+D+L{B{R{+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.{.{.{.V]T/A.A.W$W$P]X.4&4&#^z.z.+ + /././.8^9^. . . . o^v^v^v^K^L^Q^Q^Y^Y^Y^=/=/=/>/>/>/[/[/}/}/}/}/8/8/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/K/K/P/P/P/P/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/P/P/P/P/K/K/K/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/k/b/b/b/b/b/8/8/}/}/}/}/[/(/>/>/>/=/=/*/Y^Y^Q^Q^L^L^v^v^v^v^o^. . . 9^9^/./././.+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@7.e@e@e@e@@ @ @ @ E+J.J.M+M+d+d+D+D+g g H H e#e#(.(.+&j j N~N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - f,F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w== . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h d#} } Q%X X ( | | n.n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G & & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&(.(.e#e#0{H g g D+D+d+L{B{R{+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.{.g-U/V/A.A.W$W$P]X.X.4&#^z.z.+ + /././.8^9^. . . o^o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/}/}/}/}/8/8/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/J/J/K/K/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/S/S/S/S/S/S/S/W/W/W/W/W/W/W/W/W/W/W/W/W/W/W/S/S/S/S/S/S/S/S/S/S/S/S/S/P/P/P/P/K/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/k/b/b/b/b/b/8/}/}/}/}/[/[/(/>/>/>/=/=/Y^Y^Y^Q^Q^L^K^v^v^v^o^. . . . 9^/./././.+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+d+D+D+g g H 0{e#(.(.,{+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b 5'= m@m@-'a a a H,- - - F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 8 m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ T$: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@`+=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&} } } Q%X X ( | | n.`.r$/ / [@U+U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - - H,a a +'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # # N~j j +&,{(.(.e#0{H g g g D+d+d+L{R{+]+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.'!5^h A.A.W$W$P]X.X.4&#^z.z.+ + /././.8^9^. . . o^o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/}/}/}/}/8/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/S/S/W/W/W/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/X/W/W/S/S/S/S/S/S/S/S/S/S/P/P/P/K/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/b/8/8/}/}/}/}/[/(/>/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . . 9^/./././.+ z.z.z.4&4&X.X.W$W$W$A.A.h h s+s+!@!@!@J e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F ,,0 ; ; l l $+> > ]>]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=d.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 } } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a a -'m@m@= b b k k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j j +&(.(.e#e#H H g g D+d+d+d+^.+]+]+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.p~h A.A.W$W$P]X.X.4&4&z.z.z.+ /././.8^9^. . . o^o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/>/[/[/}/}/}/8/8/b/b/b/b/b/k/p/p/p/p/p/v/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/S/W/W/X/X/X/X/X/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/X/X/X/X/X/W/W/S/S/S/S/S/S/S/S/P/P/P/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/b/8/}/}/}/}/[/[/>/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . . 9^/./././^+ z.z.z.4&4&X.X.W$W$W$A.h h h s+!@!@!@!@J e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e {&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@-'a a a H,- - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=a+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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U+} } Q%X X ( ( | n.n.r$r$/ [@1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+P.P.) ) 7 7 C.-+o.m m ' 8 8 E F+F+F+, 9 9 9 I.^+^+]>]>> > $+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k I@I@d&d&c c '+'+Z=& & & J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~N~j j +&(.(.(.e#0{H g g D+D+d+d+M+^.+]+]+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.@^h A.W$W$W$X.X.4&4&z.z.z.+ /././.8^9^. . . o^o^v^v^v^L^L^Q^Q^Y^Y^=/=/>/>/>/(/[/}/}/}/}/8/8/b/b/b/b/k/p/p/p/p/p/v/z/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/W/X/X/X/X/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/X/X/X/W/W/S/S/S/S/S/S/S/P/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/8/8/}/}/}/[/[/(/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . . 9^/./././^+ z.z.z.4&4&X.X.W$W$A.A.h h h s+!@!@!@7.J e@e@e@@ @ @ @ E+J.J.M+d+d+d+D+D+g g H 0{e#(.(.,{+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@k k b b = m@m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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(.} } } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l ; ; ; 0 F F F f,- - H,a a a -'m@m@= 5'b k k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#0{H H g g D+d+d+d+M+`/+]+]+]+]+]+]M/{.{.{.{.{.{.{.{.{.{.@^A.A.W$W$X.X.4&4&z.z.z.+ /^/././.9^. . . o^o^v^v^v^L^L^Q^Q^Y^Y^=/=/>/>/>/(/[/}/}/}/}/8/b/b/b/b/b/k/p/p/p/p/p/z/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/S/S/W/X/X/X/Y/Y/Y/Y/Y/Y/Y/Y/Z/Z/Z/ ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( (Z/Z/Z/Y/Y/Y/Y/Y/Y/Y/Y/X/X/X/W/S/S/S/S/S/S/S/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/b/8/}/}/}/}/[/(/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . . 9^/./././^+ z.z.#^4&4&X.P]W$W$A.A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@-'a a H,- - - f,F F F 0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%C 2 2 x+^ ^ R&U+U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +'} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+^+]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+D+d+d+M+J.`/+]+]+]+]+]h]M/{.{.{.{.{.{.{.{.{.{.@^A.W$W$P]X.4&4&#^z.z.+ /^/././.9^. . . o^o^v^v^v^L^L^Q^Q^Y^Y^=/=/>/>/>/(/[/}/}/}/8/8/b/b/b/b/k/p/p/p/p/p/v/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/S/W/X/X/X/Y/Y/Y/Y/Y/Y/Z/Z/ ( ( ( ( ( ( ( ( (.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.( ( ( ( ( ( ( ( (Z/Z/Y/Y/Y/Y/Y/Y/Y/X/X/X/W/S/S/S/S/S/S/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/v/p/p/p/p/p/b/b/b/b/b/8/}/}/}/}/[/(/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^9^/./././^+ z.z.#^4&4&X.P]W$W$A.A.h h h s+!@!@!@J e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H 0{e#e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&I@I@k k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X Q%} } } u%_ _ j+[ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s u u v w x y y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=U#+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D } } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+P.P.) ) 7 7 C.-+o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> $+$+l l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & .,J%J%J%{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+d+M+J.`/+]+]+]+]h]m]M/{.{.{.{.{.{.{.{.{.{.@^W$W$P]X.X.4&#^z.z.+ /^/././.9^9^. . . o^v^v^v^L^L^Q^Q^Y^*/=/=/>/>/>/[/[/}/}/}/8/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/X/Y/Y/Y/Y/Y/Y/Z/ ( ( ( ( ( (.(.(.(.(.(.(.(.(.(.(.(.(+(+(+(+(+(+(+(.(.(.(.(.(.(.(.(.(.(.(.( ( ( ( ( ( (Z/Y/Y/Y/Y/Y/Y/X/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/p/p/p/p/p/k/b/b/b/b/8/8/}/}/}/[/(/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^9^/./././^+ z.z.#^4&X.X.P]W$W$A.A.h h s+!@!@!@!@J e@e@e@@ @ @ @ E+J.J.M+d+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - f,F F ,,0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+F+8 8 8 ' m m o.C.C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Z=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +&} } } Q%X X ( | | n.`.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.p=+]+]+]h]m]m]M/{.{.{.{.{.{.{.{.{.{.@^W$X.X.4&4&z.z.+ + /././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^*/=/=/>/>/>/[/[/}/}/}/8/b/b/b/b/k/p/p/p/p/p/z/z/z/z/z/z/J/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Y/Z/ ( ( ( (.(.(.(.(.(+(+(+(+(+(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(+(+(+(+(+(.(.(.(.(.( ( ( ( (Z/Y/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/J/z/z/z/z/z/z/p/p/p/p/p/k/b/b/b/b/8/}/}/}/[/[/>/>/>/=/=/*/Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././.+ z.z.z.4&4&X.X.W$W$A.A.h h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+c c d&d&I@I@k b b 5'm@m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 9 F+F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+[@/ / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @@} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=)=g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.-+o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - H,a a a -'m@m@= 5'b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+y]+]+]+]m]m]m]#({.{.{.{.{.{.{.{.{.{.@^P]X.4&4&z.z.z.+ /././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^*/=/=/>/>/(/[/}/}/}/}/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( ( (.(.(.(.(.(+(+(+(@(@(@(@(@(@(@($($($($($($($($($($($($($($($($($($($($($($($(@(@(@(@(@(@(@(+(+(+(.(.(.(.(.( ( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/k/b/b/b/b/8/}/}/}/}/[/>/>/>/=/=/*/Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././.+ z.z.z.4&4&X.P]W$W$A.A.h h s+s+!@!@!@J e@e@e@@ @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b 5'= m@m@-'a a a - - - f,F F F 0 ; ; l l $+$+> ]>]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.Q R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7+} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@m@= b b k I@I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=y]+]+]m]m]m]m]#({.{.{.{.{.{.{.{.{.{.@^X.4&4&#^z.z.+ /^/./.8^9^. . . o^v^v^v^K^L^Q^Q^Y^*/=/=/>/>/(/[/}/}/}/}/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/K/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(.(+(+(+(@(@(@(@(@(@($($($($(%(%(%(%(%(%(%(%(%(&(&(&(&(&(&(&(%(%(%(%(%(%(%(%(%($($($($(@(@(@(@(@(@(+(+(+(.(.(.(.( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/K/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/k/b/b/b/b/8/}/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././^+ z.z.#^4&4&X.P]W$W$A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%J%.,& & Z='+'+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.3 6@Z+y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.;.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - H,a a a -'m@m@= b b k k I@I@d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.J.q=@ y]+]m]m]m]S]r]#({.{.{.{.{.{.{.{.{.{.@^4&4&z.z.+ /^/././.9^9^. . o^v^v^v^K^L^Q^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/8/b/b/b/b/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/P/P/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@(@($($($(%(%(%(%(&(&(&(&(&(&(&(&(&(&(&(=(=(=(=(=(=(=(=(=(=(=(=(=(&(&(&(&(&(&(&(&(&(&(&(%(%(%(%($($($(@(@(@(@(+(+(.(.(.( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/P/P/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/b/b/b/b/8/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^/./././^+ z.z.4&4&X.X.W$W$A.A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%J%& & & Z='+'+c c d&I@I@k k b b = m@m@-'a a a H,- - f,F F F 0 ; ; l l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@m@= b b k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=@ @ y]h]m]m]m]Y]r]#({.{.{.{.{.{.{.{.{.{.d{4&#^z.z.+ /././.8^9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/>/[/}/}/}/8/8/b/b/b/b/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/P/P/S/S/S/S/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@($($($(%(%(%(&(&(&(&(&(&(&(&(=(=(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(=(=(&(&(&(&(&(&(&(&(%(%(%($($($(@(@(@(+(+(.(.(.( ( ( (Z/Y/Y/Y/Y/X/X/S/S/S/S/P/P/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/b/b/b/b/8/8/}/}/}/[/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^o^. . . 9^8^/././.+ z.z.z.4&4&X.P]W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.e e e :!{&{&{&B.J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'm@m@m@+'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=p^. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I.} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] y*6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+@ @ @ &/m]m]m]S]r]r]#({.{.{.{.{.{.{.{.{.{.d{#^z.z.+ /^/./.8^9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/>/[/}/}/}/8/8/b/b/b/b/p/p/p/p/v/z/z/z/z/z/K/K/K/K/K/P/S/S/S/S/W/X/X/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@($($(%(%(%(&(&(&(&(&(&(=(=(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(=(=(&(&(&(&(&(&(%(%(%($($(@(@(@(+(+(+(.(.( ( ( (Z/Y/Y/Y/Y/X/W/S/S/S/S/P/K/K/K/K/K/z/z/z/z/z/v/p/p/p/p/k/b/b/b/8/8/}/}/}/[/>/>/>/=/=/Y^Y^Q^Q^L^v^v^v^o^. . . 9^8^/././^+ z.z.#^4&X.X.P]W$W$A.h h h s+!@!@!@J e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f f W#W#$ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b 5'= m@m@-'a a H,- - - f,F F ,,0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%C 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0)} } Q%X X ( ( | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - H,a a a -'m@m@= b b k k I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+]+s~# # M~N~j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=@ @ @ 7]m]m]S]r]r]r]#({.{.{.{.{.{.{.{.{.{.d{z.z.+ /^/././.9^. . . o^v^v^v^L^L^Q^Y^Y^*/=/>/>/>/[/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/P/S/S/S/S/X/X/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@($($(%(%(&(&(&(&(&(&(=(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(=(&(&(&(&(&(&(%(%($($(@(@(@(@(+(.(.(.( ( ( (Z/Y/Y/Y/X/X/S/S/S/S/P/P/K/K/K/K/J/z/z/z/z/v/p/p/p/p/k/b/b/b/8/8/}/}/}/[/>/>/>/=/*/Y^Y^Q^L^L^v^v^v^o^. . . 9^/./././^+ z.z.4&4&X.X.W$W$A.A.h h s+!@!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f P!W#$ x!Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z='+'+c c d&d&I@I@k b b = m@m@m@a a a H,- - - F F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.C.C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4@d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f K -~y.y.;+3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+@ @ @ i 7]m]m]Y]r]r]r]A]{.{.{.{.{.{.{.{.{.{.d{z.z.+ /././.9^9^. . o^v^v^v^K^L^Q^Q^Y^*/=/=/>/>/[/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/P/S/S/S/W/X/X/Y/Y/Y/Z/ ( (.(.(.(+(+(@(@(@($($(%(%(&(&(&(&(&(=(-(-(-(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(-(-(-(=(&(&(&(&(&(%(%($($($(@(@(+(+(.(.(.( ( ( (Y/Y/Y/Y/X/W/S/S/S/S/P/K/K/K/K/J/z/z/z/z/z/p/p/p/p/k/b/b/b/8/}/}/}/[/[/>/>/>/=/*/Y^Y^Q^L^K^v^v^v^o^. . . 9^/././.+ + z.z.4&4&X.P]W$W$A.h h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f f W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=/ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.} } } X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+]+s~# # M~N~j j ,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=@ @ @ e@7]m]S]r]r]r]>(,({.{.{.{.{.{.{.{.{.{.d{z.+ /^/./.8^9^. . . o^v^v^K^L^Q^Q^Y^*/=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/S/W/X/Y/Y/Y/Z/ ( (.(.(.(+(+(@(@(@($($(%(%(&(&(&(&(=(-(-(-(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(-(-(-(=(&(&(&(&(&(%(%($($(@(@(+(+(.(.(.( ( (Z/Y/Y/Y/X/X/S/S/S/S/P/K/K/K/K/J/z/z/z/z/z/p/p/p/p/k/b/b/b/8/}/}/}/[/[/>/>/=/=/*/Y^Q^Q^L^K^v^v^o^o^. . 9^8^/././.+ z.z.#^4&X.X.W$W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%J%.,& & Z='+'+c c d&I@I@k k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=k.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - } } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 &.I.^+^+]>]>> $+$+l l ; ; 0 F F F f,- - H,a a a m@m@m@= b b k I@I@d&d&c c '+G Z=& & .,J%J%J%{&{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.;+3~]+]+s~# # # N~j j +&,{(.e#e#H H g g D+d+d+d+M+J.J.E+@ @ @ i e@7]m]Y]r]r]r]>(,({.{.{.{.{.{.{.{.{.{.d{+ /^/././.9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/S/X/X/Y/Y/Y/Z/ ( (.(.(+(+(@(@(@($($(%(%(&(&(&(&(=(-(-(;(;(;(;(;(;(;(-(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(-(;(;(;(;(;(;(;(-(-(=(&(&(&(&(&(%(%($(@(@(@(+(+(.(.( ( ( (Y/Y/Y/X/X/W/S/S/S/P/K/K/K/K/J/z/z/z/z/z/p/p/p/p/k/b/b/b/8/}/}/}/[/(/>/>/=/=/*/Y^Q^Q^L^K^v^v^o^. . . 9^8^/././^+ z.z.4&4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~# # # s~]+]+3~;+y.y.-~K f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%.,& & Z=G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=P%z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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O=} } Q%X X ( ( | n.n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.-+o.m m ' 8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.;+]+]+]+s~# # M~N~j j +&(.(.e#0{H g g D+D+d+d+M+J.J.J.q=@ @ @ e@e@7]S]r]r]r]>('(,({.{.{.{.{.{.{.{.{.{.d{+ /././.9^. . . o^v^v^v^L^L^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/W/X/Y/Y/Y/Z/ ( (.(.(.(+(@(@(@($($(%(%(&(&(&(&(=(-(-(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;(;(;(;()()()()()(;(;(;(;(;(;(;(;(;()()()()()(;(;(;(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;(-(-(-(=(&(&(&(&(%($($(@(@(@(+(.(.(.( ( (Z/Y/Y/Y/X/W/S/S/S/P/P/K/K/K/K/z/z/z/z/z/p/p/p/p/b/b/b/b/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^v^v^v^o^. . . 9^/././.+ + z.z.4&4&X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j N~M~# # s~]+]+]+3~y.y.y.K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=@>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.!(} } Q%X X ( | | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b k k I@I@d&c c '+'+Z=& & .,J%J%J%B.{&{&{&e e e 5.Y.Y.x!$ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&,{(.(.e#H H g g D+d+d+d+M+J.J.E+@ @ @ i e@e@7]Y]r]r]r]>('(,({.{.{.{.{.{.{.{.{.{.d{/^/./.8^9^. . o^v^v^v^K^L^Q^Y^Y^*/=/>/>/>/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/W/X/Y/Y/Y/Z/ ( (.(.(+(+(@(@($($(%(%(&(&(&(&(-(-(-(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;(;()()(;(;(;(;(;(;(~(~(~(~(~(~(~(~(~(~(~(~(~(;(;(;(;(;(;()()(;(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;(-(-(=(&(&(&(%(%($($(@(@(+(+(.(.( ( (Z/Y/Y/Y/X/W/S/S/S/P/P/K/K/K/K/z/z/z/z/z/p/p/p/p/b/b/b/b/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^L^K^v^v^v^o^. . 9^8^/././.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~# # # s~]+]+3~;+y.y.K f f P!W#$ $ Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z='+'+c c d&d&I@k k b b = m@m@-'a a a H,- - f,F F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 9 F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@=.=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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H } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> $+$+l l ; ; 0 F F F f,- - H,a a a m@m@m@= b b k I@I@d&d&c c '+G Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f K -~y.y.;+3~]+]+s~# # M~N~j j +&(.(.e#e#H g g D+D+d+d+M+J.J.J.q=@ @ @ e@e@e@B]r]r]r]>('('(,({.{.{.{.{.{.{.{.{.{.{(/././.9^. . . o^v^v^K^L^Q^Q^Y^*/=/=/>/>/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/W/X/Y/Y/Y/ ( ( (.(.(+(@(@(@($(%(%(&(&(&(&(=(-(;(;(;(;(;(;(-(-(-(;(;(;(;(;(;()()(;(;(;(;(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(;(;(;(;()(;(;(;(;(;(;(-(-(-(;(;(;(;(;(;(-(-(=(&(&(&(%(%($(@(@(@(+(.(.(.( ( (Y/Y/Y/X/X/S/S/S/S/P/K/K/K/K/z/z/z/z/z/p/p/p/p/b/b/b/b/8/}/}/}/[/>/>/>/=/*/Y^Q^Q^L^K^v^v^o^. . . 9^8^/././^+ z.z.4&4&X.P]W$W$A.A.h h s+!@!@!@7.e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{j j N~M~# # s~]+]+]+3~y.y.-~K f f W#W#$ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . * } } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+G & & & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+]+s~# # N~j j +&,{(.(.e#0{H g g D+d+d+d+M+J.J.E+@ @ @ i e@e@e@](r]r]r]>('('(^({.{.{.{.{.{.{.{.{.{.{(/./.9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/(/[/}/}/8/8/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/X/X/Y/Y/Y/ ( (.(.(.(+(@(@($($(%(%(&(&(&(=(-(-(;(;(;(;(;(-(-(-(;(;(;(;(;()(;(;(;(~(~(~(~(~(~(~(~(~(~(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(~(~(~(~(~(~(~(~(~(;(;(;()(;(;(;(;(;(-(-(-(-(;(;(;(;(;(-(=(&(&(&(&(%($($(@(@(+(+(.(.( ( (Z/Y/Y/X/X/S/S/S/S/P/K/K/K/K/z/z/z/z/v/p/p/p/p/b/b/b/b/8/}/}/}/[/>/>/=/=/*/Y^Q^Q^L^v^v^v^o^. . . 9^/././.+ z.z.#^4&4&X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.,{+&j j N~# # # s~]+]+3~y.y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.| | ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=L+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m } } Q%X X ( ( | | n.r$r$/ [@1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a -'m@m@= 5'b k k I@I@d&c c '+'+Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.;+3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+M+J.J.J.q=@ @ @ e@e@e@J ((r]r]>('('('(^({.{.{.{.{.{.{.{.{.{.{(/.8^9^. . o^o^v^v^K^L^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/X/X/Y/Y/Z/ ( (.(.(+(+(@(@($(%(%(&(&(&(=(-(-(;(;(;(;(-(-(-(-(;(;(;(;()(;(;(;(~(~(~(~(~(~(~(/(/(/(/(/(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(/(/(/(/(/(~(~(~(~(~(~(~(;(;(;()(;(;(;(;(;(-(-(-(;(;(;(;(-(-(=(&(&(&(%(%($(@(@(@(+(.(.( ( (Z/Y/Y/Y/X/S/S/S/S/P/K/K/K/K/z/z/z/z/v/p/p/p/k/b/b/b/8/8/}/}/[/(/>/>/=/=/Y^Y^Q^L^L^v^v^v^o^. . 9^8^/././^+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c c d&d&I@k k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l l $+> > ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.m*} } Q%X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a -'m@m@= b b k k I@I@d&c c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.3~]+]+]+# # # N~j j +&,{(.e#e#H H g g D+d+d+M+J.J.J.q=@ @ @ e@e@e@7.!@!@!@u^'('('('('('(e^{.{.{.{.{.{.{.{.{.{.{(. o^v^v^v^L^Q^Q^Y^*/=/=/>/>/[/}/}/}/8/b/b/b/k/p/p/p/z/z/z/z/J/K/K/K/P/S/S/S/W/X/Y/Y/Z/ ( (.(.(+(@(@($(%(&(&(&(=(-(;(;(;(-(-(-(;(;(;()(;(~(~(~(~(/(;(;(~(~(~(~(/(/(/(;(~(~(~(~(~(:(:(:(:(:(:(:(:(/(/(/(/(/(<(<(<(<(<(/(/(/(/(/(:(:(:(:(:(:(:(:(:(~(~(~(~(;(/(/(/(/(~(~(~(;(;(/(/(~(~(~(;(;()(;(;(;(-(-(;(;(;(-(-(&(&(&(%($($(@(@(+(.(.( ( (Y/Y/X/X/S/S/S/P/K/K/K/K/z/z/z/z/v/p/p/p/b/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . 9^8^/././^+ z.z.4&4&X.P]W$W$A.h h h s+!@!@!@e@e@e@i @ @ @ E+J.J.M+d+d+D+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@m@a a a H,- - f,F F F 0 ; ; l l $+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@=.=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=X&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F } } Q%X X ( ( | | n.r$r$/ [@1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+, 9 9 9 I.^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@= 5'b k k I@I@d&c c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.3~]+]+]+# # # N~j j +&(.(.e#e#H H g D+D+d+d+M+J.J.J.@ @ @ i e@e@e@7.!@!@s+h 7.'('('('([(|(e^{.{.{.{.{.{.{.{.{.{.{(o^v^v^K^L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/k/p/p/p/z/z/z/z/J/K/K/K/P/S/S/S/X/Y/Y/Y/ ( (.(.(+(@(@($(%(&(&(&(-(-(;(;(;(-(-(;(;(;(;(;(~(~(~(/(;(;(~(~(~(/(/(;(~(~(~(:(:(:(:(:(/(<(<(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(<(<(/(:(:(:(:(:(~(~(~(;(/(/(/(~(~(;(;(/(/(~(~(~(;()(;(;(;(-(-(;(;(;(-(=(&(&(%($($(@(+(+(.( ( (Z/Y/Y/X/W/S/S/P/P/K/K/K/z/z/z/z/v/p/p/p/b/b/b/8/}/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . 9^8^/./.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+d+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9*+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ) } } Q%X X ( ( | n.n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a -'m@m@= b b k k I@d&d&c c '+G Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+s~# # M~N~j j +&(.(.e#0{H g g D+d+d+d+M+J.J.E+@ @ @ e@e@e@J !@!@!@s+h 7.'('('('(|(|(e^{.{.{.{.{.{.{.{.{.{.{(v^v^v^L^Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/k/p/p/p/v/z/z/z/J/K/K/K/P/S/S/S/X/X/Y/Y/ ( (.(.(+(@(@($(%(&(&(&(-(-(;(;(;(-(-(;(;()(;(;(~(~(~(/(;(;(~(~(/(/(/(;(~(~(:(:(:(:(:(/(<(<(}(}(}(}(}(}(}(}(}(<(<(<(<(<(<(<(<(}(}(}(}(<(<(<(<(<(<(<(<(}(}(}(}(}(}(}(}(<(<(<(/(:(:(:(:(~(~(~(;(/(/(~(~(~(;(/(/(~(~(~(;()(;(;(;(-(-(;(;(;(-(=(&(&(%($($(@(+(+(.( ( (Z/Y/Y/X/W/S/S/P/K/K/K/K/z/z/z/z/p/p/p/k/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . . 9^/././^+ z.z.4&4&X.P]W$W$A.h h s+!@!@!@7.e@e@e@i @ @ q=J.J.J.M+d+d+D+g g H H e#(.(.,{+&j j N~# # s~]+]+]+;+y.y.-~K f P!W#$ $ Y.Y.5.e e e :!{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - f,F F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.7 7 ) ) P.{+{+6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 } } Q%X X ( | | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a a -'m@m@= b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#P!f f -~y.y.;+3~]+]+s~# # M~N~j +&,{(.(.e#H H g g D+d+d+M+J.J.J.q=@ @ @ e@e@e@7.!@!@!@s+h 7.'('('([(|(+/e^{.{.{.{.{.{.{.{.{.{.{(v^v^K^L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/p/p/p/v/z/z/z/z/K/K/K/P/S/S/S/W/X/Y/Y/Z/ (.(.(+(@(@($(%(&(&(&(-(-(;(;(;(-(-(;(;()(;(~(~(~(/(/(;(~(~(~(/(/(;(~(~(:(:(:(:(/(<(<(<(}(}(}(}(}(}(}(<(<(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(<(<(<(}(}(}(}(}(}(}(<(<(/(:(:(:(:(~(~(~(/(/(/(~(~(;(;(/(~(~(~(;()(;(;(;(-(-(;(;(;(-(=(&(&(%($($(@(+(.(.( ( (Y/Y/Y/X/S/S/S/P/K/K/K/J/z/z/z/v/p/p/p/k/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . 9^8^/./.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@J e@e@i @ @ @ E+J.J.M+d+d+D+D+g g H e#e#(.(.+&j j N~# # # s~]+]+3~y.y.y.K f f W#W#$ Y.Y.5.5.e e :!{&{&{&J%J%J%.,& & Z='+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 9 , F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>]>> $+$+l l ; ; 0 F F T+- - - H,a a +'m@m@= 5'b k k I@I@d&c c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.y.3~]+]+s~# # M~N~j j +&(.(.e#0{H g g D+d+d+d+M+J.J.q=@ @ @ e@e@e@J !@!@!@s+h h 2('('([(|(+/+/3({.{.{.{.{.{.{.{.{.{.1(v^K^L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/K/P/S/S/S/X/Y/Y/Y/ ( (.(+(+(@($(%(%(&(&(-(-(;(;(;(-(-(;(;()(;(~(~(~(/(;(;(~(~(/(/(;(~(~(:(:(:(:(<(<(}(}(}(}(}(}(<(<(}(}(}(}(}(}(}(}(}(}(}(}(<(<(<(<(<(<(<(<(<(<(<(<(}(}(}(}(}(}(}(}(}(}(}(<(<(<(}(}(}(}(}(<(<(/(:(:(:(~(~(~(;(/(/(~(~(;(/(/(~(~(;(;(;(;(;(-(-(;(;(;(-(=(&(&(%($(@(@(+(.(.( (Z/Y/Y/X/W/S/S/P/K/K/K/K/z/z/z/z/p/p/p/k/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . 9^/././.+ z.z.#^4&X.X.W$W$A.h h h s+!@!@7.e@e@e@i @ @ @ J.J.J.M+d+d+D+g g H H e#e#(.,{+&j j N~# # s~]+]+]+;+y.y.-~K f P!W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.n.| ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=l+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4(} } } X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a -'m@m@= b b k k I@d&d&c c '+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f f K y.y.;+3~]+]+s~# # M~N~j +&,{(.(.e#H H g g D+d+d+M+J.J.J.q=@ @ i e@e@e@7.!@!@s+h h h 2('('([(|(+/5(3({.{.{.{.{.{.{.{.{.{.1(v^L^Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/k/p/p/p/z/z/z/z/K/K/K/P/S/S/S/W/X/Y/Y/ ( (.(.(+(@($($(%(&(&(=(-(;(;(;(-(-(;(;()(;(~(~(~(/(;(~(~(/(/(/(~(~(~(:(:(:(/(<(<(}(}(}(}(<(<(<(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(<(<(/(:(:(:(~(~(;(/(/(~(~(;(;(/(~(~(~(;(;(;(;(-(-(;(;(;(-(&(&(&(%($(@(@(+(.( ( (Z/Y/Y/X/S/S/S/P/K/K/K/J/z/z/z/v/p/p/p/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . 9^8^/././^+ z.z.4&4&X.W$W$A.A.h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+D+D+g g H e#e#(.(.+&j j N~# # # s~]+]+3~y.y.-~K f f W#$ $ Y.Y.5.5.e e :!{&{&B.J%J%J%.,& & Z='+'+c d&d&I@I@k b b 5'm@m@m@+'a a H,- - f,F F F 0 ; ; l l $+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.;.Q R R q r r s u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=5+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6(} } Q%X X ( ( | | n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - - a a a -'m@m@= b b k I@I@d&d&c '+'+G & & & r+J%J%B.{&{&{&e e e 5.Y.Y.$ $ W#P!f K -~y.y.3~]+]+]+s~# # N~j j +&(.(.e#e#H H g D+D+d+d+M+J.J.E+@ @ @ i e@e@J !@!@!@s+h h A.2('('(|(|(+/7(3({.{.{.{.{.{.{.{.{.{.1(K^L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/K/P/S/S/W/X/Y/Y/Z/ (.(.(+(@(@($(%(&(&(=(-(;(;(;(-(-(;(;()(;(~(~(~(/(;(~(~(/(/(;(~(~(:(:(:(/(<(<(}(}(}(}(<(<(}(}(}(}(}(}(}(}(<(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(}(}(<(<(}(}(}(}(}(<(/(:(:(:(~(~(~(/(/(~(~(;(;(/(~(~(~(;(;(;(;(-(-(;(;(;(-(&(&(&(%($(@(+(+(.( ( (Y/Y/X/X/S/S/S/P/K/K/K/z/z/z/z/p/p/p/k/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . 9^/././.+ z.z.#^4&X.P]W$W$A.h h h !@!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+d+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~y.y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c c d&I@I@k k b 5'= m@m@+'a a H,- - - T+F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 9 F+F+F+E 8 8 Q+m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=!@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 } } Q%X X ( ( | n.n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=g.g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; 0 F F F f,- - H,a a +'m@m@m@= b b k I@I@d&d&c '+'+Z=& & & J%J%J%B.{&{&:!e e 5.5.Y.Y.$ W#W#f f K y.y.y.3~]+]+s~# # # N~j j +&(.(.e#0{H g g D+d+d+d+M+J.J.q=@ @ @ e@e@e@7.!@!@!@s+h h A.s+'([(|(+/+/7(3({.{.{.{.{.{.{.{.{.{.1(L^Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/k/p/p/p/z/z/z/z/K/K/K/P/S/S/S/X/Y/Y/Z/ ( (.(+(@(@($(%(&(&(=(-(;(;(;(-(-(;(;()(;(~(~(/(/(;(~(~(/(/(;(~(~(:(:(:(/(<(}(}(}(}(<(<(}(}(}(}(}(}(}(<(}(}(}(}(}(}(}(}(}(}(}(}(8(8(8(8(8(8(8(8(8(8(}(}(}(}(}(}(}(}(}(}(}(<(<(}(}(}(}(}(}(<(<(}(}(}(}(<(<(/(:(:(:(~(~(/(/(/(~(~(;(/(~(~(~(;(;(;(;(-(-(;(;(-(-(&(&(%($($(@(+(.(.( ( (Y/Y/X/W/S/S/P/K/K/K/J/z/z/z/v/p/p/p/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . 9^8^/././^+ z.#^4&X.X.W$W$A.A.h h s+!@!@!@J e@e@i @ @ @ E+J.J.M+d+d+D+g g H H e#e#(.,{+&j j M~# # s~]+]+3~;+y.y.-~f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+c c d&d&I@k k b b = m@m@-'a a H,- - - T+F F ,,; ; ; l $+$+> > ]>^+^+I.9 9 9 , F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9(} } Q%X X ( ( | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@O=P=6 {+{+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> > $+l l ; ; 0 F F F - - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.;+3~]+]+s~# # M~N~j j ,{(.(.e#0{H g g D+d+d+M+J.J.J.q=@ @ i e@e@e@7.!@!@s+h h h A.s+'(|(|(+/5(7(3({.{.{.{.{.{.{.{.{.{.1(L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/K/P/S/S/W/X/Y/Y/ ( (.(.(+(@($(%(&(&(&(-(;(;(;(-(-(;(;()(;(~(~(/(/(;(~(~(/(/(;(~(~(:(:(:(<(<(}(}(}(}(<(<(}(}(}(}(}(<(<(}(}(}(}(}(}(}(}(8(8(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(8(8(8(}(}(}(}(}(}(}(}(<(}(}(}(}(}(}(<(<(}(}(}(}(<(/(:(:(:(~(~(;(/(/(~(~(;(/(~(~(~(;(;(;(;(-(;(;(;(-(=(&(&(%($(@(@(+(.(.( (Z/Y/Y/X/S/S/S/P/K/K/K/J/z/z/z/v/p/p/p/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^o^. . . 9^/././.+ z.z.4&4&X.P]W$W$A.h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+D+D+g g H e#e#(.(.+&j j N~# # # ]+]+]+3~y.y.-~K f f W#$ $ Y.Y.5.e e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>]>> $+$+l ; ; ; 0 F F T+- - - H,a a -'m@m@= 5'b k k I@d&d&c c '+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f f -~y.y.;+3~]+]+s~# # N~j j +&,{(.e#e#H H g D+D+d+d+M+J.J.E+@ @ @ i e@e@J !@!@!@s+h h A.A.s+'(|(+/+/7(7(3({.{.{.{.{.{.{.{.{.{.1(Q^Q^Y^*/=/>/>/(/[/}/}/8/b/b/b/k/p/p/v/z/z/z/J/K/K/K/P/S/S/S/X/Y/Y/Z/ (.(.(+(@(@($(%(&(&(-(-(;(;(-(-(;(;()(;(~(~(~(/(;(~(~(/(/(~(~(:(:(:(/(<(}(}(}(}(<(<(}(}(}(}(}(<(}(}(}(}(}(}(}(8(8(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(8(}(}(}(}(}(}(}(<(}(}(}(}(}(}(<(}(}(}(}(<(<(:(:(:(~(~(;(/(/(~(~(;(/(~(~(;(;(;(;(;(-(;(;(;(-(=(&(&(%($(@(@(+(.( ( (Y/Y/X/W/S/S/S/P/K/K/K/z/z/z/z/p/p/p/k/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^K^v^v^o^. . 9^8^/./.+ z.z.#^4&X.X.W$W$A.h h h s+!@!@7.e@e@e@i @ @ q=J.J.J.d+d+d+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~y.y.y.K f f W#W#$ Y.Y.5.5.e e :!{&{&B.J%J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - f,F F F 0 ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( ( X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@=.=.=.~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.<.[.-.-.Q R R R q r r t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J u%} } Q%X X ( ( | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+m m m Q+8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f K -~y.y.3~]+]+]+# # # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$P]X.4&n(7(7(f(g(g(m(k({.{.{.{.{.{.{.{.{.{.1(>/>/[/}/}/8/b/b/b/k/p/p/v/z/z/z/K/K/K/P/S/S/S/X/Y/Y/ ( (.(+(@($(%(&(&(=(-(;(;(-(-(;(;(;(~(~(/(;(~(~(/(;(~(:(:(/(<(}(}(<(}(}(}(}(}(}(}(}(0(0(0(0(c(0(0(0(0(c(0(0(0(0(c(c(8(8(j(j(l(l(l(c(c(c(j(j(j(j(j(j(l(l(l(l(l(l(l(l(j(j(j(j(j(j(c(c(c(l(l(l(j(j(8(8(c(c(0(0(0(0(c(0(0(0(0(c(0(0(0(0(}(}(}(}(}(}(}(<(<(}(}(<(/(:(:(~(;(/(~(~(;(/(~(~(;(;(;(-(-(;(;(-(=(&(%($(@(@(+(.( ( (Y/Y/X/S/S/S/P/K/K/J/z/z/z/v/p/p/k/b/b/b/}/}/}/[/>/>/=/*/Y^Q^Q^K^v^v^o^. . 9^8^/./.+ z.z.#^4&X.P]W$W$A.h h s+!@!@!@J e@e@i @ @ q=J.J.J.d+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+]+;+y.y.-~f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@m@a a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.| | ( ( X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@O B o o V m.m.m.y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q r r s t u v w x y y S T T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # d#} } Q%X X ( ( | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 F+F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 F F F f,- - H,a a +'m@m@= 5'b b k I@I@d&c c '+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#f f K -~y.y.3~]+]+s~# # M~N~j j ,{(.(.e#H H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@!@s+h h A.W$W$X.X.4&n(7(a(f(g(g(m(k({.{.{.{.{.{.{.{.{.{.1(>/(/[/}/}/8/b/b/b/p/p/p/z/z/z/z/K/K/K/P/S/S/W/X/Y/Z/ (.(.(+(@($(%(&(&(-(;(;(;(-(;(;()(;(~(~(;(~(~(/(;(~(:(:(:(<(}(}(}(<(}(}(}(}(}(}(}(0(0(0(0(c(0(0(0(0(c(0(0(0(h(c(8(8(8(j(l(l(l(c(c(j(j(j(j(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(l(j(j(j(j(c(c(l(l(j(j(8(8(c(c(h(0(0(0(c(0(0(0(0(c(0(0(0(0(}(}(}(<(}(}(}(<(}(}(}(<(:(:(~(~(/(/(~(;(/(~(~(;()(;(;(-(;(;(;(-(&(&(%($(@(+(.(.( (Y/Y/X/W/S/S/P/K/K/K/z/z/z/v/p/p/p/b/b/b/8/}/}/[/>/>/=/=/Y^Q^Q^L^v^v^o^. . . 8^/././^+ z.#^4&X.X.W$W$A.h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # s~]+]+3~y.y.-~K f P!W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b 5'm@m@m@+'a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| ( ( X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+K.K.9.r#n v.q.q.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x y y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&d#} } Q%X X ( | | n.n.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+l l ; ; 0 F F F - - - H,a a +'m@m@= 5'b k k I@d&d&c c '+G Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ $ W#f f K y.y.y.3~]+]+s~# # M~N~j +&,{(.(.e#H H g D+D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@s+h h h A.W$W$X.X.4&o(7(a(g(g(g(m(k({.{.{.{.{.{.{.{.{.{.1(>/(/[/}/}/8/b/b/k/p/p/p/z/z/z/J/K/K/K/P/S/S/X/Y/Y/Z/ (.(+(@(@($(%(&(=(-(;(;(-(-(;(;(;(~(~(/(;(~(/(/(~(~(:(:(<(}(}(}(<(}(}(}(<(}(}(}(8(0(0(0(c(0(0(0(0(c(0(0(0(h(c(8(8(j(j(l(l(c(c(j(j(j(l(l(l(l(c(c(j(j(j(j(j(j(j(j(j(j(j(c(c(l(l(l(l(l(j(j(j(c(c(l(l(j(j(8(8(c(h(0(0(0(c(0(0(0(0(0(0(0(0(8(}(}(}(<(}(}(}(<(}(}(<(/(:(:(~(;(/(~(~(;(/(~(~(;(;(;(-(-(;(;(-(&(&(%($(@(@(+(.( (Z/Y/Y/X/S/S/P/K/K/K/J/z/z/z/p/p/p/b/b/b/8/}/}/[/(/>/>/=/Y^Y^Q^L^v^v^v^o^. . 9^/././^+ z.z.4&X.X.W$W$A.h h h !@!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H H e#(.(.,{j j N~M~# # s~]+]+3~y.y.-~K f f W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%r+& & Z=G '+c c d&I@I@k k b 5'= m@m@+'a a H,- - f,F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$n.n.| ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.G+H+H+g@=.=.=.<+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%o%P%P%~&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=p^. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D u%} } Q%X X ( ( | n.n.r$/ / [@U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+]>]>> $+$+l l ; ; 0 F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f K -~y.y.3~]+]+s~# # # N~j j ,{(.(.e#H H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@s+h h A.A.W$P]X.4&#^z.z.X.g(g(m(m(m(m()/{.{.{.{.{.{.{.{.{.{.r(}/}/8/b/b/k/p/p/p/z/z/z/K/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@($(&(&(=(-(;(;(-(;(;(;(~(~(/(;(~(/(/(~(:(:(/(<(}(}(<(}(}(<(}(}(}(0(0(0(c(0(0(0(0(0(0(c(8(8(j(l(c(j(l(l(j(j(l(l(l(l(p(p(l(l(p(p(q(l(p(p(q(q(q(l(l(s(s(s(s(s(s(s(s(s(s(l(l(q(q(q(p(p(l(q(p(p(l(l(p(p(p(l(l(l(j(j(l(l(j(c(l(l(j(8(c(0(0(0(c(0(0(c(0(0(0(8(}(}(<(}(}(<(}(}(}(<(:(:(~(;(/(~(;(/(~(~(;(;(;(-(;(;(;(=(&(&(%(@(@(+(.( (Z/Y/Y/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^v^. . . 9^/././^z.z.#^4&X.P]W$W$A.h h s+!@!@!@e@e@e@i @ @ q=J.J.M+d+d+D+D+g H H e#e#(.,{+&j N~M~# # s~]+]+3~y.y.-~K f f W#$ $ Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a a - - - f,F F ,,; ; ; l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.C.C.7 7 ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.)=)={ +=X&w.3 6@6@y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=& . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I@_ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a a m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.y.3~]+]+s~# # M~j j +&(.(.e#e#H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(.(@(@($(&(&(=(-(;(;(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(0(0(0(0(c(8(j(l(c(j(j(l(j(j(l(l(l(p(p(l(l(p(q(l(p(q(l(s(u(u(p(s(u(u(p(x(x(x(x(x(x(u(x(x(x(x(x(s(u(u(u(s(u(u(s(l(q(p(p(l(p(p(l(q(p(l(l(l(l(j(l(l(j(c(l(j(8(c(h(0(0(c(0(0(c(0(0(0(}(}(}(<(}(}(<(}(}(<(/(:(~(~(/(~(~(;(~(~(;()(;(-(-(;(;(-(&(&(%($(@(+(.( (Z/Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/[/(/>/=/=/Y^Y^Q^L^v^v^o^. . 9^8^/./.+ z.z.4&4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+]+;+y.y.K f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@k k b 5'= m@m@+'a a H,- - - F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 8 m m m -+C.C.7 ) ) P.{+{+6 6 O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 / / r$r$n.| | ( X X X } } } _ _ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w='@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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T+_ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # M~j j +&(.(.e#e#H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@($(&(&(=(;(;(;(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(c(0(0(0(c(8(j(l(c(j(j(l(j(j(l(l(l(p(p(l(p(p(q(p(p(q(l(s(u(u(s(u(u(u(s(x(x(x(u(x(x(x(x(u(x(x(x(x(p(u(u(s(p(u(s(l(q(q(p(l(q(p(l(q(p(p(l(l(l(j(l(l(j(c(l(j(8(8(h(0(0(c(0(0(0(0(0(0(8(}(}(<(}(}(<(}(}(<(/(:(~(~(/(~(~(;(/(~(;()(;(-(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/[/(/>/>/=/Y^Y^Q^L^v^v^o^. . 9^8^/./.+ z.z.4&4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+]+;+y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@k k b 5'= m@m@+'a a H,- - - F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 8 m m m -+C.C.7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 / / r$r$n.| | ( X X X } } } _ _ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . l _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#e#H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@($(&(&(=(;(;(;(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(c(0(0(h(c(8(j(l(c(j(l(l(j(j(l(l(l(p(q(l(p(q(l(p(p(q(l(s(u(u(s(u(u(p(x(x(x(u(x(x(x(x(x(x(x(x(x(x(s(u(u(s(p(u(u(s(q(q(p(l(q(p(l(l(p(p(l(l(l(j(c(l(j(c(l(j(8(8(c(0(0(c(0(0(0(0(0(0(8(}(}(<(}(}(<(}(}(<(/(:(~(~(/(/(~(;(/(~(;()(;(-(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/[/(/>/>/=/Y^Y^Q^L^v^v^o^. . . 8^/./.+ z.z.#^4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # ]+]+]+;+y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%r+& & & G '+'+c d&d&I@k k b b = m@m@+'a a H,- - - F F F 0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]>_ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#0{H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@(%(&(&(=(;(;(;(-(;(;(;(~(~(/(;(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(c(0(0(h(c(8(j(l(c(j(l(l(j(l(l(l(l(p(q(l(p(q(l(p(q(q(l(s(u(p(s(u(u(s(x(x(x(x(x(x(x(x(x(x(x(u(x(x(x(u(u(u(s(u(u(s(l(q(p(l(q(p(l(l(p(p(l(l(l(j(c(l(j(c(l(l(8(8(c(0(0(c(0(0(0(0(0(0(8(}(}(<(}(}(<(}(}(<(/(:(:(~(/(/(~(;(/(~(;()(;(-(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^o^. . . 8^/./.+ z.z.#^4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # ]+]+]+;+y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & G '+'+c d&d&I@k k b b = m@m@+'a a H,- - - F F F 0 ; ; l $+$+> > ]>^+^+^+&.9 9 , F+F+F+8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.a.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &._ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#0{H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@(%(&(&(=(;(;(;(-(;(;(;(~(~(/(~(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(c(0(0(h(c(8(j(l(c(j(l(l(j(l(l(l(p(p(q(l(p(q(l(p(q(q(l(u(u(p(s(u(u(s(x(x(u(x(x(x(y(y(x(x(x(x(x(x(x(p(u(u(s(u(u(s(l(q(p(l(q(p(l(l(p(p(l(l(l(j(c(l(j(c(l(l(8(8(c(0(0(c(0(0(0(0(0(0(8(}(}(<(}(}(<(}(}(<(/(:(:(~(/(/(~(;(/(~(;()(;(;(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^v^. . . 8^/././^z.z.#^4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # ]+]+]+3~y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & G '+'+c d&d&I@k k b b = m@m@+'a a H,- - - T+F F 0 ; ; l l $+> > ]>^+^+^+&.9 9 , F+F+F+8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F+_ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a +'m@m@m@5'b b k I@I@d&c c '+'+Z=& & r+J%J%B.{&{&{&e e e 5.Y.Y.$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#e#H g g D+d+d+d+J.J.J.@ @ @ i e@e@J !@!@!@s+h h A.W$W$X.X.4&z.z.+ w(g(g(m(m(m(v()/{.{.{.{.{.{.{.{.{.{.{]}/8/b/b/b/p/p/p/z/z/z/J/K/K/P/S/S/W/X/Y/Z/ (.(+(@(@(%(&(&(=(;(;(;(-(;(;(;(~(~(/(~(~(/(;(~(:(:(<(}(}(<(}(}(}(}(}(}(0(0(0(c(0(0(c(0(0(h(c(8(j(l(c(j(l(l(j(l(l(l(p(p(q(l(p(q(l(p(q(q(l(u(u(p(u(u(u(s(x(x(u(x(x(x(y(y(y(x(x(x(x(x(x(p(u(u(s(u(u(s(l(q(p(l(q(p(l(l(p(p(l(l(l(j(c(l(j(c(l(l(8(8(c(0(0(c(0(0(0(0(0(0(8(}(}(<(}(}(<(}(}(}(/(:(:(~(/(/(~(;(/(~(;()(;(;(-(;(;(-(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/b/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^v^. . . 8^/././^z.z.#^4&X.P]W$A.A.h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H H e#(.(.+&j j N~# # # ]+]+]+3~y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & G '+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+> > ]>^+^+^+&.9 9 , F+F+F+8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+] ] ] C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.| | ( X X X } } } u%_ _ j+[ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.-.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=d+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.-+o.m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - - a a a m@m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#P!f K -~y.y.3~]+]+s~# # M~N~j j ,{(.(.e#H H g D+D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@s+h h A.A.W$P]X.4&4&z.o(a(g(g(m(m(m(k({.{.{.{.{.{.{.{.{.{.1([/}/}/8/b/b/b/p/p/p/z/z/z/J/K/K/K/S/S/S/X/Y/Y/ ( (.(+(@($(%(&(&(-(;(;(;(-(;(;(;(~(~(/(;(~(/(/(~(:(:(/(<(}(}(<(}(}(}(}(}(}(8(0(0(0(0(0(0(c(0(0(0(c(c(8(j(l(l(c(j(j(l(c(j(j(l(l(l(l(p(p(p(q(l(l(l(p(p(p(p(p(q(q(q(q(q(q(q(p(p(p(p(p(l(l(l(p(p(p(p(l(l(l(l(j(j(c(l(j(j(c(l(l(j(8(c(h(0(0(c(0(0(0(c(0(0(0(8(}(}(}(}(}(}(<(}(}(<(/(:(~(~(/(/(~(;(/(~(~(;(;(;(-(;(;(;(=(&(&(%($(@(+(.( ( (Y/Y/X/S/S/P/K/K/K/z/z/z/z/p/p/p/b/b/b/8/}/}/[/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^/././.+ z.z.4&4&X.W$W$A.h h h s+!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # # ]+]+]+3~y.y.-~K f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; ; l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@*@D D D i=~ ~ )+g.g.)=)={ +=X&w.3 6@6@y*] ] y%2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%o%P%P%3&t&t&t&(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . / _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) 7 7 C.C.o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> $+$+l ; ; ; ,,F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f K -~y.y.3~]+]+s~# # # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@s+h h h A.W$W$X.4&4&z.o(a(g(g(g(m(m(k({.{.{.{.{.{.{.{.{.{.1([/}/}/8/b/b/b/p/p/p/z/z/z/z/K/K/K/P/S/S/X/Y/Y/Z/ (.(+(@(@(%(&(&(=(-(;(;(-(;(;(;(~(~(/(;(~(/(/(~(~(:(:(<(}(}(<(}(}(}(<(}(}(}(0(0(0(0(0(0(0(c(0(0(0(c(8(8(j(l(l(c(j(l(l(c(j(j(l(l(l(l(l(p(p(p(q(l(l(l(l(p(p(p(p(p(p(p(p(p(p(p(l(l(l(l(q(p(p(p(l(l(l(l(l(j(j(c(l(j(j(c(l(l(j(8(8(c(0(0(0(c(0(0(0(0(0(0(0(}(}(}(<(}(}(}(}(}(}(<(:(:(~(;(/(~(~(;(/(~(;()(;(;(-(;(;(-(=(&(%($(@(@(+(.( (Z/Y/Y/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/b/8/}/}/[/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^/././.+ z.z.4&X.X.W$W$A.h h h !@!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+]+;+y.y.-~f f P!W#$ x!Y.5.5.e e :!{&{&{&J%J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@*@D D D ~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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R&_ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*6@6@3 w.X&+={ )=)=g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 I.^+^+]>]>> $+$+l ; ; ; 0 F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.Y.Y.x!$ W#P!f f -~y.y.;+]+]+]+# # # N~j j +&(.(.e#0{H g g D+d+d+M+J.J.E+@ @ @ e@e@e@7.!@!@!@h h h A.W$W$X.X.4&z.o(a(g(g(g(m(m(k({.{.{.{.{.{.{.{.{.{.1([/}/}/}/b/b/b/k/p/p/v/z/z/z/K/K/K/P/S/S/W/X/Y/Z/ (.(.(@(@($(%(&(=(-(;(;(-(-(;()(;(~(~(/(~(~(/(;(~(:(:(<(}(}(}(<(}(}(}(}(}(}(8(0(0(0(c(0(0(0(c(0(0(h(c(8(8(j(l(c(c(j(l(l(c(j(j(l(l(l(l(l(p(p(p(p(q(q(l(l(l(l(l(l(l(l(l(l(l(l(l(q(p(p(p(p(p(l(l(l(l(l(j(j(c(l(l(j(c(c(l(j(8(8(c(h(0(0(c(0(0(0(c(0(0(0(8(}(}(}(}(}(}(<(}(}(<(/(:(:(~(;(/(~(;(/(~(~(;()(;(-(-(;(;(-(&(&(%($(@(+(.(.( (Y/Y/X/W/S/S/P/K/K/K/z/z/z/v/p/p/k/b/b/8/}/}/}/(/>/>/=/Y^Y^Q^L^v^v^v^o^. . 9^/././^+ z.z.4&X.X.W$W$A.h h s+!@!@!@J e@e@i @ @ @ J.J.J.M+d+d+D+g g H 0{e#(.(.+&j j N~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & G '+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)={ { +=X&w.3 6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@=.=.=.<+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . #=_ _ _ } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) 7 7 C.C.o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> $+$+l ; ; ; 0 F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & & J%J%J%B.{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&(.(.e#e#H g g D+d+d+d+M+J.J.q=@ @ i e@e@e@!@!@!@s+h h A.A.W$P]X.4&A.7(7(a(g(g(m(k({.{.{.{.{.{.{.{.{.{.1(>/>/[/}/}/}/8/b/b/k/p/p/p/z/z/z/J/K/K/P/S/S/S/X/Y/Y/ ( (.(+(@(@($(&(&(=(-(;(;(-(-(;(;(;(~(~(/(;(~(/(/(~(~(:(:(<(<(}(}(<(}(}(}(<(}(}(}(8(0(0(0(0(0(0(0(0(c(0(0(0(0(c(c(8(8(j(j(l(l(c(c(j(j(j(j(l(l(l(l(l(l(l(c(c(c(c(c(l(l(l(l(l(l(l(j(j(j(j(c(c(l(l(j(j(8(8(c(c(0(0(0(0(c(0(0(0(0(0(0(0(0(8(}(}(}(<(}(}(}(<(}(}(<(<(:(:(~(~(/(/(~(;(/(~(~(;(;(;(-(-(;(;(-(=(&(&($(@(@(+(.( ( (Y/Y/X/S/S/S/P/K/K/J/z/z/z/p/p/p/k/b/b/8/}/}/}/[/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^8^/./.+ z.z.4&4&X.P]W$A.A.h h s+!@!@!@e@e@e@i @ @ q=J.J.M+d+d+d+D+g g H e#e#(.(.+&j j N~# # s~]+]+3~;+y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&B.J%J%J%& & & Z='+'+c d&d&I@I@k b b = m@m@-'a a H,- - - T+F F 0 ; ; ; l $+$+> ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.C.C.7 7 ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -". . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.j+_ _ u%} } Q%X X ( ( | n.n.r$r$/ [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.X&X&{ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=6 6 {+{+P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - - a a a -'m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.;+3~]+]+s~# # N~j j +&,{(.e#e#H g g D+D+d+d+M+J.J.q=@ @ @ e@e@e@7.!@!@s+h h h A.W$W$X.o/+/7(7(a(f(g(d({.{.{.{.{.{.{.{.{.{.1(=/=/>/>/[/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/P/S/S/S/X/Y/Y/Z/ (.(+(@(@($(%(&(&(-(;(;(;(-(;(;()(;(~(~(/(;(~(/(/(;(~(:(:(/(<(}(}(}(<(}(}(}(<(}(}(}(}(0(0(0(0(0(c(0(0(0(0(c(c(0(0(0(0(0(h(c(c(8(8(8(8(8(j(j(j(j(j(j(l(l(l(j(j(j(j(j(j(j(8(8(8(8(c(c(h(h(0(0(0(0(c(c(0(0(0(0(c(0(0(0(0(0(}(}(}(}(<(}(}(}(<(}(}(}(<(/(:(:(~(~(/(/(~(;(/(~(~(;()(;(;(-(;(;(;(-(&(&(%($(@(@(+(.( ( (Y/Y/X/S/S/S/P/K/K/K/z/z/z/v/p/p/p/b/b/b/8/}/}/[/(/>/=/=/Y^Y^Q^L^v^v^v^o^. . 9^/././.+ z.z.4&4&X.W$W$A.A.h h s+!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+D+D+g g H e#e#(.(.+&j j N~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@m@a a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@=.=.=.<+~+~+1+W.>@>@B B o @V m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.<.[.-.-.Q R R q q r r t u u v x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3_[ _ _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; 0 ,,F F f,- - H,a a a m@m@m@= b b k I@I@d&d&c '+'+Z=& & .,J%J%J%{&{&{&:!e e 5.5.Y.x!$ W#W#f f K y.y.;+3~]+]+s~# # M~N~j +&,{(.(.e#H H g g D+d+d+M+J.J.E+@ @ @ e@e@e@J !@!@!@s+h h A.W$W$e(|(+/5(7(7(a(d({.{.{.{.{.{.{.{.{.{.1(Y^Y^=/=/>/(/[/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/K/P/S/S/W/Y/Y/Z/ (.(.(+(@($(%(%(&(&(-(;(;(;(-(;(;()(;(~(~(/(;(~(~(/(/(~(~(:(:(/(<(}(}(}(<(<(}(}(}(}(}(}(}(}(}(8(0(0(0(0(0(0(c(0(0(0(0(0(0(0(c(c(c(c(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(c(c(c(0(0(0(0(0(0(0(0(c(0(0(0(0(0(0(}(}(}(}(}(<(}(}(}(}(<(}(}(}(<(/(:(:(~(~(/(/(~(~(;(/(~(~(;()(;(;(-(;(;(;(-(=(&(&(%($(@(+(.(.( (Z/Y/Y/X/S/S/S/P/K/K/K/z/z/z/v/p/p/p/b/b/b/8/}/}/[/(/>/>/=/*/Y^Q^L^K^v^v^o^. . 9^8^/./.+ z.z.#^4&X.P]W$W$A.h h s+!@!@!@7.e@e@e@@ @ @ E+J.J.M+d+d+D+D+g H H e#e#(.,{+&j j N~# # s~]+]+3~;+y.y.K f f P!W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%.,& & Z='+'+c d&d&I@I@k b b 5'm@m@m@+'a a H,- - f,F F F 0 ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=k.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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(.[ _ _ _ d#} } Q%X X ( | | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+, 9 9 9 I.^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a -'m@m@= b b k I@I@d&d&c '+'+G & & & r+J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#f f K y.y.y.3~]+]+s~# # M~N~j j +&(.(.e#0{H g g D+d+d+M+J.J.J.q=@ @ i e@e@J !@!@!@s+h h A.A.W$s+|(+/+/7(7(a(b({.{.{.{.{.{.{.{.{.{.1(Q^Y^*/=/>/>/[/}/}/}/8/b/b/k/p/p/p/z/z/z/z/K/K/K/P/S/S/S/X/Y/Y/Z/ (.(.(+(@($(%(&(&(=(-(;(;(-(-(;(;()(;(~(~(/(;(~(~(/(/(~(~(:(:(/(<(}(}(}(<(<(}(}(}(}(<(}(}(}(}(8(0(0(0(0(0(0(0(c(0(0(0(0(0(0(0(0(0(c(c(c(c(c(c(c(c(c(c(c(c(c(c(c(0(0(0(0(0(0(0(0(0(c(0(0(0(0(0(0(0(8(}(}(}(}(}(}(}(}(}(<(<(}(}(}(<(/(:(:(~(~(;(/(~(~(;(/(~(~(;(;(;(;(-(-(;(;(-(-(&(&(%($(@(@(+(.( ( (Y/Y/X/W/S/S/P/K/K/K/J/z/z/z/p/p/p/k/b/b/b/8/}/}/[/>/>/=/=/Y^Y^Q^L^v^v^v^o^. . 9^/././.+ z.z.4&4&X.P]W$A.A.h h s+!@!@!@J e@e@i @ @ @ E+J.J.M+d+d+D+g g H H e#(.(.,{+&j N~M~# # s~]+]+3~;+y.y.K f f W#W#$ x!Y.5.5.e e :!{&{&B.J%J%J%.,& & Z='+'+c d&d&I@I@k b b = m@m@m@a a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.;.Q R R q r r t u u v w x y y S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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Z+[ _ _ _ d#} } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+m m m Q+8 8 E F+F+, 9 9 &.I.^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a -'m@m@= b b k k I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.$ $ W#P!f K -~y.y.3~]+]+]+s~# # N~j j +&(.(.e#e#H g g D+D+d+d+M+J.J.E+@ @ @ e@e@e@J !@!@!@s+h h A.s+'([(|(+/+/7(3({.{.{.{.{.{.{.{.{.{.1(L^Q^Q^Y^*/=/>/>/(/}/}/}/8/b/b/b/p/p/p/v/z/z/z/J/K/K/K/P/S/S/W/X/Y/Y/ ( (.(.(+(@($(%(&(&(&(-(;(;(;(-(-(;(;()(;(~(~(/(;(;(~(~(/(;(~(~(:(:(:(/(<(}(}(}(}(<(}(}(}(}(}(}(<(}(}(}(}(}(}(}(8(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(0(8(}(}(}(}(}(}(}(<(}(}(}(}(}(}(<(}(}(}(}(<(<(:(:(:(~(~(;(/(/(~(~(;(/(~(~(;(;(;(;(;(-(;(;(;(-(=(&(&(%($(@(@(+(.( ( (Y/Y/X/W/S/S/S/P/K/K/K/z/z/z/z/p/p/p/b/b/b/8/}/}/}/[/>/>/=/=/Y^Y^Q^L^v^v^v^o^. . 9^8^/./.+ z.z.#^4&X.P]W$W$A.h h h !@!@!@7.e@e@e@@ @ @ q=J.J.M+d+d+d+D+g g H 0{e#(.(.+&j j N~# # # s~]+]+3~y.y.y.K f f W#W#$ Y.Y.5.5.e e :!{&{&B.J%J%J%& & & Z='+'+c d&d&I@I@k b b = m@m@m@a a a H,- - f,F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@*@D D D i=~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] y%C 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( X X X Q%} } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.Q R R q q r r t u u w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5;[ [ j+_ _ u%} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> > $+l l ; ; 0 F F F f,- - H,a a a m@m@m@= b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+s~# # # N~j j +&(.(.e#e#H H g D+D+d+d+M+J.J.J.q=@ @ i e@e@e@7.!@((r]>('('('('(e^{.{.{.{.{.{.{.{.{.{.{(9^. . . o^v^v^K^L^Q^Y^Y^=/=/>/>/[/}/}/}/8/b/b/b/k/p/p/p/v/z/z/z/z/K/K/K/K/P/S/S/S/X/X/Y/Y/Z/ ( (.(+(+(@(@($(%(&(&(&(=(-(;(;(;(;(-(-(;(;(;(;()(;(~(~(~(~(/(/(;(;(;(~(~(~(/(/(/(/(/(;(~(~(~(~(~(~(~(~(:(:(:(:(:(:(:(:(:(:(:(:(:(:(~(~(~(~(~(~(~(;(;(/(/(/(/(~(~(~(~(;(;(/(/(~(~(~(~(;(;()(;(;(;(-(-(;(;(;(;(-(-(&(&(&(%(%($(@(@(+(.(.( ( (Y/Y/Y/X/W/S/S/S/P/K/K/K/J/z/z/z/z/p/p/p/p/b/b/b/8/}/}/}/[/(/>/>/=/*/Y^Q^Q^L^v^v^v^o^. . . 9^/././.+ z.z.#^4&X.X.W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ E+J.J.M+d+d+d+D+g g H 0{e#(.(.,{+&j j M~# # s~]+]+]+;+y.y.-~K f f W#$ $ Y.Y.5.5.e e :!{&{&{&J%J%J%.,& & Z='+'+c c d&I@I@k k b 5'= m@m@-'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &[ [ j+_ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+d+J.J.J.q=@ @ @ e@e@e@B]r]r]r]>('('(,({.{.{.{.{.{.{.{.{.{.{(/./.8^9^. . . o^v^v^K^L^Q^Y^Y^*/=/>/>/(/[/}/}/}/8/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/X/X/Y/Y/Z/ ( (.(.(+(+(@(@($(%(%(&(&(&(=(-(-(;(;(;(;(-(-(-(;(;(;(;(;()(;(;(;(~(~(~(~(~(~(/(/(/(/(/(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(/(/(/(/(~(~(~(~(~(~(~(;(;(;()(;(;(;(;(-(-(-(;(;(;(;(;(-(-(&(&(&(&(%($($(@(@(+(.(.( ( ( (Y/Y/Y/X/W/S/S/S/P/K/K/K/K/J/z/z/z/z/p/p/p/p/b/b/b/b/8/}/}/}/[/>/>/=/=/*/Y^Q^Q^L^v^v^v^o^. . . 9^/././.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.-~K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - - F F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 m m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 [ [ j+_ _ _ } } } Q%X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> $+$+l l ; ; 0 F F F - - - H,a a +'m@m@m@= b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.3~]+]+]+s~# # M~N~j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.E+@ @ @ i e@e@7]Y]r]r]r]>('(,({.{.{.{.{.{.{.{.{.{.d{/././.8^9^. . o^v^v^v^L^L^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/W/X/Y/Y/Y/ ( (.(.(.(+(@(@($($(%(%(&(&(&(=(-(-(;(;(;(;(-(-(-(-(;(;(;(;(;()(;(;(;(~(~(~(~(~(~(~(~(~(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(/(~(~(~(~(~(~(~(~(~(;(;(;()(;(;(;(;(;(-(-(-(;(;(;(;(;(-(-(=(&(&(&(%(%($(@(@(@(+(.(.( ( (Z/Y/Y/Y/X/W/S/S/S/P/K/K/K/K/J/z/z/z/z/p/p/p/p/k/b/b/b/8/}/}/}/[/(/>/>/=/*/Y^Y^Q^L^K^v^v^o^. . . 9^8^/././^+ z.z.4&4&X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g H H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~f f P!W#$ $ Y.Y.5.e e e :!{&{&{&J%J%J%.,& & Z='+'+c c d&d&I@k k b b = m@m@-'a a a - - - f,F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _.[ [ [ _ _ _ d#} } Q%X X ( | | n.n.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F f,- - - a a a -'m@m@= b b k k I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.;+3~]+]+s~# # # N~j j +&(.(.e#e#H H g g D+d+d+M+J.J.J.q=@ @ @ e@e@7]S]r]r]r]>('(,({.{.{.{.{.{.{.{.{.{.d{+ /././.9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/[/[/}/}/8/8/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/P/P/S/S/S/W/X/Y/Y/Y/Z/ ( (.(.(+(@(@(@($(%(%(&(&(&(&(=(-(;(;(;(;(;(;(-(-(-(;(;(;(;(;(;()(;(;(;(;(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(;(;(;()()(;(;(;(;(;(;(-(-(-(;(;(;(;(;(-(-(=(&(&(&(&(%($($(@(@(+(+(.(.( ( (Z/Y/Y/Y/X/W/S/S/S/P/K/K/K/K/J/z/z/z/z/v/p/p/p/k/b/b/b/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^L^L^v^v^v^o^. . 9^8^/././.+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~y.y.y.K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&U+U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F+[ [ [ _ _ _ d#} } Q%X X ( ( | n.n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.-+o.m m ' 8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K y.y.y.3~]+]+]+s~# # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.E+@ @ @ i e@7]m]Y]r]r]r]>(,({.{.{.{.{.{.{.{.{.{.d{+ /^/./.8^9^. . . o^v^v^K^L^Q^Q^Y^*/=/>/>/>/[/}/}/}/8/b/b/b/b/k/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/W/X/Y/Y/Y/Z/ ( (.(.(+(+(@(@($($(%(%(&(&(&(=(-(-(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;()()()(;(;(;(;(;(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(~(;(;(;(;(;()()(;(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(-(-(=(&(&(&(&(%(%($(@(@(@(+(.(.(.( ( (Z/Y/Y/X/X/W/S/S/S/P/K/K/K/K/J/z/z/z/z/v/p/p/p/k/b/b/b/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^v^v^v^o^. . . 9^/./././^+ z.z.4&4&X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f f W#W#$ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@Z+y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( X X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a [ [ [ j+_ _ u%} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m ' 8 8 8 F+F+F+, 9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F - - - H,a a +'m@m@m@= b b k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f K -~y.y.;+3~]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+J.J.J.q=@ @ @ e@7]m]S]r]r]r]>(,({.{.{.{.{.{.{.{.{.{.d{z.+ /././.8^9^. . o^v^v^v^K^L^Q^Y^Y^*/=/>/>/>/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/W/X/X/Y/Y/Z/ ( (.(.(.(+(@(@(@($($(%(%(&(&(&(=(=(-(-(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;(;(;(;()()()(;(;(;(;(;(;(;(;(;(;(;(;(;(;()()()(;(;(;(;(;(;(;(;(;(-(-(-(-(;(;(;(;(;(;(-(-(=(&(&(&(&(%(%($($(@(@(+(+(.(.( ( ( (Y/Y/Y/X/X/S/S/S/S/P/K/K/K/K/J/z/z/z/z/v/p/p/p/k/b/b/b/8/8/}/}/}/[/>/>/=/=/*/Y^Q^Q^L^K^v^v^o^. . . 9^8^/././^+ z.z.#^4&X.X.W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.,{+&j j N~# # # s~]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z='+'+c c d&d&I@k k b b = m@m@-'a a a H,- - f,F F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X Q%} } } u%_ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&#%[ [ j+_ _ u%} } } X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+9 9 9 I.^+^+]>]>> > $+l l ; ; 0 ,,F F f,- - - a a a -'m@m@= b b k k I@I@d&c c '+'+Z=& & .,J%J%J%B.{&{&{&e e e 5.Y.Y.x!$ W#P!f f K y.y.y.3~]+]+]+# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.E+@ @ @ i 7]m]m]Y]r]r]r]A]{.{.{.{.{.{.{.{.{.{.d{z.+ + /././.9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/S/X/X/Y/Y/Y/Z/ ( (.(.(+(+(@(@(@($($(%(%(&(&(&(&(=(-(-(;(;(;(;(;(;(;(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(;(;(;(;(;(;(;(-(-(=(&(&(&(&(%(%($($(@(@(@(+(.(.(.( ( (Z/Y/Y/Y/X/W/S/S/S/S/P/K/K/K/K/J/z/z/z/z/v/p/p/p/k/b/b/b/b/8/}/}/}/[/>/>/>/=/*/Y^Y^Q^L^K^v^v^v^o^. . 9^9^/././.+ z.z.#^4&X.X.P]W$W$A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.-~K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$`.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B B o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.;.Q R R q r r s u u v w x y y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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V##%[ [ [ _ _ _ d#} } Q%X X ( | | n.`.r$/ / [@U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ W#W#f f K -~y.y.;+3~]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+@ @ @ &/m]m]m]Y]r]r]#({.{.{.{.{.{.{.{.{.{.d{z.z.+ /^/./.8^9^. . . o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/S/S/S/S/W/X/Y/Y/Y/Z/ ( ( (.(.(+(+(@(@(@($($(%(%(&(&(&(&(=(-(-(-(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(-(-(-(=(&(&(&(&(%(%($($(@(@(@(+(+(.(.( ( ( (Y/Y/Y/Y/X/W/S/S/S/P/P/K/K/K/K/J/z/z/z/z/v/p/p/p/k/b/b/b/b/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^v^v^v^o^. . . 9^/./././^+ z.z.4&4&X.P]W$W$A.A.h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~# # # s~]+]+3~;+y.y.-~f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%.,& & Z=G '+'+c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 , F+F+F+E 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r t u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=z+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.T$[ [ [ _ _ _ d#} } Q%X X ( ( | n.n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F - - - H,a a a m@m@m@= b b k I@I@d&d&c c '+G Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=@ @ y]m]m]m]S]r]r]#({.{.{.{.{.{.{.{.{.{.d{#^z.z.+ /././.8^9^. . o^o^v^v^K^L^Q^Q^Y^*/=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/J/K/K/K/K/P/P/S/S/S/W/X/X/Y/Y/Y/Z/ ( (.(.(.(+(+(@(@(@($($(%(%(&(&(&(&(&(=(-(-(-(;(;(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(;(;(-(-(-(=(&(&(&(&(&(%(%($($(@(@(@(+(+(.(.(.( ( (Z/Y/Y/Y/X/X/S/S/S/S/P/P/K/K/K/K/z/z/z/z/z/v/p/p/p/k/b/b/b/b/8/}/}/}/[/(/>/>/=/=/Y^Y^Q^Q^L^v^v^v^o^. . . 9^8^/././^+ z.z.#^4&X.X.W$W$A.A.h h h s+!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j N~M~# # s~]+]+]+3~y.y.y.K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%J%.,& & Z='+'+c c d&I@I@k k b b = m@m@-'a a a H,- - f,F F F 0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=[ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _ [ [ [ _ _ _ u%} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@3 w.X&X&{ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+l l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+@ @ y]h]m]m]m]Y]r]#({.{.{.{.{.{.{.{.{.{.d{4&z.z.z.+ /././.9^. . . o^v^v^v^K^L^Q^Q^Y^*/=/=/>/>/(/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/z/K/K/K/K/K/P/S/S/S/S/W/X/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@($($(%(%(&(&(&(&(&(&(=(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(=(&(&(&(&(&(&(%(%($($(@(@(@(+(+(.(.(.( ( ( (Y/Y/Y/Y/X/W/S/S/S/S/P/K/K/K/K/K/z/z/z/z/z/v/p/p/p/k/b/b/b/b/8/}/}/}/[/(/>/>/=/=/*/Y^Q^Q^L^K^v^v^o^o^. . 9^8^/././.+ z.z.#^4&4&X.P]W$W$A.h h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ [ : : : c+< < b+b+K.9.r#n n q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x+#%[ [ j+_ _ u%} } } X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; ,,F F T+- - - H,a a +'m@m@m@5'b b k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=@ y]+]m]m]m]S]r]#({.{.{.{.{.{.{.{.{.{.@^4&4&z.z.+ /^/././.9^. . . o^v^v^v^K^L^Q^Y^Y^*/=/>/>/>/[/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/z/K/K/K/K/K/P/S/S/S/S/W/X/X/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@($($(%(%(%(&(&(&(&(&(&(=(=(-(-(-(-(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(;(-(-(-(-(=(=(&(&(&(&(&(&(%(%($($($(@(@(@(+(+(.(.(.( ( ( (Z/Y/Y/Y/X/X/W/S/S/S/P/P/K/K/K/K/J/z/z/z/z/z/v/p/p/p/k/b/b/b/b/8/}/}/}/[/(/>/>/=/=/*/Y^Q^Q^L^K^v^v^v^o^. . . 9^/./././^+ z.z.4&4&X.P]W$W$A.A.h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f P!W#$ x!Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z=G '+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@`+=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D #%[ [ [ _ _ _ d#} } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - H,a a a -'m@m@= b b k k I@I@d&c c '+'+Z=& & .,J%J%J%B.{&{&{&:!e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+@ y]+]h]m]m]m]Y]#({.{.{.{.{.{.{.{.{.{.@^X.4&#^z.z.+ /^/./.8^9^. . . o^v^v^v^L^L^Q^Y^Y^*/=/>/>/>/[/[/}/}/}/8/b/b/b/b/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/P/P/S/S/S/S/W/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@($($($(%(%(%(&(&(&(&(&(&(&(=(=(=(-(-(-(-(-(-(-(-(;(;(;(;(;(;(;(;(-(-(-(-(-(-(-(-(=(=(=(&(&(&(&(&(&(&(%(%(%($($(@(@(@(@(+(+(.(.(.( ( ( (Z/Y/Y/Y/Y/X/W/S/S/S/S/P/P/K/K/K/K/J/z/z/z/z/z/p/p/p/p/k/b/b/b/b/8/}/}/}/[/(/>/>/=/=/*/Y^Y^Q^L^K^v^v^v^o^. . . 9^/./././^+ z.z.#^4&X.X.W$W$A.A.h h h s+!@!@!@J e@e@e@@ @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b b = m@m@-'a a a - - - f,F F F 0 ; ; l l $+$+> ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$n.n.| | ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+`+=.=.=.~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F+T$[ [ [ _ _ _ d#} } Q%X X ( ( | n.n.r$r$/ [@1 U+U+R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F f,- - - H,a a -'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.J.J.q=y]+]+]m]m]m]m]#({.{.{.{.{.{.{.{.{.{.@^X.4&4&#^z.z.+ /././.8^9^. . . o^v^v^v^L^Q^Q^Y^Y^*/=/>/>/>/[/[/}/}/}/8/b/b/b/b/k/p/p/p/p/z/z/z/z/z/J/K/K/K/K/K/P/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(+(+(@(@(@(@($($($(%(%(%(%(&(&(&(&(&(&(&(&(&(&(=(=(=(=(=(=(-(-(-(-(=(=(=(=(=(=(&(&(&(&(&(&(&(&(&(&(%(%(%(%($($($(@(@(@(+(+(+(.(.(.( ( ( (Z/Y/Y/Y/Y/X/X/S/S/S/S/S/P/K/K/K/K/K/J/z/z/z/z/z/p/p/p/p/k/b/b/b/b/8/}/}/}/[/(/>/>/>/=/*/Y^Y^Q^L^L^v^v^v^o^. . . 9^8^/././.+ z.z.#^4&4&X.P]W$W$A.h h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.e e e :!{&{&{&B.J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { X&X&w.3 6@Z+y*] ] y%2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m@T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.X&X&{ { )=g.g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@m@= b b k I@I@d&d&c c '+'+Z=& & .,J%J%J%B.{&{&{&e e e 5.Y.Y.x!$ W#W#f f K -~y.y.3~]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+J.J.E+p=+]+]+]m]m]m]#({.{.{.{.{.{.{.{.{.{.@^X.X.4&4&z.z.+ + /././.9^9^. . o^o^v^v^v^L^Q^Q^Y^Y^=/=/>/>/>/[/[/}/}/}/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/K/K/K/K/K/P/P/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(.(+(+(@(@(@(@(@($($($(%(%(%(%(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(&(%(%(%(%($($($(@(@(@(@(@(+(+(.(.(.(.( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/P/P/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/k/b/b/b/b/8/}/}/}/[/[/>/>/>/=/*/Y^Y^Q^Q^L^v^v^v^o^. . . 9^8^/././.+ z.z.z.4&4&X.P]W$W$A.A.h h s+!@!@!@!@J e@e@e@@ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e :!{&{&{&B.J%J%J%.,& & Z='+'+c c d&d&I@k k b b = m@m@m@a a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.: #%[ [ j+_ _ u%} } } Q%X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> $+$+l l ; ; 0 F F F f,- - - a a a -'m@m@= 5'b k k I@I@d&d&c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+d+M+J.J.[^+]+]+]h]m]m]M/{.{.{.{.{.{.{.{.{.{.@^W$X.X.4&#^z.z.+ /^/././.9^. . . o^v^v^v^K^L^Q^Q^Y^Y^=/=/>/>/>/[/[/}/}/}/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/K/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( (.(.(.(.(+(+(+(@(@(@(@(@($($($($($(%(%(%(%(%(%(%(&(&(&(&(&(&(&(&(&(&(&(&(%(%(%(%(%(%(%($($($($($(@(@(@(@(@(+(+(+(.(.(.( ( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/P/P/K/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/k/b/b/b/b/8/}/}/}/[/[/>/>/>/=/*/Y^Y^Q^Q^L^K^v^v^o^o^. . 9^9^/./././^+ z.z.4&4&X.X.W$W$A.A.h h h s+!@!@!@J e@e@e@i @ @ @ E+J.J.M+d+d+d+D+g g H H 0{e#(.(.,{+&j j N~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k b b 5'= m@m@-'a a H,- - - f,F F ,,0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+F+8 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+[@/ / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=p . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@: #%[ [ [ _ _ _ d#} } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+9 9 9 I.^+^+^+]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@5'b b k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+D+d+d+M+J.J.`/+]+]+]+]m]m]M/{.{.{.{.{.{.{.{.{.{.@^W$P]X.X.4&#^z.z.+ /^/././.9^. . . o^v^v^v^K^L^Q^Q^Y^Y^=/=/>/>/>/[/[/}/}/}/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/z/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Z/ ( ( ( (.(.(.(.(+(+(+(+(@(@(@(@(@(@($($($($($($($($(%(%(%(%(%(%(%(%(%(%($($($($($($($($(@(@(@(@(@(@(+(+(+(.(.(.(.(.( ( ( ( (Z/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/z/z/z/z/z/z/p/p/p/p/p/b/b/b/b/b/8/}/}/}/[/(/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^/./././^+ z.z.#^4&X.X.P]W$W$A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e {&{&{&B.J%J%J%.,& & Z=G '+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&U+U+1 [@/ / r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+g@=.=.=.<+~+~+1+W.W.>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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( T$[ [ [ _ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l ; ; ; 0 F F F - - - H,a a a -'m@m@= b b k k I@I@d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+s~# # # N~j j +&+&(.(.e#e#H H g g D+d+d+d+M+J.`/+]+]+]+]+]m]M/{.{.{.{.{.{.{.{.{.{.@^W$W$P]X.4&4&#^z.z.+ /^/./.8^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^=/=/>/>/>/(/[/}/}/}/8/8/b/b/b/b/p/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Y/Z/ ( ( ( (.(.(.(.(.(+(+(+(+(@(@(@(@(@(@(@(@(@(@(@(@(@($($($($(@(@(@(@(@(@(@(@(@(@(@(@(@(+(+(+(+(.(.(.(.(.( ( ( ( (Z/Y/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/p/b/b/b/b/8/8/}/}/}/[/(/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././^+ z.z.#^4&4&X.P]W$W$A.A.h h s+!@!@!@!@J e@e@e@@ @ @ @ E+J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - f,F F F 0 ; ; ; l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@D D D i=~ ~ )+g.g.g.)={ { X&X&w.3 6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ~ T$[ [ [ j+_ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m ' 8 8 8 F+F+F+, 9 9 9 I.^+^+]>]>> > $+l l ; ; 0 ,,F F f,- - - H,a a +'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & .,J%J%J%{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+M+J.`/+]+]+]+]+]h]M/{.{.{.{.{.{.{.{.{.{.@^A.W$W$X.X.4&4&z.z.z.+ /././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^=/=/>/>/>/(/[/}/}/}/8/8/b/b/b/b/k/p/p/p/p/v/z/z/z/z/z/z/J/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/Y/Y/Y/Y/Y/Z/Z/ ( ( ( ( (.(.(.(.(.(.(+(+(+(+(+(+(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(@(+(+(+(+(+(+(.(.(.(.(.(.( ( ( ( ( (Z/Y/Y/Y/Y/Y/Y/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/J/z/z/z/z/z/z/v/p/p/p/p/k/b/b/b/b/8/8/}/}/}/[/(/>/>/>/=/=/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././.+ z.z.z.4&4&X.X.W$W$A.A.h h h s+!@!@!@7.e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@+'a a H,- - - f,F F ,,0 ; ; l l $+> > ]>]>^+^+I.9 9 9 , F+F+F+8 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m. +y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s u u v w x y y S S T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=J%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^+: #%[ [ j+_ _ _ } } } Q%X X ( | | n.`.r$/ / [@U+U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a +'m@m@m@= b b k k I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+d+d+d+M+`/+]+]+]+]+]+]M/{.{.{.{.{.{.{.{.{.{.@^A.W$W$W$X.X.4&4&z.z.+ + /././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^*/=/>/>/>/(/[/}/}/}/}/8/b/b/b/b/k/p/p/p/p/p/v/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/W/X/X/X/Y/Y/Y/Y/Y/Y/Z/ ( ( ( ( ( (.(.(.(.(.(.(.(.(.(.(+(+(+(+(+(+(+(+(+(+(+(+(.(.(.(.(.(.(.(.(.(.( ( ( ( ( ( (Z/Y/Y/Y/Y/Y/Y/X/X/X/W/S/S/S/S/S/P/P/K/K/K/K/K/K/J/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/8/}/}/}/}/[/(/>/>/>/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././.+ z.z.z.4&4&X.X.W$W$W$A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@k k b b = m@m@m@+'a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+[@/ / r$`.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+b+K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y y S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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G : #%[ [ [ _ _ _ d#} } Q%X X ( ( | n.n.r$r$/ [@1 U+U+>$^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - - a a a -'m@m@= 5'b b k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#0{H g g D+D+d+d+d+^.+]+]+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.@^h A.W$W$P]X.X.4&#^z.z.+ + /././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/(/[/}/}/}/}/8/b/b/b/b/b/p/p/p/p/p/v/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/S/W/X/X/X/Y/Y/Y/Y/Y/Y/Z/Z/ ( ( ( ( ( ( ( (.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.( ( ( ( ( ( ( ( (Z/Z/Y/Y/Y/Y/Y/Y/X/X/X/W/S/S/S/S/S/S/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/v/p/p/p/p/p/b/b/b/b/b/8/}/}/}/}/[/(/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/././.+ + z.z.#^4&X.X.P]W$W$A.h h h s+!@!@!@!@J e@e@e@@ @ @ @ E+J.J.M+d+d+d+D+D+g g H 0{e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@-'a a a - - - f,F F F 0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ g.g.g.)={ { X&X&w.3 6@Z+y*] ] y%C 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n v.q.4.G+H+H+g@=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=N.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j : T$[ [ [ _ _ _ u%} } Q%X X ( ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ D D D _.*@*@O=6 6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # M~N~j j +&(.(.e#e#H H g g D+D+d+d+^.+]+]+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.@^h A.A.W$W$P]X.X.4&#^z.z.+ /^/././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/(/[/[/}/}/}/8/8/b/b/b/b/k/p/p/p/p/p/v/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/S/S/S/S/S/S/S/W/X/X/X/Y/Y/Y/Y/Y/Y/Y/Y/Z/Z/Z/ ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( (Z/Z/Z/Y/Y/Y/Y/Y/Y/Y/Y/X/X/X/W/S/S/S/S/S/S/S/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/8/8/}/}/}/[/[/(/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^8^/./././^+ z.z.#^4&X.X.P]W$W$A.A.h h s+s+!@!@!@J e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H H e#e#(.(.+&j j N~M~# # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%& & & Z='+'+c c d&d&I@I@k b b = m@m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 ^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=D.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4&: : [ [ [ j+_ _ u%} } } Q%X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - H,a a a -'m@m@= 5'b k k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~j j +&,{(.(.e#e#H H g g D+d+d+L{R{+]+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.@^h h A.A.W$W$P]X.4&4&#^z.z.+ /^/././.8^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/>/[/[/}/}/}/8/8/b/b/b/b/b/p/p/p/p/p/p/z/z/z/z/z/z/z/J/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/W/X/X/X/X/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Z/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/X/X/X/X/W/S/S/S/S/S/S/S/P/P/P/K/K/K/K/K/K/J/z/z/z/z/z/z/z/v/p/p/p/p/p/b/b/b/b/b/8/8/}/}/}/[/[/>/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^9^/./././^+ z.z.#^4&4&X.P]W$W$A.A.h h h s+!@!@!@7.e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+g g H H e#e#(.(.,{+&j j N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & Z=G '+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X } } } u%_ _ j+[ [ [ : : : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o @m.m.m. +y+y+z+l+l+G.:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q r r s t u v w x x y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=>$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . #=: T$[ [ [ _ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=6 6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F T+- - - H,a a a -'m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # M~N~j j +&(.(.e#e#H H g g D+D+L{B{R{+]+]+]+]s]{.{.{.{.{.{.{.{.{.{.4_s+h h h A.A.W$W$X.X.4&4&#^z.z.+ /^/././.9^9^. . . o^v^v^v^K^L^Q^Q^Y^Y^Y^=/=/>/>/>/(/[/}/}/}/}/8/8/b/b/b/b/b/k/p/p/p/p/p/v/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/S/S/W/W/W/X/X/X/X/X/X/X/X/Y/Y/Y/Y/Y/Y/Y/Y/Y/Y/X/X/X/X/X/X/X/X/W/W/W/S/S/S/S/S/S/S/S/S/P/P/P/K/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/v/p/p/p/p/p/k/b/b/b/b/b/8/8/}/}/}/}/[/(/>/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^o^. . . 9^9^/./././^+ z.z.z.4&4&X.X.W$W$W$A.h h h s+!@!@!@!@J e@e@e@i @ @ @ E+J.J.J.M+d+d+D+D+g g H H e#e#(.(.+&j j N~N~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & G '+'+c d&d&I@I@k k b b = m@m@-'a a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ T$: : : c+< < b+K.K.r#r#n v.q.4.G+H+H+g@=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.<.[.-.-.;.R R R q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=<@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F : T$[ [ [ j+_ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 F F F f,- - - H,a a +'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~3~]+]+s~# # # N~j j +&,{(.(.e#e#H H g g D+L{B{B{R{+]+]+]s]{.{.{.{.{.{.{.{.{.{.4_!@s+h h h A.W$W$W$X.X.4&4&z.z.z.+ /^/././.9^9^. . . o^v^v^v^v^L^L^Q^Q^Y^Y^=/=/=/>/>/>/[/[/}/}/}/}/8/b/b/b/b/b/b/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/P/P/P/S/S/S/S/S/S/S/S/S/S/S/S/S/W/W/W/W/W/W/X/X/X/X/X/X/W/W/W/W/W/W/S/S/S/S/S/S/S/S/S/S/S/S/S/P/P/P/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/v/p/p/p/p/p/p/k/b/b/b/b/b/8/}/}/}/}/[/[/>/>/>/=/=/=/Y^Y^Q^Q^L^L^K^v^v^v^o^. . . 9^9^/./././^+ z.z.z.4&4&X.X.W$W$W$A.h h h s+!@!@!@!@J e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+g g H H 0{e#(.(.,{+&j j N~# # # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+c c d&d&I@I@k b b 5'= m@m@-'a a H,- - - f,F F F 0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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K$: : #%[ [ j+_ _ _ d#} } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*6@6@3 w.X&X&{ { )=g.g.g.)+~ ~ i=D D D *@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f f K y.y.y.3~]+]+]+s~# # M~N~j j +&,{(.(.e#0{H g g D+a+B{B{B{R{+]+]N/{.{.{.{.{.{.{.{.{.{.4_!@s+s+h h h A.W$W$W$X.X.4&4&z.z.z.+ /^/././.8^9^. . . o^v^v^v^v^L^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/}/}/}/}/8/8/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/K/K/P/P/P/P/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/P/P/P/P/K/K/K/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/k/b/b/b/b/b/8/8/}/}/}/}/[/(/>/>/>/=/=/*/Y^Y^Q^Q^L^L^v^v^v^v^o^. . . 9^9^/./././^+ z.z.z.4&4&X.X.W$W$W$A.A.h h h s+!@!@!@7.e@e@e@e@@ @ @ q=E+J.J.M+d+d+d+D+D+g g H 0{e#(.(.(.+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 ' m m o.-+C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$`.n.| | ( X X Q%} } } u%_ _ j+[ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o @m.m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u w x x y z S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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M+: : T$[ [ [ _ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l l ; ; 0 F F F f,- - - H,a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e 5.5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+s~# # # N~N~j j +&(.(.e#e#H H g g a+u{B{B{B{R{+]N/{.{.{.{.{.{.{.{.{.{.4_!@!@s+h h h A.A.W$W$W$X.X.4&4&z.z.z.+ /^/././.8^9^. . . o^o^v^v^v^K^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/[/}/}/}/}/8/8/b/b/b/b/b/k/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/J/K/K/K/K/K/K/K/K/K/K/K/P/P/P/P/P/P/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/S/P/P/P/P/P/P/K/K/K/K/K/K/K/K/K/K/K/J/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/k/b/b/b/b/b/8/8/}/}/}/}/[/[/(/>/>/>/=/=/*/Y^Y^Q^Q^L^K^v^v^v^v^o^. . . 9^9^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@7.e@e@e@e@@ @ @ @ E+J.J.J.M+d+d+D+D+g g H H e#e#(.(.+&+&j j N~# # # s~]+]+3~;+y.y.y.K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 8 m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@_.D D D ~ ~ ~ )+g.g.g.)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=4.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /._ : T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> > $+$+l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.3~]+]+]+s~# # # N~j j +&,{(.(.e#e#H H g D/u{u{B{B{R{+]N/{.{.{.{.{.{.{.{.{.{.4_!@!@!@s+h h h A.A.W$W$P]X.X.4&4&z.z.z.+ /^/././.8^9^. . . o^o^v^v^v^K^L^Q^Q^Q^Y^Y^=/=/=/>/>/>/(/[/}/}/}/}/}/8/b/b/b/b/b/b/k/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/P/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/z/z/v/v/p/p/p/p/p/p/k/b/b/b/b/b/b/8/8/}/}/}/}/[/(/>/>/>/=/=/=/Y^Y^Y^Q^Q^L^K^v^v^v^o^o^. . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@7.J e@e@e@i @ @ @ E+J.J.J.M+d+d+d+D+g g H H 0{e#(.(.,{+&j j N~M~# # s~]+]+]+3~y.y.y.K f f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - T+F F ,,0 ; ; l l $+$+> ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$`.n.| | ( ( X X Q%} } u%_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n v.q.4.G+H+H+g@=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 : : #%[ [ j+_ _ _ } } } Q%X X ( | | n.n.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.P.) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&,{(.(.e#0{H g D/<{u{B{B{B{R{N/{.{.{.{.{.{.{.{.{.{.4_7.!@!@!@s+h h h A.A.W$W$P]X.X.4&4&z.z.z.+ /^/././.8^9^. . . . o^v^v^v^K^L^L^Q^Q^Y^Y^*/=/=/>/>/>/(/[/[/}/}/}/}/8/8/b/b/b/b/b/b/k/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/z/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/z/z/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/p/k/b/b/b/b/b/b/8/8/}/}/}/}/[/[/(/>/>/>/=/=/*/Y^Y^Q^Q^Q^L^K^v^v^v^o^o^. . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@J e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H 0{e#(.(.(.+&j j N~M~# # # s~]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+[@/ / r$`.n.| | ( X X X } } } u%_ _ j+[ [ [ T$: : c+< < b+b+K.K.r#n n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T ,.d.d.d.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@H@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 : : #%[ [ [ _ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ 2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.;+3~]+]+s~# # # N~N~j j +&(.(.e#e#0{H D/<{u{u{B{B{B{5_{.{.{.{.{.{.{.{.{.{.4_J !@!@!@!@s+h h h A.A.W$W$P]X.X.4&4&z.z.z.+ /^/././.8^9^. . . . o^v^v^v^v^L^L^Q^Q^Y^Y^Y^=/=/=/>/>/>/(/[/[/}/}/}/}/8/8/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/z/z/J/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/J/z/z/z/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/8/8/}/}/}/}/}/[/(/>/>/>/=/=/=/*/Y^Y^Q^Q^L^L^v^v^v^v^o^. . . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@J e@e@e@i @ @ @ q=E+J.J.M+d+d+d+D+D+g g H H e#e#(.(.+&+&j j N~# # # s~]+]+]+3~y.y.y.K f f P!W#$ $ Y.Y.5.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] y%2 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@O B o o @m.m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=M+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m@: : T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+, 9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - - a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f f K y.y.y.3~]+]+]+s~# # # N~j j +&,{(.(.e#e#H 5@<{<{u{u{B{B{i~{.{.{.{.{.{.{.{.{.{.4_e@J !@!@!@!@s+h h h A.A.W$W$P]X.X.4&4&#^z.z.+ /^/././.8^9^9^. . . o^v^v^v^v^K^L^Q^Q^Q^Y^Y^*/=/=/>/>/>/>/(/[/}/}/}/}/}/8/8/b/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/J/J/J/J/K/K/K/K/K/K/K/K/K/K/K/K/K/K/J/J/J/J/J/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/p/p/p/p/p/p/p/p/k/k/b/b/b/b/b/b/8/8/}/}/}/}/}/[/[/>/>/>/>/=/=/*/Y^Y^Y^Q^Q^L^K^v^v^v^v^o^. . . . 9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@J e@e@e@e@@ @ @ @ E+J.J.J.M+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F 0 ; ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ T$: : : c+< < b+K.K.9.r#n v.q.q.G+H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.a.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.: : : #%[ [ j+_ _ u%} } } Q%X X ( | | n.n.r$/ / [@1 U+U+R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=g.g.g.)+~ ~ ~ D D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> $+$+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&,{(.(.e#0{5@6{<{<{u{u{B{i~{.{.{.{.{.{.{.{.{.{.4_e@e@J !@!@!@!@s+h h h A.A.W$W$P]X.X.4&4&#^z.z.+ + /./././.9^9^. . . o^o^v^v^v^K^L^L^Q^Q^Y^Y^Y^=/=/=/>/>/>/>/[/[/}/}/}/}/}/8/8/b/b/b/b/b/b/b/k/k/p/p/p/p/p/p/p/p/v/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/p/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/b/8/8/}/}/}/}/}/[/[/(/>/>/>/=/=/=/*/Y^Y^Q^Q^L^L^K^v^v^v^o^o^. . . 9^9^8^/./././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@7.e@e@e@e@@ @ @ @ E+J.J.J.M+d+d+d+D+g g g H 0{e#(.(.(.+&j j N~M~# # # s~]+]+3~;+y.y.-~K f f P!W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; l l $+$+> > ]>^+^+^+I.9 9 5;F+F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.{+{+6 6 O=*@*@_.D D D i=~ ~ ~ g.g.g.)={ { +=X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ j+[ [ [ T$: : c+< < < b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.<.-.-.;.Q R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=p . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.: : : #%[ [ [ _ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 E F+F+F+, 9 9 9 I.^+^+^+]>> > $+$+l ; ; ; 0 F F F f,- - - a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#P!f f K y.y.y.;+3~]+]+s~# # # M~N~j j +&(.(.(.e#+&6{<{<{<{u{B{i~{.{.{.{.{.{.{.{.{.{.4_e@e@e@J !@!@!@!@s+h h h A.A.W$W$P]X.X.4&4&#^z.z.+ + /./././.8^9^. . . . o^v^v^v^v^K^L^Q^Q^Q^Y^Y^*/=/=/=/>/>/>/(/[/[/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/p/p/v/v/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/p/p/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/b/b/8/8/}/}/}/}/}/[/[/(/>/>/>/>/=/=/*/Y^Y^Y^Q^Q^L^L^v^v^v^v^o^o^. . . 9^9^/././././^+ z.z.z.4&4&X.X.P]W$W$A.A.h h h s+!@!@!@!@7.e@e@e@e@@ @ @ @ q=J.J.J.M+d+d+d+D+D+g g H 0{e#e#(.(.+&j j j N~# # # s~]+]+]+3~y.y.y.K f f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l $+$+> > ]>]>^+^+I.&.9 9 , F+F+F+E 8 8 Q+m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+b+K.K.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B o o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=} . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >$: : T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] Z+6@6@3 w.X&+={ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.P.) 7 7 C.C.o.m m m Q+8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#f f K K y.y.y.3~]+]+]+s~# # # N~j j j +&(.(.e#l/h~6{<{<{u{u{i~{.{.{.{.{.{.{.{.{.{.4_e@e@e@e@7.!@!@!@!@s+h h h A.A.W$W$W$X.X.4&4&#^z.z.z.+ /^/././.8^9^. . . . o^o^v^v^v^K^L^L^Q^Q^Y^Y^Y^*/=/=/>/>/>/>/(/[/[/}/}/}/}/}/}/8/8/b/b/b/b/b/b/b/b/k/k/p/p/p/p/p/p/p/p/p/p/p/p/v/v/v/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/z/v/v/v/p/p/p/p/p/p/p/p/p/p/p/p/k/b/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/[/[/(/>/>/>/>/=/=/*/Y^Y^Y^Q^Q^L^L^K^v^v^v^v^o^. . . . 9^8^/./././.+ + z.z.#^4&4&X.X.P]W$W$A.A.h h h s+s+!@!@!@7.e@e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # s~]+]+]+3~;+y.y.-~K f f W#W#$ $ Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m. +y+y+z+l+l+G.:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=^+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . o.: : : [ [ [ j+_ _ u%} } } Q%X X ( | | n.n.r$/ / [@1 U+U+>$^ ^ x+2 2 2 y%] ] y*Z+6@6@w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 E F+F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.;+3~]+]+]+s~# # M~N~j j +&,{(.(.l/*{6{6{<{<{u{i~{.{.{.{.{.{.{.{.{.{.4_@ e@e@e@e@7.!@!@!@!@s+h h h A.A.W$W$W$X.X.4&4&#^z.z.z.+ /^/././.8^9^9^. . . o^o^v^v^v^v^K^L^Q^Q^Q^Y^Y^Y^*/=/=/>/>/>/>/(/[/[/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/k/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/v/v/v/v/v/v/v/v/v/v/v/v/v/v/v/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/k/k/b/b/b/b/b/b/b/b/b/8/8/}/}/}/}/}/}/[/[/(/>/>/>/>/=/=/=/*/Y^Y^Q^Q^Q^L^L^v^v^v^v^o^o^. . . . 9^8^/./././^+ + z.z.#^4&4&X.X.P]W$W$A.A.h h h s+s+!@!@!@7.e@e@e@e@i @ @ @ q=J.J.J.M+d+d+d+D+D+g g H H 0{e#(.(.,{+&j j N~M~# # # s~]+]+3~;+y.y.y.K f f P!W#$ $ Y.Y.Y.5.e e e :!{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+> > ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { X&X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : c+< < < b+K.K.r#r#n v.q.4.G+H+H+g@=.=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=^.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . c : : : #%[ [ [ _ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & & r+J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ $ W#P!f f K y.y.y.;+3~]+]+s~# # # M~N~j j +&,{(.V#*{*{6{6{<{<{i~{.{.{.{.{.{.{.{.{.{.4_@ @ e@e@e@e@7.!@!@!@!@s+h h h A.A.W$W$W$X.X.4&4&#^z.z.z.+ /^/./././.9^9^. . . . o^v^v^v^v^v^L^L^Q^Q^Q^Y^Y^*/=/=/=/>/>/>/>/(/(/[/[/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/b/k/k/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/k/k/b/b/b/b/b/b/b/b/b/b/8/8/}/}/}/}/}/}/}/[/[/(/>/>/>/>/=/=/=/*/Y^Y^Y^Q^Q^L^L^K^v^v^v^v^o^. . . . 9^9^8^/./././^+ z.z.z.#^4&4&X.X.P]W$W$A.A.h h h s+s+!@!@!@7.J e@e@e@i @ @ @ q=E+J.J.M+M+d+d+d+D+g g H H 0{e#(.(.(.+&j j j N~# # # s~]+]+]+3~y.y.y.K f f f W#W#$ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&w.w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X Q%} } } _ _ _ j+[ [ #%: : : c+< < b+b+K.K.r#n n q.q.4.G+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.<.-.-.;.Q R R q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=5+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g : : : T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / [@U+U+>$R&^ ^ x+2 2 C y%] ] y*6@6@3 w.X&X&{ { )=g.g.g.)+~ ~ ~ D D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.-+o.m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e 5.5.Y.Y.x!$ W#W#f f K K y.y.y.3~]+]+]+s~# # # N~N~j j +&(.V#*{*{h~6{6{<{4/{.{.{.{.{.{.{.{.{.{.4_@ @ i e@e@e@e@7.!@!@!@!@s+h h h A.A.W$W$W$P]X.X.4&4&z.z.z.+ + /./././.8^9^. . . . o^o^v^v^v^v^K^L^L^Q^Q^Q^Y^Y^*/=/=/=/>/>/>/>/>/(/[/[/}/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/k/k/k/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/p/k/k/k/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/}/[/[/(/(/>/>/>/>/=/=/=/*/Y^Y^Y^Q^Q^Q^L^K^v^v^v^v^o^o^. . . . 9^8^/././././^+ z.z.z.#^4&4&X.X.W$W$W$A.A.h h h s+s+!@!@!@7.J e@e@e@i @ @ @ q=E+J.J.J.M+d+d+d+D+g g g H 0{e#e#(.(.+&+&j j N~# # # s~]+]+]+3~;+y.y.-~K f f W#W#$ $ Y.Y.5.5.e e :!{&{&{&{&B.J%J%r+& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> ]>]>^+^+I.&.9 9 5;F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@*@D D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @V m.m. +y+y+z+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@P@t#U#8$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=<+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X*} : : : #%[ [ j+_ _ _ } } } Q%X X ( | | n.n.r$r$/ [@1 U+U+>$^ ^ x+2 2 2 C ] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m ' 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%B.{&{&{&:!:!e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.;+3~]+]+]+s~# # # N~j j j +&V#*{*{*{h~6{<{4/{.{.{.{.{.{.{.{.{.{.S^@ @ @ i e@e@e@e@7.!@!@!@!@s+h h h A.A.W$W$W$P]X.X.4&4&#^z.z.z.+ /^/./././.9^9^. . . . o^o^v^v^v^v^K^L^L^Q^Q^Y^Y^Y^*/=/=/=/=/>/>/>/>/(/[/[/[/}/}/}/}/}/}/}/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/k/k/k/k/k/k/k/k/k/k/k/k/k/k/k/k/k/k/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/}/}/}/}/}/}/}/[/[/[/(/>/>/>/>/>/=/=/=/*/Y^Y^Y^Q^Q^Q^L^L^v^v^v^v^v^o^. . . . 9^9^8^/./././.+ + z.z.z.4&4&X.X.X.W$W$W$A.A.h h h s+s+!@!@!@7.J e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # s~s~]+]+3~;+y.y.y.K f f P!W#$ $ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@Z+y*] ] y%C 2 2 x+^ ^ R&>$U+U+[@/ / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n v.q.q.G+H+H+g@`+=.=.<+~+~+Q.W.W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.2+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=*@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D : : : #%[ [ [ _ _ _ d#} } Q%X X ( ( | | n.`.r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@3 w.X&+={ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=6 6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ $ W#P!f f K y.y.y.;+3~]+]+]+s~# # M~N~j j +&M~*{*{*{*{h~6{4/{.{.{.{.{.{.{.{.{.{.S^q=@ @ @ i e@e@e@e@7.!@!@!@!@s+h h h h A.A.W$W$P]X.X.4&4&#^z.z.z.+ /^/./././.8^9^. . . . . o^v^v^v^v^v^K^L^Q^Q^Q^Y^Y^Y^*/*/=/=/=/>/>/>/>/>/(/[/[/[/}/}/}/}/}/}/}/}/8/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/8/}/}/}/}/}/}/}/}/[/[/(/(/>/>/>/>/=/=/=/=/*/Y^Y^Y^Q^Q^Q^L^L^K^v^v^v^v^o^o^. . . . 9^9^/././././^+ z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h s+!@!@!@!@7.J e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H e#e#(.(.,{+&j j N~M~# # # s~]+]+]+3~y.y.y.K f f f W#W#$ x!Y.Y.5.5.e e :!{&{&{&B.J%J%J%.,& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+y*] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X Q%} } } _ _ _ j+[ [ [ : : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.~+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=5.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - : : : T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / [@1 U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@6@w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@O=P=6 6 {+P.P.) ) 7 7 C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e 5.5.Y.Y.x!$ W#W#f f f K y.y.y.3~3~]+]+s~# # # M~N~j j 2/*{*{*{*{*{6{){{.{.{.{.{.{.{.{.{.{.l{E+q=@ @ @ i e@e@e@e@7.!@!@!@!@s+h h h h A.A.W$W$W$X.X.4&4&4&z.z.z.+ + /^/././.8^9^9^. . . . o^o^v^v^v^v^v^L^L^Q^Q^Q^Y^Y^Y^Y^*/=/=/=/>/>/>/>/>/>/(/[/[/[/}/}/}/}/}/}/}/}/}/8/8/8/8/8/8/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/b/8/8/8/8/8/}/}/}/}/}/}/}/}/}/[/[/[/(/(/>/>/>/>/>/=/=/=/=/*/Y^Y^Y^Q^Q^Q^L^L^K^v^v^v^v^o^o^. . . . 9^9^8^/././././^+ z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h s+!@!@!@!@7.J e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H 0{e#(.(.(.+&j j N~N~# # # s~]+]+]+3~y.y.y.-~K f f W#W#$ $ Y.Y.5.5.e e e :!{&{&{&B.J%J%r+& & & Z=G '+'+c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m -+C.C.7 ) ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { +=X&w.3 6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+Q.1+W.>@>@B o o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.Q R R q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=q$/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;+c+: : : #%[ [ j+_ _ _ d#} } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D D *@*@*@O=6 6 {+{+P.P.) ) 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c '+'+G Z=& & & r+J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.y.3~]+]+]+s~# # # M~N~j !/*{*{*{*{*{*{){{.{.{.{.{.{.{.{.{.{.{.T~6_q=@ @ @ i e@e@e@e@J !@!@!@!@s+h h h h A.A.W$W$W$X.X.X.4&4&#^z.z.z.+ /^/./././.8^9^9^. . . . o^o^v^v^v^v^K^L^L^Q^Q^Q^Q^Y^Y^Y^*/=/=/=/=/>/>/>/>/>/>/(/[/[/[/[/}/}/}/}/}/}/}/}/}/}/}/8/8/8/8/8/8/8/8/8/8/b/b/b/b/b/b/b/b/8/8/8/8/8/8/8/8/8/8/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/(/(/>/>/>/>/>/=/=/=/=/*/Y^Y^Y^Y^Q^Q^Q^L^L^K^v^v^v^v^v^o^o^. . . . 9^9^/././././^+ + z.z.z.#^4&4&X.X.P]W$W$A.A.A.h h h s+!@!@!@!@7.J e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H 0{e#(.(.(.+&j j j N~# # # s~]+]+]+3~;+y.y.-~K f f P!W#$ $ x!Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c c d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.7 7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] y%C 2 2 x+^ ^ R&>$U+1 [@/ / r$`.n.| | ( X X X Q%} } u%_ _ _ [ [ [ T$: : : < < < b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o V m.m.m. +y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=0.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4&T$: : : #%[ [ [ _ _ _ d#} } Q%X X ( ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] y*6@6@3 w.X&X&{ { )=g.g.g.)+~ ~ ~ i=D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.Y.Y.Y.$ $ W#P!f f K -~y.y.;+3~]+]+]+s~# # # N~N~!/u~*{*{*{*{*{~/{.{.{.{.{.{.{.{.{.{.{.{.'~<_M+@ @ @ i e@e@e@e@J !@!@!@!@s+s+h h h A.A.W$W$W$P]X.X.4&4&#^z.z.z.+ + /^/./././.9^9^. . . . . o^o^v^v^v^v^K^K^L^L^Q^Q^Q^Y^Y^Y^Y^*/=/=/=/=/>/>/>/>/>/>/(/(/[/[/[/[/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/[/(/(/>/>/>/>/>/>/=/=/=/=/=/*/Y^Y^Y^Q^Q^Q^Q^L^L^K^v^v^v^v^v^o^o^. . . . 9^9^8^/././././^+ z.z.z.#^4&4&X.X.X.W$W$W$A.A.h h h h s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g H H 0{e#e#(.(.+&+&j j N~M~# # s~s~]+]+3~;+y.y.y.K f f f W#W#$ x!Y.Y.5.5.e e :!{&{&{&B.B.J%J%r+& & & Z='+'+c c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 ) ) P.P.{+{+6 6 O=*@*@_.D D D i=~ ~ ~ )+g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 2 ^ ^ ^ >$U+U+1 [@/ r$r$n.n.| | ( X X Q%} } } _ _ _ j+[ [ [ : : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@B B o o V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r s t u u v x x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=^ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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Z+c+: : T$[ [ [ j+_ _ u%} } } Q%X X ( | | n.n.r$/ / [@1 U+U+>$^ ^ x+2 2 2 C ] ] y*Z+6@6@w.w.X&+={ )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) 7 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ W#W#P!f f K y.y.y.;+3~]+]+]+s~# # # N~!/u~u~*{*{*{*{~/{.{.{.{.{.{.{.{.{.{.{.{.{.{.7_B^@ @ @ @ e@e@e@e@J !@!@!@!@s+s+h h h A.A.W$W$W$P]X.X.4&4&4&z.z.z.z.+ /^/./././.8^9^9^. . . . . o^o^v^v^v^v^v^K^L^L^Q^Q^Q^Q^Y^Y^Y^*/*/=/=/=/=/>/>/>/>/>/>/>/(/(/[/[/[/[/[/[/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/[/[/(/(/>/>/>/>/>/>/>/=/=/=/=/=/*/Y^Y^Y^Y^Q^Q^Q^L^L^L^K^v^v^v^v^v^o^o^. . . . 9^9^8^/././././^+ + z.z.z.#^4&4&X.X.P]W$W$W$A.A.h h h h s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g g H 0{e#e#(.(.,{+&j j N~M~# # # s~]+]+]+3~y.y.y.-~K f f W#W#$ $ Y.Y.5.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&I@I@k k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( ( X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.R.p p f.r.k.a.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &.c+: : : #%[ [ j+_ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@3 w.X&+={ { )=g.g.g.)+~ ~ ~ D D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 I.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= = b b k k I@I@d&d&c '+'+G Z=& & & r+J%J%B.{&{&{&:!:!e e 5.5.Y.Y.x!$ W#W#f f f K y.y.y.;+3~]+]+s~s~# # M~,/u~u~u~*{*{*{@/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.`)8_d+@ @ @ e@e@e@e@J 7.!@!@!@!@s+h h h h A.A.W$W$W$P]X.X.4&4&#^z.z.z.+ + /^/./././.8^9^9^. . . . . o^o^v^v^v^v^v^K^L^L^Q^Q^Q^Q^Y^Y^Y^Y^*/*/=/=/=/=/=/>/>/>/>/>/>/>/>/(/(/(/[/[/[/[/[/[/[/[/[/}/}/}/}/}/}/}/}/}/}/}/}/}/[/[/[/[/[/[/[/[/(/(/(/>/>/>/>/>/>/>/>/>/=/=/=/=/=/*/Y^Y^Y^Y^Q^Q^Q^Q^L^L^K^K^v^v^v^v^v^o^o^. . . . . 9^9^/./././././^+ z.z.z.z.4&4&4&X.X.P]W$W$W$A.A.h h h s+s+!@!@!@!@7.e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+D+D+g g g H 0{e#e#(.(.,{+&j j N~M~# # # s~]+]+]+3~y.y.y.-~K f f P!W#$ $ Y.Y.Y.5.e e e :!{&{&{&B.J%J%J%.,& & & Z='+'+c c d&d&I@I@k b b 5'= m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) P.P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ +=X&w.w.6@6@Z+y*] ] C 2 2 2 x+^ ^ R&U+U+1 [@/ / r$`.n.| | ( X X X } } } u%_ _ _ [ [ [ T$: : : < < < b+K.K.9.r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o @m.m.m. +y+y+z+l+l+l+:.:.:.2+#+#+#+0.0.0.R.p p r.r.k.a.b.<.[.-.-.;.R R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=6.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {&c+: : : T$[ [ [ _ _ _ u%} } Q%X X X ( | | n.`.r$/ / [@U+U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@6@w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.) ) 7 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a a -'m@m@= 5'b b k I@I@d&d&c c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#W#f f K -~y.y.y.3~]+]+]+s~# # # }{Q~u~u~*{*{*{@/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.D]a^@ @ @ e@e@e@e@J 7.!@!@!@!@s+h h h h A.A.W$W$W$P]X.X.4&4&4&z.z.z.z.+ /^/././././.8^9^9^. . . . . o^o^v^v^v^v^v^K^K^L^L^Q^Q^Q^Q^Y^Y^Y^Y^Y^*/=/=/=/=/=/=/>/>/>/>/>/>/>/>/>/>/>/>/(/(/(/(/(/(/[/[/[/[/[/[/[/[/(/(/(/(/(/(/(/>/>/>/>/>/>/>/>/>/>/>/=/=/=/=/=/=/*/*/Y^Y^Y^Y^Q^Q^Q^Q^L^L^L^K^v^v^v^v^v^v^o^o^. . . . . 9^9^8^/././././^+ + z.z.z.#^4&4&X.X.X.W$W$W$A.A.A.h h h s+s+!@!@!@!@J e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+d+D+g g g H H e#e#(.(.,{+&j j N~N~# # # s~]+]+]+3~;+y.y.-~K f f P!W#W#$ x!Y.Y.5.5.e e :!{&{&{&{&B.J%J%r+& & & Z='+'+'+c d&d&I@I@k k b b = m@m@m@+'a a H,H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+^+&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+6 6 P=O=*@*@_.D D D i=~ ~ )+g.g.g.)={ { +=X&w.3 6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.n.| ( ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@O B o o V m.m. +y+y+y+z+l+l+G.:.:.:.#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y z S T T >.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&3&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@< c+: : T$[ [ [ j+_ _ u%} } } Q%X X ( | | n.n.r$r$/ [@1 U+U+>$^ ^ ^ x+2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ i=D D D _.*@*@O=P=6 6 {+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+f,- - - H,a a +'m@m@m@= b b k k I@I@d&d&c c '+'+Z=& & & r+J%J%J%B.{&{&{&:!e e e 5.Y.Y.x!$ $ W#P!f f K -~y.y.y.3~]+]+]+s~# # R^H~Q~u~u~*{*{@/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;9_L{@ @ e@e@e@e@e@7.!@!@!@!@s+s+h h h A.A.A.W$W$W$X.X.X.4&4&#^z.z.z.+ + /^/././././.8^9^9^. . . . . o^o^v^v^v^v^v^v^K^L^L^L^Q^Q^Q^Q^Y^Y^Y^Y^Y^Y^*/=/=/=/=/=/=/=/=/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/=/=/=/=/=/=/=/*/*/Y^Y^Y^Y^Y^Q^Q^Q^Q^Q^L^L^K^K^v^v^v^v^v^v^o^o^. . . . . 9^9^8^/././././^+ + z.z.z.#^4&4&4&X.X.P]W$W$W$A.A.h h h h s+!@!@!@!@!@J e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+d+D+g g g H H e#e#(.(.,{+&j j j N~# # # s~]+]+]+3~;+y.y.y.K f f f W#W#$ x!Y.Y.5.5.e e e :!{&{&{&B.J%J%J%.,& & Z=G '+'+c d&d&d&I@I@k b b 5'= m@m@-'a a a H,- - - T+F F F 0 ; ; ; l $+$+> > ]>]>^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.6@6@Z+y*] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$`.n.| | ( X X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.9.r#n n q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.>@>@B B o @V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.b.b.<.[.-.-.Q R R q q r s t u u w x x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . `.c+: : : #%[ [ [ _ _ _ d#} } Q%X X ( ( | | n.`.r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+P.P.) ) 7 7 C.C.o.m m m Q+8 8 E F+F+F+, 9 9 9 I.^+^+^+]>> > $+$+l l ; ; 0 ,,F F T+- - - H,a a a -'m@m@= 5'b b k I@I@I@d&d&c '+'+G Z=& & & r+J%J%B.{&{&{&{&:!e e 5.5.Y.Y.x!$ W#W#P!f f K -~y.y.;+3~]+]+]+s~# R^v~H~Q~u~u~*{Z^{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.m^0_@ @ i e@e@e@e@7.!@!@!@!@s+s+h h h h A.A.W$W$W$P]X.X.4&4&4&#^z.z.z.+ + /^/././././.8^9^9^. . . . . o^o^v^v^v^v^v^v^v^K^L^L^L^Q^Q^Q^Q^Q^Y^Y^Y^Y^Y^Y^*/*/=/=/=/=/=/=/=/=/=/=/=/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/>/=/=/=/=/=/=/=/=/=/=/=/*/*/Y^Y^Y^Y^Y^Y^Q^Q^Q^Q^Q^L^L^L^K^K^v^v^v^v^v^v^o^o^. . . . . . 9^9^8^/./././././^+ z.z.z.z.#^4&4&X.X.X.W$W$W$W$A.A.h h h h s+!@!@!@!@7.J e@e@e@e@i @ @ @ @ E+J.J.J.M+d+d+d+d+D+g g g H H e#e#(.(.(.+&j j j N~# # # s~s~]+]+3~3~y.y.y.-~K f f W#W#$ $ Y.Y.5.5.e e e :!{&{&{&B.J%J%J%.,& & & Z='+'+c c d&d&I@I@k k b b = m@m@m@+'a a H,- - - f,F F F 0 ; ; ; l l $+$+> > ]>^+^+I.&.9 9 5;F+F+F+E 8 8 8 ' m m o.-+C.C.7 ) ) P.P.{+{+6 P=O=*@*@_.D D D i=~ ~ ~ g.g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 2 x+^ ^ >$U+U+1 [@/ / r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ T$: : : < < < b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.a.b.b.[.-.-.;.Q R R q r r s u u v w x y y S S T T ,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@_@_@7@7@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=F+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ) c+: : : T$[ [ [ _ _ _ u%} } } X X X ( | | n.n.r$/ / [@1 U+U+>$^ ^ x+2 2 2 C ] ] ] Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a +'m@m@m@= b b b k I@I@d&d&c c '+'+G Z=& & .,J%J%J%B.{&{&{&:!e e e 5.5.Y.Y.x!$ W#W#f f f K y.y.y.;+3~]+]+]+s~R^v~v~H~Q~u~u~A^{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.t]a_l]@ i e@e@e@e@J !@!@!@!@!@s+h h h h A.A.W$W$W$W$X.X.X.4&4&#^z.z.z.z.+ + /^/././././.8^9^9^. . . . . o^o^o^v^v^v^v^v^v^v^K^L^L^L^L^Q^Q^Q^Q^Q^Y^Y^Y^Y^Y^Y^Y^Y^*/*/*/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/=/*/*/*/*/Y^Y^Y^Y^Y^Y^Y^Q^Q^Q^Q^Q^Q^L^L^L^K^K^v^v^v^v^v^v^v^o^o^. . . . . . 9^9^8^/./././././^+ + z.z.z.#^4&4&4&X.X.P]W$W$W$A.A.h h h h s+s+!@!@!@!@7.J e@e@e@e@@ @ @ @ q=E+J.J.J.M+d+d+d+d+D+g g g H H e#e#(.(.(.+&j j j N~M~# # # s~]+]+]+3~y.y.y.-~K f f P!W#$ $ x!Y.Y.5.e e e :!{&{&{&B.B.J%J%r+& & & Z=G '+'+c d&d&I@I@k k b b 5'= m@m@-'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] y%C 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.| | ( ( X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@O B o o V m.m.m.y+y+y+z+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.=+,+,+,+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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(.< c+: : : #%[ [ [ _ _ _ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+>$R&^ ^ x+2 2 2 C ] ] y*Z+6@6@w.w.X&+={ { )=g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+$+l ; ; ; 0 F F F f,- - - H,a a a -'m@m@= 5'b b k I@I@I@d&d&c '+'+G Z=& & & r+J%J%B.B.{&{&{&:!e e e 5.Y.Y.Y.$ $ W#P!f f K -~y.y.y.3~3~]+]+X~J!v~v~v~Q~Q~A^{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-,]E{@ e@e@e@e@e@7.!@!@!@!@!@s+h h h h A.A.W$W$W$W$P]X.X.4&4&4&#^z.z.z.z.+ + /^/././././.8^9^9^9^. . . . . . o^o^o^v^v^v^v^v^v^v^v^K^K^L^L^L^L^L^Q^Q^Q^Q^Q^Q^Q^Q^Q^Q^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Y^Q^Q^Q^Q^Q^Q^Q^Q^Q^Q^L^L^L^L^L^K^v^v^v^v^v^v^v^v^v^o^o^o^. . . . . . 9^9^8^8^/./././././^+ + z.z.z.z.#^4&4&X.X.X.P]W$W$W$A.A.A.h h h h s+!@!@!@!@!@J e@e@e@e@i @ @ @ @ q=E+J.J.J.M+d+d+d+D+D+g g g H H e#e#(.(.(.+&+&j j N~M~# # # s~]+]+]+3~;+y.y.y.K f f f W#W#$ x!Y.Y.5.5.e e e :!{&{&{&B.J%J%J%.,& & & Z='+'+c c d&d&I@I@k k b b = m@m@m@+'a a a H,- - - T+F F ,,0 ; ; l l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+6 6 P=O=*@*@t=D D i=~ ~ ~ )+g.g.g.)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 x+^ ^ ^ >$U+U+1 / / r$r$n.n.| | ( X X Q%} } } u%_ _ j+[ [ [ T$: : c+< < < b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.a.b.b.<.[.-.;.Q R R q r r s t u v w x x y S S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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H < < c+: : : [ [ [ j+_ _ _ d#} } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&{ { )=)=g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 {+{+P.P.) ) 7 C.C.-+o.m m ' 8 8 8 E F+F+F+5;9 9 &.I.^+^+]>]>> > $+$+l l ; ; 0 ,,F F T+- - - H,H,a a +'m@m@m@= b b b k I@I@d&d&c c '+'+G Z=& & & r+J%J%B.B.{&{&{&:!e e e 5.5.Y.Y.$ $ W#W#f f f K -~y.y.;+i^Z!Z!Z!J!v~v~3^{.{.{.{.{.{.{.{.{.{.M!h~6{6{f_I{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.g_h_i e@e@e@e@J 7.!@!@!@!@!@s+h h h h A.A.A.W$W$W$W$P]X.X.X.4&4&4&#^z.z.z.z.+ + + /^/././././././.8^9^9^9^. . . . . . . . . . o^o^o^o^o^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^v^o^o^o^o^o^. . . . . . . . . 9^9^9^8^8^/./././././././^+ + z.z.z.z.z.#^4&4&4&X.X.X.P]W$W$W$A.A.A.h h h h s+s+!@!@!@!@!@7.J e@e@e@e@i @ @ @ @ q=E+J.J.J.M+M+d+d+d+D+D+g g g H H e#e#(.(.(.+&+&j j N~M~# # # s~]+]+]+3~3~y.y.y.-~K f f P!W#W#$ x!Y.Y.5.5.e e e :!{&{&{&B.J%J%J%r+& & & Z='+'+'+c d&d&I@I@I@k b b 5'= m@m@-'+'a a H,- - - f,F F F 0 ; ; ; l l $+$+> > ]>^+^+^+I.9 9 9 , F+F+F+E 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+6 6 P=O=*@*@_.D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+] ] ] C 2 2 2 x+^ ^ R&U+U+1 [@/ / r$`.n.| | ( X X X Q%} } d#_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+1+W.W.>@O B o o V m.m.m.y+y+y+z+l+l+l+:.:.:.2+#+#+3.0.0.0.R.p p r.r.k.a.b.<.[.-.-.;.Q R R q r r s u u v w x y y S S T T ,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+q+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {+b+< < < c+: : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m Q+8 8 8 E F+F+F+5;9 9 &.I.^+^+^+]>> > > $+$+l ; ; ; 0 ,,F F T+f,- - - H,a a a -'m@m@m@= b b b k I@I@I@d&d&c c '+'+G Z=& & & .,J%J%J%B.{&{&{&{&:!e e e 5.5.e A!A!g!K!K!]![{{.{.{.{.{.{.{.{.{.{.2]]+]+]+s~# # # # M~N~j j j +&+&(.(.T_A{*{*{h~6{6{<{<{<{6{7/`){.{.{.{.{.{.{.{.{.{.{.{.{.{.w_U_@ @ @ @ i e@e@e@e@e@e@e@J 7.7.!@!@!@!@!@!@!@!@!@s+s+s+h h h h h h h h h h h A.A.A.A.A.A.A.A.A.A.W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$W$A.A.A.A.A.A.A.A.A.A.h h h h h h h h h h h s+s+s+!@!@!@!@!@!@!@!@!@7.7.J e@e@e@e@e@e@e@i @ @ @ @ @ @ @ q=E+J.J.J.J.J.M+d+d+d+d+d+D+D+g g g g H H 0{e#e#(.(.(.(.+&+&j j j N~M~# # # # s~]+]+]+]+3~;+y.y.y.-~K f f f W#W#$ $ x!Y.Y.Y.5.e e e e :!{&{&{&{&B.J%J%J%.,& & & Z=G '+'+c c d&d&I@I@I@k b b b = m@m@m@-'a a a H,- - - f,T+F F ,,0 ; ; ; l $+$+> > > ]>^+^+^+I.9 9 9 5;F+F+F+E 8 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( X X X Q%} } d#_ _ _ j+[ [ #%: : : c+< < < b+K.K.9.r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o V m.m.m. +y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p f.r.k.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . & b+b+< < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+{+P.P.) ) 7 C.C.-+o.m m m Q+8 8 E F+F+F+, 5;9 9 &.I.^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+- - - - H,a a a -'m@m@m@= b b b k I@I@I@d&d&c c '+'+G Z=& & & r+J%J%J%B.{&{&{&{&:!e e e e :!A!A!A!g!K!K!f]{.{.{.{.{.{.{.{.{.{.2]3~]+]+]+s~s~# # # M~N~j j j +&+&,{(.F~V_*{*{h~6{6{6{<{<{<{W_3{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.X_Y_@ @ @ @ i e@e@e@e@e@e@e@e@J 7.7.!@!@!@!@!@!@!@!@!@s+s+s+s+h h h h h h h h h h h h h h A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.A.h h h h h h h h h h h h h h s+s+s+s+!@!@!@!@!@!@!@!@!@7.7.J e@e@e@e@e@e@e@e@i @ @ @ @ @ @ @ q=E+J.J.J.J.J.M+M+d+d+d+d+D+D+D+g g g H H H 0{e#e#(.(.(.,{+&+&j j j N~M~# # # s~s~]+]+]+3~3~;+y.y.y.-~K f f f W#W#$ $ x!Y.Y.Y.5.e e e e :!{&{&{&{&B.J%J%J%.,& & & Z=G '+'+c c d&d&I@I@I@k b b b = m@m@m@-'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+I.&.9 9 5;, F+F+F+E 8 8 Q+m m m o.-+C.C.7 ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#r#n v.q.4.G+H+H+g@`+=.=.<+~+~+Q.1+W.>@>@B B o o V m.m. +y+y+y+z+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p f.r.k.a.b.b.<.[.-.;.Q R R q q r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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A.Z_b+< < < c+: : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D t=_.*@*@O=P=6 6 {+P.P.) ) 7 7 C.C.-+o.m m ' 8 8 8 E F+F+F+, 9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+- - - H,H,a a +'-'m@m@= = b b k k I@I@d&d&d&c c '+'+G Z=& & & r+J%J%J%B.{&{&{&{&:!e e e {&t!A!A!A!g!K!f]{.{.{.{.{.{.{.{.{.{.2]3~3~]+]+]+s~s~# # # # N~N~j j j +&,{(.(.${ .*{*{h~6{6{<{<{<{<{N{'~{.{.{.{.{.{.{.{.{.{.{.{.{.{.`_ > ]>]>^+^+^+I.9 9 9 , F+F+F+E 8 8 8 ' m m o.-+C.C.7 7 ) ) P.P.{+6 6 P=O=*@*@_.t=D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : c+< < < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.=.<+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.R R R q r r s t u v w x x y z S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#q$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=>$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D b+b+< < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m Q+8 8 8 E F+F+F+5;9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; 0 ,,F F F f,- - - H,a a a +'m@m@m@= 5'b b k k I@I@d&d&d&c c '+'+G Z=& & & r+J%J%J%B.{&{&{&{&:!e e {&h!t!t!A!A!g!f]{.{.{.{.{.{.{.{.{.{.2]y.;+3~]+]+]+]+s~# # # # M~N~j j j +&+&,{(.%. :*{*{*{6{6{6{<{<{<{m{.:{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.+:a]@ @ @ @ @ @ i e@e@e@e@e@e@e@e@e@J J 7.!@!@!@!@!@!@!@!@!@!@!@!@!@s+s+s+s+s+s+h h h h h h h h h h h h h h h h h h h h h h h h h h h h h h h h h s+s+s+s+s+s+!@!@!@!@!@!@!@!@!@!@!@!@!@7.J J e@e@e@e@e@e@e@e@e@i @ @ @ @ @ @ @ q=E+J.J.J.J.J.J.M+M+d+d+d+d+d+D+D+g g g g H H H e#e#e#(.(.(.,{+&+&j j j N~M~# # # # s~]+]+]+]+3~;+y.y.y.y.K K f f P!W#W#$ $ x!Y.Y.5.5.e e e e :!{&{&{&{&B.J%J%J%r+& & & Z=G '+'+c c d&d&d&I@I@k k b b 5'= m@m@m@+'a a a H,- - - f,F F F ,,0 ; ; l l $+$+> > ]>]>^+^+^+I.9 9 9 5;F+F+F+E 8 8 8 Q+m m m o.C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D i=~ ~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+~+1+W.>@>@B B o o V m.m.m.y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R q q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=G]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .,K.b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+P.P.P.) ) 7 C.C.-+o.m m m Q+8 8 E F+F+F+F+5;9 9 &.I.^+^+^+]>> > $+$+$+l ; ; ; 0 ,,F F F f,- - - H,a a a +'m@m@m@= 5'b b k k I@I@d&d&d&c '+'+'+Z=Z=& & & r+J%J%J%B.{&{&{&{&:!e {&h!h!t!t!A!A!1]{.{.{.{.{.{.{.{.{.{.2]y.y.;+3~]+]+]+]+s~s~# # # M~N~N~j j j +&+&(.(.a{@:*{*{h~6{6{6{<{<{<{#:R-{.{.{.{.{.{.{.{.{.{.{.{.{.{.8{$:@ @ @ @ @ @ @ @ i e@e@e@e@e@e@e@e@e@e@J J 7.!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@s+s+s+s+s+s+s+s+s+s+s+s+h h h h h h h s+s+s+s+s+s+s+s+s+s+s+s+!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.J J e@e@e@e@e@e@e@e@e@e@i @ @ @ @ @ @ @ @ q=E+J.J.J.J.J.J.M+M+d+d+d+d+d+D+D+g g g g H H H 0{e#e#(.(.(.(.+&+&j j j N~N~M~# # # s~s~]+]+]+]+3~;+y.y.y.-~K K f f P!W#W#$ $ x!Y.Y.5.5.e e e e :!{&{&{&{&B.J%J%J%r+& & & Z=Z='+'+'+c d&d&d&I@I@k k b b 5'= m@m@m@+'a a a H,- - - f,F F F ,,0 ; ; ; l $+$+$+> > ]>^+^+^+I.&.9 9 5;, F+F+F+E 8 8 Q+m m m o.-+C.C.7 ) ) P.P.P.{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+K.K.9.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p r.r.k.a.b.b.<.-.-.;.Q R R q q r s t u u v w x y z S T T >.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$&%&%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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W$: b+b+< < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ i=D D t=*@*@*@O=6 6 6 {+P.P.) ) 7 7 C.C.-+o.m m ' 8 8 8 E F+F+F+, 9 9 9 &.I.^+^+]>]>> > $+$+l l ; ; ; 0 ,,F F T+- - - - H,a a a -'m@m@m@= 5'b b k k I@I@d&d&d&c '+'+'+Z=Z=& & & r+J%J%J%B.{&{&{&{&:!@>h!h!h!t!t!A!1]{.{.{.{.{.{.{.{.{.{.2]y.y.y.;+3~3~]+]+]+s~s~# # # # M~N~j j j +&+&,{(.!/%:<{*{*{h~6{6{6{<{<{&:*:{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.E]=:q=@ @ @ @ @ @ @ @ i i e@e@e@e@e@e@e@e@e@e@J J 7.7.!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.J J e@e@e@e@e@e@e@e@e@e@e@i @ @ @ @ @ @ @ @ q=E+E+J.J.J.J.J.M+M+d+d+d+d+d+d+D+D+D+g g g H H H 0{e#e#e#(.(.(.,{+&+&j j j N~M~# # # # s~s~]+]+]+3~3~;+y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.5.5.e e e :!:!{&{&{&{&B.J%J%J%r+& & & Z=Z='+'+'+c d&d&d&I@I@k k b b 5'= m@m@m@-'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+I.&.9 9 9 , F+F+F+E 8 8 8 ' m m o.o.C.C.7 7 ) ) P.P.{+6 6 6 O=*@*@*@t=D D i=~ ~ ~ )+g.g.g.)={ { { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o V m.m.m. +y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.Q R R R q r r t u u v w x x y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=^ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t=K.b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m Q+8 8 8 E F+F+F+5;9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+- - - - H,a a a -'m@m@m@= 5'b b k k I@I@d&d&d&c '+'+'+Z=Z=& & & r+J%J%J%B.{&{&{&{&@>0!h!h!h!t!t!1]{.{.{.{.{.{.{.{.{.{.2]-~y.y.y.y.;+3~]+]+]+]+s~# # # # M~N~N~j j j +&+&,{(.-:z~*{*{*{h~6{6{6{<{<{A^.){.{.{.{.{.{.{.{.{.{.{.{.{.{.;:>:[^q=q=@ @ @ @ @ @ @ @ i i e@e@e@e@e@e@e@e@e@e@e@e@J J 7.7.7.!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.7.J J J e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.M+M+d+d+d+d+d+d+D+D+D+g g g g H H 0{e#e#e#(.(.(.,{+&+&j j j N~N~M~# # # # s~]+]+]+]+3~3~y.y.y.y.-~K f f f P!W#W#$ $ Y.Y.Y.5.5.e e e :!:!{&{&{&{&B.J%J%J%r+& & & Z=Z='+'+'+c c d&d&I@I@k k b b 5'= m@m@m@-'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.9 9 9 5;F+F+F+E 8 8 8 Q+m m m o.C.C.C.7 ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ )+g.g.)=)={ { X&X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+Q.1+W.>@>@B B o @V m.m. +y+y+y+z+l+l+G.:.:.:.2+#+#+#+0.0.0.R.p p f.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d K.b+b+< < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+P.P.P.) ) 7 C.C.-+o.m m m Q+8 8 E F+F+F+F+5;9 9 &.I.^+^+^+]>]>> > $+$+l l ; ; 0 0 F F F T+- - - - H,a a a -'m@m@m@= b b b k k I@I@d&d&c c '+'+'+Z=Z=& & & r+J%J%J%B.B.{&{&J%0!0!h!h!h!t!^]{.{.{.{.{.{.{.{.{.{.6~K K y.y.y.y.;+3~]+]+]+]+s~s~# # # # M~N~j j j j +&,{(.%],:6{*{*{*{h~6{6{<{<{':):{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.y^!:J.E+q=q=@ @ @ @ @ @ @ @ @ i i e@e@e@e@e@e@e@e@e@e@e@e@e@J J J J 7.7.7.7.!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@!@7.7.7.7.J J J J e@e@e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ @ @ q=E+J.J.J.J.J.J.J.M+M+d+d+d+d+d+D+D+D+D+g g g g H H 0{e#e#e#(.(.(.(.,{+&j j j j N~M~# # # # s~s~]+]+]+]+3~;+y.y.y.y.K K f f f W#W#$ $ $ Y.Y.Y.5.5.e e e :!:!{&{&{&{&B.J%J%J%r+& & & Z=Z='+'+'+c c d&d&I@I@k k b b b = m@m@m@-'a a a H,H,- - - f,F F F ,,0 ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 5;F+F+F+F+E 8 8 Q+m m m o.-+C.C.7 ) ) ) P.P.{+6 6 P=O=*@*@_.t=D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.~+~+~+1+W.W.>@O B o o @m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q r r s t u u w x x y z S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=d.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4@: K.b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ ~ i=D D t=*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m ' 8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>> > > $+$+l ; ; ; 0 ,,F F F f,- - - H,H,a a +'-'m@m@m@= b b b k k I@I@d&d&c c '+'+'+Z=Z=& & & r+J%J%J%B.B.{&J%[![!0!h!h!h!^]{.{.{.{.{.{.{.{.{.{.6~f f K -~y.y.y.y.3~3~]+]+]+]+s~# # # # M~N~N~j j j +&+&,{(.~:U^*{*{*{*{h~6{6{<{<{,(l{{.{.{.{.{.{.{.{.{.{.{.{.{.{.s^~/a+J.J.E+q=q=@ @ @ @ @ @ @ @ @ @ i i e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@J J J J J J J J 7.7.7.7.7.7.7.J J J J J J J J e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.J.M+M+d+d+d+d+d+d+D+D+D+g g g g g H H H 0{e#e#(.(.(.(.,{+&+&j j j N~N~M~# # # # s~]+]+]+]+3~3~;+y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.Y.5.5.e e e :!:!{&{&{&B.B.J%J%J%r+& & & Z=Z='+'+'+c c d&d&I@I@I@k b b b = m@m@m@-'+'a a a H,- - - f,F F F ,,0 ; ; ; l $+$+$+> > ]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 ' m m o.o.C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D i=i=~ ~ ~ )+g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+Q.1+W.>@>@B B o o V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0..+p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *@K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+, 9 9 9 &.I.^+^+]>]>> > $+$+$+l ; ; ; 0 ,,F F F f,- - - H,a a a +'-'m@m@m@= b b b k k I@I@d&d&c c '+'+'+Z=Z=& & & .,J%J%J%B.B.J%[![![!0!h!h!`{{.{.{.{.{.{.{.{.{.{.6~f f f K -~y.y.y.y.;+3~]+]+]+]+s~s~# # # # M~N~N~j j j +&+&,{j U~6{*{*{*{*{h~6{6{6{{:]:g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.T{^:J.J.J.J.E+E+q=@ @ @ @ @ @ @ @ @ @ @ @ i i e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@i i @ @ @ @ @ @ @ @ @ @ @ @ q=q=E+J.J.J.J.J.J.J.M+M+M+d+d+d+d+d+d+D+D+D+g g g g g H H H 0{e#e#e#(.(.(.,{+&+&j j j j N~M~# # # # s~s~]+]+]+]+3~;+y.y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.Y.5.5.e e e :!{&{&{&{&B.B.J%J%J%r+& & & Z=Z='+'+'+c c d&d&I@I@I@k b b b = = m@m@m@+'a a a H,- - - f,F F F ,,0 ; ; ; l l $+$+> > ]>]>^+^+I.I.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.C.C.C.7 ) ) P.P.{+{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x y y S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J%K.K.b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ i=D D t=_.*@*@O=P=6 6 {+P.P.P.) ) 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+5;9 9 9 I.^+^+^+]>]>> > $+$+l l ; ; ; 0 ,,F F T+f,- - - H,a a a +'m@m@m@= = b b b k I@I@I@d&d&c c '+'+'+Z=Z=& & & .,J%J%J%J%.,[![![![!0!h!`{{.{.{.{.{.{.{.{.{.{.6~W#f f f K K -~y.y.y.;+3~3~]+]+]+]+s~# # # # # M~N~j j j j +&+&,{/:(:*{*{*{*{*{h~6{6{6{Z]M!{.{.{.{.{.{.{.{.{.{.{.{.{.{.J;_:l]J.J.J.J.J.E+E+q=q=@ @ @ @ @ @ @ @ @ @ @ @ @ i i i i e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@e@i i i @ @ @ @ @ @ @ @ @ @ @ @ @ q=q=E+E+J.J.J.J.J.J.J.M+M+M+d+d+d+d+d+d+D+D+D+D+g g g g H H H H 0{e#e#e#(.(.(.,{+&+&j j j j N~N~# # # # # s~]+]+]+]+3~3~;+y.y.y.y.K K f f f P!W#W#$ $ x!Y.Y.5.5.e e e e :!{&{&{&{&B.B.J%J%J%r+& & & Z=Z='+'+'+c c d&d&I@I@I@k b b b = = m@m@m@+'a a a H,- - - f,T+F F F 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.9 9 9 5;F+F+F+F+E 8 8 Q+m m m o.-+C.C.7 ) ) ) P.P.{+6 6 P=O=*@*@*@t=D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.>@>@B B o o V m.m.m. +y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.;.R R R q r r s t u v w x x y z S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X.: K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { )=)=g.g.)+~ ~ ~ i=i=D D t=*@*@*@O=6 6 6 {+P.P.) ) 7 7 C.C.-+o.m m ' Q+8 8 E F+F+F+F+5;9 9 &.I.^+^+^+]>]>> > $+$+l l ; ; ; 0 F F F T+f,- - - H,a a a +'m@m@m@= = b b b k I@I@I@d&d&c c '+'+'+G Z=& & & .,J%J%J%& ^![![![![!0!`{{.{.{.{.{.{.{.{.{.{.6~W#W#P!f f f K -~y.y.y.y.;+3~]+]+]+]+s~s~# # # # M~N~N~j j j j +&+&N~::q~*{*{*{*{*{h~6{6{Z~<:{,{.{.{.{.{.{.{.{.{.{.{.{.{.{.r(8]J.J.J.J.J.J.J.J.E+E+q=q=@ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ i i i i i i e@e@e@e@e@e@e@e@e@e@e@e@e@i i i i i i i @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ q=q=E+E+J.J.J.J.J.J.J.J.M+M+M+d+d+d+d+d+d+d+D+D+D+D+g g g g H H H 0{e#e#e#e#(.(.(.(.,{+&j j j j N~N~M~# # # # s~s~]+]+]+]+3~;+y.y.y.y.-~K f f f P!W#W#$ $ $ Y.Y.Y.5.5.e e e e :!{&{&{&{&B.B.J%J%J%.,& & & Z=Z='+'+'+c c d&d&I@I@I@k k b b 5'= m@m@m@+'a a a H,- - - - T+F F F 0 ; ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 5;, F+F+F+E 8 8 8 ' m m o.o.C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@t=D D D i=~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+0.0.0.R.p p f.r.k.k.b.b.<.[.-.-.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *@K.K.b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=O=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>> > > $+$+l l ; ; ; 0 F F F T+- - - - H,a a a +'m@m@m@= = b b b k I@I@I@d&d&c c '+'+'+G Z=& & & .,J%J%& G)^![![![![!`{{.{.{.{.{.{.{.{.{.{.6~$ W#W#P!f f f K K y.y.y.y.;+3~3~]+]+]+]+s~s~# # # # M~N~N~j j j j +&+&[:G{*{*{*{*{*{*{h~6{6{E_=~{.{.{.{.{.{.{.{.{.{.{.{.{.{.9;}:)]M+J.J.J.J.J.J.J.J.J.J.E+E+q=q=@ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ q=q=E+E+E+J.J.J.J.J.J.J.J.J.M+M+M+d+d+d+d+d+d+d+D+D+D+D+g g g g g H H H 0{e#e#e#e#(.(.(.(.,{+&+&j j j N~N~M~# # # # s~s~]+]+]+]+3~3~;+y.y.y.y.-~K f f f P!W#W#$ $ x!Y.Y.Y.5.5.e e e e :!{&{&{&{&B.J%J%J%J%.,& & & Z=Z='+'+'+c c d&d&I@I@I@k k b b 5'= m@m@m@+'a a a H,- - - - T+F F F 0 0 ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 ' m m m o.C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@B B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p.9.K.K.b+< < < c+: : : [ [ [ j+_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D t=_.*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+F+5;9 9 &.I.^+^+^+]>]>> > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@= 5'b b b k k I@I@d&d&d&c c '+'+G Z=& & '+Q)G)G)G)G)G)n{{.{.{.{.{.{.{.{.{.{.6~5.Y.Y.Y.$ $ $ W#W#P!f f f K K -~y.y.y.y.;+3~]+]+]+]+]+s~s~# # # # # M~N~N~j j j j s{t{*{*{*{*{*{*{*{*{*{4:r/{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.5:4^d+d+d+d+d+d+d+d+d+M+M+M+M+M+M+J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.M+M+M+M+M+d+d+d+d+d+d+d+d+d+d+d+D+D+D+D+D+g g g g g g H H H H 0{0{e#e#e#(.(.(.(.(.,{+&+&j j j j j N~N~M~# # # # s~s~]+]+]+]+]+3~3~y.y.y.y.y.-~K f f f P!W#W#W#$ $ x!Y.Y.Y.5.5.e e e e :!{&{&{&{&B.B.J%J%J%r+.,& & & Z=G '+'+'+c c d&d&I@I@I@k k b b 5'= m@m@m@-'a a a H,H,- - - f,F F F ,,0 ; ; ; l l $+$+> > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.C.C.C.7 ) ) P.P.P.{+6 6 P=O=*@*@*@t=D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p f.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+,+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4&!>K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ i=i=D D t=*@*@*@O=P=6 6 {+P.P.) ) ) 7 C.C.C.o.m m m Q+8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@= = b b b k k I@I@d&d&d&c c '+'+G Z=& '+Q)Q)Y)G)G)G)n{{.{.{.{.{.{.{.{.{.{.h{5.5.Y.Y.Y.x!$ $ W#W#W#f f f f K -~y.y.y.y.y.3~3~]+]+]+]+]+s~s~# # # # # M~N~N~j j j j T_x{*{*{*{*{*{*{*{*{*{E^K~{.{.{.{.{.{.{.{.{.{.{.{.{.{.!{H{D+D+d+d+d+d+d+d+d+d+d+d+d+d+M+M+M+M+M+M+M+M+M+J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.J.M+M+M+M+M+M+M+M+M+d+d+d+d+d+d+d+d+d+d+d+d+d+D+D+D+D+D+g g g g g g g H H H H 0{0{e#e#e#e#(.(.(.(.(.,{+&+&j j j j N~N~M~M~# # # # s~s~]+]+]+]+]+3~3~;+y.y.y.y.-~K K f f f P!W#W#$ $ x!Y.Y.Y.5.5.5.e e e :!:!{&{&{&{&B.J%J%J%J%r+& & & & Z=G '+'+c c d&d&d&I@I@I@k k b b 5'= m@m@m@-'a a a H,H,- - - f,T+F F F 0 ; ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 O=*@*@*@_.D D D i=~ ~ ~ )+g.g.g.)={ { +=X&w.w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@i@i@H@P@t#t#U#q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Z+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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P=9.K.K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>> > > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@= = b b b k k I@I@d&d&d&c c '+'+'+Z=c Q)Q)Q)Y)G)G)n{{.{.{.{.{.{.{.{.{.{.h{e 5.5.Y.Y.Y.x!$ $ $ W#W#P!f f f K K -~y.y.y.y.;+3~3~]+]+]+]+]+s~s~# # # # # M~N~N~j j j 6:V_*{*{*{*{*{*{*{*{*{7:D]{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.]:8:D+D+D+D+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+M+M+M+M+M+M+M+M+M+M+M+M+M+M+M+M+M+M+M+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+D+D+D+D+D+D+g g g g g g g g H H H H 0{0{e#e#e#e#(.(.(.(.(.,{+&+&+&j j j j N~N~M~# # # # # # s~]+]+]+]+]+3~3~;+y.y.y.y.-~K K f f f P!W#W#W#$ $ x!Y.Y.Y.5.5.e e e e :!{&{&{&{&{&B.J%J%J%J%.,& & & & Z=G '+'+c c d&d&d&I@I@I@k k b b 5'= m@m@m@-'a a a H,H,- - - f,T+F F F 0 ; ; ; l l $+$+> > > ]>]>^+^+I.I.9 9 9 5;F+F+F+F+E 8 8 Q+' m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+i+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . % r#K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 U+U+>$>$^ ^ ^ x+2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D _.*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m ' Q+8 8 E E F+F+F+, 9 9 9 &.I.^+^+^+]>> > > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@= = b b b k k I@I@d&d&d&c c '+'+'+c H)Q)Q)Q)Y)G)n{{.{.{.{.{.{.{.{.{.{.h{e e 5.5.5.Y.Y.Y.x!$ $ W#W#W#P!f f f K K -~y.y.y.y.;+3~3~]+]+]+]+]+s~s~# # # # # M~N~N~j j j ${A{*{*{*{*{*{*{*{*{*{9:7){.{.{.{.{.{.{.{.{.{.{.{.{.{.y'0:g g D+D+D+D+D+D+D+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+D+D+D+D+D+D+D+D+g g g g g g g g H H H H H 0{0{e#e#e#e#(.(.(.(.(.,{,{+&+&j j j j j N~N~M~# # # # # s~s~s~]+]+]+]+3~3~;+y.y.y.y.y.-~K f f f f P!W#W#$ $ $ Y.Y.Y.5.5.5.e e e e :!{&{&{&{&{&B.J%J%J%J%.,& & & Z=Z='+'+'+c c d&d&d&I@I@I@k b b b 5'= m@m@m@-'a a a a H,- - - f,T+F F F 0 ; ; ; l l $+$+$+> > ]>]>^+^+^+I.9 9 9 5;F+F+F+F+E 8 8 8 ' m m m o.C.C.7 7 ) ) P.P.P.{+6 6 P=O=*@*@*@t=D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.-.-.;.Q R R q q r r t u u v w x y y S S T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z._ 9.K.K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.o.m m m ' 8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+]>]>> > > $+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@= = b b b k k I@I@I@d&d&c c '+'+d&I)H)Q)Q)Q)Q)g{{.{.{.{.{.{.{.{.{.{.h{e e e e 5.5.Y.Y.Y.Y.$ $ $ W#W#P!f f f f K -~y.y.y.y.y.;+3~3~]+]+]+]+]+s~s~# # # # # M~M~N~N~j F~a:u~u~*{*{*{*{*{*{*{e~b:{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.~]c:g g g g g D+D+D+D+D+D+D+D+D+D+D+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+d+D+D+D+D+D+D+D+D+D+D+D+g g g g g g g g g g H H H H H 0{0{e#e#e#e#e#(.(.(.(.(.(.,{+&+&+&j j j j N~N~N~M~# # # # # s~s~]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f P!W#W#W#$ $ x!Y.Y.Y.5.5.e e e e :!:!{&{&{&{&B.B.J%J%J%r+.,& & & Z=Z='+'+'+c c d&d&d&I@I@k k b b b 5'= m@m@m@-'a a a a H,- - - f,T+F F F 0 0 ; ; ; l $+$+$+> > ]>]>^+^+^+I.&.9 9 5;, F+F+F+E 8 8 8 ' m m m o.-+C.C.7 ) ) ) P.P.{+6 6 6 O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u v w x x y z S T T >.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=*@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 r#K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 C C ] ] ] Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=6 6 6 {+P.P.) ) ) 7 C.C.C.o.m m m ' 8 8 8 E F+F+F+F+5;9 9 9 I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F f,- - - - H,a a a +'m@m@m@= = b b b k k I@I@I@d&d&c c '+d&F'I)H)Q)Q)Q):{{.{.{.{.{.{.{.{.{.{.9~:!:!e e e 5.5.5.Y.Y.Y.x!$ $ W#W#W#P!f f f K K -~y.y.y.y.y.;+3~3~]+]+]+]+]+s~s~# # # # # # M~N~N~j d:'_u~u~u~*{*{*{*{*{*{e:)!{.{.{.{.{.{.{.{.{.{.{.{.{.{.'~f:e#g g g g g g g g g g g D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+D+g g g g g g g g g g g g H H H H H H 0{0{e#e#e#e#e#(.(.(.(.(.(.(.,{+&+&+&j j j j j N~N~M~M~# # # # # s~s~]+]+]+]+]+]+3~;+y.y.y.y.y.-~K K f f f P!W#W#W#$ $ x!Y.Y.Y.Y.5.5.e e e e :!{&{&{&{&{&B.J%J%J%J%r+& & & & Z=G '+'+'+c c d&d&d&I@I@k k b b b 5'= m@m@m@-'a a a a H,- - - - T+F F F 0 0 ; ; ; l $+$+$+> > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+y*] ] y%C 2 2 x+^ ^ ^ R&>$U+U+1 / / r$r$n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p r.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~&J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^.r#9.K.K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+>$R&^ ^ x+x+2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+, 5;9 9 9 I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 F F F F f,- - - - H,a a a +'m@m@m@m@= 5'b b k k I@I@I@d&d&d&c I@F'F'I)H)H)Q):{{.{.{.{.{.{.{.{.{.{.9~{&:!:!e e e e 5.5.Y.Y.Y.Y.x!$ $ W#W#W#P!f f f K K -~y.y.y.y.y.;+3~3~]+]+]+]+]+s~s~# # # # # # M~M~N~3~G~u~u~u~u~u~*{*{*{*{&:U{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{./~U~H H H g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g g H H H H H H H H 0{0{e#e#e#e#e#e#(.(.(.(.(.(.,{,{+&+&+&j j j j j N~N~N~M~# # # # # # s~s~]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#$ $ $ x!Y.Y.Y.5.5.e e e e :!:!{&{&{&{&{&B.J%J%J%J%.,& & & & Z=G '+'+'+c c d&d&d&I@I@k k b b b 5'= m@m@m@-'a a a a H,- - - - T+F F F 0 0 ; ; ; l l $+$+> > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+Z+] ] ] C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.k.k.a.b.<.[.-.-.;.Q R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g:r#K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ d#} } } Q%X X ( ( | | n.`.r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D t=_.*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+, 5;9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 F F F F f,- - - - H,a a a +'m@m@m@m@= 5'b b k k I@I@I@d&d&d&I@t)F'F'F'H)H):{{.{.{.{.{.{.{.{.{.{.9~{&{&{&:!e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#P!f f f f K K -~y.y.y.y.y.;+3~3~]+]+]+]+]+]+s~s~# # # # # # M~N~h:i:u~u~u~u~u~u~*{*{*{A^1^{.{.{.{.{.{.{.{.{.{.{.{.{.{.j:k:5@H H H H H H H H H H g g g g g g g g g g g g g g g g g g g g g g g g g g g g H H H H H H H H H H 0{0{0{e#e#e#e#e#e#e#(.(.(.(.(.(.(.,{,{+&+&+&j j j j j N~N~N~M~# # # # # # # s~s~]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ x!Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&B.B.J%J%J%r+.,& & & & Z=G '+'+c c c d&d&I@I@I@k k b b b = = m@m@m@-'a a a H,H,- - - - T+F F F ,,0 ; ; ; l l $+$+> > ]>]>^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 ' m m o.o.C.C.7 7 ) ) P.P.P.{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ >$U+U+1 1 / / r$r$n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.a.b.b.<.[.-.-.Q R R R q r r t u u v w x x y S S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=I@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . * r#9.K.K.b+< < < c+: : : #%[ [ [ j+_ _ _ d#} } Q%X X X ( | | n.n.r$r$/ / 1 1 U+U+>$^ ^ ^ x+2 2 C y%] ] ] Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 F F F F f,- - - - H,a a a +'m@m@m@m@= 5'b b k k I@I@I@d&d&k t)t)F'F'F'I):{{.{.{.{.{.{.{.{.{.{.9~{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#P!f f f f K K -~y.y.y.y.y.;+3~3~]+]+]+]+]+]+s~s~# # # # # # # }{Y!Q~Q~u~u~u~u~u~u~*{s_0/0,{.{.{.{.{.{.{.{.{.{.{.{.{.{.D] :e#e#0{0{0{0{H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H 0{0{0{e#e#e#e#e#e#e#e#e#(.(.(.(.(.(.(.(.,{,{+&+&+&j j j j j j N~N~N~M~M~# # # # # # s~s~]+]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ Y.Y.Y.Y.5.5.e e e e :!:!{&{&{&{&{&B.J%J%J%J%r+.,& & & Z=Z='+'+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@-'a a a H,H,- - - - T+F F F ,,0 ; ; ; l l $+$+> > > ]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 ' m m m o.C.C.C.7 ) ) ) P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 / / r$r$`.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+b+K.K.r#r#n v.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.<.[.-.-.;.Q R R q q r s t u u v w x y y S S T >.,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X.T$r#K.K.b+b+< < c+: : : : #%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.`.r$r$/ / 1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.o.o.m m ' Q+8 8 E E F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 F F F F f,- - - - H,a a a +'-'m@m@m@= 5'b b b k k I@I@d&k d)t)t)F'F'F'~{{.{.{.{.{.{.{.{.{.{.9~B.{&{&{&{&{&:!:!e e e e 5.5.Y.Y.Y.Y.x!$ $ W#W#W#P!f f f f K K -~y.y.y.y.y.;+3~3~3~]+]+]+]+]+s~s~s~# # # # # # l:m:Q~Q~Q~u~u~u~u~u~u~k:l{{.{.{.{.{.{.{.{.{.{.{.{.{.{.'!n:}{e#e#e#e#e#e#e#e#e#0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{0{e#e#e#e#e#e#e#e#e#e#e#e#(.(.(.(.(.(.(.(.(.(.,{,{+&+&+&+&j j j j j j N~N~N~M~M~# # # # # # s~s~s~]+]+]+]+]+]+3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&B.B.J%J%J%J%.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@+'a a a H,H,- - - - T+F F F ,,0 ; ; ; l l $+$+> > > ]>^+^+^+I.I.9 9 9 5;F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&w.w.6@6@Z+Z+] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m r#r#K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( | | | n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D _.*@*@*@O=6 6 {+{+P.P.) ) ) 7 C.C.C.o.m m m ' 8 8 8 E F+F+F+F+, 9 9 9 &.I.^+^+^+]>]>> > $+$+$+l ; ; ; ; 0 F F F F f,- - - - H,a a a +'-'m@m@m@= 5'b b b k k I@I@b d)d)d)t)t)F'W~{.{.{.{.{.{.{.{.{.{.9~J%B.B.{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.Y.$ $ $ W#W#W#P!f f f f K K -~y.y.y.y.y.y.;+3~3~]+]+]+]+]+]+s~s~s~# # # # ]+o:u~H~Q~Q~Q~Q~u~u~u~v{o]g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.m^p:(.(.(.(.(.e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#e#(.(.(.(.(.(.(.(.(.(.(.(.(.,{,{+&+&+&+&j j j j j j j j N~N~N~M~M~# # # # # # # s~s~]+]+]+]+]+]+3~3~3~;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.e e e e :!:!{&{&{&{&{&B.J%J%J%J%r+.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b 5'= m@m@m@m@+'a a a H,H,- - - - T+F F F ,,0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.9 9 9 5;F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D i=i=~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ >$>$U+U+1 / / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.[.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=M+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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V#n r#9.K.K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X X ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 C C ] ] ] Z+6@6@3 w.w.X&+={ { )=)=g.g.)+~ ~ ~ ~ i=D D t=_.*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > $+$+$+l ; ; ; ; 0 ,,F F F f,- - - - H,a a a a -'m@m@m@= = b b b k k I@b 4)d)d)d)t)t)W~{.{.{.{.{.{.{.{.{.{.9~J%J%B.B.{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.x!$ $ $ W#W#W#P!f f f f K K -~y.y.y.y.y.y.;+3~3~]+]+]+]+]+]+]+s~s~s~# # # |{q:v~v~H~H~Q~Q~Q~Q~u~r:N_{.{.{.{.{.{.{.{.{.{.{.{.{.{.J;s:X~(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.,{,{,{+&+&+&+&+&j j j j j j j j N~N~N~M~M~# # # # # # # # s~s~s~]+]+]+]+]+]+3~3~;+;+y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.e e e e e :!{&{&{&{&{&B.B.J%J%J%J%r+& & & & Z=Z=G '+'+c c c d&d&I@I@I@k k b b b 5'= m@m@m@m@+'a a a H,H,- - - f,T+F F F ,,0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.9 9 9 5;, F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.| | ( ( X X Q%Q%} } d#_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.Q R R R q r r s t u u w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=D.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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N+r#r#K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ d#} } } Q%X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > $+$+$+l ; ; ; ; 0 ,,F F F f,- - - - H,a a a a -'m@m@m@= = b b b k k b 4)4)d)d)d)t)W~{.{.{.{.{.{.{.{.{.{.9~J%J%J%J%B.B.{&{&{&{&{&:!e e e e e 5.5.Y.Y.Y.Y.x!$ $ $ W#W#W#P!f f f f K K -~-~y.y.y.y.y.;+;+3~3~]+]+]+]+]+]+]+s~s~s~# !/t:u~v~v~v~v~H~H~Q~Q~`!u:1_{.{.{.{.{.{.{.{.{.{.{.{.{.{.S^$~,{,{,{,{(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.(.,{,{,{,{+&+&+&+&+&+&+&j j j j j j j j j j N~N~N~N~M~# # # # # # # # # s~s~s~]+]+]+]+]+]+3~3~3~;+y.y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&{&B.J%J%J%J%r+.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b b 5'= m@m@m@-'+'a a a H,- - - - f,T+F F F ,,0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.9 9 9 5;, F+F+F+E 8 8 8 Q+' m m o.o.C.C.7 7 ) ) P.P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.6@6@Z+Z+] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( X X X Q%} } d#u%_ _ _ [ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.d.2.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#q$q$&%6%o%P%P%~&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . = n r#9.K.K.b+< < < c+: : : #%[ [ [ _ _ _ _ d#} } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,a a a a -'m@m@m@m@= 5'b b b = ~)4)4)4)d)d)W~{.{.{.{.{.{.{.{.{.{.9~.,r+J%J%J%J%B.{&{&{&{&{&:!:!e e e e e 5.5.Y.Y.Y.Y.x!$ $ $ W#W#W#P!f f f f f K K -~y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+]+s~s~s~v:(:v~v~v~v~v~v~v~H~H~E_6~{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-w:{{+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&+&j j j j j j j j j j j j j N~N~N~N~M~M~# # # # # # # # # s~s~s~]+]+]+]+]+]+]+]+3~3~;+y.y.y.y.y.y.y.-~K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%r+.,& & & Z=Z=G '+'+'+c c d&d&d&I@I@I@k k b b b = = m@m@m@-'+'a a a H,- - - - f,T+F F F ,,0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E E 8 8 Q+' m m m o.C.C.C.7 ) ) ) P.P.{+{+6 6 O=O=*@*@_.D D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ R&>$U+U+1 / / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.R R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=q+/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I < r#r#K.K.b+b+< < c+: : : T$#%[ [ [ _ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C ] ] ] Z+6@6@6@w.w.X&+={ { )=)=g.g.)+)+~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,H,a a a +'m@m@m@m@= 5'b b m@~)~)4)4)4)d)E~{.{.{.{.{.{.{.{.{.{.9~& .,r+J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.Y.x!$ $ $ W#W#W#P!f f f f f K K -~y.y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+]+s~s~x:h~v~v~v~v~v~v~v~v~`!y:/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.(!z:j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j N~N~N~N~N~M~M~M~# # # # # # # # # # s~s~s~]+]+]+]+]+]+]+]+3~3~;+;+y.y.y.y.y.y.-~K K K f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!{&{&{&{&{&{&B.J%J%J%J%r+.,& & & & Z=Z='+'+'+c c c d&d&d&I@I@I@k k b b b = = m@m@m@-'+'a a a H,- - - - f,T+F F F 0 0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 , F+F+F+E E 8 8 8 ' m m m o.C.C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D i=i=~ ~ ~ )+g.g.g.)={ { { X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.| | | ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=>$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . #=n r#9.K.K.b+< < < c+: : : T$[ [ [ j+_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ x+x+2 2 C y%] ] ] Z+6@6@3 w.X&X&+={ { )=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+- - - - H,H,a a a +'-'m@m@m@= 5'b m@~)~)~)4)4)4)E~{.{.{.{.{.{.{.{.{.{.9~& & & .,r+J%J%J%J%B.{&{&{&{&{&{&:!:!e e e e 5.5.5.Y.Y.Y.Y.x!$ $ $ W#W#W#W#P!f f f f K K K -~y.y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+]+v:A:J!J!J!v~v~v~v~v~v~B:r({.{.{.{.{.{.{.{.{.{.{.{.{.{.{.C:-:j j j j j j j j j j j j j j j j j j j j j j j j j j N~N~N~N~N~N~N~N~M~M~M~# # # # # # # # # # # # s~s~s~]+]+]+]+]+]+]+]+]+3~3~;+;+y.y.y.y.y.y.y.-~K K f f f f f P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=G '+'+'+c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@-'a a a a H,- - - - f,F F F F 0 0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%: : : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q r r s t u u v w x y y S S T >.,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.n r#r#K.K.K.b+< < < c+: : : #%[ [ [ _ _ _ u%} } } Q%X X X ( | | n.n.r$r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ i=i=D D t=_.*@*@O=O=6 6 {+{+P.P.) ) ) 7 C.C.C.o.o.m m m Q+8 8 8 E F+F+F+F+5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+f,- - - - H,a a a +'-'m@m@m@= = m@~)~)~)~)~)4)r~{.{.{.{.{.{.{.{.{.{.9~& & & & & r+J%J%J%J%B.B.{&{&{&{&{&{&:!e e e e e 5.5.5.Y.Y.Y.Y.x!$ $ $ $ W#W#W#P!f f f f f K K -~-~y.y.y.y.y.y.y.;+3~3~3~]+]+]+]+]+]+'{h~Z!J!J!J!J!J!v~v~Z!2:z,{.{.{.{.{.{.{.{.{.{.{.{.{.{.d~D:N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~N~M~M~M~M~M~# # # # # # # # # # # # # # s~s~s~s~]+]+]+]+]+]+]+]+]+3~3~3~;+;+y.y.y.y.y.y.y.-~K K K f f f f P!P!W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=Z='+'+'+'+c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@+'a a a a H,- - - - f,F F F F 0 0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 ' m m m o.-+C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ )+)+g.g.)=)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ R&>$U+U+1 / / r$r$`.n.| | ( ( X X Q%} } } d#_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=0.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . n.n r#r#K.K.b+b+< < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 C.C.C.o.m m m ' Q+8 8 8 E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F T+f,- - - - H,a a a a -'m@m@m@m@+'&)~)~)~)~)~)r~{.{.{.{.{.{.{.{.{.{.9~Z=Z=& & & & .,r+J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e 5.5.5.Y.Y.Y.Y.x!x!$ $ $ W#W#W#P!P!f f f f f K K -~-~y.y.y.y.y.y.y.;+;+3~3~3~]+]+]+0~a~Z!Z!Z!Z!Z!J!J!J!J!E:^~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.F:${# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # s~s~s~s~]+]+]+]+]+]+]+]+]+]+3~3~3~3~;+;+y.y.y.y.y.y.y.-~K K K f f f f f P!W#W#W#W#$ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.J%J%J%J%J%r+& & & & & Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@+'a a a H,H,- - - - f,F F F F 0 0 ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.P.{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)={ { +=X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } d#_ _ _ _ [ [ [ #%: : : c+< < < b+K.K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=I.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F n n r#9.K.K.b+< < < c+: : : #%[ [ [ j+_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ ^ x+2 2 C y%] ] ] Z+6@6@6@w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.C.o.m m m ' Q+8 8 8 E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 ,,F F F F f,- - - - H,a a a a +'m@m@m@a *)&)~)~)~)~)f~{.{.{.{.{.{.{.{.{.{.9~'+G Z=Z=& & & & .,J%J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e 5.5.5.Y.Y.Y.Y.Y.x!$ $ $ W#W#W#W#P!f f f f f K K K -~-~y.y.y.y.y.y.y.y.;+3~3~3~3~]+4~q~Z!Z!Z!Z!Z!Z!Z!Z!Z!G:y,{.{.{.{.{.{.{.{.{.{.{.{.{.{.0;H:# # # # # # # # # # # # # # # # # # # # # # # # # # # # s~s~s~s~s~s~]+]+]+]+]+]+]+]+]+]+]+3~3~3~3~;+;+y.y.y.y.y.y.y.y.-~K K K f f f f f P!P!W#W#W#$ $ $ $ x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=Z='+'+'+'+c c d&d&d&I@I@I@k k k b b 5'= = m@m@m@-'+'a a a H,H,- - - - T+F F F ,,0 ; ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 Q+m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 O=O=*@*@_.t=D D i=i=~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7@;@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J 9.n r#r#K.K.b+b+< < c+: : : : #%[ [ [ _ _ _ u%} } } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.)+)+~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) 7 7 C.C.C.o.m m m ' Q+8 8 8 E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 0 F F F F f,- - - - H,H,a a a +'-'m@a Q'*)*)~)~)~)f~{.{.{.{.{.{.{.{.{.{.9~'+'+'+Z=Z=& & & & .,r+J%J%J%J%J%B.B.{&{&{&{&{&:!:!e e e e e 5.5.5.5.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#P!f f f f f K K K -~-~y.y.y.y.y.y.y.y.y.;+;+3~I:J:>~Z!Z!Z!Z!Z!Z!Z!Z!K:p!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.L:M:# # # # # # # # # # # # # # s~s~s~s~s~s~s~s~s~s~s~]+]+]+]+]+]+]+]+]+]+]+]+]+]+3~3~3~3~;+;+y.y.y.y.y.y.y.y.y.-~K K K f f f f f f P!W#W#W#W#$ $ $ x!x!Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.B.J%J%J%J%r+.,& & & & Z=Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b 5'= m@m@m@m@-'a a a a H,- - - - - T+F F F ,,0 ; ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 Q+m m m o.o.C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@6@Z+] ] ] C C 2 2 x+^ ^ ^ R&>$U+U+1 / / r$r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.d.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=} . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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N:n n r#9.K.K.b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / 1 1 U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+{+P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+, 5;9 9 9 I.I.^+^+^+]>]>> > $+$+$+l l ; ; ; 0 0 F F F F T+- - - - H,H,a a a +'-'a Q'Q'Q'*)&)~)2~{.{.{.{.{.{.{.{.{.{.9~c '+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%B.{&{&{&{&{&{&:!:!e e e e e e 5.5.5.Y.Y.Y.Y.Y.x!$ $ $ W#W#W#W#P!P!f f f f f f K K K -~-~y.y.y.y.y.y.y.y.y.;+O:P:>~>~>~>~Z!Z!Z!Z!Z!Q:7){.{.{.{.{.{.{.{.{.{.{.{.{.{.K)R:s~s~s~s~s~s~s~s~s~s~s~]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+S:n!T:x~U:;+;+y.y.y.y.y.y.y.y.y.-~-~K K K f f f f f f P!W#W#W#W#$ $ $ $ x!Y.Y.Y.Y.Y.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.B.J%J%J%J%J%r+& & & & & Z=Z='+'+'+'+c c d&d&d&I@I@I@k k k b b b 5'= m@m@m@m@+'a a a a H,- - - - f,T+F F F ,,0 ; ; ; ; l l $+$+> > > ]>]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 Q+m m m o.o.C.C.C.7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ #%: : : : c+< < b+b+K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+5+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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Y.v.n r#r#K.K.K.b+< < < c+: : : #%[ [ [ j+_ _ _ d#} } Q%X X X ( ( | | n.`.r$/ / / 1 U+U+>$R&^ ^ ^ x+2 2 2 C ] ] ] Z+Z+6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=6 6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 &.I.^+^+^+]>]>> > > $+$+l l ; ; ; ; 0 ,,F F F T+- - - - - H,a a a a V:Q'Q'Q'Q'*)&)2~{.{.{.{.{.{.{.{.{.{.=~c c c '+'+'+G Z=& & & & & .,r+J%J%J%J%B.B.{&{&{&{&{&{&:!:!e e e e e e 5.5.5.Y.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#P!P!f f f f f f K K K K -~y.y.y.y.y.y.y.y.I:W:{~>~>~>~>~>~>~>~>~X:&~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.Y:o:]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+]+-~Z:D:i~y:B~`_{.{.{.{.`:y.y.y.y.y.y.y.-~-~K K K f f f f f f f P!W#W#W#W#$ $ $ $ x!x!Y.Y.Y.Y.5.5.5.5.e e e e e :!:!{&{&{&{&{&{&B.B.J%J%J%J%J%r+.,& & & & Z=Z=G '+'+'+c c c d&d&d&I@I@I@k k b b b 5'= = m@m@m@-'+'a a a H,H,- - - - f,T+F F F ,,0 ; ; ; l l $+$+$+> > > ]>]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 Q+m m m o.o.C.C.C.7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=-.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X*n.n n r#r#K.K.b+b+< < c+: : : T$#%[ [ [ _ _ _ u%} } } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$R&^ ^ x+x+2 2 C y%] ] ] Z+6@6@6@w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=i=D D t=_.*@*@O=O=6 6 6 {+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+, 5;9 9 9 &.I.^+^+^+]>]>> > > $+$+l l ; ; ; ; 0 ,,F F F T+f,- - - - H,a a a - G'R'Q'Q'Q'*)V!{.{.{.{.{.{.{.{.{.{.=~d&d&c c '+'+'+'+Z=Z=& & & & & .,r+J%J%J%J%B.B.{&{&{&{&{&{&:!:!:!e e e e e 5.5.5.5.Y.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#W#P!f f f f f f f K K K K -~-~y.y.y.y.y. <.<{~{~{~{~{~>~>~>~>~+<@<{.{.{.{.{.{.{.{.{.{.{.{.{.{.Z># > > ]>]>^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 Q+m m m m o.C.C.C.7 7 ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ >$>$U+U+1 / / r$r$`.n.| | ( ( X X X Q%} } d#_ _ _ j+[ [ [ #%: : : c+< < < b+K.K.K.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.t.u.u.M.N.N.N.=+,+,+,+}+5+5+i+q+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b q.n n r#9.K.K.b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ i=D D D t=*@*@*@O=O=6 6 {+{+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 E E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 ,,F F F F f,- - - - H,H,a - i'G'R'Q'Q'Q'V!{.{.{.{.{.{.{.{.{.{.=~d&d&d&c c c '+'+'+G Z=Z=& & & & & .,J%J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!e e e e e e 5.5.5.Y.Y.Y.Y.Y.Y.x!$ $ $ $ W#W#W#W#W#P!P!f f f f f f f K K K K -~-~-~y.=<(~Z!{~{~{~{~{~{~{~{~e~-<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.}];<3~3~3~3~3~3~3~3~;+><;_,<'<) > > ]>^+^+^+^+I.&.9 9 9 5;F+F+F+F+E 8 8 8 Q+' m m m o.C.C.C.7 7 ) ) P.P.{+{+6 6 6 O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < b+b+K.K.r#r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=,+/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;@[ v.n r#r#K.K.b+b+< < < c+: : : #%[ [ [ _ _ _ _ d#} } Q%X X X ( ( | | n.`.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.)+)+~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.P.) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 0 F F F F T+- - - - - H,- i'i'i'G'Q'Q'V!{.{.{.{.{.{.{.{.{.{.=~I@I@d&d&d&c c '+'+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.x!$ $ $ $ $ W#W#W#W#W#P!P!f f f f f f f f K K K K K ~<{<{~{~{~{~{~{~{~{~{~3^)'{.{.{.{.{.{.{.{.{.{.{.{.{.{..>3^=<=<(~]<^ > ]>]>^+^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 Q+' m m m o.C.C.C.7 7 ) ) P.P.P.{+6 6 6 O=*@*@*@_.t=D D i=i=~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+] ] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } d#_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.q.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > q.n n r#9.K.K.b+b+< < c+: : : T$[ [ [ [ _ _ _ u%} } } Q%X X X ( | | | n.`.r$/ / / 1 U+U+>$R&^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D D t=*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 0 ,,F F F T+f,- - - - f,i'i'i'i'G'R'V!{.{.{.{.{.{.{.{.{.{.W!I@I@I@d&d&d&d&c c '+'+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%J%B.B.{&{&{&{&{&{&:!:!:!e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.x!$ $ $ $ $ W#W#W#W#W#W#P!P!f f f f f f f f f K W#;~>~`!`!`!{~{~{~{~{~D:+:0,{.{.{.{.{.{.{.{.{.{.{.{.{.{.z,/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{._ > ]>]>^+^+^+^+I.&.9 9 9 , F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) P.P.P.{+6 6 6 O=O=*@*@*@t=D D D i=~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / r$r$`.n.| | ( ( X X X Q%} } d#_ _ _ _ [ [ [ #%: : : c+< < < b+b+K.K.r#r#n v.q.q.4.H+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t#h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@:$R&^ ^ x+x+2 2 C y%] ] ] Z+6@6@6@w.w.X&X&{ { { )=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+^+]>]>> > $+$+$+l l ; ; ; ; 0 ,,F F F T+f,- - - F i'i'i'i'i'i'V!{.{.{.{.{.{.{.{.{.{.W!k I@I@I@I@d&d&d&c c c '+'+'+'+G Z=Z=& & & & .,r+J%J%J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!e e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ W#W#W#W#W#W#P!P!P!f f f f f f f #~{<`!`!`!`!`!`!`!`!`!< > > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ )+)+g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 / / / r$`.n.| | | ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=H.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 q.v.n r#r#K.K.b+b+< < < c+: : : #%[ [ [ j+_ _ _ d#} } Q%Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$^ ^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+l l ; ; ; ; 0 ,,F F F F f,- - F 8'8'i'i'i'i' ){.{.{.{.{.{.{.{.{.{.i)k k k I@I@I@I@d&d&d&c c c '+'+'+'+G Z=& & & & & .,.,r+J%J%J%J%J%B.B.{&{&{&{&{&{&{&:!:!:!e e e e e e e 5.5.5.5.Y.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ $ W#W#W#W#W#W#W#P!P!P!f f $ 4{>~`!`!`!`!`!`!`!`!&:o]g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.}<$ $ $ $ x!x!Y.Y.Y.Y.Y.Y.5.5.5.5.5.e e e e e e e :!:!{&{&{&{&{&{&{&{&B.B.J%J%J%J%J%r+.,& & & & & Z=Z=G '+'+'+'+c c c d&d&d&I@I@I@I@k k b b b b = = m@m@m@m@-'+'a a a a H,- - - - - T+F F F F 0 0 ; ; ; l l $+$+$+> > > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)={ { { X&X&w.w.6@6@Z+Z+] ] ] y%C 2 2 x+x+^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%} } } d#_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.9.r#r#n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#t#U#q$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=(*g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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H q.q.n n r#9.K.K.b+b+< < c+: : : T$[ [ [ [ _ _ _ u%} } } Q%X X X ( ( | | n.`.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' 8 8 8 8 E F+F+F+F+, 9 9 9 9 I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; 0 0 F F F F T+f,F 8'8'8'i'i'i' ){.{.{.{.{.{.{.{.{.{.i)b b k k k I@I@I@d&d&d&d&c c c '+'+'+'+Z=Z=& & & & & & .,r+J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&:!:!:!e e e e e e e 5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ $ $ W#W#W#W#W#W#W#W#W#@~|< ~`!`!`!`!`!`!`!`!1<;{{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;2 > > ]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } d#_ _ _ _ [ [ [ #%: : : : c+< < b+b+K.K.r#r#n n q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . )=q.v.n r#r#9.K.K.b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X X ( | | n.n.`.r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ i=i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+, 9 9 9 9 I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 ,,F F F T+,,8'8'8'8'8'i' ){.{.{.{.{.{.{.{.{.{.i)b b b b k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & .,r+J%J%J%J%J%J%B.B.{&{&{&{&{&{&{&{&:!:!:!e e e e e e e 5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.x!x!$ $ $ $ $ $ $ $ W#W#W#W#W#3<>~]!]!]!]!]! ~ ~ ~[!u:1_{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.v)4 > > ]>]>^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 Q+' m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] y%C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / / r$`.n.| | | ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < < b+K.K.9.r#n n q.q.4.4.H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f q.q.v.n r#r#K.K.b+b+< < < c+: : : #%[ [ [ j+_ _ _ d#} } } Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ i=i=D D D _.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+, 9 9 9 9 &.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 ,,F F F ; ('8'8'8'8'8' ){.{.{.{.{.{.{.{.{.{.i)= 5'b b b b k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & .,r+J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e 5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.x!x!x!$ $ $ $ $ $ $ $ 5<6<]!]!]!]!]!]!]!]!]!5~6~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.7<$<5.5.5.5.e e e e e e e e :!:!:!{&{&{&{&{&{&{&{&B.B.J%J%J%J%J%J%r+r+.,& & & & & Z=Z=G '+'+'+'+c c c d&d&d&d&I@I@I@I@k k b b b b 5'= m@m@m@m@m@+'a a a a H,H,- - - - f,T+F F F F 0 0 ; ; ; ; l l $+$+$+> > ]>]>]>^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 Q+m m m m o.-+C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$`.n.n.| | ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+K.K.K.r#r#n v.q.q.4.H+H+H+g@`+=.=.<+~+~+~+1+W.W.>@O B o o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=p . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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F=q.q.n n r#9.K.K.b+b+< < c+: : : T$#%[ [ [ _ _ _ _ d#} } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ x+2 2 2 C y%] ] ] Z+Z+6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+, 5;9 9 9 &.I.^+^+^+^+]>]>> > $+$+$+l l l ; ; ; 0 0 F F ; ('('('8'8'8' ){.{.{.{.{.{.{.{.{.{.i)m@= = 5'b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & .,.,r+J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e e 5.5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.x!x!x!x!$ $ $ 8<>~K!K!K!K!K!K!K!K!9 > > ]>]>^+^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 Q+m m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=i=~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+y*] ] ] C C 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X Q%Q%} } d#_ _ _ _ [ [ [ #%: : : : c+< < b+b+K.K.r#r#n n q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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'+q.q.v.n r#r#9.K.K.b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.`.r$r$/ / 1 U+U+U+>$^ ^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&{ { { )=g.g.g.)+)+~ ~ ~ i=D D D t=_.*@*@*@O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+, 5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 ,,; ('('('('8'8' ){.{.{.{.{.{.{.{.{.{.i)m@m@m@= = b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=& & & & & & .,r+J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&:!:!:!e e e e e e e e e e 5.5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.Y.4(R!g!g!g!g!g!g!g!K!a > > ]>]>^+^+^+^+I.&.9 9 9 5;F+F+F+F+E E 8 8 8 Q+m m m m o.-+C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.D D D i=i=~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.w.6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ R&>$U+U+1 1 / / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ [ [ [ [ T$: : : c+< < < b+K.K.9.r#n n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i._ q.q.v.n r#r#K.K.b+b+< < < c+: : : #%[ [ [ j+_ _ _ u%} } } Q%X X X ( | | n.n.`.r$/ / / 1 U+U+>$>$^ ^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&{ { { )=g.g.g.)+)+~ ~ ~ i=D D D t=_.*@*@*@O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m m Q+8 8 8 E E F+F+F+F+5;9 9 9 &.I.I.^+^+^+]>]>> > > $+$+$+l l ; ; ; ; 0 l ('('('('('(' ){.{.{.{.{.{.{.{.{.{.i)m@m@m@m@m@= 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G Z=Z=Z=& & & & & & .,r+J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&:!:!:!:!e e e e e e e e e e e 5.5.5.5.5.5.5.5.5.Y.Y.Y.Y.Y.Y.Y.Y.4<-_A!A!A!A!A!A!t!e > > ]>]>^+^+^+I.I.9 9 9 9 5;F+F+F+F+E E 8 8 8 Q+m m m m o.C.C.C.7 7 ) ) ) P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ )+)+g.g.g.)={ { { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / / r$`.n.| | | ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+1+1+W.>@>@B B o o V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=#=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e>4.q.q.n n r#9.K.K.b+b+< < c+: : : : #%[ [ [ _ _ _ _ d#} } } Q%X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@3 w.w.X&X&{ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.-+o.m m m m Q+8 8 8 E E F+F+F+F+5;9 9 9 9 I.I.^+^+^+]>]>> > > $+$+$+l l l ; ; ; l ,'_'('('('('7!{.{.{.{.{.{.{.{.{.{.i)+'-'m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+G G Z=Z=& & & & & & .,r+r+J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!e e e e e e e e e e e e 5.5.5.5.5.5.5.5.5.5.5.5.Q!i > > ]>]>]>^+^+^+I.I.9 9 9 9 , F+F+F+F+E E 8 8 8 Q+m m m o.o.C.C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ )+)+g.g.g.)={ { { X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$>$U+U+1 [@/ / r$`.n.n.| | ( ( X X Q%} } } d#_ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+Q.1+W.>@>@O B o o @V m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_@X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h n$R&^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.o.o.m m m Q+8 8 8 8 E F+F+F+F+, 9 9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+l l ; ; $+$','_'('('('~!{.{.{.{.{.{.{.{.{.{.i)a a +'-'m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c '+'+'+'+'+G Z=Z=Z=& & & & & & .,r+r+J%J%J%J%J%J%J%B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!e e e e e e e e e e e e e e e e 5.5.5.5.5.o > > ]>]>^+^+^+^+I.&.9 9 9 9 , F+F+F+F+E 8 8 8 8 ' m m m o.o.C.C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { X&X&w.w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+K.K.9.r#n n v.q.q.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o o V m.m.m. +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=^ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ' 4.q.q.v.n r#r#K.K.b+b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.`.r$r$/ / [@1 U+U+>$R&^ ^ x+x+2 2 C C ] ] ] y*Z+6@6@3 w.w.X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.) ) ) 7 7 C.C.C.o.o.m m m ' 8 8 8 8 E F+F+F+F+, 5;9 9 9 &.I.^+^+^+^+]>]>> > > $+$+$+l l ; $+$'$',','_'('~!{.{.{.{.{.{.{.{.{.{.i)a a a a -'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&c c c c '+'+'+'+G G Z=Z=& & & & & & & .,r+r+J%J%J%J%J%J%J%J%B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!:!e e e e e e e e e e e e e e e e .,r > > ]>]>^+^+^+^+I.&.9 9 9 5;, F+F+F+F+E 8 8 8 8 ' m m m o.o.C.C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+b+K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+~+~+~+Q.1+W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%6%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p=4.4.q.q.n n r#9.K.K.b+b+< < c+c+: : : #%[ [ [ j+_ _ _ d#} } } Q%X X X ( | | | n.`.r$/ / / 1 U+U+U+>$^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.P.) ) 7 7 C.C.C.o.o.m m m ' 8 8 8 8 E F+F+F+F+, 5;9 9 9 &.I.I.^+^+^+]>]>> > > $+$+$+$+l > $'$'$'$','_'~!{.{.{.{.{.{.{.{.{.{.i)H,a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&d&c c c '+'+'+'+'+G Z=Z=Z=& & & & & & & .,.,r+J%J%J%J%J%J%J%J%J%B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!:!:!:!e e e e e e e e e e O);_h!h!1 > > ]>]>]>^+^+^+I.I.&.9 9 9 5;F+F+F+F+F+E 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&w.w.3 6@6@Z+y*] ] ] C C 2 2 x+x+^ ^ ^ >$U+U+1 1 / / r$r$`.n.| | | ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : c+c+< < b+b+K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+Q.1+W.W.>@O B o o @V m.m. + +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ~ 4.q.q.v.n n r#9.K.K.b+< < < c+: : : T$#%[ [ [ _ _ _ _ d#} } } Q%X X ( ( | | n.n.`.r$/ / / 1 U+U+U+>$^ ^ ^ x+2 2 2 C y%] ] ] Z+Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.P.) ) 7 7 C.C.C.-+o.m m m ' Q+8 8 8 E F+F+F+F+F+5;9 9 9 9 I.I.^+^+^+^+]>]>> > > $+$+$+> (,$'$'$'$','-!{.{.{.{.{.{.{.{.{.{.i)- H,H,a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+G Z=Z=Z=& & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&:!:!:!:!:!:!:!:!:!:!d v > > ]>]>^+^+^+^+I.I.9 9 9 9 5;F+F+F+F+E E 8 8 8 Q+' m m m o.-+C.C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$U+U+U+1 / / / r$`.n.n.| | ( ( X X Q%} } } d#_ _ _ _ [ [ [ #%: : : : c+< < < b+K.K.9.r#n n v.q.q.4.H+H+H+`+`+=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # G+4.q.q.v.n r#r#K.K.K.b+< < < c+: : : T$[ [ [ [ _ _ _ u%d#} } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$>$^ ^ ^ x+2 2 2 C y%] ] ] Z+Z+6@6@3 w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.P.) ) 7 7 C.C.C.-+o.m m m ' Q+8 8 8 E E F+F+F+F+, 9 9 9 9 &.I.^+^+^+^+]>]>> > > $+$+]>(,(,(,$'$'$']){.{.{.{.{.{.{.{.{.{.i)- - - H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k I@I@I@I@I@d&d&d&d&d&c c c '+'+'+'+'+'+G Z=Z=Z=& & & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&O)z > > ]>]>^+^+^+^+I.&.9 9 9 9 , F+F+F+F+E E 8 8 8 Q+' m m m o.-+C.C.C.7 7 ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.3 6@6@Z+Z+] ] ] y%C 2 2 2 x+^ ^ ^ >$>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } d#u%_ _ _ [ [ [ [ T$: : : c+< < < b+K.K.K.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@B B o o @V m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q q r r t u u v w x x y z S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=D.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g.G+4.q.q.n n r#r#K.K.b+b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.-+o.m m m m Q+8 8 8 8 E F+F+F+F+, 5;9 9 9 &.I.I.^+^+^+]>]>]>> > > ]>R,R,(,(,$'$']){.{.{.{.{.{.{.{.{.{.i)- - - - H,H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b k k k k I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+'+G Z=Z=Z=& & & & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&{&D > > ]>]>]>^+^+^+I.I.&.9 9 9 5;, F+F+F+F+E 8 8 8 8 Q+m m m m o.-+C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ T$: : : c+< < < b+b+K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j H+4.q.q.q.n n r#9.K.K.b+b+< < c+: : : : #%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.`.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.-+o.m m m m ' 8 8 8 8 E F+F+F+F+F+5;9 9 9 9 I.I.^+^+^+^+]>]>> > ^+R,R,R,(,(,(,]){.{.{.{.{.{.{.{.{.{.i)f,- - - - - H,H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b b k k k I@I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+'+G G Z=Z=Z=& & & & & & & & & .,.,r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.B.B.B.B.{&{&{&{&{&{&{&{&{&{&G > > ]>]>^+^+^+^+I.I.9 9 9 9 5;F+F+F+F+F+E 8 8 8 8 ' m m m m o.-+C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.w.6@6@6@Z+] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$`.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < b+b+K.K.9.r#n n v.q.q.4.H+H+H+`+`+=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ~ G+4.q.q.v.n r#r#9.K.K.b+< < < c+: : : T$#%[ [ [ _ _ _ _ d#} } } Q%X X X ( | | | n.`.r$r$/ / 1 1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.o.o.m m m ' Q+8 8 8 E E F+F+F+F+, 9 9 9 9 &.I.^+^+^+^+]>]>]>^+x,x,R,R,R,(,h){.{.{.{.{.{.{.{.{.{.i)F T+- - - - - - H,H,a a a a a +'-'m@m@m@m@m@= = 5'b b b b b k k k k I@I@I@I@I@d&d&d&d&d&c c c c '+'+'+'+'+'+'+G Z=Z=Z=Z=& & & & & & & & & & .,.,r+r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%B.B.B.B.B.B.B.B.B.K<]!A!R)L<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.0,M > > ]>]>]>^+^+^+^+I.&.9 9 9 9 , F+F+F+F+F+E 8 8 8 8 ' m m m o.o.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { +=X&X&w.w.6@6@6@Z+y*] ] ] C 2 2 2 x+^ ^ ^ R&>$U+U+1 1 / / r$r$`.n.| | | ( X X X Q%} } } d#_ _ _ _ [ [ [ #%T$: : : c+< < < b+K.K.9.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+Q.1+W.>@>@O B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (.H+G+4.q.q.n n r#r#K.K.b+b+< < < c+: : : T$[ [ [ [ _ _ _ _ d#} } Q%Q%X X ( ( | | n.n.`.r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C ] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.o.o.m m m ' Q+8 8 8 E E F+F+F+F+, 5;9 9 9 9 I.I.^+^+^+^+]>I.x,x,x,R,R,R,h){.{.{.{.{.{.{.{.{.{.i)F F T+f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@= = = 5'b b b b k k k k I@I@I@I@I@d&d&d&d&d&d&c c c c c '+'+'+'+'+'+G G Z=Z=Z=Z=& & & & & & & & & & & & .,.,r+r+r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%J%N<]!]!]!A~J;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.(;O<'+'+'+'+c c c c d&d&d&d&d&d&I@I@I@I@I@k k k k b b b b 5'= = = m@m@m@m@m@-'+'a a a a a H,H,- - - - - - f,T+F F F F ,,0 0 ; ; ; ; l l $+$+$+$+> > > ]>]>^+^+^+^+I.I.&.9 9 9 5;, F+F+F+F+E E 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) ) P.P.{+{+6 6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.6@6@6@Z+y*] ] ] C 2 2 2 x+x+^ ^ R&>$U+U+U+1 / / / r$`.n.n.| | ( ( X X Q%Q%} } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o o V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=1+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D H+4.q.q.q.n n r#9.K.K.b+b+< < < c+: : : T$[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.`.r$/ / / 1 U+U+U+>$^ ^ ^ x+x+2 2 2 C ] ] ] y*Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@O=P=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.-+o.m m m m Q+8 8 8 8 E F+F+F+F+F+5;9 9 9 9 &.I.^+^+^+^+I.o,o,x,x,x,R,h){.{.{.{.{.{.{.{.{.{.i)F F F F T+f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@m@= = 5'b b b b b k k k k I@I@I@I@I@d&d&d&d&d&d&c c c c c '+'+'+'+'+'+'+G G Z=Z=Z=Z=Z=& & & & & & & & & & & & & .,.,.,.,r+r+r+r+r+J%J%J%J%J%J%J%J%J%J%J%J%J%P<]!]!]!Q<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.h{R > > ]>]>]>^+^+^+^+I.&.9 9 9 9 5;F+F+F+F+F+E 8 8 8 8 Q+m m m m o.-+C.C.C.7 7 ) ) ) P.P.{+{+6 6 6 P=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.6@6@6@Z+y*] ] ] C C 2 2 x+x+^ ^ ^ >$U+U+U+1 / / / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : c+< < < b+b+K.K.9.r#n n q.q.q.4.H+H+H+`+`+=.=.<+~+~+~+1+1+W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H H+H+4.q.q.v.n n r#9.K.K.b+b+< < c+: : : : #%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+U+>$^ ^ ^ x+2 2 2 C C ] ] ] y*Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) 7 7 C.C.C.-+o.m m m m ' 8 8 8 8 E F+F+F+F+F+, 5;9 9 9 &.I.I.^+^+9 6,o,o,x,x,x,h){.{.{.{.{.{.{.{.{.{.i)0 ,,F F F F T+f,- - - - - - H,H,a a a a a +'-'m@m@m@m@m@m@= = 5'5'b b b b b k k k k I@I@I@I@I@d&d&d&d&d&d&d&c c c c c '+'+'+'+'+'+'+'+G G Z=Z=Z=Z=Z=& & & & & & & & & & & & & & & & & & .,.,.,.,.,.,.,.,.,.,r+r+S<]!]!]!T<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.C!@@d&d&d&d&d&d&I@I@I@I@I@k k k k b b b b b 5'5'= = m@m@m@m@m@m@-'+'a a a a a H,H,- - - - - - f,T+F F F F F 0 0 ; ; ; ; ; l l $+$+$+$+> > > ]>]>^+^+^+^+I.I.&.9 9 9 9 , F+F+F+F+F+E 8 8 8 8 ' m m m m o.-+C.C.C.7 7 ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] C C 2 2 2 x+^ ^ ^ >$>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < < b+K.K.9.r#r#n v.q.q.4.G+H+H+g@`+=.=.<+<+~+~+Q.1+W.>@>@O B o o @V m.m. + +y+y+y+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _.H+G+4.q.q.v.n r#r#K.K.K.b+< < < c+: : : : #%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$>$^ ^ ^ x+2 2 2 C C ] ] ] y*Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.-+o.o.m m m ' Q+8 8 8 E E F+F+F+F+, 5;9 9 9 9 &.I.^+9 6,6,o,o,o,x,W'{.{.{.{.{.{.{.{.{.{.X'; 0 ,,F F F F F T+f,- - - - - - H,H,a a a a a +'+'-'m@m@m@m@m@m@= = 5'b b b b b b k k k k I@I@I@I@I@I@d&d&d&d&d&d&c c c c c c '+'+'+'+'+'+'+'+'+G G G Z=Z=Z=Z=Z=Z=& & & & & & & & & & & & & & & & & & & & & & & C<]!]!]!U<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.V > > ]>]>]>^+^+^+^+I.&.9 9 9 9 5;, F+F+F+F+E E 8 8 8 Q+' m m m o.o.-+C.C.7 7 7 ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ >$>$U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ #%T$: : : c+< < < b+K.K.K.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.#+#+#+#+3.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g 4.H+G+4.q.q.n n r#r#K.K.b+b+< < < c+: : : T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | n.n.r$r$/ / [@1 U+U+>$>$^ ^ ^ x+2 2 2 C C ] ] ] y*Z+6@6@6@w.w.X&X&{ { { )=)=g.g.g.)+~ ~ ~ ~ i=i=D D D _.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.o.o.m m m m Q+8 8 8 8 E F+F+F+F+F+, 9 9 9 9 &.I.5;6,6,6,6,o,o,W'{.{.{.{.{.{.{.{.{.{.X'; ; 0 0 ,,F F F F F T+f,- - - - - - H,H,a a a a a a +'-'m@m@m@m@m@m@= = = 5'b b b b b k k k k k I@I@I@I@I@I@d&d&d&d&d&d&d&c c c c c c c '+'+'+'+'+'+'+'+'+'+G G G Z=Z=Z=Z=Z=Z=Z=Z=Z=& & & & & & & & & & & & & & '+W<]!]!]!c>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-X > > > ]>]>^+^+^+^+I.I.&.9 9 9 9 5;F+F+F+F+F+E 8 8 8 8 Q+' m m m o.o.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$`.n.| | | ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.r#r#n n q.q.4.4.H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o V V m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=G+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P=H+H+4.q.q.q.n n r#9.K.K.b+b+< < < c+: : : T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( | | | n.`.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C C ] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+~ ~ ~ ~ i=i=D D D t=*@*@*@*@O=P=6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' 8 8 8 8 E E F+F+F+F+, 5;9 9 9 9 , 6,6,6,6,6,o,W'{.{.{.{.{.{.{.{.{.{.X'; ; ; ; 0 0 ,,F F F F F T+f,- - - - - - H,H,H,a a a a a +'-'-'m@m@m@m@m@m@= = = 5'b b b b b b k k k k I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&c c c c c c c '+'+'+'+'+'+'+'+'+'+'+'+'+G G G G G Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Z=Y<]!]!]!Z<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.|~` > > ]>]>]>^+^+^+^+I.&.9 9 9 9 5;, F+F+F+F+E E 8 8 8 8 Q+m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 P=O=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 [@/ / r$r$`.n.| | | ( ( X X Q%Q%} } d#u%_ _ _ j+[ [ [ T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.H+H+H+g@`+=.=.<+<+~+~+Q.1+W.>@>@O B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.Q R R R q r r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d+q.H+H+4.q.q.v.n n r#9.K.K.b+b+< < c+c+: : : #%[ [ [ j+_ _ _ u%d#} } Q%Q%X X ( ( | | | n.`.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+)+~ ~ ~ i=i=D D D t=*@*@*@*@O=P=6 6 6 {+{+P.P.) ) ) 7 7 C.C.C.-+o.o.m m m ' Q+8 8 8 8 E F+F+F+F+F+, 9 9 9 F+7,6,6,6,6,6,W'{.{.{.{.{.{.{.{.{.{.X'l ; ; ; ; ; 0 0 ,,F F F F F T+f,- - - - - - - H,H,a a a a a a +'-'m@m@m@m@m@m@m@= = 5'5'b b b b b b k k k k k I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&c c c c c c c c c '+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+G G G []!]!]!.~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.c!.[b b b b b b 5'5'= = m@m@m@m@m@m@m@-'+'a a a a a a H,H,H,- - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l $+$+$+$+> > > > ]>]>^+^+^+^+I.I.&.9 9 9 9 5;F+F+F+F+F+E E 8 8 8 Q+' m m m m o.-+C.C.C.7 7 ) ) ) P.P.{+{+{+6 6 P=O=*@*@*@*@t=D D D i=i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 1 / / r$r$`.n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < < b+K.K.9.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R q q r r t u u v v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {+H+H+G+4.q.q.v.n r#r#9.K.K.b+< < < c+: : : : #%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.`.r$r$/ / [@1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.o.o.m m m m Q+8 8 8 8 E E F+F+F+F+, 5;9 F+_,_,7,6,6,6,W'{.{.{.{.{.{.{.{.{.{.X'$+l l ; ; ; ; ; 0 0 ,,F F F F F T+f,- - - - - - - H,H,a a a a a a +'+'-'m@m@m@m@m@m@m@= = = 5'b b b b b b k k k k k k I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&c c c c c c c c c c c '+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'++[]!]!]!@[/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.#[b b b 5'5'= = = m@m@m@m@m@m@-'-'+'a a a a a a H,H,- - - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+> > > > ]>]>^+^+^+^+^+I.&.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+' m m m o.o.-+C.C.7 7 7 ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@t=D D D i=i=~ ~ ~ ~ )+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+1 1 / / / r$`.n.n.| | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < < b+K.K.K.r#r#n n q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o V V m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r s t u u v w x y y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=(*j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M+q.H+H+G+4.q.q.n n r#r#K.K.K.b+< < < c+: : : : #%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.`.r$/ / / 1 1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D t=_.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 E E F+F+F+F+F+, F+_,_,_,_,6,6,W'{.{.{.{.{.{.{.{.{.{.X'$+$+l l l ; ; ; ; ; 0 0 ,,F F F F F T+f,f,- - - - - - H,H,H,a a a a a a +'-'-'m@m@m@m@m@m@m@= = = 5'b b b b b b b k k k k k k I@I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&d&d&d&c c c c c c c c c c c c c c c c c c c c c $[]!]!]!Q<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.%[= = = m@m@m@m@m@m@m@-'-'+'a a a a a a H,H,H,- - - - - - - f,T+F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+$+> > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;F+F+F+F+F+E E 8 8 8 8 ' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@_.t=D D D i=i=~ ~ ~ )+)+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 / / / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.r#r#n n q.q.q.4.H+H+H+`+`+=.=.<+~+~+~+Q.1+W.>@>@B B o o @V m.m.m. +y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u v w x x y z S T T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=< . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ) H+H+H+4.q.q.q.n n r#r#K.K.b+b+< < < c+: : : T$#%[ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | n.n.`.r$/ / / 1 1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.o.m m m ' Q+8 8 8 8 E F+F+F+F+F+E ),_,_,_,_,7,N'{.{.{.{.{.{.{.{.{.{.U>> $+$+$+l l l ; ; ; ; ; 0 0 ,,F F F F F F T+f,- - - - - - - H,H,a a a a a a a +'-'-'m@m@m@m@m@m@m@= = = 5'5'b b b b b b b k k k k k k k I@I@I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&c c c c c c c c &[]!]!]!T<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{,*[m@m@m@m@m@m@m@-'+'a a a a a a a H,H,- - - - - - - f,T+T+F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+$+> > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.t=D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 / / / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.H+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9*a+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+4.H+H+H+4.q.q.v.n n r#9.K.K.b+b+< < < c+: : : T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | n.n.`.r$/ / / 1 1 U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=D D D D _.*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' 8 8 8 8 E E F+F+F+8 h>X>),_,_,_,A,{.{.{.{.{.{.{.{.{.{.U>> > $+$+$+$+l l l ; ; ; ; ; 0 0 ,,F F F F F F T+f,- - - - - - - - H,H,a a a a a a a +'-'-'m@m@m@m@m@m@m@m@= = = 5'5'b b b b b b b b k k k k k k k I@I@I@I@I@I@I@I@I@I@I@I@I@I@d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&d&=[]!]!]!U<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.F<-[m@m@-'-'+'a a a a a a a H,H,H,- - - - - - - f,T+F F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>^+^+^+^+^+I.I.9 9 9 9 9 , F+F+F+F+F+E E 8 8 8 8 Q+m m m m o.o.C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.D D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { +=X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+c+< < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.Q R R R q q r r t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 g@H+H+G+4.q.q.v.n r#r#9.K.K.b+b+< < c+c+: : : T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=i=D D D t=*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 8 E E F+8 h>h>h>),_,_,A,{.{.{.{.{.{.{.{.{.{.U>> > > > $+$+$+$+l l l ; ; ; ; ; 0 0 0 ,,F F F F F T+T+f,- - - - - - - H,H,H,a a a a a a a +'+'-'m@m@m@m@m@m@m@m@= = = = 5'5'b b b b b b b b b k k k k k k k k k I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@k >~]!]!]!(<{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.;[>[+'a a a a a a a H,H,H,- - - - - - - - f,T+F F F F F F ,,0 0 ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E 8 8 8 8 Q+' m m m m o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$n.n.| | | ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%: : : : c+< < < b+K.K.K.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.>@>@B B o o @V m.m. + +y+y+y+l+l+l+l+:.:.:.:.#+#+#+3.3.0.0..+R.p p r.r.k.a.a.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ j@H+H+H+G+4.q.q.v.n r#r#K.K.K.b+< < < c+: : : : #%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@O=O=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.o.o.m m m m ' 8 8 8 8 E E 8 h>h>h>h>X>),A,{.{.{.{.{.{.{.{.{.{.U>]>]>> > > > $+$+$+$+l l l ; ; ; ; ; ; 0 0 ,,F F F F F F T+f,- - - - - - - - H,H,H,a a a a a a a +'+'-'-'m@m@m@m@m@m@m@m@m@= = = = 5'5'b b b b b b b b b b k k k k k k k k k k k k I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@I@,[]!]!]!T!{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.'[a a a a a H,H,H,- - - - - - - - f,T+F F F F F F ,,0 0 0 ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+m m m m o.o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.3 6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.| | | ( X X X Q%Q%} } } u%_ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.<+~+~+~+Q.1+W.W.>@O B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.<.[.[.-.-.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E `+H+H+H+4.4.q.q.n n r#r#K.K.K.b+< < < c+: : : : #%[ [ [ j+_ _ _ u%d#} } } Q%X X X ( ( | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.)+~ ~ ~ ~ ~ i=D D D t=_.*@*@*@O=O=P=6 6 {+{+{+P.P.P.) ) ) 7 7 C.C.C.-+o.m m m m ' Q+8 8 8 8 ' y>h>h>h>h>h>='{.{.{.{.{.{.{.{.{.{.U>^+]>]>]>> > > > $+$+$+$+l l l ; ; ; ; ; ; 0 0 ,,F F F F F F T+T+f,- - - - - - - - H,H,H,a a a a a a a a +'+'-'m@m@m@m@m@m@m@m@m@m@= = = = = 5'5'b b b b b b b b b b b b b b k k k k k k k k k k k k k k k k k k k k k )[]!]!]!![{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.~[a H,H,H,- - - - - - - - f,f,T+F F F F F F ,,0 0 ; ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.&.9 9 9 9 9 5;F+F+F+F+F+F+E 8 8 8 8 Q+' m m m m o.o.C.C.C.7 7 7 ) ) ) P.P.P.{+{+6 6 6 O=O=*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.| | | ( ( X X X Q%} } } u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.H+H+H+g@`+=.=.=.<+~+~+Q.1+W.W.>@O B B o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8$J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I ;#g@H+H+H+4.q.q.q.n n r#r#K.K.b+b+< < < c+: : : : #%[ [ [ j+_ _ _ u%d#} } Q%Q%X X X ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C C ] ] ] y*Z+6@6@6@3 w.w.X&X&{ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D _.*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.o.m m m m ' Q+8 8 m y>y>h>h>h>h>='{.{.{.{.{.{.{.{.{.{.U>^+^+^+]>]>]>> > > > $+$+$+$+l l l l ; ; ; ; ; 0 0 0 ,,F F F F F F T+f,f,- - - - - - - - H,H,H,a a a a a a a a a +'-'-'m@m@m@m@m@m@m@m@m@m@m@= = = = = = 5'5'5'b b b b b b b b b b b b b b b b b b b b b b k k k k k k {[]!]!]!@[/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.J;J,- - - - - - - - - f,T+F F F F F F ,,,,0 0 ; ; ; ; ; ; l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.I.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+m m m m o.o.-+C.C.C.7 7 ) ) ) P.P.P.{+{+{+6 6 P=O=O=*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.| | | ( ( X X X Q%} } } u%_ _ _ _ [ [ [ [ T$: : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x y y S S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=+=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m@`+g@H+H+G+4.q.q.v.n n r#9.K.K.b+b+< < < c+: : : T$#%[ [ [ j+_ _ _ u%} } } Q%Q%X X X ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C C ] ] ] y*Z+6@6@6@3 w.w.X&X&{ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=D D D D t=*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.m m m m ' Q+8 m y>y>y>y>h>h>='{.{.{.{.{.{.{.{.{.{.U>^+^+^+^+^+]>]>]>> > > > $+$+$+$+$+l l l ; ; ; ; ; ; 0 0 ,,F F F F F F F T+f,f,- - - - - - - - - H,H,H,a a a a a a a a a +'+'-'-'m@m@m@m@m@m@m@m@m@m@m@m@= = = = = = = 5'5'5'5'5'b b b b b b b b b b b b b b b b b b b b ][]!]!]!^[{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.0;/[- - - - - f,T+F F F F F F F ,,0 0 0 ; ; ; ; ; l l l l $+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.C.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ ~ )+g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : c+c+< < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q r r r t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=N.;@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.| `+H+H+H+G+4.q.q.v.n r#r#9.K.K.b+b+< < < c+: : : T$[ [ [ [ j+_ _ _ u%} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 C C ] ] ] ] Z+Z+6@6@3 w.w.X&X&{ { { )=)=g.g.g.g.)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@O=O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 C.C.C.-+o.o.m m m m ' o.y>y>y>y>y>y>='{.{.{.{.{.{.{.{.{.{.U>I.I.^+^+^+^+^+]>]>]>> > > > > $+$+$+$+l l l ; ; ; ; ; ; 0 0 0 ,,F F F F F F F T+f,f,- - - - - - - - - H,H,H,H,a a a a a a a a a +'+'+'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@= = = = = = = = = = = 5'5'5'5'5'5'5'5'5'5'5'5'5'([]!]!]!j~{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.a'>[- f,T+T+F F F F F F ,,,,0 0 ; ; ; ; ; ; l l l $+$+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 5;, F+F+F+F+F+F+E 8 8 8 8 8 ' m m m m o.o.-+C.C.C.7 7 ) ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ T$: : : : c+< < < b+K.K.K.r#r#n n q.q.4.4.H+H+H+`+`+=.=.<+~+~+~+Q.1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r t t u u v w x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=$+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $ =.`+H+H+H+G+4.q.q.v.n r#r#9.K.K.b+b+< < < c+: : : T$[ [ [ [ _ _ _ _ u%} } } Q%X X X ( ( | | | n.n.r$r$/ / [@1 U+U+U+>$R&^ ^ ^ x+2 2 2 C C ] ] ] ] Z+Z+6@6@3 w.w.X&X&+={ { )=)=g.g.g.g.)+~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.m m m m C.z>y>y>y>y>y>='{.{.{.{.{.{.{.{.{.{.U>9 &.I.I.^+^+^+^+^+]>]>]>]>> > > > $+$+$+$+l l l l ; ; ; ; ; ; 0 0 0 ,,F F F F F F F T+f,f,- - - - - - - - - - H,H,H,H,a a a a a a a a a a +'+'+'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@= = = = = = = = = = = _[]!]!]!:[{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.<[F F F F F F F ,,,,0 0 ; ; ; ; ; ; ; l l l $+$+$+$+$+> > > > ]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.C.C.C.C.7 7 ) ) ) P.P.P.{+{+6 6 6 P=O=O=*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ [ [ [ [ #%: : : : c+< < < b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@O B B o o V V m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+3.3.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=r.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . { `+g@H+H+H+4.4.q.q.n n r#r#K.K.K.b+< < < c+c+: : : T$[ [ [ [ _ _ _ _ u%} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 2 C ] ] ] ] Z+Z+6@6@3 w.w.X&X&+={ { { )=)=g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=*@*@*@*@O=O=6 6 6 {+{+{+P.P.P.) ) ) 7 7 C.C.C.C.o.o.m m C.i>z>y>y>y>y>Q,{.{.{.{.{.{.{.{.{.{.U>9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>> > > > $+$+$+$+$+l l l ; ; ; ; ; ; ; 0 0 ,,,,F F F F F F F T+T+f,- - - - - - - - - - - H,H,H,H,a a a a a a a a a a a a a +'+'+'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@+'>~]!]!]![[[<}[i,{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.|[F F F F ,,0 0 0 ; ; ; ; ; ; l l l l $+$+$+$+> > > > > ]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 ) ) ) ) P.P.P.{+{+6 6 6 P=O=*@*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+g.g.g.g.)=)={ { { X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#_ _ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q q r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=Y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D+H+`+g@H+H+H+4.q.q.q.n n r#r#K.K.K.b+< < < c+: : : : T$[ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@O=O=P=6 6 6 {+{+P.P.P.) ) ) 7 7 7 C.C.C.-+o.o.C.i>i>i>z>y>y>Q,{.{.{.{.{.{.{.{.{.{.U>5;9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>> > > > > $+$+$+$+l l l l ; ; ; ; ; ; ; 0 0 ,,,,F F F F F F F F T+f,f,- - - - - - - - - - - H,H,H,H,H,a a a a a a a a a a a a a a a +'+'+'+'-'-'-'-'-'-'m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@m@1[2[ ~]!]!]!]!3[+<4[c>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.=^o',,0 0 0 ; ; ; ; ; ; l l l l $+$+$+$+$+> > > > ]>]>]>]>^+^+^+^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+E E 8 8 8 8 8 Q+m m m m m o.-+C.C.C.C.7 7 ) ) ) P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@_.D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { +=X&X&w.w.3 6@6@6@Z+y*] ] ] C C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y S S T T >.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 =.`+g@H+H+H+4.q.q.q.n n r#r#K.K.b+b+< < < c+: : : : #%[ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=P=6 6 6 {+{+{+P.P.P.) ) ) 7 7 C.C.C.C.-+7 i>i>i>i>i>z>Q,{.{.{.{.{.{.{.{.{.{.U>F+5;9 9 9 9 9 &.&.I.I.^+^+^+^+^+]>]>]>> > > > > $+$+$+$+$+l l l l ; ; ; ; ; ; ; 0 0 0 ,,F F F F F F F F T+T+f,f,- - - - - - - - - - - - - H,H,H,H,H,a a a a a a a a a a a a a a a a a a a a a +'+'+'+'+'+'+'+'+'+'+'+'+'+'+'+'- 5[q!z!]!]!]!]!]!6[7[8[s^{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.(<9[; ; ; ; ; ; ; l l l l $+$+$+$+> > > > > ]>]>]>^+^+^+^+^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+F+E 8 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 ) ) ) ) P.P.P.{+{+6 6 6 P=O=O=*@*@*@_.t=D D D D i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { +=X&X&w.w.3 6@6@Z+Z+] ] ] ] C C 2 2 2 x+^ ^ ^ ^ >$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B o o o V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.-.Q R R R q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8$M+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I < =.`+g@H+H+G+4.q.q.v.n n r#9.K.K.b+b+< < < c+: : : : #%[ [ [ [ _ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 U+U+U+>$R&^ ^ ^ x+x+2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&{ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=*@*@*@*@O=O=P=6 6 6 {+{+P.P.P.) ) ) ) 7 7 C.C.C.F,0>0>i>i>i>i>G,{.{.{.{.{.{.{.{.{.{.U>F+F+, 5;9 9 9 9 9 9 &.I.I.^+^+^+^+^+]>]>]>]>> > > > > $+$+$+$+$+l l l l ; ; ; ; ; ; ; 0 0 0 ,,F F F F F F F F F T+T+f,f,- - - - - - - - - - - - - - - H,H,H,H,H,H,a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a 0[a[ > > > > ]>]>]>^+^+^+^+^+^+I.I.&.9 9 9 9 9 5;, F+F+F+F+F+F+E E 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@_.t=D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)={ { { +=X&X&w.w.3 6@6@Z+Z+] ] ] ] C C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } d#u%_ _ _ j+[ [ [ #%T$: : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.4.H+H+H+g@`+=.=.<+<+~+~+Q.1+W.W.>@O B B o o V V m.m. +y+y+y+y+l+l+l+l+:.:.:.:.#+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q q r r t u u v v w x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=X&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -'=.=.`+H+H+H+G+4.q.q.v.n n r#9.K.K.b+b+< < < c+: : : : #%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 1 U+U+>$R&^ ^ ^ x+x+2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { )=)=)=g.g.g.)+)+~ ~ ~ ~ i=i=D D D t=_.*@*@*@*@O=P=6 6 6 {+{+{+P.P.P.) ) ) 7 7 7 C.) |>0>0>0>i>i>j;{.{.{.{.{.{.{.{.{.{.U>F+F+F+F+F+, 5;9 9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>> > > > > $+$+$+$+$+l l l l l ; ; ; ; ; ; ; 0 0 0 ,,,,F F F F F F F F F F T+T+f,f,- - - - - - - - - - - - - - - - - H,H,H,H,H,H,H,H,H,a a a a a a a a a a a a a a a a a a a a a a a a a a a - g[h[z)]!]!]!]!]!i[j[k[Z>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.l[l l l l $+$+$+$+$+> > > > > ]>]>]>]>^+^+^+^+^+I.I.I.&.9 9 9 9 9 5;, F+F+F+F+F+F+E E 8 8 8 8 Q+' m m m m m o.-+C.C.C.C.7 7 ) ) ) ) P.P.P.{+{+6 6 6 P=O=O=*@*@*@*@t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.6@6@6@Z+y*] ] ] ] C C 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%} } } } u%_ _ _ j+[ [ [ [ T$: : : c+c+< < b+b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x y y z S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==+X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.I&=.`+`+H+H+H+G+4.q.q.v.n r#r#9.K.K.b+b+< < < c+: : : : #%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 1 U+U+>$>$^ ^ ^ x+x+2 2 2 C y%] ] ] y*Z+Z+6@6@3 w.w.X&X&+={ { { )=)=g.g.g.)+)+~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=6 6 6 6 {+{+P.P.P.) ) ) ) 7 7 ) |>|>|>0>0>i>j;{.{.{.{.{.{.{.{.{.{.U>E F+F+F+F+F+F+, 5;9 9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>]>> > > > > $+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; 0 0 0 ,,,,F F F F F F F F F F T+T+T+f,f,- - - - - - - - - - - - - - - - - - - - - - - H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,H,- - O'm[n[#!]!]!]!]!t!L!G!2]g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.o[$+$+$+$+$+$+> > > > > ]>]>]>^+^+^+^+^+^+I.I.&.9 9 9 9 9 9 5;, F+F+F+F+F+F+E E 8 8 8 8 8 Q+m m m m m o.o.-+C.C.C.7 7 7 ) ) ) P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { X&X&w.w.w.6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ j+[ [ [ [ T$: : : c+c+< < < b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+1+1+W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.-.Q R R R q r r s t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $ =.=.`+g@H+H+H+4.4.q.q.v.n r#r#9.K.K.b+b+< < < c+: : : : #%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 1 U+U+>$>$^ ^ ^ ^ x+2 2 2 C C ] ] ] ] Z+Z+6@6@6@w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=P=6 6 6 {+{+{+P.P.P.) ) ) 7 P.};|>|>|>|>0>j;{.{.{.{.{.{.{.{.{.{.U>8 E E F+F+F+F+F+F+, 5;9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+]>]>]>> > > > > > $+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; ; 0 0 0 ,,,,F F F F F F F F F F F F T+T+T+f,f,f,- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - p[q[r[s[]!]!]!]!]!t[u[/{R-{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;7'$+$+> > > > > ]>]>]>]>^+^+^+^+^+^+I.I.&.9 9 9 9 9 9 5;, F+F+F+F+F+F+E E 8 8 8 8 8 Q+' m m m m o.o.-+C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+6 6 6 6 O=O=*@*@*@*@_.D D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)=)={ { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ T$: : : : c+< < < b+b+K.K.r#r#n n v.q.q.4.G+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q q r r t u u u v w x y y S S T T ,.,.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=k.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . { =.=.`+g@H+H+H+4.4.q.q.n n r#r#9.K.K.b+b+< < < c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / 1 1 U+U+>$>$^ ^ ^ ^ x+2 2 2 C C ] ] ] ] y*Z+6@6@6@w.w.w.X&X&{ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=P=6 6 6 {+{+P.P.P.P.) ) {+};};};|>|>|>j;{.{.{.{.{.{.{.{.{.{.U>8 8 8 E E F+F+F+F+F+F+, 5;9 9 9 9 9 9 &.I.I.^+^+^+^+^+^+]>]>]>]>> > > > > > $+$+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; ; 0 0 0 0 ,,,,F F F F F F F F F F F F F T+T+T+T+f,f,f,f,- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - f,e!v[w[;_]!]!]!]!K!,4=> > > ]>]>]>]>^+^+^+^+^+^+I.I.I.&.9 9 9 9 9 5;5;, F+F+F+F+F+F+E E 8 8 8 8 8 Q+' m m m m o.o.-+C.C.C.C.7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ T$: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o V V m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=5.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^.H+=.=.`+g@H+H+H+4.q.q.q.n n r#r#K.K.K.b+b+< < < c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / [@1 U+U+U+>$R&^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=P=6 6 6 {+{+{+P.P.P.) {+X;X;};};|>|>j;{.{.{.{.{.{.{.{.{.{.U>8 8 8 8 8 E E F+F+F+F+F+F+, 5;9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+]>]>]>]>> > > > > > $+$+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 ,,,,F F F F F F F F F F F F F F F F F T+T+T+T+T+f,f,f,f,f,f,f,f,f,- - - - - - - - - - - - - f,f,f,f,f,f,f,f,T+T+T+T+T+T+F F F F F F @'&!x[y[]!]!]!]!S!E~z[A[{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.B[C[]>]>]>^+^+^+^+^+^+^+I.I.&.9 9 9 9 9 9 5;, F+F+F+F+F+F+F+E E 8 8 8 8 8 Q+' m m m m m o.-+C.C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+6 6 6 P=O=O=*@*@*@*@_.t=D D D i=i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@Z+Z+] ] ] ] y%C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.9.r#n n v.q.q.4.G+H+H+H+`+`+=.=.<+<+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.[.-.-.-.Q R R R q r r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ' =.=.=.`+g@H+H+H+4.q.q.q.n n r#r#K.K.K.b+b+< < < c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.r$r$/ / / [@1 U+U+U+>$R&^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=P=6 6 6 {+{+{+P.P.6 X;X;X;X;};};j;{.{.{.{.{.{.{.{.{.{.U>' Q+8 8 8 8 8 E E F+F+F+F+F+F+, , 5;9 9 9 9 9 9 &.I.I.^+^+^+^+^+^+^+]>]>]>]>> > > > > > $+$+$+$+$+$+$+l l l l l ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 ,,,,,,F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F x.D[!)E[]!]!]!]!]!U^+^+^+^+^+^+I.I.I.&.9 9 9 9 9 9 5;, F+F+F+F+F+F+F+E E 8 8 8 8 8 Q+' m m m m m o.o.-+C.C.C.7 7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 P=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ )+)+g.g.g.)=)=)={ { { X&X&w.w.w.6@6@6@Z+Z+] ] ] ] C C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+3.3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q R R R q q r r t u u u v w x y y S S T T >.,.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=q$M+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h n@=.=.=.`+H+H+H+G+4.q.q.q.n n r#r#K.K.K.b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X ( ( | | | n.n.`.r$/ / / [@1 U+U+U+>$R&^ ^ ^ x+x+2 2 2 C y%] ] ] ] Z+Z+6@6@6@w.w.X&X&X&{ { { )=)=)=g.g.g.)+)+~ ~ ~ ~ i=i=D D D D t=_.*@*@*@*@O=P=6 6 6 6 {+{+P.6 Y;Y;X;X;X;};@,{.{.{.{.{.{.{.{.{.{.U>m m ' Q+8 8 8 8 8 E E F+F+F+F+F+F+F+, 5;9 9 9 9 9 9 &.&.I.I.^+^+^+^+^+^+^+]>]>]>]>> > > > > > > $+$+$+$+$+$+$+l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 0 ,,,,,,,,F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F ,,,,,,,,0 0 0 0 0 0 ; H[I[J[K[]!]!]!]!L[$^T!)'{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.M[&.^+^+I.I.I.&.9 9 9 9 9 9 5;5;, F+F+F+F+F+F+F+E E 8 8 8 8 8 Q+' m m m m m o.o.-+C.C.C.7 7 7 ) ) ) ) P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@_.t=D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] ] C C 2 2 2 x+^ ^ ^ ^ >$>$U+U+1 1 / / / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.9.r#r#n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+1+1+W.>@>@O B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a <+=.=.=.`+H+H+H+G+4.q.q.v.n n r#r#K.K.K.b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X X ( | | | n.n.`.r$r$/ / [@1 U+U+U+>$R&^ ^ ^ x+x+2 2 2 C C ] ] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D _.*@*@*@*@O=O=P=6 6 6 {+{+O=Y;Y;Y;Y;X;X;p>{.{.{.{.{.{.{.{.{.{.U>m m m m ' Q+8 8 8 8 8 E E F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+^+]>]>]>]>]>> > > > > > > $+$+$+$+$+$+$+l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 0 0 ,,,,,,,,,,,,,,,,F F F F F F F F F F F F F F F F F F F ,,,,,,,,,,,,,,0 0 0 0 0 0 0 0 0 ; ; ; ; ; ; ; ; ; ; ; N[O[`<][]!]!]!]!t!P[m)Q[z,{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.R[M,I.&.&.9 9 9 9 9 9 5;, F+F+F+F+F+F+F+E E 8 8 8 8 8 8 Q+' m m m m m o.o.-+C.C.C.C.7 7 ) ) ) ) P.P.P.P.{+{+6 6 6 6 P=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ >$>$U+U+1 1 / / / r$r$`.n.n.| | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.9.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.a.a.b.<.[.-.-.;.Q R R R q r r r t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=N.X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8^>$<+=.=.`+`+H+H+H+G+4.q.q.v.n n r#r#K.K.K.b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X X ( ( | | n.n.`.r$r$/ / [@1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 C C y%] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ i=i=D D D D t=_.*@*@*@*@O=O=P=6 6 6 O=F;F;Y;Y;Y;X;p>{.{.{.{.{.{.{.{.{.{.J>o.m m m m m ' Q+8 8 8 8 8 E E E F+F+F+F+F+F+F+, 5;9 9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+^+]>]>]>]>]>> > > > > > > > $+$+$+$+$+$+$+$+l l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l S[T[U[W<]!]!V[W[d[7[X[Y[{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.z,-!E 9 9 9 9 5;5;, F+F+F+F+F+F+F+E E 8 8 8 8 8 8 Q+' m m m m m o.o.-+C.C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@_.D D D D D i=~ ~ ~ ~ ~ )+g.g.g.g.)=)=)={ { { X&X&X&w.w.6@6@6@Z+Z+y*] ] ] y%C 2 2 2 2 x+^ ^ ^ R&>$>$U+U+1 1 / / / r$r$`.n.| | | ( ( X X X Q%Q%} } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.K.r#r#n n q.q.q.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o V V m.m. + +y+y+y+z+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.<.<.[.-.-.Q R R R q q r r t u u u v w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@_@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (.`+=.=.=.`+`+H+H+H+G+4.q.q.v.n n r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X X ( ( | | n.n.`.r$r$/ / / 1 1 U+U+>$>$^ ^ ^ ^ x+2 2 2 2 C y%] ] ] y*Z+Z+6@6@3 w.w.X&X&X&{ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D t=*@*@*@*@*@O=P=6 6 *@F;F;F;Y;Y;Y;p>{.{.{.{.{.{.{.{.{.{.t--+o.o.m m m m m ' Q+8 8 8 8 8 8 E E F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+^+^+]>]>]>]>]>> > > > > > > > $+$+$+$+$+$+$+$+$+$+l l l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l l l l $+$+$+$+$+$+$+$+Z[`[U)g! }E{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.+}@}9 5;, F+F+F+F+F+F+F+F+E E 8 8 8 8 8 Q+Q+' m m m m m o.o.-+C.C.C.C.7 7 7 ) ) ) P.P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { +=X&X&w.w.3 6@6@6@Z+Z+] ] ] ] y%C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.K.r#r#n n q.q.q.4.G+H+H+H+`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+3.3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=`+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5;<+=.=.=.`+g@H+H+H+G+4.q.q.v.n n r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%X X X X ( ( | | n.n.`.r$r$/ / / 1 1 U+U+>$>$R&^ ^ ^ x+2 2 2 2 C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D t=_.*@*@*@*@O=O=P=*@F;F;F;F;F;Y;p>{.{.{.{.{.{.{.{.{.{.t-C.C.-+o.o.m m m m m ' Q+8 8 8 8 8 8 E E E F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 9 &.I.I.I.^+^+^+^+^+^+^+^+^+]>]>]>]>]>> > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+l l l l l l l l l l l l ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; l l l l l l l l l l l l $+$+$+$+$+$+$+$+$+$+$+> > > > > > 9 K'P'#}k$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.K.r#r#n n q.q.q.4.G+H+H+H+`+=.=.=.<+<+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7@@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.u%<+=.=.=.`+g@H+H+H+G+4.q.q.v.n n r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%Q%X X X ( ( | | n.n.`.r$r$/ / / [@1 U+U+U+>$R&^ ^ ^ x+x+2 2 2 C C ] ] ] ] y*Z+6@6@6@3 w.w.X&X&+={ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D t=_.*@*@*@*@O=t=G;F;F;F;F;F;7>{.{.{.{.{.{.{.{.{.{.t-C.C.C.C.-+o.o.m m m m m m ' Q+8 8 8 8 8 8 E E F+F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 9 &.&.I.I.I.^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>> > > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+$+$+l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l $+$+$+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > > > ]>]>]>]>]>f[%}&}*}k$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.K.r#r#n n v.q.q.4.G+H+H+H+`+`+=.=.<+<+~+~+~+1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.<.[.-.-.-.Q R R R q q r r t u u u v w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#~+<+=.=.=.`+g@H+H+H+4.4.q.q.v.n r#r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ d#} } } Q%Q%X X X ( ( | | | n.n.r$r$/ / / [@1 U+U+U+>$R&^ ^ ^ x+x+2 2 2 C C y%] ] ] y*Z+Z+6@6@6@w.w.w.X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D D t=*@*@*@*@D t;t;G;F;F;F;7>{.{.{.{.{.{.{.{.{.{.t-7 7 C.C.C.C.-+o.o.m m m m m m ' Q+8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 9 9 &.I.I.I.I.^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>> > > > > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+l l l l l l l l l l l l l l $+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > > > > > ]>]>]>]>]>]>^+^+^+^+^+^+-};}_,>},}'}k$>$U+U+U+1 [@/ / r$r$`.n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < b+b+K.K.K.r#r#n n v.q.q.4.G+H+H+H+`+`+=.=.=.<+~+~+~+1+W.W.>@>@O B o o o V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.Q Q R R q q r r s t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=0.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . O=~+<+=.=.=.`+g@H+H+H+4.4.q.q.v.n r#r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ u%} } } Q%Q%X X X ( ( | | | n.n.r$r$/ / / [@1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&+={ { { )=)=)=g.g.g.g.)+~ ~ ~ ~ ~ i=i=D D D D t=_.*@*@D i;i;t;G;F;F;{>{.{.{.{.{.{.{.{.{.{.t-) 7 7 7 C.C.C.C.-+o.o.o.m m m m m ' ' Q+8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 9 &.&.I.I.I.I.^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>> > > > > > > > > > > > > > > $+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+$+> > > > > > > > > > > > > > > ]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+I.I.^}R,7,7,z>/}1<(}k<}8 8 8 Q+' m m m m m m o.o.-+C.C.C.C.C.7 7 7 ) ) ) ) P.P.P.P.{+{+{+6 6 6 P=O=O=*@*@*@*@*@t=D D D D D i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+y*] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ >$>$U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ [ [ [ [ #%: : : : c+< < < < b+K.K.K.r#r#n n v.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+1+1+W.>@>@O B o o o V V m.m. + +y+y+y+z+l+l+l+G.:.:.:.2+#+#+#+3.3.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r s t u u v w x x y y S S T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~&# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . s+b+~+<+=.=.=.`+g@H+H+H+4.4.q.q.v.n r#r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ j+_ _ _ _ u%} } } } Q%X X X ( ( | | | n.n.`.r$r$/ / [@1 1 U+U+>$>$^ ^ ^ ^ x+2 2 2 2 C C ] ] ] ] y*Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=D D D D t=_.D i;i;i;t;t;G;{>{.{.{.{.{.{.{.{.{.{.t-) ) ) 7 7 7 C.C.C.C.C.-+o.o.m m m m m m ' Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+, , 5;9 9 9 9 9 9 9 9 9 &.&.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>]>> > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > ]>]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.&.&.9 [}}}_,_,_,_,),>}|}1}h>2}c<{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-3}e,' m m m m m m o.o.-+C.C.C.C.C.7 7 7 ) ) ) ) P.P.P.P.{+{+{+6 6 6 6 O=O=*@*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+g.g.g.g.g.)=)={ { { +=X&X&w.w.w.6@6@6@Z+Z+y*] ] ] y%C C 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X Q%} } } d#u%_ _ _ _ [ [ [ [ #%: : : : c+< < < < b+K.K.K.r#r#n n v.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p f.r.r.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u v v w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . c ~+~+<+=.=.=.`+g@H+H+H+4.q.q.q.v.n r#r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ [ _ _ _ _ u%} } } } Q%X X X ( ( | | | n.n.`.r$r$/ / / 1 1 U+U+U+>$R&^ ^ ^ x+x+2 2 2 C C y%] ] ] y*Z+Z+6@6@6@3 w.w.X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=D D D D D 5 7;i;i;i;i;t;=>{.{.{.{.{.{.{.{.{.{.t-P.) ) ) ) 7 7 7 C.C.C.C.C.-+o.o.m m m m m m ' ' Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+, 5;5;9 9 9 9 9 9 9 9 9 &.&.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>]>]>]>]>]>> > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > ]>]>]>]>]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.&.&.9 9 9 9 9 9 9 9 4}(,),X>X>h>h>h>h>h>z>5}/;{.{.{.{.{.{.{.{.{.{.{.{.{.{.2>!,m m m o.o.o.-+C.C.C.C.7 7 7 7 ) ) ) ) P.P.P.P.{+{+{+6 6 6 6 P=O=O=*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+Z+] ] ] ] y%C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$`.n.n.| | ( ( X X X X Q%} } } d#u%_ _ _ _ [ [ [ [ #%: : : : c+< < < < b+K.K.K.9.r#n n v.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.<.[.[.-.-.Q R R R q q r r t t u u v w x x y z S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=T + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z+~+~+<+=.=.=.`+g@H+H+H+4.q.q.q.v.n r#r#9.K.K.b+b+< < < c+c+: : : T$#%[ [ [ [ _ _ _ _ u%d#} } } Q%X X X X ( ( | | n.n.`.r$r$/ / / [@1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] y*Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=D D D ~ z-7;i;i;i;i;B;{.{.{.{.{.{.{.{.{.{.t-P.P.P.) ) ) ) 7 7 7 7 C.C.C.C.-+-+o.o.m m m m m m ' Q+Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+, , 5;5;9 9 9 9 9 9 9 9 9 9 &.&.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.&.&.&.9 9 9 9 9 9 9 9 9 9 5;5;, [}}}h>h>h>h>h>h>h>h>y>6}7}{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.8}9}o.-+C.C.C.C.C.7 7 7 ) ) ) ) ) P.P.P.P.{+{+{+6 6 6 6 P=O=O=*@*@*@*@_.t=D D D D D i=~ ~ ~ ~ ~ ~ )+g.g.g.g.g.)=)={ { { +=X&X&w.w.w.3 6@6@6@Z+y*] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ >$>$U+U+U+1 [@/ / / r$r$n.n.| | | ( ( X X X X Q%} } } d#u%_ _ _ _ [ [ [ [ #%: : : : c+< < < < b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J.H+~+<+<+=.=.=.`+g@H+H+H+4.q.q.q.n n r#r#9.K.K.b+b+< < < c+c+: : : : #%[ [ [ [ _ _ _ _ u%d#} } } Q%X X X X ( ( | | n.n.n.r$r$/ / / [@1 U+U+U+>$>$^ ^ ^ ^ x+2 2 2 2 C C ] ] ] ] y*Z+Z+6@6@6@w.w.w.X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ ~ ~ ~ i=i=D ~ z-z-7;7;i;i;B;{.{.{.{.{.{.{.{.{.{.t-{+P.P.P.P.) ) ) ) ) 7 7 7 C.C.C.C.C.-+o.o.o.m m m m m m ' Q+Q+8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+F+, , 5;5;9 9 9 9 9 9 9 9 9 9 9 &.&.&.I.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+]>]>]>]>]>^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.I.&.&.&.9 9 9 9 9 9 9 9 9 9 9 5;5;, F+F+F+F+F+F+0}<}h>h>h>y>y>y>y>y>i>3}$;{.{.{.{.{.{.{.{.{.{.{.{.{.{.a}b}C.C.C.C.7 7 7 ) ) ) ) P.P.P.P.P.{+{+{+6 6 6 6 P=O=O=*@*@*@*@_.t=D D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)={ { { { +=X&X&w.w.3 6@6@6@Z+Z+y*] ] ] y%C C 2 2 2 x+x+^ ^ ^ R&>$>$U+U+U+1 [@/ / r$r$r$n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ #%: : : : c+< < < < b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u v w w x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 ~+~+<+<+=.=.=.`+H+H+H+H+4.q.q.q.n n r#r#9.K.K.b+b+< < < c+c+: : : : #%[ [ [ [ _ _ _ _ u%d#} } } Q%X X X X ( ( | | | n.n.r$r$r$/ / [@1 1 U+U+>$>$R&^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] Z+Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=g.g.g.g.g.)+)+~ ~ ~ ~ ~ i=z&z-z-z-z-7;7;B;{.{.{.{.{.{.{.{.{.{.t-{+{+{+P.P.P.P.P.) ) ) ) 7 7 7 7 C.C.C.C.-+-+o.o.m m m m m m m ' Q+Q+8 8 8 8 8 8 8 E E E E F+F+F+F+F+F+F+F+F+F+F+, , 5;5;9 9 9 9 9 9 9 9 9 9 9 9 &.&.&.I.I.I.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.I.I.&.&.&.9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;, , F+F+F+F+F+F+F+F+F+F+F+-}c}y>y>y>y>y>y>y>y>y>M>d}{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.e}->7 7 7 ) ) ) ) P.P.P.P.P.{+{+{+6 6 6 6 P=O=O=*@*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)=)={ { { +=X&X&w.w.w.3 6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ #%: : : : c+< < < < b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.3.0.0..+R.p p f.r.r.k.a.b.b.<.[.-.-.-.Q R R R q q r r t u u u v w x y y z S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@_@_@_@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=n+h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.n.~+~+<+<+=.=.=.`+H+H+H+H+4.q.q.q.n n r#r#9.K.K.b+b+< < < < c+: : : : #%[ [ [ [ j+_ _ _ _ d#} } } Q%Q%X X X ( ( | | | n.n.`.r$r$/ / / 1 1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.X&X&+={ { { { )=)=g.g.g.g.)+)+~ ~ ~ ~ ~ g.z-z-z-z-z-z-4;{.{.{.{.{.{.{.{.{.{.t-6 6 {+{+{+P.P.P.P.P.) ) ) ) 7 7 7 7 C.C.C.C.C.-+o.o.o.m m m m m m m ' Q+Q+8 8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+F+F+F+, , 5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 &.&.&.&.I.I.I.I.I.I.I.I.I.I.I.I.^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+^+I.I.I.I.I.I.I.I.I.I.I.I.&.&.&.&.9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;, , , F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 f}g}y>y>y>y>y>z>z>i>i>h}.>{.{.{.{.{.{.{.{.{.{.{.{.{.{.i}j}) ) ) ) P.P.P.P.{+{+{+{+6 6 6 6 P=O=O=*@*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ ~ )+g.g.g.g.g.)=)={ { { { X&X&X&w.w.3 6@6@6@Z+Z+y*] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ j+[ [ [ [ T$: : : : c+< < < < b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m. +y+y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.<.[.[.-.-.Q R R R q q r r s t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@i@i@i@P@P@t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # a@~+~+<+<+=.=.=.`+H+H+H+H+4.q.q.q.v.n r#r#9.K.K.b+b+< < < < c+: : : : #%[ [ [ [ j+_ _ _ _ d#} } } Q%Q%X X X ( ( | | | n.n.`.r$r$/ / / [@1 U+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 C C y%] ] ] ] Z+Z+6@6@6@3 w.w.w.X&X&+={ { { )=)=)=g.g.g.g.)+)+~ ~ ~ g. ;z-z-z-z-z-4;{.{.{.{.{.{.{.{.{.{.t-6 6 6 6 {+{+{+{+P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.-+o.o.o.m m m m m m m ' ' Q+8 8 8 8 8 8 8 8 8 E E E F+F+F+F+F+F+F+F+F+F+F+F+F+, , , 5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 &.&.&.&.&.&.&.&.&.I.I.I.I.I.I.I.I.I.I.I.I.I.I.I.&.&.&.&.&.&.&.&.&.9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;5;, , F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 8 8 8 8 8 k}l}y>z>z>i>i>i>i>i>i>m}T){.{.{.{.{.{.{.{.{.{.{.{.{.{.{.*,n}P.P.P.P.{+{+{+6 6 6 6 6 P=O=O=*@*@*@*@*@_.t=D D D D i=i=~ ~ ~ ~ ~ ~ )+)+g.g.g.g.)=)=)={ { { +=X&X&w.w.w.3 6@6@6@Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ ^ >$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+<+~+~+~+1+W.W.>@>@O B o o o V V m.m. + +y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.R.p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R q q r r s t u u v w x x y y S S T T >.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ' ~+~+~+<+=.=.=.=.`+H+H+H+H+4.q.q.q.v.n r#r#9.K.K.K.b+< < < < c+: : : : T$[ [ [ [ j+_ _ _ _ u%} } } } Q%X X X ( ( ( | | n.n.n.r$r$/ / / [@1 U+U+U+>$>$R&^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.X&X&X&{ { { { )=)=)=g.g.g.g.)+)+~ g. ; ; ;z-z-z-4;{.{.{.{.{.{.{.{.{.{.t-O=P=6 6 6 6 6 {+{+{+P.P.P.P.P.) ) ) ) ) 7 7 7 C.C.C.C.C.C.-+o.o.o.m m m m m m m m ' Q+Q+8 8 8 8 8 8 8 8 8 E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+, , , 5;5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;5;, , , , F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E 8 8 8 8 8 8 8 8 8 Q+Q+' m o}<}i>i>i>i>i>0>0>0>0>p}(;{.{.{.{.{.{.{.{.{.{.{.{.{.{.(;q}P.{+{+{+6 6 6 6 6 P=O=O=*@*@*@*@*@_.t=D D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.)=)=)={ { { +=X&X&X&w.w.3 6@6@6@Z+Z+y*] ] ] ] C C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / r$r$r$n.n.| | | ( ( X X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+<+~+~+~+1+W.W.>@>@O B o o o V V m.m.m. +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u v v w x y y S S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t#d+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.|#~+~+~+<+=.=.=.=.`+H+H+H+H+4.q.q.q.v.n r#r#9.K.K.K.b+b+< < < c+: : : : T$[ [ [ [ j+_ _ _ _ u%} } } } Q%X X X X ( ( | | | n.n.`.r$r$/ / / 1 1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C C y%] ] ] ] Z+Z+6@6@6@3 w.w.w.X&X&+={ { { { )=)=g.g.g.g.g.)+)= ; ; ; ; ;z-6-{.{.{.{.{.{.{.{.{.{.t-*@O=O=P=P=6 6 6 6 {+{+{+P.P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.-+o.o.o.m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+, , , , 5;5;5;5;9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 5;5;5;5;, , , , F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m F,r}W(0>0>0>0>|>|>|>|>s}t}{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.'>u}6 6 6 6 P=O=O=O=*@*@*@*@*@_.t=D D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.g.)=)={ { { { +=X&X&w.w.w.3 6@6@6@Z+y*] ] ] ] y%C C 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X X Q%} } } d#u%_ _ _ _ j+[ [ [ [ T$: : : : c+< < < b+b+K.K.K.9.r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.>@>@O B B o o @V m.m.m. +y+y+y+z+l+l+l+l+:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r t u u u v w x x y z S T T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=#=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K$1+~+~+~+<+=.=.=.=.`+H+H+H+H+4.q.q.q.v.n n r#9.K.K.K.b+b+< < < c+: : : : T$[ [ [ [ j+_ _ _ _ u%d#} } } Q%X X X X ( ( | | | n.n.`.r$r$/ / / [@1 U+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.X&X&X&+={ { { )=)=)=g.g.g.g.{ U- ; ; ; ; ;6-{.{.{.{.{.{.{.{.{.{.t-*@*@*@*@O=O=P=6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.-+o.o.o.m m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 8 E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+, , , , , , , 5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;5;, , , , , , , F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m m m m o.o.o.v}w}|>|>|>|>|>|>};};};4;_>{.{.{.{.{.{.{.{.{.{.{.{.{.{.j:x}! P=O=O=*@*@*@*@*@*@_.t=D D D D D i=i=~ ~ ~ ~ ~ )+)+g.g.g.g.g.)=)=)={ { { +=X&X&X&w.w.3 6@6@6@Z+Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ R&>$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#u%_ _ _ _ [ [ [ [ #%T$: : : : c+< < < b+b+K.K.K.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.>@>@O B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+3.3.0.0..+R.p p f.r.r.k.a.a.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y z S S T T ,.d.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=a.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P.1+~+~+~+<+=.=.=.=.`+H+H+H+H+4.q.q.q.v.n n r#9.K.K.K.b+b+< < < c+: : : : T$#%[ [ [ [ _ _ _ _ u%d#} } } Q%Q%X X X ( ( | | | n.n.`.r$r$/ / / [@1 1 U+U+U+>$R&^ ^ ^ ^ x+2 2 2 2 C C y%] ] ] ] y*Z+6@6@6@6@w.w.w.X&X&X&+={ { { )=)=)=g.g.{ F-U-U- ; ; ;6-{.{.{.{.{.{.{.{.{.{.t-*@*@*@*@*@*@O=O=P=6 6 6 6 6 {+{+{+P.P.P.P.P.P.) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.-+-+o.o.o.m m m m m m m m m ' ' Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' m m m m m m m m m o.o.o.-+-+C.C.) y}|>|>};};};};X;X;X;z}A}{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.Y-B}*@*@*@*@*@*@_.t=D D D D D i=i=~ ~ ~ ~ ~ ~ )+g.g.g.g.g.)=)=)={ { { +=X&X&X&w.w.3 6@6@6@6@Z+y*] ] ] ] y%C C 2 2 2 2 x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$`.n.n.| | | ( ( X X X Q%Q%} } } d#_ _ _ _ _ [ [ [ [ #%T$: : : : c+< < < b+b+K.K.K.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.>@>@O B B o o @V m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.2+#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.<.<.[.-.-.Q Q R R q q r r s t u u v w x x y y S S T T >.,.d.d.2.2.e.e.e.u.u.u.u.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8$j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.:%Q.~+~+~+<+=.=.=.=.`+H+H+H+H+4.q.q.q.v.n n r#r#K.K.K.b+b+< < < c+: : : : T$#%[ [ [ [ j+_ _ _ _ d#} } } } Q%X X X ( ( ( | | | n.n.r$r$r$/ / / 1 1 U+U+U+>$>$^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&+={ { { { )=)=)={ F-F-F-U-U- ;6-{.{.{.{.{.{.{.{.{.{.t-t=t=_.*@*@*@*@*@O=O=P=P=6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 C.C.C.C.C.C.C.-+o.o.o.o.m m m m m m m m m ' ' Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' ' m m m m m m m m m o.o.o.o.-+C.C.C.C.C.C.C.7 r;C}};X;X;X;X;X;X;Y;Y;j;k>{.{.{.{.{.{.{.{.{.{.{.{.{.{.$;{>D}*@_.t=D D D D D D i=i=~ ~ ~ ~ ~ ~ )+)+g.g.g.g.)=)=)={ { { { +=X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] y%C 2 2 2 2 x+x+^ ^ ^ ^ >$>$U+U+U+1 1 / / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } d#_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < b+b+K.K.K.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.=.<+~+~+~+1+1+W.W.>@O B B o o @V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u v v w x y y z S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#8$8$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # <+Q.~+~+~+<+=.=.=.=.`+H+H+H+H+4.4.q.q.v.n n r#r#K.K.K.b+b+< < < c+c+: : : : #%[ [ [ [ j+_ _ _ _ u%} } } } Q%X X X X ( ( | | | n.n.`.r$r$/ / / [@1 U+U+U+>$>$R&^ ^ ^ ^ x+2 2 2 2 C C y%] ] ] ] y*Z+6@6@6@6@3 w.w.X&X&X&+={ { { { )=X&d-F-F-F-F-U-:-{.{.{.{.{.{.{.{.{.{.t-D D D t=_.*@*@*@*@*@*@O=O=P=6 6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.-+-+o.o.o.o.m m m m m m m m m m ' ' ' Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E E E E E E F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+F+E E E E E E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+' ' ' m m m m m m m m m m o.o.o.o.-+-+C.C.C.C.C.C.7 7 7 7 7 ) {+u}|>X;X;Y;Y;Y;Y;Y;F;E}9,0,{.{.{.{.{.{.{.{.{.{.{.{.{.{.S;F}D D D D D D i=i=~ ~ ~ ~ ~ ~ )+)+g.g.g.g.)=)=)={ { { { +=X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 x+^ ^ ^ ^ R&>$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.K.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.=.<+~+~+~+1+1+W.W.>@O B B o o @V m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r t u u u v w x x y z S T T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=>@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > 1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+4.4.q.q.v.n n r#r#K.K.K.b+b+< < < c+c+: : : : #%[ [ [ [ j+_ _ _ _ u%} } } } Q%X X X X ( ( | | | n.n.`.r$r$/ / / [@1 1 U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C C ] ] ] ] ] Z+Z+6@6@6@6@3 w.w.X&X&X&+={ { { w.d-d-F-F-F-F-:-{.{.{.{.{.{.{.{.{.{.t-D D D D D t=_.*@*@*@*@*@*@O=O=P=P=6 6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.C.-+-+o.o.o.o.m m m m m m m m m m m m ' ' Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 E E E E E E E E E E E E E E E E E E E E E 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+' ' m m m m m m m m m m m m o.o.o.o.-+-+C.C.C.C.C.C.C.7 7 7 7 7 ) ) ) ) ) ) r;C}Y;Y;Y;F;F;F;F;F;F;G}5!{.{.{.{.{.{.{.{.{.{.{.{.{.{.J;H}4 D i=i=i=~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.)=)={ { { { +=X&X&X&w.w.3 6@6@6@6@Z+Z+] ] ] ] ] C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$`.n.n.| | | ( ( X X X X Q%} } } d#u%_ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.K.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+y+z+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y z S S T T ,.,.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=q+e@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.>$1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+4.4.q.q.v.n n r#r#9.K.K.b+b+< < < c+c+: : : : T$[ [ [ [ j+_ _ _ _ u%d#} } } Q%Q%X X X ( ( ( | | | n.n.`.r$r$/ / / [@1 U+U+U+>$>$R&^ ^ ^ ^ x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&X&+={ w.2-d-d-d-F-F-:-{.{.{.{.{.{.{.{.{.{.t-i=i=D D D D D t=_._.*@*@*@*@*@*@O=O=P=6 6 6 6 6 6 {+{+{+{+P.P.P.P.P.) ) ) ) ) ) ) 7 7 7 7 7 C.C.C.C.C.C.C.-+-+-+o.o.o.o.m m m m m m m m m m m m m ' ' ' Q+Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+Q+' ' ' m m m m m m m m m m m m m o.o.o.o.-+-+-+C.C.C.C.C.C.C.7 7 7 7 7 ) ) ) ) ) ) ) P.P.P.P.I}u}};F;F;F;F;F;F;F;F;J}K}g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.f)L}~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.)=)=)={ { { +=X&X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 x+^ ^ ^ ^ R&>$>$U+U+U+1 [@/ / / r$r$`.n.n.| | | ( ( ( X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ T$: : : : c+c+< < < b+b+K.K.9.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@O B B o o @V m.m.m. +y+y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J.v@1+Q.~+~+~+<+<+=.=.=.`+g@H+H+H+4.4.q.q.v.n n r#r#9.K.K.b+b+< < < < c+: : : : T$[ [ [ [ [ _ _ _ _ _ d#} } } } Q%X X X X ( ( | | | n.n.`.r$r$/ / / [@1 1 U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@3 w.w.w.X&X&X&3 2-2-2-d-d-d-:-{.{.{.{.{.{.{.{.{.{.t-~ ~ i=i=D D D D D D t=_.*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.) ) ) ) ) ) 7 7 7 7 7 7 C.C.C.C.C.C.C.C.-+-+o.o.o.o.o.m m m m m m m m m m m m m m m m ' ' ' ' ' Q+Q+Q+Q+Q+8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Q+Q+Q+Q+Q+' ' ' ' ' m m m m m m m m m m m m m m m m o.o.o.o.o.-+-+C.C.C.C.C.C.C.C.7 7 7 7 7 7 ) ) ) ) ) ) P.P.P.P.P.P.{+{+{+{+M}N}F;F;F;F;G;t;t;t;i;|;O}{.{.{.{.{.{.{.{.{.{.{.{.{.{.{,@;A'~ ~ ~ )+)+g.g.g.g.g.)=)=)={ { { +=X&X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$`.n.n.| | | ( ( X X X X Q%} } } } d#_ _ _ _ _ [ [ [ [ [ T$: : : : c+< < < < b+b+K.K.9.r#r#n n v.q.q.4.4.H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. + +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R q q r r s t u u v w w x y y z S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d&W.1+Q.~+~+~+<+<+=.=.=.`+g@H+H+H+G+4.q.q.v.n n r#r#9.K.K.b+b+< < < < c+: : : : T$#%[ [ [ [ j+_ _ _ _ u%} } } } Q%X X X X ( ( | | | n.n.n.r$r$r$/ / / [@1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 C y%] ] ] ] ] y*Z+6@6@6@6@3 w.w.w.X&6@--2-2-2-2-d-s-{.{.{.{.{.{.{.{.{.{.t-~ ~ ~ ~ i=i=D D D D D D t=_._.*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.) ) ) ) ) ) ) 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.-+-+-+o.o.o.o.o.m m m m m m m m m m m m m m m m m m m m m m ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' m m m m m m m m m m m m m m m m m m m m m m o.o.o.o.o.-+-+-+C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 ) ) ) ) ) ) ) P.P.P.P.P.P.{+{+{+{+{+6 6 6 6 P}h;G;t;t;i;i;i;i;i;Q}R}1_{.{.{.{.{.{.{.{.{.{.{.{.{.{.a,o-)+)+g.g.g.g.g.)=)=)={ { { { +=X&X&w.w.w.3 6@6@6@6@Z+y*] ] ] ] ] y%C 2 2 2 2 2 x+^ ^ ^ ^ R&>$>$U+U+U+1 [@/ / / r$r$r$n.n.n.| | | ( ( X X X X Q%} } } } u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < < b+b+K.K.9.r#r#n n v.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@B B o o @V m.m.m. + +y+y+y+z+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0..+R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q r r r t u u u v w x x y z S T T T ,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+}+5+5+i+n+q+q+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%6%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=z ;@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z&W.1+1+~+~+~+<+<+=.=.=.`+g@H+H+H+G+4.q.q.q.n n r#r#9.K.K.K.b+b+< < < c+: : : : : #%[ [ [ [ j+_ _ _ _ u%d#} } } Q%Q%X X X ( ( ( | | | n.n.`.r$r$/ / / [@1 1 U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@6@3 w.w.Z+----1-2-2-2-l-{.{.{.{.{.{.{.{.{.{.S}~ ~ ~ ~ ~ ~ i=i=i=D D D D D D t=_.*@*@*@*@*@*@*@O=O=P=P=6 6 6 6 6 6 {+{+{+{+P.P.P.P.P.P.P.) ) ) ) ) ) ) ) 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.-+-+-+o.o.o.o.o.o.o.m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m o.o.o.o.o.o.o.-+-+-+C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.{+{+{+{+6 6 6 6 6 6 P=P=O=M}T}i;i;i;i;i;i;7;7;z-U}t-{.{.{.{.{.{.{.{.{.{.{.{.{.{.K-V}W}g.g.g.)=)=)={ { { { +=X&X&w.w.w.3 6@6@6@6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$U+U+U+1 1 [@/ / / r$r$`.n.n.| | | ( ( ( X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m. + +y+y+y+z+l+l+l+l+:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r t t u u v w x x y z S S T T ,.,.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I !>W.1+1+~+~+~+<+<+=.=.=.`+g@H+H+H+G+4.q.q.q.n n r#r#9.K.K.K.b+b+< < < c+c+: : : : #%[ [ [ [ j+_ _ _ _ u%d#} } } } Q%X X X X ( ( | | | n.n.`.r$r$r$/ / / [@1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] y*Z+Z+6@6@6@6@3 Z+--------1-2-l-{.{.{.{.{.{.{.{.{.{.X})+)+~ ~ ~ ~ ~ ~ ~ i=i=D D D D D D t=t=_.*@*@*@*@*@*@*@O=O=P=P=6 6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.P.) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.-+-+-+-+o.o.o.o.o.o.o.o.o.o.m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m m o.o.o.o.o.o.o.o.o.o.-+-+-+-+C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.{+{+{+{+{+6 6 6 6 6 6 P=P=O=O=*@*@*@*@Y}h;i;7;7;7;z-z-z-z-Q}Z}`}{.{.{.{.{.{.{.{.{.{.{.{.{.{.c> |)=)=)={ { { { +=X&X&X&w.w.3 6@6@6@6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 1 / / / r$r$r$`.n.n.| | | ( ( X X X X Q%} } } } d#u%_ _ _ _ j+[ [ [ [ #%: : : : c+c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@B B o o o V m.m.m. + +y+y+y+z+l+l+l+l+:.:.:.:.2+#+#+#+#+3.0.0.0.R.R.p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#W.W.1+1+~+~+~+<+<+=.=.=.`+g@H+H+H+G+4.q.q.q.n n n r#r#K.K.K.b+b+< < < c+c+: : : : T$[ [ [ [ [ _ _ _ _ _ u%} } } } Q%X X X X ( ( | | | | n.n.`.r$r$/ / / [@1 1 U+U+U+>$>$^ ^ ^ ^ ^ x+2 2 2 2 2 C C ] ] ] ] ] y*Z+Z+6@6@6@] =-----------l-{.{.{.{.{.{.{.{.{.{.X}g.g.)+)+~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D t=_._.*@*@*@*@*@*@*@O=O=O=P=6 6 6 6 6 6 6 {+{+{+{+{+P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.-+-+-+-+-+-+o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.o.-+-+-+-+-+-+C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.{+{+{+{+{+{+6 6 6 6 6 6 P=O=O=O=*@*@*@*@*@*@*@_..|F}z-z-z-z-z-z-z-z-z-+|,>{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.@|#|{ { { +=X&X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] ] y%C 2 2 2 2 2 x+^ ^ ^ ^ ^ >$>$U+U+U+1 1 [@/ / / r$r$`.n.n.n.| | | ( ( X X X X Q%} } } } d#_ _ _ _ _ [ [ [ [ [ T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.W.>@>@B B o o o V m.m.m.m. +y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=#+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Q+W.W.1+1+~+~+~+~+<+=.=.=.`+g@H+H+H+G+4.q.q.q.v.n n r#r#K.K.K.b+b+< < < < c+: : : : T$#%[ [ [ [ j+_ _ _ _ u%d#} } } Q%Q%X X X X ( ( | | | n.n.`.r$r$r$/ / / [@1 U+U+U+U+>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C y%] ] ] ] ] y*Z+Z+6@] =-=---------l-{.{.{.{.{.{.{.{.{.{.X}g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ i=i=D D D D D D D t=_._.*@*@*@*@*@*@*@O=O=O=P=P=6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.{+{+{+{+{+{+6 6 6 6 6 6 6 P=O=O=O=*@*@*@*@*@*@*@_._.t=D D D $|h;z-z-z-z- ; ; ; ;Q}%|3:{.{.{.{.{.{.{.{.{.{.{.{.{.{.&|*|+=X&X&X&w.w.w.3 6@6@6@Z+Z+y*] ] ] ] ] y%C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 [@/ / / / r$r$`.n.n.| | | ( ( X X X X Q%Q%} } } } u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.W.>@>@B B o o o V m.m.m.m. +y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.k.k.a.b.b.<.[.-.-.-.Q Q R R q q r r s t u u v v w x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+i+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7@D+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.X >@W.1+1+~+~+~+~+<+=.=.=.`+g@H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.b+b+< < < < c+: : : : : #%[ [ [ [ j+_ _ _ _ u%d#} } } } Q%X X X X ( ( | | | | n.n.`.r$r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] ] y*Z+y%=-=-=-=-----=|{.{.{.{.{.{.{.{.{.{.Z-)=g.g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=D D D D D D D t=_._.*@*@*@*@*@*@*@O=O=O=P=P=6 6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 7 7 7 C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.C.7 7 7 7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+6 6 6 6 6 6 6 P=P=O=O=O=*@*@*@*@*@*@*@_._.t=D D D D D D D { -|z- ; ; ; ; ; ; ;U-;|>|{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.,|'|w.w.w.3 6@6@6@6@Z+y*] ] ] ] ] y%C C 2 2 2 2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$`.n.n.n.| | | ( ( X X X X Q%} } } } d#u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+1+1+W.W.>@>@B B o o o V m.m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.a.b.<.[.[.-.-.;.Q R R R q r r r t u u u v w x x y z S S T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e#f@>@W.1+1+~+~+~+~+<+=.=.=.`+`+H+H+H+H+4.4.q.q.v.n n r#r#9.K.K.K.b+b+< < < c+c+: : : : T$[ [ [ [ [ _ _ _ _ _ u%} } } } Q%Q%X X X ( ( ( | | | n.n.`.r$r$r$/ / / [@1 U+U+U+U+>$>$^ ^ ^ ^ ^ x+x+2 2 2 2 C C y%] ] ] ] ] C *-*-=-=-=-=-)|{.{.{.{.{.{.{.{.{.{.Z-)=)=)=g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=_._.*@*@*@*@*@*@*@*@O=O=O=P=P=6 6 6 6 6 6 6 6 {+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+6 6 6 6 6 6 6 P=P=O=O=O=*@*@*@*@*@*@*@*@_._.t=D D D D D D D i=i=i=~ ~ $|h; ; ; ;U-U-U-F-F-F-@;.>{.{.{.{.{.{.{.{.{.{.{.{.{.{._>!|3 6@6@6@6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 2 x+^ ^ ^ ^ ^ R&>$U+U+U+U+1 [@/ / / r$r$r$`.n.n.| | | ( ( ( X X X X Q%} } } } d#_ _ _ _ _ j+[ [ [ [ #%: : : : : c+< < < < b+b+K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B o o o V m.m.m.m. +y+y+y+y+l+l+l+l+:.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q r r r t t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - >@>@W.W.1+Q.~+~+~+<+=.=.=.`+`+H+H+H+H+4.4.q.q.v.n n r#r#9.K.K.K.b+b+< < < c+c+: : : : T$#%[ [ [ [ j+_ _ _ _ u%d#} } } } Q%X X X X ( ( | | | | n.n.`.r$r$/ / / / 1 1 U+U+U+U+>$R&^ ^ ^ ^ ^ x+2 2 2 2 2 C C y%] ] ] 2 a-*-*-*-=-=-k-{.{.{.{.{.{.{.{.{.{.Z-{ { )=)=)=)=g.g.g.g.g.g.)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=t=_.*@*@*@*@*@*@*@*@O=O=O=O=P=P=6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) 7 7 7 7 7 7 7 7 7 7 7 ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 P=P=O=O=O=O=*@*@*@*@*@*@*@*@_._.t=D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ L ~|U-U-F-F-F-F-F-F-d-{|R;{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.W*]|6@Z+Z+y*] ] ] ] y%C C 2 2 2 2 2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$`.n.n.n.| | | ( ( X X X X Q%Q%} } } d#u%_ _ _ _ j+[ [ [ [ [ T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n v.q.q.4.4.H+H+H+H+`+`+=.=.=.<+~+~+~+~+1+1+W.W.>@O B B o o o V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p f.r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+}+5+5+i+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=N.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y%>@>@W.W.1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.q.q.q.n n r#r#9.K.K.K.b+b+< < < < c+: : : : T$#%[ [ [ [ j+_ _ _ _ _ d#} } } } Q%Q%X X X ( ( ( | | | n.n.n.r$r$r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] 2 a-a-a-*-*-*-k-{.{.{.{.{.{.{.{.{.{.Z-{ { { { { )=)=)=g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D t=t=_._.*@*@*@*@*@*@*@*@O=O=O=O=P=P=6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 P=P=O=O=O=O=*@*@*@*@*@*@*@*@*@_.t=t=D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ )+)+)+#|h;F-F-F-F-d-d-d-2-2-^|/|{.{.{.{.{.{.{.{.{.{.{.{.{.{.(|_|y*] ] ] ] y%C C 2 2 2 2 2 x+x+^ ^ ^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$r$`.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ j+[ [ [ [ #%T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n v.q.q.4.4.H+H+H+H+`+`+=.=.=.<+~+~+~+~+1+1+W.>@>@O B B o o o V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.#+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=J%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J n@>@>@W.W.1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.q.q.q.v.n n r#r#K.K.K.b+b+< < < < c+: : : : : #%[ [ [ [ [ _ _ _ _ _ u%d#} } } Q%Q%X X X X ( ( | | | | n.n.`.r$r$/ / / / [@1 U+U+U+U+>$>$R&^ ^ ^ ^ x+x+2 2 2 2 2 C C y%:|:|:|:|:|<|)-{.{.{.{.{.{.{.{.{.{.Z-X&+=+={ { { { )=)=)=)=g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D t=t=_.*@*@*@*@*@*@*@*@*@*@O=O=O=O=P=P=6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 6 P=P=O=O=O=O=*@*@*@*@*@*@*@*@*@*@_._.t=D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.T>~|d-d-d-d-2-2-2-2-2-[|}|{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.||4-] ] y%C 2 2 2 2 2 x+x+^ ^ ^ ^ ^ >$>$U+U+U+U+1 1 / / / / r$r$`.n.n.n.| | | ( ( X X X X Q%Q%} } } } u%_ _ _ _ _ j+[ [ [ [ #%: : : : : c+< < < < b+b+K.K.K.r#r#r#n n q.q.q.4.G+H+H+H+H+`+`+=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o o V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u v w w x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@_@_@_@7@i@i@H@P@P@t#U#8$q$q$&%6%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=X&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.1+>@>@W.W.1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.b+b+b+< < < c+c+: : : : T$#%[ [ [ [ j+_ _ _ _ u%d#} } } } Q%X X X X ( ( ( | | | n.n.n.`.r$r$/ / / / 1 1 U+U+U+U+>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] ] ] ] e={.{.{.{.{.{.{.{.{.{.Z-X&X&X&X&+={ { { { { )=)=)=g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D D t=_._.*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+{+{+{+{+{+P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.P.{+{+{+{+{+{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 6 6 6 P=P=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.g.)=)=1|2|2-2-2-2-1---------3|Q-{.{.{.{.{.{.{.{.{.{.{.{.{.{. >4|x+C 2 2 2 2 x+x+^ ^ ^ ^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$r$`.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ j+[ [ [ [ [ T$: : : : : c+< < < < b+b+K.K.K.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.0.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r s t u u u v w x x y z S S T T ,.,.d.d.2.2.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f,O >@>@W.W.1+Q.~+~+~+<+<+=.=.=.`+g@H+H+H+G+4.4.q.q.v.n n r#r#9.K.K.K.b+b+< < < < c+: : : : T$#%[ [ [ [ j+_ _ _ _ _ u%} } } } Q%Q%X X X X ( ( | | | | n.n.`.r$r$r$/ / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C y%] ] e={.{.{.{.{.{.{.{.{.{.Z-w.w.w.X&X&X&+={ { { { { )=)=)=)=g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D D t=t=_._.*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 {+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+{+6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 P=P=P=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.g.)=)=)=)={ { w.5|d-1---------------6|7|{.{.{.{.{.{.{.{.{.{.{.{.{.{.{.8|9|2 2 x+x+^ ^ ^ ^ ^ R&>$>$U+U+U+1 1 [@/ / / r$r$r$`.n.n.| | | | ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ #%T$: : : : c+c+< < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R q q r r r t u u u v w x x y z S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+}+}+5+5+i+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u.!@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z&O >@>@W.W.1+Q.~+~+~+<+<+=.=.=.`+`+H+H+H+H+4.4.q.q.q.n n r#r#9.K.K.K.b+b+< < < < c+: : : : : T$[ [ [ [ [ j+_ _ _ _ u%d#} } } } Q%X X X X X ( ( | | | n.n.n.`.r$r$/ / / / [@1 1 U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C y%e={.{.{.{.{.{.{.{.{.{.Z-6@3 w.w.w.X&X&X&X&+={ { { { { )=)=)=)=g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D t=t=_._.*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 P=P=P=P=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@_._.t=t=D D D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+g.g.g.g.g.g.g.)=)=)=)={ { { { { +=X&l;0|----------=-=-=-=-:-k>{.{.{.{.{.{.{.{.{.{.{.{.{.{./;a|a&^ ^ ^ ^ ^ R&>$>$U+U+U+U+1 [@/ / / / r$r$`.n.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ _ [ [ [ [ [ #%: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.p p p f.r.k.k.a.b.b.<.[.[.-.-.Q Q R R R q r r r t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o%f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X.d#B >@>@W.W.1+1+~+~+~+~+<+=.=.=.`+`+H+H+H+H+G+4.q.q.q.n n n r#r#K.K.K.b+b+b+< < < c+c+: : : : T$#%[ [ [ [ j+_ _ _ _ _ u%} } } } Q%Q%X X X X ( ( ( | | | n.n.n.`.r$r$/ / / / [@1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C b|{.{.{.{.{.{.{.{.{.{.Z-6@6@6@3 w.w.w.w.X&X&X&+=+={ { { { { )=)=)=)=g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=D D D D D D D D D D D t=t=_._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=O=O=P=P=P=P=P=6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 P=P=P=P=P=O=O=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._.t=t=t=D D D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.)=)=)=)=)={ { { { { +=X&X&X&X&f;c|d-=-=-=-=-=-=-*-*-I-~-g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.d|e|^ ^ R&>$>$U+U+U+U+1 1 [@/ / / r$r$r$`.n.n.| | | | ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ [ T$: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.4.4.H+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R q q r r t t u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@_@_@_@7@i@i@i@P@P@t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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D+g@B >@>@W.W.1+1+~+~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.K.b+b+< < < < c+: : : : : #%[ [ [ [ [ j+_ _ _ _ u%d#} } } } Q%Q%X X X X ( ( | | | | n.n.`.r$r$r$/ / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 b|{.{.{.{.{.{.{.{.{.{.Z-Z+6@6@6@6@3 3 w.w.w.X&X&X&X&+={ { { { { { )=)=)=)=g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D D D t=t=_._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=O=O=O=O=O=O=O=O=P=P=P=P=P=P=P=P=P=P=P=P=P=P=P=P=P=P=P=O=O=O=O=O=O=O=O=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._.t=t=t=D D D D D D D D D D D i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+g.g.g.g.g.g.g.g.)=)=)=)={ { { { { +=X&X&X&X&w.w.w.w.3 l;0|=-=-=-*-*-*-a-a-a-f|B-{.{.{.{.{.{.{.{.{.{.{.{.{.{.t]g|7%>$U+U+U+U+1 1 [@/ / / r$r$r$`.n.n.n.| | | ( ( ( X X X X Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ #%T$: : : : c+c+< < < b+b+b+K.K.K.r#r#n n n q.q.q.4.4.H+H+H+H+`+`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R q q r r s t u u v w x x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J%B B >@>@W.W.1+1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.K.b+b+< < < < c+: : : : : T$#%[ [ [ [ j+_ _ _ _ _ u%} } } } } Q%X X X X ( ( ( | | | n.n.n.`.r$r$r$/ / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 b|{.{.{.{.{.{.{.{.{.{.Z-y*Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&+={ { { { { { )=)=)=)=g.g.g.g.g.g.g.g.)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D D D D D t=t=_._._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@O=O=O=O=O=O=O=O=O=O=O=O=*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._.t=t=t=D D D D D D D D D D D D i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.)=)=)=)=)={ { { { { +=+=X&X&X&w.w.w.w.3 6@6@6@6@6@h|i|*-*-a-a-a-a-a-__j|k|g-{.{.{.{.{.{.{.{.{.{.{.{.{.{.l|m|U+U+1 1 [@/ / / / r$r$`.n.n.n.| | | ( ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ [ #%: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+`+=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B o o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q q r r s t u u v w w x y y z S T T T ,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=[.z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 B B O >@>@W.W.1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+H+4.4.q.q.q.n n r#r#r#K.K.K.b+b+b+< < < c+c+: : : : T$#%[ [ [ [ [ j+_ _ _ _ u%d#} } } } Q%Q%X X X X ( ( ( | | | n.n.n.`.r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+n|o|o|o|o|o|o|o|o|o|o|p|] ] y*Z+Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&+={ { { { { { )=)=)=)=g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=D D D D D D D D D D D D D D t=t=t=t=_._._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._._.t=t=t=t=D D D D D D D D D D D D D D i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.)=)=)=)=)={ { { { { +=+=X&X&X&X&w.w.w.w.3 6@6@6@6@6@Z+Z+y*y$q|a-a-a-a-__r|r|>->-s|t|{.{.{.{.{.{.{.{.{.{.{.{.{.{.g-u|1 [@/ / / / r$r$r$n.n.n.| | | | ( ( X X X X X Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ #%T$: : : : c+c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@B B o o o @V m.m.m. + +y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.<.<.[.-.-.;.Q R R R q q r r s t u u v v w x y y z S S T T ,.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Y+D+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.^ B B O >@>@W.W.1+Q.~+~+~+<+<+=.=.=.`+`+H+H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.K.b+b+< < < < c+: : : : : T$[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } Q%X X X X X ( ( | | | | n.n.n.`.r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 C C C y%] ] ] ] ] ] y*Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&X&+={ { { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=D D D D D D D D D D D D D D D D D t=t=t=t=t=_._._._._._._.*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@*@_._._._._._._.t=t=t=t=t=D D D D D D D D D D D D D D D D D i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.g.)=)=)=)={ { { { { { +=+=X&X&X&X&w.w.w.w.3 6@6@6@6@6@Z+Z+Z+y*] ] ] ] v|M(__r|r|>->->->->-j|w|1_{.{.{.{.{.{.{.{.{.{.{.{.{.x|/ / / / r$r$r$`.n.n.| | | | ( ( ( X X X X Q%Q%} } } } d#_ _ _ _ _ j+[ [ [ [ [ #%: : : : : c+c+< < < b+b+b+K.K.K.r#r#r#n n q.q.q.4.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+Q.1+1+W.W.>@>@B B o o o @V m.m.m. + +y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.a.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u v v w x x y z S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=d&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@b+B B O >@>@W.W.1+Q.~+~+~+~+<+=.=.=.`+`+g@H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.K.b+b+< < < < c+c+: : : : T$#%[ [ [ [ [ j+_ _ _ _ _ d#} } } } Q%Q%X X X X ( ( ( | | | | n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@3 w.w.w.w.X&X&X&X&X&+={ { { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=D D D D D D D D D D D D D D D D D D D D D D D D D t=t=t=t=t=t=t=t=t=t=t=t=t=t=t=t=t=t=t=t=D D D D D D D D D D D D D D D D D D D D D D D D D i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+g.g.g.g.g.g.g.g.g.)=)=)=)=)={ { { { { { +=+=X&X&X&X&w.w.w.w.3 6@6@6@6@6@6@Z+Z+y*] ] ] ] ] ] y%C y$y|>->->->->-%-%-S=S=z|A|{.{.{.{.{.{.{.{.{.{.{.{.9=/ / r$r$r$`.n.n.n.| | | ( ( ( X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ #%T$: : : : : c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.4.H+H+H+H+g@`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o o V V m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r s t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=g.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+1+B B O >@>@W.W.1+1+~+~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.4.q.q.q.n n r#r#r#K.K.K.b+b+b+< < < < c+: : : : : T$[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } Q%Q%X X X X ( ( ( | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%y%] ] ] ] ] ] y*Z+Z+6@6@6@6@6@6@3 w.w.w.w.X&X&X&X&X&+={ { { { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=i=i=D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D i=i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+g.g.g.g.g.g.g.g.g.)=)=)=)=)=)={ { { { { { +=+=X&X&X&X&w.w.w.w.3 3 6@6@6@6@6@Z+Z+y*y*] ] ] ] ] ] y%C C 2 2 2 B|M(>-%-%-S=S=S=S=S=A=C|/;{.{.{.{.{.{.{.{.{.{.9=r$r$r$`.n.n.n.| | | | ( ( X X X X X Q%} } } } } u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : c+c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+H+`+`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@O B B o o o V V m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.;.Q R R R q q r r r t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%6%6%o%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=>@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a o o B B >@>@W.W.1+1+Q.~+~+~+<+=.=.=.=.`+g@H+H+H+H+4.4.q.q.q.v.n n r#r#9.K.K.K.b+b+< < < < c+c+: : : : T$#%[ [ [ [ [ j+_ _ _ _ _ u%} } } } } Q%X X X X X ( ( ( | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%] ] ] ] ] ] y*y*Z+Z+6@6@6@6@6@6@3 w.w.w.w.w.X&X&X&X&+=+={ { { { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=i=i=i=i=i=D D D D D D D D D D D D D D D D D D D D D D D D D D D D D i=i=i=i=i=i=i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)={ { { { { { { +=X&X&X&X&X&w.w.w.w.3 3 6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] y%C C C 2 2 2 2 2 2 y$D|S=S=S=S=S=A=A=A=A=E|F|{.{.{.{.{.{.{.{.{.x|r$`.n.n.n.| | | | ( ( X X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ #%T$: : : : : c+< < < < b+b+b+K.K.K.r#r#r#n n v.q.q.4.4.G+H+H+H+g@`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o V V m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r r t u u u v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+}+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@7@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&>*9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D o o B B >@>@>@W.W.1+Q.~+~+~+<+<+=.=.=.`+`+H+H+H+H+G+4.q.q.q.v.n n r#r#9.K.K.K.b+b+b+< < < < c+: : : : : T$#%[ [ [ [ j+_ _ _ _ _ u%d#} } } } Q%Q%X X X X X ( ( | | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C y%y%] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@6@3 w.w.w.w.w.X&X&X&X&X&+={ { { { { { { { )=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=i=~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)={ { { { { { { +=+=X&X&X&X&X&w.w.w.w.3 3 6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] ] y%C C 2 2 2 2 2 2 x+x+x+^ ^ G|L(S=A=A=A=A=A=A=A=H|~-/;{.{.{.{.{.{.{.I|n.n.n.| | | | ( ( ( X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : c+c+< < < < b+b+K.K.K.9.r#r#n n v.q.q.q.4.4.H+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@O B B o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q R R R q q r r r t t u u v w x x y y S S T T T ,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@i@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=q$y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.} o o B B O >@>@W.W.1+Q.~+~+~+~+<+=.=.=.=.`+g@H+H+H+G+4.4.q.q.q.n n n r#r#9.K.K.K.b+b+< < < < c+c+: : : : T$#%[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } Q%Q%X X X X X ( ( | | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 C C y%] ] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@6@3 3 w.w.w.w.X&X&X&X&X&+=+={ { { { { { { { )=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)={ { { { { { { +=+=X&X&X&X&X&w.w.w.w.w.3 6@6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ `.J|A=A=A=A=A=A=A=K|L|M|N|{.{.{.{.{.{.O|n.| | | | ( ( ( X X X X Q%Q%} } } } } d#_ _ _ _ _ _ [ [ [ [ [ #%T$: : : : : c+< < < < b+b+b+K.K.K.9.r#r#n n v.q.q.q.4.G+H+H+H+H+`+`+=.=.=.=.<+~+~+~+Q.1+1+W.W.>@>@B B B o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q R R R R q r r r t t u u v w x x y y z S T T T ,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p=H+o o B B O >@>@W.W.1+1+~+~+~+~+<+=.=.=.=.`+g@H+H+H+H+4.4.q.q.q.v.n n r#r#9.K.K.K.b+b+b+< < < < c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ u%} } } } } Q%Q%X X X X ( ( ( | | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@6@3 3 w.w.w.w.w.X&X&X&X&X&+=+={ { { { { { { { )=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+)+)+~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ )+)+)+)+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)={ { { { { { { { +=+=X&X&X&X&X&w.w.w.w.w.3 3 6@6@6@6@6@6@Z+Z+Z+y*y*] ] ] ] ] ] y%y%C C 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&>$>$U+G|L(A=A=A=u=n=H|L|L|P|{.{.{.{.{.{.Q|| | | ( ( ( X X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%: : : : : c+c+< < < < b+b+K.K.K.9.r#r#n n n v.q.q.q.4.G+H+H+H+g@`+`+=.=.=.<+<+~+~+~+Q.1+W.W.>@>@>@B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+:.:.:.:.:.#+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q r r r t t u u v w w x y y z S T T T ,.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%3&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.O o o B B O >@>@W.W.1+1+~+~+~+~+<+<+=.=.=.`+`+H+H+H+H+G+4.q.q.q.v.n n r#r#r#9.K.K.K.b+b+< < < < c+c+: : : : : #%[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } } Q%Q%X X X X ( ( ( | | | | n.n.n.`.r$r$r$/ / / / [@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] y*Z+Z+Z+Z+6@6@6@6@6@6@3 3 w.w.w.w.w.X&X&X&X&X&X&+=+={ { { { { { { { { )=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+)+g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)={ { { { { { { { { +=+=X&X&X&X&X&X&w.w.w.w.w.3 3 6@6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+B*R|u=n=n=n=H|L|L|S|{.{.{.{.{.{.u|| ( ( ( X X X X X Q%Q%} } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+< < < < b+b+b+K.K.K.9.r#r#n n v.q.q.q.4.4.H+H+H+H+g@`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o @V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q r r r s t u u v w w x y y z S S T T >.,.d.d.d.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m@ @o o o B B >@>@W.W.W.1+Q.~+~+~+<+<+=.=.=.`+`+g@H+H+H+G+4.4.q.q.q.v.n n r#r#9.K.K.K.b+b+b+< < < < c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } } Q%X X X X X ( ( ( | | | | n.n.n.`.r$r$r$/ / / / [@[@1 1 U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ x+x+2 2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@6@3 w.w.w.w.w.w.X&X&X&X&X&X&+=+={ { { { { { { { { { )=)=)=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)=)={ { { { { { { { { { +=+=X&X&X&X&X&X&w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@Z+Z+Z+y*] ] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&>$>$U+U+U+U+U+1 1 [@/ T|L(n=j=U|L|V|W|{.{.{.{.{.{.X|( ( X X X X X Q%Q%} } } } d#u%_ _ _ _ _ _ [ [ [ [ [ [ T$: : : : : c+c+< < < < b+b+K.K.K.K.r#r#r#n n v.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+~+~+~+~+1+1+W.W.>@>@O B B o o o V V m.m.m. + +y+y+y+y+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u v w w x y y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=T 6.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 @o o o B B O >@>@W.W.1+Q.~+~+~+~+<+=.=.=.=.`+g@H+H+H+H+G+4.q.q.q.v.n n r#r#r#K.K.K.K.b+b+< < < < c+c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } Q%Q%X X X X X ( ( ( | | | | n.n.n.`.r$r$r$/ / / / / [@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] ] y*Z+Z+Z+6@6@6@6@6@6@6@6@3 w.w.w.w.w.w.X&X&X&X&X&X&X&+=+=+={ { { { { { { { { { { )=)=)=)=)=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)=)=)=)={ { { { { { { { { { { { +=+=X&X&X&X&X&X&X&w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@Z+Z+Z+y*y*] ] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ R&R&>$>$U+U+U+U+1 1 1 [@/ / / / H.Y|j=H|V|V|W|{.{.{.{.{.{.Z|X X X X X Q%Q%} } } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+< < < < b+b+b+K.K.K.9.r#r#n n n q.q.q.4.4.G+H+H+H+g@`+`+=.=.=.<+<+~+~+~+Q.1+1+W.W.>@>@O B B o o o V V m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u v v w x x y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.=+,+,+,+}+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=L+H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . { V o o o B B O >@>@W.W.1+1+~+~+~+~+<+=.=.=.=.`+`+H+H+H+H+G+4.4.q.q.q.n n n r#r#9.K.K.K.b+b+b+< < < < c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ _ u%d#} } } } Q%Q%X X X X X ( ( ( | | | | n.n.n.`.r$r$r$r$/ / / / [@1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 C C C y%] ] ] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@6@6@3 3 w.w.w.w.w.w.X&X&X&X&X&X&X&X&+=+=+={ { { { { { { { { { { { { )=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=g.g.g.g.g.g.g.g.g.g.g.g.g.g.)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)={ { { { { { { { { { { { { { +=+=+=X&X&X&X&X&X&X&w.w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@Z+Z+Z+Z+y*] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$U+U+U+U+U+1 1 [@[@/ / / / r$r$r$`.T|z|V|`| 1{.{.{.{.{.{..1X X X Q%Q%} } } } } d#u%_ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+K.K.K.K.r#r#r#n n v.q.q.q.4.4.H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+Q.1+W.W.W.>@>@B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u v v w x x y z S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o%e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;@n.V o o o B B O >@>@W.W.1+1+Q.~+~+~+<+<+=.=.=.=.`+g@H+H+H+H+4.4.q.q.q.v.n n r#r#r#K.K.K.K.b+b+< < < < c+c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ _ u%} } } } } Q%Q%X X X X X ( ( ( | | | | n.n.n.`.`.r$r$r$/ / / / [@[@1 1 U+U+U+U+U+>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] y*y*Z+Z+Z+6@6@6@6@6@6@6@6@3 3 3 w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&+=+=+=+={ { { { { { { { { { { { { { { { { { { )=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)=)={ { { { { { { { { { { { { { { { { { { +=+=+=X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@6@Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 [@/ / / / / r$r$r$`.n.n.n.+1@1L|#1{.{.{.{.{.{.$1X Q%Q%} } } } } d#u%_ _ _ _ _ j+[ [ [ [ [ [ #%: : : : : : c+< < < < b+b+b+K.K.K.9.r#r#n n n q.q.q.q.4.G+H+H+H+H+`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.p p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u v v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+n+n+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.< V @o o o B B >@>@>@W.W.1+Q.~+~+~+~+<+=.=.=.=.`+`+H+H+H+H+G+4.q.q.q.q.n n n r#r#9.K.K.K.b+b+b+< < < < c+c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ u%d#} } } } } Q%Q%X X X X X ( ( ( | | | | n.n.n.n.`.r$r$r$/ / / / / [@1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+6@6@6@6@6@6@6@6@3 3 3 w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&X&X&+=+=+=+={ { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { { +=+=+=+=X&X&X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.w.3 3 6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] y%C C C 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ R&R&>$>$U+U+U+U+U+1 1 1 [@/ / / / r$r$r$r$`.n.n.n.| | %11=X|&1{.{.{.{.{.{.*1Q%} } } } } d#u%_ _ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+K.K.K.K.r#r#r#n n v.q.q.q.4.4.H+H+H+H+g@`+`+=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@O B B o o o @V m.m.m. + +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u v v w x x y y S S T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+B+B+L+P+Y+Y++@+@=@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H =.V @o o o B B O >@>@W.W.1+1+~+~+~+~+<+<+=.=.=.`+`+g@H+H+H+H+4.4.q.q.q.v.n n r#r#r#9.K.K.K.b+b+< < < < < c+: : : : : : #%[ [ [ [ [ [ j+_ _ _ _ _ u%d#} } } } } Q%Q%X X X X X ( ( ( | | | | | n.n.n.`.r$r$r$r$/ / / / [@1 1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 C C C y%y%] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@3 3 3 w.w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&X&X&X&X&X&X&+=+=+=+=+=+=+=+={ { { { { { { { { { { { { { { { { { { { { +=+=+=+=+=+=+=+=+=X&X&X&X&X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.w.w.w.3 3 3 6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 [@/ / / / / r$r$r$`.`.n.n.n.| | | | =1/=/=-1{.{.{.{.{.{.;1} } } } d#u%_ _ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#n n n q.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+Q.1+W.W.W.>@>@O B B o o o V V m.m.m. + +y+y+y+y+z+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p f.r.r.k.a.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y S S T T T ,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#o V V o o o B B O >@>@W.W.1+1+Q.~+~+~+<+<+=.=.=.=.`+g@H+H+H+H+G+4.q.q.q.q.n n n r#r#9.K.K.K.b+b+b+< < < < c+c+: : : : : T$#%[ [ [ [ [ [ j+_ _ _ _ _ u%d#} } } } } Q%Q%X X X X X ( ( ( ( | | | | n.n.n.`.`.r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 C C C C y%y%] ] ] ] ] ] ] ] ] ] y*y*Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@3 3 3 3 w.w.w.w.w.w.w.w.w.w.w.w.X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&X&w.w.w.w.w.w.w.w.w.w.w.w.3 3 3 6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] ] y%y%C C C 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 1 [@/ / / / / r$r$r$`.n.n.n.n.| | | | ( ( >1====,1{.{.{.{.{.{.'1} } d#u%_ _ _ _ _ _ j+[ [ [ [ [ #%T$: : : : : : c+< < < < < b+b+K.K.K.9.r#r#r#n n v.q.q.q.4.4.G+H+H+H+g@`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.>@>@>@B B o o o @V m.m.m.m. +y+y+y+y+y+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.p p p r.r.k.k.a.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y S S T T T ,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%6%6%o%P%P%3&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=:./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b m.V V @o o B B B >@>@>@W.W.1+Q.~+~+~+~+<+=.=.=.=.`+`+g@H+H+H+H+4.4.q.q.q.v.n n r#r#r#9.K.K.K.b+b+b+< < < < c+c+: : : : : T$#%[ [ [ [ [ [ _ _ _ _ _ _ u%d#} } } } } Q%Q%X X X X X X ( ( ( | | | | n.n.n.n.`.r$r$r$r$/ / / / [@[@1 1 U+U+U+U+U+U+>$>$R&R&^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 C C C C y%y%] ] ] ] ] ] ] ] ] ] y*y*y*Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@3 3 3 3 w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.3 3 3 3 6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+y*y*] ] ] ] ] ] ] ] ] ] ] y%y%C C C C 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+1 1 1 [@/ / / / / r$r$r$r$`.n.n.n.| | | | | ( ( ( X =1====)1{.{.{.{.{.{.!1d#u%_ _ _ _ _ _ j+[ [ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#n n n q.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0..+R.p p p r.r.k.k.a.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y S S T T T ,.d.d.d.2.2.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+}+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=z h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , m.m.V @o o o B B O >@>@W.W.1+1+~+~+~+~+<+<+=.=.=.=.`+g@H+H+H+H+G+4.q.q.q.q.v.n n r#r#r#K.K.K.K.b+b+< < < < < c+c+: : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ _ u%d#} } } } } Q%Q%X X X X X X ( ( ( | | | | | n.n.n.`.r$r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ ^ x+x+x+2 2 2 2 2 2 2 2 2 C C C C y%y%] ] ] ] ] ] ] ] ] ] ] ] y*y*y*Z+Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@3 3 3 3 3 3 3 w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.w.3 3 3 3 3 3 3 6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+y*y*y*] ] ] ] ] ] ] ] ] ] ] y%y%C C C C 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$U+U+U+U+U+U+1 1 [@/ / / / / / r$r$r$`.n.n.n.n.| | | | ( ( ( ( X X X =1==J*~1{.{.{.{.{.{.{1_ _ _ _ _ _ j+[ [ [ [ [ [ #%T$: : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#r#n n v.q.q.q.4.4.G+H+H+H+H+`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o V V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0..+R.p p p r.r.k.k.a.a.b.b.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.t.u.u.u.u.N.N.N.N.=+,+,+,+}+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=L+H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g.m.m.V @o o o B B O >@>@W.W.W.1+Q.~+~+~+~+<+=.=.=.=.`+`+g@H+H+H+H+4.4.q.q.q.v.n n n r#r#9.K.K.K.b+b+b+< < < < c+c+: : : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ _ u%d#} } } } } } Q%Q%X X X X X ( ( ( ( | | | | n.n.n.n.`.r$r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+U+>$>$>$R&^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 2 C C C C y%y%] ] ] ] ] ] ] ] ] ] ] ] ] y*y*y*Z+Z+Z+Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+Z+y*y*y*] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%C C C C 2 2 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$U+U+U+U+U+U+1 1 [@[@/ / / / / r$r$r$r$`.n.n.n.n.| | | | ( ( ( ( X X X X X ]1J*J*~1{.{.{.{.{.{.)1_ _ _ _ j+[ [ [ [ [ [ #%T$: : : : : c+c+< < < < < b+b+K.K.K.K.9.r#r#n n n q.q.q.q.4.G+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+~+Q.1+W.W.>@>@>@B B B o o @V V m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.t.u.u.u.u.N.N.N.N.=+,+,+,+,+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o%K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.r$m.m.V V @o o B B B >@>@>@W.W.1+1+~+~+~+~+<+<+=.=.=.=.`+g@H+H+H+H+G+4.4.q.q.q.v.n n r#r#r#9.K.K.K.b+b+b+< < < < c+c+: : : : : : T$#%[ [ [ [ [ j+_ _ _ _ _ _ u%d#} } } } } } Q%Q%X X X X X ( ( ( ( | | | | | n.n.n.`.`.r$r$r$r$/ / / / / [@1 1 1 U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 2 C C C C C y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y*y*y*y*Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@6@Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+y*y*y*y*] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%C C C C 2 2 2 2 2 2 2 2 2 2 2 x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$U+U+U+U+U+U+1 1 [@[@/ / / / / r$r$r$r$`.n.n.n.n.| | | | | ( ( ( X X X X X X Q%Q%]1J*J*)1{.{.{.{.{.{.^1_ _ j+[ [ [ [ [ [ #%T$: : : : : : c+< < < < < b+b+b+K.K.K.9.r#r#n n n v.q.q.q.4.4.G+H+H+H+H+`+`+=.=.=.=.<+<+~+~+~+Q.1+1+W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+y+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r s t u u u v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+n+n+q+B+B+L+P+Y+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%6%o%o%P%P%3&3&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.T#m.m.m.V @o o o B B O >@>@W.W.1+1+Q.~+~+~+~+<+=.=.=.=.`+`+g@H+H+H+H+4.4.q.q.q.q.n n n r#r#9.K.K.K.K.b+b+b+< < < < c+c+: : : : : : #%[ [ [ [ [ [ j+_ _ _ _ _ _ u%u%d#} } } } } Q%Q%X X X X X X ( ( ( | | | | | n.n.n.n.`.r$r$r$r$/ / / / / / [@1 1 1 U+U+U+U+U+U+>$>$>$>$R&^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 C C C C C y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y*y*y*y*y*y*Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+Z+y*y*y*y*y*y*y*] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%C C C C C 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$U+U+U+U+U+U+1 1 1 [@[@/ / / / / r$r$r$r$`.`.n.n.n.| | | | | ( ( ( ( X X X X X X Q%Q%} } ]1J*J*{1{.{.{.{.{.{.-1j+[ [ [ [ [ [ #%T$: : : : : : c+c+< < < < b+b+b+K.K.K.9.r#r#r#n n v.q.q.q.q.4.G+H+H+H+H+g@`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o @V m.m.m.m. +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q R R R R q q r r s t u u u v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.u.u.u.u.N.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+P+P+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D+!#m.m.m.V @o o o B B O >@>@>@W.W.1+Q.~+~+~+~+<+<+=.=.=.=.`+g@H+H+H+H+G+4.4.q.q.q.v.n n n r#r#9.K.K.K.K.b+b+< < < < < c+c+: : : : : T$#%[ [ [ [ [ [ j+_ _ _ _ _ _ _ u%d#} } } } } Q%Q%Q%X X X X X ( ( ( ( | | | | | n.n.n.n.`.r$r$r$r$/ / / / / / [@1 1 1 1 U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C y%y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$>$U+U+U+U+U+U+1 1 1 [@[@/ / / / / r$r$r$r$r$`.n.n.n.n.| | | | | ( ( ( X X X X X X Q%Q%} } } } } %1K*F*/1{.{.{.{.{.{.(1[ [ [ [ [ #%T$: : : : : : c+c+< < < < b+b+b+K.K.K.K.9.r#r#n n n v.q.q.q.4.4.H+H+H+H+H+`+`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@O B B B o o o V V m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0..+R.R.p p f.r.r.k.k.a.b.b.<.<.[.-.-.;.Q R R R R q q r r s t u u u v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=[ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y.W.m.m.m.V V @o o o B B O >@>@W.W.1+1+Q.~+~+~+~+<+=.=.=.=.`+`+g@H+H+H+H+G+4.q.q.q.q.v.n n r#r#r#9.K.K.K.b+b+b+< < < < < c+c+: : : : : T$#%[ [ [ [ [ [ j+_ _ _ _ _ _ _ u%d#} } } } } } Q%Q%X X X X X X ( ( ( ( | | | | | n.n.n.n.`.r$r$r$r$/ / / / / / [@[@1 1 1 U+U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C C C y%y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%y%C C C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&>$>$>$>$U+U+U+U+U+U+U+1 1 1 [@[@/ / / / / r$r$r$r$r$`.n.n.n.n.| | | | | ( ( ( ( X X X X X X Q%Q%} } } } } } d#]1r*r*_1{.{.{.{.{.{.:1[ [ [ #%T$: : : : : : c+c+< < < < < b+b+K.K.K.K.9.r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+~+~+~+~+Q.1+W.W.W.>@>@O B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R R q q r r s t u u u v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=m./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K$B m.m.m.m.V @o o o B B O >@>@W.W.W.1+Q.~+~+~+~+<+<+=.=.=.=.`+g@H+H+H+H+G+4.4.q.q.q.v.n n n r#r#r#9.K.K.K.b+b+b+< < < < < c+c+: : : : : T$#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ u%d#} } } } } } Q%Q%X X X X X X ( ( ( ( | | | | | | n.n.n.n.`.r$r$r$r$/ / / / / / / [@1 1 1 1 U+U+U+U+U+U+U+>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C C C C C y%y%y%y%y%y%y%y%y%y%] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] y%y%y%y%y%y%y%y%y%y%C C C C C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$>$U+U+U+U+U+U+U+1 1 1 1 [@/ / / / / / r$r$r$r$r$`.n.n.n.n.| | | | | | ( ( ( X X X X X X Q%Q%Q%} } } } } d#d#u%_ +1r*r*!1{.{.{.{.{.{.<1[ #%T$: : : : : : c+c+< < < < < b+b+b+K.K.K.9.r#r#r#n n v.q.q.q.q.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@>@B B B o o o @V m.m.m.m. +y+y+y+y+y+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.[.[.-.-.;.Q R R R R q r r r s t u u u v w x x y y S S T T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#8$8$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=#+;@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . & V m.m.m.m.V V o o o B B B O >@>@W.W.1+1+Q.~+~+~+~+<+=.=.=.=.`+`+g@H+H+H+H+G+4.4.q.q.q.v.n n n r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : T$#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ u%u%d#} } } } } Q%Q%Q%X X X X X X ( ( ( ( | | | | | n.n.n.n.n.`.r$r$r$r$r$/ / / / / / [@[@1 1 1 U+U+U+U+U+U+U+U+>$>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$>$U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / r$r$r$r$r$`.n.n.n.n.| | | | | | ( ( ( ( X X X X X X Q%Q%} } } } } } d#u%_ _ _ _ ]1r*r*[1{.{.{.{.{.{.}1T$: : : : : : c+c+< < < < < b+b+b+K.K.K.9.r#r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+=.=.=.=.=.<+~+~+~+~+Q.1+1+W.W.>@>@O B B o o o @V V m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0..+R.p p p r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q R R R q q r r r s t u u v v w x x y y S S T T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$q$&%6%o%o%P%P%3&3&t&t&>*9*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=-.A.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b + +m.m.m.m.V @o o o B B O >@>@W.W.W.1+Q.~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+G+4.q.q.q.q.v.n n n r#r#9.K.K.K.K.b+b+b+< < < < < c+: : : : : : : T$#%[ [ [ [ [ [ j+_ _ _ _ _ _ _ u%d#} } } } } } Q%Q%X X X X X X X ( ( ( ( | | | | | n.n.n.n.n.`.r$r$r$r$r$/ / / / / / / [@[@1 1 1 U+U+U+U+U+U+U+U+>$>$>$>$>$R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&>$>$>$>$U+U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / / r$r$r$r$`.`.n.n.n.n.| | | | | | ( ( ( ( X X X X X X Q%Q%Q%} } } } } } d#u%_ _ _ _ _ _ ]1s*7*|1{.{.{.{.{.{.11: : : : : c+c+< < < < < b+b+b+K.K.K.K.9.r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+1+1+W.W.>@>@>@O B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0.R.R.p p p r.r.k.k.a.a.b.b.<.[.-.-.-.;.Q R R R q q r r r s t u u v v w x x y y S S T T T >.,.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+}+5+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w 7.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F y+ +m.m.m.m.V @o o o B B B >@>@>@W.W.1+1+Q.~+~+~+~+<+=.=.=.=.=.`+g@H+H+H+H+G+4.4.q.q.q.q.v.n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : T$#%[ [ [ [ [ [ j+_ _ _ _ _ _ _ u%d#d#} } } } } } Q%Q%X X X X X X X ( ( ( ( | | | | | | n.n.n.n.`.`.r$r$r$r$r$/ / / / / / / [@[@1 1 1 1 U+U+U+U+U+U+U+U+>$>$>$>$>$R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+x+x+x+x+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 x+x+x+x+x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&>$>$>$>$U+U+U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / / r$r$r$r$r$`.`.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%} } } } } } d#u%u%_ _ _ _ _ _ _ j++17*7*|1{.{.{.{.{.{.11: : : c+c+< < < < < b+b+b+K.K.K.K.9.r#r#r#n n v.q.q.q.q.4.G+H+H+H+H+H+g@`+=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@O B B o o o o V V m.m.m.m. +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.#+#+#+#+#+3.0.0.0.0.R.R.p p f.r.r.k.k.a.a.b.b.<.[.-.-.-.;.Q R R R q q r r r t t u u v v w x x y y S S T T T >.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=e.@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^+y+ + +m.m.m.V V @o o o B B O >@>@W.W.W.1+Q.~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+G+4.4.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : T$#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ _ u%d#} } } } } } Q%Q%Q%X X X X X X X ( ( ( ( | | | | | | n.n.n.n.n.`.r$r$r$r$r$r$/ / / / / / / [@[@1 1 1 1 U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+x+^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&R&>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / / r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } d#u%_ _ _ _ _ _ _ j+[ [ [ +17*7*21{.{.{.{.{.{.31: c+c+< < < < < b+b+b+K.K.K.K.9.r#r#r#n n v.q.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+~+~+~+~+~+1+1+W.W.>@>@>@O B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r r t t u u v v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+}+5+5+5+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w==+^.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . o.y+ + +m.m.m.m.V @o o o B B B >@>@>@W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+G+4.4.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : T$#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ _ u%d#d#} } } } } } Q%Q%Q%X X X X X X X ( ( ( ( | | | | | | n.n.n.n.n.`.`.r$r$r$r$r$r$/ / / / / / / / [@[@1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$R&R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&>$>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 [@[@/ / / / / / / / r$r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } d#u%u%_ _ _ _ _ _ _ j+[ [ [ [ [ +17*1*41{.{.{.{.{.{.51c+< < < < < b+b+b+K.K.K.K.9.r#r#r#n n n v.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@O B B B o o o @V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r r t t u u v v w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+}+}+5+5+5+n+n+q+B+B+L+P+P+Y++@+@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=B+j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *@y+y+ +m.m.m.m.V V @o o o B B O >@>@W.W.W.1+1+~+~+~+~+~+<+=.=.=.=.=.`+g@H+H+H+H+H+G+4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : T$#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ u%d#} } } } } } } Q%Q%Q%X X X X X X X ( ( ( ( | | | | | | | n.n.n.n.n.`.`.r$r$r$r$r$r$/ / / / / / / / [@[@[@1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$>$>$R&R&R&R&R&R&^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ R&R&R&R&R&>$>$>$>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 [@[@/ / / / / / / / / r$r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | ( ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } } d#u%_ _ _ _ _ _ _ j+j+[ [ [ [ [ [ #%61W&W&;1{.{.{.{.{.{.71< < < < b+b+b+K.K.K.K.9.r#r#r#n n n v.q.q.q.4.4.G+H+H+H+H+H+g@`+=.=.=.=.=.<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o @V V m.m.m.m. +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0..+R.p p p r.r.r.k.k.a.b.b.<.[.[.-.-.-.Q Q R R R q q r r r t t u u v w w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+n+n+q+B+B+L+P+P+Y++@+@=@'@'@_@_@7@7@i@i@H@P@t#t#U#8$8$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=7@y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.81y+y+ + +m.m.m.m.V @o o o B B B O >@>@W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : : T$#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ _ u%u%d#} } } } } } } Q%Q%Q%X X X X X X X ( ( ( ( ( | | | | | | | n.n.n.n.n.`.`.r$r$r$r$r$r$/ / / / / / / / / / [@[@[@1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$>$>$>$>$>$>$>$R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&R&>$>$>$>$>$>$>$>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 [@[@[@/ / / / / / / / / r$r$r$r$r$r$r$`.`.n.n.n.n.n.| | | | | | | ( ( ( ( ( X X X X X X X Q%Q%Q%} } } } } } } d#u%_ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ #%T$: 91W&W&01{.{.{.{.{.{.a1< < b+b+b+K.K.K.K.9.r#r#r#n n n v.q.q.q.q.4.G+H+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+W.W.W.>@>@O B B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0.R.R.p p p r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q R R R R q q r r s t u u u v w w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@P@t#U#U#8$q$&%&%6%o%o%P%P%3&3&t&t&>*9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=U#e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.] y+y+y+ +m.m.m.m.V V @o o o B B O >@>@>@W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : : T$#%[ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ u%u%d#} } } } } } } Q%Q%Q%X X X X X X X X ( ( ( ( ( | | | | | | | n.n.n.n.n.n.`.`.r$r$r$r$r$r$/ / / / / / / / / / / [@[@[@1 1 1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$>$U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 1 1 [@[@[@/ / / / / / / / / / r$r$r$r$r$r$r$`.`.n.n.n.n.n.n.| | | | | | | ( ( ( ( ( X X X X X X X X Q%Q%Q%} } } } } } } d#u%u%_ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ #%T$: : : 91W&W&b1{.{.{.{.{.{.c1b+b+b+K.K.K.K.9.r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o @V V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q R R R R q q r r s t u u u v w w x x y y S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=P%G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.U+y+y+y+ + +m.m.m.m.V @o o o B B B O >@>@W.W.W.1+Q.~+~+~+~+~+<+=.=.=.=.=.`+`+g@H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < c+c+: : : : : : : T$#%#%[ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ u%d#d#} } } } } } } Q%Q%Q%X X X X X X X X ( ( ( ( ( | | | | | | | | n.n.n.n.n.n.`.`.`.r$r$r$r$r$r$r$/ / / / / / / / / / / / [@[@[@[@1 1 1 1 1 1 1 1 1 U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+U+1 1 1 1 1 1 1 1 1 [@[@[@[@/ / / / / / / / / / / / r$r$r$r$r$r$r$`.`.`.n.n.n.n.n.n.| | | | | | | | ( ( ( ( ( X X X X X X X X Q%Q%Q%} } } } } } } d#d#u%_ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ #%T$T$: : : : : 91W&W&d1{.{.{.{.{.{.e1b+K.K.K.K.9.r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+g@`+`+=.=.=.=.=.<+~+~+~+~+~+1+1+W.W.W.>@>@O B B B o o o @V m.m.m.m. + +y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.b.b.b.<.[.-.-.-.;.Q R R R R q q r r s t u u u v w w x x y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X.X y+y+y+y+ +m.m.m.m.V V @o o o B B O >@>@>@W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.=.`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < < c+c+: : : : : : : T$#%[ [ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ u%d#d#} } } } } } } Q%Q%Q%X X X X X X X X X ( ( ( ( ( | | | | | | | | | n.n.n.n.n.n.`.`.`.r$r$r$r$r$r$r$r$/ / / / / / / / / / / / / / / [@[@[@[@[@1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 [@[@[@[@[@[@/ / / / / / / / / / / / / / / r$r$r$r$r$r$r$r$`.`.n.n.n.n.n.n.n.| | | | | | | | | ( ( ( ( ( X X X X X X X X Q%Q%Q%Q%} } } } } } } d#d#u%_ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ [ #%T$: : : : : : : c+f1K&K&b1{.{.{.{.{.{.g1K.K.K.9.r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+=.=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@B B B o o o @V V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R q q r r r s t u u u v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I _ y+y+y+y+ + +m.m.m.m.V @o o o o B B O >@>@W.W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+< < < < < < c+c+: : : : : : : T$#%#%[ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ u%d#d#} } } } } } } } Q%Q%Q%X X X X X X X X X ( ( ( ( ( ( | | | | | | | | | n.n.n.n.n.n.n.`.`.`.r$r$r$r$r$r$r$r$r$r$/ / / / / / / / / / / / / / / / / / / / / / [@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@[@/ / / / / / / / / / / / / / / / / / / / / / r$r$r$r$r$r$r$r$r$r$`.`.`.n.n.n.n.n.n.n.| | | | | | | | | ( ( ( ( ( ( X X X X X X X X X Q%Q%Q%} } } } } } } } d#u%u%_ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ #%T$T$: : : : : : : c+c+< 91K&K&h1{.{.{.{.{.{.i1K.9.r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o o @V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0..+R.R.p p p r.r.k.k.k.a.b.b.<.<.[.-.-.-.Q Q R R R q q r r r s t u u u v w x x y y z S S T T T ,.d.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@7@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J < y+y+y+y+y+ +m.m.m.m.V V @o o o B B B O >@>@W.W.W.1+1+~+~+~+~+~+<+<+=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.b+b+b+b+< < < < < c+c+c+: : : : : : : T$#%[ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ u%u%d#} } } } } } } } Q%Q%Q%Q%X X X X X X X X X ( ( ( ( ( ( | | | | | | | | | | n.n.n.n.n.n.n.n.n.`.`.`.r$r$r$r$r$r$r$r$r$r$r$r$r$/ / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / r$r$r$r$r$r$r$r$r$r$r$r$r$`.`.`.n.n.n.n.n.n.n.n.n.| | | | | | | | | ( ( ( ( ( ( ( X X X X X X X X X Q%Q%Q%Q%} } } } } } } } d#u%u%_ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ #%T$: : : : : : : c+c+c+< < < 91K&x&j1{.{.{.{.{.{.k1r#r#r#n n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.<+<+~+~+~+~+~+1+1+W.W.W.>@>@O B B B o o o @V V m.m.m.m. +y+y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.:.#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.;.Q Q R R R q q r r r t t u u u v w x x y y z S S T T >.,.d.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O=. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ < y+y+y+y+y+ + +m.m.m.m.V V o o o o B B O >@>@>@W.W.1+1+Q.~+~+~+~+~+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.K.b+b+b+< < < < < < c+c+: : : : : : : : T$#%[ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } Q%Q%Q%Q%X X X X X X X X X X ( ( ( ( ( ( ( | | | | | | | | | | n.n.n.n.n.n.n.n.n.n.n.`.`.`.`.r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$/ / / / / / / / / / r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$`.`.`.`.n.n.n.n.n.n.n.n.n.n.n.| | | | | | | | | | ( ( ( ( ( ( ( X X X X X X X X X X Q%Q%Q%Q%} } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ #%T$T$: : : : : : : c+c+< < < < < < l1x&x&m1{.{.{.{.{.{.n1r#n n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+~+~+~+~+~+Q.1+1+W.W.>@>@>@O B B o o o o V V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.a.b.b.b.<.[.-.-.-.;.Q R R R R q q r r r t t u u v v w x x y y z S S T T >.,.d.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@i@i@i@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&3&t&t&>*9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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J )@z+y+y+y+y+y+ +m.m.m.m.m.V @o o o B B B O >@>@>@W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#9.K.K.K.K.K.b+b+b+< < < < < < c+c+c+: : : : : : : T$T$#%[ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ u%u%d#} } } } } } } } } Q%Q%Q%Q%X X X X X X X X X X X ( ( ( ( ( ( ( | | | | | | | | | | | | | n.n.n.n.n.n.n.n.n.n.n.n.n.`.`.`.`.`.`.`.r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$r$`.`.`.`.`.`.`.n.n.n.n.n.n.n.n.n.n.n.n.n.| | | | | | | | | | | | | ( ( ( ( ( ( ( X X X X X X X X X X X Q%Q%Q%Q%} } } } } } } } } d#u%u%_ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ #%T$T$: : : : : : : c+c+c+< < < < < < b+b+o1j&j&R%{.{.{.{.{.{.p1n n v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.>@>@>@O B B B o o o @V m.m.m.m.m. +y+y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0.0.R.R.p p p r.r.r.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r s t t u u v v w x x y y z S S T T >.,.d.d.d.d.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@t#t#U#8$8$q$&%&%6%o%P%P%P%3&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . s+_ l+y+y+y+y+y+ + +m.m.m.m.V V @o o o B B B O >@>@W.W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n r#r#r#r#9.K.K.K.K.b+b+b+b+< < < < < < c+c+: : : : : : : : T$#%#%[ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ u%d#d#} } } } } } } } } Q%Q%Q%Q%X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( | | | | | | | | | | | | | | | n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.| | | | | | | | | | | | | | | ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X Q%Q%Q%Q%} } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ #%#%T$: : : : : : : : c+c+< < < < < < b+b+b+b+K.l1j&j&R%{.{.{.{.{.{.q1v.q.q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+Q.1+1+W.W.W.>@>@O B B B o o o @V V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R q q q r r s t u u u v w w x x y y z S S T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@t#t#U#8$8$q$&%&%6%o%o%P%P%~&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=Q=F+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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A.( l+z+y+y+y+y+y+ + +m.m.m.m.V V o o o o B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.n n n n r#r#r#9.K.K.K.K.K.b+b+b+< < < < < < c+c+c+: : : : : : : : T$#%#%[ [ [ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } } } Q%Q%Q%Q%X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( | | | | | | | | | | | | | | | | | | | | | | | | n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.n.| | | | | | | | | | | | | | | | | | | | | | | | ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X Q%Q%Q%Q%} } } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : c+c+c+< < < < < < b+b+b+K.K.K.K.91k&8&Y%{.{.{.{.{.{.r1q.q.q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+1+1+W.W.W.>@>@>@O B B o o o o @V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.-.Q Q R R R q q r r r s t u u u v w w x x y y S S T T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@P@t#U#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&9*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=9*:@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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X./ l+l+z+y+y+y+y+y+ +m.m.m.m.V V @o o o o B B O >@>@>@W.W.W.1+Q.~+~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.v.v.n n n r#r#r#9.K.K.K.K.K.b+b+b+b+< < < < < < c+c+c+: : : : : : : : T$#%#%[ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } } } } Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( ( ( ( | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ( ( ( ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%} } } } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : c+c+c+< < < < < < b+b+b+b+K.K.K.K.K.9.l18&8&Y%{.{.{.{.{.{.s1q.4.4.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.>@>@>@O B B B o o o @V V m.m.m.m. + +y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0..+R.R.p p p r.r.r.k.k.a.b.b.b.<.[.-.-.-.;.Q R R R R q q r r r s t u u u v w x x x y y S S T T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@P@t#U#U#8$q$q$&%6%6%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.^ l+l+z+y+y+y+y+y+ + +m.m.m.m.V V @o o o B B B O >@>@>@W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.q.q.q.q.q.v.n n n r#r#r#r#9.K.K.K.K.K.b+b+b+< < < < < < < c+c+c+: : : : : : : : T$T$#%[ [ [ [ [ [ [ [ [ [ j+_ _ _ _ _ _ _ _ _ _ _ _ u%u%d#d#} } } } } } } } } } } Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%} } } } } } } } } } } d#d#d#u%u%_ _ _ _ _ _ _ _ _ _ _ j+[ [ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : : c+c+< < < < < < < b+b+b+K.K.K.K.K.9.r#r#r#l12&2&2&{.{.{.{.{.{.t14.G+H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.>@>@>@O B B B o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r t t u u u v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@P@t#U#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=o%b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.y*l+l+l+z+y+y+y+y+y+ + +m.m.m.m.V V o o o o B B B O >@>@W.W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+G+4.4.4.q.q.q.q.v.n n n n r#r#r#9.K.K.K.K.K.b+b+b+b+< < < < < < < c+c+c+: : : : : : : : T$T$#%[ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ u%u%d#d#d#} } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X X X X X X X ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( X X X X X X X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } d#d#u%u%_ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ #%T$T$: : : : : : : : : c+c+< < < < < < < b+b+b+b+K.K.K.K.K.9.r#r#r#n n l12&<&Y%{.{.{.{.{.{.u1H+H+H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@O B B B o o o o @V m.m.m.m.m. +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0.0.R.R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.-.;.Q R R R R q q r r s t t u u v v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=8$G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.{ l+l+l+z+y+y+y+y+y+ + +m.m.m.m.m.V @o o o o B B B O >@>@W.W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+H+G+4.4.q.q.q.q.v.v.n n n r#r#r#r#9.K.K.K.K.K.b+b+b+b+< < < < < < < c+c+c+: : : : : : : : : T$#%#%[ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ u%u%d#d#d#} } } } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } } d#d#d#u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : : : c+c+< < < < < < < b+b+b+b+K.K.K.K.K.9.r#r#r#r#n n n n v1Y%Y%Y%K-{.{.{.{.{.w1H+H+H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B o o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p r.r.r.k.k.a.b.b.b.<.[.[.-.-.;.Q Q R R R q q r r r s t u u u v v w x x y y z S S T T T ,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=i@{&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.~ l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.V V @o o o o B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.`+`+g@H+H+H+H+H+H+G+4.4.q.q.q.q.q.v.n n n n r#r#r#9.9.K.K.K.K.K.b+b+b+b+< < < < < < < c+c+c+: : : : : : : : : T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%d#d#d#} } } } } } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } } } } } d#d#d#u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ [ [ #%T$T$: : : : : : : : : c+c+c+< < < < < < < b+b+b+b+K.K.K.K.K.K.9.r#r#r#r#n n n v.q.q.x1Y%Y%Y%g-{.{.{.{.{.w1H+g@`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B o o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r s t u u u v w w x x y y z S S T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&t&>*9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w='@$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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P=l+l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.V V @o o o o B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.`+`+`+g@H+H+H+H+H+G+4.4.4.q.q.q.q.v.v.n n n r#r#r#r#9.K.K.K.K.K.K.b+b+b+b+< < < < < < < c+c+c+: : : : : : : : : : T$T$#%[ [ [ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%d#d#d#d#} } } } } } } } } } } } } } } } } } } } } } } } Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%Q%} } } } } } } } } } } } } } } } } } } } } } } } d#d#d#d#u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : : : c+c+c+< < < < < < < b+b+b+b+b+K.K.K.K.K.9.r#r#r#r#n n n n v.q.q.q.q.x1Y%Y%Y%g-{.{.{.{.{.y1`+`+=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o @V V m.m.m.m.m. +y+y+y+y+y+y+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p f.r.r.k.k.a.a.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r t t u u u v w w x x y y S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&t&t&t&>*9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=L+y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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C.l+l+l+l+l+z+y+y+y+y+y+y+ +m.m.m.m.m.V V @o o o B B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.=.`+`+g@H+H+H+H+H+H+G+4.4.q.q.q.q.q.v.n n n n r#r#r#r#9.K.K.K.K.K.K.b+b+b+b+< < < < < < < c+c+c+: : : : : : : : : : : T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ [ j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%u%d#d#d#d#} } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } d#d#d#d#u%u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$: : : : : : : : : : : c+c+c+< < < < < < < b+b+b+b+b+K.K.K.K.K.9.r#r#r#r#n n n n v.q.q.q.q.q.4.4.v1Y%Y%Y%9;{.{.{.{.{.z1=.=.=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.Q Q R R R q q q r r s t t u u v v w x x y y y S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=5+V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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E G.l+l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.m.V V @o o o B B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+<+<+=.=.=.=.=.=.`+`+g@H+H+H+H+H+H+G+4.4.4.q.q.q.q.v.v.n n n n r#r#r#r#9.K.K.K.K.K.K.b+b+b+b+< < < < < < < < c+c+c+: : : : : : : : : : : T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%u%u%d#d#d#d#d#d#} } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } d#d#d#d#d#d#u%u%u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : : c+c+c+< < < < < < < < b+b+b+b+b+K.K.K.K.K.9.9.r#r#r#r#n n n v.v.q.q.q.q.q.4.4.G+H+A1Y%Y%Y%{,{.{.{.{.{.B1=.=.=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o @V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p f.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r s t u u u v v w x x y y z S S T T T >.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&3&t&t&t&9*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u.a+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.:.G.l+l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.m.V @o o o o B B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+~+<+<+=.=.=.=.=.`+`+g@g@H+H+H+H+H+G+G+4.4.q.q.q.q.q.v.n n n n r#r#r#r#r#9.K.K.K.K.K.K.b+b+b+b+< < < < < < < < c+c+c+c+: : : : : : : : : : : T$T$#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ u%u%u%u%u%u%u%u%u%u%u%d#d#d#d#d#d#d#d#d#d#d#d#u%u%u%u%u%u%u%u%u%u%u%u%_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : : c+c+c+c+< < < < < < < < b+b+b+b+b+K.K.K.K.K.9.9.r#r#r#r#n n n n v.q.q.q.q.q.4.4.4.G+H+H+H+A1Y%Y%R%1_{.{.{.{.{.C1=.<+<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+l+:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.p p p f.r.r.r.k.k.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r s t u u u v w w x x y y z S S T T T ,.,.d.d.d.2.2.e.e.e.e.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%3&3&t&t&t&9*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=p^d+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V:l+G.l+l+l+l+l+l+y+y+y+y+y+y+ + +m.m.m.m.V V @o o o o B B B O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+~+<+<+=.=.=.=.=.=.`+`+g@H+H+H+H+H+H+G+4.4.4.q.q.q.q.q.v.n n n n r#r#r#r#r#9.K.K.K.K.K.K.b+b+b+b+b+< < < < < < < < c+c+c+c+: : : : : : : : : : : : T$T$#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%T$T$: : : : : : : : : : : : c+c+c+c+< < < < < < < < < b+b+b+b+K.K.K.K.K.K.9.9.r#r#r#r#n n n n v.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+D1O%O%O%/;{.{.{.{.{.E1<+~+~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.b.b.<.<.[.-.-.-.;.Q Q R R R q q q r r r t t u u u v w w x x y y z S S T T >.,.,.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%P%P%P%~&3&t&t&t&9*(*(*(*(*~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=;.@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . % V :.G.l+l+l+l+l+z+y+y+y+y+y+y+ + +m.m.m.m.V V @o o o o B B B O >@>@>@W.W.W.1+1+Q.Q.~+~+~+~+~+<+<+=.=.=.=.=.=.`+`+g@g@H+H+H+H+H+H+G+4.4.q.q.q.q.q.q.v.n n n n r#r#r#r#r#9.K.K.K.K.K.K.b+b+b+b+b+< < < < < < < < < c+c+c+c+: : : : : : : : : : : : : T$T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%T$T$: : : : : : : : : : : : : c+c+c+c+< < < < < < < < < b+b+b+b+b+K.K.K.K.K.K.9.9.r#r#r#r#n n n n v.q.q.q.q.q.q.4.4.G+G+H+H+H+H+H+H+g@`+A1v%v%v%/;{.{.{.{.{.F1~+~+~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.p p p p r.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q R R R R q q r r r s t t u u v v w x x y y y S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&9*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=B X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # =.:.:.G.l+l+l+l+l+z+y+y+y+y+y+y+ + +m.m.m.m.V V @o o o o B B B O >@>@>@W.W.W.W.1+1+Q.~+~+~+~+~+<+<+<+=.=.=.=.=.`+`+`+g@H+H+H+H+H+H+G+G+4.4.q.q.q.q.q.q.v.n n n n r#r#r#r#r#9.K.K.K.K.K.K.K.b+b+b+b+b+< < < < < < < < < c+c+c+c+c+: : : : : : : : : : : : : : T$T$T$#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ j+j+j+j+j+j+j+j+j+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ j+j+j+j+j+j+j+j+j+[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%T$T$T$: : : : : : : : : : : : : : c+c+c+c+< < < < < < < < < b+b+b+b+b+K.K.K.K.K.K.K.9.r#r#r#r#r#n n n n v.v.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+g@`+`+`+=.G1v%v%v%$;{.{.{.{.{.H1~+~+Q.1+1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+l+:.:.:.:.:.:.:.#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.Q Q R R R R q q r r r s t u u u v v w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=} . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+< :.:.:.G.l+l+l+l+l+z+y+y+y+y+y+y+ +m.m.m.m.m.V V @o o o o B B B O >@>@>@>@W.W.W.1+1+Q.~+~+~+~+~+~+<+<+=.=.=.=.=.=.`+`+g@g@H+H+H+H+H+H+G+4.4.4.q.q.q.q.q.q.v.n n n n n r#r#r#r#9.9.K.K.K.K.K.K.K.b+b+b+b+b+< < < < < < < < < < c+c+c+c+: : : : : : : : : : : : : : : : T$T$T$#%#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%#%T$T$T$: : : : : : : : : : : : : : : : c+c+c+c+< < < < < < < < < < b+b+b+b+b+b+K.K.K.K.K.K.9.9.r#r#r#r#r#n n n n v.v.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@`+`+=.=.=.=.G1v%n%n%$;{.{.{.{.{.I11+1+1+W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.p p p p r.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q Q R R R q q q r r r t t u u u v w w x x y y z S S T T T >.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I n.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.m.V V @o o o o B B B O O >@>@>@W.W.W.1+1+Q.~+~+~+~+~+~+<+<+=.=.=.=.=.=.=.`+`+g@H+H+H+H+H+H+H+G+4.4.4.q.q.q.q.q.q.v.n n n n n r#r#r#r#r#9.K.K.K.K.K.K.K.K.b+b+b+b+b+< < < < < < < < < < < c+c+c+c+c+: : : : : : : : : : : : : : : : : : T$T$T$T$#%#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%#%#%T$T$T$T$: : : : : : : : : : : : : : : : : : c+c+c+c+< < < < < < < < < < < b+b+b+b+b+b+K.K.K.K.K.K.K.9.9.r#r#r#r#n n n n n v.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.J1n%<%<%K1{.{.{.{.{.L1W.W.W.W.>@>@>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q r r r s t t u u u v w x x x y y z S S T T T ,.,.d.d.d.2.2.e.e.e.e.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~&; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.{ :.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.m.V V @o o o o B B B B O >@>@>@W.W.W.1+1+1+Q.~+~+~+~+~+~+<+<+=.=.=.=.=.=.`+`+`+g@H+H+H+H+H+H+H+G+4.4.4.q.q.q.q.q.q.v.v.n n n n r#r#r#r#r#9.9.K.K.K.K.K.K.K.K.b+b+b+b+b+b+< < < < < < < < < < < c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : T$T$T$T$T$T$#%#%#%#%#%#%#%#%[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ #%#%#%#%#%#%#%T$T$T$T$T$T$: : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+< < < < < < < < < < < < b+b+b+b+b+b+K.K.K.K.K.K.K.9.9.r#r#r#r#r#n n n n n v.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@g@`+`+=.=.=.=.=.=.<+<+<+G1<%<%<% >{.{.{.{.{.M1W.>@>@>@>@O B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.0.0.0.0.0.R.R.p p p f.r.r.r.k.k.a.a.b.b.<.<.[.-.-.-.;.Q Q R R R R q q r r r s t u u u v v w x x y y y S S T T T >.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=_@J%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Q+:.:.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+ + +m.m.m.m.m.V V @o o o o o B B B O >@>@>@W.W.W.W.1+1+Q.~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.`+`+`+g@H+H+H+H+H+H+H+G+4.4.4.q.q.q.q.q.q.v.v.n n n n n r#r#r#r#r#9.9.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+< < < < < < < < < < < < c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$T$: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+c+< < < < < < < < < < < < < b+b+b+b+b+b+K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#n n n n n v.v.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+g@g@`+`+=.=.=.=.=.=.=.<+<+~+~+~+G1<%<%[% >{.{.{.{.{.N1>@>@O B B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.p p p p f.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q q r r r t t u u u v w w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=u.V#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a l+:.:.:.:.:.G.l+l+l+l+l+z+y+y+y+y+y+y+ + +m.m.m.m.m.V V V @o o o o B B B O >@>@>@>@W.W.W.1+1+Q.Q.~+~+~+~+~+~+<+<+=.=.=.=.=.=.=.`+`+g@g@H+H+H+H+H+H+H+G+G+4.4.4.q.q.q.q.q.q.v.v.n n n n n r#r#r#r#r#9.9.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+< < < < < < < < < < < < < < c+c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+c+c+< < < < < < < < < < < < < < < b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#n n n n n v.q.q.q.q.q.q.q.4.4.4.G+H+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.<+<+<+~+~+~+~+~+G1[%'%'%.>{.{.{.{.{.O1O B B B B o o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.<.<.[.-.-.-.-.Q Q R R R R q q r r r s t u u u v v w x x x y y z S S T T T ,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=-.@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {& @:.:.:.:.:.:.G.l+l+l+l+l+z+y+y+y+y+y+y+ + +m.m.m.m.m.m.V V @o o o o B B B O O >@>@>@W.W.W.W.1+1+Q.~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.`+`+g@g@H+H+H+H+H+H+H+G+G+4.4.4.q.q.q.q.q.q.q.v.n n n n n n r#r#r#r#r#r#9.9.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < c+c+c+c+c+c+c+c+c+c+: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : c+c+c+c+c+c+c+c+c+c+< < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#n n n n n v.v.q.q.q.q.q.q.4.4.4.4.G+H+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+Q.1+P1'%p$p$#;{.{.{.{.{.Q1B B o o o o o @V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.0.0.0.0.0..+R.p p p p r.r.r.k.k.k.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q q r r r s t u u u v v w x x y y y S S S T T >.,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=O X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # R1:.:.:.:.:.:.:.G.l+l+l+l+l+z+y+y+y+y+y+y+ + + +m.m.m.m.m.V V @o o o o B B B B O >@>@>@W.W.W.W.1+1+1+Q.~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.`+`+`+g@H+H+H+H+H+H+H+H+G+4.4.4.4.q.q.q.q.q.q.q.v.n n n n n n r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < < < < < < c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+c+< < < < < < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#n n n n n n v.v.q.q.q.q.q.q.q.4.4.4.G+G+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.<+<+~+~+~+~+~+~+~+Q.1+1+W.S1p$p$p$T1{.{.{.{.{.U1o o o o @V V V m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.k.k.k.a.a.b.b.<.<.[.-.-.-.-.Q Q R R R R q q r r r s t t u u u v w w x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+O.2+:.:.:.:.:.:.:.G.l+l+l+l+l+z+y+y+y+y+y+y+y+ + +m.m.m.m.m.V V @o o o o o B B B O >@>@>@>@W.W.W.W.1+1+Q.~+~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.`+`+`+g@H+H+H+H+H+H+H+H+G+G+4.4.4.q.q.q.q.q.q.q.q.v.v.n n n n n n r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#r#n n n n n n v.v.q.q.q.q.q.q.q.4.4.4.4.G+H+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.<+<+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.S1p$p$p$V1{.{.{.{.{.W1o o @V V m.m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.b.<.[.[.-.-.-.;.Q R R R R q q q r r r s t u u u v v w x x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=~=D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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I | #+2+:.:.:.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+y+y+ + +m.m.m.m.m.V V @ @o o o o B B B B O >@>@>@>@W.W.W.1+1+1+Q.~+~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.`+`+`+g@g@H+H+H+H+H+H+H+H+G+G+4.4.4.q.q.q.q.q.q.q.q.v.v.n n n n n n n r#r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+b+b+b+< < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < b+b+b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.r#r#r#r#r#r#r#r#n n n n n n v.v.v.q.q.q.q.q.q.q.4.4.4.4.G+G+H+H+H+H+H+H+H+H+g@`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+Q.Q.1+1+W.W.W.W.>@>@X1p$p$p$V1{.{.{.{.{.Y1 @V V m.m.m.m.m.m. + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0.0.R.R.p p p p f.r.r.k.k.k.a.b.b.b.<.<.[.-.-.-.-.Q Q R R R R q q r r r r t t u u u v w w x x y y y S S S T T T ,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+i+n+q+q+q+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@i@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=P%; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i.g.#+#+2+:.:.:.:.:.:.G.l+l+l+l+l+l+l+z+y+y+y+y+y+y+ + +m.m.m.m.m.m.V V @o o o o o B B B O >@>@>@>@W.W.W.W.1+1+1+Q.~+~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.`+`+`+g@g@H+H+H+H+H+H+H+H+H+G+G+4.4.4.q.q.q.q.q.q.q.q.q.v.v.n n n n n n n r#r#r#r#r#r#r#r#9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.r#r#r#r#r#r#r#r#n n n n n n n n v.v.q.q.q.q.q.q.q.q.4.4.4.4.G+G+H+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.1+1+W.W.W.W.>@>@>@>@O Z1p$p$p$V1{.{.{.{.{.`1V m.m.m.m.m. + + +y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+3.3.0.0.0.0.0..+R.p p p p f.r.r.r.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q R R R R q q q r r r s t u u u u v w w x x y y z S S T T T >.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.,+,+,+,+}+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=P+B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F /+#+#+2+:.:.:.:.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+y+ + +m.m.m.m.m.m.V V @o o o o o B B B B O >@>@>@>@W.W.W.W.1+1+Q.Q.~+~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.=.`+`+`+g@g@H+H+H+H+H+H+H+H+H+G+G+4.4.4.4.q.q.q.q.q.q.q.q.q.v.v.n n n n n n n n r#r#r#r#r#r#r#r#r#9.9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+b+K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.9.r#r#r#r#r#r#r#r#r#r#n n n n n n n v.v.v.q.q.q.q.q.q.q.q.q.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+g@`+`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.>@>@>@O O B B Z16$6$6$ 2{.{.{.{.{..2m.m.m.m. + +y+y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.0.0.0.0.0..+R.R.p p p f.r.r.r.k.k.a.a.b.b.b.<.[.[.-.-.-.;.Q Q R R R R q q r r r r t t u u u v v w x x x y y z S S T T T >.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@H@P@P@t#t#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=-.d+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f ~+#+#+#+2+:.:.:.:.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+y+ + + +m.m.m.m.m.V V V @o o o o o B B B O O >@>@>@>@W.W.W.W.1+1+Q.Q.~+~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.=.`+`+`+`+g@g@H+H+H+H+H+H+H+H+H+G+G+4.4.4.4.q.q.q.q.q.q.q.q.q.q.v.v.v.n n n n n n n n n r#r#r#r#r#r#r#r#r#r#r#9.9.9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.9.9.r#r#r#r#r#r#r#r#r#r#r#r#n n n n n n n n n v.v.q.q.q.q.q.q.q.q.q.q.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.>@>@>@>@O B B B B o +26$6$6$ 2{.{.{.{.{.@2m.m. + +y+y+y+y+y+y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p p r.r.r.k.k.k.a.b.b.b.<.<.[.-.-.-.-.;.Q R R R R q q q r r r s t u u u u v w w x x y y z S S T T T >.,.,.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+i+n+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@7@7@i@i@i@H@P@t#t#U#U#8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=w=: z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i &#+#+#+#+2+:.:.:.:.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+y+y+ + +m.m.m.m.m.m.V V @o o o o o B B B B O >@>@>@>@W.W.W.W.W.1+1+Q.Q.~+~+~+~+~+~+~+<+<+<+<+=.=.=.=.=.=.=.=.`+`+`+`+g@g@H+H+H+H+H+H+H+H+H+H+G+G+4.4.4.4.4.q.q.q.q.q.q.q.q.q.q.v.v.v.n n n n n n n n n n n r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#9.9.9.9.9.9.9.9.9.9.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.K.9.9.9.9.9.9.9.9.9.9.9.r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#n n n n n n n n n n v.v.v.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.G+G+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.>@>@>@>@O B B B B o o o o #27$:$:$$2{.{.{.{.{.%2 + +y+y+y+y+y+y+z+z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0..+R.R.p p p p f.r.r.k.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q Q R R R R q q r r r r t t u u u v v w x x x y y z S S T T T >.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+P+Y+Y++@+@'@'@_@_@_@7@7@i@i@i@P@P@t#t#U#U#8$q$q$&%&%6%o%P%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=t&m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i.D #+#+#+#+#+2+:.:.:.:.:.:.:.G.l+l+l+l+l+l+z+y+y+y+y+y+y+y+ + +m.m.m.m.m.m.V V V @o o o o o B B B B O >@>@>@>@W.W.W.W.W.1+1+1+Q.~+~+~+~+~+~+~+~+<+<+<+=.=.=.=.=.=.=.=.=.`+`+`+`+g@g@H+H+H+H+H+H+H+H+H+H+H+G+G+4.4.4.4.4.q.q.q.q.q.q.q.q.q.q.q.q.v.v.v.v.n n n n n n n n n n n n n n r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#r#n n n n n n n n n n n n n n v.v.v.q.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.G+G+G+H+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+=.=.=.=.=.=.=.=.=.<+<+<+<+~+~+~+~+~+~+~+Q.Q.1+1+1+W.W.W.W.>@>@>@>@O O B B B B o o o o o @&2:$J#J#*2{.{.{.{.{.=2y+y+y+y+y+y+z+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.p p p p f.r.r.r.k.k.a.a.b.b.b.<.[.[.-.-.-.-.Q Q R R R R q q q r r r s t t u u u v w w x x y y y S S S T T T ,.,.d.d.d.d.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.,+,+,+,+,+}+5+5+5+5+n+n+q+q+B+L+L+P+Y+Y+Y++@+@'@'@_@_@_@7@7@i@i@i@P@P@t#t#U#U#8$q$q$&%&%6%o%P%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=5+% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+R1#+#+#+#+#+#+2+:.:.:.:.:.:.:.G.l+l+l+l+l+l+l+z+y+y+y+y+y+y+y+ + +m.m.m.m.m.m.m.V V @o o o o o o B B B B O >@>@>@>@>@W.W.W.W.1+1+1+Q.Q.~+~+~+~+~+~+~+~+<+<+<+<+=.=.=.=.=.=.=.=.=.=.`+`+`+`+g@g@H+H+H+H+H+H+H+H+H+H+H+H+H+G+G+G+4.4.4.4.4.4.4.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.v.v.v.v.v.v.v.v.v.n n n n n n n n n n n n n n n n n n n n n n n v.v.v.v.v.v.v.v.v.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.q.4.4.4.4.4.4.G+G+G+H+H+H+H+H+H+H+H+H+H+H+H+H+g@g@`+`+`+`+`+=.=.=.=.=.=.=.=.=.=.<+<+<+~+~+~+~+~+~+~+~+~+Q.1+1+1+W.W.W.W.W.>@>@>@>@O O B B B B o o o o o @ @V V m.m.m.&2J#J#,#Q-{.{.{.{.{.-2y+y+z+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+3.3.0.0.0.0.0..+R.R.p p p f.r.r.r.k.k.k.a.a.b.b.<.<.[.[.-.-.-.;.Q Q R R R R q q q r r r s t u u u u v w w x x y y y S S S T T T >.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#8$8$q$q$&%&%6%o%P%P%P%~&3&t&t&t&>*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=w=w=w=w=X /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ", -" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 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", -" /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d+[ .+0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.G.l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+ + + + +m.m.m.m.m.m.m.m.V V V @ @o o o o o o o o B B B B B B O O >@>@>@>@>@>@>@W.W.W.W.W.W.W.W.1+1+1+1+1+1+Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+<+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.Q.1+1+1+1+1+1+W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@O O B B B B B B o o o o o o o o @ @V V V m.m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+G.:.:.:.(2c@c@c@62{.{.{.{.{.72#+#+#+3.3.0.0.0.0.0.0..+R.R.p p p p p f.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q R R R R R q q q r r r r t t u u u u v w w x x x y y z S S S T T T >.,.,.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+5+5+5+5+i+n+q+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@P@P@t#t#t#U#8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&>*9*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=w=w=w=~&6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . )2 ", -" w(. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.m 3..+0.0.0.0.0.0.3.3.#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.G.l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+ + + +m.m.m.m.m.m.m.m.m.V V V @ @o o o o o o o o B B B B B B B O O >@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+Q.Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.Q.1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@O O B B B B B B B o o o o o o o o @ @V V V m.m.m.m.m.m.m.m.m. + + +y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.(2c@c@d@62{.{.{.{.{.72#+3.3.0.0.0.0.0.0..+R.R.p p p p f.r.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R q q q r r r r s t u u u u v v w w x x y y y z S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+q+q+B+B+L+L+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@H@P@P@t#t#U#U#8$q$q$&%&%6%6%o%P%P%P%3&3&t&t&t&>*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=w=w=w=w=z y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2 ", -" 82. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#~+R..+0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+ + + + +m.m.m.m.m.m.m.m.m.V V V @ @o o o o o o o o o B B B B B B B O O O >@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+1+1+Q.Q.Q.Q.Q.Q.~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+~+Q.Q.Q.Q.Q.Q.1+1+1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@O O O B B B B B B B o o o o o o o o @ @V V V V m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.(2d@2@2@B-{.{.{.{.{.923.0.0.0.0.0..+.+R.R.p p p p f.r.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R q q q r r r r s t t u u u v v w w x x y y y z S S T T T T >.,.d.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+n+n+q+q+B+L+L+L+P+Y+Y++@+@+@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%6%o%o%P%P%P%3&3&t&t&t&>*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=w=w=w=w=_ X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 02 ", -" a2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I C R.R.R..+0.0.0.0.0.0.3.3.#+#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+z+y+y+y+y+y+y+y+y+y+y+ + + +m.m.m.m.m.m.m.m.m.m.V V V V @ @o o o o o o o o o B B B B B B B B O O O >@>@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.Q.1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@>@O O O B B B B B B B B o o o o o o o o o @ @V V V V m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+#+b22@2@2@c2{.{.{.{.{.h@0.0.0.0..+R.R.R.p p p p f.r.r.r.k.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q r r r r s t t u u u u v w w x x x y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+q+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#8$8$q$q$&%&%6%o%o%P%P%~&3&t&t&t&t&>*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=w=w=w==@a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 ", -" d2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a I#p R.R..+0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+ + + +m.m.m.m.m.m.m.m.m.m.V V V V V @ @o o o o o o o o o o B B B B B B B B B O O O >@>@>@>@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.1+1+1+1+1+1+1+1+W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@>@>@>@>@O O O B B B B B B B B B o o o o o o o o o o @ @V V V V V m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+b22@2@2@e2{.{.{.{.{.]@0.0..+R.R.p p p p p f.r.r.r.k.k.k.a.a.a.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r s t t u u u u v v w x x x y y y z S S T T T T ,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+}+}+5+5+5+5+i+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@P@P@P@t#t#U#8$8$q$q$&%&%6%o%P%P%P%~&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=w=l+J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f2 ", -" g2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ^.: p p R.R.R..+0.0.0.0.0.0.3.3.#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.G.l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+ + + + +m.m.m.m.m.m.m.m.m.m.V V V V V @ @o o o o o o o o o o o B B B B B B B B B B B O O O O >@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.W.>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@O O O O B B B B B B B B B B B o o o o o o o o o o o @ @V V V V V m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+z+l+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+h22@|@|@i2{.{.{.{.{.X+R.R.R.p p p p f.f.r.r.r.k.k.k.a.a.b.b.b.b.<.<.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r s t t u u u u v v w w x x y y y z S S S T T T >.,.,.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+}+5+5+5+i+n+n+q+q+B+L+L+L+P+Y+Y++@+@+@'@'@'@_@_@7@7@7@i@i@i@P@P@t#t#U#U#8$q$q$&%&%&%6%o%P%P%P%~&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=w=w=t&D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j2 ", -" k2/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.F,0.p p p R.R..+0.0.0.0.0.0.0.3.3.#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.G.l+l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+ + + + +m.m.m.m.m.m.m.m.m.m.m.V V V V V @ @ @o o o o o o o o o o o o o B B B B B B B B B B B B B O O O O O O >@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@>@O O O O O O B B B B B B B B B B B B B o o o o o o o o o o o o o @ @ @V V V V V m.m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.h2^@^@^@l2{.{.{.{.{.m+p p p p p f.r.r.r.r.k.k.k.a.a.b.b.b.<.<.[.[.[.-.-.-.-.;.Q Q R R R R R q q q r r r r s t u u u u v v w w x x x y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+q+q+q+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&>*9*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=w=w=,.G]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . )2 ", -" m2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $ g@p p p p R.R.R..+0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+ + + + + +m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V @ @ @o o o o o o o o o o o o o o o B B B B B B B B B B B B B B B B B B B B B B O O O O O O O O O O O O O O O O O O O B B B B B B B B B B B B B B B B B B B B B B o o o o o o o o o o o o o o o @ @ @V V V V V V m.m.m.m.m.m.m.m.m.m.m.m. + + + +y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.3.3.0.b2^@^@^@l2{.{.{.{.{.n2p p p f.r.r.r.k.k.k.k.a.a.b.b.b.<.<.[.[.-.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u v v w w x x x y y y S S S T T T T ,.,.d.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+}+5+5+5+5+n+n+q+q+B+B+L+L+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#8$8$q$q$&%&%6%o%o%P%P%P%3&3&t&t&t&>*9*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=w=~=( X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2 ", -" 32. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;@V~.+p p p p p R.R..+.+0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.G.l+l+l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V @ @ @ @o o o o o o o o o o o o o o o o o o o o o B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B o o o o o o o o o o o o o o o o o o o o o @ @ @ @V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + +y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+G.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.b2^@{@{@o2{.{.{.{.{.p2f.r.r.r.r.k.k.k.a.a.a.b.b.b.<.<.[.[.-.-.-.-.-.;.Q Q R R R R R q q q r r r r s t t u u u v v w w x x x y y y z S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+q+q+q+B+L+L+L+P+Y+Y++@+@+@'@'@'@_@_@_@7@7@i@i@i@P@P@P@t#t#U#8$8$q$q$&%&%6%o%o%P%P%~&3&3&t&t&t&>*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=w=w=T {&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . q2 ", -" r2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]+r#f.p p p p p R.R.R..+0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V V @ @ @ @o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o @ @ @ @V V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0.s2,@,@,@t2{.{.{.{.{.u2r.r.k.k.k.k.a.a.b.b.b.b.<.<.[.[.-.-.-.-.;.Q Q Q R R R R R q q q r r r r s t t u u u u v w w x x x y y y z S S S T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.,+,+,+,+,+}+}+5+5+5+5+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%&%6%o%P%P%P%~&3&t&t&t&t&>*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=w=t&C z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 ", -" v2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.y{3.r.f.p p p p p R.R.R..+0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V V V V V @ @ @ @ @ @ @ @o o o o o o o o o o o o o o o o o o o o o o o o o o o @ @ @ @ @ @ @ @V V V V V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.w2%@%@%@t2{.{.{.{.{.x2k.k.k.a.a.a.b.b.b.<.<.<.[.[.-.-.-.-.;.Q Q R R R R R R q q q r r r r s t t u u u u v v w x x x y y y z S S S T T T >.,.,.d.d.d.d.d.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+L+L+L+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=w=;.y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y2 ", -" z2w(. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e#[ r.r.f.f.p p p p p R.R.R..+0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.R.p p A2%@%@W+B2{.{.{.{.{.C2k.a.a.b.b.b.b.<.<.[.[.-.-.-.-.-.;.Q Q R R R R R R q q q r r r r s t t u u u u v v w w x x y y y z S S S T T T T >.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+B+B+L+L+P+P+Y+Y++@+@+@'@'@'@_@_@_@7@7@i@i@i@P@P@P@t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&>*9*(*(*(*(*@=~=~=~=~=w=w=w=w=w=w=w=6%D /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2D2 ", -" E2F2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $+:.r.r.r.f.p p p p p p R.R.R..+0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.2+#+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0..+R.R.R.p p p p p A2W+W+W+G2{.{.{.{.{.H2a.b.b.b.<.<.<.[.[.-.-.-.-.-.;.Q Q R R R R R q q q q r r r r s t t u u u u v v w w x x x y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%6%o%o%P%P%P%3&3&t&t&t&>*9*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=w=#+(.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2 ", -" J2K2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M+H.k.r.r.r.r.f.p p p p p p R.R.R..+0.0.0.0.0.0.0.3.3.3.3.#+#+#+#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + + + + + +m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m.m. + + + + + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0..+.+R.R.p p p p p p f.r.L2W+W+W+M2{.{.{.{.{.N2b.b.<.<.[.[.[.-.-.-.-.;.Q Q Q R R R R R q q q r r r r r s t t u u u u v v w w x x x y y y S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+L+L+L+P+Y+Y++@+@+@'@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%&%6%o%P%P%P%~&3&t&t&t&t&>*(*(*(*(*(*~=~=~=~=~=w=w=w=w=w=w=i@m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . O2 ", -" P2Q2k2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j.5$k.k.r.r.r.r.f.p p p p p p R.R.R..+0.0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0.0..+R.R.R.p p p p p p f.r.r.r.r.L2W+W+W+R2{.{.{.{.{.S2<.<.[.[.-.-.-.-.-.;.Q Q R R R R R R q q q r r r r s s t t u u u u v v w w x x x y y y z S S T T T T >.,.,.d.d.d.d.d.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@_@_@_@7@7@7@i@i@i@P@P@P@t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=w=O M+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T2 ", -" U2P2V2P2P2P2W2q2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@x+k.k.k.k.r.r.r.r.f.p p p p p p R.R.R..+0.0.0.0.0.0.0.0.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0..+R.R.R.p p p p p p f.r.r.r.r.k.k.k.L2S+S+S+R2{.{.{.{.{.S2[.[.-.-.-.-.-.;.Q Q R R R R R R q q q r r r r s t t u u u u u v v w w x x x y y y z S S S T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+L+L+L+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%6%o%o%P%P%P%~&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=P+l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 02X2 ", -" V2P2P2U2P2U2P2V2P2P2Y2r2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . G o k.k.k.k.r.r.r.r.r.f.p p p p p p R.R.R..+.+0.0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0.0..+.+R.R.R.p p p p p p f.r.r.r.r.r.k.k.k.k.a.Z2O+O+O+`2{.{.{.{.{. 3-.-.-.-.;.Q Q Q R R R R R q q q q r r r r s t t u u u u u v v w w x x x y y y z S S S T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@=@'@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%&%6%o%o%P%P%P%3&3&t&t&t&>*9*(*(*(*(*@=~=~=~=~=~=w=w=w=w=w=n J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3+3 ", -" V2P2V2P2V2P2P2U2P2V2P2V2P2@3v2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . h g.f.a.k.k.k.k.r.r.r.r.r.f.p p p p p p R.R.R.R..+0.0.0.0.0.0.0.0.0.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+2+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+z+z+z+z+z+z+z+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+y+z+z+z+z+z+z+z+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.0.0.0.0.0.0.0.0.0..+.+R.R.R.p p p p p p f.r.r.r.r.r.k.k.k.k.a.a.a.b.#3O+J+J+$3{.{.{.{.{.%3-.-.;.Q Q R R R R R R q q q r r r r r s t t u u u u v v v w w x x x y y y z S S S T T T T >.,.d.d.d.d.d.2.2.e.e.e.e.e.e.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+5+5+5+5+5+n+n+q+q+q+B+L+L+L+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@7@i@i@i@P@P@P@t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&t&>*(*(*(*(*(*~=~=~=~=~=w=w=w=w=w=e.b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &3*3P2 ", -" P2P2U2P2V2P2V2P2P2U2P2V2P2V2P2P2U2=3/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . # j+a.a.a.k.k.k.k.k.r.r.r.r.f.f.p p p p p p R.R.R..+.+0.0.0.0.0.0.0.0.0.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+2+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0..+.+R.R.R.p p p p p p p f.r.r.r.r.r.k.k.k.k.a.a.a.b.b.b.b.-3J+J+J+$3{.{.{.{.{.;3Q Q Q R R R R R R q q q r r r r r s t t u u u u v v w w x x x x y y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@+@'@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=~=w=w=w=w=U#g.z.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.>3U2P2P2V2P2V2 ", -" V2P2P2P2P2U2P2V2P2V2P2P2U2P2V2P2V2P2P2U2P2,3I2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I@>@b.a.a.a.k.k.k.k.k.r.r.r.r.f.f.p p p p p p R.R.R.R..+.+0.0.0.0.0.0.0.0.0.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p f.f.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.<.<.<.#3J+A+A+'3{.{.{.{.{.)3R R R R R R q q q q r r r r s t t t u u u u v v w w x x x x y y y z S S S T T T T >.,.,.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+,+}+5+5+5+5+i+n+n+q+q+B+B+L+L+L+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$&%&%&%6%o%o%P%P%P%3&3&t&t&t&>*9*(*(*(*(*@=~=~=~=~=~=w=w=w=~=K.E+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32!3P2U2P2P2V2P2V2P2U2 ", -" U2P2V2P2P2U2P2V2P2V2P2V2P2P2U2P2V2P2P2U2P2U2P2P2~3{3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ;@' ]3b.b.b.a.a.k.k.k.k.k.r.r.r.r.r.f.p p p p p p p R.R.R.R..+.+0.0.0.0.0.0.0.0.0.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.G.G.G.G.G.G.G.l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+l+G.G.G.G.G.G.G.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.0.0.0.0.0.0.0.0.0.0..+R.R.R.R.p p p p p p p f.r.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.<.<.<.[.[.-.^3A+A+A+/3{.{.{.{.{.)3R R R R q q q r r r r r s t t u u u u u v v w w x x x y y y y z S S S T T T T >.,.,.d.d.d.d.d.2.e.e.e.e.e.e.t.u.u.u.u.u.u.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+q+q+q+B+B+L+L+P+P+Y+Y++@+@+@'@'@'@_@_@_@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&t&>*9*(*(*(*(*@=~=~=~=~=~=w=w=w=<.K$. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (3_3V2P2U2P2P2P2P2V2P2U2P2U2 ", -" U2P2V2P2V2P2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2:3<3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+2 b.b.b.b.b.a.a.a.k.k.k.k.r.r.r.r.r.f.f.p p p p p p p R.R.R.R..+.+0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+2+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p p f.f.r.r.r.r.r.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.[.[.[.-.-.-.^3A+w+p+/3{.{.{.{.{.[3R q q q q r r r r r s t t u u u u u v v w w x x x y y y z S S S S T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y+Y++@+@=@'@'@_@_@_@7@7@7@i@i@i@H@P@P@t#t#U#U#8$q$q$q$&%&%6%o%o%P%P%P%~&3&t&t&t&t&>*(*(*(*(*(*~=~=~=~=~=w=w=w=n+&.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . }3|3P2V2P2V2P2U2P2P2V2P2V2P2U2P2U2 ", -" V2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P213<2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W#K.<.b.b.b.b.b.a.a.a.k.k.k.k.k.r.r.r.r.r.f.f.p p p p p p p R.R.R.R..+.+0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+2+2+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.p p p p p p p f.f.r.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.;.23p+p+f+33{.{.{.{.{.43q q r r r r r s t t t u u u u v v w w w x x x y y y z S S S T T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+5+n+n+q+q+q+B+L+L+L+P+P+Y+Y++@+@=@'@'@'@_@_@_@7@7@i@i@i@H@P@P@P@t#t#U#8$8$q$q$&%&%&%6%o%o%P%P%P%3&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=~=w=w=~&^ A.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8253U2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2 ", -" V2P2V2P2P2U2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P26373. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p[y+<.<.<.b.b.b.b.a.a.a.a.k.k.k.k.k.r.r.r.r.r.f.f.p p p p p p p p R.R.R.R..+.+0.0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+2+2+2+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.R.p p p p p p p f.f.r.r.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.[.[.-.-.-.-.-.-.;.;.Q Q 83f+f+f+93{.{.{.{.{.43r r r r r s t t u u u u u v v w w x x x x y y y z S S S T T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.,+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+L+L+P+P+Y+Y++@+@+@=@'@'@_@_@_@7@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%~&3&3&t&t&t&>*9*(*(*(*(*@=~=~=~=~=~=w=w=O (.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 03_3P2V2P2U2P2U2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2U2 ", -" V2P2P2U2P2U2P2V2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2V2P2P2V2P2V2P2P2V2P2P2V2P2P2a3b3/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.! f.[.<.<.<.b.b.b.b.b.a.a.a.k.k.k.k.k.r.r.r.r.r.r.f.f.p p p p p p p p R.R.R.R.R..+.+0.0.0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+2+2+2+2+2+2+2+2+2+2+2+2+:.:.:.:.:.:.:.:.:.:.:.:.:.2+2+2+2+2+2+2+2+2+2+2+2+2+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.p p p p p p p p f.f.r.r.r.r.r.r.k.k.k.k.k.a.a.a.b.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.-.;.;.Q Q R R R c3f+f+f+[3{.{.{.{.{./3r r s t t t u u u u v v v w w x x x y y y y z S S S T T T T >.,.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+L+L+L+P+Y+Y+Y++@+@=@'@'@'@_@_@_@7@7@i@i@i@i@P@P@P@t#t#U#U#8$q$q$q$&%&%6%o%o%P%P%P%~&3&t&t&t&t&>*(*(*(*(*(*@=~=~=~=~=~=w=z d&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.d3Q2P2V2P2P2P2P2V2P2U2P2P2V2P2U2P2U2P2U2P2P2P2P2V2P2V2 ", -" U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2U2P2P2U2P2V2P2V2P2P2U2P2P2U2P2V2P2P2V2P2P2V2P2P2P2+3r2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H | [.[.[.<.<.<.<.b.b.b.b.b.a.a.a.k.k.k.k.k.k.r.r.r.r.r.f.f.p p p p p p p p p R.R.R.R.R..+.+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+R.R.R.R.R.p p p p p p p p p f.f.r.r.r.r.r.r.k.k.k.k.k.a.a.a.a.b.b.b.b.b.<.<.<.[.[.[.-.-.-.-.-.-.;.;.Q Q R R R R R R c33+3+3+e3{.{.{.{.{.$3s t t u u u u u v v w w w x x x y y y y z S S S T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+5+n+n+q+q+q+B+B+L+L+P+P+Y+Y++@+@+@=@'@'@_@_@_@7@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%6%6%o%P%P%P%P%3&3&t&t&t&t&9*(*(*(*(*@=~=~=~=~=~=w=7@6 /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f3g3V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2V2P2U2P2P2P2P2V2 ", -" V2P2V2P2P2P2P2U2P2U2P2U2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2V2U2P2V2U2P2P2P2P2P2h3i3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.f@-.-.[.[.[.<.<.<.b.b.b.b.b.a.a.a.a.k.k.k.k.k.k.r.r.r.r.r.r.f.f.p p p p p p p p p R.R.R.R.R.R..+.+.+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.R.p p p p p p p p p f.f.r.r.r.r.r.r.r.k.k.k.k.k.a.a.a.a.b.b.b.b.b.<.<.<.[.[.[.[.-.-.-.-.-.-.;.Q Q Q R R R R R R R q q 233+3+3+e3{.{.{.{.{.j3t u u u u v v v w w x x x x y y y z S S S S T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+,+}+5+5+5+5+5+i+n+q+q+q+B+B+L+L+P+P+Y+Y+Y++@+@=@'@'@'@_@_@_@7@7@i@i@i@i@P@P@P@t#t#U#U#8$q$q$q$&%&%6%6%o%P%P%P%~&3&t&t&t&t&>*9*(*(*(*(*@=~=~=~=~=~=Q=_ J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . k3l3V2P2U2P2P2U2P2P2V2P2V2P2U2P2P2V2P2U2P2U2P2P2P2P2V2P2V2P2U2P2U2 ", -" U2P2U2P2U2P2U2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2m332. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.F V -.-.-.[.[.[.<.<.<.<.b.b.b.b.b.a.a.a.a.k.k.k.k.k.k.r.r.r.r.r.r.r.f.f.p p p p p p p p p p R.R.R.R.R.R..+.+.+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+#+3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+R.R.R.R.R.R.p p p p p p p p p p f.f.r.r.r.r.r.r.r.k.k.k.k.k.k.a.a.a.a.b.b.b.b.b.<.<.<.<.[.[.[.-.-.-.-.-.-.-.;.Q Q Q R R R R R R R q q q q q 833+3+3+)3{.{.{.{.{.j3u u u v v w w w x x x y y y y z S S S T T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+B+B+L+L+L+P+P+Y+Y++@+@+@'@'@'@_@_@_@7@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%&%6%o%o%P%P%P%~&3&t&t&t&t&>*(*(*(*(*(*@=~=~=~=~=(*<+]+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . n3o3P2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2V2P2U2P2P2P2P2P2P2V2 ", -" V2P2V2P2V2P2P2U2P2U2P2U2P2V2P2V2P2P2U2P2U2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2p3q3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.> u+-.-.-.-.-.[.[.[.<.<.<.<.b.b.b.b.b.b.a.a.a.a.k.k.k.k.k.k.r.r.r.r.r.r.r.f.f.f.p p p p p p p p p p p R.R.R.R.R.R.R..+.+.+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.3.3.3.3.3.3.3.3.3.3.3.3.3.3.3.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+.+R.R.R.R.R.R.p p p p p p p p p p p p f.f.r.r.r.r.r.r.r.k.k.k.k.k.k.k.a.a.a.a.b.b.b.b.b.<.<.<.<.[.[.[.[.-.-.-.-.-.-.;.;.Q Q Q R R R R R R R q q q q q r r r 833+_+_+)3{.{.{.{.{.G2v v v w w x x x x y y y z z S S S T T T T T >.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+q+B+L+L+L+P+P+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@i@i@i@i@P@P@P@t#t#U#U#8$q$q$q$&%&%6%6%o%P%P%P%~&3&3&t&t&t&>*9*(*(*(*(*@=~=~=~=~=~=V f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . r3s3U2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2U2 ", -" U2P2U2P2V2P2V2P2V2P2P2U2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2Q2t3]2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.F+>#-.-.-.-.-.-.-.[.[.[.<.<.<.<.b.b.b.b.b.b.a.a.a.a.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.f.f.f.p p p p p p p p p p p p R.R.R.R.R.R.R.R..+.+.+.+.+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+.+.+R.R.R.R.R.R.R.R.p p p p p p p p p p p p p f.f.f.r.r.r.r.r.r.r.k.k.k.k.k.k.k.a.a.a.a.b.b.b.b.b.b.<.<.<.<.[.[.[.[.-.-.-.-.-.-.-.;.Q Q Q Q R R R R R R R q q q q q r r r r r s u3_+_+*+v3{.{.{.{.{.w3w w w x x x y y y y z S S S S T T T T >.,.,.,.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+5+5+5+n+n+q+q+q+B+B+L+L+P+P+Y+Y+Y++@+@=@'@'@'@_@_@_@7@7@7@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%&%6%o%o%P%P%P%~&3&t&t&t&t&>*9*(*(*(*(*@=~=~=~=~=l+% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.x3Q2P2P2P2V2P2P2V2P2U2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2U2P2U2P2P2 ", -" P2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2P2V2P2P2P2P2y3z3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.7 P ;.-.-.-.-.-.-.-.-.[.[.[.<.<.<.<.b.b.b.b.b.b.b.a.a.a.a.k.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.f.f.f.p p p p p p p p p p p p p p p p R.R.R.R.R.R.R.R.R.R.R..+.+.+.+.+.+.+.+0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0..+.+.+.+.+.+.+.+.+R.R.R.R.R.R.R.R.R.R.R.p p p p p p p p p p p p p p p f.f.f.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.<.<.<.<.[.[.[.[.-.-.-.-.-.-.-.;.;.Q Q Q R R R R R R R R q q q q q r r r r r s s t t A3*+*+*+v3{.{.{.{.{.t2x x x x y y y z z S S S T T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.,+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+B+B+L+L+L+P+Y+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@i@i@i@H@P@P@P@t#t#U#U#8$q$q$q$&%&%6%6%o%P%P%P%~&3&3&t&t&t&t&9*(*(*(*(*(*@=~=~=~=R.& . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B3C3P2P2P2P2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2U2P2P2P2P2V2P2V2 ", -" V2P2P2P2P2P2P2U2P2U2P2U2P2V2P2V2P2P2U2P2V2P2V2P2P2U2P2V2P2P2U2P2P2U2P2P2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2D3E3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@C;p Q ;.;.-.-.-.-.-.-.-.-.[.[.[.[.<.<.<.<.b.b.b.b.b.b.b.a.a.a.a.a.k.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.r.f.f.f.f.p p p p p p p p p p p p p p p p p p p p R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.R.p p p p p p p p p p p p p p p p p p p p f.f.f.f.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.<.<.<.<.<.[.[.[.[.-.-.-.-.-.-.-.;.;.Q Q Q R R R R R R R R R q q q q r r r r r r s s t t t u u A3*+*+*+%3{.{.{.{.{.F3x y y y y z S S S S T T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+B+B+L+L+L+P+P+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@i@i@i@i@H@P@P@t#t#t#U#8$8$q$q$&%&%&%6%o%o%P%P%P%~&3&t&t&t&t&>*9*(*(*(*(*@=~=~=~=Q b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . G3h3P2P2P2P2P2P2P2P2U2V2P2U2V2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2V2 ", -" V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2V2P2P2P2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2!3I2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i z&b.Q Q Q ;.;.-.-.-.-.-.-.-.-.[.[.[.[.<.<.<.<.<.b.b.b.b.b.b.b.a.a.a.a.a.a.k.k.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.r.r.r.f.f.f.f.f.p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p f.f.f.f.r.r.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.a.a.a.a.a.b.b.b.b.b.b.b.<.<.<.<.<.[.[.[.[.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R q q q q q r r r r r r s s t t t u u u u u A3*+*+@+%3{.{.{.{.{.H3y y z z S S S T T T T T >.,.,.,.d.d.d.d.d.2.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+q+B+L+L+L+P+P+Y+Y+Y++@+@=@'@'@'@_@_@_@7@7@7@i@i@i@H@P@P@P@t#t#U#U#8$q$q$q$&%&%6%6%o%P%P%P%P%3&3&t&t&t&t&>*(*(*(*(*(*@=~=~=u - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I3J3P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2V2P2U2V2P2U2P2P2V2P2U2P2P2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2V2P2V2P2U2 ", -" V2P2V2P2P2P2P2P2P2U2P2U2P2U2P2V2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2K3L3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J.w.-.R R Q Q Q Q ;.-.-.-.-.-.-.-.-.-.[.[.[.[.<.<.<.<.<.b.b.b.b.b.b.b.b.a.a.a.a.a.a.k.k.k.k.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.f.f.f.f.f.f.f.p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p p f.f.f.f.f.f.f.f.r.r.r.r.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.a.b.b.b.b.b.b.b.b.<.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R R q q q q q r r r r r r s t t t u u u u u u v v v M3@+@+T. 3{.{.{.{.{.i2z S S S S T T T T T >.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+P+P+Y+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@i@i@i@i@P@P@P@t#t#U#U#8$8$q$q$&%&%&%6%o%o%P%P%P%~&3&t&t&t&t&>*9*(*(*(*(*(*~=~=,.]>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g2N3P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2V2P2U2 ", -" V2P2V2P2V2P2P2P2P2U2P2U2P2U2P2V2P2V2P2P2U2P2U2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2O3n3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g 2 -.R R R R Q Q Q Q ;.;.-.-.-.-.-.-.-.-.-.[.[.[.[.[.<.<.<.<.<.b.b.b.b.b.b.b.b.b.a.a.a.a.a.a.a.k.k.k.k.k.k.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.a.a.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.;.;.;.Q Q Q Q R R R R R R R R R q q q q q r r r r r r r s t t t u u u u u u v v v w w w M3T.T.T. 3{.{.{.{.{.P3S S T T T T T >.,.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+}+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+Y+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@7@i@i@i@H@P@P@t#t#t#U#U#8$q$q$q$&%&%6%6%o%P%P%P%P%3&3&t&t&t&t&>*9*(*(*(*(*@=~=u.E /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2Q3U2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2U2P2P2V2P2P2V2P2U2P2P2U2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2V2P2U2 ", -" V2P2P2P2P2P2P2U2P2U2P2U2P2U2P2V2P2V2P2P2U2P2U2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2R3S3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j / -.R R R R R R Q Q Q Q Q ;.;.-.-.-.-.-.-.-.-.-.[.[.[.[.[.[.<.<.<.<.<.<.b.b.b.b.b.b.b.b.b.b.a.a.a.a.a.a.a.a.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.r.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.a.a.a.a.b.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R R R q q q q q r r r r r r r s s t t t u u u u u u v v v w w w x x x A3L.L.L. 3{.{.{.{.{.T3T T T T >.>.,.,.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y++@+@+@=@'@'@'@_@_@_@7@7@7@i@i@i@H@P@P@P@t#t#U#U#8$8$q$q$&%&%&%6%o%o%P%P%P%~&3&3&t&t&t&>*9*(*(*(*(*(*@=-@) + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . U3V3P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2V2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2V2P2V2 ", -" P2P2U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2!3W3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H T>r.R R R R R R R R R Q Q Q Q Q ;.;.-.-.-.-.-.-.-.-.-.-.[.[.[.[.[.[.<.<.<.<.<.<.<.b.b.b.b.b.b.b.b.b.b.b.b.b.a.a.a.a.a.a.a.a.a.a.a.a.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.k.a.a.a.a.a.a.a.a.a.a.a.a.a.b.b.b.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.<.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.;.;.Q Q Q Q R R R R R R R R R R R q q q q q r r r r r r r s s t t t u u u u u u u v v v w w w x x x x y y X3L.F.F.Y3{.{.{.{.{.Z3T T >.,.,.,.d.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@=@'@'@'@_@_@_@_@7@7@i@i@i@i@H@P@P@t#t#t#U#8$8$q$q$q$&%&%6%6%o%P%P%P%P%3&3&t&t&t&t&>*9*(*(*(*(*@=s 9 /.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a2`3P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2V2P2U2V2P2U2P2P2V2P2V2P2U2P2P2V2P2V2P2U2P2U2P2U2P2P2P2P2V2P2V2P2V2 ", -" U2P2V2P2V2P2V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2P2P2U2P2V2P2P2U2P2P2U2P2P2U2P2P2P2P2P2V2P2P2P2P2P2P2U2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2 4E3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J F,#+q R R R R R R R R R R R Q Q Q Q Q ;.;.-.-.-.-.-.-.-.-.-.-.-.-.[.[.[.[.[.[.[.<.<.<.<.<.<.<.<.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.a.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.<.<.[.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.;.;.;.Q Q Q Q R R R R R R R R R R R q q q q q q r r r r r r r r s t t t t u u u u u u v v v v w w w x x x x y y y y z .4s.s.s.+4{.{.{.{.{.@4,.,.,.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+}+5+5+5+5+5+i+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@i@i@i@i@H@P@P@t#t#t#U#U#8$q$q$q$&%&%6%6%o%o%P%P%P%~&3&3&t&t&t&t&9*(*(*(*(*(*l+@@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . #4$4P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2V2P2U2P2P2U2P2U2P2P2V2P2U2P2P2P2P2V2P2V2P2U2P2U2P2U2P2U2P2P2P2P2 ", -" V2P2V2P2V2P2P2P2P2P2P2U2P2U2P2U2P2V2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2V2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2%4B3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.> @q q q q R R R R R R R R R R R Q Q Q Q Q Q ;.;.;.-.-.-.-.-.-.-.-.-.-.-.-.-.[.[.[.[.[.[.[.[.<.<.<.<.<.<.<.<.<.<.<.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.b.<.<.<.<.<.<.<.<.<.<.<.[.[.[.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.-.-.;.;.;.Q Q Q Q Q R R R R R R R R R R R R q q q q q q r r r r r r r r s s t t t u u u u u u u v v v w w w x x x x x y y y y z z S S &4s.c.c.+4{.{.{.{.{.*4d.d.d.d.d.d.d.2.2.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+5+5+5+5+i+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@_@_@_@_@7@7@7@i@i@i@H@P@P@P@t#t#U#U#8$8$q$q$&%&%&%6%6%o%P%P%P%P%3&3&t&t&t&t&>*9*(*(*(*P%n f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . =4-4P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2U2P2P2V2P2V2P2V2P2V2P2V2P2V2P2U2 ", -" U2P2U2P2U2P2U2P2U2P2U2P2U2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2;4>4/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.k n q q q q q q q R R R R R R R R R R R R Q Q Q Q Q Q ;.;.;.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.[.[.[.[.[.[.[.[.[.[.[.[.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.<.[.[.[.[.[.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.;.;.;.Q Q Q Q Q Q R R R R R R R R R R R R R q q q q q q q r r r r r r r r s s t t t u u u u u u u v v v v w w w x x x x x y y y y z z S S S S T ,4c.c.c.'4{.{.{.{.{.)#d.d.d.d.2.2.e.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+5+5+5+i+i+n+n+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@7@7@7@i@i@i@i@P@P@P@t#t#t#U#8$8$q$q$q$&%&%6%6%o%o%P%P%P%~&3&t&t&t&t&t&9*(*(*(*7@r$D+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.)4!4V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2U2P2U2P2U2P2P2P2P2P2P2V2P2V2P2V2 ", -" V2P2V2P2V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2V2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2~4j2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Y.X r r r q q q q q q q R R R R R R R R R R R R R R Q Q Q Q Q Q Q ;.;.;.;.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.[.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.;.;.;.;.Q Q Q Q Q Q Q R R R R R R R R R R R R R R q q q q q q q r r r r r r r r s s t t t t u u u u u u u u v v v w w w x x x x x y y y y y z S S S S S T T T T {4c.).).'4{.{.{.{.{.]4d.2.2.2.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@i@i@i@i@H@P@P@t#t#t#U#U#8$8$q$q$&%&%&%6%o%o%P%P%P%~&3&3&t&t&t&t&>*9*(*(*,+~ s+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {3^4P2P2V2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2U2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2V2P2U2P2U2P2U2P2U2 ", -" U2P2U2P2U2P2V2P2V2P2V2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2U2/4(4w(. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (.Z+<.r r r r r q q q q q q q q R R R R R R R R R R R R R R R R Q Q Q Q Q Q Q Q ;.;.;.;.;.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.;.;.;.;.;.Q Q Q Q Q Q Q Q R R R R R R R R R R R R R R R R q q q q q q q q r r r r r r r r r s s t t t t u u u u u u u u v v v w w w w x x x x x y y y y y z S S S S S T T T T T T >._4).).!.'4{.{.{.{.{.h+2.e.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@i@i@i@i@H@P@P@P@t#t#U#U#8$8$q$q$&%&%&%6%6%o%P%P%P%P%~&3&t&t&t&t&>*9*(*(*u F++ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w(t3/4P2P2P2P2V2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2V2P2U2P2U2P2U2P2P2P2P2P2P2V2P2V2 ", -" V2P2V2P2P2P2P2P2P2P2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2P2U2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2U2P2P2_3:4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@6 0.r r r r r r r r r q q q q q q q q R R R R R R R R R R R R R R R R R R R Q Q Q Q Q Q Q Q Q Q Q ;.;.;.;.;.;.;.;.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.;.;.;.;.;.;.;.;.;.Q Q Q Q Q Q Q Q Q Q Q R R R R R R R R R R R R R R R R R R q q q q q q q q q r r r r r r r r r r s s t t t t u u u u u u u u u v v v w w w w x x x x x y y y y y z z S S S S T T T T T T >.>.,.,.,.<4!.!.!.[4{.{.{.{.{.1.e.e.e.e.e.e.t.u.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@H@P@P@P@t#t#t#U#8$8$q$q$q$&%&%6%6%o%o%P%P%P%~&3&3&t&t&t&t&>*9*(*:.m@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &3_3U2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2V2P2V2P2U2 ", -" U2P2V2P2V2P2V2P2V2P2P2P2P2P2P2U2P2U2P2U2P2P2P2P2U2P2V2P2P2U2P2P2U2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2U2P2P2P2P2U2}4<2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.I. @s s r r r r r r r r r r r q q q q q q q q q q R R R R R R R R R R R R R R R R R R R R R R R R Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q R R R R R R R R R R R R R R R R R R R R R R R R q q q q q q q q q q r r r r r r r r r r r s s t t t t t u u u u u u u u v v v v w w w w x x x x x y y y y y y z S S S S S T T T T T T >.>.,.,.,.d.d.d.<4!.!.!.[4{.{.{.{.{.|4e.e.e.t.t.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@P@P@P@t#t#t#U#U#8$q$q$q$&%&%&%6%o%o%P%P%P%P%3&3&t&t&t&t&>*9*&%q.14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2Q3U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2V2P2U2P2P2U2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2U2P2U2P2U2P2U2 ", -" U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2V324. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K$>$#@t t s s s r r r r r r r r r r r r q q q q q q q q q q q R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R q q q q q q q q q q q q r r r r r r r r r r r r s s t t t t t u u u u u u u u u u v v v v w w w w x x x x x y y y y y y z z S S S S S T T T T T T >.>.,.,.,.d.d.d.d.d.d.<4343434[4{.{.{.{.{.|4e.t.u.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@t#t#t#U#U#8$8$q$q$&%&%&%6%6%o%o%P%P%P%~&3&3&t&t&t&t&>*y D e@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . U3K3P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2U2P2U2P2U2P2P2P2P2 ", -" U2P2U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P24454. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@5;B u t t t t t s s s r r r r r r r r r r r r r r q q q q q q q q q q q q q q q R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R q q q q q q q q q q q q q q q r r r r r r r r r r r r r r s s s t t t t t t u u u u u u u u u u v v v v w w w w x x x x x x y y y y y y z z S S S S S T T T T T T T >.,.,.,.d.d.d.d.d.d.d.d.2.2.6434343474{.{.{.{.{.84u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+5+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#U#U#8$8$q$q$q$&%&%6%6%o%o%P%P%P%~&3&3&t&t&t&t&94n & . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d2,3P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2P2U2P2P2P2P2P2P2 ", -" U2P2U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2P2P2P2U2P2V2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P204a4<2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Y.^ -.u u u u t t t t t t s s s s r r r r r r r r r r r r r r r r r q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q r r r r r r r r r r r r r r r r r s s s s t t t t t t u u u u u u u u u u v v v v v w w w w w x x x x x x y y y y y y z z S S S S S T T T T T T T >.>.,.,.,.d.d.d.d.d.d.d.d.2.2.2.e.e.b4343434c4{.{.{.{.{.d4u.u.u.u.M.M.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+i+i+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#8$8$q$q$q$&%&%&%6%o%o%P%P%P%P%~&3&t&t&t&t&t O=J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2e404P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2U2P2U2P2P2V2P2V2P2U2P2U2P2U2P2U2P2P2P2P2P2P2P2P2V2 ", -" U2P2U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2P2P2P2U2P2V2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2P2f4g4,2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . s+I.~+u u u u u u u u u t t t t t t t s s s s r r r r r r r r r r r r r r r r r r r r r r r r r r q q q q q q q q q q q q q q q q q q q q q q q q q q r r r r r r r r r r r r r r r r r r r r r r r r r r s s s s t t t t t t t u u u u u u u u u u u u v v v v v w w w w w x x x x x x y y y y y y y z z S S S S S T T T T T T T >.>.,.,.,.,.d.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.b43434h474{.{.{.{.{.i4u.u.M.N.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+5+5+5+5+5+5+i+n+n+n+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$q$q$q$&%&%&%6%6%o%P%P%P%P%~&3&3&t&t&H@O.B.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ,2g4f4U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2U2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2P2P2P2P2P2P2P2P2V2 ", -" U2P2U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2P2P2P2j4:4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . G]3,-.u u u u u u u u u u u u u u t t t t t t t t t s s s s s r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r s s s s s s t t t t t t t t t u u u u u u u u u u u u u v v v v v v w w w w w x x x x x x x x y y y y y y z z S S S S S S T T T T T T T T >.,.,.,.,.d.d.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.e.e.e.k4h4l4l4m4{.{.{.{.{.n4N.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+,+}+}+5+5+5+5+5+5+i+n+n+q+q+q+q+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$&%&%&%6%6%o%o%P%P%P%~&3&3&t&t&r P.6.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :4o4P2P2U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2P2U2P2P2P2P2P2P2 ", -" U2P2U2P2U2P2U2P2V2P2V2P2V2P2P2U2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2p4`3f3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I ]><+v v v v v u u u u u u u u u u u u u u u u u t t t t t t t t t t t t t s s s s s s s s s s s s s s s s r r r r r s s s s s s s s s s s s s s s s t t t t t t t t t t t t t t u u u u u u u u u u u u u u u u v v v v v v v w w w w w w x x x x x x x y y y y y y y z z z S S S S S S T T T T T T T T >.>.,.,.,.d.d.d.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.e.e.e.t.u.u.q4l4l4l4|.{.{.{.{.{.V1N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+i+i+n+n+q+q+q+B+B+B+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%6%6%o%o%P%P%P%P%3&3&t&7@c+% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . r4s4t4P2P2U2U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2V2P2P2U2P2P2V2P2U2V2P2U2P2P2V2P2U2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2P2U2P2U2P2U2 ", -" V2P2V2P2V2P2V2P2P2P2P2P2P2U2P2U2P2U2P2V2P2P2U2P2U2P2P2U2P2U2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2U2U2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2u4v402. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K y%k.w w w v v v v v v v v u u u u u u u u u u u u u u u u u u u u u u u u t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t u u u u u u u u u u u u u u u u u u u u u u u u v v v v v v v w w w w w w w x x x x x x x x x y y y y y y y z z z S S S S S S T T T T T T T T T >.,.,.,.,.d.d.d.d.d.d.d.d.d.2.2.2.e.e.e.e.e.e.e.e.e.e.t.u.u.u.u.u.q4l4l4l4w4{.{.{.{.{.T1N.N.N.N.=+,+,+,+,+,+,+,+,+}+}+5+5+5+5+5+5+i+n+n+n+q+q+q+B+B+L+L+L+L+P+P+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%o%o%P%P%P%P%~&3&t&b.7 s+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 02x4;4P2P2P2P2U2U2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2P2U2P2U2P2U2P2U2 ", -" P2P2P2P2U2P2U2P2U2P2U2P2V2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2V2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2K3y4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + c U+<.x w w w w w w w w v v v v v v v v v v u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u v v v v v v v v v v w w w w w w w w x x x x x x x x x y y y y y y y y y z z S S S S S S S S T T T T T T T T >.>.,.,.,.,.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.u.z4A4B4B4w4{.{.{.{.{.T1N.=+,+,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+5+i+n+n+q+q+q+q+B+B+L+L+L+P+P+Y+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%o%P%P%P%P%~&3&R 81(.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i3K3P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2U2P2U2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2P2P2V2P2V2P2V2P2V2 ", -" V2P2V2P2V2P2V2P2V2P2V2P2P2P2P2U2P2V2P2V2P2V2P2P2U2P2V2P2P2U2P2P2U2P2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2P2P2C3C4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4&b n.;.x x x x x x x w w w w w w w w w w v v v v v v v v v v v v v v v v v v u u u u u u u u u u u u u u u u u u u u v v v v v v v v v v v v v v v v v v w w w w w w w w w w x x x x x x x x x x x y y y y y y y y y y z z z S S S S S S S T T T T T T T T T T >.>.,.,.,.,.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.M.N.D4B4B4B4E4{.{.{.{.{.T1,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+5+i+n+n+n+q+q+q+B+B+B+L+L+L+P+P+Y+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%o%o%P%P%P%~&u w.# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C4C3P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2U2V2P2U2P2P2V2P2V2P2U2P2P2V2P2V2P2V2P2V2P2U2P2U2P2U2P2U2P2U2 ", -" V2P2V2P2P2P2P2P2P2U2P2U2P2U2P2V2P2V2P2P2P2P2V2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2V2P2P2P2P2P2V2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2U2P2P2P2p4F412. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X.a } q y x x x x x x x x x x x x x x x w w w w w w w w w w w w w w w w w w w w w w v v v v v v v w w w w w w w w w w w w w w w w w w w w w w w x x x x x x x x x x x x x x x y y y y y y y y y y y z z z S S S S S S S S S T T T T T T T T T T >.>.,.,.,.,.d.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.t.u.u.u.u.u.u.u.u.u.u.M.N.N.N.N.D4B4B4B4G4{.{.{.{.{.H4,+,+,+,+,+}+}+5+5+5+5+5+5+5+i+n+n+q+q+q+q+B+B+L+L+L+L+P+P+Y+Y+Y++@+@+@+@=@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%o%o%P%P%P%z 2 y.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12I4p4P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2P2V2P2V2P2P2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2V2P2V2P2U2P2U2 ", -" U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2U2P2V2P2P2U2P2V2P2P2V2P2P2U2P2V2U2P2P2P2P2P2P2P2P2U2P2P2P2U2P2P2P2U2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2U2P2P2P2P2h3=3:2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.T+`=s y y y y y y y y x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x y y y y y y y y y y y y y z z z z S S S S S S S S S T T T T T T T T T T T >.>.>.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.D4B4B4J4E4{.{.{.{.{.K4,+,+}+}+}+5+5+5+5+5+5+i+n+n+n+q+q+q+B+B+B+L+L+L+P+P+P+Y+Y+Y++@+@+@=@'@'@'@'@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%o%o%P%P%d.R&$ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2L4h3P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2U2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2P2U2P2U2P2P2 ", -" P2P2U2P2U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2P2P2P2P2P2M4G3,2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@$+;#w z y y y y y y y y y y y y y y y y y y y y y x x x x x x x x x x x x x x x x x x x x x x x x x x x x y y y y y y y y y y y y y y y y y y y y y z z z z S S S S S S S S S S S S T T T T T T T T T T T T >.>.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N4J4O4O4G4{.{.{.{.{.P4}+}+5+5+5+5+5+5+i+i+n+n+q+q+q+q+B+B+L+L+L+L+P+P+Y+Y+Y+Y++@+@+@=@'@'@'@_@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%o%o%P%Q4r$e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ,2R4M4P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2U2P2P2P2P2V2P2V2P2V2P2V2 ", -" V2P2V2P2V2P2P2P2P2P2P2U2P2U2P2V2P2V2P2P2P2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2V2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2P2P2P2P2P2P2S4k3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@^+n x S S S S S z z z z z z z y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y z z z z z z z S S S S S S S S S S S S S S T T T T T T T T T T T T T T >.>.>.,.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.=+=+,+T4O4O4O4U4{.{.{.{.{.V45+5+5+5+5+5+i+n+n+q+q+q+q+B+B+B+L+L+L+P+P+P+Y+Y+Y++@+@+@+@=@'@'@'@_@_@_@_@_@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%o%o%|+X J%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . k3W4P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2U2P2P2U2P2U2V2P2V2P2U2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2V2P2U2P2U2P2U2 ", -" U2P2U2P2U2P2V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2U2P2P2P2P2P2P2P2X424. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !@a [@U S S S S S S S S S S S S S S S S S S S S S S S S S S z z z z z z z z S S S S S S S S S S S S S S S S S S S S S S S S S S S S T T T T T T T T T T T T T T T T T >.>.>.,.,.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.u.M.N.N.N.N.N.N.N.N.N.N.N.N.=+,+,+,+,+,+D4O4O4O4U4{.{.{.{.{.Y45+5+5+i+n+n+n+q+q+q+q+B+B+L+L+L+L+P+P+Y+Y+Y+Y++@+@+@=@'@'@'@'@_@_@_@_@7@7@7@7@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%6%q$0.+=14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z4`4P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2P2U2P2U2 ", -" U2P2V2P2V2P2V2P2V2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2V2P2P2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2U2P2P2P2P2P2P2P2P2^4 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . f 6 =.y T T T T T T T T T S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S T T T T T T T T T T T T T T T T T T T T T T T >.>.>.>.,.,.,.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+D4.5.5.5U4{.{.{.{.{.Y4i+n+n+n+q+q+q+q+B+B+L+L+L+L+P+P+P+Y+Y+Y++@+@+@+@=@'@'@'@'@_@_@_@_@7@7@7@i@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%&%6%,+K.]>J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5@5P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2U2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2U2P2U2P2P2P2P2 ", -" U2P2U2P2U2P2U2P2V2P2V2P2V2P2P2U2P2U2P2V2P2P2P2P2U2P2P2U2P2U2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2V2V2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2U2P2P2P2P2P2P2P2P2+3#5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J - `.a.T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T >.>.>.>.>.,.,.,.,.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+}+}+N4.5.5.5$5{.{.{.{.{.%5n+q+q+q+q+B+B+B+L+L+L+L+P+P+Y+Y+Y+Y++@+@+@=@=@'@'@'@_@_@_@_@_@7@7@7@i@i@i@i@i@H@P@P@P@t#t#t#U#U#8$8$q$q$q$&%&%U#p 3 e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . g2&5U2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2V2P2P2P2P2V2P2V2P2U2P2U2P2U2P2P2P2P2P2P2V2 ", -" U2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2P2P2P2P2P2P2P2P2%4y2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.$ *@1+>.>.>.>.>.>.>.>.>.T T T T T T T T T T T T T T T T T T T T T >.>.>.>.>.>.>.>.>.>.>.,.,.,.,.,.,.,.,.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+}+}+}+5+5+*5.5.5.5=5{.{.{.{.{.1_q+q+B+B+B+L+L+L+L+P+P+Y+Y+Y+Y++@+@+@+@=@'@'@'@'@_@_@_@_@7@7@7@7@i@i@i@i@H@P@P@P@P@t#t#t#U#U#8$8$q$q$q$&%}+r#&.@ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5-4P2P2P2P2P2P2P2P2P2P2P2P2P2V2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2V2P2P2P2P2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2V2P2U2P2U2P2P2P2P2P2P2V2 ", -" U2P2U2P2U2P2V2P2V2P2V2P2P2U2P2U2P2V2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2P2P2P2P2P2P2P2P2t4;5>5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e@,,( -.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+,+,+,+,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+5+*5.5,5'5=5{.{.{.{.{.1_B+B+L+L+L+L+P+P+P+Y+Y+Y+Y++@+@+@=@=@'@'@'@_@_@_@_@_@7@7@7@i@i@i@i@i@H@P@P@P@t#t#t#t#U#U#8$8$q$q$q$a.)5B./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !544p4P2P2P2P2P2P2P2P2P2P2P2P2P2V2V2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2U2V2P2V2P2U2P2P2P2P2V2P2V2P2U2P2U2P2U2P2P2P2P2 ", -" V2P2V2P2V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2U2~5{5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.14C.[ [.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+5+5+5+i+Y+'5'5]5^5{.{.{.{.{.9;L+L+L+P+P+P+Y+Y+Y+Y++@+@+@+@=@'@'@'@'@_@_@_@_@_@7@7@7@i@i@i@i@i@H@P@P@P@t#t#t#U#U#U#8$8$t#/5X > J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {5(5_5U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2P2P2V2P2V2P2U2P2U2P2U2P2U2 ", -" V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2U2P2P2P2P2P2P2P2P2P2P2Q2:5d2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . j ]>[@:.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.d.2.2.2.2.2.2.2.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+}+}+}+}+5+5+5+5+5+5+5+5+i+n+n+n+<5]5]5]5=5{.{.{.{.{.g-P+P+P+Y+Y+Y+Y++@+@+@+@=@'@'@'@'@_@_@_@_@_@7@7@7@7@i@i@i@i@H@P@P@P@P@t#t#t#U#U#8$Y+[5] b s+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d2m3}5U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2U2V2P2U2P2P2V2P2U2P2P2U2P2U2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2U2P2U2P2U2 ", -" P2P2U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2/4I4z3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . @ m@w.|5,.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.2.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+5+5+5+5+5+5+5+5+i+i+n+n+n+q+q+q+<515151525{.{.{.{.{.0,Y+Y+Y+Y++@+@+@+@=@=@'@'@'@'@_@_@_@_@7@7@7@7@i@i@i@i@i@H@P@P@P@P@t#t#t#U#Q4g@C;e + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354504U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2V2P2P2U2P2P2V2P2U2P2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2V2 ", -" U2P2V2P2V2P2V2P2P2P2P2U2P2U2P2V2P2P2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2Q255y2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4@J%*@9.t e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+5+5+5+5+i+n+n+n+n+q+q+q+q+B+B+<515151525{.{.{.{.{.{.Y+Y++@+@+@+@=@'@'@'@'@_@_@_@_@_@7@7@7@7@i@i@i@i@H@H@P@P@P@t#t#t#6+_ 9 j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . y265}5P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2P2P2V2P2U2P2P2P2P2V2P2V2P2V2P2U2P2U2P2P2 ", -" V2P2P2P2P2U2P2U2P2U2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2V2P2P2U2P2P2U2P2V2U2P2V2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2P275}3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.y.F+X y+d.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.e.t.t.t.t.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+5+5+5+5+5+5+5+5+5+i+i+n+n+n+q+q+q+q+q+B+B+B+L+L+=@15858525{.{.{.{.{.{.+@+@+@=@'@'@'@'@_@_@_@_@_@7@7@7@7@i@i@i@i@i@H@P@P@P@P@M. +1@a e@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9505U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2V2P2P2V2P2U2P2P2U2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2U2P2P2P2P2V2P2V2P2U2 ", -" U2P2V2P2V2P2V2P2P2U2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P2P2a5b5w(. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . z.y.; X&n [.e.e.e.e.t.t.t.t.t.t.t.t.t.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+5+5+5+5+5+5+5+5+5+i+i+n+n+n+q+q+q+q+q+B+B+B+B+L+L+L+L+P+c585d5d5e5{.{.{.{.{.{.f5'@'@'@'@_@_@_@_@_@_@7@7@7@i@i@i@i@i@H@H@'@a.;#D k J.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w(b5_3P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2P2P2V2P2U2P2U2P2U2P2U2 ", -" U2P2U2P2U2P2V2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2V2P2P2V2P2V2U2P2V2P2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2g5h5i5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Z=-+| D.,.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.u.M.M.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+5+5+5+5+5+5+5+5+5+i+i+n+n+n+n+q+q+q+q+q+B+B+B+L+L+L+L+L+P+P+P+Y+f5d5d5j5k5{.{.{.{.{.{.7@'@_@_@_@_@_@_@7@7@7@7@i@i@i@i@,.>@1@]>y.i.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i5l5m5P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2U2P2U2P2P2P2P2V2P2V2 ", -" V2P2P2P2P2U2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2V2P2V2P2P2V2P2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2n5}4z3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.# F g.b+a.u.u.u.u.u.u.u.u.u.u.u.M.M.M.M.M.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+5+5+5+5+5+5+5+5+5+5+i+i+n+n+n+n+q+q+q+q+q+B+B+B+B+L+L+L+L+L+P+P+P+Y+Y+Y+Y+_@j5j5j5k5{.{.{.{.{.{.#*_@_@_@_@7@7@7@7@i@q+0.j+{+'+e@. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35}4n5P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2U2P2P2V2P2U2P2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2P2P2P2V2P2V2P2V2 ", -" V2P2V2P2P2P2P2U2P2U2P2V2P2P2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2U2P2V2P2P2U2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2Q255y2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.f H,) ^ n #+d.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.N.=+=+=+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+}+5+5+5+5+5+5+5+5+5+5+i+i+n+n+n+n+q+q+q+q+q+B+B+B+B+L+L+L+L+L+P+P+P+Y+Y+Y+Y+Y++@+@+@'@j5o5o5p5{.{.{.{.{.{.q5_@7@d.:.O.] E * (./.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5~5Q2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2U2 ", -" U2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2V2P2P2V2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2P2P275}3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E+K$; O=r$`+p e.N.N.N.N.N.N.N.N.N.N.=+=+=+=+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+5+5+5+5+5+5+5+5+5+5+5+5+i+i+n+n+n+n+q+q+q+q+q+B+B+B+B+L+L+L+L+L+P+P+P+P+Y+Y+Y+Y+Y++@+@+@+@=@=@r5o5o5o5s51_t5u5 >(|(;v5# X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w5+3P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2U2P2U2V2P2U2P2U2P2P2V2P2V2P2U2P2P2V2P2V2P2U2P2U2 ", -" U2P2V2P2P2P2P2U2P2V2P2V2P2P2U2P2V2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2V2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2P2x5b502. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.^.J%> ~ | b+B R.w N.,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+,+}+}+}+}+}+5+5+5+5+5+5+5+5+5+5+5+5+i+i+n+n+n+n+q+q+q+q+q+q+B+B+B+B+L+L+L+L+L+L+P+P+P+Y+Y+Y+Y+Y++@+@+@+@+@=@y5w .+O H#z5A5B5C5q^D5r4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . m2b5E5P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2V2P2P2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2V2P2U2P2P2P2P2V2P2U2P2U2 ", -" U2P2V2P2P2U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2V2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2P2P2P2m5F5B3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.e@V#% m@I.{+6@| K.G5r.y =+}+}+5+5+5+5+5+5+5+5+5+5+5+5+5+i+i+n+n+n+n+n+q+q+q+q+q+q+B+B+B+B+L+L+L+L+L+L+P+P+P+Y+Y+H5v 0.1+< / )=7 l d&G]^.X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B3F5m5P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2P2P2V2P2U2P2U2 ", -" V2P2P2U2P2V2P2V2P2V2P2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2U2P2P2U2P2V2U2P2V2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2U2I5<3:2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.(((.# 3_14{&Z=I@+'F $+&.8 C.6 D )=Z+1@[@( Q%n.>$C X&x)C>P.o.F+^+; - m@d&.,% $ <@j D+X.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2<3I5U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2V2P2P2V2P2P2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2V2P2U2P2P2V2P2U2 ", -" U2P2V2P2V2P2P2U2P2U2P2V2P2P2U2P2U2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2V2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2P2P2P2J5a4K5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K5a4J5P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2P2P2P2V2P2V2P2U2P2P2V2 ", -" V2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2V2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2t405L5w(. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w(R405t4P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2V2P2U2V2P2U2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2V2P2U2 ", -" U2P2U2P2V2P2P2U2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2*3M5{5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . {5N5*3P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2V2P2U2V2P2P2V2P2U2V2P2U2P2P2V2P2P2P2P2U2P2P2V2P2U2P2U2P2P2V2P2U2P2U2P2P2V2 ", -" V2P2P2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2t4+3E302. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 02E3C3t4P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2V2P2P2V2P2P2V2P2P2V2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2P2P2V2P2U2 ", -" U2P2V2P2P2U2P2V2P2P2U2P2U2P2V2U2P2U2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2U2P2P2P2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2@3}4!5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . !5Q3@3P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2U2P2P2U2V2P2U2V2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2U2 ", -" U2P2V2P2V2U2P2V2P2V2P2P2U2P2V2P2P2V2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2V2U2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2O5P5q2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . q2Q5^4P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2U2P2P2U2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2 ", -" U2P2U2P2P2U2P2U2P2P2U2P2V2P2P2U2P2V2P2P2U2P2P2U2P2V2P2P2V2P2P2V2P2P2V2U2P2P2U2P2P2V2U2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2;4~5R502. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 02k3~5;4P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2U2P2P2U2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2V2P2U2V2P2U2P2P2U2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2 ", -" U2P2V2P2P2U2P2V2P2P2U2P2V2P2P2V2P2V2U2P2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2U2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2D3!3S5w(. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . w(}3T5D3P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2U2P2P2U2P2P2U2V2P2U2V2P2U2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2P2V2P2U2P2P2V2P2U2P2P2V2 ", -" U2P2V2P2P2U2P2V2U2P2V2P2P2U2P2V2P2P2V2P2P2U2P2V2U2P2V2U2P2V2U2P2V2U2P2P2V2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2l3m3U3]2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ]2U3U5l3P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2V2P2P2U2V2P2P2V2P2P2U2P2P2V2P2P2V2P2P2V2P2U2P2P2U2P2P2V2P2U2P2P2V2P2U2P2P2V2P2U2 ", -" V2P2P2U2P2V2P2P2U2P2P2U2P2V2P2P2U2P2P2U2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2P2U2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2V5F4W5/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /. 5I4*3P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2V2P2P2U2V2P2P2V2P2P2U2P2P2V2P2P2U2P2P2V2P2P2V2P2U2V2P2U2P2P2V2P2U2P2P2U2P2U2P2P2U2 ", -" U2P2V2P2P2V2P2V2U2P2V2P2P2U2P2V2U2P2V2P2P2V2P2P2V2P2P2U2P2P2V2P2P2V2U2P2P2U2P2P2V2U2P2P2V2P2P2P2U2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2J5X5L3,2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ,2L3W2g5P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2U2V2P2P2U2P2P2U2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2P2U2V2P2U2P2P2V2P2U2P2P2V2P2P2V2 ", -" V2P2P2U2P2P2U2P2V2P2P2U2P2P2U2P2V2U2P2V2P2P2V2P2P2V2P2P2V2P2P2V2U2P2V2U2P2P2U2P2P2V2U2P2P2V2U2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2Y5Z5:4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &353Y5P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2U2V2P2P2U2P2P2U2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2P2P2V2P2U2P2P2U2 ", -" V2P2P2U2P2V2P2P2V2P2P2U2P2P2U2P2V2U2P2V2P2P2V2P2P2V2P2P2V2U2P2V2U2P2P2V2P2P2V2U2P2P2U2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2K3`5 6/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /. 6.6+6P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2U2V2P2P2U2P2P2P2V2P2P2U2P2P2P2V2P2P2V2P2P2V2P2P2U2P2P2U2P2P2V2P2P2V2P2U2V2P2U2P2P2U2P2U2V2P2V2 ", -" V2P2P2U2P2V2U2P2V2P2P2U2P2P2U2P2P2U2P2V2U2P2V2U2P2P2U2P2P2V2P2P2V2P2P2V2U2P2P2V2P2P2P2V2P2P2P2V2P2P2P2P2P2P2P2P2V2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2 4~5g412. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12@6#6 4P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2V2V2P2P2V2P2P2U2V2P2P2V2P2P2U2V2P2U2V2P2P2V2P2P2V2P2P2V2P2U2V2P2U2P2P2U2P2P2V2P2U2V2P2U2 ", -" V2P2P2U2P2P2U2P2V2U2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2V2U2P2P2V2P2P2V2U2P2P2V2P2P2P2U2P2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2a3`4$6g2/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.:4%6&6a3P2P2P2P2U2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2U2P2P2P2P2P2P2P2P2U2P2P2P2U2V2P2P2U2P2P2P2U2P2P2U2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2P2U2P2P2V2 ", -" V2U2P2V2P2P2V2P2P2V2P2P2U2P2P2U2P2P2U2P2P2V2P2P2V2P2P2V2P2P2V2U2P2P2U2P2P2V2U2P2P2V2U2P2P2V2U2P2P2V2U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2 4#6E3W3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W3*6!3 4P2U2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2P2P2P2V2P2P2P2V2P2P2P2V2P2P2U2V2P2P2V2P2P2U2P2P2U2V2P2U2V2P2U2V2P2P2V2P2P2V2P2U2V2P2U2P2P2U2P2P2V2 ", -" U2P2P2U2P2P2U2P2V2U2P2V2U2P2V2U2P2V2U2P2P2U2P2P2U2P2P2V2P2P2V2U2P2P2V2P2P2P2V2P2P2P2U2P2P2P2U2P2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2=6(4&3/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.-6;6o4U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2V2P2P2P2V2P2P2U2P2P2U2V2P2U2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2U2 ", -" V2U2P2V2P2P2V2P2P2V2P2P2V2P2P2V2U2P2V2U2P2P2V2P2P2U2P2P2V2U2P2P2V2P2P2V2U2P2P2V2U2P2P2V2U2P2P2P2U2P2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V5!3k2a2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F2#4`3*3P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2U2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2P2P2P2V2P2P2U2P2P2V2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2U2P2P2V2 ", -" V2P2P2V2P2P2V2P2P2V2U2P2V2U2P2P2U2P2P2U2P2P2V2P2P2V2U2P2P2V2P2P2P2U2P2P2V2U2P2P2V2U2P2P2V2U2P2P2P2U2U2P2P2V2U2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2o4$6U3I2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2U3>6Y2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2V2P2P2V2P2P2U2V2P2P2U2P2P2U2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2V2P2P2U2 ", -" V2U2P2V2U2P2V2U2P2P2U2P2P2U2P2P2V2P2P2V2U2P2P2U2P2P2V2U2P2P2V2P2P2P2U2P2P2V2U2P2P2V2U2P2P2P2V2U2P2P2P2U2P2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2S4,6*6d2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . d2k2X5W4U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2P2P2P2P2P2U2P2P2P2P2U2V2P2P2P2U2V2P2P2P2V2V2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2V2P2P2V2P2P2U2V2P2P2V2P2P2V2P2P2U2V2P2U2V2P2P2V2P2P2V2P2P2V2 ", -" U2P2P2U2P2P2V2P2P2V2P2P2V2U2P2P2V2P2P2V2U2P2P2V2P2P2V2U2P2P2V2U2P2P2U2P2P2P2U2U2P2P2V2U2P2P2P2U2U2P2P2P2V2U2P2P2P2V2U2P2P2P2P2U2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2f4'6)6y2:2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2y2d3~5!6P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2V2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2P2U2P2P2P2U2V2P2P2U2P2P2P2V2P2P2U2V2P2P2U2P2P2U2V2P2P2V2P2P2U2P2P2V2P2P2U2V2P2U2V2 ", -" V2P2P2V2U2P2P2U2P2P2U2P2P2V2U2P2P2U2P2P2V2U2P2P2V2P2P2P2U2P2P2P2U2P2P2P2U2P2P2P2V2U2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2P2U2U2P2P2P2P2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2~605%6U3i5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2{6(4]6;4P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2P2P2P2V2P2P2U2V2P2P2V2P2P2U2P2P2U2V2P2P2V2P2P2U2 ", -" V2P2P2V2U2P2P2U2P2P2V2U2P2P2U2P2P2V2U2P2P2V2P2P2P2U2P2P2V2V2P2P2P2V2P2P2P2V2U2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2V2U2P2P2P2V2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2U2P2P2P2P2U2^6W2/635. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B3G3}4(6U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2V2V2P2P2P2P2U2V2P2P2P2U2V2P2P2P2U2U2P2P2P2U2V2P2P2P2U2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2P2P2P2V2P2P2U2V2P2P2U2P2P2U2V2P2P2V2P2P2U2 ", -" U2U2P2P2U2P2P2V2U2P2P2U2P2P2V2U2P2P2V2U2P2P2U2P2P2P2U2P2P2P2U2U2P2P2V2U2P2P2P2V2P2P2P2V2U2P2P2P2V2U2P2P2P2P2U2U2P2P2P2V2U2U2P2P2P2P2V2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2f4_6$6<3{5:2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2{5:6%6;5Y5P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2U2U2V2P2P2P2P2U2V2P2P2P2U2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2V2V2P2P2U2V2P2P2P2U2P2P2P2U2V2P2P2U2P2P2P2V2P2P2P2V2P2P2U2V2P2P2U2P2P2U2V2P2P2U2 ", -" U2P2P2V2U2P2P2V2P2P2P2U2P2P2V2U2P2P2V2U2P2P2V2U2P2P2V2U2P2P2P2V2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2P2V2U2U2P2P2P2V2V2U2P2P2P2P2V2V2U2P2P2P2P2P2P2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P204&6<6[6v2a2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a2}6|613o404P2P2P2P2P2P2P2P2P2P2P2P2P2U2V2V2P2P2P2P2U2U2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2U2U2P2P2P2U2U2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2V2P2P2P2U2P2P2U2V2P2P2V2V2P2P2V2P2P2U2V2 ", -" V2U2P2P2V2U2P2P2V2P2P2P2V2P2P2P2V2P2P2P2V2U2P2P2V2U2P2P2P2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2U2P2P2P2V2U2U2P2P2P2P2V2U2P2P2P2P2V2V2U2P2P2P2P2P2V2U2U2U2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2Y516F5R4j2:2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . :2{3i3%6_6V3P2P2P2P2P2P2P2U2U2V2P2P2P2P2P2U2U2V2P2P2P2P2U2V2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2U2U2P2P2P2U2V2P2P2P2U2U2P2P2P2U2V2P2P2U2V2P2P2P2U2P2P2P2V2P2P2P2U2V2P2P2U2P2P2P2V2P2P2U2V2 ", -" U2P2P2P2V2P2P2P2V2P2P2P2V2P2P2P2V2U2P2P2V2U2P2P2P2U2U2P2P2V2U2P2P2P2V2U2P2P2P2V2U2U2P2P2P2V2U2P2P2P2P2V2U2P2P2P2P2V2U2U2P2P2P2P2V2V2U2P2P2P2P2P2V2V2U2U2P2P2P2P2P2V2V2U2U2U2P2P2P2P2P2P2P2P2/4X4<6)42612. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12v2[6364656V2P2P2P2P2P2U2U2U2V2P2P2P2P2P2U2V2V2P2P2P2P2U2U2V2P2P2P2P2U2U2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2P2U2P2P2P2U2V2P2P2U2V2P2P2U2V2P2P2U2V2 ", -" U2P2P2P2V2P2P2P2V2U2P2P2V2U2P2P2P2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2U2P2P2P2V2U2U2P2P2P2V2U2U2P2P2P2P2V2U2U2P2P2P2P2V2V2U2P2P2P2P2P2V2V2U2U2P2P2P2P2P2P2V2U2U2U2P2P2P2P2P2P2P2V2;4^6'6a466S3!5I3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76j2Z4869606`4;4V2P2P2P2P2P2U2U2V2V2P2P2P2P2P2U2U2V2P2P2P2P2P2U2V2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2P2U2P2P2P2U2V2P2P2U2V2 ", -" V2U2P2P2V2U2P2P2P2U2U2P2P2V2U2P2P2P2V2U2P2P2P2V2U2P2P2P2V2U2U2P2P2P2V2U2P2P2P2P2V2U2P2P2P2P2V2V2U2P2P2P2P2V2V2U2P2P2P2P2P2V2V2U2P2P2P2P2P2V2V2V2U2P2P2P2P2P2P2P2V2V2U2U2P2P2P2P2P2P2P2P2h3o4!3F5P5 5(3q2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . q2(3 5P5(4a6b6l3V2P2P2P2P2P2P2U2V2V2V2P2P2P2P2P2U2U2V2V2P2P2P2P2U2U2V2P2P2P2P2U2U2V2P2P2P2P2U2V2V2P2P2P2U2V2P2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2U2V2P2P2P2V2 ", -" U2U2P2P2P2V2U2P2P2V2U2P2P2P2V2U2P2P2P2P2U2U2P2P2P2V2U2P2P2P2P2V2U2P2P2P2P2V2V2U2P2P2P2P2V2V2U2P2P2P2P2V2U2U2P2P2P2P2P2V2V2U2U2P2P2P2P2P2P2V2V2U2U2P2P2P2P2P2P2P2V2V2V2U2U2U2P2P2P2P2P2f4C3c6h5k2d673d2i5/.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . /.i5d2C4 5#4x3c6C3Y5P2P2P2P2P2P2U2U2V2V2P2P2P2P2P2P2U2U2V2V2P2P2P2P2P2U2U2V2P2P2P2P2P2U2V2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2V2P2P2P2U2 ", -" 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100644 index 27c2228..0000000 Binary files a/OSCAD/images/se.png and /dev/null differ diff --git a/OSCAD/images/seLogo.jpg b/OSCAD/images/seLogo.jpg deleted file mode 100644 index 993631b..0000000 Binary files a/OSCAD/images/seLogo.jpg and /dev/null differ diff --git a/OSCAD/images/slLogo.jpg b/OSCAD/images/slLogo.jpg deleted file mode 100644 index 47ce9b1..0000000 Binary files a/OSCAD/images/slLogo.jpg and /dev/null differ diff --git a/OSCAD/images/sub.png b/OSCAD/images/sub.png deleted file mode 100644 index 134f72a..0000000 Binary files a/OSCAD/images/sub.png and /dev/null differ diff --git a/OSCAD/kicadtoNgspice/KicadtoNgspice.py b/OSCAD/kicadtoNgspice/KicadtoNgspice.py deleted file mode 100755 index 962e587..0000000 --- a/OSCAD/kicadtoNgspice/KicadtoNgspice.py +++ /dev/null @@ -1,2695 +0,0 @@ -import sys -import os.path -from PyQt4 import QtGui,QtCore -from PyQt4.QtGui import * -from random import choice - -class NewWindow(QtGui.QWidget): - def __init__(self): - QWidget.__init__(self) - self.horizontalLayout = QtGui.QVBoxLayout(self) - self.scrollArea = QtGui.QScrollArea(self) - self.scrollArea.setWidgetResizable(True) - self.scrollAreaWidgetContents = QtGui.QWidget() - self.scrollAreaWidgetContents.setGeometry(QtCore.QRect(0, 0, 100, 100)) - self.horizontalLayout_2 = QtGui.QHBoxLayout(self.scrollAreaWidgetContents) - self.grid = QtGui.QGridLayout() - self.horizontalLayout_2.addLayout(self.grid) - self.scrollArea.setWidget(self.scrollAreaWidgetContents) - self.SubmitButton = QtGui.QPushButton("Submit and Exit") - self.ClearButton= QtGui.QPushButton("Clear Button") - self.BackButton= QtGui.QPushButton("Back Button") - self.horizontalLayout.addWidget(self.scrollArea) - self.horizontalLayout.addWidget(self.BackButton) - self.horizontalLayout.addWidget(self.ClearButton) - self.horizontalLayout.addWidget(self.SubmitButton) - self.SubmitButton.clicked.connect(self.Submit) - self.ClearButton.clicked.connect(self.ClearModelParamValue) - self.BackButton.clicked.connect(self.BackAgain) - self.setGeometry(0,0,700, 400) - self.center() - - def ClearModelParamValue(self): - for line in guimodellisttrack: - #print "line",line - start=line[5] - end=line[6] - count=start - for item in range(end-start+1): - nextentry_var[count].setText("") - count=count+1 - - def BackAgain(self): - firstwindow=1 - w.show() - nw.close() - - def Submit(self): - try: - AddModelParametr() #Adding Model Parameter - for item in modelparamvalue: - schematicInfo.append(item[2]) #Adding Comment line - schematicInfo.append(item[1]) #Adding Model line - print "Successfully Closed" - #print "SchematicInfo" - #print SchematicInfo - self.close() - except: - QMessageBox.about(self,"Exception","Please Add before Submit") - create_ngspice_netlist() - - def center(self): - qr=self.frameGeometry() - cp = QtGui.QDesktopWidget().availableGeometry().center() - qr.moveCenter(cp) - self.move(qr.topLeft()) - -class Window(QtGui.QWidget): - def __init__(self): - super(Window,self).__init__() - def createrootwindow(self,sourcelist,sourcelisttrack): - self.backClicked=0 - global nextrow - self.nextrow=0 - self.horizontalLayout = QtGui.QVBoxLayout(self) - self.scrollArea = QtGui.QScrollArea(self) - self.scrollArea.setWidgetResizable(True) - self.scrollAreaWidgetContents = QtGui.QWidget() - self.scrollAreaWidgetContents.setGeometry(QtCore.QRect(0, 0, 100, 100)) - self.horizontalLayout_2 = QtGui.QHBoxLayout(self.scrollAreaWidgetContents) - self.grid = QtGui.QGridLayout() - self.horizontalLayout_2.addLayout(self.grid) - self.scrollArea.setWidget(self.scrollAreaWidgetContents) - self.Nextbutton = QtGui.QPushButton("Next Button") - self.Clearbutton= QtGui.QPushButton("Clear Button") - self.horizontalLayout.addWidget(self.scrollArea) - self.horizontalLayout.addWidget(self.Nextbutton) - self.horizontalLayout.addWidget(self.Clearbutton) - self.setGeometry(0,0,700, 400) - self.show() - self.Nextbutton.clicked.connect(self.NextPage) - self.Clearbutton.clicked.connect(self.ClearSourceValue) - self.center() - global count - global start - global end - count=1 - global row - row=0 - global entry_var - entry_var={} - if sourcelist: - for line in sourcelist: - #print "Voltage source line index: ",line[0] - #print "SourceList line Test: ",line - track_id=line[0] - print "track_id is ",track_id - - if line[2]=='ac': - label=QLabel(line[3]) - self.grid.addWidget(label,row,1) - row=row+1 - start=count - label=QLabel(line[4]) - self.grid.addWidget(label,row,0) - entry_var[count]=QLineEdit() - self.grid.addWidget(entry_var[count],row,1) - value=present_already(line[1],line[2]) - if value == 0: - entry_var[count].setText("") - else: - entry_var[count].setText(store_ans) - row=row+1 - end=count - count=count+1 - sourcelisttrack.append([track_id,'ac',start,end]) - elif line[2]=='dc': - label=QLabel(line[3]) - self.grid.addWidget(label,row,1) - row=row+1 - start=count - label=QLabel(line[4]) - self.grid.addWidget(label,row,0) - entry_var[count]=QLineEdit() - self.grid.addWidget(entry_var[count],row,1) - value=present_already(line[1],line[2]) - if value == 0: - entry_var[count].setText("") - else: - entry_var[count].setText(store_ans) - row=row+1 - end=count - count=count+1 - sourcelisttrack.append([track_id,'dc',start,end]) - elif line[2]=='sine': - label=QLabel(line[3]) - self.grid.addWidget(label,row,1) - row=row+1 - start=count - value=present_already(line[1],line[2]) - indi=0 - for it in range(4,9): - label=QLabel(line[it]) - self.grid.addWidget(label,row,0) - entry_var[count]=QLineEdit() - self.grid.addWidget(entry_var[count],row,1) - if value !=0: - store_ans_list=store_ans.split() - ans_list_size=len(store_ans_list) - if value==0 or indi >= ans_list_size : - entry_var[count].setText("") - else: - entry_var[count].setText(str(store_ans_list[indi])) - indi=indi+1 - row=row+1 - count=count+1 - - - end=count-1 - sourcelisttrack.append([track_id,'sine',start,end]) - elif line[2]=='pulse': - label=QLabel(line[3]) - self.grid.addWidget(label,row,1) - row=row+1 - start=count - value=present_already(line[1],line[2]) - indi=0; - for it in range(4,11): - label=QLabel(line[it]) - self.grid.addWidget(label,row,0) - entry_var[count]=QLineEdit() - self.grid.addWidget(entry_var[count],row,1) - if value!=0: - store_ans_list=store_ans.split() - ans_list_size=len(store_ans_list) - if value==0 or indi >= ans_list_size: - entry_var[count].setText("") - else: - entry_var[count].setText(str(store_ans_list[indi])) - indi=indi+1 - row=row+1 - count=count+1 - end=count-1 - sourcelisttrack.append([track_id,'pulse',start,end]) - elif line[2]=='pwl': - label=QLabel(line[3]) - self.grid.addWidget(label,row,1) - row=row+1 - start=count - label=QLabel(line[4]) - self.grid.addWidget(label,row,0) - entry_var[count]=QLineEdit() - self.grid.addWidget(entry_var[count],row,1) - value=present_already(line[1],line[2]) - if value==0: - entry_var[count].setText(""); - else: - entry_var[count].setText(str(store_ans)) - row=row+1 - end=count - count=count+1 - sourcelisttrack.append([track_id,'pwl',start,end]) - elif line[2]=='exp': - label=QLabel(line[3]) - self.grid.addWidget(label,row,1) - row=row+1 - start=count - indi=0 - value=present_already(line[1],line[2]) - for it in range(4,10): - label=QLabel(line[it]) - self.grid.addWidget(label,row,0) - entry_var[count]=QLineEdit() - self.grid.addWidget(entry_var[count],row,1) - if value != 0: - store_ans_list=store_ans.split() - ans_list_size=len(store_ans_list) - if value == 0 or indi >= ans_list_size: - entry_var[count].setText("") - else: - entry_var[count].setText(str(store_ans_list[indi])) - indi=indi+1 - - row=row+1 - count=count+1 - end=count-1 - sourcelisttrack.append([track_id,'exp',start,end]) - count=count+1 - #print "startcount ",start - #print "endcount ",end - else: - print "No source is present in your circuit" - - - - return sourcelist,sourcelisttrack - - def closeEvent(self,event): - print "window closed" - - def NextPage(self): - #print "next page" - AddSourceValue() - w.close() - nw.show() - firstwindow=0 - self.backClicked+=1 - global schematicInfo - global outputOption - global guimodelvalue - global guimodellisttrack - global guimodellist - if self.backClicked==1: - guimodelvalue=[] - outputOption=[] #check whether it affects the working - guimodellisttrack=[] - guimodellist=['adc8','dac8','gain','summer','multiplier','divider','limit','integrator','differentiator','limit8','controlledlimiter', -'analogswitch','zener','d_buffer','d_inverter','d_and','d_nand','d_or','d_nor','d_xor','d_xnor','d_tristate','d_pullup', -'d_pulldown','d_srlatch','d_jklatch','d_dlatch','d_tlatch','d_srff','d_jkff','d_dff','ic','transfo'] - ##Calling function which take information for entry and label - if self.backClicked==1: - schematicInfo,outputOption,guimodelvalue=convertICintoBasicBlocks(schematicInfo,outputOption,guimodelvalue) - - #print "Info is",schematicInfo - #print "outoption is",outputOption - #print "guivalue is",guimodelvalue - - global nextcount - nextcount=0 - global nextentry_var - if self.backClicked ==1: - nextentry_var={} - - ##Checking if any model is present - if guimodelvalue: - ## Calling Next frame generation function - for line in guimodelvalue: - print "line is ",line - if line[2] in guimodellist: - #print "ConvertICBlock index :",line[0] - if self.backClicked==1: - nextcount=self.nextframegeneration(line,nextentry_var,nextcount) - else: - print "Please look whether model is added in guimodellist inside code" - else: - print "There is no model in your circuit" - QMessageBox.about(self,"Model information","There is no model in your circuit") - - #AddModelParametr() - # tkMessageBox.showinfo("Model List Info","There is no model in your circuit, please click on Submit & Exit Button" ) - - def nextframegeneration(self,line,nextentry_var,nextcount): - print "Model Line in netlist is : ",line[1] - div=line[1].split() - #flag=present_already_model(div[0],line[2]) - flag=0 - #print "store ans here",stored_ans - store_ans_list=[] - if flag!=0: - store_ans_list=stored_ans.split() - print "list ",store_ans_list - indi=0 - label=QLabel(line[5]) - nw.grid.addWidget(label,self.nextrow,1) - start=nextcount - self.nextrow=self.nextrow+1 - if line[2]=='ic': - for item in range(len(line)-7): - label=QLabel(line[7+item]) - nw.grid.addWidget(label,self.nextrow,0) - nextentry_var[nextcount]=QLineEdit() - nw.grid.addWidget(nextentry_var[nextcount],self.nextrow,1) - nextcount=nextcount+1 - self.nextrow=self.nextrow+1 - end=nextcount-1 - guimodellisttrack.append([line[0],line[1],line[2],line[3],line[4],start,end,line[6]]) - else: - for item in range(len(line)-6): - label=QLabel(line[6+item]) - nw.grid.addWidget(label,self.nextrow,0) - nextentry_var[nextcount]=QLineEdit() - nw.grid.addWidget(nextentry_var[nextcount],self.nextrow,1) - if indi < len(store_ans_list) and flag ==1: - nextentry_var[nextcount].setText(store_ans_list[indi]) - indi=indi+1 - nextcount=nextcount+1 - self.nextrow=self.nextrow+1 - end=nextcount-1 - guimodellisttrack.append([line[0],line[1],line[2],line[3],line[4],start,end]) - - return nextcount - - def ClearSourceValue(self): - #print "Clear Source Value" - for line in sourcelisttrack: - start=line[2] - end=line[3] - count=start - for item in range(int(end-start+1)): - entry_var[count].setText("") - count=count+1 - def center(self): - qr=self.frameGeometry() - cp = QtGui.QDesktopWidget().availableGeometry().center() - qr.moveCenter(cp) - self.move(qr.topLeft()) - -'''def present_already_model(val,model_name): - global stored_ans - print "model name is ", model_name - if os.path.exists(last_input_file): - last_file=open(last_input_file) - else: - last_file=open(last_input_file,'w+') - stored_val=last_file.read().strip().split('\n') - print "model test val ",val - flag=0 - for line in stored_val: - word=line.split() - if len(word)==0: - continue - if word[0]=='.model': - print "word is ",word," len is ",len(word) - if word[1]==val: - if ((word[2].startswith(model_name))): - stored_ans="" - for tmp in range(2,len(word)-1): - try: - ind=word[tmp].index('=')+1 - stored_ans=stored_ans+word[tmp][ind:]+" " - except: - print "Exception" - store_ans.strip() - print "model ans ",stored_ans - flag=1 - break - - last_file.close() - return flag -''' - -def present_already(vol,inpscr): - words=vol.split() - volsrc=words[0] - global store_ans - if os.path.exists(last_input_file): - last_file=open(last_input_file) - else: - last_file=open(last_input_file,'w+') - stored_val=last_file.read().strip().split('\n') - flag=0 - for line in stored_val: - word=line.split() - if len(word)==0: - continue; - - if word[0] == volsrc : - if ((inpscr == 'ac' and inpscr == word[3]) or (inpscr == 'dc' and inpscr==word[3]) ): - if len(word)>4: - store_ans=word[4] - flag=1 - break - if ((inpscr == 'pwl' and word[3].startswith(inpscr)) or (inpscr=='exp' and word[3].startswith(inpscr)) or (inpscr=='pulse' and word[3].startswith(inpscr)) or (inpscr=='sine' and word[3].startswith(inpscr)) ): - store_ans="" - i=word[3].index('(')+1 - j=word[len(word)-1].index(')') - store_ans=word[3][i:]+" " - for num in range(4,len(word)-1): - store_ans=store_ans+word[num]+" " - store_ans=store_ans+word[len(word)-1][:j] - print store_ans - flag=1 - break - last_file.close() - return flag; - -def AddModelParametr(): - #print "models here" - #print "Adding Model Parameter" - #print "GuiModelValue",guimodelvalue - global guimodellisttrack - global modelparamvalue - global addmodelline - modelparamvalue=[] - addmodelline=[] - - for line in guimodellisttrack: - #print "model",line - if line[2]=='transfo': - try: - #print "here in transfo" - start=line[5] - end=line[6] - num_turns=str(nextentry_var[start].text()) - if num_turns=="": num_turns="310" - h_array= "H_array = [ " - b_array = "B_array = [ " - h1=str(nextentry_var[start+1].text()) - b1=str(nextentry_var[start+2].text()) - if len(h1)!=0 and len(b1)!=0: - h_array=h_array+h1+" " - b_array=b_array+b1+" " - bh_array = h_array+" ] " + b_array+" ]" - else: - bh_array = "H_array = [-1000 -500 -375 -250 -188 -125 -63 0 63 125 188 250 375 500 1000] B_array = [-3.13e-3 -2.63e-3 -2.33e-3 -1.93e-3 -1.5e-3 -6.25e-4 -2.5e-4 0 2.5e-4 6.25e-4 1.5e-3 1.93e-3 2.33e-3 2.63e-3 3.13e-3]" - area=str(nextentry_var[start+3].text()) - length=str(nextentry_var[start+4].text()) - if area=="": area="1" - if length=="":length="0.01" - num_turns2=str(nextentry_var[start+5].text()) - if num_turns2=="": - num_turns2="620" - addmodelline=".model "+line[3]+"_primary lcouple (num_turns= "+num_turns+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - addmodelline=".model "+line[3]+"_iron_core core ("+bh_array+" area = "+area+" length ="+length +")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - addmodelline=".model "+line[3]+"_secondary lcouple (num_turns ="+num_turns2+ ")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in transfo model ",line[1] - elif line[2]=='adc8': - try: - start=line[5] - end=line[6] - in_low=str(nextentry_var[start].text()) - in_high=str(nextentry_var[end].text()) - if in_low=="": in_low="0.8" - if in_high=="": in_high="2.0" - addmodelline=".model "+ line[3]+" adc_bridge(in_low="+in_low+" in_high="+in_high+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in adc8 model ",line[1] - - elif line[2]=='dac8': - try: - start=line[5] - end=line[6] - out_low=str(nextentry_var[start].text()) - out_high=str(nextentry_var[start+1].text()) - out_undef=str(nextentry_var[end].text()) - if out_low=="": out_low="0.2" - if out_high=="": out_high="5.0" - if out_undef=="": out_undef="5.0" - addmodelline=".model "+ line[3]+" dac_bridge(out_low="+out_low+" out_high="+out_high+" out_undef="+out_undef+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in dac8 model ",line[1] - - elif line[2]=='gain': - try: - start=line[5] - end=line[6] - in_offset=str(nextentry_var[start].text()) - gain=str(nextentry_var[start+1].text()) - out_offset=str(nextentry_var[end].text()) - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - if out_offset=="": out_offset="0.0" - addmodelline=".model "+ line[3]+" gain(in_offset="+in_offset+" out_offset="+out_offset+" gain="+gain+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in gain model ",line[1] - - elif line[2]=='summer': - try: - start=line[5] - end=line[6] - in1_offset=str(nextentry_var[start].text()) - in2_offset=str(nextentry_var[start+1].text()) - in1_gain=str(nextentry_var[start+2].text()) - in2_gain=str(nextentry_var[start+3].text()) - out_gain=str(nextentry_var[start+4].text()) - out_offset=str(nextentry_var[end].text()) - if in1_offset=="": in1_offset="0.0" - if in2_offset=="": in2_offset="0.0" - if in1_gain=="": in1_gain="1.0" - if in2_gain=="": in2_gain="1.0" - if out_gain=="": out_gain="1.0" - if out_offset=="": out_offset="0.0" - addmodelline=".model "+ line[3]+" summer(in_offset=["+in1_offset+" "+in2_offset+"] in_gain=["+in1_gain+" "+in2_gain+"] out_offset="+out_offset+" out_gain="+out_gain+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in summer model ",line[1] - - elif line[2]=='multiplier': - try: - start=line[5] - end=line[6] - in1_offset=str(nextentry_var[start].text()) - in2_offset=str(nextentry_var[start+1].text()) - in1_gain=str(nextentry_var[start+2].text()) - in2_gain=str(nextentry_var[start+3].text()) - out_gain=str(nextentry_var[start+4].text()) - out_offset=str(nextentry_var[end].text()) - if in1_offset=="": in1_offset="0.0" - if in2_offset=="": in2_offset="0.0" - if in1_gain=="": in1_gain="1.0" - if in2_gain=="": in2_gain="1.0" - if out_gain=="": out_gain="1.0" - if out_offset=="": out_offset="0.0" - addmodelline=".model "+ line[3]+" mult(in_offset=["+in1_offset+" "+in2_offset+"] in_gain=["+in1_gain+" "+in2_gain+"] out_offset="+out_offset+" out_gain="+out_gain+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in multiplier model ",line[1] - - elif line[2]=='divider': - try: - start=line[5] - end=line[6] - num_offset=str(nextentry_var[start].text()) - den_offset=str(nextentry_var[start+1].text()) - num_gain=str(nextentry_var[start+2].text()) - den_gain=str(nextentry_var[start+3].text()) - out_gain=str(nextentry_var[start+4].text()) - out_offset=str(nextentry_var[start+5].text()) - den_lower_limit=str(nextentry_var[end].text()) - if num_offset=="": num_offset="0.0" - if den_offset=="": den_offset="0.0" - if num_gain=="": num_gain="1.0" - if den_gain=="": den_gain="1.0" - if out_gain=="": out_gain="1.0" - if out_offset=="": out_offset="0.0" - if den_lower_limit=="": den_lower_limit="1.0e-10" - addmodelline=".model "+ line[3]+" divide(num_offset="+num_offset+" den_offset="+den_offset+" num_gain="+num_gain+" den_gain="+den_gain+" out_offset="+out_offset+" out_gain="+out_gain+" den_lower_limit="+den_lower_limit+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in divider model ",line[1] - - elif line[2]=='limit': - try: - start=line[5] - end=line[6] - lowerLimit=str(nextentry_var[start].text()) - upperLimit=str(nextentry_var[start+1].text()) - in_offset=str(nextentry_var[start+2].text()) - gain=str(nextentry_var[end].text()) - if lowerLimit=="": lowerLimit="0.0" - if upperLimit=="": upperLimit="5.0" - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - addmodelline=".model "+ line[3]+" limit(out_lower_limit="+lowerLimit+" out_upper_limit="+upperLimit+" in_offset="+in_offset+" gain="+gain+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in limit model ",line[1] - - elif line[2]=='integrator': - try: - start=line[5] - end=line[6] - out_lower_limit=str(nextentry_var[start].text()) - out_upper_limit=str(nextentry_var[start+1].text()) - in_offset=str(nextentry_var[start+2].text()) - gain=str(nextentry_var[start+3].text()) - out_ic=str(nextentry_var[end].text()) - if out_lower_limit=="": out_lower_limit="0.0" - if out_upper_limit=="": out_upper_limit="5.0" - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - if out_ic=="": out_ic="0.0" - addmodelline=".model "+ line[3]+" int(out_lower_limit="+out_lower_limit+" out_upper_limit="+out_upper_limit+" in_offset="+in_offset+" gain="+gain+" out_ic="+out_ic+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in integrator model ",line[1] - - elif line[2]=='differentiator': - try: - start=line[5] - end=line[6] - out_lower_limit=str(nextentry_var[start].text()) - out_upper_limit=str(nextentry_var[start+1].text()) - out_offset=str(nextentry_var[start+2].text()) - gain=str(nextentry_var[end].text()) - if out_lower_limit=="": out_lower_limit="0.0" - if out_upper_limit=="": out_upper_limit="5.0" - if out_offset=="": out_offset="0.0" - if gain=="": gain="1.0" - addmodelline=".model "+ line[3]+" d_dt(out_lower_limit="+out_lower_limit+" out_upper_limit="+out_upper_limit+" out_offset="+out_offset+" gain="+gain+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in differentiator model ",line[1] - - elif line[2]=='limit8': - try: - start=line[5] - end=line[6] - lowerLimit=str(nextentry_var[start].text()) - upperLimit=str(nextentry_var[start+1].text()) - in_offset=str(nextentry_var[start+2].text()) - gain=str(nextentry_var[end].text()) - if lowerLimit=="": lowerLimit="0.0" - if upperLimit=="": upperLimit="5.0" - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - addmodelline=".model "+ line[3]+" limit(out_lower_limit="+lowerLimit+" out_upper_limit="+upperLimit+" in_offset="+in_offset+" gain="+gain+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in limit8 model ",line[1] - - elif line[2]=='controlledlimiter': - try: - start=line[5] - end=line[6] - in_offset=str(nextentry_var[start].text()) - gain=str(nextentry_var[end].text()) - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - addmodelline=".model "+ line[3]+" climit(in_offset="+in_offset+" gain="+gain+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in controlledlimiter model ",line[1] - - elif line[2]=='analogswitch': - try: - start=line[5] - end=line[6] - cntl_on=str(nextentry_var[start].text()) - cntl_off=str(nextentry_var[start+1].text()) - r_on=str(nextentry_var[start+2].text()) - r_off=str(nextentry_var[end].text()) - if cntl_on=="": cntl_on="5.0" - if cntl_off=="": cntl_off="0.0" - if r_on=="": r_on="10.0" - if r_off=="": r_off="1e6" - addmodelline=".model "+ line[3]+" aswitch(cntl_on="+cntl_on+" cntl_off="+cntl_off+" r_on="+r_on+" r_off="+r_off+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in analogswitch model ",line[1] - - elif line[2]=='zener': - try: - start=line[5] - end=line[6] - v_breakdown=str(nextentry_var[start].text()) - i_breakdown=str(nextentry_var[start+1].text()) - i_sat=str(nextentry_var[start+2].text()) - n_forward=str(nextentry_var[end].text()) - if v_breakdown=="": v_breakdown="5.6" - if i_breakdown=="": i_breakdown="1.0e-2" - if i_sat=="": i_sat="1.0e-12" - if n_forward=="": n_forward="1.0" - addmodelline=".model "+ line[3]+" zener(v_breakdown="+v_breakdown+" i_breakdown="+i_breakdown+" i_sat="+i_sat+" n_forward="+n_forward+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in zener model ",line[1] - - elif line[2]=='d_buffer': - try: - start=line[5] - end=line[6] - rise_delay=str(nextentry_var[start].text()) - fall_delay=str(nextentry_var[start+1].text()) - input_load=str(nextentry_var[end].text()) - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_buffer(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_buffer model ",line[1] - - elif line[2]=='d_inverter': - try: - start=line[5] - end=line[6] - rise_delay=str(nextentry_var[start].text()) - fall_delay=str(nextentry_var[start+1].text()) - input_load=str(nextentry_var[end].text()) - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_inverter(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_inverter model ",line[1] - - elif line[2]=='d_and': - try: - start=line[5] - end=line[6] - rise_delay=str(nextentry_var[start].text()) - fall_delay=str(nextentry_var[start+1].text()) - input_load=str(nextentry_var[end].text()) - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_and(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_and model ",line[1] - - elif line[2]=='d_nand': - try: - start=line[5] - end=line[6] - rise_delay=str(nextentry_var[start].text()) - fall_delay=str(nextentry_var[start+1].text()) - input_load=str(nextentry_var[end].text()) - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_nand(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_nand model ",line[1] - - elif line[2]=='d_or': - try: - start=line[5] - end=line[6] - rise_delay=str(nextentry_var[start].text()) - fall_delay=str(nextentry_var[start+1].text()) - input_load=str(nextentry_var[end].text()) - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_or(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_or model ",line[1] - - elif line[2]=='d_nor': - try: - start=line[5] - end=line[6] - rise_delay=str(nextentry_var[start].text()) - fall_delay=str(nextentry_var[start+1].text()) - input_load=str(nextentry_var[end].text()) - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_nor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_nor model ",line[1] - - elif line[2]=='d_xor': - try: - start=line[5] - end=line[6] - rise_delay=str(nextentry_var[start].text()) - fall_delay=str(nextentry_var[start+1].text()) - input_load=str(nextentry_var[end].text()) - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_xor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_xor model ",line[1] - - elif line[2]=='d_xnor': - try: - start=line[5] - end=line[6] - rise_delay=str(nextentry_var[start].text()) - fall_delay=str(nextentry_var[start+1].text()) - input_load=str(nextentry_var[end].text()) - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_xnor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_xnor model ",line[1] - - elif line[2]=='d_tristate': - try: - start=line[5] - end=line[6] - delay=str(nextentry_var[start].text()) - input_load=str(nextentry_var[start+1].text()) - enable_load=str(nextentry_var[end].text()) - if delay=="": delay="1e-12" - if input_load=="": input_load="1e-12" - if enable_load=="": enable_load="1e-12" - addmodelline=".model "+ line[3]+" d_tristate(delay="+delay+" enable_load="+enable_load+" input_load="+input_load+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_tristate model ",line[1] - - elif line[2]=='d_pullup': - try: - start=line[5] - end=line[6] - load=str(nextentry_var[start].text()) - if load=="": load="1e-12" - addmodelline=".model "+ line[3]+" d_pullup(load="+load+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_pullup model ",line[1] - - elif line[2]=='d_pulldown': - try: - start=line[5] - end=line[6] - load=str(nextentry_var[start].text()) - if load=="": load="1e-12" - addmodelline=".model "+ line[3]+" d_pulldown(load="+load+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_pulldown model ",line[1] - - elif line[2]=='d_srlatch': - try: - start=line[5] - end=line[6] - sr_delay=str(nextentry_var[start].text()) - enable_delay=str(nextentry_var[start+1].text()) - set_delay=str(nextentry_var[start+2].text()) - reset_delay=str(nextentry_var[start+3].text()) - ic=str(nextentry_var[start+4].text()) - sr_load=str(nextentry_var[start+5].text()) - enable_load=str(nextentry_var[start+6].text()) - set_load=str(nextentry_var[start+7].text()) - reset_load=str(nextentry_var[start+8].text()) - rise_delay=str(nextentry_var[start+9].text()) - fall_delay=str(nextentry_var[end].text()) - if sr_delay=="": sr_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if sr_load=="": sr_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_srlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+sr_load="+sr_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+sr_delay="+sr_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_srlatch model ",line[1] - - elif line[2]=='d_jklatch': - try: - start=line[5] - end=line[6] - jk_delay=str(nextentry_var[start].text()) - enable_delay=str(nextentry_var[start+1].text()) - set_delay=str(nextentry_var[start+2].text()) - reset_delay=str(nextentry_var[start+3].text()) - ic=str(nextentry_var[start+4].text()) - jk_load=str(nextentry_var[start+5].text()) - enable_load=str(nextentry_var[start+6].text()) - set_load=str(nextentry_var[start+7].text()) - reset_load=str(nextentry_var[start+8].text()) - rise_delay=str(nextentry_var[start+9].text()) - fall_delay=str(nextentry_var[end].text()) - if jk_delay=="": jk_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if jk_load=="": jk_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_jklatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+jk_load="+jk_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+jk_delay="+jk_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_jklatch model ",line[1] - - elif line[2]=='d_dlatch': - try: - start=line[5] - end=line[6] - data_delay=str(nextentry_var[start].text()) - enable_delay=str(nextentry_var[start+1].text()) - set_delay=str(nextentry_var[start+2].text()) - reset_delay=str(nextentry_var[start+3].text()) - ic=str(nextentry_var[start+4].text()) - data_load=str(nextentry_var[start+5].text()) - enable_load=str(nextentry_var[start+6].text()) - set_load=str(nextentry_var[start+7].text()) - reset_load=str(nextentry_var[start+8].text()) - rise_delay=str(nextentry_var[start+9].text()) - fall_delay=str(nextentry_var[end].text()) - if data_delay=="": data_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if data_load=="": data_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_dlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+data_load="+data_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+data_delay="+data_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_dlatch model ",line[1] - - elif line[2]=='d_tlatch': - try: - start=line[5] - end=line[6] - t_delay=str(nextentry_var[start].text()) - enable_delay=str(nextentry_var[start+1].text()) - set_delay=str(nextentry_var[start+2].text()) - reset_delay=str(nextentry_var[start+3].text()) - ic=str(nextentry_var[start+4].text()) - t_load=str(nextentry_var[start+5].text()) - enable_load=str(nextentry_var[start+6].text()) - set_load=str(nextentry_var[start+7].text()) - reset_load=str(nextentry_var[start+8].text()) - rise_delay=str(nextentry_var[start+9].text()) - fall_delay=str(nextentry_var[end].text()) - if t_delay=="": t_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if t_load=="": t_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_tlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+t_load="+t_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+t_delay="+t_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_tlatch model ",line[1] - - elif line[2]=='d_srff': - try: - start=line[5] - end=line[6] - clk_delay=str(nextentry_var[start].text()) - set_delay=str(nextentry_var[start].text()) - reset_delay=str(nextentry_var[start].text()) - ic=str(nextentry_var[start].text()) - sr_load=str(nextentry_var[start].text()) - clk_load=str(nextentry_var[start].text()) - set_load=str(nextentry_var[start].text()) - reset_load=str(nextentry_var[start].text()) - rise_delay=str(nextentry_var[start].text()) - fall_delay=str(nextentry_var[start].text()) - if clk_delay=="": clk_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if sr_load=="": sr_load="1e-12" - if clk_load=="": clk_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_srff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+sr_load="+sr_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_srff model ",line[1] - - elif line[2]=='d_jkff': - try: - start=line[5] - end=line[6] - clk_delay=str(nextentry_var[start].text()) - set_delay=str(nextentry_var[start].text()) - reset_delay=str(nextentry_var[start].text()) - ic=str(nextentry_var[start].text()) - jk_load=str(nextentry_var[start].text()) - clk_load=str(nextentry_var[start].text()) - set_load=str(nextentry_var[start].text()) - reset_load=str(nextentry_var[start].text()) - rise_delay=str(nextentry_var[start].text()) - fall_delay=str(nextentry_var[start].text()) - if clk_delay=="": clk_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if jk_load=="": sr_load="1e-12" - if clk_load=="": clk_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_jkff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+jk_load="+jk_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_jkff model ",line[1] - - elif line[2]=='d_dff': - try: - start=line[5] - end=line[6] - clk_delay=str(nextentry_var[start].text()) - set_delay=str(nextentry_var[start+1].text()) - reset_delay=str(nextentry_var[start+2].text()) - ic=str(nextentry_var[start+3].text()) - data_load=str(nextentry_var[start+4].text()) - clk_load=str(nextentry_var[start+5].text()) - set_load=str(nextentry_var[start+6].text()) - reset_load=str(nextentry_var[start+7].text()) - rise_delay=str(nextentry_var[start+8].text()) - fall_delay=str(nextentry_var[end].text()) - if clk_delay=="": clk_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if data_load=="": data_load="1e-12" - if clk_load=="": clk_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_dff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+data_load="+data_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_dff model ",line[1] - - elif line[2]=='d_tff': - try: - start=line[5] - end=line[6] - clk_delay=str(nextentry_var[start].text()) - set_delay=str(nextentry_var[start+1].text()) - reset_delay=str(nextentry_var[start+2].text()) - ic=str(nextentry_var[start+3].text()) - t_load=str(nextentry_var[start+4].text()) - clk_load=str(nextentry_var[start+5].text()) - set_load=str(nextentry_var[start+6].text()) - reset_load=str(nextentry_var[start+7].text()) - rise_delay=str(nextentry_var[start+8].text()) - fall_delay=str(nextentry_var[end].text()) - if t_delay=="": t_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if t_load=="": t_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_tff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+t_load="+t_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_tff model ",line[1] - - elif line[2]=='ic': - try: - start=line[5] - end=line[6] - ic=str(nextentry_var[start].text()) - if ic=="": ic="0" - addmodelline=".ic v("+line[7]+")="+ic - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in ic initial condition ",line[1] - - else: - print "No model found" - QMessageBox.about(self,"Model Information","Please check whether used model is available inside code") - #tkMessageBox.showinfo("Model Info","Please check whether used model is available inside code") - - print "Model List has been added",modelparamvalue - - -def AddSourceValue(): - #print "Add Source Value" - - global sourcelistvalue - sourcelistvalue=[] - global start - global end - start=0 - end=0 - #print "Track Source List :",sourcelisttrack - #print "Initial Source List Value :",sourcelistvalue - for compline in sourcelisttrack: - print "compline ",compline - index=compline[0] - addline=schematicInfo[index] - #print "addline ",addline,"for index ",index - if compline[1]=='sine': - try: - start=compline[2] - end=compline[3] - vo_val=str(entry_var[start].text()) if len(str(entry_var[start].text()))>0 else '0' - va_val=str(entry_var[start+1].text()) if len(str(entry_var[start+1].text()))>0 else '0' - freq_val=str(entry_var[start+2].text()) if len(str(entry_var[start+2].text()))>0 else '0' - td_val=str(entry_var[start+3].text()) if len(str(entry_var[start+3].text()))>0 else '0' - theta_val=str(entry_var[end].text()) if len(str(entry_var[end].text()))>0 else '0' - addline=addline.partition('(')[0] + "("+vo_val+" "+va_val+" "+freq_val+" "+td_val+" "+theta_val+")" - #print "Line Added ",addline - sourcelistvalue.append([index,addline]) - except: - print "Caught an exception in sine voltage source ",addline - - elif compline[1]=='pulse': - try: - print "yessss" - start=compline[2] - end=compline[3] - v1_val=str(entry_var[start].text()) if len(str(entry_var[start].text()))>0 else '0' - v2_val=str(entry_var[start+1].text()) if len(str(entry_var[start+1].text()))>0 else '0' - td_val=str(entry_var[start+2].text()) if len(str(entry_var[start+2].text()))>0 else '0' - tr_val=str(entry_var[start+3].text()) if len(str(entry_var[start+3].text()))>0 else '0' - tf_val=str(entry_var[start+4].text()) if len(str(entry_var[start+4].text()))>0 else '0' - pw_val=str(entry_var[start+5].text()) if len(str(entry_var[start+5].text()))>0 else '0' - tp_val=str(entry_var[end].text()) if len(str(entry_var[end].text()))>0 else '0' - - addline=addline.partition('(')[0] + "("+v1_val+" "+v2_val+" "+td_val+" "+tr_val+" "+tf_val+" "+pw_val+" "+tp_val+")" - #print "Line Added ",addline - sourcelistvalue.append([index,addline]) - except: - print "Caught an exception in pulse voltage source ",addline - - elif compline[1]=='pwl': - try: - start=compline[2] - t_v_val=str(entry_var[start].text()) if len(str(entry_var[start].text()))>0 else '0 0' - addline=addline.partition('(')[0] + "("+t_v_val+")" - #print "Line Added ",addline - sourcelistvalue.append([index,addline]) - except: - print "Caught an exception in pwl voltage source ",addline - - elif compline[1]=='ac': - try: - start=compline[2] - va_val=str(entry_var[start].text()) if len(str(entry_var[start].text()))>0 else '0' - addline=' '.join(addline.split()) - addline=addline.partition('ac')[0] +" "+'ac'+" "+ va_val - #print "Line Added ",addline - sourcelistvalue.append([index,addline]) - except: - print "Caught an exception in ac voltage source ",addline - - elif compline[1]=='dc': - try: - start=compline[2] - v1_val=str(entry_var[start].text()) if len(str(entry_var[start].text()))>0 else '0' - addline=' '.join(addline.split()) - addline=addline.partition('dc')[0] + " " +'dc'+ " "+v1_val - #print "Line Added ",addline - sourcelistvalue.append([index,addline]) - except: - print "Caught an exception in dc voltage source",addline - - elif compline[1]=='exp': - try: - start=compline[2] - end=compline[3] - v1_val=str(entry_var[start].text()) if len(str(entry_var[start].text()))>0 else '0' - v2_val=str(entry_var[start+1].text()) if len(str(entry_var[start+1].text()))>0 else '0' - td1_val=str(entry_var[start+2].text()) if len(str(entry_var[start+2].text()))>0 else '0' - tau1_val=str(entry_var[start+3].text()) if len(str(entry_var[start+3].text()))>0 else '0' - td2_val=str(entry_var[start+4].text()) if len(str(entry_var[start+4].text()))>0 else '0' - tau2_val=str(entry_var[end].text()) if len(str(entry_var[end].text()))>0 else '0' - - addline=addline.partition('(')[0] + "("+v1_val+" "+v2_val+" "+td1_val+" "+tau1_val+" "+td2_val+" "+tau2_val+")" - #print "Line Added ",addline - sourcelistvalue.append([index,addline]) - except: - print "Caught an exception in exp voltage source ",addline - #print "Final Source List Value :",sourcelistvalue - ##Adding into schematicInfo - for item in sourcelistvalue: - del schematicInfo[item[0]] - schematicInfo.insert(item[0],item[1]) - -def create_ngspice_netlist(): - #print "sche in create_ng ",schematicInfo - last_file=open(last_input_file,"w"); - global spec_info - for info in schematicInfo: - spec_info=info.split() - if spec_info[0][0]=='v' or spec_info[0]=='.model': - last_file.writelines(info) - last_file.writelines('\n') - - #Add newline in the schematic information - for i in range(len(schematicInfo),0,-1): - schematicInfo.insert(i,'\n') - outfile=filename+".out" - cktfile=filename+".ckt" - out=open(outfile,"w") - ckt=open(cktfile,"w") - - out.writelines(infoline) - out.writelines('\n') - ckt.writelines(infoline) - ckt.writelines('\n') - - for modelName in modelList: - if os.path.exists(modelName+".lib"): - out.writelines('.include '+modelName+'.lib\n') - ckt.writelines('.include '+modelName+'.lib\n') - - for subcktName in subcktList: - out.writelines('.include '+subcktName+'.sub\n') - ckt.writelines('.include '+subcktName+'.sub\n') - if finalNetlist: - sections=[simulatorOption, initialCondOption, schematicInfo, analysisOption] - else: - sections=[simulatorOption, initialCondOption, schematicInfo] - for section in sections: - if len(section) == 0: - continue - else: - out.writelines('\n') - out.writelines(section) - ckt.writelines('\n') - ckt.writelines(section) - if finalNetlist: - out.writelines('\n* Control Statements \n') - out.writelines('.control\n') - out.writelines('run\n') - out.writelines(outputOption) - outputOption1=[] - for option in outputOption: - if (("plot" in option) or ("print" in option)): - outputOption1.append("."+option) - else: - outputOption1.append(option) - ckt.writelines(outputOption1) - out.writelines('print allv > plot_data_v.txt\n') - out.writelines('print alli > plot_data_i.txt\n') - out.writelines('.endc\n') - out.writelines('.end\n') - ckt.writelines('.end\n') - last_file.close() - out.close() - ckt.close() - - print "The ngspice netlist has been written in "+filename+".out" - print "The scilab netlist has been written in "+filename+".ckt" - - -def convertICintoBasicBlocks(schematicInfo,outputOption,guimodelvalue): - #Insert Special source parameters - k=1 - #print "schematicInfo is ",schematicInfo - #print "guimodelvalue is ",guimodelvalue - for compline in schematicInfo: - words=compline.split() - compName=words[0] - # Find the IC from schematic - if compName[0]=='u': - # Find the component from the circuit - index=schematicInfo.index(compline) - compType=words[len(words)-1]; - schematicInfo.remove(compline) - - if (compType=="7404" or compType=="74hc04" or compType=="74hct04" or compType=="74ls04" or compType=="74ls14"): - i=1; - # Add first three Not gates - while words[i]!="0": - # Add analog to digital converter for input A - schematicInfo.append("a"+str(k)+" ["+words[i]+"] ["+words[i]+"_in] "+" "+compName+"adc") - k=k+1 - # Add Not gate - schematicInfo.append("a"+str(k)+" "+words[i]+"_in "+words[i+1]+"_out "+compName) - k=k+1 - # Add digital to analog converter for output B - schematicInfo.append("a"+str(k)+" ["+words[i+1]+"_out] ["+words[i+1]+"] "+" "+compName+"dac") - k=k+1 - i=i+2 - i=i+1 - # Add last three Not gates - while i11: - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[12]+" "+words[11]+" "+words[10]+" "+words[13]+"] ["+words[12]+"_in "+words[11]+"_in "+words[10]+"_in "+words[13]+"_in] "+compName+"adc") - k=k+1 - # Add D Flip-flop - schematicInfo.append("a"+str(k)+" "+words[12]+"_in "+words[11]+"_in ~"+words[10]+"_in ~"+words[13]+"_in "+words[9]+"_out "+words[8]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[9]+"_out "+words[8]+"_out] ["+words[9]+" "+words[8]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for D Flip-Flop - schematicInfo.append(".model "+ compName+" d_dff") - # Add model for analog-to-digital bridge - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="7475" or compType=="74hc75" or compType=="74ls75"): - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[1]+"_in] "+compName+"adc") - k=k+1 - # Add T Flip-flop - schematicInfo.append("a"+str(k)+" "+words[2]+"_in "+words[3]+"_in ~"+words[4]+"_in ~"+words[1]+"_in "+words[5]+"_out "+words[6]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[5]+"_out "+words[6]+"_out] ["+words[5]+" "+words[6]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for T Flip-Flop - schematicInfo.append(".model "+ compName+" d_tff") - # Add model for analog-to-digital bridge - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="74107" or compType=="74hc107" or compType=="74ls107"): - if len(words)>11: - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[4]+" "+words[12]+" "+words[13]+"] ["+words[1]+"_in "+words[4]+"_in "+words[12]+"_in "+words[13]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[1]+"_in "+words[4]+"_in ~"+words[12]+"_in ~"+words[13]+"_in ~"+words[13]+"_in "+words[3]+"_out "+words[2]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[3]+"_out "+words[2]+"_out] ["+words[3]+" "+words[2]+"] "+" "+compName+"dac") - k=k+1 - - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[8]+" "+words[11]+" "+words[9]+" "+words[10]+"] ["+words[8]+"_in "+words[11]+"_in "+words[9]+"_in "+words[10]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[8]+"_in "+words[11]+"_in ~"+words[9]+"_in ~"+words[10]+"_in ~"+words[10]+"_in "+words[5]+"_out "+words[6]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[5]+"_out "+words[6]+"_out] ["+words[5]+" "+words[6]+"] "+" "+compName+"dac") - k=k+1 - else: - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[4]+" "+words[12]+" "+words[13]+"] ["+words[1]+"_in "+words[4]+"_in "+words[12]+"_in "+words[13]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[1]+"_in "+words[4]+"_in ~"+words[12]+"_in ~"+words[13]+"_in ~"+words[13]+"_in "+words[3]+"_out "+words[2]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[3]+"_out "+words[2]+"_out] ["+words[3]+" "+words[2]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for JK Flip-Flop - schematicInfo.append(".model "+ compName+" d_jkff") - # Add model for analog-to-digital bridge - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="74109" or compType=="74hc109" or compType=="74ls109"): - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[5]+"_in "+words[1]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[2]+"_in ~"+words[3]+"_in "+words[4]+"_in ~"+words[5]+"_in ~"+words[1]+"_in "+words[6]+"_out "+words[7]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[6]+"_out "+words[7]+"_out] ["+words[6]+" "+words[7]+"] "+" "+compName+"dac") - k=k+1 - if len(words)>12: - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[14]+" "+words[13]+" "+words[12]+" "+words[11]+" "+words[15]+"] ["+words[14]+"_in "+words[13]+"_in "+words[12]+"_in "+words[11]+"_in "+words[15]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[14]+"_in ~"+words[13]+"_in "+words[12]+"_in ~"+words[11]+"_in ~"+words[15]+"_in "+words[10]+"_out "+words[9]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[10]+"_out "+words[9]+"_out] ["+words[10]+" "+words[9]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for JK Flip-Flop - schematicInfo.append(".model "+ compName+" d_jkff") - # Add model for analog-to-digital bridge - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="7471" or compType=="74hc71" or compType=="74ls71"): - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[5]+"_in "+words[1]+"_in] "+compName+"adc") - k=k+1 - # Add S-R Flip-flop - schematicInfo.append("a"+str(k)+" "+words[2]+"_in ~"+words[3]+"_in "+words[4]+"_in ~"+words[5]+"_in ~"+words[1]+"_in "+words[6]+"_out "+words[7]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[6]+"_out "+words[7]+"_out] ["+words[6]+" "+words[7]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for SR Flip-Flop - schematicInfo.append(".model "+ compName+" d_srff") - # Add model for analog-to-digital bridge741 - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="74112" or compType=="74hc112" or compType=="74ls112"): - if len(words)>12: - schematicInfo.append("a"+str(k)+" "+words[3]+" "+words[2]+" ~"+words[1]+" ~"+words[4]+" ~"+words[15]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - schematicInfo.append("a"+str(k)+" "+words[11]+" "+words[12]+" ~"+words[13]+" ~"+words[10]+" ~"+words[14]+" "+words[9]+" "+words[7]+" "+compName) - k=k+1 - else: - schematicInfo.append("a"+str(k)+" "+words[3]+" "+words[2]+" ~"+words[1]+" ~"+words[4]+" ~"+words[8]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* "+compType) - schematicInfo.append(".model "+ compName+" d_jkff") - elif compType=="dac": - schematicInfo.append("a"+str(k)+" ["+words[1]+"] ["+words[2]+"] "+compName) - k=k+1 - schematicInfo.insert(index,"* Digital to Analog converter "+compType) - schematicInfo.append(".model "+ compName+" dac_bridge") - elif compType=="adc": - schematicInfo.append("a"+str(k)+" ["+words[1]+"] ["+words[2]+"] "+compName) - k=k+1 - schematicInfo.insert(index,"* Analog to Digital converter "+compType) - schematicInfo.append(".model "+ compName+" adc_bridge") - elif compType=="adc8": - for i in range(0,len(words)/2-1): - schematicInfo.append("a"+str(k)+" ["+words[i+1]+"] ["+words[i+len(words)/2]+"] "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Analog to Digital Converter" - Comment='* Analog to Digital converter '+compType - Title='Add parameters for analog to digital converter '+compName - in_low=' Enter input low level voltage (default=0.8): ' - in_high=' Enter input high level voltage (default=2.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,in_low,in_high]) - elif compType=="dac8": - for i in range(0,len(words)/2-1): - schematicInfo.append("a"+str(k)+" ["+words[i+1]+"] ["+words[i+len(words)/2]+"] "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Digital to Analog converter" - Comment='* Digital to Analog converter '+compType - Title='Add parameters for digital to analog converter '+compName - out_low=' Enter output low level voltage (default=0.2): ' - out_high=' Enter output high level voltage (default=5.0): ' - out_undef=' Enter output for undefined voltage level (default=2.2): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,out_low,out_high,out_undef]) - elif compType=="gain": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Gain" - Comment='* Gain '+compType - Title='Add parameters for Gain '+compName - in_offset=' Enter offset for input (default=0.0): ' - gain=' Enter gain (default=1.0): ' - out_offset=' Enter offset for output (default=0.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,in_offset,gain,out_offset]) - elif compType=="summer": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding summer" - Comment='* Summer '+compType - Title='Add parameters for Summer '+compName - in1_offset=' Enter offset for input 1 (default=0.0): ' - in2_offset=' Enter offset for input 2 (default=0.0): ' - in1_gain=' Enter gain for input 1 (default=1.0): ' - in2_gain=' Enter gain for input 2 (default=1.0): ' - out_gain=' Enter gain for output (default=1.0): ' - out_offset=' Enter offset for output (default=0.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,in1_offset,in2_offset,in1_gain,in2_gain,out_gain,out_offset]) - elif compType=="multiplier": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Multiplier" - Comment='* Multiplier '+compType - Title='Add parameters for Multiplier '+compName - in1_offset=' Enter offset for input 1 (default=0.0): ' - in2_offset=' Enter offset for input 2 (default=0.0): ' - in1_gain=' Enter gain for input 1 (default=1.0): ' - in2_gain=' Enter gain for input 2 (default=1.0): ' - out_gain=' Enter gain for output (default=1.0): ' - out_offset=' Enter offset for output (default=0.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,in1_offset,in2_offset,in1_gain,in2_gain,out_gain,out_offset]) - elif compType=="divider": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Divider" - Comment='Divider '+compType - Title='Add parameters for Divider '+compName - num_offset=' Enter offset for numerator (default=0.0): ' - den_offset=' Enter offset for denominator (default=0.0): ' - num_gain=' Enter gain for numerator (default=1.0): ' - den_gain=' Enter gain for denominator (default=1.0): ' - out_gain=' Enter gain for output (default=1.0): ' - out_offset=' Enter offset for output (default=0.0): ' - den_lower_limit=' Enter lower limit for denominator value (default=1.0e-10): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,num_offset,den_offset,num_gain,den_gain,out_gain,out_offset,den_lower_limit]) - elif compType=="limit": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding limiter" - Comment='* Limiter '+compType - Title='Add parameters for Limiter '+compName - lowerLimit=' Enter out lower limit (default=0.0): ' - upperLimit=' Enter out upper limit (default=5.0): ' - in_offset=' Enter offset for input (default=0.0): ' - gain=' Enter gain (default=1.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,lowerLimit,upperLimit,in_offset,gain]) - elif compType=="integrator": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding integrator" - Comment='* Integrator '+compType - Title='Add parameters for Integrator '+compName - out_lower_limit=' Enter out lower limit (default=0.0): ' - out_upper_limit=' Enter out upper limit (default=5.0): ' - in_offset=' Enter offset for input (default=0.0): ' - gain=' Enter gain (default=1.0): ' - out_ic=' Enter initial condition on output (default=0.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,out_lower_limit,out_upper_limit,in_offset,gain,out_ic]) - elif compType=="differentiator": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Differentiator" - Comment='* Differentiator '+compType - Title='Add parameters for Differentiator '+compName - out_lower_limit=' Enter out lower limit (default=0.0): ' - out_upper_limit=' Enter out upper limit (default=5.0): ' - out_offset=' Enter offset for output (default=0.0): ' - gain=' Enter gain (default=1.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,out_lower_limit,out_upper_limit,out_offset,gain]) - elif compType=="limit8": - for i in range(0,len(words)/2-1): - schematicInfo.append("a"+str(k)+" "+words[i+1]+" "+words[i+len(words)/2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding limiter" - Comment='* Limiter '+compType - Title='Add parameters for Limiter '+compName - lowerLimit=' Enter out lower limit (default=0.0): ' - upperLimit=' Enter out upper limit (default=5.0): ' - in_offset=' Enter offset for input (default=0.0): ' - gain=' Enter gain (default=1.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,lowerLimit,upperLimit,in_offset,gain]) - elif compType=="controlledlimiter": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding controlledlimiter" - Comment='* Controlled Limiter '+compType - Title='Add parameters for Controlled Limiter '+compName - in_offset=' Enter offset for input (default=0.0): ' - gain=' Enter gain (default=1.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,in_offset,gain]) - elif compType=="analogswitch": - schematicInfo.append("a"+str(k)+" "+words[1]+" ("+words[2]+" "+words[3]+") "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding analogswitch" - Comment='* Analog Switch '+compType - Title='Add parameters for Analog Switch '+compName - cntl_on=' Enter control ON voltage (default=5.0): ' - cntl_off=' Enter control OFF voltage (default=0.0): ' - r_on=' Enter ON resistance value (default=10.0): ' - r_off=' Enter OFF resistance value (default=1e6): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,cntl_on,cntl_off,r_on,r_off]) - elif compType=="zener": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Zener" - Comment='* Zener Diode '+compType - Title='Add parameters for Zener Diode '+compName - v_breakdown=' Enter Breakdown voltage (default=5.6): ' - i_breakdown=' Enter Breakdown current (default=2.0e-2): ' - i_sat=' Enter saturation current (default=1.0e-12): ' - n_forward=' Enter forward emission coefficient (default=0.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,v_breakdown,i_breakdown,i_sat,n_forward]) - elif compType=="d_buffer": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Buffer" - Comment='* Buffer '+compType - Title='Add parameters for Buffer '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_inverter": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Inverter" - Comment='* Inverter '+compType - Title='Add parameters for Inverter '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_and": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding AND" - Comment='* And '+compType - Title= 'Add parameters for And '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_nand": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding NAND" - Comment='* Nand '+compType - Title='Add parameters for Nand '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_or": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding OR" - Comment='* OR '+compType - Title='Add parameters for OR '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_nor": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding NOR" - Comment='* NOR '+compType - Title ='Add parameters for NOR '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_xor": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - print "-----------------------------------------------------------\n" - print "Adding XOR" - Comment='* XOR '+compType - Title='Add parameters for XOR '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_xnor": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding XNOR" - Comment='* XNOR '+compType - Title='Add parameters for XNOR '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_tristate": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Tristate" - Comment='* Tristate '+compType - Title='Add parameters for Tristate '+compName - delay=' Enter delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - enable_load=' Enter enable load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,delay,input_load,enable_load]) - elif compType=="d_pullup": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding pullup" - Comment='* Pullup '+compType - Title='Add parameters for Pullup '+compName - load=' Enter load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,load]) - elif compType=="d_pulldown": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding pulldown" - Comment='* Pulldown '+compType - Title='Add parameters for Pulldown '+compName - load=' Enter load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,load]) - elif compType=="d_srlatch": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding SR Latch" - Comment='* SR Latch '+compType - Title='Add parameters for SR Latch '+compName - sr_delay=' Enter input to set-reset delay (default=1e-12): ' - enable_delay=' Enter enable delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - sr_load=' Enter input to set-reset load (default=1e-12): ' - enable_load=' Enter enable load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,sr_delay,enable_delay,set_delay,reset_delay,ic,sr_load,enable_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_jklatch": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding JK Latch" - Comment='* JK Latch '+compType - Title= 'Add parameters for JK Latch '+compName - jk_delay=' Enter input to j-k delay (default=1e-12): ' - enable_delay=' Enter enable delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - jk_load=' Enter input to j-k load (default=1e-12): ' - enable_load=' Enter enable load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,jk_delay,enable_delay,set_delay,reset_delay,ic,enable_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_dlatch": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding D Latch" - Comment='* D Latch '+compType - Title= 'Add parameters for D Latch '+compName - data_delay=' Enter input to data delay (default=1e-12): ' - enable_delay=' Enter enable delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - data_load=' Enter input to data load (default=1e-12): ' - enable_load=' Enter enable load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,data_delay,enable_delay,set_delay,reset_delay,ic,data_load,enable_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_tlatch": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding T Latch" - Comment='* T Latch '+compType - Title= 'Add parameters for T Latch '+compName - t_delay=' Enter input to t delay (default=1e-12): ' - enable_delay=' Enter enable delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - t_load=' Enter input to t load (default=1e-12): ' - enable_load=' Enter enable load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,t_delay,enable_delay,set_delay,reset_delay,ic,t_load,enable_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_srff": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding SR Flip-Flop" - Comment='* SR Flip-Flop '+compType - Title='Add parameters for SR Flip-Flop '+compName - clk_delay=' Enter clk delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - sr_load=' Enter input to set-reset load (default=1e-12): ' - clk_load=' Enter clk load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,sr_load,clk_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_jkff": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding JK Flip-Flop" - Comment='* JK Flip-Flop '+compType - Title= 'Add parameters for JK Flip-Flop '+compName - clk_delay=' Enter clk delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - jk_load=' Enter input to j-k load (default=1e-12): ' - clk_load=' Enter clk load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,jk_load,clk_load,set_load,reset_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_dff": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding D Flip-Flop" - Comment='* D Flip-Flop '+compType - Title= 'Add parameters for D Flip-Flop '+compName - clk_delay=' Enter clk delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - data_load=' Enter input to data load (default=1e-12): ' - clk_load=' Enter clk load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,data_load,clk_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_tff": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding T Flip-Flop" - Comment='* T Flip-Flop '+compType - Title='Add parameters for T Flip-Flip '+compName - clk_delay=' Enter clk delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - t_load=' Enter input to t load (default=1e-12): ' - clk_load=' Enter clk load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,t_load,clk_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="vplot1": - outputOption.append("plot v("+words[1]+")\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vplot8_1": - outputOption.append("plot ") - for i in range(1,len(words)-1): - outputOption.append("v("+words[i]+") ") - outputOption.append("\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vdbplot8_1": - outputOption.append("plot ") - for i in range(1,len(words)-1): - outputOption.append("db(v("+words[i]+")) ") - outputOption.append("\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vphase_plot8_1": - outputOption.append("plot ") - for i in range(1,len(words)-1): - outputOption.append("ph(v("+words[i]+")) ") - outputOption.append("\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vprint1": - outputOption.append("print v("+words[1]+")\n") - schematicInfo.insert(index,"* Printing option "+compType) - elif compType=="calc": - outputOption.append("plot "+words[2]+"\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vprint8_1": - outputOption.append("print ") - for i in range(1,len(words)-1): - outputOption.append("v("+words[i]+") ") - outputOption.append("\n") - schematicInfo.insert(index,"* Printing option "+compType) - elif compType=="vplot": - outputOption.append("plot v("+words[1]+")-v("+words[2]+")\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vplot8": - outputOption.append("plot ") - for i in range(0,len(words)/2-1): - if words[i+1]=="0": - outputOption.append("-v("+words[i+len(words)/2]+") ") - elif words[i+len(words)/2]=="0": - outputOption.append("v("+words[i+1]+") ") - else: - outputOption.append("v("+words[i+1]+")-v("+words[i+len(words)/2]+") ") - outputOption.append("\n") - elif compType=="vprint": - outputOption.append("print v("+words[1]+")-v("+words[2]+")\n") - schematicInfo.insert(index,"* Printting option "+compType) - elif compType=="iplot": - schematicInfo.insert(index,"V_"+words[0]+" "+words[1]+" "+words[2]+" 0") - outputOption.append("plot i(V_"+words[0]+")\n") - elif compType=="powerplot": - outputOption.append("print ((v("+words[1]+")-v("+words[2]+"))^2)/("+words[3]+")\n") - schematicInfo.insert(index,"* Printting option "+compType) - elif compType=="ic": - Comment='*Adding initial Condition '+compType - Title=' Add initial condition ' +compName - print "-----------------------------------------------------------" - print "Adding initial condition" - ic=' Enter initial condition on output (default=0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,words[1],ic]) - elif compType=="opamp1": - f = open(OSCAD_HOME) - data = f.read() - schematicInfo.insert(index,data) - elif compType=="transfo": - schematicInfo.append("a"+str(k)+" ("+words[1]+" "+words[2]+") (2mmf "+words[2]+") "+compName+"_primary") - k=k+1 - schematicInfo.insert(index,"* "+compline) - print "------------------------------------------------------------" - Comment="*Adding transformer "+compType - Title="Add parameters for primary and secondary "+compName - num_turns="Enter the number of turns in primary (default=310):" - schematicInfo.append("a"+str(k)+" (2mmf 3mmf) "+compName+"_iron_core") - k=k+1 - h1="Enter H value for B-H table seperated by spcae (default=blank)" - b1="Enter corresponding B value seperated by space (default=blank)" - area="Enter the cross-sectional area of the core: (default = 1)" - length ="Enter the core length: (default = 0.01)" - schematicInfo.append("a"+str(k)+" ("+words[4]+" "+words[3]+") (3mmf "+words[3]+") "+compName+"_secondary") - k=k+1 - num_turns2="Enter the number of turns in secondary (default=620):" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,num_turns,h1,b1,area,length,num_turns2]) - else: - schematicInfo.insert(index,compline) - # Update option information - return schematicInfo,outputOption,guimodelvalue - -def previous_file_open(filename): - """Read Pspice netList""" - # Open file if it exists - if os.path.exists(filename): - try: - f = open(filename) - global last_info - last_info=f.read() - f.close() - return 1; - except : - print("Error in opening file") - return 0; - else: - print filename + " does not exist" - return 0; - - - - - -def readNetlist(filename): - """Read Pspice netList""" - # Open file if it exists - if os.path.exists(filename): - try: - f = open(filename) - except : - print("Error in opening file") - sys.exit() - else: - print filename + " does not exist" - sys.exit() - # Read the data from file - data=f.read() - # Close the file - f.close() - return data.splitlines() - -def readParamInfo(data): - """Read Parameter information and store it into dictionary""" - print "data " - print data - param={} - for eachline in lines: - print eachline - eachline=eachline.strip() - if len(eachline)>1: - words=eachline.split(); - option=words[0].lower() - if option=='.param': - for i in range(1, len(words), 1): - paramList=words[i].split('=') - param[paramList[0]]=paramList[1] - return param - -def preprocessNetlist(lines,param): - """Preprocess netlist (replace parameters)""" - netlist=[] - for eachline in lines: - # Remove leading and trailing blanks spaces from line - eachline=eachline.strip() - # Remove special character $ - eachline=eachline.replace('$','') - # Replace parameter with values - for subParam in eachline.split(): - if '}' in subParam: - key=subParam.split()[0] - key=key.strip('{') - key=key.strip('}') - if key in param: - eachline=eachline.replace('{'+key+'}',param[key]) - else: - print "Parameter " + key +" does not exists" - value=raw_input('Enter parameter value: ') - eachline=eachline.replace('{'+key+'}',value) - # Convert netlist into lower case letter - eachline=eachline.lower() - # Construct netlist - if len(eachline)>1: - if eachline[0]=='+': - netlist.append(netlist.pop()+eachline.replace('+',' ')) - else: - netlist.append(eachline) - # Copy information line - infoline=netlist[0] - netlist.remove(netlist[0]) - return netlist,infoline - -def separateNetlistInfo(netlist): - optionInfo=[] - schematicInfo=[] - - for eachline in netlist: - if eachline[0]=='*': - continue - elif eachline[0]=='.': - optionInfo.append(eachline) - else: - schematicInfo.append(eachline) - return optionInfo,schematicInfo - -def addAnalysis(optionInfo): - """Open file if it exists""" - filename="analysis" - if os.path.exists(filename): - try: - f = open(filename) - except : - print("Error in opening file") - sys.exit() - else: - print filename + " does not exist" - sys.exit() - -# Read the data from file - data=f.read() - -# Close the file - f.close() - - analysisData=data.splitlines() - for eachline in analysisData: - eachline=eachline.strip() - if len(eachline)>1: - if eachline[0]=='.': - optionInfo.append(eachline) - else: - pass - return optionInfo - - - - -def findCurrent(schematicInfo,outputOption): - #Find current through component by placing voltage source series with the component - i=0 - for eachline in outputOption: - words=eachline.split() - option=words[0] - # Add voltage sources in series with component to find current - if option=="print" or option=="plot": - words.remove(option) - updatedline=eachline - for outputVar in words: - # Find component name if output variable is current - if outputVar[0]=='i': - outputVar=outputVar.strip('i') - outputVar=outputVar.strip('(') - compName=outputVar.strip(')') - # If component is voltage source, skip - if compName[0]=='v': - continue - # Find the component from the circuit - for compline in schematicInfo: - compInfo=compline.split() - if compInfo[0]==compName: - # Construct dummy node - dummyNode='dummy_'+str(i) - i+=1 - # Break the one node component and place zero value voltage source in between. - index=schematicInfo.index(compline) - schematicInfo.remove(compline) - compline=compline.replace(compInfo[2],dummyNode) - schematicInfo.insert(index,compline) - schematicInfo.append('v'+compName+' '+dummyNode+' '+compInfo[2]+' 0') - # Update option information - updatedline=updatedline.replace('i('+compName+')','i(v'+compName+')') - index=outputOption.index(eachline) - outputOption.remove(eachline) - outputOption.insert(index,updatedline) - return schematicInfo, outputOption - -def insertSpecialSourceParam(schematicInfo,sourcelist): - #Inser Special source parameter - schematicInfo1=[] - - for compline in schematicInfo: - words=compline.split() - compName=words[0] - # Ask for parameters of source - if compName[0]=='v' or compName=='i': - # Find the index component from circuit - index=schematicInfo.index(compline) - #schematicInfo.remove(compline) - if words[3]=="pulse": - Title="Add parameters for pulse source "+compName - v1=' Enter initial value(Volts/Amps): ' - v2=' Enter pulsed value(Volts/Amps): ' - td=' Enter delay time (seconds): ' - tr=' Enter rise time (seconds): ' - tf=' Enter fall time (seconds): ' - pw=' Enter pulse width (seconds): ' - tp=' Enter period (seconds): ' - sourcelist.append([index,compline,words[3],Title,v1,v2,td,tr,tf,pw,tp]) - - elif words[3]=="sine": - Title="Add parameters for sine source "+compName - vo=' Enter offset value (Volts/Amps): ' - va=' Enter amplitude (Volts/Amps): ' - freq=' Enter frequency (Hz): ' - td=' Enter delay time (seconds): ' - theta=' Enter damping factor (1/seconds): ' - sourcelist.append([index,compline,words[3],Title,vo,va,freq,td,theta]) - - elif words[3]=="pwl": - Title="Add parameters for pwl source"+compName - t_v=' Enter in pwl format without bracket i.e t1 v1 t2 v2.... ' - sourcelist.append([index,compline,words[3],Title,t_v]) - - elif words[3]=="ac": - Title="Add parameters for ac source "+compName - v_a=' Enter amplitude (Volts/Amps): ' - sourcelist.append([index,compline,words[3],Title,v_a]) - - elif words[3]=="exp": - Title="Add parameters for exponential source "+compName - v1=' Enter initial value(Volts/Amps): ' - v2=' Enter pulsed value(Volts/Amps): ' - td1=' Enter rise delay time (seconds): ' - tau1=' Enter rise time constant (seconds): ' - td2=' Enter fall time (seconds): ' - tau2=' Enter fall time constant (seconds): ' - sourcelist.append([index,compline,words[3],Title,v1,v2,td1,tau1,td2,tau2]) - - elif words[3]=="dc": - Title="Add parameters for DC source "+compName - v1=' Enter value(Volts/Amps): ' - v2=' Enter zero frequency: ' - sourcelist.append([index,compline,words[3],Title,v1,v2]) - #schematicInfo.insert(index,compline) - - elif compName[0]=='h' or compName[0]=='f': - # Find the index component from the circuit - index=schematicInfo.index(compline) - schematicInfo.remove(compline) - schematicInfo.insert(index,"* "+compName) - schematicInfo1.append("V"+compName+" "+words[3]+" "+words[4]+" 0") - schematicInfo1.append(compName+" "+words[1]+" "+words[2]+" "+"V"+compName+" "+words[5]) - schematicInfo=schematicInfo+schematicInfo1 - #print sourcelist - #print schematicInfo - return schematicInfo,sourcelist - - - -def main(): -# Accept input file name from user if not provided - global lines - global firstwindow #for checking whether first window in closed - global filename - global infoline,backClicked,last_input_file - global modelList,analysisOption - global subcktList,finalNetlist,simulatorOption,initialCondOption - firstwindow=1 - if len(sys.argv) < 2: - filename=raw_input('Enter file name: ') - else: - filename=sys.argv[1] - if len(sys.argv) < 3: - finalNetlist=int(raw_input('Do you want to create final file: ')) - else: - finalNetlist=int(sys.argv[2]) - - print "==================================" - print "Kicad to Ngspice netlist converter " - print "==================================" - print "converting "+filename - last_input_file=filename[:len(filename)-4] - last_input_file=last_input_file+"_last_input.txt" - print "input_file ",last_input_file - global schematicInfo - - # Read the netlist - lines=readNetlist(filename) - - # Construct parameter information - param=readParamInfo(lines) - - # Replace parameter with values - netlist, infoline=preprocessNetlist(lines,param) - - - # Separate option and schematic information - optionInfo, schematicInfo=separateNetlistInfo(netlist) - - if finalNetlist: - """Insert analysis from file""" - optionInfo=addAnalysis(optionInfo) - #print optionInfo - # Find the analysis option - analysisOption=[] - outputOption=[] - initialCondOption=[] - simulatorOption=[] - includeOption=[] - model=[] - - for eachline in optionInfo: - words=eachline.split() - option=words[0] - if (option=='.ac' or option=='.dc' or option=='.disto' or option=='.noise' or - option=='.op' or option=='.pz' or option=='.sens' or option=='.tf' or option=='.tran'): - analysisOption.append(eachline+'\n') - #print eachline - elif (option=='.save' or option=='.print' or option=='.plot' or option=='.four'): - eachline=eachline.strip('.') - outputOption.append(eachline+'\n') - elif (option=='.nodeset' or option=='.ic'): - initialCondOption.append(eachline+'\n') - elif option=='.option': - simulatorOption.append(eachline+'\n') - elif (option=='.include' or option=='.lib'): - includeOption.append(eachline+'\n') - elif (option=='.model'): - model.append(eachline+'\n') - elif option=='.end': - continue; - # Find the various model library required - modelList=[] - subcktList=[] - - for eachline in schematicInfo: - words=eachline.split() - if eachline[0]=='d': - modelName=words[3] - if modelName in modelList: - continue - modelList.append(modelName) - elif eachline[0]=='q': - modelName=words[4] - index=schematicInfo.index(eachline) - schematicInfo.remove(eachline) - schematicInfo.insert(index,words[0]+" "+words[3]+" "+words[2]+" "+words[1]+" "+words[4]) - if modelName in modelList: - continue - modelList.append(modelName) - elif eachline[0]=='m': - modelName=words[4] - index=schematicInfo.index(eachline) - schematicInfo.remove(eachline) - width=raw_input(' Enter width of mosfet '+words[0]+'(default=100u):') - length=raw_input(' Enter length of mosfet '+words[0]+'(default=100u):') - multiplicative_factor=raw_input(' Enter multiplicative factor of mosfet '+words[0]+'(default=1):') - if width=="": width="100u" - if multiplicative_factor=="": multiplicative_factor="100u" - if length=="": length="100u" - schematicInfo.insert(index,words[0]+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[3]+" "+words[4]+" "+'M='+multiplicative_factor+" "+'L='+length+" "+'W='+width) - if modelName in modelList: - continue - modelList.append(modelName) - elif eachline[0]=='j': - modelName=words[4] - index=schematicInfo.index(eachline) - schematicInfo.remove(eachline) - schematicInfo.insert(index,words[0]+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]) - if modelName in modelList: - continue - modelList.append(modelName) - elif eachline[0]=='x': - subcktName=words[len(words)-1] - if subcktName in subcktList: - continue - subcktList.append(subcktName) - - # Find current through components - schematicInfo,outputOption=findCurrent(schematicInfo,outputOption) - - #List for storing source and its value - global sourcelisttrack - sourcelist=[] - sourcelisttrack=[] - - # Add parameter to sources - schematicInfo,sourcelist=insertSpecialSourceParam(schematicInfo,sourcelist) - - sourcelist,sourcelisttrack=w.createrootwindow(sourcelist,sourcelisttrack) - - - - #print "Output Option",outputOption - #print "Sch Info",schematicInfo - #print "Src List",sourcelist - #print "Src Track",sourcelisttrack - - - -if __name__=='__main__': - app=QtGui.QApplication(sys.argv) - global w - global nw - w=Window() - nw=NewWindow() - nw.close() - main() - sys.exit(app.exec_()) diff --git a/OSCAD/kicadtoNgspice/Tkinter_KicadtoNgspice.py b/OSCAD/kicadtoNgspice/Tkinter_KicadtoNgspice.py deleted file mode 100755 index 60a98bc..0000000 --- a/OSCAD/kicadtoNgspice/Tkinter_KicadtoNgspice.py +++ /dev/null @@ -1,2560 +0,0 @@ -#!/usr/bin/python -# KicadtoNgspice.py is a python script to convert a Kicad spice netlist to a ngspice netlist. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -import sys -import os.path -import tkMessageBox -from setPath import OSCAD_HOME -from Tkinter import * - -def readNetlist(filename): - """Read Pspice netList""" -# Open file if it exists - if os.path.exists(filename): - try: - f = open(filename) - except : - print("Error in opening file") - sys.exit() - else: - print filename + " does not exist" - sys.exit() - -# Read the data from file - data=f.read() - -# Close the file - f.close() - return data.splitlines() - -def readParamInfo(data): - """Read Parameter information and store it into dictionary""" - param={} - for eachline in lines: - eachline=eachline.strip() - if len(eachline)>1: - words=eachline.split(); - option=words[0].lower() - if option=='.param': - for i in range(1, len(words), 1): - paramList=words[i].split('=') - param[paramList[0]]=paramList[1] - return param - -def preprocessNetlist(lines,param): - """Preprocess netlist (replace parameters)""" - netlist=[] - for eachline in lines: - # Remove leading and trailing blanks spaces from line - eachline=eachline.strip() - # Remove special character $ - eachline=eachline.replace('$','') - # Replace parameter with values - for subParam in eachline.split(): - if '}' in subParam: - key=subParam.split()[0] - key=key.strip('{') - key=key.strip('}') - if key in param: - eachline=eachline.replace('{'+key+'}',param[key]) - else: - print "Parameter " + key +" does not exists" - value=raw_input('Enter parameter value: ') - eachline=eachline.replace('{'+key+'}',value) - # Convert netlist into lower case letter - eachline=eachline.lower() - # Construct netlist - if len(eachline)>1: - if eachline[0]=='+': - netlist.append(netlist.pop()+eachline.replace('+',' ')) - else: - netlist.append(eachline) - # Copy information line - infoline=netlist[0] - netlist.remove(netlist[0]) - return netlist,infoline - -def separateNetlistInfo(netlist): - optionInfo=[] - schematicInfo=[] - - for eachline in netlist: - if eachline[0]=='*': - continue - elif eachline[0]=='.': - optionInfo.append(eachline) - else: - schematicInfo.append(eachline) - return optionInfo,schematicInfo - - -def addAnalysis(optionInfo): - """Open file if it exists""" - filename="analysis" - if os.path.exists(filename): - try: - f = open(filename) - except : - print("Error in opening file") - sys.exit() - else: - print filename + " does not exist" - sys.exit() - -# Read the data from file - data=f.read() - -# Close the file - f.close() - - analysisData=data.splitlines() - for eachline in analysisData: - eachline=eachline.strip() - if len(eachline)>1: - if eachline[0]=='.': - optionInfo.append(eachline) - else: - pass - return optionInfo - -def findCurrent(schematicInfo,outputOption): - #Find current through component by placing voltage source series with the component - i=0 - for eachline in outputOption: - words=eachline.split() - option=words[0] - # Add voltage sources in series with component to find current - if option=="print" or option=="plot": - words.remove(option) - updatedline=eachline - for outputVar in words: - # Find component name if output variable is current - if outputVar[0]=='i': - outputVar=outputVar.strip('i') - outputVar=outputVar.strip('(') - compName=outputVar.strip(')') - # If component is voltage source, skip - if compName[0]=='v': - continue - # Find the component from the circuit - for compline in schematicInfo: - compInfo=compline.split() - if compInfo[0]==compName: - # Construct dummy node - dummyNode='dummy_'+str(i) - i+=1 - # Break the one node component and place zero value voltage source in between. - index=schematicInfo.index(compline) - schematicInfo.remove(compline) - compline=compline.replace(compInfo[2],dummyNode) - schematicInfo.insert(index,compline) - schematicInfo.append('v'+compName+' '+dummyNode+' '+compInfo[2]+' 0') - # Update option information - updatedline=updatedline.replace('i('+compName+')','i(v'+compName+')') - index=outputOption.index(eachline) - outputOption.remove(eachline) - outputOption.insert(index,updatedline) - return schematicInfo, outputOption - -def insertSpecialSourceParam(schematicInfo,sourcelist): - #Inser Special source parameter - schematicInfo1=[] - - for compline in schematicInfo: - words=compline.split() - compName=words[0] - # Ask for parameters of source - if compName[0]=='v' or compName=='i': - # Find the index component from circuit - index=schematicInfo.index(compline) - #schematicInfo.remove(compline) - if words[3]=="pulse": - Title="Add parameters for pulse source "+compName - v1=' Enter initial value(Volts/Amps): ' - v2=' Enter pulsed value(Volts/Amps): ' - td=' Enter delay time (seconds): ' - tr=' Enter rise time (seconds): ' - tf=' Enter fall time (seconds): ' - pw=' Enter pulse width (seconds): ' - tp=' Enter period (seconds): ' - sourcelist.append([index,compline,words[3],Title,v1,v2,td,tr,tf,pw,tp]) - - elif words[3]=="sine": - Title="Add parameters for sine source "+compName - vo=' Enter offset value (Volts/Amps): ' - va=' Enter amplitude (Volts/Amps): ' - freq=' Enter frequency (Hz): ' - td=' Enter delay time (seconds): ' - theta=' Enter damping factor (1/seconds): ' - sourcelist.append([index,compline,words[3],Title,vo,va,freq,td,theta]) - - elif words[3]=="pwl": - Title="Add parameters for pwl source"+compName - t_v=' Enter in pwl format without bracket i.e t1 v1 t2 v2.... ' - sourcelist.append([index,compline,words[3],Title,t_v]) - - elif words[3]=="ac": - Title="Add parameters for ac source "+compName - v_a=' Enter amplitude (Volts/Amps): ' - sourcelist.append([index,compline,words[3],Title,v_a]) - - elif words[3]=="exp": - Title="Add parameters for exponential source "+compName - v1=' Enter initial value(Volts/Amps): ' - v2=' Enter pulsed value(Volts/Amps): ' - td1=' Enter rise delay time (seconds): ' - tau1=' Enter rise time constant (seconds): ' - td2=' Enter fall time (seconds): ' - tau2=' Enter fall time constant (seconds): ' - sourcelist.append([index,compline,words[3],Title,v1,v2,td1,tau1,td2,tau2]) - - elif words[3]=="dc": - Title="Add parameters for DC source "+compName - v1=' Enter value(Volts/Amps): ' - v2=' Enter zero frequency: ' - sourcelist.append([index,compline,words[3],Title,v1,v2]) - #schematicInfo.insert(index,compline) - - elif compName[0]=='h' or compName[0]=='f': - # Find the index component from the circuit - index=schematicInfo.index(compline) - schematicInfo.remove(compline) - schematicInfo.insert(index,"* "+compName) - schematicInfo1.append("V"+compName+" "+words[3]+" "+words[4]+" 0") - schematicInfo1.append(compName+" "+words[1]+" "+words[2]+" "+"V"+compName+" "+words[5]) - schematicInfo=schematicInfo+schematicInfo1 - print sourcelist - print schematicInfo - return schematicInfo,sourcelist - - -def createrootwindow(sourcelist,sourcelisttrack): - global frame - global canvas - global root_window - global window_height - global window_width - root_window=Tk() - window_width=700 - window_height=500 - canvas=Canvas(root_window,bg='#FFFFFF',width=window_width,height=window_height,scrollregion=(0,0,800,800)) - hbar=Scrollbar(root_window,orient=HORIZONTAL) - hbar.pack(side=BOTTOM,fill=X) - hbar.config(command=canvas.xview) - vbar=Scrollbar(root_window,orient=VERTICAL) - vbar.pack(side=RIGHT,fill=Y) - vbar.config(command=canvas.yview) - canvas.config(width=window_width,height=window_height) - canvas.config(xscrollcommand=hbar.set, yscrollcommand=vbar.set) - canvas.pack(side=LEFT,expand=True,fill=BOTH) - # make the canvas expandable - root_window.grid_rowconfigure(0, weight=1) - root_window.grid_columnconfigure(0, weight=1) - frame=Frame(canvas,height=window_height,width=window_width) - buttonframe=Frame(frame) - #Addbutton=Button(buttonframe,text='Add',command=AddSourceValue) - Nextbutton=Button(buttonframe,text='Next',command=NextPage) - Clearbutton=Button(buttonframe,text='Clear',command=ClearSourceValue) - global count - count=0 - global entry_var - entry_var={} - ##Checking if source is present" - if sourcelist: - for line in sourcelist: - print "Voltage source line index: ",line[0] - print "SourceList line Test: ",line - track_id=line[0] - if line[2]=='sine': - entry_var[count]=StringVar() - label=Label(frame,text=line[3],font=('Times', 15),anchor=CENTER,bg="Red") - label.grid(row=count,column=1,ipadx=5,ipady=5,padx=5,pady=5) - count=count+1 - start=count - entry_var[count]=StringVar() - label=Label(frame,text=line[4]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[5]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[6]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[7]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[8]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - end=count - count=count+1 - sourcelisttrack.append([track_id,'sine',start,end]) - - elif line[2]=='pulse': - entry_var[count]=StringVar() - label=Label(frame,text=line[3],font=('Times', 15),anchor=CENTER,bg="Red") - label.grid(row=count,column=1,ipadx=5,ipady=5,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - start=count - label=Label(frame,text=line[4]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[5]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[6]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[7]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[8]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[9]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[10]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - end=count - count=count+1 - sourcelisttrack.append([track_id,'pulse',start,end]) - - elif line[2]=='pwl': - entry_var[count]=StringVar() - label=Label(frame,text=line[3],font=('Times',15),anchor=CENTER,bg="Red") - label.grid(row=count,column=1,ipadx=5,ipady=5,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - start=count - label=Label(frame,text=line[4]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - end=count - count=count+1 - sourcelisttrack.append([track_id,'pwl',start,end]) - - - elif line[2]=='ac': - entry_var[count]=StringVar() - label=Label(frame,text=line[3],font=('Times', 15),anchor=CENTER,bg="Red") - label.grid(row=count,column=1,ipadx=5,ipady=5,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - start=count - label=Label(frame,text=line[4]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - end=count - count=count+1 - sourcelisttrack.append([track_id,'ac',start,end]) - - elif line[2]=='dc': - entry_var[count]=StringVar() - label=Label(frame,text=line[3],font=('Times', 15),anchor=CENTER,bg="Red") - label.grid(row=count,column=1,ipadx=5,ipady=5,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - start=count - label=Label(frame,text=line[4]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - end=count - count=count+1 - sourcelisttrack.append([track_id,'dc',start,end]) - - elif line[2]=='exp': - entry_var[count]=StringVar() - label=Label(frame,text=line[3],font=('Times', 15),anchor=CENTER,bg="Red") - label.grid(row=count,column=1,ipadx=5,ipady=5,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - start=count - label=Label(frame,text=line[4]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[5]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[6]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[7]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[8]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - count=count+1 - entry_var[count]=StringVar() - label=Label(frame,text=line[9]) - label.grid(row=count,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(frame,width=10,textvariable=entry_var[count]) - entry.grid(row=count,column=1,sticky=W+E+N+S,padx=5,pady=5) - end=count - count=count+1 - sourcelisttrack.append([track_id,'exp',start,end]) - else: - print "No source is present in your circuit" - tkMessageBox.showinfo("Source List Info","There is no source in your circuit,Please click next button") - - - frame.grid() - buttonframe.grid() - #Addbutton.grid(row=count,column=1,padx=5,pady=5) - Nextbutton.grid(row=count,column=2,padx=5,pady=5) - Clearbutton.grid(row=count,column=3,padx=5,pady=5) - canvas.create_window(0, 0, anchor=NW, window=frame) - frame.update_idletasks() - canvas.config(scrollregion=canvas.bbox("all")) - #frame.mainloop() - root_window.title("Add Source and Model Parameter") - root_window.mainloop() - return sourcelist,sourcelisttrack - - - -def AddSourceValue(): - print "Add Source Value" - global sourcelistvalue - sourcelistvalue=[] - global start - global end - start=0 - end=0 - print "Track Source List :",sourcelisttrack - print "Initial Source List Value :",sourcelistvalue - for compline in sourcelisttrack: - index=compline[0] - addline=schematicInfo[index] - - if compline[1]=='sine': - try: - start=compline[2] - end=compline[3] - vo_val=entry_var[start].get() - va_val=entry_var[start+1].get() - freq_val=entry_var[start+2].get() - td_val=entry_var[start+3].get() - theta_val=entry_var[end].get() - addline=addline.partition('(')[0] + "("+vo_val+" "+va_val+" "+freq_val+" "+td_val+" "+theta_val+")" - print "Line Added ",addline - sourcelistvalue.append([index,addline]) - except: - print "Caught an exception in sine voltage source ",addline - - elif compline[1]=='pulse': - try: - start=compline[2] - end=compline[3] - v1_val=entry_var[start].get() - v2_val=entry_var[start+1].get() - td_val=entry_var[start+2].get() - tr_val=entry_var[start+3].get() - tf_val=entry_var[start+4].get() - pw_val=entry_var[start+5].get() - tp_val=entry_var[end].get() - addline=addline.partition('(')[0] + "("+v1_val+" "+v2_val+" "+td_val+" "+tr_val+" "+tf_val+" "+pw_val+" "+tp_val+")" - print "Line Added ",addline - sourcelistvalue.append([index,addline]) - except: - print "Caught an exception in pulse voltage source ",addline - - elif compline[1]=='pwl': - try: - start=compline[2] - t_v_val=entry_var[start].get() - addline=addline.partition('(')[0] + "("+t_v_val+")" - print "Line Added ",addline - sourcelistvalue.append([index,addline]) - except: - print "Caught an exception in pwl voltage source ",addline - - elif compline[1]=='ac': - try: - start=compline[2] - va_val=entry_var[start].get() - addline=' '.join(addline.split()) - addline=addline.partition('ac')[0] +" "+'ac'+" "+ va_val - print "Line Added ",addline - sourcelistvalue.append([index,addline]) - except: - print "Caught an exception in ac voltage source ",addline - - elif compline[1]=='dc': - try: - start=compline[2] - v1_val=entry_var[start].get() - addline=' '.join(addline.split()) - addline=addline.partition('dc')[0] + " " +'dc'+ " "+v1_val - print "Line Added ",addline - sourcelistvalue.append([index,addline]) - except: - print "Caught an exception in dc voltage source",addline - - elif compline[1]=='exp': - try: - start=compline[2] - end=compline[3] - v1_val=entry_var[start].get() - v2_val=entry_var[start+1].get() - td1_val=entry_var[start+2].get() - tau1_val=entry_var[start+3].get() - td2_val=entry_var[start+4].get() - tau2_val=entry_var[end].get() - addline=addline.partition('(')[0] + "("+v1_val+" "+v2_val+" "+td1_val+" "+tau1_val+" "+td2_val+" "+tau2_val+")" - print "Line Added ",addline - sourcelistvalue.append([index,addline]) - except: - print "Caught an exception in exp voltage source ",addline - print "Final Source List Value :",sourcelistvalue - ##Adding into schematicInfo - for item in sourcelistvalue: - del schematicInfo[item[0]] - schematicInfo.insert(item[0],item[1]) - - - -def NextPage(): - print "Next Page" - AddSourceValue() - ##Destroying Frame - frame.destroy() - #frame.grid_forget() - global schematicInfo - global outputOption - global guimodelvalue - global guimodellisttrack - global guimodellist - guimodelvalue=[] - guimodellisttrack=[] - guimodellist=['adc8','dac8','gain','summer','multiplier','divider','limit','integrator','differentiator','limit8','controlledlimiter', -'analogswitch','zener','d_buffer','d_inverter','d_and','d_nand','d_or','d_nor','d_xor','d_xnor','d_tristate','d_pullup', -'d_pulldown','d_srlatch','d_jklatch','d_dlatch','d_tlatch','d_srff','d_jkff','d_dff','ic'] - - ##Calling function which take information for entry and label - schematicInfo,outputOption,guimodelvalue=convertICintoBasicBlocks(schematicInfo,outputOption,guimodelvalue) - - #Creating Frame and buttons for next page - nextframe=Frame(canvas,height=window_height,width=window_width) - nextbuttonframe=Frame(nextframe) - #Addbutton=Button(nextbuttonframe,text='Add',command=AddModelParametr) - Submitbutton=Button(nextbuttonframe,text='Submit & Exit',command=Submit) - Clearbutton=Button(nextbuttonframe,text='Clear',command=ClearModelParamValue) - global nextcount - nextcount=0 - global nextentry_var - nextentry_var={} - - - ##Checking if any model is present - if guimodelvalue: - ## Calling Next frame generation function - for line in guimodelvalue: - if line[2] in guimodellist: - print "ConvertICBlock index :",line[0] - nextcount=nextframegeneration(nextframe,line,nextentry_var,nextcount) - else: - print "Please look whether model is added in guimodellist inside code" - else: - print "There is no model in your circuit" - AddModelParametr() - tkMessageBox.showinfo("Model List Info","There is no model in your circuit, please click on Submit & Exit Button" ) - - - """ - for line in guimodelvalue: - print "ConvertICBlock index :",line[0] - nextcount=nextframegeneration(nextframe,line,nextentry_var,nextcount) - if line[2]=='adc8': - nextcount=nextframegeneration(nextframe,line,nextentry_var,nextcount) - - nextentry_var[nextcount]=StringVar() - label=Label(nextframe,text=line[5],font=('Times', 15),anchor=CENTER,bg="Red") - label.grid(row=nextcount,column=1,ipadx=5,ipady=5,padx=5,pady=5) - nextcount=nextcount+1 - start=nextcount - for item in range(len(line)-6): - nextentry_var[nextcount]=StringVar() - label=Label(nextframe,text=line[6+item]) - label.grid(row=nextcount,column=0,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(nextframe,width=10,textvariable=nextentry_var[nextcount]) - entry.grid(row=nextcount,column=1,sticky=W+E+N+S,padx=5,pady=5) - nextcount=nextcount+1 - end=nextcount-1 - guimodellisttrack.append([line[0],line[1],line[2],line[3],line[4],start,end]) - - else: - print "Please check whether model is available or not" - """ - nextframe.grid() - nextbuttonframe.grid() - #Addbutton.grid(row=nextcount,column=1,padx=5,pady=5) - Submitbutton.grid(row=nextcount,column=2,padx=5,pady=5) - Clearbutton.grid(row=nextcount,column=3,padx=5,pady=5) - canvas.create_window(0, 0, anchor=NW, window=nextframe) - nextframe.update_idletasks() - canvas.config(scrollregion=canvas.bbox("all")) - - - - -def nextframegeneration(nextframe,line,nextentry_var,nextcount): - print "Model Line in netlist is : ",line[1] - nextentry_var[nextcount]=StringVar() - label=Label(nextframe,text=line[5],font=('Times', 14),anchor=CENTER,bg="Red") - label.grid(row=nextcount,column=1,ipadx=5,ipady=5,padx=5,pady=5) - nextcount=nextcount+1 - start=nextcount - if line[2]=='ic': - for item in range(len(line)-7): - nextentry_var[nextcount]=StringVar() - label=Label(nextframe,text=line[7+item]) - label.grid(row=nextcount,column=0,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(nextframe,width=10,textvariable=nextentry_var[nextcount]) - entry.grid(row=nextcount,column=1,sticky=W+E+N+S,padx=5,pady=5) - nextcount=nextcount+1 - end=nextcount-1 - guimodellisttrack.append([line[0],line[1],line[2],line[3],line[4],start,end,line[6]]) - else: - for item in range(len(line)-6): - nextentry_var[nextcount]=StringVar() - label=Label(nextframe,text=line[6+item]) - label.grid(row=nextcount,column=0,sticky=W+E+N+S,padx=5,pady=5) - entry=Entry(nextframe,width=10,textvariable=nextentry_var[nextcount]) - entry.grid(row=nextcount,column=1,sticky=W+E+N+S,padx=5,pady=5) - nextcount=nextcount+1 - end=nextcount-1 - guimodellisttrack.append([line[0],line[1],line[2],line[3],line[4],start,end]) - return nextcount - -def AddModelParametr(): - print "Adding Model Parameter" - print "GuiModelValue",guimodelvalue - global guimodellisttrack - global modelparamvalue - global addmodelline - modelparamvalue=[] - addmodelline=[] - - for line in guimodellisttrack: - print "GUI MODEL LIST TRACK",line - if line[2]=='adc8': - try: - start=line[5] - end=line[6] - in_low=nextentry_var[start].get() - in_high=nextentry_var[end].get() - if in_low=="": in_low="0.8" - if in_high=="": in_high="2.0" - addmodelline=".model "+ line[3]+" adc_bridge(in_low="+in_low+" in_high="+in_high+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in adc8 model ",line[1] - - elif line[2]=='dac8': - try: - start=line[5] - end=line[6] - out_low=nextentry_var[start].get() - out_high=nextentry_var[start+1].get() - out_undef=nextentry_var[end].get() - if out_low=="": out_low="0.2" - if out_high=="": out_high="5.0" - if out_undef=="": out_undef="5.0" - addmodelline=".model "+ line[3]+" dac_bridge(out_low="+out_low+" out_high="+out_high+" out_undef="+out_undef+" )" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in dac8 model ",line[1] - - elif line[2]=='gain': - try: - start=line[5] - end=line[6] - in_offset=nextentry_var[start].get() - gain=nextentry_var[start+1].get() - out_offset=nextentry_var[end].get() - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - if out_offset=="": out_offset="0.0" - addmodelline=".model "+ line[3]+" gain(in_offset="+in_offset+" out_offset="+out_offset+" gain="+gain+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in gain model ",line[1] - - elif line[2]=='summer': - try: - start=line[5] - end=line[6] - in1_offset=nextentry_var[start].get() - in2_offset=nextentry_var[start+1].get() - in1_gain=nextentry_var[start+2].get() - in2_gain=nextentry_var[start+3].get() - out_gain=nextentry_var[start+4].get() - out_offset=nextentry_var[end].get() - if in1_offset=="": in1_offset="0.0" - if in2_offset=="": in2_offset="0.0" - if in1_gain=="": in1_gain="1.0" - if in2_gain=="": in2_gain="1.0" - if out_gain=="": out_gain="1.0" - if out_offset=="": out_offset="0.0" - addmodelline=".model "+ line[3]+" summer(in_offset=["+in1_offset+" "+in2_offset+"] in_gain=["+in1_gain+" "+in2_gain+"] out_offset="+out_offset+" out_gain="+out_gain+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in summer model ",line[1] - - elif line[2]=='multiplier': - try: - start=line[5] - end=line[6] - in1_offset=nextentry_var[start].get() - in2_offset=nextentry_var[start+1].get() - in1_gain=nextentry_var[start+2].get() - in2_gain=nextentry_var[start+3].get() - out_gain=nextentry_var[start+4].get() - out_offset=nextentry_var[end].get() - if in1_offset=="": in1_offset="0.0" - if in2_offset=="": in2_offset="0.0" - if in1_gain=="": in1_gain="1.0" - if in2_gain=="": in2_gain="1.0" - if out_gain=="": out_gain="1.0" - if out_offset=="": out_offset="0.0" - addmodelline=".model "+ line[3]+" mult(in_offset=["+in1_offset+" "+in2_offset+"] in_gain=["+in1_gain+" "+in2_gain+"] out_offset="+out_offset+" out_gain="+out_gain+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in multiplier model ",line[1] - - elif line[2]=='divider': - try: - start=line[5] - end=line[6] - num_offset=nextentry_var[start].get() - den_offset=nextentry_var[start+1].get() - num_gain=nextentry_var[start+2].get() - den_gain=nextentry_var[start+3].get() - out_gain=nextentry_var[start+4].get() - out_offset=nextentry_var[start+5].get() - den_lower_limit=nextentry_var[end].get() - if num_offset=="": num_offset="0.0" - if den_offset=="": den_offset="0.0" - if num_gain=="": num_gain="1.0" - if den_gain=="": den_gain="1.0" - if out_gain=="": out_gain="1.0" - if out_offset=="": out_offset="0.0" - if den_lower_limit=="": den_lower_limit="1.0e-10" - addmodelline=".model "+ line[3]+" divide(num_offset="+num_offset+" den_offset="+den_offset+" num_gain="+num_gain+" den_gain="+den_gain+" out_offset="+out_offset+" out_gain="+out_gain+" den_lower_limit="+den_lower_limit+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in divider model ",line[1] - - elif line[2]=='limit': - try: - start=line[5] - end=line[6] - lowerLimit=nextentry_var[start].get() - upperLimit=nextentry_var[start+1].get() - in_offset=nextentry_var[start+2].get() - gain=nextentry_var[end].get() - if lowerLimit=="": lowerLimit="0.0" - if upperLimit=="": upperLimit="5.0" - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - addmodelline=".model "+ line[3]+" limit(out_lower_limit="+lowerLimit+" out_upper_limit="+upperLimit+" in_offset="+in_offset+" gain="+gain+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in limit model ",line[1] - - elif line[2]=='integrator': - try: - start=line[5] - end=line[6] - out_lower_limit=nextentry_var[start].get() - out_upper_limit=nextentry_var[start+1].get() - in_offset=nextentry_var[start+2].get() - gain=nextentry_var[start+3].get() - out_ic=nextentry_var[end].get() - if out_lower_limit=="": out_lower_limit="0.0" - if out_upper_limit=="": out_upper_limit="5.0" - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - if out_ic=="": out_ic="0.0" - addmodelline=".model "+ line[3]+" int(out_lower_limit="+out_lower_limit+" out_upper_limit="+out_upper_limit+" in_offset="+in_offset+" gain="+gain+" out_ic="+out_ic+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in integrator model ",line[1] - - elif line[2]=='differentiator': - try: - start=line[5] - end=line[6] - out_lower_limit=nextentry_var[start].get() - out_upper_limit=nextentry_var[start+1].get() - out_offset=nextentry_var[start+2].get() - gain=nextentry_var[end].get() - if out_lower_limit=="": out_lower_limit="0.0" - if out_upper_limit=="": out_upper_limit="5.0" - if out_offset=="": out_offset="0.0" - if gain=="": gain="1.0" - addmodelline=".model "+ line[3]+" d_dt(out_lower_limit="+out_lower_limit+" out_upper_limit="+out_upper_limit+" out_offset="+out_offset+" gain="+gain+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in differentiator model ",line[1] - - elif line[2]=='limit8': - try: - start=line[5] - end=line[6] - lowerLimit=nextentry_var[start].get() - upperLimit=nextentry_var[start+1].get() - in_offset=nextentry_var[start+2].get() - gain=nextentry_var[end].get() - if lowerLimit=="": lowerLimit="0.0" - if upperLimit=="": upperLimit="5.0" - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - addmodelline=".model "+ line[3]+" limit(out_lower_limit="+lowerLimit+" out_upper_limit="+upperLimit+" in_offset="+in_offset+" gain="+gain+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in limit8 model ",line[1] - - elif line[2]=='controlledlimiter': - try: - start=line[5] - end=line[6] - in_offset=nextentry_var[start].get() - gain=nextentry_var[end].get() - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - addmodelline=".model "+ line[3]+" climit(in_offset="+in_offset+" gain="+gain+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in controlledlimiter model ",line[1] - - elif line[2]=='analogswitch': - try: - start=line[5] - end=line[6] - cntl_on=nextentry_var[start].get() - cntl_off=nextentry_var[start+1].get() - r_on=nextentry_var[start+2].get() - r_off=nextentry_var[end].get() - if cntl_on=="": cntl_on="5.0" - if cntl_off=="": cntl_off="0.0" - if r_on=="": r_on="10.0" - if r_off=="": r_off="1e6" - addmodelline=".model "+ line[3]+" aswitch(cntl_on="+cntl_on+" cntl_off="+cntl_off+" r_on="+r_on+" r_off="+r_off+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in analogswitch model ",line[1] - - elif line[2]=='zener': - try: - start=line[5] - end=line[6] - v_breakdown=nextentry_var[start].get() - i_breakdown=nextentry_var[start+1].get() - i_sat=nextentry_var[start+2].get() - n_forward=nextentry_var[end].get() - if v_breakdown=="": v_breakdown="5.6" - if i_breakdown=="": i_breakdown="1.0e-2" - if i_sat=="": i_sat="1.0e-12" - if n_forward=="": n_forward="1.0" - addmodelline=".model "+ line[3]+" zener(v_breakdown="+v_breakdown+" i_breakdown="+i_breakdown+" i_sat="+i_sat+" n_forward="+n_forward+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in zener model ",line[1] - - elif line[2]=='d_buffer': - try: - start=line[5] - end=line[6] - rise_delay=nextentry_var[start].get() - fall_delay=nextentry_var[start+1].get() - input_load=nextentry_var[end].get() - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_buffer(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_buffer model ",line[1] - - elif line[2]=='d_inverter': - try: - start=line[5] - end=line[6] - rise_delay=nextentry_var[start].get() - fall_delay=nextentry_var[start+1].get() - input_load=nextentry_var[end].get() - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_inverter(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_inverter model ",line[1] - - elif line[2]=='d_and': - try: - start=line[5] - end=line[6] - rise_delay=nextentry_var[start].get() - fall_delay=nextentry_var[start+1].get() - input_load=nextentry_var[end].get() - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_and(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_and model ",line[1] - - elif line[2]=='d_nand': - try: - start=line[5] - end=line[6] - rise_delay=nextentry_var[start].get() - fall_delay=nextentry_var[start+1].get() - input_load=nextentry_var[end].get() - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_nand(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_nand model ",line[1] - - elif line[2]=='d_or': - try: - start=line[5] - end=line[6] - rise_delay=nextentry_var[start].get() - fall_delay=nextentry_var[start+1].get() - input_load=nextentry_var[end].get() - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_or(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_or model ",line[1] - - elif line[2]=='d_nor': - try: - start=line[5] - end=line[6] - rise_delay=nextentry_var[start].get() - fall_delay=nextentry_var[start+1].get() - input_load=nextentry_var[end].get() - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_nor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_nor model ",line[1] - - elif line[2]=='d_xor': - try: - start=line[5] - end=line[6] - rise_delay=nextentry_var[start].get() - fall_delay=nextentry_var[start+1].get() - input_load=nextentry_var[end].get() - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_xor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_xor model ",line[1] - - elif line[2]=='d_xnor': - try: - start=line[5] - end=line[6] - rise_delay=nextentry_var[start].get() - fall_delay=nextentry_var[start+1].get() - input_load=nextentry_var[end].get() - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - addmodelline=".model "+ line[3]+" d_xnor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_xnor model ",line[1] - - elif line[2]=='d_tristate': - try: - start=line[5] - end=line[6] - delay=nextentry_var[start].get() - input_load=nextentry_var[start+1].get() - enable_load=nextentry_var[end].get() - if delay=="": delay="1e-12" - if input_load=="": input_load="1e-12" - if enable_load=="": enable_load="1e-12" - addmodelline=".model "+ line[3]+" d_tristate(delay="+delay+" enable_load="+enable_load+" input_load="+input_load+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_tristate model ",line[1] - - elif line[2]=='d_pullup': - try: - start=line[5] - end=line[6] - load=nextentry_var[start].get() - if load=="": load="1e-12" - addmodelline=".model "+ line[3]+" d_pullup(load="+load+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_pullup model ",line[1] - - elif line[2]=='d_pulldown': - try: - start=line[5] - end=line[6] - load=nextentry_var[start].get() - if load=="": load="1e-12" - addmodelline=".model "+ line[3]+" d_pulldown(load="+load+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_pulldown model ",line[1] - - elif line[2]=='d_srlatch': - try: - start=line[5] - end=line[6] - sr_delay=nextentry_var[start].get() - enable_delay=nextentry_var[start+1].get() - set_delay=nextentry_var[start+2].get() - reset_delay=nextentry_var[start+3].get() - ic=nextentry_var[start+4].get() - sr_load=nextentry_var[start+5].get() - enable_load=nextentry_var[start+6].get() - set_load=nextentry_var[start+7].get() - reset_load=nextentry_var[start+8].get() - rise_delay=nextentry_var[start+9].get() - fall_delay=nextentry_var[end].get() - if sr_delay=="": sr_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if sr_load=="": sr_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_srlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+sr_load="+sr_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+sr_delay="+sr_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_srlatch model ",line[1] - - elif line[2]=='d_jklatch': - try: - start=line[5] - end=line[6] - jk_delay=nextentry_var[start].get() - enable_delay=nextentry_var[start+1].get() - set_delay=nextentry_var[start+2].get() - reset_delay=nextentry_var[start+3].get() - ic=nextentry_var[start+4].get() - jk_load=nextentry_var[start+5].get() - enable_load=nextentry_var[start+6].get() - set_load=nextentry_var[start+7].get() - reset_load=nextentry_var[start+8].get() - rise_delay=nextentry_var[start+9].get() - fall_delay=nextentry_var[end].get() - if jk_delay=="": jk_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if jk_load=="": jk_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_jklatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+jk_load="+jk_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+jk_delay="+jk_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_jklatch model ",line[1] - - elif line[2]=='d_dlatch': - try: - start=line[5] - end=line[6] - data_delay=nextentry_var[start].get() - enable_delay=nextentry_var[start+1].get() - set_delay=nextentry_var[start+2].get() - reset_delay=nextentry_var[start+3].get() - ic=nextentry_var[start+4].get() - data_load=nextentry_var[start+5].get() - enable_load=nextentry_var[start+6].get() - set_load=nextentry_var[start+7].get() - reset_load=nextentry_var[start+8].get() - rise_delay=nextentry_var[start+9].get() - fall_delay=nextentry_var[end].get() - if data_delay=="": data_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if data_load=="": data_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_dlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+data_load="+data_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+data_delay="+data_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_dlatch model ",line[1] - - elif line[2]=='d_tlatch': - try: - start=line[5] - end=line[6] - t_delay=nextentry_var[start].get() - enable_delay=nextentry_var[start+1].get() - set_delay=nextentry_var[start+2].get() - reset_delay=nextentry_var[start+3].get() - ic=nextentry_var[start+4].get() - t_load=nextentry_var[start+5].get() - enable_load=nextentry_var[start+6].get() - set_load=nextentry_var[start+7].get() - reset_load=nextentry_var[start+8].get() - rise_delay=nextentry_var[start+9].get() - fall_delay=nextentry_var[end].get() - if t_delay=="": t_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if t_load=="": t_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_tlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+t_load="+t_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+t_delay="+t_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_tlatch model ",line[1] - - elif line[2]=='d_srff': - try: - start=line[5] - end=line[6] - clk_delay=nextentry_var[start].get() - set_delay=nextentry_var[start].get() - reset_delay=nextentry_var[start].get() - ic=nextentry_var[start].get() - sr_load=nextentry_var[start].get() - clk_load=nextentry_var[start].get() - set_load=nextentry_var[start].get() - reset_load=nextentry_var[start].get() - rise_delay=nextentry_var[start].get() - fall_delay=nextentry_var[start].get() - if clk_delay=="": clk_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if sr_load=="": sr_load="1e-12" - if clk_load=="": clk_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_srff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+sr_load="+sr_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_srff model ",line[1] - - elif line[2]=='d_jkff': - try: - start=line[5] - end=line[6] - clk_delay=nextentry_var[start].get() - set_delay=nextentry_var[start].get() - reset_delay=nextentry_var[start].get() - ic=nextentry_var[start].get() - jk_load=nextentry_var[start].get() - clk_load=nextentry_var[start].get() - set_load=nextentry_var[start].get() - reset_load=nextentry_var[start].get() - rise_delay=nextentry_var[start].get() - fall_delay=nextentry_var[start].get() - if clk_delay=="": clk_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if jk_load=="": sr_load="1e-12" - if clk_load=="": clk_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_jkff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+jk_load="+jk_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_jkff model ",line[1] - - elif line[2]=='d_dff': - try: - start=line[5] - end=line[6] - clk_delay=nextentry_var[start].get() - set_delay=nextentry_var[start+1].get() - reset_delay=nextentry_var[start+2].get() - ic=nextentry_var[start+3].get() - data_load=nextentry_var[start+4].get() - clk_load=nextentry_var[start+5].get() - set_load=nextentry_var[start+6].get() - reset_load=nextentry_var[start+7].get() - rise_delay=nextentry_var[start+8].get() - fall_delay=nextentry_var[end].get() - if clk_delay=="": clk_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if data_load=="": data_load="1e-12" - if clk_load=="": clk_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_dff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+data_load="+data_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_dff model ",line[1] - - elif line[2]=='d_tff': - try: - start=line[5] - end=line[6] - clk_delay=nextentry_var[start].get() - set_delay=nextentry_var[start+1].get() - reset_delay=nextentry_var[start+2].get() - ic=nextentry_var[start+3].get() - t_load=nextentry_var[start+4].get() - clk_load=nextentry_var[start+5].get() - set_load=nextentry_var[start+6].get() - reset_load=nextentry_var[start+7].get() - rise_delay=nextentry_var[start+8].get() - fall_delay=nextentry_var[end].get() - if t_delay=="": t_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if t_load=="": t_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - addmodelline=".model "+ line[3]+" d_tff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+t_load="+t_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")" - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in d_tff model ",line[1] - - elif line[2]=='ic': - try: - start=line[5] - end=line[6] - ic=nextentry_var[start].get() - if ic=="": ic="0" - addmodelline=".ic v("+line[7]+")="+ic - modelparamvalue.append([line[0],addmodelline,line[4]]) - except: - print "Caught an exception in ic initial condition ",line[1] - - else: - print "No model found" - #tkMessageBox.showinfo("Model Info","Please check whether used model is available inside code") - - print "Model List has been added",modelparamvalue - - -def ClearSourceValue(): - print "Clear Source Value" - for line in sourcelisttrack: - start=line[2] - end=line[3] - count=start - for item in range(int(end-start+1)): - entry_var[count].set("") - count=count+1 - -def ClearModelParamValue(): - print "Clear Model Parameter value" - for line in guimodellisttrack: - print "line",line - start=line[5] - end=line[6] - count=start - for item in range(end-start+1): - nextentry_var[count].set("") - count=count+1 - - -def Submit(): - print "Submit button" - try: - AddModelParametr() #Adding Model Parameter - for item in modelparamvalue: - schematicInfo.append(item[2]) #Adding Comment line - schematicInfo.append(item[1]) #Adding Model line - print "Successfully Closed" - root_window.quit() - except: - tkMessageBox.showinfo("Exception","Please Add before Submit") - - - -def convertICintoBasicBlocks(schematicInfo,outputOption,guimodelvalue): - #Insert Special source parameters - k=1 - for compline in schematicInfo: - words=compline.split() - compName=words[0] - # Find the IC from schematic - if compName[0]=='u': - # Find the component from the circuit - index=schematicInfo.index(compline) - compType=words[len(words)-1]; - schematicInfo.remove(compline) - - if (compType=="7404" or compType=="74hc04" or compType=="74hct04" or compType=="74ls04" or compType=="74ls14"): - i=1; - # Add first three Not gates - while words[i]!="0": - # Add analog to digital converter for input A - schematicInfo.append("a"+str(k)+" ["+words[i]+"] ["+words[i]+"_in] "+" "+compName+"adc") - k=k+1 - # Add Not gate - schematicInfo.append("a"+str(k)+" "+words[i]+"_in "+words[i+1]+"_out "+compName) - k=k+1 - # Add digital to analog converter for output B - schematicInfo.append("a"+str(k)+" ["+words[i+1]+"_out] ["+words[i+1]+"] "+" "+compName+"dac") - k=k+1 - i=i+2 - i=i+1 - # Add last three Not gates - while i11: - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[12]+" "+words[11]+" "+words[10]+" "+words[13]+"] ["+words[12]+"_in "+words[11]+"_in "+words[10]+"_in "+words[13]+"_in] "+compName+"adc") - k=k+1 - # Add D Flip-flop - schematicInfo.append("a"+str(k)+" "+words[12]+"_in "+words[11]+"_in ~"+words[10]+"_in ~"+words[13]+"_in "+words[9]+"_out "+words[8]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[9]+"_out "+words[8]+"_out] ["+words[9]+" "+words[8]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for D Flip-Flop - schematicInfo.append(".model "+ compName+" d_dff") - # Add model for analog-to-digital bridge - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="7475" or compType=="74hc75" or compType=="74ls75"): - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[1]+"_in] "+compName+"adc") - k=k+1 - # Add T Flip-flop - schematicInfo.append("a"+str(k)+" "+words[2]+"_in "+words[3]+"_in ~"+words[4]+"_in ~"+words[1]+"_in "+words[5]+"_out "+words[6]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[5]+"_out "+words[6]+"_out] ["+words[5]+" "+words[6]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for T Flip-Flop - schematicInfo.append(".model "+ compName+" d_tff") - # Add model for analog-to-digital bridge - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="74107" or compType=="74hc107" or compType=="74ls107"): - if len(words)>11: - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[4]+" "+words[12]+" "+words[13]+"] ["+words[1]+"_in "+words[4]+"_in "+words[12]+"_in "+words[13]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[1]+"_in "+words[4]+"_in ~"+words[12]+"_in ~"+words[13]+"_in ~"+words[13]+"_in "+words[3]+"_out "+words[2]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[3]+"_out "+words[2]+"_out] ["+words[3]+" "+words[2]+"] "+" "+compName+"dac") - k=k+1 - - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[8]+" "+words[11]+" "+words[9]+" "+words[10]+"] ["+words[8]+"_in "+words[11]+"_in "+words[9]+"_in "+words[10]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[8]+"_in "+words[11]+"_in ~"+words[9]+"_in ~"+words[10]+"_in ~"+words[10]+"_in "+words[5]+"_out "+words[6]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[5]+"_out "+words[6]+"_out] ["+words[5]+" "+words[6]+"] "+" "+compName+"dac") - k=k+1 - else: - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[4]+" "+words[12]+" "+words[13]+"] ["+words[1]+"_in "+words[4]+"_in "+words[12]+"_in "+words[13]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[1]+"_in "+words[4]+"_in ~"+words[12]+"_in ~"+words[13]+"_in ~"+words[13]+"_in "+words[3]+"_out "+words[2]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[3]+"_out "+words[2]+"_out] ["+words[3]+" "+words[2]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for JK Flip-Flop - schematicInfo.append(".model "+ compName+" d_jkff") - # Add model for analog-to-digital bridge - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="74109" or compType=="74hc109" or compType=="74ls109"): - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[5]+"_in "+words[1]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[2]+"_in ~"+words[3]+"_in "+words[4]+"_in ~"+words[5]+"_in ~"+words[1]+"_in "+words[6]+"_out "+words[7]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[6]+"_out "+words[7]+"_out] ["+words[6]+" "+words[7]+"] "+" "+compName+"dac") - k=k+1 - if len(words)>12: - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[14]+" "+words[13]+" "+words[12]+" "+words[11]+" "+words[15]+"] ["+words[14]+"_in "+words[13]+"_in "+words[12]+"_in "+words[11]+"_in "+words[15]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[14]+"_in ~"+words[13]+"_in "+words[12]+"_in ~"+words[11]+"_in ~"+words[15]+"_in "+words[10]+"_out "+words[9]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[10]+"_out "+words[9]+"_out] ["+words[10]+" "+words[9]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for JK Flip-Flop - schematicInfo.append(".model "+ compName+" d_jkff") - # Add model for analog-to-digital bridge - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="7471" or compType=="74hc71" or compType=="74ls71"): - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[5]+"_in "+words[1]+"_in] "+compName+"adc") - k=k+1 - # Add S-R Flip-flop - schematicInfo.append("a"+str(k)+" "+words[2]+"_in ~"+words[3]+"_in "+words[4]+"_in ~"+words[5]+"_in ~"+words[1]+"_in "+words[6]+"_out "+words[7]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[6]+"_out "+words[7]+"_out] ["+words[6]+" "+words[7]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for SR Flip-Flop - schematicInfo.append(".model "+ compName+" d_srff") - # Add model for analog-to-digital bridge741 - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="74112" or compType=="74hc112" or compType=="74ls112"): - if len(words)>12: - schematicInfo.append("a"+str(k)+" "+words[3]+" "+words[2]+" ~"+words[1]+" ~"+words[4]+" ~"+words[15]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - schematicInfo.append("a"+str(k)+" "+words[11]+" "+words[12]+" ~"+words[13]+" ~"+words[10]+" ~"+words[14]+" "+words[9]+" "+words[7]+" "+compName) - k=k+1 - else: - schematicInfo.append("a"+str(k)+" "+words[3]+" "+words[2]+" ~"+words[1]+" ~"+words[4]+" ~"+words[8]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* "+compType) - schematicInfo.append(".model "+ compName+" d_jkff") - elif compType=="dac": - schematicInfo.append("a"+str(k)+" ["+words[1]+"] ["+words[2]+"] "+compName) - k=k+1 - schematicInfo.insert(index,"* Digital to Analog converter "+compType) - schematicInfo.append(".model "+ compName+" dac_bridge") - elif compType=="adc": - schematicInfo.append("a"+str(k)+" ["+words[1]+"] ["+words[2]+"] "+compName) - k=k+1 - schematicInfo.insert(index,"* Analog to Digital converter "+compType) - schematicInfo.append(".model "+ compName+" adc_bridge") - elif compType=="adc8": - for i in range(0,len(words)/2-1): - schematicInfo.append("a"+str(k)+" ["+words[i+1]+"] ["+words[i+len(words)/2]+"] "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Analog to Digital Converter" - Comment='* Analog to Digital converter '+compType - Title='Add parameters for analog to digital converter '+compName - in_low=' Enter input low level voltage (default=0.8): ' - in_high=' Enter input high level voltage (default=2.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,in_low,in_high]) - elif compType=="dac8": - for i in range(0,len(words)/2-1): - schematicInfo.append("a"+str(k)+" ["+words[i+1]+"] ["+words[i+len(words)/2]+"] "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Digital to Analog converter" - Comment='* Digital to Analog converter '+compType - Title='Add parameters for digital to analog converter '+compName - out_low=' Enter output low level voltage (default=0.2): ' - out_high=' Enter output high level voltage (default=5.0): ' - out_undef=' Enter output for undefined voltage level (default=2.2): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,out_low,out_high,out_undef]) - elif compType=="gain": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Gain" - Comment='* Gain '+compType - Title='Add parameters for Gain '+compName - in_offset=' Enter offset for input (default=0.0): ' - gain=' Enter gain (default=1.0): ' - out_offset=' Enter offset for output (default=0.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,in_offset,gain,out_offset]) - elif compType=="summer": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding summer" - Comment='* Summer '+compType - Title='Add parameters for Summer '+compName - in1_offset=' Enter offset for input 1 (default=0.0): ' - in2_offset=' Enter offset for input 2 (default=0.0): ' - in1_gain=' Enter gain for input 1 (default=1.0): ' - in2_gain=' Enter gain for input 2 (default=1.0): ' - out_gain=' Enter gain for output (default=1.0): ' - out_offset=' Enter offset for output (default=0.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,in1_offset,in2_offset,in1_gain,in2_gain,out_gain,out_offset]) - elif compType=="multiplier": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Multiplier" - Comment='* Multiplier '+compType - Title='Add parameters for Multiplier '+compName - in1_offset=' Enter offset for input 1 (default=0.0): ' - in2_offset=' Enter offset for input 2 (default=0.0): ' - in1_gain=' Enter gain for input 1 (default=1.0): ' - in2_gain=' Enter gain for input 2 (default=1.0): ' - out_gain=' Enter gain for output (default=1.0): ' - out_offset=' Enter offset for output (default=0.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,in1_offset,in2_offset,in1_gain,in2_gain,out_gain,out_offset]) - elif compType=="divider": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Divider" - Comment='Divider '+compType - Title='Add parameters for Divider '+compName - num_offset=' Enter offset for numerator (default=0.0): ' - den_offset=' Enter offset for denominator (default=0.0): ' - num_gain=' Enter gain for numerator (default=1.0): ' - den_gain=' Enter gain for denominator (default=1.0): ' - out_gain=' Enter gain for output (default=1.0): ' - out_offset=' Enter offset for output (default=0.0): ' - den_lower_limit=' Enter lower limit for denominator value (default=1.0e-10): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,num_offset,den_offset,num_gain,den_gain,out_gain,out_offset,den_lower_limit]) - elif compType=="limit": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding limiter" - Comment='* Limiter '+compType - Title='Add parameters for Limiter '+compName - lowerLimit=' Enter out lower limit (default=0.0): ' - upperLimit=' Enter out upper limit (default=5.0): ' - in_offset=' Enter offset for input (default=0.0): ' - gain=' Enter gain (default=1.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,lowerLimit,upperLimit,in_offset,gain]) - elif compType=="integrator": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding integrator" - Comment='* Integrator '+compType - Title='Add parameters for Integrator '+compName - out_lower_limit=' Enter out lower limit (default=0.0): ' - out_upper_limit=' Enter out upper limit (default=5.0): ' - in_offset=' Enter offset for input (default=0.0): ' - gain=' Enter gain (default=1.0): ' - out_ic=' Enter initial condition on output (default=0.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,out_lower_limit,out_upper_limit,in_offset,gain,out_ic]) - elif compType=="differentiator": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Differentiator" - Comment='* Differentiator '+compType - Title='Add parameters for Differentiator '+compName - out_lower_limit=' Enter out lower limit (default=0.0): ' - out_upper_limit=' Enter out upper limit (default=5.0): ' - out_offset=' Enter offset for output (default=0.0): ' - gain=' Enter gain (default=1.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,out_lower_limit,out_upper_limit,out_offset,gain]) - elif compType=="limit8": - for i in range(0,len(words)/2-1): - schematicInfo.append("a"+str(k)+" "+words[i+1]+" "+words[i+len(words)/2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding limiter" - Comment='* Limiter '+compType - Title='Add parameters for Limiter '+compName - lowerLimit=' Enter out lower limit (default=0.0): ' - upperLimit=' Enter out upper limit (default=5.0): ' - in_offset=' Enter offset for input (default=0.0): ' - gain=' Enter gain (default=1.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,lowerLimit,upperLimit,in_offset,gain]) - elif compType=="controlledlimiter": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding controlledlimiter" - Comment='* Controlled Limiter '+compType - Title='Add parameters for Controlled Limiter '+compName - in_offset=' Enter offset for input (default=0.0): ' - gain=' Enter gain (default=1.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,in_offset,gain]) - elif compType=="analogswitch": - schematicInfo.append("a"+str(k)+" "+words[1]+" ("+words[2]+" "+words[3]+") "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding analogswitch" - Comment='* Analog Switch '+compType - Title='Add parameters for Analog Switch '+compName - cntl_on=' Enter control ON voltage (default=5.0): ' - cntl_off=' Enter control OFF voltage (default=0.0): ' - r_on=' Enter ON resistance value (default=10.0): ' - r_off=' Enter OFF resistance value (default=1e6): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,cntl_on,cntl_off,r_on,r_off]) - elif compType=="zener": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Zener" - Comment='* Zener Diode '+compType - Title='Add parameters for Zener Diode '+compName - v_breakdown=' Enter Breakdown voltage (default=5.6): ' - i_breakdown=' Enter Breakdown current (default=2.0e-2): ' - i_sat=' Enter saturation current (default=1.0e-12): ' - n_forward=' Enter forward emission coefficient (default=0.0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,v_breakdown,i_breakdown,i_sat,n_forward]) - elif compType=="d_buffer": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Buffer" - Comment='* Buffer '+compType - Title='Add parameters for Buffer '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_inverter": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Inverter" - Comment='* Inverter '+compType - Title='Add parameters for Inverter '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_and": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding AND" - Comment='* And '+compType - Title= 'Add parameters for And '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_nand": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding NAND" - Comment='* Nand '+compType - Title='Add parameters for Nand '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_or": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding OR" - Comment='* OR '+compType - Title='Add parameters for OR '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_nor": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding NOR" - Comment='* NOR '+compType - Title ='Add parameters for NOR '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_xor": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - print "-----------------------------------------------------------\n" - print "Adding XOR" - Comment='* XOR '+compType - Title='Add parameters for XOR '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_xnor": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding XNOR" - Comment='* XNOR '+compType - Title='Add parameters for XNOR '+compName - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,rise_delay,fall_delay,input_load]) - elif compType=="d_tristate": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding Tristate" - Comment='* Tristate '+compType - Title='Add parameters for Tristate '+compName - delay=' Enter delay (default=1e-12): ' - input_load=' Enter input load capacitance (default=1e-12): ' - enable_load=' Enter enable load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,delay,input_load,enable_load]) - elif compType=="d_pullup": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding pullup" - Comment='* Pullup '+compType - Title='Add parameters for Pullup '+compName - load=' Enter load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,load]) - elif compType=="d_pulldown": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding pulldown" - Comment='* Pulldown '+compType - Title='Add parameters for Pulldown '+compName - load=' Enter load capacitance (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,load]) - elif compType=="d_srlatch": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding SR Latch" - Comment='* SR Latch '+compType - Title='Add parameters for SR Latch '+compName - sr_delay=' Enter input to set-reset delay (default=1e-12): ' - enable_delay=' Enter enable delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - sr_load=' Enter input to set-reset load (default=1e-12): ' - enable_load=' Enter enable load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,sr_delay,enable_delay,set_delay,reset_delay,ic,sr_load,enable_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_jklatch": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding JK Latch" - Comment='* JK Latch '+compType - Title= 'Add parameters for JK Latch '+compName - jk_delay=' Enter input to j-k delay (default=1e-12): ' - enable_delay=' Enter enable delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - jk_load=' Enter input to j-k load (default=1e-12): ' - enable_load=' Enter enable load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,jk_delay,enable_delay,set_delay,reset_delay,ic,enable_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_dlatch": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding D Latch" - Comment='* D Latch '+compType - Title= 'Add parameters for D Latch '+compName - data_delay=' Enter input to data delay (default=1e-12): ' - enable_delay=' Enter enable delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - data_load=' Enter input to data load (default=1e-12): ' - enable_load=' Enter enable load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,data_delay,enable_delay,set_delay,reset_delay,ic,data_load,enable_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_tlatch": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding T Latch" - Comment='* T Latch '+compType - Title= 'Add parameters for T Latch '+compName - t_delay=' Enter input to t delay (default=1e-12): ' - enable_delay=' Enter enable delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - t_load=' Enter input to t load (default=1e-12): ' - enable_load=' Enter enable load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,t_delay,enable_delay,set_delay,reset_delay,ic,t_load,enable_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_srff": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding SR Flip-Flop" - Comment='* SR Flip-Flop '+compType - Title='Add parameters for SR Flip-Flop '+compName - clk_delay=' Enter clk delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - sr_load=' Enter input to set-reset load (default=1e-12): ' - clk_load=' Enter clk load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,sr_load,clk_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_jkff": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding JK Flip-Flop" - Comment='* JK Flip-Flop '+compType - Title= 'Add parameters for JK Flip-Flop '+compName - clk_delay=' Enter clk delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - jk_load=' Enter input to j-k load (default=1e-12): ' - clk_load=' Enter clk load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,jk_load,clk_load,set_load,reset_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_dff": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding D Flip-Flop" - Comment='* D Flip-Flop '+compType - Title= 'Add parameters for D Flip-Flop '+compName - clk_delay=' Enter clk delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - data_load=' Enter input to data load (default=1e-12): ' - clk_load=' Enter clk load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,data_load,clk_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="d_tff": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - #Insert comment at remove line - schematicInfo.insert(index,"* "+compline) - print "-----------------------------------------------------------\n" - print "Adding T Flip-Flop" - Comment='* T Flip-Flop '+compType - Title='Add parameters for T Flip-Flip '+compName - clk_delay=' Enter clk delay (default=1e-12): ' - set_delay=' Enter set delay (default=1e-12): ' - reset_delay=' Enter reset delay (default=1e-12): ' - ic=' Enter initial condition on output (default=0): ' - t_load=' Enter input to t load (default=1e-12): ' - clk_load=' Enter clk load (default=1e-12): ' - set_load=' Enter set load (default=1e-12): ' - reset_load=' Enter reset load (default=1e-12): ' - rise_delay=' Enter rise delay (default=1e-12): ' - fall_delay=' Enter fall delay (default=1e-12): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,clk_delay,set_delay,reset_delay,ic,t_load,clk_load,set_load,reset_load,rise_delay,fall_delay]) - elif compType=="vplot1": - outputOption.append("plot v("+words[1]+")\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vplot8_1": - outputOption.append("plot ") - for i in range(1,len(words)-1): - outputOption.append("v("+words[i]+") ") - outputOption.append("\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vdbplot8_1": - outputOption.append("plot ") - for i in range(1,len(words)-1): - outputOption.append("db(v("+words[i]+")) ") - outputOption.append("\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vphase_plot8_1": - outputOption.append("plot ") - for i in range(1,len(words)-1): - outputOption.append("ph(v("+words[i]+")) ") - outputOption.append("\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vprint1": - outputOption.append("print v("+words[1]+")\n") - schematicInfo.insert(index,"* Printing option "+compType) - elif compType=="calc": - outputOption.append("plot "+words[2]+"\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vprint8_1": - outputOption.append("print ") - for i in range(1,len(words)-1): - outputOption.append("v("+words[i]+") ") - outputOption.append("\n") - schematicInfo.insert(index,"* Printing option "+compType) - elif compType=="vplot": - outputOption.append("plot v("+words[1]+")-v("+words[2]+")\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vplot8": - outputOption.append("plot ") - for i in range(0,len(words)/2-1): - if words[i+1]=="0": - outputOption.append("-v("+words[i+len(words)/2]+") ") - elif words[i+len(words)/2]=="0": - outputOption.append("v("+words[i+1]+") ") - else: - outputOption.append("v("+words[i+1]+")-v("+words[i+len(words)/2]+") ") - outputOption.append("\n") - elif compType=="vprint": - outputOption.append("print v("+words[1]+")-v("+words[2]+")\n") - schematicInfo.insert(index,"* Printting option "+compType) - elif compType=="iplot": - schematicInfo.insert(index,"V_"+words[0]+" "+words[1]+" "+words[2]+" 0") - outputOption.append("plot i(V_"+words[0]+")\n") - elif compType=="powerplot": - outputOption.append("print ((v("+words[1]+")-v("+words[2]+"))^2)/("+words[3]+")\n") - schematicInfo.insert(index,"* Printting option "+compType) - elif compType=="ic": - Comment='*Adding initial Condition '+compType - Title=' Add initial condition ' +compName - print "-----------------------------------------------------------" - print "Adding initial condition" - ic=' Enter initial condition on output (default=0): ' - print "-----------------------------------------------------------" - guimodelvalue.append([index,compline,compType,compName,Comment,Title,words[1],ic]) - elif compType=="opamp1": - f = open(OSCAD_HOME) - data = f.read() - schematicInfo.insert(index,data) - else: - schematicInfo.insert(index,compline) - # Update option information - return schematicInfo,outputOption,guimodelvalue - - - -# Accept input file name from user if not provided -if len(sys.argv) < 2: - filename=raw_input('Enter file name: ') -else: - filename=sys.argv[1] - -if len(sys.argv) < 3: - finalNetlist=int(raw_input('Do you want to create final file: ')) -else: - finalNetlist=int(sys.argv[2]) - -print "==================================" -print "Kicad to Ngspice netlist converter " -print "==================================" -print "converting "+filename - -# Read the netlist -lines=readNetlist(filename) - -# Construct parameter information -param=readParamInfo(lines) - -# Replace parameter with values -netlist, infoline=preprocessNetlist(lines,param) - - -# Separate option and schematic information -optionInfo, schematicInfo=separateNetlistInfo(netlist) - -if finalNetlist: - """Insert analysis from file""" - optionInfo=addAnalysis(optionInfo) - -# Find the analysis option -analysisOption=[] -outputOption=[] -initialCondOption=[] -simulatorOption=[] -includeOption=[] -model=[] - -for eachline in optionInfo: - words=eachline.split() - option=words[0] - if (option=='.ac' or option=='.dc' or - option=='.disto' or option=='.noise' or - option=='.op' or option=='.pz' or - option=='.sens' or option=='.tf' or - option=='.tran'): - analysisOption.append(eachline+'\n') - print eachline - elif (option=='.save' or option=='.print' or - option=='.plot' or option=='.four'): - eachline=eachline.strip('.') - outputOption.append(eachline+'\n') - elif (option=='.nodeset' or option=='.ic'): - initialCondOption.append(eachline+'\n') - elif option=='.option': - simulatorOption.append(eachline+'\n') - elif (option=='.include' or option=='.lib'): - includeOption.append(eachline+'\n') - elif (option=='.model'): - model.append(eachline+'\n') - elif option=='.end': - continue; - - -# Find the various model library required -modelList=[] -subcktList=[] - -for eachline in schematicInfo: - words=eachline.split() - if eachline[0]=='d': - modelName=words[3] - if modelName in modelList: - continue - modelList.append(modelName) - elif eachline[0]=='q': - modelName=words[4] - index=schematicInfo.index(eachline) - schematicInfo.remove(eachline) - schematicInfo.insert(index,words[0]+" "+words[3]+" "+words[2]+" "+words[1]+" "+words[4]) - if modelName in modelList: - continue - modelList.append(modelName) - elif eachline[0]=='m': - modelName=words[4] - index=schematicInfo.index(eachline) - schematicInfo.remove(eachline) - width=raw_input(' Enter width of mosfet '+words[0]+'(default=100u):') - length=raw_input(' Enter length of mosfet '+words[0]+'(default=100u):') - multiplicative_factor=raw_input(' Enter multiplicative factor of mosfet '+words[0]+'(default=1):') - if width=="": width="100u" - if multiplicative_factor=="": multiplicative_factor="100u" - if length=="": length="100u" - schematicInfo.insert(index,words[0]+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[3]+" "+words[4]+" "+'M='+multiplicative_factor+" "+'L='+length+" "+'W='+width) - if modelName in modelList: - continue - modelList.append(modelName) - elif eachline[0]=='j': - modelName=words[4] - index=schematicInfo.index(eachline) - schematicInfo.remove(eachline) - schematicInfo.insert(index,words[0]+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]) - if modelName in modelList: - continue - modelList.append(modelName) - elif eachline[0]=='x': - subcktName=words[len(words)-1] - if subcktName in subcktList: - continue - subcktList.append(subcktName) - - -# Find current through components -schematicInfo,outputOption=findCurrent(schematicInfo,outputOption) - -#List for storing source and its value -sourcelist=[] -sourcelisttrack=[] - - -# Add parameter to sources -schematicInfo,sourcelist=insertSpecialSourceParam(schematicInfo,sourcelist) - -#Calling createrootwindow -sourcelist,sourcelisttrack=createrootwindow(sourcelist,sourcelisttrack) -print "Output Option",outputOption -print schematicInfo - - -# Add newline in the schematic information -for i in range(len(schematicInfo),0,-1): - schematicInfo.insert(i,'\n') - -outfile=filename+".out" -cktfile=filename+".ckt" -out=open(outfile,"w") -ckt=open(cktfile,"w") -out.writelines(infoline) -out.writelines('\n') -ckt.writelines(infoline) -ckt.writelines('\n') - -for modelName in modelList: - if os.path.exists(modelName+".lib"): - out.writelines('.include '+modelName+'.lib\n') - ckt.writelines('.include '+modelName+'.lib\n') - -for subcktName in subcktList: - out.writelines('.include '+subcktName+'.sub\n') - ckt.writelines('.include '+subcktName+'.sub\n') - -if finalNetlist: - sections=[simulatorOption, initialCondOption, schematicInfo, analysisOption] -else: - sections=[simulatorOption, initialCondOption, schematicInfo] -for section in sections: - if len(section) == 0: - continue - else: - out.writelines('\n') - out.writelines(section) - ckt.writelines('\n') - ckt.writelines(section) - -if finalNetlist: - out.writelines('\n* Control Statements \n') - out.writelines('.control\n') - out.writelines('run\n') - out.writelines(outputOption) - outputOption1=[] - for option in outputOption: - if (("plot" in option) or ("print" in option)): - outputOption1.append("."+option) - else: - outputOption1.append(option) - ckt.writelines(outputOption1) - out.writelines('.endc\n') - out.writelines('.end\n') - ckt.writelines('.end\n') - -out.close() -ckt.close() - -print "The ngspice netlist has been written in "+filename+".out" -print "The scilab netlist has been written in "+filename+".ckt" -#dummy=raw_input('Press Enter to quit') diff --git a/OSCAD/kicadtoNgspice/terminal_KicadtoNgspice.py b/OSCAD/kicadtoNgspice/terminal_KicadtoNgspice.py deleted file mode 100755 index a3d443a..0000000 --- a/OSCAD/kicadtoNgspice/terminal_KicadtoNgspice.py +++ /dev/null @@ -1,1474 +0,0 @@ -#!/usr/bin/python -# KicadtoNgspice.py is a python script to convert a Kicad spice netlist to a ngspice netlist. It developed for OSCAD software. It is written by FOSSEE team, IIT B. -# Copyright (C) FOSSEE Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -import sys -import os.path - -def readNetlist(filename): - """Read Pspice netList""" -# Open file if it exists - if os.path.exists(filename): - try: - f = open(filename) - except : - print("Error in opening file") - sys.exit() - else: - print filename + " does not exist" - sys.exit() - -# Read the data from file - data=f.read() - -# Close the file - f.close() - return data.splitlines() - -def readParamInfo(data): - """Read Parameter information and store it into dictionary""" - param={} - for eachline in lines: - eachline=eachline.strip() - if len(eachline)>1: - words=eachline.split(); - option=words[0].lower() - if option=='.param': - for i in range(1, len(words), 1): - paramList=words[i].split('=') - param[paramList[0]]=paramList[1] - return param - -def preprocessNetlist(lines,param): - """Preprocess netlist (replace parameters)""" - netlist=[] - for eachline in lines: - # Remove leading and trailing blanks spaces from line - eachline=eachline.strip() - # Remove special character $ - eachline=eachline.replace('$','') - # Replace parameter with values - for subParam in eachline.split(): - if '}' in subParam: - key=subParam.split()[0] - key=key.strip('{') - key=key.strip('}') - if key in param: - eachline=eachline.replace('{'+key+'}',param[key]) - else: - print "Parameter " + key +" does not exists" - value=raw_input('Enter parameter value: ') - eachline=eachline.replace('{'+key+'}',value) - # Convert netlist into lower case letter - eachline=eachline.lower() - # Construct netlist - if len(eachline)>1: - if eachline[0]=='+': - netlist.append(netlist.pop()+eachline.replace('+',' ')) - else: - netlist.append(eachline) - # Copy information line - infoline=netlist[0] - netlist.remove(netlist[0]) - return netlist,infoline - -def separateNetlistInfo(netlist): - optionInfo=[] - schematicInfo=[] - - for eachline in netlist: - if eachline[0]=='*': - continue - elif eachline[0]=='.': - optionInfo.append(eachline) - else: - schematicInfo.append(eachline) - return optionInfo,schematicInfo - - -def addAnalysis(optionInfo): - """Add Analysis to the netlist""" -# Open file if it exists - filename="analysis" - if os.path.exists(filename): - try: - f = open(filename) - except : - print("Error in opening file") - sys.exit() - else: - print filename + " does not exist" - sys.exit() - -# Read the data from file - data=f.read() - -# Close the file - f.close() - - analysisData=data.splitlines() - for eachline in analysisData: - eachline=eachline.strip() - if len(eachline)>1: - if eachline[0]=='.': - optionInfo.append(eachline) - else: - pass - return optionInfo - -def findCurrent(schematicInfo,outputOption): - """Find current through component by placing voltage source series with the component""" - i=0 - for eachline in outputOption: - words=eachline.split() - option=words[0] - # Add voltage sources in series with component to find current - if option=="print" or option=="plot": - words.remove(option) - updatedline=eachline - for outputVar in words: - # Find component name if output variable is current - if outputVar[0]=='i': - outputVar=outputVar.strip('i') - outputVar=outputVar.strip('(') - compName=outputVar.strip(')') - # If component is voltage source, skip - if compName[0]=='v': - continue - # Find the component from the circuit - for compline in schematicInfo: - compInfo=compline.split() - if compInfo[0]==compName: - # Construct dummy node - dummyNode='dummy_'+str(i) - i+=1 - # Break the one node component and place zero value voltage source in between. - index=schematicInfo.index(compline) - schematicInfo.remove(compline) - compline=compline.replace(compInfo[2],dummyNode) - schematicInfo.insert(index,compline) - schematicInfo.append('v'+compName+' '+dummyNode+' '+compInfo[2]+' 0') - # Update option information - updatedline=updatedline.replace('i('+compName+')','i(v'+compName+')') - index=outputOption.index(eachline) - outputOption.remove(eachline) - outputOption.insert(index,updatedline) - return schematicInfo, outputOption - -def insertSpecialSourceParam(schematicInfo): - """Insert Special source parameters""" - schematicInfo1=[] - for compline in schematicInfo: - words=compline.split() - compName=words[0] - # Ask for parameters of the source - if compName[0]=='v' or compName[0]=='i': - # Find the index component from the circuit - index=schematicInfo.index(compline) - schematicInfo.remove(compline) - if words[3]=="pulse": - print "----------------------------------------------\n" - print "Add parameters for pulse source "+compName - v1=raw_input(' Enter initial value(Volts/Amps): ') - v2=raw_input(' Enter pulsed value(Volts/Amps): ') - td=raw_input(' Enter delay time (seconds): ') - tr=raw_input(' Enter rise time (seconds): ') - tf=raw_input(' Enter fall time (seconds): ') - pw=raw_input(' Enter pulse width (seconds): ') - tp=raw_input(' Enter period (seconds): ') - print "----------------------------------------------" - compline=compline + "("+v1+" "+v2+" "+td+" "+tr+" "+tf+" "+pw+" "+tp+")" - elif words[3]=="sine": - print "----------------------------------------------\n" - print "Add parameters for sine source "+compName - vo=raw_input(' Enter offset value (Volts/Amps): ') - va=raw_input(' Enter amplitude (Volts/Amps): ') - freq=raw_input(' Enter frequency (Hz): ') - td=raw_input(' Enter delay time (seconds): ') - theta=raw_input(' Enter damping factor (1/seconds): ') - print "----------------------------------------------" - compline=compline + "("+vo+" "+va+" "+freq+" "+td+" "+theta+")" - elif words[3]=="ac": - print "----------------------------------------------\n" - print "Add parameters for ac source "+compName - v_a=raw_input(' Enter amplitude (Volts/Amps): ') - print "----------------------------------------------" - compline=compline + " " + v_a - elif words[3]=="exp": - print "----------------------------------------------\n" - print "Add parameters for exponential source "+compName - v1=raw_input(' Enter initial value(Volts/Amps): ') - v2=raw_input(' Enter pulsed value(Volts/Amps): ') - td1=raw_input(' Enter rise delay time (seconds): ') - tau1=raw_input(' Enter rise time constant (seconds): ') - td2=raw_input(' Enter fall time (seconds): ') - tau2=raw_input(' Enter fall time constant (seconds): ') - print "----------------------------------------------" - compline=compline + "("+v1+" "+v2+" "+td1+" "+tau1+" "+td2+" "+tau2+")" - elif words[3]=="pwl": - print "----------------------------------------------\n" - print "Add parameters for piecewise linear source "+compName - inp="y" - compline=compline + "(" - while inp=="y": - t1=raw_input(' Enter time (seconds): ') - v1=raw_input(' Enter value(Volts/Amps): ') - compline=compline + t1+" "+v1+" " - inp=raw_input(' Do you want to continue(y/n): ') - print "----------------------------------------------" - compline=compline + ")" - elif words[3]=="dc": - print "----------------------------------------------\n" - print "Add parameters for DC source "+compName - v1=raw_input(' Enter value(Volts/Amps): ') - print "----------------------------------------------" - compline=compline + " "+v1 - schematicInfo.insert(index,compline) - elif compName[0]=='h' or compName[0]=='f': - # Find the index component from the circuit - index=schematicInfo.index(compline) - schematicInfo.remove(compline) - schematicInfo.insert(index,"* "+compName) - schematicInfo1.append("V"+compName+" "+words[3]+" "+words[4]+" 0") - schematicInfo1.append(compName+" "+words[1]+" "+words[2]+" "+"V"+compName+" "+words[5]) - schematicInfo=schematicInfo+schematicInfo1 - return schematicInfo - -def convertICintoBasicBlocks(schematicInfo,outputOption): - """Insert Special source parameters""" - k=1 - for compline in schematicInfo: - words=compline.split() - compName=words[0] - # Find the IC from schematic - if compName[0]=='u': - # Find the component from the circuit - index=schematicInfo.index(compline) - schematicInfo.remove(compline) - compType=words[len(words)-1]; - if (compType=="7404" or compType=="74hc04" or compType=="74hct04" or compType=="74ls04" or compType=="74ls14"): - i=1; - # Add first three Not gates - while words[i]!="0": - # Add analog to digital converter for input A - schematicInfo.append("a"+str(k)+" ["+words[i]+"] ["+words[i]+"_in] "+" "+compName+"adc") - k=k+1 - # Add Not gate - schematicInfo.append("a"+str(k)+" "+words[i]+"_in "+words[i+1]+"_out "+compName) - k=k+1 - # Add digital to analog converter for output B - schematicInfo.append("a"+str(k)+" ["+words[i+1]+"_out] ["+words[i+1]+"] "+" "+compName+"dac") - k=k+1 - i=i+2 - i=i+1 - # Add last three Not gates - while i11: - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[12]+" "+words[11]+" "+words[10]+" "+words[13]+"] ["+words[12]+"_in "+words[11]+"_in "+words[10]+"_in "+words[13]+"_in] "+compName+"adc") - k=k+1 - # Add D Flip-flop - schematicInfo.append("a"+str(k)+" "+words[12]+"_in "+words[11]+"_in ~"+words[10]+"_in ~"+words[13]+"_in "+words[9]+"_out "+words[8]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[9]+"_out "+words[8]+"_out] ["+words[9]+" "+words[8]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for D Flip-Flop - schematicInfo.append(".model "+ compName+" d_dff") - # Add model for analog-to-digital bridge - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="74107" or compType=="74hc107" or compType=="74ls107"): - if len(words)>11: - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[4]+" "+words[12]+" "+words[13]+"] ["+words[1]+"_in "+words[4]+"_in "+words[12]+"_in "+words[13]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[1]+"_in "+words[4]+"_in ~"+words[12]+"_in ~"+words[13]+"_in ~"+words[13]+"_in "+words[3]+"_out "+words[2]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[3]+"_out "+words[2]+"_out] ["+words[3]+" "+words[2]+"] "+" "+compName+"dac") - k=k+1 - - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[8]+" "+words[11]+" "+words[9]+" "+words[10]+"] ["+words[8]+"_in "+words[11]+"_in "+words[9]+"_in "+words[10]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[8]+"_in "+words[11]+"_in ~"+words[9]+"_in ~"+words[10]+"_in ~"+words[10]+"_in "+words[5]+"_out "+words[6]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[5]+"_out "+words[6]+"_out] ["+words[5]+" "+words[6]+"] "+" "+compName+"dac") - k=k+1 - else: - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[4]+" "+words[12]+" "+words[13]+"] ["+words[1]+"_in "+words[4]+"_in "+words[12]+"_in "+words[13]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[1]+"_in "+words[4]+"_in ~"+words[12]+"_in ~"+words[13]+"_in ~"+words[13]+"_in "+words[3]+"_out "+words[2]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[3]+"_out "+words[2]+"_out] ["+words[3]+" "+words[2]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for JK Flip-Flop - schematicInfo.append(".model "+ compName+" d_jkff") - # Add model for analog-to-digital bridge - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="74109" or compType=="74hc109" or compType=="74ls109"): - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[1]+"] ["+words[2]+"_in "+words[3]+"_in "+words[4]+"_in "+words[5]+"_in "+words[1]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[2]+"_in ~"+words[3]+"_in "+words[4]+"_in ~"+words[5]+"_in ~"+words[1]+"_in "+words[6]+"_out "+words[7]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[6]+"_out "+words[7]+"_out] ["+words[6]+" "+words[7]+"] "+" "+compName+"dac") - k=k+1 - if len(words)>12: - # Add analog to digital converter for inputs - schematicInfo.append("a"+str(k)+" ["+words[14]+" "+words[13]+" "+words[12]+" "+words[11]+" "+words[15]+"] ["+words[14]+"_in "+words[13]+"_in "+words[12]+"_in "+words[11]+"_in "+words[15]+"_in] "+compName+"adc") - k=k+1 - # Add J-K Flip-flop - schematicInfo.append("a"+str(k)+" "+words[14]+"_in ~"+words[13]+"_in "+words[12]+"_in ~"+words[11]+"_in ~"+words[15]+"_in "+words[10]+"_out "+words[9]+"_out "+compName) - k=k+1 - # Add digital to analog converter for outputs - schematicInfo.append("a"+str(k)+" ["+words[10]+"_out "+words[9]+"_out] ["+words[10]+" "+words[9]+"] "+" "+compName+"dac") - k=k+1 - # Insert comment in-place of components - schematicInfo.insert(index,"* "+compType) - # Add model for JK Flip-Flop - schematicInfo.append(".model "+ compName+" d_jkff") - # Add model for analog-to-digital bridge - schematicInfo.append(".model "+ compName+"adc adc_bridge(in_low=0.8 in_high=2.0)") - # Add model for digital-to-analog bridge - schematicInfo.append(".model "+ compName+"dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)") - elif (compType=="74112" or compType=="74hc112" or compType=="74ls112"): - if len(words)>12: - schematicInfo.append("a"+str(k)+" "+words[3]+" "+words[2]+" ~"+words[1]+" ~"+words[4]+" ~"+words[15]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - schematicInfo.append("a"+str(k)+" "+words[11]+" "+words[12]+" ~"+words[13]+" ~"+words[10]+" ~"+words[14]+" "+words[9]+" "+words[7]+" "+compName) - k=k+1 - else: - schematicInfo.append("a"+str(k)+" "+words[3]+" "+words[2]+" ~"+words[1]+" ~"+words[4]+" ~"+words[8]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* "+compType) - schematicInfo.append(".model "+ compName+" d_jkff") - elif compType=="dac": - schematicInfo.append("a"+str(k)+" ["+words[1]+"] ["+words[2]+"] "+compName) - k=k+1 - schematicInfo.insert(index,"* Digital to Analog converter "+compType) - schematicInfo.append(".model "+ compName+" dac_bridge") - elif compType=="adc": - schematicInfo.append("a"+str(k)+" ["+words[1]+"] ["+words[2]+"] "+compName) - k=k+1 - schematicInfo.insert(index,"* Analog to Digital converter "+compType) - schematicInfo.append(".model "+ compName+" adc_bridge") - elif compType=="adc8": - for i in range(0,len(words)/2-1): - schematicInfo.append("a"+str(k)+" ["+words[i+1]+"] ["+words[i+len(words)/2]+"] "+compName) - k=k+1 - schematicInfo.insert(index,"* Analog to Digital converter "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for analog to digital converter "+compName - in_low=raw_input(' Enter input low level voltage (default=0.8): ') - in_high=raw_input(' Enter input high level voltage (default=2.0): ') - print "-----------------------------------------------------------" - if in_low=="": in_low="0.8" - if in_high=="": in_high="2.0" - schematicInfo.append(".model "+ compName+" adc_bridge(in_low="+in_low+" in_high="+in_high+" )") - elif compType=="dac8": - for i in range(0,len(words)/2-1): - schematicInfo.append("a"+str(k)+" ["+words[i+1]+"] ["+words[i+len(words)/2]+"] "+compName) - k=k+1 - schematicInfo.insert(index,"* Digital to Analog converter "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for digital to analog converter "+compName - out_low=raw_input(' Enter output low level voltage (default=0.2): ') - out_high=raw_input(' Enter output high level voltage (default=5.0): ') - out_undef=raw_input(' Enter output for undefined voltage level (default=2.2): ') - print "-----------------------------------------------------------" - if out_low=="": out_low="0.2" - if out_high=="": out_high="5.0" - if out_undef=="": out_undef="5.0" - schematicInfo.append(".model "+ compName+" dac_bridge(out_low="+out_low+" out_high="+out_high+" out_undef="+out_undef+" )") - elif compType=="gain": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Gain "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Gain "+compName - in_offset=raw_input(' Enter offset for input (default=0.0): ') - gain=raw_input(' Enter gain (default=1.0): ') - out_offset=raw_input(' Enter offset for output (default=0.0): ') - print "-----------------------------------------------------------" - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - if out_offset=="": out_offset="0.0" - schematicInfo.append(".model "+ compName+" gain(in_offset="+in_offset+" out_offset="+out_offset+" gain="+gain+")") - elif compType=="summer": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Summer "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Summer "+compName - in1_offset=raw_input(' Enter offset for input 1 (default=0.0): ') - in2_offset=raw_input(' Enter offset for input 2 (default=0.0): ') - in1_gain=raw_input(' Enter gain for input 1 (default=1.0): ') - in2_gain=raw_input(' Enter gain for input 2 (default=1.0): ') - out_gain=raw_input(' Enter gain for output (default=1.0): ') - out_offset=raw_input(' Enter offset for output (default=0.0): ') - print "-----------------------------------------------------------" - if in1_offset=="": in1_offset="0.0" - if in2_offset=="": in2_offset="0.0" - if in1_gain=="": in1_gain="1.0" - if in2_gain=="": in2_gain="1.0" - if out_gain=="": out_gain="1.0" - if out_offset=="": out_offset="0.0" - schematicInfo.append(".model "+ compName+" summer(in_offset=["+in1_offset+" "+in2_offset+"] in_gain=["+in1_gain+" "+in2_gain+"] out_offset="+out_offset+" out_gain="+out_gain+")") - elif compType=="multiplier": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Multiplier "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Multiplier "+compName - in1_offset=raw_input(' Enter offset for input 1 (default=0.0): ') - in2_offset=raw_input(' Enter offset for input 2 (default=0.0): ') - in1_gain=raw_input(' Enter gain for input 1 (default=1.0): ') - in2_gain=raw_input(' Enter gain for input 2 (default=1.0): ') - out_gain=raw_input(' Enter gain for output (default=1.0): ') - out_offset=raw_input(' Enter offset for output (default=0.0): ') - print "-----------------------------------------------------------" - if in1_offset=="": in1_offset="0.0" - if in2_offset=="": in2_offset="0.0" - if in1_gain=="": in1_gain="1.0" - if in2_gain=="": in2_gain="1.0" - if out_gain=="": out_gain="1.0" - if out_offset=="": out_offset="0.0" - schematicInfo.append(".model "+ compName+" mult(in_offset=["+in1_offset+" "+in2_offset+"] in_gain=["+in1_gain+" "+in2_gain+"] out_offset="+out_offset+" out_gain="+out_gain+")") - elif compType=="divider": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Divider "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Divider "+compName - num_offset=raw_input(' Enter offset for numerator (default=0.0): ') - den_offset=raw_input(' Enter offset for denominator (default=0.0): ') - num_gain=raw_input(' Enter gain for numerator (default=1.0): ') - den_gain=raw_input(' Enter gain for denominator (default=1.0): ') - out_gain=raw_input(' Enter gain for output (default=1.0): ') - out_offset=raw_input(' Enter offset for output (default=0.0): ') - den_lower_limit=raw_input(' Enter lower limit for denominator value (default=1.0e-10): ') - print "-----------------------------------------------------------" - if num_offset=="": num_offset="0.0" - if den_offset=="": den_offset="0.0" - if num_gain=="": num_gain="1.0" - if den_gain=="": den_gain="1.0" - if out_gain=="": out_gain="1.0" - if out_offset=="": out_offset="0.0" - if den_lower_limit=="": den_lower_limit="1.0e-10" - schematicInfo.append(".model "+ compName+" divide(num_offset="+num_offset+" den_offset="+den_offset+" num_gain="+num_gain+" den_gain="+den_gain+" out_offset="+out_offset+" out_gain="+out_gain+" den_lower_limit="+den_lower_limit+")") - elif compType=="limit": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Limiter "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Limiter "+compName - lowerLimit=raw_input(' Enter out lower limit (default=0.0): ') - upperLimit=raw_input(' Enter out upper limit (default=5.0): ') - in_offset=raw_input(' Enter offset for input (default=0.0): ') - gain=raw_input(' Enter gain (default=1.0): ') - print "-----------------------------------------------------------" - if lowerLimit=="": lowerLimit="0.0" - if upperLimit=="": upperLimit="5.0" - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - schematicInfo.append(".model "+ compName+" limit(out_lower_limit="+lowerLimit+" out_upper_limit="+upperLimit+" in_offset="+in_offset+" gain="+gain+")") - elif compType=="integrator": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Integrator "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Integrator "+compName - out_lower_limit=raw_input(' Enter out lower limit (default=0.0): ') - out_upper_limit=raw_input(' Enter out upper limit (default=5.0): ') - in_offset=raw_input(' Enter offset for input (default=0.0): ') - gain=raw_input(' Enter gain (default=1.0): ') - out_ic=raw_input(' Enter initial condition on output (default=0.0): ') - print "-----------------------------------------------------------" - if out_lower_limit=="": out_lower_limit="0.0" - if out_upper_limit=="": out_upper_limit="5.0" - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - if out_ic=="": out_ic="0.0" - schematicInfo.append(".model "+ compName+" int(out_lower_limit="+out_lower_limit+" out_upper_limit="+out_upper_limit+" in_offset="+in_offset+" gain="+gain+" out_ic="+out_ic+")") - elif compType=="differentiator": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Differentiator "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Differentiator "+compName - out_lower_limit=raw_input(' Enter out lower limit (default=0.0): ') - out_upper_limit=raw_input(' Enter out upper limit (default=5.0): ') - out_offset=raw_input(' Enter offset for output (default=0.0): ') - gain=raw_input(' Enter gain (default=1.0): ') - print "-----------------------------------------------------------" - if out_lower_limit=="": out_lower_limit="0.0" - if out_upper_limit=="": out_upper_limit="5.0" - if out_offset=="": out_offset="0.0" - if gain=="": gain="1.0" - schematicInfo.append(".model "+ compName+" d_dt(out_lower_limit="+out_lower_limit+" out_upper_limit="+out_upper_limit+" out_offset="+out_offset+" gain="+gain+")") - elif compType=="limit8": - for i in range(0,len(words)/2-1): - schematicInfo.append("a"+str(k)+" "+words[i+1]+" "+words[i+len(words)/2]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Limiter "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Limiter "+compName - lowerLimit=raw_input(' Enter out lower limit (default=0.0): ') - upperLimit=raw_input(' Enter out upper limit (default=5.0): ') - in_offset=raw_input(' Enter offset for input (default=0.0): ') - gain=raw_input(' Enter gain (default=1.0): ') - print "-----------------------------------------------------------" - if lowerLimit=="": lowerLimit="0.0" - if upperLimit=="": upperLimit="5.0" - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - schematicInfo.append(".model "+ compName+" limit(out_lower_limit="+lowerLimit+" out_upper_limit="+upperLimit+" in_offset="+in_offset+" gain="+gain+")") - elif compType=="controlledlimiter": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Controlled Limiter "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Controlled Limiter "+compName - in_offset=raw_input(' Enter offset for input (default=0.0): ') - gain=raw_input(' Enter gain (default=1.0): ') - print "-----------------------------------------------------------" - if in_offset=="": in_offset="0.0" - if gain=="": gain="1.0" - schematicInfo.append(".model "+ compName+" climit(in_offset="+in_offset+" gain="+gain+")") - elif compType=="analogswitch": - schematicInfo.append("a"+str(k)+" "+words[1]+" ("+words[2]+" "+words[3]+") "+compName) - k=k+1 - schematicInfo.insert(index,"* Analog Switch "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Analog Switch "+compName - cntl_on=raw_input(' Enter control ON voltage (default=5.0): ') - cntl_off=raw_input(' Enter control OFF voltage (default=0.0): ') - r_on=raw_input(' Enter ON resistance value (default=10.0): ') - r_off=raw_input(' Enter OFF resistance value (default=1e6): ') - print "-----------------------------------------------------------" - if cntl_on=="": cntl_on="5.0" - if cntl_off=="": cntl_off="0.0" - if r_on=="": r_on="10.0" - if r_off=="": r_off="1e6" - schematicInfo.append(".model "+ compName+" aswitch(cntl_on="+cntl_on+" cntl_off="+cntl_off+" r_on="+r_on+" r_off="+r_off+")") - elif compType=="zener": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Zener Diode "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Zener Diode "+compName - v_breakdown=raw_input(' Enter Breakdown voltage (default=5.6): ') - i_breakdown=raw_input(' Enter Breakdown current (default=2.0e-2): ') - i_sat=raw_input(' Enter saturation current (default=1.0e-12): ') - n_forward=raw_input(' Enter forward emission coefficient (default=0.0): ') - print "-----------------------------------------------------------" - if v_breakdown=="": v_breakdown="5.6" - if i_breakdown=="": i_breakdown="1.0e-2" - if i_sat=="": i_sat="1.0e-12" - if n_forward=="": n_forward="1.0" - schematicInfo.append(".model "+ compName+" zener(v_breakdown="+v_breakdown+" i_breakdown="+i_breakdown+" i_sat="+i_sat+" n_forward="+n_forward+")") - elif compType=="d_buffer": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Buffer "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Buffer "+compName - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - input_load=raw_input(' Enter input load capacitance (default=1e-12): ') - print "-----------------------------------------------------------" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - schematicInfo.append(".model "+ compName+" d_buffer(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") - elif compType=="d_inverter": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Inverter "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Inverter "+compName - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - input_load=raw_input(' Enter input load capacitance (default=1e-12): ') - print "-----------------------------------------------------------" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - schematicInfo.append(".model "+ compName+" d_inverter(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") - elif compType=="d_and": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* And "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for And "+compName - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - input_load=raw_input(' Enter input load capacitance (default=1e-12): ') - print "-----------------------------------------------------------" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - schematicInfo.append(".model "+ compName+" d_and(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") - elif compType=="d_nand": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Nand "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Nand "+compName - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - input_load=raw_input(' Enter input load capacitance (default=1e-12): ') - print "-----------------------------------------------------------" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - schematicInfo.append(".model "+ compName+" d_nand(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") - elif compType=="d_or": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* OR "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for OR "+compName - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - input_load=raw_input(' Enter input load capacitance (default=1e-12): ') - print "-----------------------------------------------------------" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - schematicInfo.append(".model "+ compName+" d_or(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") - elif compType=="d_nor": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* NOR "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for NOR "+compName - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - input_load=raw_input(' Enter input load capacitance (default=1e-12): ') - print "-----------------------------------------------------------" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - schematicInfo.append(".model "+ compName+" d_nor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") - elif compType=="d_xor": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* XOR "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for XOR "+compName - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - input_load=raw_input(' Enter input load capacitance (default=1e-12): ') - print "-----------------------------------------------------------" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - schematicInfo.append(".model "+ compName+" d_xor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") - elif compType=="d_xnor": - schematicInfo.append("a"+str(k)+" ["+words[1]+" "+words[2]+"] "+words[3]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* XNOR "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for XNOR "+compName - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - input_load=raw_input(' Enter input load capacitance (default=1e-12): ') - print "-----------------------------------------------------------" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - if input_load=="": input_load="1e-12" - schematicInfo.append(".model "+ compName+" d_xnor(rise_delay="+rise_delay+" fall_delay="+fall_delay+" input_load="+input_load+")") - elif compType=="d_tristate": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Tristate "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Tristate "+compName - delay=raw_input(' Enter delay (default=1e-12): ') - input_load=raw_input(' Enter input load capacitance (default=1e-12): ') - enable_load=raw_input(' Enter enable load capacitance (default=1e-12): ') - print "-----------------------------------------------------------" - if delay=="": delay="1e-12" - if input_load=="": input_load="1e-12" - if enable_load=="": enable_load="1e-12" - schematicInfo.append(".model "+ compName+" d_tristate(delay="+delay+" enable_load="+enable_load+" input_load="+input_load+")") - elif compType=="d_pullup": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Pullup "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Pullup "+compName - load=raw_input(' Enter load capacitance (default=1e-12): ') - print "-----------------------------------------------------------" - if load=="": load="1e-12" - schematicInfo.append(".model "+ compName+" d_pullup(load="+load+")") - elif compType=="d_pulldown": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* Pullup "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for Pullup "+compName - load=raw_input(' Enter load capacitance (default=1e-12): ') - print "-----------------------------------------------------------" - if load=="": load="1e-12" - schematicInfo.append(".model "+ compName+" d_pulldown(load="+load+")") - elif compType=="d_srlatch": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* SR Latch "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for SR Latch "+compName - sr_delay=raw_input(' Enter input to set-reset delay (default=1e-12): ') - enable_delay=raw_input(' Enter enable delay (default=1e-12): ') - set_delay=raw_input(' Enter set delay (default=1e-12): ') - reset_delay=raw_input(' Enter reset delay (default=1e-12): ') - ic=raw_input(' Enter initial condition on output (default=0): ') - sr_load=raw_input(' Enter input to set-reset load (default=1e-12): ') - enable_load=raw_input(' Enter enable load (default=1e-12): ') - set_load=raw_input(' Enter set load (default=1e-12): ') - reset_load=raw_input(' Enter reset load (default=1e-12): ') - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - print "-----------------------------------------------------------" - if sr_delay=="": sr_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if sr_load=="": sr_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - schematicInfo.append(".model "+ compName+" d_srlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+sr_load="+sr_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+sr_delay="+sr_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") - elif compType=="d_jklatch": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* JK Latch "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for JK Latch "+compName - jk_delay=raw_input(' Enter input to j-k delay (default=1e-12): ') - enable_delay=raw_input(' Enter enable delay (default=1e-12): ') - set_delay=raw_input(' Enter set delay (default=1e-12): ') - reset_delay=raw_input(' Enter reset delay (default=1e-12): ') - ic=raw_input(' Enter initial condition on output (default=0): ') - jk_load=raw_input(' Enter input to j-k load (default=1e-12): ') - enable_load=raw_input(' Enter enable load (default=1e-12): ') - set_load=raw_input(' Enter set load (default=1e-12): ') - reset_load=raw_input(' Enter reset load (default=1e-12): ') - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - print "-----------------------------------------------------------" - if jk_delay=="": jk_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if jk_load=="": jk_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - schematicInfo.append(".model "+ compName+" d_jklatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+jk_load="+jk_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+jk_delay="+jk_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") - elif compType=="d_dlatch": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* D Latch "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for D Latch "+compName - data_delay=raw_input(' Enter input to data delay (default=1e-12): ') - enable_delay=raw_input(' Enter enable delay (default=1e-12): ') - set_delay=raw_input(' Enter set delay (default=1e-12): ') - reset_delay=raw_input(' Enter reset delay (default=1e-12): ') - ic=raw_input(' Enter initial condition on output (default=0): ') - data_load=raw_input(' Enter input to data load (default=1e-12): ') - enable_load=raw_input(' Enter enable load (default=1e-12): ') - set_load=raw_input(' Enter set load (default=1e-12): ') - reset_load=raw_input(' Enter reset load (default=1e-12): ') - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - print "-----------------------------------------------------------" - if data_delay=="": data_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if data_load=="": data_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - schematicInfo.append(".model "+ compName+" d_dlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+data_load="+data_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+data_delay="+data_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") - elif compType=="d_tlatch": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* T Latch "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for T Latch "+compName - t_delay=raw_input(' Enter input to t delay (default=1e-12): ') - enable_delay=raw_input(' Enter enable delay (default=1e-12): ') - set_delay=raw_input(' Enter set delay (default=1e-12): ') - reset_delay=raw_input(' Enter reset delay (default=1e-12): ') - ic=raw_input(' Enter initial condition on output (default=0): ') - t_load=raw_input(' Enter input to t load (default=1e-12): ') - enable_load=raw_input(' Enter enable load (default=1e-12): ') - set_load=raw_input(' Enter set load (default=1e-12): ') - reset_load=raw_input(' Enter reset load (default=1e-12): ') - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - print "-----------------------------------------------------------" - if t_delay=="": t_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if t_load=="": t_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - schematicInfo.append(".model "+ compName+" d_tlatch(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+t_load="+t_load+" enable_load="+enable_load+" set_load="+set_load+" reset_load="+reset_load+"\n+t_delay="+t_delay+" enable_delay="+enable_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") - elif compType=="d_srff": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* SR Flip-Flop "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for SR Flip-Flop "+compName - clk_delay=raw_input(' Enter clk delay (default=1e-12): ') - set_delay=raw_input(' Enter set delay (default=1e-12): ') - reset_delay=raw_input(' Enter reset delay (default=1e-12): ') - ic=raw_input(' Enter initial condition on output (default=0): ') - sr_load=raw_input(' Enter input to set-reset load (default=1e-12): ') - clk_load=raw_input(' Enter clk load (default=1e-12): ') - set_load=raw_input(' Enter set load (default=1e-12): ') - reset_load=raw_input(' Enter reset load (default=1e-12): ') - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - print "-----------------------------------------------------------" - if clk_delay=="": clk_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if sr_load=="": sr_load="1e-12" - if clk_load=="": clk_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - schematicInfo.append(".model "+ compName+" d_srff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+sr_load="+sr_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") - elif compType=="d_jkff": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+words[7]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* JK Flip-Flop "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for JK Flip-Flop "+compName - clk_delay=raw_input(' Enter clk delay (default=1e-12): ') - set_delay=raw_input(' Enter set delay (default=1e-12): ') - reset_delay=raw_input(' Enter reset delay (default=1e-12): ') - ic=raw_input(' Enter initial condition on output (default=0): ') - jk_load=raw_input(' Enter input to j-k load (default=1e-12): ') - clk_load=raw_input(' Enter clk load (default=1e-12): ') - set_load=raw_input(' Enter set load (default=1e-12): ') - reset_load=raw_input(' Enter reset load (default=1e-12): ') - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - print "-----------------------------------------------------------" - if clk_delay=="": clk_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if jk_load=="": jk_load="1e-12" - if clk_load=="": clk_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - schematicInfo.append(".model "+ compName+" d_jkff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+jk_load="+jk_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") - elif compType=="d_dff": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* D Flip-Flop "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for D Flip-Flop "+compName - clk_delay=raw_input(' Enter clk delay (default=1e-12): ') - set_delay=raw_input(' Enter set delay (default=1e-12): ') - reset_delay=raw_input(' Enter reset delay (default=1e-12): ') - ic=raw_input(' Enter initial condition on output (default=0): ') - data_load=raw_input(' Enter input to data load (default=1e-12): ') - clk_load=raw_input(' Enter clk load (default=1e-12): ') - set_load=raw_input(' Enter set load (default=1e-12): ') - reset_load=raw_input(' Enter reset load (default=1e-12): ') - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - print "-----------------------------------------------------------" - if clk_delay=="": clk_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if data_load=="": data_load="1e-12" - if clk_load=="": clk_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - schematicInfo.append(".model "+ compName+" d_dff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+data_load="+data_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") - elif compType=="d_tff": - schematicInfo.append("a"+str(k)+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]+" "+words[5]+" "+words[6]+" "+compName) - k=k+1 - schematicInfo.insert(index,"* T Flip-Flop "+compType) - print "-----------------------------------------------------------\n" - print "Add parameters for T Flip-Flip "+compName - clk_delay=raw_input(' Enter clk delay (default=1e-12): ') - set_delay=raw_input(' Enter set delay (default=1e-12): ') - reset_delay=raw_input(' Enter reset delay (default=1e-12): ') - ic=raw_input(' Enter initial condition on output (default=0): ') - t_load=raw_input(' Enter input to t load (default=1e-12): ') - clk_load=raw_input(' Enter clk load (default=1e-12): ') - set_load=raw_input(' Enter set load (default=1e-12): ') - reset_load=raw_input(' Enter reset load (default=1e-12): ') - rise_delay=raw_input(' Enter rise delay (default=1e-12): ') - fall_delay=raw_input(' Enter fall delay (default=1e-12): ') - print "-----------------------------------------------------------" - if t_delay=="": t_delay="1e-12" - if enable_delay=="": enable_delay="1e-12" - if set_delay=="": set_delay="1e-12" - if reset_delay=="": reset_delay="1e-12" - if ic=="": ic="0" - if t_load=="": t_load="1e-12" - if enable_load=="": enable_load="1e-12" - if set_load=="": set_load="1e-12" - if reset_load=="": reset_load="1e-12" - if rise_delay=="": rise_delay="1e-12" - if fall_delay=="": fall_delay="1e-12" - schematicInfo.append(".model "+ compName+" d_tff(rise_delay="+rise_delay+" fall_delay="+fall_delay+" ic="+ic+"\n+t_load="+t_load+" clk_load="+clk_load+" set_load="+set_load+" reset_load="+reset_load+"\n+clk_delay="+clk_delay+" set_delay="+set_delay+" reset_delay="+reset_delay+")") - elif compType=="vplot1": - outputOption.append("plot v("+words[1]+")\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vplot8_1": - outputOption.append("plot ") - for i in range(1,len(words)-1): - outputOption.append("v("+words[i]+") ") - outputOption.append("\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vprint1": - outputOption.append("print v("+words[1]+")\n") - schematicInfo.insert(index,"* Printing option "+compType) - elif compType=="vprint8_1": - outputOption.append("print ") - for i in range(1,len(words)-1): - outputOption.append("v("+words[i]+") ") - outputOption.append("\n") - schematicInfo.insert(index,"* Printing option "+compType) - elif compType=="vplot": - outputOption.append("plot v("+words[1]+")-v("+words[2]+")\n") - schematicInfo.insert(index,"* Plotting option "+compType) - elif compType=="vplot8": - outputOption.append("plot ") - for i in range(0,len(words)/2-1): - if words[i+1]=="0": - outputOption.append("-v("+words[i+len(words)/2]+") ") - elif words[i+len(words)/2]=="0": - outputOption.append("v("+words[i+1]+") ") - else: - outputOption.append("v("+words[i+1]+")-v("+words[i+len(words)/2]+") ") - outputOption.append("\n") - elif compType=="vprint": - outputOption.append("print v("+words[1]+")-v("+words[2]+")\n") - schematicInfo.insert(index,"* Printting option "+compType) - elif compType=="iplot": - schematicInfo.insert(index,"V_"+words[0]+" "+words[1]+" "+words[2]+" 0") - outputOption.append("plot i(V_"+words[0]+")\n") - elif compType=="ic": - print "-----------------------------------------------------------" - ic=raw_input(' Enter initial condition on output (default=0): ') - print "-----------------------------------------------------------" - if ic=="": ic="0" - schematicInfo.insert(index,".ic v("+words[1]+")="+ic) - elif compType=="transfo": - schematicInfo.append("a"+str(k)+" ("+words[1]+" "+words[2]+") (2mmf "+words[2]+") primary") - k=k+1 - print "-----------------------------------------------------------\n" - print "Add parameters for primary " - num_turns=raw_input(' Enter the number of turns in primary (default=310): ') - print "-----------------------------------------------------------\n" - if num_turns=="": num_turns="310" - schematicInfo.append(".model primary lcouple (num_turns = "+num_turns+ ")") - schematicInfo.append("a"+str(k)+" (2mmf 3mmf) iron_core") - k=k+1 - print "-----------------------------------------------------------\n" - inp1=raw_input(' Do you want to populate the B-H table?y/n (if n, default values will be used): ') - if inp1=='y' or inp1=='Y': - print "Enter the values in the H, B table to construct B-H curve " - inp="y" - h_array= "H_array = [ " - b_array = "B_array = [ " - while inp=="y": - h1=raw_input(' Enter H value: ') - h_array = h_array+ h1+" " - b1=raw_input(' Enter corresponding B value: ') - b_array = b_array+ b1+" " - inp=raw_input(' Do you want to continue(y/n): ') - modelline = h_array+" ] " + b_array+" ]" - else: - modelline = "H_array = [-1000 -500 -375 -250 -188 -125 -63 0 63 125 188 250 375 500 1000] B_array = [-3.13e-3 -2.63e-3 -2.33e-3 -1.93e-3 -1.5e-3 -6.25e-4 -2.5e-4 0 2.5e-4 6.25e-4 1.5e-3 1.93e-3 2.33e-3 2.63e-3 3.13e-3]" - area =raw_input( 'Enter the cross-sectional area of the core: (default = 1)') - length =raw_input( 'Enter the core length: (default = 0.01)') - print "----------------------------------------------\n" - if area=="": area="1" - if length=="":length="0.01" - schematicInfo.append(".model iron_core core ("+modelline+" area = "+area+" length = "+length +")") - schematicInfo.append("a"+str(k)+" ("+words[4]+" "+words[3]+") (3mmf "+words[3]+") secondary") - k=k+1 - print "-----------------------------------------------------------\n" - print "Add parameters for secondary " - num_turns2=raw_input(' Enter the number of turns in secondary (default=620): ') - print "-----------------------------------------------------------\n" - if num_turns2=="": num_turns2="620" - schematicInfo.append(".model secondary lcouple (num_turns = "+num_turns2+ ")") - else: - schematicInfo.insert(index,compline) - # Update option information - return schematicInfo,outputOption - -# Accept input file name from user if not provided -if len(sys.argv) < 2: - filename=raw_input('Enter file name: ') -else: - filename=sys.argv[1] - -if len(sys.argv) < 3: - finalNetlist=int(raw_input('Do you want to create final file: ')) -else: - finalNetlist=int(sys.argv[2]) - -print "==================================" -print "Kicad to Ngspice netlist converter " -print "==================================" -print "converting "+filename - -# Read the netlist -lines=readNetlist(filename) - -# Construct parameter information -param=readParamInfo(lines) - -# Replace parameter with values -netlist, infoline=preprocessNetlist(lines,param) - -# Separate option and schematic information -optionInfo, schematicInfo=separateNetlistInfo(netlist) - -if finalNetlist: - # Insert analysis from file - optionInfo=addAnalysis(optionInfo) - -# Find the analysis option -analysisOption=[] -outputOption=[] -initialCondOption=[] -simulatorOption=[] -includeOption=[] -model=[] - -for eachline in optionInfo: - words=eachline.split() - option=words[0] - if (option=='.ac' or option=='.dc' or - option=='.disto' or option=='.noise' or - option=='.op' or option=='.pz' or - option=='.sens' or option=='.tf' or - option=='.tran'): - analysisOption.append(eachline+'\n') - print eachline - elif (option=='.save' or option=='.print' or - option=='.plot' or option=='.four'): - eachline=eachline.strip('.') - outputOption.append(eachline+'\n') - elif (option=='.nodeset' or option=='.ic'): - initialCondOption.append(eachline+'\n') - elif option=='.option': - simulatorOption.append(eachline+'\n') - elif (option=='.include' or option=='.lib'): - includeOption.append(eachline+'\n') - elif (option=='.model'): - model.append(eachline+'\n') - elif option=='.end': - continue; - -# Find the various model library required -modelList=[] -subcktList=[] -for eachline in schematicInfo: - words=eachline.split() - if eachline[0]=='d': - modelName=words[3] - if modelName in modelList: - continue - modelList.append(modelName) - elif eachline[0]=='q': - modelName=words[4] - index=schematicInfo.index(eachline) - schematicInfo.remove(eachline) - schematicInfo.insert(index,words[0]+" "+words[3]+" "+words[2]+" "+words[1]+" "+words[4]) - if modelName in modelList: - continue - modelList.append(modelName) - elif eachline[0]=='m': - modelName=words[4] - index=schematicInfo.index(eachline) - schematicInfo.remove(eachline) - width=raw_input(' Enter width of mosfet '+words[0]+'(default=100u):') - length=raw_input(' Enter length of mosfet '+words[0]+'(default=5u):') - multiplicative_factor=raw_input(' Enter multiplicative factor of mosfet '+words[0]+'(default=1):') - AD=raw_input(' Enter drain area, AD of mosfet '+words[0]+'(default=5*(L/2)*W): ') - AS=raw_input(' Enter source area, AS of mosfet '+words[0]+'(default=5*(L/2)*W): ') - PD=raw_input(' Enter drain perimeter, PD of mosfet '+words[0]+'(default=2*W+10*L/2): ') - PS=raw_input(' Enter source perimeter, PS of mosfet '+words[0]+'(default=2*W+10*L/2): ') - if width=="": width="0.0001" - if multiplicative_factor=="": multiplicative_factor="1" - if length=="": length="0.000005" - if PD=="": PD = 2*float(width)+10*float(length)/2 - if PS=="": PS = 2*float(width)+10*float(length)/2 - if AD=="": AD = 5*(float(length)/2)*float(width) - if AS=="": AS = 5*(float(length)/2)*float(width) - - schematicInfo.insert(index,words[0]+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[3]+" "+words[4]+" "+'M='+multiplicative_factor+" "+'L='+length+" "+'W='+width+" "+'PD='+str(PD)+" "+'PS='+str(PS)+" "+'AD='+str(AD)+" "+'AS='+str(AS)) - if modelName in modelList: - continue - modelList.append(modelName) - elif eachline[0]=='j': - modelName=words[4] - index=schematicInfo.index(eachline) - schematicInfo.remove(eachline) - schematicInfo.insert(index,words[0]+" "+words[1]+" "+words[2]+" "+words[3]+" "+words[4]) - if modelName in modelList: - continue - modelList.append(modelName) - elif eachline[0]=='x': - subcktName=words[len(words)-1] - if subcktName in subcktList: - continue - subcktList.append(subcktName) - -# Find current through components -schematicInfo,outputOption=findCurrent(schematicInfo,outputOption) - -# Add parameter to sources -schematicInfo=insertSpecialSourceParam(schematicInfo) - -schematicInfo,outputOption=convertICintoBasicBlocks(schematicInfo,outputOption) - -# Add newline in the schematic information -for i in range(len(schematicInfo),0,-1): - schematicInfo.insert(i,'\n') - -outfile=filename+".out" -cktfile=filename+".ckt" -out=open(outfile,"w") -ckt=open(cktfile,"w") -out.writelines(infoline) -out.writelines('\n') -ckt.writelines(infoline) -ckt.writelines('\n') - -for modelName in modelList: - if os.path.exists(modelName+".lib"): - out.writelines('.include '+modelName+'.lib\n') - ckt.writelines('.include '+modelName+'.lib\n') - -for subcktName in subcktList: - out.writelines('.include '+subcktName+'.sub\n') - ckt.writelines('.include '+subcktName+'.sub\n') - -if finalNetlist: - sections=[simulatorOption, initialCondOption, schematicInfo, analysisOption] -else: - sections=[simulatorOption, initialCondOption, schematicInfo] -for section in sections: - if len(section) == 0: - continue - else: - out.writelines('\n') - out.writelines(section) - ckt.writelines('\n') - ckt.writelines(section) - -if finalNetlist: - out.writelines('\n* Control Statements \n') - out.writelines('.control\n') - out.writelines('run\n') - out.writelines(outputOption) - outputOption1=[] - for option in outputOption: - if (("plot" in option) or ("print" in option)): - outputOption1.append("."+option) - else: - outputOption1.append(option) - ckt.writelines(outputOption1) - out.writelines('.endc\n') - out.writelines('.end\n') - ckt.writelines('.end\n') - -out.close() -ckt.close() - -print "The ngspice netlist has been written in "+filename+".out" -print "The scilab netlist has been written in "+filename+".ckt" -dummy=raw_input('Press Enter to quit') diff --git a/OSCAD/library/analogSpice.bak b/OSCAD/library/analogSpice.bak deleted file mode 100644 index 302e12e..0000000 --- a/OSCAD/library/analogSpice.bak +++ /dev/null @@ -1,185 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 19 October 2012 06:30:49 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# CP -# -DEF CP C 0 10 N N 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "CP" 50 -100 50 H V L CNN -ALIAS CAPAPOL -$FPLIST - CP* - SM* -$ENDFPLIST -DRAW -P 4 0 1 8 -100 50 -100 -50 100 -50 100 50 N -P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F -X ~ 1 0 200 150 D 40 40 1 1 P -X ~ 2 0 -200 150 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# INDUCTOR -# -DEF INDUCTOR L 0 40 N N 1 F N -F0 "L" -50 0 40 V V C CNN -F1 "INDUCTOR" 100 0 40 V V C CNN -DRAW -A 0 -150 50 -889 889 0 1 0 N 1 -199 1 -100 -A 0 -49 51 -889 889 0 1 0 N 1 -99 1 2 -A 0 51 51 -889 889 0 1 0 N 1 1 1 102 -A 0 148 48 -889 889 0 1 0 N 1 101 1 196 -X 1 1 0 300 100 D 70 70 1 1 P -X 2 2 0 -300 100 U 70 70 1 1 P -ENDDRAW -ENDDEF -# -# MOS_N -# -DEF MOS_N M 0 0 N Y 1 F N -F0 "M" 10 170 60 H V R CNN -F1 "MOS_N" 10 -150 60 H V R CNN -ALIAS MOSFET_N -DRAW -P 2 0 1 8 -50 -100 -50 100 N -P 2 0 1 10 0 -150 0 150 N -P 2 0 1 0 100 -100 0 -100 N -P 2 0 1 0 100 100 0 100 N -P 3 0 1 8 100 -100 100 0 50 0 N -P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N -X D D 100 200 100 D 40 40 1 1 P -X G G -200 0 150 R 40 40 1 1 I -X S S 100 -200 100 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# MOS_P -# -DEF MOS_P M 0 40 Y N 1 F N -F0 "M" 0 190 60 H V R CNN -F1 "MOS_P" 0 -180 60 H V R CNN -ALIAS MOSFET_P -DRAW -P 2 0 1 8 -50 -100 -50 100 N -P 2 0 1 10 0 -150 0 150 N -P 2 0 1 8 30 0 0 0 N -P 2 0 1 0 100 -100 0 -100 N -P 2 0 1 0 100 100 0 100 N -P 3 0 1 0 80 0 100 0 100 -100 N -P 5 0 1 8 30 40 30 -30 80 0 30 40 30 40 N -X D D 100 200 100 D 40 40 1 1 P -X G G -200 0 150 R 40 40 1 1 I -X S S 100 -200 100 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# Port -# -DEF Port U 0 0 N Y 8 F N -F0 "U" -20 -50 30 H V C CNN -F1 "Port" 0 0 30 H V C CNN -DRAW -A -425 -475 708 478 421 0 1 0 N 50 50 100 0 -A -225 275 426 -497 -402 0 1 0 N 50 -50 100 0 -S -50 50 50 -50 0 1 0 N -X p 1 200 0 100 L 30 30 1 1 B -X p 1 200 0 100 L 30 30 2 1 B -X p 1 200 0 100 L 30 30 3 1 B -X p 1 200 0 100 L 30 30 4 1 B -X p 1 200 0 100 L 30 30 5 1 B -X p 1 200 0 100 L 30 30 6 1 B -X p 1 200 0 100 L 30 30 7 1 B -X p 1 200 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/library/analogSpice.bck b/OSCAD/library/analogSpice.bck deleted file mode 100644 index c1326b4..0000000 --- a/OSCAD/library/analogSpice.bck +++ /dev/null @@ -1,50 +0,0 @@ -EESchema-DOCLIB Version 2.0 Date: Friday 19 October 2012 06:30:49 PM IST -# -$CMP CAPAPOL -D Condensateur polarise -$ENDCMP -# -$CMP CP -D Condensateur polarise -$ENDCMP -# -$CMP DIODE -D Diode simple -K DEV DIODE -$ENDCMP -# -$CMP MOS_N -F transistors/mos/*.* -$ENDCMP -# -$CMP MOS_P -F transistors/mos/*.* -$ENDCMP -# -$CMP MOSFET_N -F transistors/mos/*.* -$ENDCMP -# -$CMP MOSFET_P -F transistors/mos/*.* -$ENDCMP -# -$CMP NPN -F transistors/bipolar/*.* -$ENDCMP -# -$CMP PNP -F transistors/bipolar/*.* -$ENDCMP -# -$CMP Port -D Port Connection -K U port -$ENDCMP -# -$CMP R -D Resistance -K R DEV -$ENDCMP -# -#End Doc Library diff --git a/OSCAD/library/analogSpice.dcm b/OSCAD/library/analogSpice.dcm deleted file mode 100644 index a409fcd..0000000 --- a/OSCAD/library/analogSpice.dcm +++ /dev/null @@ -1,45 +0,0 @@ -EESchema-DOCLIB Version 2.0 Date: Saturday 20 October 2012 08:45:14 PM IST -# -$CMP CAPAPOL -D Condensateur polarise -$ENDCMP -# -$CMP CP -D Condensateur polarise -$ENDCMP -# -$CMP DIODE -D Diode simple -K DEV DIODE -$ENDCMP -# -$CMP MOS_N -F transistors/mos/*.* -$ENDCMP -# -$CMP MOS_P -F transistors/mos/*.* -$ENDCMP -# -$CMP MOSFET_N -F transistors/mos/*.* -$ENDCMP -# -$CMP MOSFET_P -F transistors/mos/*.* -$ENDCMP -# -$CMP NPN -F transistors/bipolar/*.* -$ENDCMP -# -$CMP PNP -F transistors/bipolar/*.* -$ENDCMP -# -$CMP R -D Resistance -K R DEV -$ENDCMP -# -#End Doc Library diff --git a/OSCAD/library/analogSpice.lib b/OSCAD/library/analogSpice.lib deleted file mode 100644 index 881d349..0000000 --- a/OSCAD/library/analogSpice.lib +++ /dev/null @@ -1,165 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Saturday 20 October 2012 08:45:14 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# CP -# -DEF CP C 0 10 N N 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "CP" 50 -100 50 H V L CNN -ALIAS CAPAPOL -$FPLIST - CP* - SM* -$ENDFPLIST -DRAW -P 4 0 1 8 -100 50 -100 -50 100 -50 100 50 N -P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F -X ~ 1 0 200 150 D 40 40 1 1 P -X ~ 2 0 -200 150 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# INDUCTOR -# -DEF INDUCTOR L 0 40 N N 1 F N -F0 "L" -50 0 40 V V C CNN -F1 "INDUCTOR" 100 0 40 V V C CNN -DRAW -A 0 -150 50 -889 889 0 1 0 N 1 -199 1 -100 -A 0 -49 51 -889 889 0 1 0 N 1 -99 1 2 -A 0 51 51 -889 889 0 1 0 N 1 1 1 102 -A 0 148 48 -889 889 0 1 0 N 1 101 1 196 -X 1 1 0 300 100 D 70 70 1 1 P -X 2 2 0 -300 100 U 70 70 1 1 P -ENDDRAW -ENDDEF -# -# MOS_N -# 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-# -# 74HCT04 -# -DEF 74HCT04 U 0 30 Y Y 6 F N -F0 "U" 150 100 40 H V C CNN -F1 "74HCT04" 200 -100 40 H V C CNN -ALIAS 74HC14 74HC04 74LS14 -DRAW -P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N -X GND 7 -50 -100 0 U 30 20 0 0 W N -X VCC 14 -50 100 0 D 30 20 0 0 W N -X ~ 1 -450 0 300 R 60 60 1 1 I -X ~ 2 450 0 300 L 60 60 1 1 O I -X ~ 3 -450 0 300 R 60 60 2 1 I -X ~ 4 450 0 300 L 60 60 2 1 O I -X ~ 5 -450 0 300 R 60 60 3 1 I -X ~ 6 450 0 300 L 60 60 3 1 O I -X ~ 8 450 0 300 L 60 60 4 1 O I -X ~ 9 -450 0 300 R 60 60 4 1 I -X ~ 10 450 0 300 L 60 60 5 1 O I -X ~ 11 -450 0 300 R 60 60 5 1 I -X ~ 12 450 0 300 L 60 60 6 1 O I -X ~ 13 -450 0 300 R 60 60 6 1 I -X ~ 1 -450 0 300 R 60 60 1 2 I I -X ~ 2 450 0 300 L 60 60 1 2 O -X ~ 3 -450 0 300 R 60 60 2 2 I I -X ~ 4 450 0 300 L 60 60 2 2 O -X ~ 5 -450 0 300 R 60 60 3 2 I I -X ~ 6 450 0 300 L 60 60 3 2 O -X ~ 8 450 0 300 L 60 60 4 2 O -X ~ 9 -450 0 300 R 60 60 4 2 I I -X ~ 10 450 0 300 L 60 60 5 2 O -X ~ 11 -450 0 300 R 60 60 5 2 I I -X ~ 12 450 0 300 L 60 60 6 2 O -X ~ 13 -450 0 300 R 60 60 6 2 I I -ENDDRAW -ENDDEF -# -# 74LS00 -# -DEF 74LS00 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS00" 0 -100 60 H V C CNN -ALIAS 74LS37 7400 74HCT00 74HC00 -$FPLIST - 14DIP300* - SO14* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O I -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O I -X ~ 8 600 0 300 L 60 60 3 1 O I -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O I -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 -A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 -A -10 -141 340 244 883 0 2 0 N 300 0 0 200 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O -X ~ 8 600 0 300 L 60 60 3 2 O -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS02 -# -DEF 74LS02 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS02" 50 -50 60 H V C CNN -ALIAS 74HC02 74HCT02 7402 74LS28 -$FPLIST - SO14* - 14DIP* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 -A -1 -127 327 898 228 0 1 8 N 0 200 300 0 -A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 -P 2 0 1 8 -300 -200 0 -200 N -P 2 0 1 8 -300 200 0 200 N -X ~ 1 600 0 300 L 60 60 1 1 O I -X ~ 2 -600 100 370 R 60 60 1 1 I -X ~ 3 -600 -100 370 R 60 60 1 1 I -X ~ 4 600 0 300 L 60 60 2 1 O I -X ~ 5 -600 100 370 R 60 60 2 1 I -X ~ 6 -600 -100 370 R 60 60 2 1 I -X ~ 8 -600 100 370 R 60 60 3 1 I -X ~ 9 -600 -100 370 R 60 60 3 1 I -X ~ 10 600 0 300 L 60 60 3 1 O I -X ~ 11 -600 100 370 R 60 60 4 1 I -X ~ 12 -600 -100 370 R 60 60 4 1 I -X ~ 13 600 0 300 L 60 60 4 1 O I -A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 -P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 600 0 300 L 60 60 1 2 O -X ~ 2 -600 100 300 R 60 60 1 2 I I -X ~ 3 -600 -100 300 R 60 60 1 2 I I -X ~ 4 600 0 300 L 60 60 2 2 O -X ~ 5 -600 100 300 R 60 60 2 2 I I -X ~ 6 -600 -100 300 R 60 60 2 2 I I -X ~ 8 -600 100 300 R 60 60 3 2 I I -X ~ 9 -600 -100 300 R 60 60 3 2 I I -X ~ 10 600 0 300 L 60 60 3 2 O -X ~ 11 -600 100 300 R 60 60 4 2 I I -X ~ 12 -600 -100 300 R 60 60 4 2 I I -X ~ 13 600 0 300 L 60 60 4 2 O -ENDDRAW -ENDDEF -# -# 74LS08 -# -DEF 74LS08 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS08" 0 -50 60 H V C CNN -ALIAS 74LS09 -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 U 40 40 0 0 W N -A 100 0 200 896 -896 0 1 0 N 101 200 101 -199 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O -X ~ 8 600 0 300 L 60 60 3 1 O -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -470 0 262 495 -495 0 2 0 N -300 199 -300 -198 -A -2 126 326 -897 -225 0 2 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 2 0 N 2 200 300 0 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O I -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O I -X ~ 8 600 0 300 L 60 60 3 2 O I -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O I -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS107 -# -DEF 74LS107 U 0 30 Y Y 2 F N -F0 "U" 0 100 60 H V C CNN -F1 "74LS107" 0 -100 60 H V C CNN -DRAW -S -350 -400 350 400 0 0 0 N -X GND 7 -250 -400 0 U 60 60 0 0 W N -X VCC 14 -250 400 0 U 60 60 0 0 W N -X J 1 -650 250 300 R 60 60 1 1 I -X ~Q 2 650 -250 300 L 60 60 1 1 O I -X Q 3 650 250 300 L 60 60 1 1 O -X K 4 -650 -250 300 R 60 60 1 1 I -X Cp 12 -650 0 300 R 60 60 1 1 I IC -X Cd 13 0 -700 300 U 60 60 1 1 I I -X Q 5 650 250 300 L 60 60 2 1 O -X ~Q 6 650 -250 300 L 60 60 2 1 O I -X J 8 -650 250 300 R 60 60 2 1 I -X Cp 9 -650 0 300 R 60 60 2 1 I IC -X Cd 10 0 -700 300 U 60 60 2 1 I I -X K 11 -650 -250 300 R 60 60 2 1 I -ENDDRAW -ENDDEF -# -# 74LS109 -# -DEF 74LS109 U 0 30 Y Y 2 F N -F0 "U" 0 100 60 H V C CNN -F1 "74LS109" 0 -100 60 H V C CNN -DRAW -S -350 -400 350 400 0 0 0 N -X GND 8 -250 -400 0 U 60 60 0 0 W N -X VCC 16 -250 400 0 U 60 60 0 0 W N -X Q 6 650 250 300 L 60 60 0 1 O -X Cd 1 0 -700 300 U 60 60 1 1 I I -X J 2 -650 250 300 R 60 60 1 1 I -X K 3 -650 -250 300 R 60 60 1 1 I I -X Cp 4 -650 0 300 R 60 60 1 1 I C -X Sd 5 0 700 300 D 60 60 1 1 I I -X ~Q 7 650 -250 300 L 60 60 1 1 O I -X ~Q 9 750 -250 400 L 60 60 2 1 I I -X Q 10 750 250 400 L 60 60 2 1 I -X Sd 11 0 800 400 D 60 60 2 1 I I -X Cp 12 -750 0 400 R 60 60 2 1 I C -X K 13 -750 -250 400 R 60 60 2 1 I I -X J 14 -750 250 400 R 60 60 2 1 I -X Cd 15 0 -800 400 U 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# 74LS112 -# -DEF 74LS112 U 0 30 Y Y 2 F N -F0 "U" 0 100 60 H V C CNN -F1 "74LS112" 0 -100 60 H V C CNN -DRAW -S -350 -400 350 400 0 0 0 N -X GND 8 -250 -400 0 U 60 60 0 0 W N -X VCC 16 -250 400 0 U 60 60 0 0 W N -X Cp 1 -650 0 300 R 60 60 1 1 I IC -X K 2 -650 -250 300 R 60 60 1 1 I -X J 3 -650 250 300 R 60 60 1 1 I -X Sd 4 0 700 300 D 60 60 1 1 I I -X Q 5 650 250 300 L 60 60 1 1 O -X ~Q 6 650 -250 300 L 60 60 1 1 O I -X Cd 15 0 -700 300 U 60 60 1 1 I I -X ~Q 7 650 -250 300 L 60 60 2 1 O I -X Q 9 650 250 300 L 60 60 2 1 O -X Sd 10 0 700 300 D 60 60 2 1 I I -X J 11 -650 250 300 R 60 60 2 1 I -X K 12 -650 -250 300 R 60 60 2 1 I -X Cp 13 -650 0 300 R 60 60 2 1 I IC -X Cd 14 0 -800 300 U 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# 74LS114 -# -DEF 74LS114 U 0 10 Y Y 2 F N -F0 "U" 0 100 60 H V C CNN -F1 "74LS114" 0 -100 60 H V C CNN -DRAW -S -350 -400 350 400 0 0 0 N -X GND 7 -250 -400 0 U 60 60 0 0 W N -X VCC 14 -250 400 0 U 60 60 0 0 W N -X ~ 1 0 -700 300 U 60 60 0 1 I I -X Cp 1 -650 0 300 R 60 60 1 1 I I -X K 2 -650 -250 300 R 60 60 1 1 I -X J 3 -650 250 300 R 60 60 1 1 I -X Sd 4 0 700 300 D 60 60 1 1 I I -X Q 5 650 250 300 L 60 60 1 1 O -X ~Q 6 650 -250 300 L 60 60 1 1 O I -X ~Q 8 650 -250 300 L 60 60 2 1 I I -X Q 9 650 250 300 L 60 60 2 1 I -X Sd 10 0 800 300 D 60 60 2 1 I I -X J 11 -650 250 300 R 60 60 2 1 I -X K 12 -650 -250 300 R 60 60 2 1 I -X Cp 13 -650 0 300 R 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# 74LS32 -# -DEF 74LS32 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS32" 0 -50 60 H V C CNN -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 U 40 40 0 0 W N -A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 -A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 1 0 N 2 200 300 0 -P 2 0 1 0 -300 -200 0 -200 N -P 2 0 1 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 1 I -X ~ 2 -600 -100 370 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O -X ~ 4 -600 100 370 R 60 60 2 1 I -X ~ 5 -600 -100 370 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O -X ~ 8 600 0 300 L 60 60 3 1 O -X ~ 9 -600 100 370 R 60 60 3 1 I -X ~ 10 -600 -100 370 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O -X ~ 12 -600 100 370 R 60 60 4 1 I -X ~ 13 -600 -100 370 R 60 60 4 1 I -A 100 0 200 896 -896 0 2 0 N 101 200 101 -199 -P 4 0 2 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 2 I I -X ~ 2 -600 -100 300 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O I -X ~ 4 -600 100 300 R 60 60 2 2 I I -X ~ 5 -600 -100 300 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O I -X ~ 8 600 0 300 L 60 60 3 2 O I -X ~ 9 -600 100 300 R 60 60 3 2 I I -X ~ 10 -600 -100 300 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O I -X ~ 12 -600 100 300 R 60 60 4 2 I I -X ~ 13 -600 -100 300 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS74 -# -DEF 74LS74 U 0 40 Y Y 2 F N -F0 "U" 150 300 60 H V C CNN -F1 "74LS74" 300 -295 60 H V C CNN -ALIAS 74HC74 -DRAW -X GND 7 -200 -250 0 U 30 30 0 0 W N -X VCC 14 -200 250 0 D 30 30 0 0 W N -S -300 250 300 -250 0 1 0 N -X Cd 1 0 -550 300 U 60 60 1 1 I I -X D 2 -600 200 300 R 60 60 1 1 I -X Cp 3 -600 0 300 R 60 60 1 1 I C -X Sd 4 0 550 300 D 60 60 1 1 I I -X Q 5 600 200 300 L 60 60 1 1 O -X ~Q 6 600 -200 300 L 60 60 1 1 O I -X ~Q 8 600 -200 300 L 60 60 2 1 O I -X Q 9 600 200 300 L 60 60 2 1 O -X Sd 10 0 550 300 D 60 60 2 1 I I -X Cp 11 -600 0 300 R 60 60 2 1 I C -X D 12 -600 200 300 R 60 60 2 1 I -X Cd 13 0 -550 300 U 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# 74LS86 -# -DEF 74LS86 U 0 30 Y N 4 F N -F0 "U" 50 50 50 H V C CNN -F1 "74LS86" 50 -50 40 H V C CNN -ALIAS 74HC86 -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 -A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 -A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 1 0 N 2 200 300 0 -P 2 0 1 0 -200 -200 0 -200 N -P 2 0 1 0 -200 200 0 200 N -X IN1 1 -600 100 370 R 60 60 1 1 I -X IN2 2 -600 -100 370 R 60 60 1 1 I -X OUT 3 600 0 300 L 60 60 1 1 O -X IN1 4 -600 100 370 R 60 60 2 1 I -X IN2 5 -600 -100 370 R 60 60 2 1 I -X OUT 6 600 0 300 L 60 60 2 1 O -X OUT 8 600 0 300 L 60 60 3 1 O -X IN1 9 -600 100 370 R 60 60 3 1 I -X IN2 10 -600 -100 370 R 60 60 3 1 I -X OUT 11 600 0 300 L 60 60 4 1 O -X IN1 12 -600 100 370 R 60 60 4 1 I -X IN2 13 -600 -100 370 R 60 60 4 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/library/digitalSpice.bck b/OSCAD/library/digitalSpice.bck deleted file mode 100644 index 04a33bc..0000000 --- a/OSCAD/library/digitalSpice.bck +++ /dev/null @@ -1,96 +0,0 @@ -EESchema-DOCLIB Version 2.0 Date: Tuesday 09 October 2012 08:20:22 PM IST -# -$CMP 7402 -D Quad Nor2 -K TTL Nor2 -$ENDCMP -# -$CMP 74HC02 -D Quad Nor2 -K HCMOS Nor2 -$ENDCMP -# -$CMP 74HC04 -D Hex Inverseur -K HCMOS not inv -$ENDCMP -# -$CMP 74HC74 -D Dual D FlipFlop, Set & Reset -K TTL DFF -F 74xx/74hc_hct74.pdf -$ENDCMP -# -$CMP 74HCT02 -D Quad Nor2 -K HCTMOS Nor2 -$ENDCMP -# -$CMP 74HCT04 -D Hex Inverseur -K HCTMOS not inv -$ENDCMP -# -$CMP 74LS02 -D Quad Nor2 -K TTL Nor2 -$ENDCMP -# -$CMP 74LS08 -D Quad And2 -K TTL and2 -$ENDCMP -# -$CMP 74LS09 -D Quad And2 Open Collect -K TTL and2 OpenCol -$ENDCMP -# -$CMP 74LS107 -D Double JK FlipFlop, reset -K TTL JK -$ENDCMP -# -$CMP 74LS109 -D Double JK FlipFlop, Set & Reset -K TTL JK -$ENDCMP -# -$CMP 74LS112 -D Double JK FlipFlop, Set & Reset -K TTL JK -$ENDCMP -# -$CMP 74LS114 -D Double JK, common Clock & Reset, Set -K TTL JK -$ENDCMP -# -$CMP 74LS14 -D Hex inverseur schmitt trigger -K TTL not inv -$ENDCMP -# -$CMP 74LS28 -D Quad Buffer Nor2 -K TTL Nor2 Buffer -$ENDCMP -# -$CMP 74LS32 -D Quad Or 2 inputs -K TTL Or2 -$ENDCMP -# -$CMP 74LS74 -D Dual D FlipFlop, Set & Reset -K TTL DFF -F 74xx/74hc_hct74.pdf -$ENDCMP -# -$CMP 74LS86 -D Quad XOR 2 inputs -K TTL XOR2 -F 74xx/74ls86.pdf -$ENDCMP -# -#End Doc Library diff --git a/OSCAD/library/digitalSpice.dcm b/OSCAD/library/digitalSpice.dcm deleted file mode 100644 index 2f348b5..0000000 --- a/OSCAD/library/digitalSpice.dcm +++ /dev/null @@ -1,96 +0,0 @@ -EESchema-DOCLIB Version 2.0 Date: Monday 22 October 2012 05:14:04 PM IST -# -$CMP 7402 -D Quad Nor2 -K TTL Nor2 -$ENDCMP -# -$CMP 74HC02 -D Quad Nor2 -K HCMOS Nor2 -$ENDCMP -# -$CMP 74HC04 -D Hex Inverseur -K HCMOS not inv -$ENDCMP -# -$CMP 74HC74 -D Dual D FlipFlop, Set & Reset -K TTL DFF -F 74xx/74hc_hct74.pdf -$ENDCMP -# -$CMP 74HCT02 -D Quad Nor2 -K HCTMOS Nor2 -$ENDCMP -# -$CMP 74HCT04 -D Hex Inverseur -K HCTMOS not inv -$ENDCMP -# -$CMP 74LS02 -D Quad Nor2 -K TTL Nor2 -$ENDCMP -# -$CMP 74LS08 -D Quad And2 -K TTL and2 -$ENDCMP -# -$CMP 74LS09 -D Quad And2 Open Collect -K TTL and2 OpenCol -$ENDCMP -# -$CMP 74LS107 -D Double JK FlipFlop, reset -K TTL JK -$ENDCMP -# -$CMP 74LS109 -D Double JK FlipFlop, Set & Reset -K TTL JK -$ENDCMP -# -$CMP 74LS112 -D Double JK FlipFlop, Set & Reset -K TTL JK -$ENDCMP -# -$CMP 74LS114 -D Double JK, common Clock & Reset, Set -K TTL JK -$ENDCMP -# -$CMP 74LS14 -D Hex inverseur schmitt trigger -K TTL not inv -$ENDCMP -# -$CMP 74LS28 -D Quad Buffer Nor2 -K TTL Nor2 Buffer -$ENDCMP -# -$CMP 74LS32 -D Quad Or 2 inputs -K TTL Or2 -$ENDCMP -# -$CMP 74LS74 -D Dual D FlipFlop, Set & Reset -K TTL DFF -F 74xx/74hc_hct74.pdf -$ENDCMP -# -$CMP 74LS86 -D Quad XOR 2 inputs -K TTL XOR2 -F 74xx/74ls86.pdf -$ENDCMP -# -#End Doc Library diff --git a/OSCAD/library/digitalSpice.lib b/OSCAD/library/digitalSpice.lib deleted file mode 100644 index 353c90a..0000000 --- a/OSCAD/library/digitalSpice.lib +++ /dev/null @@ -1,376 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 22 October 2012 05:14:04 PM IST -#encoding utf-8 -# -# 74HCT04 -# -DEF 74HCT04 U 0 30 Y Y 6 F N -F0 "U" 150 100 40 H V C CNN -F1 "74HCT04" 200 -100 40 H V C CNN -ALIAS 74HC14 74HC04 74LS14 -DRAW -P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N -X GND 7 -50 -100 0 U 30 20 0 0 W N -X VCC 14 -50 100 0 D 30 20 0 0 W N -X ~ 1 -450 0 300 R 60 60 1 1 I -X ~ 2 450 0 300 L 60 60 1 1 O I -X ~ 3 -450 0 300 R 60 60 2 1 I -X ~ 4 450 0 300 L 60 60 2 1 O I -X ~ 5 -450 0 300 R 60 60 3 1 I -X ~ 6 450 0 300 L 60 60 3 1 O I -X ~ 8 450 0 300 L 60 60 4 1 O I -X ~ 9 -450 0 300 R 60 60 4 1 I -X ~ 10 450 0 300 L 60 60 5 1 O I -X ~ 11 -450 0 300 R 60 60 5 1 I -X ~ 12 450 0 300 L 60 60 6 1 O I -X ~ 13 -450 0 300 R 60 60 6 1 I -X ~ 1 -450 0 300 R 60 60 1 2 I I -X ~ 2 450 0 300 L 60 60 1 2 O -X ~ 3 -450 0 300 R 60 60 2 2 I I -X ~ 4 450 0 300 L 60 60 2 2 O -X ~ 5 -450 0 300 R 60 60 3 2 I I -X ~ 6 450 0 300 L 60 60 3 2 O -X ~ 8 450 0 300 L 60 60 4 2 O -X ~ 9 -450 0 300 R 60 60 4 2 I I -X ~ 10 450 0 300 L 60 60 5 2 O -X ~ 11 -450 0 300 R 60 60 5 2 I I -X ~ 12 450 0 300 L 60 60 6 2 O -X ~ 13 -450 0 300 R 60 60 6 2 I I -ENDDRAW -ENDDEF -# -# 74LS00 -# -DEF 74LS00 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS00" 0 -100 60 H V C CNN -ALIAS 74LS37 7400 74HCT00 74HC00 -$FPLIST - 14DIP300* - SO14* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O I -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O I -X ~ 8 600 0 300 L 60 60 3 1 O I -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O I -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 -A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 -A -10 -141 340 244 883 0 2 0 N 300 0 0 200 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O -X ~ 8 600 0 300 L 60 60 3 2 O -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS02 -# -DEF 74LS02 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS02" 50 -50 60 H V C CNN -ALIAS 74HC02 74HCT02 7402 74LS28 -$FPLIST - SO14* - 14DIP* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 -A -1 -127 327 898 228 0 1 8 N 0 200 300 0 -A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 -P 2 0 1 8 -300 -200 0 -200 N -P 2 0 1 8 -300 200 0 200 N -X ~ 1 600 0 300 L 60 60 1 1 O I -X ~ 2 -600 100 370 R 60 60 1 1 I -X ~ 3 -600 -100 370 R 60 60 1 1 I -X ~ 4 600 0 300 L 60 60 2 1 O I -X ~ 5 -600 100 370 R 60 60 2 1 I -X ~ 6 -600 -100 370 R 60 60 2 1 I -X ~ 8 -600 100 370 R 60 60 3 1 I -X ~ 9 -600 -100 370 R 60 60 3 1 I -X ~ 10 600 0 300 L 60 60 3 1 O I -X ~ 11 -600 100 370 R 60 60 4 1 I -X ~ 12 -600 -100 370 R 60 60 4 1 I -X ~ 13 600 0 300 L 60 60 4 1 O I -A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 -P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 600 0 300 L 60 60 1 2 O -X ~ 2 -600 100 300 R 60 60 1 2 I I -X ~ 3 -600 -100 300 R 60 60 1 2 I I -X ~ 4 600 0 300 L 60 60 2 2 O -X ~ 5 -600 100 300 R 60 60 2 2 I I -X ~ 6 -600 -100 300 R 60 60 2 2 I I -X ~ 8 -600 100 300 R 60 60 3 2 I I -X ~ 9 -600 -100 300 R 60 60 3 2 I I -X ~ 10 600 0 300 L 60 60 3 2 O -X ~ 11 -600 100 300 R 60 60 4 2 I I -X ~ 12 -600 -100 300 R 60 60 4 2 I I -X ~ 13 600 0 300 L 60 60 4 2 O -ENDDRAW -ENDDEF -# -# 74LS08 -# -DEF 74LS08 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS08" 0 -50 60 H V C CNN -ALIAS 74LS09 -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 U 40 40 0 0 W N -A 100 0 200 896 -896 0 1 0 N 101 200 101 -199 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O -X ~ 8 600 0 300 L 60 60 3 1 O -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -470 0 262 495 -495 0 2 0 N -300 199 -300 -198 -A -2 126 326 -897 -225 0 2 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 2 0 N 2 200 300 0 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O I -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O I -X ~ 8 600 0 300 L 60 60 3 2 O I -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O I -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS107 -# -DEF 74LS107 U 0 30 Y Y 2 F N -F0 "U" 0 100 60 H V C CNN -F1 "74LS107" 0 -100 60 H V C CNN -DRAW -S -350 -400 350 400 0 0 0 N -X GND 7 -250 -400 0 U 60 60 0 0 W N -X VCC 14 -250 400 0 U 60 60 0 0 W N -X J 1 -650 250 300 R 60 60 1 1 I -X ~Q 2 650 -250 300 L 60 60 1 1 O I -X Q 3 650 250 300 L 60 60 1 1 O -X K 4 -650 -250 300 R 60 60 1 1 I -X Cp 12 -650 0 300 R 60 60 1 1 I IC -X Cd 13 0 -700 300 U 60 60 1 1 I I -X Q 5 650 250 300 L 60 60 2 1 O -X ~Q 6 650 -250 300 L 60 60 2 1 O I -X J 8 -650 250 300 R 60 60 2 1 I -X Cp 9 -650 0 300 R 60 60 2 1 I IC -X Cd 10 0 -700 300 U 60 60 2 1 I I -X K 11 -650 -250 300 R 60 60 2 1 I -ENDDRAW -ENDDEF -# -# 74LS109 -# -DEF 74LS109 U 0 30 Y Y 2 F N -F0 "U" 0 100 60 H V C CNN -F1 "74LS109" 0 -100 60 H V C CNN -DRAW -S -350 -400 350 400 0 0 0 N -X GND 8 -250 -400 0 U 60 60 0 0 W N -X VCC 16 -250 400 0 U 60 60 0 0 W N -X Cd 1 0 -700 300 U 60 60 1 1 I I -X J 2 -650 250 300 R 60 60 1 1 I -X K 3 -650 -250 300 R 60 60 1 1 I I -X Cp 4 -650 0 300 R 60 60 1 1 I C -X Sd 5 0 700 300 D 60 60 1 1 I I -X Q 6 650 250 300 L 60 60 1 1 O -X ~Q 7 650 -250 300 L 60 60 1 1 O I -X ~Q 9 750 -250 400 L 60 60 2 1 I I -X Q 10 750 250 400 L 60 60 2 1 O -X Sd 11 0 800 400 D 60 60 2 1 I I -X Cp 12 -750 0 400 R 60 60 2 1 I C -X K 13 -750 -250 400 R 60 60 2 1 I I -X J 14 -750 250 400 R 60 60 2 1 I -X Cd 15 0 -800 400 U 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# 74LS112 -# -DEF 74LS112 U 0 30 Y Y 2 F N -F0 "U" 0 100 60 H V C CNN -F1 "74LS112" 0 -100 60 H V C CNN -DRAW -S -350 -400 350 400 0 0 0 N -X GND 8 -250 -400 0 U 60 60 0 0 W N -X VCC 16 -250 400 0 U 60 60 0 0 W N -X Cp 1 -650 0 300 R 60 60 1 1 I IC -X K 2 -650 -250 300 R 60 60 1 1 I -X J 3 -650 250 300 R 60 60 1 1 I -X Sd 4 0 700 300 D 60 60 1 1 I I -X Q 5 650 250 300 L 60 60 1 1 O -X ~Q 6 650 -250 300 L 60 60 1 1 O I -X Cd 15 0 -700 300 U 60 60 1 1 I I -X ~Q 7 650 -250 300 L 60 60 2 1 O I -X Q 9 650 250 300 L 60 60 2 1 O -X Sd 10 0 700 300 D 60 60 2 1 I I -X J 11 -650 250 300 R 60 60 2 1 I -X K 12 -650 -250 300 R 60 60 2 1 I -X Cp 13 -650 0 300 R 60 60 2 1 I IC -X Cd 14 0 -800 300 U 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# 74LS114 -# -DEF 74LS114 U 0 10 Y Y 2 F N -F0 "U" 0 100 60 H V C CNN -F1 "74LS114" 0 -100 60 H V C CNN -DRAW -S -350 -400 350 400 0 0 0 N -X GND 7 -250 -400 0 U 60 60 0 0 W N -X VCC 14 -250 400 0 U 60 60 0 0 W N -X ~ 1 0 -700 300 U 60 60 0 1 I I -X Cp 1 -650 0 300 R 60 60 1 1 I I -X K 2 -650 -250 300 R 60 60 1 1 I -X J 3 -650 250 300 R 60 60 1 1 I -X Sd 4 0 700 300 D 60 60 1 1 I I -X Q 5 650 250 300 L 60 60 1 1 O -X ~Q 6 650 -250 300 L 60 60 1 1 O I -X ~Q 8 650 -250 300 L 60 60 2 1 I I -X Q 9 650 250 300 L 60 60 2 1 I -X Sd 10 0 800 300 D 60 60 2 1 I I -X J 11 -650 250 300 R 60 60 2 1 I -X K 12 -650 -250 300 R 60 60 2 1 I -X Cp 13 -650 0 300 R 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# 74LS32 -# -DEF 74LS32 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS32" 0 -50 60 H V C CNN -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 U 40 40 0 0 W N -A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 -A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 1 0 N 2 200 300 0 -P 2 0 1 0 -300 -200 0 -200 N -P 2 0 1 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 1 I -X ~ 2 -600 -100 370 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O -X ~ 4 -600 100 370 R 60 60 2 1 I -X ~ 5 -600 -100 370 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O -X ~ 8 600 0 300 L 60 60 3 1 O -X ~ 9 -600 100 370 R 60 60 3 1 I -X ~ 10 -600 -100 370 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O -X ~ 12 -600 100 370 R 60 60 4 1 I -X ~ 13 -600 -100 370 R 60 60 4 1 I -A 100 0 200 896 -896 0 2 0 N 101 200 101 -199 -P 4 0 2 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 2 I I -X ~ 2 -600 -100 300 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O I -X ~ 4 -600 100 300 R 60 60 2 2 I I -X ~ 5 -600 -100 300 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O I -X ~ 8 600 0 300 L 60 60 3 2 O I -X ~ 9 -600 100 300 R 60 60 3 2 I I -X ~ 10 -600 -100 300 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O I -X ~ 12 -600 100 300 R 60 60 4 2 I I -X ~ 13 -600 -100 300 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS74 -# -DEF 74LS74 U 0 40 Y Y 2 F N -F0 "U" 150 300 60 H V C CNN -F1 "74LS74" 300 -295 60 H V C CNN -ALIAS 74HC74 -DRAW -X GND 7 -200 -250 0 U 30 30 0 0 W N -X VCC 14 -200 250 0 D 30 30 0 0 W N -S -300 250 300 -250 0 1 0 N -X Cd 1 0 -550 300 U 60 60 1 1 I I -X D 2 -600 200 300 R 60 60 1 1 I -X Cp 3 -600 0 300 R 60 60 1 1 I C -X Sd 4 0 550 300 D 60 60 1 1 I I -X Q 5 600 200 300 L 60 60 1 1 O -X ~Q 6 600 -200 300 L 60 60 1 1 O I -X ~Q 8 600 -200 300 L 60 60 2 1 O I -X Q 9 600 200 300 L 60 60 2 1 O -X Sd 10 0 550 300 D 60 60 2 1 I I -X Cp 11 -600 0 300 R 60 60 2 1 I C -X D 12 -600 200 300 R 60 60 2 1 I -X Cd 13 0 -550 300 U 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# 74LS86 -# -DEF 74LS86 U 0 30 Y N 4 F N -F0 "U" 50 50 50 H V C CNN -F1 "74LS86" 50 -50 40 H V C CNN -ALIAS 74HC86 -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 -A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 -A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 1 0 N 2 200 300 0 -P 2 0 1 0 -200 -200 0 -200 N -P 2 0 1 0 -200 200 0 200 N -X IN1 1 -600 100 370 R 60 60 1 1 I -X IN2 2 -600 -100 370 R 60 60 1 1 I -X OUT 3 600 0 300 L 60 60 1 1 O -X IN1 4 -600 100 370 R 60 60 2 1 I -X IN2 5 -600 -100 370 R 60 60 2 1 I -X OUT 6 600 0 300 L 60 60 2 1 O -X OUT 8 600 0 300 L 60 60 3 1 O -X IN1 9 -600 100 370 R 60 60 3 1 I -X IN2 10 -600 -100 370 R 60 60 3 1 I -X OUT 11 600 0 300 L 60 60 4 1 O -X IN1 12 -600 100 370 R 60 60 4 1 I -X IN2 13 -600 -100 370 R 60 60 4 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/library/digitalXSpice.bak b/OSCAD/library/digitalXSpice.bak deleted file mode 100644 index 08f1cb0..0000000 --- a/OSCAD/library/digitalXSpice.bak +++ /dev/null @@ -1,303 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 18 December 2012 11:53:32 PM IST -#encoding utf-8 -# -# d_and -# -DEF d_and U 0 30 Y Y 1 F N -F0 "U" 0 50 60 H V C CNN -F1 "d_and" 0 -100 60 H V C CNN -$FPLIST - 14DIP300* - SO14* -$ENDFPLIST -DRAW -A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O -A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 -A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 -A -10 -141 340 244 883 0 2 0 N 300 0 0 200 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O -ENDDRAW -ENDDEF -# -# d_buffer -# -DEF d_buffer U 0 40 Y Y 1 F N -F0 "U" -150 100 40 H V C CNN -F1 "d_buffer" 100 100 40 H V C CNN -DRAW -P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N -X in 1 -250 0 150 R 25 25 1 1 I -X out 2 250 0 150 L 25 25 1 1 O -ENDDRAW -ENDDEF -# -# D_DLatch -# -DEF D_DLatch U 0 40 Y Y 1 F N -F0 "U" -200 250 60 H V C CNN -F1 "D_DLatch" 0 100 60 H V C CNN -DRAW -S -300 200 300 -200 0 1 0 N -X D 1 -600 150 300 R 50 50 1 1 I -X Enable 2 -600 0 300 R 50 50 1 1 I -X Set 3 150 -500 300 U 50 50 1 1 I -X Reset 4 -150 -500 300 U 50 50 1 1 I -X Q 5 600 150 300 L 50 50 1 1 O -X ~Q 6 600 -150 300 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -# d_inverter -# -DEF d_inverter U 0 40 Y Y 1 F N -F0 "U" -150 100 40 H V C CNN -F1 "d_inverter" 100 100 40 H V C CNN -DRAW -P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N -X in 1 -250 0 150 R 25 25 1 1 I -X out 2 250 0 150 L 25 25 1 1 O I -ENDDRAW -ENDDEF -# -# D_JKFF -# -DEF D_JKFF U 0 40 Y Y 1 F N -F0 "U" -200 250 60 H V C CNN -F1 "D_JKFF" 0 100 60 H V C CNN -DRAW -S -300 200 300 -200 0 1 0 N -X J 1 -600 150 300 R 50 50 1 1 I -X K 2 -600 -150 300 R 50 50 1 1 I -X CLK 3 -600 0 300 R 50 50 1 1 O C -X set 4 150 -500 300 U 50 50 1 1 I -X reset 5 -150 -500 300 U 50 50 1 1 I -X Q 6 600 150 300 L 50 50 1 1 O -X ~Q 7 600 -150 300 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -# D_JKLatch -# -DEF D_JKLatch U 0 40 Y Y 1 F N -F0 "U" -200 250 60 H V C CNN -F1 "D_JKLatch" 0 100 60 H V C CNN -DRAW -S -300 200 300 -200 0 1 0 N -X J 1 -600 150 300 R 50 50 1 1 I -X K 2 -600 -150 300 R 50 50 1 1 I -X Enable 3 -600 0 300 R 50 50 1 1 I -X Set 4 150 -500 300 U 50 50 1 1 I -X Reset 5 -150 -500 300 U 50 50 1 1 I -X Q 6 600 150 300 L 50 50 1 1 O -X ~Q 7 600 -150 300 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -# d_nand -# -DEF d_nand U 0 30 Y Y 1 F N -F0 "U" 0 50 60 H V C CNN -F1 "d_nand" 0 -100 60 H V C CNN -$FPLIST - 14DIP300* - SO14* -$ENDFPLIST -DRAW -A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O I -A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 -A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 -A -10 -141 340 244 883 0 2 0 N 300 0 0 200 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O -ENDDRAW -ENDDEF -# -# d_nor -# -DEF d_nor U 0 30 Y Y 1 F N -F0 "U" 0 50 60 H V C CNN -F1 "d_nor" 50 -50 60 H V C CNN -$FPLIST - SO14* - 14DIP* -$ENDFPLIST -DRAW -A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 -A -1 -127 327 898 228 0 1 8 N 0 200 300 0 -A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 -P 2 0 1 8 -300 -200 0 -200 N -P 2 0 1 8 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 1 I -X ~ 2 -600 -100 370 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O I -A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 -P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 600 0 300 L 60 60 1 2 O -X ~ 2 -600 100 300 R 60 60 1 2 I I -X ~ 3 -600 -100 300 R 60 60 1 2 I I -ENDDRAW -ENDDEF -# -# d_or -# -DEF d_or U 0 30 Y Y 1 F N -F0 "U" 0 50 60 H V C CNN -F1 "d_or" 50 -50 60 H V C CNN -$FPLIST - SO14* - 14DIP* -$ENDFPLIST -DRAW -A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 -A -1 -127 327 898 228 0 1 8 N 0 200 300 0 -A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 -P 2 0 1 8 -300 -200 0 -200 N -P 2 0 1 8 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 1 I -X ~ 2 -600 -100 370 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O -A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 -P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 600 0 300 L 60 60 1 2 O -X ~ 2 -600 100 300 R 60 60 1 2 I I -X ~ 3 -600 -100 300 R 60 60 1 2 I I -ENDDRAW -ENDDEF -# -# d_pulldown -# -DEF d_pulldown U 0 20 Y Y 1 F N -F0 "U" -100 100 40 H V C CNN -F1 "d_pulldown" 0 0 40 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X ~ 1 -300 0 150 R 30 30 1 1 B -ENDDRAW -ENDDEF -# -# D_PULLUP -# -DEF D_PULLUP U 0 20 Y Y 1 F N -F0 "U" -100 100 40 H V C CNN -F1 "D_PULLUP" 0 0 40 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X ~ 1 -300 0 150 R 30 30 1 1 B -ENDDRAW -ENDDEF -# -# D_SRFF -# -DEF D_SRFF U 0 40 Y Y 1 F N -F0 "U" -200 250 60 H V C CNN -F1 "D_SRFF" 0 100 60 H V C CNN -DRAW -S -300 200 300 -200 0 1 0 N -X S 1 -600 150 300 R 50 50 1 1 I -X R 2 -600 -150 300 R 50 50 1 1 I -X CLK 3 -600 0 300 R 50 50 1 1 O C -X set 4 150 -500 300 U 50 50 1 1 I -X reset 5 -150 -500 300 U 50 50 1 1 I -X Q 6 600 150 300 L 50 50 1 1 O -X ~Q 7 600 -150 300 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -# D_SRLatch -# -DEF D_SRLatch U 0 40 Y Y 1 F N -F0 "U" -200 250 60 H V C CNN -F1 "D_SRLatch" 0 100 60 H V C CNN -DRAW -S -300 200 300 -200 0 1 0 N -X S 1 -600 150 300 R 50 50 1 1 I -X R 2 -600 -150 300 R 50 50 1 1 I -X Enable 3 -600 0 300 R 50 50 1 1 I -X Set 4 150 -500 300 U 50 50 1 1 I -X Reset 5 -150 -500 300 U 50 50 1 1 I -X Q 6 600 150 300 L 50 50 1 1 O -X ~Q 7 600 -150 300 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -# D_TLatch -# -DEF D_TLatch U 0 40 Y Y 1 F N -F0 "U" -200 250 60 H V C CNN -F1 "D_TLatch" 0 100 60 H V C CNN -DRAW -S -300 200 300 -200 0 1 0 N -X T 1 -600 150 300 R 50 50 1 1 I -X Enable 2 -600 0 300 R 50 50 1 1 I -X Set 3 150 -500 300 U 50 50 1 1 I -X Reset 4 -150 -500 300 U 50 50 1 1 I -X Q 5 600 150 300 L 50 50 1 1 O -X ~Q 6 600 -150 300 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -# d_tristate -# -DEF d_tristate U 0 20 Y Y 1 F N -F0 "U" 150 50 40 H V C CNN -F1 "d_tristate" 0 100 40 H V C CNN -DRAW -P 4 0 1 0 -150 150 -150 -150 150 0 -150 150 N -X in 1 -300 0 150 R 30 30 1 1 I -X en 2 -50 -250 150 U 30 30 1 1 I -X out 3 300 0 150 L 30 30 1 1 O -ENDDRAW -ENDDEF -# -# d_xnor -# -DEF d_xnor U 0 30 Y N 1 F N -F0 "U" 50 50 50 H V C CNN -F1 "d_xnor" 50 -50 40 H V C CNN -DRAW -A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 -A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 -A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 1 0 N 2 200 300 0 -P 2 0 1 0 -200 -200 0 -200 N -P 2 0 1 0 -200 200 0 200 N -X IN1 1 -600 100 370 R 60 60 1 1 I -X IN2 2 -600 -100 370 R 60 60 1 1 I -X OUT 3 600 0 300 L 60 60 1 1 O I -ENDDRAW -ENDDEF -# -# d_xor -# -DEF d_xor U 0 30 Y N 1 F N -F0 "U" 50 50 50 H V C CNN -F1 "d_xor" 50 -50 40 H V C CNN -DRAW -A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 -A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 -A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 1 0 N 2 200 300 0 -P 2 0 1 0 -200 -200 0 -200 N -P 2 0 1 0 -200 200 0 200 N -X IN1 1 -600 100 370 R 60 60 1 1 I -X IN2 2 -600 -100 370 R 60 60 1 1 I -X OUT 3 600 0 300 L 60 60 1 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/library/digitalXSpice.bck b/OSCAD/library/digitalXSpice.bck deleted file mode 100644 index 0d10ba3..0000000 --- a/OSCAD/library/digitalXSpice.bck +++ /dev/null @@ -1,23 +0,0 @@ -EESchema-DOCLIB Version 2.0 Date: Tuesday 18 December 2012 11:53:32 PM IST -# -$CMP D_NOR -D Nor2 -K Nor2 -$ENDCMP -# -$CMP D_OR -D Or2 -K Or2 -$ENDCMP -# -$CMP D_XNOR -D XNOR 2 inputs -K XNOR2 -$ENDCMP -# -$CMP D_XOR -D XOR 2 inputs -K XOR2 -$ENDCMP -# -#End Doc Library diff --git a/OSCAD/library/digitalXSpice.dcm b/OSCAD/library/digitalXSpice.dcm deleted file mode 100644 index b8d289a..0000000 --- a/OSCAD/library/digitalXSpice.dcm +++ /dev/null @@ -1,23 +0,0 @@ -EESchema-DOCLIB Version 2.0 Date: Tuesday 18 December 2012 11:55:07 PM IST -# -$CMP D_NOR -D Nor2 -K Nor2 -$ENDCMP -# -$CMP D_OR -D Or2 -K Or2 -$ENDCMP -# -$CMP D_XNOR -D XNOR 2 inputs -K XNOR2 -$ENDCMP -# -$CMP D_XOR -D XOR 2 inputs -K XOR2 -$ENDCMP -# -#End Doc Library diff --git a/OSCAD/library/digitalXSpice.lib b/OSCAD/library/digitalXSpice.lib deleted file mode 100644 index e20d547..0000000 --- a/OSCAD/library/digitalXSpice.lib +++ /dev/null @@ -1,319 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 18 December 2012 11:55:07 PM IST -#encoding utf-8 -# -# d_and -# -DEF d_and U 0 30 Y Y 1 F N -F0 "U" 0 50 60 H V C CNN -F1 "d_and" 0 -100 60 H V C CNN -$FPLIST - 14DIP300* - SO14* -$ENDFPLIST -DRAW -A 100 0 200 -899 899 0 1 0 N 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+++ /dev/null @@ -1,24 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 11:53:42 PM IST -#encoding utf-8 -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/library/sourcesSpice.bak b/OSCAD/library/sourcesSpice.bak deleted file mode 100644 index 5298df9..0000000 --- a/OSCAD/library/sourcesSpice.bak +++ /dev/null @@ -1,167 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 23 October 2012 11:24:51 AM IST -#encoding utf-8 -# -# CCCS -# -DEF CCCS F 0 40 Y Y 1 F N -F0 "F" -200 100 50 H V C CNN -F1 "CCCS" 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-$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/library/sourcesSpice.bck b/OSCAD/library/sourcesSpice.bck deleted file mode 100644 index f62a6c9..0000000 --- a/OSCAD/library/sourcesSpice.bck +++ /dev/null @@ -1,3 +0,0 @@ -EESchema-DOCLIB Version 2.0 Date: Tuesday 23 October 2012 11:24:51 AM IST -# -#End Doc Library diff --git a/OSCAD/library/sourcesSpice.dcm b/OSCAD/library/sourcesSpice.dcm deleted file mode 100644 index 16f5191..0000000 --- a/OSCAD/library/sourcesSpice.dcm +++ /dev/null @@ -1,3 +0,0 @@ -EESchema-DOCLIB Version 2.0 Date: Tuesday 23 October 2012 11:25:34 AM IST -# -#End Doc Library diff --git a/OSCAD/library/sourcesSpice.lib b/OSCAD/library/sourcesSpice.lib deleted file mode 100644 index ff9d82c..0000000 --- a/OSCAD/library/sourcesSpice.lib +++ /dev/null @@ -1,201 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 28 May 2013 03:57:34 PM IST -#encoding utf-8 -# -# AC -# -DEF AC v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# CCCS -# -DEF CCCS F 0 40 Y Y 1 F N -F0 "F" -200 100 50 H V C CNN -F1 "CCCS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# CCVS -# -DEF CCVS H 0 40 Y Y 1 F N -F0 "H" -200 100 50 H V C CNN -F1 "CCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 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100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# pwl -# -DEF pwl v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pwl" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50 -A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50 -A -75 -700 750 919 880 0 1 0 N -100 50 -50 50 -A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50 -A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# VCCS -# -DEF VCCS G 0 40 Y Y 1 F N -F0 "G" -200 100 50 H V C CNN -F1 "VCCS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/modelEditor/1n4007.lib b/OSCAD/modelEditor/1n4007.lib deleted file mode 100644 index 1e66174..0000000 --- a/OSCAD/modelEditor/1n4007.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model 1n4007 D( Vj=.75 Nbvl=14.976 Cjo=175p Rs=.25 Isr=1.859n -+ Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u -+ Bv=8.1 Fc=.5 Ikf=0 Nr=2 Ibv=20.245m -+ Is=880.5E-18 Xti=3 Ibvl=1.9556m ) \ No newline at end of file diff --git a/OSCAD/modelEditor/CORE.lib b/OSCAD/modelEditor/CORE.lib deleted file mode 100755 index c48c4b5..0000000 --- a/OSCAD/modelEditor/CORE.lib +++ /dev/null @@ -1,2 +0,0 @@ -.model K3019PL_3C8 Core(MS=415.2K A=44.82 C=.4112 K=25.74 -+ Area=1.38 Path=4.52) diff --git a/OSCAD/modelEditor/D.hlp b/OSCAD/modelEditor/D.hlp deleted file mode 100755 index fd0b2f8..0000000 --- a/OSCAD/modelEditor/D.hlp +++ /dev/null @@ -1,16 +0,0 @@ - name parameter units default example -1 IS saturation current A 1.0e-14 1.0e-14 -2 RS ohmic resistanc Ohm 0 10 -3 N emission coefficient - 1 1.0 -4 TT transit-time sec 0 0.1ns -5 CJO zero-bias junction capacitance F 0 2pF -6 VJ junction potential V 1 0.6 -7 M grading coefficient - 0.5 0.5 -8 EG band-gap energy eV 1.11 1.11 Si -9 XTI saturation-current temp.exp - 3.0 3.0 pn/ 2.0 Schottky -10 KF flicker noise coefficient - 0 -11 AF flicker noise exponent - 1 -12 FC coefficient for forward-bias depletion capacitance formula - 0.5 -13 BV reverse breakdown voltage V infinite 40.0 -14 IBV current at breakdown voltage V 1.0e-3 -15 TNOM parameter measurement temperature deg C 27 50 diff --git a/OSCAD/modelEditor/D.lib b/OSCAD/modelEditor/D.lib deleted file mode 100755 index 890c37f..0000000 --- a/OSCAD/modelEditor/D.lib +++ /dev/null @@ -1,3 +0,0 @@ -.model D1N750 D( Is=880.5E-18 Rs=.25 Ikf=0 N=1 Xti=3 Eg=1.11 Cjo=175p M=.5516 -+ Vj=.75 Fc=.5 Isr=1.859n Nr=2 Bv=8.1 Ibv=20.245m Nbv=1.6989 Ibvl=1.9556m -+ Nbvl=14.976 Tbv1=-21.277u) diff --git a/OSCAD/modelEditor/NIGBT.lib b/OSCAD/modelEditor/NIGBT.lib deleted file mode 100755 index 8c09dcb..0000000 --- a/OSCAD/modelEditor/NIGBT.lib +++ /dev/null @@ -1,10 +0,0 @@ -.MODEL IXGH40N60 NIGBT ( -+ TAU=287.56E-9 -+ KP=50.034 -+ AREA=37.500E-6 -+ AGD=18.750E-6 -+ VT=4.1822 -+ KF=.36047 -+ CGS=31.942E-9 -+ COXD=53.188E-9 -+ VTD=2.6570) diff --git a/OSCAD/modelEditor/NJF.lib b/OSCAD/modelEditor/NJF.lib deleted file mode 100755 index dbb2cba..0000000 --- a/OSCAD/modelEditor/NJF.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 -+ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u -+ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 -+ Af=1) diff --git a/OSCAD/modelEditor/NMOS-0.5um.lib b/OSCAD/modelEditor/NMOS-0.5um.lib deleted file mode 100644 index 2e6f463..0000000 --- a/OSCAD/modelEditor/NMOS-0.5um.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model mos_n NMOS( TPG=1 TOX=9.5n CJ=550u ETA=0.02125 VMAX=1.8E05 -+ GAMMA=0.62 CGSO=0.3n LD=50n MJSW=0.35 PB=1.1 -+ CGBO=0.45n XJ=0.2U CGDO=0.3n KAPPA=0.1 LEVEL=3 -+ VTO=0.6 NFS=7.20E11 THETA=0.23 CJSW=0.3n PHI=0.7 -+ RSH=2.0 MJ=0.6 UO=420 KP=156u DELTA=0.88 -+ NSUB=1.40E17 ) \ No newline at end of file diff --git a/OSCAD/modelEditor/NMOS-180nm.lib b/OSCAD/modelEditor/NMOS-180nm.lib deleted file mode 100644 index 51e9b11..0000000 --- a/OSCAD/modelEditor/NMOS-180nm.lib +++ /dev/null @@ -1,13 +0,0 @@ -.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 -+ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 -+ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18 -+ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4 -+ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0 -+ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0 -+ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3 -+ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1 -+ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 -+ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12 -+ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 -+ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 -+ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3) diff --git a/OSCAD/modelEditor/NMOS-5um.lib b/OSCAD/modelEditor/NMOS-5um.lib deleted file mode 100755 index a237e1f..0000000 --- a/OSCAD/modelEditor/NMOS-5um.lib +++ /dev/null @@ -1,5 +0,0 @@ -* 5um technology - -.model mos_n NMOS( Cgso=0.4n Tox=85n Vto=1 phi=0.7 -+ Level=1 -+ Mj=.5 UO=750 Cgdo=0.4n Gamma=1.4 LAMBDA=0.01 LD=0.7u JS=1u CJ=0.4m CJSW=0.8n MJSW=0.5 PB=0.7 CGBO=0.2n ) diff --git a/OSCAD/modelEditor/NMOS.lib b/OSCAD/modelEditor/NMOS.lib deleted file mode 100755 index 51e9b11..0000000 --- a/OSCAD/modelEditor/NMOS.lib +++ /dev/null @@ -1,13 +0,0 @@ -.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 -+ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 -+ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18 -+ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4 -+ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0 -+ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0 -+ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3 -+ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1 -+ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 -+ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12 -+ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 -+ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 -+ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3) diff --git a/OSCAD/modelEditor/NMOS12.lib b/OSCAD/modelEditor/NMOS12.lib deleted file mode 100755 index 721c592..0000000 --- a/OSCAD/modelEditor/NMOS12.lib +++ /dev/null @@ -1,5 +0,0 @@ -.model IRF150 NMOS(Level=3 Gamma=0 Delta=0 Eta=0 Theta=0 Kappa=0 Vmax=0 Xj=0 -+ Tox=100n Uo=600 Phi=.6 Rs=1.624m Kp=20.53u W=.3 L=2u Vto=2.831 -+ Rd=1.031m Rds=444.4K Cbd=3.229n Pb=.8 Mj=.5 Fc=.5 Cgso=9.027n -+ Cgdo=1.679n Rg=13.89 Is=194E-18 N=1 Tt=288n) - diff --git a/OSCAD/modelEditor/NPN.hlp b/OSCAD/modelEditor/NPN.hlp deleted file mode 100755 index e492ea1..0000000 --- a/OSCAD/modelEditor/NPN.hlp +++ /dev/null @@ -1,17 +0,0 @@ -1) BF Forward active current gain -2) VJE Base-emitter built-in potential -3) BR Reverse active current gain -4) VJC Base-collector built-in potential -5) IS Transport saturation current -6) VAF Forward mode Early voltage -7) CJE Base-emitter zero-bias Junction capacitance -8) VAR Reverse mode Early voltage -9) NF Forward mode ideality factor -10) CJC Base-collector zero-bias Junction capacitance -11) NR Reverse mode ideality factor -12) RB zero bias base resistance -13) MJE base-emitter capacitance exponent -14) RE emitter resistance -15) MJC base-collector capacitance exponent -16) RC collector resistance -17) EG energy gap for temperature effect on IS diff --git a/OSCAD/modelEditor/NPN.lib b/OSCAD/modelEditor/NPN.lib deleted file mode 100755 index 6509fe7..0000000 --- a/OSCAD/modelEditor/NPN.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 -+ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p -+ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p -+ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/OSCAD/modelEditor/PIGBT.lib b/OSCAD/modelEditor/PIGBT.lib deleted file mode 100755 index d4f9e81..0000000 --- a/OSCAD/modelEditor/PIGBT.lib +++ /dev/null @@ -1,10 +0,0 @@ -.MODEL IXGH40N60 PIGBT ( -+ TAU=287.56E-9 -+ KP=50.034 -+ AREA=37.500E-6 -+ AGD=18.750E-6 -+ VT=4.1822 -+ KF=.36047 -+ CGS=31.942E-9 -+ COXD=53.188E-9 -+ VTD=2.6570) diff --git a/OSCAD/modelEditor/PJF.lib b/OSCAD/modelEditor/PJF.lib deleted file mode 100755 index 5589571..0000000 --- a/OSCAD/modelEditor/PJF.lib +++ /dev/null @@ -1,5 +0,0 @@ -.model J2N3820 PJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 -+ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u -+ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 -+ Af=1) - diff --git a/OSCAD/modelEditor/PMOS .lib b/OSCAD/modelEditor/PMOS .lib deleted file mode 100755 index 6c9bb83..0000000 --- a/OSCAD/modelEditor/PMOS .lib +++ /dev/null @@ -1,4 +0,0 @@ -.model IRF9140 PMOS(Level=3 Gamma=0 Delta=0 Eta=0 Theta=0 Kappa=0 Vmax=0 Xj=0 -+ Tox=100n Uo=300 Phi=.6 Rs=70.6m Kp=10.15u W=1.9 L=2u Vto=-3.67 -+ Rd=60.66m Rds=444.4K Cbd=2.141n Pb=.8 Mj=.5 Fc=.5 Cgso=877.2p -+ Cgdo=369.3p Rg=.811 Is=52.23E-18 N=2 Tt=140n) diff --git a/OSCAD/modelEditor/PMOS-0.5um.lib b/OSCAD/modelEditor/PMOS-0.5um.lib deleted file mode 100644 index 848e8b0..0000000 --- a/OSCAD/modelEditor/PMOS-0.5um.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model mos_p PMOS( TPG=-1 TOX=9.5n CJ=950u ETA=0.025 VMAX=0.3u -+ GAMMA=0.52 CGSO=0.35n LD=70n MJSW=0.25 PB=1 -+ CGBO=0.45n XJ=0.2U CGDO=0.35n KAPPA=8.0 LEVEL=3 -+ VTO=-0.6 NFS=6.50E11 THETA=0.2 CJSW=0.2n PHI=0.7 -+ RSH=2.5 MJ=0.5 UO=130 KP=48u DELTA=0.25 -+ NSUB=1.0E17 ) \ No newline at end of file diff --git a/OSCAD/modelEditor/PMOS-180nm.lib b/OSCAD/modelEditor/PMOS-180nm.lib deleted file mode 100644 index 032b5b9..0000000 --- a/OSCAD/modelEditor/PMOS-180nm.lib +++ /dev/null @@ -1,11 +0,0 @@ -.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015 -+ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363 -+ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478 -+ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677 -+ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 -+ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148 -+ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10 -+ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 -+ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 -+ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3 -+ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3) diff --git a/OSCAD/modelEditor/PMOS-5um.lib b/OSCAD/modelEditor/PMOS-5um.lib deleted file mode 100755 index 9c3ed97..0000000 --- a/OSCAD/modelEditor/PMOS-5um.lib +++ /dev/null @@ -1,5 +0,0 @@ -*5um technology - -.model mos_p PMOS( Cgso=0.4n Tox=85n Vto=-1 phi=0.65 -+ Level=1 -+ Mj=.5 UO=250 Cgdo=0.4n Gamma=0.65 LAMBDA=0.03 LD=0.6u JS=1u CJ=0.18m CJSW=0.6n MJSW=0.5 PB=0.7 CGBO=0.2n ) diff --git a/OSCAD/modelEditor/PMOS.lib b/OSCAD/modelEditor/PMOS.lib deleted file mode 100755 index 032b5b9..0000000 --- a/OSCAD/modelEditor/PMOS.lib +++ /dev/null @@ -1,11 +0,0 @@ -.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015 -+ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363 -+ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478 -+ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677 -+ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 -+ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148 -+ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10 -+ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 -+ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 -+ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3 -+ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3) diff --git a/OSCAD/modelEditor/PMOS11.lib b/OSCAD/modelEditor/PMOS11.lib deleted file mode 100755 index 6c9bb83..0000000 --- a/OSCAD/modelEditor/PMOS11.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model IRF9140 PMOS(Level=3 Gamma=0 Delta=0 Eta=0 Theta=0 Kappa=0 Vmax=0 Xj=0 -+ Tox=100n Uo=300 Phi=.6 Rs=70.6m Kp=10.15u W=1.9 L=2u Vto=-3.67 -+ Rd=60.66m Rds=444.4K Cbd=2.141n Pb=.8 Mj=.5 Fc=.5 Cgso=877.2p -+ Cgdo=369.3p Rg=.811 Is=52.23E-18 N=2 Tt=140n) diff --git a/OSCAD/modelEditor/PNP.lib b/OSCAD/modelEditor/PNP.lib deleted file mode 100755 index 7edda0e..0000000 --- a/OSCAD/modelEditor/PNP.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 -+ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 -+ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 -+ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/OSCAD/modelEditor/exportModel.py b/OSCAD/modelEditor/exportModel.py deleted file mode 100755 index 1249197..0000000 --- a/OSCAD/modelEditor/exportModel.py +++ /dev/null @@ -1,77 +0,0 @@ -#!/usr/bin/python -# exportModel.py is a python script to export a component model to the library. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from setPath import OSCAD_HOME -from Tkinter import * -from Tkinter import * -import template -import tkMessageBox -import os.path -import os -import Pmw -from string import maketrans - -class ExportModel(): - """Class for exporting the model to the model library""" - def __init__(self,parent): - self.parent=parent - self.modelName="" - # Collect model information available in the project directory - fileList=os.listdir(".") - modelList=[] - - for fileName in fileList: - if "lib" in fileName: - modelList.append(fileName) - - # Create the dialog. - self.dialog = Pmw.SelectionDialog(parent, - title = 'Model Selector', - buttons = ('OK', 'Cancel'), - defaultbutton = 'OK', - scrolledlist_labelpos = 'n', - label_text = 'Please select the model', - scrolledlist_items=modelList, - command = self.apply, - ) - self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) - self.dialog.activate() - - # ProtGocol when window is deleted. - self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) - - def apply(self,result): - sels = self.dialog.getcurselection() - if result=="OK": - if len(sels) == 0: - print 'You clicked on', result, '(no selection)' - return - else: - self.modelName=sels[0] - self.status=1 - else: - self.status=0 - self.dialog.withdraw() - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.dialog.deactivate() - -# Action taken when cancel pressed - def cancel(self, event=None, status=0): - # Catch the status - self.status=status - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.destroy() - -if __name__=='__main__': - root=Tk() - model= ExportModel(root,"xxx") - mainloop() - diff --git a/OSCAD/modelEditor/helpEditor.py b/OSCAD/modelEditor/helpEditor.py deleted file mode 100755 index b855cca..0000000 --- a/OSCAD/modelEditor/helpEditor.py +++ /dev/null @@ -1,43 +0,0 @@ -#!/usr/bin/python -# helpEditor.py is a python script to display help for the model editor. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com) and Shalini Shrivastava. -# Copyright (C) 2012 Yogesh Dilip Save and Shalini Shrivastava, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from Tkinter import * -import template -import tkMessageBox -import os.path -from string import maketrans -from newModel import readSpecs - -class HelpInfo(template.MyTemplate): - """ Class for displaying help information """ - def body(self, master): - # Help heading - master.configure(width=768, height=576) - Label(master, text="Ngspice Model Editor Help", font=("Helvetica", 16), padx=20, pady=20).grid(row=0) - -# Add standard button box (OK) - def buttonbox(self): - # Construct a new frame - box = Frame(self) - # Create buttons - w = Button(box, text="OK", width=10, command=self.ok, default=ACTIVE) - w.pack(padx=5, pady=5) - - # Bind Return and escape keys - self.bind("", self.ok) - self.bind("", self.ok) - # Create the frame "box" - box.pack() - - def statusBar(self): - pass - -if __name__=='__main__': - root=Tk() - model= HelpInfo(root) - mainloop() - diff --git a/OSCAD/modelEditor/importModel.py b/OSCAD/modelEditor/importModel.py deleted file mode 100755 index 43f9c2e..0000000 --- a/OSCAD/modelEditor/importModel.py +++ /dev/null @@ -1,86 +0,0 @@ -#!/usr/bin/python -# importModel.py is a python script to import a component model from library. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from setPath import OSCAD_HOME -from Tkinter import * -from Tkinter import * -import template -import tkMessageBox -import os.path -import os -import Pmw -from string import maketrans - -class ImportModel(): - """Class for importing a model from the library""" - def __init__(self,parent): - self.parent=parent - self.modelName="" - # Collect model information available in the model library - try: - self.OSCAD_HOME=OSCAD_HOME - except NameError: - try: - self.OSCAD_HOME=os.environ["OSCAD_HOME"] - except KeyError: - tkMessageBox.showerror("Error OSCAD_HOME is not set","Please set OSCAD_HOME variable in .bashrc\n\nStep to set OSCAD_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export OSCAD_HOME=\" to it.\n 3) source ~/.bashrc") - exit(0) - - fileList=os.listdir(self.OSCAD_HOME+"/modelLibrary") - modelList=[] - - for fileName in fileList: - if "lib" in fileName: - modelList.append(fileName) - - # Create the dialog. - self.dialog = Pmw.SelectionDialog(parent, - title = 'Model Selector', - buttons = ('OK', 'Cancel'), - defaultbutton = 'OK', - scrolledlist_labelpos = 'n', - label_text = 'Please select the model', - scrolledlist_items=modelList, - command = self.apply, - ) - self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) - self.dialog.activate() - - # Protocol when window is deleted. - self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) - - def apply(self,result): - sels = self.dialog.getcurselection() - if result=="OK": - if len(sels) == 0: - print 'You clicked on', result, '(no selection)' - return - else: - self.modelName=sels[0] - self.status=1 - else: - self.status=0 - self.dialog.withdraw() - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.dialog.deactivate() - -# Action taken when cancel pressed - def cancel(self, event=None, status=0): - # Catch the status - self.status=status - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.destroy() - -if __name__=='__main__': - root=Tk() - model= ImportModel(root,"xxx") - mainloop() - diff --git a/OSCAD/modelEditor/modelEditor.py b/OSCAD/modelEditor/modelEditor.py deleted file mode 100755 index ce2d88b..0000000 --- a/OSCAD/modelEditor/modelEditor.py +++ /dev/null @@ -1,166 +0,0 @@ -#!/usr/bin/python -# modelEditor.py is a python script to display fornt end of the model editor. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com) and Shalini Shrivastava. -# Copyright (C) 2012 Yogesh Dilip Save and Shalini Shrivastava, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from setPath import OSCAD_HOME -from Tkinter import * -import tkMessageBox -import newModel -import openModel -import selectModel -import importModel -import exportModel -import os -import sys - -# Create a new model -def newEditor(e=None): -# Read model information (name and type) - model= newModel.ModelInfo(root) -# Create model file - if model.status: - modelParam = newModel.ModelParam(root,model.modelName,model.modelType) - -# Open an existing model -def openEditor(e=None): - model= openModel.ExistingModelInfo(root) -# Open model file - if model.status: - modelParam = openModel.ExistingModelParam(root,model.modelName) - -# Import an existing model from library -def importEditor(e=None): - model=importModel.ImportModel(root) - temp_model_name=model.modelName - if temp_model_name.startswith('NMOS',0,4): - if os.system("cp "+OSCAD_HOME+"/modelLibrary/"+model.modelName+" mos_n.lib"): - tkMessageBox.showerror("Import Failed","Unable to import model file "+model.modelName) - else: - tkMessageBox.showinfo("Successfully imported","Model file "+model.modelName+" is successfully imported to the project.") - elif temp_model_name.startswith('PMOS',0,4): - if os.system("cp "+OSCAD_HOME+"/modelLibrary/"+model.modelName+" mos_p.lib"): - tkMessageBox.showerror("Import Failed","Unable to import model file "+model.modelName) - else: - tkMessageBox.showinfo("Successfully imported","Model file "+model.modelName+" is successfully imported to the project.") - elif temp_model_name.startswith('D',0,1): - if os.system("cp "+OSCAD_HOME+"/modelLibrary/"+model.modelName+" 1n4007.lib"): - tkMessageBox.showerror("Import Failed","Unable to import model file "+model.modelName) - else: - tkMessageBox.showinfo("Successfully imported","Model file "+model.modelName+" is successfully imported to the project.") - else: - if os.system("cp "+OSCAD_HOME+"/modelLibrary/"+model.modelName+" ."): - tkMessageBox.showerror("Import Failed","Unable to import model file "+model.modelName) - else: - tkMessageBox.showinfo("Successfully imported","Model file "+model.modelName+" is successfully imported to the project.") - - -# Export an existing model to library -def exportEditor(e=None): - model=exportModel.ExportModel(root) - if os.system("cp "+model.modelName+" "+OSCAD_HOME+"/modelLibrary/"): - tkMessageBox.showerror("Export Failed","Unable to export model file "+model.modelName) - else: - tkMessageBox.showinfo("Successfully exported","Model file "+model.modelName+" is successfully exported to the model library") - -# Exit an model editor -def exitEditor(e=None): - if tkMessageBox.askokcancel("QUIT","Do you really wish to quit?"): - root.destroy() - -# Display help content -def helpEditor(e=None): - pass - -# Display help content -def aboutEditor(): - tkMessageBox.showinfo("About Editor","Created by Yogesh Dilip Save and Shalini Shrivastava") - -##Function to open select model from the list to modify it -def openSelectModel(e=None): - filename=sys.argv[1] - #Getting lenght of Model List and clicked result - lenght_modlist,result=callModel(root,filename) - response=result - if result=="OK": - for item in range(lenght_modlist-1): - if response=="OK": - temp_lenght,temp_result=callModel(root,filename) - response=temp_result - else: - break - - else: - pass - -def callModel(root,filename): - model=selectModel.ModelNameList(root, filename) - if model.status: - # Open the circuit file - modelFile=model.modelName+".lib" - # Check model file already exists - if os.path.exists(modelFile): - if tkMessageBox.askokcancel("Model already exists","Do you want to edit?"): - modelParam = openModel.ExistingModelParam(root,model.modelName) - else: - modelParam = newModel.ModelParam(root,model.modelName,model.modelType) - return len(model.modelList),model.click_result - - -root = Tk() -root.title("Ngspice Model Editor") -root.geometry("600x400+300+125") - -# Create and configure a menu -menu = Menu(root) -root.config(menu=menu) - -# Create File menu -filemenu= Menu(menu) -menu.add_cascade(label="File", menu=filemenu) -filemenu.add_command(label="New F2", command=newEditor) -#filemenu.add_command(label="Open F3", command=openEditor) -filemenu.add_command(label="Edit F7",command=openSelectModel) -filemenu.add_separator() -filemenu.add_command(label="Import F4", command=importEditor) -filemenu.add_command(label="Export F5", command=exportEditor) -filemenu.add_separator() -filemenu.add_command(label="Exit F6", command=exitEditor) - -# Create help menu -helpmenu=Menu(menu) -menu.add_cascade(label="Help", menu=helpmenu) -helpmenu.add_command(label="Help F1",command=helpEditor) -helpmenu.add_command(label="About...",command=aboutEditor) - -# Select device from devices in circuit file - -"""model=selectModel.ModelNameList(root, filename) -print "Model",model.modelList - - -if model.status: - # Open the circuit file - modelFile=model.modelName+".lib" - # Check model file already exists - if os.path.exists(modelFile): - if tkMessageBox.askokcancel("Model already exists","Do you want to edit?"): - modelParam = openModel.ExistingModelParam(root,model.modelName) - else: - modelParam = newModel.ModelParam(root,model.modelName,model.modelType) -""" -# Protocol for deletion of main window -root.protocol("WM_DELETE_WINDOW",exitEditor) - -# Create shortcut keys -root.bind("", newEditor) -#root.bind("", openEditor) -root.bind("", importEditor) -root.bind("", exportEditor) -root.bind("", exitEditor) -root.bind("", helpEditor) -root.bind("", openSelectModel) - -mainloop() diff --git a/OSCAD/modelEditor/newModel.py b/OSCAD/modelEditor/newModel.py deleted file mode 100755 index 93d7578..0000000 --- a/OSCAD/modelEditor/newModel.py +++ /dev/null @@ -1,187 +0,0 @@ -#!/usr/bin/python -# newModel.py is a python script to create a new model. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com) and Shalini Shrivastava. -# Copyright (C) 2012 Yogesh Dilip Save and Shalini Shrivastava, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from setPath import OSCAD_HOME -from Tkinter import * -import template -import tkMessageBox -import os.path -from string import maketrans - -class ModelInfo(template.MyTemplate): - """ Class for accept model information from user """ - def body(self, master): - # Define component type and set it to Diode - self.component = StringVar() - self.component.set("D") - - # Ask for compoent name - Label(master, text="Enter Component name:").grid(row=0) - self.e1 = Entry(master) - self.e1.grid(row=0, column=1,pady=10,columnspan=2) - - # Ask for component type - Label(master, text="Enter type of Component:").grid(row=1) - Label(master,text="Diode").grid(row=2,column=1,columnspan=2,sticky=W) - Radiobutton(master, text="Diode", variable=self.component, value="D").grid(row=3,column=1,columnspan=2,sticky=W) - Label(master, text="Bipolar Junction Transistor (BJT)").grid(row=4,column=1,columnspan=2,sticky=W) - Radiobutton(master, text="NPN", variable=self.component, value="NPN").grid(row=5,column=1,sticky=W) - Radiobutton(master, text="PNP", variable=self.component, value="PNP").grid(row=5,column=2,sticky=W) - Label(master, text="Metal Oxide Semiconductor (MOS)").grid(row=6,column=1,columnspan=2,sticky=W) - Radiobutton(master, text="NMOS(Level-1 5um)", variable=self.component, value="NMOS-5um").grid(row=7,column=1,sticky=W) - Radiobutton(master, text="PMOS(Level-1 5um)", variable=self.component, value="PMOS-5um").grid(row=7,column=2,sticky=W) - Radiobutton(master, text="NMOS(Level-3 0.5um)", variable=self.component, value="NMOS-0.5um").grid(row=8,column=1,sticky=W) - Radiobutton(master, text="PMOS(Level-3 0.5um)", variable=self.component, value="PMOS-0.5um").grid(row=8,column=2,sticky=W) - Radiobutton(master, text="NMOS(Level-8 180nm)", variable=self.component, value="NMOS-180nm").grid(row=9,column=1,sticky=W) - Radiobutton(master, text="PMOS(Level-8 180nm)", variable=self.component, value="PMOS-180nm").grid(row=9,column=2,sticky=W) - Label(master, text="Junction Field Effect Transistor (JFET)").grid(row=10,column=1,columnspan=2,sticky=W) - Radiobutton(master, text="N-JFET", variable=self.component, value="NJF").grid(row=11,column=1,sticky=W) - Radiobutton(master, text="P-JFET", variable=self.component, value="PJF").grid(row=11,column=2,sticky=W) - Label(master, text="IGBT").grid(row=12,column=1,columnspan=2,sticky=W) - Radiobutton(master, text="N-IGBT", variable=self.component, value="NIGBT").grid(row=13,column=1,sticky=W) - Radiobutton(master, text="P-IGBT", variable=self.component, value="PIGBT").grid(row=13,column=2,sticky=W) - Label(master, text="Magnetic Core").grid(row=14,column=1,columnspan=2,sticky=W) - Radiobutton(master, text="Magnetic Core", variable=self.component, value="CORE").grid(row=15,column=1,columnspan=2,sticky=W) - -# Collect model information - def apply(self): - self.modelType=self.component.get() - -# Validate the model information - def validate(self): - # Remove trailing and leading spaces from modelName - self.modelName=self.e1.get().strip() - if len(self.modelName): - return 1 - else: - tkMessageBox.showwarning("Bad input","Component Name is not specified, please try again") - return 0 - -class ModelParam(template.MyTemplate): - """Class for specifying parameter of the model""" - def __init__(self,parent,name,type): - # Collect model information - self.modelName=name - self.modelType=type - - # Call base class MyTemplate - template.MyTemplate.__init__(self,parent) - - def body(self, master): - try: - self.OSCAD_HOME=OSCAD_HOME - except NameError: - try: - self.OSCAD_HOME=os.environ["OSCAD_HOME"] - except KeyError: - tkMessageBox.showerror("Error OSCAD_HOME is not set","Please set OSCAD_HOME variable in .bashrc\n\nStep to set OSCAD_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export OSCAD_HOME=\" to it.\n 3) source ~/.bashrc") - exit(0) - - HOME=self.OSCAD_HOME+"/modelEditor/" - # Open template of the library file corresponding model - fileName=HOME+self.modelType+".lib" - # Find model information and parameters - self.info, self.params=readSpecs(fileName) - - # Construct parameter editor window - i,j=0,0 - for each in self.params.keys(): - # Display parameter name - Label(master, text=each, padx=5, pady=5).grid(row=j, column=2*i, sticky=W) - - # Create entry for parameter value - vars(self)[each] = Entry(master) - vars(self)[each].insert(0,self.params[each]) - vars(self)[each].grid(row=j, column=2*i+1) - - # Display help information in the status bar - vars(self)[each].bind('', self.enterSpec) - vars(self)[each].bind('', self.leaveSpec) - - # Column and row adjustment for proper display - i+=1 - if i%5==0: - i,j=0,j+1 - - def enterSpec(self,event): - self.statusbar.configure(text="Find help in the " +self.modelType+".hlp file") - - def leaveSpec(self,event): - self.statusbar.configure(text='') - - def apply(self): - # Copy model infomation - self.info[1]=self.modelName - self.info[2]=self.modelType - # Write model parameters to file - if self.writeModelFile(): - tkMessageBox.showinfo("Info","Model file " +self.modelName+" is created") - - def writeModelFile(self): - """ a method for writing model file""" - # Create model file for writing - try: - f = open(self.info[1]+".lib","w") - except : - tkMessageBox.showwarning("Error","Model file can not be wriiten. please check the file system permission") - return 0 - f.write(".model " + self.info[1] + " " + self.info[2] + "( ") - i=0 - for param in self.params.keys(): - paramName = getattr(self,param) - paramValueGet = getattr(paramName,'get') - f.write(param + "=" + paramValueGet()+" ") - i+=1 - # Column and row adjustment for proper display - if i%5==0: - i=0 - f.write("\n+ ") - f.write(")") - f.close() - return 1 - -def readSpecs(fileName): - """Read parameters and model information""" -# Variable to store parameter and model information - params={} - info=[] - -# Open parameter file - if os.path.exists(fileName): - try: - f = open(fileName) - except : - tkMessageBox.showwarning("Bad input","Model file does not exit, please try again") - return info, params - else: - tkMessageBox.showwarning("Bad input","Model file does not exit, please try again") - return info, params - data=f.read() - f.close() - -# Seperate model and parameter information - data=data.split('(') - infoData=data[0] - paramsData=data[1] - -# Collect model information in the list - info=infoData.split() - -# Collect model parameter in the dictionary - paramsData=paramsData.translate(maketrans('\n+)',' ')) - paramsData=paramsData.split() - for each in paramsData: - paramdata=each.split('=') - params[paramdata[0]]=paramdata[1] - return info, params - -if __name__=='__main__': - root=Tk() - model= ModelInfo(root) - modelParam = ModelParam(root,model.modelName,model.modelType) - mainloop() - diff --git a/OSCAD/modelEditor/openModel.py b/OSCAD/modelEditor/openModel.py deleted file mode 100755 index 6ba5947..0000000 --- a/OSCAD/modelEditor/openModel.py +++ /dev/null @@ -1,116 +0,0 @@ -#!/usr/bin/python -# openModel.py is a python script to open an existing model. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com) and Shalini Shrivastava. -# Copyright (C) 2012 Yogesh Dilip Save and Shalini Shrivastava, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from Tkinter import * -import template -import tkMessageBox -import os.path -from string import maketrans -from newModel import readSpecs - -class ExistingModelInfo(template.MyTemplate): - """ Class for accept model information from user """ - def body(self, master): - # Ask for compoent name - Label(master, text="Enter Component name:").grid(row=0) - self.e1 = Entry(master) - self.e1.grid(row=0, column=1,pady=10,columnspan=2) - -# Collect model information - def apply(self): - pass - -# Validate the model information - def validate(self): - # Remove trailing and leading spaces from modelName - self.modelName=self.e1.get().strip() - if len(self.modelName): - return 1 - else: - tkMessageBox.showwarning("Bad input","Component Name is not specified, please try again") - return 0 - -class ExistingModelParam(template.MyTemplate): - """Class for specifying parameter of the model""" - def __init__(self,parent,name): - # Collect model information - self.modelName=name - - # Call base class MyTemplate - template.MyTemplate.__init__(self,parent) - - - def body(self, master): - # Open template of the library file corresponding model - fileName=self.modelName+".lib" - # Find model information and parameters - self.info, self.params=readSpecs(fileName) - - # Return if model information is not available - if len(self.info) == 0: - self.cancel() - - # Construct parameter editor window - i,j=0,0 - for each in self.params.keys(): - # Display parameter name - Label(master, text=each, padx=5, pady=5).grid(row=j, column=2*i, sticky=W) - - # Create entry for parameter value - vars(self)[each] = Entry(master) - vars(self)[each].insert(0,self.params[each]) - vars(self)[each].grid(row=j, column=2*i+1) - - # Display help information in the status bar - vars(self)[each].bind('', self.enterSpec) - vars(self)[each].bind('', self.leaveSpec) - - # Column and row adjustment for proper display - i+=1 - if i%5==0: - i,j=0,j+1 - - def enterSpec(self,event): - self.statusbar.configure(text="Find help in the " +self.info[2]+".hlp file") - - def leaveSpec(self,event): - self.statusbar.configure(text='') - - def apply(self): - # Write model parameters to file - if self.writeModelFile(): - tkMessageBox.showinfo("Info","Model file " +self.modelName+" is modified") - - def writeModelFile(self): - """ a method for writing model file""" - # Create model file for writing - try: - f = open(self.info[1]+".lib","w") - except : - tkMessageBox.showwarning("Error","Model file can not be wriiten. please check the file system permission") - return 0 - f.write(".model " + self.info[1] + " " + self.info[2] + "( ") - i=0 - for param in self.params.keys(): - paramName = getattr(self,param) - paramValueGet = getattr(paramName,'get') - f.write(param + "=" + paramValueGet()+" ") - i+=1 - # Column and row adjustment for proper display - if i%5==0: - i=0 - f.write("\n+ ") - f.write(")") - f.close() - return 1 - -if __name__=='__main__': - root=Tk() - model= ExistingModelInfo(root) - modelParam = ExistingModelParam(root,model.modelName) - mainloop() - diff --git a/OSCAD/modelEditor/selectModel.py b/OSCAD/modelEditor/selectModel.py deleted file mode 100755 index 1ca1e86..0000000 --- a/OSCAD/modelEditor/selectModel.py +++ /dev/null @@ -1,155 +0,0 @@ -#!/usr/bin/python -# selectModel.py is a python script to select a component to create a model. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from setPath import OSCAD_HOME -from Tkinter import * -import template -import tkMessageBox -import os.path -import os -import Pmw -from string import maketrans - -class ModelNameList(): - """Class for specifying parameter of the model""" - def __init__(self,parent,filename): - self.parent=parent - self.modelName="" - self.modelType="" - self.modelList=[] - self.click_result="" - - # Collect model information from the circuit file - try: - self.OSCAD_HOME=OSCAD_HOME - except NameError: - try: - self.OSCAD_HOME=os.environ["OSCAD_HOME"] - except KeyError: - tkMessageBox.showerror("Error OSCAD_HOME is not set","Please set OSCAD_HOME variable in .bashrc\n\nStep to set OSCAD_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export OSCAD_HOME=\" to it.\n 3) source ~/.bashrc") - exit(0) - - HOME=self.OSCAD_HOME="/modelEditor/" - # Open the circuit file - self.fileName=filename - # Open parameter file - if os.path.exists(self.fileName): - try: - f = open(self.fileName) - except : - tkMessageBox.showwarning("Bad input","Circuit netlist does not exit, please try again") - return - else: - tkMessageBox.showwarning("Bad input","Circuit netlist does not exit, please try again") - return - - # Read the data from file - data=f.read() - - # Close the file - f.close() - netlist=data.splitlines() - # Find the various model library required - self.modelInfo={} - - for eachline in netlist: - eachline=eachline.strip() - if len(eachline)>1: - eachline=eachline.lower() - words=eachline.split() - if eachline[0]=='d': - modelName=words[3] - modelType=words[3] - self.modelList.append(words[0]+":"+modelName) - self.modelInfo[modelName]=modelType - elif eachline[0]=='q': - modelName=words[4] - if words[4]=='npn': - modelType="NPN" - elif words[4]=='pnp': - modelType="PNP" - else: - modelType=words[4] - - self.modelList.append(words[0]+":"+modelName) - self.modelInfo[modelName]=modelType - - elif eachline[0]=='m': - modelName=words[4] - if words[4]=='nmos': - modelType="NMOS" - elif words[4]=='pmos': - modelType="PMOS" - else: - modelType=words[4] - self.modelList.append(words[0]+":"+modelName) - self.modelInfo[modelName]=modelType - - elif eachline[0]=='j': - modelName=words[4] - if words[4]=='pjf': - modelType='PJF' - elif words[4]=='njf': - modelType='NJF' - else: - modelType=words[4] - self.modelList.append(words[0]+":"+modelName) - self.modelInfo[modelName]=modelType - else: - continue - - # Create the dialog. - - self.dialog = Pmw.SelectionDialog(parent, - title = 'Model Selector', - buttons = ('OK', 'Cancel'), - defaultbutton = 'OK', - scrolledlist_labelpos = 'n', - label_text = 'Please select the model', - scrolledlist_items=self.modelList, - command = self.apply, - ) - self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) - self.dialog.activate() - - # Protocol when window is deleted. - self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) - - def apply(self,result): - sels = self.dialog.getcurselection() - self.click_result=result - if result=="OK": - if len(sels) == 0: - print 'You clicked on', result, '(no selection)' - return - else: - self.modelName=sels[0].partition(':')[2] - self.modelType=self.modelInfo[self.modelName] - self.status=1 - - else: - self.status=0 - self.dialog.withdraw() - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.dialog.deactivate() - -# Action taken when cancel pressed - def cancel(self, event=None, status=0): - # Catch the status - self.status=status - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.destroy() - -if __name__=='__main__': - root=Tk() - model= ModelNameList(root,"xxx") - mainloop() - diff --git a/OSCAD/modelEditor/setPath.py b/OSCAD/modelEditor/setPath.py deleted file mode 100755 index 839d518..0000000 --- a/OSCAD/modelEditor/setPath.py +++ /dev/null @@ -1,2 +0,0 @@ -#!/usr/bin/python -OSCAD_HOME="/home/ambi/OSCAD" diff --git a/OSCAD/modelEditor/template.py b/OSCAD/modelEditor/template.py deleted file mode 100755 index 5b2ee06..0000000 --- a/OSCAD/modelEditor/template.py +++ /dev/null @@ -1,114 +0,0 @@ -#!/usr/bin/python -from Tkinter import * -import os - - -class MyTemplate(Toplevel): - """Template to construct new window""" -# Define constructor - def __init__(self, parent, title=None): - # Set new window properties same as parent - Toplevel.__init__(self, parent) - # Create a new window on top of the parent such that don't appear in taskbar - self.transient(parent) - - # Set the title - if title: - self.title(title) - # Set Parent of active window - self.parent =parent - - # Create a new frame - body =Frame (self) - - # Call body method - self.initial_focus = self.body(body) - # Display body - body.pack(padx=5, pady=5) - - # Create buttons - self.buttonbox() - # Create status bar - self.statusBar() - # Take control of all the events - self.grab_set() - - # Take control of all the keyboard events - if not self.initial_focus: - self.initial_focus=self - - # Protocol when window is deleted. - self.protocol("WM_DELETE_WINDOW",self.cancel) - - # Position the geometry respect to main window - self.geometry("+%d+%d" % (parent.winfo_rootx()+50,parent.winfo_rooty()+50)) - self.initial_focus.focus_set() - - - # Wait for widget to be destroyed - self.wait_window(self) - -# Construction of body of the window - def body(self, master): - # Create dialog body. This method should be overridden - pass - -# Add standard button box (OK, Cancel). Override if you don't want the standard buttons - def buttonbox(self): - # Construct a new frame - box = Frame(self) - # Create buttons - w = Button(box, text="OK", width=10, command=self.ok, default=ACTIVE) - w.pack(side=LEFT, padx=5, pady=5) - w = Button(box, text="Cancel", width=10, command=self.cancel) - w.pack(side=LEFT, padx=5, pady=5) - - # Bind Return and escape keys - self.bind("", self.ok) - self.bind("", self.cancel) - # Create the frame "box" - box.pack() - -# Add standard status bar. Override if you don't want the status bar - def statusBar(self): - self.statusbar = Label(self, text="", bd=1, relief=SUNKEN, anchor=W) - self.statusbar.pack(side=BOTTOM, fill=X) - -# Template for action taken when OK is pressed - def ok(self, event=None): - # If data is not valid then put the focus back - if not self.validate(): - self.initial_focus.focus_set() - return - # Remove the window from the screen (without destroying it) - self.withdraw() - # Call all pending idle tasks, without processing any other events. - self.update_idletasks() - # Perform required task (collection of result, inputs etc.) - self.apply() - # Take action when all task has finished - self.cancel(status=1) - -# Template for action taken when cancel pressed - def cancel(self, event=None, status=0): - # Catch the status - self.status=status - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.destroy() - -# Template for validation of data - def validate(self): - return 1 - -# Template for required action (Saving Data, results) - def apply(self): - pass - -# Test case -if __name__=='__main__': - root=Tk() - d =MyTemplate(root) - mainloop() - diff --git a/OSCAD/modelLibrary/1n4007.lib b/OSCAD/modelLibrary/1n4007.lib deleted file mode 100755 index 89d421d..0000000 --- a/OSCAD/modelLibrary/1n4007.lib +++ /dev/null @@ -1,2 +0,0 @@ -.model 1n4007 D( IS=7.02767e-09 RS=0.0341512 N=1.80803 EG=1.05743 XTI=5 BV=1000 IBV=5e-08 CJO=1E-11 -+VJ=0.7 M=0.5 FC=0.5 TT=1E-07 KF=0 AF=1 ) diff --git a/OSCAD/modelLibrary/1n4148.lib b/OSCAD/modelLibrary/1n4148.lib deleted file mode 100755 index b32fdf8..0000000 --- a/OSCAD/modelLibrary/1n4148.lib +++ /dev/null @@ -1,2 +0,0 @@ -.model 1n4148 D( Is=2.495E-09 Rs=4.755E-01 n=1.679 tt=3.030E-09 Cjo=1.700E-12 M=1.959E-01 -+ Vj=1 Bv=1.000E+02 ibv=1.000E-04 ) diff --git a/OSCAD/modelLibrary/CORE.lib b/OSCAD/modelLibrary/CORE.lib deleted file mode 100755 index c48c4b5..0000000 --- a/OSCAD/modelLibrary/CORE.lib +++ /dev/null @@ -1,2 +0,0 @@ -.model K3019PL_3C8 Core(MS=415.2K A=44.82 C=.4112 K=25.74 -+ Area=1.38 Path=4.52) diff --git a/OSCAD/modelLibrary/D.lib b/OSCAD/modelLibrary/D.lib deleted file mode 100755 index 890c37f..0000000 --- a/OSCAD/modelLibrary/D.lib +++ /dev/null @@ -1,3 +0,0 @@ -.model D1N750 D( Is=880.5E-18 Rs=.25 Ikf=0 N=1 Xti=3 Eg=1.11 Cjo=175p M=.5516 -+ Vj=.75 Fc=.5 Isr=1.859n Nr=2 Bv=8.1 Ibv=20.245m Nbv=1.6989 Ibvl=1.9556m -+ Nbvl=14.976 Tbv1=-21.277u) diff --git a/OSCAD/modelLibrary/NIGBT.lib b/OSCAD/modelLibrary/NIGBT.lib deleted file mode 100755 index 8c09dcb..0000000 --- a/OSCAD/modelLibrary/NIGBT.lib +++ /dev/null @@ -1,10 +0,0 @@ -.MODEL IXGH40N60 NIGBT ( -+ TAU=287.56E-9 -+ KP=50.034 -+ AREA=37.500E-6 -+ AGD=18.750E-6 -+ VT=4.1822 -+ KF=.36047 -+ CGS=31.942E-9 -+ COXD=53.188E-9 -+ VTD=2.6570) diff --git a/OSCAD/modelLibrary/NJF.lib b/OSCAD/modelLibrary/NJF.lib deleted file mode 100755 index dbb2cba..0000000 --- a/OSCAD/modelLibrary/NJF.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 -+ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u -+ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 -+ Af=1) diff --git a/OSCAD/modelLibrary/NMOS-0.5um.lib b/OSCAD/modelLibrary/NMOS-0.5um.lib deleted file mode 100755 index 2e6f463..0000000 --- a/OSCAD/modelLibrary/NMOS-0.5um.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model mos_n NMOS( TPG=1 TOX=9.5n CJ=550u ETA=0.02125 VMAX=1.8E05 -+ GAMMA=0.62 CGSO=0.3n LD=50n MJSW=0.35 PB=1.1 -+ CGBO=0.45n XJ=0.2U CGDO=0.3n KAPPA=0.1 LEVEL=3 -+ VTO=0.6 NFS=7.20E11 THETA=0.23 CJSW=0.3n PHI=0.7 -+ RSH=2.0 MJ=0.6 UO=420 KP=156u DELTA=0.88 -+ NSUB=1.40E17 ) \ No newline at end of file diff --git a/OSCAD/modelLibrary/NMOS-180nm.lib b/OSCAD/modelLibrary/NMOS-180nm.lib deleted file mode 100644 index 51e9b11..0000000 --- a/OSCAD/modelLibrary/NMOS-180nm.lib +++ /dev/null @@ -1,13 +0,0 @@ -.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 -+ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 -+ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18 -+ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4 -+ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0 -+ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0 -+ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3 -+ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1 -+ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 -+ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12 -+ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 -+ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 -+ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3) diff --git a/OSCAD/modelLibrary/NMOS-5um.lib b/OSCAD/modelLibrary/NMOS-5um.lib deleted file mode 100755 index a237e1f..0000000 --- a/OSCAD/modelLibrary/NMOS-5um.lib +++ /dev/null @@ -1,5 +0,0 @@ -* 5um technology - -.model mos_n NMOS( Cgso=0.4n Tox=85n Vto=1 phi=0.7 -+ Level=1 -+ Mj=.5 UO=750 Cgdo=0.4n Gamma=1.4 LAMBDA=0.01 LD=0.7u JS=1u CJ=0.4m CJSW=0.8n MJSW=0.5 PB=0.7 CGBO=0.2n ) diff --git a/OSCAD/modelLibrary/NPN.lib b/OSCAD/modelLibrary/NPN.lib deleted file mode 100755 index 6509fe7..0000000 --- a/OSCAD/modelLibrary/NPN.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 -+ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p -+ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p -+ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/OSCAD/modelLibrary/PIGBT.lib b/OSCAD/modelLibrary/PIGBT.lib deleted file mode 100755 index d4f9e81..0000000 --- a/OSCAD/modelLibrary/PIGBT.lib +++ /dev/null @@ -1,10 +0,0 @@ -.MODEL IXGH40N60 PIGBT ( -+ TAU=287.56E-9 -+ KP=50.034 -+ AREA=37.500E-6 -+ AGD=18.750E-6 -+ VT=4.1822 -+ KF=.36047 -+ CGS=31.942E-9 -+ COXD=53.188E-9 -+ VTD=2.6570) diff --git a/OSCAD/modelLibrary/PJF.lib b/OSCAD/modelLibrary/PJF.lib deleted file mode 100755 index 5589571..0000000 --- a/OSCAD/modelLibrary/PJF.lib +++ /dev/null @@ -1,5 +0,0 @@ -.model J2N3820 PJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 -+ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u -+ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 -+ Af=1) - diff --git a/OSCAD/modelLibrary/PMOS-0.5um.lib b/OSCAD/modelLibrary/PMOS-0.5um.lib deleted file mode 100755 index 848e8b0..0000000 --- a/OSCAD/modelLibrary/PMOS-0.5um.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model mos_p PMOS( TPG=-1 TOX=9.5n CJ=950u ETA=0.025 VMAX=0.3u -+ GAMMA=0.52 CGSO=0.35n LD=70n MJSW=0.25 PB=1 -+ CGBO=0.45n XJ=0.2U CGDO=0.35n KAPPA=8.0 LEVEL=3 -+ VTO=-0.6 NFS=6.50E11 THETA=0.2 CJSW=0.2n PHI=0.7 -+ RSH=2.5 MJ=0.5 UO=130 KP=48u DELTA=0.25 -+ NSUB=1.0E17 ) \ No newline at end of file diff --git a/OSCAD/modelLibrary/PMOS-180nm.lib b/OSCAD/modelLibrary/PMOS-180nm.lib deleted file mode 100644 index 032b5b9..0000000 --- a/OSCAD/modelLibrary/PMOS-180nm.lib +++ /dev/null @@ -1,11 +0,0 @@ -.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015 -+ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363 -+ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478 -+ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677 -+ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 -+ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148 -+ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10 -+ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 -+ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 -+ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3 -+ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3) diff --git a/OSCAD/modelLibrary/PMOS-5um.lib b/OSCAD/modelLibrary/PMOS-5um.lib deleted file mode 100755 index 9c3ed97..0000000 --- a/OSCAD/modelLibrary/PMOS-5um.lib +++ /dev/null @@ -1,5 +0,0 @@ -*5um technology - -.model mos_p PMOS( Cgso=0.4n Tox=85n Vto=-1 phi=0.65 -+ Level=1 -+ Mj=.5 UO=250 Cgdo=0.4n Gamma=0.65 LAMBDA=0.03 LD=0.6u JS=1u CJ=0.18m CJSW=0.6n MJSW=0.5 PB=0.7 CGBO=0.2n ) diff --git a/OSCAD/modelLibrary/PNP.lib b/OSCAD/modelLibrary/PNP.lib deleted file mode 100755 index 7edda0e..0000000 --- a/OSCAD/modelLibrary/PNP.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 -+ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 -+ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 -+ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/OSCAD/report/presentation/Makefile b/OSCAD/report/presentation/Makefile deleted file mode 100644 index f6b4245..0000000 --- a/OSCAD/report/presentation/Makefile +++ /dev/null @@ -1,39 +0,0 @@ -LATEX=latex -BIBTEX=bibtex -PDFLATEX=pdflatex -RM=rm -CP=cp -MAKEINDEX=makeindex -DVITOPS=dvips -DVIPDF=dvipdf -PSTOPDF=ps2pdf - -DEPENDENCIES= *.tex Makefile -MAINFILE=OSCAD - -all: $(MAINFILE).pdf - -$(MAINFILE).dvi: $(DEPENDENCIES) - $(LATEX) $(MAINFILE) -# $(BIBTEX) $(MAINFILE) -# $(LATEX) $(MAINFILE) -# $(LATEX) $(MAINFILE) -# $(CP) $(MAINFILE).idx $(MAINFILE).ind -# $(MAKEINDEX) $(MAINFILE).idx -# $(LATEX) $(MAINFILE).tex - -#-Ppdf option -#Type fonts are scalable and looks good on pdf file -#default is bitmaps which are suitable for printer only not scalable - -#$(MAINFILE).ps: $(MAINFILE).dvi -# $(DVITOPS) -Ppdf -G0 $(MAINFILE).dvi -o $(MAINFILE).ps -#$(MAINFILE).pdf: $(MAINFILE).ps -# $(PSTOPDF) -sPAPERSIZE=a4 -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 -dSubsetFonts=true -dEmbedAllFonts=true $(MAINFILE).ps -$(MAINFILE).pdf: $(MAINFILE).dvi - $(DVIPDF) $(MAINFILE).dvi - -clean: - $(RM) -f $(MAINFILE).pdf $(MAINFILE).ps $(MAINFILE).dvi -cleanall: - $(RM) -f $(MAINFILE).pdf $(MAINFILE).ps $(MAINFILE).dvi *.aux *.log *.ind *.ilg *.idx *.toc diff --git a/OSCAD/report/presentation/OSCAD.tex b/OSCAD/report/presentation/OSCAD.tex deleted file mode 100644 index 8c05f23..0000000 --- a/OSCAD/report/presentation/OSCAD.tex +++ /dev/null @@ -1,179 +0,0 @@ -%$Header: /cvsroot/latex-beamer/latex-beamer/solutions/generic-talks/generic-ornate-15min-45min.en.tex,v 1.4 2004/10/07 20:53:08 tantau Exp $ -\documentclass{beamer} -\mode -{ - \usecolortheme{seahorse} - \usefonttheme{professionalfonts} - \useinnertheme{rounded} - \useoutertheme{shadow} -% \useoutertheme{smoothbars} -} -%\setbeamertemplate{background canvas}[vertical shading][bottom=white!10,top=blue!5] -\usepackage{verbatim} -\usepackage[english]{babel} -\usepackage[latin1]{inputenc} -\usepackage{pgf,pgfarrows,pgfnodes,pgfautomata,pgfheaps,pgfshade} -\usepackage{amsmath,amsfonts,amsthm,amssymb} -\usepackage{times} -\usepackage[T1]{fontenc} -\usepackage{graphics} -\usepackage{graphicx} -%\usepackage{psfig} -\usepackage{algorithmic} - -\title -{Open source CAD tool for electronic and electrical engineers} - -\author[] -{Yogesh Dilip Save} -\institute -{ - Indian Institute of Technology, Bombay -} -%\pgfdeclareimage[height=0.7cm]{university-logo}{iitblogo.eps} -%\logo{\pgfuseimage{university-logo}} - - -\date[seminar] % (optional) -{\today} - - -\begin{document} -%*************************************************************************************** -\begin{frame} - \titlepage -\end{frame} -%*************************************************************************************** -\begin{frame} - \frametitle{Presentation Outline} - \tableofcontents -\end{frame} -%*************************************************************************************** - -\section{Modules} -\begin{frame} - \frametitle{Modules} -\begin{block}{} -\begin{itemize} -\item eeschema -- Schematic Editor -\item CvPCB -- Component-Footprint mapper -\item pcbnew -- PCB Layout Editor -\item Analysis Inserter -\item Component Model Builder -\item Component Sub-circuit Builder -\item Kicad to Ngspice netlist converter -\item Circuit Simulator -- Ngspice -\item Scilab based circuit simulator -- SMCSim -\end{itemize} -\end{block} -\end{frame} - -\begin{frame} -\frametitle{eeschema} -\begin{block}{Problems} -\begin{itemize} -\item No fictitious components (sources) -\item[Sol:] Build a library of different kind of voltage and current sources (pulse, sine, exponential etc.) -\item Too many components -\item[Sol:] Build own libraries (include the components supported by ngspice (explicitly or implicitly)). \\ - Libraries (analogSpice (analog components) and digitalSpice (digital components)) can be built by - \begin{enumerate} - \item Creating own components. - \item Coping components from existing libraries. - \end{enumerate} -\item No measurement modules -\item[Sol:] Build a library which gives you functionality of printing and plotting solution. -\end{itemize} -\end{block} -\end{frame} - -\begin{frame} -\begin{block}{ CvPCB and pcbnew} -Add footprint for new components. -\end{block} -\end{frame} - -\begin{frame} -\begin{block}{Netlist Converter} -\begin{itemize} -\item Insert parameters for fictitious components -\item Convert IC into discrete blocks -\item Insert D-A and A-D converter at appropriate place, -\item Insert plotting and printing statement in netlist. -\item Find current through all components. -\end{itemize} -\end{block} -\end{frame} - -\begin{frame} -\begin{block}{Analysis Inserter} -\begin{itemize} -\item Insert type of analysis -\item Option of analysis -\item Option of simulator -\end{itemize} -\end{block} -\end{frame} - -\begin{frame} - \begin{block}{Model Editor} - \begin{itemize} - \item Provides facility to define new model. - \begin{itemize} - \item Diode - \item Bipolar Junction Transistor (BJT) - \item Metal Oxide Semiconductor (MOS) - \item Junction Field Effect Transistor (JFET) - \item IGBT - \item Magnetic core - \end{itemize} - \item Provides facility to edit existing model. - \item Provides help related to model parameter. - \end{itemize} - \end{block} -\end{frame} - -\begin{frame} - \begin{block}{Sub-circuit Editor} - \begin{itemize} - \item Provides facility to define new components. - \begin{itemize} - \item Op-amp - \item Timer-IC555 - \end{itemize} - \item Provides facility to edit existing sub-circuit. - \item Provides help related to components parameters. - \end{itemize} - \end{block} -\end{frame} - -\begin{frame} -\begin{block}{Circuit Simulator} -\begin{itemize} -\item Ngspice -\item SMCSim -\end{itemize} -\end{block} -\end{frame} - -\begin{frame} -\begin{block}{Future Plan} -\begin{itemize} -\item More consolidation of Kicad NgSpice netlist converter (nearly 10 days). -\item Build a descent GUI and remove the bugs in integration (nearly 10 days). -\item Simulate more examples which cover most of the syllabus of undergraduate in circuit theory (nearly 10 days). -\end{itemize} -\end{block} -\end{frame} - -\begin{frame} -\begin{block}{May be...........} -\begin{itemize} -\item Scilab based simulator -\item Extend Scilab based simulator for mix circuit simulation -\end{itemize} -\end{block} -\end{frame} - -\end{document} - diff --git a/OSCAD/report/presentation/runlatex b/OSCAD/report/presentation/runlatex deleted file mode 100644 index 1e21dcf..0000000 --- a/OSCAD/report/presentation/runlatex +++ /dev/null @@ -1,3 +0,0 @@ -#!/bin/bash -latex $1.tex -dvipdf $1.dvi diff --git a/OSCAD/setPath.py b/OSCAD/setPath.py deleted file mode 100644 index 778e6f3..0000000 --- a/OSCAD/setPath.py +++ /dev/null @@ -1,2 +0,0 @@ -#!/usr/bin/python -OSCAD_HOME="/home/hardik/OSCAD" diff --git a/OSCAD/setPathInstall.py b/OSCAD/setPathInstall.py deleted file mode 100644 index 4847f8b..0000000 --- a/OSCAD/setPathInstall.py +++ /dev/null @@ -1,2 +0,0 @@ -#!/usr/bin/python -OSCAD_HOME=set_PATH_to_OSCAD diff --git a/OSCAD/subcktEditor/createSubckt.py b/OSCAD/subcktEditor/createSubckt.py deleted file mode 100644 index 8ae853a..0000000 --- a/OSCAD/subcktEditor/createSubckt.py +++ /dev/null @@ -1,72 +0,0 @@ -#!/usr/bin/python -# createSubckt.py is a python script to convert a Kicad spice netlist to a ngspice subcircuit netlist. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -import sys -import os.path -from setPath import OSCAD_HOME - -def createSubckt(subcktName): - """Read subcircuit netList""" - command="xterm -e \""+OSCAD_HOME+"/kicadtoNgspice/KicadtoNgspice.py "+subcktName+".cir 0\"" - os.system(command) - -# Open file if it exists - if os.path.exists(subcktName+".cir.out"): - try: - f = open(subcktName+".cir.out") - except : - print("Error in opening circuit file.") - return 1 - else: - print subcktName + ".cir.out does not exist. Please create a spice netlist." - return 1 - -# Read the data from file - data=f.read() - -# Close the file - f.close() - netlist=data.splitlines() - - newNetlist=[] - for eachline in netlist: - eachline=eachline.strip() - if len(eachline)<1: - continue - words=eachline.split() - if eachline[0]=='u': - if words[len(words)-1]=="port": - subcktInfo=".subckt "+subcktName+" " - for i in range(1,len(words)-1): - subcktInfo+=words[i]+" " - continue - if words[0]==".end": - continue - else: - newNetlist.append(eachline) - - outfile=subcktName+".sub" - out=open(outfile,"w") - out.writelines("* Subcircuit " + subcktName) - out.writelines('\n') - out.writelines(subcktInfo) - out.writelines('\n') - - # for subcktName in subcktList: - # out.writelines('.include '+subcktName+'.sub\n') - # ckt.writelines('.include '+subcktName+'.sub\n') - - # Add newline in the schematic information - for i in range(len(newNetlist),0,-1): - newNetlist.insert(i,'\n') - - out.writelines(newNetlist) - out.writelines('\n') - - out.writelines('.ends ' + subcktName) - print "The subcircuit has been written in "+subcktName+".sub" - return 0 diff --git a/OSCAD/subcktEditor/exportSubckt.py b/OSCAD/subcktEditor/exportSubckt.py deleted file mode 100644 index fa992b2..0000000 --- a/OSCAD/subcktEditor/exportSubckt.py +++ /dev/null @@ -1,78 +0,0 @@ -#!/usr/bin/python -# exportSubckt.py is a python script to export a component difinition to the library. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from setPath import OSCAD_HOME -from Tkinter import * -from Tkinter import * -import template -import tkMessageBox -import os.path -import os -import Pmw -from string import maketrans - -class ExportSubckt(): - """Class for exporting the model to the model library""" - def __init__(self,parent): - self.parent=parent - self.Name="" - # Collect model information available in the project directory - fileList=os.listdir(".") - subcktList=[] - - for fileName in fileList: - if "sub" in fileName: - subcktName=fileName.split('.') - subcktList.append(subcktName[0]) - - # Create the dialog. - self.dialog = Pmw.SelectionDialog(parent, - title = 'Subckt Selector', - buttons = ('OK', 'Cancel'), - defaultbutton = 'OK', - scrolledlist_labelpos = 'n', - label_text = 'Please select the subckt', - scrolledlist_items=subcktList, - command = self.apply, - ) - self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) - self.dialog.activate() - - # Protocol when window is deleted. - self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) - - def apply(self,result): - sels = self.dialog.getcurselection() - if result=="OK": - if len(sels) == 0: - print 'You clicked on', result, '(no selection)' - return - else: - self.Name=sels[0] - self.status=1 - else: - self.status=0 - self.dialog.withdraw() - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.dialog.deactivate() - -# Action taken when cancel pressed - def cancel(self, event=None, status=0): - # Catch the status - self.status=status - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.destroy() - -if __name__=='__main__': - root=Tk() - subckt= ExportSubckt(root,"xxx") - mainloop() - diff --git a/OSCAD/subcktEditor/exportSubckt_back b/OSCAD/subcktEditor/exportSubckt_back deleted file mode 100644 index ad07fbd..0000000 --- a/OSCAD/subcktEditor/exportSubckt_back +++ /dev/null @@ -1,99 +0,0 @@ -#!/usr/bin/python -# exportSubckt.py is a python script to export a subcircuit model from a subckt library. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from setPath import OSCAD_HOME -from Tkinter import * -import template -import tkMessageBox -import os.path -import os -import Pmw -from string import maketrans - -class SubcktLibInfo(): - """Class for specifying parameter of the subckt""" - def __init__(self,parent): - self.parent=parent - self.subcktName="" - # Collect subckt information from the circuit file - try: - self.OSCAD_HOME=OSCAD_HOME - except NameError: - try: - self.OSCAD_HOME=os.environ["OSCAD_HOME"] - except KeyError: - tkMessageBox.showerror("Error OSCAD_HOME is not set","Please set OSCAD_HOME variable in .bashrc\n\nStep to set OSCAD_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export OSCAD_HOME=\" to it.\n 3) source ~/.bashrc") - exit(0) - - HOME=self.OSCAD_HOME+"/subcktLibrary/" - # List all the subcircuit file - subcktList=os.popen("ls "+HOME+"*.sub").read() - subcktList1=[] - i=0 - subcktList1.append("") - for char in subcktList: - if char!='\n': - subcktList1[i]=subcktList1[i]+char - else: - i=i+1 - subcktList1.append("") - - subcktList=[] - for subckt in subcktList1: - words=subckt.split('/') - if len(words): - subckt1=words[len(words)-1] - subcktList.append(subckt1) - subcktList.remove('') - - # Create the dialog. - self.dialog = Pmw.SelectionDialog(parent, - title = 'Subckt Selector', - buttons = ('OK', 'Cancel'), - defaultbutton = 'OK', - scrolledlist_labelpos = 'n', - label_text = 'Please select the subckt', - scrolledlist_items=subcktList, - command = self.apply, - ) - self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) - self.dialog.activate() - - # Protocol when window is deleted. - self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) - - def apply(self,result): - sels = self.dialog.getcurselection() - if result=="OK": - if len(sels) == 0: - print 'You clicked on', result, '(no selection)' - return - else: - self.subcktName=self.OSCAD_HOME+"/subcktLibrary/"+sels[0] - self.status=1 - else: - self.status=0 - self.dialog.withdraw() - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.dialog.deactivate() - -# Action taken when cancel pressed - def cancel(self, event=None, status=0): - # Catch the status - self.status=status - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.destroy() - -if __name__=='__main__': - root=Tk() - subckt= SubcktLibInfo(root) - mainloop() - diff --git a/OSCAD/subcktEditor/helpEditor.py b/OSCAD/subcktEditor/helpEditor.py deleted file mode 100644 index 55c8370..0000000 --- a/OSCAD/subcktEditor/helpEditor.py +++ /dev/null @@ -1,37 +0,0 @@ -#!/usr/bin/python -from Tkinter import * -import template -import tkMessageBox -import os.path -from string import maketrans -from newModel import readSpecs - -class HelpInfo(template.MyTemplate): - """ Class for displaying help information """ - def body(self, master): - # Help heading - master.configure(width=768, height=576) - Label(master, text="Ngspice Model Editor Help", font=("Helvetica", 16), padx=20, pady=20).grid(row=0) - -# Add standard button box (OK) - def buttonbox(self): - # Construct a new frame - box = Frame(self) - # Create buttons - w = Button(box, text="OK", width=10, command=self.ok, default=ACTIVE) - w.pack(padx=5, pady=5) - - # Bind Return and escape keys - self.bind("", self.ok) - self.bind("", self.ok) - # Create the frame "box" - box.pack() - - def statusBar(self): - pass - -if __name__=='__main__': - root=Tk() - model= HelpInfo(root) - mainloop() - diff --git a/OSCAD/subcktEditor/importSubckt.py b/OSCAD/subcktEditor/importSubckt.py deleted file mode 100644 index 4fae86b..0000000 --- a/OSCAD/subcktEditor/importSubckt.py +++ /dev/null @@ -1,87 +0,0 @@ -#!/usr/bin/python -# importSubckt.py is a python script to import a component subcircuit definition from library. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from setPath import OSCAD_HOME -from Tkinter import * -from Tkinter import * -import template -import tkMessageBox -import os.path -import os -import Pmw -from string import maketrans - -class ImportSubckt(): - """Class for importing a subckt from the library""" - def __init__(self,parent): - self.parent=parent - self.Name="" - # Collect model information available in the model library - try: - self.OSCAD_HOME=OSCAD_HOME - except NameError: - try: - self.OSCAD_HOME=os.environ["OSCAD_HOME"] - except KeyError: - tkMessageBox.showerror("Error OSCAD_HOME is not set","Please set OSCAD_HOME variable in .bashrc\n\nStep to set OSCAD_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export OSCAD_HOME=\" to it.\n 3) source ~/.bashrc") - exit(0) - - fileList=os.listdir(self.OSCAD_HOME+"/subcktLibrary") - subcktList=[] - - for fileName in fileList: - if "sub" in fileName: - subcktName=fileName.split('.') - subcktList.append(subcktName[0]) - - # Create the dialog. - self.dialog = Pmw.SelectionDialog(parent, - title = 'Sub-circuit Selector', - buttons = ('OK', 'Cancel'), - defaultbutton = 'OK', - scrolledlist_labelpos = 'n', - label_text = 'Please select the subcircuit', - scrolledlist_items=subcktList, - command = self.apply, - ) - self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) - self.dialog.activate() - - # Protocol when window is deleted. - self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) - - def apply(self,result): - sels = self.dialog.getcurselection() - if result=="OK": - if len(sels) == 0: - print 'You clicked on', result, '(no selection)' - return - else: - self.Name=sels[0] - self.status=1 - else: - self.status=0 - self.dialog.withdraw() - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.dialog.deactivate() - -# Action taken when cancel pressed - def cancel(self, event=None, status=0): - # Catch the status - self.status=status - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.destroy() - -if __name__=='__main__': - root=Tk() - subckt= ImportSubckt(root,"xxx") - mainloop() - diff --git a/OSCAD/subcktEditor/newSubckt.py b/OSCAD/subcktEditor/newSubckt.py deleted file mode 100644 index f97f639..0000000 --- a/OSCAD/subcktEditor/newSubckt.py +++ /dev/null @@ -1,40 +0,0 @@ -#!/usr/bin/python -# newSubckt.py is a python script to create a new subcircuit for a component. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from Tkinter import * -import template -import tkMessageBox -import os.path -from string import maketrans - -class SubcktInfo(template.MyTemplate): - """ Class for accept subckt information from user """ - def body(self, master): - # Ask for compoent name - Label(master, text="Enter Component name:").grid(row=0) - self.e1 = Entry(master) - self.e1.grid(row=0, column=1,pady=10,columnspan=2) - -# Collect subckt information - def apply(self): - pass - -# Validate the subckt information - def validate(self): - # Remove trailing and leading spaces from subcktName - self.subcktName=self.e1.get().strip() - if len(self.subcktName): - return 1 - else: - tkMessageBox.showwarning("Bad input","Component Name is not specified, please try again") - return 0 - -if __name__=='__main__': - root=Tk() - subckt= SubcktInfo(root) - mainloop() - diff --git a/OSCAD/subcktEditor/openSubckt.py b/OSCAD/subcktEditor/openSubckt.py deleted file mode 100644 index 9d0fc02..0000000 --- a/OSCAD/subcktEditor/openSubckt.py +++ /dev/null @@ -1,40 +0,0 @@ -#!/usr/bin/python -# openSubckt.py is a python script to open an existing subcircuit. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from Tkinter import * -import template -import tkMessageBox -import os.path -from string import maketrans - -class ExistingSubcktInfo(template.MyTemplate): - """ Class for accept subckt information from user """ - def body(self, master): - # Ask for compoent name - Label(master, text="Enter Component name:").grid(row=0) - self.e1 = Entry(master) - self.e1.grid(row=0, column=1,pady=10,columnspan=2) - -# Collect subckt information - def apply(self): - pass - -# Validate the subckt information - def validate(self): - # Remove trailing and leading spaces from subcktName - self.subcktName=self.e1.get().strip() - if len(self.subcktName): - return 1 - else: - tkMessageBox.showwarning("Bad input","Component Name is not specified, please try again") - return 0 - -if __name__=='__main__': - root=Tk() - subckt= ExistingSubcktInfo(root) - mainloop() - diff --git a/OSCAD/subcktEditor/selectSubckt.py b/OSCAD/subcktEditor/selectSubckt.py deleted file mode 100644 index 2bc7ac9..0000000 --- a/OSCAD/subcktEditor/selectSubckt.py +++ /dev/null @@ -1,107 +0,0 @@ -#!/usr/bin/python -from setPath import OSCAD_HOME -from Tkinter import * -import template -import tkMessageBox -import os.path -import os -import Pmw -from string import maketrans - -class SubcktNameList(): - """Class for specifying parameter of the subckt""" - def __init__(self,parent,filename): - self.parent=parent - self.subcktName="" - # Collect subckt information from the circuit file - try: - self.OSCAD_HOME=OSCAD_HOME - except NameError: - try: - self.OSCAD_HOME=os.environ["OSCAD_HOME"] - except KeyError: - tkMessageBox.showerror("Error OSCAD_HOME is not set","Please set OSCAD_HOME variable in .bashrc\n\nStep to set OSCAD_HOME variable:\n 1) Open ~/.bashrc using text editor (vi ~/.bash).\n 2) Add the line \"Export OSCAD_HOME=\" to it.\n 3) source ~/.bashrc") - exit(0) - - HOME=self.OSCAD_HOME+"/subcktEditor/" - # Open the circuit file - self.fileName=filename - # Open parameter file - if os.path.exists(self.fileName): - try: - f = open(self.fileName) - except : - tkMessageBox.showwarning("Bad input","Circuit netlist does not exit, please try again") - return - else: - tkMessageBox.showwarning("Bad input","Circuit netlist does not exit, please try again") - return - - # Read the data from file - data=f.read() - - # Close the file - f.close() - netlist=data.splitlines() - # Find the various subckt library required - subcktList=[] - for eachline in netlist: - eachline=eachline.strip() - if len(eachline)>1: - eachline=eachline.lower() - words=eachline.split() - if eachline[0]=='x': - subcktName=words[len(words)-1] - else: - continue - if subcktName in subcktList: - continue - subcktList.append(subcktName) - - # Create the dialog. - self.dialog = Pmw.SelectionDialog(parent, - title = 'Subckt Selector', - buttons = ('OK', 'Cancel'), - defaultbutton = 'OK', - scrolledlist_labelpos = 'n', - label_text = 'Please select the subckt', - scrolledlist_items=subcktList, - command = self.apply, - ) - self.dialog.pack(fill = 'both', expand=1, padx=5, pady=5) - self.dialog.activate() - - # Protocol when window is deleted. - self.dialog.protocol("WM_DELETE_WINDOW",self.cancel) - - def apply(self,result): - sels = self.dialog.getcurselection() - if result=="OK": - if len(sels) == 0: - print 'You clicked on', result, '(no selection)' - return - else: - self.subcktName=sels[0] - self.status=1 - else: - self.status=0 - self.dialog.withdraw() - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.dialog.deactivate() - -# Action taken when cancel pressed - def cancel(self, event=None, status=0): - # Catch the status - self.status=status - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.destroy() - -if __name__=='__main__': - root=Tk() - subckt= SubcktNameList(root,"xxx") - mainloop() - diff --git a/OSCAD/subcktEditor/setPath.py b/OSCAD/subcktEditor/setPath.py deleted file mode 100644 index 3cd5660..0000000 --- a/OSCAD/subcktEditor/setPath.py +++ /dev/null @@ -1 +0,0 @@ -../setPath.py \ No newline at end of file diff --git a/OSCAD/subcktEditor/subcktEditor.py b/OSCAD/subcktEditor/subcktEditor.py deleted file mode 100644 index 388f77b..0000000 --- a/OSCAD/subcktEditor/subcktEditor.py +++ /dev/null @@ -1,124 +0,0 @@ -#!/usr/bin/python -# subcktEditor.py is a python script to create a fornt for subcircuit editor. It developed for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. -# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -from setPath import OSCAD_HOME -from Tkinter import * -from createSubckt import createSubckt -import tkMessageBox -import setPath -import newSubckt -import openSubckt -import selectSubckt -import exportSubckt -import importSubckt -import os -import sys - -# Create a new subckt -def newEditor(e=None): -# Read subckt information (name and type) - subckt= newSubckt.SubcktInfo(root) -# Create subckt file - if subckt.status: - os.system("eeschema "+subckt.subcktName+".sch") - -# Open an existing subckt -def openEditor(e=None): - subckt= openSubckt.ExistingSubcktInfo(root) -# Open subckt file - if subckt.status: - os.system("eeschema "+subckt.subcktName+".sch") - -# Import an existing model from library -def importEditor(e=None): - subckt=importSubckt.ImportSubckt(root) - if os.system("cp "+OSCAD_HOME+"/subcktLibrary/"+subckt.Name+".* ."): - tkMessageBox.showerror("Import Failed","Unable to import subcircuit file "+subckt.Name) - else: - tkMessageBox.showinfo("Successfully imported","Sub-circuit file "+subckt.Name+" is successfully imported to the project.") - -# Export an existing model to library -def exportEditor(e=None): - subckt=exportSubckt.ExportSubckt(root) - if os.system("cp "+subckt.Name+".* "+OSCAD_HOME+"/subcktLibrary/"): - tkMessageBox.showerror("Export Failed","Unable to export subcircuit file "+subckt.Name) - else: - tkMessageBox.showinfo("Successfully exported","Subcircuit file "+subckt.Name+" is successfully exported to the subckt library") - -# Exit an subckt editor -def exitEditor(e=None): - if tkMessageBox.askokcancel("QUIT","Do you really wish to quit?"): - root.destroy() - -# Display help content -def helpEditor(e=None): - pass - -# Display help content -def aboutEditor(): - tkMessageBox.showinfo("About Editor","Created by Yogesh Dilip Save.") - -root = Tk() -root.title("Sub-circuit Editor") -root.geometry("600x400+300+125") - -# Create and configure a menu -menu = Menu(root) -root.config(menu=menu) - -# Create File menu -filemenu= Menu(menu) -menu.add_cascade(label="File", menu=filemenu) -filemenu.add_command(label="New F2", command=newEditor) -filemenu.add_command(label="Open F3", command=openEditor) -filemenu.add_separator() -filemenu.add_command(label="Import F4", command=importEditor) -filemenu.add_command(label="Export F5", command=exportEditor) -filemenu.add_separator() -filemenu.add_command(label="Exit F6", command=exitEditor) - -# Create help menu -helpmenu=Menu(menu) -menu.add_cascade(label="Help", menu=helpmenu) -helpmenu.add_command(label="Help F1",command=helpEditor) -helpmenu.add_command(label="About...",command=aboutEditor) - -# Select device from devices in circuit file -filename=sys.argv[1] -subckt=selectSubckt.SubcktNameList(root, filename) - -if subckt.status: - # Open the circuit file - subcktFile=subckt.subcktName+".sch" - # Check subckt file already exists - if os.path.exists(subcktFile): - if tkMessageBox.askokcancel("Subckt already exists","Do you want to edit?"): - # Call all pending idle tasks, without processing any other events. - root.update_idletasks() - os.system("eeschema "+subckt.subcktName+".sch") - else: - exitEditor() - else: - os.system("eeschema "+subckt.subcktName+".sch") - status=createSubckt(subckt.subcktName) - if status: - tkMessageBox.showinfo("Error","Error while creating subcircuit") - else: - tkMessageBox.showinfo("Successful","Created sub-circuit "+subckt.subcktName+".sub") - -# Protocol for deletion of main window -root.protocol("WM_DELETE_WINDOW",exitEditor) - -# Create shortcut keys -root.bind("", newEditor) -root.bind("", openEditor) -root.bind("", importEditor) -root.bind("", exportEditor) -root.bind("", exitEditor) -root.bind("", helpEditor) - -mainloop() diff --git a/OSCAD/subcktEditor/template.py b/OSCAD/subcktEditor/template.py deleted file mode 100644 index 3353328..0000000 --- a/OSCAD/subcktEditor/template.py +++ /dev/null @@ -1,110 +0,0 @@ -#!/usr/bin/python -from Tkinter import * -import os - -class MyTemplate(Toplevel): - """Template to construct new window""" -# Define constructor - def __init__(self, parent, title=None): - # Set new window properties same as parent - Toplevel.__init__(self, parent) - # Create a new window on top of the parent such that don't appear in taskbar - self.transient(parent) - - # Set the title - if title: - self.title(title) - # Set Parent of active window - self.parent =parent - - # Create a new frame - body =Frame (self) - # Call body method - self.initial_focus = self.body(body) - # Display body - body.pack(padx=5, pady=5) - # Create buttons - self.buttonbox() - # Create status bar - self.statusBar() - # Take control of all the events - self.grab_set() - - # Take control of all the keyboard events - if not self.initial_focus: - self.initial_focus=self - - # Protocol when window is deleted. - self.protocol("WM_DELETE_WINDOW",self.cancel) - - # Position the geometry respect to main window - self.geometry("+%d+%d" % (parent.winfo_rootx()+50,parent.winfo_rooty()+50)) - self.initial_focus.focus_set() - - # Wait for widget to be destroyed - self.wait_window(self) - -# Construction of body of the window - def body(self, master): - # Create dialog body. This method should be overridden - pass - -# Add standard button box (OK, Cancel). Override if you don't want the standard buttons - def buttonbox(self): - # Construct a new frame - box = Frame(self) - # Create buttons - w = Button(box, text="OK", width=10, command=self.ok, default=ACTIVE) - w.pack(side=LEFT, padx=5, pady=5) - w = Button(box, text="Cancel", width=10, command=self.cancel) - w.pack(side=LEFT, padx=5, pady=5) - - # Bind Return and escape keys - self.bind("", self.ok) - self.bind("", self.cancel) - # Create the frame "box" - box.pack() - -# Add standard status bar. Override if you don't want the status bar - def statusBar(self): - self.statusbar = Label(self, text="", bd=1, relief=SUNKEN, anchor=W) - self.statusbar.pack(side=BOTTOM, fill=X) - -# Template for action taken when OK is pressed - def ok(self, event=None): - # If data is not valid then put the focus back - if not self.validate(): - self.initial_focus.focus_set() - return - # Remove the window from the screen (without destroying it) - self.withdraw() - # Call all pending idle tasks, without processing any other events. - self.update_idletasks() - # Perform required task (collection of result, inputs etc.) - self.apply() - # Take action when all task has finished - self.cancel(status=1) - -# Template for action taken when cancel pressed - def cancel(self, event=None, status=0): - # Catch the status - self.status=status - # Put focus back to the parent window - self.parent.focus_set() - # Destroy child window - self.destroy() - -# Template for validation of data - def validate(self): - return 1 - -# Template for required action (Saving Data, results) - def apply(self): - pass - -# Test case -if __name__=='__main__': - root=Tk() - d =MyTemplate(root) - mainloop() - diff --git a/OSCAD/subcktLibrary/lm555n.bak b/OSCAD/subcktLibrary/lm555n.bak deleted file mode 100644 index 92d1f7a..0000000 --- a/OSCAD/subcktLibrary/lm555n.bak +++ /dev/null @@ -1,435 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 10:48:46 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:digitalXSpice -LIBS:lm555n-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L D_INVERTER U5 -U 1 1 50CEA9C5 -P 6700 4050 -F 0 "U5" H 6550 4150 40 0000 C CNN -F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN - 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-.end diff --git a/OSCAD/subcktLibrary/lm555n.cir.ckt b/OSCAD/subcktLibrary/lm555n.cir.ckt deleted file mode 100644 index 90f04a3..0000000 --- a/OSCAD/subcktLibrary/lm555n.cir.ckt +++ /dev/null @@ -1,35 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist - -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -u1 22 14 7 6 15 16 3 13 port -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/OSCAD/subcktLibrary/lm555n.cir.out b/OSCAD/subcktLibrary/lm555n.cir.out deleted file mode 100644 index 90f04a3..0000000 --- a/OSCAD/subcktLibrary/lm555n.cir.out +++ /dev/null @@ -1,35 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist - -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -u1 22 14 7 6 15 16 3 13 port -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/OSCAD/subcktLibrary/lm555n.pro b/OSCAD/subcktLibrary/lm555n.pro deleted file mode 100644 index 09fa54e..0000000 --- a/OSCAD/subcktLibrary/lm555n.pro +++ /dev/null @@ -1,73 +0,0 @@ -update=Monday 19 November 2012 04:56:38 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=analogXSpice -LibName33=converterSpice -LibName34=digitalSpice -LibName35=linearSpice -LibName36=measurementSpice -LibName37=portSpice -LibName38=sourcesSpice -LibName39=digitalXSpice diff --git a/OSCAD/subcktLibrary/lm555n.sch b/OSCAD/subcktLibrary/lm555n.sch deleted file mode 100644 index fabbb66..0000000 --- a/OSCAD/subcktLibrary/lm555n.sch +++ /dev/null @@ -1,435 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 10:57:52 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:digitalXSpice -LIBS:lm555n-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L D_INVERTER U5 -U 1 1 50CEA9C5 -P 6700 4050 -F 0 "U5" H 6550 4150 40 0000 C CNN -F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN - 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1 4400 3850 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A9DEFE -P 4400 3250 -F 0 "R1" V 4480 3250 50 0000 C CNN -F 1 "5000" V 4400 3250 50 0000 C CNN - 1 4400 3250 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/subcktLibrary/lm555n.sub b/OSCAD/subcktLibrary/lm555n.sub deleted file mode 100644 index 254c530..0000000 --- a/OSCAD/subcktLibrary/lm555n.sub +++ /dev/null @@ -1,37 +0,0 @@ -* Subcircuit lm555n -.subckt lm555n 22 14 7 6 15 16 3 13 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) - -.ends lm555n \ No newline at end of file diff --git a/OSCAD/subcktLibrary/lm741.sub b/OSCAD/subcktLibrary/lm741.sub deleted file mode 100644 index aabd579..0000000 --- a/OSCAD/subcktLibrary/lm741.sub +++ /dev/null @@ -1,14 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Saturday 20 October 2012 08:46:50 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -.subckt ua741 7 6 3 -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 -.ends ua741 diff --git a/OSCAD/subcktLibrary/ua741-cache.bak b/OSCAD/subcktLibrary/ua741-cache.bak deleted file mode 100644 index eaad34a..0000000 --- a/OSCAD/subcktLibrary/ua741-cache.bak +++ /dev/null @@ -1,100 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 21 October 2012 01:22:10 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - 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R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/subcktLibrary/ua741.bak b/OSCAD/subcktLibrary/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/subcktLibrary/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/subcktLibrary/ua741.cir b/OSCAD/subcktLibrary/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/subcktLibrary/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/subcktLibrary/ua741.cir.ckt b/OSCAD/subcktLibrary/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/subcktLibrary/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/subcktLibrary/ua741.cir.out b/OSCAD/subcktLibrary/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/subcktLibrary/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/subcktLibrary/ua741.pro b/OSCAD/subcktLibrary/ua741.pro deleted file mode 100644 index 9aa118e..0000000 --- a/OSCAD/subcktLibrary/ua741.pro +++ /dev/null @@ -1,72 +0,0 @@ -update=Monday 17 December 2012 06:14:06 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice diff --git a/OSCAD/subcktLibrary/ua741.sch b/OSCAD/subcktLibrary/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/subcktLibrary/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/subcktLibrary/ua741.sub b/OSCAD/subcktLibrary/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/subcktLibrary/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741 \ No newline at end of file diff --git a/README b/README index 2c3251f..0ca187c 100644 --- a/README +++ b/README @@ -1,12 +1,12 @@ Read Me: -------- -Download and extract OSCAD_installer.tar.gz to your PC/Laptop's Desktop. Make the installation files executable by doing the following: +Download and extract FreeEDA_installer.tar.gz to your PC/Laptop's Desktop. Make the installation files executable by doing the following: 1. Open the terminal 2. Type the following: cd Desktop - sudo chmod -R 777 OSCAD_installer + sudo chmod -R 777 FreeEDA_installer Give the root password when prompted -Now follow the instructions given in the Spoken tutorial "Introduction to Oscad" to install Oscad. +Now follow the instructions given in the Spoken tutorial "Introduction to FreeEDA" to install FreeEDA. diff --git a/checkMetanet.sci b/checkMetanet.sci index 021a99e..208f2ac 100755 --- a/checkMetanet.sci +++ b/checkMetanet.sci @@ -1,4 +1,4 @@ -// checkMetanet.sci is a scilab file to check availibility of metanet library in installed version of scilab. This check required for OSCAD software installation. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// checkMetanet.sci is a scilab file to check availibility of metanet library in installed version of scilab. This check required for FreeEDA software installation. It is written by Yogesh Dilip Save (yogessave@gmail.com). // Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. // This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. // This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. diff --git a/checkPythonModules.py b/checkPythonModules.py index deb116b..709cd57 100755 --- a/checkPythonModules.py +++ b/checkPythonModules.py @@ -1,5 +1,5 @@ #!/usr/bin/python -# checkPythonModule.py is a python script file to check python modules required for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# checkPythonModule.py is a python script file to check python modules required for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). # Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. # This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. # This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. @@ -31,7 +31,7 @@ def checkPackage(package): lines = lines.split("\n") if lines[0] != '0': print "Unable to find "+packageName - print "Please re-run the ./installOSCAD.sh If you are getting this error first time" + print "Please re-run the ./installFreeEDA.sh If you are getting this error first time" print '\033[91m'+ " Please Install Python Library: " + libraryName + " using package manager"+ '\033[0m' exit(1) @@ -42,7 +42,7 @@ def checkPackage(package): __import__(packageName) except ImportError: print "Unable to find "+packageName - print "Please re-run the ./installOSCAD.sh If you are getting this error first time" + print "Please re-run the ./installFreeEDA.sh If you are getting this error first time" print '\033[91m'+ " Please Install Python Library: " + libraryName + " using package manager"+ '\033[0m' exit(1)''' print " Found python module: " +packageName diff --git a/freeeda.desktop b/freeeda.desktop new file mode 100755 index 0000000..b72d018 --- /dev/null +++ b/freeeda.desktop @@ -0,0 +1,16 @@ +[Desktop Entry] +Version=0.9 +Name=FreeEDA +Comment=Open Source CAD +GenericName=FreeEDA +Keywords=eda-tools +Exec=freeeda %u +Terminal=false +X-MultipleArgs=false +Type=Application +Icon=/usr/share/icons/freeeda.png +Categories=Development; +MimeType=text/html;text/xml;application/xhtml+xml;application/xml;application/rss+xml;application/rdf+xml;image/gif;image/jpeg;image/png;x-scheme-handler/http;x-scheme-handler/https;x-scheme-handler/ftp;x-scheme-handler/chrome;video/webm;application/x-xpinstall; +StartupNotify=true +Actions=NewWindow;NewPrivateWindow; + diff --git a/installFreeEDA.sh b/installFreeEDA.sh new file mode 100755 index 0000000..2165947 --- /dev/null +++ b/installFreeEDA.sh @@ -0,0 +1,294 @@ +#!/bin/bash +# +# installFreeEDA.sh is a part of FreeEDA. +# Original Author: Yogesh Dilip Save (yogessave@gmail.com) +# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. + +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of the +# License, or (at your option) any later version. This program is +# distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for more details. You should have received a copy of the GNU +# General Public License along with this program; if not, write to the +# Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, +# MA 02111-1307, USA. + +echo -n "Is your internet connection behind proxy? (y/n): " +read getProxy + +if [ $getProxy == "y" -o $getProxy == "Y" ] +then + echo -n 'Proxy Hostname :' +read proxyHostname + +echo -n 'Proxy Port :' +read proxyPort + +echo -n username@$proxyHostname:$proxyPort : +read username + +echo -n 'Password :' +read -s passwd + +unset http_proxy +unset https_proxy +unset HTTP_PROXY +unset HTTPS_PROXY +unset ftp_proxy +unset FTP_PROXY + +export http_proxy=http://$username:$passwd@$proxyHostname:$proxyPort +export https_proxy=http://$username:$passwd@$proxyHostname:$proxyPort +export https_proxy=http://$username:$passwd@$proxyHostname:$proxyPort +export HTTP_PROXY=http://$username:$passwd@$proxyHostname:$proxyPort +export HTTPS_PROXY=http://$username:$passwd@$proxyHostname:$proxyPort +export ftp_proxy=http://$username:$passwd@$proxyHostname:$proxyPort +export FTP_PROXY=http://$username:$passwd@$proxyHostname:$proxyPort +"$@" +echo + sudo apt-get install kicad ngspice python +elif [ $getProxy == "n" -o $getProxy == "N" ] +then + sudo apt-get install kicad ngspice python + if [ $? -ne 0 ] + then + echo -e "\n\n\nFreeEDA ERROR: Unable to install required packages. Please check your internet connection.\n\n" + exit 0 + fi +else + echo "Please select the right option" + exit 0 +fi + + +function checkScilabVersion +{ + version=`$1 -version |grep scilab |cut -d '-' -f2` + version=`echo $version | sed 's/\.//g'` + if [ "$version" -ge "540" ] + then + echo " scilab version 5.4 or above detected." + return 0 + else + return 1 + fi +} + +function checkMetanet +{ + eval $1 -nw -f checkMetanet.sci + RetVal=$? + if [ $RetVal -ne 0 ] + then + echo "No Metanet graph library found" + echo "Trying to install metanet library........" + #echo -n "Do you want to set proxy for internet connection(y/n): " + #read setProxy + + #if [ $setProxy = 'y' -o $setProxy = 'Y' ] + #then + # proxy + #fi + eval $1 -nw -f installMetanet.sci + RetVal=$? + if [ $RetVal -ne 0 ] + then + echo " Unable to install Metanet " + echo " Please install metanet manually. " + echo " To install metanet use command atomInstall(\"metanet\")" + fi + fi +} + +echo "Checking python Modules......................" +sudo chmod 755 ./checkPythonModules.py +./checkPythonModules.py +RetVal=$? +[ $RetVal -eq 0 ] && echo "All python modules are available" +[ $RetVal -eq 1 ] && { echo "Some python modules are not available. Kindly install them and then re-run installFreeEDA.sh"; exit 1; } +[ $RetVal -ne 1 ] && [ $RetVal -ne 0 ] && { echo "Unable to check modules"; exit 1; } +# added from here +echo -n "Do you have scilab 5.4 or above? (y/n) " + read Answer +case $Answer in +y|Y) +echo "Checking scilab ......................" +command -v scilab >/dev/null 2>&1 +RetVal=$? +if [ $RetVal -eq 0 ] +then + scilabPATH="/usr/bin/scilab" + echo "Found scilab." + echo "Checking scilab version......................" + checkScilabVersion "$scilabPATH" + RetVal=$? + if [ $RetVal -eq 0 ] + then + echo "Checking Metanet ......................" + checkMetanet "$scilabPATH" + else + echo -e " \e[1m Require scilab version 5.4 or above \e[0m" + + echo -n "Please give path of scilab installation directory (e.g., $HOME/Downloads/scilab-5.4.0):" + read scilabInstallDir + if [ -z $scilabInstallDir ] + then + scilabInstallDir=$HOME/Downloads/scilab-5.4.0 + fi + echo "Checking scilab ......................" + command -v $scilabInstallDir/bin/scilab >/dev/null 2>&1 + RetVal=$? + if [ $RetVal -eq 0 ] + then + echo "Found scilab." + scilabPATH="$scilabInstallDir/bin/scilab" + echo "Checking scilab version......................" + checkScilabVersion "$scilabInstallDir/bin/scilab" + RetVal=$? +if [ $RetVal -eq 0 ] +then + echo -e " FreeEDA installation proceeds with Scilab....\n" + echo "Checking Metanet ......................" + checkMetanet "$scilabInstallDir/bin/scilab" +else + echo -e " \e[1m Require scilab version 5.4 or above \e[0m" +if [[ $linuxVersion == "x86_64" ]] + then + echo -e " \e[1m Please download scilab 5.4.0 for 64 bits (Linux) from http://www.scilab.org/products/scilab/download \e[0m" + else + echo -e " '\e[1m' Please download scilab 5.4.0 for 32 bits (Linux) from http://www.scilab.org/products/scilab/download '\e[0m'" + fi + echo " And re-run install_FreeEDA.sh " + exit 1 + fi + else + echo -e " \e[1m Unable to find scilab5.4.0 or above in the specified location \e[0m" + echo " Please re-run install_FreeEDA.sh and Give correct path" + exit 1 + fi + fi + else + echo -e " Scilab not found.." + echo -n "Please give path of scilab installation directory (e.g., $HOME/Downloads/scilab5.4.0):" + read scilabInstallDir + if [ -z $scilabInstallDir ] + then + scilabInstallDir=$HOME/Downloads/scilab-5.4.0 + fi + echo "Checking scilab ......................" + command -v $scilabInstallDir/bin/scilab >/dev/null 2>&1 + RetVal=$? + if [ $RetVal -eq 0 ] + then + echo "Found scilab." + scilabPATH="$scilabInstallDir/bin/scilab" + echo "Checking scilab version......................" + checkScilabVersion "$scilabInstallDir/bin/scilab" + RetVal=$? + if [ $RetVal -eq 0 ] + then + echo -e " FreeEDA installation proceeds with Scilab....\n" + echo "Checking Metanet ......................" + checkMetanet "$scilabInstallDir/bin/scilab" + else + echo -e " \e[1m Require scilab version 5.4 or above \e[0m" +if [[ $linuxVersion == "x86_64" ]] + then + echo -e " \e[1m Please download scilab 5.4.0 for 64 bits (Linux) from http://www.scilab.org/products/scilab/download \e[0m" + else + echo -e " '\e[1m' Please download scilab 5.4.0 for 32 bits (Linux) from http://www.scilab.org/products/scilab/download '\e[0m'" + fi + echo " And re-run install_FreeEDA.sh " + exit 1 + fi + else + echo -e " \e[1m Unable to find scilab5.4.0 or above in the specified location \e[0m" + echo " Please re-run install_FreeEDA.sh and Give correct path" + exit 1 + fi + fi + + +;; +n|N) echo "Installation proceeds without Scilab....." +;; +*) echo " Please select right option" +exit 1 +;; +esac + + + +echo -n "Please select installation directory (e.g., $HOME): " +read installDir +if [ -z $installDir ] +then + installDir=$HOME +fi + +if [ -d $installDir ] +then + echo 'Directory found' +else + echo 'Directory not found!' + echo -n 'Do you want to create it?(y/n)' + read response + if [ $response = 'y' -o $response = 'Y' ] + then + if [ `mkdir -p $installDir` ] + then + exit 1 + fi + else + echo 'Installation aborted' + exit 1 + fi +fi +echo "Installation started..............." + +if [ -d $installDir/FreeEDA ] +then +echo "Renaming your old FreeEDA folder to FreeEDA.bak" +mv -r $installDir/FreeEDA $installDir/FreeEDA.bak +fi +echo "Outof if loop" + +#tar -zxvf FreeEDA.tar.gz -C $installDir +cp -rv FreeEDA $installDir + +cp $installDir/FreeEDA/setPathInstall.py $installDir/FreeEDA/setPath.py + +echo "$installDir/FreeEDA/setPathInstall.py" +cat $installDir/FreeEDA/setPathInstall.py +echo "$installDir/FreeEDA/setPath.py" +cat $installDir/FreeEDA/setPath.py + +cp $installDir/FreeEDA/setPathInstall.py $installDir/FreeEDA/forntEnd/setPath.py +sed -i 's@set_PATH_to_FreeEDA@"'$installDir'/FreeEDA"@g' $installDir/FreeEDA/setPath.py +sed -i 's@set_PATH_to_FreeEDA@"'$installDir'/FreeEDA"@g' $installDir/FreeEDA/modelEditor/setPath.py +cp $installDir/FreeEDA/setPath.py $installDir/FreeEDA/forntEnd/setPath.py +cp $installDir/FreeEDA/setPath.py $installDir/FreeEDA/subcktEditor/setPath.py +cp $installDir/FreeEDA/setPath.py $installDir/FreeEDA/modelEditor/setPath.py +cp $installDir/FreeEDA/LPCSim/LPCSim/MainInstall.sci $installDir/FreeEDA/LPCSim/LPCSim/Main.sci +sed -i 's@set_PATH_to_FreeEDA@"'$installDir'/FreeEDA"@g' $installDir/FreeEDA/LPCSim/LPCSim/Main.sci +chmod 755 $installDir/FreeEDA/analysisInserter/*.py +chmod 755 $installDir/FreeEDA/forntEnd/*.py +chmod 755 $installDir/FreeEDA/kicadtoNgspice/*.py +chmod 755 $installDir/FreeEDA/modelEditor/*.py +chmod 755 $installDir/FreeEDA/subcktEditor/*.py +ln -sf $scilabPATH $installDir/FreeEDA/bin/scilab54 +sudo ln -sf $installDir/FreeEDA/forntEnd/freeeda.py /usr/bin/freeeda + +sudo cp -v $installDir/FreeEDA/images/logo.png /usr/share/icons/freeeda.png + +echo "Setting up desktop icon..." +cp -v freeeda.desktop $HOME/Desktop/ + +echo "Installation completed" + + + + diff --git a/installMetanet.sci b/installMetanet.sci index 0e57e08..1b1041d 100755 --- a/installMetanet.sci +++ b/installMetanet.sci @@ -1,4 +1,4 @@ -// installMetanet.sci is a scilab file to install metanet library in the installed version of scilab. It is developed for OSCAD software installation. It is written by Yogesh Dilip Save (yogessave@gmail.com). +// installMetanet.sci is a scilab file to install metanet library in the installed version of scilab. It is developed for FreeEDA software installation. It is written by Yogesh Dilip Save (yogessave@gmail.com). // Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. // This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. // This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. diff --git a/installModule.sh b/installModule.sh index 9234d94..841bc71 100755 --- a/installModule.sh +++ b/installModule.sh @@ -1,5 +1,5 @@ #!/bin/bash -# installModule.sh is a bash script file to install modules required for OSCAD software. It is written by Yogesh Dilip Save (yogessave@gmail.com). +# installModule.sh is a bash script file to install modules required for FreeEDA software. It is written by Yogesh Dilip Save (yogessave@gmail.com). # Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. Modified by Rakhi R, IIT Bombay 2013 # This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. # This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. diff --git a/installOSCAD.sh b/installOSCAD.sh deleted file mode 100755 index 46e55fe..0000000 --- a/installOSCAD.sh +++ /dev/null @@ -1,294 +0,0 @@ -#!/bin/bash -# -# installOSCAD.sh is a part of OSCAD. -# Original Author: Yogesh Dilip Save (yogessave@gmail.com) -# Copyright (C) 2012 Yogesh Dilip Save, FOSS Project, IIT Bombay. - -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of the -# License, or (at your option) any later version. This program is -# distributed in the hope that it will be useful, but WITHOUT ANY -# WARRANTY; without even the implied warranty of MERCHANTABILITY or -# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -# for more details. You should have received a copy of the GNU -# General Public License along with this program; if not, write to the -# Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, -# MA 02111-1307, USA. - -echo -n "Is your internet connection behind proxy? (y/n): " -read getProxy - -if [ $getProxy == "y" -o $getProxy == "Y" ] -then - echo -n 'Proxy Hostname :' -read proxyHostname - -echo -n 'Proxy Port :' -read proxyPort - -echo -n username@$proxyHostname:$proxyPort : -read username - -echo -n 'Password :' -read -s passwd - -unset http_proxy -unset https_proxy -unset HTTP_PROXY -unset HTTPS_PROXY -unset ftp_proxy -unset FTP_PROXY - -export http_proxy=http://$username:$passwd@$proxyHostname:$proxyPort -export https_proxy=http://$username:$passwd@$proxyHostname:$proxyPort -export https_proxy=http://$username:$passwd@$proxyHostname:$proxyPort -export HTTP_PROXY=http://$username:$passwd@$proxyHostname:$proxyPort -export HTTPS_PROXY=http://$username:$passwd@$proxyHostname:$proxyPort -export ftp_proxy=http://$username:$passwd@$proxyHostname:$proxyPort -export FTP_PROXY=http://$username:$passwd@$proxyHostname:$proxyPort -"$@" -echo - sudo apt-get install kicad ngspice python -elif [ $getProxy == "n" -o $getProxy == "N" ] -then - sudo apt-get install kicad ngspice python - if [ $? -ne 0 ] - then - echo -e "\n\n\nOSCAD ERROR: Unable to install required packages. Please check your internet connection.\n\n" - exit 0 - fi -else - echo "Please select the right option" - exit 0 -fi - - -function checkScilabVersion -{ - version=`$1 -version |grep scilab |cut -d '-' -f2` - version=`echo $version | sed 's/\.//g'` - if [ "$version" -ge "540" ] - then - echo " scilab version 5.4 or above detected." - return 0 - else - return 1 - fi -} - -function checkMetanet -{ - eval $1 -nw -f checkMetanet.sci - RetVal=$? - if [ $RetVal -ne 0 ] - then - echo "No Metanet graph library found" - echo "Trying to install metanet library........" - #echo -n "Do you want to set proxy for internet connection(y/n): " - #read setProxy - - #if [ $setProxy = 'y' -o $setProxy = 'Y' ] - #then - # proxy - #fi - eval $1 -nw -f installMetanet.sci - RetVal=$? - if [ $RetVal -ne 0 ] - then - echo " Unable to install Metanet " - echo " Please install metanet manually. " - echo " To install metanet use command atomInstall(\"metanet\")" - fi - fi -} - -echo "Checking python Modules......................" -sudo chmod 755 ./checkPythonModules.py -./checkPythonModules.py -RetVal=$? -[ $RetVal -eq 0 ] && echo "All python modules are available" -[ $RetVal -eq 1 ] && { echo "Some python modules are not available. Kindly install them and then re-run installOSCAD.sh"; exit 1; } -[ $RetVal -ne 1 ] && [ $RetVal -ne 0 ] && { echo "Unable to check modules"; exit 1; } -# added from here -echo -n "Do you have scilab 5.4 or above? (y/n) " - read Answer -case $Answer in -y|Y) -echo "Checking scilab ......................" -command -v scilab >/dev/null 2>&1 -RetVal=$? -if [ $RetVal -eq 0 ] -then - scilabPATH="/usr/bin/scilab" - echo "Found scilab." - echo "Checking scilab version......................" - checkScilabVersion "$scilabPATH" - RetVal=$? - if [ $RetVal -eq 0 ] - then - echo "Checking Metanet ......................" - checkMetanet "$scilabPATH" - else - echo -e " \e[1m Require scilab version 5.4 or above \e[0m" - - echo -n "Please give path of scilab installation directory (e.g., $HOME/Downloads/scilab-5.4.0):" - read scilabInstallDir - if [ -z $scilabInstallDir ] - then - scilabInstallDir=$HOME/Downloads/scilab-5.4.0 - fi - echo "Checking scilab ......................" - command -v $scilabInstallDir/bin/scilab >/dev/null 2>&1 - RetVal=$? - if [ $RetVal -eq 0 ] - then - echo "Found scilab." - scilabPATH="$scilabInstallDir/bin/scilab" - echo "Checking scilab version......................" - checkScilabVersion "$scilabInstallDir/bin/scilab" - RetVal=$? -if [ $RetVal -eq 0 ] -then - echo -e " Oscad installation proceeds with Scilab....\n" - echo "Checking Metanet ......................" - checkMetanet "$scilabInstallDir/bin/scilab" -else - echo -e " \e[1m Require scilab version 5.4 or above \e[0m" -if [[ $linuxVersion == "x86_64" ]] - then - echo -e " \e[1m Please download scilab 5.4.0 for 64 bits (Linux) from http://www.scilab.org/products/scilab/download \e[0m" - else - echo -e " '\e[1m' Please download scilab 5.4.0 for 32 bits (Linux) from http://www.scilab.org/products/scilab/download '\e[0m'" - fi - echo " And re-run install_OSCAD.sh " - exit 1 - fi - else - echo -e " \e[1m Unable to find scilab5.4.0 or above in the specified location \e[0m" - echo " Please re-run install_OSCAD.sh and Give correct path" - exit 1 - fi - fi - else - echo -e " Scilab not found.." - echo -n "Please give path of scilab installation directory (e.g., $HOME/Downloads/scilab5.4.0):" - read scilabInstallDir - if [ -z $scilabInstallDir ] - then - scilabInstallDir=$HOME/Downloads/scilab-5.4.0 - fi - echo "Checking scilab ......................" - command -v $scilabInstallDir/bin/scilab >/dev/null 2>&1 - RetVal=$? - if [ $RetVal -eq 0 ] - then - echo "Found scilab." - scilabPATH="$scilabInstallDir/bin/scilab" - echo "Checking scilab version......................" - checkScilabVersion "$scilabInstallDir/bin/scilab" - RetVal=$? - if [ $RetVal -eq 0 ] - then - echo -e " Oscad installation proceeds with Scilab....\n" - echo "Checking Metanet ......................" - checkMetanet "$scilabInstallDir/bin/scilab" - else - echo -e " \e[1m Require scilab version 5.4 or above \e[0m" -if [[ $linuxVersion == "x86_64" ]] - then - echo -e " \e[1m Please download scilab 5.4.0 for 64 bits (Linux) from http://www.scilab.org/products/scilab/download \e[0m" - else - echo -e " '\e[1m' Please download scilab 5.4.0 for 32 bits (Linux) from http://www.scilab.org/products/scilab/download '\e[0m'" - fi - echo " And re-run install_OSCAD.sh " - exit 1 - fi - else - echo -e " \e[1m Unable to find scilab5.4.0 or above in the specified location \e[0m" - echo " Please re-run install_OSCAD.sh and Give correct path" - exit 1 - fi - fi - - -;; -n|N) echo "Installation proceeds without Scilab....." -;; -*) echo " Please select right option" -exit 1 -;; -esac - - - -echo -n "Please select installation directory (e.g., $HOME): " -read installDir -if [ -z $installDir ] -then - installDir=$HOME -fi - -if [ -d $installDir ] -then - echo 'Directory found' -else - echo 'Directory not found!' - echo -n 'Do you want to create it?(y/n)' - read response - if [ $response = 'y' -o $response = 'Y' ] - then - if [ `mkdir -p $installDir` ] - then - exit 1 - fi - else - echo 'Installation aborted' - exit 1 - fi -fi -echo "Installation started..............." - -if [ -d $installDir/OSCAD ] -then -echo "Renaming your old OSCAD folder to OSCAD.bak" -mv -r $installDir/OSCAD $installDir/OSCAD.bak -fi -echo "Outof if loop" - -#tar -zxvf OSCAD.tar.gz -C $installDir -cp -rv OSCAD $installDir - -cp $installDir/OSCAD/setPathInstall.py $installDir/OSCAD/setPath.py - -echo "$installDir/OSCAD/setPathInstall.py" -cat $installDir/OSCAD/setPathInstall.py -echo "$installDir/OSCAD/setPath.py" -cat $installDir/OSCAD/setPath.py - -cp $installDir/OSCAD/setPathInstall.py $installDir/OSCAD/forntEnd/setPath.py -sed -i 's@set_PATH_to_OSCAD@"'$installDir'/OSCAD"@g' $installDir/OSCAD/setPath.py -sed -i 's@set_PATH_to_OSCAD@"'$installDir'/OSCAD"@g' $installDir/OSCAD/modelEditor/setPath.py -cp $installDir/OSCAD/setPath.py $installDir/OSCAD/forntEnd/setPath.py -cp $installDir/OSCAD/setPath.py $installDir/OSCAD/subcktEditor/setPath.py -cp $installDir/OSCAD/setPath.py $installDir/OSCAD/modelEditor/setPath.py -cp $installDir/OSCAD/LPCSim/LPCSim/MainInstall.sci $installDir/OSCAD/LPCSim/LPCSim/Main.sci -sed -i 's@set_PATH_to_OSCAD@"'$installDir'/OSCAD"@g' $installDir/OSCAD/LPCSim/LPCSim/Main.sci -chmod 755 $installDir/OSCAD/analysisInserter/*.py -chmod 755 $installDir/OSCAD/forntEnd/*.py -chmod 755 $installDir/OSCAD/kicadtoNgspice/*.py -chmod 755 $installDir/OSCAD/modelEditor/*.py -chmod 755 $installDir/OSCAD/subcktEditor/*.py -ln -sf $scilabPATH $installDir/OSCAD/bin/scilab54 -sudo ln -sf $installDir/OSCAD/forntEnd/oscad.py /usr/bin/oscad - -sudo cp -v $installDir/OSCAD/images/logo.png /usr/share/icons/oscad.png - -echo "Setting up desktop icon..." -cp -v oscad.desktop $HOME/Desktop/ - -echo "Installation completed" - - - - diff --git a/oscad.desktop b/oscad.desktop deleted file mode 100755 index 93d09b3..0000000 --- a/oscad.desktop +++ /dev/null @@ -1,16 +0,0 @@ -[Desktop Entry] -Version=0.9 -Name=OSCAD -Comment=Open Source CAD -GenericName=OSCAD -Keywords=eda-tools -Exec=oscad %u -Terminal=false -X-MultipleArgs=false -Type=Application -Icon=/usr/share/icons/oscad.png -Categories=Development; -MimeType=text/html;text/xml;application/xhtml+xml;application/xml;application/rss+xml;application/rdf+xml;image/gif;image/jpeg;image/png;x-scheme-handler/http;x-scheme-handler/https;x-scheme-handler/ftp;x-scheme-handler/chrome;video/webm;application/x-xpinstall; -StartupNotify=true -Actions=NewWindow;NewPrivateWindow; - -- cgit