index
:
FreeEDA/.git
master
Tool for circuit design, simulation, analysis and PCB design (previously known as Oscad)
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
OSCAD
/
images
/
mb.png
Age
Commit message (
Expand
)
Author
2014-05-19
initial commit
Jayaram Pai
