From 871480933a1c28f8a9fed4c4d34d06c439a7a422 Mon Sep 17 00:00:00 2001 From: Srikant Patnaik Date: Sun, 11 Jan 2015 12:28:04 +0530 Subject: Moved, renamed, and deleted files The original directory structure was scattered and unorganized. Changes are basically to make it look like kernel structure. --- arch/mips/alchemy/common/setup.c | 91 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) create mode 100644 arch/mips/alchemy/common/setup.c (limited to 'arch/mips/alchemy/common/setup.c') diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c new file mode 100644 index 00000000..37ffd997 --- /dev/null +++ b/arch/mips/alchemy/common/setup.c @@ -0,0 +1,91 @@ +/* + * Copyright 2000, 2007-2008 MontaVista Software Inc. + * Author: MontaVista Software, Inc. +#include +#include +#include + +#include +#include + +#include + +extern void __init board_setup(void); +extern void set_cpuspec(void); + +void __init plat_mem_setup(void) +{ + unsigned long est_freq; + + /* determine core clock */ + est_freq = au1xxx_calc_clock(); + est_freq += 5000; /* round */ + est_freq -= est_freq % 10000; + printk(KERN_INFO "(PRId %08x) @ %lu.%02lu MHz\n", read_c0_prid(), + est_freq / 1000000, ((est_freq % 1000000) * 100) / 1000000); + + /* this is faster than wasting cycles trying to approximate it */ + preset_lpj = (est_freq >> 1) / HZ; + + if (au1xxx_cpu_needs_config_od()) + /* Various early Au1xx0 errata corrected by this */ + set_c0_config(1 << 19); /* Set Config[OD] */ + else + /* Clear to obtain best system bus performance */ + clear_c0_config(1 << 19); /* Clear Config[OD] */ + + board_setup(); /* board specific setup */ + + /* IO/MEM resources. */ + set_io_port_base(0); + ioport_resource.start = IOPORT_RESOURCE_START; + ioport_resource.end = IOPORT_RESOURCE_END; + iomem_resource.start = IOMEM_RESOURCE_START; + iomem_resource.end = IOMEM_RESOURCE_END; +} + +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_PCI) +/* This routine should be valid for all Au1x based boards */ +phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) +{ + unsigned long start = ALCHEMY_PCI_MEMWIN_START; + unsigned long end = ALCHEMY_PCI_MEMWIN_END; + + /* Don't fixup 36-bit addresses */ + if ((phys_addr >> 32) != 0) + return phys_addr; + + /* Check for PCI memory window */ + if (phys_addr >= start && (phys_addr + size - 1) <= end) + return (phys_t)(AU1500_PCI_MEM_PHYS_ADDR + phys_addr); + + /* default nop */ + return phys_addr; +} +EXPORT_SYMBOL(__fixup_bigphys_addr); +#endif -- cgit