From 871480933a1c28f8a9fed4c4d34d06c439a7a422 Mon Sep 17 00:00:00 2001 From: Srikant Patnaik Date: Sun, 11 Jan 2015 12:28:04 +0530 Subject: Moved, renamed, and deleted files The original directory structure was scattered and unorganized. Changes are basically to make it look like kernel structure. --- ANDROID_3.4.5/sound/sparc/Kconfig | 41 - ANDROID_3.4.5/sound/sparc/Makefile | 12 - ANDROID_3.4.5/sound/sparc/amd7930.c | 1099 -------------- ANDROID_3.4.5/sound/sparc/cs4231.c | 2121 --------------------------- ANDROID_3.4.5/sound/sparc/dbri.c | 2700 ----------------------------------- 5 files changed, 5973 deletions(-) delete mode 100644 ANDROID_3.4.5/sound/sparc/Kconfig delete mode 100644 ANDROID_3.4.5/sound/sparc/Makefile delete mode 100644 ANDROID_3.4.5/sound/sparc/amd7930.c delete mode 100644 ANDROID_3.4.5/sound/sparc/cs4231.c delete mode 100644 ANDROID_3.4.5/sound/sparc/dbri.c (limited to 'ANDROID_3.4.5/sound/sparc') diff --git a/ANDROID_3.4.5/sound/sparc/Kconfig b/ANDROID_3.4.5/sound/sparc/Kconfig deleted file mode 100644 index d75deba5..00000000 --- a/ANDROID_3.4.5/sound/sparc/Kconfig +++ /dev/null @@ -1,41 +0,0 @@ -# ALSA Sparc drivers - -menuconfig SND_SPARC - bool "Sparc sound devices" - depends on SPARC - default y - help - Support for sound devices specific to Sun SPARC architectures. - -if SND_SPARC - -config SND_SUN_AMD7930 - tristate "Sun AMD7930" - depends on SBUS - select SND_PCM - help - Say Y here to include support for AMD7930 sound device on Sun. - - To compile this driver as a module, choose M here: the module - will be called snd-sun-amd7930. - -config SND_SUN_CS4231 - tristate "Sun CS4231" - select SND_PCM - help - Say Y here to include support for CS4231 sound device on Sun. - - To compile this driver as a module, choose M here: the module - will be called snd-sun-cs4231. - -config SND_SUN_DBRI - tristate "Sun DBRI" - depends on SBUS - select SND_PCM - help - Say Y here to include support for DBRI sound device on Sun. - - To compile this driver as a module, choose M here: the module - will be called snd-sun-dbri. - -endif # SND_SPARC diff --git a/ANDROID_3.4.5/sound/sparc/Makefile b/ANDROID_3.4.5/sound/sparc/Makefile deleted file mode 100644 index 3cd89c67..00000000 --- a/ANDROID_3.4.5/sound/sparc/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# Makefile for ALSA -# Copyright (c) 2002 by David S. Miller -# - -snd-sun-amd7930-objs := amd7930.o -snd-sun-cs4231-objs := cs4231.o -snd-sun-dbri-objs := dbri.o - -obj-$(CONFIG_SND_SUN_AMD7930) += snd-sun-amd7930.o -obj-$(CONFIG_SND_SUN_CS4231) += snd-sun-cs4231.o -obj-$(CONFIG_SND_SUN_DBRI) += snd-sun-dbri.o diff --git a/ANDROID_3.4.5/sound/sparc/amd7930.c b/ANDROID_3.4.5/sound/sparc/amd7930.c deleted file mode 100644 index b63b3a86..00000000 --- a/ANDROID_3.4.5/sound/sparc/amd7930.c +++ /dev/null @@ -1,1099 +0,0 @@ -/* - * Driver for AMD7930 sound chips found on Sparcs. - * Copyright (C) 2002, 2008 David S. Miller - * - * Based entirely upon drivers/sbus/audio/amd7930.c which is: - * Copyright (C) 1996,1997 Thomas K. Dyas (tdyas@eden.rutgers.edu) - * - * --- Notes from Thomas's original driver --- - * This is the lowlevel driver for the AMD7930 audio chip found on all - * sun4c machines and some sun4m machines. - * - * The amd7930 is actually an ISDN chip which has a very simple - * integrated audio encoder/decoder. When Sun decided on what chip to - * use for audio, they had the brilliant idea of using the amd7930 and - * only connecting the audio encoder/decoder pins. - * - * Thanks to the AMD engineer who was able to get us the AMD79C30 - * databook which has all the programming information and gain tables. - * - * Advanced Micro Devices' Am79C30A is an ISDN/audio chip used in the - * SparcStation 1+. The chip provides microphone and speaker interfaces - * which provide mono-channel audio at 8K samples per second via either - * 8-bit A-law or 8-bit mu-law encoding. Also, the chip features an - * ISDN BRI Line Interface Unit (LIU), I.430 S/T physical interface, - * which performs basic D channel LAPD processing and provides raw - * B channel data. The digital audio channel, the two ISDN B channels, - * and two 64 Kbps channels to the microprocessor are all interconnected - * via a multiplexer. - * --- End of notes from Thoamas's original driver --- - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include -#include - -static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ -static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ -static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ - -module_param_array(index, int, NULL, 0444); -MODULE_PARM_DESC(index, "Index value for Sun AMD7930 soundcard."); -module_param_array(id, charp, NULL, 0444); -MODULE_PARM_DESC(id, "ID string for Sun AMD7930 soundcard."); -module_param_array(enable, bool, NULL, 0444); -MODULE_PARM_DESC(enable, "Enable Sun AMD7930 soundcard."); -MODULE_AUTHOR("Thomas K. Dyas and David S. Miller"); -MODULE_DESCRIPTION("Sun AMD7930"); -MODULE_LICENSE("GPL"); -MODULE_SUPPORTED_DEVICE("{{Sun,AMD7930}}"); - -/* Device register layout. */ - -/* Register interface presented to the CPU by the amd7930. */ -#define AMD7930_CR 0x00UL /* Command Register (W) */ -#define AMD7930_IR AMD7930_CR /* Interrupt Register (R) */ -#define AMD7930_DR 0x01UL /* Data Register (R/W) */ -#define AMD7930_DSR1 0x02UL /* D-channel Status Register 1 (R) */ -#define AMD7930_DER 0x03UL /* D-channel Error Register (R) */ -#define AMD7930_DCTB 0x04UL /* D-channel Transmit Buffer (W) */ -#define AMD7930_DCRB AMD7930_DCTB /* D-channel Receive Buffer (R) */ -#define AMD7930_BBTB 0x05UL /* Bb-channel Transmit Buffer (W) */ -#define AMD7930_BBRB AMD7930_BBTB /* Bb-channel Receive Buffer (R) */ -#define AMD7930_BCTB 0x06UL /* Bc-channel Transmit Buffer (W) */ -#define AMD7930_BCRB AMD7930_BCTB /* Bc-channel Receive Buffer (R) */ -#define AMD7930_DSR2 0x07UL /* D-channel Status Register 2 (R) */ - -/* Indirect registers in the Main Audio Processor. */ -struct amd7930_map { - __u16 x[8]; - __u16 r[8]; - __u16 gx; - __u16 gr; - __u16 ger; - __u16 stgr; - __u16 ftgr; - __u16 atgr; - __u8 mmr1; - __u8 mmr2; -}; - -/* After an amd7930 interrupt, reading the Interrupt Register (ir) - * clears the interrupt and returns a bitmask indicating which - * interrupt source(s) require service. - */ - -#define AMR_IR_DTTHRSH 0x01 /* D-channel xmit threshold */ -#define AMR_IR_DRTHRSH 0x02 /* D-channel recv threshold */ -#define AMR_IR_DSRI 0x04 /* D-channel packet status */ -#define AMR_IR_DERI 0x08 /* D-channel error */ -#define AMR_IR_BBUF 0x10 /* B-channel data xfer */ -#define AMR_IR_LSRI 0x20 /* LIU status */ -#define AMR_IR_DSR2I 0x40 /* D-channel buffer status */ -#define AMR_IR_MLTFRMI 0x80 /* multiframe or PP */ - -/* The amd7930 has "indirect registers" which are accessed by writing - * the register number into the Command Register and then reading or - * writing values from the Data Register as appropriate. We define the - * AMR_* macros to be the indirect register numbers and AM_* macros to - * be bits in whatever register is referred to. - */ - -/* Initialization */ -#define AMR_INIT 0x21 -#define AM_INIT_ACTIVE 0x01 -#define AM_INIT_DATAONLY 0x02 -#define AM_INIT_POWERDOWN 0x03 -#define AM_INIT_DISABLE_INTS 0x04 -#define AMR_INIT2 0x20 -#define AM_INIT2_ENABLE_POWERDOWN 0x20 -#define AM_INIT2_ENABLE_MULTIFRAME 0x10 - -/* Line Interface Unit */ -#define AMR_LIU_LSR 0xA1 -#define AM_LIU_LSR_STATE 0x07 -#define AM_LIU_LSR_F3 0x08 -#define AM_LIU_LSR_F7 0x10 -#define AM_LIU_LSR_F8 0x20 -#define AM_LIU_LSR_HSW 0x40 -#define AM_LIU_LSR_HSW_CHG 0x80 -#define AMR_LIU_LPR 0xA2 -#define AMR_LIU_LMR1 0xA3 -#define AM_LIU_LMR1_B1_ENABL 0x01 -#define AM_LIU_LMR1_B2_ENABL 0x02 -#define AM_LIU_LMR1_F_DISABL 0x04 -#define AM_LIU_LMR1_FA_DISABL 0x08 -#define AM_LIU_LMR1_REQ_ACTIV 0x10 -#define AM_LIU_LMR1_F8_F3 0x20 -#define AM_LIU_LMR1_LIU_ENABL 0x40 -#define AMR_LIU_LMR2 0xA4 -#define AM_LIU_LMR2_DECHO 0x01 -#define AM_LIU_LMR2_DLOOP 0x02 -#define AM_LIU_LMR2_DBACKOFF 0x04 -#define AM_LIU_LMR2_EN_F3_INT 0x08 -#define AM_LIU_LMR2_EN_F8_INT 0x10 -#define AM_LIU_LMR2_EN_HSW_INT 0x20 -#define AM_LIU_LMR2_EN_F7_INT 0x40 -#define AMR_LIU_2_4 0xA5 -#define AMR_LIU_MF 0xA6 -#define AMR_LIU_MFSB 0xA7 -#define AMR_LIU_MFQB 0xA8 - -/* Multiplexor */ -#define AMR_MUX_MCR1 0x41 -#define AMR_MUX_MCR2 0x42 -#define AMR_MUX_MCR3 0x43 -#define AM_MUX_CHANNEL_B1 0x01 -#define AM_MUX_CHANNEL_B2 0x02 -#define AM_MUX_CHANNEL_Ba 0x03 -#define AM_MUX_CHANNEL_Bb 0x04 -#define AM_MUX_CHANNEL_Bc 0x05 -#define AM_MUX_CHANNEL_Bd 0x06 -#define AM_MUX_CHANNEL_Be 0x07 -#define AM_MUX_CHANNEL_Bf 0x08 -#define AMR_MUX_MCR4 0x44 -#define AM_MUX_MCR4_ENABLE_INTS 0x08 -#define AM_MUX_MCR4_REVERSE_Bb 0x10 -#define AM_MUX_MCR4_REVERSE_Bc 0x20 -#define AMR_MUX_1_4 0x45 - -/* Main Audio Processor */ -#define AMR_MAP_X 0x61 -#define AMR_MAP_R 0x62 -#define AMR_MAP_GX 0x63 -#define AMR_MAP_GR 0x64 -#define AMR_MAP_GER 0x65 -#define AMR_MAP_STGR 0x66 -#define AMR_MAP_FTGR_1_2 0x67 -#define AMR_MAP_ATGR_1_2 0x68 -#define AMR_MAP_MMR1 0x69 -#define AM_MAP_MMR1_ALAW 0x01 -#define AM_MAP_MMR1_GX 0x02 -#define AM_MAP_MMR1_GR 0x04 -#define AM_MAP_MMR1_GER 0x08 -#define AM_MAP_MMR1_X 0x10 -#define AM_MAP_MMR1_R 0x20 -#define AM_MAP_MMR1_STG 0x40 -#define AM_MAP_MMR1_LOOPBACK 0x80 -#define AMR_MAP_MMR2 0x6A -#define AM_MAP_MMR2_AINB 0x01 -#define AM_MAP_MMR2_LS 0x02 -#define AM_MAP_MMR2_ENABLE_DTMF 0x04 -#define AM_MAP_MMR2_ENABLE_TONEGEN 0x08 -#define AM_MAP_MMR2_ENABLE_TONERING 0x10 -#define AM_MAP_MMR2_DISABLE_HIGHPASS 0x20 -#define AM_MAP_MMR2_DISABLE_AUTOZERO 0x40 -#define AMR_MAP_1_10 0x6B -#define AMR_MAP_MMR3 0x6C -#define AMR_MAP_STRA 0x6D -#define AMR_MAP_STRF 0x6E -#define AMR_MAP_PEAKX 0x70 -#define AMR_MAP_PEAKR 0x71 -#define AMR_MAP_15_16 0x72 - -/* Data Link Controller */ -#define AMR_DLC_FRAR_1_2_3 0x81 -#define AMR_DLC_SRAR_1_2_3 0x82 -#define AMR_DLC_TAR 0x83 -#define AMR_DLC_DRLR 0x84 -#define AMR_DLC_DTCR 0x85 -#define AMR_DLC_DMR1 0x86 -#define AMR_DLC_DMR1_DTTHRSH_INT 0x01 -#define AMR_DLC_DMR1_DRTHRSH_INT 0x02 -#define AMR_DLC_DMR1_TAR_ENABL 0x04 -#define AMR_DLC_DMR1_EORP_INT 0x08 -#define AMR_DLC_DMR1_EN_ADDR1 0x10 -#define AMR_DLC_DMR1_EN_ADDR2 0x20 -#define AMR_DLC_DMR1_EN_ADDR3 0x40 -#define AMR_DLC_DMR1_EN_ADDR4 0x80 -#define AMR_DLC_DMR1_EN_ADDRS 0xf0 -#define AMR_DLC_DMR2 0x87 -#define AMR_DLC_DMR2_RABRT_INT 0x01 -#define AMR_DLC_DMR2_RESID_INT 0x02 -#define AMR_DLC_DMR2_COLL_INT 0x04 -#define AMR_DLC_DMR2_FCS_INT 0x08 -#define AMR_DLC_DMR2_OVFL_INT 0x10 -#define AMR_DLC_DMR2_UNFL_INT 0x20 -#define AMR_DLC_DMR2_OVRN_INT 0x40 -#define AMR_DLC_DMR2_UNRN_INT 0x80 -#define AMR_DLC_1_7 0x88 -#define AMR_DLC_DRCR 0x89 -#define AMR_DLC_RNGR1 0x8A -#define AMR_DLC_RNGR2 0x8B -#define AMR_DLC_FRAR4 0x8C -#define AMR_DLC_SRAR4 0x8D -#define AMR_DLC_DMR3 0x8E -#define AMR_DLC_DMR3_VA_INT 0x01 -#define AMR_DLC_DMR3_EOTP_INT 0x02 -#define AMR_DLC_DMR3_LBRP_INT 0x04 -#define AMR_DLC_DMR3_RBA_INT 0x08 -#define AMR_DLC_DMR3_LBT_INT 0x10 -#define AMR_DLC_DMR3_TBE_INT 0x20 -#define AMR_DLC_DMR3_RPLOST_INT 0x40 -#define AMR_DLC_DMR3_KEEP_FCS 0x80 -#define AMR_DLC_DMR4 0x8F -#define AMR_DLC_DMR4_RCV_1 0x00 -#define AMR_DLC_DMR4_RCV_2 0x01 -#define AMR_DLC_DMR4_RCV_4 0x02 -#define AMR_DLC_DMR4_RCV_8 0x03 -#define AMR_DLC_DMR4_RCV_16 0x01 -#define AMR_DLC_DMR4_RCV_24 0x02 -#define AMR_DLC_DMR4_RCV_30 0x03 -#define AMR_DLC_DMR4_XMT_1 0x00 -#define AMR_DLC_DMR4_XMT_2 0x04 -#define AMR_DLC_DMR4_XMT_4 0x08 -#define AMR_DLC_DMR4_XMT_8 0x0c -#define AMR_DLC_DMR4_XMT_10 0x08 -#define AMR_DLC_DMR4_XMT_14 0x0c -#define AMR_DLC_DMR4_IDLE_MARK 0x00 -#define AMR_DLC_DMR4_IDLE_FLAG 0x10 -#define AMR_DLC_DMR4_ADDR_BOTH 0x00 -#define AMR_DLC_DMR4_ADDR_1ST 0x20 -#define AMR_DLC_DMR4_ADDR_2ND 0xa0 -#define AMR_DLC_DMR4_CR_ENABLE 0x40 -#define AMR_DLC_12_15 0x90 -#define AMR_DLC_ASR 0x91 -#define AMR_DLC_EFCR 0x92 -#define AMR_DLC_EFCR_EXTEND_FIFO 0x01 -#define AMR_DLC_EFCR_SEC_PKT_INT 0x02 - -#define AMR_DSR1_VADDR 0x01 -#define AMR_DSR1_EORP 0x02 -#define AMR_DSR1_PKT_IP 0x04 -#define AMR_DSR1_DECHO_ON 0x08 -#define AMR_DSR1_DLOOP_ON 0x10 -#define AMR_DSR1_DBACK_OFF 0x20 -#define AMR_DSR1_EOTP 0x40 -#define AMR_DSR1_CXMT_ABRT 0x80 - -#define AMR_DSR2_LBRP 0x01 -#define AMR_DSR2_RBA 0x02 -#define AMR_DSR2_RPLOST 0x04 -#define AMR_DSR2_LAST_BYTE 0x08 -#define AMR_DSR2_TBE 0x10 -#define AMR_DSR2_MARK_IDLE 0x20 -#define AMR_DSR2_FLAG_IDLE 0x40 -#define AMR_DSR2_SECOND_PKT 0x80 - -#define AMR_DER_RABRT 0x01 -#define AMR_DER_RFRAME 0x02 -#define AMR_DER_COLLISION 0x04 -#define AMR_DER_FCS 0x08 -#define AMR_DER_OVFL 0x10 -#define AMR_DER_UNFL 0x20 -#define AMR_DER_OVRN 0x40 -#define AMR_DER_UNRN 0x80 - -/* Peripheral Port */ -#define AMR_PP_PPCR1 0xC0 -#define AMR_PP_PPSR 0xC1 -#define AMR_PP_PPIER 0xC2 -#define AMR_PP_MTDR 0xC3 -#define AMR_PP_MRDR 0xC3 -#define AMR_PP_CITDR0 0xC4 -#define AMR_PP_CIRDR0 0xC4 -#define AMR_PP_CITDR1 0xC5 -#define AMR_PP_CIRDR1 0xC5 -#define AMR_PP_PPCR2 0xC8 -#define AMR_PP_PPCR3 0xC9 - -struct snd_amd7930 { - spinlock_t lock; - void __iomem *regs; - u32 flags; -#define AMD7930_FLAG_PLAYBACK 0x00000001 -#define AMD7930_FLAG_CAPTURE 0x00000002 - - struct amd7930_map map; - - struct snd_card *card; - struct snd_pcm *pcm; - struct snd_pcm_substream *playback_substream; - struct snd_pcm_substream *capture_substream; - - /* Playback/Capture buffer state. */ - unsigned char *p_orig, *p_cur; - int p_left; - unsigned char *c_orig, *c_cur; - int c_left; - - int rgain; - int pgain; - int mgain; - - struct platform_device *op; - unsigned int irq; - struct snd_amd7930 *next; -}; - -static struct snd_amd7930 *amd7930_list; - -/* Idle the AMD7930 chip. The amd->lock is not held. */ -static __inline__ void amd7930_idle(struct snd_amd7930 *amd) -{ - unsigned long flags; - - spin_lock_irqsave(&amd->lock, flags); - sbus_writeb(AMR_INIT, amd->regs + AMD7930_CR); - sbus_writeb(0, amd->regs + AMD7930_DR); - spin_unlock_irqrestore(&amd->lock, flags); -} - -/* Enable chip interrupts. The amd->lock is not held. */ -static __inline__ void amd7930_enable_ints(struct snd_amd7930 *amd) -{ - unsigned long flags; - - spin_lock_irqsave(&amd->lock, flags); - sbus_writeb(AMR_INIT, amd->regs + AMD7930_CR); - sbus_writeb(AM_INIT_ACTIVE, amd->regs + AMD7930_DR); - spin_unlock_irqrestore(&amd->lock, flags); -} - -/* Disable chip interrupts. The amd->lock is not held. */ -static __inline__ void amd7930_disable_ints(struct snd_amd7930 *amd) -{ - unsigned long flags; - - spin_lock_irqsave(&amd->lock, flags); - sbus_writeb(AMR_INIT, amd->regs + AMD7930_CR); - sbus_writeb(AM_INIT_ACTIVE | AM_INIT_DISABLE_INTS, amd->regs + AMD7930_DR); - spin_unlock_irqrestore(&amd->lock, flags); -} - -/* Commit amd7930_map settings to the hardware. - * The amd->lock is held and local interrupts are disabled. - */ -static void __amd7930_write_map(struct snd_amd7930 *amd) -{ - struct amd7930_map *map = &amd->map; - - sbus_writeb(AMR_MAP_GX, amd->regs + AMD7930_CR); - sbus_writeb(((map->gx >> 0) & 0xff), amd->regs + AMD7930_DR); - sbus_writeb(((map->gx >> 8) & 0xff), amd->regs + AMD7930_DR); - - sbus_writeb(AMR_MAP_GR, amd->regs + AMD7930_CR); - sbus_writeb(((map->gr >> 0) & 0xff), amd->regs + AMD7930_DR); - sbus_writeb(((map->gr >> 8) & 0xff), amd->regs + AMD7930_DR); - - sbus_writeb(AMR_MAP_STGR, amd->regs + AMD7930_CR); - sbus_writeb(((map->stgr >> 0) & 0xff), amd->regs + AMD7930_DR); - sbus_writeb(((map->stgr >> 8) & 0xff), amd->regs + AMD7930_DR); - - sbus_writeb(AMR_MAP_GER, amd->regs + AMD7930_CR); - sbus_writeb(((map->ger >> 0) & 0xff), amd->regs + AMD7930_DR); - sbus_writeb(((map->ger >> 8) & 0xff), amd->regs + AMD7930_DR); - - sbus_writeb(AMR_MAP_MMR1, amd->regs + AMD7930_CR); - sbus_writeb(map->mmr1, amd->regs + AMD7930_DR); - - sbus_writeb(AMR_MAP_MMR2, amd->regs + AMD7930_CR); - sbus_writeb(map->mmr2, amd->regs + AMD7930_DR); -} - -/* gx, gr & stg gains. this table must contain 256 elements with - * the 0th being "infinity" (the magic value 9008). The remaining - * elements match sun's gain curve (but with higher resolution): - * -18 to 0dB in .16dB steps then 0 to 12dB in .08dB steps. - */ -static __const__ __u16 gx_coeff[256] = { - 0x9008, 0x8b7c, 0x8b51, 0x8b45, 0x8b42, 0x8b3b, 0x8b36, 0x8b33, - 0x8b32, 0x8b2a, 0x8b2b, 0x8b2c, 0x8b25, 0x8b23, 0x8b22, 0x8b22, - 0x9122, 0x8b1a, 0x8aa3, 0x8aa3, 0x8b1c, 0x8aa6, 0x912d, 0x912b, - 0x8aab, 0x8b12, 0x8aaa, 0x8ab2, 0x9132, 0x8ab4, 0x913c, 0x8abb, - 0x9142, 0x9144, 0x9151, 0x8ad5, 0x8aeb, 0x8a79, 0x8a5a, 0x8a4a, - 0x8b03, 0x91c2, 0x91bb, 0x8a3f, 0x8a33, 0x91b2, 0x9212, 0x9213, - 0x8a2c, 0x921d, 0x8a23, 0x921a, 0x9222, 0x9223, 0x922d, 0x9231, - 0x9234, 0x9242, 0x925b, 0x92dd, 0x92c1, 0x92b3, 0x92ab, 0x92a4, - 0x92a2, 0x932b, 0x9341, 0x93d3, 0x93b2, 0x93a2, 0x943c, 0x94b2, - 0x953a, 0x9653, 0x9782, 0x9e21, 0x9d23, 0x9cd2, 0x9c23, 0x9baa, - 0x9bde, 0x9b33, 0x9b22, 0x9b1d, 0x9ab2, 0xa142, 0xa1e5, 0x9a3b, - 0xa213, 0xa1a2, 0xa231, 0xa2eb, 0xa313, 0xa334, 0xa421, 0xa54b, - 0xada4, 0xac23, 0xab3b, 0xaaab, 0xaa5c, 0xb1a3, 0xb2ca, 0xb3bd, - 0xbe24, 0xbb2b, 0xba33, 0xc32b, 0xcb5a, 0xd2a2, 0xe31d, 0x0808, - 0x72ba, 0x62c2, 0x5c32, 0x52db, 0x513e, 0x4cce, 0x43b2, 0x4243, - 0x41b4, 0x3b12, 0x3bc3, 0x3df2, 0x34bd, 0x3334, 0x32c2, 0x3224, - 0x31aa, 0x2a7b, 0x2aaa, 0x2b23, 0x2bba, 0x2c42, 0x2e23, 0x25bb, - 0x242b, 0x240f, 0x231a, 0x22bb, 0x2241, 0x2223, 0x221f, 0x1a33, - 0x1a4a, 0x1acd, 0x2132, 0x1b1b, 0x1b2c, 0x1b62, 0x1c12, 0x1c32, - 0x1d1b, 0x1e71, 0x16b1, 0x1522, 0x1434, 0x1412, 0x1352, 0x1323, - 0x1315, 0x12bc, 0x127a, 0x1235, 0x1226, 0x11a2, 0x1216, 0x0a2a, - 0x11bc, 0x11d1, 0x1163, 0x0ac2, 0x0ab2, 0x0aab, 0x0b1b, 0x0b23, - 0x0b33, 0x0c0f, 0x0bb3, 0x0c1b, 0x0c3e, 0x0cb1, 0x0d4c, 0x0ec1, - 0x079a, 0x0614, 0x0521, 0x047c, 0x0422, 0x03b1, 0x03e3, 0x0333, - 0x0322, 0x031c, 0x02aa, 0x02ba, 0x02f2, 0x0242, 0x0232, 0x0227, - 0x0222, 0x021b, 0x01ad, 0x0212, 0x01b2, 0x01bb, 0x01cb, 0x01f6, - 0x0152, 0x013a, 0x0133, 0x0131, 0x012c, 0x0123, 0x0122, 0x00a2, - 0x011b, 0x011e, 0x0114, 0x00b1, 0x00aa, 0x00b3, 0x00bd, 0x00ba, - 0x00c5, 0x00d3, 0x00f3, 0x0062, 0x0051, 0x0042, 0x003b, 0x0033, - 0x0032, 0x002a, 0x002c, 0x0025, 0x0023, 0x0022, 0x001a, 0x0021, - 0x001b, 0x001b, 0x001d, 0x0015, 0x0013, 0x0013, 0x0012, 0x0012, - 0x000a, 0x000a, 0x0011, 0x0011, 0x000b, 0x000b, 0x000c, 0x000e, -}; - -static __const__ __u16 ger_coeff[] = { - 0x431f, /* 5. dB */ - 0x331f, /* 5.5 dB */ - 0x40dd, /* 6. dB */ - 0x11dd, /* 6.5 dB */ - 0x440f, /* 7. dB */ - 0x411f, /* 7.5 dB */ - 0x311f, /* 8. dB */ - 0x5520, /* 8.5 dB */ - 0x10dd, /* 9. dB */ - 0x4211, /* 9.5 dB */ - 0x410f, /* 10. dB */ - 0x111f, /* 10.5 dB */ - 0x600b, /* 11. dB */ - 0x00dd, /* 11.5 dB */ - 0x4210, /* 12. dB */ - 0x110f, /* 13. dB */ - 0x7200, /* 14. dB */ - 0x2110, /* 15. dB */ - 0x2200, /* 15.9 dB */ - 0x000b, /* 16.9 dB */ - 0x000f /* 18. dB */ -}; - -/* Update amd7930_map settings and program them into the hardware. - * The amd->lock is held and local interrupts are disabled. - */ -static void __amd7930_update_map(struct snd_amd7930 *amd) -{ - struct amd7930_map *map = &amd->map; - int level; - - map->gx = gx_coeff[amd->rgain]; - map->stgr = gx_coeff[amd->mgain]; - level = (amd->pgain * (256 + ARRAY_SIZE(ger_coeff))) >> 8; - if (level >= 256) { - map->ger = ger_coeff[level - 256]; - map->gr = gx_coeff[255]; - } else { - map->ger = ger_coeff[0]; - map->gr = gx_coeff[level]; - } - __amd7930_write_map(amd); -} - -static irqreturn_t snd_amd7930_interrupt(int irq, void *dev_id) -{ - struct snd_amd7930 *amd = dev_id; - unsigned int elapsed; - u8 ir; - - spin_lock(&amd->lock); - - elapsed = 0; - - ir = sbus_readb(amd->regs + AMD7930_IR); - if (ir & AMR_IR_BBUF) { - u8 byte; - - if (amd->flags & AMD7930_FLAG_PLAYBACK) { - if (amd->p_left > 0) { - byte = *(amd->p_cur++); - amd->p_left--; - sbus_writeb(byte, amd->regs + AMD7930_BBTB); - if (amd->p_left == 0) - elapsed |= AMD7930_FLAG_PLAYBACK; - } else - sbus_writeb(0, amd->regs + AMD7930_BBTB); - } else if (amd->flags & AMD7930_FLAG_CAPTURE) { - byte = sbus_readb(amd->regs + AMD7930_BBRB); - if (amd->c_left > 0) { - *(amd->c_cur++) = byte; - amd->c_left--; - if (amd->c_left == 0) - elapsed |= AMD7930_FLAG_CAPTURE; - } - } - } - spin_unlock(&amd->lock); - - if (elapsed & AMD7930_FLAG_PLAYBACK) - snd_pcm_period_elapsed(amd->playback_substream); - else - snd_pcm_period_elapsed(amd->capture_substream); - - return IRQ_HANDLED; -} - -static int snd_amd7930_trigger(struct snd_amd7930 *amd, unsigned int flag, int cmd) -{ - unsigned long flags; - int result = 0; - - spin_lock_irqsave(&amd->lock, flags); - if (cmd == SNDRV_PCM_TRIGGER_START) { - if (!(amd->flags & flag)) { - amd->flags |= flag; - - /* Enable B channel interrupts. */ - sbus_writeb(AMR_MUX_MCR4, amd->regs + AMD7930_CR); - sbus_writeb(AM_MUX_MCR4_ENABLE_INTS, amd->regs + AMD7930_DR); - } - } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { - if (amd->flags & flag) { - amd->flags &= ~flag; - - /* Disable B channel interrupts. */ - sbus_writeb(AMR_MUX_MCR4, amd->regs + AMD7930_CR); - sbus_writeb(0, amd->regs + AMD7930_DR); - } - } else { - result = -EINVAL; - } - spin_unlock_irqrestore(&amd->lock, flags); - - return result; -} - -static int snd_amd7930_playback_trigger(struct snd_pcm_substream *substream, - int cmd) -{ - struct snd_amd7930 *amd = snd_pcm_substream_chip(substream); - return snd_amd7930_trigger(amd, AMD7930_FLAG_PLAYBACK, cmd); -} - -static int snd_amd7930_capture_trigger(struct snd_pcm_substream *substream, - int cmd) -{ - struct snd_amd7930 *amd = snd_pcm_substream_chip(substream); - return snd_amd7930_trigger(amd, AMD7930_FLAG_CAPTURE, cmd); -} - -static int snd_amd7930_playback_prepare(struct snd_pcm_substream *substream) -{ - struct snd_amd7930 *amd = snd_pcm_substream_chip(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - unsigned int size = snd_pcm_lib_buffer_bytes(substream); - unsigned long flags; - u8 new_mmr1; - - spin_lock_irqsave(&amd->lock, flags); - - amd->flags |= AMD7930_FLAG_PLAYBACK; - - /* Setup the pseudo-dma transfer pointers. */ - amd->p_orig = amd->p_cur = runtime->dma_area; - amd->p_left = size; - - /* Put the chip into the correct encoding format. */ - new_mmr1 = amd->map.mmr1; - if (runtime->format == SNDRV_PCM_FORMAT_A_LAW) - new_mmr1 |= AM_MAP_MMR1_ALAW; - else - new_mmr1 &= ~AM_MAP_MMR1_ALAW; - if (new_mmr1 != amd->map.mmr1) { - amd->map.mmr1 = new_mmr1; - __amd7930_update_map(amd); - } - - spin_unlock_irqrestore(&amd->lock, flags); - - return 0; -} - -static int snd_amd7930_capture_prepare(struct snd_pcm_substream *substream) -{ - struct snd_amd7930 *amd = snd_pcm_substream_chip(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - unsigned int size = snd_pcm_lib_buffer_bytes(substream); - unsigned long flags; - u8 new_mmr1; - - spin_lock_irqsave(&amd->lock, flags); - - amd->flags |= AMD7930_FLAG_CAPTURE; - - /* Setup the pseudo-dma transfer pointers. */ - amd->c_orig = amd->c_cur = runtime->dma_area; - amd->c_left = size; - - /* Put the chip into the correct encoding format. */ - new_mmr1 = amd->map.mmr1; - if (runtime->format == SNDRV_PCM_FORMAT_A_LAW) - new_mmr1 |= AM_MAP_MMR1_ALAW; - else - new_mmr1 &= ~AM_MAP_MMR1_ALAW; - if (new_mmr1 != amd->map.mmr1) { - amd->map.mmr1 = new_mmr1; - __amd7930_update_map(amd); - } - - spin_unlock_irqrestore(&amd->lock, flags); - - return 0; -} - -static snd_pcm_uframes_t snd_amd7930_playback_pointer(struct snd_pcm_substream *substream) -{ - struct snd_amd7930 *amd = snd_pcm_substream_chip(substream); - size_t ptr; - - if (!(amd->flags & AMD7930_FLAG_PLAYBACK)) - return 0; - ptr = amd->p_cur - amd->p_orig; - return bytes_to_frames(substream->runtime, ptr); -} - -static snd_pcm_uframes_t snd_amd7930_capture_pointer(struct snd_pcm_substream *substream) -{ - struct snd_amd7930 *amd = snd_pcm_substream_chip(substream); - size_t ptr; - - if (!(amd->flags & AMD7930_FLAG_CAPTURE)) - return 0; - - ptr = amd->c_cur - amd->c_orig; - return bytes_to_frames(substream->runtime, ptr); -} - -/* Playback and capture have identical properties. */ -static struct snd_pcm_hardware snd_amd7930_pcm_hw = -{ - .info = (SNDRV_PCM_INFO_MMAP | - SNDRV_PCM_INFO_MMAP_VALID | - SNDRV_PCM_INFO_INTERLEAVED | - SNDRV_PCM_INFO_BLOCK_TRANSFER | - SNDRV_PCM_INFO_HALF_DUPLEX), - .formats = SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW, - .rates = SNDRV_PCM_RATE_8000, - .rate_min = 8000, - .rate_max = 8000, - .channels_min = 1, - .channels_max = 1, - .buffer_bytes_max = (64*1024), - .period_bytes_min = 1, - .period_bytes_max = (64*1024), - .periods_min = 1, - .periods_max = 1024, -}; - -static int snd_amd7930_playback_open(struct snd_pcm_substream *substream) -{ - struct snd_amd7930 *amd = snd_pcm_substream_chip(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - - amd->playback_substream = substream; - runtime->hw = snd_amd7930_pcm_hw; - return 0; -} - -static int snd_amd7930_capture_open(struct snd_pcm_substream *substream) -{ - struct snd_amd7930 *amd = snd_pcm_substream_chip(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - - amd->capture_substream = substream; - runtime->hw = snd_amd7930_pcm_hw; - return 0; -} - -static int snd_amd7930_playback_close(struct snd_pcm_substream *substream) -{ - struct snd_amd7930 *amd = snd_pcm_substream_chip(substream); - - amd->playback_substream = NULL; - return 0; -} - -static int snd_amd7930_capture_close(struct snd_pcm_substream *substream) -{ - struct snd_amd7930 *amd = snd_pcm_substream_chip(substream); - - amd->capture_substream = NULL; - return 0; -} - -static int snd_amd7930_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *hw_params) -{ - return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); -} - -static int snd_amd7930_hw_free(struct snd_pcm_substream *substream) -{ - return snd_pcm_lib_free_pages(substream); -} - -static struct snd_pcm_ops snd_amd7930_playback_ops = { - .open = snd_amd7930_playback_open, - .close = snd_amd7930_playback_close, - .ioctl = snd_pcm_lib_ioctl, - .hw_params = snd_amd7930_hw_params, - .hw_free = snd_amd7930_hw_free, - .prepare = snd_amd7930_playback_prepare, - .trigger = snd_amd7930_playback_trigger, - .pointer = snd_amd7930_playback_pointer, -}; - -static struct snd_pcm_ops snd_amd7930_capture_ops = { - .open = snd_amd7930_capture_open, - .close = snd_amd7930_capture_close, - .ioctl = snd_pcm_lib_ioctl, - .hw_params = snd_amd7930_hw_params, - .hw_free = snd_amd7930_hw_free, - .prepare = snd_amd7930_capture_prepare, - .trigger = snd_amd7930_capture_trigger, - .pointer = snd_amd7930_capture_pointer, -}; - -static int __devinit snd_amd7930_pcm(struct snd_amd7930 *amd) -{ - struct snd_pcm *pcm; - int err; - - if ((err = snd_pcm_new(amd->card, - /* ID */ "sun_amd7930", - /* device */ 0, - /* playback count */ 1, - /* capture count */ 1, &pcm)) < 0) - return err; - - snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_amd7930_playback_ops); - snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_amd7930_capture_ops); - - pcm->private_data = amd; - pcm->info_flags = 0; - strcpy(pcm->name, amd->card->shortname); - amd->pcm = pcm; - - snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, - snd_dma_continuous_data(GFP_KERNEL), - 64*1024, 64*1024); - - return 0; -} - -#define VOLUME_MONITOR 0 -#define VOLUME_CAPTURE 1 -#define VOLUME_PLAYBACK 2 - -static int snd_amd7930_info_volume(struct snd_kcontrol *kctl, struct snd_ctl_elem_info *uinfo) -{ - uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; - uinfo->count = 1; - uinfo->value.integer.min = 0; - uinfo->value.integer.max = 255; - - return 0; -} - -static int snd_amd7930_get_volume(struct snd_kcontrol *kctl, struct snd_ctl_elem_value *ucontrol) -{ - struct snd_amd7930 *amd = snd_kcontrol_chip(kctl); - int type = kctl->private_value; - int *swval; - - switch (type) { - case VOLUME_MONITOR: - swval = &amd->mgain; - break; - case VOLUME_CAPTURE: - swval = &amd->rgain; - break; - case VOLUME_PLAYBACK: - default: - swval = &amd->pgain; - break; - }; - - ucontrol->value.integer.value[0] = *swval; - - return 0; -} - -static int snd_amd7930_put_volume(struct snd_kcontrol *kctl, struct snd_ctl_elem_value *ucontrol) -{ - struct snd_amd7930 *amd = snd_kcontrol_chip(kctl); - unsigned long flags; - int type = kctl->private_value; - int *swval, change; - - switch (type) { - case VOLUME_MONITOR: - swval = &amd->mgain; - break; - case VOLUME_CAPTURE: - swval = &amd->rgain; - break; - case VOLUME_PLAYBACK: - default: - swval = &amd->pgain; - break; - }; - - spin_lock_irqsave(&amd->lock, flags); - - if (*swval != ucontrol->value.integer.value[0]) { - *swval = ucontrol->value.integer.value[0] & 0xff; - __amd7930_update_map(amd); - change = 1; - } else - change = 0; - - spin_unlock_irqrestore(&amd->lock, flags); - - return change; -} - -static struct snd_kcontrol_new amd7930_controls[] __devinitdata = { - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Monitor Volume", - .index = 0, - .info = snd_amd7930_info_volume, - .get = snd_amd7930_get_volume, - .put = snd_amd7930_put_volume, - .private_value = VOLUME_MONITOR, - }, - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Capture Volume", - .index = 0, - .info = snd_amd7930_info_volume, - .get = snd_amd7930_get_volume, - .put = snd_amd7930_put_volume, - .private_value = VOLUME_CAPTURE, - }, - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Playback Volume", - .index = 0, - .info = snd_amd7930_info_volume, - .get = snd_amd7930_get_volume, - .put = snd_amd7930_put_volume, - .private_value = VOLUME_PLAYBACK, - }, -}; - -static int __devinit snd_amd7930_mixer(struct snd_amd7930 *amd) -{ - struct snd_card *card; - int idx, err; - - if (snd_BUG_ON(!amd || !amd->card)) - return -EINVAL; - - card = amd->card; - strcpy(card->mixername, card->shortname); - - for (idx = 0; idx < ARRAY_SIZE(amd7930_controls); idx++) { - if ((err = snd_ctl_add(card, - snd_ctl_new1(&amd7930_controls[idx], amd))) < 0) - return err; - } - - return 0; -} - -static int snd_amd7930_free(struct snd_amd7930 *amd) -{ - struct platform_device *op = amd->op; - - amd7930_idle(amd); - - if (amd->irq) - free_irq(amd->irq, amd); - - if (amd->regs) - of_iounmap(&op->resource[0], amd->regs, - resource_size(&op->resource[0])); - - kfree(amd); - - return 0; -} - -static int snd_amd7930_dev_free(struct snd_device *device) -{ - struct snd_amd7930 *amd = device->device_data; - - return snd_amd7930_free(amd); -} - -static struct snd_device_ops snd_amd7930_dev_ops = { - .dev_free = snd_amd7930_dev_free, -}; - -static int __devinit snd_amd7930_create(struct snd_card *card, - struct platform_device *op, - int irq, int dev, - struct snd_amd7930 **ramd) -{ - struct snd_amd7930 *amd; - unsigned long flags; - int err; - - *ramd = NULL; - amd = kzalloc(sizeof(*amd), GFP_KERNEL); - if (amd == NULL) - return -ENOMEM; - - spin_lock_init(&amd->lock); - amd->card = card; - amd->op = op; - - amd->regs = of_ioremap(&op->resource[0], 0, - resource_size(&op->resource[0]), "amd7930"); - if (!amd->regs) { - snd_printk(KERN_ERR - "amd7930-%d: Unable to map chip registers.\n", dev); - return -EIO; - } - - amd7930_idle(amd); - - if (request_irq(irq, snd_amd7930_interrupt, - IRQF_SHARED, "amd7930", amd)) { - snd_printk(KERN_ERR "amd7930-%d: Unable to grab IRQ %d\n", - dev, irq); - snd_amd7930_free(amd); - return -EBUSY; - } - amd->irq = irq; - - amd7930_enable_ints(amd); - - spin_lock_irqsave(&amd->lock, flags); - - amd->rgain = 128; - amd->pgain = 200; - amd->mgain = 0; - - memset(&amd->map, 0, sizeof(amd->map)); - amd->map.mmr1 = (AM_MAP_MMR1_GX | AM_MAP_MMR1_GER | - AM_MAP_MMR1_GR | AM_MAP_MMR1_STG); - amd->map.mmr2 = (AM_MAP_MMR2_LS | AM_MAP_MMR2_AINB); - - __amd7930_update_map(amd); - - /* Always MUX audio (Ba) to channel Bb. */ - sbus_writeb(AMR_MUX_MCR1, amd->regs + AMD7930_CR); - sbus_writeb(AM_MUX_CHANNEL_Ba | (AM_MUX_CHANNEL_Bb << 4), - amd->regs + AMD7930_DR); - - spin_unlock_irqrestore(&amd->lock, flags); - - if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, - amd, &snd_amd7930_dev_ops)) < 0) { - snd_amd7930_free(amd); - return err; - } - - *ramd = amd; - return 0; -} - -static int __devinit amd7930_sbus_probe(struct platform_device *op) -{ - struct resource *rp = &op->resource[0]; - static int dev_num; - struct snd_card *card; - struct snd_amd7930 *amd; - int err, irq; - - irq = op->archdata.irqs[0]; - - if (dev_num >= SNDRV_CARDS) - return -ENODEV; - if (!enable[dev_num]) { - dev_num++; - return -ENOENT; - } - - err = snd_card_create(index[dev_num], id[dev_num], THIS_MODULE, 0, - &card); - if (err < 0) - return err; - - strcpy(card->driver, "AMD7930"); - strcpy(card->shortname, "Sun AMD7930"); - sprintf(card->longname, "%s at 0x%02lx:0x%08Lx, irq %d", - card->shortname, - rp->flags & 0xffL, - (unsigned long long)rp->start, - irq); - - if ((err = snd_amd7930_create(card, op, - irq, dev_num, &amd)) < 0) - goto out_err; - - if ((err = snd_amd7930_pcm(amd)) < 0) - goto out_err; - - if ((err = snd_amd7930_mixer(amd)) < 0) - goto out_err; - - if ((err = snd_card_register(card)) < 0) - goto out_err; - - amd->next = amd7930_list; - amd7930_list = amd; - - dev_num++; - - return 0; - -out_err: - snd_card_free(card); - return err; -} - -static const struct of_device_id amd7930_match[] = { - { - .name = "audio", - }, - {}, -}; - -static struct platform_driver amd7930_sbus_driver = { - .driver = { - .name = "audio", - .owner = THIS_MODULE, - .of_match_table = amd7930_match, - }, - .probe = amd7930_sbus_probe, -}; - -static int __init amd7930_init(void) -{ - return platform_driver_register(&amd7930_sbus_driver); -} - -static void __exit amd7930_exit(void) -{ - struct snd_amd7930 *p = amd7930_list; - - while (p != NULL) { - struct snd_amd7930 *next = p->next; - - snd_card_free(p->card); - - p = next; - } - - amd7930_list = NULL; - - platform_driver_unregister(&amd7930_sbus_driver); -} - -module_init(amd7930_init); -module_exit(amd7930_exit); diff --git a/ANDROID_3.4.5/sound/sparc/cs4231.c b/ANDROID_3.4.5/sound/sparc/cs4231.c deleted file mode 100644 index f2eabd3f..00000000 --- a/ANDROID_3.4.5/sound/sparc/cs4231.c +++ /dev/null @@ -1,2121 +0,0 @@ -/* - * Driver for CS4231 sound chips found on Sparcs. - * Copyright (C) 2002, 2008 David S. Miller - * - * Based entirely upon drivers/sbus/audio/cs4231.c which is: - * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu) - * and also sound/isa/cs423x/cs4231_lib.c which is: - * Copyright (c) by Jaroslav Kysela - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_SBUS -#define SBUS_SUPPORT -#endif - -#if defined(CONFIG_PCI) && defined(CONFIG_SPARC64) -#define EBUS_SUPPORT -#include -#include -#endif - -static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ -static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ -/* Enable this card */ -static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; - -module_param_array(index, int, NULL, 0444); -MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard."); -module_param_array(id, charp, NULL, 0444); -MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard."); -module_param_array(enable, bool, NULL, 0444); -MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard."); -MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller"); -MODULE_DESCRIPTION("Sun CS4231"); -MODULE_LICENSE("GPL"); -MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}"); - -#ifdef SBUS_SUPPORT -struct sbus_dma_info { - spinlock_t lock; /* DMA access lock */ - int dir; - void __iomem *regs; -}; -#endif - -struct snd_cs4231; -struct cs4231_dma_control { - void (*prepare)(struct cs4231_dma_control *dma_cont, - int dir); - void (*enable)(struct cs4231_dma_control *dma_cont, int on); - int (*request)(struct cs4231_dma_control *dma_cont, - dma_addr_t bus_addr, size_t len); - unsigned int (*address)(struct cs4231_dma_control *dma_cont); -#ifdef EBUS_SUPPORT - struct ebus_dma_info ebus_info; -#endif -#ifdef SBUS_SUPPORT - struct sbus_dma_info sbus_info; -#endif -}; - -struct snd_cs4231 { - spinlock_t lock; /* registers access lock */ - void __iomem *port; - - struct cs4231_dma_control p_dma; - struct cs4231_dma_control c_dma; - - u32 flags; -#define CS4231_FLAG_EBUS 0x00000001 -#define CS4231_FLAG_PLAYBACK 0x00000002 -#define CS4231_FLAG_CAPTURE 0x00000004 - - struct snd_card *card; - struct snd_pcm *pcm; - struct snd_pcm_substream *playback_substream; - unsigned int p_periods_sent; - struct snd_pcm_substream *capture_substream; - unsigned int c_periods_sent; - struct snd_timer *timer; - - unsigned short mode; -#define CS4231_MODE_NONE 0x0000 -#define CS4231_MODE_PLAY 0x0001 -#define CS4231_MODE_RECORD 0x0002 -#define CS4231_MODE_TIMER 0x0004 -#define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \ - CS4231_MODE_TIMER) - - unsigned char image[32]; /* registers image */ - int mce_bit; - int calibrate_mute; - struct mutex mce_mutex; /* mutex for mce register */ - struct mutex open_mutex; /* mutex for ALSA open/close */ - - struct platform_device *op; - unsigned int irq[2]; - unsigned int regs_size; - struct snd_cs4231 *next; -}; - -/* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for - * now.... -DaveM - */ - -/* IO ports */ -#include - -/* XXX offsets are different than PC ISA chips... */ -#define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2)) - -/* SBUS DMA register defines. */ - -#define APCCSR 0x10UL /* APC DMA CSR */ -#define APCCVA 0x20UL /* APC Capture DMA Address */ -#define APCCC 0x24UL /* APC Capture Count */ -#define APCCNVA 0x28UL /* APC Capture DMA Next Address */ -#define APCCNC 0x2cUL /* APC Capture Next Count */ -#define APCPVA 0x30UL /* APC Play DMA Address */ -#define APCPC 0x34UL /* APC Play Count */ -#define APCPNVA 0x38UL /* APC Play DMA Next Address */ -#define APCPNC 0x3cUL /* APC Play Next Count */ - -/* Defines for SBUS DMA-routines */ - -#define APCVA 0x0UL /* APC DMA Address */ -#define APCC 0x4UL /* APC Count */ -#define APCNVA 0x8UL /* APC DMA Next Address */ -#define APCNC 0xcUL /* APC Next Count */ -#define APC_PLAY 0x30UL /* Play registers start at 0x30 */ -#define APC_RECORD 0x20UL /* Record registers start at 0x20 */ - -/* APCCSR bits */ - -#define APC_INT_PENDING 0x800000 /* Interrupt Pending */ -#define APC_PLAY_INT 0x400000 /* Playback interrupt */ -#define APC_CAPT_INT 0x200000 /* Capture interrupt */ -#define APC_GENL_INT 0x100000 /* General interrupt */ -#define APC_XINT_ENA 0x80000 /* General ext int. enable */ -#define APC_XINT_PLAY 0x40000 /* Playback ext intr */ -#define APC_XINT_CAPT 0x20000 /* Capture ext intr */ -#define APC_XINT_GENL 0x10000 /* Error ext intr */ -#define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */ -#define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */ -#define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */ -#define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */ -#define APC_XINT_COVF 0x800 /* Cap data dropped on floor */ -#define APC_XINT_CNVA 0x400 /* Capture NVA dirty */ -#define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */ -#define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */ -#define APC_PPAUSE 0x80 /* Pause the play DMA */ -#define APC_CPAUSE 0x40 /* Pause the capture DMA */ -#define APC_CDC_RESET 0x20 /* CODEC RESET */ -#define APC_PDMA_READY 0x08 /* Play DMA Go */ -#define APC_CDMA_READY 0x04 /* Capture DMA Go */ -#define APC_CHIP_RESET 0x01 /* Reset the chip */ - -/* EBUS DMA register offsets */ - -#define EBDMA_CSR 0x00UL /* Control/Status */ -#define EBDMA_ADDR 0x04UL /* DMA Address */ -#define EBDMA_COUNT 0x08UL /* DMA Count */ - -/* - * Some variables - */ - -static unsigned char freq_bits[14] = { - /* 5510 */ 0x00 | CS4231_XTAL2, - /* 6620 */ 0x0E | CS4231_XTAL2, - /* 8000 */ 0x00 | CS4231_XTAL1, - /* 9600 */ 0x0E | CS4231_XTAL1, - /* 11025 */ 0x02 | CS4231_XTAL2, - /* 16000 */ 0x02 | CS4231_XTAL1, - /* 18900 */ 0x04 | CS4231_XTAL2, - /* 22050 */ 0x06 | CS4231_XTAL2, - /* 27042 */ 0x04 | CS4231_XTAL1, - /* 32000 */ 0x06 | CS4231_XTAL1, - /* 33075 */ 0x0C | CS4231_XTAL2, - /* 37800 */ 0x08 | CS4231_XTAL2, - /* 44100 */ 0x0A | CS4231_XTAL2, - /* 48000 */ 0x0C | CS4231_XTAL1 -}; - -static unsigned int rates[14] = { - 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050, - 27042, 32000, 33075, 37800, 44100, 48000 -}; - -static struct snd_pcm_hw_constraint_list hw_constraints_rates = { - .count = ARRAY_SIZE(rates), - .list = rates, -}; - -static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime) -{ - return snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - &hw_constraints_rates); -} - -static unsigned char snd_cs4231_original_image[32] = -{ - 0x00, /* 00/00 - lic */ - 0x00, /* 01/01 - ric */ - 0x9f, /* 02/02 - la1ic */ - 0x9f, /* 03/03 - ra1ic */ - 0x9f, /* 04/04 - la2ic */ - 0x9f, /* 05/05 - ra2ic */ - 0xbf, /* 06/06 - loc */ - 0xbf, /* 07/07 - roc */ - 0x20, /* 08/08 - pdfr */ - CS4231_AUTOCALIB, /* 09/09 - ic */ - 0x00, /* 0a/10 - pc */ - 0x00, /* 0b/11 - ti */ - CS4231_MODE2, /* 0c/12 - mi */ - 0x00, /* 0d/13 - lbc */ - 0x00, /* 0e/14 - pbru */ - 0x00, /* 0f/15 - pbrl */ - 0x80, /* 10/16 - afei */ - 0x01, /* 11/17 - afeii */ - 0x9f, /* 12/18 - llic */ - 0x9f, /* 13/19 - rlic */ - 0x00, /* 14/20 - tlb */ - 0x00, /* 15/21 - thb */ - 0x00, /* 16/22 - la3mic/reserved */ - 0x00, /* 17/23 - ra3mic/reserved */ - 0x00, /* 18/24 - afs */ - 0x00, /* 19/25 - lamoc/version */ - 0x00, /* 1a/26 - mioc */ - 0x00, /* 1b/27 - ramoc/reserved */ - 0x20, /* 1c/28 - cdfr */ - 0x00, /* 1d/29 - res4 */ - 0x00, /* 1e/30 - cbru */ - 0x00, /* 1f/31 - cbrl */ -}; - -static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr) -{ - if (cp->flags & CS4231_FLAG_EBUS) - return readb(reg_addr); - else - return sbus_readb(reg_addr); -} - -static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val, - void __iomem *reg_addr) -{ - if (cp->flags & CS4231_FLAG_EBUS) - return writeb(val, reg_addr); - else - return sbus_writeb(val, reg_addr); -} - -/* - * Basic I/O functions - */ - -static void snd_cs4231_ready(struct snd_cs4231 *chip) -{ - int timeout; - - for (timeout = 250; timeout > 0; timeout--) { - int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); - if ((val & CS4231_INIT) == 0) - break; - udelay(100); - } -} - -static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, - unsigned char value) -{ - snd_cs4231_ready(chip); -#ifdef CONFIG_SND_DEBUG - if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) - snd_printdd("out: auto calibration time out - reg = 0x%x, " - "value = 0x%x\n", - reg, value); -#endif - __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); - wmb(); - __cs4231_writeb(chip, value, CS4231U(chip, REG)); - mb(); -} - -static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg, - unsigned char mask, unsigned char value) -{ - unsigned char tmp = (chip->image[reg] & mask) | value; - - chip->image[reg] = tmp; - if (!chip->calibrate_mute) - snd_cs4231_dout(chip, reg, tmp); -} - -static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, - unsigned char value) -{ - snd_cs4231_dout(chip, reg, value); - chip->image[reg] = value; - mb(); -} - -static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg) -{ - snd_cs4231_ready(chip); -#ifdef CONFIG_SND_DEBUG - if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) - snd_printdd("in: auto calibration time out - reg = 0x%x\n", - reg); -#endif - __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); - mb(); - return __cs4231_readb(chip, CS4231U(chip, REG)); -} - -/* - * CS4231 detection / MCE routines - */ - -static void snd_cs4231_busy_wait(struct snd_cs4231 *chip) -{ - int timeout; - - /* looks like this sequence is proper for CS4231A chip (GUS MAX) */ - for (timeout = 5; timeout > 0; timeout--) - __cs4231_readb(chip, CS4231U(chip, REGSEL)); - - /* end of cleanup sequence */ - for (timeout = 500; timeout > 0; timeout--) { - int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); - if ((val & CS4231_INIT) == 0) - break; - msleep(1); - } -} - -static void snd_cs4231_mce_up(struct snd_cs4231 *chip) -{ - unsigned long flags; - int timeout; - - spin_lock_irqsave(&chip->lock, flags); - snd_cs4231_ready(chip); -#ifdef CONFIG_SND_DEBUG - if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) - snd_printdd("mce_up - auto calibration time out (0)\n"); -#endif - chip->mce_bit |= CS4231_MCE; - timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL)); - if (timeout == 0x80) - snd_printdd("mce_up [%p]: serious init problem - " - "codec still busy\n", - chip->port); - if (!(timeout & CS4231_MCE)) - __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), - CS4231U(chip, REGSEL)); - spin_unlock_irqrestore(&chip->lock, flags); -} - -static void snd_cs4231_mce_down(struct snd_cs4231 *chip) -{ - unsigned long flags, timeout; - int reg; - - snd_cs4231_busy_wait(chip); - spin_lock_irqsave(&chip->lock, flags); -#ifdef CONFIG_SND_DEBUG - if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) - snd_printdd("mce_down [%p] - auto calibration time out (0)\n", - CS4231U(chip, REGSEL)); -#endif - chip->mce_bit &= ~CS4231_MCE; - reg = __cs4231_readb(chip, CS4231U(chip, REGSEL)); - __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f), - CS4231U(chip, REGSEL)); - if (reg == 0x80) - snd_printdd("mce_down [%p]: serious init problem " - "- codec still busy\n", chip->port); - if ((reg & CS4231_MCE) == 0) { - spin_unlock_irqrestore(&chip->lock, flags); - return; - } - - /* - * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low. - */ - timeout = jiffies + msecs_to_jiffies(250); - do { - spin_unlock_irqrestore(&chip->lock, flags); - msleep(1); - spin_lock_irqsave(&chip->lock, flags); - reg = snd_cs4231_in(chip, CS4231_TEST_INIT); - reg &= CS4231_CALIB_IN_PROGRESS; - } while (reg && time_before(jiffies, timeout)); - spin_unlock_irqrestore(&chip->lock, flags); - - if (reg) - snd_printk(KERN_ERR - "mce_down - auto calibration time out (2)\n"); -} - -static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont, - struct snd_pcm_substream *substream, - unsigned int *periods_sent) -{ - struct snd_pcm_runtime *runtime = substream->runtime; - - while (1) { - unsigned int period_size = snd_pcm_lib_period_bytes(substream); - unsigned int offset = period_size * (*periods_sent); - - BUG_ON(period_size >= (1 << 24)); - - if (dma_cont->request(dma_cont, - runtime->dma_addr + offset, period_size)) - return; - (*periods_sent) = ((*periods_sent) + 1) % runtime->periods; - } -} - -static void cs4231_dma_trigger(struct snd_pcm_substream *substream, - unsigned int what, int on) -{ - struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); - struct cs4231_dma_control *dma_cont; - - if (what & CS4231_PLAYBACK_ENABLE) { - dma_cont = &chip->p_dma; - if (on) { - dma_cont->prepare(dma_cont, 0); - dma_cont->enable(dma_cont, 1); - snd_cs4231_advance_dma(dma_cont, - chip->playback_substream, - &chip->p_periods_sent); - } else { - dma_cont->enable(dma_cont, 0); - } - } - if (what & CS4231_RECORD_ENABLE) { - dma_cont = &chip->c_dma; - if (on) { - dma_cont->prepare(dma_cont, 1); - dma_cont->enable(dma_cont, 1); - snd_cs4231_advance_dma(dma_cont, - chip->capture_substream, - &chip->c_periods_sent); - } else { - dma_cont->enable(dma_cont, 0); - } - } -} - -static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd) -{ - struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); - int result = 0; - - switch (cmd) { - case SNDRV_PCM_TRIGGER_START: - case SNDRV_PCM_TRIGGER_STOP: - { - unsigned int what = 0; - struct snd_pcm_substream *s; - unsigned long flags; - - snd_pcm_group_for_each_entry(s, substream) { - if (s == chip->playback_substream) { - what |= CS4231_PLAYBACK_ENABLE; - snd_pcm_trigger_done(s, substream); - } else if (s == chip->capture_substream) { - what |= CS4231_RECORD_ENABLE; - snd_pcm_trigger_done(s, substream); - } - } - - spin_lock_irqsave(&chip->lock, flags); - if (cmd == SNDRV_PCM_TRIGGER_START) { - cs4231_dma_trigger(substream, what, 1); - chip->image[CS4231_IFACE_CTRL] |= what; - } else { - cs4231_dma_trigger(substream, what, 0); - chip->image[CS4231_IFACE_CTRL] &= ~what; - } - snd_cs4231_out(chip, CS4231_IFACE_CTRL, - chip->image[CS4231_IFACE_CTRL]); - spin_unlock_irqrestore(&chip->lock, flags); - break; - } - default: - result = -EINVAL; - break; - } - - return result; -} - -/* - * CODEC I/O - */ - -static unsigned char snd_cs4231_get_rate(unsigned int rate) -{ - int i; - - for (i = 0; i < 14; i++) - if (rate == rates[i]) - return freq_bits[i]; - - return freq_bits[13]; -} - -static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format, - int channels) -{ - unsigned char rformat; - - rformat = CS4231_LINEAR_8; - switch (format) { - case SNDRV_PCM_FORMAT_MU_LAW: - rformat = CS4231_ULAW_8; - break; - case SNDRV_PCM_FORMAT_A_LAW: - rformat = CS4231_ALAW_8; - break; - case SNDRV_PCM_FORMAT_S16_LE: - rformat = CS4231_LINEAR_16; - break; - case SNDRV_PCM_FORMAT_S16_BE: - rformat = CS4231_LINEAR_16_BIG; - break; - case SNDRV_PCM_FORMAT_IMA_ADPCM: - rformat = CS4231_ADPCM_16; - break; - } - if (channels > 1) - rformat |= CS4231_STEREO; - return rformat; -} - -static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute) -{ - unsigned long flags; - - mute = mute ? 1 : 0; - spin_lock_irqsave(&chip->lock, flags); - if (chip->calibrate_mute == mute) { - spin_unlock_irqrestore(&chip->lock, flags); - return; - } - if (!mute) { - snd_cs4231_dout(chip, CS4231_LEFT_INPUT, - chip->image[CS4231_LEFT_INPUT]); - snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, - chip->image[CS4231_RIGHT_INPUT]); - snd_cs4231_dout(chip, CS4231_LOOPBACK, - chip->image[CS4231_LOOPBACK]); - } - snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, - mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]); - snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, - mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]); - snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, - mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]); - snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, - mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]); - snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, - mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]); - snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, - mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]); - snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, - mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]); - snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, - mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]); - snd_cs4231_dout(chip, CS4231_MONO_CTRL, - mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]); - chip->calibrate_mute = mute; - spin_unlock_irqrestore(&chip->lock, flags); -} - -static void snd_cs4231_playback_format(struct snd_cs4231 *chip, - struct snd_pcm_hw_params *params, - unsigned char pdfr) -{ - unsigned long flags; - - mutex_lock(&chip->mce_mutex); - snd_cs4231_calibrate_mute(chip, 1); - - snd_cs4231_mce_up(chip); - - spin_lock_irqsave(&chip->lock, flags); - snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, - (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ? - (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) : - pdfr); - spin_unlock_irqrestore(&chip->lock, flags); - - snd_cs4231_mce_down(chip); - - snd_cs4231_calibrate_mute(chip, 0); - mutex_unlock(&chip->mce_mutex); -} - -static void snd_cs4231_capture_format(struct snd_cs4231 *chip, - struct snd_pcm_hw_params *params, - unsigned char cdfr) -{ - unsigned long flags; - - mutex_lock(&chip->mce_mutex); - snd_cs4231_calibrate_mute(chip, 1); - - snd_cs4231_mce_up(chip); - - spin_lock_irqsave(&chip->lock, flags); - if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) { - snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, - ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) | - (cdfr & 0x0f)); - spin_unlock_irqrestore(&chip->lock, flags); - snd_cs4231_mce_down(chip); - snd_cs4231_mce_up(chip); - spin_lock_irqsave(&chip->lock, flags); - } - snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr); - spin_unlock_irqrestore(&chip->lock, flags); - - snd_cs4231_mce_down(chip); - - snd_cs4231_calibrate_mute(chip, 0); - mutex_unlock(&chip->mce_mutex); -} - -/* - * Timer interface - */ - -static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer) -{ - struct snd_cs4231 *chip = snd_timer_chip(timer); - - return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920; -} - -static int snd_cs4231_timer_start(struct snd_timer *timer) -{ - unsigned long flags; - unsigned int ticks; - struct snd_cs4231 *chip = snd_timer_chip(timer); - - spin_lock_irqsave(&chip->lock, flags); - ticks = timer->sticks; - if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 || - (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] || - (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) { - snd_cs4231_out(chip, CS4231_TIMER_HIGH, - chip->image[CS4231_TIMER_HIGH] = - (unsigned char) (ticks >> 8)); - snd_cs4231_out(chip, CS4231_TIMER_LOW, - chip->image[CS4231_TIMER_LOW] = - (unsigned char) ticks); - snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, - chip->image[CS4231_ALT_FEATURE_1] | - CS4231_TIMER_ENABLE); - } - spin_unlock_irqrestore(&chip->lock, flags); - - return 0; -} - -static int snd_cs4231_timer_stop(struct snd_timer *timer) -{ - unsigned long flags; - struct snd_cs4231 *chip = snd_timer_chip(timer); - - spin_lock_irqsave(&chip->lock, flags); - chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE; - snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, - chip->image[CS4231_ALT_FEATURE_1]); - spin_unlock_irqrestore(&chip->lock, flags); - - return 0; -} - -static void __devinit snd_cs4231_init(struct snd_cs4231 *chip) -{ - unsigned long flags; - - snd_cs4231_mce_down(chip); - -#ifdef SNDRV_DEBUG_MCE - snd_printdd("init: (1)\n"); -#endif - snd_cs4231_mce_up(chip); - spin_lock_irqsave(&chip->lock, flags); - chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | - CS4231_PLAYBACK_PIO | - CS4231_RECORD_ENABLE | - CS4231_RECORD_PIO | - CS4231_CALIB_MODE); - chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB; - snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]); - spin_unlock_irqrestore(&chip->lock, flags); - snd_cs4231_mce_down(chip); - -#ifdef SNDRV_DEBUG_MCE - snd_printdd("init: (2)\n"); -#endif - - snd_cs4231_mce_up(chip); - spin_lock_irqsave(&chip->lock, flags); - snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, - chip->image[CS4231_ALT_FEATURE_1]); - spin_unlock_irqrestore(&chip->lock, flags); - snd_cs4231_mce_down(chip); - -#ifdef SNDRV_DEBUG_MCE - snd_printdd("init: (3) - afei = 0x%x\n", - chip->image[CS4231_ALT_FEATURE_1]); -#endif - - spin_lock_irqsave(&chip->lock, flags); - snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, - chip->image[CS4231_ALT_FEATURE_2]); - spin_unlock_irqrestore(&chip->lock, flags); - - snd_cs4231_mce_up(chip); - spin_lock_irqsave(&chip->lock, flags); - snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, - chip->image[CS4231_PLAYBK_FORMAT]); - spin_unlock_irqrestore(&chip->lock, flags); - snd_cs4231_mce_down(chip); - -#ifdef SNDRV_DEBUG_MCE - snd_printdd("init: (4)\n"); -#endif - - snd_cs4231_mce_up(chip); - spin_lock_irqsave(&chip->lock, flags); - snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]); - spin_unlock_irqrestore(&chip->lock, flags); - snd_cs4231_mce_down(chip); - -#ifdef SNDRV_DEBUG_MCE - snd_printdd("init: (5)\n"); -#endif -} - -static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode) -{ - unsigned long flags; - - mutex_lock(&chip->open_mutex); - if ((chip->mode & mode)) { - mutex_unlock(&chip->open_mutex); - return -EAGAIN; - } - if (chip->mode & CS4231_MODE_OPEN) { - chip->mode |= mode; - mutex_unlock(&chip->open_mutex); - return 0; - } - /* ok. now enable and ack CODEC IRQ */ - spin_lock_irqsave(&chip->lock, flags); - snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | - CS4231_RECORD_IRQ | - CS4231_TIMER_IRQ); - snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); - __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ - __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ - - snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | - CS4231_RECORD_IRQ | - CS4231_TIMER_IRQ); - snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); - - spin_unlock_irqrestore(&chip->lock, flags); - - chip->mode = mode; - mutex_unlock(&chip->open_mutex); - return 0; -} - -static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode) -{ - unsigned long flags; - - mutex_lock(&chip->open_mutex); - chip->mode &= ~mode; - if (chip->mode & CS4231_MODE_OPEN) { - mutex_unlock(&chip->open_mutex); - return; - } - snd_cs4231_calibrate_mute(chip, 1); - - /* disable IRQ */ - spin_lock_irqsave(&chip->lock, flags); - snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); - __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ - __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ - - /* now disable record & playback */ - - if (chip->image[CS4231_IFACE_CTRL] & - (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | - CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) { - spin_unlock_irqrestore(&chip->lock, flags); - snd_cs4231_mce_up(chip); - spin_lock_irqsave(&chip->lock, flags); - chip->image[CS4231_IFACE_CTRL] &= - ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | - CS4231_RECORD_ENABLE | CS4231_RECORD_PIO); - snd_cs4231_out(chip, CS4231_IFACE_CTRL, - chip->image[CS4231_IFACE_CTRL]); - spin_unlock_irqrestore(&chip->lock, flags); - snd_cs4231_mce_down(chip); - spin_lock_irqsave(&chip->lock, flags); - } - - /* clear IRQ again */ - snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); - __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ - __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ - spin_unlock_irqrestore(&chip->lock, flags); - - snd_cs4231_calibrate_mute(chip, 0); - - chip->mode = 0; - mutex_unlock(&chip->open_mutex); -} - -/* - * timer open/close - */ - -static int snd_cs4231_timer_open(struct snd_timer *timer) -{ - struct snd_cs4231 *chip = snd_timer_chip(timer); - snd_cs4231_open(chip, CS4231_MODE_TIMER); - return 0; -} - -static int snd_cs4231_timer_close(struct snd_timer *timer) -{ - struct snd_cs4231 *chip = snd_timer_chip(timer); - snd_cs4231_close(chip, CS4231_MODE_TIMER); - return 0; -} - -static struct snd_timer_hardware snd_cs4231_timer_table = { - .flags = SNDRV_TIMER_HW_AUTO, - .resolution = 9945, - .ticks = 65535, - .open = snd_cs4231_timer_open, - .close = snd_cs4231_timer_close, - .c_resolution = snd_cs4231_timer_resolution, - .start = snd_cs4231_timer_start, - .stop = snd_cs4231_timer_stop, -}; - -/* - * ok.. exported functions.. - */ - -static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *hw_params) -{ - struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); - unsigned char new_pdfr; - int err; - - err = snd_pcm_lib_malloc_pages(substream, - params_buffer_bytes(hw_params)); - if (err < 0) - return err; - new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), - params_channels(hw_params)) | - snd_cs4231_get_rate(params_rate(hw_params)); - snd_cs4231_playback_format(chip, hw_params, new_pdfr); - - return 0; -} - -static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream) -{ - struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - unsigned long flags; - - spin_lock_irqsave(&chip->lock, flags); - - chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | - CS4231_PLAYBACK_PIO); - - BUG_ON(runtime->period_size > 0xffff + 1); - - chip->p_periods_sent = 0; - spin_unlock_irqrestore(&chip->lock, flags); - - return 0; -} - -static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *hw_params) -{ - struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); - unsigned char new_cdfr; - int err; - - err = snd_pcm_lib_malloc_pages(substream, - params_buffer_bytes(hw_params)); - if (err < 0) - return err; - new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), - params_channels(hw_params)) | - snd_cs4231_get_rate(params_rate(hw_params)); - snd_cs4231_capture_format(chip, hw_params, new_cdfr); - - return 0; -} - -static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream) -{ - struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); - unsigned long flags; - - spin_lock_irqsave(&chip->lock, flags); - chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | - CS4231_RECORD_PIO); - - - chip->c_periods_sent = 0; - spin_unlock_irqrestore(&chip->lock, flags); - - return 0; -} - -static void snd_cs4231_overrange(struct snd_cs4231 *chip) -{ - unsigned long flags; - unsigned char res; - - spin_lock_irqsave(&chip->lock, flags); - res = snd_cs4231_in(chip, CS4231_TEST_INIT); - spin_unlock_irqrestore(&chip->lock, flags); - - /* detect overrange only above 0dB; may be user selectable? */ - if (res & (0x08 | 0x02)) - chip->capture_substream->runtime->overrange++; -} - -static void snd_cs4231_play_callback(struct snd_cs4231 *chip) -{ - if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) { - snd_pcm_period_elapsed(chip->playback_substream); - snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream, - &chip->p_periods_sent); - } -} - -static void snd_cs4231_capture_callback(struct snd_cs4231 *chip) -{ - if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) { - snd_pcm_period_elapsed(chip->capture_substream); - snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream, - &chip->c_periods_sent); - } -} - -static snd_pcm_uframes_t snd_cs4231_playback_pointer( - struct snd_pcm_substream *substream) -{ - struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); - struct cs4231_dma_control *dma_cont = &chip->p_dma; - size_t ptr; - - if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) - return 0; - ptr = dma_cont->address(dma_cont); - if (ptr != 0) - ptr -= substream->runtime->dma_addr; - - return bytes_to_frames(substream->runtime, ptr); -} - -static snd_pcm_uframes_t snd_cs4231_capture_pointer( - struct snd_pcm_substream *substream) -{ - struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); - struct cs4231_dma_control *dma_cont = &chip->c_dma; - size_t ptr; - - if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE)) - return 0; - ptr = dma_cont->address(dma_cont); - if (ptr != 0) - ptr -= substream->runtime->dma_addr; - - return bytes_to_frames(substream->runtime, ptr); -} - -static int __devinit snd_cs4231_probe(struct snd_cs4231 *chip) -{ - unsigned long flags; - int i; - int id = 0; - int vers = 0; - unsigned char *ptr; - - for (i = 0; i < 50; i++) { - mb(); - if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) - msleep(2); - else { - spin_lock_irqsave(&chip->lock, flags); - snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2); - id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f; - vers = snd_cs4231_in(chip, CS4231_VERSION); - spin_unlock_irqrestore(&chip->lock, flags); - if (id == 0x0a) - break; /* this is valid value */ - } - } - snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id); - if (id != 0x0a) - return -ENODEV; /* no valid device found */ - - spin_lock_irqsave(&chip->lock, flags); - - /* clear any pendings IRQ */ - __cs4231_readb(chip, CS4231U(chip, STATUS)); - __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); - mb(); - - spin_unlock_irqrestore(&chip->lock, flags); - - chip->image[CS4231_MISC_INFO] = CS4231_MODE2; - chip->image[CS4231_IFACE_CTRL] = - chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA; - chip->image[CS4231_ALT_FEATURE_1] = 0x80; - chip->image[CS4231_ALT_FEATURE_2] = 0x01; - if (vers & 0x20) - chip->image[CS4231_ALT_FEATURE_2] |= 0x02; - - ptr = (unsigned char *) &chip->image; - - snd_cs4231_mce_down(chip); - - spin_lock_irqsave(&chip->lock, flags); - - for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */ - snd_cs4231_out(chip, i, *ptr++); - - spin_unlock_irqrestore(&chip->lock, flags); - - snd_cs4231_mce_up(chip); - - snd_cs4231_mce_down(chip); - - mdelay(2); - - return 0; /* all things are ok.. */ -} - -static struct snd_pcm_hardware snd_cs4231_playback = { - .info = SNDRV_PCM_INFO_MMAP | - SNDRV_PCM_INFO_INTERLEAVED | - SNDRV_PCM_INFO_MMAP_VALID | - SNDRV_PCM_INFO_SYNC_START, - .formats = SNDRV_PCM_FMTBIT_MU_LAW | - SNDRV_PCM_FMTBIT_A_LAW | - SNDRV_PCM_FMTBIT_IMA_ADPCM | - SNDRV_PCM_FMTBIT_U8 | - SNDRV_PCM_FMTBIT_S16_LE | - SNDRV_PCM_FMTBIT_S16_BE, - .rates = SNDRV_PCM_RATE_KNOT | - SNDRV_PCM_RATE_8000_48000, - .rate_min = 5510, - .rate_max = 48000, - .channels_min = 1, - .channels_max = 2, - .buffer_bytes_max = 32 * 1024, - .period_bytes_min = 64, - .period_bytes_max = 32 * 1024, - .periods_min = 1, - .periods_max = 1024, -}; - -static struct snd_pcm_hardware snd_cs4231_capture = { - .info = SNDRV_PCM_INFO_MMAP | - SNDRV_PCM_INFO_INTERLEAVED | - SNDRV_PCM_INFO_MMAP_VALID | - SNDRV_PCM_INFO_SYNC_START, - .formats = SNDRV_PCM_FMTBIT_MU_LAW | - SNDRV_PCM_FMTBIT_A_LAW | - SNDRV_PCM_FMTBIT_IMA_ADPCM | - SNDRV_PCM_FMTBIT_U8 | - SNDRV_PCM_FMTBIT_S16_LE | - SNDRV_PCM_FMTBIT_S16_BE, - .rates = SNDRV_PCM_RATE_KNOT | - SNDRV_PCM_RATE_8000_48000, - .rate_min = 5510, - .rate_max = 48000, - .channels_min = 1, - .channels_max = 2, - .buffer_bytes_max = 32 * 1024, - .period_bytes_min = 64, - .period_bytes_max = 32 * 1024, - .periods_min = 1, - .periods_max = 1024, -}; - -static int snd_cs4231_playback_open(struct snd_pcm_substream *substream) -{ - struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - int err; - - runtime->hw = snd_cs4231_playback; - - err = snd_cs4231_open(chip, CS4231_MODE_PLAY); - if (err < 0) { - snd_free_pages(runtime->dma_area, runtime->dma_bytes); - return err; - } - chip->playback_substream = substream; - chip->p_periods_sent = 0; - snd_pcm_set_sync(substream); - snd_cs4231_xrate(runtime); - - return 0; -} - -static int snd_cs4231_capture_open(struct snd_pcm_substream *substream) -{ - struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - int err; - - runtime->hw = snd_cs4231_capture; - - err = snd_cs4231_open(chip, CS4231_MODE_RECORD); - if (err < 0) { - snd_free_pages(runtime->dma_area, runtime->dma_bytes); - return err; - } - chip->capture_substream = substream; - chip->c_periods_sent = 0; - snd_pcm_set_sync(substream); - snd_cs4231_xrate(runtime); - - return 0; -} - -static int snd_cs4231_playback_close(struct snd_pcm_substream *substream) -{ - struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); - - snd_cs4231_close(chip, CS4231_MODE_PLAY); - chip->playback_substream = NULL; - - return 0; -} - -static int snd_cs4231_capture_close(struct snd_pcm_substream *substream) -{ - struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); - - snd_cs4231_close(chip, CS4231_MODE_RECORD); - chip->capture_substream = NULL; - - return 0; -} - -/* XXX We can do some power-management, in particular on EBUS using - * XXX the audio AUXIO register... - */ - -static struct snd_pcm_ops snd_cs4231_playback_ops = { - .open = snd_cs4231_playback_open, - .close = snd_cs4231_playback_close, - .ioctl = snd_pcm_lib_ioctl, - .hw_params = snd_cs4231_playback_hw_params, - .hw_free = snd_pcm_lib_free_pages, - .prepare = snd_cs4231_playback_prepare, - .trigger = snd_cs4231_trigger, - .pointer = snd_cs4231_playback_pointer, -}; - -static struct snd_pcm_ops snd_cs4231_capture_ops = { - .open = snd_cs4231_capture_open, - .close = snd_cs4231_capture_close, - .ioctl = snd_pcm_lib_ioctl, - .hw_params = snd_cs4231_capture_hw_params, - .hw_free = snd_pcm_lib_free_pages, - .prepare = snd_cs4231_capture_prepare, - .trigger = snd_cs4231_trigger, - .pointer = snd_cs4231_capture_pointer, -}; - -static int __devinit snd_cs4231_pcm(struct snd_card *card) -{ - struct snd_cs4231 *chip = card->private_data; - struct snd_pcm *pcm; - int err; - - err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm); - if (err < 0) - return err; - - snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, - &snd_cs4231_playback_ops); - snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, - &snd_cs4231_capture_ops); - - /* global setup */ - pcm->private_data = chip; - pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; - strcpy(pcm->name, "CS4231"); - - snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, - &chip->op->dev, - 64 * 1024, 128 * 1024); - - chip->pcm = pcm; - - return 0; -} - -static int __devinit snd_cs4231_timer(struct snd_card *card) -{ - struct snd_cs4231 *chip = card->private_data; - struct snd_timer *timer; - struct snd_timer_id tid; - int err; - - /* Timer initialization */ - tid.dev_class = SNDRV_TIMER_CLASS_CARD; - tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; - tid.card = card->number; - tid.device = 0; - tid.subdevice = 0; - err = snd_timer_new(card, "CS4231", &tid, &timer); - if (err < 0) - return err; - strcpy(timer->name, "CS4231"); - timer->private_data = chip; - timer->hw = snd_cs4231_timer_table; - chip->timer = timer; - - return 0; -} - -/* - * MIXER part - */ - -static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - static char *texts[4] = { - "Line", "CD", "Mic", "Mix" - }; - - uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; - uinfo->count = 2; - uinfo->value.enumerated.items = 4; - if (uinfo->value.enumerated.item > 3) - uinfo->value.enumerated.item = 3; - strcpy(uinfo->value.enumerated.name, - texts[uinfo->value.enumerated.item]); - - return 0; -} - -static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); - unsigned long flags; - - spin_lock_irqsave(&chip->lock, flags); - ucontrol->value.enumerated.item[0] = - (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6; - ucontrol->value.enumerated.item[1] = - (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6; - spin_unlock_irqrestore(&chip->lock, flags); - - return 0; -} - -static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); - unsigned long flags; - unsigned short left, right; - int change; - - if (ucontrol->value.enumerated.item[0] > 3 || - ucontrol->value.enumerated.item[1] > 3) - return -EINVAL; - left = ucontrol->value.enumerated.item[0] << 6; - right = ucontrol->value.enumerated.item[1] << 6; - - spin_lock_irqsave(&chip->lock, flags); - - left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left; - right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right; - change = left != chip->image[CS4231_LEFT_INPUT] || - right != chip->image[CS4231_RIGHT_INPUT]; - snd_cs4231_out(chip, CS4231_LEFT_INPUT, left); - snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right); - - spin_unlock_irqrestore(&chip->lock, flags); - - return change; -} - -static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - int mask = (kcontrol->private_value >> 16) & 0xff; - - uinfo->type = (mask == 1) ? - SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; - uinfo->count = 1; - uinfo->value.integer.min = 0; - uinfo->value.integer.max = mask; - - return 0; -} - -static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); - unsigned long flags; - int reg = kcontrol->private_value & 0xff; - int shift = (kcontrol->private_value >> 8) & 0xff; - int mask = (kcontrol->private_value >> 16) & 0xff; - int invert = (kcontrol->private_value >> 24) & 0xff; - - spin_lock_irqsave(&chip->lock, flags); - - ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask; - - spin_unlock_irqrestore(&chip->lock, flags); - - if (invert) - ucontrol->value.integer.value[0] = - (mask - ucontrol->value.integer.value[0]); - - return 0; -} - -static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); - unsigned long flags; - int reg = kcontrol->private_value & 0xff; - int shift = (kcontrol->private_value >> 8) & 0xff; - int mask = (kcontrol->private_value >> 16) & 0xff; - int invert = (kcontrol->private_value >> 24) & 0xff; - int change; - unsigned short val; - - val = (ucontrol->value.integer.value[0] & mask); - if (invert) - val = mask - val; - val <<= shift; - - spin_lock_irqsave(&chip->lock, flags); - - val = (chip->image[reg] & ~(mask << shift)) | val; - change = val != chip->image[reg]; - snd_cs4231_out(chip, reg, val); - - spin_unlock_irqrestore(&chip->lock, flags); - - return change; -} - -static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - int mask = (kcontrol->private_value >> 24) & 0xff; - - uinfo->type = mask == 1 ? - SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; - uinfo->count = 2; - uinfo->value.integer.min = 0; - uinfo->value.integer.max = mask; - - return 0; -} - -static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); - unsigned long flags; - int left_reg = kcontrol->private_value & 0xff; - int right_reg = (kcontrol->private_value >> 8) & 0xff; - int shift_left = (kcontrol->private_value >> 16) & 0x07; - int shift_right = (kcontrol->private_value >> 19) & 0x07; - int mask = (kcontrol->private_value >> 24) & 0xff; - int invert = (kcontrol->private_value >> 22) & 1; - - spin_lock_irqsave(&chip->lock, flags); - - ucontrol->value.integer.value[0] = - (chip->image[left_reg] >> shift_left) & mask; - ucontrol->value.integer.value[1] = - (chip->image[right_reg] >> shift_right) & mask; - - spin_unlock_irqrestore(&chip->lock, flags); - - if (invert) { - ucontrol->value.integer.value[0] = - (mask - ucontrol->value.integer.value[0]); - ucontrol->value.integer.value[1] = - (mask - ucontrol->value.integer.value[1]); - } - - return 0; -} - -static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); - unsigned long flags; - int left_reg = kcontrol->private_value & 0xff; - int right_reg = (kcontrol->private_value >> 8) & 0xff; - int shift_left = (kcontrol->private_value >> 16) & 0x07; - int shift_right = (kcontrol->private_value >> 19) & 0x07; - int mask = (kcontrol->private_value >> 24) & 0xff; - int invert = (kcontrol->private_value >> 22) & 1; - int change; - unsigned short val1, val2; - - val1 = ucontrol->value.integer.value[0] & mask; - val2 = ucontrol->value.integer.value[1] & mask; - if (invert) { - val1 = mask - val1; - val2 = mask - val2; - } - val1 <<= shift_left; - val2 <<= shift_right; - - spin_lock_irqsave(&chip->lock, flags); - - val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1; - val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2; - change = val1 != chip->image[left_reg]; - change |= val2 != chip->image[right_reg]; - snd_cs4231_out(chip, left_reg, val1); - snd_cs4231_out(chip, right_reg, val2); - - spin_unlock_irqrestore(&chip->lock, flags); - - return change; -} - -#define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \ -{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \ - .info = snd_cs4231_info_single, \ - .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \ - .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) } - -#define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \ - shift_right, mask, invert) \ -{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \ - .info = snd_cs4231_info_double, \ - .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \ - .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \ - ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) } - -static struct snd_kcontrol_new snd_cs4231_controls[] __devinitdata = { -CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, - CS4231_RIGHT_OUTPUT, 7, 7, 1, 1), -CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, - CS4231_RIGHT_OUTPUT, 0, 0, 63, 1), -CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, - CS4231_RIGHT_LINE_IN, 7, 7, 1, 1), -CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, - CS4231_RIGHT_LINE_IN, 0, 0, 31, 1), -CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, - CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1), -CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, - CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1), -CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, - CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1), -CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, - CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1), -CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1), -CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1), -CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1), -CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0), -CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, - 15, 0), -{ - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Capture Source", - .info = snd_cs4231_info_mux, - .get = snd_cs4231_get_mux, - .put = snd_cs4231_put_mux, -}, -CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, - 1, 0), -CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0), -CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1), -/* SPARC specific uses of XCTL{0,1} general purpose outputs. */ -CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1), -CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1) -}; - -static int __devinit snd_cs4231_mixer(struct snd_card *card) -{ - struct snd_cs4231 *chip = card->private_data; - int err, idx; - - if (snd_BUG_ON(!chip || !chip->pcm)) - return -EINVAL; - - strcpy(card->mixername, chip->pcm->name); - - for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) { - err = snd_ctl_add(card, - snd_ctl_new1(&snd_cs4231_controls[idx], chip)); - if (err < 0) - return err; - } - return 0; -} - -static int dev; - -static int __devinit cs4231_attach_begin(struct snd_card **rcard) -{ - struct snd_card *card; - struct snd_cs4231 *chip; - int err; - - *rcard = NULL; - - if (dev >= SNDRV_CARDS) - return -ENODEV; - - if (!enable[dev]) { - dev++; - return -ENOENT; - } - - err = snd_card_create(index[dev], id[dev], THIS_MODULE, - sizeof(struct snd_cs4231), &card); - if (err < 0) - return err; - - strcpy(card->driver, "CS4231"); - strcpy(card->shortname, "Sun CS4231"); - - chip = card->private_data; - chip->card = card; - - *rcard = card; - return 0; -} - -static int __devinit cs4231_attach_finish(struct snd_card *card) -{ - struct snd_cs4231 *chip = card->private_data; - int err; - - err = snd_cs4231_pcm(card); - if (err < 0) - goto out_err; - - err = snd_cs4231_mixer(card); - if (err < 0) - goto out_err; - - err = snd_cs4231_timer(card); - if (err < 0) - goto out_err; - - err = snd_card_register(card); - if (err < 0) - goto out_err; - - dev_set_drvdata(&chip->op->dev, chip); - - dev++; - return 0; - -out_err: - snd_card_free(card); - return err; -} - -#ifdef SBUS_SUPPORT - -static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id) -{ - unsigned long flags; - unsigned char status; - u32 csr; - struct snd_cs4231 *chip = dev_id; - - /*This is IRQ is not raised by the cs4231*/ - if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ)) - return IRQ_NONE; - - /* ACK the APC interrupt. */ - csr = sbus_readl(chip->port + APCCSR); - - sbus_writel(csr, chip->port + APCCSR); - - if ((csr & APC_PDMA_READY) && - (csr & APC_PLAY_INT) && - (csr & APC_XINT_PNVA) && - !(csr & APC_XINT_EMPT)) - snd_cs4231_play_callback(chip); - - if ((csr & APC_CDMA_READY) && - (csr & APC_CAPT_INT) && - (csr & APC_XINT_CNVA) && - !(csr & APC_XINT_EMPT)) - snd_cs4231_capture_callback(chip); - - status = snd_cs4231_in(chip, CS4231_IRQ_STATUS); - - if (status & CS4231_TIMER_IRQ) { - if (chip->timer) - snd_timer_interrupt(chip->timer, chip->timer->sticks); - } - - if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY)) - snd_cs4231_overrange(chip); - - /* ACK the CS4231 interrupt. */ - spin_lock_irqsave(&chip->lock, flags); - snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0); - spin_unlock_irqrestore(&chip->lock, flags); - - return IRQ_HANDLED; -} - -/* - * SBUS DMA routines - */ - -static int sbus_dma_request(struct cs4231_dma_control *dma_cont, - dma_addr_t bus_addr, size_t len) -{ - unsigned long flags; - u32 test, csr; - int err; - struct sbus_dma_info *base = &dma_cont->sbus_info; - - if (len >= (1 << 24)) - return -EINVAL; - spin_lock_irqsave(&base->lock, flags); - csr = sbus_readl(base->regs + APCCSR); - err = -EINVAL; - test = APC_CDMA_READY; - if (base->dir == APC_PLAY) - test = APC_PDMA_READY; - if (!(csr & test)) - goto out; - err = -EBUSY; - test = APC_XINT_CNVA; - if (base->dir == APC_PLAY) - test = APC_XINT_PNVA; - if (!(csr & test)) - goto out; - err = 0; - sbus_writel(bus_addr, base->regs + base->dir + APCNVA); - sbus_writel(len, base->regs + base->dir + APCNC); -out: - spin_unlock_irqrestore(&base->lock, flags); - return err; -} - -static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d) -{ - unsigned long flags; - u32 csr, test; - struct sbus_dma_info *base = &dma_cont->sbus_info; - - spin_lock_irqsave(&base->lock, flags); - csr = sbus_readl(base->regs + APCCSR); - test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA | - APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL | - APC_XINT_PENA; - if (base->dir == APC_RECORD) - test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA | - APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL; - csr |= test; - sbus_writel(csr, base->regs + APCCSR); - spin_unlock_irqrestore(&base->lock, flags); -} - -static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on) -{ - unsigned long flags; - u32 csr, shift; - struct sbus_dma_info *base = &dma_cont->sbus_info; - - spin_lock_irqsave(&base->lock, flags); - if (!on) { - sbus_writel(0, base->regs + base->dir + APCNC); - sbus_writel(0, base->regs + base->dir + APCNVA); - if (base->dir == APC_PLAY) { - sbus_writel(0, base->regs + base->dir + APCC); - sbus_writel(0, base->regs + base->dir + APCVA); - } - - udelay(1200); - } - csr = sbus_readl(base->regs + APCCSR); - shift = 0; - if (base->dir == APC_PLAY) - shift = 1; - if (on) - csr &= ~(APC_CPAUSE << shift); - else - csr |= (APC_CPAUSE << shift); - sbus_writel(csr, base->regs + APCCSR); - if (on) - csr |= (APC_CDMA_READY << shift); - else - csr &= ~(APC_CDMA_READY << shift); - sbus_writel(csr, base->regs + APCCSR); - - spin_unlock_irqrestore(&base->lock, flags); -} - -static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont) -{ - struct sbus_dma_info *base = &dma_cont->sbus_info; - - return sbus_readl(base->regs + base->dir + APCVA); -} - -/* - * Init and exit routines - */ - -static int snd_cs4231_sbus_free(struct snd_cs4231 *chip) -{ - struct platform_device *op = chip->op; - - if (chip->irq[0]) - free_irq(chip->irq[0], chip); - - if (chip->port) - of_iounmap(&op->resource[0], chip->port, chip->regs_size); - - return 0; -} - -static int snd_cs4231_sbus_dev_free(struct snd_device *device) -{ - struct snd_cs4231 *cp = device->device_data; - - return snd_cs4231_sbus_free(cp); -} - -static struct snd_device_ops snd_cs4231_sbus_dev_ops = { - .dev_free = snd_cs4231_sbus_dev_free, -}; - -static int __devinit snd_cs4231_sbus_create(struct snd_card *card, - struct platform_device *op, - int dev) -{ - struct snd_cs4231 *chip = card->private_data; - int err; - - spin_lock_init(&chip->lock); - spin_lock_init(&chip->c_dma.sbus_info.lock); - spin_lock_init(&chip->p_dma.sbus_info.lock); - mutex_init(&chip->mce_mutex); - mutex_init(&chip->open_mutex); - chip->op = op; - chip->regs_size = resource_size(&op->resource[0]); - memcpy(&chip->image, &snd_cs4231_original_image, - sizeof(snd_cs4231_original_image)); - - chip->port = of_ioremap(&op->resource[0], 0, - chip->regs_size, "cs4231"); - if (!chip->port) { - snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev); - return -EIO; - } - - chip->c_dma.sbus_info.regs = chip->port; - chip->p_dma.sbus_info.regs = chip->port; - chip->c_dma.sbus_info.dir = APC_RECORD; - chip->p_dma.sbus_info.dir = APC_PLAY; - - chip->p_dma.prepare = sbus_dma_prepare; - chip->p_dma.enable = sbus_dma_enable; - chip->p_dma.request = sbus_dma_request; - chip->p_dma.address = sbus_dma_addr; - - chip->c_dma.prepare = sbus_dma_prepare; - chip->c_dma.enable = sbus_dma_enable; - chip->c_dma.request = sbus_dma_request; - chip->c_dma.address = sbus_dma_addr; - - if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt, - IRQF_SHARED, "cs4231", chip)) { - snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n", - dev, op->archdata.irqs[0]); - snd_cs4231_sbus_free(chip); - return -EBUSY; - } - chip->irq[0] = op->archdata.irqs[0]; - - if (snd_cs4231_probe(chip) < 0) { - snd_cs4231_sbus_free(chip); - return -ENODEV; - } - snd_cs4231_init(chip); - - if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, - chip, &snd_cs4231_sbus_dev_ops)) < 0) { - snd_cs4231_sbus_free(chip); - return err; - } - - return 0; -} - -static int __devinit cs4231_sbus_probe(struct platform_device *op) -{ - struct resource *rp = &op->resource[0]; - struct snd_card *card; - int err; - - err = cs4231_attach_begin(&card); - if (err) - return err; - - sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d", - card->shortname, - rp->flags & 0xffL, - (unsigned long long)rp->start, - op->archdata.irqs[0]); - - err = snd_cs4231_sbus_create(card, op, dev); - if (err < 0) { - snd_card_free(card); - return err; - } - - return cs4231_attach_finish(card); -} -#endif - -#ifdef EBUS_SUPPORT - -static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, - void *cookie) -{ - struct snd_cs4231 *chip = cookie; - - snd_cs4231_play_callback(chip); -} - -static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, - int event, void *cookie) -{ - struct snd_cs4231 *chip = cookie; - - snd_cs4231_capture_callback(chip); -} - -/* - * EBUS DMA wrappers - */ - -static int _ebus_dma_request(struct cs4231_dma_control *dma_cont, - dma_addr_t bus_addr, size_t len) -{ - return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len); -} - -static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on) -{ - ebus_dma_enable(&dma_cont->ebus_info, on); -} - -static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir) -{ - ebus_dma_prepare(&dma_cont->ebus_info, dir); -} - -static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont) -{ - return ebus_dma_addr(&dma_cont->ebus_info); -} - -/* - * Init and exit routines - */ - -static int snd_cs4231_ebus_free(struct snd_cs4231 *chip) -{ - struct platform_device *op = chip->op; - - if (chip->c_dma.ebus_info.regs) { - ebus_dma_unregister(&chip->c_dma.ebus_info); - of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10); - } - if (chip->p_dma.ebus_info.regs) { - ebus_dma_unregister(&chip->p_dma.ebus_info); - of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10); - } - - if (chip->port) - of_iounmap(&op->resource[0], chip->port, 0x10); - - return 0; -} - -static int snd_cs4231_ebus_dev_free(struct snd_device *device) -{ - struct snd_cs4231 *cp = device->device_data; - - return snd_cs4231_ebus_free(cp); -} - -static struct snd_device_ops snd_cs4231_ebus_dev_ops = { - .dev_free = snd_cs4231_ebus_dev_free, -}; - -static int __devinit snd_cs4231_ebus_create(struct snd_card *card, - struct platform_device *op, - int dev) -{ - struct snd_cs4231 *chip = card->private_data; - int err; - - spin_lock_init(&chip->lock); - spin_lock_init(&chip->c_dma.ebus_info.lock); - spin_lock_init(&chip->p_dma.ebus_info.lock); - mutex_init(&chip->mce_mutex); - mutex_init(&chip->open_mutex); - chip->flags |= CS4231_FLAG_EBUS; - chip->op = op; - memcpy(&chip->image, &snd_cs4231_original_image, - sizeof(snd_cs4231_original_image)); - strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)"); - chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; - chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback; - chip->c_dma.ebus_info.client_cookie = chip; - chip->c_dma.ebus_info.irq = op->archdata.irqs[0]; - strcpy(chip->p_dma.ebus_info.name, "cs4231(play)"); - chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; - chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback; - chip->p_dma.ebus_info.client_cookie = chip; - chip->p_dma.ebus_info.irq = op->archdata.irqs[1]; - - chip->p_dma.prepare = _ebus_dma_prepare; - chip->p_dma.enable = _ebus_dma_enable; - chip->p_dma.request = _ebus_dma_request; - chip->p_dma.address = _ebus_dma_addr; - - chip->c_dma.prepare = _ebus_dma_prepare; - chip->c_dma.enable = _ebus_dma_enable; - chip->c_dma.request = _ebus_dma_request; - chip->c_dma.address = _ebus_dma_addr; - - chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231"); - chip->p_dma.ebus_info.regs = - of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma"); - chip->c_dma.ebus_info.regs = - of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma"); - if (!chip->port || !chip->p_dma.ebus_info.regs || - !chip->c_dma.ebus_info.regs) { - snd_cs4231_ebus_free(chip); - snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev); - return -EIO; - } - - if (ebus_dma_register(&chip->c_dma.ebus_info)) { - snd_cs4231_ebus_free(chip); - snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n", - dev); - return -EBUSY; - } - if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) { - snd_cs4231_ebus_free(chip); - snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n", - dev); - return -EBUSY; - } - - if (ebus_dma_register(&chip->p_dma.ebus_info)) { - snd_cs4231_ebus_free(chip); - snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n", - dev); - return -EBUSY; - } - if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) { - snd_cs4231_ebus_free(chip); - snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev); - return -EBUSY; - } - - if (snd_cs4231_probe(chip) < 0) { - snd_cs4231_ebus_free(chip); - return -ENODEV; - } - snd_cs4231_init(chip); - - if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, - chip, &snd_cs4231_ebus_dev_ops)) < 0) { - snd_cs4231_ebus_free(chip); - return err; - } - - return 0; -} - -static int __devinit cs4231_ebus_probe(struct platform_device *op) -{ - struct snd_card *card; - int err; - - err = cs4231_attach_begin(&card); - if (err) - return err; - - sprintf(card->longname, "%s at 0x%llx, irq %d", - card->shortname, - op->resource[0].start, - op->archdata.irqs[0]); - - err = snd_cs4231_ebus_create(card, op, dev); - if (err < 0) { - snd_card_free(card); - return err; - } - - return cs4231_attach_finish(card); -} -#endif - -static int __devinit cs4231_probe(struct platform_device *op) -{ -#ifdef EBUS_SUPPORT - if (!strcmp(op->dev.of_node->parent->name, "ebus")) - return cs4231_ebus_probe(op); -#endif -#ifdef SBUS_SUPPORT - if (!strcmp(op->dev.of_node->parent->name, "sbus") || - !strcmp(op->dev.of_node->parent->name, "sbi")) - return cs4231_sbus_probe(op); -#endif - return -ENODEV; -} - -static int __devexit cs4231_remove(struct platform_device *op) -{ - struct snd_cs4231 *chip = dev_get_drvdata(&op->dev); - - snd_card_free(chip->card); - - return 0; -} - -static const struct of_device_id cs4231_match[] = { - { - .name = "SUNW,CS4231", - }, - { - .name = "audio", - .compatible = "SUNW,CS4231", - }, - {}, -}; - -MODULE_DEVICE_TABLE(of, cs4231_match); - -static struct platform_driver cs4231_driver = { - .driver = { - .name = "audio", - .owner = THIS_MODULE, - .of_match_table = cs4231_match, - }, - .probe = cs4231_probe, - .remove = __devexit_p(cs4231_remove), -}; - -module_platform_driver(cs4231_driver); diff --git a/ANDROID_3.4.5/sound/sparc/dbri.c b/ANDROID_3.4.5/sound/sparc/dbri.c deleted file mode 100644 index a6b0deb7..00000000 --- a/ANDROID_3.4.5/sound/sparc/dbri.c +++ /dev/null @@ -1,2700 +0,0 @@ -/* - * Driver for DBRI sound chip found on Sparcs. - * Copyright (C) 2004, 2005 Martin Habets (mhabets@users.sourceforge.net) - * - * Converted to ring buffered version by Krzysztof Helt (krzysztof.h1@wp.pl) - * - * Based entirely upon drivers/sbus/audio/dbri.c which is: - * Copyright (C) 1997 Rudolf Koenig (rfkoenig@immd4.informatik.uni-erlangen.de) - * Copyright (C) 1998, 1999 Brent Baccala (baccala@freesoft.org) - * - * This is the low level driver for the DBRI & MMCODEC duo used for ISDN & AUDIO - * on Sun SPARCStation 10, 20, LX and Voyager models. - * - * - DBRI: AT&T T5900FX Dual Basic Rates ISDN Interface. It is a 32 channel - * data time multiplexer with ISDN support (aka T7259) - * Interfaces: SBus,ISDN NT & TE, CHI, 4 bits parallel. - * CHI: (spelled ki) Concentration Highway Interface (AT&T or Intel bus ?). - * Documentation: - * - "STP 4000SBus Dual Basic Rate ISDN (DBRI) Transceiver" from - * Sparc Technology Business (courtesy of Sun Support) - * - Data sheet of the T7903, a newer but very similar ISA bus equivalent - * available from the Lucent (formerly AT&T microelectronics) home - * page. - * - http://www.freesoft.org/Linux/DBRI/ - * - MMCODEC: Crystal Semiconductor CS4215 16 bit Multimedia Audio Codec - * Interfaces: CHI, Audio In & Out, 2 bits parallel - * Documentation: from the Crystal Semiconductor home page. - * - * The DBRI is a 32 pipe machine, each pipe can transfer some bits between - * memory and a serial device (long pipes, no. 0-15) or between two serial - * devices (short pipes, no. 16-31), or simply send a fixed data to a serial - * device (short pipes). - * A timeslot defines the bit-offset and no. of bits read from a serial device. - * The timeslots are linked to 6 circular lists, one for each direction for - * each serial device (NT,TE,CHI). A timeslot is associated to 1 or 2 pipes - * (the second one is a monitor/tee pipe, valid only for serial input). - * - * The mmcodec is connected via the CHI bus and needs the data & some - * parameters (volume, output selection) time multiplexed in 8 byte - * chunks. It also has a control mode, which serves for audio format setting. - * - * Looking at the CS4215 data sheet it is easy to set up 2 or 4 codecs on - * the same CHI bus, so I thought perhaps it is possible to use the on-board - * & the speakerbox codec simultaneously, giving 2 (not very independent :-) - * audio devices. But the SUN HW group decided against it, at least on my - * LX the speakerbox connector has at least 1 pin missing and 1 wrongly - * connected. - * - * I've tried to stick to the following function naming conventions: - * snd_* ALSA stuff - * cs4215_* CS4215 codec specific stuff - * dbri_* DBRI high-level stuff - * other DBRI low-level stuff - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -MODULE_AUTHOR("Rudolf Koenig, Brent Baccala and Martin Habets"); -MODULE_DESCRIPTION("Sun DBRI"); -MODULE_LICENSE("GPL"); -MODULE_SUPPORTED_DEVICE("{{Sun,DBRI}}"); - -static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ -static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ -/* Enable this card */ -static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; - -module_param_array(index, int, NULL, 0444); -MODULE_PARM_DESC(index, "Index value for Sun DBRI soundcard."); -module_param_array(id, charp, NULL, 0444); -MODULE_PARM_DESC(id, "ID string for Sun DBRI soundcard."); -module_param_array(enable, bool, NULL, 0444); -MODULE_PARM_DESC(enable, "Enable Sun DBRI soundcard."); - -#undef DBRI_DEBUG - -#define D_INT (1<<0) -#define D_GEN (1<<1) -#define D_CMD (1<<2) -#define D_MM (1<<3) -#define D_USR (1<<4) -#define D_DESC (1<<5) - -static int dbri_debug; -module_param(dbri_debug, int, 0644); -MODULE_PARM_DESC(dbri_debug, "Debug value for Sun DBRI soundcard."); - -#ifdef DBRI_DEBUG -static char *cmds[] = { - "WAIT", "PAUSE", "JUMP", "IIQ", "REX", "SDP", "CDP", "DTS", - "SSP", "CHI", "NT", "TE", "CDEC", "TEST", "CDM", "RESRV" -}; - -#define dprintk(a, x...) if (dbri_debug & a) printk(KERN_DEBUG x) - -#else -#define dprintk(a, x...) do { } while (0) - -#endif /* DBRI_DEBUG */ - -#define DBRI_CMD(cmd, intr, value) ((cmd << 28) | \ - (intr << 27) | \ - value) - -/*************************************************************************** - CS4215 specific definitions and structures -****************************************************************************/ - -struct cs4215 { - __u8 data[4]; /* Data mode: Time slots 5-8 */ - __u8 ctrl[4]; /* Ctrl mode: Time slots 1-4 */ - __u8 onboard; - __u8 offset; /* Bit offset from frame sync to time slot 1 */ - volatile __u32 status; - volatile __u32 version; - __u8 precision; /* In bits, either 8 or 16 */ - __u8 channels; /* 1 or 2 */ -}; - -/* - * Control mode first - */ - -/* Time Slot 1, Status register */ -#define CS4215_CLB (1<<2) /* Control Latch Bit */ -#define CS4215_OLB (1<<3) /* 1: line: 2.0V, speaker 4V */ - /* 0: line: 2.8V, speaker 8V */ -#define CS4215_MLB (1<<4) /* 1: Microphone: 20dB gain disabled */ -#define CS4215_RSRVD_1 (1<<5) - -/* Time Slot 2, Data Format Register */ -#define CS4215_DFR_LINEAR16 0 -#define CS4215_DFR_ULAW 1 -#define CS4215_DFR_ALAW 2 -#define CS4215_DFR_LINEAR8 3 -#define CS4215_DFR_STEREO (1<<2) -static struct { - unsigned short freq; - unsigned char xtal; - unsigned char csval; -} CS4215_FREQ[] = { - { 8000, (1 << 4), (0 << 3) }, - { 16000, (1 << 4), (1 << 3) }, - { 27429, (1 << 4), (2 << 3) }, /* Actually 24428.57 */ - { 32000, (1 << 4), (3 << 3) }, - /* { NA, (1 << 4), (4 << 3) }, */ - /* { NA, (1 << 4), (5 << 3) }, */ - { 48000, (1 << 4), (6 << 3) }, - { 9600, (1 << 4), (7 << 3) }, - { 5512, (2 << 4), (0 << 3) }, /* Actually 5512.5 */ - { 11025, (2 << 4), (1 << 3) }, - { 18900, (2 << 4), (2 << 3) }, - { 22050, (2 << 4), (3 << 3) }, - { 37800, (2 << 4), (4 << 3) }, - { 44100, (2 << 4), (5 << 3) }, - { 33075, (2 << 4), (6 << 3) }, - { 6615, (2 << 4), (7 << 3) }, - { 0, 0, 0} -}; - -#define CS4215_HPF (1<<7) /* High Pass Filter, 1: Enabled */ - -#define CS4215_12_MASK 0xfcbf /* Mask off reserved bits in slot 1 & 2 */ - -/* Time Slot 3, Serial Port Control register */ -#define CS4215_XEN (1<<0) /* 0: Enable serial output */ -#define CS4215_XCLK (1<<1) /* 1: Master mode: Generate SCLK */ -#define CS4215_BSEL_64 (0<<2) /* Bitrate: 64 bits per frame */ -#define CS4215_BSEL_128 (1<<2) -#define CS4215_BSEL_256 (2<<2) -#define CS4215_MCK_MAST (0<<4) /* Master clock */ -#define CS4215_MCK_XTL1 (1<<4) /* 24.576 MHz clock source */ -#define CS4215_MCK_XTL2 (2<<4) /* 16.9344 MHz clock source */ -#define CS4215_MCK_CLK1 (3<<4) /* Clockin, 256 x Fs */ -#define CS4215_MCK_CLK2 (4<<4) /* Clockin, see DFR */ - -/* Time Slot 4, Test Register */ -#define CS4215_DAD (1<<0) /* 0:Digital-Dig loop, 1:Dig-Analog-Dig loop */ -#define CS4215_ENL (1<<1) /* Enable Loopback Testing */ - -/* Time Slot 5, Parallel Port Register */ -/* Read only here and the same as the in data mode */ - -/* Time Slot 6, Reserved */ - -/* Time Slot 7, Version Register */ -#define CS4215_VERSION_MASK 0xf /* Known versions 0/C, 1/D, 2/E */ - -/* Time Slot 8, Reserved */ - -/* - * Data mode - */ -/* Time Slot 1-2: Left Channel Data, 2-3: Right Channel Data */ - -/* Time Slot 5, Output Setting */ -#define CS4215_LO(v) v /* Left Output Attenuation 0x3f: -94.5 dB */ -#define CS4215_LE (1<<6) /* Line Out Enable */ -#define CS4215_HE (1<<7) /* Headphone Enable */ - -/* Time Slot 6, Output Setting */ -#define CS4215_RO(v) v /* Right Output Attenuation 0x3f: -94.5 dB */ -#define CS4215_SE (1<<6) /* Speaker Enable */ -#define CS4215_ADI (1<<7) /* A/D Data Invalid: Busy in calibration */ - -/* Time Slot 7, Input Setting */ -#define CS4215_LG(v) v /* Left Gain Setting 0xf: 22.5 dB */ -#define CS4215_IS (1<<4) /* Input Select: 1=Microphone, 0=Line */ -#define CS4215_OVR (1<<5) /* 1: Over range condition occurred */ -#define CS4215_PIO0 (1<<6) /* Parallel I/O 0 */ -#define CS4215_PIO1 (1<<7) - -/* Time Slot 8, Input Setting */ -#define CS4215_RG(v) v /* Right Gain Setting 0xf: 22.5 dB */ -#define CS4215_MA(v) (v<<4) /* Monitor Path Attenuation 0xf: mute */ - -/*************************************************************************** - DBRI specific definitions and structures -****************************************************************************/ - -/* DBRI main registers */ -#define REG0 0x00 /* Status and Control */ -#define REG1 0x04 /* Mode and Interrupt */ -#define REG2 0x08 /* Parallel IO */ -#define REG3 0x0c /* Test */ -#define REG8 0x20 /* Command Queue Pointer */ -#define REG9 0x24 /* Interrupt Queue Pointer */ - -#define DBRI_NO_CMDS 64 -#define DBRI_INT_BLK 64 -#define DBRI_NO_DESCS 64 -#define DBRI_NO_PIPES 32 -#define DBRI_MAX_PIPE (DBRI_NO_PIPES - 1) - -#define DBRI_REC 0 -#define DBRI_PLAY 1 -#define DBRI_NO_STREAMS 2 - -/* One transmit/receive descriptor */ -/* When ba != 0 descriptor is used */ -struct dbri_mem { - volatile __u32 word1; - __u32 ba; /* Transmit/Receive Buffer Address */ - __u32 nda; /* Next Descriptor Address */ - volatile __u32 word4; -}; - -/* This structure is in a DMA region where it can accessed by both - * the CPU and the DBRI - */ -struct dbri_dma { - s32 cmd[DBRI_NO_CMDS]; /* Place for commands */ - volatile s32 intr[DBRI_INT_BLK]; /* Interrupt field */ - struct dbri_mem desc[DBRI_NO_DESCS]; /* Xmit/receive descriptors */ -}; - -#define dbri_dma_off(member, elem) \ - ((u32)(unsigned long) \ - (&(((struct dbri_dma *)0)->member[elem]))) - -enum in_or_out { PIPEinput, PIPEoutput }; - -struct dbri_pipe { - u32 sdp; /* SDP command word */ - int nextpipe; /* Next pipe in linked list */ - int length; /* Length of timeslot (bits) */ - int first_desc; /* Index of first descriptor */ - int desc; /* Index of active descriptor */ - volatile __u32 *recv_fixed_ptr; /* Ptr to receive fixed data */ -}; - -/* Per stream (playback or record) information */ -struct dbri_streaminfo { - struct snd_pcm_substream *substream; - u32 dvma_buffer; /* Device view of ALSA DMA buffer */ - int size; /* Size of DMA buffer */ - size_t offset; /* offset in user buffer */ - int pipe; /* Data pipe used */ - int left_gain; /* mixer elements */ - int right_gain; -}; - -/* This structure holds the information for both chips (DBRI & CS4215) */ -struct snd_dbri { - int regs_size, irq; /* Needed for unload */ - struct platform_device *op; /* OF device info */ - spinlock_t lock; - - struct dbri_dma *dma; /* Pointer to our DMA block */ - u32 dma_dvma; /* DBRI visible DMA address */ - - void __iomem *regs; /* dbri HW regs */ - int dbri_irqp; /* intr queue pointer */ - - struct dbri_pipe pipes[DBRI_NO_PIPES]; /* DBRI's 32 data pipes */ - int next_desc[DBRI_NO_DESCS]; /* Index of next desc, or -1 */ - spinlock_t cmdlock; /* Protects cmd queue accesses */ - s32 *cmdptr; /* Pointer to the last queued cmd */ - - int chi_bpf; - - struct cs4215 mm; /* mmcodec special info */ - /* per stream (playback/record) info */ - struct dbri_streaminfo stream_info[DBRI_NO_STREAMS]; -}; - -#define DBRI_MAX_VOLUME 63 /* Output volume */ -#define DBRI_MAX_GAIN 15 /* Input gain */ - -/* DBRI Reg0 - Status Control Register - defines. (Page 17) */ -#define D_P (1<<15) /* Program command & queue pointer valid */ -#define D_G (1<<14) /* Allow 4-Word SBus Burst */ -#define D_S (1<<13) /* Allow 16-Word SBus Burst */ -#define D_E (1<<12) /* Allow 8-Word SBus Burst */ -#define D_X (1<<7) /* Sanity Timer Disable */ -#define D_T (1<<6) /* Permit activation of the TE interface */ -#define D_N (1<<5) /* Permit activation of the NT interface */ -#define D_C (1<<4) /* Permit activation of the CHI interface */ -#define D_F (1<<3) /* Force Sanity Timer Time-Out */ -#define D_D (1<<2) /* Disable Master Mode */ -#define D_H (1<<1) /* Halt for Analysis */ -#define D_R (1<<0) /* Soft Reset */ - -/* DBRI Reg1 - Mode and Interrupt Register - defines. (Page 18) */ -#define D_LITTLE_END (1<<8) /* Byte Order */ -#define D_BIG_END (0<<8) /* Byte Order */ -#define D_MRR (1<<4) /* Multiple Error Ack on SBus (read only) */ -#define D_MLE (1<<3) /* Multiple Late Error on SBus (read only) */ -#define D_LBG (1<<2) /* Lost Bus Grant on SBus (read only) */ -#define D_MBE (1<<1) /* Burst Error on SBus (read only) */ -#define D_IR (1<<0) /* Interrupt Indicator (read only) */ - -/* DBRI Reg2 - Parallel IO Register - defines. (Page 18) */ -#define D_ENPIO3 (1<<7) /* Enable Pin 3 */ -#define D_ENPIO2 (1<<6) /* Enable Pin 2 */ -#define D_ENPIO1 (1<<5) /* Enable Pin 1 */ -#define D_ENPIO0 (1<<4) /* Enable Pin 0 */ -#define D_ENPIO (0xf0) /* Enable all the pins */ -#define D_PIO3 (1<<3) /* Pin 3: 1: Data mode, 0: Ctrl mode */ -#define D_PIO2 (1<<2) /* Pin 2: 1: Onboard PDN */ -#define D_PIO1 (1<<1) /* Pin 1: 0: Reset */ -#define D_PIO0 (1<<0) /* Pin 0: 1: Speakerbox PDN */ - -/* DBRI Commands (Page 20) */ -#define D_WAIT 0x0 /* Stop execution */ -#define D_PAUSE 0x1 /* Flush long pipes */ -#define D_JUMP 0x2 /* New command queue */ -#define D_IIQ 0x3 /* Initialize Interrupt Queue */ -#define D_REX 0x4 /* Report command execution via interrupt */ -#define D_SDP 0x5 /* Setup Data Pipe */ -#define D_CDP 0x6 /* Continue Data Pipe (reread NULL Pointer) */ -#define D_DTS 0x7 /* Define Time Slot */ -#define D_SSP 0x8 /* Set short Data Pipe */ -#define D_CHI 0x9 /* Set CHI Global Mode */ -#define D_NT 0xa /* NT Command */ -#define D_TE 0xb /* TE Command */ -#define D_CDEC 0xc /* Codec setup */ -#define D_TEST 0xd /* No comment */ -#define D_CDM 0xe /* CHI Data mode command */ - -/* Special bits for some commands */ -#define D_PIPE(v) ((v)<<0) /* Pipe No.: 0-15 long, 16-21 short */ - -/* Setup Data Pipe */ -/* IRM */ -#define D_SDP_2SAME (1<<18) /* Report 2nd time in a row value received */ -#define D_SDP_CHANGE (2<<18) /* Report any changes */ -#define D_SDP_EVERY (3<<18) /* Report any changes */ -#define D_SDP_EOL (1<<17) /* EOL interrupt enable */ -#define D_SDP_IDLE (1<<16) /* HDLC idle interrupt enable */ - -/* Pipe data MODE */ -#define D_SDP_MEM (0<<13) /* To/from memory */ -#define D_SDP_HDLC (2<<13) -#define D_SDP_HDLC_D (3<<13) /* D Channel (prio control) */ -#define D_SDP_SER (4<<13) /* Serial to serial */ -#define D_SDP_FIXED (6<<13) /* Short only */ -#define D_SDP_MODE(v) ((v)&(7<<13)) - -#define D_SDP_TO_SER (1<<12) /* Direction */ -#define D_SDP_FROM_SER (0<<12) /* Direction */ -#define D_SDP_MSB (1<<11) /* Bit order within Byte */ -#define D_SDP_LSB (0<<11) /* Bit order within Byte */ -#define D_SDP_P (1<<10) /* Pointer Valid */ -#define D_SDP_A (1<<8) /* Abort */ -#define D_SDP_C (1<<7) /* Clear */ - -/* Define Time Slot */ -#define D_DTS_VI (1<<17) /* Valid Input Time-Slot Descriptor */ -#define D_DTS_VO (1<<16) /* Valid Output Time-Slot Descriptor */ -#define D_DTS_INS (1<<15) /* Insert Time Slot */ -#define D_DTS_DEL (0<<15) /* Delete Time Slot */ -#define D_DTS_PRVIN(v) ((v)<<10) /* Previous In Pipe */ -#define D_DTS_PRVOUT(v) ((v)<<5) /* Previous Out Pipe */ - -/* Time Slot defines */ -#define D_TS_LEN(v) ((v)<<24) /* Number of bits in this time slot */ -#define D_TS_CYCLE(v) ((v)<<14) /* Bit Count at start of TS */ -#define D_TS_DI (1<<13) /* Data Invert */ -#define D_TS_1CHANNEL (0<<10) /* Single Channel / Normal mode */ -#define D_TS_MONITOR (2<<10) /* Monitor pipe */ -#define D_TS_NONCONTIG (3<<10) /* Non contiguous mode */ -#define D_TS_ANCHOR (7<<10) /* Starting short pipes */ -#define D_TS_MON(v) ((v)<<5) /* Monitor Pipe */ -#define D_TS_NEXT(v) ((v)<<0) /* Pipe no.: 0-15 long, 16-21 short */ - -/* Concentration Highway Interface Modes */ -#define D_CHI_CHICM(v) ((v)<<16) /* Clock mode */ -#define D_CHI_IR (1<<15) /* Immediate Interrupt Report */ -#define D_CHI_EN (1<<14) /* CHIL Interrupt enabled */ -#define D_CHI_OD (1<<13) /* Open Drain Enable */ -#define D_CHI_FE (1<<12) /* Sample CHIFS on Rising Frame Edge */ -#define D_CHI_FD (1<<11) /* Frame Drive */ -#define D_CHI_BPF(v) ((v)<<0) /* Bits per Frame */ - -/* NT: These are here for completeness */ -#define D_NT_FBIT (1<<17) /* Frame Bit */ -#define D_NT_NBF (1<<16) /* Number of bad frames to loose framing */ -#define D_NT_IRM_IMM (1<<15) /* Interrupt Report & Mask: Immediate */ -#define D_NT_IRM_EN (1<<14) /* Interrupt Report & Mask: Enable */ -#define D_NT_ISNT (1<<13) /* Configure interface as NT */ -#define D_NT_FT (1<<12) /* Fixed Timing */ -#define D_NT_EZ (1<<11) /* Echo Channel is Zeros */ -#define D_NT_IFA (1<<10) /* Inhibit Final Activation */ -#define D_NT_ACT (1<<9) /* Activate Interface */ -#define D_NT_MFE (1<<8) /* Multiframe Enable */ -#define D_NT_RLB(v) ((v)<<5) /* Remote Loopback */ -#define D_NT_LLB(v) ((v)<<2) /* Local Loopback */ -#define D_NT_FACT (1<<1) /* Force Activation */ -#define D_NT_ABV (1<<0) /* Activate Bipolar Violation */ - -/* Codec Setup */ -#define D_CDEC_CK(v) ((v)<<24) /* Clock Select */ -#define D_CDEC_FED(v) ((v)<<12) /* FSCOD Falling Edge Delay */ -#define D_CDEC_RED(v) ((v)<<0) /* FSCOD Rising Edge Delay */ - -/* Test */ -#define D_TEST_RAM(v) ((v)<<16) /* RAM Pointer */ -#define D_TEST_SIZE(v) ((v)<<11) /* */ -#define D_TEST_ROMONOFF 0x5 /* Toggle ROM opcode monitor on/off */ -#define D_TEST_PROC 0x6 /* Microprocessor test */ -#define D_TEST_SER 0x7 /* Serial-Controller test */ -#define D_TEST_RAMREAD 0x8 /* Copy from Ram to system memory */ -#define D_TEST_RAMWRITE 0x9 /* Copy into Ram from system memory */ -#define D_TEST_RAMBIST 0xa /* RAM Built-In Self Test */ -#define D_TEST_MCBIST 0xb /* Microcontroller Built-In Self Test */ -#define D_TEST_DUMP 0xe /* ROM Dump */ - -/* CHI Data Mode */ -#define D_CDM_THI (1 << 8) /* Transmit Data on CHIDR Pin */ -#define D_CDM_RHI (1 << 7) /* Receive Data on CHIDX Pin */ -#define D_CDM_RCE (1 << 6) /* Receive on Rising Edge of CHICK */ -#define D_CDM_XCE (1 << 2) /* Transmit Data on Rising Edge of CHICK */ -#define D_CDM_XEN (1 << 1) /* Transmit Highway Enable */ -#define D_CDM_REN (1 << 0) /* Receive Highway Enable */ - -/* The Interrupts */ -#define D_INTR_BRDY 1 /* Buffer Ready for processing */ -#define D_INTR_MINT 2 /* Marked Interrupt in RD/TD */ -#define D_INTR_IBEG 3 /* Flag to idle transition detected (HDLC) */ -#define D_INTR_IEND 4 /* Idle to flag transition detected (HDLC) */ -#define D_INTR_EOL 5 /* End of List */ -#define D_INTR_CMDI 6 /* Command has bean read */ -#define D_INTR_XCMP 8 /* Transmission of frame complete */ -#define D_INTR_SBRI 9 /* BRI status change info */ -#define D_INTR_FXDT 10 /* Fixed data change */ -#define D_INTR_CHIL 11 /* CHI lost frame sync (channel 36 only) */ -#define D_INTR_COLL 11 /* Unrecoverable D-Channel collision */ -#define D_INTR_DBYT 12 /* Dropped by frame slip */ -#define D_INTR_RBYT 13 /* Repeated by frame slip */ -#define D_INTR_LINT 14 /* Lost Interrupt */ -#define D_INTR_UNDR 15 /* DMA underrun */ - -#define D_INTR_TE 32 -#define D_INTR_NT 34 -#define D_INTR_CHI 36 -#define D_INTR_CMD 38 - -#define D_INTR_GETCHAN(v) (((v) >> 24) & 0x3f) -#define D_INTR_GETCODE(v) (((v) >> 20) & 0xf) -#define D_INTR_GETCMD(v) (((v) >> 16) & 0xf) -#define D_INTR_GETVAL(v) ((v) & 0xffff) -#define D_INTR_GETRVAL(v) ((v) & 0xfffff) - -#define D_P_0 0 /* TE receive anchor */ -#define D_P_1 1 /* TE transmit anchor */ -#define D_P_2 2 /* NT transmit anchor */ -#define D_P_3 3 /* NT receive anchor */ -#define D_P_4 4 /* CHI send data */ -#define D_P_5 5 /* CHI receive data */ -#define D_P_6 6 /* */ -#define D_P_7 7 /* */ -#define D_P_8 8 /* */ -#define D_P_9 9 /* */ -#define D_P_10 10 /* */ -#define D_P_11 11 /* */ -#define D_P_12 12 /* */ -#define D_P_13 13 /* */ -#define D_P_14 14 /* */ -#define D_P_15 15 /* */ -#define D_P_16 16 /* CHI anchor pipe */ -#define D_P_17 17 /* CHI send */ -#define D_P_18 18 /* CHI receive */ -#define D_P_19 19 /* CHI receive */ -#define D_P_20 20 /* CHI receive */ -#define D_P_21 21 /* */ -#define D_P_22 22 /* */ -#define D_P_23 23 /* */ -#define D_P_24 24 /* */ -#define D_P_25 25 /* */ -#define D_P_26 26 /* */ -#define D_P_27 27 /* */ -#define D_P_28 28 /* */ -#define D_P_29 29 /* */ -#define D_P_30 30 /* */ -#define D_P_31 31 /* */ - -/* Transmit descriptor defines */ -#define DBRI_TD_F (1 << 31) /* End of Frame */ -#define DBRI_TD_D (1 << 30) /* Do not append CRC */ -#define DBRI_TD_CNT(v) ((v) << 16) /* Number of valid bytes in the buffer */ -#define DBRI_TD_B (1 << 15) /* Final interrupt */ -#define DBRI_TD_M (1 << 14) /* Marker interrupt */ -#define DBRI_TD_I (1 << 13) /* Transmit Idle Characters */ -#define DBRI_TD_FCNT(v) (v) /* Flag Count */ -#define DBRI_TD_UNR (1 << 3) /* Underrun: transmitter is out of data */ -#define DBRI_TD_ABT (1 << 2) /* Abort: frame aborted */ -#define DBRI_TD_TBC (1 << 0) /* Transmit buffer Complete */ -#define DBRI_TD_STATUS(v) ((v) & 0xff) /* Transmit status */ - /* Maximum buffer size per TD: almost 8KB */ -#define DBRI_TD_MAXCNT ((1 << 13) - 4) - -/* Receive descriptor defines */ -#define DBRI_RD_F (1 << 31) /* End of Frame */ -#define DBRI_RD_C (1 << 30) /* Completed buffer */ -#define DBRI_RD_B (1 << 15) /* Final interrupt */ -#define DBRI_RD_M (1 << 14) /* Marker interrupt */ -#define DBRI_RD_BCNT(v) (v) /* Buffer size */ -#define DBRI_RD_CRC (1 << 7) /* 0: CRC is correct */ -#define DBRI_RD_BBC (1 << 6) /* 1: Bad Byte received */ -#define DBRI_RD_ABT (1 << 5) /* Abort: frame aborted */ -#define DBRI_RD_OVRN (1 << 3) /* Overrun: data lost */ -#define DBRI_RD_STATUS(v) ((v) & 0xff) /* Receive status */ -#define DBRI_RD_CNT(v) (((v) >> 16) & 0x1fff) /* Valid bytes in the buffer */ - -/* stream_info[] access */ -/* Translate the ALSA direction into the array index */ -#define DBRI_STREAMNO(substream) \ - (substream->stream == \ - SNDRV_PCM_STREAM_PLAYBACK ? DBRI_PLAY: DBRI_REC) - -/* Return a pointer to dbri_streaminfo */ -#define DBRI_STREAM(dbri, substream) \ - &dbri->stream_info[DBRI_STREAMNO(substream)] - -/* - * Short data pipes transmit LSB first. The CS4215 receives MSB first. Grrr. - * So we have to reverse the bits. Note: not all bit lengths are supported - */ -static __u32 reverse_bytes(__u32 b, int len) -{ - switch (len) { - case 32: - b = ((b & 0xffff0000) >> 16) | ((b & 0x0000ffff) << 16); - case 16: - b = ((b & 0xff00ff00) >> 8) | ((b & 0x00ff00ff) << 8); - case 8: - b = ((b & 0xf0f0f0f0) >> 4) | ((b & 0x0f0f0f0f) << 4); - case 4: - b = ((b & 0xcccccccc) >> 2) | ((b & 0x33333333) << 2); - case 2: - b = ((b & 0xaaaaaaaa) >> 1) | ((b & 0x55555555) << 1); - case 1: - case 0: - break; - default: - printk(KERN_ERR "DBRI reverse_bytes: unsupported length\n"); - }; - - return b; -} - -/* -**************************************************************************** -************** DBRI initialization and command synchronization ************* -**************************************************************************** - -Commands are sent to the DBRI by building a list of them in memory, -then writing the address of the first list item to DBRI register 8. -The list is terminated with a WAIT command, which generates a -CPU interrupt to signal completion. - -Since the DBRI can run in parallel with the CPU, several means of -synchronization present themselves. The method implemented here uses -the dbri_cmdwait() to wait for execution of batch of sent commands. - -A circular command buffer is used here. A new command is being added -while another can be executed. The scheme works by adding two WAIT commands -after each sent batch of commands. When the next batch is prepared it is -added after the WAIT commands then the WAITs are replaced with single JUMP -command to the new batch. The the DBRI is forced to reread the last WAIT -command (replaced by the JUMP by then). If the DBRI is still executing -previous commands the request to reread the WAIT command is ignored. - -Every time a routine wants to write commands to the DBRI, it must -first call dbri_cmdlock() and get pointer to a free space in -dbri->dma->cmd buffer. After this, the commands can be written to -the buffer, and dbri_cmdsend() is called with the final pointer value -to send them to the DBRI. - -*/ - -#define MAXLOOPS 20 -/* - * Wait for the current command string to execute - */ -static void dbri_cmdwait(struct snd_dbri *dbri) -{ - int maxloops = MAXLOOPS; - unsigned long flags; - - /* Delay if previous commands are still being processed */ - spin_lock_irqsave(&dbri->lock, flags); - while ((--maxloops) > 0 && (sbus_readl(dbri->regs + REG0) & D_P)) { - spin_unlock_irqrestore(&dbri->lock, flags); - msleep_interruptible(1); - spin_lock_irqsave(&dbri->lock, flags); - } - spin_unlock_irqrestore(&dbri->lock, flags); - - if (maxloops == 0) - printk(KERN_ERR "DBRI: Chip never completed command buffer\n"); - else - dprintk(D_CMD, "Chip completed command buffer (%d)\n", - MAXLOOPS - maxloops - 1); -} -/* - * Lock the command queue and return pointer to space for len cmd words - * It locks the cmdlock spinlock. - */ -static s32 *dbri_cmdlock(struct snd_dbri *dbri, int len) -{ - /* Space for 2 WAIT cmds (replaced later by 1 JUMP cmd) */ - len += 2; - spin_lock(&dbri->cmdlock); - if (dbri->cmdptr - dbri->dma->cmd + len < DBRI_NO_CMDS - 2) - return dbri->cmdptr + 2; - else if (len < sbus_readl(dbri->regs + REG8) - dbri->dma_dvma) - return dbri->dma->cmd; - else - printk(KERN_ERR "DBRI: no space for commands."); - - return NULL; -} - -/* - * Send prepared cmd string. It works by writing a JUMP cmd into - * the last WAIT cmd and force DBRI to reread the cmd. - * The JUMP cmd points to the new cmd string. - * It also releases the cmdlock spinlock. - * - * Lock must be held before calling this. - */ -static void dbri_cmdsend(struct snd_dbri *dbri, s32 *cmd, int len) -{ - s32 tmp, addr; - static int wait_id = 0; - - wait_id++; - wait_id &= 0xffff; /* restrict it to a 16 bit counter. */ - *(cmd) = DBRI_CMD(D_WAIT, 1, wait_id); - *(cmd+1) = DBRI_CMD(D_WAIT, 1, wait_id); - - /* Replace the last command with JUMP */ - addr = dbri->dma_dvma + (cmd - len - dbri->dma->cmd) * sizeof(s32); - *(dbri->cmdptr+1) = addr; - *(dbri->cmdptr) = DBRI_CMD(D_JUMP, 0, 0); - -#ifdef DBRI_DEBUG - if (cmd > dbri->cmdptr) { - s32 *ptr; - - for (ptr = dbri->cmdptr; ptr < cmd+2; ptr++) - dprintk(D_CMD, "cmd: %lx:%08x\n", - (unsigned long)ptr, *ptr); - } else { - s32 *ptr = dbri->cmdptr; - - dprintk(D_CMD, "cmd: %lx:%08x\n", (unsigned long)ptr, *ptr); - ptr++; - dprintk(D_CMD, "cmd: %lx:%08x\n", (unsigned long)ptr, *ptr); - for (ptr = dbri->dma->cmd; ptr < cmd+2; ptr++) - dprintk(D_CMD, "cmd: %lx:%08x\n", - (unsigned long)ptr, *ptr); - } -#endif - - /* Reread the last command */ - tmp = sbus_readl(dbri->regs + REG0); - tmp |= D_P; - sbus_writel(tmp, dbri->regs + REG0); - - dbri->cmdptr = cmd; - spin_unlock(&dbri->cmdlock); -} - -/* Lock must be held when calling this */ -static void dbri_reset(struct snd_dbri *dbri) -{ - int i; - u32 tmp; - - dprintk(D_GEN, "reset 0:%x 2:%x 8:%x 9:%x\n", - sbus_readl(dbri->regs + REG0), - sbus_readl(dbri->regs + REG2), - sbus_readl(dbri->regs + REG8), sbus_readl(dbri->regs + REG9)); - - sbus_writel(D_R, dbri->regs + REG0); /* Soft Reset */ - for (i = 0; (sbus_readl(dbri->regs + REG0) & D_R) && i < 64; i++) - udelay(10); - - /* A brute approach - DBRI falls back to working burst size by itself - * On SS20 D_S does not work, so do not try so high. */ - tmp = sbus_readl(dbri->regs + REG0); - tmp |= D_G | D_E; - tmp &= ~D_S; - sbus_writel(tmp, dbri->regs + REG0); -} - -/* Lock must not be held before calling this */ -static void __devinit dbri_initialize(struct snd_dbri *dbri) -{ - s32 *cmd; - u32 dma_addr; - unsigned long flags; - int n; - - spin_lock_irqsave(&dbri->lock, flags); - - dbri_reset(dbri); - - /* Initialize pipes */ - for (n = 0; n < DBRI_NO_PIPES; n++) - dbri->pipes[n].desc = dbri->pipes[n].first_desc = -1; - - spin_lock_init(&dbri->cmdlock); - /* - * Initialize the interrupt ring buffer. - */ - dma_addr = dbri->dma_dvma + dbri_dma_off(intr, 0); - dbri->dma->intr[0] = dma_addr; - dbri->dbri_irqp = 1; - /* - * Set up the interrupt queue - */ - spin_lock(&dbri->cmdlock); - cmd = dbri->cmdptr = dbri->dma->cmd; - *(cmd++) = DBRI_CMD(D_IIQ, 0, 0); - *(cmd++) = dma_addr; - *(cmd++) = DBRI_CMD(D_PAUSE, 0, 0); - dbri->cmdptr = cmd; - *(cmd++) = DBRI_CMD(D_WAIT, 1, 0); - *(cmd++) = DBRI_CMD(D_WAIT, 1, 0); - dma_addr = dbri->dma_dvma + dbri_dma_off(cmd, 0); - sbus_writel(dma_addr, dbri->regs + REG8); - spin_unlock(&dbri->cmdlock); - - spin_unlock_irqrestore(&dbri->lock, flags); - dbri_cmdwait(dbri); -} - -/* -**************************************************************************** -************************** DBRI data pipe management *********************** -**************************************************************************** - -While DBRI control functions use the command and interrupt buffers, the -main data path takes the form of data pipes, which can be short (command -and interrupt driven), or long (attached to DMA buffers). These functions -provide a rudimentary means of setting up and managing the DBRI's pipes, -but the calling functions have to make sure they respect the pipes' linked -list ordering, among other things. The transmit and receive functions -here interface closely with the transmit and receive interrupt code. - -*/ -static inline int pipe_active(struct snd_dbri *dbri, int pipe) -{ - return ((pipe >= 0) && (dbri->pipes[pipe].desc != -1)); -} - -/* reset_pipe(dbri, pipe) - * - * Called on an in-use pipe to clear anything being transmitted or received - * Lock must be held before calling this. - */ -static void reset_pipe(struct snd_dbri *dbri, int pipe) -{ - int sdp; - int desc; - s32 *cmd; - - if (pipe < 0 || pipe > DBRI_MAX_PIPE) { - printk(KERN_ERR "DBRI: reset_pipe called with " - "illegal pipe number\n"); - return; - } - - sdp = dbri->pipes[pipe].sdp; - if (sdp == 0) { - printk(KERN_ERR "DBRI: reset_pipe called " - "on uninitialized pipe\n"); - return; - } - - cmd = dbri_cmdlock(dbri, 3); - *(cmd++) = DBRI_CMD(D_SDP, 0, sdp | D_SDP_C | D_SDP_P); - *(cmd++) = 0; - *(cmd++) = DBRI_CMD(D_PAUSE, 0, 0); - dbri_cmdsend(dbri, cmd, 3); - - desc = dbri->pipes[pipe].first_desc; - if (desc >= 0) - do { - dbri->dma->desc[desc].ba = 0; - dbri->dma->desc[desc].nda = 0; - desc = dbri->next_desc[desc]; - } while (desc != -1 && desc != dbri->pipes[pipe].first_desc); - - dbri->pipes[pipe].desc = -1; - dbri->pipes[pipe].first_desc = -1; -} - -/* - * Lock must be held before calling this. - */ -static void setup_pipe(struct snd_dbri *dbri, int pipe, int sdp) -{ - if (pipe < 0 || pipe > DBRI_MAX_PIPE) { - printk(KERN_ERR "DBRI: setup_pipe called " - "with illegal pipe number\n"); - return; - } - - if ((sdp & 0xf800) != sdp) { - printk(KERN_ERR "DBRI: setup_pipe called " - "with strange SDP value\n"); - /* sdp &= 0xf800; */ - } - - /* If this is a fixed receive pipe, arrange for an interrupt - * every time its data changes - */ - if (D_SDP_MODE(sdp) == D_SDP_FIXED && !(sdp & D_SDP_TO_SER)) - sdp |= D_SDP_CHANGE; - - sdp |= D_PIPE(pipe); - dbri->pipes[pipe].sdp = sdp; - dbri->pipes[pipe].desc = -1; - dbri->pipes[pipe].first_desc = -1; - - reset_pipe(dbri, pipe); -} - -/* - * Lock must be held before calling this. - */ -static void link_time_slot(struct snd_dbri *dbri, int pipe, - int prevpipe, int nextpipe, - int length, int cycle) -{ - s32 *cmd; - int val; - - if (pipe < 0 || pipe > DBRI_MAX_PIPE - || prevpipe < 0 || prevpipe > DBRI_MAX_PIPE - || nextpipe < 0 || nextpipe > DBRI_MAX_PIPE) { - printk(KERN_ERR - "DBRI: link_time_slot called with illegal pipe number\n"); - return; - } - - if (dbri->pipes[pipe].sdp == 0 - || dbri->pipes[prevpipe].sdp == 0 - || dbri->pipes[nextpipe].sdp == 0) { - printk(KERN_ERR "DBRI: link_time_slot called " - "on uninitialized pipe\n"); - return; - } - - dbri->pipes[prevpipe].nextpipe = pipe; - dbri->pipes[pipe].nextpipe = nextpipe; - dbri->pipes[pipe].length = length; - - cmd = dbri_cmdlock(dbri, 4); - - if (dbri->pipes[pipe].sdp & D_SDP_TO_SER) { - /* Deal with CHI special case: - * "If transmission on edges 0 or 1 is desired, then cycle n - * (where n = # of bit times per frame...) must be used." - * - DBRI data sheet, page 11 - */ - if (prevpipe == 16 && cycle == 0) - cycle = dbri->chi_bpf; - - val = D_DTS_VO | D_DTS_INS | D_DTS_PRVOUT(prevpipe) | pipe; - *(cmd++) = DBRI_CMD(D_DTS, 0, val); - *(cmd++) = 0; - *(cmd++) = - D_TS_LEN(length) | D_TS_CYCLE(cycle) | D_TS_NEXT(nextpipe); - } else { - val = D_DTS_VI | D_DTS_INS | D_DTS_PRVIN(prevpipe) | pipe; - *(cmd++) = DBRI_CMD(D_DTS, 0, val); - *(cmd++) = - D_TS_LEN(length) | D_TS_CYCLE(cycle) | D_TS_NEXT(nextpipe); - *(cmd++) = 0; - } - *(cmd++) = DBRI_CMD(D_PAUSE, 0, 0); - - dbri_cmdsend(dbri, cmd, 4); -} - -#if 0 -/* - * Lock must be held before calling this. - */ -static void unlink_time_slot(struct snd_dbri *dbri, int pipe, - enum in_or_out direction, int prevpipe, - int nextpipe) -{ - s32 *cmd; - int val; - - if (pipe < 0 || pipe > DBRI_MAX_PIPE - || prevpipe < 0 || prevpipe > DBRI_MAX_PIPE - || nextpipe < 0 || nextpipe > DBRI_MAX_PIPE) { - printk(KERN_ERR - "DBRI: unlink_time_slot called with illegal pipe number\n"); - return; - } - - cmd = dbri_cmdlock(dbri, 4); - - if (direction == PIPEinput) { - val = D_DTS_VI | D_DTS_DEL | D_DTS_PRVIN(prevpipe) | pipe; - *(cmd++) = DBRI_CMD(D_DTS, 0, val); - *(cmd++) = D_TS_NEXT(nextpipe); - *(cmd++) = 0; - } else { - val = D_DTS_VO | D_DTS_DEL | D_DTS_PRVOUT(prevpipe) | pipe; - *(cmd++) = DBRI_CMD(D_DTS, 0, val); - *(cmd++) = 0; - *(cmd++) = D_TS_NEXT(nextpipe); - } - *(cmd++) = DBRI_CMD(D_PAUSE, 0, 0); - - dbri_cmdsend(dbri, cmd, 4); -} -#endif - -/* xmit_fixed() / recv_fixed() - * - * Transmit/receive data on a "fixed" pipe - i.e, one whose contents are not - * expected to change much, and which we don't need to buffer. - * The DBRI only interrupts us when the data changes (receive pipes), - * or only changes the data when this function is called (transmit pipes). - * Only short pipes (numbers 16-31) can be used in fixed data mode. - * - * These function operate on a 32-bit field, no matter how large - * the actual time slot is. The interrupt handler takes care of bit - * ordering and alignment. An 8-bit time slot will always end up - * in the low-order 8 bits, filled either MSB-first or LSB-first, - * depending on the settings passed to setup_pipe(). - * - * Lock must not be held before calling it. - */ -static void xmit_fixed(struct snd_dbri *dbri, int pipe, unsigned int data) -{ - s32 *cmd; - unsigned long flags; - - if (pipe < 16 || pipe > DBRI_MAX_PIPE) { - printk(KERN_ERR "DBRI: xmit_fixed: Illegal pipe number\n"); - return; - } - - if (D_SDP_MODE(dbri->pipes[pipe].sdp) == 0) { - printk(KERN_ERR "DBRI: xmit_fixed: " - "Uninitialized pipe %d\n", pipe); - return; - } - - if (D_SDP_MODE(dbri->pipes[pipe].sdp) != D_SDP_FIXED) { - printk(KERN_ERR "DBRI: xmit_fixed: Non-fixed pipe %d\n", pipe); - return; - } - - if (!(dbri->pipes[pipe].sdp & D_SDP_TO_SER)) { - printk(KERN_ERR "DBRI: xmit_fixed: Called on receive pipe %d\n", - pipe); - return; - } - - /* DBRI short pipes always transmit LSB first */ - - if (dbri->pipes[pipe].sdp & D_SDP_MSB) - data = reverse_bytes(data, dbri->pipes[pipe].length); - - cmd = dbri_cmdlock(dbri, 3); - - *(cmd++) = DBRI_CMD(D_SSP, 0, pipe); - *(cmd++) = data; - *(cmd++) = DBRI_CMD(D_PAUSE, 0, 0); - - spin_lock_irqsave(&dbri->lock, flags); - dbri_cmdsend(dbri, cmd, 3); - spin_unlock_irqrestore(&dbri->lock, flags); - dbri_cmdwait(dbri); - -} - -static void recv_fixed(struct snd_dbri *dbri, int pipe, volatile __u32 *ptr) -{ - if (pipe < 16 || pipe > DBRI_MAX_PIPE) { - printk(KERN_ERR "DBRI: recv_fixed called with " - "illegal pipe number\n"); - return; - } - - if (D_SDP_MODE(dbri->pipes[pipe].sdp) != D_SDP_FIXED) { - printk(KERN_ERR "DBRI: recv_fixed called on " - "non-fixed pipe %d\n", pipe); - return; - } - - if (dbri->pipes[pipe].sdp & D_SDP_TO_SER) { - printk(KERN_ERR "DBRI: recv_fixed called on " - "transmit pipe %d\n", pipe); - return; - } - - dbri->pipes[pipe].recv_fixed_ptr = ptr; -} - -/* setup_descs() - * - * Setup transmit/receive data on a "long" pipe - i.e, one associated - * with a DMA buffer. - * - * Only pipe numbers 0-15 can be used in this mode. - * - * This function takes a stream number pointing to a data buffer, - * and work by building chains of descriptors which identify the - * data buffers. Buffers too large for a single descriptor will - * be spread across multiple descriptors. - * - * All descriptors create a ring buffer. - * - * Lock must be held before calling this. - */ -static int setup_descs(struct snd_dbri *dbri, int streamno, unsigned int period) -{ - struct dbri_streaminfo *info = &dbri->stream_info[streamno]; - __u32 dvma_buffer; - int desc; - int len; - int first_desc = -1; - int last_desc = -1; - - if (info->pipe < 0 || info->pipe > 15) { - printk(KERN_ERR "DBRI: setup_descs: Illegal pipe number\n"); - return -2; - } - - if (dbri->pipes[info->pipe].sdp == 0) { - printk(KERN_ERR "DBRI: setup_descs: Uninitialized pipe %d\n", - info->pipe); - return -2; - } - - dvma_buffer = info->dvma_buffer; - len = info->size; - - if (streamno == DBRI_PLAY) { - if (!(dbri->pipes[info->pipe].sdp & D_SDP_TO_SER)) { - printk(KERN_ERR "DBRI: setup_descs: " - "Called on receive pipe %d\n", info->pipe); - return -2; - } - } else { - if (dbri->pipes[info->pipe].sdp & D_SDP_TO_SER) { - printk(KERN_ERR - "DBRI: setup_descs: Called on transmit pipe %d\n", - info->pipe); - return -2; - } - /* Should be able to queue multiple buffers - * to receive on a pipe - */ - if (pipe_active(dbri, info->pipe)) { - printk(KERN_ERR "DBRI: recv_on_pipe: " - "Called on active pipe %d\n", info->pipe); - return -2; - } - - /* Make sure buffer size is multiple of four */ - len &= ~3; - } - - /* Free descriptors if pipe has any */ - desc = dbri->pipes[info->pipe].first_desc; - if (desc >= 0) - do { - dbri->dma->desc[desc].ba = 0; - dbri->dma->desc[desc].nda = 0; - desc = dbri->next_desc[desc]; - } while (desc != -1 && - desc != dbri->pipes[info->pipe].first_desc); - - dbri->pipes[info->pipe].desc = -1; - dbri->pipes[info->pipe].first_desc = -1; - - desc = 0; - while (len > 0) { - int mylen; - - for (; desc < DBRI_NO_DESCS; desc++) { - if (!dbri->dma->desc[desc].ba) - break; - } - - if (desc == DBRI_NO_DESCS) { - printk(KERN_ERR "DBRI: setup_descs: No descriptors\n"); - return -1; - } - - if (len > DBRI_TD_MAXCNT) - mylen = DBRI_TD_MAXCNT; /* 8KB - 4 */ - else - mylen = len; - - if (mylen > period) - mylen = period; - - dbri->next_desc[desc] = -1; - dbri->dma->desc[desc].ba = dvma_buffer; - dbri->dma->desc[desc].nda = 0; - - if (streamno == DBRI_PLAY) { - dbri->dma->desc[desc].word1 = DBRI_TD_CNT(mylen); - dbri->dma->desc[desc].word4 = 0; - dbri->dma->desc[desc].word1 |= DBRI_TD_F | DBRI_TD_B; - } else { - dbri->dma->desc[desc].word1 = 0; - dbri->dma->desc[desc].word4 = - DBRI_RD_B | DBRI_RD_BCNT(mylen); - } - - if (first_desc == -1) - first_desc = desc; - else { - dbri->next_desc[last_desc] = desc; - dbri->dma->desc[last_desc].nda = - dbri->dma_dvma + dbri_dma_off(desc, desc); - } - - last_desc = desc; - dvma_buffer += mylen; - len -= mylen; - } - - if (first_desc == -1 || last_desc == -1) { - printk(KERN_ERR "DBRI: setup_descs: " - " Not enough descriptors available\n"); - return -1; - } - - dbri->dma->desc[last_desc].nda = - dbri->dma_dvma + dbri_dma_off(desc, first_desc); - dbri->next_desc[last_desc] = first_desc; - dbri->pipes[info->pipe].first_desc = first_desc; - dbri->pipes[info->pipe].desc = first_desc; - -#ifdef DBRI_DEBUG - for (desc = first_desc; desc != -1;) { - dprintk(D_DESC, "DESC %d: %08x %08x %08x %08x\n", - desc, - dbri->dma->desc[desc].word1, - dbri->dma->desc[desc].ba, - dbri->dma->desc[desc].nda, dbri->dma->desc[desc].word4); - desc = dbri->next_desc[desc]; - if (desc == first_desc) - break; - } -#endif - return 0; -} - -/* -**************************************************************************** -************************** DBRI - CHI interface **************************** -**************************************************************************** - -The CHI is a four-wire (clock, frame sync, data in, data out) time-division -multiplexed serial interface which the DBRI can operate in either master -(give clock/frame sync) or slave (take clock/frame sync) mode. - -*/ - -enum master_or_slave { CHImaster, CHIslave }; - -/* - * Lock must not be held before calling it. - */ -static void reset_chi(struct snd_dbri *dbri, - enum master_or_slave master_or_slave, - int bits_per_frame) -{ - s32 *cmd; - int val; - - /* Set CHI Anchor: Pipe 16 */ - - cmd = dbri_cmdlock(dbri, 4); - val = D_DTS_VO | D_DTS_VI | D_DTS_INS - | D_DTS_PRVIN(16) | D_PIPE(16) | D_DTS_PRVOUT(16); - *(cmd++) = DBRI_CMD(D_DTS, 0, val); - *(cmd++) = D_TS_ANCHOR | D_TS_NEXT(16); - *(cmd++) = D_TS_ANCHOR | D_TS_NEXT(16); - *(cmd++) = DBRI_CMD(D_PAUSE, 0, 0); - dbri_cmdsend(dbri, cmd, 4); - - dbri->pipes[16].sdp = 1; - dbri->pipes[16].nextpipe = 16; - - cmd = dbri_cmdlock(dbri, 4); - - if (master_or_slave == CHIslave) { - /* Setup DBRI for CHI Slave - receive clock, frame sync (FS) - * - * CHICM = 0 (slave mode, 8 kHz frame rate) - * IR = give immediate CHI status interrupt - * EN = give CHI status interrupt upon change - */ - *(cmd++) = DBRI_CMD(D_CHI, 0, D_CHI_CHICM(0)); - } else { - /* Setup DBRI for CHI Master - generate clock, FS - * - * BPF = bits per 8 kHz frame - * 12.288 MHz / CHICM_divisor = clock rate - * FD = 1 - drive CHIFS on rising edge of CHICK - */ - int clockrate = bits_per_frame * 8; - int divisor = 12288 / clockrate; - - if (divisor > 255 || divisor * clockrate != 12288) - printk(KERN_ERR "DBRI: illegal bits_per_frame " - "in setup_chi\n"); - - *(cmd++) = DBRI_CMD(D_CHI, 0, D_CHI_CHICM(divisor) | D_CHI_FD - | D_CHI_BPF(bits_per_frame)); - } - - dbri->chi_bpf = bits_per_frame; - - /* CHI Data Mode - * - * RCE = 0 - receive on falling edge of CHICK - * XCE = 1 - transmit on rising edge of CHICK - * XEN = 1 - enable transmitter - * REN = 1 - enable receiver - */ - - *(cmd++) = DBRI_CMD(D_PAUSE, 0, 0); - *(cmd++) = DBRI_CMD(D_CDM, 0, D_CDM_XCE | D_CDM_XEN | D_CDM_REN); - *(cmd++) = DBRI_CMD(D_PAUSE, 0, 0); - - dbri_cmdsend(dbri, cmd, 4); -} - -/* -**************************************************************************** -*********************** CS4215 audio codec management ********************** -**************************************************************************** - -In the standard SPARC audio configuration, the CS4215 codec is attached -to the DBRI via the CHI interface and few of the DBRI's PIO pins. - - * Lock must not be held before calling it. - -*/ -static __devinit void cs4215_setup_pipes(struct snd_dbri *dbri) -{ - unsigned long flags; - - spin_lock_irqsave(&dbri->lock, flags); - /* - * Data mode: - * Pipe 4: Send timeslots 1-4 (audio data) - * Pipe 20: Send timeslots 5-8 (part of ctrl data) - * Pipe 6: Receive timeslots 1-4 (audio data) - * Pipe 21: Receive timeslots 6-7. We can only receive 20 bits via - * interrupt, and the rest of the data (slot 5 and 8) is - * not relevant for us (only for doublechecking). - * - * Control mode: - * Pipe 17: Send timeslots 1-4 (slots 5-8 are read only) - * Pipe 18: Receive timeslot 1 (clb). - * Pipe 19: Receive timeslot 7 (version). - */ - - setup_pipe(dbri, 4, D_SDP_MEM | D_SDP_TO_SER | D_SDP_MSB); - setup_pipe(dbri, 20, D_SDP_FIXED | D_SDP_TO_SER | D_SDP_MSB); - setup_pipe(dbri, 6, D_SDP_MEM | D_SDP_FROM_SER | D_SDP_MSB); - setup_pipe(dbri, 21, D_SDP_FIXED | D_SDP_FROM_SER | D_SDP_MSB); - - setup_pipe(dbri, 17, D_SDP_FIXED | D_SDP_TO_SER | D_SDP_MSB); - setup_pipe(dbri, 18, D_SDP_FIXED | D_SDP_FROM_SER | D_SDP_MSB); - setup_pipe(dbri, 19, D_SDP_FIXED | D_SDP_FROM_SER | D_SDP_MSB); - spin_unlock_irqrestore(&dbri->lock, flags); - - dbri_cmdwait(dbri); -} - -static __devinit int cs4215_init_data(struct cs4215 *mm) -{ - /* - * No action, memory resetting only. - * - * Data Time Slot 5-8 - * Speaker,Line and Headphone enable. Gain set to the half. - * Input is mike. - */ - mm->data[0] = CS4215_LO(0x20) | CS4215_HE | CS4215_LE; - mm->data[1] = CS4215_RO(0x20) | CS4215_SE; - mm->data[2] = CS4215_LG(0x8) | CS4215_IS | CS4215_PIO0 | CS4215_PIO1; - mm->data[3] = CS4215_RG(0x8) | CS4215_MA(0xf); - - /* - * Control Time Slot 1-4 - * 0: Default I/O voltage scale - * 1: 8 bit ulaw, 8kHz, mono, high pass filter disabled - * 2: Serial enable, CHI master, 128 bits per frame, clock 1 - * 3: Tests disabled - */ - mm->ctrl[0] = CS4215_RSRVD_1 | CS4215_MLB; - mm->ctrl[1] = CS4215_DFR_ULAW | CS4215_FREQ[0].csval; - mm->ctrl[2] = CS4215_XCLK | CS4215_BSEL_128 | CS4215_FREQ[0].xtal; - mm->ctrl[3] = 0; - - mm->status = 0; - mm->version = 0xff; - mm->precision = 8; /* For ULAW */ - mm->channels = 1; - - return 0; -} - -static void cs4215_setdata(struct snd_dbri *dbri, int muted) -{ - if (muted) { - dbri->mm.data[0] |= 63; - dbri->mm.data[1] |= 63; - dbri->mm.data[2] &= ~15; - dbri->mm.data[3] &= ~15; - } else { - /* Start by setting the playback attenuation. */ - struct dbri_streaminfo *info = &dbri->stream_info[DBRI_PLAY]; - int left_gain = info->left_gain & 0x3f; - int right_gain = info->right_gain & 0x3f; - - dbri->mm.data[0] &= ~0x3f; /* Reset the volume bits */ - dbri->mm.data[1] &= ~0x3f; - dbri->mm.data[0] |= (DBRI_MAX_VOLUME - left_gain); - dbri->mm.data[1] |= (DBRI_MAX_VOLUME - right_gain); - - /* Now set the recording gain. */ - info = &dbri->stream_info[DBRI_REC]; - left_gain = info->left_gain & 0xf; - right_gain = info->right_gain & 0xf; - dbri->mm.data[2] |= CS4215_LG(left_gain); - dbri->mm.data[3] |= CS4215_RG(right_gain); - } - - xmit_fixed(dbri, 20, *(int *)dbri->mm.data); -} - -/* - * Set the CS4215 to data mode. - */ -static void cs4215_open(struct snd_dbri *dbri) -{ - int data_width; - u32 tmp; - unsigned long flags; - - dprintk(D_MM, "cs4215_open: %d channels, %d bits\n", - dbri->mm.channels, dbri->mm.precision); - - /* Temporarily mute outputs, and wait 1/8000 sec (125 us) - * to make sure this takes. This avoids clicking noises. - */ - - cs4215_setdata(dbri, 1); - udelay(125); - - /* - * Data mode: - * Pipe 4: Send timeslots 1-4 (audio data) - * Pipe 20: Send timeslots 5-8 (part of ctrl data) - * Pipe 6: Receive timeslots 1-4 (audio data) - * Pipe 21: Receive timeslots 6-7. We can only receive 20 bits via - * interrupt, and the rest of the data (slot 5 and 8) is - * not relevant for us (only for doublechecking). - * - * Just like in control mode, the time slots are all offset by eight - * bits. The CS4215, it seems, observes TSIN (the delayed signal) - * even if it's the CHI master. Don't ask me... - */ - spin_lock_irqsave(&dbri->lock, flags); - tmp = sbus_readl(dbri->regs + REG0); - tmp &= ~(D_C); /* Disable CHI */ - sbus_writel(tmp, dbri->regs + REG0); - - /* Switch CS4215 to data mode - set PIO3 to 1 */ - sbus_writel(D_ENPIO | D_PIO1 | D_PIO3 | - (dbri->mm.onboard ? D_PIO0 : D_PIO2), dbri->regs + REG2); - - reset_chi(dbri, CHIslave, 128); - - /* Note: this next doesn't work for 8-bit stereo, because the two - * channels would be on timeslots 1 and 3, with 2 and 4 idle. - * (See CS4215 datasheet Fig 15) - * - * DBRI non-contiguous mode would be required to make this work. - */ - data_width = dbri->mm.channels * dbri->mm.precision; - - link_time_slot(dbri, 4, 16, 16, data_width, dbri->mm.offset); - link_time_slot(dbri, 20, 4, 16, 32, dbri->mm.offset + 32); - link_time_slot(dbri, 6, 16, 16, data_width, dbri->mm.offset); - link_time_slot(dbri, 21, 6, 16, 16, dbri->mm.offset + 40); - - /* FIXME: enable CHI after _setdata? */ - tmp = sbus_readl(dbri->regs + REG0); - tmp |= D_C; /* Enable CHI */ - sbus_writel(tmp, dbri->regs + REG0); - spin_unlock_irqrestore(&dbri->lock, flags); - - cs4215_setdata(dbri, 0); -} - -/* - * Send the control information (i.e. audio format) - */ -static int cs4215_setctrl(struct snd_dbri *dbri) -{ - int i, val; - u32 tmp; - unsigned long flags; - - /* FIXME - let the CPU do something useful during these delays */ - - /* Temporarily mute outputs, and wait 1/8000 sec (125 us) - * to make sure this takes. This avoids clicking noises. - */ - cs4215_setdata(dbri, 1); - udelay(125); - - /* - * Enable Control mode: Set DBRI's PIO3 (4215's D/~C) to 0, then wait - * 12 cycles <= 12/(5512.5*64) sec = 34.01 usec - */ - val = D_ENPIO | D_PIO1 | (dbri->mm.onboard ? D_PIO0 : D_PIO2); - sbus_writel(val, dbri->regs + REG2); - dprintk(D_MM, "cs4215_setctrl: reg2=0x%x\n", val); - udelay(34); - - /* In Control mode, the CS4215 is a slave device, so the DBRI must - * operate as CHI master, supplying clocking and frame synchronization. - * - * In Data mode, however, the CS4215 must be CHI master to insure - * that its data stream is synchronous with its codec. - * - * The upshot of all this? We start by putting the DBRI into master - * mode, program the CS4215 in Control mode, then switch the CS4215 - * into Data mode and put the DBRI into slave mode. Various timing - * requirements must be observed along the way. - * - * Oh, and one more thing, on a SPARCStation 20 (and maybe - * others?), the addressing of the CS4215's time slots is - * offset by eight bits, so we add eight to all the "cycle" - * values in the Define Time Slot (DTS) commands. This is - * done in hardware by a TI 248 that delays the DBRI->4215 - * frame sync signal by eight clock cycles. Anybody know why? - */ - spin_lock_irqsave(&dbri->lock, flags); - tmp = sbus_readl(dbri->regs + REG0); - tmp &= ~D_C; /* Disable CHI */ - sbus_writel(tmp, dbri->regs + REG0); - - reset_chi(dbri, CHImaster, 128); - - /* - * Control mode: - * Pipe 17: Send timeslots 1-4 (slots 5-8 are read only) - * Pipe 18: Receive timeslot 1 (clb). - * Pipe 19: Receive timeslot 7 (version). - */ - - link_time_slot(dbri, 17, 16, 16, 32, dbri->mm.offset); - link_time_slot(dbri, 18, 16, 16, 8, dbri->mm.offset); - link_time_slot(dbri, 19, 18, 16, 8, dbri->mm.offset + 48); - spin_unlock_irqrestore(&dbri->lock, flags); - - /* Wait for the chip to echo back CLB (Control Latch Bit) as zero */ - dbri->mm.ctrl[0] &= ~CS4215_CLB; - xmit_fixed(dbri, 17, *(int *)dbri->mm.ctrl); - - spin_lock_irqsave(&dbri->lock, flags); - tmp = sbus_readl(dbri->regs + REG0); - tmp |= D_C; /* Enable CHI */ - sbus_writel(tmp, dbri->regs + REG0); - spin_unlock_irqrestore(&dbri->lock, flags); - - for (i = 10; ((dbri->mm.status & 0xe4) != 0x20); --i) - msleep_interruptible(1); - - if (i == 0) { - dprintk(D_MM, "CS4215 didn't respond to CLB (0x%02x)\n", - dbri->mm.status); - return -1; - } - - /* Disable changes to our copy of the version number, as we are about - * to leave control mode. - */ - recv_fixed(dbri, 19, NULL); - - /* Terminate CS4215 control mode - data sheet says - * "Set CLB=1 and send two more frames of valid control info" - */ - dbri->mm.ctrl[0] |= CS4215_CLB; - xmit_fixed(dbri, 17, *(int *)dbri->mm.ctrl); - - /* Two frames of control info @ 8kHz frame rate = 250 us delay */ - udelay(250); - - cs4215_setdata(dbri, 0); - - return 0; -} - -/* - * Setup the codec with the sampling rate, audio format and number of - * channels. - * As part of the process we resend the settings for the data - * timeslots as well. - */ -static int cs4215_prepare(struct snd_dbri *dbri, unsigned int rate, - snd_pcm_format_t format, unsigned int channels) -{ - int freq_idx; - int ret = 0; - - /* Lookup index for this rate */ - for (freq_idx = 0; CS4215_FREQ[freq_idx].freq != 0; freq_idx++) { - if (CS4215_FREQ[freq_idx].freq == rate) - break; - } - if (CS4215_FREQ[freq_idx].freq != rate) { - printk(KERN_WARNING "DBRI: Unsupported rate %d Hz\n", rate); - return -1; - } - - switch (format) { - case SNDRV_PCM_FORMAT_MU_LAW: - dbri->mm.ctrl[1] = CS4215_DFR_ULAW; - dbri->mm.precision = 8; - break; - case SNDRV_PCM_FORMAT_A_LAW: - dbri->mm.ctrl[1] = CS4215_DFR_ALAW; - dbri->mm.precision = 8; - break; - case SNDRV_PCM_FORMAT_U8: - dbri->mm.ctrl[1] = CS4215_DFR_LINEAR8; - dbri->mm.precision = 8; - break; - case SNDRV_PCM_FORMAT_S16_BE: - dbri->mm.ctrl[1] = CS4215_DFR_LINEAR16; - dbri->mm.precision = 16; - break; - default: - printk(KERN_WARNING "DBRI: Unsupported format %d\n", format); - return -1; - } - - /* Add rate parameters */ - dbri->mm.ctrl[1] |= CS4215_FREQ[freq_idx].csval; - dbri->mm.ctrl[2] = CS4215_XCLK | - CS4215_BSEL_128 | CS4215_FREQ[freq_idx].xtal; - - dbri->mm.channels = channels; - if (channels == 2) - dbri->mm.ctrl[1] |= CS4215_DFR_STEREO; - - ret = cs4215_setctrl(dbri); - if (ret == 0) - cs4215_open(dbri); /* set codec to data mode */ - - return ret; -} - -/* - * - */ -static __devinit int cs4215_init(struct snd_dbri *dbri) -{ - u32 reg2 = sbus_readl(dbri->regs + REG2); - dprintk(D_MM, "cs4215_init: reg2=0x%x\n", reg2); - - /* Look for the cs4215 chips */ - if (reg2 & D_PIO2) { - dprintk(D_MM, "Onboard CS4215 detected\n"); - dbri->mm.onboard = 1; - } - if (reg2 & D_PIO0) { - dprintk(D_MM, "Speakerbox detected\n"); - dbri->mm.onboard = 0; - - if (reg2 & D_PIO2) { - printk(KERN_INFO "DBRI: Using speakerbox / " - "ignoring onboard mmcodec.\n"); - sbus_writel(D_ENPIO2, dbri->regs + REG2); - } - } - - if (!(reg2 & (D_PIO0 | D_PIO2))) { - printk(KERN_ERR "DBRI: no mmcodec found.\n"); - return -EIO; - } - - cs4215_setup_pipes(dbri); - cs4215_init_data(&dbri->mm); - - /* Enable capture of the status & version timeslots. */ - recv_fixed(dbri, 18, &dbri->mm.status); - recv_fixed(dbri, 19, &dbri->mm.version); - - dbri->mm.offset = dbri->mm.onboard ? 0 : 8; - if (cs4215_setctrl(dbri) == -1 || dbri->mm.version == 0xff) { - dprintk(D_MM, "CS4215 failed probe at offset %d\n", - dbri->mm.offset); - return -EIO; - } - dprintk(D_MM, "Found CS4215 at offset %d\n", dbri->mm.offset); - - return 0; -} - -/* -**************************************************************************** -*************************** DBRI interrupt handler ************************* -**************************************************************************** - -The DBRI communicates with the CPU mainly via a circular interrupt -buffer. When an interrupt is signaled, the CPU walks through the -buffer and calls dbri_process_one_interrupt() for each interrupt word. -Complicated interrupts are handled by dedicated functions (which -appear first in this file). Any pending interrupts can be serviced by -calling dbri_process_interrupt_buffer(), which works even if the CPU's -interrupts are disabled. - -*/ - -/* xmit_descs() - * - * Starts transmitting the current TD's for recording/playing. - * For playback, ALSA has filled the DMA memory with new data (we hope). - */ -static void xmit_descs(struct snd_dbri *dbri) -{ - struct dbri_streaminfo *info; - s32 *cmd; - unsigned long flags; - int first_td; - - if (dbri == NULL) - return; /* Disabled */ - - info = &dbri->stream_info[DBRI_REC]; - spin_lock_irqsave(&dbri->lock, flags); - - if (info->pipe >= 0) { - first_td = dbri->pipes[info->pipe].first_desc; - - dprintk(D_DESC, "xmit_descs rec @ TD %d\n", first_td); - - /* Stream could be closed by the time we run. */ - if (first_td >= 0) { - cmd = dbri_cmdlock(dbri, 2); - *(cmd++) = DBRI_CMD(D_SDP, 0, - dbri->pipes[info->pipe].sdp - | D_SDP_P | D_SDP_EVERY | D_SDP_C); - *(cmd++) = dbri->dma_dvma + - dbri_dma_off(desc, first_td); - dbri_cmdsend(dbri, cmd, 2); - - /* Reset our admin of the pipe. */ - dbri->pipes[info->pipe].desc = first_td; - } - } - - info = &dbri->stream_info[DBRI_PLAY]; - - if (info->pipe >= 0) { - first_td = dbri->pipes[info->pipe].first_desc; - - dprintk(D_DESC, "xmit_descs play @ TD %d\n", first_td); - - /* Stream could be closed by the time we run. */ - if (first_td >= 0) { - cmd = dbri_cmdlock(dbri, 2); - *(cmd++) = DBRI_CMD(D_SDP, 0, - dbri->pipes[info->pipe].sdp - | D_SDP_P | D_SDP_EVERY | D_SDP_C); - *(cmd++) = dbri->dma_dvma + - dbri_dma_off(desc, first_td); - dbri_cmdsend(dbri, cmd, 2); - - /* Reset our admin of the pipe. */ - dbri->pipes[info->pipe].desc = first_td; - } - } - - spin_unlock_irqrestore(&dbri->lock, flags); -} - -/* transmission_complete_intr() - * - * Called by main interrupt handler when DBRI signals transmission complete - * on a pipe (interrupt triggered by the B bit in a transmit descriptor). - * - * Walks through the pipe's list of transmit buffer descriptors and marks - * them as available. Stops when the first descriptor is found without - * TBC (Transmit Buffer Complete) set, or we've run through them all. - * - * The DMA buffers are not released. They form a ring buffer and - * they are filled by ALSA while others are transmitted by DMA. - * - */ - -static void transmission_complete_intr(struct snd_dbri *dbri, int pipe) -{ - struct dbri_streaminfo *info = &dbri->stream_info[DBRI_PLAY]; - int td = dbri->pipes[pipe].desc; - int status; - - while (td >= 0) { - if (td >= DBRI_NO_DESCS) { - printk(KERN_ERR "DBRI: invalid td on pipe %d\n", pipe); - return; - } - - status = DBRI_TD_STATUS(dbri->dma->desc[td].word4); - if (!(status & DBRI_TD_TBC)) - break; - - dprintk(D_INT, "TD %d, status 0x%02x\n", td, status); - - dbri->dma->desc[td].word4 = 0; /* Reset it for next time. */ - info->offset += DBRI_RD_CNT(dbri->dma->desc[td].word1); - - td = dbri->next_desc[td]; - dbri->pipes[pipe].desc = td; - } - - /* Notify ALSA */ - spin_unlock(&dbri->lock); - snd_pcm_period_elapsed(info->substream); - spin_lock(&dbri->lock); -} - -static void reception_complete_intr(struct snd_dbri *dbri, int pipe) -{ - struct dbri_streaminfo *info; - int rd = dbri->pipes[pipe].desc; - s32 status; - - if (rd < 0 || rd >= DBRI_NO_DESCS) { - printk(KERN_ERR "DBRI: invalid rd on pipe %d\n", pipe); - return; - } - - dbri->pipes[pipe].desc = dbri->next_desc[rd]; - status = dbri->dma->desc[rd].word1; - dbri->dma->desc[rd].word1 = 0; /* Reset it for next time. */ - - info = &dbri->stream_info[DBRI_REC]; - info->offset += DBRI_RD_CNT(status); - - /* FIXME: Check status */ - - dprintk(D_INT, "Recv RD %d, status 0x%02x, len %d\n", - rd, DBRI_RD_STATUS(status), DBRI_RD_CNT(status)); - - /* Notify ALSA */ - spin_unlock(&dbri->lock); - snd_pcm_period_elapsed(info->substream); - spin_lock(&dbri->lock); -} - -static void dbri_process_one_interrupt(struct snd_dbri *dbri, int x) -{ - int val = D_INTR_GETVAL(x); - int channel = D_INTR_GETCHAN(x); - int command = D_INTR_GETCMD(x); - int code = D_INTR_GETCODE(x); -#ifdef DBRI_DEBUG - int rval = D_INTR_GETRVAL(x); -#endif - - if (channel == D_INTR_CMD) { - dprintk(D_CMD, "INTR: Command: %-5s Value:%d\n", - cmds[command], val); - } else { - dprintk(D_INT, "INTR: Chan:%d Code:%d Val:%#x\n", - channel, code, rval); - } - - switch (code) { - case D_INTR_CMDI: - if (command != D_WAIT) - printk(KERN_ERR "DBRI: Command read interrupt\n"); - break; - case D_INTR_BRDY: - reception_complete_intr(dbri, channel); - break; - case D_INTR_XCMP: - case D_INTR_MINT: - transmission_complete_intr(dbri, channel); - break; - case D_INTR_UNDR: - /* UNDR - Transmission underrun - * resend SDP command with clear pipe bit (C) set - */ - { - /* FIXME: do something useful in case of underrun */ - printk(KERN_ERR "DBRI: Underrun error\n"); -#if 0 - s32 *cmd; - int pipe = channel; - int td = dbri->pipes[pipe].desc; - - dbri->dma->desc[td].word4 = 0; - cmd = dbri_cmdlock(dbri, NoGetLock); - *(cmd++) = DBRI_CMD(D_SDP, 0, - dbri->pipes[pipe].sdp - | D_SDP_P | D_SDP_C | D_SDP_2SAME); - *(cmd++) = dbri->dma_dvma + dbri_dma_off(desc, td); - dbri_cmdsend(dbri, cmd); -#endif - } - break; - case D_INTR_FXDT: - /* FXDT - Fixed data change */ - if (dbri->pipes[channel].sdp & D_SDP_MSB) - val = reverse_bytes(val, dbri->pipes[channel].length); - - if (dbri->pipes[channel].recv_fixed_ptr) - *(dbri->pipes[channel].recv_fixed_ptr) = val; - break; - default: - if (channel != D_INTR_CMD) - printk(KERN_WARNING - "DBRI: Ignored Interrupt: %d (0x%x)\n", code, x); - } -} - -/* dbri_process_interrupt_buffer advances through the DBRI's interrupt - * buffer until it finds a zero word (indicating nothing more to do - * right now). Non-zero words require processing and are handed off - * to dbri_process_one_interrupt AFTER advancing the pointer. - */ -static void dbri_process_interrupt_buffer(struct snd_dbri *dbri) -{ - s32 x; - - while ((x = dbri->dma->intr[dbri->dbri_irqp]) != 0) { - dbri->dma->intr[dbri->dbri_irqp] = 0; - dbri->dbri_irqp++; - if (dbri->dbri_irqp == DBRI_INT_BLK) - dbri->dbri_irqp = 1; - - dbri_process_one_interrupt(dbri, x); - } -} - -static irqreturn_t snd_dbri_interrupt(int irq, void *dev_id) -{ - struct snd_dbri *dbri = dev_id; - static int errcnt = 0; - int x; - - if (dbri == NULL) - return IRQ_NONE; - spin_lock(&dbri->lock); - - /* - * Read it, so the interrupt goes away. - */ - x = sbus_readl(dbri->regs + REG1); - - if (x & (D_MRR | D_MLE | D_LBG | D_MBE)) { - u32 tmp; - - if (x & D_MRR) - printk(KERN_ERR - "DBRI: Multiple Error Ack on SBus reg1=0x%x\n", - x); - if (x & D_MLE) - printk(KERN_ERR - "DBRI: Multiple Late Error on SBus reg1=0x%x\n", - x); - if (x & D_LBG) - printk(KERN_ERR - "DBRI: Lost Bus Grant on SBus reg1=0x%x\n", x); - if (x & D_MBE) - printk(KERN_ERR - "DBRI: Burst Error on SBus reg1=0x%x\n", x); - - /* Some of these SBus errors cause the chip's SBus circuitry - * to be disabled, so just re-enable and try to keep going. - * - * The only one I've seen is MRR, which will be triggered - * if you let a transmit pipe underrun, then try to CDP it. - * - * If these things persist, we reset the chip. - */ - if ((++errcnt) % 10 == 0) { - dprintk(D_INT, "Interrupt errors exceeded.\n"); - dbri_reset(dbri); - } else { - tmp = sbus_readl(dbri->regs + REG0); - tmp &= ~(D_D); - sbus_writel(tmp, dbri->regs + REG0); - } - } - - dbri_process_interrupt_buffer(dbri); - - spin_unlock(&dbri->lock); - - return IRQ_HANDLED; -} - -/**************************************************************************** - PCM Interface -****************************************************************************/ -static struct snd_pcm_hardware snd_dbri_pcm_hw = { - .info = SNDRV_PCM_INFO_MMAP | - SNDRV_PCM_INFO_INTERLEAVED | - SNDRV_PCM_INFO_BLOCK_TRANSFER | - SNDRV_PCM_INFO_MMAP_VALID | - SNDRV_PCM_INFO_BATCH, - .formats = SNDRV_PCM_FMTBIT_MU_LAW | - SNDRV_PCM_FMTBIT_A_LAW | - SNDRV_PCM_FMTBIT_U8 | - SNDRV_PCM_FMTBIT_S16_BE, - .rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_5512, - .rate_min = 5512, - .rate_max = 48000, - .channels_min = 1, - .channels_max = 2, - .buffer_bytes_max = 64 * 1024, - .period_bytes_min = 1, - .period_bytes_max = DBRI_TD_MAXCNT, - .periods_min = 1, - .periods_max = 1024, -}; - -static int snd_hw_rule_format(struct snd_pcm_hw_params *params, - struct snd_pcm_hw_rule *rule) -{ - struct snd_interval *c = hw_param_interval(params, - SNDRV_PCM_HW_PARAM_CHANNELS); - struct snd_mask *f = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT); - struct snd_mask fmt; - - snd_mask_any(&fmt); - if (c->min > 1) { - fmt.bits[0] &= SNDRV_PCM_FMTBIT_S16_BE; - return snd_mask_refine(f, &fmt); - } - return 0; -} - -static int snd_hw_rule_channels(struct snd_pcm_hw_params *params, - struct snd_pcm_hw_rule *rule) -{ - struct snd_interval *c = hw_param_interval(params, - SNDRV_PCM_HW_PARAM_CHANNELS); - struct snd_mask *f = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT); - struct snd_interval ch; - - snd_interval_any(&ch); - if (!(f->bits[0] & SNDRV_PCM_FMTBIT_S16_BE)) { - ch.min = 1; - ch.max = 1; - ch.integer = 1; - return snd_interval_refine(c, &ch); - } - return 0; -} - -static int snd_dbri_open(struct snd_pcm_substream *substream) -{ - struct snd_dbri *dbri = snd_pcm_substream_chip(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream); - unsigned long flags; - - dprintk(D_USR, "open audio output.\n"); - runtime->hw = snd_dbri_pcm_hw; - - spin_lock_irqsave(&dbri->lock, flags); - info->substream = substream; - info->offset = 0; - info->dvma_buffer = 0; - info->pipe = -1; - spin_unlock_irqrestore(&dbri->lock, flags); - - snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, - snd_hw_rule_format, NULL, SNDRV_PCM_HW_PARAM_FORMAT, - -1); - snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_FORMAT, - snd_hw_rule_channels, NULL, - SNDRV_PCM_HW_PARAM_CHANNELS, - -1); - - cs4215_open(dbri); - - return 0; -} - -static int snd_dbri_close(struct snd_pcm_substream *substream) -{ - struct snd_dbri *dbri = snd_pcm_substream_chip(substream); - struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream); - - dprintk(D_USR, "close audio output.\n"); - info->substream = NULL; - info->offset = 0; - - return 0; -} - -static int snd_dbri_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *hw_params) -{ - struct snd_pcm_runtime *runtime = substream->runtime; - struct snd_dbri *dbri = snd_pcm_substream_chip(substream); - struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream); - int direction; - int ret; - - /* set sampling rate, audio format and number of channels */ - ret = cs4215_prepare(dbri, params_rate(hw_params), - params_format(hw_params), - params_channels(hw_params)); - if (ret != 0) - return ret; - - if ((ret = snd_pcm_lib_malloc_pages(substream, - params_buffer_bytes(hw_params))) < 0) { - printk(KERN_ERR "malloc_pages failed with %d\n", ret); - return ret; - } - - /* hw_params can get called multiple times. Only map the DMA once. - */ - if (info->dvma_buffer == 0) { - if (DBRI_STREAMNO(substream) == DBRI_PLAY) - direction = DMA_TO_DEVICE; - else - direction = DMA_FROM_DEVICE; - - info->dvma_buffer = - dma_map_single(&dbri->op->dev, - runtime->dma_area, - params_buffer_bytes(hw_params), - direction); - } - - direction = params_buffer_bytes(hw_params); - dprintk(D_USR, "hw_params: %d bytes, dvma=%x\n", - direction, info->dvma_buffer); - return 0; -} - -static int snd_dbri_hw_free(struct snd_pcm_substream *substream) -{ - struct snd_dbri *dbri = snd_pcm_substream_chip(substream); - struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream); - int direction; - - dprintk(D_USR, "hw_free.\n"); - - /* hw_free can get called multiple times. Only unmap the DMA once. - */ - if (info->dvma_buffer) { - if (DBRI_STREAMNO(substream) == DBRI_PLAY) - direction = DMA_TO_DEVICE; - else - direction = DMA_FROM_DEVICE; - - dma_unmap_single(&dbri->op->dev, info->dvma_buffer, - substream->runtime->buffer_size, direction); - info->dvma_buffer = 0; - } - if (info->pipe != -1) { - reset_pipe(dbri, info->pipe); - info->pipe = -1; - } - - return snd_pcm_lib_free_pages(substream); -} - -static int snd_dbri_prepare(struct snd_pcm_substream *substream) -{ - struct snd_dbri *dbri = snd_pcm_substream_chip(substream); - struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream); - int ret; - - info->size = snd_pcm_lib_buffer_bytes(substream); - if (DBRI_STREAMNO(substream) == DBRI_PLAY) - info->pipe = 4; /* Send pipe */ - else - info->pipe = 6; /* Receive pipe */ - - spin_lock_irq(&dbri->lock); - info->offset = 0; - - /* Setup the all the transmit/receive descriptors to cover the - * whole DMA buffer. - */ - ret = setup_descs(dbri, DBRI_STREAMNO(substream), - snd_pcm_lib_period_bytes(substream)); - - spin_unlock_irq(&dbri->lock); - - dprintk(D_USR, "prepare audio output. %d bytes\n", info->size); - return ret; -} - -static int snd_dbri_trigger(struct snd_pcm_substream *substream, int cmd) -{ - struct snd_dbri *dbri = snd_pcm_substream_chip(substream); - struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream); - int ret = 0; - - switch (cmd) { - case SNDRV_PCM_TRIGGER_START: - dprintk(D_USR, "start audio, period is %d bytes\n", - (int)snd_pcm_lib_period_bytes(substream)); - /* Re-submit the TDs. */ - xmit_descs(dbri); - break; - case SNDRV_PCM_TRIGGER_STOP: - dprintk(D_USR, "stop audio.\n"); - reset_pipe(dbri, info->pipe); - break; - default: - ret = -EINVAL; - } - - return ret; -} - -static snd_pcm_uframes_t snd_dbri_pointer(struct snd_pcm_substream *substream) -{ - struct snd_dbri *dbri = snd_pcm_substream_chip(substream); - struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream); - snd_pcm_uframes_t ret; - - ret = bytes_to_frames(substream->runtime, info->offset) - % substream->runtime->buffer_size; - dprintk(D_USR, "I/O pointer: %ld frames of %ld.\n", - ret, substream->runtime->buffer_size); - return ret; -} - -static struct snd_pcm_ops snd_dbri_ops = { - .open = snd_dbri_open, - .close = snd_dbri_close, - .ioctl = snd_pcm_lib_ioctl, - .hw_params = snd_dbri_hw_params, - .hw_free = snd_dbri_hw_free, - .prepare = snd_dbri_prepare, - .trigger = snd_dbri_trigger, - .pointer = snd_dbri_pointer, -}; - -static int __devinit snd_dbri_pcm(struct snd_card *card) -{ - struct snd_pcm *pcm; - int err; - - if ((err = snd_pcm_new(card, - /* ID */ "sun_dbri", - /* device */ 0, - /* playback count */ 1, - /* capture count */ 1, &pcm)) < 0) - return err; - - snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_dbri_ops); - snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_dbri_ops); - - pcm->private_data = card->private_data; - pcm->info_flags = 0; - strcpy(pcm->name, card->shortname); - - if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, - SNDRV_DMA_TYPE_CONTINUOUS, - snd_dma_continuous_data(GFP_KERNEL), - 64 * 1024, 64 * 1024)) < 0) - return err; - - return 0; -} - -/***************************************************************************** - Mixer interface -*****************************************************************************/ - -static int snd_cs4215_info_volume(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; - uinfo->count = 2; - uinfo->value.integer.min = 0; - if (kcontrol->private_value == DBRI_PLAY) - uinfo->value.integer.max = DBRI_MAX_VOLUME; - else - uinfo->value.integer.max = DBRI_MAX_GAIN; - return 0; -} - -static int snd_cs4215_get_volume(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_dbri *dbri = snd_kcontrol_chip(kcontrol); - struct dbri_streaminfo *info; - - if (snd_BUG_ON(!dbri)) - return -EINVAL; - info = &dbri->stream_info[kcontrol->private_value]; - - ucontrol->value.integer.value[0] = info->left_gain; - ucontrol->value.integer.value[1] = info->right_gain; - return 0; -} - -static int snd_cs4215_put_volume(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_dbri *dbri = snd_kcontrol_chip(kcontrol); - struct dbri_streaminfo *info = - &dbri->stream_info[kcontrol->private_value]; - unsigned int vol[2]; - int changed = 0; - - vol[0] = ucontrol->value.integer.value[0]; - vol[1] = ucontrol->value.integer.value[1]; - if (kcontrol->private_value == DBRI_PLAY) { - if (vol[0] > DBRI_MAX_VOLUME || vol[1] > DBRI_MAX_VOLUME) - return -EINVAL; - } else { - if (vol[0] > DBRI_MAX_GAIN || vol[1] > DBRI_MAX_GAIN) - return -EINVAL; - } - - if (info->left_gain != vol[0]) { - info->left_gain = vol[0]; - changed = 1; - } - if (info->right_gain != vol[1]) { - info->right_gain = vol[1]; - changed = 1; - } - if (changed) { - /* First mute outputs, and wait 1/8000 sec (125 us) - * to make sure this takes. This avoids clicking noises. - */ - cs4215_setdata(dbri, 1); - udelay(125); - cs4215_setdata(dbri, 0); - } - return changed; -} - -static int snd_cs4215_info_single(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - int mask = (kcontrol->private_value >> 16) & 0xff; - - uinfo->type = (mask == 1) ? - SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; - uinfo->count = 1; - uinfo->value.integer.min = 0; - uinfo->value.integer.max = mask; - return 0; -} - -static int snd_cs4215_get_single(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_dbri *dbri = snd_kcontrol_chip(kcontrol); - int elem = kcontrol->private_value & 0xff; - int shift = (kcontrol->private_value >> 8) & 0xff; - int mask = (kcontrol->private_value >> 16) & 0xff; - int invert = (kcontrol->private_value >> 24) & 1; - - if (snd_BUG_ON(!dbri)) - return -EINVAL; - - if (elem < 4) - ucontrol->value.integer.value[0] = - (dbri->mm.data[elem] >> shift) & mask; - else - ucontrol->value.integer.value[0] = - (dbri->mm.ctrl[elem - 4] >> shift) & mask; - - if (invert == 1) - ucontrol->value.integer.value[0] = - mask - ucontrol->value.integer.value[0]; - return 0; -} - -static int snd_cs4215_put_single(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_dbri *dbri = snd_kcontrol_chip(kcontrol); - int elem = kcontrol->private_value & 0xff; - int shift = (kcontrol->private_value >> 8) & 0xff; - int mask = (kcontrol->private_value >> 16) & 0xff; - int invert = (kcontrol->private_value >> 24) & 1; - int changed = 0; - unsigned short val; - - if (snd_BUG_ON(!dbri)) - return -EINVAL; - - val = (ucontrol->value.integer.value[0] & mask); - if (invert == 1) - val = mask - val; - val <<= shift; - - if (elem < 4) { - dbri->mm.data[elem] = (dbri->mm.data[elem] & - ~(mask << shift)) | val; - changed = (val != dbri->mm.data[elem]); - } else { - dbri->mm.ctrl[elem - 4] = (dbri->mm.ctrl[elem - 4] & - ~(mask << shift)) | val; - changed = (val != dbri->mm.ctrl[elem - 4]); - } - - dprintk(D_GEN, "put_single: mask=0x%x, changed=%d, " - "mixer-value=%ld, mm-value=0x%x\n", - mask, changed, ucontrol->value.integer.value[0], - dbri->mm.data[elem & 3]); - - if (changed) { - /* First mute outputs, and wait 1/8000 sec (125 us) - * to make sure this takes. This avoids clicking noises. - */ - cs4215_setdata(dbri, 1); - udelay(125); - cs4215_setdata(dbri, 0); - } - return changed; -} - -/* Entries 0-3 map to the 4 data timeslots, entries 4-7 map to the 4 control - timeslots. Shift is the bit offset in the timeslot, mask defines the - number of bits. invert is a boolean for use with attenuation. - */ -#define CS4215_SINGLE(xname, entry, shift, mask, invert) \ -{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ - .info = snd_cs4215_info_single, \ - .get = snd_cs4215_get_single, .put = snd_cs4215_put_single, \ - .private_value = (entry) | ((shift) << 8) | ((mask) << 16) | \ - ((invert) << 24) }, - -static struct snd_kcontrol_new dbri_controls[] __devinitdata = { - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Playback Volume", - .info = snd_cs4215_info_volume, - .get = snd_cs4215_get_volume, - .put = snd_cs4215_put_volume, - .private_value = DBRI_PLAY, - }, - CS4215_SINGLE("Headphone switch", 0, 7, 1, 0) - CS4215_SINGLE("Line out switch", 0, 6, 1, 0) - CS4215_SINGLE("Speaker switch", 1, 6, 1, 0) - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Capture Volume", - .info = snd_cs4215_info_volume, - .get = snd_cs4215_get_volume, - .put = snd_cs4215_put_volume, - .private_value = DBRI_REC, - }, - /* FIXME: mic/line switch */ - CS4215_SINGLE("Line in switch", 2, 4, 1, 0) - CS4215_SINGLE("High Pass Filter switch", 5, 7, 1, 0) - CS4215_SINGLE("Monitor Volume", 3, 4, 0xf, 1) - CS4215_SINGLE("Mic boost", 4, 4, 1, 1) -}; - -static int __devinit snd_dbri_mixer(struct snd_card *card) -{ - int idx, err; - struct snd_dbri *dbri; - - if (snd_BUG_ON(!card || !card->private_data)) - return -EINVAL; - dbri = card->private_data; - - strcpy(card->mixername, card->shortname); - - for (idx = 0; idx < ARRAY_SIZE(dbri_controls); idx++) { - err = snd_ctl_add(card, - snd_ctl_new1(&dbri_controls[idx], dbri)); - if (err < 0) - return err; - } - - for (idx = DBRI_REC; idx < DBRI_NO_STREAMS; idx++) { - dbri->stream_info[idx].left_gain = 0; - dbri->stream_info[idx].right_gain = 0; - } - - return 0; -} - -/**************************************************************************** - /proc interface -****************************************************************************/ -static void dbri_regs_read(struct snd_info_entry *entry, - struct snd_info_buffer *buffer) -{ - struct snd_dbri *dbri = entry->private_data; - - snd_iprintf(buffer, "REG0: 0x%x\n", sbus_readl(dbri->regs + REG0)); - snd_iprintf(buffer, "REG2: 0x%x\n", sbus_readl(dbri->regs + REG2)); - snd_iprintf(buffer, "REG8: 0x%x\n", sbus_readl(dbri->regs + REG8)); - snd_iprintf(buffer, "REG9: 0x%x\n", sbus_readl(dbri->regs + REG9)); -} - -#ifdef DBRI_DEBUG -static void dbri_debug_read(struct snd_info_entry *entry, - struct snd_info_buffer *buffer) -{ - struct snd_dbri *dbri = entry->private_data; - int pipe; - snd_iprintf(buffer, "debug=%d\n", dbri_debug); - - for (pipe = 0; pipe < 32; pipe++) { - if (pipe_active(dbri, pipe)) { - struct dbri_pipe *pptr = &dbri->pipes[pipe]; - snd_iprintf(buffer, - "Pipe %d: %s SDP=0x%x desc=%d, " - "len=%d next %d\n", - pipe, - (pptr->sdp & D_SDP_TO_SER) ? "output" : - "input", - pptr->sdp, pptr->desc, - pptr->length, pptr->nextpipe); - } - } -} -#endif - -static void __devinit snd_dbri_proc(struct snd_card *card) -{ - struct snd_dbri *dbri = card->private_data; - struct snd_info_entry *entry; - - if (!snd_card_proc_new(card, "regs", &entry)) - snd_info_set_text_ops(entry, dbri, dbri_regs_read); - -#ifdef DBRI_DEBUG - if (!snd_card_proc_new(card, "debug", &entry)) { - snd_info_set_text_ops(entry, dbri, dbri_debug_read); - entry->mode = S_IFREG | S_IRUGO; /* Readable only. */ - } -#endif -} - -/* -**************************************************************************** -**************************** Initialization ******************************** -**************************************************************************** -*/ -static void snd_dbri_free(struct snd_dbri *dbri); - -static int __devinit snd_dbri_create(struct snd_card *card, - struct platform_device *op, - int irq, int dev) -{ - struct snd_dbri *dbri = card->private_data; - int err; - - spin_lock_init(&dbri->lock); - dbri->op = op; - dbri->irq = irq; - - dbri->dma = dma_alloc_coherent(&op->dev, - sizeof(struct dbri_dma), - &dbri->dma_dvma, GFP_ATOMIC); - if (!dbri->dma) - return -ENOMEM; - memset((void *)dbri->dma, 0, sizeof(struct dbri_dma)); - - dprintk(D_GEN, "DMA Cmd Block 0x%p (0x%08x)\n", - dbri->dma, dbri->dma_dvma); - - /* Map the registers into memory. */ - dbri->regs_size = resource_size(&op->resource[0]); - dbri->regs = of_ioremap(&op->resource[0], 0, - dbri->regs_size, "DBRI Registers"); - if (!dbri->regs) { - printk(KERN_ERR "DBRI: could not allocate registers\n"); - dma_free_coherent(&op->dev, sizeof(struct dbri_dma), - (void *)dbri->dma, dbri->dma_dvma); - return -EIO; - } - - err = request_irq(dbri->irq, snd_dbri_interrupt, IRQF_SHARED, - "DBRI audio", dbri); - if (err) { - printk(KERN_ERR "DBRI: Can't get irq %d\n", dbri->irq); - of_iounmap(&op->resource[0], dbri->regs, dbri->regs_size); - dma_free_coherent(&op->dev, sizeof(struct dbri_dma), - (void *)dbri->dma, dbri->dma_dvma); - return err; - } - - /* Do low level initialization of the DBRI and CS4215 chips */ - dbri_initialize(dbri); - err = cs4215_init(dbri); - if (err) { - snd_dbri_free(dbri); - return err; - } - - return 0; -} - -static void snd_dbri_free(struct snd_dbri *dbri) -{ - dprintk(D_GEN, "snd_dbri_free\n"); - dbri_reset(dbri); - - if (dbri->irq) - free_irq(dbri->irq, dbri); - - if (dbri->regs) - of_iounmap(&dbri->op->resource[0], dbri->regs, dbri->regs_size); - - if (dbri->dma) - dma_free_coherent(&dbri->op->dev, - sizeof(struct dbri_dma), - (void *)dbri->dma, dbri->dma_dvma); -} - -static int __devinit dbri_probe(struct platform_device *op) -{ - struct snd_dbri *dbri; - struct resource *rp; - struct snd_card *card; - static int dev = 0; - int irq; - int err; - - if (dev >= SNDRV_CARDS) - return -ENODEV; - if (!enable[dev]) { - dev++; - return -ENOENT; - } - - irq = op->archdata.irqs[0]; - if (irq <= 0) { - printk(KERN_ERR "DBRI-%d: No IRQ.\n", dev); - return -ENODEV; - } - - err = snd_card_create(index[dev], id[dev], THIS_MODULE, - sizeof(struct snd_dbri), &card); - if (err < 0) - return err; - - strcpy(card->driver, "DBRI"); - strcpy(card->shortname, "Sun DBRI"); - rp = &op->resource[0]; - sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d", - card->shortname, - rp->flags & 0xffL, (unsigned long long)rp->start, irq); - - err = snd_dbri_create(card, op, irq, dev); - if (err < 0) { - snd_card_free(card); - return err; - } - - dbri = card->private_data; - err = snd_dbri_pcm(card); - if (err < 0) - goto _err; - - err = snd_dbri_mixer(card); - if (err < 0) - goto _err; - - /* /proc file handling */ - snd_dbri_proc(card); - dev_set_drvdata(&op->dev, card); - - err = snd_card_register(card); - if (err < 0) - goto _err; - - printk(KERN_INFO "audio%d at %p (irq %d) is DBRI(%c)+CS4215(%d)\n", - dev, dbri->regs, - dbri->irq, op->dev.of_node->name[9], dbri->mm.version); - dev++; - - return 0; - -_err: - snd_dbri_free(dbri); - snd_card_free(card); - return err; -} - -static int __devexit dbri_remove(struct platform_device *op) -{ - struct snd_card *card = dev_get_drvdata(&op->dev); - - snd_dbri_free(card->private_data); - snd_card_free(card); - - dev_set_drvdata(&op->dev, NULL); - - return 0; -} - -static const struct of_device_id dbri_match[] = { - { - .name = "SUNW,DBRIe", - }, - { - .name = "SUNW,DBRIf", - }, - {}, -}; - -MODULE_DEVICE_TABLE(of, dbri_match); - -static struct platform_driver dbri_sbus_driver = { - .driver = { - .name = "dbri", - .owner = THIS_MODULE, - .of_match_table = dbri_match, - }, - .probe = dbri_probe, - .remove = __devexit_p(dbri_remove), -}; - -module_platform_driver(dbri_sbus_driver); -- cgit