From 871480933a1c28f8a9fed4c4d34d06c439a7a422 Mon Sep 17 00:00:00 2001 From: Srikant Patnaik Date: Sun, 11 Jan 2015 12:28:04 +0530 Subject: Moved, renamed, and deleted files The original directory structure was scattered and unorganized. Changes are basically to make it look like kernel structure. --- ANDROID_3.4.5/arch/arm/mach-omap2/clock36xx.c | 72 --------------------------- 1 file changed, 72 deletions(-) delete mode 100644 ANDROID_3.4.5/arch/arm/mach-omap2/clock36xx.c (limited to 'ANDROID_3.4.5/arch/arm/mach-omap2/clock36xx.c') diff --git a/ANDROID_3.4.5/arch/arm/mach-omap2/clock36xx.c b/ANDROID_3.4.5/arch/arm/mach-omap2/clock36xx.c deleted file mode 100644 index 0c5e25ed..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-omap2/clock36xx.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * OMAP36xx-specific clkops - * - * Copyright (C) 2010 Texas Instruments, Inc. - * Copyright (C) 2010 Nokia Corporation - * - * Mike Turquette - * Vijaykumar GN - * Paul Walmsley - * - * Parts of this code are based on code written by - * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu, - * Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#undef DEBUG - -#include -#include -#include - -#include - -#include "clock.h" -#include "clock36xx.h" - - -/** - * omap36xx_pwrdn_clk_enable_with_hsdiv_restore - enable clocks suffering - * from HSDivider PWRDN problem Implements Errata ID: i556. - * @clk: DPLL output struct clk - * - * 3630 only: dpll3_m3_ck, dpll4_m2_ck, dpll4_m3_ck, dpll4_m4_ck, - * dpll4_m5_ck & dpll4_m6_ck dividers gets loaded with reset - * valueafter their respective PWRDN bits are set. Any dummy write - * (Any other value different from the Read value) to the - * corresponding CM_CLKSEL register will refresh the dividers. - */ -static int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk *clk) -{ - u32 dummy_v, orig_v, clksel_shift; - int ret; - - /* Clear PWRDN bit of HSDIVIDER */ - ret = omap2_dflt_clk_enable(clk); - - /* Restore the dividers */ - if (!ret) { - clksel_shift = __ffs(clk->parent->clksel_mask); - orig_v = __raw_readl(clk->parent->clksel_reg); - dummy_v = orig_v; - - /* Write any other value different from the Read value */ - dummy_v ^= (1 << clksel_shift); - __raw_writel(dummy_v, clk->parent->clksel_reg); - - /* Write the original divider */ - __raw_writel(orig_v, clk->parent->clksel_reg); - } - - return ret; -} - -const struct clkops clkops_omap36xx_pwrdn_with_hsdiv_wait_restore = { - .enable = omap36xx_pwrdn_clk_enable_with_hsdiv_restore, - .disable = omap2_dflt_clk_disable, - .find_companion = omap2_clk_dflt_find_companion, - .find_idlest = omap2_clk_dflt_find_idlest, -}; -- cgit