From 392e8802486cb573b916e746010e141a75f507e6 Mon Sep 17 00:00:00 2001 From: Kevin Date: Sat, 15 Nov 2014 09:58:27 +0800 Subject: init android origin source code --- ANDROID_3.4.5/arch/arm/mach-mmp/clock.c | 105 ++++++++++++++++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 ANDROID_3.4.5/arch/arm/mach-mmp/clock.c (limited to 'ANDROID_3.4.5/arch/arm/mach-mmp/clock.c') diff --git a/ANDROID_3.4.5/arch/arm/mach-mmp/clock.c b/ANDROID_3.4.5/arch/arm/mach-mmp/clock.c new file mode 100644 index 00000000..7c6f95f2 --- /dev/null +++ b/ANDROID_3.4.5/arch/arm/mach-mmp/clock.c @@ -0,0 +1,105 @@ +/* + * linux/arch/arm/mach-mmp/clock.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include "clock.h" + +static void apbc_clk_enable(struct clk *clk) +{ + uint32_t clk_rst; + + clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(clk->fnclksel); + __raw_writel(clk_rst, clk->clk_rst); +} + +static void apbc_clk_disable(struct clk *clk) +{ + __raw_writel(0, clk->clk_rst); +} + +struct clkops apbc_clk_ops = { + .enable = apbc_clk_enable, + .disable = apbc_clk_disable, +}; + +static void apmu_clk_enable(struct clk *clk) +{ + __raw_writel(clk->enable_val, clk->clk_rst); +} + +static void apmu_clk_disable(struct clk *clk) +{ + __raw_writel(0, clk->clk_rst); +} + +struct clkops apmu_clk_ops = { + .enable = apmu_clk_enable, + .disable = apmu_clk_disable, +}; + +static DEFINE_SPINLOCK(clocks_lock); + +int clk_enable(struct clk *clk) +{ + unsigned long flags; + + spin_lock_irqsave(&clocks_lock, flags); + if (clk->enabled++ == 0) + clk->ops->enable(clk); + spin_unlock_irqrestore(&clocks_lock, flags); + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ + unsigned long flags; + + WARN_ON(clk->enabled == 0); + + spin_lock_irqsave(&clocks_lock, flags); + if (--clk->enabled == 0) + clk->ops->disable(clk); + spin_unlock_irqrestore(&clocks_lock, flags); +} +EXPORT_SYMBOL(clk_disable); + +unsigned long clk_get_rate(struct clk *clk) +{ + unsigned long rate; + + if (clk->ops->getrate) + rate = clk->ops->getrate(clk); + else + rate = clk->rate; + + return rate; +} +EXPORT_SYMBOL(clk_get_rate); + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long flags; + int ret = -EINVAL; + + if (clk->ops->setrate) { + spin_lock_irqsave(&clocks_lock, flags); + ret = clk->ops->setrate(clk, rate); + spin_unlock_irqrestore(&clocks_lock, flags); + } + + return ret; +} +EXPORT_SYMBOL(clk_set_rate); -- cgit