diff options
Diffstat (limited to 'arch/h8300/platform/h8s')
| -rw-r--r-- | arch/h8300/platform/h8s/Makefile | 7 | ||||
| -rw-r--r-- | arch/h8300/platform/h8s/edosk2674/Makefile | 5 | ||||
| -rw-r--r-- | arch/h8300/platform/h8s/edosk2674/crt0_ram.S | 130 | ||||
| -rw-r--r-- | arch/h8300/platform/h8s/edosk2674/crt0_rom.S | 186 | ||||
| -rw-r--r-- | arch/h8300/platform/h8s/generic/Makefile | 5 | ||||
| -rw-r--r-- | arch/h8300/platform/h8s/generic/crt0_ram.S | 127 | ||||
| -rw-r--r-- | arch/h8300/platform/h8s/generic/crt0_rom.S | 128 | ||||
| -rw-r--r-- | arch/h8300/platform/h8s/irq.c | 104 | ||||
| -rw-r--r-- | arch/h8300/platform/h8s/ptrace_h8s.c | 84 |
9 files changed, 776 insertions, 0 deletions
diff --git a/arch/h8300/platform/h8s/Makefile b/arch/h8300/platform/h8s/Makefile new file mode 100644 index 00000000..bf124188 --- /dev/null +++ b/arch/h8300/platform/h8s/Makefile @@ -0,0 +1,7 @@ +# +# Makefile for the linux kernel. +# +# Reuse any files we can from the H8S +# + +obj-y := ints_h8s.o ptrace_h8s.o diff --git a/arch/h8300/platform/h8s/edosk2674/Makefile b/arch/h8300/platform/h8s/edosk2674/Makefile new file mode 100644 index 00000000..8e349723 --- /dev/null +++ b/arch/h8300/platform/h8s/edosk2674/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the linux kernel. +# + +extra-y := crt0_$(MODEL).o diff --git a/arch/h8300/platform/h8s/edosk2674/crt0_ram.S b/arch/h8300/platform/h8s/edosk2674/crt0_ram.S new file mode 100644 index 00000000..d12b0deb --- /dev/null +++ b/arch/h8300/platform/h8s/edosk2674/crt0_ram.S @@ -0,0 +1,130 @@ +/* + * linux/arch/h8300/platform/h8s/edosk2674/crt0_ram.S + * + * Yoshinori Sato <ysato@users.sourceforge.jp> + * + * Platform depend startup + * Target Archtecture: EDOSK-2674 + * Memory Layout : RAM + */ + +#define ASSEMBLY + +#include <asm/linkage.h> +#include <asm/regs267x.h> + +#if !defined(CONFIG_BLKDEV_RESERVE) +#if defined(CONFIG_GDB_DEBUG) +#define RAMEND (__ramend - 0xc000) +#else +#define RAMEND __ramend +#endif +#else +#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS +#endif + + .global SYMBOL_NAME(_start) + .global SYMBOL_NAME(_command_line) + .global SYMBOL_NAME(_platform_gpio_table) + .global SYMBOL_NAME(_target_name) + + .h8300s + + .section .text + .file "crt0_ram.S" + + /* CPU Reset entry */ +SYMBOL_NAME_LABEL(_start) + mov.l #RAMEND,sp + ldc #0x80,ccr + ldc #0x00,exr + + /* Peripheral Setup */ + bclr #4,@INTCR:8 /* interrupt mode 2 */ + bset #5,@INTCR:8 + bclr #0,@IER+1:16 + bset #1,@ISCRL+1:16 /* IRQ0 Positive Edge */ + bclr #0,@ISCRL+1:16 + +#if defined(CONFIG_MTD_UCLINUX) + /* move romfs image */ + jsr @__move_romfs +#endif + + /* .bss clear */ + mov.l #__sbss,er5 + mov.l er5,er6 + mov.l #__ebss,er4 + sub.l er5,er4 + shlr #2,er4 + sub.l er0,er0 +1: + mov.l er0,@er5 + adds #4,er5 + dec.l #1,er4 + bne 1b + + /* copy kernel commandline */ + mov.l #COMMAND_START,er5 + mov.l #SYMBOL_NAME(command_line),er6 + mov.w #512,r4 + eepmov.w + + /* uClinux kernel start */ + ldc #0x90,ccr /* running kernel */ + mov.l #SYMBOL_NAME(init_thread_union),sp + add.l #0x2000,sp + jsr @_start_kernel +_exit: + + jmp _exit + + rts + + /* I/O port assign information */ +__platform_gpio_table: + mov.l #gpio_table,er0 + rts + +gpio_table: + ;; P1DDR + ;; used,ddr + .byte 0x00,0x00 + ;; P2DDR + .byte 0x00,0x00 + ;; P3DDR + .byte 0x3f,0x3a + ;; dummy + .byte 0x00,0x00 + ;; P5DDR + .byte 0x00,0x00 + ;; P6DDR + .byte 0x00,0x00 + ;; P7DDR + .byte 0x00,0x00 + ;; P8DDR + .byte 0x00,0x00 + ;; dummy + .byte 0x00,0x00 + ;; PADDR + .byte 0xff,0xff + ;; PBDDR + .byte 0xff,0x00 + ;; PCDDR + .byte 0xff,0x00 + ;; PDDDR + .byte 0xff,0x00 + ;; PEDDR + .byte 0xff,0x00 + ;; PFDDR + .byte 0xff,0xff + ;; PGDDR + .byte 0x0f,0x0f + ;; PHDDR + .byte 0x0f,0x0f + +__target_name: + .asciz "EDOSK-2674" + + .section .bootvec,"ax" + jmp @SYMBOL_NAME(_start) diff --git a/arch/h8300/platform/h8s/edosk2674/crt0_rom.S b/arch/h8300/platform/h8s/edosk2674/crt0_rom.S new file mode 100644 index 00000000..c03d23c6 --- /dev/null +++ b/arch/h8300/platform/h8s/edosk2674/crt0_rom.S @@ -0,0 +1,186 @@ +/* + * linux/arch/h8300/platform/h8s/edosk2674/crt0_rom.S + * + * Yoshinori Sato <ysato@users.sourceforge.jp> + * + * Platform depend startup + * Target Archtecture: EDOSK-2674 + * Memory Layout : ROM + */ + +#define ASSEMBLY + +#include <asm/linkage.h> +#include <asm/regs267x.h> + + .global SYMBOL_NAME(_start) + .global SYMBOL_NAME(_command_line) + .global SYMBOL_NAME(_platform_gpio_table) + .global SYMBOL_NAME(_target_name) + + .h8300s + .section .text + .file "crt0_rom.S" + + /* CPU Reset entry */ +SYMBOL_NAME_LABEL(_start) + mov.l #__ramend,sp + ldc #0x80,ccr + ldc #0,exr + + /* Peripheral Setup */ +;BSC/GPIO setup + mov.l #init_regs,er0 + mov.w #0xffff,e2 +1: + mov.w @er0+,r2 + beq 2f + mov.w @er0+,r1 + mov.b r1l,@er2 + bra 1b + +2: +;SDRAM setup +#define SDRAM_SMR 0x400040 + + mov.b #0,r0l + mov.b r0l,@DRACCR:16 + mov.w #0x188,r0 + mov.w r0,@REFCR:16 + mov.w #0x85b4,r0 + mov.w r0,@DRAMCR:16 + mov.b #0,r1l + mov.b r1l,@SDRAM_SMR + mov.w #0x84b4,r0 + mov.w r0,@DRAMCR:16 +;special thanks to Arizona Cooperative Power + + /* copy .data */ + mov.l #__begin_data,er5 + mov.l #__sdata,er6 + mov.l #__edata,er4 + sub.l er6,er4 + shlr.l #2,er4 +1: + mov.l @er5+,er0 + mov.l er0,@er6 + adds #4,er6 + dec.l #1,er4 + bne 1b + + /* .bss clear */ + mov.l #__sbss,er5 + mov.l #__ebss,er4 + sub.l er5,er4 + shlr.l #2,er4 + sub.l er0,er0 +1: + mov.l er0,@er5 + adds #4,er5 + dec.l #1,er4 + bne 1b + + /* copy kernel commandline */ + mov.l #COMMAND_START,er5 + mov.l #SYMBOL_NAME(_command_line),er6 + mov.w #512,r4 + eepmov.w + + /* linux kernel start */ + ldc #0x90,ccr /* running kernel */ + mov.l #SYMBOL_NAME(init_thread_union),sp + add.l #0x2000,sp + jsr @_start_kernel +_exit: + + jmp _exit + + rts + + /* I/O port assign information */ +__platform_gpio_table: + mov.l #gpio_table,er0 + rts + +#define INIT_REGS_DATA(REGS,DATA) \ + .word ((REGS) & 0xffff),DATA + +init_regs: +INIT_REGS_DATA(ASTCR,0xff) +INIT_REGS_DATA(RDNCR,0x00) +INIT_REGS_DATA(ABWCR,0x80) +INIT_REGS_DATA(WTCRAH,0x27) +INIT_REGS_DATA(WTCRAL,0x77) +INIT_REGS_DATA(WTCRBH,0x71) +INIT_REGS_DATA(WTCRBL,0x22) +INIT_REGS_DATA(CSACRH,0x80) +INIT_REGS_DATA(CSACRL,0x80) +INIT_REGS_DATA(BROMCRH,0xa0) +INIT_REGS_DATA(BROMCRL,0xa0) +INIT_REGS_DATA(P3DDR,0x3a) +INIT_REGS_DATA(P3ODR,0x06) +INIT_REGS_DATA(PADDR,0xff) +INIT_REGS_DATA(PFDDR,0xfe) +INIT_REGS_DATA(PGDDR,0x0f) +INIT_REGS_DATA(PHDDR,0x0f) +INIT_REGS_DATA(PFCR0,0xff) +INIT_REGS_DATA(PFCR2,0x0d) +INIT_REGS_DATA(ITSR, 0x00) +INIT_REGS_DATA(ITSR+1,0x3f) +INIT_REGS_DATA(INTCR,0x20) + + .word 0 + +gpio_table: + ;; P1DDR + .byte 0x00,0x00 + ;; P2DDR + .byte 0x00,0x00 + ;; P3DDR + .byte 0x00,0x00 + ;; dummy + .byte 0x00,0x00 + ;; P5DDR + .byte 0x00,0x00 + ;; P6DDR + .byte 0x00,0x00 + ;; P7DDR + .byte 0x00,0x00 + ;; P8DDR + .byte 0x00,0x00 + ;; dummy + .byte 0x00,0x00 + ;; PADDR + .byte 0x00,0x00 + ;; PBDDR + .byte 0x00,0x00 + ;; PCDDR + .byte 0x00,0x00 + ;; PDDDR + .byte 0x00,0x00 + ;; PEDDR + .byte 0x00,0x00 + ;; PFDDR + .byte 0x00,0x00 + ;; PGDDR + .byte 0x00,0x00 + ;; PHDDR + .byte 0x00,0x00 + + .section .rodata +__target_name: + .asciz "EDOSK-2674" + + .section .bss +__command_line: + .space 512 + + /* interrupt vector */ + .section .vectors,"ax" + .long __start + .long __start +vector = 2 + .rept 126 + .long _interrupt_redirect_table+vector*4 +vector = vector + 1 + .endr diff --git a/arch/h8300/platform/h8s/generic/Makefile b/arch/h8300/platform/h8s/generic/Makefile new file mode 100644 index 00000000..44b4685c --- /dev/null +++ b/arch/h8300/platform/h8s/generic/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the linux kernel. +# + +extra-y = crt0_$(MODEL).o diff --git a/arch/h8300/platform/h8s/generic/crt0_ram.S b/arch/h8300/platform/h8s/generic/crt0_ram.S new file mode 100644 index 00000000..b0454106 --- /dev/null +++ b/arch/h8300/platform/h8s/generic/crt0_ram.S @@ -0,0 +1,127 @@ +/* + * linux/arch/h8300/platform/h8s/edosk2674/crt0_ram.S + * + * Yoshinori Sato <ysato@users.sourceforge.jp> + * + * Platform depend startup + * Target Archtecture: generic + * Memory Layout : RAM + */ + +#define ASSEMBLY + +#include <asm/linkage.h> +#include <asm/regs267x.h> + +#if !defined(CONFIG_BLKDEV_RESERVE) +#if defined(CONFIG_GDB_DEBUG) +#define RAMEND (__ramend - 0xc000) +#else +#define RAMEND __ramend +#endif +#else +#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS +#endif + + .global SYMBOL_NAME(_start) + .global SYMBOL_NAME(_command_line) + .global SYMBOL_NAME(_platform_gpio_table) + .global SYMBOL_NAME(_target_name) + + .h8300s + + .section .text + .file "crt0_ram.S" + + /* CPU Reset entry */ +SYMBOL_NAME_LABEL(_start) + mov.l #RAMEND,sp + ldc #0x80,ccr + ldc #0x00,exr + + /* Peripheral Setup */ + bclr #4,@INTCR:8 /* interrupt mode 2 */ + bset #5,@INTCR:8 + +#if defined(CONFIG_MTD_UCLINUX) + /* move romfs image */ + jsr @__move_romfs +#endif + + /* .bss clear */ + mov.l #__sbss,er5 + mov.l er5,er6 + mov.l #__ebss,er4 + sub.l er5,er4 + shlr #2,er4 + sub.l er0,er0 +1: + mov.l er0,@er5 + adds #4,er5 + dec.l #1,er4 + bne 1b + + /* copy kernel commandline */ + mov.l #COMMAND_START,er5 + mov.l #SYMBOL_NAME(command_line),er6 + mov.w #512,r4 + eepmov.w + + /* uClinux kernel start */ + ldc #0x90,ccr /* running kernel */ + mov.l #SYMBOL_NAME(init_thread_union),sp + add.l #0x2000,sp + jsr @_start_kernel +_exit: + + jmp _exit + + rts + + /* I/O port assign information */ +__platform_gpio_table: + mov.l #gpio_table,er0 + rts + +gpio_table: + ;; P1DDR + ;; used,ddr + .byte 0x00,0x00 + ;; P2DDR + .byte 0x00,0x00 + ;; P3DDR + .byte 0x00,0x00 + ;; dummy + .byte 0x00,0x00 + ;; P5DDR + .byte 0x00,0x00 + ;; P6DDR + .byte 0x00,0x00 + ;; P7DDR + .byte 0x00,0x00 + ;; P8DDR + .byte 0x00,0x00 + ;; dummy + .byte 0x00,0x00 + ;; PADDR + .byte 0x00,0x00 + ;; PBDDR + .byte 0x00,0x00 + ;; PCDDR + .byte 0x00,0x00 + ;; PDDDR + .byte 0x00,0x00 + ;; PEDDR + .byte 0x00,0x00 + ;; PFDDR + .byte 0x00,0x00 + ;; PGDDR + .byte 0x00,0x00 + ;; PHDDR + .byte 0x00,0x00 + +__target_name: + .asciz "generic" + + .section .bootvec,"ax" + jmp @SYMBOL_NAME(_start) diff --git a/arch/h8300/platform/h8s/generic/crt0_rom.S b/arch/h8300/platform/h8s/generic/crt0_rom.S new file mode 100644 index 00000000..95b6f289 --- /dev/null +++ b/arch/h8300/platform/h8s/generic/crt0_rom.S @@ -0,0 +1,128 @@ +/* + * linux/arch/h8300/platform/h8s/generic/crt0_rom.S + * + * Yoshinori Sato <ysato@users.sourceforge.jp> + * + * Platform depend startup + * Target Archtecture: generic + * Memory Layout : ROM + */ + +#define ASSEMBLY + +#include <asm/linkage.h> +#include <asm/regs267x.h> + + .global SYMBOL_NAME(_start) + .global SYMBOL_NAME(_command_line) + .global SYMBOL_NAME(_platform_gpio_table) + .global SYMBOL_NAME(_target_name) + + .h8300s + .section .text + .file "crt0_rom.S" + + /* CPU Reset entry */ +SYMBOL_NAME_LABEL(_start) + mov.l #__ramend,sp + ldc #0x80,ccr + ldc #0,exr + bclr #4,@INTCR:8 + bset #5,@INTCR:8 /* Interrupt mode 2 */ + + /* Peripheral Setup */ + + /* copy .data */ +#if !defined(CONFIG_H8S_SIM) + mov.l #__begin_data,er5 + mov.l #__sdata,er6 + mov.l #__edata,er4 + sub.l er6,er4 + shlr.l #2,er4 +1: + mov.l @er5+,er0 + mov.l er0,@er6 + adds #4,er6 + dec.l #1,er4 + bne 1b +#endif + + /* .bss clear */ + mov.l #__sbss,er5 + mov.l #__ebss,er4 + sub.l er5,er4 + shlr.l #2,er4 + sub.l er0,er0 +1: + mov.l er0,@er5 + adds #4,er5 + dec.l #1,er4 + bne 1b + + /* linux kernel start */ + ldc #0x90,ccr /* running kernel */ + mov.l #SYMBOL_NAME(init_thread_union),sp + add.l #0x2000,sp + jsr @_start_kernel +_exit: + + jmp _exit + + rts + + /* I/O port assign information */ +__platform_gpio_table: + mov.l #gpio_table,er0 + rts + +gpio_table: + ;; P1DDR + .byte 0x00,0x00 + ;; P2DDR + .byte 0x00,0x00 + ;; P3DDR + .byte 0x00,0x00 + ;; P4DDR + .byte 0x00,0x00 + ;; P5DDR + .byte 0x00,0x00 + ;; P6DDR + .byte 0x00,0x00 + ;; dummy + .byte 0x00,0x00 + ;; P8DDR + .byte 0x00,0x00 + ;; PADDR + .byte 0x00,0x00 + ;; PBDDR + .byte 0x00,0x00 + ;; PCDDR + .byte 0x00,0x00 + ;; PDDDR + .byte 0x00,0x00 + ;; PEDDR + .byte 0x00,0x00 + ;; PFDDR + .byte 0x00,0x00 + ;; PGDDR + .byte 0x00,0x00 + ;; PHDDR + .byte 0x00,0x00 + + .section .rodata +__target_name: + .asciz "generic" + + .section .bss +__command_line: + .space 512 + + /* interrupt vector */ + .section .vectors,"ax" + .long __start + .long __start +vector = 2 + .rept 126-1 + .long _interrupt_redirect_table+vector*4 +vector = vector + 1 + .endr diff --git a/arch/h8300/platform/h8s/irq.c b/arch/h8300/platform/h8s/irq.c new file mode 100644 index 00000000..7b5f29fe --- /dev/null +++ b/arch/h8300/platform/h8s/irq.c @@ -0,0 +1,104 @@ +/* + * linux/arch/h8300/platform/h8s/ints_h8s.c + * Interrupt handling CPU variants + * + * Yoshinori Sato <ysato@users.sourceforge.jp> + * + */ + +#include <linux/init.h> +#include <linux/errno.h> +#include <linux/kernel.h> + +#include <asm/ptrace.h> +#include <asm/traps.h> +#include <asm/irq.h> +#include <asm/io.h> +#include <asm/gpio-internal.h> +#include <asm/regs267x.h> + +/* saved vector list */ +const int __initdata h8300_saved_vectors[]={ +#if defined(CONFIG_GDB_DEBUG) + TRACE_VEC, + TRAP3_VEC, +#endif + -1 +}; + +/* trap entry table */ +const H8300_VECTOR __initdata h8300_trap_table[] = { + 0,0,0,0,0, + trace_break, /* TRACE */ + 0,0, + system_call, /* TRAPA #0 */ + 0,0,0,0,0,0,0 +}; + +/* IRQ pin assignment */ +struct irq_pins { + unsigned char port_no; + unsigned char bit_no; +} __attribute__((aligned(1),packed)); +/* ISTR = 0 */ +static const struct irq_pins irq_assign_table0[16]={ + {H8300_GPIO_P5,H8300_GPIO_B0},{H8300_GPIO_P5,H8300_GPIO_B1}, + {H8300_GPIO_P5,H8300_GPIO_B2},{H8300_GPIO_P5,H8300_GPIO_B3}, + {H8300_GPIO_P5,H8300_GPIO_B4},{H8300_GPIO_P5,H8300_GPIO_B5}, + {H8300_GPIO_P5,H8300_GPIO_B6},{H8300_GPIO_P5,H8300_GPIO_B7}, + {H8300_GPIO_P6,H8300_GPIO_B0},{H8300_GPIO_P6,H8300_GPIO_B1}, + {H8300_GPIO_P6,H8300_GPIO_B2},{H8300_GPIO_P6,H8300_GPIO_B3}, + {H8300_GPIO_P6,H8300_GPIO_B4},{H8300_GPIO_P6,H8300_GPIO_B5}, + {H8300_GPIO_PF,H8300_GPIO_B1},{H8300_GPIO_PF,H8300_GPIO_B2}, +}; +/* ISTR = 1 */ +static const struct irq_pins irq_assign_table1[16]={ + {H8300_GPIO_P8,H8300_GPIO_B0},{H8300_GPIO_P8,H8300_GPIO_B1}, + {H8300_GPIO_P8,H8300_GPIO_B2},{H8300_GPIO_P8,H8300_GPIO_B3}, + {H8300_GPIO_P8,H8300_GPIO_B4},{H8300_GPIO_P8,H8300_GPIO_B5}, + {H8300_GPIO_PH,H8300_GPIO_B2},{H8300_GPIO_PH,H8300_GPIO_B3}, + {H8300_GPIO_P2,H8300_GPIO_B0},{H8300_GPIO_P2,H8300_GPIO_B1}, + {H8300_GPIO_P2,H8300_GPIO_B2},{H8300_GPIO_P2,H8300_GPIO_B3}, + {H8300_GPIO_P2,H8300_GPIO_B4},{H8300_GPIO_P2,H8300_GPIO_B5}, + {H8300_GPIO_P2,H8300_GPIO_B6},{H8300_GPIO_P2,H8300_GPIO_B7}, +}; + +/* IRQ to GPIO pin translation */ +#define IRQ_GPIO_MAP(irqbit,irq,port,bit) \ +do { \ + if (*(volatile unsigned short *)ITSR & irqbit) { \ + port = irq_assign_table1[irq - EXT_IRQ0].port_no; \ + bit = irq_assign_table1[irq - EXT_IRQ0].bit_no; \ + } else { \ + port = irq_assign_table0[irq - EXT_IRQ0].port_no; \ + bit = irq_assign_table0[irq - EXT_IRQ0].bit_no; \ + } \ +} while(0) + +int h8300_enable_irq_pin(unsigned int irq) +{ + if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) { + unsigned short ptn = 1 << (irq - EXT_IRQ0); + unsigned int port_no,bit_no; + IRQ_GPIO_MAP(ptn, irq, port_no, bit_no); + if (H8300_GPIO_RESERVE(port_no, bit_no) == 0) + return -EBUSY; /* pin already use */ + H8300_GPIO_DDR(port_no, bit_no, H8300_GPIO_INPUT); + *(volatile unsigned short *)ISR &= ~ptn; /* ISR clear */ + } + + return 0; +} + +void h8300_disable_irq_pin(unsigned int irq) +{ + if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) { + /* disable interrupt & release IRQ pin */ + unsigned short ptn = 1 << (irq - EXT_IRQ0); + unsigned short port_no,bit_no; + *(volatile unsigned short *)ISR &= ~ptn; + *(volatile unsigned short *)IER &= ~ptn; + IRQ_GPIO_MAP(ptn, irq, port_no, bit_no); + H8300_GPIO_FREE(port_no, bit_no); + } +} diff --git a/arch/h8300/platform/h8s/ptrace_h8s.c b/arch/h8300/platform/h8s/ptrace_h8s.c new file mode 100644 index 00000000..c058ab1a --- /dev/null +++ b/arch/h8300/platform/h8s/ptrace_h8s.c @@ -0,0 +1,84 @@ +/* + * linux/arch/h8300/platform/h8s/ptrace_h8s.c + * ptrace cpu depend helper functions + * + * Yoshinori Sato <ysato@users.sourceforge.jp> + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of + * this archive for more details. + */ + +#include <linux/linkage.h> +#include <linux/sched.h> +#include <linux/errno.h> +#include <asm/ptrace.h> + +#define CCR_MASK 0x6f +#define EXR_TRACE 0x80 + +/* Mapping from PT_xxx to the stack offset at which the register is + saved. Notice that usp has no stack-slot and needs to be treated + specially (see get_reg/put_reg below). */ +static const int h8300_register_offset[] = { + PT_REG(er1), PT_REG(er2), PT_REG(er3), PT_REG(er4), + PT_REG(er5), PT_REG(er6), PT_REG(er0), PT_REG(orig_er0), + PT_REG(ccr), PT_REG(pc), 0, PT_REG(exr) +}; + +/* read register */ +long h8300_get_reg(struct task_struct *task, int regno) +{ + switch (regno) { + case PT_USP: + return task->thread.usp + sizeof(long)*2 + 2; + case PT_CCR: + case PT_EXR: + return *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]); + default: + return *(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]); + } +} + +/* write register */ +int h8300_put_reg(struct task_struct *task, int regno, unsigned long data) +{ + unsigned short oldccr; + switch (regno) { + case PT_USP: + task->thread.usp = data - sizeof(long)*2 - 2; + case PT_CCR: + oldccr = *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]); + oldccr &= ~CCR_MASK; + data &= CCR_MASK; + data |= oldccr; + *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]) = data; + break; + case PT_EXR: + /* exr modify not support */ + return -EIO; + default: + *(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]) = data; + break; + } + return 0; +} + +/* disable singlestep */ +void user_disable_single_step(struct task_struct *child) +{ + *(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) &= ~EXR_TRACE; +} + +/* enable singlestep */ +void user_enable_single_step(struct task_struct *child) +{ + *(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) |= EXR_TRACE; +} + +asmlinkage void trace_trap(unsigned long bp) +{ + (void)bp; + force_sig(SIGTRAP,current); +} + |