diff options
Diffstat (limited to 'ANDROID_3.4.5/drivers/net/can/mscan')
| -rw-r--r-- | ANDROID_3.4.5/drivers/net/can/mscan/Kconfig | 24 | ||||
| -rw-r--r-- | ANDROID_3.4.5/drivers/net/can/mscan/Makefile | 5 | ||||
| -rw-r--r-- | ANDROID_3.4.5/drivers/net/can/mscan/mpc5xxx_can.c | 418 | ||||
| -rw-r--r-- | ANDROID_3.4.5/drivers/net/can/mscan/mscan.c | 722 | ||||
| -rw-r--r-- | ANDROID_3.4.5/drivers/net/can/mscan/mscan.h | 302 |
5 files changed, 0 insertions, 1471 deletions
diff --git a/ANDROID_3.4.5/drivers/net/can/mscan/Kconfig b/ANDROID_3.4.5/drivers/net/can/mscan/Kconfig deleted file mode 100644 index d3870695..00000000 --- a/ANDROID_3.4.5/drivers/net/can/mscan/Kconfig +++ /dev/null @@ -1,24 +0,0 @@ -config CAN_MSCAN - depends on CAN_DEV && (PPC || M68K) - tristate "Support for Freescale MSCAN based chips" - ---help--- - The Motorola Scalable Controller Area Network (MSCAN) definition - is based on the MSCAN12 definition which is the specific - implementation of the Motorola Scalable CAN concept targeted for - the Motorola MC68HC12 Microcontroller Family. - -if CAN_MSCAN - -config CAN_MPC5XXX - tristate "Freescale MPC5xxx onboard CAN controller" - depends on (PPC_MPC52xx || PPC_MPC512x) - ---help--- - If you say yes here you get support for Freescale's MPC5xxx - onboard CAN controller. Currently, the MPC5200, MPC5200B and - MPC5121 (Rev. 2 and later) are supported. - - This driver can also be built as a module. If so, the module - will be called mscan-mpc5xxx.ko. - -endif - diff --git a/ANDROID_3.4.5/drivers/net/can/mscan/Makefile b/ANDROID_3.4.5/drivers/net/can/mscan/Makefile deleted file mode 100644 index c9fab17c..00000000 --- a/ANDROID_3.4.5/drivers/net/can/mscan/Makefile +++ /dev/null @@ -1,5 +0,0 @@ - -obj-$(CONFIG_CAN_MPC5XXX) += mscan-mpc5xxx.o -mscan-mpc5xxx-objs := mscan.o mpc5xxx_can.o - -ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG diff --git a/ANDROID_3.4.5/drivers/net/can/mscan/mpc5xxx_can.c b/ANDROID_3.4.5/drivers/net/can/mscan/mpc5xxx_can.c deleted file mode 100644 index 5caa572d..00000000 --- a/ANDROID_3.4.5/drivers/net/can/mscan/mpc5xxx_can.c +++ /dev/null @@ -1,418 +0,0 @@ -/* - * CAN bus driver for the Freescale MPC5xxx embedded CPU. - * - * Copyright (C) 2004-2005 Andrey Volkov <avolkov@varma-el.com>, - * Varma Electronics Oy - * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com> - * Copyright (C) 2009 Wolfram Sang, Pengutronix <w.sang@pengutronix.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the version 2 of the GNU General Public License - * as published by the Free Software Foundation - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/netdevice.h> -#include <linux/can/dev.h> -#include <linux/of_platform.h> -#include <sysdev/fsl_soc.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <asm/mpc52xx.h> - -#include "mscan.h" - -#define DRV_NAME "mpc5xxx_can" - -struct mpc5xxx_can_data { - unsigned int type; - u32 (*get_clock)(struct platform_device *ofdev, const char *clock_name, - int *mscan_clksrc); -}; - -#ifdef CONFIG_PPC_MPC52xx -static struct of_device_id __devinitdata mpc52xx_cdm_ids[] = { - { .compatible = "fsl,mpc5200-cdm", }, - {} -}; - -static u32 __devinit mpc52xx_can_get_clock(struct platform_device *ofdev, - const char *clock_name, - int *mscan_clksrc) -{ - unsigned int pvr; - struct mpc52xx_cdm __iomem *cdm; - struct device_node *np_cdm; - unsigned int freq; - u32 val; - - pvr = mfspr(SPRN_PVR); - - /* - * Either the oscillator clock (SYS_XTAL_IN) or the IP bus clock - * (IP_CLK) can be selected as MSCAN clock source. According to - * the MPC5200 user's manual, the oscillator clock is the better - * choice as it has less jitter. For this reason, it is selected - * by default. Unfortunately, it can not be selected for the old - * MPC5200 Rev. A chips due to a hardware bug (check errata). - */ - if (clock_name && strcmp(clock_name, "ip") == 0) - *mscan_clksrc = MSCAN_CLKSRC_BUS; - else - *mscan_clksrc = MSCAN_CLKSRC_XTAL; - - freq = mpc5xxx_get_bus_frequency(ofdev->dev.of_node); - if (!freq) - return 0; - - if (*mscan_clksrc == MSCAN_CLKSRC_BUS || pvr == 0x80822011) - return freq; - - /* Determine SYS_XTAL_IN frequency from the clock domain settings */ - np_cdm = of_find_matching_node(NULL, mpc52xx_cdm_ids); - if (!np_cdm) { - dev_err(&ofdev->dev, "can't get clock node!\n"); - return 0; - } - cdm = of_iomap(np_cdm, 0); - - if (in_8(&cdm->ipb_clk_sel) & 0x1) - freq *= 2; - val = in_be32(&cdm->rstcfg); - - freq *= (val & (1 << 5)) ? 8 : 4; - freq /= (val & (1 << 6)) ? 12 : 16; - - of_node_put(np_cdm); - iounmap(cdm); - - return freq; -} -#else /* !CONFIG_PPC_MPC52xx */ -static u32 __devinit mpc52xx_can_get_clock(struct platform_device *ofdev, - const char *clock_name, - int *mscan_clksrc) -{ - return 0; -} -#endif /* CONFIG_PPC_MPC52xx */ - -#ifdef CONFIG_PPC_MPC512x -struct mpc512x_clockctl { - u32 spmr; /* System PLL Mode Reg */ - u32 sccr[2]; /* System Clk Ctrl Reg 1 & 2 */ - u32 scfr1; /* System Clk Freq Reg 1 */ - u32 scfr2; /* System Clk Freq Reg 2 */ - u32 reserved; - u32 bcr; /* Bread Crumb Reg */ - u32 pccr[12]; /* PSC Clk Ctrl Reg 0-11 */ - u32 spccr; /* SPDIF Clk Ctrl Reg */ - u32 cccr; /* CFM Clk Ctrl Reg */ - u32 dccr; /* DIU Clk Cnfg Reg */ - u32 mccr[4]; /* MSCAN Clk Ctrl Reg 1-3 */ -}; - -static struct of_device_id __devinitdata mpc512x_clock_ids[] = { - { .compatible = "fsl,mpc5121-clock", }, - {} -}; - -static u32 __devinit mpc512x_can_get_clock(struct platform_device *ofdev, - const char *clock_name, - int *mscan_clksrc) -{ - struct mpc512x_clockctl __iomem *clockctl; - struct device_node *np_clock; - struct clk *sys_clk, *ref_clk; - int plen, clockidx, clocksrc = -1; - u32 sys_freq, val, clockdiv = 1, freq = 0; - const u32 *pval; - - np_clock = of_find_matching_node(NULL, mpc512x_clock_ids); - if (!np_clock) { - dev_err(&ofdev->dev, "couldn't find clock node\n"); - return 0; - } - clockctl = of_iomap(np_clock, 0); - if (!clockctl) { - dev_err(&ofdev->dev, "couldn't map clock registers\n"); - goto exit_put; - } - - /* Determine the MSCAN device index from the physical address */ - pval = of_get_property(ofdev->dev.of_node, "reg", &plen); - BUG_ON(!pval || plen < sizeof(*pval)); - clockidx = (*pval & 0x80) ? 1 : 0; - if (*pval & 0x2000) - clockidx += 2; - - /* - * Clock source and divider selection: 3 different clock sources - * can be selected: "ip", "ref" or "sys". For the latter two, a - * clock divider can be defined as well. If the clock source is - * not specified by the device tree, we first try to find an - * optimal CAN source clock based on the system clock. If that - * is not posslible, the reference clock will be used. - */ - if (clock_name && !strcmp(clock_name, "ip")) { - *mscan_clksrc = MSCAN_CLKSRC_IPS; - freq = mpc5xxx_get_bus_frequency(ofdev->dev.of_node); - } else { - *mscan_clksrc = MSCAN_CLKSRC_BUS; - - pval = of_get_property(ofdev->dev.of_node, - "fsl,mscan-clock-divider", &plen); - if (pval && plen == sizeof(*pval)) - clockdiv = *pval; - if (!clockdiv) - clockdiv = 1; - - if (!clock_name || !strcmp(clock_name, "sys")) { - sys_clk = clk_get(&ofdev->dev, "sys_clk"); - if (!sys_clk) { - dev_err(&ofdev->dev, "couldn't get sys_clk\n"); - goto exit_unmap; - } - /* Get and round up/down sys clock rate */ - sys_freq = 1000000 * - ((clk_get_rate(sys_clk) + 499999) / 1000000); - - if (!clock_name) { - /* A multiple of 16 MHz would be optimal */ - if ((sys_freq % 16000000) == 0) { - clocksrc = 0; - clockdiv = sys_freq / 16000000; - freq = sys_freq / clockdiv; - } - } else { - clocksrc = 0; - freq = sys_freq / clockdiv; - } - } - - if (clocksrc < 0) { - ref_clk = clk_get(&ofdev->dev, "ref_clk"); - if (!ref_clk) { - dev_err(&ofdev->dev, "couldn't get ref_clk\n"); - goto exit_unmap; - } - clocksrc = 1; - freq = clk_get_rate(ref_clk) / clockdiv; - } - } - - /* Disable clock */ - out_be32(&clockctl->mccr[clockidx], 0x0); - if (clocksrc >= 0) { - /* Set source and divider */ - val = (clocksrc << 14) | ((clockdiv - 1) << 17); - out_be32(&clockctl->mccr[clockidx], val); - /* Enable clock */ - out_be32(&clockctl->mccr[clockidx], val | 0x10000); - } - - /* Enable MSCAN clock domain */ - val = in_be32(&clockctl->sccr[1]); - if (!(val & (1 << 25))) - out_be32(&clockctl->sccr[1], val | (1 << 25)); - - dev_dbg(&ofdev->dev, "using '%s' with frequency divider %d\n", - *mscan_clksrc == MSCAN_CLKSRC_IPS ? "ips_clk" : - clocksrc == 1 ? "ref_clk" : "sys_clk", clockdiv); - -exit_unmap: - iounmap(clockctl); -exit_put: - of_node_put(np_clock); - return freq; -} -#else /* !CONFIG_PPC_MPC512x */ -static u32 __devinit mpc512x_can_get_clock(struct platform_device *ofdev, - const char *clock_name, - int *mscan_clksrc) -{ - return 0; -} -#endif /* CONFIG_PPC_MPC512x */ - -static struct of_device_id mpc5xxx_can_table[]; -static int __devinit mpc5xxx_can_probe(struct platform_device *ofdev) -{ - const struct of_device_id *match; - struct mpc5xxx_can_data *data; - struct device_node *np = ofdev->dev.of_node; - struct net_device *dev; - struct mscan_priv *priv; - void __iomem *base; - const char *clock_name = NULL; - int irq, mscan_clksrc = 0; - int err = -ENOMEM; - - match = of_match_device(mpc5xxx_can_table, &ofdev->dev); - if (!match) - return -EINVAL; - data = match->data; - - base = of_iomap(np, 0); - if (!base) { - dev_err(&ofdev->dev, "couldn't ioremap\n"); - return err; - } - - irq = irq_of_parse_and_map(np, 0); - if (!irq) { - dev_err(&ofdev->dev, "no irq found\n"); - err = -ENODEV; - goto exit_unmap_mem; - } - - dev = alloc_mscandev(); - if (!dev) - goto exit_dispose_irq; - - priv = netdev_priv(dev); - priv->reg_base = base; - dev->irq = irq; - - clock_name = of_get_property(np, "fsl,mscan-clock-source", NULL); - - BUG_ON(!data); - priv->type = data->type; - priv->can.clock.freq = data->get_clock(ofdev, clock_name, - &mscan_clksrc); - if (!priv->can.clock.freq) { - dev_err(&ofdev->dev, "couldn't get MSCAN clock properties\n"); - goto exit_free_mscan; - } - - SET_NETDEV_DEV(dev, &ofdev->dev); - - err = register_mscandev(dev, mscan_clksrc); - if (err) { - dev_err(&ofdev->dev, "registering %s failed (err=%d)\n", - DRV_NAME, err); - goto exit_free_mscan; - } - - dev_set_drvdata(&ofdev->dev, dev); - - dev_info(&ofdev->dev, "MSCAN at 0x%p, irq %d, clock %d Hz\n", - priv->reg_base, dev->irq, priv->can.clock.freq); - - return 0; - -exit_free_mscan: - free_candev(dev); -exit_dispose_irq: - irq_dispose_mapping(irq); -exit_unmap_mem: - iounmap(base); - - return err; -} - -static int __devexit mpc5xxx_can_remove(struct platform_device *ofdev) -{ - struct net_device *dev = dev_get_drvdata(&ofdev->dev); - struct mscan_priv *priv = netdev_priv(dev); - - dev_set_drvdata(&ofdev->dev, NULL); - - unregister_mscandev(dev); - iounmap(priv->reg_base); - irq_dispose_mapping(dev->irq); - free_candev(dev); - - return 0; -} - -#ifdef CONFIG_PM -static struct mscan_regs saved_regs; -static int mpc5xxx_can_suspend(struct platform_device *ofdev, pm_message_t state) -{ - struct net_device *dev = dev_get_drvdata(&ofdev->dev); - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; - - _memcpy_fromio(&saved_regs, regs, sizeof(*regs)); - - return 0; -} - -static int mpc5xxx_can_resume(struct platform_device *ofdev) -{ - struct net_device *dev = dev_get_drvdata(&ofdev->dev); - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; - - regs->canctl0 |= MSCAN_INITRQ; - while (!(regs->canctl1 & MSCAN_INITAK)) - udelay(10); - - regs->canctl1 = saved_regs.canctl1; - regs->canbtr0 = saved_regs.canbtr0; - regs->canbtr1 = saved_regs.canbtr1; - regs->canidac = saved_regs.canidac; - - /* restore masks, buffers etc. */ - _memcpy_toio(®s->canidar1_0, (void *)&saved_regs.canidar1_0, - sizeof(*regs) - offsetof(struct mscan_regs, canidar1_0)); - - regs->canctl0 &= ~MSCAN_INITRQ; - regs->cantbsel = saved_regs.cantbsel; - regs->canrier = saved_regs.canrier; - regs->cantier = saved_regs.cantier; - regs->canctl0 = saved_regs.canctl0; - - return 0; -} -#endif - -static struct mpc5xxx_can_data __devinitdata mpc5200_can_data = { - .type = MSCAN_TYPE_MPC5200, - .get_clock = mpc52xx_can_get_clock, -}; - -static struct mpc5xxx_can_data __devinitdata mpc5121_can_data = { - .type = MSCAN_TYPE_MPC5121, - .get_clock = mpc512x_can_get_clock, -}; - -static struct of_device_id __devinitdata mpc5xxx_can_table[] = { - { .compatible = "fsl,mpc5200-mscan", .data = &mpc5200_can_data, }, - /* Note that only MPC5121 Rev. 2 (and later) is supported */ - { .compatible = "fsl,mpc5121-mscan", .data = &mpc5121_can_data, }, - {}, -}; - -static struct platform_driver mpc5xxx_can_driver = { - .driver = { - .name = "mpc5xxx_can", - .owner = THIS_MODULE, - .of_match_table = mpc5xxx_can_table, - }, - .probe = mpc5xxx_can_probe, - .remove = __devexit_p(mpc5xxx_can_remove), -#ifdef CONFIG_PM - .suspend = mpc5xxx_can_suspend, - .resume = mpc5xxx_can_resume, -#endif -}; - -module_platform_driver(mpc5xxx_can_driver); - -MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>"); -MODULE_DESCRIPTION("Freescale MPC5xxx CAN driver"); -MODULE_LICENSE("GPL v2"); diff --git a/ANDROID_3.4.5/drivers/net/can/mscan/mscan.c b/ANDROID_3.4.5/drivers/net/can/mscan/mscan.c deleted file mode 100644 index 41a2a2dd..00000000 --- a/ANDROID_3.4.5/drivers/net/can/mscan/mscan.c +++ /dev/null @@ -1,722 +0,0 @@ -/* - * CAN bus driver for the alone generic (as possible as) MSCAN controller. - * - * Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>, - * Varma Electronics Oy - * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com> - * Copyright (C) 2008-2009 Pengutronix <kernel@pengutronix.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the version 2 of the GNU General Public License - * as published by the Free Software Foundation - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/delay.h> -#include <linux/netdevice.h> -#include <linux/if_arp.h> -#include <linux/if_ether.h> -#include <linux/list.h> -#include <linux/can/dev.h> -#include <linux/can/error.h> -#include <linux/io.h> - -#include "mscan.h" - -static struct can_bittiming_const mscan_bittiming_const = { - .name = "mscan", - .tseg1_min = 4, - .tseg1_max = 16, - .tseg2_min = 2, - .tseg2_max = 8, - .sjw_max = 4, - .brp_min = 1, - .brp_max = 64, - .brp_inc = 1, -}; - -struct mscan_state { - u8 mode; - u8 canrier; - u8 cantier; -}; - -static enum can_state state_map[] = { - CAN_STATE_ERROR_ACTIVE, - CAN_STATE_ERROR_WARNING, - CAN_STATE_ERROR_PASSIVE, - CAN_STATE_BUS_OFF -}; - -static int mscan_set_mode(struct net_device *dev, u8 mode) -{ - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs __iomem *regs = priv->reg_base; - int ret = 0; - int i; - u8 canctl1; - - if (mode != MSCAN_NORMAL_MODE) { - if (priv->tx_active) { - /* Abort transfers before going to sleep */# - out_8(®s->cantarq, priv->tx_active); - /* Suppress TX done interrupts */ - out_8(®s->cantier, 0); - } - - canctl1 = in_8(®s->canctl1); - if ((mode & MSCAN_SLPRQ) && !(canctl1 & MSCAN_SLPAK)) { - setbits8(®s->canctl0, MSCAN_SLPRQ); - for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) { - if (in_8(®s->canctl1) & MSCAN_SLPAK) - break; - udelay(100); - } - /* - * The mscan controller will fail to enter sleep mode, - * while there are irregular activities on bus, like - * somebody keeps retransmitting. This behavior is - * undocumented and seems to differ between mscan built - * in mpc5200b and mpc5200. We proceed in that case, - * since otherwise the slprq will be kept set and the - * controller will get stuck. NOTE: INITRQ or CSWAI - * will abort all active transmit actions, if still - * any, at once. - */ - if (i >= MSCAN_SET_MODE_RETRIES) - netdev_dbg(dev, - "device failed to enter sleep mode. " - "We proceed anyhow.\n"); - else - priv->can.state = CAN_STATE_SLEEPING; - } - - if ((mode & MSCAN_INITRQ) && !(canctl1 & MSCAN_INITAK)) { - setbits8(®s->canctl0, MSCAN_INITRQ); - for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) { - if (in_8(®s->canctl1) & MSCAN_INITAK) - break; - } - if (i >= MSCAN_SET_MODE_RETRIES) - ret = -ENODEV; - } - if (!ret) - priv->can.state = CAN_STATE_STOPPED; - - if (mode & MSCAN_CSWAI) - setbits8(®s->canctl0, MSCAN_CSWAI); - - } else { - canctl1 = in_8(®s->canctl1); - if (canctl1 & (MSCAN_SLPAK | MSCAN_INITAK)) { - clrbits8(®s->canctl0, MSCAN_SLPRQ | MSCAN_INITRQ); - for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) { - canctl1 = in_8(®s->canctl1); - if (!(canctl1 & (MSCAN_INITAK | MSCAN_SLPAK))) - break; - } - if (i >= MSCAN_SET_MODE_RETRIES) - ret = -ENODEV; - else - priv->can.state = CAN_STATE_ERROR_ACTIVE; - } - } - return ret; -} - -static int mscan_start(struct net_device *dev) -{ - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs __iomem *regs = priv->reg_base; - u8 canrflg; - int err; - - out_8(®s->canrier, 0); - - INIT_LIST_HEAD(&priv->tx_head); - priv->prev_buf_id = 0; - priv->cur_pri = 0; - priv->tx_active = 0; - priv->shadow_canrier = 0; - priv->flags = 0; - - if (priv->type == MSCAN_TYPE_MPC5121) { - /* Clear pending bus-off condition */ - if (in_8(®s->canmisc) & MSCAN_BOHOLD) - out_8(®s->canmisc, MSCAN_BOHOLD); - } - - err = mscan_set_mode(dev, MSCAN_NORMAL_MODE); - if (err) - return err; - - canrflg = in_8(®s->canrflg); - priv->shadow_statflg = canrflg & MSCAN_STAT_MSK; - priv->can.state = state_map[max(MSCAN_STATE_RX(canrflg), - MSCAN_STATE_TX(canrflg))]; - out_8(®s->cantier, 0); - - /* Enable receive interrupts. */ - out_8(®s->canrier, MSCAN_RX_INTS_ENABLE); - - return 0; -} - -static int mscan_restart(struct net_device *dev) -{ - struct mscan_priv *priv = netdev_priv(dev); - - if (priv->type == MSCAN_TYPE_MPC5121) { - struct mscan_regs __iomem *regs = priv->reg_base; - - priv->can.state = CAN_STATE_ERROR_ACTIVE; - WARN(!(in_8(®s->canmisc) & MSCAN_BOHOLD), - "bus-off state expected\n"); - out_8(®s->canmisc, MSCAN_BOHOLD); - /* Re-enable receive interrupts. */ - out_8(®s->canrier, MSCAN_RX_INTS_ENABLE); - } else { - if (priv->can.state <= CAN_STATE_BUS_OFF) - mscan_set_mode(dev, MSCAN_INIT_MODE); - return mscan_start(dev); - } - - return 0; -} - -static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev) -{ - struct can_frame *frame = (struct can_frame *)skb->data; - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs __iomem *regs = priv->reg_base; - int i, rtr, buf_id; - u32 can_id; - - if (can_dropped_invalid_skb(dev, skb)) - return NETDEV_TX_OK; - - out_8(®s->cantier, 0); - - i = ~priv->tx_active & MSCAN_TXE; - buf_id = ffs(i) - 1; - switch (hweight8(i)) { - case 0: - netif_stop_queue(dev); - netdev_err(dev, "Tx Ring full when queue awake!\n"); - return NETDEV_TX_BUSY; - case 1: - /* - * if buf_id < 3, then current frame will be send out of order, - * since buffer with lower id have higher priority (hell..) - */ - netif_stop_queue(dev); - case 2: - if (buf_id < priv->prev_buf_id) { - priv->cur_pri++; - if (priv->cur_pri == 0xff) { - set_bit(F_TX_WAIT_ALL, &priv->flags); - netif_stop_queue(dev); - } - } - set_bit(F_TX_PROGRESS, &priv->flags); - break; - } - priv->prev_buf_id = buf_id; - out_8(®s->cantbsel, i); - - rtr = frame->can_id & CAN_RTR_FLAG; - - /* RTR is always the lowest bit of interest, then IDs follow */ - if (frame->can_id & CAN_EFF_FLAG) { - can_id = (frame->can_id & CAN_EFF_MASK) - << (MSCAN_EFF_RTR_SHIFT + 1); - if (rtr) - can_id |= 1 << MSCAN_EFF_RTR_SHIFT; - out_be16(®s->tx.idr3_2, can_id); - - can_id >>= 16; - /* EFF_FLAGS are between the IDs :( */ - can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0) - | MSCAN_EFF_FLAGS; - } else { - can_id = (frame->can_id & CAN_SFF_MASK) - << (MSCAN_SFF_RTR_SHIFT + 1); - if (rtr) - can_id |= 1 << MSCAN_SFF_RTR_SHIFT; - } - out_be16(®s->tx.idr1_0, can_id); - - if (!rtr) { - void __iomem *data = ®s->tx.dsr1_0; - u16 *payload = (u16 *)frame->data; - - for (i = 0; i < frame->can_dlc / 2; i++) { - out_be16(data, *payload++); - data += 2 + _MSCAN_RESERVED_DSR_SIZE; - } - /* write remaining byte if necessary */ - if (frame->can_dlc & 1) - out_8(data, frame->data[frame->can_dlc - 1]); - } - - out_8(®s->tx.dlr, frame->can_dlc); - out_8(®s->tx.tbpr, priv->cur_pri); - - /* Start transmission. */ - out_8(®s->cantflg, 1 << buf_id); - - if (!test_bit(F_TX_PROGRESS, &priv->flags)) - dev->trans_start = jiffies; - - list_add_tail(&priv->tx_queue[buf_id].list, &priv->tx_head); - - can_put_echo_skb(skb, dev, buf_id); - - /* Enable interrupt. */ - priv->tx_active |= 1 << buf_id; - out_8(®s->cantier, priv->tx_active); - - return NETDEV_TX_OK; -} - -/* This function returns the old state to see where we came from */ -static enum can_state check_set_state(struct net_device *dev, u8 canrflg) -{ - struct mscan_priv *priv = netdev_priv(dev); - enum can_state state, old_state = priv->can.state; - - if (canrflg & MSCAN_CSCIF && old_state <= CAN_STATE_BUS_OFF) { - state = state_map[max(MSCAN_STATE_RX(canrflg), - MSCAN_STATE_TX(canrflg))]; - priv->can.state = state; - } - return old_state; -} - -static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame) -{ - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs __iomem *regs = priv->reg_base; - u32 can_id; - int i; - - can_id = in_be16(®s->rx.idr1_0); - if (can_id & (1 << 3)) { - frame->can_id = CAN_EFF_FLAG; - can_id = ((can_id << 16) | in_be16(®s->rx.idr3_2)); - can_id = ((can_id & 0xffe00000) | - ((can_id & 0x7ffff) << 2)) >> 2; - } else { - can_id >>= 4; - frame->can_id = 0; - } - - frame->can_id |= can_id >> 1; - if (can_id & 1) - frame->can_id |= CAN_RTR_FLAG; - - frame->can_dlc = get_can_dlc(in_8(®s->rx.dlr) & 0xf); - - if (!(frame->can_id & CAN_RTR_FLAG)) { - void __iomem *data = ®s->rx.dsr1_0; - u16 *payload = (u16 *)frame->data; - - for (i = 0; i < frame->can_dlc / 2; i++) { - *payload++ = in_be16(data); - data += 2 + _MSCAN_RESERVED_DSR_SIZE; - } - /* read remaining byte if necessary */ - if (frame->can_dlc & 1) - frame->data[frame->can_dlc - 1] = in_8(data); - } - - out_8(®s->canrflg, MSCAN_RXF); -} - -static void mscan_get_err_frame(struct net_device *dev, struct can_frame *frame, - u8 canrflg) -{ - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs __iomem *regs = priv->reg_base; - struct net_device_stats *stats = &dev->stats; - enum can_state old_state; - - netdev_dbg(dev, "error interrupt (canrflg=%#x)\n", canrflg); - frame->can_id = CAN_ERR_FLAG; - - if (canrflg & MSCAN_OVRIF) { - frame->can_id |= CAN_ERR_CRTL; - frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; - stats->rx_over_errors++; - stats->rx_errors++; - } else { - frame->data[1] = 0; - } - - old_state = check_set_state(dev, canrflg); - /* State changed */ - if (old_state != priv->can.state) { - switch (priv->can.state) { - case CAN_STATE_ERROR_WARNING: - frame->can_id |= CAN_ERR_CRTL; - priv->can.can_stats.error_warning++; - if ((priv->shadow_statflg & MSCAN_RSTAT_MSK) < - (canrflg & MSCAN_RSTAT_MSK)) - frame->data[1] |= CAN_ERR_CRTL_RX_WARNING; - if ((priv->shadow_statflg & MSCAN_TSTAT_MSK) < - (canrflg & MSCAN_TSTAT_MSK)) - frame->data[1] |= CAN_ERR_CRTL_TX_WARNING; - break; - case CAN_STATE_ERROR_PASSIVE: - frame->can_id |= CAN_ERR_CRTL; - priv->can.can_stats.error_passive++; - frame->data[1] |= CAN_ERR_CRTL_RX_PASSIVE; - break; - case CAN_STATE_BUS_OFF: - frame->can_id |= CAN_ERR_BUSOFF; - /* - * The MSCAN on the MPC5200 does recover from bus-off - * automatically. To avoid that we stop the chip doing - * a light-weight stop (we are in irq-context). - */ - if (priv->type != MSCAN_TYPE_MPC5121) { - out_8(®s->cantier, 0); - out_8(®s->canrier, 0); - setbits8(®s->canctl0, - MSCAN_SLPRQ | MSCAN_INITRQ); - } - can_bus_off(dev); - break; - default: - break; - } - } - priv->shadow_statflg = canrflg & MSCAN_STAT_MSK; - frame->can_dlc = CAN_ERR_DLC; - out_8(®s->canrflg, MSCAN_ERR_IF); -} - -static int mscan_rx_poll(struct napi_struct *napi, int quota) -{ - struct mscan_priv *priv = container_of(napi, struct mscan_priv, napi); - struct net_device *dev = napi->dev; - struct mscan_regs __iomem *regs = priv->reg_base; - struct net_device_stats *stats = &dev->stats; - int npackets = 0; - int ret = 1; - struct sk_buff *skb; - struct can_frame *frame; - u8 canrflg; - - while (npackets < quota) { - canrflg = in_8(®s->canrflg); - if (!(canrflg & (MSCAN_RXF | MSCAN_ERR_IF))) - break; - - skb = alloc_can_skb(dev, &frame); - if (!skb) { - if (printk_ratelimit()) - netdev_notice(dev, "packet dropped\n"); - stats->rx_dropped++; - out_8(®s->canrflg, canrflg); - continue; - } - - if (canrflg & MSCAN_RXF) - mscan_get_rx_frame(dev, frame); - else if (canrflg & MSCAN_ERR_IF) - mscan_get_err_frame(dev, frame, canrflg); - - stats->rx_packets++; - stats->rx_bytes += frame->can_dlc; - npackets++; - netif_receive_skb(skb); - } - - if (!(in_8(®s->canrflg) & (MSCAN_RXF | MSCAN_ERR_IF))) { - napi_complete(&priv->napi); - clear_bit(F_RX_PROGRESS, &priv->flags); - if (priv->can.state < CAN_STATE_BUS_OFF) - out_8(®s->canrier, priv->shadow_canrier); - ret = 0; - } - return ret; -} - -static irqreturn_t mscan_isr(int irq, void *dev_id) -{ - struct net_device *dev = (struct net_device *)dev_id; - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs __iomem *regs = priv->reg_base; - struct net_device_stats *stats = &dev->stats; - u8 cantier, cantflg, canrflg; - irqreturn_t ret = IRQ_NONE; - - cantier = in_8(®s->cantier) & MSCAN_TXE; - cantflg = in_8(®s->cantflg) & cantier; - - if (cantier && cantflg) { - struct list_head *tmp, *pos; - - list_for_each_safe(pos, tmp, &priv->tx_head) { - struct tx_queue_entry *entry = - list_entry(pos, struct tx_queue_entry, list); - u8 mask = entry->mask; - - if (!(cantflg & mask)) - continue; - - out_8(®s->cantbsel, mask); - stats->tx_bytes += in_8(®s->tx.dlr); - stats->tx_packets++; - can_get_echo_skb(dev, entry->id); - priv->tx_active &= ~mask; - list_del(pos); - } - - if (list_empty(&priv->tx_head)) { - clear_bit(F_TX_WAIT_ALL, &priv->flags); - clear_bit(F_TX_PROGRESS, &priv->flags); - priv->cur_pri = 0; - } else { - dev->trans_start = jiffies; - } - - if (!test_bit(F_TX_WAIT_ALL, &priv->flags)) - netif_wake_queue(dev); - - out_8(®s->cantier, priv->tx_active); - ret = IRQ_HANDLED; - } - - canrflg = in_8(®s->canrflg); - if ((canrflg & ~MSCAN_STAT_MSK) && - !test_and_set_bit(F_RX_PROGRESS, &priv->flags)) { - if (canrflg & ~MSCAN_STAT_MSK) { - priv->shadow_canrier = in_8(®s->canrier); - out_8(®s->canrier, 0); - napi_schedule(&priv->napi); - ret = IRQ_HANDLED; - } else { - clear_bit(F_RX_PROGRESS, &priv->flags); - } - } - return ret; -} - -static int mscan_do_set_mode(struct net_device *dev, enum can_mode mode) -{ - struct mscan_priv *priv = netdev_priv(dev); - int ret = 0; - - if (!priv->open_time) - return -EINVAL; - - switch (mode) { - case CAN_MODE_START: - ret = mscan_restart(dev); - if (ret) - break; - if (netif_queue_stopped(dev)) - netif_wake_queue(dev); - break; - - default: - ret = -EOPNOTSUPP; - break; - } - return ret; -} - -static int mscan_do_set_bittiming(struct net_device *dev) -{ - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs __iomem *regs = priv->reg_base; - struct can_bittiming *bt = &priv->can.bittiming; - u8 btr0, btr1; - - btr0 = BTR0_SET_BRP(bt->brp) | BTR0_SET_SJW(bt->sjw); - btr1 = (BTR1_SET_TSEG1(bt->prop_seg + bt->phase_seg1) | - BTR1_SET_TSEG2(bt->phase_seg2) | - BTR1_SET_SAM(priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)); - - netdev_info(dev, "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1); - - out_8(®s->canbtr0, btr0); - out_8(®s->canbtr1, btr1); - - return 0; -} - -static int mscan_get_berr_counter(const struct net_device *dev, - struct can_berr_counter *bec) -{ - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs __iomem *regs = priv->reg_base; - - bec->txerr = in_8(®s->cantxerr); - bec->rxerr = in_8(®s->canrxerr); - - return 0; -} - -static int mscan_open(struct net_device *dev) -{ - int ret; - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs __iomem *regs = priv->reg_base; - - /* common open */ - ret = open_candev(dev); - if (ret) - return ret; - - napi_enable(&priv->napi); - - ret = request_irq(dev->irq, mscan_isr, 0, dev->name, dev); - if (ret < 0) { - netdev_err(dev, "failed to attach interrupt\n"); - goto exit_napi_disable; - } - - priv->open_time = jiffies; - - if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) - setbits8(®s->canctl1, MSCAN_LISTEN); - else - clrbits8(®s->canctl1, MSCAN_LISTEN); - - ret = mscan_start(dev); - if (ret) - goto exit_free_irq; - - netif_start_queue(dev); - - return 0; - -exit_free_irq: - priv->open_time = 0; - free_irq(dev->irq, dev); -exit_napi_disable: - napi_disable(&priv->napi); - close_candev(dev); - return ret; -} - -static int mscan_close(struct net_device *dev) -{ - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs __iomem *regs = priv->reg_base; - - netif_stop_queue(dev); - napi_disable(&priv->napi); - - out_8(®s->cantier, 0); - out_8(®s->canrier, 0); - mscan_set_mode(dev, MSCAN_INIT_MODE); - close_candev(dev); - free_irq(dev->irq, dev); - priv->open_time = 0; - - return 0; -} - -static const struct net_device_ops mscan_netdev_ops = { - .ndo_open = mscan_open, - .ndo_stop = mscan_close, - .ndo_start_xmit = mscan_start_xmit, -}; - -int register_mscandev(struct net_device *dev, int mscan_clksrc) -{ - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs __iomem *regs = priv->reg_base; - u8 ctl1; - - ctl1 = in_8(®s->canctl1); - if (mscan_clksrc) - ctl1 |= MSCAN_CLKSRC; - else - ctl1 &= ~MSCAN_CLKSRC; - - if (priv->type == MSCAN_TYPE_MPC5121) { - priv->can.do_get_berr_counter = mscan_get_berr_counter; - ctl1 |= MSCAN_BORM; /* bus-off recovery upon request */ - } - - ctl1 |= MSCAN_CANE; - out_8(®s->canctl1, ctl1); - udelay(100); - - /* acceptance mask/acceptance code (accept everything) */ - out_be16(®s->canidar1_0, 0); - out_be16(®s->canidar3_2, 0); - out_be16(®s->canidar5_4, 0); - out_be16(®s->canidar7_6, 0); - - out_be16(®s->canidmr1_0, 0xffff); - out_be16(®s->canidmr3_2, 0xffff); - out_be16(®s->canidmr5_4, 0xffff); - out_be16(®s->canidmr7_6, 0xffff); - /* Two 32 bit Acceptance Filters */ - out_8(®s->canidac, MSCAN_AF_32BIT); - - mscan_set_mode(dev, MSCAN_INIT_MODE); - - return register_candev(dev); -} - -void unregister_mscandev(struct net_device *dev) -{ - struct mscan_priv *priv = netdev_priv(dev); - struct mscan_regs __iomem *regs = priv->reg_base; - mscan_set_mode(dev, MSCAN_INIT_MODE); - clrbits8(®s->canctl1, MSCAN_CANE); - unregister_candev(dev); -} - -struct net_device *alloc_mscandev(void) -{ - struct net_device *dev; - struct mscan_priv *priv; - int i; - - dev = alloc_candev(sizeof(struct mscan_priv), MSCAN_ECHO_SKB_MAX); - if (!dev) - return NULL; - priv = netdev_priv(dev); - - dev->netdev_ops = &mscan_netdev_ops; - - dev->flags |= IFF_ECHO; /* we support local echo */ - - netif_napi_add(dev, &priv->napi, mscan_rx_poll, 8); - - priv->can.bittiming_const = &mscan_bittiming_const; - priv->can.do_set_bittiming = mscan_do_set_bittiming; - priv->can.do_set_mode = mscan_do_set_mode; - priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES | - CAN_CTRLMODE_LISTENONLY; - - for (i = 0; i < TX_QUEUE_SIZE; i++) { - priv->tx_queue[i].id = i; - priv->tx_queue[i].mask = 1 << i; - } - - return dev; -} - -MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>"); -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("CAN port driver for a MSCAN based chips"); diff --git a/ANDROID_3.4.5/drivers/net/can/mscan/mscan.h b/ANDROID_3.4.5/drivers/net/can/mscan/mscan.h deleted file mode 100644 index b43e9f5d..00000000 --- a/ANDROID_3.4.5/drivers/net/can/mscan/mscan.h +++ /dev/null @@ -1,302 +0,0 @@ -/* - * Definitions of consts/structs to drive the Freescale MSCAN. - * - * Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>, - * Varma Electronics Oy - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the version 2 of the GNU General Public License - * as published by the Free Software Foundation - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __MSCAN_H__ -#define __MSCAN_H__ - -#include <linux/types.h> - -/* MSCAN control register 0 (CANCTL0) bits */ -#define MSCAN_RXFRM 0x80 -#define MSCAN_RXACT 0x40 -#define MSCAN_CSWAI 0x20 -#define MSCAN_SYNCH 0x10 -#define MSCAN_TIME 0x08 -#define MSCAN_WUPE 0x04 -#define MSCAN_SLPRQ 0x02 -#define MSCAN_INITRQ 0x01 - -/* MSCAN control register 1 (CANCTL1) bits */ -#define MSCAN_CANE 0x80 -#define MSCAN_CLKSRC 0x40 -#define MSCAN_LOOPB 0x20 -#define MSCAN_LISTEN 0x10 -#define MSCAN_BORM 0x08 -#define MSCAN_WUPM 0x04 -#define MSCAN_SLPAK 0x02 -#define MSCAN_INITAK 0x01 - -/* Use the MPC5XXX MSCAN variant? */ -#ifdef CONFIG_PPC -#define MSCAN_FOR_MPC5XXX -#endif - -#ifdef MSCAN_FOR_MPC5XXX -#define MSCAN_CLKSRC_BUS 0 -#define MSCAN_CLKSRC_XTAL MSCAN_CLKSRC -#define MSCAN_CLKSRC_IPS MSCAN_CLKSRC -#else -#define MSCAN_CLKSRC_BUS MSCAN_CLKSRC -#define MSCAN_CLKSRC_XTAL 0 -#endif - -/* MSCAN receiver flag register (CANRFLG) bits */ -#define MSCAN_WUPIF 0x80 -#define MSCAN_CSCIF 0x40 -#define MSCAN_RSTAT1 0x20 -#define MSCAN_RSTAT0 0x10 -#define MSCAN_TSTAT1 0x08 -#define MSCAN_TSTAT0 0x04 -#define MSCAN_OVRIF 0x02 -#define MSCAN_RXF 0x01 -#define MSCAN_ERR_IF (MSCAN_OVRIF | MSCAN_CSCIF) -#define MSCAN_RSTAT_MSK (MSCAN_RSTAT1 | MSCAN_RSTAT0) -#define MSCAN_TSTAT_MSK (MSCAN_TSTAT1 | MSCAN_TSTAT0) -#define MSCAN_STAT_MSK (MSCAN_RSTAT_MSK | MSCAN_TSTAT_MSK) - -#define MSCAN_STATE_BUS_OFF (MSCAN_RSTAT1 | MSCAN_RSTAT0 | \ - MSCAN_TSTAT1 | MSCAN_TSTAT0) -#define MSCAN_STATE_TX(canrflg) (((canrflg)&MSCAN_TSTAT_MSK)>>2) -#define MSCAN_STATE_RX(canrflg) (((canrflg)&MSCAN_RSTAT_MSK)>>4) -#define MSCAN_STATE_ACTIVE 0 -#define MSCAN_STATE_WARNING 1 -#define MSCAN_STATE_PASSIVE 2 -#define MSCAN_STATE_BUSOFF 3 - -/* MSCAN receiver interrupt enable register (CANRIER) bits */ -#define MSCAN_WUPIE 0x80 -#define MSCAN_CSCIE 0x40 -#define MSCAN_RSTATE1 0x20 -#define MSCAN_RSTATE0 0x10 -#define MSCAN_TSTATE1 0x08 -#define MSCAN_TSTATE0 0x04 -#define MSCAN_OVRIE 0x02 -#define MSCAN_RXFIE 0x01 - -/* MSCAN transmitter flag register (CANTFLG) bits */ -#define MSCAN_TXE2 0x04 -#define MSCAN_TXE1 0x02 -#define MSCAN_TXE0 0x01 -#define MSCAN_TXE (MSCAN_TXE2 | MSCAN_TXE1 | MSCAN_TXE0) - -/* MSCAN transmitter interrupt enable register (CANTIER) bits */ -#define MSCAN_TXIE2 0x04 -#define MSCAN_TXIE1 0x02 -#define MSCAN_TXIE0 0x01 -#define MSCAN_TXIE (MSCAN_TXIE2 | MSCAN_TXIE1 | MSCAN_TXIE0) - -/* MSCAN transmitter message abort request (CANTARQ) bits */ -#define MSCAN_ABTRQ2 0x04 -#define MSCAN_ABTRQ1 0x02 -#define MSCAN_ABTRQ0 0x01 - -/* MSCAN transmitter message abort ack (CANTAAK) bits */ -#define MSCAN_ABTAK2 0x04 -#define MSCAN_ABTAK1 0x02 -#define MSCAN_ABTAK0 0x01 - -/* MSCAN transmit buffer selection (CANTBSEL) bits */ -#define MSCAN_TX2 0x04 -#define MSCAN_TX1 0x02 -#define MSCAN_TX0 0x01 - -/* MSCAN ID acceptance control register (CANIDAC) bits */ -#define MSCAN_IDAM1 0x20 -#define MSCAN_IDAM0 0x10 -#define MSCAN_IDHIT2 0x04 -#define MSCAN_IDHIT1 0x02 -#define MSCAN_IDHIT0 0x01 - -#define MSCAN_AF_32BIT 0x00 -#define MSCAN_AF_16BIT MSCAN_IDAM0 -#define MSCAN_AF_8BIT MSCAN_IDAM1 -#define MSCAN_AF_CLOSED (MSCAN_IDAM0|MSCAN_IDAM1) -#define MSCAN_AF_MASK (~(MSCAN_IDAM0|MSCAN_IDAM1)) - -/* MSCAN Miscellaneous Register (CANMISC) bits */ -#define MSCAN_BOHOLD 0x01 - -/* MSCAN Identifier Register (IDR) bits */ -#define MSCAN_SFF_RTR_SHIFT 4 -#define MSCAN_EFF_RTR_SHIFT 0 -#define MSCAN_EFF_FLAGS 0x18 /* IDE + SRR */ - -#ifdef MSCAN_FOR_MPC5XXX -#define _MSCAN_RESERVED_(n, num) u8 _res##n[num] -#define _MSCAN_RESERVED_DSR_SIZE 2 -#else -#define _MSCAN_RESERVED_(n, num) -#define _MSCAN_RESERVED_DSR_SIZE 0 -#endif - -/* Structure of the hardware registers */ -struct mscan_regs { - /* (see doc S12MSCANV3/D) MPC5200 MSCAN */ - u8 canctl0; /* + 0x00 0x00 */ - u8 canctl1; /* + 0x01 0x01 */ - _MSCAN_RESERVED_(1, 2); /* + 0x02 */ - u8 canbtr0; /* + 0x04 0x02 */ - u8 canbtr1; /* + 0x05 0x03 */ - _MSCAN_RESERVED_(2, 2); /* + 0x06 */ - u8 canrflg; /* + 0x08 0x04 */ - u8 canrier; /* + 0x09 0x05 */ - _MSCAN_RESERVED_(3, 2); /* + 0x0a */ - u8 cantflg; /* + 0x0c 0x06 */ - u8 cantier; /* + 0x0d 0x07 */ - _MSCAN_RESERVED_(4, 2); /* + 0x0e */ - u8 cantarq; /* + 0x10 0x08 */ - u8 cantaak; /* + 0x11 0x09 */ - _MSCAN_RESERVED_(5, 2); /* + 0x12 */ - u8 cantbsel; /* + 0x14 0x0a */ - u8 canidac; /* + 0x15 0x0b */ - u8 reserved; /* + 0x16 0x0c */ - _MSCAN_RESERVED_(6, 2); /* + 0x17 */ - u8 canmisc; /* + 0x19 0x0d */ - _MSCAN_RESERVED_(7, 2); /* + 0x1a */ - u8 canrxerr; /* + 0x1c 0x0e */ - u8 cantxerr; /* + 0x1d 0x0f */ - _MSCAN_RESERVED_(8, 2); /* + 0x1e */ - u16 canidar1_0; /* + 0x20 0x10 */ - _MSCAN_RESERVED_(9, 2); /* + 0x22 */ - u16 canidar3_2; /* + 0x24 0x12 */ - _MSCAN_RESERVED_(10, 2); /* + 0x26 */ - u16 canidmr1_0; /* + 0x28 0x14 */ - _MSCAN_RESERVED_(11, 2); /* + 0x2a */ - u16 canidmr3_2; /* + 0x2c 0x16 */ - _MSCAN_RESERVED_(12, 2); /* + 0x2e */ - u16 canidar5_4; /* + 0x30 0x18 */ - _MSCAN_RESERVED_(13, 2); /* + 0x32 */ - u16 canidar7_6; /* + 0x34 0x1a */ - _MSCAN_RESERVED_(14, 2); /* + 0x36 */ - u16 canidmr5_4; /* + 0x38 0x1c */ - _MSCAN_RESERVED_(15, 2); /* + 0x3a */ - u16 canidmr7_6; /* + 0x3c 0x1e */ - _MSCAN_RESERVED_(16, 2); /* + 0x3e */ - struct { - u16 idr1_0; /* + 0x40 0x20 */ - _MSCAN_RESERVED_(17, 2); /* + 0x42 */ - u16 idr3_2; /* + 0x44 0x22 */ - _MSCAN_RESERVED_(18, 2); /* + 0x46 */ - u16 dsr1_0; /* + 0x48 0x24 */ - _MSCAN_RESERVED_(19, 2); /* + 0x4a */ - u16 dsr3_2; /* + 0x4c 0x26 */ - _MSCAN_RESERVED_(20, 2); /* + 0x4e */ - u16 dsr5_4; /* + 0x50 0x28 */ - _MSCAN_RESERVED_(21, 2); /* + 0x52 */ - u16 dsr7_6; /* + 0x54 0x2a */ - _MSCAN_RESERVED_(22, 2); /* + 0x56 */ - u8 dlr; /* + 0x58 0x2c */ - u8 reserved; /* + 0x59 0x2d */ - _MSCAN_RESERVED_(23, 2); /* + 0x5a */ - u16 time; /* + 0x5c 0x2e */ - } rx; - _MSCAN_RESERVED_(24, 2); /* + 0x5e */ - struct { - u16 idr1_0; /* + 0x60 0x30 */ - _MSCAN_RESERVED_(25, 2); /* + 0x62 */ - u16 idr3_2; /* + 0x64 0x32 */ - _MSCAN_RESERVED_(26, 2); /* + 0x66 */ - u16 dsr1_0; /* + 0x68 0x34 */ - _MSCAN_RESERVED_(27, 2); /* + 0x6a */ - u16 dsr3_2; /* + 0x6c 0x36 */ - _MSCAN_RESERVED_(28, 2); /* + 0x6e */ - u16 dsr5_4; /* + 0x70 0x38 */ - _MSCAN_RESERVED_(29, 2); /* + 0x72 */ - u16 dsr7_6; /* + 0x74 0x3a */ - _MSCAN_RESERVED_(30, 2); /* + 0x76 */ - u8 dlr; /* + 0x78 0x3c */ - u8 tbpr; /* + 0x79 0x3d */ - _MSCAN_RESERVED_(31, 2); /* + 0x7a */ - u16 time; /* + 0x7c 0x3e */ - } tx; - _MSCAN_RESERVED_(32, 2); /* + 0x7e */ -} __packed; - -#undef _MSCAN_RESERVED_ -#define MSCAN_REGION sizeof(struct mscan) - -#define MSCAN_NORMAL_MODE 0 -#define MSCAN_SLEEP_MODE MSCAN_SLPRQ -#define MSCAN_INIT_MODE (MSCAN_INITRQ | MSCAN_SLPRQ) -#define MSCAN_POWEROFF_MODE (MSCAN_CSWAI | MSCAN_SLPRQ) -#define MSCAN_SET_MODE_RETRIES 255 -#define MSCAN_ECHO_SKB_MAX 3 -#define MSCAN_RX_INTS_ENABLE (MSCAN_OVRIE | MSCAN_RXFIE | MSCAN_CSCIE | \ - MSCAN_RSTATE1 | MSCAN_RSTATE0 | \ - MSCAN_TSTATE1 | MSCAN_TSTATE0) - -/* MSCAN type variants */ -enum { - MSCAN_TYPE_MPC5200, - MSCAN_TYPE_MPC5121 -}; - -#define BTR0_BRP_MASK 0x3f -#define BTR0_SJW_SHIFT 6 -#define BTR0_SJW_MASK (0x3 << BTR0_SJW_SHIFT) - -#define BTR1_TSEG1_MASK 0xf -#define BTR1_TSEG2_SHIFT 4 -#define BTR1_TSEG2_MASK (0x7 << BTR1_TSEG2_SHIFT) -#define BTR1_SAM_SHIFT 7 - -#define BTR0_SET_BRP(brp) (((brp) - 1) & BTR0_BRP_MASK) -#define BTR0_SET_SJW(sjw) ((((sjw) - 1) << BTR0_SJW_SHIFT) & \ - BTR0_SJW_MASK) - -#define BTR1_SET_TSEG1(tseg1) (((tseg1) - 1) & BTR1_TSEG1_MASK) -#define BTR1_SET_TSEG2(tseg2) ((((tseg2) - 1) << BTR1_TSEG2_SHIFT) & \ - BTR1_TSEG2_MASK) -#define BTR1_SET_SAM(sam) ((sam) ? 1 << BTR1_SAM_SHIFT : 0) - -#define F_RX_PROGRESS 0 -#define F_TX_PROGRESS 1 -#define F_TX_WAIT_ALL 2 - -#define TX_QUEUE_SIZE 3 - -struct tx_queue_entry { - struct list_head list; - u8 mask; - u8 id; -}; - -struct mscan_priv { - struct can_priv can; /* must be the first member */ - unsigned int type; /* MSCAN type variants */ - long open_time; - unsigned long flags; - void __iomem *reg_base; /* ioremap'ed address to registers */ - u8 shadow_statflg; - u8 shadow_canrier; - u8 cur_pri; - u8 prev_buf_id; - u8 tx_active; - - struct list_head tx_head; - struct tx_queue_entry tx_queue[TX_QUEUE_SIZE]; - struct napi_struct napi; -}; - -extern struct net_device *alloc_mscandev(void); -extern int register_mscandev(struct net_device *dev, int mscan_clksrc); -extern void unregister_mscandev(struct net_device *dev); - -#endif /* __MSCAN_H__ */ |