diff options
Diffstat (limited to 'ANDROID_3.4.5/arch/powerpc/boot')
378 files changed, 0 insertions, 71859 deletions
diff --git a/ANDROID_3.4.5/arch/powerpc/boot/44x.h b/ANDROID_3.4.5/arch/powerpc/boot/44x.h deleted file mode 100644 index 02563443..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/44x.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * PowerPC 44x related functions - * - * Copyright 2007 David Gibson, IBM Corporation. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#ifndef _PPC_BOOT_44X_H_ -#define _PPC_BOOT_44X_H_ - -void ebony_init(void *mac0, void *mac1); -void bamboo_init(void *mac0, void *mac1); - -#endif /* _PPC_BOOT_44X_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/4xx.c b/ANDROID_3.4.5/arch/powerpc/boot/4xx.c deleted file mode 100644 index 9d3bd4c4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/4xx.c +++ /dev/null @@ -1,803 +0,0 @@ -/* - * Copyright 2007 David Gibson, IBM Corporation. - * - * Based on earlier code: - * Matt Porter <mporter@kernel.crashing.org> - * Copyright 2002-2005 MontaVista Software Inc. - * - * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> - * Copyright (c) 2003, 2004 Zultys Technologies - * - * Copyright (C) 2009 Wind River Systems, Inc. - * Updated for supporting PPC405EX on Kilauea. - * Tiejun Chen <tiejun.chen@windriver.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <stddef.h> -#include "types.h" -#include "string.h" -#include "stdio.h" -#include "ops.h" -#include "reg.h" -#include "dcr.h" - -static unsigned long chip_11_errata(unsigned long memsize) -{ - unsigned long pvr; - - pvr = mfpvr(); - - switch (pvr & 0xf0000ff0) { - case 0x40000850: - case 0x400008d0: - case 0x200008d0: - memsize -= 4096; - break; - default: - break; - } - - return memsize; -} - -/* Read the 4xx SDRAM controller to get size of system memory. */ -void ibm4xx_sdram_fixup_memsize(void) -{ - int i; - unsigned long memsize, bank_config; - - memsize = 0; - for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) { - bank_config = SDRAM0_READ(sdram_bxcr[i]); - if (bank_config & SDRAM_CONFIG_BANK_ENABLE) - memsize += SDRAM_CONFIG_BANK_SIZE(bank_config); - } - - memsize = chip_11_errata(memsize); - dt_fixup_memory(0, memsize); -} - -/* Read the 440SPe MQ controller to get size of system memory. */ -#define DCRN_MQ0_B0BAS 0x40 -#define DCRN_MQ0_B1BAS 0x41 -#define DCRN_MQ0_B2BAS 0x42 -#define DCRN_MQ0_B3BAS 0x43 - -static u64 ibm440spe_decode_bas(u32 bas) -{ - u64 base = ((u64)(bas & 0xFFE00000u)) << 2; - - /* open coded because I'm paranoid about invalid values */ - switch ((bas >> 4) & 0xFFF) { - case 0: - return 0; - case 0xffc: - return base + 0x000800000ull; - case 0xff8: - return base + 0x001000000ull; - case 0xff0: - return base + 0x002000000ull; - case 0xfe0: - return base + 0x004000000ull; - case 0xfc0: - return base + 0x008000000ull; - case 0xf80: - return base + 0x010000000ull; - case 0xf00: - return base + 0x020000000ull; - case 0xe00: - return base + 0x040000000ull; - case 0xc00: - return base + 0x080000000ull; - case 0x800: - return base + 0x100000000ull; - } - printf("Memory BAS value 0x%08x unsupported !\n", bas); - return 0; -} - -void ibm440spe_fixup_memsize(void) -{ - u64 banktop, memsize = 0; - - /* Ultimately, we should directly construct the memory node - * so we are able to handle holes in the memory address space - */ - banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B0BAS)); - if (banktop > memsize) - memsize = banktop; - banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B1BAS)); - if (banktop > memsize) - memsize = banktop; - banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B2BAS)); - if (banktop > memsize) - memsize = banktop; - banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B3BAS)); - if (banktop > memsize) - memsize = banktop; - - dt_fixup_memory(0, memsize); -} - - -/* 4xx DDR1/2 Denali memory controller support */ -/* DDR0 registers */ -#define DDR0_02 2 -#define DDR0_08 8 -#define DDR0_10 10 -#define DDR0_14 14 -#define DDR0_42 42 -#define DDR0_43 43 - -/* DDR0_02 */ -#define DDR_START 0x1 -#define DDR_START_SHIFT 0 -#define DDR_MAX_CS_REG 0x3 -#define DDR_MAX_CS_REG_SHIFT 24 -#define DDR_MAX_COL_REG 0xf -#define DDR_MAX_COL_REG_SHIFT 16 -#define DDR_MAX_ROW_REG 0xf -#define DDR_MAX_ROW_REG_SHIFT 8 -/* DDR0_08 */ -#define DDR_DDR2_MODE 0x1 -#define DDR_DDR2_MODE_SHIFT 0 -/* DDR0_10 */ -#define DDR_CS_MAP 0x3 -#define DDR_CS_MAP_SHIFT 8 -/* DDR0_14 */ -#define DDR_REDUC 0x1 -#define DDR_REDUC_SHIFT 16 -/* DDR0_42 */ -#define DDR_APIN 0x7 -#define DDR_APIN_SHIFT 24 -/* DDR0_43 */ -#define DDR_COL_SZ 0x7 -#define DDR_COL_SZ_SHIFT 8 -#define DDR_BANK8 0x1 -#define DDR_BANK8_SHIFT 0 - -#define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask)) - -/* - * Some U-Boot versions set the number of chipselects to two - * for Sequoia/Rainier boards while they only have one chipselect - * hardwired. Hardcode the number of chipselects to one - * for sequioa/rainer board models or read the actual value - * from the memory controller register DDR0_10 otherwise. - */ -static inline u32 ibm4xx_denali_get_cs(void) -{ - void *devp; - char model[64]; - u32 val, cs; - - devp = finddevice("/"); - if (!devp) - goto read_cs; - - if (getprop(devp, "model", model, sizeof(model)) <= 0) - goto read_cs; - - model[sizeof(model)-1] = 0; - - if (!strcmp(model, "amcc,sequoia") || - !strcmp(model, "amcc,rainier")) - return 1; - -read_cs: - /* get CS value */ - val = SDRAM0_READ(DDR0_10); - - val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT); - cs = 0; - while (val) { - if (val & 0x1) - cs++; - val = val >> 1; - } - return cs; -} - -void ibm4xx_denali_fixup_memsize(void) -{ - u32 val, max_cs, max_col, max_row; - u32 cs, col, row, bank, dpath; - unsigned long memsize; - - val = SDRAM0_READ(DDR0_02); - if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT)) - fatal("DDR controller is not initialized\n"); - - /* get maximum cs col and row values */ - max_cs = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT); - max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT); - max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT); - - cs = ibm4xx_denali_get_cs(); - if (!cs) - fatal("No memory installed\n"); - if (cs > max_cs) - fatal("DDR wrong CS configuration\n"); - - /* get data path bytes */ - val = SDRAM0_READ(DDR0_14); - - if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT)) - dpath = 4; /* 32 bits */ - else - dpath = 8; /* 64 bits */ - - /* get address pins (rows) */ - val = SDRAM0_READ(DDR0_42); - - row = DDR_GET_VAL(val, DDR_APIN, DDR_APIN_SHIFT); - if (row > max_row) - fatal("DDR wrong APIN configuration\n"); - row = max_row - row; - - /* get collomn size and banks */ - val = SDRAM0_READ(DDR0_43); - - col = DDR_GET_VAL(val, DDR_COL_SZ, DDR_COL_SZ_SHIFT); - if (col > max_col) - fatal("DDR wrong COL configuration\n"); - col = max_col - col; - - if (DDR_GET_VAL(val, DDR_BANK8, DDR_BANK8_SHIFT)) - bank = 8; /* 8 banks */ - else - bank = 4; /* 4 banks */ - - memsize = cs * (1 << (col+row)) * bank * dpath; - memsize = chip_11_errata(memsize); - dt_fixup_memory(0, memsize); -} - -#define SPRN_DBCR0_40X 0x3F2 -#define SPRN_DBCR0_44X 0x134 -#define DBCR0_RST_SYSTEM 0x30000000 - -void ibm44x_dbcr_reset(void) -{ - unsigned long tmp; - - asm volatile ( - "mfspr %0,%1\n" - "oris %0,%0,%2@h\n" - "mtspr %1,%0" - : "=&r"(tmp) : "i"(SPRN_DBCR0_44X), "i"(DBCR0_RST_SYSTEM) - ); - -} - -void ibm40x_dbcr_reset(void) -{ - unsigned long tmp; - - asm volatile ( - "mfspr %0,%1\n" - "oris %0,%0,%2@h\n" - "mtspr %1,%0" - : "=&r"(tmp) : "i"(SPRN_DBCR0_40X), "i"(DBCR0_RST_SYSTEM) - ); -} - -#define EMAC_RESET 0x20000000 -void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1) -{ - /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't - * do this for us - */ - if (emac0) - *emac0 = EMAC_RESET; - if (emac1) - *emac1 = EMAC_RESET; - - mtdcr(DCRN_MAL0_CFG, MAL_RESET); - while (mfdcr(DCRN_MAL0_CFG) & MAL_RESET) - ; /* loop until reset takes effect */ -} - -/* Read 4xx EBC bus bridge registers to get mappings of the peripheral - * banks into the OPB address space */ -void ibm4xx_fixup_ebc_ranges(const char *ebc) -{ - void *devp; - u32 bxcr; - u32 ranges[EBC_NUM_BANKS*4]; - u32 *p = ranges; - int i; - - for (i = 0; i < EBC_NUM_BANKS; i++) { - mtdcr(DCRN_EBC0_CFGADDR, EBC_BXCR(i)); - bxcr = mfdcr(DCRN_EBC0_CFGDATA); - - if ((bxcr & EBC_BXCR_BU) != EBC_BXCR_BU_OFF) { - *p++ = i; - *p++ = 0; - *p++ = bxcr & EBC_BXCR_BAS; - *p++ = EBC_BXCR_BANK_SIZE(bxcr); - } - } - - devp = finddevice(ebc); - if (! devp) - fatal("Couldn't locate EBC node %s\n\r", ebc); - - setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32)); -} - -/* Calculate 440GP clocks */ -void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk) -{ - u32 sys0 = mfdcr(DCRN_CPC0_SYS0); - u32 cr0 = mfdcr(DCRN_CPC0_CR0); - u32 cpu, plb, opb, ebc, tb, uart0, uart1, m; - u32 opdv = CPC0_SYS0_OPDV(sys0); - u32 epdv = CPC0_SYS0_EPDV(sys0); - - if (sys0 & CPC0_SYS0_BYPASS) { - /* Bypass system PLL */ - cpu = plb = sys_clk; - } else { - if (sys0 & CPC0_SYS0_EXTSL) - /* PerClk */ - m = CPC0_SYS0_FWDVB(sys0) * opdv * epdv; - else - /* CPU clock */ - m = CPC0_SYS0_FBDV(sys0) * CPC0_SYS0_FWDVA(sys0); - cpu = sys_clk * m / CPC0_SYS0_FWDVA(sys0); - plb = sys_clk * m / CPC0_SYS0_FWDVB(sys0); - } - - opb = plb / opdv; - ebc = opb / epdv; - - /* FIXME: Check if this is for all 440GP, or just Ebony */ - if ((mfpvr() & 0xf0000fff) == 0x40000440) - /* Rev. B 440GP, use external system clock */ - tb = sys_clk; - else - /* Rev. C 440GP, errata force us to use internal clock */ - tb = cpu; - - if (cr0 & CPC0_CR0_U0EC) - /* External UART clock */ - uart0 = ser_clk; - else - /* Internal UART clock */ - uart0 = plb / CPC0_CR0_UDIV(cr0); - - if (cr0 & CPC0_CR0_U1EC) - /* External UART clock */ - uart1 = ser_clk; - else - /* Internal UART clock */ - uart1 = plb / CPC0_CR0_UDIV(cr0); - - printf("PPC440GP: SysClk = %dMHz (%x)\n\r", - (sys_clk + 500000) / 1000000, sys_clk); - - dt_fixup_cpu_clocks(cpu, tb, 0); - - dt_fixup_clock("/plb", plb); - dt_fixup_clock("/plb/opb", opb); - dt_fixup_clock("/plb/opb/ebc", ebc); - dt_fixup_clock("/plb/opb/serial@40000200", uart0); - dt_fixup_clock("/plb/opb/serial@40000300", uart1); -} - -#define SPRN_CCR1 0x378 - -static inline u32 __fix_zero(u32 v, u32 def) -{ - return v ? v : def; -} - -static unsigned int __ibm440eplike_fixup_clocks(unsigned int sys_clk, - unsigned int tmr_clk, - int per_clk_from_opb) -{ - /* PLL config */ - u32 pllc = CPR0_READ(DCRN_CPR0_PLLC); - u32 plld = CPR0_READ(DCRN_CPR0_PLLD); - - /* Dividers */ - u32 fbdv = __fix_zero((plld >> 24) & 0x1f, 32); - u32 fwdva = __fix_zero((plld >> 16) & 0xf, 16); - u32 fwdvb = __fix_zero((plld >> 8) & 7, 8); - u32 lfbdv = __fix_zero(plld & 0x3f, 64); - u32 pradv0 = __fix_zero((CPR0_READ(DCRN_CPR0_PRIMAD) >> 24) & 7, 8); - u32 prbdv0 = __fix_zero((CPR0_READ(DCRN_CPR0_PRIMBD) >> 24) & 7, 8); - u32 opbdv0 = __fix_zero((CPR0_READ(DCRN_CPR0_OPBD) >> 24) & 3, 4); - u32 perdv0 = __fix_zero((CPR0_READ(DCRN_CPR0_PERD) >> 24) & 3, 4); - - /* Input clocks for primary dividers */ - u32 clk_a, clk_b; - - /* Resulting clocks */ - u32 cpu, plb, opb, ebc, vco; - - /* Timebase */ - u32 ccr1, tb = tmr_clk; - - if (pllc & 0x40000000) { - u32 m; - - /* Feedback path */ - switch ((pllc >> 24) & 7) { - case 0: - /* PLLOUTx */ - m = ((pllc & 0x20000000) ? fwdvb : fwdva) * lfbdv; - break; - case 1: - /* CPU */ - m = fwdva * pradv0; - break; - case 5: - /* PERClk */ - m = fwdvb * prbdv0 * opbdv0 * perdv0; - break; - default: - printf("WARNING ! Invalid PLL feedback source !\n"); - goto bypass; - } - m *= fbdv; - vco = sys_clk * m; - clk_a = vco / fwdva; - clk_b = vco / fwdvb; - } else { -bypass: - /* Bypass system PLL */ - vco = 0; - clk_a = clk_b = sys_clk; - } - - cpu = clk_a / pradv0; - plb = clk_b / prbdv0; - opb = plb / opbdv0; - ebc = (per_clk_from_opb ? opb : plb) / perdv0; - - /* Figure out timebase. Either CPU or default TmrClk */ - ccr1 = mfspr(SPRN_CCR1); - - /* If passed a 0 tmr_clk, force CPU clock */ - if (tb == 0) { - ccr1 &= ~0x80u; - mtspr(SPRN_CCR1, ccr1); - } - if ((ccr1 & 0x0080) == 0) - tb = cpu; - - dt_fixup_cpu_clocks(cpu, tb, 0); - dt_fixup_clock("/plb", plb); - dt_fixup_clock("/plb/opb", opb); - dt_fixup_clock("/plb/opb/ebc", ebc); - - return plb; -} - -static void eplike_fixup_uart_clk(int index, const char *path, - unsigned int ser_clk, - unsigned int plb_clk) -{ - unsigned int sdr; - unsigned int clock; - - switch (index) { - case 0: - sdr = SDR0_READ(DCRN_SDR0_UART0); - break; - case 1: - sdr = SDR0_READ(DCRN_SDR0_UART1); - break; - case 2: - sdr = SDR0_READ(DCRN_SDR0_UART2); - break; - case 3: - sdr = SDR0_READ(DCRN_SDR0_UART3); - break; - default: - return; - } - - if (sdr & 0x00800000u) - clock = ser_clk; - else - clock = plb_clk / __fix_zero(sdr & 0xff, 256); - - dt_fixup_clock(path, clock); -} - -void ibm440ep_fixup_clocks(unsigned int sys_clk, - unsigned int ser_clk, - unsigned int tmr_clk) -{ - unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 0); - - /* serial clocks need fixup based on int/ext */ - eplike_fixup_uart_clk(0, "/plb/opb/serial@ef600300", ser_clk, plb_clk); - eplike_fixup_uart_clk(1, "/plb/opb/serial@ef600400", ser_clk, plb_clk); - eplike_fixup_uart_clk(2, "/plb/opb/serial@ef600500", ser_clk, plb_clk); - eplike_fixup_uart_clk(3, "/plb/opb/serial@ef600600", ser_clk, plb_clk); -} - -void ibm440gx_fixup_clocks(unsigned int sys_clk, - unsigned int ser_clk, - unsigned int tmr_clk) -{ - unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1); - - /* serial clocks need fixup based on int/ext */ - eplike_fixup_uart_clk(0, "/plb/opb/serial@40000200", ser_clk, plb_clk); - eplike_fixup_uart_clk(1, "/plb/opb/serial@40000300", ser_clk, plb_clk); -} - -void ibm440spe_fixup_clocks(unsigned int sys_clk, - unsigned int ser_clk, - unsigned int tmr_clk) -{ - unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1); - - /* serial clocks need fixup based on int/ext */ - eplike_fixup_uart_clk(0, "/plb/opb/serial@f0000200", ser_clk, plb_clk); - eplike_fixup_uart_clk(1, "/plb/opb/serial@f0000300", ser_clk, plb_clk); - eplike_fixup_uart_clk(2, "/plb/opb/serial@f0000600", ser_clk, plb_clk); -} - -void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk) -{ - u32 pllmr = mfdcr(DCRN_CPC0_PLLMR); - u32 cpc0_cr0 = mfdcr(DCRN_405_CPC0_CR0); - u32 cpc0_cr1 = mfdcr(DCRN_405_CPC0_CR1); - u32 psr = mfdcr(DCRN_405_CPC0_PSR); - u32 cpu, plb, opb, ebc, tb, uart0, uart1, m; - u32 fwdv, fwdvb, fbdv, cbdv, opdv, epdv, ppdv, udiv; - - fwdv = (8 - ((pllmr & 0xe0000000) >> 29)); - fbdv = (pllmr & 0x1e000000) >> 25; - if (fbdv == 0) - fbdv = 16; - cbdv = ((pllmr & 0x00060000) >> 17) + 1; /* CPU:PLB */ - opdv = ((pllmr & 0x00018000) >> 15) + 1; /* PLB:OPB */ - ppdv = ((pllmr & 0x00001800) >> 13) + 1; /* PLB:PCI */ - epdv = ((pllmr & 0x00001800) >> 11) + 2; /* PLB:EBC */ - udiv = ((cpc0_cr0 & 0x3e) >> 1) + 1; - - /* check for 405GPr */ - if ((mfpvr() & 0xfffffff0) == (0x50910951 & 0xfffffff0)) { - fwdvb = 8 - (pllmr & 0x00000007); - if (!(psr & 0x00001000)) /* PCI async mode enable == 0 */ - if (psr & 0x00000020) /* New mode enable */ - m = fwdvb * 2 * ppdv; - else - m = fwdvb * cbdv * ppdv; - else if (psr & 0x00000020) /* New mode enable */ - if (psr & 0x00000800) /* PerClk synch mode */ - m = fwdvb * 2 * epdv; - else - m = fbdv * fwdv; - else if (epdv == fbdv) - m = fbdv * cbdv * epdv; - else - m = fbdv * fwdvb * cbdv; - - cpu = sys_clk * m / fwdv; - plb = sys_clk * m / (fwdvb * cbdv); - } else { - m = fwdv * fbdv * cbdv; - cpu = sys_clk * m / fwdv; - plb = cpu / cbdv; - } - opb = plb / opdv; - ebc = plb / epdv; - - if (cpc0_cr0 & 0x80) - /* uart0 uses the external clock */ - uart0 = ser_clk; - else - uart0 = cpu / udiv; - - if (cpc0_cr0 & 0x40) - /* uart1 uses the external clock */ - uart1 = ser_clk; - else - uart1 = cpu / udiv; - - /* setup the timebase clock to tick at the cpu frequency */ - cpc0_cr1 = cpc0_cr1 & ~0x00800000; - mtdcr(DCRN_405_CPC0_CR1, cpc0_cr1); - tb = cpu; - - dt_fixup_cpu_clocks(cpu, tb, 0); - dt_fixup_clock("/plb", plb); - dt_fixup_clock("/plb/opb", opb); - dt_fixup_clock("/plb/ebc", ebc); - dt_fixup_clock("/plb/opb/serial@ef600300", uart0); - dt_fixup_clock("/plb/opb/serial@ef600400", uart1); -} - - -void ibm405ep_fixup_clocks(unsigned int sys_clk) -{ - u32 pllmr0 = mfdcr(DCRN_CPC0_PLLMR0); - u32 pllmr1 = mfdcr(DCRN_CPC0_PLLMR1); - u32 cpc0_ucr = mfdcr(DCRN_CPC0_UCR); - u32 cpu, plb, opb, ebc, uart0, uart1; - u32 fwdva, fwdvb, fbdv, cbdv, opdv, epdv; - u32 pllmr0_ccdv, tb, m; - - fwdva = 8 - ((pllmr1 & 0x00070000) >> 16); - fwdvb = 8 - ((pllmr1 & 0x00007000) >> 12); - fbdv = (pllmr1 & 0x00f00000) >> 20; - if (fbdv == 0) - fbdv = 16; - - cbdv = ((pllmr0 & 0x00030000) >> 16) + 1; /* CPU:PLB */ - epdv = ((pllmr0 & 0x00000300) >> 8) + 2; /* PLB:EBC */ - opdv = ((pllmr0 & 0x00003000) >> 12) + 1; /* PLB:OPB */ - - m = fbdv * fwdvb; - - pllmr0_ccdv = ((pllmr0 & 0x00300000) >> 20) + 1; - if (pllmr1 & 0x80000000) - cpu = sys_clk * m / (fwdva * pllmr0_ccdv); - else - cpu = sys_clk / pllmr0_ccdv; - - plb = cpu / cbdv; - opb = plb / opdv; - ebc = plb / epdv; - tb = cpu; - uart0 = cpu / (cpc0_ucr & 0x0000007f); - uart1 = cpu / ((cpc0_ucr & 0x00007f00) >> 8); - - dt_fixup_cpu_clocks(cpu, tb, 0); - dt_fixup_clock("/plb", plb); - dt_fixup_clock("/plb/opb", opb); - dt_fixup_clock("/plb/ebc", ebc); - dt_fixup_clock("/plb/opb/serial@ef600300", uart0); - dt_fixup_clock("/plb/opb/serial@ef600400", uart1); -} - -static u8 ibm405ex_fwdv_multi_bits[] = { - /* values for: 1 - 16 */ - 0x01, 0x02, 0x0e, 0x09, 0x04, 0x0b, 0x10, 0x0d, 0x0c, 0x05, - 0x06, 0x0f, 0x0a, 0x07, 0x08, 0x03 -}; - -u32 ibm405ex_get_fwdva(unsigned long cpr_fwdv) -{ - u32 index; - - for (index = 0; index < ARRAY_SIZE(ibm405ex_fwdv_multi_bits); index++) - if (cpr_fwdv == (u32)ibm405ex_fwdv_multi_bits[index]) - return index + 1; - - return 0; -} - -static u8 ibm405ex_fbdv_multi_bits[] = { - /* values for: 1 - 100 */ - 0x00, 0xff, 0x7e, 0xfd, 0x7a, 0xf5, 0x6a, 0xd5, 0x2a, 0xd4, - 0x29, 0xd3, 0x26, 0xcc, 0x19, 0xb3, 0x67, 0xce, 0x1d, 0xbb, - 0x77, 0xee, 0x5d, 0xba, 0x74, 0xe9, 0x52, 0xa5, 0x4b, 0x96, - 0x2c, 0xd8, 0x31, 0xe3, 0x46, 0x8d, 0x1b, 0xb7, 0x6f, 0xde, - 0x3d, 0xfb, 0x76, 0xed, 0x5a, 0xb5, 0x6b, 0xd6, 0x2d, 0xdb, - 0x36, 0xec, 0x59, 0xb2, 0x64, 0xc9, 0x12, 0xa4, 0x48, 0x91, - 0x23, 0xc7, 0x0e, 0x9c, 0x38, 0xf0, 0x61, 0xc2, 0x05, 0x8b, - 0x17, 0xaf, 0x5f, 0xbe, 0x7c, 0xf9, 0x72, 0xe5, 0x4a, 0x95, - 0x2b, 0xd7, 0x2e, 0xdc, 0x39, 0xf3, 0x66, 0xcd, 0x1a, 0xb4, - 0x68, 0xd1, 0x22, 0xc4, 0x09, 0x93, 0x27, 0xcf, 0x1e, 0xbc, - /* values for: 101 - 200 */ - 0x78, 0xf1, 0x62, 0xc5, 0x0a, 0x94, 0x28, 0xd0, 0x21, 0xc3, - 0x06, 0x8c, 0x18, 0xb0, 0x60, 0xc1, 0x02, 0x84, 0x08, 0x90, - 0x20, 0xc0, 0x01, 0x83, 0x07, 0x8f, 0x1f, 0xbf, 0x7f, 0xfe, - 0x7d, 0xfa, 0x75, 0xea, 0x55, 0xaa, 0x54, 0xa9, 0x53, 0xa6, - 0x4c, 0x99, 0x33, 0xe7, 0x4e, 0x9d, 0x3b, 0xf7, 0x6e, 0xdd, - 0x3a, 0xf4, 0x69, 0xd2, 0x25, 0xcb, 0x16, 0xac, 0x58, 0xb1, - 0x63, 0xc6, 0x0d, 0x9b, 0x37, 0xef, 0x5e, 0xbd, 0x7b, 0xf6, - 0x6d, 0xda, 0x35, 0xeb, 0x56, 0xad, 0x5b, 0xb6, 0x6c, 0xd9, - 0x32, 0xe4, 0x49, 0x92, 0x24, 0xc8, 0x11, 0xa3, 0x47, 0x8e, - 0x1c, 0xb8, 0x70, 0xe1, 0x42, 0x85, 0x0b, 0x97, 0x2f, 0xdf, - /* values for: 201 - 255 */ - 0x3e, 0xfc, 0x79, 0xf2, 0x65, 0xca, 0x15, 0xab, 0x57, 0xae, - 0x5c, 0xb9, 0x73, 0xe6, 0x4d, 0x9a, 0x34, 0xe8, 0x51, 0xa2, - 0x44, 0x89, 0x13, 0xa7, 0x4f, 0x9e, 0x3c, 0xf8, 0x71, 0xe2, - 0x45, 0x8a, 0x14, 0xa8, 0x50, 0xa1, 0x43, 0x86, 0x0c, 0x98, - 0x30, 0xe0, 0x41, 0x82, 0x04, 0x88, 0x10, 0xa0, 0x40, 0x81, - 0x03, 0x87, 0x0f, 0x9f, 0x3f /* END */ -}; - -u32 ibm405ex_get_fbdv(unsigned long cpr_fbdv) -{ - u32 index; - - for (index = 0; index < ARRAY_SIZE(ibm405ex_fbdv_multi_bits); index++) - if (cpr_fbdv == (u32)ibm405ex_fbdv_multi_bits[index]) - return index + 1; - - return 0; -} - -void ibm405ex_fixup_clocks(unsigned int sys_clk, unsigned int uart_clk) -{ - /* PLL config */ - u32 pllc = CPR0_READ(DCRN_CPR0_PLLC); - u32 plld = CPR0_READ(DCRN_CPR0_PLLD); - u32 cpud = CPR0_READ(DCRN_CPR0_PRIMAD); - u32 plbd = CPR0_READ(DCRN_CPR0_PRIMBD); - u32 opbd = CPR0_READ(DCRN_CPR0_OPBD); - u32 perd = CPR0_READ(DCRN_CPR0_PERD); - - /* Dividers */ - u32 fbdv = ibm405ex_get_fbdv(__fix_zero((plld >> 24) & 0xff, 1)); - - u32 fwdva = ibm405ex_get_fwdva(__fix_zero((plld >> 16) & 0x0f, 1)); - - u32 cpudv0 = __fix_zero((cpud >> 24) & 7, 8); - - /* PLBDV0 is hardwared to 010. */ - u32 plbdv0 = 2; - u32 plb2xdv0 = __fix_zero((plbd >> 16) & 7, 8); - - u32 opbdv0 = __fix_zero((opbd >> 24) & 3, 4); - - u32 perdv0 = __fix_zero((perd >> 24) & 3, 4); - - /* Resulting clocks */ - u32 cpu, plb, opb, ebc, vco, tb, uart0, uart1; - - /* PLL's VCO is the source for primary forward ? */ - if (pllc & 0x40000000) { - u32 m; - - /* Feedback path */ - switch ((pllc >> 24) & 7) { - case 0: - /* PLLOUTx */ - m = fbdv; - break; - case 1: - /* CPU */ - m = fbdv * fwdva * cpudv0; - break; - case 5: - /* PERClk */ - m = fbdv * fwdva * plb2xdv0 * plbdv0 * opbdv0 * perdv0; - break; - default: - printf("WARNING ! Invalid PLL feedback source !\n"); - goto bypass; - } - - vco = (unsigned int)(sys_clk * m); - } else { -bypass: - /* Bypass system PLL */ - vco = 0; - } - - /* CPU = VCO / ( FWDVA x CPUDV0) */ - cpu = vco / (fwdva * cpudv0); - /* PLB = VCO / ( FWDVA x PLB2XDV0 x PLBDV0) */ - plb = vco / (fwdva * plb2xdv0 * plbdv0); - /* OPB = PLB / OPBDV0 */ - opb = plb / opbdv0; - /* EBC = OPB / PERDV0 */ - ebc = opb / perdv0; - - tb = cpu; - uart0 = uart1 = uart_clk; - - dt_fixup_cpu_clocks(cpu, tb, 0); - dt_fixup_clock("/plb", plb); - dt_fixup_clock("/plb/opb", opb); - dt_fixup_clock("/plb/opb/ebc", ebc); - dt_fixup_clock("/plb/opb/serial@ef600200", uart0); - dt_fixup_clock("/plb/opb/serial@ef600300", uart1); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/4xx.h b/ANDROID_3.4.5/arch/powerpc/boot/4xx.h deleted file mode 100644 index 7dc5d453..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/4xx.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * PowerPC 4xx related functions - * - * Copyright 2007 IBM Corporation. - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#ifndef _POWERPC_BOOT_4XX_H_ -#define _POWERPC_BOOT_4XX_H_ - -void ibm4xx_sdram_fixup_memsize(void); -void ibm440spe_fixup_memsize(void); -void ibm4xx_denali_fixup_memsize(void); -void ibm44x_dbcr_reset(void); -void ibm40x_dbcr_reset(void); -void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1); -void ibm4xx_fixup_ebc_ranges(const char *ebc); - -void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk); -void ibm405ep_fixup_clocks(unsigned int sys_clk); -void ibm405ex_fixup_clocks(unsigned int sys_clk, unsigned int uart_clk); -void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk); -void ibm440ep_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk, - unsigned int tmr_clk); -void ibm440gx_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk, - unsigned int tmr_clk); -void ibm440spe_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk, - unsigned int tmr_clk); - -#endif /* _POWERPC_BOOT_4XX_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/Makefile b/ANDROID_3.4.5/arch/powerpc/boot/Makefile deleted file mode 100644 index e8461cb1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/Makefile +++ /dev/null @@ -1,415 +0,0 @@ -# Makefile for making ELF bootable images for booting on CHRP -# using Open Firmware. -# -# Geert Uytterhoeven September 1997 -# -# Based on coffboot by Paul Mackerras -# Simplified for ppc64 by Todd Inglett -# -# NOTE: this code is built for 32 bit in ELF32 format even though -# it packages a 64 bit kernel. We do this to simplify the -# bootloader and increase compatibility with OpenFirmware. -# -# To this end we need to define BOOTCC, etc, as the tools -# needed to build the 32 bit image. That's normally the same -# compiler for the rest of the kernel, with the -m32 flag added. -# To make it easier to setup a cross compiler, -# CROSS32_COMPILE is setup as a prefix just like CROSS_COMPILE -# in the toplevel makefile. - -all: $(obj)/zImage - -BOOTCFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \ - -fno-strict-aliasing -Os -msoft-float -pipe \ - -fomit-frame-pointer -fno-builtin -fPIC -nostdinc \ - -isystem $(shell $(CROSS32CC) -print-file-name=include) -BOOTAFLAGS := -D__ASSEMBLY__ $(BOOTCFLAGS) -traditional -nostdinc - -ifdef CONFIG_DEBUG_INFO -BOOTCFLAGS += -g -endif - -ifeq ($(call cc-option-yn, -fstack-protector),y) -BOOTCFLAGS += -fno-stack-protector -endif - -BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) - -DTC_FLAGS ?= -p 1024 - -$(obj)/4xx.o: BOOTCFLAGS += -mcpu=405 -$(obj)/ebony.o: BOOTCFLAGS += -mcpu=405 -$(obj)/cuboot-hotfoot.o: BOOTCFLAGS += -mcpu=405 -$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405 -$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405 -$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405 -$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 -$(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405 -$(obj)/treeboot-currituck.o: BOOTCFLAGS += -mcpu=405 -$(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405 - - -zlib := inffast.c inflate.c inftrees.c -zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h -zliblinuxheader := zlib.h zconf.h zutil.h - -$(addprefix $(obj)/,$(zlib) cuboot-c2k.o gunzip_util.o main.o prpmc2800.o): \ - $(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader)) - -libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c -libfdtheader := fdt.h libfdt.h libfdt_internal.h - -$(addprefix $(obj)/,$(libfdt) libfdt-wrapper.o simpleboot.o epapr.o): \ - $(addprefix $(obj)/,$(libfdtheader)) - -src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \ - $(libfdt) libfdt-wrapper.c \ - ns16550.c serial.c simple_alloc.c div64.S util.S \ - gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \ - 4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \ - cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \ - fsl-soc.c mpc8xx.c pq2.c ugecon.c -src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \ - cuboot-ebony.c cuboot-hotfoot.c epapr.c treeboot-ebony.c \ - prpmc2800.c \ - ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ - cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \ - cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \ - fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \ - cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ - cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ - virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \ - cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \ - gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c \ - treeboot-currituck.c -src-boot := $(src-wlib) $(src-plat) empty.c - -src-boot := $(addprefix $(obj)/, $(src-boot)) -obj-boot := $(addsuffix .o, $(basename $(src-boot))) -obj-wlib := $(addsuffix .o, $(basename $(addprefix $(obj)/, $(src-wlib)))) -obj-plat := $(addsuffix .o, $(basename $(addprefix $(obj)/, $(src-plat)))) - -quiet_cmd_copy_zlib = COPY $@ - cmd_copy_zlib = sed "s@__used@@;s@<linux/\([^>]*\).*@\"\1\"@" $< > $@ - -quiet_cmd_copy_zlibheader = COPY $@ - cmd_copy_zlibheader = sed "s@<linux/\([^>]*\).*@\"\1\"@" $< > $@ -# stddef.h for NULL -quiet_cmd_copy_zliblinuxheader = COPY $@ - cmd_copy_zliblinuxheader = sed "s@<linux/string.h>@\"string.h\"@;s@<linux/kernel.h>@<stddef.h>@;s@<linux/\([^>]*\).*@\"\1\"@" $< > $@ - -$(addprefix $(obj)/,$(zlib)): $(obj)/%: $(srctree)/lib/zlib_inflate/% - $(call cmd,copy_zlib) - -$(addprefix $(obj)/,$(zlibheader)): $(obj)/%: $(srctree)/lib/zlib_inflate/% - $(call cmd,copy_zlibheader) - -$(addprefix $(obj)/,$(zliblinuxheader)): $(obj)/%: $(srctree)/include/linux/% - $(call cmd,copy_zliblinuxheader) - -quiet_cmd_copy_libfdt = COPY $@ - cmd_copy_libfdt = cp $< $@ - -$(addprefix $(obj)/,$(libfdt) $(libfdtheader)): $(obj)/%: $(srctree)/scripts/dtc/libfdt/% - $(call cmd,copy_libfdt) - -$(obj)/empty.c: - @touch $@ - -$(obj)/zImage.lds $(obj)/zImage.coff.lds $(obj)/zImage.ps3.lds: $(obj)/%: $(srctree)/$(src)/%.S - @cp $< $@ - -clean-files := $(zlib) $(zlibheader) $(zliblinuxheader) \ - $(libfdt) $(libfdtheader) \ - empty.c zImage.coff.lds zImage.ps3.lds zImage.lds - -quiet_cmd_bootcc = BOOTCC $@ - cmd_bootcc = $(CROSS32CC) -Wp,-MD,$(depfile) $(BOOTCFLAGS) -c -o $@ $< - -quiet_cmd_bootas = BOOTAS $@ - cmd_bootas = $(CROSS32CC) -Wp,-MD,$(depfile) $(BOOTAFLAGS) -c -o $@ $< - -quiet_cmd_bootar = BOOTAR $@ - cmd_bootar = $(CROSS32AR) -cr$(KBUILD_ARFLAGS) $@.$$$$ $(filter-out FORCE,$^); mv $@.$$$$ $@ - -$(obj-libfdt): $(obj)/%.o: $(srctree)/scripts/dtc/libfdt/%.c FORCE - $(call if_changed_dep,bootcc) -$(patsubst %.c,%.o, $(filter %.c, $(src-boot))): %.o: %.c FORCE - $(Q)mkdir -p $(dir $@) - $(call if_changed_dep,bootcc) -$(patsubst %.S,%.o, $(filter %.S, $(src-boot))): %.o: %.S FORCE - $(Q)mkdir -p $(dir $@) - $(call if_changed_dep,bootas) - -$(obj)/wrapper.a: $(obj-wlib) FORCE - $(call if_changed,bootar) - -hostprogs-y := addnote hack-coff mktree - -targets += $(patsubst $(obj)/%,%,$(obj-boot) wrapper.a) -extra-y := $(obj)/wrapper.a $(obj-plat) $(obj)/empty.o \ - $(obj)/zImage.lds $(obj)/zImage.coff.lds $(obj)/zImage.ps3.lds - -dtstree := $(srctree)/$(src)/dts - -wrapper :=$(srctree)/$(src)/wrapper -wrapperbits := $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree) \ - $(wrapper) FORCE - -############# -# Bits for building various flavours of zImage - -ifneq ($(CROSS32_COMPILE),) -CROSSWRAP := -C "$(CROSS32_COMPILE)" -else -ifneq ($(CROSS_COMPILE),) -CROSSWRAP := -C "$(CROSS_COMPILE)" -endif -endif - -# args (to if_changed): 1 = (this rule), 2 = platform, 3 = dts 4=dtb 5=initrd -quiet_cmd_wrap = WRAP $@ - cmd_wrap =$(CONFIG_SHELL) $(wrapper) -c -o $@ -p $2 $(CROSSWRAP) \ - $(if $3, -s $3)$(if $4, -d $4)$(if $5, -i $5) vmlinux - -image-$(CONFIG_PPC_PSERIES) += zImage.pseries -image-$(CONFIG_PPC_POWERNV) += zImage.pseries -image-$(CONFIG_PPC_MAPLE) += zImage.maple -image-$(CONFIG_PPC_IBM_CELL_BLADE) += zImage.pseries -image-$(CONFIG_PPC_PS3) += dtbImage.ps3 -image-$(CONFIG_PPC_CELLEB) += zImage.pseries -image-$(CONFIG_PPC_CELL_QPACE) += zImage.pseries -image-$(CONFIG_PPC_CHRP) += zImage.chrp -image-$(CONFIG_PPC_EFIKA) += zImage.chrp -image-$(CONFIG_PPC_PMAC) += zImage.pmac -image-$(CONFIG_PPC_HOLLY) += dtbImage.holly -image-$(CONFIG_PPC_PRPMC2800) += dtbImage.prpmc2800 -image-$(CONFIG_DEFAULT_UIMAGE) += uImage -image-$(CONFIG_EPAPR_BOOT) += zImage.epapr - -# -# Targets which embed a device tree blob -# -# Theses are default targets to build images which embed device tree blobs. -# They are only required on boards which do not have FDT support in firmware. -# Boards with newish u-boot firmware can use the uImage target above -# - -# Board ports in arch/powerpc/platform/40x/Kconfig -image-$(CONFIG_EP405) += dtbImage.ep405 -image-$(CONFIG_HOTFOOT) += cuImage.hotfoot -image-$(CONFIG_WALNUT) += treeImage.walnut -image-$(CONFIG_ACADIA) += cuImage.acadia -image-$(CONFIG_OBS600) += uImage.obs600 - -# Board ports in arch/powerpc/platform/44x/Kconfig -image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony -image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo -image-$(CONFIG_SAM440EP) += cuImage.sam440ep -image-$(CONFIG_SEQUOIA) += cuImage.sequoia -image-$(CONFIG_RAINIER) += cuImage.rainier -image-$(CONFIG_TAISHAN) += cuImage.taishan -image-$(CONFIG_KATMAI) += cuImage.katmai -image-$(CONFIG_WARP) += cuImage.warp -image-$(CONFIG_YOSEMITE) += cuImage.yosemite -image-$(CONFIG_ISS4xx) += treeImage.iss4xx \ - treeImage.iss4xx-mpic -image-$(CONFIG_CURRITUCK) += treeImage.currituck - -# Board ports in arch/powerpc/platform/8xx/Kconfig -image-$(CONFIG_MPC86XADS) += cuImage.mpc866ads -image-$(CONFIG_MPC885ADS) += cuImage.mpc885ads -image-$(CONFIG_PPC_EP88XC) += dtbImage.ep88xc -image-$(CONFIG_PPC_ADDER875) += cuImage.adder875-uboot \ - dtbImage.adder875-redboot - -# Board ports in arch/powerpc/platform/52xx/Kconfig -image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200 lite5200.dtb -image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200b lite5200b.dtb -image-$(CONFIG_PPC_MEDIA5200) += cuImage.media5200 media5200.dtb - -# Board ports in arch/powerpc/platform/82xx/Kconfig -image-$(CONFIG_MPC8272_ADS) += cuImage.mpc8272ads -image-$(CONFIG_PQ2FADS) += cuImage.pq2fads -image-$(CONFIG_EP8248E) += dtbImage.ep8248e - -# Board ports in arch/powerpc/platform/83xx/Kconfig -image-$(CONFIG_MPC832x_MDS) += cuImage.mpc832x_mds -image-$(CONFIG_MPC832x_RDB) += cuImage.mpc832x_rdb -image-$(CONFIG_MPC834x_ITX) += cuImage.mpc8349emitx \ - cuImage.mpc8349emitxgp -image-$(CONFIG_MPC834x_MDS) += cuImage.mpc834x_mds -image-$(CONFIG_MPC836x_MDS) += cuImage.mpc836x_mds -image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot - -# Board ports in arch/powerpc/platform/85xx/Kconfig -image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads -image-$(CONFIG_MPC8560_ADS) += cuImage.mpc8560ads -image-$(CONFIG_MPC85xx_CDS) += cuImage.mpc8541cds \ - cuImage.mpc8548cds_32b \ - cuImage.mpc8555cds -image-$(CONFIG_MPC85xx_MDS) += cuImage.mpc8568mds -image-$(CONFIG_MPC85xx_DS) += cuImage.mpc8544ds \ - cuImage.mpc8572ds -image-$(CONFIG_TQM8540) += cuImage.tqm8540 -image-$(CONFIG_TQM8541) += cuImage.tqm8541 -image-$(CONFIG_TQM8548) += cuImage.tqm8548 -image-$(CONFIG_TQM8555) += cuImage.tqm8555 -image-$(CONFIG_TQM8560) += cuImage.tqm8560 -image-$(CONFIG_SBC8548) += cuImage.sbc8548 -image-$(CONFIG_SBC8560) += cuImage.sbc8560 -image-$(CONFIG_KSI8560) += cuImage.ksi8560 - -# Board ports in arch/powerpc/platform/embedded6xx/Kconfig -image-$(CONFIG_STORCENTER) += cuImage.storcenter -image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2 -image-$(CONFIG_PPC_C2K) += cuImage.c2k -image-$(CONFIG_GAMECUBE) += dtbImage.gamecube -image-$(CONFIG_WII) += dtbImage.wii - -# Board port in arch/powerpc/platform/amigaone/Kconfig -image-$(CONFIG_AMIGAONE) += cuImage.amigaone - -# For 32-bit powermacs, build the COFF and miboot images -# as well as the ELF images. -ifeq ($(CONFIG_PPC32),y) -image-$(CONFIG_PPC_PMAC) += zImage.coff zImage.miboot -endif - -# Allow extra targets to be added to the defconfig -image-y += $(subst ",,$(CONFIG_EXTRA_TARGETS)) - -initrd- := $(patsubst zImage%, zImage.initrd%, $(image-n) $(image-)) -initrd-y := $(patsubst zImage%, zImage.initrd%, \ - $(patsubst dtbImage%, dtbImage.initrd%, \ - $(patsubst simpleImage%, simpleImage.initrd%, \ - $(patsubst treeImage%, treeImage.initrd%, $(image-y))))) -initrd-y := $(filter-out $(image-y), $(initrd-y)) -targets += $(image-y) $(initrd-y) - -$(addprefix $(obj)/, $(initrd-y)): $(obj)/ramdisk.image.gz - -# Don't put the ramdisk on the pattern rule; when its missing make will try -# the pattern rule with less dependencies that also matches (even with the -# hard dependency listed). -$(obj)/zImage.initrd.%: vmlinux $(wrapperbits) - $(call if_changed,wrap,$*,,,$(obj)/ramdisk.image.gz) - -$(obj)/zImage.%: vmlinux $(wrapperbits) - $(call if_changed,wrap,$*) - -# dtbImage% - a dtbImage is a zImage with an embedded device tree blob -$(obj)/dtbImage.initrd.%: vmlinux $(wrapperbits) $(obj)/%.dtb - $(call if_changed,wrap,$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz) - -$(obj)/dtbImage.%: vmlinux $(wrapperbits) $(obj)/%.dtb - $(call if_changed,wrap,$*,,$(obj)/$*.dtb) - -# This cannot be in the root of $(src) as the zImage rule always adds a $(obj) -# prefix -$(obj)/vmlinux.strip: vmlinux - $(STRIP) -s -R .comment $< -o $@ - -$(obj)/uImage: vmlinux $(wrapperbits) - $(call if_changed,wrap,uboot) - -$(obj)/uImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits) - $(call if_changed,wrap,uboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz) - -$(obj)/uImage.%: vmlinux $(obj)/%.dtb $(wrapperbits) - $(call if_changed,wrap,uboot-$*,,$(obj)/$*.dtb) - -$(obj)/cuImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits) - $(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz) - -$(obj)/cuImage.%: vmlinux $(obj)/%.dtb $(wrapperbits) - $(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb) - -$(obj)/simpleImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits) - $(call if_changed,wrap,simpleboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz) - -$(obj)/simpleImage.%: vmlinux $(obj)/%.dtb $(wrapperbits) - $(call if_changed,wrap,simpleboot-$*,,$(obj)/$*.dtb) - -$(obj)/treeImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits) - $(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz) - -$(obj)/treeImage.%: vmlinux $(obj)/%.dtb $(wrapperbits) - $(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb) - -# Rule to build device tree blobs -$(obj)/%.dtb: $(src)/dts/%.dts FORCE - $(call if_changed_dep,dtc) - -# If there isn't a platform selected then just strip the vmlinux. -ifeq (,$(image-y)) -image-y := vmlinux.strip -endif - -$(obj)/zImage: $(addprefix $(obj)/, $(image-y)) - @rm -f $@; ln $< $@ -$(obj)/zImage.initrd: $(addprefix $(obj)/, $(initrd-y)) - @rm -f $@; ln $< $@ - -install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y)) - sh -x $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" vmlinux System.map "$(INSTALL_PATH)" $^ - -# anything not in $(targets) -clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \ - zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \ - zImage.miboot zImage.pmac zImage.pseries \ - zImage.maple simpleImage.* otheros.bld *.dtb - -# clean up files cached by wrapper -clean-kernel := vmlinux.strip vmlinux.bin -clean-kernel += $(addsuffix .gz,$(clean-kernel)) -# If not absolute clean-files are relative to $(obj). -clean-files += $(addprefix $(objtree)/, $(clean-kernel)) - -WRAPPER_OBJDIR := /usr/lib/kernel-wrapper -WRAPPER_DTSDIR := /usr/lib/kernel-wrapper/dts -WRAPPER_BINDIR := /usr/sbin -INSTALL := install - -extra-installed := $(patsubst $(obj)/%, $(DESTDIR)$(WRAPPER_OBJDIR)/%, $(extra-y)) -hostprogs-installed := $(patsubst %, $(DESTDIR)$(WRAPPER_BINDIR)/%, $(hostprogs-y)) -wrapper-installed := $(DESTDIR)$(WRAPPER_BINDIR)/wrapper -dts-installed := $(patsubst $(dtstree)/%, $(DESTDIR)$(WRAPPER_DTSDIR)/%, $(wildcard $(dtstree)/*.dts)) - -all-installed := $(extra-installed) $(hostprogs-installed) $(wrapper-installed) $(dts-installed) - -quiet_cmd_mkdir = MKDIR $(patsubst $(INSTALL_HDR_PATH)/%,%,$@) - cmd_mkdir = mkdir -p $@ - -quiet_cmd_install = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_OBJDIR)/%,%,$@) - cmd_install = $(INSTALL) -m0644 $(patsubst $(DESTDIR)$(WRAPPER_OBJDIR)/%,$(obj)/%,$@) $@ - -quiet_cmd_install_dts = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_DTSDIR)/%,dts/%,$@) - cmd_install_dts = $(INSTALL) -m0644 $(patsubst $(DESTDIR)$(WRAPPER_DTSDIR)/%,$(srctree)/$(obj)/dts/%,$@) $@ - -quiet_cmd_install_exe = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,%,$@) - cmd_install_exe = $(INSTALL) -m0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(obj)/%,$@) $@ - -quiet_cmd_install_wrapper = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,%,$@) - cmd_install_wrapper = $(INSTALL) -m0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(srctree)/$(obj)/%,$@) $@ ;\ - sed -i $@ -e 's%^object=.*%object=$(WRAPPER_OBJDIR)%' \ - -e 's%^objbin=.*%objbin=$(WRAPPER_BINDIR)%' \ - - -$(DESTDIR)$(WRAPPER_OBJDIR) $(DESTDIR)$(WRAPPER_DTSDIR) $(DESTDIR)$(WRAPPER_BINDIR): - $(call cmd,mkdir) - -$(extra-installed) : $(DESTDIR)$(WRAPPER_OBJDIR)/% : $(obj)/% | $(DESTDIR)$(WRAPPER_OBJDIR) - $(call cmd,install) - -$(hostprogs-installed) : $(DESTDIR)$(WRAPPER_BINDIR)/% : $(obj)/% | $(DESTDIR)$(WRAPPER_BINDIR) - $(call cmd,install_exe) - -$(dts-installed) : $(DESTDIR)$(WRAPPER_DTSDIR)/% : $(srctree)/$(obj)/dts/% | $(DESTDIR)$(WRAPPER_DTSDIR) - $(call cmd,install_dts) - -$(wrapper-installed): $(DESTDIR)$(WRAPPER_BINDIR) $(srctree)/$(obj)/wrapper | $(DESTDIR)$(WRAPPER_BINDIR) - $(call cmd,install_wrapper) - -$(obj)/bootwrapper_install: $(all-installed) - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/README b/ANDROID_3.4.5/arch/powerpc/boot/README deleted file mode 100644 index 3e110587..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/README +++ /dev/null @@ -1,11 +0,0 @@ - -To extract the kernel vmlinux, System.map, .config or initrd from the zImage binary: - -objcopy -j .kernel:vmlinux -O binary zImage vmlinux.gz -objcopy -j .kernel:System.map -O binary zImage System.map.gz -objcopy -j .kernel:.config -O binary zImage config.gz -objcopy -j .kernel:initrd -O binary zImage.initrd initrd.gz - - - Peter - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/addnote.c b/ANDROID_3.4.5/arch/powerpc/boot/addnote.c deleted file mode 100644 index 349b5530..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/addnote.c +++ /dev/null @@ -1,205 +0,0 @@ -/* - * Program to hack in a PT_NOTE program header entry in an ELF file. - * This is needed for OF on RS/6000s to load an image correctly. - * Note that OF needs a program header entry for the note, not an - * ELF section. - * - * Copyright 2000 Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * Usage: addnote zImage - */ -#include <stdio.h> -#include <stdlib.h> -#include <fcntl.h> -#include <unistd.h> -#include <string.h> - -/* CHRP note section */ -static const char arch[] = "PowerPC"; - -#define N_DESCR 6 -unsigned int descr[N_DESCR] = { - 0xffffffff, /* real-mode = true */ - 0x02000000, /* real-base, i.e. where we expect OF to be */ - 0xffffffff, /* real-size */ - 0xffffffff, /* virt-base */ - 0xffffffff, /* virt-size */ - 0x4000, /* load-base */ -}; - -/* RPA note section */ -static const char rpaname[] = "IBM,RPA-Client-Config"; - -/* - * Note: setting ignore_my_client_config *should* mean that OF ignores - * all the other fields, but there is a firmware bug which means that - * it looks at the splpar field at least. So these values need to be - * reasonable. - */ -#define N_RPA_DESCR 8 -unsigned int rpanote[N_RPA_DESCR] = { - 0, /* lparaffinity */ - 64, /* min_rmo_size */ - 0, /* min_rmo_percent */ - 40, /* max_pft_size */ - 1, /* splpar */ - -1, /* min_load */ - 0, /* new_mem_def */ - 1, /* ignore_my_client_config */ -}; - -#define ROUNDUP(len) (((len) + 3) & ~3) - -unsigned char buf[512]; - -#define GET_16BE(off) ((buf[off] << 8) + (buf[(off)+1])) -#define GET_32BE(off) ((GET_16BE(off) << 16) + GET_16BE((off)+2)) - -#define PUT_16BE(off, v) (buf[off] = ((v) >> 8) & 0xff, \ - buf[(off) + 1] = (v) & 0xff) -#define PUT_32BE(off, v) (PUT_16BE((off), (v) >> 16), \ - PUT_16BE((off) + 2, (v))) - -/* Structure of an ELF file */ -#define E_IDENT 0 /* ELF header */ -#define E_PHOFF 28 -#define E_PHENTSIZE 42 -#define E_PHNUM 44 -#define E_HSIZE 52 /* size of ELF header */ - -#define EI_MAGIC 0 /* offsets in E_IDENT area */ -#define EI_CLASS 4 -#define EI_DATA 5 - -#define PH_TYPE 0 /* ELF program header */ -#define PH_OFFSET 4 -#define PH_FILESZ 16 -#define PH_HSIZE 32 /* size of program header */ - -#define PT_NOTE 4 /* Program header type = note */ - -#define ELFCLASS32 1 -#define ELFDATA2MSB 2 - -unsigned char elf_magic[4] = { 0x7f, 'E', 'L', 'F' }; - -int -main(int ac, char **av) -{ - int fd, n, i; - int ph, ps, np; - int nnote, nnote2, ns; - - if (ac != 2) { - fprintf(stderr, "Usage: %s elf-file\n", av[0]); - exit(1); - } - fd = open(av[1], O_RDWR); - if (fd < 0) { - perror(av[1]); - exit(1); - } - - nnote = 12 + ROUNDUP(strlen(arch) + 1) + sizeof(descr); - nnote2 = 12 + ROUNDUP(strlen(rpaname) + 1) + sizeof(rpanote); - - n = read(fd, buf, sizeof(buf)); - if (n < 0) { - perror("read"); - exit(1); - } - - if (n < E_HSIZE || memcmp(&buf[E_IDENT+EI_MAGIC], elf_magic, 4) != 0) - goto notelf; - - if (buf[E_IDENT+EI_CLASS] != ELFCLASS32 - || buf[E_IDENT+EI_DATA] != ELFDATA2MSB) { - fprintf(stderr, "%s is not a big-endian 32-bit ELF image\n", - av[1]); - exit(1); - } - - ph = GET_32BE(E_PHOFF); - ps = GET_16BE(E_PHENTSIZE); - np = GET_16BE(E_PHNUM); - if (ph < E_HSIZE || ps < PH_HSIZE || np < 1) - goto notelf; - if (ph + (np + 2) * ps + nnote + nnote2 > n) - goto nospace; - - for (i = 0; i < np; ++i) { - if (GET_32BE(ph + PH_TYPE) == PT_NOTE) { - fprintf(stderr, "%s already has a note entry\n", - av[1]); - exit(0); - } - ph += ps; - } - - /* XXX check that the area we want to use is all zeroes */ - for (i = 0; i < 2 * ps + nnote + nnote2; ++i) - if (buf[ph + i] != 0) - goto nospace; - - /* fill in the program header entry */ - ns = ph + 2 * ps; - PUT_32BE(ph + PH_TYPE, PT_NOTE); - PUT_32BE(ph + PH_OFFSET, ns); - PUT_32BE(ph + PH_FILESZ, nnote); - - /* fill in the note area we point to */ - /* XXX we should probably make this a proper section */ - PUT_32BE(ns, strlen(arch) + 1); - PUT_32BE(ns + 4, N_DESCR * 4); - PUT_32BE(ns + 8, 0x1275); - strcpy((char *) &buf[ns + 12], arch); - ns += 12 + strlen(arch) + 1; - for (i = 0; i < N_DESCR; ++i, ns += 4) - PUT_32BE(ns, descr[i]); - - /* fill in the second program header entry and the RPA note area */ - ph += ps; - PUT_32BE(ph + PH_TYPE, PT_NOTE); - PUT_32BE(ph + PH_OFFSET, ns); - PUT_32BE(ph + PH_FILESZ, nnote2); - - /* fill in the note area we point to */ - PUT_32BE(ns, strlen(rpaname) + 1); - PUT_32BE(ns + 4, sizeof(rpanote)); - PUT_32BE(ns + 8, 0x12759999); - strcpy((char *) &buf[ns + 12], rpaname); - ns += 12 + ROUNDUP(strlen(rpaname) + 1); - for (i = 0; i < N_RPA_DESCR; ++i, ns += 4) - PUT_32BE(ns, rpanote[i]); - - /* Update the number of program headers */ - PUT_16BE(E_PHNUM, np + 2); - - /* write back */ - lseek(fd, (long) 0, SEEK_SET); - i = write(fd, buf, n); - if (i < 0) { - perror("write"); - exit(1); - } - if (i < n) { - fprintf(stderr, "%s: write truncated\n", av[1]); - exit(1); - } - - exit(0); - - notelf: - fprintf(stderr, "%s does not appear to be an ELF file\n", av[1]); - exit(1); - - nospace: - fprintf(stderr, "sorry, I can't find space in %s to put the note\n", - av[1]); - exit(1); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/bamboo.c b/ANDROID_3.4.5/arch/powerpc/boot/bamboo.c deleted file mode 100644 index b82cacbc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/bamboo.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright IBM Corporation, 2007 - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * Based on ebony wrapper: - * Copyright 2007 David Gibson, IBM Corporation. - * - * Clocking code based on code by: - * Stefan Roese <sr@denx.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; version 2 of the License - */ -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "string.h" -#include "stdio.h" -#include "page.h" -#include "ops.h" -#include "dcr.h" -#include "4xx.h" -#include "44x.h" - -static u8 *bamboo_mac0, *bamboo_mac1; - -static void bamboo_fixups(void) -{ - unsigned long sysclk = 33333333; - - ibm440ep_fixup_clocks(sysclk, 11059200, 25000000); - ibm4xx_sdram_fixup_memsize(); - ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00); - dt_fixup_mac_address_by_alias("ethernet0", bamboo_mac0); - dt_fixup_mac_address_by_alias("ethernet1", bamboo_mac1); -} - -void bamboo_init(void *mac0, void *mac1) -{ - platform_ops.fixups = bamboo_fixups; - platform_ops.exit = ibm44x_dbcr_reset; - bamboo_mac0 = mac0; - bamboo_mac1 = mac1; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cpm-serial.c b/ANDROID_3.4.5/arch/powerpc/boot/cpm-serial.c deleted file mode 100644 index 19dc15ab..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cpm-serial.c +++ /dev/null @@ -1,294 +0,0 @@ -/* - * CPM serial console support. - * - * Copyright 2007 Freescale Semiconductor, Inc. - * Author: Scott Wood <scottwood@freescale.com> - * - * It is assumed that the firmware (or the platform file) has already set - * up the port. - */ - -#include "types.h" -#include "io.h" -#include "ops.h" -#include "page.h" - -struct cpm_scc { - u32 gsmrl; - u32 gsmrh; - u16 psmr; - u8 res1[2]; - u16 todr; - u16 dsr; - u16 scce; - u8 res2[2]; - u16 sccm; - u8 res3; - u8 sccs; - u8 res4[8]; -}; - -struct cpm_smc { - u8 res1[2]; - u16 smcmr; - u8 res2[2]; - u8 smce; - u8 res3[3]; - u8 smcm; - u8 res4[5]; -}; - -struct cpm_param { - u16 rbase; - u16 tbase; - u8 rfcr; - u8 tfcr; - u16 mrblr; - u32 rstate; - u8 res1[4]; - u16 rbptr; - u8 res2[6]; - u32 tstate; - u8 res3[4]; - u16 tbptr; - u8 res4[6]; - u16 maxidl; - u16 idlc; - u16 brkln; - u16 brkec; - u16 brkcr; - u16 rmask; - u8 res5[4]; -}; - -struct cpm_bd { - u16 sc; /* Status and Control */ - u16 len; /* Data length in buffer */ - u8 *addr; /* Buffer address in host memory */ -}; - -static void *cpcr; -static struct cpm_param *param; -static struct cpm_smc *smc; -static struct cpm_scc *scc; -static struct cpm_bd *tbdf, *rbdf; -static u32 cpm_cmd; -static void *cbd_addr; -static u32 cbd_offset; - -static void (*do_cmd)(int op); -static void (*enable_port)(void); -static void (*disable_port)(void); - -#define CPM_CMD_STOP_TX 4 -#define CPM_CMD_RESTART_TX 6 -#define CPM_CMD_INIT_RX_TX 0 - -static void cpm1_cmd(int op) -{ - while (in_be16(cpcr) & 1) - ; - - out_be16(cpcr, (op << 8) | cpm_cmd | 1); - - while (in_be16(cpcr) & 1) - ; -} - -static void cpm2_cmd(int op) -{ - while (in_be32(cpcr) & 0x10000) - ; - - out_be32(cpcr, op | cpm_cmd | 0x10000); - - while (in_be32(cpcr) & 0x10000) - ; -} - -static void smc_disable_port(void) -{ - do_cmd(CPM_CMD_STOP_TX); - out_be16(&smc->smcmr, in_be16(&smc->smcmr) & ~3); -} - -static void scc_disable_port(void) -{ - do_cmd(CPM_CMD_STOP_TX); - out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) & ~0x30); -} - -static void smc_enable_port(void) -{ - out_be16(&smc->smcmr, in_be16(&smc->smcmr) | 3); - do_cmd(CPM_CMD_RESTART_TX); -} - -static void scc_enable_port(void) -{ - out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) | 0x30); - do_cmd(CPM_CMD_RESTART_TX); -} - -static int cpm_serial_open(void) -{ - disable_port(); - - out_8(¶m->rfcr, 0x10); - out_8(¶m->tfcr, 0x10); - out_be16(¶m->mrblr, 1); - out_be16(¶m->maxidl, 0); - out_be16(¶m->brkec, 0); - out_be16(¶m->brkln, 0); - out_be16(¶m->brkcr, 0); - - rbdf = cbd_addr; - rbdf->addr = (u8 *)rbdf - 1; - rbdf->sc = 0xa000; - rbdf->len = 1; - - tbdf = rbdf + 1; - tbdf->addr = (u8 *)rbdf - 2; - tbdf->sc = 0x2000; - tbdf->len = 1; - - sync(); - out_be16(¶m->rbase, cbd_offset); - out_be16(¶m->tbase, cbd_offset + sizeof(struct cpm_bd)); - - do_cmd(CPM_CMD_INIT_RX_TX); - - enable_port(); - return 0; -} - -static void cpm_serial_putc(unsigned char c) -{ - while (tbdf->sc & 0x8000) - barrier(); - - sync(); - - tbdf->addr[0] = c; - eieio(); - tbdf->sc |= 0x8000; -} - -static unsigned char cpm_serial_tstc(void) -{ - barrier(); - return !(rbdf->sc & 0x8000); -} - -static unsigned char cpm_serial_getc(void) -{ - unsigned char c; - - while (!cpm_serial_tstc()) - ; - - sync(); - c = rbdf->addr[0]; - eieio(); - rbdf->sc |= 0x8000; - - return c; -} - -int cpm_console_init(void *devp, struct serial_console_data *scdp) -{ - void *vreg[2]; - u32 reg[2]; - int is_smc = 0, is_cpm2 = 0; - void *parent, *muram; - void *muram_addr; - unsigned long muram_offset, muram_size; - - if (dt_is_compatible(devp, "fsl,cpm1-smc-uart")) { - is_smc = 1; - } else if (dt_is_compatible(devp, "fsl,cpm2-scc-uart")) { - is_cpm2 = 1; - } else if (dt_is_compatible(devp, "fsl,cpm2-smc-uart")) { - is_cpm2 = 1; - is_smc = 1; - } - - if (is_smc) { - enable_port = smc_enable_port; - disable_port = smc_disable_port; - } else { - enable_port = scc_enable_port; - disable_port = scc_disable_port; - } - - if (is_cpm2) - do_cmd = cpm2_cmd; - else - do_cmd = cpm1_cmd; - - if (getprop(devp, "fsl,cpm-command", &cpm_cmd, 4) < 4) - return -1; - - if (dt_get_virtual_reg(devp, vreg, 2) < 2) - return -1; - - if (is_smc) - smc = vreg[0]; - else - scc = vreg[0]; - - param = vreg[1]; - - parent = get_parent(devp); - if (!parent) - return -1; - - if (dt_get_virtual_reg(parent, &cpcr, 1) < 1) - return -1; - - muram = finddevice("/soc/cpm/muram/data"); - if (!muram) - return -1; - - /* For bootwrapper-compatible device trees, we assume that the first - * entry has at least 128 bytes, and that #address-cells/#data-cells - * is one for both parent and child. - */ - - if (dt_get_virtual_reg(muram, &muram_addr, 1) < 1) - return -1; - - if (getprop(muram, "reg", reg, 8) < 8) - return -1; - - muram_offset = reg[0]; - muram_size = reg[1]; - - /* Store the buffer descriptors at the end of the first muram chunk. - * For SMC ports on CPM2-based platforms, relocate the parameter RAM - * just before the buffer descriptors. - */ - - cbd_offset = muram_offset + muram_size - 2 * sizeof(struct cpm_bd); - - if (is_cpm2 && is_smc) { - u16 *smc_base = (u16 *)param; - u16 pram_offset; - - pram_offset = cbd_offset - 64; - pram_offset = _ALIGN_DOWN(pram_offset, 64); - - disable_port(); - out_be16(smc_base, pram_offset); - param = muram_addr - muram_offset + pram_offset; - } - - cbd_addr = muram_addr - muram_offset + cbd_offset; - - scdp->open = cpm_serial_open; - scdp->putc = cpm_serial_putc; - scdp->getc = cpm_serial_getc; - scdp->tstc = cpm_serial_tstc; - - return 0; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/crt0.S b/ANDROID_3.4.5/arch/powerpc/boot/crt0.S deleted file mode 100644 index 0f7428a3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/crt0.S +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * NOTE: this code runs in 32 bit mode, is position-independent, - * and is packaged as ELF32. - */ - -#include "ppc_asm.h" - - .text - /* A procedure descriptor used when booting this as a COFF file. - * When making COFF, this comes first in the link and we're - * linked at 0x500000. - */ - .globl _zimage_start_opd -_zimage_start_opd: - .long 0x500000, 0, 0, 0 - -p_start: .long _start -p_etext: .long _etext -p_bss_start: .long __bss_start -p_end: .long _end - - .weak _platform_stack_top -p_pstack: .long _platform_stack_top - - .weak _zimage_start - .globl _zimage_start -_zimage_start: - .globl _zimage_start_lib -_zimage_start_lib: - /* Work out the offset between the address we were linked at - and the address where we're running. */ - bl .+4 -p_base: mflr r10 /* r10 now points to runtime addr of p_base */ - /* grab the link address of the dynamic section in r11 */ - addis r11,r10,(_GLOBAL_OFFSET_TABLE_-p_base)@ha - lwz r11,(_GLOBAL_OFFSET_TABLE_-p_base)@l(r11) - cmpwi r11,0 - beq 3f /* if not linked -pie */ - /* get the runtime address of the dynamic section in r12 */ - .weak __dynamic_start - addis r12,r10,(__dynamic_start-p_base)@ha - addi r12,r12,(__dynamic_start-p_base)@l - subf r11,r11,r12 /* runtime - linktime offset */ - - /* The dynamic section contains a series of tagged entries. - * We need the RELA and RELACOUNT entries. */ -RELA = 7 -RELACOUNT = 0x6ffffff9 - li r9,0 - li r0,0 -9: lwz r8,0(r12) /* get tag */ - cmpwi r8,0 - beq 10f /* end of list */ - cmpwi r8,RELA - bne 11f - lwz r9,4(r12) /* get RELA pointer in r9 */ - b 12f -11: addis r8,r8,(-RELACOUNT)@ha - cmpwi r8,RELACOUNT@l - bne 12f - lwz r0,4(r12) /* get RELACOUNT value in r0 */ -12: addi r12,r12,8 - b 9b - - /* The relocation section contains a list of relocations. - * We now do the R_PPC_RELATIVE ones, which point to words - * which need to be initialized with addend + offset. - * The R_PPC_RELATIVE ones come first and there are RELACOUNT - * of them. */ -10: /* skip relocation if we don't have both */ - cmpwi r0,0 - beq 3f - cmpwi r9,0 - beq 3f - - add r9,r9,r11 /* Relocate RELA pointer */ - mtctr r0 -2: lbz r0,4+3(r9) /* ELF32_R_INFO(reloc->r_info) */ - cmpwi r0,22 /* R_PPC_RELATIVE */ - bne 3f - lwz r12,0(r9) /* reloc->r_offset */ - lwz r0,8(r9) /* reloc->r_addend */ - add r0,r0,r11 - stwx r0,r11,r12 - addi r9,r9,12 - bdnz 2b - - /* Do a cache flush for our text, in case the loader didn't */ -3: lwz r9,p_start-p_base(r10) /* note: these are relocated now */ - lwz r8,p_etext-p_base(r10) -4: dcbf r0,r9 - icbi r0,r9 - addi r9,r9,0x20 - cmplw cr0,r9,r8 - blt 4b - sync - isync - - /* Clear the BSS */ - lwz r9,p_bss_start-p_base(r10) - lwz r8,p_end-p_base(r10) - li r0,0 -5: stw r0,0(r9) - addi r9,r9,4 - cmplw cr0,r9,r8 - blt 5b - - /* Possibly set up a custom stack */ - lwz r8,p_pstack-p_base(r10) - cmpwi r8,0 - beq 6f - lwz r1,0(r8) - li r0,0 - stwu r0,-16(r1) /* establish a stack frame */ -6: - - /* Call platform_init() */ - bl platform_init - - /* Call start */ - b start diff --git a/ANDROID_3.4.5/arch/powerpc/boot/crtsavres.S b/ANDROID_3.4.5/arch/powerpc/boot/crtsavres.S deleted file mode 100644 index f3d9b35c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/crtsavres.S +++ /dev/null @@ -1,233 +0,0 @@ -/* - * Special support for eabi and SVR4 - * - * Copyright (C) 1995, 1996, 1998, 2000, 2001 Free Software Foundation, Inc. - * Copyright 2008 Freescale Semiconductor, Inc. - * Written By Michael Meissner - * - * Based on gcc/config/rs6000/crtsavres.asm from gcc - * - * This file is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * In addition to the permissions in the GNU General Public License, the - * Free Software Foundation gives you unlimited permission to link the - * compiled version of this file with other programs, and to distribute - * those programs without any restriction coming from the use of this - * file. (The General Public License restrictions do apply in other - * respects; for example, they cover modification of the file, and - * distribution when not linked into another program.) - * - * This file is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. If not, write to - * the Free Software Foundation, 51 Franklin Street, Fifth Floor, - * Boston, MA 02110-1301, USA. - * - * As a special exception, if you link this library with files - * compiled with GCC to produce an executable, this does not cause - * the resulting executable to be covered by the GNU General Public License. - * This exception does not however invalidate any other reasons why - * the executable file might be covered by the GNU General Public License. - */ - - .file "crtsavres.S" - .section ".text" - -/* On PowerPC64 Linux, these functions are provided by the linker. */ -#ifndef __powerpc64__ - -#define _GLOBAL(name) \ - .type name,@function; \ - .globl name; \ -name: - -/* Routines for saving integer registers, called by the compiler. */ -/* Called with r11 pointing to the stack header word of the caller of the */ -/* function, just beyond the end of the integer save area. */ - -_GLOBAL(_savegpr_14) -_GLOBAL(_save32gpr_14) - stw 14,-72(11) /* save gp registers */ -_GLOBAL(_savegpr_15) -_GLOBAL(_save32gpr_15) - stw 15,-68(11) -_GLOBAL(_savegpr_16) -_GLOBAL(_save32gpr_16) - stw 16,-64(11) -_GLOBAL(_savegpr_17) -_GLOBAL(_save32gpr_17) - stw 17,-60(11) -_GLOBAL(_savegpr_18) -_GLOBAL(_save32gpr_18) - stw 18,-56(11) -_GLOBAL(_savegpr_19) -_GLOBAL(_save32gpr_19) - stw 19,-52(11) -_GLOBAL(_savegpr_20) -_GLOBAL(_save32gpr_20) - stw 20,-48(11) -_GLOBAL(_savegpr_21) -_GLOBAL(_save32gpr_21) - stw 21,-44(11) -_GLOBAL(_savegpr_22) -_GLOBAL(_save32gpr_22) - stw 22,-40(11) -_GLOBAL(_savegpr_23) -_GLOBAL(_save32gpr_23) - stw 23,-36(11) -_GLOBAL(_savegpr_24) -_GLOBAL(_save32gpr_24) - stw 24,-32(11) -_GLOBAL(_savegpr_25) -_GLOBAL(_save32gpr_25) - stw 25,-28(11) -_GLOBAL(_savegpr_26) -_GLOBAL(_save32gpr_26) - stw 26,-24(11) -_GLOBAL(_savegpr_27) -_GLOBAL(_save32gpr_27) - stw 27,-20(11) -_GLOBAL(_savegpr_28) -_GLOBAL(_save32gpr_28) - stw 28,-16(11) -_GLOBAL(_savegpr_29) -_GLOBAL(_save32gpr_29) - stw 29,-12(11) -_GLOBAL(_savegpr_30) -_GLOBAL(_save32gpr_30) - stw 30,-8(11) -_GLOBAL(_savegpr_31) -_GLOBAL(_save32gpr_31) - stw 31,-4(11) - blr - -/* Routines for restoring integer registers, called by the compiler. */ -/* Called with r11 pointing to the stack header word of the caller of the */ -/* function, just beyond the end of the integer restore area. */ - -_GLOBAL(_restgpr_14) -_GLOBAL(_rest32gpr_14) - lwz 14,-72(11) /* restore gp registers */ -_GLOBAL(_restgpr_15) -_GLOBAL(_rest32gpr_15) - lwz 15,-68(11) -_GLOBAL(_restgpr_16) -_GLOBAL(_rest32gpr_16) - lwz 16,-64(11) -_GLOBAL(_restgpr_17) -_GLOBAL(_rest32gpr_17) - lwz 17,-60(11) -_GLOBAL(_restgpr_18) -_GLOBAL(_rest32gpr_18) - lwz 18,-56(11) -_GLOBAL(_restgpr_19) -_GLOBAL(_rest32gpr_19) - lwz 19,-52(11) -_GLOBAL(_restgpr_20) -_GLOBAL(_rest32gpr_20) - lwz 20,-48(11) -_GLOBAL(_restgpr_21) -_GLOBAL(_rest32gpr_21) - lwz 21,-44(11) -_GLOBAL(_restgpr_22) -_GLOBAL(_rest32gpr_22) - lwz 22,-40(11) -_GLOBAL(_restgpr_23) -_GLOBAL(_rest32gpr_23) - lwz 23,-36(11) -_GLOBAL(_restgpr_24) -_GLOBAL(_rest32gpr_24) - lwz 24,-32(11) -_GLOBAL(_restgpr_25) -_GLOBAL(_rest32gpr_25) - lwz 25,-28(11) -_GLOBAL(_restgpr_26) -_GLOBAL(_rest32gpr_26) - lwz 26,-24(11) -_GLOBAL(_restgpr_27) -_GLOBAL(_rest32gpr_27) - lwz 27,-20(11) -_GLOBAL(_restgpr_28) -_GLOBAL(_rest32gpr_28) - lwz 28,-16(11) -_GLOBAL(_restgpr_29) -_GLOBAL(_rest32gpr_29) - lwz 29,-12(11) -_GLOBAL(_restgpr_30) -_GLOBAL(_rest32gpr_30) - lwz 30,-8(11) -_GLOBAL(_restgpr_31) -_GLOBAL(_rest32gpr_31) - lwz 31,-4(11) - blr - -/* Routines for restoring integer registers, called by the compiler. */ -/* Called with r11 pointing to the stack header word of the caller of the */ -/* function, just beyond the end of the integer restore area. */ - -_GLOBAL(_restgpr_14_x) -_GLOBAL(_rest32gpr_14_x) - lwz 14,-72(11) /* restore gp registers */ -_GLOBAL(_restgpr_15_x) -_GLOBAL(_rest32gpr_15_x) - lwz 15,-68(11) -_GLOBAL(_restgpr_16_x) -_GLOBAL(_rest32gpr_16_x) - lwz 16,-64(11) -_GLOBAL(_restgpr_17_x) -_GLOBAL(_rest32gpr_17_x) - lwz 17,-60(11) -_GLOBAL(_restgpr_18_x) -_GLOBAL(_rest32gpr_18_x) - lwz 18,-56(11) -_GLOBAL(_restgpr_19_x) -_GLOBAL(_rest32gpr_19_x) - lwz 19,-52(11) -_GLOBAL(_restgpr_20_x) -_GLOBAL(_rest32gpr_20_x) - lwz 20,-48(11) -_GLOBAL(_restgpr_21_x) -_GLOBAL(_rest32gpr_21_x) - lwz 21,-44(11) -_GLOBAL(_restgpr_22_x) -_GLOBAL(_rest32gpr_22_x) - lwz 22,-40(11) -_GLOBAL(_restgpr_23_x) -_GLOBAL(_rest32gpr_23_x) - lwz 23,-36(11) -_GLOBAL(_restgpr_24_x) -_GLOBAL(_rest32gpr_24_x) - lwz 24,-32(11) -_GLOBAL(_restgpr_25_x) -_GLOBAL(_rest32gpr_25_x) - lwz 25,-28(11) -_GLOBAL(_restgpr_26_x) -_GLOBAL(_rest32gpr_26_x) - lwz 26,-24(11) -_GLOBAL(_restgpr_27_x) -_GLOBAL(_rest32gpr_27_x) - lwz 27,-20(11) -_GLOBAL(_restgpr_28_x) -_GLOBAL(_rest32gpr_28_x) - lwz 28,-16(11) -_GLOBAL(_restgpr_29_x) -_GLOBAL(_rest32gpr_29_x) - lwz 29,-12(11) -_GLOBAL(_restgpr_30_x) -_GLOBAL(_rest32gpr_30_x) - lwz 30,-8(11) -_GLOBAL(_restgpr_31_x) -_GLOBAL(_rest32gpr_31_x) - lwz 0,4(11) - lwz 31,-4(11) - mtlr 0 - mr 1,11 - blr -#endif diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-52xx.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-52xx.c deleted file mode 100644 index 4c42ec86..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-52xx.c +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Old U-boot compatibility for MPC5200 - * - * Author: Grant Likely <grant.likely@secretlab.ca> - * - * Copyright (c) 2007 Secret Lab Technologies Ltd. - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "io.h" -#include "cuboot.h" - -#define TARGET_PPC_MPC52xx -#include "ppcboot.h" - -static bd_t bd; - -static void platform_fixups(void) -{ - void *soc, *reg; - int div; - u32 sysfreq; - - - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_mac_addresses(bd.bi_enetaddr); - dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq); - - /* Unfortunately, the specific model number is encoded in the - * soc node name in existing dts files -- once that is fixed, - * this can do a simple path lookup. - */ - soc = find_node_by_devtype(NULL, "soc"); - if (!soc) - soc = find_node_by_compatible(NULL, "fsl,mpc5200-immr"); - if (!soc) - soc = find_node_by_compatible(NULL, "fsl,mpc5200b-immr"); - if (soc) { - setprop(soc, "bus-frequency", &bd.bi_ipbfreq, - sizeof(bd.bi_ipbfreq)); - - if (!dt_xlate_reg(soc, 0, (void*)®, NULL)) - return; - div = in_8(reg + 0x204) & 0x0020 ? 8 : 4; - sysfreq = bd.bi_busfreq * div; - setprop(soc, "system-frequency", &sysfreq, sizeof(sysfreq)); - } -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - fdt_init(_dtb_start); - serial_console_init(); - platform_ops.fixups = platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-824x.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-824x.c deleted file mode 100644 index ced90c53..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-824x.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Old U-boot compatibility for 824x - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "cuboot.h" - -#define TARGET_824x -#include "ppcboot.h" - -static bd_t bd; - - -static void platform_fixups(void) -{ - void *soc; - - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_mac_addresses(bd.bi_enetaddr); - dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq); - - soc = find_node_by_devtype(NULL, "soc"); - if (soc) { - void *serial = NULL; - - setprop(soc, "bus-frequency", &bd.bi_busfreq, - sizeof(bd.bi_busfreq)); - - while ((serial = find_node_by_devtype(serial, "serial"))) { - if (get_parent(serial) != soc) - continue; - - setprop(serial, "clock-frequency", &bd.bi_busfreq, - sizeof(bd.bi_busfreq)); - } - } -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - fdt_init(_dtb_start); - serial_console_init(); - platform_ops.fixups = platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-83xx.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-83xx.c deleted file mode 100644 index 61af1c1e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-83xx.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Old U-boot compatibility for 83xx - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "cuboot.h" - -#define TARGET_83xx -#include "ppcboot.h" - -static bd_t bd; - -static void platform_fixups(void) -{ - void *soc; - - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); - dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); - dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq); - - /* Unfortunately, the specific model number is encoded in the - * soc node name in existing dts files -- once that is fixed, - * this can do a simple path lookup. - */ - soc = find_node_by_devtype(NULL, "soc"); - if (soc) { - void *serial = NULL; - - setprop(soc, "bus-frequency", &bd.bi_busfreq, - sizeof(bd.bi_busfreq)); - - while ((serial = find_node_by_devtype(serial, "serial"))) { - if (get_parent(serial) != soc) - continue; - - setprop(serial, "clock-frequency", &bd.bi_busfreq, - sizeof(bd.bi_busfreq)); - } - } -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - fdt_init(_dtb_start); - serial_console_init(); - platform_ops.fixups = platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-85xx-cpm2.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-85xx-cpm2.c deleted file mode 100644 index 723872dd..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-85xx-cpm2.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Old U-boot compatibility for 85xx - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "cuboot.h" - -#define TARGET_85xx -#define TARGET_CPM2 -#include "ppcboot.h" - -static bd_t bd; - -static void platform_fixups(void) -{ - void *devp; - - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); - dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); - dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr); - dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq); - - /* Unfortunately, the specific model number is encoded in the - * soc node name in existing dts files -- once that is fixed, - * this can do a simple path lookup. - */ - devp = find_node_by_devtype(NULL, "soc"); - if (devp) { - void *serial = NULL; - - setprop(devp, "bus-frequency", &bd.bi_busfreq, - sizeof(bd.bi_busfreq)); - - while ((serial = find_node_by_devtype(serial, "serial"))) { - if (get_parent(serial) != devp) - continue; - - setprop(serial, "clock-frequency", &bd.bi_busfreq, - sizeof(bd.bi_busfreq)); - } - } - - devp = find_node_by_compatible(NULL, "fsl,cpm2-brg"); - if (devp) - setprop(devp, "clock-frequency", &bd.bi_brgfreq, - sizeof(bd.bi_brgfreq)); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - fdt_init(_dtb_start); - serial_console_init(); - platform_ops.fixups = platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-85xx.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-85xx.c deleted file mode 100644 index 277ba4a7..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-85xx.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Old U-boot compatibility for 85xx - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "cuboot.h" - -#define TARGET_85xx -#define TARGET_HAS_ETH3 -#include "ppcboot.h" - -static bd_t bd; - -static void platform_fixups(void) -{ - void *soc; - - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); - dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); - dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr); - dt_fixup_mac_address_by_alias("ethernet3", bd.bi_enet3addr); - dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq); - - /* Unfortunately, the specific model number is encoded in the - * soc node name in existing dts files -- once that is fixed, - * this can do a simple path lookup. - */ - soc = find_node_by_devtype(NULL, "soc"); - if (soc) { - void *serial = NULL; - - setprop(soc, "bus-frequency", &bd.bi_busfreq, - sizeof(bd.bi_busfreq)); - - while ((serial = find_node_by_devtype(serial, "serial"))) { - if (get_parent(serial) != soc) - continue; - - setprop(serial, "clock-frequency", &bd.bi_busfreq, - sizeof(bd.bi_busfreq)); - } - } -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - fdt_init(_dtb_start); - serial_console_init(); - platform_ops.fixups = platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-8xx.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-8xx.c deleted file mode 100644 index c202c886..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-8xx.c +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Old U-boot compatibility for 8xx - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "cuboot.h" - -#define TARGET_8xx -#define TARGET_HAS_ETH1 -#include "ppcboot.h" - -static bd_t bd; - -static void platform_fixups(void) -{ - void *node; - - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr); - dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq); - - node = finddevice("/soc/cpm"); - if (node) - setprop(node, "clock-frequency", &bd.bi_busfreq, 4); - - node = finddevice("/soc/cpm/brg"); - if (node) - setprop(node, "clock-frequency", &bd.bi_busfreq, 4); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - fdt_init(_dtb_start); - serial_console_init(); - platform_ops.fixups = platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-acadia.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-acadia.c deleted file mode 100644 index 0634aba6..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-acadia.c +++ /dev/null @@ -1,174 +0,0 @@ -/* - * Old U-boot compatibility for Acadia - * - * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * Copyright 2008 IBM Corporation - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "io.h" -#include "dcr.h" -#include "stdio.h" -#include "4xx.h" -#include "44x.h" -#include "cuboot.h" - -#define TARGET_4xx -#include "ppcboot.h" - -static bd_t bd; - -#define CPR_PERD0_SPIDV_MASK 0x000F0000 /* SPI Clock Divider */ - -#define PLLC_SRC_MASK 0x20000000 /* PLL feedback source */ - -#define PLLD_FBDV_MASK 0x1F000000 /* PLL feedback divider value */ -#define PLLD_FWDVA_MASK 0x000F0000 /* PLL forward divider A value */ -#define PLLD_FWDVB_MASK 0x00000700 /* PLL forward divider B value */ - -#define PRIMAD_CPUDV_MASK 0x0F000000 /* CPU Clock Divisor Mask */ -#define PRIMAD_PLBDV_MASK 0x000F0000 /* PLB Clock Divisor Mask */ -#define PRIMAD_OPBDV_MASK 0x00000F00 /* OPB Clock Divisor Mask */ -#define PRIMAD_EBCDV_MASK 0x0000000F /* EBC Clock Divisor Mask */ - -#define PERD0_PWMDV_MASK 0xFF000000 /* PWM Divider Mask */ -#define PERD0_SPIDV_MASK 0x000F0000 /* SPI Divider Mask */ -#define PERD0_U0DV_MASK 0x0000FF00 /* UART 0 Divider Mask */ -#define PERD0_U1DV_MASK 0x000000FF /* UART 1 Divider Mask */ - -static void get_clocks(void) -{ - unsigned long sysclk, cpr_plld, cpr_pllc, cpr_primad, plloutb, i; - unsigned long pllFwdDiv, pllFwdDivB, pllFbkDiv, pllPlbDiv, pllExtBusDiv; - unsigned long pllOpbDiv, freqEBC, freqUART, freqOPB; - unsigned long div; /* total divisor udiv * bdiv */ - unsigned long umin; /* minimum udiv */ - unsigned short diff; /* smallest diff */ - unsigned long udiv; /* best udiv */ - unsigned short idiff; /* current diff */ - unsigned short ibdiv; /* current bdiv */ - unsigned long est; /* current estimate */ - unsigned long baud; - void *np; - - /* read the sysclk value from the CPLD */ - sysclk = (in_8((unsigned char *)0x80000000) == 0xc) ? 66666666 : 33333000; - - /* - * Read PLL Mode registers - */ - cpr_plld = CPR0_READ(DCRN_CPR0_PLLD); - cpr_pllc = CPR0_READ(DCRN_CPR0_PLLC); - - /* - * Determine forward divider A - */ - pllFwdDiv = ((cpr_plld & PLLD_FWDVA_MASK) >> 16); - - /* - * Determine forward divider B - */ - pllFwdDivB = ((cpr_plld & PLLD_FWDVB_MASK) >> 8); - if (pllFwdDivB == 0) - pllFwdDivB = 8; - - /* - * Determine FBK_DIV. - */ - pllFbkDiv = ((cpr_plld & PLLD_FBDV_MASK) >> 24); - if (pllFbkDiv == 0) - pllFbkDiv = 256; - - /* - * Read CPR_PRIMAD register - */ - cpr_primad = CPR0_READ(DCRN_CPR0_PRIMAD); - - /* - * Determine PLB_DIV. - */ - pllPlbDiv = ((cpr_primad & PRIMAD_PLBDV_MASK) >> 16); - if (pllPlbDiv == 0) - pllPlbDiv = 16; - - /* - * Determine EXTBUS_DIV. - */ - pllExtBusDiv = (cpr_primad & PRIMAD_EBCDV_MASK); - if (pllExtBusDiv == 0) - pllExtBusDiv = 16; - - /* - * Determine OPB_DIV. - */ - pllOpbDiv = ((cpr_primad & PRIMAD_OPBDV_MASK) >> 8); - if (pllOpbDiv == 0) - pllOpbDiv = 16; - - /* There is a bug in U-Boot that prevents us from using - * bd.bi_opbfreq because U-Boot doesn't populate it for - * 405EZ. We get to calculate it, yay! - */ - freqOPB = (sysclk *pllFbkDiv) /pllOpbDiv; - - freqEBC = (sysclk * pllFbkDiv) / pllExtBusDiv; - - plloutb = ((sysclk * ((cpr_pllc & PLLC_SRC_MASK) ? - pllFwdDivB : pllFwdDiv) * - pllFbkDiv) / pllFwdDivB); - - np = find_node_by_alias("serial0"); - if (getprop(np, "current-speed", &baud, sizeof(baud)) != sizeof(baud)) - fatal("no current-speed property\n\r"); - - udiv = 256; /* Assume lowest possible serial clk */ - div = plloutb / (16 * baud); /* total divisor */ - umin = (plloutb / freqOPB) << 1; /* 2 x OPB divisor */ - diff = 256; /* highest possible */ - - /* i is the test udiv value -- start with the largest - * possible (256) to minimize serial clock and constrain - * search to umin. - */ - for (i = 256; i > umin; i--) { - ibdiv = div / i; - est = i * ibdiv; - idiff = (est > div) ? (est-div) : (div-est); - if (idiff == 0) { - udiv = i; - break; /* can't do better */ - } else if (idiff < diff) { - udiv = i; /* best so far */ - diff = idiff; /* update lowest diff*/ - } - } - freqUART = plloutb / udiv; - - dt_fixup_cpu_clocks(bd.bi_procfreq, bd.bi_intfreq, bd.bi_plb_busfreq); - dt_fixup_clock("/plb/ebc", freqEBC); - dt_fixup_clock("/plb/opb", freqOPB); - dt_fixup_clock("/plb/opb/serial@ef600300", freqUART); - dt_fixup_clock("/plb/opb/serial@ef600400", freqUART); -} - -static void acadia_fixups(void) -{ - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - get_clocks(); - dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - platform_ops.fixups = acadia_fixups; - platform_ops.exit = ibm40x_dbcr_reset; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-amigaone.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-amigaone.c deleted file mode 100644 index d5029674..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-amigaone.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Old U-boot compatibility for AmigaOne - * - * Author: Gerhard Pircher (gerhard_pircher@gmx.net) - * - * Based on cuboot-83xx.c - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "cuboot.h" - -#include "ppcboot.h" - -static bd_t bd; - -static void platform_fixups(void) -{ - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - fdt_init(_dtb_start); - serial_console_init(); - platform_ops.fixups = platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-bamboo.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-bamboo.c deleted file mode 100644 index b5c30f76..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-bamboo.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Old U-boot compatibility for Bamboo - * - * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * Copyright 2007 IBM Corporation - * - * Based on cuboot-ebony.c - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "44x.h" -#include "cuboot.h" - -#define TARGET_4xx -#define TARGET_44x -#include "ppcboot.h" - -static bd_t bd; - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - bamboo_init(&bd.bi_enetaddr, &bd.bi_enet1addr); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-c2k.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-c2k.c deleted file mode 100644 index e4359495..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-c2k.c +++ /dev/null @@ -1,190 +0,0 @@ -/* - * GEFanuc C2K platform code. - * - * Author: Remi Machet <rmachet@slac.stanford.edu> - * - * Originated from prpmc2800.c - * - * 2008 (c) Stanford University - * 2007 (c) MontaVista, Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "types.h" -#include "stdio.h" -#include "io.h" -#include "ops.h" -#include "elf.h" -#include "gunzip_util.h" -#include "mv64x60.h" -#include "cuboot.h" -#include "ppcboot.h" - -static u8 *bridge_base; - -static void c2k_bridge_setup(u32 mem_size) -{ - u32 i, v[30], enables, acc_bits; - u32 pci_base_hi, pci_base_lo, size, buf[2]; - unsigned long cpu_base; - int rc; - void *devp, *mv64x60_devp; - u8 *bridge_pbase, is_coherent; - struct mv64x60_cpu2pci_win *tbl; - int bus; - - bridge_pbase = mv64x60_get_bridge_pbase(); - is_coherent = mv64x60_is_coherent(); - - if (is_coherent) - acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_WB - | MV64x60_PCI_ACC_CNTL_SWAP_NONE - | MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES - | MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES; - else - acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_NONE - | MV64x60_PCI_ACC_CNTL_SWAP_NONE - | MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES - | MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES; - - mv64x60_config_ctlr_windows(bridge_base, bridge_pbase, is_coherent); - mv64x60_devp = find_node_by_compatible(NULL, "marvell,mv64360"); - if (mv64x60_devp == NULL) - fatal("Error: Missing marvell,mv64360 device tree node\n\r"); - - enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)); - enables |= 0x007ffe00; /* Disable all cpu->pci windows */ - out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables); - - /* Get the cpu -> pci i/o & mem mappings from the device tree */ - devp = NULL; - for (bus = 0; ; bus++) { - char name[] = "pci "; - - name[strlen(name)-1] = bus+'0'; - - devp = find_node_by_alias(name); - if (devp == NULL) - break; - - if (bus >= 2) - fatal("Error: Only 2 PCI controllers are supported at" \ - " this time.\n"); - - mv64x60_config_pci_windows(bridge_base, bridge_pbase, bus, 0, - mem_size, acc_bits); - - rc = getprop(devp, "ranges", v, sizeof(v)); - if (rc == 0) - fatal("Error: Can't find marvell,mv64360-pci ranges" - " property\n\r"); - - /* Get the cpu -> pci i/o & mem mappings from the device tree */ - - for (i = 0; i < rc; i += 6) { - switch (v[i] & 0xff000000) { - case 0x01000000: /* PCI I/O Space */ - tbl = mv64x60_cpu2pci_io; - break; - case 0x02000000: /* PCI MEM Space */ - tbl = mv64x60_cpu2pci_mem; - break; - default: - continue; - } - - pci_base_hi = v[i+1]; - pci_base_lo = v[i+2]; - cpu_base = v[i+3]; - size = v[i+5]; - - buf[0] = cpu_base; - buf[1] = size; - - if (!dt_xlate_addr(devp, buf, sizeof(buf), &cpu_base)) - fatal("Error: Can't translate PCI address " \ - "0x%x\n\r", (u32)cpu_base); - - mv64x60_config_cpu2pci_window(bridge_base, bus, - pci_base_hi, pci_base_lo, cpu_base, size, tbl); - } - - enables &= ~(3<<(9+bus*5)); /* Enable cpu->pci<bus> i/o, - cpu->pci<bus> mem0 */ - out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), - enables); - }; -} - -static void c2k_fixups(void) -{ - u32 mem_size; - - mem_size = mv64x60_get_mem_size(bridge_base); - c2k_bridge_setup(mem_size); /* Do necessary bridge setup */ -} - -#define MV64x60_MPP_CNTL_0 0xf000 -#define MV64x60_MPP_CNTL_2 0xf008 -#define MV64x60_GPP_IO_CNTL 0xf100 -#define MV64x60_GPP_LEVEL_CNTL 0xf110 -#define MV64x60_GPP_VALUE_SET 0xf118 - -static void c2k_reset(void) -{ - u32 temp; - - udelay(5000000); - - if (bridge_base != 0) { - temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0)); - temp &= 0xFFFF0FFF; - out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0), temp); - - temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); - temp |= 0x00000004; - out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp); - - temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); - temp |= 0x00000004; - out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp); - - temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2)); - temp &= 0xFFFF0FFF; - out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2), temp); - - temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); - temp |= 0x00080000; - out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp); - - temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); - temp |= 0x00080000; - out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp); - - out_le32((u32 *)(bridge_base + MV64x60_GPP_VALUE_SET), - 0x00080004); - } - - for (;;); -} - -static bd_t bd; - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - - fdt_init(_dtb_start); - - bridge_base = mv64x60_get_bridge_base(); - - platform_ops.fixups = c2k_fixups; - platform_ops.exit = c2k_reset; - - if (serial_console_init() < 0) - exit(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-ebony.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-ebony.c deleted file mode 100644 index 56564ba3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-ebony.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Old U-boot compatibility for Ebony - * - * Author: David Gibson <david@gibson.dropbear.id.au> - * - * Copyright 2007 David Gibson, IBM Corporatio. - * Based on cuboot-83xx.c, which is: - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "44x.h" -#include "cuboot.h" - -#define TARGET_4xx -#define TARGET_44x -#include "ppcboot.h" - -static bd_t bd; - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - ebony_init(&bd.bi_enetaddr, &bd.bi_enet1addr); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-hotfoot.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-hotfoot.c deleted file mode 100644 index 8f697b95..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-hotfoot.c +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Old U-boot compatibility for Esteem 195E Hotfoot CPU Board - * - * Author: Solomon Peachy <solomon@linux-wlan.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "reg.h" -#include "dcr.h" -#include "4xx.h" -#include "cuboot.h" - -#define TARGET_4xx -#define TARGET_HOTFOOT - -#include "ppcboot-hotfoot.h" - -static bd_t bd; - -#define NUM_REGS 3 - -static void hotfoot_fixups(void) -{ - u32 uart = mfdcr(DCRN_CPC0_UCR) & 0x7f; - - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - - dt_fixup_cpu_clocks(bd.bi_procfreq, bd.bi_procfreq, 0); - dt_fixup_clock("/plb", bd.bi_plb_busfreq); - dt_fixup_clock("/plb/opb", bd.bi_opbfreq); - dt_fixup_clock("/plb/ebc", bd.bi_pci_busfreq); - dt_fixup_clock("/plb/opb/serial@ef600300", bd.bi_procfreq / uart); - dt_fixup_clock("/plb/opb/serial@ef600400", bd.bi_procfreq / uart); - - dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); - dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); - - /* Is this a single eth/serial board? */ - if ((bd.bi_enet1addr[0] == 0) && - (bd.bi_enet1addr[1] == 0) && - (bd.bi_enet1addr[2] == 0) && - (bd.bi_enet1addr[3] == 0) && - (bd.bi_enet1addr[4] == 0) && - (bd.bi_enet1addr[5] == 0)) { - void *devp; - - printf("Trimming devtree for single serial/eth board\n"); - - devp = finddevice("/plb/opb/serial@ef600300"); - if (!devp) - fatal("Can't find node for /plb/opb/serial@ef600300"); - del_node(devp); - - devp = finddevice("/plb/opb/ethernet@ef600900"); - if (!devp) - fatal("Can't find node for /plb/opb/ethernet@ef600900"); - del_node(devp); - } - - ibm4xx_quiesce_eth((u32 *)0xef600800, (u32 *)0xef600900); - - /* Fix up flash size in fdt for 4M boards. */ - if (bd.bi_flashsize < 0x800000) { - u32 regs[NUM_REGS]; - void *devp = finddevice("/plb/ebc/nor_flash@0"); - if (!devp) - fatal("Can't find FDT node for nor_flash!??"); - - printf("Fixing devtree for 4M Flash\n"); - - /* First fix up the base addresse */ - getprop(devp, "reg", regs, sizeof(regs)); - regs[0] = 0; - regs[1] = 0xffc00000; - regs[2] = 0x00400000; - setprop(devp, "reg", regs, sizeof(regs)); - - /* Then the offsets */ - devp = finddevice("/plb/ebc/nor_flash@0/partition@0"); - if (!devp) - fatal("Can't find FDT node for partition@0"); - getprop(devp, "reg", regs, 2*sizeof(u32)); - regs[0] -= 0x400000; - setprop(devp, "reg", regs, 2*sizeof(u32)); - - devp = finddevice("/plb/ebc/nor_flash@0/partition@1"); - if (!devp) - fatal("Can't find FDT node for partition@1"); - getprop(devp, "reg", regs, 2*sizeof(u32)); - regs[0] -= 0x400000; - setprop(devp, "reg", regs, 2*sizeof(u32)); - - devp = finddevice("/plb/ebc/nor_flash@0/partition@2"); - if (!devp) - fatal("Can't find FDT node for partition@2"); - getprop(devp, "reg", regs, 2*sizeof(u32)); - regs[0] -= 0x400000; - setprop(devp, "reg", regs, 2*sizeof(u32)); - - devp = finddevice("/plb/ebc/nor_flash@0/partition@3"); - if (!devp) - fatal("Can't find FDT node for partition@3"); - getprop(devp, "reg", regs, 2*sizeof(u32)); - regs[0] -= 0x400000; - setprop(devp, "reg", regs, 2*sizeof(u32)); - - devp = finddevice("/plb/ebc/nor_flash@0/partition@4"); - if (!devp) - fatal("Can't find FDT node for partition@4"); - getprop(devp, "reg", regs, 2*sizeof(u32)); - regs[0] -= 0x400000; - setprop(devp, "reg", regs, 2*sizeof(u32)); - - devp = finddevice("/plb/ebc/nor_flash@0/partition@6"); - if (!devp) - fatal("Can't find FDT node for partition@6"); - getprop(devp, "reg", regs, 2*sizeof(u32)); - regs[0] -= 0x400000; - setprop(devp, "reg", regs, 2*sizeof(u32)); - - /* Delete the FeatFS node */ - devp = finddevice("/plb/ebc/nor_flash@0/partition@5"); - if (!devp) - fatal("Can't find FDT node for partition@5"); - del_node(devp); - } -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - platform_ops.fixups = hotfoot_fixups; - platform_ops.exit = ibm40x_dbcr_reset; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-katmai.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-katmai.c deleted file mode 100644 index 5434d70b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-katmai.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Old U-boot compatibility for Katmai - * - * Author: Hugh Blemings <hugh@au.ibm.com> - * - * Copyright 2007 Hugh Blemings, IBM Corporation. - * Based on cuboot-ebony.c which is: - * Copyright 2007 David Gibson, IBM Corporation. - * Based on cuboot-83xx.c, which is: - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "reg.h" -#include "dcr.h" -#include "4xx.h" -#include "44x.h" -#include "cuboot.h" - -#define TARGET_4xx -#define TARGET_44x -#include "ppcboot.h" - -static bd_t bd; - -BSS_STACK(4096); - -static void katmai_fixups(void) -{ - unsigned long sysclk = 33333000; - - /* 440SP Clock logic is all but identical to 440GX - * so we just use that code for now at least - */ - ibm440spe_fixup_clocks(sysclk, 6 * 1843200, 0); - - ibm440spe_fixup_memsize(); - - dt_fixup_mac_address(0, bd.bi_enetaddr); - - ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - - platform_ops.fixups = katmai_fixups; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-kilauea.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-kilauea.c deleted file mode 100644 index 80cdad6b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-kilauea.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Old U-boot compatibility for PPC405EX. This image is already included - * a dtb. - * - * Author: Tiejun Chen <tiejun.chen@windriver.com> - * - * Copyright (C) 2009 Wind River Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "io.h" -#include "dcr.h" -#include "stdio.h" -#include "4xx.h" -#include "44x.h" -#include "cuboot.h" - -#define TARGET_4xx -#define TARGET_44x -#include "ppcboot.h" - -#define KILAUEA_SYS_EXT_SERIAL_CLOCK 11059200 /* ext. 11.059MHz clk */ - -static bd_t bd; - -static void kilauea_fixups(void) -{ - unsigned long sysclk = 33333333; - - ibm405ex_fixup_clocks(sysclk, KILAUEA_SYS_EXT_SERIAL_CLOCK); - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); - dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); - dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - platform_ops.fixups = kilauea_fixups; - platform_ops.exit = ibm40x_dbcr_reset; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-mpc7448hpc2.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-mpc7448hpc2.c deleted file mode 100644 index 1b895325..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-mpc7448hpc2.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. - * - * Author: Roy Zang <tie-fei.zang@freescale.com> - * - * Description: - * Old U-boot compatibility for mpc7448hpc2 board - * Based on the code of Scott Wood <scottwood@freescale.com> - * for 83xx and 85xx. - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#include "ops.h" -#include "stdio.h" -#include "cuboot.h" - -#define TARGET_HAS_ETH1 -#include "ppcboot.h" - -static bd_t bd; -extern char _dtb_start[], _dtb_end[]; - -static void platform_fixups(void) -{ - void *tsi; - - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr); - dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq); - tsi = find_node_by_devtype(NULL, "tsi-bridge"); - if (tsi) - setprop(tsi, "bus-frequency", &bd.bi_busfreq, - sizeof(bd.bi_busfreq)); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - fdt_init(_dtb_start); - serial_console_init(); - platform_ops.fixups = platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-pq2.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-pq2.c deleted file mode 100644 index 9c7d1342..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-pq2.c +++ /dev/null @@ -1,272 +0,0 @@ -/* - * Old U-boot compatibility for PowerQUICC II - * (a.k.a. 82xx with CPM, not the 8240 family of chips) - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "cuboot.h" -#include "io.h" -#include "fsl-soc.h" - -#define TARGET_CPM2 -#define TARGET_HAS_ETH1 -#include "ppcboot.h" - -static bd_t bd; - -struct cs_range { - u32 csnum; - u32 base; /* must be zero */ - u32 addr; - u32 size; -}; - -struct pci_range { - u32 flags; - u32 pci_addr[2]; - u32 phys_addr; - u32 size[2]; -}; - -struct cs_range cs_ranges_buf[MAX_PROP_LEN / sizeof(struct cs_range)]; -struct pci_range pci_ranges_buf[MAX_PROP_LEN / sizeof(struct pci_range)]; - -/* Different versions of u-boot put the BCSR in different places, and - * some don't set up the PCI PIC at all, so we assume the device tree is - * sane and update the BRx registers appropriately. - * - * For any node defined as compatible with fsl,pq2-localbus, - * #address/#size must be 2/1 for the localbus, and 1/1 for the parent bus. - * Ranges must be for whole chip selects. - */ -static void update_cs_ranges(void) -{ - void *bus_node, *parent_node; - u32 *ctrl_addr; - unsigned long ctrl_size; - u32 naddr, nsize; - int len; - int i; - - bus_node = finddevice("/localbus"); - if (!bus_node || !dt_is_compatible(bus_node, "fsl,pq2-localbus")) - return; - - dt_get_reg_format(bus_node, &naddr, &nsize); - if (naddr != 2 || nsize != 1) - goto err; - - parent_node = get_parent(bus_node); - if (!parent_node) - goto err; - - dt_get_reg_format(parent_node, &naddr, &nsize); - if (naddr != 1 || nsize != 1) - goto err; - - if (!dt_xlate_reg(bus_node, 0, (unsigned long *)&ctrl_addr, - &ctrl_size)) - goto err; - - len = getprop(bus_node, "ranges", cs_ranges_buf, sizeof(cs_ranges_buf)); - - for (i = 0; i < len / sizeof(struct cs_range); i++) { - u32 base, option; - int cs = cs_ranges_buf[i].csnum; - if (cs >= ctrl_size / 8) - goto err; - - if (cs_ranges_buf[i].base != 0) - goto err; - - base = in_be32(&ctrl_addr[cs * 2]); - - /* If CS is already valid, use the existing flags. - * Otherwise, guess a sane default. - */ - if (base & 1) { - base &= 0x7fff; - option = in_be32(&ctrl_addr[cs * 2 + 1]) & 0x7fff; - } else { - base = 0x1801; - option = 0x10; - } - - out_be32(&ctrl_addr[cs * 2], 0); - out_be32(&ctrl_addr[cs * 2 + 1], - option | ~(cs_ranges_buf[i].size - 1)); - out_be32(&ctrl_addr[cs * 2], base | cs_ranges_buf[i].addr); - } - - return; - -err: - printf("Bad /localbus node\r\n"); -} - -/* Older u-boots don't set PCI up properly. Update the hardware to match - * the device tree. The prefetch mem region and non-prefetch mem region - * must be contiguous in the host bus. As required by the PCI binding, - * PCI #addr/#size must be 3/2. The parent bus must be 1/1. Only - * 32-bit PCI is supported. All three region types (prefetchable mem, - * non-prefetchable mem, and I/O) must be present. - */ -static void fixup_pci(void) -{ - struct pci_range *mem = NULL, *mmio = NULL, - *io = NULL, *mem_base = NULL; - u32 *pci_regs[3]; - u8 *soc_regs; - int i, len; - void *node, *parent_node; - u32 naddr, nsize, mem_pow2, mem_mask; - - node = finddevice("/pci"); - if (!node || !dt_is_compatible(node, "fsl,pq2-pci")) - return; - - for (i = 0; i < 3; i++) - if (!dt_xlate_reg(node, i, - (unsigned long *)&pci_regs[i], NULL)) - goto err; - - soc_regs = (u8 *)fsl_get_immr(); - if (!soc_regs) - goto unhandled; - - dt_get_reg_format(node, &naddr, &nsize); - if (naddr != 3 || nsize != 2) - goto err; - - parent_node = get_parent(node); - if (!parent_node) - goto err; - - dt_get_reg_format(parent_node, &naddr, &nsize); - if (naddr != 1 || nsize != 1) - goto unhandled; - - len = getprop(node, "ranges", pci_ranges_buf, - sizeof(pci_ranges_buf)); - - for (i = 0; i < len / sizeof(struct pci_range); i++) { - u32 flags = pci_ranges_buf[i].flags & 0x43000000; - - if (flags == 0x42000000) - mem = &pci_ranges_buf[i]; - else if (flags == 0x02000000) - mmio = &pci_ranges_buf[i]; - else if (flags == 0x01000000) - io = &pci_ranges_buf[i]; - } - - if (!mem || !mmio || !io) - goto unhandled; - if (mem->size[1] != mmio->size[1]) - goto unhandled; - if (mem->size[1] & (mem->size[1] - 1)) - goto unhandled; - if (io->size[1] & (io->size[1] - 1)) - goto unhandled; - - if (mem->phys_addr + mem->size[1] == mmio->phys_addr) - mem_base = mem; - else if (mmio->phys_addr + mmio->size[1] == mem->phys_addr) - mem_base = mmio; - else - goto unhandled; - - out_be32(&pci_regs[1][0], mem_base->phys_addr | 1); - out_be32(&pci_regs[2][0], ~(mem->size[1] + mmio->size[1] - 1)); - - out_be32(&pci_regs[1][1], io->phys_addr | 1); - out_be32(&pci_regs[2][1], ~(io->size[1] - 1)); - - out_le32(&pci_regs[0][0], mem->pci_addr[1] >> 12); - out_le32(&pci_regs[0][2], mem->phys_addr >> 12); - out_le32(&pci_regs[0][4], (~(mem->size[1] - 1) >> 12) | 0xa0000000); - - out_le32(&pci_regs[0][6], mmio->pci_addr[1] >> 12); - out_le32(&pci_regs[0][8], mmio->phys_addr >> 12); - out_le32(&pci_regs[0][10], (~(mmio->size[1] - 1) >> 12) | 0x80000000); - - out_le32(&pci_regs[0][12], io->pci_addr[1] >> 12); - out_le32(&pci_regs[0][14], io->phys_addr >> 12); - out_le32(&pci_regs[0][16], (~(io->size[1] - 1) >> 12) | 0xc0000000); - - /* Inbound translation */ - out_le32(&pci_regs[0][58], 0); - out_le32(&pci_regs[0][60], 0); - - mem_pow2 = 1 << (__ilog2_u32(bd.bi_memsize - 1) + 1); - mem_mask = ~(mem_pow2 - 1) >> 12; - out_le32(&pci_regs[0][62], 0xa0000000 | mem_mask); - - /* If PCI is disabled, drive RST high to enable. */ - if (!(in_le32(&pci_regs[0][32]) & 1)) { - /* Tpvrh (Power valid to RST# high) 100 ms */ - udelay(100000); - - out_le32(&pci_regs[0][32], 1); - - /* Trhfa (RST# high to first cfg access) 2^25 clocks */ - udelay(1020000); - } - - /* Enable bus master and memory access */ - out_le32(&pci_regs[0][64], 0x80000004); - out_le32(&pci_regs[0][65], in_le32(&pci_regs[0][65]) | 6); - - /* Park the bus on PCI, and elevate PCI's arbitration priority, - * as required by section 9.6 of the user's manual. - */ - out_8(&soc_regs[0x10028], 3); - out_be32((u32 *)&soc_regs[0x1002c], 0x01236745); - - return; - -err: - printf("Bad PCI node -- using existing firmware setup.\r\n"); - return; - -unhandled: - printf("Unsupported PCI node -- using existing firmware setup.\r\n"); -} - -static void pq2_platform_fixups(void) -{ - void *node; - - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr); - dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq); - - node = finddevice("/soc/cpm"); - if (node) - setprop(node, "clock-frequency", &bd.bi_cpmfreq, 4); - - node = finddevice("/soc/cpm/brg"); - if (node) - setprop(node, "clock-frequency", &bd.bi_brgfreq, 4); - - update_cs_ranges(); - fixup_pci(); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - fdt_init(_dtb_start); - serial_console_init(); - platform_ops.fixups = pq2_platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-rainier.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-rainier.c deleted file mode 100644 index 0a3fddee..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-rainier.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Old U-boot compatibility for Rainier - * - * Valentine Barshak <vbarshak@ru.mvista.com> - * Copyright 2007 MontaVista Software, Inc - * - * Based on Ebony code by David Gibson <david@gibson.dropbear.id.au> - * Copyright IBM Corporation, 2007 - * - * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com> - * Copyright IBM Corporation, 2007 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; version 2 of the License - */ - -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "string.h" -#include "stdio.h" -#include "page.h" -#include "ops.h" -#include "dcr.h" -#include "4xx.h" -#include "44x.h" -#include "cuboot.h" - -#define TARGET_4xx -#define TARGET_44x -#include "ppcboot.h" - -static bd_t bd; - - -static void rainier_fixups(void) -{ - unsigned long sysclk = 33333333; - - ibm440ep_fixup_clocks(sysclk, 11059200, 50000000); - ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); - ibm4xx_denali_fixup_memsize(); - dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); - dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - platform_ops.fixups = rainier_fixups; - platform_ops.exit = ibm44x_dbcr_reset; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-sam440ep.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-sam440ep.c deleted file mode 100644 index ec10a474..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-sam440ep.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Old U-boot compatibility for Sam440ep based off bamboo.c code - * original copyrights below - * - * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * Copyright 2007 IBM Corporation - * - * Based on cuboot-ebony.c - * - * Modified from cuboot-bamboo.c for sam440ep: - * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "44x.h" -#include "4xx.h" -#include "cuboot.h" - -#define TARGET_4xx -#define TARGET_44x -#include "ppcboot.h" - -static bd_t bd; - -static void sam440ep_fixups(void) -{ - unsigned long sysclk = 66666666; - - ibm440ep_fixup_clocks(sysclk, 11059200, 25000000); - ibm4xx_sdram_fixup_memsize(); - ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00); - dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - platform_ops.fixups = sam440ep_fixups; - platform_ops.exit = ibm44x_dbcr_reset; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-sequoia.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-sequoia.c deleted file mode 100644 index caf8f2e8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-sequoia.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Old U-boot compatibility for Sequoia - * - * Valentine Barshak <vbarshak@ru.mvista.com> - * Copyright 2007 MontaVista Software, Inc - * - * Based on Ebony code by David Gibson <david@gibson.dropbear.id.au> - * Copyright IBM Corporation, 2007 - * - * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com> - * Copyright IBM Corporation, 2007 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; version 2 of the License - */ - -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "string.h" -#include "stdio.h" -#include "page.h" -#include "ops.h" -#include "dcr.h" -#include "4xx.h" -#include "44x.h" -#include "cuboot.h" - -#define TARGET_4xx -#define TARGET_44x -#include "ppcboot.h" - -static bd_t bd; - - -static void sequoia_fixups(void) -{ - unsigned long sysclk = 33333333; - - ibm440ep_fixup_clocks(sysclk, 11059200, 50000000); - ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); - ibm4xx_denali_fixup_memsize(); - dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); - dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - platform_ops.fixups = sequoia_fixups; - platform_ops.exit = ibm44x_dbcr_reset; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-taishan.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-taishan.c deleted file mode 100644 index 9bc906a7..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-taishan.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Old U-boot compatibility for Taishan - * - * Author: Hugh Blemings <hugh@au.ibm.com> - * - * Copyright 2007 Hugh Blemings, IBM Corporation. - * Based on cuboot-ebony.c which is: - * Copyright 2007 David Gibson, IBM Corporation. - * Based on cuboot-83xx.c, which is: - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "cuboot.h" -#include "reg.h" -#include "dcr.h" -#include "4xx.h" - -#define TARGET_4xx -#define TARGET_44x -#define TARGET_440GX -#include "ppcboot.h" - -static bd_t bd; - -BSS_STACK(4096); - -static void taishan_fixups(void) -{ - /* FIXME: sysclk should be derived by reading the FPGA - registers */ - unsigned long sysclk = 33000000; - - ibm440gx_fixup_clocks(sysclk, 6 * 1843200, 25000000); - - ibm4xx_sdram_fixup_memsize(); - - dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); - dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); - - ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - - platform_ops.fixups = taishan_fixups; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-warp.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-warp.c deleted file mode 100644 index 806df693..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-warp.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2008 PIKA Technologies - * Sean MacLennan <smaclennan@pikatech.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "4xx.h" -#include "cuboot.h" -#include "stdio.h" - -#define TARGET_4xx -#define TARGET_44x -#include "ppcboot.h" - -static bd_t bd; - -static void warp_fixups(void) -{ - ibm440ep_fixup_clocks(66000000, 11059200, 50000000); - ibm4xx_sdram_fixup_memsize(); - ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); - dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - - platform_ops.fixups = warp_fixups; - platform_ops.exit = ibm44x_dbcr_reset; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-yosemite.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot-yosemite.c deleted file mode 100644 index cc6e338c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot-yosemite.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Old U-boot compatibility for Yosemite - * - * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * Copyright 2008 IBM Corporation - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "4xx.h" -#include "44x.h" -#include "cuboot.h" - -#define TARGET_4xx -#define TARGET_44x -#include "ppcboot.h" - -static bd_t bd; - -static void yosemite_fixups(void) -{ - unsigned long sysclk = 66666666; - - ibm440ep_fixup_clocks(sysclk, 11059200, 50000000); - ibm4xx_sdram_fixup_memsize(); - ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00); - dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); - dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - CUBOOT_INIT(); - platform_ops.fixups = yosemite_fixups; - platform_ops.exit = ibm44x_dbcr_reset; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot.c b/ANDROID_3.4.5/arch/powerpc/boot/cuboot.c deleted file mode 100644 index 7768b230..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Compatibility for old (not device tree aware) U-Boot versions - * - * Author: Scott Wood <scottwood@freescale.com> - * Consolidated using macros by David Gibson <david@gibson.dropbear.id.au> - * - * Copyright 2007 David Gibson, IBM Corporation. - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" - -#include "ppcboot.h" - -void cuboot_init(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - unsigned long end_of_ram) -{ - unsigned long avail_ram = end_of_ram - (unsigned long)_end; - - loader_info.initrd_addr = r4; - loader_info.initrd_size = r4 ? r5 - r4 : 0; - loader_info.cmdline = (char *)r6; - loader_info.cmdline_len = r7 - r6; - - simple_alloc_init(_end, avail_ram - 1024*1024, 32, 64); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/cuboot.h b/ANDROID_3.4.5/arch/powerpc/boot/cuboot.h deleted file mode 100644 index cd2aa7f3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/cuboot.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef _PPC_BOOT_CUBOOT_H_ -#define _PPC_BOOT_CUBOOT_H_ - -void cuboot_init(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - unsigned long end_of_ram); - -#define CUBOOT_INIT() \ - do { \ - memcpy(&bd, (bd_t *)r3, sizeof(bd)); \ - cuboot_init(r4, r5, r6, r7, bd.bi_memstart + bd.bi_memsize); \ - } while (0) - -#endif /* _PPC_BOOT_CUBOOT_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dcr.h b/ANDROID_3.4.5/arch/powerpc/boot/dcr.h deleted file mode 100644 index cc73f7a9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dcr.h +++ /dev/null @@ -1,203 +0,0 @@ -#ifndef _PPC_BOOT_DCR_H_ -#define _PPC_BOOT_DCR_H_ - -#define mfdcr(rn) \ - ({ \ - unsigned long rval; \ - asm volatile("mfdcr %0,%1" : "=r"(rval) : "i"(rn)); \ - rval; \ - }) -#define mtdcr(rn, val) \ - asm volatile("mtdcr %0,%1" : : "i"(rn), "r"(val)) -#define mfdcrx(rn) \ - ({ \ - unsigned long rval; \ - asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \ - rval; \ - }) - -/* 440GP/440GX SDRAM controller DCRs */ -#define DCRN_SDRAM0_CFGADDR 0x010 -#define DCRN_SDRAM0_CFGDATA 0x011 - -#define SDRAM0_READ(offset) ({\ - mtdcr(DCRN_SDRAM0_CFGADDR, offset); \ - mfdcr(DCRN_SDRAM0_CFGDATA); }) -#define SDRAM0_WRITE(offset, data) ({\ - mtdcr(DCRN_SDRAM0_CFGADDR, offset); \ - mtdcr(DCRN_SDRAM0_CFGDATA, data); }) - -#define SDRAM0_B0CR 0x40 -#define SDRAM0_B1CR 0x44 -#define SDRAM0_B2CR 0x48 -#define SDRAM0_B3CR 0x4c - -static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, - SDRAM0_B2CR, SDRAM0_B3CR }; - -#define SDRAM_CONFIG_BANK_ENABLE 0x00000001 -#define SDRAM_CONFIG_SIZE_MASK 0x000e0000 -#define SDRAM_CONFIG_BANK_SIZE(reg) \ - (0x00400000 << ((reg & SDRAM_CONFIG_SIZE_MASK) >> 17)) - -/* 440GP External Bus Controller (EBC) */ -#define DCRN_EBC0_CFGADDR 0x012 -#define DCRN_EBC0_CFGDATA 0x013 -#define EBC_NUM_BANKS 8 -#define EBC_B0CR 0x00 -#define EBC_B1CR 0x01 -#define EBC_B2CR 0x02 -#define EBC_B3CR 0x03 -#define EBC_B4CR 0x04 -#define EBC_B5CR 0x05 -#define EBC_B6CR 0x06 -#define EBC_B7CR 0x07 -#define EBC_BXCR(n) (n) -#define EBC_BXCR_BAS 0xfff00000 -#define EBC_BXCR_BS 0x000e0000 -#define EBC_BXCR_BANK_SIZE(reg) \ - (0x100000 << (((reg) & EBC_BXCR_BS) >> 17)) -#define EBC_BXCR_BU 0x00018000 -#define EBC_BXCR_BU_OFF 0x00000000 -#define EBC_BXCR_BU_RO 0x00008000 -#define EBC_BXCR_BU_WO 0x00010000 -#define EBC_BXCR_BU_RW 0x00018000 -#define EBC_BXCR_BW 0x00006000 -#define EBC_B0AP 0x10 -#define EBC_B1AP 0x11 -#define EBC_B2AP 0x12 -#define EBC_B3AP 0x13 -#define EBC_B4AP 0x14 -#define EBC_B5AP 0x15 -#define EBC_B6AP 0x16 -#define EBC_B7AP 0x17 -#define EBC_BXAP(n) (0x10+(n)) -#define EBC_BEAR 0x20 -#define EBC_BESR 0x21 -#define EBC_CFG 0x23 -#define EBC_CID 0x24 - -/* 440GP Clock, PM, chip control */ -#define DCRN_CPC0_SR 0x0b0 -#define DCRN_CPC0_ER 0x0b1 -#define DCRN_CPC0_FR 0x0b2 -#define DCRN_CPC0_SYS0 0x0e0 -#define CPC0_SYS0_TUNE 0xffc00000 -#define CPC0_SYS0_FBDV_MASK 0x003c0000 -#define CPC0_SYS0_FWDVA_MASK 0x00038000 -#define CPC0_SYS0_FWDVB_MASK 0x00007000 -#define CPC0_SYS0_OPDV_MASK 0x00000c00 -#define CPC0_SYS0_EPDV_MASK 0x00000300 -/* Helper macros to compute the actual clock divider values from the - * encodings in the CPC0 register */ -#define CPC0_SYS0_FBDV(reg) \ - ((((((reg) & CPC0_SYS0_FBDV_MASK) >> 18) - 1) & 0xf) + 1) -#define CPC0_SYS0_FWDVA(reg) \ - (8 - (((reg) & CPC0_SYS0_FWDVA_MASK) >> 15)) -#define CPC0_SYS0_FWDVB(reg) \ - (8 - (((reg) & CPC0_SYS0_FWDVB_MASK) >> 12)) -#define CPC0_SYS0_OPDV(reg) \ - ((((reg) & CPC0_SYS0_OPDV_MASK) >> 10) + 1) -#define CPC0_SYS0_EPDV(reg) \ - ((((reg) & CPC0_SYS0_EPDV_MASK) >> 8) + 1) -#define CPC0_SYS0_EXTSL 0x00000080 -#define CPC0_SYS0_RW_MASK 0x00000060 -#define CPC0_SYS0_RL 0x00000010 -#define CPC0_SYS0_ZMIISL_MASK 0x0000000c -#define CPC0_SYS0_BYPASS 0x00000002 -#define CPC0_SYS0_NTO1 0x00000001 -#define DCRN_CPC0_SYS1 0x0e1 -#define DCRN_CPC0_CUST0 0x0e2 -#define DCRN_CPC0_CUST1 0x0e3 -#define DCRN_CPC0_STRP0 0x0e4 -#define DCRN_CPC0_STRP1 0x0e5 -#define DCRN_CPC0_STRP2 0x0e6 -#define DCRN_CPC0_STRP3 0x0e7 -#define DCRN_CPC0_GPIO 0x0e8 -#define DCRN_CPC0_PLB 0x0e9 -#define DCRN_CPC0_CR1 0x0ea -#define DCRN_CPC0_CR0 0x0eb -#define CPC0_CR0_SWE 0x80000000 -#define CPC0_CR0_CETE 0x40000000 -#define CPC0_CR0_U1FCS 0x20000000 -#define CPC0_CR0_U0DTE 0x10000000 -#define CPC0_CR0_U0DRE 0x08000000 -#define CPC0_CR0_U0DC 0x04000000 -#define CPC0_CR0_U1DTE 0x02000000 -#define CPC0_CR0_U1DRE 0x01000000 -#define CPC0_CR0_U1DC 0x00800000 -#define CPC0_CR0_U0EC 0x00400000 -#define CPC0_CR0_U1EC 0x00200000 -#define CPC0_CR0_UDIV_MASK 0x001f0000 -#define CPC0_CR0_UDIV(reg) \ - ((((reg) & CPC0_CR0_UDIV_MASK) >> 16) + 1) -#define DCRN_CPC0_MIRQ0 0x0ec -#define DCRN_CPC0_MIRQ1 0x0ed -#define DCRN_CPC0_JTAGID 0x0ef - -#define DCRN_MAL0_CFG 0x180 -#define MAL_RESET 0x80000000 - -/* 440EP Clock/Power-on Reset regs */ -#define DCRN_CPR0_ADDR 0xc -#define DCRN_CPR0_DATA 0xd -#define CPR0_PLLD0 0x60 -#define CPR0_OPBD0 0xc0 -#define CPR0_PERD0 0xe0 -#define CPR0_PRIMBD0 0xa0 -#define CPR0_SCPID 0x120 -#define CPR0_PLLC0 0x40 - -/* 405GP Clocking/Power Management/Chip Control regs */ -#define DCRN_CPC0_PLLMR 0xb0 -#define DCRN_405_CPC0_CR0 0xb1 -#define DCRN_405_CPC0_CR1 0xb2 -#define DCRN_405_CPC0_PSR 0xb4 - -/* 405EP Clocking/Power Management/Chip Control regs */ -#define DCRN_CPC0_PLLMR0 0xf0 -#define DCRN_CPC0_PLLMR1 0xf4 -#define DCRN_CPC0_UCR 0xf5 - -/* 440GX/405EX Clock Control reg */ -#define DCRN_CPR0_CLKUPD 0x020 -#define DCRN_CPR0_PLLC 0x040 -#define DCRN_CPR0_PLLD 0x060 -#define DCRN_CPR0_PRIMAD 0x080 -#define DCRN_CPR0_PRIMBD 0x0a0 -#define DCRN_CPR0_OPBD 0x0c0 -#define DCRN_CPR0_PERD 0x0e0 -#define DCRN_CPR0_MALD 0x100 - -#define DCRN_SDR0_CONFIG_ADDR 0xe -#define DCRN_SDR0_CONFIG_DATA 0xf - -/* SDR read/write helper macros */ -#define SDR0_READ(offset) ({\ - mtdcr(DCRN_SDR0_CONFIG_ADDR, offset); \ - mfdcr(DCRN_SDR0_CONFIG_DATA); }) -#define SDR0_WRITE(offset, data) ({\ - mtdcr(DCRN_SDR0_CONFIG_ADDR, offset); \ - mtdcr(DCRN_SDR0_CONFIG_DATA, data); }) - -#define DCRN_SDR0_UART0 0x0120 -#define DCRN_SDR0_UART1 0x0121 -#define DCRN_SDR0_UART2 0x0122 -#define DCRN_SDR0_UART3 0x0123 - - -/* CPRs read/write helper macros - based off include/asm-ppc/ibm44x.h */ - -#define DCRN_CPR0_CFGADDR 0xc -#define DCRN_CPR0_CFGDATA 0xd - -#define CPR0_READ(offset) ({\ - mtdcr(DCRN_CPR0_CFGADDR, offset); \ - mfdcr(DCRN_CPR0_CFGDATA); }) -#define CPR0_WRITE(offset, data) ({\ - mtdcr(DCRN_CPR0_CFGADDR, offset); \ - mtdcr(DCRN_CPR0_CFGDATA, data); }) - - - -#endif /* _PPC_BOOT_DCR_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/devtree.c b/ANDROID_3.4.5/arch/powerpc/boot/devtree.c deleted file mode 100644 index a7e21a35..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/devtree.c +++ /dev/null @@ -1,372 +0,0 @@ -/* - * devtree.c - convenience functions for device tree manipulation - * Copyright 2007 David Gibson, IBM Corporation. - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * Authors: David Gibson <david@gibson.dropbear.id.au> - * Scott Wood <scottwood@freescale.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "string.h" -#include "stdio.h" -#include "ops.h" - -void dt_fixup_memory(u64 start, u64 size) -{ - void *root, *memory; - int naddr, nsize, i; - u32 memreg[4]; - - root = finddevice("/"); - if (getprop(root, "#address-cells", &naddr, sizeof(naddr)) < 0) - naddr = 2; - if (naddr < 1 || naddr > 2) - fatal("Can't cope with #address-cells == %d in /\n\r", naddr); - - if (getprop(root, "#size-cells", &nsize, sizeof(nsize)) < 0) - nsize = 1; - if (nsize < 1 || nsize > 2) - fatal("Can't cope with #size-cells == %d in /\n\r", nsize); - - i = 0; - if (naddr == 2) - memreg[i++] = start >> 32; - memreg[i++] = start & 0xffffffff; - if (nsize == 2) - memreg[i++] = size >> 32; - memreg[i++] = size & 0xffffffff; - - memory = finddevice("/memory"); - if (! memory) { - memory = create_node(NULL, "memory"); - setprop_str(memory, "device_type", "memory"); - } - - printf("Memory <- <0x%x", memreg[0]); - for (i = 1; i < (naddr + nsize); i++) - printf(" 0x%x", memreg[i]); - printf("> (%ldMB)\n\r", (unsigned long)(size >> 20)); - - setprop(memory, "reg", memreg, (naddr + nsize)*sizeof(u32)); -} - -#define MHZ(x) ((x + 500000) / 1000000) - -void dt_fixup_cpu_clocks(u32 cpu, u32 tb, u32 bus) -{ - void *devp = NULL; - - printf("CPU clock-frequency <- 0x%x (%dMHz)\n\r", cpu, MHZ(cpu)); - printf("CPU timebase-frequency <- 0x%x (%dMHz)\n\r", tb, MHZ(tb)); - if (bus > 0) - printf("CPU bus-frequency <- 0x%x (%dMHz)\n\r", bus, MHZ(bus)); - - while ((devp = find_node_by_devtype(devp, "cpu"))) { - setprop_val(devp, "clock-frequency", cpu); - setprop_val(devp, "timebase-frequency", tb); - if (bus > 0) - setprop_val(devp, "bus-frequency", bus); - } - - timebase_period_ns = 1000000000 / tb; -} - -void dt_fixup_clock(const char *path, u32 freq) -{ - void *devp = finddevice(path); - - if (devp) { - printf("%s: clock-frequency <- %x (%dMHz)\n\r", path, freq, MHZ(freq)); - setprop_val(devp, "clock-frequency", freq); - } -} - -void dt_fixup_mac_address_by_alias(const char *alias, const u8 *addr) -{ - void *devp = find_node_by_alias(alias); - - if (devp) { - printf("%s: local-mac-address <-" - " %02x:%02x:%02x:%02x:%02x:%02x\n\r", alias, - addr[0], addr[1], addr[2], - addr[3], addr[4], addr[5]); - - setprop(devp, "local-mac-address", addr, 6); - } -} - -void dt_fixup_mac_address(u32 index, const u8 *addr) -{ - void *devp = find_node_by_prop_value(NULL, "linux,network-index", - (void*)&index, sizeof(index)); - - if (devp) { - printf("ENET%d: local-mac-address <-" - " %02x:%02x:%02x:%02x:%02x:%02x\n\r", index, - addr[0], addr[1], addr[2], - addr[3], addr[4], addr[5]); - - setprop(devp, "local-mac-address", addr, 6); - } -} - -void __dt_fixup_mac_addresses(u32 startindex, ...) -{ - va_list ap; - u32 index = startindex; - const u8 *addr; - - va_start(ap, startindex); - - while ((addr = va_arg(ap, const u8 *))) - dt_fixup_mac_address(index++, addr); - - va_end(ap); -} - -#define MAX_ADDR_CELLS 4 - -void dt_get_reg_format(void *node, u32 *naddr, u32 *nsize) -{ - if (getprop(node, "#address-cells", naddr, 4) != 4) - *naddr = 2; - if (getprop(node, "#size-cells", nsize, 4) != 4) - *nsize = 1; -} - -static void copy_val(u32 *dest, u32 *src, int naddr) -{ - int pad = MAX_ADDR_CELLS - naddr; - - memset(dest, 0, pad * 4); - memcpy(dest + pad, src, naddr * 4); -} - -static int sub_reg(u32 *reg, u32 *sub) -{ - int i, borrow = 0; - - for (i = MAX_ADDR_CELLS - 1; i >= 0; i--) { - int prev_borrow = borrow; - borrow = reg[i] < sub[i] + prev_borrow; - reg[i] -= sub[i] + prev_borrow; - } - - return !borrow; -} - -static int add_reg(u32 *reg, u32 *add, int naddr) -{ - int i, carry = 0; - - for (i = MAX_ADDR_CELLS - 1; i >= MAX_ADDR_CELLS - naddr; i--) { - u64 tmp = (u64)reg[i] + add[i] + carry; - carry = tmp >> 32; - reg[i] = (u32)tmp; - } - - return !carry; -} - -/* It is assumed that if the first byte of reg fits in a - * range, then the whole reg block fits. - */ -static int compare_reg(u32 *reg, u32 *range, u32 *rangesize) -{ - int i; - u32 end; - - for (i = 0; i < MAX_ADDR_CELLS; i++) { - if (reg[i] < range[i]) - return 0; - if (reg[i] > range[i]) - break; - } - - for (i = 0; i < MAX_ADDR_CELLS; i++) { - end = range[i] + rangesize[i]; - - if (reg[i] < end) - break; - if (reg[i] > end) - return 0; - } - - return reg[i] != end; -} - -/* reg must be MAX_ADDR_CELLS */ -static int find_range(u32 *reg, u32 *ranges, int nregaddr, - int naddr, int nsize, int buflen) -{ - int nrange = nregaddr + naddr + nsize; - int i; - - for (i = 0; i + nrange <= buflen; i += nrange) { - u32 range_addr[MAX_ADDR_CELLS]; - u32 range_size[MAX_ADDR_CELLS]; - - copy_val(range_addr, ranges + i, nregaddr); - copy_val(range_size, ranges + i + nregaddr + naddr, nsize); - - if (compare_reg(reg, range_addr, range_size)) - return i; - } - - return -1; -} - -/* Currently only generic buses without special encodings are supported. - * In particular, PCI is not supported. Also, only the beginning of the - * reg block is tracked; size is ignored except in ranges. - */ -static u32 prop_buf[MAX_PROP_LEN / 4]; - -static int dt_xlate(void *node, int res, int reglen, unsigned long *addr, - unsigned long *size) -{ - u32 last_addr[MAX_ADDR_CELLS]; - u32 this_addr[MAX_ADDR_CELLS]; - void *parent; - u64 ret_addr, ret_size; - u32 naddr, nsize, prev_naddr, prev_nsize; - int buflen, offset; - - parent = get_parent(node); - if (!parent) - return 0; - - dt_get_reg_format(parent, &naddr, &nsize); - - if (nsize > 2) - return 0; - - offset = (naddr + nsize) * res; - - if (reglen < offset + naddr + nsize || - MAX_PROP_LEN < (offset + naddr + nsize) * 4) - return 0; - - copy_val(last_addr, prop_buf + offset, naddr); - - ret_size = prop_buf[offset + naddr]; - if (nsize == 2) { - ret_size <<= 32; - ret_size |= prop_buf[offset + naddr + 1]; - } - - for (;;) { - prev_naddr = naddr; - prev_nsize = nsize; - node = parent; - - parent = get_parent(node); - if (!parent) - break; - - dt_get_reg_format(parent, &naddr, &nsize); - - buflen = getprop(node, "ranges", prop_buf, - sizeof(prop_buf)); - if (buflen == 0) - continue; - if (buflen < 0 || buflen > sizeof(prop_buf)) - return 0; - - offset = find_range(last_addr, prop_buf, prev_naddr, - naddr, prev_nsize, buflen / 4); - - if (offset < 0) - return 0; - - copy_val(this_addr, prop_buf + offset, prev_naddr); - - if (!sub_reg(last_addr, this_addr)) - return 0; - - copy_val(this_addr, prop_buf + offset + prev_naddr, naddr); - - if (!add_reg(last_addr, this_addr, naddr)) - return 0; - } - - if (naddr > 2) - return 0; - - ret_addr = ((u64)last_addr[2] << 32) | last_addr[3]; - - if (sizeof(void *) == 4 && - (ret_addr >= 0x100000000ULL || ret_size > 0x100000000ULL || - ret_addr + ret_size > 0x100000000ULL)) - return 0; - - *addr = ret_addr; - if (size) - *size = ret_size; - - return 1; -} - -int dt_xlate_reg(void *node, int res, unsigned long *addr, unsigned long *size) -{ - int reglen; - - reglen = getprop(node, "reg", prop_buf, sizeof(prop_buf)) / 4; - return dt_xlate(node, res, reglen, addr, size); -} - -int dt_xlate_addr(void *node, u32 *buf, int buflen, unsigned long *xlated_addr) -{ - - if (buflen > sizeof(prop_buf)) - return 0; - - memcpy(prop_buf, buf, buflen); - return dt_xlate(node, 0, buflen / 4, xlated_addr, NULL); -} - -int dt_is_compatible(void *node, const char *compat) -{ - char *buf = (char *)prop_buf; - int len, pos; - - len = getprop(node, "compatible", buf, MAX_PROP_LEN); - if (len < 0) - return 0; - - for (pos = 0; pos < len; pos++) { - if (!strcmp(buf + pos, compat)) - return 1; - - pos += strnlen(&buf[pos], len - pos); - } - - return 0; -} - -int dt_get_virtual_reg(void *node, void **addr, int nres) -{ - unsigned long xaddr; - int n; - - n = getprop(node, "virtual-reg", addr, nres * 4); - if (n > 0) - return n / 4; - - for (n = 0; n < nres; n++) { - if (!dt_xlate_reg(node, n, &xaddr, NULL)) - break; - - addr[n] = (void *)xaddr; - } - - return n; -} - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/div64.S b/ANDROID_3.4.5/arch/powerpc/boot/div64.S deleted file mode 100644 index bbcb8a4c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/div64.S +++ /dev/null @@ -1,111 +0,0 @@ -/* - * Divide a 64-bit unsigned number by a 32-bit unsigned number. - * This routine assumes that the top 32 bits of the dividend are - * non-zero to start with. - * On entry, r3 points to the dividend, which get overwritten with - * the 64-bit quotient, and r4 contains the divisor. - * On exit, r3 contains the remainder. - * - * Copyright (C) 2002 Paul Mackerras, IBM Corp. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include "ppc_asm.h" - - .globl __div64_32 -__div64_32: - lwz r5,0(r3) # get the dividend into r5/r6 - lwz r6,4(r3) - cmplw r5,r4 - li r7,0 - li r8,0 - blt 1f - divwu r7,r5,r4 # if dividend.hi >= divisor, - mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor - subf. r5,r0,r5 # dividend.hi %= divisor - beq 3f -1: mr r11,r5 # here dividend.hi != 0 - andis. r0,r5,0xc000 - bne 2f - cntlzw r0,r5 # we are shifting the dividend right - li r10,-1 # to make it < 2^32, and shifting - srw r10,r10,r0 # the divisor right the same amount, - addc r9,r4,r10 # rounding up (so the estimate cannot - andc r11,r6,r10 # ever be too large, only too small) - andc r9,r9,r10 - addze r9,r9 - or r11,r5,r11 - rotlw r9,r9,r0 - rotlw r11,r11,r0 - divwu r11,r11,r9 # then we divide the shifted quantities -2: mullw r10,r11,r4 # to get an estimate of the quotient, - mulhwu r9,r11,r4 # multiply the estimate by the divisor, - subfc r6,r10,r6 # take the product from the divisor, - add r8,r8,r11 # and add the estimate to the accumulated - subfe. r5,r9,r5 # quotient - bne 1b -3: cmplw r6,r4 - blt 4f - divwu r0,r6,r4 # perform the remaining 32-bit division - mullw r10,r0,r4 # and get the remainder - add r8,r8,r0 - subf r6,r10,r6 -4: stw r7,0(r3) # return the quotient in *r3 - stw r8,4(r3) - mr r3,r6 # return the remainder in r3 - blr - -/* - * Extended precision shifts. - * - * Updated to be valid for shift counts from 0 to 63 inclusive. - * -- Gabriel - * - * R3/R4 has 64 bit value - * R5 has shift count - * result in R3/R4 - * - * ashrdi3: arithmetic right shift (sign propagation) - * lshrdi3: logical right shift - * ashldi3: left shift - */ - .globl __ashrdi3 -__ashrdi3: - subfic r6,r5,32 - srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count - addi r7,r5,32 # could be xori, or addi with -32 - slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count) - rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0 - sraw r7,r3,r7 # t2 = MSW >> (count-32) - or r4,r4,r6 # LSW |= t1 - slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2 - sraw r3,r3,r5 # MSW = MSW >> count - or r4,r4,r7 # LSW |= t2 - blr - - .globl __ashldi3 -__ashldi3: - subfic r6,r5,32 - slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count - addi r7,r5,32 # could be xori, or addi with -32 - srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count) - slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32) - or r3,r3,r6 # MSW |= t1 - slw r4,r4,r5 # LSW = LSW << count - or r3,r3,r7 # MSW |= t2 - blr - - .globl __lshrdi3 -__lshrdi3: - subfic r6,r5,32 - srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count - addi r7,r5,32 # could be xori, or addi with -32 - slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count) - srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32) - or r4,r4,r6 # LSW |= t1 - srw r3,r3,r5 # MSW = MSW >> count - or r4,r4,r7 # LSW |= t2 - blr diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/a4m072.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/a4m072.dts deleted file mode 100644 index fabe7b7d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/a4m072.dts +++ /dev/null @@ -1,168 +0,0 @@ -/* - * a4m072 board Device Tree Source - * - * Copyright (C) 2011 DENX Software Engineering GmbH - * Heiko Schocher <hs@denx.de> - * - * Copyright (C) 2007 Semihalf - * Marian Balakowicz <m8@semihalf.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "anonymous,a4m072"; - compatible = "anonymous,a4m072"; - - soc5200@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc5200b-immr"; - ranges = <0 0xf0000000 0x0000c000>; - reg = <0xf0000000 0x00000100>; - bus-frequency = <0>; /* From boot loader */ - system-frequency = <0>; /* From boot loader */ - - cdm@200 { - fsl,init-ext-48mhz-en = <0x0>; - fsl,init-fd-enable = <0x01>; - fsl,init-fd-counters = <0x3333>; - }; - - timer@600 { - fsl,has-wdt; - }; - - gpt3: timer@630 { /* General Purpose Timer in GPIO mode */ - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt4: timer@640 { /* General Purpose Timer in GPIO mode */ - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt5: timer@650 { /* General Purpose Timer in GPIO mode */ - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - spi@f00 { - status = "disabled"; - }; - - psc@2000 { - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - reg = <0x2000 0x100>; - interrupts = <2 1 0>; - }; - - psc@2200 { - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - reg = <0x2200 0x100>; - interrupts = <2 2 0>; - }; - - psc@2400 { - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - reg = <0x2400 0x100>; - interrupts = <2 3 0>; - }; - - psc@2600 { - status = "disabled"; - }; - - psc@2800 { - status = "disabled"; - }; - - psc@2c00 { - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - reg = <0x2c00 0x100>; - interrupts = <2 4 0>; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@1f { - reg = <0x1f>; - interrupts = <1 2 0>; /* IRQ 2 active low */ - }; - }; - - i2c@3d00 { - status = "disabled"; - }; - - i2c@3d40 { - hwmon@2e { - compatible = "nsc,lm87"; - reg = <0x2e>; - }; - rtc@51 { - compatible = "nxp,rtc8564"; - reg = <0x51>; - }; - }; - }; - - localbus { - compatible = "fsl,mpc5200b-lpb","simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0xfe000000 0x02000000 - 1 0 0x62000000 0x00400000 - 2 0 0x64000000 0x00200000 - 3 0 0x66000000 0x01000000 - 6 0 0x68000000 0x01000000 - 7 0 0x6a000000 0x00000004>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - bank-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - }; - sram0@1,0 { - compatible = "mtd-ram"; - reg = <1 0x00000 0x00400000>; - bank-width = <2>; - }; - }; - - pci@f0000d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "fsl,mpc5200-pci"; - reg = <0xf0000d00 0x100>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x16 */ - 0xc000 0 0 1 &mpc5200_pic 1 3 3 - 0xc000 0 0 2 &mpc5200_pic 1 3 3 - 0xc000 0 0 3 &mpc5200_pic 1 3 3 - 0xc000 0 0 4 &mpc5200_pic 1 3 3>; - clock-frequency = <0>; /* From boot loader */ - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/acadia.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/acadia.dts deleted file mode 100644 index 57291f61..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/acadia.dts +++ /dev/null @@ -1,224 +0,0 @@ -/* - * Device Tree Source for AMCC Acadia (405EZ) - * - * Copyright IBM Corp. 2008 - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "amcc,acadia"; - compatible = "amcc,acadia"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405EZ"; - reg = <0x0>; - clock-frequency = <0>; /* Filled in by wrapper */ - timebase-frequency = <0>; /* Filled in by wrapper */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; - d-cache-size = <16384>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; /* Filled in by wrapper */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic-405ez", "ibm,uic"; - interrupt-controller; - dcr-reg = <0x0c0 0x009>; - cell-index = <0>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - plb { - compatible = "ibm,plb-405ez", "ibm,plb3"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by wrapper */ - - MAL0: mcmal { - compatible = "ibm,mcmal-405ez", "ibm,mcmal"; - dcr-reg = <0x380 0x62>; - num-tx-chans = <1>; - num-rx-chans = <1>; - interrupt-parent = <&UIC0>; - /* 405EZ has only 3 interrupts to the UIC, as - * SERR, TXDE, and RXDE are or'd together into - * one UIC bit - */ - interrupts = < - 0x13 0x4 /* TXEOB */ - 0x15 0x4 /* RXEOB */ - 0x12 0x4 /* SERR, TXDE, RXDE */>; - }; - - POB0: opb { - compatible = "ibm,opb-405ez", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - dcr-reg = <0x0a 0x05>; - clock-frequency = <0>; /* Filled in by wrapper */ - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x8>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by wrapper */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x5 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x8>; - clock-frequency = <0>; /* Filled in by wrapper */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x6 0x4>; - }; - - IIC: i2c@ef600500 { - compatible = "ibm,iic-405ez", "ibm,iic"; - reg = <0xef600500 0x11>; - interrupt-parent = <&UIC0>; - interrupts = <0xa 0x4>; - }; - - GPIO0: gpio@ef600700 { - compatible = "ibm,gpio-405ez"; - reg = <0xef600700 0x20>; - }; - - GPIO1: gpio@ef600800 { - compatible = "ibm,gpio-405ez"; - reg = <0xef600800 0x20>; - }; - - EMAC0: ethernet@ef600900 { - device_type = "network"; - compatible = "ibm,emac-405ez", "ibm,emac"; - interrupt-parent = <&UIC0>; - interrupts = < - 0x10 0x4 /* Ethernet */ - 0x11 0x4 /* Ethernet Wake up */>; - local-mac-address = [000000000000]; /* Filled in by wrapper */ - reg = <0xef600900 0x70>; - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "mii"; - phy-map = <0x0>; - }; - - CAN0: can@ef601000 { - compatible = "amcc,can-405ez"; - reg = <0xef601000 0x620>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - CAN1: can@ef601800 { - compatible = "amcc,can-405ez"; - reg = <0xef601800 0x620>; - interrupt-parent = <&UIC0>; - interrupts = <0x8 0x4>; - }; - - cameleon@ef602000 { - compatible = "amcc,cameleon-405ez"; - reg = <0xef602000 0x800>; - interrupt-parent = <&UIC0>; - interrupts = <0xb 0x4 0xc 0x4>; - }; - - ieee1588@ef602800 { - compatible = "amcc,ieee1588-405ez"; - reg = <0xef602800 0x60>; - interrupt-parent = <&UIC0>; - interrupts = <0x4 0x4>; - /* This thing is a bit weird. It has it's own UIC - * that it uses to generate snapshot triggers. We - * don't really support this device yet, and it needs - * work to figure this out. - */ - dcr-reg = <0xe0 0x9>; - }; - - usb@ef603000 { - compatible = "ohci-be"; - reg = <0xef603000 0x80>; - interrupts-parent = <&UIC0>; - interrupts = <0xd 0x4 0xe 0x4>; - }; - - dac@ef603300 { - compatible = "amcc,dac-405ez"; - reg = <0xef603300 0x40>; - interrupt-parent = <&UIC0>; - interrupts = <0x18 0x4>; - }; - - adc@ef603400 { - compatible = "amcc,adc-405ez"; - reg = <0xef603400 0x40>; - interrupt-parent = <&UIC0>; - interrupts = <0x17 0x4>; - }; - - spi@ef603500 { - compatible = "amcc,spi-405ez"; - reg = <0xef603500 0x100>; - interrupt-parent = <&UIC0>; - interrupts = <0x9 0x4>; - }; - }; - - EBC0: ebc { - compatible = "ibm,ebc-405ez", "ibm,ebc"; - dcr-reg = <0x12 0x2>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by wrapper */ - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/adder875-redboot.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/adder875-redboot.dts deleted file mode 100644 index 28e9cd3d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/adder875-redboot.dts +++ /dev/null @@ -1,185 +0,0 @@ -/* - * Device Tree Source for MPC885 ADS running RedBoot - * - * Copyright 2006 MontaVista Software, Inc. - * Copyright 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; -/ { - model = "Analogue & Micro Adder MPC875"; - compatible = "analogue-and-micro,adder875"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - console = &console; - ethernet0 = ð0; - ethernet1 = ð1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,875@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <16>; - i-cache-line-size = <16>; - d-cache-size = <8192>; - i-cache-size = <8192>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - interrupts = <15 2>; // decrementer interrupt - interrupt-parent = <&PIC>; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0x01000000>; - }; - - localbus@fa200100 { - compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xfa200100 0x40>; - - ranges = < - 0 0 0xfe000000 0x00800000 - 2 0 0xfa100000 0x00008000 - >; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x800000>; - bank-width = <2>; - device-width = <2>; - }; - }; - - soc@fa200000 { - compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0xfa200000 0x00004000>; - - // Temporary until code stops depending on it. - device_type = "soc"; - - // Temporary until get_immrbase() is fixed. - reg = <0xfa200000 0x4000>; - - mdio@e00 { - compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio"; - reg = <0xe00 0x188>; - #address-cells = <1>; - #size-cells = <0>; - - PHY0: ethernet-phy@0 { - reg = <0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - reg = <1>; - device_type = "ethernet-phy"; - }; - }; - - eth0: ethernet@e00 { - device_type = "network"; - compatible = "fsl,mpc875-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0xe00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <3 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - }; - - eth1: ethernet@1e00 { - device_type = "network"; - compatible = "fsl,mpc875-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0x1e00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <7 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - }; - - PIC: interrupt-controller@0 { - interrupt-controller; - #interrupt-cells = <2>; - reg = <0 0x24>; - compatible = "fsl,mpc875-pic", "fsl,pq1-pic"; - }; - - cpm@9c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus"; - interrupts = <0>; // cpm error interrupt - interrupt-parent = <&CPM_PIC>; - reg = <0x9c0 0x40>; - ranges; - - muram { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x2000 0x2000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x1c00>; - }; - }; - - brg@9f0 { - compatible = "fsl,mpc875-brg", - "fsl,cpm1-brg", - "fsl,cpm-brg"; - clock-frequency = <50000000>; - reg = <0x9f0 0x10>; - }; - - CPM_PIC: interrupt-controller@930 { - interrupt-controller; - #interrupt-cells = <1>; - interrupts = <5 2 0 2>; - interrupt-parent = <&PIC>; - reg = <0x930 0x20>; - compatible = "fsl,mpc875-cpm-pic", - "fsl,cpm1-pic"; - }; - - console: serial@a80 { - device_type = "serial"; - compatible = "fsl,mpc875-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa80 0x10 0x3e80 0x40>; - interrupts = <4>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x0090>; - current-speed = <115200>; - }; - }; - }; - - chosen { - linux,stdout-path = &console; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/adder875-uboot.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/adder875-uboot.dts deleted file mode 100644 index 54fb60ec..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/adder875-uboot.dts +++ /dev/null @@ -1,184 +0,0 @@ -/* - * Device Tree Source for MPC885 ADS running U-Boot - * - * Copyright 2006 MontaVista Software, Inc. - * Copyright 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; -/ { - model = "Analogue & Micro Adder MPC875"; - compatible = "analogue-and-micro,adder875"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - console = &console; - ethernet0 = ð0; - ethernet1 = ð1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,875@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <16>; - i-cache-line-size = <16>; - d-cache-size = <8192>; - i-cache-size = <8192>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - interrupts = <15 2>; // decrementer interrupt - interrupt-parent = <&PIC>; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0x01000000>; - }; - - localbus@ff000100 { - compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xff000100 0x40>; - - ranges = < - 0 0 0xfe000000 0x01000000 - >; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x800000>; - bank-width = <2>; - device-width = <2>; - }; - }; - - soc@ff000000 { - compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0xff000000 0x00004000>; - - // Temporary until code stops depending on it. - device_type = "soc"; - - // Temporary until get_immrbase() is fixed. - reg = <0xff000000 0x4000>; - - mdio@e00 { - compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio"; - reg = <0xe00 0x188>; - #address-cells = <1>; - #size-cells = <0>; - - PHY0: ethernet-phy@0 { - reg = <0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - reg = <1>; - device_type = "ethernet-phy"; - }; - }; - - eth0: ethernet@e00 { - device_type = "network"; - compatible = "fsl,mpc875-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0xe00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <3 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - }; - - eth1: ethernet@1e00 { - device_type = "network"; - compatible = "fsl,mpc875-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0x1e00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <7 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - }; - - PIC: interrupt-controller@0 { - interrupt-controller; - #interrupt-cells = <2>; - reg = <0 0x24>; - compatible = "fsl,mpc875-pic", "fsl,pq1-pic"; - }; - - cpm@9c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus"; - interrupts = <0>; // cpm error interrupt - interrupt-parent = <&CPM_PIC>; - reg = <0x9c0 0x40>; - ranges; - - muram { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x2000 0x2000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x1c00>; - }; - }; - - brg@9f0 { - compatible = "fsl,mpc875-brg", - "fsl,cpm1-brg", - "fsl,cpm-brg"; - clock-frequency = <50000000>; - reg = <0x9f0 0x10>; - }; - - CPM_PIC: interrupt-controller@930 { - interrupt-controller; - #interrupt-cells = <1>; - interrupts = <5 2 0 2>; - interrupt-parent = <&PIC>; - reg = <0x930 0x20>; - compatible = "fsl,mpc875-cpm-pic", - "fsl,cpm1-pic"; - }; - - console: serial@a80 { - device_type = "serial"; - compatible = "fsl,mpc875-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa80 0x10 0x3e80 0x40>; - interrupts = <4>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x0090>; - current-speed = <115200>; - }; - }; - }; - - chosen { - linux,stdout-path = &console; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/amigaone.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/amigaone.dts deleted file mode 100644 index 49ac36b1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/amigaone.dts +++ /dev/null @@ -1,173 +0,0 @@ -/* - * AmigaOne Device Tree Source - * - * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "AmigaOne"; - compatible = "eyetech,amigaone"; - coherency-off; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #cpus = <1>; - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // 33.3 MHz, from U-boot - clock-frequency = <0>; // From U-boot - bus-frequency = <0>; // From U-boot - }; - }; - - memory { - device_type = "memory"; - reg = <0 0>; // From U-boot - }; - - pci@80000000 { - device_type = "pci"; - compatible = "mai-logic,articia-s"; - bus-frequency = <33333333>; - bus-range = <0 0xff>; - ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000 // PCI I/O - 0x02000000 0 0x80000000 0x80000000 0 0x7d000000 // PCI memory - 0x02000000 0 0x00000000 0xfd000000 0 0x01000000>; // PCI alias memory (ISA) - // Configuration address and data register. - reg = <0xfec00cf8 4 - 0xfee00cfc 4>; - 8259-interrupt-acknowledge = <0xfef00000>; - // Do not define a interrupt-parent here, if there is no - // interrupt-map property. - #address-cells = <3>; - #size-cells = <2>; - - isa@7 { - device_type = "isa"; - compatible = "pciclass,0601"; - vendor-id = <0x00001106>; - device-id = <0x00000686>; - revision-id = <0x00000010>; - class-code = <0x00060100>; - subsystem-id = <0>; - subsystem-vendor-id = <0>; - devsel-speed = <0x00000001>; - min-grant = <0>; - max-latency = <0>; - /* First 4k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */ - ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>; - interrupt-parent = <&i8259>; - #interrupt-cells = <2>; - #address-cells = <2>; - #size-cells = <1>; - - dma-controller@0 { - compatible = "pnpPNP,200"; - reg = <1 0x00000000 0x00000020 - 1 0x00000080 0x00000010 - 1 0x000000c0 0x00000020>; - }; - - i8259: interrupt-controller@20 { - device_type = "interrupt-controller"; - compatible = "pnpPNP,000"; - interrupt-controller; - reg = <1 0x00000020 0x00000002 - 1 0x000000a0 0x00000002 - 1 0x000004d0 0x00000002>; - reserved-interrupts = <2>; - #interrupt-cells = <2>; - }; - - timer@40 { - // Also adds pcspkr to platform devices. - compatible = "pnpPNP,100"; - reg = <1 0x00000040 0x00000020>; - }; - - 8042@60 { - device_type = "8042"; - reg = <1 0x00000060 0x00000001 - 1 0x00000064 0x00000001>; - interrupts = <1 3 12 3>; - #address-cells = <1>; - #size-cells = <0>; - - keyboard@0 { - compatible = "pnpPNP,303"; - reg = <0>; - }; - - mouse@1 { - compatible = "pnpPNP,f03"; - reg = <1>; - }; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <1 0x00000070 0x00000002>; - interrupts = <8 3>; - }; - - serial@3f8 { - device_type = "serial"; - compatible = "pnpPNP,501","pnpPNP,500"; - reg = <1 0x000003f8 0x00000008>; - interrupts = <4 3>; - clock-frequency = <1843200>; - current-speed = <115200>; - }; - - serial@2f8 { - device_type = "serial"; - compatible = "pnpPNP,501","pnpPNP,500"; - reg = <1 0x000002f8 0x00000008>; - interrupts = <3 3>; - clock-frequency = <1843200>; - current-speed = <115200>; - }; - - parallel@378 { - device_type = "parallel"; - // No ECP support for now, otherwise add "pnpPNP,401". - compatible = "pnpPNP,400"; - reg = <1 0x00000378 0x00000003 - 1 0x00000778 0x00000003>; - }; - - fdc@3f0 { - device_type = "fdc"; - compatible = "pnpPNP,700"; - reg = <1 0x000003f0 0x00000008>; - interrupts = <6 3>; - #address-cells = <1>; - #size-cells = <0>; - - disk@0 { - reg = <0>; - }; - }; - }; - }; - - chosen { - linux,stdout-path = "/pci@80000000/isa@7/serial@3f8"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/arches.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/arches.dts deleted file mode 100644 index 30f41204..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/arches.dts +++ /dev/null @@ -1,355 +0,0 @@ -/* - * Device Tree Source for AMCC Arches (dual 460GT board) - * - * (C) Copyright 2008 Applied Micro Circuits Corporation - * Victor Gallardo <vgallardo@amcc.com> - * Adam Graham <agraham@amcc.com> - * - * Based on the glacier.dts file - * Stefan Roese <sr@denx.de> - * Copyright 2008 DENX Software Engineering - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,arches"; - compatible = "amcc,arches"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - ethernet2 = &EMAC2; - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,460GT"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - next-level-cache = <&L2C0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-460gt"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-460gt"; - dcr-reg = <0x00c 0x002>; - }; - - L2C0: l2c { - compatible = "ibm,l2-cache-460gt", "ibm,l2-cache"; - dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ - 0x030 0x008>; /* L2 cache DCR's */ - cache-line-size = <32>; /* 32 bytes */ - cache-size = <262144>; /* L2, 256K */ - interrupt-parent = <&UIC1>; - interrupts = <11 1>; - }; - - plb { - compatible = "ibm,plb-460gt", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - CRYPTO: crypto@180000 { - compatible = "amcc,ppc460gt-crypto", "amcc,ppc4xx-crypto"; - reg = <4 0x00180000 0x80400>; - interrupt-parent = <&UIC0>; - interrupts = <0x1d 0x4>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <3>; - num-rx-chans = <24>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-parent = <&UIC2>; - interrupts = < /*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x3 0x4 - /*TXDE*/ 0x4 0x4 - /*RXDE*/ 0x5 0x4>; - desc-base-addr-high = <0x8>; - }; - - POB0: opb { - compatible = "ibm,opb-460gt", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-460gt", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x6 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl256n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x02000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00200000>; - }; - partition@400000 { - label = "user"; - reg = <0x00400000 0x01b60000>; - }; - partition@1f60000 { - label = "env"; - reg = <0x01f60000 0x00040000>; - }; - partition@1fa0000 { - label = "u-boot"; - reg = <0x01fa0000 0x00060000>; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC1>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-460gt", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - sttm@4a { - compatible = "ad,ad7414"; - reg = <0x4a>; - interrupt-parent = <&UIC1>; - interrupts = <0x0 0x8>; - }; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-460gt", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - TAH0: emac-tah@ef601350 { - compatible = "ibm,tah-460gt", "ibm,tah"; - reg = <0xef601350 0x00000030>; - }; - - TAH1: emac-tah@ef601450 { - compatible = "ibm,tah-460gt", "ibm,tah"; - reg = <0xef601450 0x00000030>; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 - /*Wake*/ 0x1 &UIC2 0x14 0x4>; - reg = <0xef600e00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "sgmii"; - phy-map = <0xffffffff>; - gpcs-address = <0x0000000a>; - tah-device = <&TAH0>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 - /*Wake*/ 0x1 &UIC2 0x15 0x4>; - reg = <0xef600f00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <8>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "sgmii"; - phy-map = <0x00000000>; - gpcs-address = <0x0000000b>; - tah-device = <&TAH1>; - tah-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - - EMAC2: ethernet@ef601100 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC2>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4 - /*Wake*/ 0x1 &UIC2 0x16 0x4>; - reg = <0xef601100 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <2>; - mal-rx-channel = <16>; - cell-index = <2>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; /* emac2&3 only */ - phy-mode = "sgmii"; - phy-map = <0x00000001>; - gpcs-address = <0x0000000C>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/asp834x-redboot.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/asp834x-redboot.dts deleted file mode 100644 index 227290db..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/asp834x-redboot.dts +++ /dev/null @@ -1,312 +0,0 @@ -/* - * Analogue & Micro ASP8347 Device Tree Source - * - * Copyright 2008 Codehermit - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "Analogue & Micro ASP8347E"; - compatible = "analogue-and-micro,asp8347e"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8347@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x8000000>; // 128MB at 0 - }; - - localbus@ff005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8347e-localbus", - "fsl,pq2pro-localbus", - "simple-bus"; - reg = <0xff005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - ranges = < - 0 0 0xf0000000 0x02000000 - >; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - bank-width = <2>; - device-width = <2>; - }; - }; - - soc8349@ff000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xff000000 0x00100000>; - reg = <0xff000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8347-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - /* phy type (ULPI or SERIAL) are only types supported for MPH */ - /* port = 0 or 1 */ - usb@22000 { - compatible = "fsl-usb2-mph"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <39 0x8>; - phy_type = "ulpi"; - port0; - }; - /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "otg"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 08 e5 11 32 33 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - linux,network-index = <0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 08 e5 11 32 34 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - linux,network-index = <1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <400000000>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <400000000>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - /* May need to remove if on a part without crypto engine */ - crypto@30000 { - device_type = "crypto"; - model = "SEC2"; - compatible = "talitos"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x0000007e>; - /* desc mask is for rev2.0, - * we need runtime fixup for >2.0 */ - descriptor-types-mask = <0x01010ebf>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - }; - - chosen { - bootargs = "console=ttyS0,38400 root=/dev/mtdblock3 rootfstype=jffs2"; - linux,stdout-path = &serial0; - }; - -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/bamboo.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/bamboo.dts deleted file mode 100644 index aa68911f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/bamboo.dts +++ /dev/null @@ -1,300 +0,0 @@ -/* - * Device Tree Source for AMCC Bamboo - * - * Copyright (c) 2006, 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * FIXME: Draft only! - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,bamboo"; - compatible = "amcc,bamboo"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - serial3 = &UART3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440EP"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440ep"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440ep"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - DMA0: dma { - compatible = "ibm,dma-440ep", "ibm,dma-440gp"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Bamboo is oddball in the 44x world and doesn't use the ERPN - * bits. - */ - ranges = <0x00000000 0x00000000 0x00000000 0x80000000 - 0x80000000 0x00000000 0x80000000 0x80000000>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - UART2: serial@ef600500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600500 0x00000008>; - virtual-reg = <0xef600500>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - UART3: serial@ef600600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600600 0x00000008>; - virtual-reg = <0xef600600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x4 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0xef600e00 0x00000070>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0 1>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1e 0x4 0x1f 0x4>; - reg = <0xef600f00 0x00000070>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <2 3>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - }; - - usb@ef601000 { - compatible = "ohci-be"; - reg = <0xef601000 0x00000080>; - interrupts = <0x8 0x1 0x9 0x1>; - interrupt-parent = < &UIC1 >; - }; - }; - - PCI0: pci@ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; - primary; - reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ - 0x00000000 0xeed00000 0x00000004 /* IACK */ - 0x00000000 0xeed00000 0x00000004 /* Special cycle */ - 0x00000000 0xef400000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x40000000 - 0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* Bamboo has all 4 IRQ pins tied together per slot */ - interrupt-map-mask = <0xf800 0x0 0x0 0x0>; - interrupt-map = < - /* IDSEL 1 */ - 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 - - /* IDSEL 2 */ - 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8 - - /* IDSEL 3 */ - 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8 - - /* IDSEL 4 */ - 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8 - >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/bluestone.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/bluestone.dts deleted file mode 100644 index 7bda373f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/bluestone.dts +++ /dev/null @@ -1,377 +0,0 @@ -/* - * Device Tree for Bluestone (APM821xx) board. - * - * Copyright (c) 2010, Applied Micro Circuits Corporation - * Author: Tirumala R Marri <tmarri@apm.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "apm,bluestone"; - compatible = "apm,bluestone"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,apm821xx"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - next-level-cache = <&L2C0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-apm821xx"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-apm821xx"; - dcr-reg = <0x00c 0x002>; - }; - - L2C0: l2c { - compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache"; - dcr-reg = <0x020 0x008 - 0x030 0x008>; - cache-line-size = <32>; - cache-size = <262144>; - interrupt-parent = <&UIC1>; - interrupts = <11 1>; - }; - - plb { - compatible = "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-apm821xx"; - dcr-reg = <0x010 0x002>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal2"; - descriptor-memory = "ocm"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <1>; - num-rx-chans = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-parent = <&UIC2>; - interrupts = < /*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x3 0x4 - /*TXDE*/ 0x4 0x4 - /*RXDE*/ 0x5 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - ranges = < 0x00000003 0x00000000 0xe0000000 0x8000000>; - interrupts = <0x6 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x00400000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00180000>; - }; - partition@180000 { - label = "env"; - reg = <0x00180000 0x00020000>; - }; - partition@1a0000 { - label = "u-boot"; - reg = <0x001a0000 0x00060000>; - }; - }; - - ndfc@1,0 { - compatible = "ibm,ndfc"; - reg = <0x00000003 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - /* 2Gb Nand Flash */ - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "firmware"; - reg = <0x00000000 0x00C00000>; - }; - partition@c00000 { - label = "environment"; - reg = <0x00C00000 0x00B00000>; - }; - partition@1700000 { - label = "kernel"; - reg = <0x01700000 0x00E00000>; - }; - partition@2500000 { - label = "root"; - reg = <0x02500000 0x08200000>; - }; - partition@a700000 { - label = "device-tree"; - reg = <0x0A700000 0x00B00000>; - }; - partition@b200000 { - label = "config"; - reg = <0x0B200000 0x00D00000>; - }; - partition@bf00000 { - label = "diag"; - reg = <0x0BF00000 0x00C00000>; - }; - partition@cb00000 { - label = "vendor"; - reg = <0x0CB00000 0x3500000>; - }; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC1>; - interrupts = <0x1 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - rtc@68 { - compatible = "stm,m41t80"; - reg = <0x68>; - interrupt-parent = <&UIC0>; - interrupts = <0x9 0x8>; - }; - sttm@4C { - compatible = "adm,adm1032"; - reg = <0x4C>; - interrupt-parent = <&UIC1>; - interrupts = <0x1E 0x8>; /* CPU_THERNAL_L */ - }; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - RGMII0: emac-rgmii@ef601500 { - compatible = "ibm,rgmii"; - reg = <0xef601500 0x00000008>; - has-mdio; - }; - - TAH0: emac-tah@ef601350 { - compatible = "ibm,tah"; - reg = <0xef601350 0x00000030>; - }; - - EMAC0: ethernet@ef600c00 { - device_type = "network"; - compatible = "ibm,emac-apm821xx", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 - /*Wake*/ 0x1 &UIC2 0x14 0x4>; - reg = <0xef600c00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <16384>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - tah-device = <&TAH0>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCIE0: pciex@d00000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ - 0x0000000c 0x08010000 0x00001000>; /* Registers */ - dcr-reg = <0x100 0x020>; - sdr-base = <0x300>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 40 to 0x7f */ - bus-range = <0x40 0x7f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/c2k.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/c2k.dts deleted file mode 100644 index f5d625fa..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/c2k.dts +++ /dev/null @@ -1,371 +0,0 @@ -/* Device Tree Source for GEFanuc C2K - * - * Author: Remi Machet <rmachet@slac.stanford.edu> - * - * Originated from prpmc2800.dts - * - * 2008 (c) Stanford University - * 2007 (c) MontaVista, Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "C2K"; - compatible = "GEFanuc,C2K"; - coherency-off; - - aliases { - pci0 = &PCI0; - pci1 = &PCI1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "PowerPC,7447"; - reg = <0>; - clock-frequency = <996000000>; /* 996 MHz */ - bus-frequency = <166666667>; /* 166.6666 MHz */ - timebase-frequency = <41666667>; /* 166.6666/4 MHz */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x40000000>; /* 1GB */ - }; - - system-controller@d8000000 { /* Marvell Discovery */ - #address-cells = <1>; - #size-cells = <1>; - model = "mv64460"; - compatible = "marvell,mv64360"; - clock-frequency = <166666667>; /* 166.66... MHz */ - reg = <0xd8000000 0x00010000>; - virtual-reg = <0xd8000000>; - ranges = <0xd4000000 0xd4000000 0x01000000 /* PCI 0 I/O Space */ - 0x80000000 0x80000000 0x08000000 /* PCI 0 MEM Space */ - 0xd0000000 0xd0000000 0x01000000 /* PCI 1 I/O Space */ - 0xa0000000 0xa0000000 0x08000000 /* PCI 1 MEM Space */ - 0xd8100000 0xd8100000 0x00010000 /* FPGA */ - 0xd8110000 0xd8110000 0x00010000 /* FPGA USARTs */ - 0xf8000000 0xf8000000 0x08000000 /* User FLASH */ - 0x00000000 0xd8000000 0x00010000 /* Bridge's regs */ - 0xd8140000 0xd8140000 0x00040000>; /* Integrated SRAM */ - - mdio@2000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "marvell,mv64360-mdio"; - reg = <0x2000 4>; - PHY0: ethernet-phy@0 { - device_type = "ethernet-phy"; - interrupts = <76>; /* GPP 12 */ - interrupt-parent = <&PIC>; - reg = <0>; - }; - PHY1: ethernet-phy@1 { - device_type = "ethernet-phy"; - interrupts = <76>; /* GPP 12 */ - interrupt-parent = <&PIC>; - reg = <1>; - }; - PHY2: ethernet-phy@2 { - device_type = "ethernet-phy"; - interrupts = <76>; /* GPP 12 */ - interrupt-parent = <&PIC>; - reg = <2>; - }; - }; - - ethernet-group@2000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "marvell,mv64360-eth-group"; - reg = <0x2000 0x2000>; - ethernet@0 { - device_type = "network"; - compatible = "marvell,mv64360-eth"; - reg = <0>; - interrupts = <32>; - interrupt-parent = <&PIC>; - phy = <&PHY0>; - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - ethernet@1 { - device_type = "network"; - compatible = "marvell,mv64360-eth"; - reg = <1>; - interrupts = <33>; - interrupt-parent = <&PIC>; - phy = <&PHY1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - ethernet@2 { - device_type = "network"; - compatible = "marvell,mv64360-eth"; - reg = <2>; - interrupts = <34>; - interrupt-parent = <&PIC>; - phy = <&PHY2>; - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - }; - - SDMA0: sdma@4000 { - compatible = "marvell,mv64360-sdma"; - reg = <0x4000 0xc18>; - virtual-reg = <0xd8004000>; - interrupt-base = <0>; - interrupts = <36>; - interrupt-parent = <&PIC>; - }; - - SDMA1: sdma@6000 { - compatible = "marvell,mv64360-sdma"; - reg = <0x6000 0xc18>; - virtual-reg = <0xd8006000>; - interrupt-base = <0>; - interrupts = <38>; - interrupt-parent = <&PIC>; - }; - - BRG0: brg@b200 { - compatible = "marvell,mv64360-brg"; - reg = <0xb200 0x8>; - clock-src = <8>; - clock-frequency = <133333333>; - current-speed = <115200>; - }; - - BRG1: brg@b208 { - compatible = "marvell,mv64360-brg"; - reg = <0xb208 0x8>; - clock-src = <8>; - clock-frequency = <133333333>; - current-speed = <115200>; - }; - - CUNIT: cunit@f200 { - reg = <0xf200 0x200>; - }; - - MPSCROUTING: mpscrouting@b400 { - reg = <0xb400 0xc>; - }; - - MPSCINTR: mpscintr@b800 { - reg = <0xb800 0x100>; - virtual-reg = <0xd800b800>; - }; - - MPSC0: mpsc@8000 { - device_type = "serial"; - compatible = "marvell,mv64360-mpsc"; - reg = <0x8000 0x38>; - virtual-reg = <0xd8008000>; - sdma = <&SDMA0>; - brg = <&BRG0>; - cunit = <&CUNIT>; - mpscrouting = <&MPSCROUTING>; - mpscintr = <&MPSCINTR>; - cell-index = <0>; - interrupts = <40>; - interrupt-parent = <&PIC>; - }; - - MPSC1: mpsc@9000 { - device_type = "serial"; - compatible = "marvell,mv64360-mpsc"; - reg = <0x9000 0x38>; - virtual-reg = <0xd8009000>; - sdma = <&SDMA1>; - brg = <&BRG1>; - cunit = <&CUNIT>; - mpscrouting = <&MPSCROUTING>; - mpscintr = <&MPSCINTR>; - cell-index = <1>; - interrupts = <42>; - interrupt-parent = <&PIC>; - }; - - wdt@b410 { /* watchdog timer */ - compatible = "marvell,mv64360-wdt"; - reg = <0xb410 0x8>; - }; - - i2c@c000 { - compatible = "marvell,mv64360-i2c"; - reg = <0xc000 0x20>; - virtual-reg = <0xd800c000>; - interrupts = <37>; - interrupt-parent = <&PIC>; - }; - - PIC: pic { - #interrupt-cells = <1>; - #address-cells = <0>; - compatible = "marvell,mv64360-pic"; - reg = <0x0000 0x88>; - interrupt-controller; - }; - - mpp@f000 { - compatible = "marvell,mv64360-mpp"; - reg = <0xf000 0x10>; - }; - - gpp@f100 { - compatible = "marvell,mv64360-gpp"; - reg = <0xf100 0x20>; - }; - - PCI0: pci@80000000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "marvell,mv64360-pci"; - reg = <0x0cf8 0x8>; - ranges = <0x01000000 0x0 0x00000000 0xd4000000 0x0 0x01000000 - 0x02000000 0x0 0x80000000 0x80000000 0x0 0x08000000>; - bus-range = <0 255>; - clock-frequency = <66000000>; - interrupt-pci-iack = <0x0c34>; - interrupt-parent = <&PIC>; - interrupt-map-mask = <0x0000 0x0 0x0 0x7>; - interrupt-map = < - /* Only one interrupt line for PMC0 slot (INTA) */ - 0x0000 0 0 1 &PIC 88 - >; - }; - - - PCI1: pci@a0000000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "marvell,mv64360-pci"; - reg = <0x0c78 0x8>; - ranges = <0x01000000 0x0 0x00000000 0xd0000000 0x0 0x01000000 - 0x02000000 0x0 0x80000000 0xa0000000 0x0 0x08000000>; - bus-range = <0 255>; - clock-frequency = <66000000>; - interrupt-pci-iack = <0x0cb4>; - interrupt-parent = <&PIC>; - interrupt-map-mask = <0xf800 0x00 0x00 0x7>; - interrupt-map = < - /* IDSEL 0x01: PMC1 ? */ - 0x0800 0 0 1 &PIC 88 - /* IDSEL 0x02: cPCI bridge */ - 0x1000 0 0 1 &PIC 88 - /* IDSEL 0x03: USB controller */ - 0x1800 0 0 1 &PIC 91 - /* IDSEL 0x04: SATA controller */ - 0x2000 0 0 1 &PIC 95 - >; - }; - - cpu-error@0070 { - compatible = "marvell,mv64360-cpu-error"; - reg = <0x0070 0x10 0x0128 0x28>; - interrupts = <3>; - interrupt-parent = <&PIC>; - }; - - sram-ctrl@0380 { - compatible = "marvell,mv64360-sram-ctrl"; - reg = <0x0380 0x80>; - interrupts = <13>; - interrupt-parent = <&PIC>; - }; - - pci-error@1d40 { - compatible = "marvell,mv64360-pci-error"; - reg = <0x1d40 0x40 0x0c28 0x4>; - interrupts = <12>; - interrupt-parent = <&PIC>; - }; - - pci-error@1dc0 { - compatible = "marvell,mv64360-pci-error"; - reg = <0x1dc0 0x40 0x0ca8 0x4>; - interrupts = <16>; - interrupt-parent = <&PIC>; - }; - - mem-ctrl@1400 { - compatible = "marvell,mv64360-mem-ctrl"; - reg = <0x1400 0x60>; - interrupts = <17>; - interrupt-parent = <&PIC>; - }; - /* Devices attached to the device controller */ - devicebus@045c { - #address-cells = <2>; - #size-cells = <1>; - compatible = "marvell,mv64306-devctrl"; - reg = <0x45C 0x88>; - interrupts = <1>; - interrupt-parent = <&PIC>; - ranges = <0 0 0xd8100000 0x10000 - 2 0 0xd8110000 0x10000 - 4 0 0xf8000000 0x8000000>; - fpga@0,0 { - compatible = "sbs,fpga-c2k"; - reg = <0 0 0x10000>; - }; - fpga_usart@2,0 { - compatible = "sbs,fpga_usart-c2k"; - reg = <2 0 0x10000>; - }; - nor_flash@4,0 { - compatible = "cfi-flash"; - reg = <4 0 0x8000000>; /* 128MB */ - bank-width = <4>; - device-width = <1>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "boot"; - reg = <0x00000000 0x00080000>; - }; - partition@40000 { - label = "kernel"; - reg = <0x00080000 0x00400000>; - }; - partition@440000 { - label = "initrd"; - reg = <0x00480000 0x00B80000>; - }; - partition@1000000 { - label = "rootfs"; - reg = <0x01000000 0x06800000>; - }; - partition@7800000 { - label = "recovery"; - reg = <0x07800000 0x00800000>; - read-only; - }; - }; - }; - }; - chosen { - linux,stdout-path = &MPSC0; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/canyonlands.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/canyonlands.dts deleted file mode 100644 index 3dc75dea..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/canyonlands.dts +++ /dev/null @@ -1,557 +0,0 @@ -/* - * Device Tree Source for AMCC Canyonlands (460EX) - * - * Copyright 2008-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,canyonlands"; - compatible = "amcc,canyonlands"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,460EX"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - next-level-cache = <&L2C0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-460ex","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-460ex","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-460ex","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-460ex","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-460ex"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-460ex"; - dcr-reg = <0x00c 0x002>; - }; - - CPM0: cpm { - compatible = "ibm,cpm"; - dcr-access-method = "native"; - dcr-reg = <0x160 0x003>; - unused-units = <0x00000100>; - idle-doze = <0x02000000>; - standby = <0xfeff791d>; - }; - - L2C0: l2c { - compatible = "ibm,l2-cache-460ex", "ibm,l2-cache"; - dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ - 0x030 0x008>; /* L2 cache DCR's */ - cache-line-size = <32>; /* 32 bytes */ - cache-size = <262144>; /* L2, 256K */ - interrupt-parent = <&UIC1>; - interrupts = <11 1>; - }; - - plb { - compatible = "ibm,plb-460ex", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-460ex", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - CRYPTO: crypto@180000 { - compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto"; - reg = <4 0x00180000 0x80400>; - interrupt-parent = <&UIC0>; - interrupts = <0x1d 0x4>; - }; - - HWRNG: hwrng@110000 { - compatible = "amcc,ppc460ex-rng", "ppc4xx-rng"; - reg = <4 0x00110000 0x50>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <16>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-parent = <&UIC2>; - interrupts = < /*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x3 0x4 - /*TXDE*/ 0x4 0x4 - /*RXDE*/ 0x5 0x4>; - }; - - USB0: ehci@bffd0400 { - compatible = "ibm,usb-ehci-460ex", "usb-ehci"; - interrupt-parent = <&UIC2>; - interrupts = <0x1d 4>; - reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>; - }; - - USB1: usb@bffd0000 { - compatible = "ohci-le"; - reg = <4 0xbffd0000 0x60>; - interrupt-parent = <&UIC2>; - interrupts = <0x1e 4>; - }; - - USBOTG0: usbotg@bff80000 { - compatible = "amcc,dwc-otg"; - reg = <0x4 0xbff80000 0x10000>; - interrupt-parent = <&USBOTG0>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupts = <0x0 0x1 0x2>; - interrupt-map = </* USB-OTG */ 0x0 &UIC2 0x1c 0x4 - /* HIGH-POWER */ 0x1 &UIC1 0x1a 0x8 - /* DMA */ 0x2 &UIC0 0xc 0x4>; - }; - - SATA0: sata@bffd1000 { - compatible = "amcc,sata-460ex"; - reg = <4 0xbffd1000 0x800 4 0xbffd0800 0x400>; - interrupt-parent = <&UIC3>; - interrupts = <0x0 0x4 /* SATA */ - 0x5 0x4>; /* AHBDMA */ - }; - - POB0: opb { - compatible = "ibm,opb-460ex", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-460ex", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x6 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "ramdisk"; - reg = <0x00200000 0x01400000>; - }; - partition@1600000 { - label = "jffs2"; - reg = <0x01600000 0x00400000>; - }; - partition@1a00000 { - label = "user"; - reg = <0x01a00000 0x02560000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - - cpld@2,0 { - compatible = "amcc,ppc460ex-bcsr"; - reg = <2 0x0 0x9>; - }; - - ndfc@3,0 { - compatible = "ibm,ndfc"; - reg = <0x00000003 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - }; - partition@100000 { - label = "user"; - reg = <0x00000000 0x03f00000>; - }; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC1>; - interrupts = <0x1 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-460ex", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - rtc@68 { - compatible = "stm,m41t80"; - reg = <0x68>; - interrupt-parent = <&UIC2>; - interrupts = <0x19 0x8>; - }; - sttm@48 { - compatible = "ad,ad7414"; - reg = <0x48>; - interrupt-parent = <&UIC1>; - interrupts = <0x14 0x8>; - }; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-460ex", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - GPIO0: gpio@ef600b00 { - compatible = "ibm,ppc4xx-gpio"; - reg = <0xef600b00 0x00000048>; - gpio-controller; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-460ex", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - RGMII0: emac-rgmii@ef601500 { - compatible = "ibm,rgmii-460ex", "ibm,rgmii"; - reg = <0xef601500 0x00000008>; - has-mdio; - }; - - TAH0: emac-tah@ef601350 { - compatible = "ibm,tah-460ex", "ibm,tah"; - reg = <0xef601350 0x00000030>; - }; - - TAH1: emac-tah@ef601450 { - compatible = "ibm,tah-460ex", "ibm,tah"; - reg = <0xef601450 0x00000030>; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-460ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 - /*Wake*/ 0x1 &UIC2 0x14 0x4>; - reg = <0xef600e00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - tah-device = <&TAH0>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-460ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 - /*Wake*/ 0x1 &UIC2 0x15 0x4>; - reg = <0xef600f00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <8>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - tah-device = <&TAH1>; - tah-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - }; - - PCIX0: pci@c0ec00000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix"; - primary; - large-inbound-windows; - enable-msi-hole; - reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ - 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ - 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ - 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ - 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0 to 0x3f */ - bus-range = <0x0 0x3f>; - - /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ - interrupt-map-mask = <0x0 0x0 0x0 0x0>; - interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >; - }; - - PCIE0: pciex@d00000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ - 0x0000000c 0x08010000 0x00001000>; /* Registers */ - dcr-reg = <0x100 0x020>; - sdr-base = <0x300>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 40 to 0x7f */ - bus-range = <0x40 0x7f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@d20000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ - 0x0000000c 0x08011000 0x00001000>; /* Registers */ - dcr-reg = <0x120 0x020>; - sdr-base = <0x340>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 80 to 0xbf */ - bus-range = <0x80 0xbf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; - }; - - MSI: ppc4xx-msi@C10000000 { - compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; - reg = < 0xC 0x10000000 0x100>; - sdr-base = <0x36C>; - msi-data = <0x00000000>; - msi-mask = <0x44440000>; - interrupt-count = <3>; - interrupts = <0 1 2 3>; - interrupt-parent = <&UIC3>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &UIC3 0x18 1 - 1 &UIC3 0x19 1 - 2 &UIC3 0x1A 1 - 3 &UIC3 0x1B 1>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/charon.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/charon.dts deleted file mode 100644 index 0e00e508..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/charon.dts +++ /dev/null @@ -1,236 +0,0 @@ -/* - * charon board Device Tree Source - * - * Copyright (C) 2007 Semihalf - * Marian Balakowicz <m8@semihalf.com> - * - * Copyright (C) 2010 DENX Software Engineering GmbH - * Heiko Schocher <hs@denx.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "anon,charon"; - compatible = "anon,charon"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&mpc5200_pic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,5200@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; // 128MB - }; - - soc5200@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc5200-immr"; - ranges = <0 0xf0000000 0x0000c000>; - reg = <0xf0000000 0x00000100>; - bus-frequency = <0>; // from bootloader - system-frequency = <0>; // from bootloader - - cdm@200 { - compatible = "fsl,mpc5200-cdm"; - reg = <0x200 0x38>; - }; - - mpc5200_pic: interrupt-controller@500 { - // 5200 interrupts are encoded into two levels; - interrupt-controller; - #interrupt-cells = <3>; - compatible = "fsl,mpc5200-pic"; - reg = <0x500 0x80>; - }; - - timer@600 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x600 0x10>; - interrupts = <1 9 0>; - fsl,has-wdt; - }; - - can@900 { - compatible = "fsl,mpc5200-mscan"; - interrupts = <2 17 0>; - reg = <0x900 0x80>; - }; - - can@980 { - compatible = "fsl,mpc5200-mscan"; - interrupts = <2 18 0>; - reg = <0x980 0x80>; - }; - - gpio_simple: gpio@b00 { - compatible = "fsl,mpc5200-gpio"; - reg = <0xb00 0x40>; - interrupts = <1 7 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - usb@1000 { - compatible = "fsl,mpc5200-ohci","ohci-be"; - reg = <0x1000 0xff>; - interrupts = <2 6 0>; - }; - - dma-controller@1200 { - device_type = "dma-controller"; - compatible = "fsl,mpc5200-bestcomm"; - reg = <0x1200 0x80>; - interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 - 3 4 0 3 5 0 3 6 0 3 7 0 - 3 8 0 3 9 0 3 10 0 3 11 0 - 3 12 0 3 13 0 3 14 0 3 15 0>; - }; - - xlb@1f00 { - compatible = "fsl,mpc5200-xlb"; - reg = <0x1f00 0x100>; - }; - - serial@2000 { // PSC1 - compatible = "fsl,mpc5200-psc-uart"; - reg = <0x2000 0x100>; - interrupts = <2 1 0>; - }; - - serial@2400 { // PSC3 - compatible = "fsl,mpc5200-psc-uart"; - reg = <0x2400 0x100>; - interrupts = <2 3 0>; - }; - - ethernet@3000 { - compatible = "fsl,mpc5200-fec"; - reg = <0x3000 0x400>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <2 5 0>; - fixed-link = <1 1 100 0 0>; - }; - - mdio@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-mdio"; - reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts - interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. - }; - - ata@3a00 { - compatible = "fsl,mpc5200-ata"; - reg = <0x3a00 0x100>; - interrupts = <2 7 0>; - }; - - i2c@3d00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d00 0x40>; - interrupts = <2 15 0>; - }; - - - i2c@3d40 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d40 0x40>; - interrupts = <2 16 0>; - - dtt@28 { - compatible = "national,lm80"; - reg = <0x28>; - }; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - sram@8000 { - compatible = "fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - localbus { - compatible = "fsl,mpc5200-lpb","simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - ranges = < 0 0 0xfc000000 0x02000000 - 1 0 0xe0000000 0x04000000 // CS1 range, SM501 - 3 0 0xe8000000 0x00080000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - bank-width = <4>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - }; - - display@1,0 { - compatible = "smi,sm501"; - reg = <1 0x00000000 0x00800000 - 1 0x03e00000 0x00200000>; - mode = "640x480-32@60"; - interrupts = <1 1 3>; - little-endian; - }; - - mram0@3,0 { - compatible = "mtd-ram"; - reg = <3 0x00000 0x80000>; - bank-width = <1>; - }; - }; - - pci@f0000d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "fsl,mpc5200-pci"; - reg = <0xf0000d00 0x100>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 - 0xc000 0 0 2 &mpc5200_pic 0 0 3 - 0xc000 0 0 3 &mpc5200_pic 0 0 3 - 0xc000 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/cm5200.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/cm5200.dts deleted file mode 100644 index ad3a4f4a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/cm5200.dts +++ /dev/null @@ -1,91 +0,0 @@ -/* - * CM5200 board Device Tree Source - * - * Copyright (C) 2007 Semihalf - * Marian Balakowicz <m8@semihalf.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "schindler,cm5200"; - compatible = "schindler,cm5200"; - - soc5200@f0000000 { - timer@600 { // General Purpose Timer - fsl,has-wdt; - }; - - can@900 { - status = "disabled"; - }; - - can@980 { - status = "disabled"; - }; - - psc@2000 { // PSC1 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2200 { // PSC2 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2400 { // PSC3 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2600 { // PSC4 - status = "disabled"; - }; - - psc@2800 { // PSC5 - status = "disabled"; - }; - - psc@2c00 { // PSC6 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - ata@3a00 { - status = "disabled"; - }; - - i2c@3d00 { - status = "disabled"; - }; - - }; - - pci@f0000d00 { - status = "disabled"; - }; - - localbus { - // 16-bit flash device at LocalPlus Bus CS0 - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x2000000>; - bank-width = <2>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/currituck.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/currituck.dts deleted file mode 100644 index b801dd06..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/currituck.dts +++ /dev/null @@ -1,237 +0,0 @@ -/* - * Device Tree Source for IBM Embedded PPC 476 Platform - * - * Copyright © 2011 Tony Breeds IBM Corporation - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/memreserve/ 0x01f00000 0x00100000; // spin table - -/ { - #address-cells = <2>; - #size-cells = <2>; - model = "ibm,currituck"; - compatible = "ibm,currituck"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,476"; - reg = <0>; - clock-frequency = <1600000000>; // 1.6 GHz - timebase-frequency = <100000000>; // 100Mhz - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "ok"; - }; - cpu@1 { - device_type = "cpu"; - model = "PowerPC,476"; - reg = <1>; - clock-frequency = <1600000000>; // 1.6 GHz - timebase-frequency = <100000000>; // 100Mhz - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "disabled"; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x01f00000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; // filled in by zImage - }; - - MPIC: interrupt-controller { - compatible = "chrp,open-pic"; - interrupt-controller; - dcr-reg = <0xffc00000 0x00040000>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - - }; - - plb { - compatible = "ibm,plb6"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - clock-frequency = <200000000>; // 200Mhz - - POB0: opb { - compatible = "ibm,opb-4xx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Wish there was a nicer way of specifying a full - * 32-bit range - */ - ranges = <0x00000000 0x00000200 0x00000000 0x80000000 - 0x80000000 0x00000200 0x80000000 0x80000000>; - clock-frequency = <100000000>; - - UART0: serial@10000000 { - device_type = "serial"; - compatible = "ns16750", "ns16550"; - reg = <0x10000000 0x00000008>; - virtual-reg = <0xe1000000>; - clock-frequency = <1851851>; // PCIe refclk/MCGC0_CTL[UART] - current-speed = <115200>; - interrupt-parent = <&MPIC>; - interrupts = <34 2>; - }; - - IIC0: i2c@00000000 { - compatible = "ibm,iic-currituck", "ibm,iic"; - reg = <0x0 0x00000014>; - interrupt-parent = <&MPIC>; - interrupts = <79 2>; - #address-cells = <1>; - #size-cells = <0>; - rtc@68 { - compatible = "stm,m41t80", "m41st85"; - reg = <0x68>; - }; - }; - }; - - PCIE0: pciex@10100000000 { // 4xGBIF1 - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x00000101 0x00000000 0x0 0x10000000 /* Config space access */ - 0x00000100 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ - dcr-reg = <0x80 0x20>; - -// pci_space < pci_addr > < cpu_addr > < size > - ranges = <0x02000000 0x00000000 0x80000000 0x00000110 0x80000000 0x0 0x80000000 - 0x01000000 0x0 0x0 0x00000140 0x0 0x0 0x00010000>; - - /* Inbound starting at 0 to memsize filled in by zImage */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &MPIC 46 0x2 /* int A */ - 0x0 0x0 0x0 0x2 &MPIC 47 0x2 /* int B */ - 0x0 0x0 0x0 0x3 &MPIC 48 0x2 /* int C */ - 0x0 0x0 0x0 0x4 &MPIC 49 0x2 /* int D */>; - }; - - PCIE1: pciex@30100000000 { // 4xGBIF0 - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x00000301 0x00000000 0x0 0x10000000 /* Config space access */ - 0x00000300 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ - dcr-reg = <0x60 0x20>; - - ranges = <0x02000000 0x00000000 0x80000000 0x00000310 0x80000000 0x0 0x80000000 - 0x01000000 0x0 0x0 0x00000340 0x0 0x0 0x00010000>; - - /* Inbound starting at 0 to memsize filled in by zImage */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &MPIC 38 0x2 /* int A */ - 0x0 0x0 0x0 0x2 &MPIC 39 0x2 /* int B */ - 0x0 0x0 0x0 0x3 &MPIC 40 0x2 /* int C */ - 0x0 0x0 0x0 0x4 &MPIC 41 0x2 /* int D */>; - }; - - PCIE2: pciex@38100000000 { // 2xGBIF0 - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; - primary; - port = <0x2>; /* port number */ - reg = <0x00000381 0x00000000 0x0 0x10000000 /* Config space access */ - 0x00000380 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ - dcr-reg = <0xA0 0x20>; - - ranges = <0x02000000 0x00000000 0x80000000 0x00000390 0x80000000 0x0 0x80000000 - 0x01000000 0x0 0x0 0x000003C0 0x0 0x0 0x00010000>; - - /* Inbound starting at 0 to memsize filled in by zImage */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &MPIC 54 0x2 /* int A */ - 0x0 0x0 0x0 0x2 &MPIC 55 0x2 /* int B */ - 0x0 0x0 0x0 0x3 &MPIC 56 0x2 /* int C */ - 0x0 0x0 0x0 0x4 &MPIC 57 0x2 /* int D */>; - }; - - }; - - chosen { - linux,stdout-path = &UART0; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/digsy_mtc.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/digsy_mtc.dts deleted file mode 100644 index a7511f2d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/digsy_mtc.dts +++ /dev/null @@ -1,169 +0,0 @@ -/* - * Digsy MTC board Device Tree Source - * - * Copyright (C) 2009 Semihalf - * - * Based on the CM5200 by M. Balakowicz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "intercontrol,digsy-mtc"; - compatible = "intercontrol,digsy-mtc"; - - memory { - reg = <0x00000000 0x02000000>; // 32MB - }; - - soc5200@f0000000 { - timer@600 { // General Purpose Timer - #gpio-cells = <2>; - fsl,has-wdt; - gpio-controller; - }; - - timer@610 { - #gpio-cells = <2>; - gpio-controller; - }; - - rtc@800 { - status = "disabled"; - }; - - spi@f00 { - msp430@0 { - compatible = "spidev"; - spi-max-frequency = <32000>; - reg = <0>; - }; - }; - - psc@2000 { // PSC1 - status = "disabled"; - }; - - psc@2200 { // PSC2 - status = "disabled"; - }; - - psc@2400 { // PSC3 - status = "disabled"; - }; - - psc@2600 { // PSC4 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2800 { // PSC5 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2c00 { // PSC6 - status = "disabled"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - i2c@3d00 { - eeprom@50 { - compatible = "at,24c08"; - reg = <0x50>; - }; - - rtc@56 { - compatible = "mc,rv3029c2"; - reg = <0x56>; - }; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - i2c@3d40 { - status = "disabled"; - }; - }; - - pci@f0000d00 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 - 0xc000 0 0 2 &mpc5200_pic 0 0 3 - 0xc000 0 0 3 &mpc5200_pic 0 0 3 - 0xc000 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; - }; - - localbus { - ranges = <0 0 0xff000000 0x1000000 - 4 0 0x60000000 0x0001000>; - - // 16-bit flash device at LocalPlus Bus CS0 - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x1000000>; - bank-width = <2>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - - partition@0 { - label = "kernel"; - reg = <0x0 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00300000>; - }; - partition@500000 { - label = "user"; - reg = <0x00500000 0x00a00000>; - }; - partition@f00000 { - label = "u-boot"; - reg = <0x00f00000 0x100000>; - }; - }; - - can@4,0 { - compatible = "nxp,sja1000"; - reg = <4 0x000 0x80>; - nxp,external-clock-frequency = <24000000>; - interrupts = <1 2 3>; // Level-low - }; - - can@4,100 { - compatible = "nxp,sja1000"; - reg = <4 0x100 0x80>; - nxp,external-clock-frequency = <24000000>; - interrupts = <1 2 3>; // Level-low - }; - - serial@4,200 { - compatible = "nxp,sc28l92"; - reg = <4 0x200 0x10>; - interrupts = <1 3 3>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ebony.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ebony.dts deleted file mode 100644 index ec2d1422..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ebony.dts +++ /dev/null @@ -1,337 +0,0 @@ -/* - * Device Tree Source for IBM Ebony - * - * Copyright (c) 2006, 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com> - * - * FIXME: Draft only! - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "ibm,ebony"; - compatible = "ibm,ebony"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440GP"; - reg = <0x00000000>; - clock-frequency = <0>; // Filled in by zImage - timebase-frequency = <0>; // Filled in by zImage - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; /* 32 kB */ - d-cache-size = <32768>; /* 32 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440gp", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440gp", "ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - CPC0: cpc { - compatible = "ibm,cpc-440gp"; - dcr-reg = <0x0b0 0x003 0x0e0 0x010>; - // FIXME: anything else? - }; - - plb { - compatible = "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; // Filled in by zImage - - SDRAM0: memory-controller { - compatible = "ibm,sdram-440gp"; - dcr-reg = <0x010 0x002>; - // FIXME: anything else? - }; - - SRAM0: sram { - compatible = "ibm,sram-440gp"; - dcr-reg = <0x020 0x008 0x00a 0x001>; - }; - - DMA0: dma { - // FIXME: ??? - compatible = "ibm,dma-440gp"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <4>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Wish there was a nicer way of specifying a full 32-bit - range */ - ranges = <0x00000000 0x00000001 0x00000000 0x80000000 - 0x80000000 0x00000001 0x80000000 0x80000000>; - dcr-reg = <0x090 0x00b>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <0>; // Filled in by zImage - - EBC0: ebc { - compatible = "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; // Filled in by zImage - // ranges property is supplied by zImage - // based on firmware's configuration of the - // EBC bridge - interrupts = <0x5 0x4>; - interrupt-parent = <&UIC1>; - - small-flash@0,80000 { - compatible = "jedec-flash"; - bank-width = <1>; - reg = <0x00000000 0x00080000 0x00080000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "OpenBIOS"; - reg = <0x00000000 0x00080000>; - read-only; - }; - }; - - nvram@1,0 { - /* NVRAM & RTC */ - compatible = "ds1743-nvram"; - #bytes = <0x2000>; - reg = <0x00000001 0x00000000 0x00002000>; - }; - - large-flash@2,0 { - compatible = "jedec-flash"; - bank-width = <1>; - reg = <0x00000002 0x00000000 0x00400000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "fs"; - reg = <0x00000000 0x00380000>; - }; - partition@380000 { - label = "firmware"; - reg = <0x00380000 0x00080000>; - }; - }; - - ir@3,0 { - reg = <0x00000003 0x00000000 0x00000010>; - }; - - fpga@7,0 { - compatible = "Ebony-FPGA"; - reg = <0x00000007 0x00000000 0x00000010>; - virtual-reg = <0xe8300000>; - }; - }; - - UART0: serial@40000200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x40000200 0x00000008>; - virtual-reg = <0xe0000200>; - clock-frequency = <11059200>; - current-speed = <9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@40000300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x40000300 0x00000008>; - virtual-reg = <0xe0000300>; - clock-frequency = <11059200>; - current-speed = <9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@40000400 { - /* FIXME */ - compatible = "ibm,iic-440gp", "ibm,iic"; - reg = <0x40000400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - IIC1: i2c@40000500 { - /* FIXME */ - compatible = "ibm,iic-440gp", "ibm,iic"; - reg = <0x40000500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - GPIO0: gpio@40000700 { - /* FIXME */ - compatible = "ibm,gpio-440gp"; - reg = <0x40000700 0x00000020>; - }; - - ZMII0: emac-zmii@40000780 { - compatible = "ibm,zmii-440gp", "ibm,zmii"; - reg = <0x40000780 0x0000000c>; - }; - - EMAC0: ethernet@40000800 { - device_type = "network"; - compatible = "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0x40000800 0x00000070>; - local-mac-address = [000000000000]; // Filled in by zImage - mal-device = <&MAL0>; - mal-tx-channel = <0 1>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000001>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - }; - EMAC1: ethernet@40000900 { - device_type = "network"; - compatible = "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1e 0x4 0x1f 0x4>; - reg = <0x40000900 0x00000070>; - local-mac-address = [000000000000]; // Filled in by zImage - mal-device = <&MAL0>; - mal-tx-channel = <2 3>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000001>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - }; - - - GPT0: gpt@40000a00 { - /* FIXME */ - reg = <0x40000a00 0x000000d4>; - interrupt-parent = <&UIC0>; - interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>; - }; - - }; - - PCIX0: pci@20ec00000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix"; - primary; - reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */ - 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ - 0x00000002 0x0ed00000 0x00000004 /* Special cycles */ - 0x00000002 0x0ec80000 0x000000f0 /* Internal registers */ - 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* Ebony has all 4 IRQ pins tied together per slot */ - interrupt-map-mask = <0xf800 0x0 0x0 0x0>; - interrupt-map = < - /* IDSEL 1 */ - 0x800 0x0 0x0 0x0 &UIC0 0x17 0x8 - - /* IDSEL 2 */ - 0x1000 0x0 0x0 0x0 &UIC0 0x18 0x8 - - /* IDSEL 3 */ - 0x1800 0x0 0x0 0x0 &UIC0 0x19 0x8 - - /* IDSEL 4 */ - 0x2000 0x0 0x0 0x0 &UIC0 0x1a 0x8 - >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@40000200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/eiger.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/eiger.dts deleted file mode 100644 index 48bcf718..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/eiger.dts +++ /dev/null @@ -1,427 +0,0 @@ -/* - * Device Tree Source for AMCC (AppliedMicro) Eiger(460SX) - * - * Copyright 2009 AMCC (AppliedMicro) <ttnguyen@amcc.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,eiger"; - compatible = "amcc,eiger"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - ethernet2 = &EMAC2; - ethernet3 = &EMAC3; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,460SX"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-460sx"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-460sx"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-460sx", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-460sx", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-460sx", "ibm,mcmal2"; - dcr-reg = <0x180 0x62>; - num-tx-chans = <4>; - num-rx-chans = <32>; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&UIC1>; - interrupts = < /*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x1 0x4 - /*TXDE*/ 0x2 0x4 - /*RXDE*/ 0x3 0x4 - /*COAL TX0*/ 0x18 0x2 - /*COAL TX1*/ 0x19 0x2 - /*COAL TX2*/ 0x1a 0x2 - /*COAL TX3*/ 0x1b 0x2 - /*COAL RX0*/ 0x1c 0x2 - /*COAL RX1*/ 0x1d 0x2 - /*COAL RX2*/ 0x1e 0x2 - /*COAL RX3*/ 0x1f 0x2>; - }; - - POB0: opb { - compatible = "ibm,opb-460sx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-460sx", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x6 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - /* reg property is supplied in by U-Boot */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "ramdisk"; - reg = <0x00200000 0x01400000>; - }; - partition@1600000 { - label = "jffs2"; - reg = <0x01600000 0x00400000>; - }; - partition@1a00000 { - label = "user"; - reg = <0x01a00000 0x02560000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - - ndfc@1,0 { - compatible = "ibm,ndfc"; - /* reg property is supplied by U-boot */ - ccr = <0x00003000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "uboot"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "uboot-environment"; - reg = <0x00200000 0x00100000>; - }; - partition@300000 { - label = "linux"; - reg = <0x00300000 0x00300000>; - }; - partition@600000 { - label = "root-file-system"; - reg = <0x00600000 0x01900000>; - }; - partition@1f00000 { - label = "device-tree"; - reg = <0x01f00000 0x00020000>; - }; - partition@1f20000 { - label = "data"; - reg = <0x01f20000 0x060E0000>; - }; - }; - }; - }; - - UART0: serial@ef600200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600200 0x00000008>; - virtual-reg = <0xef600200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600400 { - compatible = "ibm,iic-460sx", "ibm,iic"; - reg = <0xef600400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - index = <0>; - }; - - IIC1: i2c@ef600500 { - compatible = "ibm,iic-460sx", "ibm,iic"; - reg = <0xef600500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - #address-cells = <1>; - #size-cells = <0>; - index = <1>; - }; - - RGMII0: emac-rgmii@ef600900 { - compatible = "ibm,rgmii-460sx", "ibm,rgmii"; - reg = <0xef600900 0x00000008>; - has-mdio; - }; - - RGMII1: emac-rgmii@ef600920 { - compatible = "ibm,rgmii-460sx", "ibm,rgmii"; - reg = <0xef600920 0x00000008>; - has-mdio; - }; - - TAH0: emac-tah@ef600e50 { - compatible = "ibm,tah-460sx", "ibm,tah"; - reg = <0xef600e50 0x00000030>; - }; - - TAH1: emac-tah@ef600f50 { - compatible = "ibm,tah-460sx", "ibm,tah"; - reg = <0xef600f50 0x00000030>; - }; - - EMAC0: ethernet@ef600a00 { - device_type = "network"; - compatible = "ibm,emac-460sx", "ibm,emac4"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4 - /*Wake*/ 0x1 &UIC2 0x1d 0x4>; - reg = <0xef600a00 0x00000070>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - tah-device = <&TAH0>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600b00 { - device_type = "network"; - compatible = "ibm,emac-460sx", "ibm,emac4"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4 - /*Wake*/ 0x1 &UIC2 0x1d 0x4>; - reg = <0xef600b00 0x00000070>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <8>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - tah-device = <&TAH1>; - tah-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - - EMAC2: ethernet@ef600c00 { - device_type = "network"; - compatible = "ibm,emac-460sx", "ibm,emac4"; - interrupt-parent = <&EMAC2>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x15 0x4 - /*Wake*/ 0x1 &UIC2 0x1d 0x4>; - reg = <0xef600c00 0x00000070>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <2>; - mal-rx-channel = <16>; - cell-index = <2>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; /* emac2&3 only */ - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII1>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - - EMAC3: ethernet@ef600d00 { - device_type = "network"; - compatible = "ibm,emac-460sx", "ibm,emac4"; - interrupt-parent = <&EMAC3>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x16 0x4 - /*Wake*/ 0x1 &UIC2 0x1d 0x4>; - reg = <0xef600d00 0x00000070>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <3>; - mal-rx-channel = <24>; - cell-index = <3>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; /* emac2&3 only */ - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII1>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - }; - - }; - chosen { - linux,stdout-path = "/plb/opb/serial@ef600200"; - }; - -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ep405.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ep405.dts deleted file mode 100644 index 53ef06cc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ep405.dts +++ /dev/null @@ -1,230 +0,0 @@ -/* - * Device Tree Source for EP405 - * - * Copyright 2007 IBM Corp. - * Benjamin Herrenschmidt <benh@kernel.crashing.org> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "ep405"; - compatible = "ep405"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405GP"; - reg = <0x00000000>; - clock-frequency = <200000000>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; - d-cache-size = <16384>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - plb { - compatible = "ibm,plb3"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - MAL: mcmal { - compatible = "ibm,mcmal-405gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <1>; - num-rx-chans = <1>; - interrupt-parent = <&UIC0>; - interrupts = < - 0xb 0x4 /* TXEOB */ - 0xc 0x4 /* RXEOB */ - 0xa 0x4 /* SERR */ - 0xd 0x4 /* TXDE */ - 0xe 0x4 /* RXDE */>; - }; - - POB0: opb { - compatible = "ibm,opb-405gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xef600000 0xef600000 0x00a00000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by zImage */ - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC: i2c@ef600500 { - compatible = "ibm,iic-405gp", "ibm,iic"; - reg = <0xef600500 0x00000011>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - GPIO: gpio@ef600700 { - compatible = "ibm,gpio-405gp"; - reg = <0xef600700 0x00000020>; - }; - - EMAC: ethernet@ef600800 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-405gp", "ibm,emac"; - interrupt-parent = <&UIC0>; - interrupts = < - 0xf 0x4 /* Ethernet */ - 0x9 0x4 /* Ethernet Wake Up */>; - local-mac-address = [000000000000]; /* Filled in by zImage */ - reg = <0xef600800 0x00000070>; - mal-device = <&MAL>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000000>; - }; - - }; - - EBC0: ebc { - compatible = "ibm,ebc-405gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - - - /* The ranges property is supplied by the bootwrapper - * and is based on the firmware's configuration of the - * EBC bridge - */ - clock-frequency = <0>; /* Filled in by zImage */ - - /* NVRAM and RTC */ - nvrtc@4,200000 { - compatible = "ds1742"; - reg = <0x00000004 0x00200000 0x00000000>; /* size fixed up by zImage */ - }; - - /* "BCSR" CPLD contains a PCI irq controller */ - bcsr@4,0 { - compatible = "ep405-bcsr"; - reg = <0x00000004 0x00000000 0x00000010>; - interrupt-controller; - /* Routing table */ - irq-routing = [ 00 /* SYSERR */ - 01 /* STTM */ - 01 /* RTC */ - 01 /* FENET */ - 02 /* NB PCIIRQ mux ? */ - 03 /* SB Winbond 8259 ? */ - 04 /* Serial Ring */ - 05 /* USB (ep405pc) */ - 06 /* XIRQ 0 */ - 06 /* XIRQ 1 */ - 06 /* XIRQ 2 */ - 06 /* XIRQ 3 */ - 06 /* XIRQ 4 */ - 06 /* XIRQ 5 */ - 06 /* XIRQ 6 */ - 07]; /* Reserved */ - }; - }; - - PCI0: pci@ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; - primary; - reg = <0xeec00000 0x00000008 /* Config space access */ - 0xeed80000 0x00000004 /* IACK */ - 0xeed80000 0x00000004 /* Special cycle */ - 0xef480000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 - 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* That's all I know about IRQs on that thing ... */ - interrupt-map-mask = <0xf800 0x0 0x0 0x0>; - interrupt-map = < - /* USB */ - 0x7000 0x0 0x0 0x0 &UIC0 0x1e 0x8 /* IRQ5 */ - >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ep8248e.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ep8248e.dts deleted file mode 100644 index 756758fb..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ep8248e.dts +++ /dev/null @@ -1,206 +0,0 @@ -/* - * Device Tree for the Embedded Planet EP8248E board running PlanetCore. - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; -/ { - model = "EP8248E"; - compatible = "fsl,ep8248e"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - planetcore-SMC1 = &smc1; - planetcore-SCC1 = &scc1; - ethernet0 = ð0; - ethernet1 = ð1; - serial0 = &smc1; - serial1 = &scc1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8248@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; - clock-frequency = <0>; - }; - }; - - localbus@f0010100 { - compatible = "fsl,mpc8248-localbus", - "fsl,pq2-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xf0010100 0x40>; - - ranges = <0 0 0xfc000000 0x04000000 - 1 0 0xfa000000 0x00008000>; - - flash@0,3800000 { - compatible = "cfi-flash"; - reg = <0 0x3800000 0x800000>; - bank-width = <4>; - device-width = <2>; - }; - - bcsr@1,0 { - #address-cells = <2>; - #size-cells = <1>; - reg = <1 0 0x10>; - compatible = "fsl,ep8248e-bcsr"; - ranges; - - mdio { - device_type = "mdio"; - compatible = "fsl,ep8248e-mdio-bitbang"; - #address-cells = <1>; - #size-cells = <0>; - reg = <1 8 1>; - - PHY0: ethernet-phy@0 { - interrupt-parent = <&PIC>; - reg = <0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - interrupt-parent = <&PIC>; - reg = <1>; - device_type = "ethernet-phy"; - }; - }; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0>; - }; - - soc@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8248-immr", "fsl,pq2-soc", "simple-bus"; - ranges = <0x00000000 0xf0000000 0x00053000>; - - // Temporary until code stops depending on it. - device_type = "soc"; - - // Temporary -- will go away once kernel uses ranges for get_immrbase(). - reg = <0xf0000000 0x00053000>; - - cpm@119c0 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - compatible = "fsl,mpc8248-cpm", "fsl,cpm2", - "simple-bus"; - reg = <0x119c0 0x30>; - ranges; - - muram { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x2000 0x9800 0x800>; - }; - }; - - brg@119f0 { - compatible = "fsl,mpc8248-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x119f0 0x10 0x115f0 0x10>; - }; - - /* Monitor port/SMC1 */ - smc1: serial@11a80 { - device_type = "serial"; - compatible = "fsl,mpc8248-smc-uart", - "fsl,cpm2-smc-uart"; - reg = <0x11a80 0x20 0x87fc 2>; - interrupts = <4 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <7>; - fsl,cpm-command = <0x1d000000>; - linux,planetcore-label = "SMC1"; - }; - - /* "Serial" port/SCC1 */ - scc1: serial@11a00 { - device_type = "serial"; - compatible = "fsl,mpc8248-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a00 0x20 0x8000 0x100>; - interrupts = <40 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x00800000>; - linux,planetcore-label = "SCC1"; - }; - - eth0: ethernet@11300 { - device_type = "network"; - compatible = "fsl,mpc8248-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11300 0x20 0x8400 0x100 0x11390 1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - fsl,cpm-command = <0x12000300>; - }; - - eth1: ethernet@11320 { - device_type = "network"; - compatible = "fsl,mpc8248-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11320 0x20 0x8500 0x100 0x113b0 1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <33 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - fsl,cpm-command = <0x16200300>; - }; - - usb@11b60 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8248-usb", - "fsl,cpm2-usb"; - reg = <0x11b60 0x18 0x8b00 0x100>; - interrupt-parent = <&PIC>; - interrupts = <11 8>; - fsl,cpm-command = <0x2e600000>; - }; - }; - - PIC: interrupt-controller@10c00 { - #interrupt-cells = <2>; - interrupt-controller; - reg = <0x10c00 0x80>; - compatible = "fsl,mpc8248-pic", "fsl,pq2-pic"; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ep88xc.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ep88xc.dts deleted file mode 100644 index ae57d624..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ep88xc.dts +++ /dev/null @@ -1,215 +0,0 @@ -/* - * EP88xC Device Tree Source - * - * Copyright 2006 MontaVista Software, Inc. - * Copyright 2007,2008 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "EP88xC"; - compatible = "fsl,ep88xc"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,885@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <16>; - i-cache-line-size = <16>; - d-cache-size = <8192>; - i-cache-size = <8192>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - interrupts = <15 2>; // decrementer interrupt - interrupt-parent = <&PIC>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; - }; - - localbus@fa200100 { - compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xfa200100 0x40>; - - ranges = < - 0x0 0x0 0xfc000000 0x4000000 - 0x3 0x0 0xfa000000 0x1000000 - >; - - flash@0,2000000 { - compatible = "cfi-flash"; - reg = <0x0 0x2000000 0x2000000>; - bank-width = <4>; - device-width = <2>; - }; - - board-control@3,400000 { - reg = <0x3 0x400000 0x10>; - compatible = "fsl,ep88xc-bcsr"; - }; - }; - - soc@fa200000 { - compatible = "fsl,mpc885", "fsl,pq1-soc"; - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xfa200000 0x4000>; - bus-frequency = <0>; - - // Temporary -- will go away once kernel uses ranges for get_immrbase(). - reg = <0xfa200000 0x4000>; - - mdio@e00 { - compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio"; - reg = <0xe00 0x188>; - #address-cells = <1>; - #size-cells = <0>; - - PHY0: ethernet-phy@0 { - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - reg = <0x1>; - device_type = "ethernet-phy"; - }; - }; - - ethernet@e00 { - device_type = "network"; - compatible = "fsl,mpc885-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0xe00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <3 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - }; - - ethernet@1e00 { - device_type = "network"; - compatible = "fsl,mpc885-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0x1e00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <7 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - }; - - PIC: interrupt-controller@0 { - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x0 0x24>; - compatible = "fsl,mpc885-pic", "fsl,pq1-pic"; - }; - - pcmcia@80 { - #address-cells = <3>; - #interrupt-cells = <1>; - #size-cells = <2>; - compatible = "fsl,pq-pcmcia"; - device_type = "pcmcia"; - reg = <0x80 0x80>; - interrupt-parent = <&PIC>; - interrupts = <13 1>; - }; - - cpm@9c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc885-cpm", "fsl,cpm1"; - command-proc = <0x9c0>; - interrupts = <0>; // cpm error interrupt - interrupt-parent = <&CPM_PIC>; - reg = <0x9c0 0x40>; - ranges; - - muram@2000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2000 0x2000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x1c00>; - }; - }; - - brg@9f0 { - compatible = "fsl,mpc885-brg", - "fsl,cpm1-brg", - "fsl,cpm-brg"; - reg = <0x9f0 0x10>; - }; - - CPM_PIC: interrupt-controller@930 { - interrupt-controller; - #interrupt-cells = <1>; - interrupts = <5 2 0 2>; - interrupt-parent = <&PIC>; - reg = <0x930 0x20>; - compatible = "fsl,mpc885-cpm-pic", - "fsl,cpm1-pic"; - }; - - // MON-1 - serial@a80 { - device_type = "serial"; - compatible = "fsl,mpc885-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa80 0x10 0x3e80 0x40>; - interrupts = <4>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x90>; - linux,planetcore-label = "SMC1"; - }; - - // SER-1 - serial@a20 { - device_type = "serial"; - compatible = "fsl,mpc885-scc-uart", - "fsl,cpm1-scc-uart"; - reg = <0xa20 0x20 0x3d00 0x80>; - interrupts = <29>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x40>; - linux,planetcore-label = "SCC2"; - }; - - usb@a00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc885-usb", - "fsl,cpm1-usb"; - reg = <0xa00 0x18 0x1c00 0x80>; - interrupt-parent = <&CPM_PIC>; - interrupts = <30>; - fsl,cpm-command = <0000>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi deleted file mode 100644 index c8b2daa4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi +++ /dev/null @@ -1,252 +0,0 @@ -/* - * MPC8536 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8536-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x8000 */ -&pci0 { - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - interrupts = <24 0x2 0 0>; - bus-range = <0 0xff>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; -}; - -/* controller at 0x9000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <25 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <25 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci2 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xb000 */ -&pci3 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <27 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <27 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 - >; - }; -}; -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8536-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8536-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8536-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" - -/include/ "pq3-espi-0.dtsi" - spi@7000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-gpio-0.dtsi" - - /* mark compat w/8572 to get some erratum treatment */ - gpio-controller@f000 { - compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio"; - }; - - sata@18000 { - compatible = "fsl,mpc8536-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - cell-index = <1>; - interrupts = <74 0x2 0 0>; - }; - - sata@19000 { - compatible = "fsl,mpc8536-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - cell-index = <2>; - interrupts = <41 0x2 0 0>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8536-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-etsec1-0.dtsi" -/include/ "pq3-etsec1-timer-0.dtsi" - - usb@22000 { - compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <28 0x2 0 0>; - }; - - usb@23000 { - compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <46 0x2 0 0>; - }; - - ptp_clock@24e00 { - interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>; - }; - -/include/ "pq3-etsec1-2.dtsi" - - ethernet@26000 { - cell-index = <1>; - }; - - usb@2b000 { - compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr"; - reg = <0x2b000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <60 0x2 0 0>; - }; - -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - compatible = "fsl,mpc8536-esdhc", "fsl,esdhc"; - }; - -/include/ "pq3-sec3.0-0.dtsi" -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - - global-utilities@e0000 { - compatible = "fsl,mpc8536-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi deleted file mode 100644 index 7de45a78..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi +++ /dev/null @@ -1,63 +0,0 @@ -/* - * MPC8536 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,MPC8536"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8536@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi deleted file mode 100644 index b68eb119..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi +++ /dev/null @@ -1,191 +0,0 @@ -/* - * MPC8544 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8544-lbc", "fsl,pq3-localbus", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x8000 */ -&pci0 { - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - interrupts = <24 0x2 0 0>; - bus-range = <0 0xff>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; -}; - -/* controller at 0x9000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <25 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <25 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci2 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xb000 */ -&pci3 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <27 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <27 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8544-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8544-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8544-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8544-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-etsec1-0.dtsi" -/include/ "pq3-etsec1-2.dtsi" - - ethernet@26000 { - cell-index = <1>; - }; - -/include/ "pq3-sec2.1-0.dtsi" -/include/ "pq3-mpic.dtsi" - - global-utilities@e0000 { - compatible = "fsl,mpc8544-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi deleted file mode 100644 index 8777f923..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi +++ /dev/null @@ -1,63 +0,0 @@ -/* - * MPC8544 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,MPC8544"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8544@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi deleted file mode 100644 index 579d76cb..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi +++ /dev/null @@ -1,159 +0,0 @@ -/* - * MPC8548 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8548-lbc", "fsl,pq3-localbus", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x8000 */ -&pci0 { - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - interrupts = <24 0x2 0 0>; - bus-range = <0 0xff>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; -}; - -/* controller at 0x9000 */ -&pci1 { - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - interrupts = <25 0x2 0 0>; - bus-range = <0 0xff>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; -}; - -/* controller at 0xa000 */ -&pci2 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <48 2 0 0>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8548-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8548-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8548-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8548-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-etsec1-0.dtsi" -/include/ "pq3-etsec1-1.dtsi" -/include/ "pq3-etsec1-2.dtsi" -/include/ "pq3-etsec1-3.dtsi" - -/include/ "pq3-sec2.1-0.dtsi" -/include/ "pq3-mpic.dtsi" -/include/ "pq3-rmu-0.dtsi" - - global-utilities@e0000 { - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi deleted file mode 100644 index 720422d8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi +++ /dev/null @@ -1,64 +0,0 @@ -/* - * MPC8548 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,MPC8548"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8548@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi deleted file mode 100644 index 64e7075a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi +++ /dev/null @@ -1,270 +0,0 @@ -/* - * MPC8568 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus", "simple-bus"; - interrupts = <19 2 0 0>; - sleep = <&pmc 0x08000000>; -}; - -/* controller at 0x8000 */ -&pci0 { - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - interrupts = <24 0x2 0 0>; - bus-range = <0 0xff>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - sleep = <&pmc 0x80000000>; -}; - -/* controller at 0xa000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - sleep = <&pmc 0x20000000>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <48 2 0 0>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - sleep = <&pmc 0x00080000>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8568-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8568-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8568-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - - i2c-sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x00000004>; - ranges; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" - - }; - - duart-sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x00000002>; - ranges; - -/include/ "pq3-duart-0.dtsi" - - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8568-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" - dma@21300 { - sleep = <&pmc 0x00000400>; - }; - -/include/ "pq3-etsec1-0.dtsi" - ethernet@24000 { - sleep = <&pmc 0x00000080>; - }; - -/include/ "pq3-etsec1-1.dtsi" - ethernet@25000 { - sleep = <&pmc 0x00000040>; - }; - - par_io@e0100 { - reg = <0xe0100 0x100>; - device_type = "par_io"; - }; - -/include/ "pq3-sec2.1-0.dtsi" - crypto@30000 { - sleep = <&pmc 0x01000000>; - }; - -/include/ "pq3-mpic.dtsi" -/include/ "pq3-rmu-0.dtsi" - rmu@d3000 { - sleep = <&pmc 0x00040000>; - }; - - global-utilities@e0000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8568-guts", "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - ranges = <0 0xe0000 0x1000>; - fsl,has-rstcr; - - pmc: power@70 { - compatible = "fsl,mpc8568-pmc", - "fsl,mpc8548-pmc"; - reg = <0x70 0x20>; - }; - }; -}; - -&qe { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - sleep = <&pmc 0x00000800>; - brg-frequency = <0>; - bus-frequency = <396000000>; - fsl,qe-num-riscs = <2>; - fsl,qe-num-snums = <28>; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30 - interrupt-parent = <&mpic>; - }; - - spi@4c0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,spi"; - reg = <0x4c0 0x40>; - cell-index = <0>; - interrupts = <2>; - interrupt-parent = <&qeic>; - }; - - spi@500 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - }; - - ucc@2000 { - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - }; - - ucc@3000 { - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - }; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x10000 0x10000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0x10000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi deleted file mode 100644 index eacd62c5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi +++ /dev/null @@ -1,65 +0,0 @@ -/* - * MPC8568 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,MPC8568"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8568@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - sleep = <&pmc 0x00008000 // core - &pmc 0x00004000>; // timebase - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi deleted file mode 100644 index 3e6346a4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi +++ /dev/null @@ -1,304 +0,0 @@ -/* - * MPC8569 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; - sleep = <&pmc 0x08000000>; -}; - -/* controller at 0xa000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - sleep = <&pmc 0x20000000>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <48 2 0 0>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - sleep = <&pmc 0x00080000>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8569-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8569-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8569-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - - i2c-sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x00000004>; - ranges; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" - - }; - - duart-sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x00000002>; - ranges; - -/include/ "pq3-duart-0.dtsi" - - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8569-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - sleep = <&pmc 0x00200000>; - }; - - par_io@e0100 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xe0100 0x100>; - ranges = <0x0 0xe0100 0x100>; - device_type = "par_io"; - }; - -/include/ "pq3-sec3.1-0.dtsi" - crypto@30000 { - sleep = <&pmc 0x01000000>; - }; - -/include/ "pq3-mpic.dtsi" -/include/ "pq3-rmu-0.dtsi" - rmu@d3000 { - sleep = <&pmc 0x00040000>; - }; - - global-utilities@e0000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8569-guts", "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - ranges = <0 0xe0000 0x1000>; - fsl,has-rstcr; - - pmc: power@70 { - compatible = "fsl,mpc8569-pmc", - "fsl,mpc8548-pmc"; - reg = <0x70 0x20>; - }; - }; -}; - -&qe { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - sleep = <&pmc 0x00000800>; - brg-frequency = <0>; - bus-frequency = <0>; - fsl,qe-num-riscs = <4>; - fsl,qe-num-snums = <46>; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30 - interrupt-parent = <&mpic>; - }; - - timer@440 { - compatible = "fsl,mpc8569-qe-gtm", - "fsl,qe-gtm", "fsl,gtm"; - reg = <0x440 0x40>; - interrupts = <12 13 14 15>; - interrupt-parent = <&qeic>; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - - spi@4c0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8569-qe-spi", "fsl,spi"; - reg = <0x4c0 0x40>; - cell-index = <0>; - interrupts = <2>; - interrupt-parent = <&qeic>; - }; - - spi@500 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - }; - - usb@6c0 { - compatible = "fsl,mpc8569-qe-usb", - "fsl,mpc8323-qe-usb"; - reg = <0x6c0 0x40 0x8b00 0x100>; - interrupts = <11>; - interrupt-parent = <&qeic>; - }; - - ucc@2000 { - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - }; - - ucc@2200 { - cell-index = <3>; - reg = <0x2200 0x200>; - interrupts = <34>; - interrupt-parent = <&qeic>; - }; - - ucc@3000 { - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - }; - - ucc@3200 { - cell-index = <4>; - reg = <0x3200 0x200>; - interrupts = <35>; - interrupt-parent = <&qeic>; - }; - - ucc@3400 { - cell-index = <6>; - reg = <0x3400 0x200>; - interrupts = <41>; - interrupt-parent = <&qeic>; - }; - - ucc@3600 { - cell-index = <8>; - reg = <0x3600 0x200>; - interrupts = <43>; - interrupt-parent = <&qeic>; - }; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x10000 0x20000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0x20000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi deleted file mode 100644 index b07064d1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi +++ /dev/null @@ -1,64 +0,0 @@ -/* - * MPC8569 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,MPC8569"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8569@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - sleep = <&pmc 0x00008000 // core - &pmc 0x00004000>; // timebase - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi deleted file mode 100644 index d44e25a4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi +++ /dev/null @@ -1,196 +0,0 @@ -/* - * MPC8572 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x8000 */ -&pci0 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <24 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <24 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0x9000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <25 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <25 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci2 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8572-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8572-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - - memory-controller@6000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x6000 0x1000>; - interrupts = <18 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" -/include/ "pq3-dma-1.dtsi" -/include/ "pq3-gpio-0.dtsi" - gpio-controller@f000 { - compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio"; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8572-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x100000>; // L2,1M - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-etsec1-0.dtsi" -/include/ "pq3-etsec1-timer-0.dtsi" - - ptp_clock@24e00 { - interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>; - }; - -/include/ "pq3-etsec1-1.dtsi" -/include/ "pq3-etsec1-2.dtsi" -/include/ "pq3-etsec1-3.dtsi" -/include/ "pq3-sec3.0-0.dtsi" -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - - global-utilities@e0000 { - compatible = "fsl,mpc8572-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi deleted file mode 100644 index ca188326..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi +++ /dev/null @@ -1,70 +0,0 @@ -/* - * MPC8572 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,MPC8572"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8572@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,8572@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi deleted file mode 100644 index 0bde9ee8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi +++ /dev/null @@ -1,202 +0,0 @@ -/* - * P1010/P1014 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&ifc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,ifc", "simple-bus"; - interrupts = <16 2 0 0 19 2 0 0>; -}; - -/* controller at 0x9000 */ -&pci0 { - compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci1 { - compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p1010-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p1010-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <16 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,p1010-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" -/include/ "pq3-espi-0.dtsi" - spi0: spi@7000 { - fsl,espi-num-chipselects = <1>; - }; - -/include/ "pq3-gpio-0.dtsi" -/include/ "pq3-sata2-0.dtsi" -/include/ "pq3-sata2-1.dtsi" - - can0: can@1c000 { - compatible = "fsl,p1010-flexcan"; - reg = <0x1c000 0x1000>; - interrupts = <48 0x2 0 0>; - }; - - can1: can@1d000 { - compatible = "fsl,p1010-flexcan"; - reg = <0x1d000 0x1000>; - interrupts = <61 0x2 0 0>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,p1010-l2-cache-controller", - "fsl,p1014-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2,256K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-usb2-dr-0.dtsi" - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - compatible = "fsl,p1010-esdhc", "fsl,esdhc"; - sdhci,auto-cmd12; - }; - -/include/ "pq3-sec4.4-0.dtsi" -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - -/include/ "pq3-etsec2-0.dtsi" - enet0: ethernet@b0000 { - queue-group@b0000 { - fsl,rx-bit-map = <0xff>; - fsl,tx-bit-map = <0xff>; - }; - }; - -/include/ "pq3-etsec2-1.dtsi" - enet1: ethernet@b1000 { - queue-group@b1000 { - fsl,rx-bit-map = <0xff>; - fsl,tx-bit-map = <0xff>; - }; - }; - -/include/ "pq3-etsec2-2.dtsi" - enet2: ethernet@b2000 { - queue-group@b2000 { - fsl,rx-bit-map = <0xff>; - fsl,tx-bit-map = <0xff>; - }; - - }; - - global-utilities@e0000 { - compatible = "fsl,p1010-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi deleted file mode 100644 index 7354a8f9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi +++ /dev/null @@ -1,64 +0,0 @@ -/* - * P1010/P1014 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P1010"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - can0 = &can0; - can1 = &can1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P1010@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi deleted file mode 100644 index 68cc5e7f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi +++ /dev/null @@ -1,184 +0,0 @@ -/* - * P1020/P1011 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x9000 */ -&pci0 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p1020-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p1020-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <16 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,p1020-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" - -/include/ "pq3-espi-0.dtsi" - spi@7000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-gpio-0.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,p1020-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2,256K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-usb2-dr-0.dtsi" - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; -/include/ "pq3-usb2-dr-1.dtsi" - usb@23000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; - -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - compatible = "fsl,p1020-esdhc", "fsl,esdhc"; - sdhci,auto-cmd12; - }; -/include/ "pq3-sec3.3-0.dtsi" - -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - -/include/ "pq3-etsec2-0.dtsi" - enet0: enet0_grp2: ethernet@b0000 { - }; - -/include/ "pq3-etsec2-1.dtsi" - enet1: enet1_grp2: ethernet@b1000 { - }; - -/include/ "pq3-etsec2-2.dtsi" - enet2: enet2_grp2: ethernet@b2000 { - }; - - global-utilities@e0000 { - compatible = "fsl,p1020-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; - -/include/ "pq3-etsec2-grp2-0.dtsi" -/include/ "pq3-etsec2-grp2-1.dtsi" -/include/ "pq3-etsec2-grp2-2.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi deleted file mode 100644 index 6f0376e5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi +++ /dev/null @@ -1,68 +0,0 @@ -/* - * P1020/P1011 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P1020"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P1020@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P1020@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi deleted file mode 100644 index 4252ef85..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi +++ /dev/null @@ -1,232 +0,0 @@ -/* - * P1021/P1012 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x9000 */ -&pci0 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p1021-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p1021-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <16 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,p1021-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" - -/include/ "pq3-espi-0.dtsi" - spi@7000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-gpio-0.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,p1021-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2,256K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-usb2-dr-0.dtsi" - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; - -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - sdhci,auto-cmd12; - }; - -/include/ "pq3-sec3.3-0.dtsi" - -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - -/include/ "pq3-etsec2-0.dtsi" - enet0: enet0_grp2: ethernet@b0000 { - }; - -/include/ "pq3-etsec2-1.dtsi" - enet1: enet1_grp2: ethernet@b1000 { - }; - -/include/ "pq3-etsec2-2.dtsi" - enet2: enet2_grp2: ethernet@b2000 { - }; - - global-utilities@e0000 { - compatible = "fsl,p1021-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; - -&qe { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - fsl,qe-num-riscs = <1>; - fsl,qe-num-snums = <28>; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - interrupts = <63 2 0 0 60 2 0 0>; //high:47 low:44 - }; - - ucc@2000 { - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - }; - - mdio@2120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2120 0x18>; - compatible = "fsl,ucc-mdio"; - }; - - ucc@2400 { - cell-index = <5>; - reg = <0x2400 0x200>; - interrupts = <40>; - interrupt-parent = <&qeic>; - }; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x10000 0x6000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0x6000>; - }; - }; -}; - -/include/ "pq3-etsec2-grp2-0.dtsi" -/include/ "pq3-etsec2-grp2-1.dtsi" -/include/ "pq3-etsec2-grp2-2.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi deleted file mode 100644 index 4abd54bc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi +++ /dev/null @@ -1,68 +0,0 @@ -/* - * P1021/P1012 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P1021"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P1021@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P1021@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi deleted file mode 100644 index 06216b8c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi +++ /dev/null @@ -1,246 +0,0 @@ -/* - * P1022/P1013 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - /* - * The localbus on the P1022 is not a simple-bus because of the eLBC - * pin muxing when the DIU is enabled. - */ - compatible = "fsl,p1022-elbc", "fsl,elbc"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x9000 */ -&pci0 { - compatible = "fsl,p1022-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci1 { - compatible = "fsl,p1022-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xb000 */ -&pci2 { - compatible = "fsl,p1022-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p1022-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p1022-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <16 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,p1022-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" -/include/ "pq3-espi-0.dtsi" - spi@7000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-dma-1.dtsi" - dma@c300 { - dma00: dma-channel@0 { - compatible = "fsl,ssi-dma-channel"; - }; - dma01: dma-channel@80 { - compatible = "fsl,ssi-dma-channel"; - }; - }; - -/include/ "pq3-gpio-0.dtsi" - - display@10000 { - compatible = "fsl,diu", "fsl,p1022-diu"; - reg = <0x10000 1000>; - interrupts = <64 2 0 0>; - }; - - ssi@15000 { - compatible = "fsl,mpc8610-ssi"; - cell-index = <0>; - reg = <0x15000 0x100>; - interrupts = <75 2 0 0>; - fsl,playback-dma = <&dma00>; - fsl,capture-dma = <&dma01>; - fsl,fifo-depth = <15>; - }; - -/include/ "pq3-sata2-0.dtsi" -/include/ "pq3-sata2-1.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,p1022-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2,256K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-usb2-dr-0.dtsi" - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; -/include/ "pq3-usb2-dr-1.dtsi" - usb@23000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; - -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - compatible = "fsl,p1022-esdhc", "fsl,esdhc"; - sdhci,auto-cmd12; - }; - -/include/ "pq3-sec3.3-0.dtsi" -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - -/include/ "pq3-etsec2-0.dtsi" - enet0: enet0_grp2: ethernet@b0000 { - }; - -/include/ "pq3-etsec2-1.dtsi" - enet1: enet1_grp2: ethernet@b1000 { - }; - - global-utilities@e0000 { - compatible = "fsl,p1022-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - power@e0070{ - compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc"; - reg = <0xe0070 0x20>; - }; - -}; - -/include/ "pq3-etsec2-grp2-0.dtsi" -/include/ "pq3-etsec2-grp2-1.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi deleted file mode 100644 index e930f4f7..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi +++ /dev/null @@ -1,68 +0,0 @@ -/* - * P1022/P1013 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P1022"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P1022@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P1022@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi deleted file mode 100644 index 941fa159..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi +++ /dev/null @@ -1,227 +0,0 @@ -/* - * P1023/P1017 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0xa000 */ -&pci0 { - compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - }; -}; - -/* controller at 0x9000 */ -&pci1 { - compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - }; -}; - -/* controller at 0xb000 */ -&pci2 { - compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p1023-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p1023-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <16 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,p1023-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" - -/include/ "pq3-espi-0.dtsi" - spi@7000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-gpio-0.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,p1023-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2,256K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-usb2-dr-0.dtsi" - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; - - crypto: crypto@300000 { - compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x30000 0x10000>; - ranges = <0 0x30000 0x10000>; - interrupts = <58 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <45 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <45 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <57 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <57 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.2-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; - }; - -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - - global-utilities@e0000 { - compatible = "fsl,p1023-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi deleted file mode 100644 index ac45f6d9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi +++ /dev/null @@ -1,76 +0,0 @@ -/* - * P1023/P1017 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P1023"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P1023@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P1023@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi deleted file mode 100644 index 884e01bc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi +++ /dev/null @@ -1,201 +0,0 @@ -/* - * P2020/P2010 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0xa000 */ -&pci0 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0x9000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <25 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <25 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0x8000 */ -&pci2 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <24 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <24 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p2020-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p2020-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,p2020-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" -/include/ "pq3-espi-0.dtsi" - spi0: spi@7000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-dma-1.dtsi" -/include/ "pq3-gpio-0.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,p2020-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2,512K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-usb2-dr-0.dtsi" - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; -/include/ "pq3-etsec1-0.dtsi" -/include/ "pq3-etsec1-timer-0.dtsi" - - ptp_clock@24e00 { - interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>; - }; - - -/include/ "pq3-etsec1-1.dtsi" -/include/ "pq3-etsec1-2.dtsi" -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - compatible = "fsl,p2020-esdhc", "fsl,esdhc"; - }; - -/include/ "pq3-sec3.1-0.dtsi" -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - - global-utilities@e0000 { - compatible = "fsl,p2020-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi deleted file mode 100644 index 32132886..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi +++ /dev/null @@ -1,69 +0,0 @@ -/* - * P2020/P2010 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P2020"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P2020@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P2020@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi deleted file mode 100644 index 531eab82..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi +++ /dev/null @@ -1,327 +0,0 @@ -/* - * P2041/P2040 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; -}; - -/* controller at 0x200000 */ -&pci0 { - compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 15>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; -}; - -/* controller at 0x201000 */ -&pci1 { - compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; -}; - -/* controller at 0x202000 */ -&pci2 { - compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; -}; - -&dcsr { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr1>; - reg = <0x12000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - dcsr-cpu-sb-proxy@42000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu2>; - reg = <0x42000 0x1000>; - }; - dcsr-cpu-sb-proxy@43000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu3>; - reg = <0x43000 0x1000>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr1: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000>; - interrupts = <16 2 1 27>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - -/include/ "qoriq-mpic.dtsi" - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p2041-serdes"; - reg = <0xea000 0x1000>; - }; - -/include/ "qoriq-dma-0.dtsi" -/include/ "qoriq-dma-1.dtsi" -/include/ "qoriq-espi-0.dtsi" - spi@110000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "qoriq-esdhc-0.dtsi" - sdhc@114000 { - sdhci,auto-cmd12; - }; - -/include/ "qoriq-i2c-0.dtsi" -/include/ "qoriq-i2c-1.dtsi" -/include/ "qoriq-duart-0.dtsi" -/include/ "qoriq-duart-1.dtsi" -/include/ "qoriq-gpio-0.dtsi" -/include/ "qoriq-usb2-mph-0.dtsi" - usb0: usb@210000 { - compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - phy_type = "utmi"; - port0; - }; - -/include/ "qoriq-usb2-dr-0.dtsi" - usb1: usb@211000 { - compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - dr_mode = "host"; - phy_type = "utmi"; - }; - -/include/ "qoriq-sata2-0.dtsi" -/include/ "qoriq-sata2-1.dtsi" -/include/ "qoriq-sec4.2-0.dtsi" -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi deleted file mode 100644 index 2d0a40d6..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi +++ /dev/null @@ -1,111 +0,0 @@ -/* - * P2041 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P2041"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu2: PowerPC,e500mc@2 { - device_type = "cpu"; - reg = <2>; - next-level-cache = <&L2_2>; - L2_2: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu3: PowerPC,e500mc@3 { - device_type = "cpu"; - reg = <3>; - next-level-cache = <&L2_3>; - L2_3: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi deleted file mode 100644 index af4ebc80..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi +++ /dev/null @@ -1,354 +0,0 @@ -/* - * P3041 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus"; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; -}; - -/* controller at 0x200000 */ -&pci0 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 15>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; -}; - -/* controller at 0x201000 */ -&pci1 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; -}; - -/* controller at 0x202000 */ -&pci2 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; -}; - -/* controller at 0x203000 */ -&pci3 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 12>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 12>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 43 1 0 0 - 0000 0 0 2 &mpic 0 1 0 0 - 0000 0 0 3 &mpic 4 1 0 0 - 0000 0 0 4 &mpic 8 1 0 0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; -}; - -&dcsr { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p3041-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p3041-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr1>; - reg = <0x12000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p3041-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p3041-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - dcsr-cpu-sb-proxy@42000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu2>; - reg = <0x42000 0x1000>; - }; - dcsr-cpu-sb-proxy@43000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu3>; - reg = <0x43000 0x1000>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr1: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000>; - interrupts = <16 2 1 27>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - -/include/ "qoriq-mpic.dtsi" - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p3041-serdes"; - reg = <0xea000 0x1000>; - }; - -/include/ "qoriq-dma-0.dtsi" -/include/ "qoriq-dma-1.dtsi" -/include/ "qoriq-espi-0.dtsi" - spi@110000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "qoriq-esdhc-0.dtsi" - sdhc@114000 { - sdhci,auto-cmd12; - }; - -/include/ "qoriq-i2c-0.dtsi" -/include/ "qoriq-i2c-1.dtsi" -/include/ "qoriq-duart-0.dtsi" -/include/ "qoriq-duart-1.dtsi" -/include/ "qoriq-gpio-0.dtsi" -/include/ "qoriq-usb2-mph-0.dtsi" - usb0: usb@210000 { - compatible = "fsl-usb2-mph-v1.6", "fsl-usb2-mph"; - phy_type = "utmi"; - port0; - }; - -/include/ "qoriq-usb2-dr-0.dtsi" - usb1: usb@211000 { - compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - dr_mode = "host"; - phy_type = "utmi"; - }; - -/include/ "qoriq-sata2-0.dtsi" -/include/ "qoriq-sata2-1.dtsi" -/include/ "qoriq-sec4.2-0.dtsi" -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi deleted file mode 100644 index 136def35..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi +++ /dev/null @@ -1,112 +0,0 @@ -/* - * P3041 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P3041"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu2: PowerPC,e500mc@2 { - device_type = "cpu"; - reg = <2>; - next-level-cache = <&L2_2>; - L2_2: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu3: PowerPC,e500mc@3 { - device_type = "cpu"; - reg = <3>; - next-level-cache = <&L2_3>; - L2_3: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi deleted file mode 100644 index b3e56929..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi +++ /dev/null @@ -1,302 +0,0 @@ -/* - * P3060 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - compatible = "fsl,p3060-elbc", "fsl,elbc", "simple-bus"; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; -}; - -/* controller at 0x200000 */ -&pci0 { - compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 15>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; -}; - -/* controller at 0x201000 */ -&pci1 { - compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; -}; - -&dcsr { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p3060-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p3060-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr1>; - reg = <0x12000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p3060-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p3060-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - dcsr-cpu-sb-proxy@44000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu4>; - reg = <0x44000 0x1000>; - }; - dcsr-cpu-sb-proxy@45000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu5>; - reg = <0x45000 0x1000>; - }; - dcsr-cpu-sb-proxy@46000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu6>; - reg = <0x46000 0x1000>; - }; - dcsr-cpu-sb-proxy@47000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu7>; - reg = <0x47000 0x1000>; - }; - -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr1: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p3060-l3-cache-controller", "cache"; - reg = <0x10000 0x1000 - 0x11000 0x1000>; - interrupts = <16 2 1 27 - 16 2 1 26>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x5000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - -/include/ "qoriq-rmu-0.dtsi" -/include/ "qoriq-mpic.dtsi" - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p3060-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p3060-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p3060-serdes"; - reg = <0xea000 0x1000>; - }; - -/include/ "qoriq-dma-0.dtsi" -/include/ "qoriq-dma-1.dtsi" -/include/ "qoriq-espi-0.dtsi" - spi@110000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "qoriq-i2c-0.dtsi" -/include/ "qoriq-i2c-1.dtsi" -/include/ "qoriq-duart-0.dtsi" -/include/ "qoriq-duart-1.dtsi" -/include/ "qoriq-gpio-0.dtsi" -/include/ "qoriq-usb2-mph-0.dtsi" - usb@210000 { - compatible = "fsl-usb2-mph-v2.2", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - }; -/include/ "qoriq-usb2-dr-0.dtsi" - usb@211000 { - compatible = "fsl-usb2-dr-v2.2", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - }; -/include/ "qoriq-sec4.1-0.dtsi" -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi deleted file mode 100644 index 00c8e70e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi +++ /dev/null @@ -1,125 +0,0 @@ -/* - * P3060 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P3060"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu4: PowerPC,e500mc@4 { - device_type = "cpu"; - reg = <4>; - next-level-cache = <&L2_4>; - L2_4: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu5: PowerPC,e500mc@5 { - device_type = "cpu"; - reg = <5>; - next-level-cache = <&L2_5>; - L2_5: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu6: PowerPC,e500mc@6 { - device_type = "cpu"; - reg = <6>; - next-level-cache = <&L2_6>; - L2_6: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu7: PowerPC,e500mc@7 { - device_type = "cpu"; - reg = <7>; - next-level-cache = <&L2_7>; - L2_7: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi deleted file mode 100644 index 8d35d2c1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi +++ /dev/null @@ -1,350 +0,0 @@ -/* - * P4080/P4040 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus"; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; -}; - -/* controller at 0x200000 */ -&pci0 { - compatible = "fsl,p4080-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 15>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; -}; - -/* controller at 0x201000 */ -&pci1 { - compatible = "fsl,p4080-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; -}; - -/* controller at 0x202000 */ -&pci2 { - compatible = "fsl,p4080-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; -}; - -&dcsr { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr1>; - reg = <0x12000 0x1000>; - }; - dcsr-ddr@13000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr2>; - reg = <0x13000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - dcsr-cpu-sb-proxy@42000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu2>; - reg = <0x42000 0x1000>; - }; - dcsr-cpu-sb-proxy@43000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu3>; - reg = <0x43000 0x1000>; - }; - dcsr-cpu-sb-proxy@44000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu4>; - reg = <0x44000 0x1000>; - }; - dcsr-cpu-sb-proxy@45000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu5>; - reg = <0x45000 0x1000>; - }; - dcsr-cpu-sb-proxy@46000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu6>; - reg = <0x46000 0x1000>; - }; - dcsr-cpu-sb-proxy@47000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu7>; - reg = <0x47000 0x1000>; - }; - -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr1: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - ddr2: memory-controller@9000 { - compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller"; - reg = <0x9000 0x1000>; - interrupts = <16 2 1 22>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000 - 0x11000 0x1000>; - interrupts = <16 2 1 27 - 16 2 1 26>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x5000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - -/include/ "qoriq-rmu-0.dtsi" -/include/ "qoriq-mpic.dtsi" - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p4080-serdes"; - reg = <0xea000 0x1000>; - }; - -/include/ "qoriq-dma-0.dtsi" -/include/ "qoriq-dma-1.dtsi" -/include/ "qoriq-espi-0.dtsi" - spi@110000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "qoriq-esdhc-0.dtsi" - sdhc@114000 { - voltage-ranges = <3300 3300>; - sdhci,auto-cmd12; - }; - -/include/ "qoriq-i2c-0.dtsi" -/include/ "qoriq-i2c-1.dtsi" -/include/ "qoriq-duart-0.dtsi" -/include/ "qoriq-duart-1.dtsi" -/include/ "qoriq-gpio-0.dtsi" -/include/ "qoriq-usb2-mph-0.dtsi" -/include/ "qoriq-usb2-dr-0.dtsi" -/include/ "qoriq-sec4.0-0.dtsi" -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi deleted file mode 100644 index b9556ee3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi +++ /dev/null @@ -1,143 +0,0 @@ -/* - * P4080/P4040 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P4080"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu2: PowerPC,e500mc@2 { - device_type = "cpu"; - reg = <2>; - next-level-cache = <&L2_2>; - L2_2: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu3: PowerPC,e500mc@3 { - device_type = "cpu"; - reg = <3>; - next-level-cache = <&L2_3>; - L2_3: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu4: PowerPC,e500mc@4 { - device_type = "cpu"; - reg = <4>; - next-level-cache = <&L2_4>; - L2_4: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu5: PowerPC,e500mc@5 { - device_type = "cpu"; - reg = <5>; - next-level-cache = <&L2_5>; - L2_5: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu6: PowerPC,e500mc@6 { - device_type = "cpu"; - reg = <6>; - next-level-cache = <&L2_6>; - L2_6: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu7: PowerPC,e500mc@7 { - device_type = "cpu"; - reg = <7>; - next-level-cache = <&L2_7>; - L2_7: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi deleted file mode 100644 index 64b6abea..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi +++ /dev/null @@ -1,357 +0,0 @@ -/* - * P5020/5010 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus"; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; -}; - -/* controller at 0x200000 */ -&pci0 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 15>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; -}; - -/* controller at 0x201000 */ -&pci1 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; -}; - -/* controller at 0x202000 */ -&pci2 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; -}; - -/* controller at 0x203000 */ -&pci3 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 12>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 12>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 43 1 0 0 - 0000 0 0 2 &mpic 0 1 0 0 - 0000 0 0 3 &mpic 4 1 0 0 - 0000 0 0 4 &mpic 8 1 0 0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; -}; - -&dcsr { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr1>; - reg = <0x12000 0x1000>; - }; - dcsr-ddr@13000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr2>; - reg = <0x13000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr1: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - ddr2: memory-controller@9000 { - compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller"; - reg = <0x9000 0x1000>; - interrupts = <16 2 1 22>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000 - 0x11000 0x1000>; - interrupts = <16 2 1 27 - 16 2 1 26>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - -/include/ "qoriq-mpic.dtsi" - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p5020-serdes"; - reg = <0xea000 0x1000>; - }; - -/include/ "qoriq-dma-0.dtsi" -/include/ "qoriq-dma-1.dtsi" -/include/ "qoriq-espi-0.dtsi" - spi@110000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "qoriq-esdhc-0.dtsi" - sdhc@114000 { - sdhci,auto-cmd12; - }; - -/include/ "qoriq-i2c-0.dtsi" -/include/ "qoriq-i2c-1.dtsi" -/include/ "qoriq-duart-0.dtsi" -/include/ "qoriq-duart-1.dtsi" -/include/ "qoriq-gpio-0.dtsi" -/include/ "qoriq-usb2-mph-0.dtsi" - usb0: usb@210000 { - compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - phy_type = "utmi"; - port0; - }; - -/include/ "qoriq-usb2-dr-0.dtsi" - usb1: usb@211000 { - compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - dr_mode = "host"; - phy_type = "utmi"; - }; - -/include/ "qoriq-sata2-0.dtsi" -/include/ "qoriq-sata2-1.dtsi" -/include/ "qoriq-sec4.2-0.dtsi" -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi deleted file mode 100644 index ae823a47..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi +++ /dev/null @@ -1,96 +0,0 @@ -/* - * P5020/P5010 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P5020"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e5500@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e5500@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi deleted file mode 100644 index b5b37ad3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi +++ /dev/null @@ -1,66 +0,0 @@ -/* - * PQ3 DMA device tree stub [ controller @ offset 0x21000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <20 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <21 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <22 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <23 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi deleted file mode 100644 index 28cb8a55..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi +++ /dev/null @@ -1,66 +0,0 @@ -/* - * PQ3 DMA device tree stub [ controller @ offset 0xc300 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <76 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <77 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <78 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <79 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi deleted file mode 100644 index 5e268fdb..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi +++ /dev/null @@ -1,51 +0,0 @@ -/* - * PQ3 DUART device tree stub [ controller @ offset 0x4000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2 0 0>; -}; - -serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi deleted file mode 100644 index 5743433e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * PQ3 eSDHC device tree stub [ controller @ offset 0x2e000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -sdhc@2e000 { - compatible = "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <72 0x2 0 0>; - /* Filled in by U-Boot */ - clock-frequency = <0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi deleted file mode 100644 index 75854b2e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * PQ3 eSPI device tree stub [ controller @ offset 0x7000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -spi@7000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8536-espi"; - reg = <0x7000 0x1000>; - interrupts = <59 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi deleted file mode 100644 index 3b0650a9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi +++ /dev/null @@ -1,54 +0,0 @@ -/* - * PQ3 eTSEC device tree stub [ @ offsets 0x24000 ] - * - * Copyright 2011-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>; -}; - -mdio@24520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x24520 0x20>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi deleted file mode 100644 index 96693b41..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi +++ /dev/null @@ -1,54 +0,0 @@ -/* - * PQ3 eTSEC device tree stub [ @ offsets 0x25000 ] - * - * Copyright 2011-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>; -}; - -mdio@25520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x25520 0x20>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi deleted file mode 100644 index 6b3fab19..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi +++ /dev/null @@ -1,54 +0,0 @@ -/* - * PQ3 eTSEC device tree stub [ @ offsets 0x26000 ] - * - * Copyright 2011-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>; -}; - -mdio@26520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x26520 0x20>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi deleted file mode 100644 index 0da592d9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi +++ /dev/null @@ -1,54 +0,0 @@ -/* - * PQ3 eTSEC device tree stub [ @ offsets 0x27000 ] - * - * Copyright 2011-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 0 0 38 2 0 0 39 2 0 0>; -}; - -mdio@27520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x27520 0x20>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi deleted file mode 100644 index efe2ca04..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi +++ /dev/null @@ -1,39 +0,0 @@ -/* - * PQ3 eTSEC Timer (IEEE 1588) device tree stub [ @ offsets 0x24e00 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -ptp_clock@24e00 { - compatible = "fsl,etsec-ptp"; - reg = <0x24e00 0xb0>; - interrupts = <68 2 0 0 69 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi deleted file mode 100644 index 1382fec9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi +++ /dev/null @@ -1,60 +0,0 @@ -/* - * PQ3 eTSEC2 device tree stub [ @ offsets 0x24000/0xb0000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - -mdio@24000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,etsec2-mdio"; - reg = <0x24000 0x1000 0xb0030 0x4>; -}; - -ethernet@b0000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "fsl,etsec2"; - fsl,num_rx_queues = <0x8>; - fsl,num_tx_queues = <0x8>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - - queue-group@b0000 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb0000 0x1000>; - interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi deleted file mode 100644 index 221cd2ea..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi +++ /dev/null @@ -1,60 +0,0 @@ -/* - * PQ3 eTSEC2 device tree stub [ @ offsets 0x25000/0xb1000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - -mdio@25000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,etsec2-tbi"; - reg = <0x25000 0x1000 0xb1030 0x4>; -}; - -ethernet@b1000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "fsl,etsec2"; - fsl,num_rx_queues = <0x8>; - fsl,num_tx_queues = <0x8>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - - queue-group@b1000 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb1000 0x1000>; - interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi deleted file mode 100644 index 61456c31..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi +++ /dev/null @@ -1,59 +0,0 @@ -/* - * PQ3 eTSEC2 device tree stub [ @ offsets 0x26000/0xb2000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -mdio@26000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,etsec2-tbi"; - reg = <0x26000 0x1000 0xb1030 0x4>; -}; - -ethernet@b2000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "fsl,etsec2"; - fsl,num_rx_queues = <0x8>; - fsl,num_tx_queues = <0x8>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - - queue-group@b2000 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb2000 0x1000>; - interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi deleted file mode 100644 index 034ab8fa..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi +++ /dev/null @@ -1,42 +0,0 @@ -/* - * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb4000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&enet0_grp2 { - queue-group@b4000 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb4000 0x1000>; - interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi deleted file mode 100644 index 3be9ba3b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi +++ /dev/null @@ -1,42 +0,0 @@ -/* - * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb5000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&enet1_grp2 { - queue-group@b5000 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb5000 0x1000>; - interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi deleted file mode 100644 index 02a33457..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi +++ /dev/null @@ -1,42 +0,0 @@ -/* - * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb6000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&enet2_grp2 { - queue-group@b6000 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb6000 0x1000>; - interrupts = <25 2 0 0 26 2 0 0 27 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi deleted file mode 100644 index 72a3ef59..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * PQ3 GPIO device tree stub [ controller @ offset 0xf000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -gpio-controller@f000 { - #gpio-cells = <2>; - compatible = "fsl,pq3-gpio"; - reg = <0xf000 0x100>; - interrupts = <47 0x2 0 0>; - gpio-controller; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi deleted file mode 100644 index d1dd6fb8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi +++ /dev/null @@ -1,43 +0,0 @@ -/* - * PQ3 I2C device tree stub [ controller @ offset 0x3000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2 0 0>; - dfsrr; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi deleted file mode 100644 index a9bd803e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi +++ /dev/null @@ -1,43 +0,0 @@ -/* - * PQ3 I2C device tree stub [ controller @ offset 0x3100 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2 0 0>; - dfsrr; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi deleted file mode 100644 index 1cf0b77b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi +++ /dev/null @@ -1,43 +0,0 @@ -/* - * PQ3 MPIC Message (Group B) device tree stub [ controller @ offset 0x42400 ] - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -message@42400 { - compatible = "fsl,mpic-v3.1-msgr"; - reg = <0x42400 0x200>; - interrupts = < - 0xb4 2 0 0 - 0xb5 2 0 0 - 0xb6 2 0 0 - 0xb7 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi deleted file mode 100644 index 8734cffa..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi +++ /dev/null @@ -1,42 +0,0 @@ -/* - * PQ3 MPIC Timer (Group B) device tree stub [ controller @ offset 0x42100 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -timer@42100 { - compatible = "fsl,mpic-global-timer"; - reg = <0x42100 0x100 0x42300 4>; - interrupts = <4 0 3 0 - 5 0 3 0 - 6 0 3 0 - 7 0 3 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi deleted file mode 100644 index 71c30eb1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi +++ /dev/null @@ -1,79 +0,0 @@ -/* - * PQ3 MPIC device tree stub [ controller @ offset 0x40000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic"; - device_type = "open-pic"; - big-endian; - single-cpu-affinity; - last-interrupt-source = <255>; -}; - -timer@41100 { - compatible = "fsl,mpic-global-timer"; - reg = <0x41100 0x100 0x41300 4>; - interrupts = <0 0 3 0 - 1 0 3 0 - 2 0 3 0 - 3 0 3 0>; -}; - -message@41400 { - compatible = "fsl,mpic-v3.1-msgr"; - reg = <0x41400 0x200>; - interrupts = < - 0xb0 2 0 0 - 0xb1 2 0 0 - 0xb2 2 0 0 - 0xb3 2 0 0>; -}; - -msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 0 0 - 0xe1 0 0 0 - 0xe2 0 0 0 - 0xe3 0 0 0 - 0xe4 0 0 0 - 0xe5 0 0 0 - 0xe6 0 0 0 - 0xe7 0 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi deleted file mode 100644 index 587ca9ff..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi +++ /dev/null @@ -1,68 +0,0 @@ -/* - * PQ3 RIO Message Unit device tree stub [ controller @ offset 0xd3000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -rmu: rmu@d3000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,srio-rmu"; - reg = <0xd3000 0x500>; - ranges = <0x0 0xd3000 0x500>; - - message-unit@0 { - compatible = "fsl,srio-msg-unit"; - reg = <0x0 0x100>; - interrupts = < - 53 2 0 0 /* msg1_tx_irq */ - 54 2 0 0>;/* msg1_rx_irq */ - }; - message-unit@100 { - compatible = "fsl,srio-msg-unit"; - reg = <0x100 0x100>; - interrupts = < - 55 2 0 0 /* msg2_tx_irq */ - 56 2 0 0>;/* msg2_rx_irq */ - }; - doorbell-unit@400 { - compatible = "fsl,srio-dbell-unit"; - reg = <0x400 0x80>; - interrupts = < - 49 2 0 0 /* bell_outb_irq */ - 50 2 0 0>;/* bell_inb_irq */ - }; - port-write-unit@4e0 { - compatible = "fsl,srio-port-write-unit"; - reg = <0x4e0 0x20>; - interrupts = <48 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi deleted file mode 100644 index 3c28dd08..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi +++ /dev/null @@ -1,40 +0,0 @@ -/* - * PQ3 SATAv2 device tree stub [ controller @ offset 0x18000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -sata@18000 { - compatible = "fsl,pq-sata-v2"; - reg = <0x18000 0x1000>; - cell-index = <1>; - interrupts = <74 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi deleted file mode 100644 index eefaf285..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi +++ /dev/null @@ -1,40 +0,0 @@ -/* - * PQ3 SATAv2 device tree stub [ controller @ offset 0x19000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -sata@19000 { - compatible = "fsl,pq-sata-v2"; - reg = <0x19000 0x1000>; - cell-index = <2>; - interrupts = <41 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi deleted file mode 100644 index 02a5c7ae..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi +++ /dev/null @@ -1,43 +0,0 @@ -/* - * PQ3 Sec/Crypto 2.1 device tree stub [ controller @ offset 0x30000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto@30000 { - compatible = "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 0 0>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0xfe>; - fsl,descriptor-types-mask = <0x12b0ebf>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi deleted file mode 100644 index bba1ba44..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi +++ /dev/null @@ -1,45 +0,0 @@ -/* - * PQ3 Sec/Crypto 3.0 device tree stub [ controller @ offset 0x30000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto@30000 { - compatible = "fsl,sec3.0", - "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", - "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 0 0 58 2 0 0>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi deleted file mode 100644 index 8f0a5669..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi +++ /dev/null @@ -1,45 +0,0 @@ -/* - * PQ3 Sec/Crypto 3.1 device tree stub [ controller @ offset 0x30000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto@30000 { - compatible = "fsl,sec3.1", "fsl,sec3.0", - "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", - "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 0 0 58 2 0 0>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0xbfe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi deleted file mode 100644 index c227f274..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi +++ /dev/null @@ -1,45 +0,0 @@ -/* - * PQ3 Sec/Crypto 3.3 device tree stub [ controller @ offset 0x30000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto@30000 { - compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0", - "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", - "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 0 0 58 2 0 0>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x97c>; - fsl,descriptor-types-mask = <0x3a30abf>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi deleted file mode 100644 index d4c9d5da..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi +++ /dev/null @@ -1,65 +0,0 @@ -/* - * PQ3 Sec/Crypto 4.4 device tree stub [ controller @ offset 0x30000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto@30000 { - compatible = "fsl,sec-v4.4", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x30000 0x10000>; - interrupts = <58 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <45 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <45 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <45 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <45 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi deleted file mode 100644 index 185ab9dc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * PQ3 USB DR device tree stub [ controller @ offset 0x22000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -usb@22000 { - compatible = "fsl-usb2-dr"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <28 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi deleted file mode 100644 index fe24cd61..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * PQ3 USB DR device tree stub [ controller @ offset 0x23000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <46 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi deleted file mode 100644 index 1aebf3ea..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi +++ /dev/null @@ -1,66 +0,0 @@ -/* - * QorIQ DMA device tree stub [ controller @ offset 0x100000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -dma0: dma@100300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0x100300 0x4>; - ranges = <0x0 0x100100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <28 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <29 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <30 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <31 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi deleted file mode 100644 index ecf5e180..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi +++ /dev/null @@ -1,66 +0,0 @@ -/* - * QorIQ DMA device tree stub [ controller @ offset 0x101000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -dma1: dma@101300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0x101300 0x4>; - ranges = <0x0 0x101100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <32 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <33 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <34 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <35 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi deleted file mode 100644 index 225c07b4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi +++ /dev/null @@ -1,51 +0,0 @@ -/* - * QorIQ DUART device tree stub [ controller @ offset 0x11c000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -serial0: serial@11c500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x11c500 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; -}; - -serial1: serial@11c600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x11c600 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi deleted file mode 100644 index d23233a5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi +++ /dev/null @@ -1,51 +0,0 @@ -/* - * QorIQ DUART device tree stub [ controller @ offset 0x11d000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -serial2: serial@11d500 { - cell-index = <2>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x11d500 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; -}; - -serial3: serial@11d600 { - cell-index = <3>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x11d600 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi deleted file mode 100644 index 20835ae2..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi +++ /dev/null @@ -1,40 +0,0 @@ -/* - * QorIQ eSDHC device tree stub [ controller @ offset 0x114000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -sdhc: sdhc@114000 { - compatible = "fsl,esdhc"; - reg = <0x114000 0x1000>; - interrupts = <48 2 0 0>; - clock-frequency = <0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi deleted file mode 100644 index 6db06975..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * QorIQ eSPI device tree stub [ controller @ offset 0x110000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -spi@110000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8536-espi"; - reg = <0x110000 0x1000>; - interrupts = <53 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi deleted file mode 100644 index cf714f5f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * QorIQ GPIO device tree stub [ controller @ offset 0x130000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -gpio0: gpio@130000 { - compatible = "fsl,qoriq-gpio"; - reg = <0x130000 0x1000>; - interrupts = <55 2 0 0>; - #gpio-cells = <2>; - gpio-controller; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi deleted file mode 100644 index 5f9bf7de..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi +++ /dev/null @@ -1,53 +0,0 @@ -/* - * QorIQ I2C device tree stub [ controller @ offset 0x118000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -i2c@118000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x118000 0x100>; - interrupts = <38 2 0 0>; - dfsrr; -}; - -i2c@118100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x118100 0x100>; - interrupts = <38 2 0 0>; - dfsrr; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi deleted file mode 100644 index 7989bf5e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi +++ /dev/null @@ -1,53 +0,0 @@ -/* - * QorIQ I2C device tree stub [ controller @ offset 0x119000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -i2c@119000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <2>; - compatible = "fsl-i2c"; - reg = <0x119000 0x100>; - interrupts = <39 2 0 0>; - dfsrr; -}; - -i2c@119100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <3>; - compatible = "fsl-i2c"; - reg = <0x119100 0x100>; - interrupts = <39 2 0 0>; - dfsrr; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi deleted file mode 100644 index 08f42271..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi +++ /dev/null @@ -1,106 +0,0 @@ -/* - * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic", "chrp,open-pic"; - device_type = "open-pic"; - clock-frequency = <0x0>; -}; - -timer@41100 { - compatible = "fsl,mpic-global-timer"; - reg = <0x41100 0x100 0x41300 4>; - interrupts = <0 0 3 0 - 1 0 3 0 - 2 0 3 0 - 3 0 3 0>; -}; - -msi0: msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x200 0x44140 4>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 0 0 - 0xe1 0 0 0 - 0xe2 0 0 0 - 0xe3 0 0 0 - 0xe4 0 0 0 - 0xe5 0 0 0 - 0xe6 0 0 0 - 0xe7 0 0 0>; -}; - -msi1: msi@41800 { - compatible = "fsl,mpic-msi"; - reg = <0x41800 0x200 0x45140 4>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe8 0 0 0 - 0xe9 0 0 0 - 0xea 0 0 0 - 0xeb 0 0 0 - 0xec 0 0 0 - 0xed 0 0 0 - 0xee 0 0 0 - 0xef 0 0 0>; -}; - -msi2: msi@41a00 { - compatible = "fsl,mpic-msi"; - reg = <0x41a00 0x200 0x46140 4>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xf0 0 0 0 - 0xf1 0 0 0 - 0xf2 0 0 0 - 0xf3 0 0 0 - 0xf4 0 0 0 - 0xf5 0 0 0 - 0xf6 0 0 0 - 0xf7 0 0 0>; -}; - -timer@42100 { - compatible = "fsl,mpic-global-timer"; - reg = <0x42100 0x100 0x42300 4>; - interrupts = <4 0 3 0 - 5 0 3 0 - 6 0 3 0 - 7 0 3 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi deleted file mode 100644 index ca7fec79..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi +++ /dev/null @@ -1,68 +0,0 @@ -/* - * QorIQ RIO Message Unit device tree stub [ controller @ offset 0xd3000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -rmu: rmu@d3000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,srio-rmu"; - reg = <0xd3000 0x500>; - ranges = <0x0 0xd3000 0x500>; - - message-unit@0 { - compatible = "fsl,srio-msg-unit"; - reg = <0x0 0x100>; - interrupts = < - 60 2 0 0 /* msg1_tx_irq */ - 61 2 0 0>;/* msg1_rx_irq */ - }; - message-unit@100 { - compatible = "fsl,srio-msg-unit"; - reg = <0x100 0x100>; - interrupts = < - 62 2 0 0 /* msg2_tx_irq */ - 63 2 0 0>;/* msg2_rx_irq */ - }; - doorbell-unit@400 { - compatible = "fsl,srio-dbell-unit"; - reg = <0x400 0x80>; - interrupts = < - 56 2 0 0 /* bell_outb_irq */ - 57 2 0 0>;/* bell_inb_irq */ - }; - port-write-unit@4e0 { - compatible = "fsl,srio-port-write-unit"; - reg = <0x4e0 0x20>; - interrupts = <16 2 1 11>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi deleted file mode 100644 index b642047f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi +++ /dev/null @@ -1,39 +0,0 @@ -/* - * QorIQ SATAv2 device tree stub [ controller @ offset 0x220000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -sata@220000 { - compatible = "fsl,pq-sata-v2"; - reg = <0x220000 0x1000>; - interrupts = <68 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi deleted file mode 100644 index c5737025..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi +++ /dev/null @@ -1,39 +0,0 @@ -/* - * QorIQ SATAv2 device tree stub [ controller @ offset 0x221000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -sata@221000 { - compatible = "fsl,pq-sata-v2"; - reg = <0x221000 0x1000>; - interrupts = <69 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi deleted file mode 100644 index 0cbbac32..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi +++ /dev/null @@ -1,100 +0,0 @@ -/* - * QorIQ Sec/Crypto 4.0 device tree stub [ controller @ offset 0x300000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto: crypto@300000 { - compatible = "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; -}; - -sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi deleted file mode 100644 index 3308986b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi +++ /dev/null @@ -1,109 +0,0 @@ -/* - * QorIQ Sec/Crypto 4.1 device tree stub [ controller @ offset 0x300000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto: crypto@300000 { - compatible = "fsl,sec-v4.1", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.1-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.1-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.1-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.1-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.1-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.1-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.1-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.1-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.1-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; -}; - -sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.1-mon", "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi deleted file mode 100644 index 7990e0d3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi +++ /dev/null @@ -1,109 +0,0 @@ -/* - * QorIQ Sec/Crypto 4.2 device tree stub [ controller @ offset 0x300000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto: crypto@300000 { - compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.2-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; -}; - -sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi deleted file mode 100644 index 4dd6f84c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * QorIQ USB DR device tree stub [ controller @ offset 0x211000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -usb@211000 { - compatible = "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - reg = <0x211000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <45 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi deleted file mode 100644 index f053835a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * QorIQ USB Host device tree stub [ controller @ offset 0x210000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -usb@210000 { - compatible = "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - reg = <0x210000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <44 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/gamecube.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/gamecube.dts deleted file mode 100644 index ef3be0e5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/gamecube.dts +++ /dev/null @@ -1,114 +0,0 @@ -/* - * arch/powerpc/boot/dts/gamecube.dts - * - * Nintendo GameCube platform device tree source - * Copyright (C) 2007-2009 The GameCube Linux Team - * Copyright (C) 2007,2008,2009 Albert Herranz - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - */ - -/dts-v1/; - -/ { - model = "nintendo,gamecube"; - compatible = "nintendo,gamecube"; - #address-cells = <1>; - #size-cells = <1>; - - chosen { - bootargs = "root=/dev/gcnsda2 rootwait udbg-immortal"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x01800000>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,gekko@0 { - device_type = "cpu"; - reg = <0>; - clock-frequency = <486000000>; /* 486MHz */ - bus-frequency = <162000000>; /* 162MHz core-to-bus 3x */ - timebase-frequency = <40500000>; /* 162MHz / 4 */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - }; - }; - - /* devices contained int the flipper chipset */ - flipper { - #address-cells = <1>; - #size-cells = <1>; - compatible = "nintendo,flipper"; - ranges = <0x0c000000 0x0c000000 0x00010000>; - interrupt-parent = <&PIC>; - - video@0c002000 { - compatible = "nintendo,flipper-vi"; - reg = <0x0c002000 0x100>; - interrupts = <8>; - }; - - processor-interface@0c003000 { - compatible = "nintendo,flipper-pi"; - reg = <0x0c003000 0x100>; - - PIC: pic { - #interrupt-cells = <1>; - compatible = "nintendo,flipper-pic"; - interrupt-controller; - }; - }; - - dsp@0c005000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "nintendo,flipper-dsp"; - reg = <0x0c005000 0x200>; - interrupts = <6>; - - memory@0 { - compatible = "nintendo,flipper-aram"; - reg = <0 0x1000000>; /* 16MB */ - }; - }; - - disk@0c006000 { - compatible = "nintendo,flipper-di"; - reg = <0x0c006000 0x40>; - interrupts = <2>; - }; - - audio@0c006c00 { - compatible = "nintendo,flipper-ai"; - reg = <0x0c006c00 0x20>; - interrupts = <6>; - }; - - gamepad-controller@0c006400 { - compatible = "nintendo,flipper-si"; - reg = <0x0c006400 0x100>; - interrupts = <3>; - }; - - /* External Interface bus */ - exi@0c006800 { - compatible = "nintendo,flipper-exi"; - reg = <0x0c006800 0x40>; - virtual-reg = <0x0c006800>; - interrupts = <4>; - }; - }; -}; - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ge_imp3a.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ge_imp3a.dts deleted file mode 100644 index fefae416..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ge_imp3a.dts +++ /dev/null @@ -1,255 +0,0 @@ -/* - * GE IMP3A Device Tree Source - * - * Copyright 2010-2011 GE Intelligent Platforms Embedded Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Based on: P2020 DS Device Tree Source - * Copyright 2009 Freescale Semiconductor Inc. - */ - -/include/ "fsl/p2020si-pre.dtsi" - -/ { - model = "GE_IMP3A"; - compatible = "ge,imp3a"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fef05000 { - reg = <0 0xfef05000 0 0x1000>; - - ranges = <0x0 0x0 0x0 0xff000000 0x01000000 - 0x1 0x0 0x0 0xe0000000 0x08000000 - 0x2 0x0 0x0 0xe8000000 0x08000000 - 0x3 0x0 0x0 0xfc100000 0x00020000 - 0x4 0x0 0x0 0xfc000000 0x00008000 - 0x5 0x0 0x0 0xfc008000 0x00008000 - 0x6 0x0 0x0 0xfee00000 0x00040000 - 0x7 0x0 0x0 0xfee80000 0x00040000>; - - /* nor@0,0 is a mirror of part of the memory in nor@1,0 - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "ge,imp3a-firmware-mirror", "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - label = "firmware"; - reg = <0x0 0x1000000>; - read-only; - }; - }; - */ - - nor@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "ge,imp3a-paged-flash", "cfi-flash"; - reg = <0x1 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - label = "user"; - reg = <0x0 0x7800000>; - }; - - partition@7800000 { - label = "firmware"; - reg = <0x7800000 0x800000>; - read-only; - }; - }; - - nvram@3,0 { - device_type = "nvram"; - compatible = "simtek,stk14ca8"; - reg = <0x3 0x0 0x20000>; - }; - - fpga@4,0 { - compatible = "ge,imp3a-fpga-regs"; - reg = <0x4 0x0 0x20>; - }; - - gef_pic: pic@4,20 { - #interrupt-cells = <1>; - interrupt-controller; - device_type = "interrupt-controller"; - compatible = "ge,imp3a-fpga-pic", "gef,fpga-pic-1.00"; - reg = <0x4 0x20 0x20>; - interrupts = <6 7 0 0>; - }; - - gef_gpio: gpio@4,400 { - #gpio-cells = <2>; - compatible = "ge,imp3a-gpio"; - reg = <0x4 0x400 0x24>; - gpio-controller; - }; - - wdt@4,800 { - compatible = "ge,imp3a-fpga-wdt", "gef,fpga-wdt-1.00", - "gef,fpga-wdt"; - reg = <0x4 0x800 0x8>; - interrupts = <10 4>; - interrupt-parent = <&gef_pic>; - }; - - /* Second watchdog available, driver currently supports one. - wdt@4,808 { - compatible = "gef,imp3a-fpga-wdt", "gef,fpga-wdt-1.00", - "gef,fpga-wdt"; - reg = <0x4 0x808 0x8>; - interrupts = <9 4>; - interrupt-parent = <&gef_pic>; - }; - */ - - nand@6,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x6 0x0 0x40000>; - }; - - nand@7,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x7 0x0 0x40000>; - }; - }; - - soc: soc@fef00000 { - ranges = <0x0 0 0xfef00000 0x100000>; - - i2c@3000 { - hwmon@48 { - compatible = "national,lm92"; - reg = <0x48>; - }; - - hwmon@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - rtc@51 { - compatible = "epson,rx8581"; - reg = <0x51>; - }; - - eti@6b { - compatible = "dallas,ds1682"; - reg = <0x6b>; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - dr_mode = "host"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupt-parent = <&gef_pic>; - interrupts = <0xc 0x4>; - reg = <0x1>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&gef_pic>; - interrupts = <0xb 0x4>; - reg = <0x2>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26520 { - status = "disabled"; - }; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "gmii"; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "gmii"; - }; - - enet2: ethernet@26000 { - status = "disabled"; - }; - }; - - pci0: pcie@fef08000 { - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xfe020000 0x0 0x10000>; - reg = <0 0xfef08000 0 0x1000>; - - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci1: pcie@fef09000 { - reg = <0 0xfef09000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xfe010000 0x0 0x10000>; - - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - - }; - - pci2: pcie@fef0a000 { - reg = <0 0xfef0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xfe000000 0x0 0x10000>; - - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; -}; - -/include/ "fsl/p2020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_ppc9a.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_ppc9a.dts deleted file mode 100644 index 38dcb96c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_ppc9a.dts +++ /dev/null @@ -1,427 +0,0 @@ -/* - * GE PPC9A Device Tree Source - * - * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Based on: SBS CM6 Device Tree Source - * Copyright 2007 SBS Technologies GmbH & Co. KG - * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source) - * Copyright 2006 Freescale Semiconductor Inc. - */ - -/* - * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts - */ - -/dts-v1/; - -/ { - model = "GEF_PPC9A"; - compatible = "gef,ppc9a"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8641@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - PowerPC,8641@1 { - device_type = "cpu"; - reg = <1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x40000000>; // set by uboot - }; - - localbus@fef05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8641-localbus", "simple-bus"; - reg = <0xfef05000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash - 1 0 0xe8000000 0x08000000 // Paged Flash 0 - 2 0 0xe0000000 0x08000000 // Paged Flash 1 - 3 0 0xfc100000 0x00020000 // NVRAM - 4 0 0xfc000000 0x00008000 // FPGA - 5 0 0xfc008000 0x00008000 // AFIX FPGA - 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit) - 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit) - - /* flash@0,0 is a mirror of part of the memory in flash@1,0 - flash@0,0 { - compatible = "gef,ppc9a-firmware-mirror", "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <4>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "firmware"; - reg = <0x0 0x1000000>; - read-only; - }; - }; - */ - - flash@1,0 { - compatible = "gef,ppc9a-paged-flash", "cfi-flash"; - reg = <0x1 0x0 0x8000000>; - bank-width = <4>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "user"; - reg = <0x0 0x7800000>; - }; - partition@7800000 { - label = "firmware"; - reg = <0x7800000 0x800000>; - read-only; - }; - }; - - nvram@3,0 { - device_type = "nvram"; - compatible = "simtek,stk14ca8"; - reg = <0x3 0x0 0x20000>; - }; - - fpga@4,0 { - compatible = "gef,ppc9a-fpga-regs"; - reg = <0x4 0x0 0x40>; - }; - - wdt@4,2000 { - compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00", - "gef,fpga-wdt"; - reg = <0x4 0x2000 0x8>; - interrupts = <0x1a 0x4>; - interrupt-parent = <&gef_pic>; - }; - /* Second watchdog available, driver currently supports one. - wdt@4,2010 { - compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00", - "gef,fpga-wdt"; - reg = <0x4 0x2010 0x8>; - interrupts = <0x1b 0x4>; - interrupt-parent = <&gef_pic>; - }; - */ - gef_pic: pic@4,4000 { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "gef,ppc9a-fpga-pic", "gef,fpga-pic-1.00"; - reg = <0x4 0x4000 0x20>; - interrupts = <0x8 - 0x9>; - interrupt-parent = <&mpic>; - - }; - gef_gpio: gpio@7,14000 { - #gpio-cells = <2>; - compatible = "gef,ppc9a-gpio", "gef,sbc610-gpio"; - reg = <0x7 0x14000 0x24>; - gpio-controller; - }; - }; - - soc@fef00000 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - device_type = "soc"; - compatible = "fsl,mpc8641-soc", "simple-bus"; - ranges = <0x0 0xfef00000 0x00100000>; - bus-frequency = <33333333>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8641-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c1: i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - - hwmon@48 { - compatible = "national,lm92"; - reg = <0x48>; - }; - - hwmon@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - rtc@51 { - compatible = "epson,rx8581"; - reg = <0x00000051>; - }; - - eti@6b { - compatible = "dallas,ds1682"; - reg = <0x6b>; - }; - }; - - i2c2: i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "gmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&gef_pic>; - interrupts = <0x9 0x4>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&gef_pic>; - interrupts = <0x8 0x4>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "gmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <0x2a 0x2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <0x1c 0x2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,mpc8641-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8641-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@fef08000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xfef08000 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000 - 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <0x18 0x2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00400000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_sbc310.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_sbc310.dts deleted file mode 100644 index 5ab8932d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_sbc310.dts +++ /dev/null @@ -1,461 +0,0 @@ -/* - * GE SBC310 Device Tree Source - * - * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Based on: SBS CM6 Device Tree Source - * Copyright 2007 SBS Technologies GmbH & Co. KG - * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source) - * Copyright 2006 Freescale Semiconductor Inc. - */ - -/* - * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts - */ - -/dts-v1/; - -/ { - model = "GEF_SBC310"; - compatible = "gef,sbc310"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8641@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - PowerPC,8641@1 { - device_type = "cpu"; - reg = <1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x40000000>; // set by uboot - }; - - localbus@fef05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8641-localbus", "simple-bus"; - reg = <0xfef05000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash - 1 0 0xe0000000 0x08000000 // Paged Flash 0 - 2 0 0xe8000000 0x08000000 // Paged Flash 1 - 3 0 0xfc100000 0x00020000 // NVRAM - 4 0 0xfc000000 0x00010000>; // FPGA - - /* flash@0,0 is a mirror of part of the memory in flash@1,0 - flash@0,0 { - compatible = "gef,sbc310-firmware-mirror", "cfi-flash"; - reg = <0x0 0x0 0x01000000>; - bank-width = <2>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "firmware"; - reg = <0x0 0x01000000>; - read-only; - }; - }; - */ - - flash@1,0 { - compatible = "gef,sbc310-paged-flash", "cfi-flash"; - reg = <0x1 0x0 0x8000000>; - bank-width = <2>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "user"; - reg = <0x0 0x7800000>; - }; - partition@7800000 { - label = "firmware"; - reg = <0x7800000 0x800000>; - read-only; - }; - }; - - nvram@3,0 { - device_type = "nvram"; - compatible = "simtek,stk14ca8"; - reg = <0x3 0x0 0x20000>; - }; - - fpga@4,0 { - compatible = "gef,fpga-regs"; - reg = <0x4 0x0 0x40>; - }; - - wdt@4,2000 { - compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00", - "gef,fpga-wdt"; - reg = <0x4 0x2000 0x8>; - interrupts = <0x1a 0x4>; - interrupt-parent = <&gef_pic>; - }; -/* - wdt@4,2010 { - compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00", - "gef,fpga-wdt"; - reg = <0x4 0x2010 0x8>; - interrupts = <0x1b 0x4>; - interrupt-parent = <&gef_pic>; - }; -*/ - gef_pic: pic@4,4000 { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "gef,sbc310-fpga-pic", "gef,fpga-pic"; - reg = <0x4 0x4000 0x20>; - interrupts = <0x8 - 0x9>; - interrupt-parent = <&mpic>; - - }; - gef_gpio: gpio@4,8000 { - #gpio-cells = <2>; - compatible = "gef,sbc310-gpio"; - reg = <0x4 0x8000 0x24>; - gpio-controller; - }; - }; - - soc@fef00000 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - device_type = "soc"; - compatible = "fsl,mpc8641-soc", "simple-bus"; - ranges = <0x0 0xfef00000 0x00100000>; - bus-frequency = <33333333>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8641-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c1: i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - - rtc@51 { - compatible = "epson,rx8581"; - reg = <0x00000051>; - }; - }; - - i2c2: i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - - hwmon@48 { - compatible = "national,lm92"; - reg = <0x48>; - }; - - hwmon@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - eti@6b { - compatible = "dallas,ds1682"; - reg = <0x6b>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "gmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&gef_pic>; - interrupts = <0x9 0x4>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&gef_pic>; - interrupts = <0x8 0x4>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "gmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <0x2a 0x2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <0x1c 0x2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,mpc8641-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8641-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@fef08000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xfef08000 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000 - 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <0x18 0x2>; - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2 - 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2 - 0x0000 0x0 0x0 0x3 &mpic 0x2 0x2 - 0x0000 0x0 0x0 0x4 &mpic 0x3 0x2 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00400000>; - }; - }; - - pci1: pcie@fef09000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xfef09000 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xfe400000 0x0 0x00400000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <0x19 0x2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - 0x0000 0x0 0x0 0x1 &mpic 0x4 0x2 - 0x0000 0x0 0x0 0x2 &mpic 0x5 0x2 - 0x0000 0x0 0x0 0x3 &mpic 0x6 0x2 - 0x0000 0x0 0x0 0x4 &mpic 0x7 0x2 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xc0000000 - 0x02000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00400000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_sbc610.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_sbc610.dts deleted file mode 100644 index d5341f57..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_sbc610.dts +++ /dev/null @@ -1,425 +0,0 @@ -/* - * GE SBC610 Device Tree Source - * - * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Based on: SBS CM6 Device Tree Source - * Copyright 2007 SBS Technologies GmbH & Co. KG - * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source) - * Copyright 2006 Freescale Semiconductor Inc. - */ - -/* - * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts - */ - -/dts-v1/; - -/ { - model = "GEF_SBC610"; - compatible = "gef,sbc610"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8641@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - PowerPC,8641@1 { - device_type = "cpu"; - reg = <1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x40000000>; // set by uboot - }; - - localbus@fef05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8641-localbus", "simple-bus"; - reg = <0xfef05000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash - 1 0 0xe8000000 0x08000000 // Paged Flash 0 - 2 0 0xe0000000 0x08000000 // Paged Flash 1 - 3 0 0xfc100000 0x00020000 // NVRAM - 4 0 0xfc000000 0x00008000 // FPGA - 5 0 0xfc008000 0x00008000 // AFIX FPGA - 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit) - 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit) - - /* flash@0,0 is a mirror of part of the memory in flash@1,0 - flash@0,0 { - compatible = "gef,sbc610-firmware-mirror", "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <4>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "firmware"; - reg = <0x0 0x1000000>; - read-only; - }; - }; - */ - - flash@1,0 { - compatible = "gef,sbc610-paged-flash", "cfi-flash"; - reg = <0x1 0x0 0x8000000>; - bank-width = <4>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "user"; - reg = <0x0 0x7800000>; - }; - partition@7800000 { - label = "firmware"; - reg = <0x7800000 0x800000>; - read-only; - }; - }; - - nvram@3,0 { - device_type = "nvram"; - compatible = "simtek,stk14ca8"; - reg = <0x3 0x0 0x20000>; - }; - - fpga@4,0 { - compatible = "gef,fpga-regs"; - reg = <0x4 0x0 0x40>; - }; - - wdt@4,2000 { - compatible = "gef,fpga-wdt"; - reg = <0x4 0x2000 0x8>; - interrupts = <0x1a 0x4>; - interrupt-parent = <&gef_pic>; - }; - /* Second watchdog available, driver currently supports one. - wdt@4,2010 { - compatible = "gef,fpga-wdt"; - reg = <0x4 0x2010 0x8>; - interrupts = <0x1b 0x4>; - interrupt-parent = <&gef_pic>; - }; - */ - gef_pic: pic@4,4000 { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "gef,fpga-pic"; - reg = <0x4 0x4000 0x20>; - interrupts = <0x8 - 0x9>; - interrupt-parent = <&mpic>; - - }; - gef_gpio: gpio@7,14000 { - #gpio-cells = <2>; - compatible = "gef,sbc610-gpio"; - reg = <0x7 0x14000 0x24>; - gpio-controller; - }; - }; - - soc@fef00000 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xfef00000 0x00100000>; - bus-frequency = <33333333>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8641-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c1: i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - - hwmon@48 { - compatible = "national,lm92"; - reg = <0x48>; - }; - - hwmon@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - rtc@51 { - compatible = "epson,rx8581"; - reg = <0x00000051>; - }; - - eti@6b { - compatible = "dallas,ds1682"; - reg = <0x6b>; - }; - }; - - i2c2: i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "gmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&gef_pic>; - interrupts = <0x9 0x4>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&gef_pic>; - interrupts = <0x8 0x4>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "gmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <0x2a 0x2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <0x1c 0x2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,mpc8641-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8641-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@fef08000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xfef08000 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000 - 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <0x18 0x2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00400000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/glacier.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/glacier.dts deleted file mode 100644 index 20000603..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/glacier.dts +++ /dev/null @@ -1,576 +0,0 @@ -/* - * Device Tree Source for AMCC Glacier (460GT) - * - * Copyright 2008-2010 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,glacier"; - compatible = "amcc,glacier"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - ethernet2 = &EMAC2; - ethernet3 = &EMAC3; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,460GT"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - next-level-cache = <&L2C0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-460gt"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-460gt"; - dcr-reg = <0x00c 0x002>; - }; - - L2C0: l2c { - compatible = "ibm,l2-cache-460gt", "ibm,l2-cache"; - dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ - 0x030 0x008>; /* L2 cache DCR's */ - cache-line-size = <32>; /* 32 bytes */ - cache-size = <262144>; /* L2, 256K */ - interrupt-parent = <&UIC1>; - interrupts = <11 1>; - }; - - plb { - compatible = "ibm,plb-460gt", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - CRYPTO: crypto@180000 { - compatible = "amcc,ppc460gt-crypto", "amcc,ppc460ex-crypto", - "amcc,ppc4xx-crypto"; - reg = <4 0x00180000 0x80400>; - interrupt-parent = <&UIC0>; - interrupts = <0x1d 0x4>; - }; - - HWRNG: hwrng@110000 { - compatible = "amcc,ppc460ex-rng", "ppc4xx-rng"; - reg = <4 0x00110000 0x50>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <32>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-parent = <&UIC2>; - interrupts = < /*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x3 0x4 - /*TXDE*/ 0x4 0x4 - /*RXDE*/ 0x5 0x4>; - desc-base-addr-high = <0x8>; - }; - - POB0: opb { - compatible = "ibm,opb-460gt", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-460gt", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x6 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "ramdisk"; - reg = <0x00200000 0x01400000>; - }; - partition@1600000 { - label = "jffs2"; - reg = <0x01600000 0x00400000>; - }; - partition@1a00000 { - label = "user"; - reg = <0x01a00000 0x02560000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - - ndfc@3,0 { - compatible = "ibm,ndfc"; - reg = <0x00000003 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - }; - partition@100000 { - label = "user"; - reg = <0x00000000 0x03f00000>; - }; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC1>; - interrupts = <0x1 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - UART2: serial@ef600500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600500 0x00000008>; - virtual-reg = <0xef600500>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC1>; - interrupts = <28 0x4>; - }; - - UART3: serial@ef600600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600600 0x00000008>; - virtual-reg = <0xef600600>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC1>; - interrupts = <29 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-460gt", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - rtc@68 { - compatible = "stm,m41t80"; - reg = <0x68>; - interrupt-parent = <&UIC2>; - interrupts = <0x19 0x8>; - }; - sttm@48 { - compatible = "ad,ad7414"; - reg = <0x48>; - interrupt-parent = <&UIC1>; - interrupts = <0x14 0x8>; - }; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-460gt", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-460gt", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - RGMII0: emac-rgmii@ef601500 { - compatible = "ibm,rgmii-460gt", "ibm,rgmii"; - reg = <0xef601500 0x00000008>; - has-mdio; - }; - - RGMII1: emac-rgmii@ef601600 { - compatible = "ibm,rgmii-460gt", "ibm,rgmii"; - reg = <0xef601600 0x00000008>; - has-mdio; - }; - - TAH0: emac-tah@ef601350 { - compatible = "ibm,tah-460gt", "ibm,tah"; - reg = <0xef601350 0x00000030>; - }; - - TAH1: emac-tah@ef601450 { - compatible = "ibm,tah-460gt", "ibm,tah"; - reg = <0xef601450 0x00000030>; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 - /*Wake*/ 0x1 &UIC2 0x14 0x4>; - reg = <0xef600e00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - tah-device = <&TAH0>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 - /*Wake*/ 0x1 &UIC2 0x15 0x4>; - reg = <0xef600f00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <8>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - tah-device = <&TAH1>; - tah-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - - EMAC2: ethernet@ef601100 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC2>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4 - /*Wake*/ 0x1 &UIC2 0x16 0x4>; - reg = <0xef601100 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <2>; - mal-rx-channel = <16>; - cell-index = <2>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; /* emac2&3 only */ - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII1>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - - EMAC3: ethernet@ef601200 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC3>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4 - /*Wake*/ 0x1 &UIC2 0x17 0x4>; - reg = <0xef601200 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <3>; - mal-rx-channel = <24>; - cell-index = <3>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; /* emac2&3 only */ - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII1>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - }; - - PCIX0: pci@c0ec00000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pcix-460gt", "ibm,plb-pcix"; - primary; - large-inbound-windows; - enable-msi-hole; - reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ - 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ - 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ - 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ - 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0 to 0x3f */ - bus-range = <0x0 0x3f>; - - /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ - interrupt-map-mask = <0x0 0x0 0x0 0x0>; - interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >; - }; - - PCIE0: pciex@d00000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ - 0x0000000c 0x08010000 0x00001000>; /* Registers */ - dcr-reg = <0x100 0x020>; - sdr-base = <0x300>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 40 to 0x7f */ - bus-range = <0x40 0x7f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@d20000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ - 0x0000000c 0x08011000 0x00001000>; /* Registers */ - dcr-reg = <0x120 0x020>; - sdr-base = <0x340>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 80 to 0xbf */ - bus-range = <0x80 0xbf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/haleakala.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/haleakala.dts deleted file mode 100644 index 2b256694..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/haleakala.dts +++ /dev/null @@ -1,281 +0,0 @@ -/* - * Device Tree Source for AMCC Haleakala (405EXr) - * - * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "amcc,haleakala"; - compatible = "amcc,haleakala", "amcc,kilauea"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405EXr"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; /* 16 kB */ - d-cache-size = <16384>; /* 16 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic-405exr", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-405exr","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-405exr","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - plb { - compatible = "ibm,plb-405exr", "ibm,plb4"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405exr", "ibm,sdram-4xx-ddr2"; - dcr-reg = <0x010 0x002>; - interrupt-parent = <&UIC2>; - interrupts = <0x5 0x4 /* ECC DED Error */ - 0x6 0x4>; /* ECC SEC Error */ - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-405exr", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-405exr", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x80000000 0x80000000 0x10000000 - 0xef600000 0xef600000 0x00a00000 - 0xf0000000 0xf0000000 0x10000000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-405exr", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00200000>; - }; - partition@400000 { - label = "user"; - reg = <0x00400000 0x03b60000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - }; - - UART0: serial@ef600200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600200 0x00000008>; - virtual-reg = <0xef600200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1a 0x4>; - }; - - UART1: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600400 { - compatible = "ibm,iic-405exr", "ibm,iic"; - reg = <0xef600400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@ef600500 { - compatible = "ibm,iic-405exr", "ibm,iic"; - reg = <0xef600500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - - RGMII0: emac-rgmii@ef600b00 { - compatible = "ibm,rgmii-405exr", "ibm,rgmii"; - reg = <0xef600b00 0x00000104>; - has-mdio; - }; - - EMAC0: ethernet@ef600900 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-405exr", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 - /*Wake*/ 0x1 &UIC1 0x1d 0x4>; - reg = <0xef600900 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCIE0: pciex@0a0000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0xa0000000 0x20000000 /* Config space access */ - 0xef000000 0x00001000>; /* Registers */ - dcr-reg = <0x040 0x020>; - sdr-base = <0x400>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 - 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0x00 to 0x3f */ - bus-range = <0x0 0x3f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/holly.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/holly.dts deleted file mode 100644 index c6e11ebe..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/holly.dts +++ /dev/null @@ -1,197 +0,0 @@ -/* - * Device Tree Source for IBM Holly (PPC 750CL with TSI controller) - * Copyright 2007, IBM Corporation - * - * Stephen Winiecki <stevewin@us.ibm.com> - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - model = "41K7339"; - compatible = "ibm,holly"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells =<0>; - PowerPC,750CL@0 { - device_type = "cpu"; - reg = <0x00000000>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - d-cache-sets = <128>; - i-cache-sets = <128>; - timebase-frequency = <50000000>; - clock-frequency = <600000000>; - bus-frequency = <200000000>; - }; - }; - - memory@0 { - device_type = "memory"; - reg = <0x00000000 0x20000000>; - }; - - tsi109@c0000000 { - device_type = "tsi-bridge"; - compatible = "tsi109-bridge", "tsi108-bridge"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0xc0000000 0x00010000>; - reg = <0xc0000000 0x00010000>; - - i2c@7000 { - device_type = "i2c"; - compatible = "tsi109-i2c", "tsi108-i2c"; - interrupt-parent = <&MPIC>; - interrupts = <0xe 0x2>; - reg = <0x00007000 0x00000400>; - }; - - MDIO: mdio@6000 { - device_type = "mdio"; - compatible = "tsi109-mdio", "tsi108-mdio"; - reg = <0x00006000 0x00000050>; - #address-cells = <1>; - #size-cells = <0>; - - PHY1: ethernet-phy@1 { - compatible = "bcm5461a"; - reg = <0x00000001>; - txc-rxc-delay-disable; - }; - - PHY2: ethernet-phy@2 { - compatible = "bcm5461a"; - reg = <0x00000002>; - txc-rxc-delay-disable; - }; - }; - - ethernet@6200 { - device_type = "network"; - compatible = "tsi109-ethernet", "tsi108-ethernet"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x00006000 0x00000200>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupt-parent = <&MPIC>; - interrupts = <0x10 0x2>; - mdio-handle = <&MDIO>; - phy-handle = <&PHY1>; - }; - - ethernet@6600 { - device_type = "network"; - compatible = "tsi109-ethernet", "tsi108-ethernet"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x00006400 0x00000200>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupt-parent = <&MPIC>; - interrupts = <0x11 0x2>; - mdio-handle = <&MDIO>; - phy-handle = <&PHY2>; - }; - - serial@7808 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x00007808 0x00000200>; - virtual-reg = <0xc0007808>; - clock-frequency = <1067212800>; - current-speed = <115200>; - interrupt-parent = <&MPIC>; - interrupts = <0xc 0x2>; - }; - - serial@7c08 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x00007c08 0x00000200>; - virtual-reg = <0xc0007c08>; - clock-frequency = <1067212800>; - current-speed = <115200>; - interrupt-parent = <&MPIC>; - interrupts = <0xd 0x2>; - }; - - MPIC: pic@7400 { - device_type = "open-pic"; - compatible = "chrp,open-pic"; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x00007400 0x00000400>; - big-endian; - }; - }; - - pci@c0001000 { - device_type = "pci"; - compatible = "tsi109-pci", "tsi108-pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xc0001000 0x00001000>; - bus-range = <0x0 0x0>; - /*----------------------------------------------------+ - | PCI memory range. - | 01 denotes I/O space - | 02 denotes 32-bit memory space - +----------------------------------------------------*/ - ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000 - 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>; - clock-frequency = <133333332>; - interrupt-parent = <&MPIC>; - interrupts = <0x17 0x2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - /*----------------------------------------------------+ - | The INTA, INTB, INTC, INTD are shared. - +----------------------------------------------------*/ - interrupt-map = < - 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 - 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 - 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 - 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 - - 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 - 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 - 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 - 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 - - 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 - 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 - 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 - 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 - - 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 - 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 - 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 - 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 - >; - - RT0: router@1180 { - device_type = "pic-router"; - interrupt-controller; - big-endian; - clock-frequency = <0>; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x17 0x2>; - interrupt-parent = <&MPIC>; - }; - }; - - chosen { - linux,stdout-path = "/tsi109@c0000000/serial@7808"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/hotfoot.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/hotfoot.dts deleted file mode 100644 index 71d3bb49..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/hotfoot.dts +++ /dev/null @@ -1,296 +0,0 @@ -/* - * Device Tree Source for ESTeem 195E Hotfoot - * - * Copyright 2009 AbsoluteValue Systems <solomon@linux-wlan.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "est,hotfoot"; - compatible = "est,hotfoot"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405EP"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <0x20>; - d-cache-line-size = <0x20>; - i-cache-size = <0x4000>; - d-cache-size = <0x4000>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - plb { - compatible = "ibm,plb3"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405ep"; - dcr-reg = <0x010 0x002>; - }; - - MAL: mcmal { - compatible = "ibm,mcmal-405ep", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <2>; - interrupt-parent = <&UIC0>; - interrupts = < - 0xb 0x4 /* TXEOB */ - 0xc 0x4 /* RXEOB */ - 0xa 0x4 /* SERR */ - 0xd 0x4 /* TXDE */ - 0xe 0x4 /* RXDE */>; - }; - - POB0: opb { - compatible = "ibm,opb-405ep", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xef600000 0xef600000 0x00a00000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by zImage */ - - /* Hotfoot has UART0/UART1 swapped */ - - UART0: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <0x9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - UART1: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <0x9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - IIC: i2c@ef600500 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ibm,iic-405ep", "ibm,iic"; - reg = <0xef600500 0x00000011>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - - rtc@68 { - /* Actually a DS1339 */ - compatible = "dallas,ds1307"; - reg = <0x68>; - }; - - temp@4a { - /* Not present on all boards */ - compatible = "national,lm75"; - reg = <0x4a>; - }; - }; - - GPIO: gpio@ef600700 { - #gpio-cells = <2>; - compatible = "ibm,ppc4xx-gpio"; - reg = <0xef600700 0x00000020>; - gpio-controller; - }; - - gpio-leds { - compatible = "gpio-leds"; - status { - label = "Status"; - gpios = <&GPIO 1 0>; - }; - radiorx { - label = "Rx"; - gpios = <&GPIO 0xe 0>; - }; - }; - - EMAC0: ethernet@ef600800 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-405ep", "ibm,emac"; - interrupt-parent = <&UIC0>; - interrupts = < - 0xf 0x4 /* Ethernet */ - 0x9 0x4 /* Ethernet Wake Up */>; - local-mac-address = [000000000000]; /* Filled in by zImage */ - reg = <0xef600800 0x00000070>; - mal-device = <&MAL>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <0x5dc>; - rx-fifo-size = <0x1000>; - tx-fifo-size = <0x800>; - phy-mode = "mii"; - phy-map = <0x00000000>; - }; - - EMAC1: ethernet@ef600900 { - linux,network-index = <0x1>; - device_type = "network"; - compatible = "ibm,emac-405ep", "ibm,emac"; - interrupt-parent = <&UIC0>; - interrupts = < - 0x11 0x4 /* Ethernet */ - 0x9 0x4 /* Ethernet Wake Up */>; - local-mac-address = [000000000000]; /* Filled in by zImage */ - reg = <0xef600900 0x00000070>; - mal-device = <&MAL>; - mal-tx-channel = <2>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <0x5dc>; - rx-fifo-size = <0x1000>; - tx-fifo-size = <0x800>; - mdio-device = <&EMAC0>; - phy-mode = "mii"; - phy-map = <0x0000001>; - }; - }; - - EBC0: ebc { - compatible = "ibm,ebc-405ep", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - - /* The ranges property is supplied by the bootwrapper - * and is based on the firmware's configuration of the - * EBC bridge - */ - clock-frequency = <0>; /* Filled in by zImage */ - - nor_flash@0 { - compatible = "cfi-flash"; - bank-width = <2>; - reg = <0x0 0xff800000 0x00800000>; - #address-cells = <1>; - #size-cells = <1>; - - /* This mapping is for the 8M flash - 4M flash has all ofssets -= 4M, - and FeatFS partition is not present */ - partition@0 { - label = "Bootloader"; - reg = <0x7c0000 0x40000>; - /* read-only; */ - }; - partition@1 { - label = "Env_and_Config_Primary"; - reg = <0x400000 0x10000>; - }; - partition@2 { - label = "Kernel"; - reg = <0x420000 0x100000>; - }; - partition@3 { - label = "Filesystem"; - reg = <0x520000 0x2a0000>; - }; - partition@4 { - label = "Env_and_Config_Secondary"; - reg = <0x410000 0x10000>; - }; - partition@5 { - label = "FeatFS"; - reg = <0x000000 0x400000>; - }; - partition@6 { - label = "Bootloader_Env"; - reg = <0x7d0000 0x10000>; - }; - }; - }; - - PCI0: pci@ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb405ep-pci", "ibm,plb-pci"; - primary; - reg = <0xeec00000 0x00000008 /* Config space access */ - 0xeed80000 0x00000004 /* IACK */ - 0xeed80000 0x00000004 /* Special cycle */ - 0xef480000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 - 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - interrupt-parent = <&UIC0>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 3 -- slot1 (optional) 27/29 A/B IRQ2/4 */ - 0x1800 0x0 0x0 0x1 &UIC0 0x1b 0x8 - 0x1800 0x0 0x0 0x2 &UIC0 0x1d 0x8 - - /* IDSEL 4 -- slot0, 26/28 A/B IRQ1/3 */ - 0x2000 0x0 0x0 0x1 &UIC0 0x1a 0x8 - 0x2000 0x0 0x0 0x2 &UIC0 0x1c 0x8 - >; - }; - }; - - chosen { - linux,stdout-path = &UART0; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/icon.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/icon.dts deleted file mode 100644 index abcd0cae..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/icon.dts +++ /dev/null @@ -1,447 +0,0 @@ -/* - * Device Tree Source for Mosaix Technologies, Inc. ICON board - * - * Copyright 2010 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - model = "mosaixtech,icon"; - compatible = "mosaixtech,icon"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440SPe"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - reset-type = <2>; /* Use chip-reset */ - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440spe"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440spe"; - dcr-reg = <0x00c 0x002>; - }; - - MQ0: mq { - compatible = "ibm,mq-440spe"; - dcr-reg = <0x040 0x020>; - }; - - plb { - compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - /* addr-child addr-parent size */ - ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000 - 0x4 0x00200000 0x4 0x00200000 0x00000400 - 0x4 0xe0000000 0x4 0xe0000000 0x20000000 - 0xc 0x00000000 0xc 0x00000000 0x20000000 - 0xd 0x00000000 0xd 0x00000000 0x80000000 - 0xd 0x80000000 0xd 0x80000000 0x80000000 - 0xe 0x00000000 0xe 0x00000000 0x80000000 - 0xe 0x80000000 0xe 0x80000000 0x80000000 - 0xf 0x00000000 0xf 0x00000000 0x80000000 - 0xf 0x80000000 0xf 0x80000000 0x80000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <1>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4 - /*RXEOB*/ 0x1 &UIC1 0x7 0x4 - /*SERR*/ 0x2 &UIC1 0x1 0x4 - /*TXDE*/ 0x3 &UIC1 0x2 0x4 - /*RXDE*/ 0x4 &UIC1 0x3 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xe0000000 0x00000004 0xe0000000 0x20000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x01000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00200000>; - }; - partition@400000 { - label = "user"; - reg = <0x00400000 0x00b60000>; - }; - partition@f60000 { - label = "env"; - reg = <0x00f60000 0x00040000>; - }; - partition@fa0000 { - label = "u-boot"; - reg = <0x00fa0000 0x00060000>; - }; - }; - - SysACE_CompactFlash: sysace@1,0 { - compatible = "xlnx,sysace"; - interrupt-parent = <&UIC2>; - interrupts = <24 0x4>; - reg = <0x00000001 0x00000000 0x10000>; - }; - }; - - UART0: serial@f0000200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xf0000200 0x00000008>; - virtual-reg = <0xa0000200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@f0000300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xf0000300 0x00000008>; - virtual-reg = <0xa0000300>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - - UART2: serial@f0000600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xf0000600 0x00000008>; - virtual-reg = <0xa0000600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC1>; - interrupts = <0x5 0x4>; - }; - - IIC0: i2c@f0000400 { - compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; - reg = <0xf0000400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@f0000500 { - compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; - reg = <0xf0000500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - #address-cells = <1>; - #size-cells = <0>; - - rtc@68 { - compatible = "stm,m41t00"; - reg = <0x68>; - }; - }; - - EMAC0: ethernet@f0000800 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-440spe", "ibm,emac4"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0xf0000800 0x00000074>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "gmii"; - phy-map = <0x00000000>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCIX0: pci@c0ec00000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix"; - primary; - large-inbound-windows; - enable-msi-hole; - reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ - 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ - 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ - 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ - 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* PCI-X interrupt (SM502) is routed to extIRQ10 (UIC1, 19) */ - interrupt-map-mask = <0x0 0x0 0x0 0x0>; - interrupt-map = <0x0 0x0 0x0 0x0 &UIC1 19 0x8>; - }; - - PCIE0: pciex@d00000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ - 0x0000000c 0x10000000 0x00001000>; /* Registers */ - dcr-reg = <0x100 0x020>; - sdr-base = <0x300>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0x10 to 0x1f */ - bus-range = <0x10 0x1f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@d20000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ - 0x0000000c 0x10001000 0x00001000>; /* Registers */ - dcr-reg = <0x120 0x020>; - sdr-base = <0x340>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0x20 to 0x2f */ - bus-range = <0x20 0x2f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; - }; - - I2O: i2o@400100000 { - compatible = "ibm,i2o-440spe"; - reg = <0x00000004 0x00100000 0x100>; - dcr-reg = <0x060 0x020>; - }; - - DMA0: dma0@400100100 { - compatible = "ibm,dma-440spe"; - cell-index = <0>; - reg = <0x00000004 0x00100100 0x100>; - dcr-reg = <0x060 0x020>; - interrupt-parent = <&DMA0>; - interrupts = <0 1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = < - 0 &UIC0 0x14 4 - 1 &UIC1 0x16 4>; - }; - - DMA1: dma1@400100200 { - compatible = "ibm,dma-440spe"; - cell-index = <1>; - reg = <0x00000004 0x00100200 0x100>; - dcr-reg = <0x060 0x020>; - interrupt-parent = <&DMA1>; - interrupts = <0 1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = < - 0 &UIC0 0x16 4 - 1 &UIC1 0x16 4>; - }; - - xor-accel@400200000 { - compatible = "amcc,xor-accelerator"; - reg = <0x00000004 0x00200000 0x400>; - interrupt-parent = <&UIC1>; - interrupts = <0x1f 4>; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@f0000200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/iss4xx-mpic.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/iss4xx-mpic.dts deleted file mode 100644 index 23e9d9b7..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/iss4xx-mpic.dts +++ /dev/null @@ -1,155 +0,0 @@ -/* - * Device Tree Source for IBM Embedded PPC 476 Platform - * - * Copyright 2010 Torez Smith, IBM Corporation. - * - * Based on earlier code: - * Copyright (c) 2006, 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/memreserve/ 0x01f00000 0x00100000; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "ibm,iss-4xx"; - compatible = "ibm,iss-4xx"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,4xx"; // real CPU changed in sim - reg = <0>; - clock-frequency = <100000000>; // 100Mhz :-) - timebase-frequency = <100000000>; - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "ok"; - }; - cpu@1 { - device_type = "cpu"; - model = "PowerPC,4xx"; // real CPU changed in sim - reg = <1>; - clock-frequency = <100000000>; // 100Mhz :-) - timebase-frequency = <100000000>; - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "disabled"; - enable-method = "spin-table"; - cpu-release-addr = <0 0x01f00100>; - }; - cpu@2 { - device_type = "cpu"; - model = "PowerPC,4xx"; // real CPU changed in sim - reg = <2>; - clock-frequency = <100000000>; // 100Mhz :-) - timebase-frequency = <100000000>; - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "disabled"; - enable-method = "spin-table"; - cpu-release-addr = <0 0x01f00200>; - }; - cpu@3 { - device_type = "cpu"; - model = "PowerPC,4xx"; // real CPU changed in sim - reg = <3>; - clock-frequency = <100000000>; // 100Mhz :-) - timebase-frequency = <100000000>; - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "disabled"; - enable-method = "spin-table"; - cpu-release-addr = <0 0x01f00300>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage - - }; - - MPIC: interrupt-controller { - compatible = "chrp,open-pic"; - interrupt-controller; - dcr-reg = <0xffc00000 0x00030000>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - - }; - - plb { - compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */ - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; // Filled in by zImage - - POB0: opb { - compatible = "ibm,opb-4xx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Wish there was a nicer way of specifying a full 32-bit - range */ - ranges = <0x00000000 0x00000001 0x00000000 0x80000000 - 0x80000000 0x00000001 0x80000000 0x80000000>; - clock-frequency = <0>; // Filled in by zImage - UART0: serial@40000200 { - device_type = "serial"; - compatible = "ns16550a"; - reg = <0x40000200 0x00000008>; - virtual-reg = <0xe0000200>; - clock-frequency = <11059200>; - current-speed = <115200>; - interrupt-parent = <&MPIC>; - interrupts = <0x0 0x2>; - }; - }; - }; - - nvrtc { - compatible = "ds1743-nvram", "ds1743", "rtc-ds1743"; - reg = <0 0xEF703000 0x2000>; - }; - iss-block { - compatible = "ibm,iss-sim-block-device"; - reg = <0 0xEF701000 0x1000>; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@40000200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/iss4xx.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/iss4xx.dts deleted file mode 100644 index 4ff6555c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/iss4xx.dts +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Device Tree Source for IBM Embedded PPC 476 Platform - * - * Copyright 2010 Torez Smith, IBM Corporation. - * - * Based on earlier code: - * Copyright (c) 2006, 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "ibm,iss-4xx"; - compatible = "ibm,iss-4xx"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,4xx"; // real CPU changed in sim - reg = <0x00000000>; - clock-frequency = <100000000>; // 100Mhz :-) - timebase-frequency = <100000000>; - i-cache-line-size = <32>; // may need fixup in sim - d-cache-line-size = <32>; // may need fixup in sim - i-cache-size = <32768>; /* may need fixup in sim */ - d-cache-size = <32768>; /* may need fixup in sim */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-4xx", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-4xx", "ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - plb { - compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */ - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; // Filled in by zImage - - POB0: opb { - compatible = "ibm,opb-4xx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Wish there was a nicer way of specifying a full 32-bit - range */ - ranges = <0x00000000 0x00000001 0x00000000 0x80000000 - 0x80000000 0x00000001 0x80000000 0x80000000>; - clock-frequency = <0>; // Filled in by zImage - UART0: serial@40000200 { - device_type = "serial"; - compatible = "ns16550a"; - reg = <0x40000200 0x00000008>; - virtual-reg = <0xe0000200>; - clock-frequency = <11059200>; - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - }; - }; - - nvrtc { - compatible = "ds1743-nvram", "ds1743", "rtc-ds1743"; - reg = <0 0xEF703000 0x2000>; - }; - iss-block { - compatible = "ibm,iss-sim-block-device"; - reg = <0 0xEF701000 0x1000>; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@40000200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/katmai.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/katmai.dts deleted file mode 100644 index f913dbe2..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/katmai.dts +++ /dev/null @@ -1,510 +0,0 @@ -/* - * Device Tree Source for AMCC Katmai eval board - * - * Copyright (c) 2006, 2007 IBM Corp. - * Benjamin Herrenschmidt <benh@kernel.crashing.org> - * - * Copyright (c) 2006, 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - model = "amcc,katmai"; - compatible = "amcc,katmai"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440SPe"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - reset-type = <2>; /* Use chip-reset */ - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440spe"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440spe"; - dcr-reg = <0x00c 0x002>; - }; - - MQ0: mq { - compatible = "ibm,mq-440spe"; - dcr-reg = <0x040 0x020>; - }; - - plb { - compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - /* addr-child addr-parent size */ - ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000 - 0x4 0x00200000 0x4 0x00200000 0x00000400 - 0x4 0xe0000000 0x4 0xe0000000 0x20000000 - 0xc 0x00000000 0xc 0x00000000 0x20000000 - 0xd 0x00000000 0xd 0x00000000 0x80000000 - 0xd 0x80000000 0xd 0x80000000 0x80000000 - 0xe 0x00000000 0xe 0x00000000 0x80000000 - 0xe 0x80000000 0xe 0x80000000 0x80000000 - 0xf 0x00000000 0xf 0x00000000 0x80000000 - 0xf 0x80000000 0xf 0x80000000 0x80000000>; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <1>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4 - /*RXEOB*/ 0x1 &UIC1 0x7 0x4 - /*SERR*/ 0x2 &UIC1 0x1 0x4 - /*TXDE*/ 0x3 &UIC1 0x2 0x4 - /*RXDE*/ 0x4 &UIC1 0x3 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xe0000000 0x00000004 0xe0000000 0x20000000>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x01000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00200000>; - }; - partition@400000 { - label = "user"; - reg = <0x00400000 0x00b60000>; - }; - partition@f60000 { - label = "env"; - reg = <0x00f60000 0x00040000>; - }; - partition@fa0000 { - label = "u-boot"; - reg = <0x00fa0000 0x00060000>; - }; - }; - }; - - UART0: serial@f0000200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xf0000200 0x00000008>; - virtual-reg = <0xa0000200>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@f0000300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xf0000300 0x00000008>; - virtual-reg = <0xa0000300>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - - UART2: serial@f0000600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xf0000600 0x00000008>; - virtual-reg = <0xa0000600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC1>; - interrupts = <0x5 0x4>; - }; - - IIC0: i2c@f0000400 { - compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; - reg = <0xf0000400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@f0000500 { - compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; - reg = <0xf0000500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - EMAC0: ethernet@f0000800 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-440spe", "ibm,emac4"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0xf0000800 0x00000074>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "gmii"; - phy-map = <0x00000000>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCIX0: pci@c0ec00000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix"; - primary; - large-inbound-windows; - enable-msi-hole; - reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ - 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ - 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ - 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ - 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* - * On Katmai, the following PCI-X interrupts signals - * have to be enabled via jumpers (only INTA is - * enabled per default): - * - * INTB: J3: 1-2 - * INTC: J2: 1-2 - * INTD: J1: 1-2 - */ - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 1 */ - 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8 - 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8 - 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8 - 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8 - >; - }; - - PCIE0: pciex@d00000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ - 0x0000000c 0x10000000 0x00001000>; /* Registers */ - dcr-reg = <0x100 0x020>; - sdr-base = <0x300>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0x10 to 0x1f */ - bus-range = <0x10 0x1f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@d20000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ - 0x0000000c 0x10001000 0x00001000>; /* Registers */ - dcr-reg = <0x120 0x020>; - sdr-base = <0x340>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0x20 to 0x2f */ - bus-range = <0x20 0x2f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; - }; - - PCIE2: pciex@d40000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; - primary; - port = <0x2>; /* port number */ - reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ - 0x0000000c 0x10002000 0x00001000>; /* Registers */ - dcr-reg = <0x140 0x020>; - sdr-base = <0x370>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0x30 to 0x3f */ - bus-range = <0x30 0x3f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; - }; - - MSI: ppc4xx-msi@400300000 { - compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; - reg = < 0x4 0x00300000 0x100>; - sdr-base = <0x3B0>; - msi-data = <0x00000000>; - msi-mask = <0x44440000>; - interrupt-count = <3>; - interrupts =<0 1 2 3>; - interrupt-parent = <&UIC0>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &UIC0 0xC 1 - 1 &UIC0 0x0D 1 - 2 &UIC0 0x0E 1 - 3 &UIC0 0x0F 1>; - }; - - I2O: i2o@400100000 { - compatible = "ibm,i2o-440spe"; - reg = <0x00000004 0x00100000 0x100>; - dcr-reg = <0x060 0x020>; - }; - - DMA0: dma0@400100100 { - compatible = "ibm,dma-440spe"; - cell-index = <0>; - reg = <0x00000004 0x00100100 0x100>; - dcr-reg = <0x060 0x020>; - interrupt-parent = <&DMA0>; - interrupts = <0 1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = < - 0 &UIC0 0x14 4 - 1 &UIC1 0x16 4>; - }; - - DMA1: dma1@400100200 { - compatible = "ibm,dma-440spe"; - cell-index = <1>; - reg = <0x00000004 0x00100200 0x100>; - dcr-reg = <0x060 0x020>; - interrupt-parent = <&DMA1>; - interrupts = <0 1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = < - 0 &UIC0 0x16 4 - 1 &UIC1 0x16 4>; - }; - - xor-accel@400200000 { - compatible = "amcc,xor-accelerator"; - reg = <0x00000004 0x00200000 0x400>; - interrupt-parent = <&UIC1>; - interrupts = <0x1f 4>; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@f0000200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/kilauea.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/kilauea.dts deleted file mode 100644 index 1613d6e4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/kilauea.dts +++ /dev/null @@ -1,435 +0,0 @@ -/* - * Device Tree Source for AMCC Kilauea (405EX) - * - * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "amcc,kilauea"; - compatible = "amcc,kilauea"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405EX"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; /* 16 kB */ - d-cache-size = <16384>; /* 16 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic-405ex", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-405ex","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-405ex","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - CPM0: cpm { - compatible = "ibm,cpm"; - dcr-access-method = "native"; - dcr-reg = <0x0b0 0x003>; - unused-units = <0x00000000>; - idle-doze = <0x02000000>; - standby = <0xe3e74800>; - }; - - plb { - compatible = "ibm,plb-405ex", "ibm,plb4"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2"; - dcr-reg = <0x010 0x002>; - interrupt-parent = <&UIC2>; - interrupts = <0x5 0x4 /* ECC DED Error */ - 0x6 0x4>; /* ECC SEC Error */ - }; - - CRYPTO: crypto@ef700000 { - compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto"; - reg = <0xef700000 0x80400>; - interrupt-parent = <&UIC0>; - interrupts = <0x17 0x2>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-405ex", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x80000000 0x80000000 0x10000000 - 0xef600000 0xef600000 0x00a00000 - 0xf0000000 0xf0000000 0x10000000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-405ex", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00200000>; - }; - partition@400000 { - label = "user"; - reg = <0x00400000 0x03b60000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - - ndfc@1,0 { - compatible = "ibm,ndfc"; - reg = <0x00000001 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - }; - partition@100000 { - label = "user"; - reg = <0x00000000 0x03f00000>; - }; - }; - }; - }; - - UART0: serial@ef600200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600200 0x00000008>; - virtual-reg = <0xef600200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1a 0x4>; - }; - - UART1: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600400 { - compatible = "ibm,iic-405ex", "ibm,iic"; - reg = <0xef600400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - - rtc@68 { - compatible = "dallas,ds1338"; - reg = <0x68>; - }; - - dtt@48 { - compatible = "dallas,ds1775"; - reg = <0x48>; - }; - }; - - IIC1: i2c@ef600500 { - compatible = "ibm,iic-405ex", "ibm,iic"; - reg = <0xef600500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - RGMII0: emac-rgmii@ef600b00 { - compatible = "ibm,rgmii-405ex", "ibm,rgmii"; - reg = <0xef600b00 0x00000104>; - has-mdio; - }; - - EMAC0: ethernet@ef600900 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 - /*Wake*/ 0x1 &UIC1 0x1d 0x4>; - reg = <0xef600900 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600a00 { - linux,network-index = <0x1>; - device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 - /*Wake*/ 0x1 &UIC1 0x1f 0x4>; - reg = <0xef600a00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCIE0: pciex@0a0000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0xa0000000 0x20000000 /* Config space access */ - 0xef000000 0x00001000>; /* Registers */ - dcr-reg = <0x040 0x020>; - sdr-base = <0x400>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 - 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0x00 to 0x3f */ - bus-range = <0x0 0x3f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@0c0000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0xc0000000 0x20000000 /* Config space access */ - 0xef001000 0x00001000>; /* Registers */ - dcr-reg = <0x060 0x020>; - sdr-base = <0x440>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 - 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0x40 to 0x7f */ - bus-range = <0x40 0x7f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; - }; - - MSI: ppc4xx-msi@C10000000 { - compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; - reg = < 0x0 0xEF620000 0x100>; - sdr-base = <0x4B0>; - msi-data = <0x00000000>; - msi-mask = <0x44440000>; - interrupt-count = <12>; - interrupts = <0 1 2 3 4 5 6 7 8 9 0xA 0xB 0xC 0xD>; - interrupt-parent = <&UIC2>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &UIC2 0x10 1 - 1 &UIC2 0x11 1 - 2 &UIC2 0x12 1 - 2 &UIC2 0x13 1 - 2 &UIC2 0x14 1 - 2 &UIC2 0x15 1 - 2 &UIC2 0x16 1 - 2 &UIC2 0x17 1 - 2 &UIC2 0x18 1 - 2 &UIC2 0x19 1 - 2 &UIC2 0x1A 1 - 2 &UIC2 0x1B 1 - 2 &UIC2 0x1C 1 - 3 &UIC2 0x1D 1>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/klondike.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/klondike.dts deleted file mode 100644 index 8c942903..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/klondike.dts +++ /dev/null @@ -1,227 +0,0 @@ -/* - * Device Tree for Klondike (APM8018X) board. - * - * Copyright (c) 2010, Applied Micro Circuits Corporation - * Author: Tanmay Inamdar <tinamdar@apm.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "apm,klondike"; - compatible = "apm,klondike"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,apm8018x"; - reg = <0x00000000>; - clock-frequency = <300000000>; /* Filled in by U-Boot */ - timebase-frequency = <300000000>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; /* 16 kB */ - d-cache-size = <16384>; /* 16 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x010>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x010>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x010>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x0a 0x4 0x0b 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x010>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - plb { - compatible = "ibm,plb4"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-apm8018x"; - dcr-reg = <0x010 0x002>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <16>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-parent = <&UIC1>; - interrupts = </*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x1 0x4 - /*TXDE*/ 0x2 0x4 - /*RXDE*/ 0x3 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x20000000 0x20000000 0x30000000 - 0x50000000 0x50000000 0x10000000 - 0x60000000 0x60000000 0x10000000 - 0xFE000000 0xFE000000 0x00010000>; - dcr-reg = <0x100 0x020>; - clock-frequency = <300000000>; /* Filled in by U-Boot */ - - RGMII0: emac-rgmii@400a2000 { - compatible = "ibm,rgmii"; - reg = <0x400a2000 0x00000010>; - has-mdio; - }; - - TAH0: emac-tah@400a3000 { - compatible = "ibm,tah"; - reg = <0x400a3000 0x100>; - }; - - TAH1: emac-tah@400a4000 { - compatible = "ibm,tah"; - reg = <0x400a4000 0x100>; - }; - - EMAC0: ethernet@400a0000 { - compatible = "ibm,emac4", "ibm-emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4>; - reg = <0x400a0000 0x00000100>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0x0>; - mal-rx-channel = <0x0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-address = <0x2>; - turbo = "no"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - tah-device = <&TAH0>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@400a1000 { - compatible = "ibm,emac4", "ibm-emac4sync"; - status = "disabled"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4>; - reg = <0x400a1000 0x00000100>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <8>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-address = <0x3>; - turbo = "no"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - tah-device = <&TAH1>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@50001000"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/kmeter1.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/kmeter1.dts deleted file mode 100644 index 983aee18..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/kmeter1.dts +++ /dev/null @@ -1,532 +0,0 @@ -/* - * Keymile KMETER1 Device Tree Source - * - * 2008-2011 DENX Software Engineering GmbH - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "KMETER1"; - compatible = "keymile,KMETER1"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet_piggy2; - ethernet1 = &enet_estar1; - ethernet2 = &enet_estar2; - ethernet3 = &enet_eth1; - ethernet4 = &enet_eth2; - ethernet5 = &enet_eth3; - ethernet6 = &enet_eth4; - serial0 = &serial0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8360@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; /* Filled in by U-Boot */ - bus-frequency = <0>; /* Filled in by U-Boot */ - clock-frequency = <0>; /* Filled in by U-Boot */ - }; - }; - - memory { - device_type = "memory"; - reg = <0 0>; /* Filled in by U-Boot */ - }; - - soc8360@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8360-immr", "simple-bus"; - ranges = <0x0 0xe0000000 0x00200000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; /* Filled in by U-Boot */ - - pmc: power@b00 { - compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl,mpc8313-i2c","fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - clock-frequency = <400000>; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <264000000>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - ipic: pic@700 { - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "fsl,pq2pro-pic", "fsl,ipic"; - interrupt-controller; - reg = <0x700 0x100>; - }; - - par_io@1400 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x1400 0x100>; - compatible = "fsl,mpc8360-par_io"; - num-ports = <7>; - - qe_pio_c: gpio-controller@30 { - #gpio-cells = <2>; - compatible = "fsl,mpc8360-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0x1430 0x18>; - gpio-controller; - }; - pio_ucc1: ucc_pin@0 { - reg = <0>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 0 3 1 0 1 0 /* TxD0 */ - 0 4 1 0 1 0 /* TxD1 */ - 0 5 1 0 1 0 /* TxD2 */ - 0 6 1 0 1 0 /* TxD3 */ - 0 9 2 0 1 0 /* RxD0 */ - 0 10 2 0 1 0 /* RxD1 */ - 0 11 2 0 1 0 /* RxD2 */ - 0 12 2 0 1 0 /* RxD3 */ - 0 7 1 0 1 0 /* TX_EN */ - 0 8 1 0 1 0 /* TX_ER */ - 0 15 2 0 1 0 /* RX_DV */ - 0 16 2 0 1 0 /* RX_ER */ - 0 0 2 0 1 0 /* RX_CLK */ - 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ - 2 8 2 0 1 0 /* GTX125 - CLK9 */ - >; - }; - - pio_ucc2: ucc_pin@1 { - reg = <1>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 0 17 1 0 1 0 /* TxD0 */ - 0 18 1 0 1 0 /* TxD1 */ - 0 19 1 0 1 0 /* TxD2 */ - 0 20 1 0 1 0 /* TxD3 */ - 0 23 2 0 1 0 /* RxD0 */ - 0 24 2 0 1 0 /* RxD1 */ - 0 25 2 0 1 0 /* RxD2 */ - 0 26 2 0 1 0 /* RxD3 */ - 0 21 1 0 1 0 /* TX_EN */ - 0 22 1 0 1 0 /* TX_ER */ - 0 29 2 0 1 0 /* RX_DV */ - 0 30 2 0 1 0 /* RX_ER */ - 0 31 2 0 1 0 /* RX_CLK */ - 2 2 1 0 2 0 /* GTX_CLK - CLK3 */ - 2 3 2 0 1 0 /* GTX125 - CLK4 */ - >; - }; - - pio_ucc4: ucc_pin@3 { - reg = <3>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 1 14 1 0 1 0 /* TxD0 (PB14, out, f1) */ - 1 15 1 0 1 0 /* TxD1 (PB15, out, f1) */ - 1 20 2 0 1 0 /* RxD0 (PB20, in, f1) */ - 1 21 2 0 1 0 /* RxD1 (PB21, in, f1) */ - 1 18 1 0 1 0 /* TX_EN (PB18, out, f1) */ - 1 26 2 0 1 0 /* RX_DV (PB26, in, f1) */ - 1 27 2 0 1 0 /* RX_ER (PB27, in, f1) */ - - 2 16 2 0 1 0 /* UCC4_RMII_CLK (CLK17) */ - >; - }; - - pio_ucc5: ucc_pin@4 { - reg = <4>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 3 0 1 0 1 0 /* TxD0 (PD0, out, f1) */ - 3 1 1 0 1 0 /* TxD1 (PD1, out, f1) */ - 3 6 2 0 1 0 /* RxD0 (PD6, in, f1) */ - 3 7 2 0 1 0 /* RxD1 (PD7, in, f1) */ - 3 4 1 0 1 0 /* TX_EN (PD4, out, f1) */ - 3 12 2 0 1 0 /* RX_DV (PD12, in, f1) */ - 3 13 2 0 1 0 /* RX_ER (PD13, in, f1) */ - >; - }; - - pio_ucc6: ucc_pin@5 { - reg = <5>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 3 14 1 0 1 0 /* TxD0 (PD14, out, f1) */ - 3 15 1 0 1 0 /* TxD1 (PD15, out, f1) */ - 3 20 2 0 1 0 /* RxD0 (PD20, in, f1) */ - 3 21 2 0 1 0 /* RxD1 (PD21, in, f1) */ - 3 18 1 0 1 0 /* TX_EN (PD18, out, f1) */ - 3 26 2 0 1 0 /* RX_DV (PD26, in, f1) */ - 3 27 2 0 1 0 /* RX_ER (PD27, in, f1) */ - >; - }; - - pio_ucc7: ucc_pin@6 { - reg = <6>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 4 0 1 0 1 0 /* TxD0 (PE0, out, f1) */ - 4 1 1 0 1 0 /* TxD1 (PE1, out, f1) */ - 4 6 2 0 1 0 /* RxD0 (PE6, in, f1) */ - 4 7 2 0 1 0 /* RxD1 (PE7, in, f1) */ - 4 4 1 0 1 0 /* TX_EN (PE4, out, f1) */ - 4 12 2 0 1 0 /* RX_DV (PE12, in, f1) */ - 4 13 2 0 1 0 /* RX_ER (PE13, in, f1) */ - >; - }; - - pio_ucc8: ucc_pin@7 { - reg = <7>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 4 14 1 0 2 0 /* TxD0 (PE14, out, f2) */ - 4 15 1 0 1 0 /* TxD1 (PE15, out, f1) */ - 4 20 2 0 1 0 /* RxD0 (PE20, in, f1) */ - 4 21 2 0 1 0 /* RxD1 (PE21, in, f1) */ - 4 18 1 0 1 0 /* TX_EN (PE18, out, f1) */ - 4 26 2 0 1 0 /* RX_DV (PE26, in, f1) */ - 4 27 2 0 1 0 /* RX_ER (PE27, in, f1) */ - - 2 15 2 0 1 0 /* UCCx_RMII_CLK (CLK16) */ - >; - }; - - }; - - qe@100000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe"; - ranges = <0x0 0x100000 0x100000>; - reg = <0x100000 0x480>; - clock-frequency = <0>; /* Filled in by U-Boot */ - brg-frequency = <0>; /* Filled in by U-Boot */ - bus-frequency = <0>; /* Filled in by U-Boot */ - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x00010000 0x0000c000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0xc000>; - }; - }; - - /* ESTAR-1 (UCC1, MDIO 0x10, RGMII) */ - enet_estar1: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk9"; - phy-handle = <&phy_estar1>; - phy-connection-type = "rgmii-id"; - pio-handle = <&pio_ucc1>; - }; - - /* ESTAR-2 (UCC2, MDIO 0x11, RGMII) */ - enet_estar2: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk4"; - phy-handle = <&phy_estar2>; - phy-connection-type = "rgmii-id"; - pio-handle = <&pio_ucc2>; - }; - - /* Piggy2 (UCC4, MDIO 0x00, RMII) */ - enet_piggy2: ucc@3200 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <4>; - reg = <0x3200 0x200>; - interrupts = <35>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk17"; - phy-handle = <&phy_piggy2>; - phy-connection-type = "rmii"; - pio-handle = <&pio_ucc4>; - }; - - /* Eth-1 (UCC5, MDIO 0x08, RMII) */ - enet_eth1: ucc@2400 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <5>; - reg = <0x2400 0x200>; - interrupts = <40>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk16"; - phy-handle = <&phy_eth1>; - phy-connection-type = "rmii"; - pio-handle = <&pio_ucc5>; - }; - - /* Eth-2 (UCC6, MDIO 0x09, RMII) */ - enet_eth2: ucc@3400 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <6>; - reg = <0x3400 0x200>; - interrupts = <41>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk16"; - phy-handle = <&phy_eth2>; - phy-connection-type = "rmii"; - pio-handle = <&pio_ucc6>; - }; - - /* Eth-3 (UCC7, MDIO 0x0a, RMII) */ - enet_eth3: ucc@2600 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <7>; - reg = <0x2600 0x200>; - interrupts = <42>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk16"; - phy-handle = <&phy_eth3>; - phy-connection-type = "rmii"; - pio-handle = <&pio_ucc7>; - }; - - /* Eth-4 (UCC8, MDIO 0x0b, RMII) */ - enet_eth4: ucc@3600 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <8>; - reg = <0x3600 0x200>; - interrupts = <43>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk16"; - phy-handle = <&phy_eth4>; - phy-connection-type = "rmii"; - pio-handle = <&pio_ucc8>; - }; - - mdio@3320 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3320 0x18>; - compatible = "fsl,ucc-mdio"; - - /* Piggy2 (UCC4, MDIO 0x00, RMII) */ - phy_piggy2: ethernet-phy@00 { - reg = <0x0>; - }; - - /* Eth-1 (UCC5, MDIO 0x08, RMII) */ - phy_eth1: ethernet-phy@08 { - reg = <0x08>; - }; - - /* Eth-2 (UCC6, MDIO 0x09, RMII) */ - phy_eth2: ethernet-phy@09 { - reg = <0x09>; - }; - - /* Eth-3 (UCC7, MDIO 0x0a, RMII) */ - phy_eth3: ethernet-phy@0a { - reg = <0x0a>; - }; - - /* Eth-4 (UCC8, MDIO 0x0b, RMII) */ - phy_eth4: ethernet-phy@0b { - reg = <0x0b>; - }; - - /* ESTAR-1 (UCC1, MDIO 0x10, RGMII) */ - phy_estar1: ethernet-phy@10 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x10>; - }; - - /* ESTAR-2 (UCC2, MDIO 0x11, RGMII) */ - phy_estar2: ethernet-phy@11 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x11>; - }; - }; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - big-endian; - interrupts = < - 32 0x8 - 33 0x8 - 34 0x8 - 35 0x8 - 40 0x8 - 41 0x8 - 42 0x8 - 43 0x8 - >; - interrupt-parent = <&ipic>; - }; - }; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", - "simple-bus"; - reg = <0xe0005000 0xd8>; - ranges = <0 0 0xf0000000 0x04000000 /* LB 0 */ - 1 0 0xe8000000 0x01000000 /* LB 1 */ - 3 0 0xa0000000 0x10000000>; /* LB 3 */ - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <2>; - partition@0 { /* 768KB */ - label = "u-boot"; - reg = <0 0xC0000>; - }; - partition@c0000 { /* 128KB */ - label = "env"; - reg = <0xC0000 0x20000>; - }; - partition@e0000 { /* 128KB */ - label = "envred"; - reg = <0xE0000 0x20000>; - }; - partition@100000 { /* 64512KB */ - label = "ubi0"; - reg = <0x100000 0x3F00000>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ksi8560.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ksi8560.dts deleted file mode 100644 index 296c572e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ksi8560.dts +++ /dev/null @@ -1,347 +0,0 @@ -/* - * Device Tree Source for Emerson KSI8560 - * - * Author: Alexandr Smirnov <asmirnov@ru.mvista.com> - * - * Based on mpc8560ads.dts - * - * 2008 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - * - */ - -/dts-v1/; - -/ { - model = "KSI8560"; - compatible = "emerson,KSI8560"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8560@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x8000>; /* L1, 32K */ - i-cache-size = <0x8000>; /* L1, 32K */ - timebase-frequency = <0>; /* From U-boot */ - bus-frequency = <0>; /* From U-boot */ - clock-frequency = <0>; /* From U-boot */ - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */ - }; - - soc@fdf00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x00000000 0xfdf00000 0x00100000>; - bus-frequency = <0>; /* Fixed by bootwrapper */ - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8560-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <0x12 0x2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <0x20>; /* 32 bytes */ - cache-size = <0x40000>; /* L2, 256K */ - interrupt-parent = <&mpic>; - interrupts = <0x10 0x2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - /* Mac address filled in by bootwrapper */ - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&PHY1>; - - mdio@520 { /* For TSECs */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - PHY1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - PHY2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - /* Mac address filled in by bootwrapper */ - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&PHY2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - mpic: pic@40000 { - #address-cells = <0>; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0x40000 0x40000>; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x4000 0x9000 0x2000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8560-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <165000000>; /* 166MHz */ - }; - - CPMPIC: pic@90c00 { - #address-cells = <0>; - #interrupt-cells = <2>; - interrupt-controller; - interrupts = <0x2e 0x2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; - }; - - serial@91a00 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a00 0x20 0x88000 0x100>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - current-speed = <0x1c200>; - interrupts = <0x28 0x8>; - interrupt-parent = <&CPMPIC>; - }; - - serial@91a20 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a20 0x20 0x88100 0x100>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x4a00000>; - current-speed = <0x1c200>; - interrupts = <0x29 0x8>; - interrupt-parent = <&CPMPIC>; - }; - - mdio@90d00 { /* For FCCs */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,cpm2-mdio-bitbang"; - reg = <0x90d00 0x14>; - fsl,mdio-pin = <24>; - fsl,mdc-pin = <25>; - - PHY0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - }; - - enet2: ethernet@91300 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>; - /* Mac address filled in by bootwrapper */ - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x12000300>; - interrupts = <0x20 0x8>; - interrupt-parent = <&CPMPIC>; - phy-handle = <&PHY0>; - }; - }; - }; - - localbus@fdf05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8560-localbus", "simple-bus"; - reg = <0xfdf05000 0x68>; - - ranges = <0x0 0x0 0xe0000000 0x00800000 - 0x4 0x0 0xe8080000 0x00080000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <0x2>; - - partition@0 { - label = "Primary Kernel"; - reg = <0x0 0x180000>; - }; - partition@180000 { - label = "Primary Filesystem"; - reg = <0x180000 0x580000>; - }; - partition@700000 { - label = "Monitor"; - reg = <0x300000 0x100000>; - read-only; - }; - }; - - cpld@4,0 { - compatible = "emerson,KSI8560-cpld"; - reg = <0x4 0x0 0x80000>; - }; - }; - - - chosen { - linux,stdout-path = "/soc/cpm/serial@91a00"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/kuroboxHD.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/kuroboxHD.dts deleted file mode 100644 index 0a454515..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/kuroboxHD.dts +++ /dev/null @@ -1,147 +0,0 @@ -/* - * Device Tree Souce for Buffalo KuroboxHD - * - * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHD, or use - * the default configuration linkstation_defconfig. - * - * Based on sandpoint.dts - * - * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de> - * Copyright 2008 Freescale Semiconductor, Inc. - * - * This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - -XXXX add flash parts, rtc, ?? - - */ - -/dts-v1/; - -/ { - model = "KuroboxHD"; - compatible = "linkstation"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,603e { /* Really 8241 */ - device_type = "cpu"; - reg = <0x0>; - clock-frequency = <200000000>; /* Fixed by bootloader */ - timebase-frequency = <24391680>; /* Fixed by bootloader */ - bus-frequency = <0>; /* Fixed by bootloader */ - /* Following required by dtc but not used */ - i-cache-size = <0x4000>; - d-cache-size = <0x4000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x4000000>; - }; - - soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "mpc10x"; - store-gathering = <0>; /* 0 == off, !0 == on */ - reg = <0x80000000 0x100000>; - ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */ - 0xfc000000 0xfc000000 0x100000 /* EUMB */ - 0xfe000000 0xfe000000 0xc00000 /* pci i/o space */ - 0xfec00000 0xfec00000 0x300000 /* pci cfg regs */ - 0xfef00000 0xfef00000 0x100000>; /* pci iack */ - - i2c@80003000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x80003000 0x1000>; - interrupts = <5 2>; - interrupt-parent = <&mpic>; - - rtc@32 { - compatible = "ricoh,rs5c372a"; - reg = <0x32>; - }; - }; - - serial0: serial@80004500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x80004500 0x8>; - clock-frequency = <97553800>; - current-speed = <9600>; - interrupts = <9 0>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@80004600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x80004600 0x8>; - clock-frequency = <97553800>; - current-speed = <57600>; - interrupts = <10 0>; - interrupt-parent = <&mpic>; - }; - - mpic: interrupt-controller@80040000 { - #interrupt-cells = <2>; - #address-cells = <0>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - interrupt-controller; - reg = <0x80040000 0x40000>; - }; - - pci0: pci@fec00000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "mpc10x-pci"; - reg = <0xfec00000 0x400000>; - ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000 - 0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>; - bus-range = <0 255>; - clock-frequency = <133333333>; - interrupt-parent = <&mpic>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 11 - IRQ0 ETH */ - 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1 - /* IDSEL 12 - IRQ1 IDE0 */ - 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1 - /* IDSEL 14 - IRQ3 USB2.0 */ - 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/kuroboxHG.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/kuroboxHG.dts deleted file mode 100644 index 0e758b34..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/kuroboxHG.dts +++ /dev/null @@ -1,147 +0,0 @@ -/* - * Device Tree Souce for Buffalo KuroboxHG - * - * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use - * the default configuration linkstation_defconfig. - * - * Based on sandpoint.dts - * - * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de> - * Copyright 2008 Freescale Semiconductor, Inc. - * - * This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - -XXXX add flash parts, rtc, ?? - - */ - -/dts-v1/; - -/ { - model = "KuroboxHG"; - compatible = "linkstation"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,603e { /* Really 8241 */ - device_type = "cpu"; - reg = <0x0>; - clock-frequency = <266000000>; /* Fixed by bootloader */ - timebase-frequency = <32522240>; /* Fixed by bootloader */ - bus-frequency = <0>; /* Fixed by bootloader */ - /* Following required by dtc but not used */ - i-cache-size = <0x4000>; - d-cache-size = <0x4000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x8000000>; - }; - - soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "mpc10x"; - store-gathering = <0>; /* 0 == off, !0 == on */ - reg = <0x80000000 0x100000>; - ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */ - 0xfc000000 0xfc000000 0x100000 /* EUMB */ - 0xfe000000 0xfe000000 0xc00000 /* pci i/o space */ - 0xfec00000 0xfec00000 0x300000 /* pci cfg regs */ - 0xfef00000 0xfef00000 0x100000>; /* pci iack */ - - i2c@80003000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x80003000 0x1000>; - interrupts = <5 2>; - interrupt-parent = <&mpic>; - - rtc@32 { - compatible = "ricoh,rs5c372a"; - reg = <0x32>; - }; - }; - - serial0: serial@80004500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x80004500 0x8>; - clock-frequency = <130041000>; - current-speed = <9600>; - interrupts = <9 0>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@80004600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x80004600 0x8>; - clock-frequency = <130041000>; - current-speed = <57600>; - interrupts = <10 0>; - interrupt-parent = <&mpic>; - }; - - mpic: interrupt-controller@80040000 { - #interrupt-cells = <2>; - #address-cells = <0>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - interrupt-controller; - reg = <0x80040000 0x40000>; - }; - - pci0: pci@fec00000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "mpc10x-pci"; - reg = <0xfec00000 0x400000>; - ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000 - 0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>; - bus-range = <0 255>; - clock-frequency = <133333333>; - interrupt-parent = <&mpic>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 11 - IRQ0 ETH */ - 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1 - /* IDSEL 12 - IRQ1 IDE0 */ - 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1 - /* IDSEL 14 - IRQ3 USB2.0 */ - 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/lite5200.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/lite5200.dts deleted file mode 100644 index 179a1785..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/lite5200.dts +++ /dev/null @@ -1,308 +0,0 @@ -/* - * Lite5200 board Device Tree Source - * - * Copyright 2006-2007 Secret Lab Technologies Ltd. - * Grant Likely <grant.likely@secretlab.ca> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "fsl,lite5200"; - compatible = "fsl,lite5200"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&mpc5200_pic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,5200@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x04000000>; // 64MB - }; - - soc5200@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc5200-immr"; - ranges = <0 0xf0000000 0x0000c000>; - reg = <0xf0000000 0x00000100>; - bus-frequency = <0>; // from bootloader - system-frequency = <0>; // from bootloader - - cdm@200 { - compatible = "fsl,mpc5200-cdm"; - reg = <0x200 0x38>; - }; - - mpc5200_pic: interrupt-controller@500 { - // 5200 interrupts are encoded into two levels; - interrupt-controller; - #interrupt-cells = <3>; - compatible = "fsl,mpc5200-pic"; - reg = <0x500 0x80>; - }; - - timer@600 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x600 0x10>; - interrupts = <1 9 0>; - fsl,has-wdt; - }; - - timer@610 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x610 0x10>; - interrupts = <1 10 0>; - }; - - timer@620 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x620 0x10>; - interrupts = <1 11 0>; - }; - - timer@630 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x630 0x10>; - interrupts = <1 12 0>; - }; - - timer@640 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x640 0x10>; - interrupts = <1 13 0>; - }; - - timer@650 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x650 0x10>; - interrupts = <1 14 0>; - }; - - timer@660 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x660 0x10>; - interrupts = <1 15 0>; - }; - - timer@670 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x670 0x10>; - interrupts = <1 16 0>; - }; - - rtc@800 { // Real time clock - compatible = "fsl,mpc5200-rtc"; - reg = <0x800 0x100>; - interrupts = <1 5 0 1 6 0>; - }; - - can@900 { - compatible = "fsl,mpc5200-mscan"; - interrupts = <2 17 0>; - reg = <0x900 0x80>; - }; - - can@980 { - compatible = "fsl,mpc5200-mscan"; - interrupts = <2 18 0>; - reg = <0x980 0x80>; - }; - - gpio@b00 { - compatible = "fsl,mpc5200-gpio"; - reg = <0xb00 0x40>; - interrupts = <1 7 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpio@c00 { - compatible = "fsl,mpc5200-gpio-wkup"; - reg = <0xc00 0x40>; - interrupts = <1 8 0 0 3 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - spi@f00 { - compatible = "fsl,mpc5200-spi"; - reg = <0xf00 0x20>; - interrupts = <2 13 0 2 14 0>; - }; - - usb@1000 { - compatible = "fsl,mpc5200-ohci","ohci-be"; - reg = <0x1000 0xff>; - interrupts = <2 6 0>; - }; - - dma-controller@1200 { - compatible = "fsl,mpc5200-bestcomm"; - reg = <0x1200 0x80>; - interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 - 3 4 0 3 5 0 3 6 0 3 7 0 - 3 8 0 3 9 0 3 10 0 3 11 0 - 3 12 0 3 13 0 3 14 0 3 15 0>; - }; - - xlb@1f00 { - compatible = "fsl,mpc5200-xlb"; - reg = <0x1f00 0x100>; - }; - - serial@2000 { // PSC1 - compatible = "fsl,mpc5200-psc-uart"; - cell-index = <0>; - reg = <0x2000 0x100>; - interrupts = <2 1 0>; - }; - - // PSC2 in ac97 mode example - //ac97@2200 { // PSC2 - // compatible = "fsl,mpc5200-psc-ac97"; - // cell-index = <1>; - // reg = <0x2200 0x100>; - // interrupts = <2 2 0>; - //}; - - // PSC3 in CODEC mode example - //i2s@2400 { // PSC3 - // compatible = "fsl,mpc5200-psc-i2s"; - // cell-index = <2>; - // reg = <0x2400 0x100>; - // interrupts = <2 3 0>; - //}; - - // PSC4 in uart mode example - //serial@2600 { // PSC4 - // compatible = "fsl,mpc5200-psc-uart"; - // cell-index = <3>; - // reg = <0x2600 0x100>; - // interrupts = <2 11 0>; - //}; - - // PSC5 in uart mode example - //serial@2800 { // PSC5 - // compatible = "fsl,mpc5200-psc-uart"; - // cell-index = <4>; - // reg = <0x2800 0x100>; - // interrupts = <2 12 0>; - //}; - - // PSC6 in spi mode example - //spi@2c00 { // PSC6 - // compatible = "fsl,mpc5200-psc-spi"; - // cell-index = <5>; - // reg = <0x2c00 0x100>; - // interrupts = <2 4 0>; - //}; - - ethernet@3000 { - compatible = "fsl,mpc5200-fec"; - reg = <0x3000 0x400>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <2 5 0>; - phy-handle = <&phy0>; - }; - - mdio@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-mdio"; - reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts - interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. - - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - ata@3a00 { - compatible = "fsl,mpc5200-ata"; - reg = <0x3a00 0x100>; - interrupts = <2 7 0>; - }; - - i2c@3d00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d00 0x40>; - interrupts = <2 15 0>; - }; - - i2c@3d40 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d40 0x40>; - interrupts = <2 16 0>; - - eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - }; - }; - - sram@8000 { - compatible = "fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - pci@f0000d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "fsl,mpc5200-pci"; - reg = <0xf0000d00 0x100>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 - 0xc000 0 0 2 &mpc5200_pic 0 0 3 - 0xc000 0 0 3 &mpc5200_pic 0 0 3 - 0xc000 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 - 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; - }; - - localbus { - compatible = "fsl,mpc5200-lpb","simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - - ranges = <0 0 0xff000000 0x01000000>; - - flash@0,0 { - compatible = "amd,am29lv652d", "cfi-flash"; - reg = <0 0 0x01000000>; - bank-width = <1>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/lite5200b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/lite5200b.dts deleted file mode 100644 index fb288bb8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/lite5200b.dts +++ /dev/null @@ -1,146 +0,0 @@ -/* - * Lite5200B board Device Tree Source - * - * Copyright 2006-2007 Secret Lab Technologies Ltd. - * Grant Likely <grant.likely@secretlab.ca> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "fsl,lite5200b"; - compatible = "fsl,lite5200b"; - - memory { - reg = <0x00000000 0x10000000>; // 256MB - }; - - soc5200@f0000000 { - timer@600 { // General Purpose Timer - fsl,has-wdt; - }; - - psc@2000 { // PSC1 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - cell-index = <0>; - }; - - psc@2200 { // PSC2 - status = "disabled"; - }; - - psc@2400 { // PSC3 - status = "disabled"; - }; - - psc@2600 { // PSC4 - status = "disabled"; - }; - - psc@2800 { // PSC5 - status = "disabled"; - }; - - psc@2c00 { // PSC6 - status = "disabled"; - }; - - // PSC2 in ac97 mode example - //ac97@2200 { // PSC2 - // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97"; - // cell-index = <1>; - //}; - - // PSC3 in CODEC mode example - //i2s@2400 { // PSC3 - // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible - // cell-index = <2>; - //}; - - // PSC6 in spi mode example - //spi@2c00 { // PSC6 - // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi"; - // cell-index = <5>; - //}; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - i2c@3d40 { - eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - }; - }; - - sram@8000 { - compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - pci@f0000d00 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot - 0xc000 0 0 2 &mpc5200_pic 1 1 3 - 0xc000 0 0 3 &mpc5200_pic 1 2 3 - 0xc000 0 0 4 &mpc5200_pic 1 3 3 - - 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot - 0xc800 0 0 2 &mpc5200_pic 1 2 3 - 0xc800 0 0 3 &mpc5200_pic 1 3 3 - 0xc800 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 - 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; - }; - - localbus { - ranges = <0 0 0xfe000000 0x02000000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - bank-width = <1>; - #size-cells = <1>; - #address-cells = <1>; - - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "rootfs"; - reg = <0x00200000 0x01d00000>; - }; - partition@1f00000 { - label = "u-boot"; - reg = <0x01f00000 0x00060000>; - }; - partition@1f60000 { - label = "u-boot-env"; - reg = <0x01f60000 0x00020000>; - }; - partition@1f80000 { - label = "dtb"; - reg = <0x01f80000 0x00080000>; - }; - }; - }; - -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/makalu.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/makalu.dts deleted file mode 100644 index 63d48b63..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/makalu.dts +++ /dev/null @@ -1,353 +0,0 @@ -/* - * Device Tree Source for AMCC Makalu (405EX) - * - * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "amcc,makalu"; - compatible = "amcc,makalu"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405EX"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; /* 16 kB */ - d-cache-size = <16384>; /* 16 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic-405ex", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-405ex","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-405ex","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - plb { - compatible = "ibm,plb-405ex", "ibm,plb4"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2"; - dcr-reg = <0x010 0x002>; - interrupt-parent = <&UIC2>; - interrupts = <0x5 0x4 /* ECC DED Error */ - 0x6 0x4 /* ECC SEC Error */ >; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-405ex", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x80000000 0x80000000 0x10000000 - 0xef600000 0xef600000 0x00a00000 - 0xf0000000 0xf0000000 0x10000000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-405ex", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00200000>; - }; - partition@400000 { - label = "user"; - reg = <0x00400000 0x03b60000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - }; - - UART0: serial@ef600200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600200 0x00000008>; - virtual-reg = <0xef600200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1a 0x4>; - }; - - UART1: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600400 { - compatible = "ibm,iic-405ex", "ibm,iic"; - reg = <0xef600400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@ef600500 { - compatible = "ibm,iic-405ex", "ibm,iic"; - reg = <0xef600500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - - RGMII0: emac-rgmii@ef600b00 { - compatible = "ibm,rgmii-405ex", "ibm,rgmii"; - reg = <0xef600b00 0x00000104>; - has-mdio; - }; - - EMAC0: ethernet@ef600900 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 - /*Wake*/ 0x1 &UIC1 0x1d 0x4>; - reg = <0xef600900 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x0000003f>; /* Start at 6 */ - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600a00 { - linux,network-index = <0x1>; - device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 - /*Wake*/ 0x1 &UIC1 0x1f 0x4>; - reg = <0xef600a00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCIE0: pciex@0a0000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0xa0000000 0x20000000 /* Config space access */ - 0xef000000 0x00001000>; /* Registers */ - dcr-reg = <0x040 0x020>; - sdr-base = <0x400>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 - 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0x00 to 0x3f */ - bus-range = <0x0 0x3f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@0c0000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0xc0000000 0x20000000 /* Config space access */ - 0xef001000 0x00001000>; /* Registers */ - dcr-reg = <0x060 0x020>; - sdr-base = <0x440>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 - 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0x40 to 0x7f */ - bus-range = <0x40 0x7f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/media5200.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/media5200.dts deleted file mode 100644 index 48d72f38..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/media5200.dts +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Freescale Media5200 board Device Tree Source - * - * Copyright 2009 Secret Lab Technologies Ltd. - * Grant Likely <grant.likely@secretlab.ca> - * Steven Cavanagh <scavanagh@secretlab.ca> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "fsl,media5200"; - compatible = "fsl,media5200"; - - aliases { - console = &console; - ethernet0 = ð0; - }; - - chosen { - linux,stdout-path = &console; - }; - - cpus { - PowerPC,5200@0 { - timebase-frequency = <33000000>; // 33 MHz, these were configured by U-Boot - bus-frequency = <132000000>; // 132 MHz - clock-frequency = <396000000>; // 396 MHz - }; - }; - - memory { - reg = <0x00000000 0x08000000>; // 128MB RAM - }; - - soc5200@f0000000 { - bus-frequency = <132000000>;// 132 MHz - - timer@600 { // General Purpose Timer - fsl,has-wdt; - }; - - psc@2000 { // PSC1 - status = "disabled"; - }; - - psc@2200 { // PSC2 - status = "disabled"; - }; - - psc@2400 { // PSC3 - status = "disabled"; - }; - - psc@2600 { // PSC4 - status = "disabled"; - }; - - psc@2800 { // PSC5 - status = "disabled"; - }; - - // PSC6 in uart mode - console: psc@2c00 { // PSC6 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - usb@1000 { - reg = <0x1000 0x100>; - }; - }; - - pci@f0000d00 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &media5200_fpga 0 2 // 1st slot - 0xc000 0 0 2 &media5200_fpga 0 3 - 0xc000 0 0 3 &media5200_fpga 0 4 - 0xc000 0 0 4 &media5200_fpga 0 5 - - 0xc800 0 0 1 &media5200_fpga 0 3 // 2nd slot - 0xc800 0 0 2 &media5200_fpga 0 4 - 0xc800 0 0 3 &media5200_fpga 0 5 - 0xc800 0 0 4 &media5200_fpga 0 2 - - 0xd000 0 0 1 &media5200_fpga 0 4 // miniPCI - 0xd000 0 0 2 &media5200_fpga 0 5 - - 0xe000 0 0 1 &media5200_fpga 0 5 // CoralIP - >; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 - 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; - interrupt-parent = <&mpc5200_pic>; - }; - - localbus { - ranges = < 0 0 0xfc000000 0x02000000 - 1 0 0xfe000000 0x02000000 - 2 0 0xf0010000 0x00010000 - 3 0 0xf0020000 0x00010000 >; - flash@0,0 { - compatible = "amd,am29lv28ml", "cfi-flash"; - reg = <0 0x0 0x2000000>; // 32 MB - bank-width = <4>; // Width in bytes of the flash bank - device-width = <2>; // Two devices on each bank - }; - - flash@1,0 { - compatible = "amd,am29lv28ml", "cfi-flash"; - reg = <1 0 0x2000000>; // 32 MB - bank-width = <4>; // Width in bytes of the flash bank - device-width = <2>; // Two devices on each bank - }; - - media5200_fpga: fpga@2,0 { - compatible = "fsl,media5200-fpga"; - interrupt-controller; - #interrupt-cells = <2>; // 0:bank 1:id; no type field - reg = <2 0 0x10000>; - - interrupt-parent = <&mpc5200_pic>; - interrupts = <0 0 3 // IRQ bank 0 - 1 1 3>; // IRQ bank 1 - }; - - uart@3,0 { - compatible = "ti,tl16c752bpt"; - reg = <3 0 0x10000>; - interrupt-parent = <&media5200_fpga>; - interrupts = <0 0 0 1>; // 2 irqs - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mgcoge.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mgcoge.dts deleted file mode 100644 index ededaf5a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mgcoge.dts +++ /dev/null @@ -1,241 +0,0 @@ -/* - * Device Tree for the MGCOGE plattform from keymile - * - * Copyright 2008 DENX Software Engineering GmbH - * Heiko Schocher <hs@denx.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; -/ { - model = "MGCOGE"; - compatible = "keymile,km82xx"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = ð0; - serial0 = &smc2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8247@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; /* Filled in by U-Boot */ - clock-frequency = <0>; /* Filled in by U-Boot */ - bus-frequency = <0>; /* Filled in by U-Boot */ - }; - }; - - localbus@f0010100 { - compatible = "fsl,mpc8247-localbus", - "fsl,pq2-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xf0010100 0x40>; - - ranges = <0 0 0xfe000000 0x00400000 - 1 0 0x30000000 0x00010000 - 2 0 0x40000000 0x00010000 - 5 0 0x50000000 0x04000000 - >; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0x0 0x400000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <1>; - device-width = <1>; - partition@0 { - label = "u-boot"; - reg = <0x00000 0xC0000>; - }; - partition@1 { - label = "env"; - reg = <0xC0000 0x20000>; - }; - partition@2 { - label = "envred"; - reg = <0xE0000 0x20000>; - }; - partition@3 { - label = "free"; - reg = <0x100000 0x300000>; - }; - }; - - flash@5,0 { - compatible = "cfi-flash"; - reg = <5 0x00000000 0x02000000 - 5 0x02000000 0x02000000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <2>; - partition@app { /* 64 MBytes */ - label = "ubi0"; - reg = <0x00000000 0x04000000>; - }; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0>; /* Filled in by U-Boot */ - }; - - soc@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus"; - ranges = <0x00000000 0xf0000000 0x00053000>; - - // Temporary until code stops depending on it. - device_type = "soc"; - - cpm@119c0 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - compatible = "fsl,mpc8247-cpm", "fsl,cpm2", - "simple-bus"; - reg = <0x119c0 0x30>; - ranges; - - muram { - compatible = "fsl,cpm-muram"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x80 0x1f80 0x9800 0x800>; - }; - }; - - brg@119f0 { - compatible = "fsl,mpc8247-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x119f0 0x10 0x115f0 0x10>; - }; - - /* Monitor port/SMC2 */ - smc2: serial@11a90 { - device_type = "serial"; - compatible = "fsl,mpc8247-smc-uart", - "fsl,cpm2-smc-uart"; - reg = <0x11a90 0x20 0x88fc 0x02>; - interrupts = <5 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x21200000>; - current-speed = <0>; /* Filled in by U-Boot */ - }; - - eth0: ethernet@11a60 { - device_type = "network"; - compatible = "fsl,mpc8247-scc-enet", - "fsl,cpm2-scc-enet"; - reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>; - local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */ - interrupts = <43 8>; - interrupt-parent = <&PIC>; - linux,network-index = <0>; - fsl,cpm-command = <0xce00000>; - fixed-link = <0 0 10 0 0>; - }; - - i2c@11860 { - compatible = "fsl,mpc8272-i2c", - "fsl,cpm2-i2c"; - reg = <0x11860 0x20 0x8afc 0x2>; - interrupts = <1 8>; - interrupt-parent = <&PIC>; - fsl,cpm-command = <0x29600000>; - #address-cells = <1>; - #size-cells = <0>; - }; - - mdio@10d40 { - compatible = "fsl,cpm2-mdio-bitbang"; - reg = <0x10d00 0x14>; - #address-cells = <1>; - #size-cells = <0>; - fsl,mdio-pin = <12>; - fsl,mdc-pin = <13>; - - phy0: ethernet-phy@0 { - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - reg = <0x1>; - }; - }; - - /* FCC1 management to switch */ - ethernet@11300 { - device_type = "network"; - compatible = "fsl,cpm2-fcc-enet"; - reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>; - local-mac-address = [ 00 01 02 03 04 07 ]; - interrupts = <32 8>; - interrupt-parent = <&PIC>; - phy-handle = <&phy0>; - linux,network-index = <1>; - fsl,cpm-command = <0x12000300>; - }; - - /* FCC2 to redundant core unit over backplane */ - ethernet@11320 { - device_type = "network"; - compatible = "fsl,cpm2-fcc-enet"; - reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>; - local-mac-address = [ 00 01 02 03 04 08 ]; - interrupts = <33 8>; - interrupt-parent = <&PIC>; - phy-handle = <&phy1>; - linux,network-index = <2>; - fsl,cpm-command = <0x16200300>; - }; - - usb@11b60 { - compatible = "fsl,mpc8272-cpm-usb"; - mode = "peripheral"; - reg = <0x11b60 0x40 0x8b00 0x100>; - interrupts = <11 8>; - interrupt-parent = <&PIC>; - usb-clock = <5>; - }; - }; - - cpm2_pio_c: gpio-controller@10d40 { - #gpio-cells = <2>; - compatible = "fsl,cpm2-pario-bank"; - reg = <0x10d40 0x14>; - gpio-controller; - }; - - PIC: interrupt-controller@10c00 { - #interrupt-cells = <2>; - interrupt-controller; - reg = <0x10c00 0x80>; - compatible = "fsl,mpc8247-pic", "fsl,pq2-pic"; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/motionpro.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/motionpro.dts deleted file mode 100644 index 0b78e89a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/motionpro.dts +++ /dev/null @@ -1,140 +0,0 @@ -/* - * Motion-PRO board Device Tree Source - * - * Copyright (C) 2007 Semihalf - * Marian Balakowicz <m8@semihalf.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "promess,motionpro"; - compatible = "promess,motionpro"; - - soc5200@f0000000 { - timer@600 { // General Purpose Timer - fsl,has-wdt; - }; - - timer@660 { // Motion-PRO status LED - compatible = "promess,motionpro-led"; - label = "motionpro-statusled"; - blink-delay = <100>; // 100 msec - }; - - timer@670 { // Motion-PRO ready LED - compatible = "promess,motionpro-led"; - label = "motionpro-readyled"; - }; - - can@900 { - status = "disabled"; - }; - - psc@2000 { // PSC1 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - // PSC2 in spi master mode - psc@2200 { // PSC2 - compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi"; - cell-index = <1>; - }; - - psc@2400 { // PSC3 - status = "disabled"; - }; - - psc@2600 { // PSC4 - status = "disabled"; - }; - - psc@2800 { // PSC5 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2c00 { // PSC6 - status = "disabled"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@2 { - reg = <2>; - }; - }; - - i2c@3d00 { - status = "disabled"; - }; - - i2c@3d40 { - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - sram@8000 { - compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - pci@f0000d00 { - status = "disabled"; - }; - - localbus { - ranges = <0 0 0xff000000 0x01000000 - 1 0 0x50000000 0x00010000 - 2 0 0x50010000 0x00010000 - 3 0 0x50020000 0x00010000>; - - // 8-bit DualPort SRAM on LocalPlus Bus CS1 - kollmorgen@1,0 { - compatible = "promess,motionpro-kollmorgen"; - reg = <1 0 0x10000>; - interrupts = <1 1 0>; - }; - - // 8-bit board CPLD on LocalPlus Bus CS2 - cpld@2,0 { - compatible = "promess,motionpro-cpld"; - reg = <2 0 0x10000>; - }; - - // 8-bit custom Anybus Module on LocalPlus Bus CS3 - anybus@3,0 { - compatible = "promess,motionpro-anybus"; - reg = <3 0 0x10000>; - }; - pro_module_general@3,0 { - compatible = "promess,pro_module_general"; - reg = <3 0 3>; - }; - pro_module_dio@3,800 { - compatible = "promess,pro_module_dio"; - reg = <3 0x800 2>; - }; - - // 16-bit flash device at LocalPlus Bus CS0 - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x01000000>; - bank-width = <2>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - }; - - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc5121ads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc5121ads.dts deleted file mode 100644 index c9ef6bbe..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc5121ads.dts +++ /dev/null @@ -1,419 +0,0 @@ -/* - * MPC5121E ADS Device Tree Source - * - * Copyright 2007,2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "mpc5121ads"; - compatible = "fsl,mpc5121ads"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - pci = &pci; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,5121@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <0x20>; // 32 bytes - i-cache-line-size = <0x20>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <49500000>;// 49.5 MHz (csb/4) - bus-frequency = <198000000>; // 198 MHz csb bus - clock-frequency = <396000000>; // 396 MHz ppc core - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - mbx@20000000 { - compatible = "fsl,mpc5121-mbx"; - reg = <0x20000000 0x4000>; - interrupts = <66 0x8>; - interrupt-parent = < &ipic >; - }; - - sram@30000000 { - compatible = "fsl,mpc5121-sram"; - reg = <0x30000000 0x20000>; // 128K at 0x30000000 - }; - - nfc@40000000 { - compatible = "fsl,mpc5121-nfc"; - reg = <0x40000000 0x100000>; // 1M at 0x40000000 - interrupts = <6 8>; - interrupt-parent = < &ipic >; - #address-cells = <1>; - #size-cells = <1>; - // ADS has two Hynix 512MB Nand flash chips in a single - // stacked package. - chips = <2>; - nand@0 { - label = "nand"; - reg = <0x00000000 0x40000000>; // 512MB + 512MB - }; - }; - - localbus@80000020 { - compatible = "fsl,mpc5121-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0x80000020 0x40>; - - ranges = <0x0 0x0 0xfc000000 0x04000000 - 0x2 0x0 0x82000000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0x0 0x4000000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <4>; - device-width = <2>; - protected@0 { - label = "protected"; - reg = <0x00000000 0x00040000>; // first sector is protected - read-only; - }; - filesystem@40000 { - label = "filesystem"; - reg = <0x00040000 0x03c00000>; // 60M for filesystem - }; - kernel@3c40000 { - label = "kernel"; - reg = <0x03c40000 0x00280000>; // 2.5M for kernel - }; - device-tree@3ec0000 { - label = "device-tree"; - reg = <0x03ec0000 0x00040000>; // one sector for device tree - }; - u-boot@3f00000 { - label = "u-boot"; - reg = <0x03f00000 0x00100000>; // 1M for u-boot - read-only; - }; - }; - - board-control@2,0 { - compatible = "fsl,mpc5121ads-cpld"; - reg = <0x2 0x0 0x8000>; - }; - - cpld_pic: pic@2,a { - compatible = "fsl,mpc5121ads-cpld-pic"; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x2 0xa 0x5>; - interrupt-parent = < &ipic >; - // irq routing - // all irqs but touch screen are routed to irq0 (ipic 48) - // touch screen is statically routed to irq1 (ipic 17) - // so don't use it here - interrupts = <48 0x8>; - }; - }; - - soc@80000000 { - compatible = "fsl,mpc5121-immr"; - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - ranges = <0x0 0x80000000 0x400000>; - reg = <0x80000000 0x400000>; - bus-frequency = <66000000>; // 66 MHz ips bus - - - // IPIC - // interrupts cell = <intr #, sense> - // sense values match linux IORESOURCE_IRQ_* defines: - // sense == 8: Level, low assertion - // sense == 2: Edge, high-to-low change - // - ipic: interrupt-controller@c00 { - compatible = "fsl,mpc5121-ipic", "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0xc00 0x100>; - }; - - rtc@a00 { // Real time clock - compatible = "fsl,mpc5121-rtc"; - reg = <0xa00 0x100>; - interrupts = <79 0x8 80 0x8>; - interrupt-parent = < &ipic >; - }; - - reset@e00 { // Reset module - compatible = "fsl,mpc5121-reset"; - reg = <0xe00 0x100>; - }; - - clock@f00 { // Clock control - compatible = "fsl,mpc5121-clock"; - reg = <0xf00 0x100>; - }; - - pmc@1000{ //Power Management Controller - compatible = "fsl,mpc5121-pmc"; - reg = <0x1000 0x100>; - interrupts = <83 0x2>; - interrupt-parent = < &ipic >; - }; - - gpio@1100 { - compatible = "fsl,mpc5121-gpio"; - reg = <0x1100 0x100>; - interrupts = <78 0x8>; - interrupt-parent = < &ipic >; - }; - - can@1300 { - compatible = "fsl,mpc5121-mscan"; - interrupts = <12 0x8>; - interrupt-parent = < &ipic >; - reg = <0x1300 0x80>; - }; - - can@1380 { - compatible = "fsl,mpc5121-mscan"; - interrupts = <13 0x8>; - interrupt-parent = < &ipic >; - reg = <0x1380 0x80>; - }; - - i2c@1700 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5121-i2c", "fsl-i2c"; - reg = <0x1700 0x20>; - interrupts = <9 0x8>; - interrupt-parent = < &ipic >; - fsl,preserve-clocking; - - hwmon@4a { - compatible = "adi,ad7414"; - reg = <0x4a>; - }; - - eeprom@50 { - compatible = "at,24c32"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "stm,m41t62"; - reg = <0x68>; - }; - }; - - i2c@1720 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5121-i2c", "fsl-i2c"; - reg = <0x1720 0x20>; - interrupts = <10 0x8>; - interrupt-parent = < &ipic >; - }; - - i2c@1740 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5121-i2c", "fsl-i2c"; - reg = <0x1740 0x20>; - interrupts = <11 0x8>; - interrupt-parent = < &ipic >; - }; - - i2ccontrol@1760 { - compatible = "fsl,mpc5121-i2c-ctrl"; - reg = <0x1760 0x8>; - }; - - axe@2000 { - compatible = "fsl,mpc5121-axe"; - reg = <0x2000 0x100>; - interrupts = <42 0x8>; - interrupt-parent = < &ipic >; - }; - - display@2100 { - compatible = "fsl,mpc5121-diu"; - reg = <0x2100 0x100>; - interrupts = <64 0x8>; - interrupt-parent = < &ipic >; - }; - - mdio@2800 { - compatible = "fsl,mpc5121-fec-mdio"; - reg = <0x2800 0x800>; - #address-cells = <1>; - #size-cells = <0>; - phy: ethernet-phy@0 { - reg = <1>; - device_type = "ethernet-phy"; - }; - }; - - ethernet@2800 { - device_type = "network"; - compatible = "fsl,mpc5121-fec"; - reg = <0x2800 0x800>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <4 0x8>; - interrupt-parent = < &ipic >; - phy-handle = < &phy >; - fsl,align-tx-packets = <4>; - }; - - // 5121e has two dr usb modules - // mpc5121_ads only uses USB0 - - // USB1 using external ULPI PHY - //usb@3000 { - // compatible = "fsl,mpc5121-usb2-dr"; - // reg = <0x3000 0x1000>; - // #address-cells = <1>; - // #size-cells = <0>; - // interrupt-parent = < &ipic >; - // interrupts = <43 0x8>; - // dr_mode = "otg"; - // phy_type = "ulpi"; - //}; - - // USB0 using internal UTMI PHY - usb@4000 { - compatible = "fsl,mpc5121-usb2-dr"; - reg = <0x4000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = < &ipic >; - interrupts = <44 0x8>; - dr_mode = "otg"; - phy_type = "utmi_wide"; - fsl,invert-drvvbus; - fsl,invert-pwr-fault; - }; - - // IO control - ioctl@a000 { - compatible = "fsl,mpc5121-ioctl"; - reg = <0xA000 0x1000>; - }; - - pata@10200 { - compatible = "fsl,mpc5121-pata"; - reg = <0x10200 0x100>; - interrupts = <5 0x8>; - interrupt-parent = < &ipic >; - }; - - // 512x PSCs are not 52xx PSC compatible - // PSC3 serial port A aka ttyPSC0 - serial@11300 { - device_type = "serial"; - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - // Logical port assignment needed until driver - // learns to use aliases - port-number = <0>; - cell-index = <3>; - reg = <0x11300 0x100>; - interrupts = <40 0x8>; - interrupt-parent = < &ipic >; - rx-fifo-size = <16>; - tx-fifo-size = <16>; - }; - - // PSC4 serial port B aka ttyPSC1 - serial@11400 { - device_type = "serial"; - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - // Logical port assignment needed until driver - // learns to use aliases - port-number = <1>; - cell-index = <4>; - reg = <0x11400 0x100>; - interrupts = <40 0x8>; - interrupt-parent = < &ipic >; - rx-fifo-size = <16>; - tx-fifo-size = <16>; - }; - - // PSC5 in ac97 mode - ac97@11500 { - compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc"; - cell-index = <5>; - reg = <0x11500 0x100>; - interrupts = <40 0x8>; - interrupt-parent = < &ipic >; - fsl,mode = "ac97-slave"; - rx-fifo-size = <384>; - tx-fifo-size = <384>; - }; - - pscfifo@11f00 { - compatible = "fsl,mpc5121-psc-fifo"; - reg = <0x11f00 0x100>; - interrupts = <40 0x8>; - interrupt-parent = < &ipic >; - }; - - dma@14000 { - compatible = "fsl,mpc5121-dma"; - reg = <0x14000 0x1800>; - interrupts = <65 0x8>; - interrupt-parent = < &ipic >; - }; - - }; - - pci: pci@80008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - // IDSEL 0x15 - Slot 1 PCI - 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8 - 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8 - 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8 - 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8 - - // IDSEL 0x16 - Slot 2 MiniPCI - 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8 - 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8 - - // IDSEL 0x17 - Slot 3 MiniPCI - 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8 - 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8 - >; - interrupt-parent = < &ipic >; - interrupts = <1 0x8>; - bus-range = <0 0>; - ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x80008500 0x100 /* internal registers */ - 0x80008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc5121-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc5200b.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc5200b.dtsi deleted file mode 100644 index 7ab286ab..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc5200b.dtsi +++ /dev/null @@ -1,277 +0,0 @@ -/* - * base MPC5200b Device Tree Source - * - * Copyright (C) 2010 SecretLab - * Grant Likely <grant@secretlab.ca> - * John Bonesio <bones@secretlab.ca> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "fsl,mpc5200b"; - compatible = "fsl,mpc5200b"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&mpc5200_pic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - powerpc: PowerPC,5200@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory: memory { - device_type = "memory"; - reg = <0x00000000 0x04000000>; // 64MB - }; - - soc: soc5200@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc5200b-immr"; - ranges = <0 0xf0000000 0x0000c000>; - reg = <0xf0000000 0x00000100>; - bus-frequency = <0>; // from bootloader - system-frequency = <0>; // from bootloader - - cdm@200 { - compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; - reg = <0x200 0x38>; - }; - - mpc5200_pic: interrupt-controller@500 { - // 5200 interrupts are encoded into two levels; - interrupt-controller; - #interrupt-cells = <3>; - compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; - reg = <0x500 0x80>; - }; - - timer@600 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x600 0x10>; - interrupts = <1 9 0>; - }; - - timer@610 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x610 0x10>; - interrupts = <1 10 0>; - }; - - timer@620 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x620 0x10>; - interrupts = <1 11 0>; - }; - - timer@630 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x630 0x10>; - interrupts = <1 12 0>; - }; - - timer@640 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x640 0x10>; - interrupts = <1 13 0>; - }; - - timer@650 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x650 0x10>; - interrupts = <1 14 0>; - }; - - timer@660 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x660 0x10>; - interrupts = <1 15 0>; - }; - - timer@670 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x670 0x10>; - interrupts = <1 16 0>; - }; - - rtc@800 { // Real time clock - compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; - reg = <0x800 0x100>; - interrupts = <1 5 0 1 6 0>; - }; - - can@900 { - compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; - interrupts = <2 17 0>; - reg = <0x900 0x80>; - }; - - can@980 { - compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; - interrupts = <2 18 0>; - reg = <0x980 0x80>; - }; - - gpio_simple: gpio@b00 { - compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; - reg = <0xb00 0x40>; - interrupts = <1 7 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpio_wkup: gpio@c00 { - compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; - reg = <0xc00 0x40>; - interrupts = <1 8 0 0 3 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - spi@f00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; - reg = <0xf00 0x20>; - interrupts = <2 13 0 2 14 0>; - }; - - usb: usb@1000 { - compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; - reg = <0x1000 0xff>; - interrupts = <2 6 0>; - }; - - dma-controller@1200 { - compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; - reg = <0x1200 0x80>; - interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 - 3 4 0 3 5 0 3 6 0 3 7 0 - 3 8 0 3 9 0 3 10 0 3 11 0 - 3 12 0 3 13 0 3 14 0 3 15 0>; - }; - - xlb@1f00 { - compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; - reg = <0x1f00 0x100>; - }; - - psc1: psc@2000 { // PSC1 - compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; - reg = <0x2000 0x100>; - interrupts = <2 1 0>; - }; - - psc2: psc@2200 { // PSC2 - compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; - reg = <0x2200 0x100>; - interrupts = <2 2 0>; - }; - - psc3: psc@2400 { // PSC3 - compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; - reg = <0x2400 0x100>; - interrupts = <2 3 0>; - }; - - psc4: psc@2600 { // PSC4 - compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; - reg = <0x2600 0x100>; - interrupts = <2 11 0>; - }; - - psc5: psc@2800 { // PSC5 - compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; - reg = <0x2800 0x100>; - interrupts = <2 12 0>; - }; - - psc6: psc@2c00 { // PSC6 - compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; - reg = <0x2c00 0x100>; - interrupts = <2 4 0>; - }; - - eth0: ethernet@3000 { - compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; - reg = <0x3000 0x400>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <2 5 0>; - }; - - mdio@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; - reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts - interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. - }; - - ata@3a00 { - compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; - reg = <0x3a00 0x100>; - interrupts = <2 7 0>; - }; - - i2c@3d00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d00 0x40>; - interrupts = <2 15 0>; - }; - - i2c@3d40 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d40 0x40>; - interrupts = <2 16 0>; - }; - - sram@8000 { - compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - pci: pci@f0000d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; - reg = <0xf0000d00 0x100>; - // interrupt-map-mask = need to add - // interrupt-map = need to add - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - // ranges = need to add - }; - - localbus: localbus { - compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0xfc000000 0x2000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc7448hpc2.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc7448hpc2.dts deleted file mode 100644 index 2544f3ec..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc7448hpc2.dts +++ /dev/null @@ -1,197 +0,0 @@ -/* - * MPC7448HPC2 (Taiga) board Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * 2006 Roy Zang <Roy Zang at freescale.com>. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "mpc7448hpc2"; - compatible = "mpc74xx"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - - serial0 = &serial0; - serial1 = &serial1; - - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells =<0>; - - PowerPC,7448@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K bytes - i-cache-size = <0x8000>; // L1, 32K bytes - timebase-frequency = <0>; // 33 MHz, from uboot - clock-frequency = <0>; // From U-Boot - bus-frequency = <0>; // From U-Boot - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x20000000 // DDR2 512M at 0 - >; - }; - - tsi108@c0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "tsi-bridge"; - ranges = <0x0 0xc0000000 0x10000>; - reg = <0xc0000000 0x10000>; - bus-frequency = <0>; - - i2c@7000 { - interrupt-parent = <&mpic>; - interrupts = <14 0>; - reg = <0x7000 0x400>; - device_type = "i2c"; - compatible = "tsi108-i2c"; - }; - - MDIO: mdio@6000 { - device_type = "mdio"; - compatible = "tsi108-mdio"; - reg = <0x6000 0x50>; - #address-cells = <1>; - #size-cells = <0>; - - phy8: ethernet-phy@8 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x8>; - }; - - phy9: ethernet-phy@9 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x9>; - }; - - }; - - enet0: ethernet@6200 { - linux,network-index = <0>; - #size-cells = <0>; - device_type = "network"; - compatible = "tsi108-ethernet"; - reg = <0x6000 0x200>; - address = [ 00 06 D2 00 00 01 ]; - interrupts = <16 2>; - interrupt-parent = <&mpic>; - mdio-handle = <&MDIO>; - phy-handle = <&phy8>; - }; - - enet1: ethernet@6600 { - linux,network-index = <1>; - #address-cells = <1>; - #size-cells = <0>; - device_type = "network"; - compatible = "tsi108-ethernet"; - reg = <0x6400 0x200>; - address = [ 00 06 D2 00 00 02 ]; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - mdio-handle = <&MDIO>; - phy-handle = <&phy9>; - }; - - serial0: serial@7808 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x7808 0x200>; - clock-frequency = <1064000000>; - interrupts = <12 0>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@7c08 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x7c08 0x200>; - clock-frequency = <1064000000>; - interrupts = <13 0>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@7400 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x7400 0x400>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - pci0: pci@1000 { - compatible = "tsi108-pci"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x1000 0x1000>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000 - 0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>; - clock-frequency = <133333332>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 - 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 - 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 - 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 - - /* IDSEL 0x12 */ - 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 - 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 - 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 - 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 - - /* IDSEL 0x13 */ - 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 - 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 - 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 - 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 - - /* IDSEL 0x14 */ - 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 - 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 - 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 - 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 - >; - - RT0: router@1180 { - clock-frequency = <0>; - interrupt-controller; - device_type = "pic-router"; - #address-cells = <0>; - #interrupt-cells = <2>; - big-endian; - interrupts = <23 2>; - interrupt-parent = <&mpic>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8272ads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8272ads.dts deleted file mode 100644 index e802ebd8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8272ads.dts +++ /dev/null @@ -1,270 +0,0 @@ -/* - * MPC8272 ADS Device Tree Source - * - * Copyright 2005,2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8272ADS"; - compatible = "fsl,mpc8272ads"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = ð0; - ethernet1 = ð1; - serial0 = &scc1; - serial1 = &scc4; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8272@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; - }; - - localbus@f0010100 { - compatible = "fsl,mpc8272-localbus", - "fsl,pq2-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xf0010100 0x40>; - - ranges = <0x0 0x0 0xff800000 0x00800000 - 0x1 0x0 0xf4500000 0x8000 - 0x3 0x0 0xf8200000 0x8000>; - - flash@0,0 { - compatible = "jedec-flash"; - reg = <0x0 0x0 0x00800000>; - bank-width = <4>; - device-width = <1>; - }; - - board-control@1,0 { - reg = <0x1 0x0 0x20>; - compatible = "fsl,mpc8272ads-bcsr"; - }; - - PCI_PIC: interrupt-controller@3,0 { - compatible = "fsl,mpc8272ads-pci-pic", - "fsl,pq2ads-pci-pic"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x3 0x0 0x8>; - interrupt-parent = <&PIC>; - interrupts = <20 8>; - }; - }; - - - pci@f0010800 { - device_type = "pci"; - reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>; - compatible = "fsl,mpc8272-pci", "fsl,pq2-pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &PCI_PIC 0 - 0xb000 0x0 0x0 0x2 &PCI_PIC 1 - 0xb000 0x0 0x0 0x3 &PCI_PIC 2 - 0xb000 0x0 0x0 0x4 &PCI_PIC 3 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &PCI_PIC 4 - 0xb800 0x0 0x0 0x2 &PCI_PIC 5 - 0xb800 0x0 0x0 0x3 &PCI_PIC 6 - 0xb800 0x0 0x0 0x4 &PCI_PIC 7 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &PCI_PIC 8 - 0xc000 0x0 0x0 0x2 &PCI_PIC 9 - 0xc000 0x0 0x0 0x3 &PCI_PIC 10 - 0xc000 0x0 0x0 0x4 &PCI_PIC 11>; - - interrupt-parent = <&PIC>; - interrupts = <18 8>; - ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>; - }; - - soc@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8272", "fsl,pq2-soc"; - ranges = <0x0 0xf0000000 0x53000>; - - // Temporary -- will go away once kernel uses ranges for get_immrbase(). - reg = <0xf0000000 0x53000>; - - cpm@119c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; - reg = <0x119c0 0x30>; - ranges; - - muram@0 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9800 0x800>; - }; - }; - - brg@119f0 { - compatible = "fsl,mpc8272-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x119f0 0x10 0x115f0 0x10>; - }; - - scc1: serial@11a00 { - device_type = "serial"; - compatible = "fsl,mpc8272-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a00 0x20 0x8000 0x100>; - interrupts = <40 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - }; - - scc4: serial@11a60 { - device_type = "serial"; - compatible = "fsl,mpc8272-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a60 0x20 0x8300 0x100>; - interrupts = <43 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <4>; - fsl,cpm-command = <0xce00000>; - }; - - usb@11b60 { - compatible = "fsl,mpc8272-cpm-usb"; - reg = <0x11b60 0x40 0x8b00 0x100>; - interrupts = <11 8>; - interrupt-parent = <&PIC>; - mode = "peripheral"; - }; - - mdio@10d40 { - device_type = "mdio"; - compatible = "fsl,mpc8272ads-mdio-bitbang", - "fsl,mpc8272-mdio-bitbang", - "fsl,cpm2-mdio-bitbang"; - reg = <0x10d40 0x14>; - #address-cells = <1>; - #size-cells = <0>; - fsl,mdio-pin = <18>; - fsl,mdc-pin = <19>; - - PHY0: ethernet-phy@0 { - interrupt-parent = <&PIC>; - interrupts = <23 8>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - interrupt-parent = <&PIC>; - interrupts = <23 8>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - }; - - eth0: ethernet@11300 { - device_type = "network"; - compatible = "fsl,mpc8272-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - fsl,cpm-command = <0x12000300>; - }; - - eth1: ethernet@11320 { - device_type = "network"; - compatible = "fsl,mpc8272-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <33 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - fsl,cpm-command = <0x16200300>; - }; - - i2c@11860 { - compatible = "fsl,mpc8272-i2c", - "fsl,cpm2-i2c"; - reg = <0x11860 0x20 0x8afc 0x2>; - interrupts = <1 8>; - interrupt-parent = <&PIC>; - fsl,cpm-command = <0x29600000>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - PIC: interrupt-controller@10c00 { - #interrupt-cells = <2>; - interrupt-controller; - reg = <0x10c00 0x80>; - compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic"; - }; - - crypto@30000 { - compatible = "fsl,sec1.0"; - reg = <0x40000 0x13000>; - interrupts = <47 0x8>; - interrupt-parent = <&PIC>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x1010415>; - }; - }; - - chosen { - linux,stdout-path = "/soc/cpm/serial@11a00"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8308_p1m.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8308_p1m.dts deleted file mode 100644 index 22b0832b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8308_p1m.dts +++ /dev/null @@ -1,340 +0,0 @@ -/* - * mpc8308_p1m Device Tree Source - * - * Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "denx,mpc8308_p1m"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8308@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; // 128MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - ranges = <0x0 0x0 0xfc000000 0x04000000 - 0x1 0x0 0xfbff0000 0x00008000 - 0x2 0x0 0xfbff8000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x4000000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x60000>; - read-only; - }; - env@60000 { - reg = <0x60000 0x20000>; - }; - env1@80000 { - reg = <0x80000 0x20000>; - }; - kernel@a0000 { - reg = <0xa0000 0x200000>; - }; - dtb@2a0000 { - reg = <0x2a0000 0x20000>; - }; - ramdisk@2c0000 { - reg = <0x2c0000 0x640000>; - }; - user@700000 { - reg = <0x700000 0x3900000>; - }; - }; - - can@1,0 { - compatible = "nxp,sja1000"; - reg = <0x1 0x0 0x80>; - interrupts = <18 0x8>; - interrups-parent = <&ipic>; - }; - - cpld@2,0 { - compatible = "denx,mpc8308_p1m-cpld"; - reg = <0x2 0x0 0x8>; - interrupts = <48 0x8>; - interrups-parent = <&ipic>; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8308-immr", "simple-bus"; - ranges = <0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - fram@50 { - compatible = "ramtron,24c64"; - reg = <0x50>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - pwm@28 { - compatible = "maxim,ds1050"; - reg = <0x28>; - }; - sensor@48 { - compatible = "maxim,max6625"; - reg = <0x48>; - }; - sensor@49 { - compatible = "maxim,max6625"; - reg = <0x49>; - }; - sensor@4b { - compatible = "maxim,max6625"; - reg = <0x4b>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "peripheral"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x24000 0x1000>; - - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - phy-handle = < &phy1 >; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <19 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - phy-handle = < &phy2 >; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <133333333>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <133333333>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - gpio@c00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio"; - reg = <0xc00 0x18>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - timer@500 { - compatible = "fsl,mpc8308-gtm", "fsl,gtm"; - reg = <0x500 0x100>; - interrupts = <90 8 78 8 84 8 72 8>; - interrupt-parent = <&ipic>; - clock-frequency = <133333333>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - ipic-msi@7c0 { - compatible = "fsl,ipic-msi"; - reg = <0x7c0 0x40>; - msi-available-ranges = <0x0 0x100>; - interrupts = < 0x43 0x8 - 0x4 0x8 - 0x51 0x8 - 0x52 0x8 - 0x56 0x8 - 0x57 0x8 - 0x58 0x8 - 0x59 0x8 >; - interrupt-parent = < &ipic >; - }; - - dma@2c000 { - compatible = "fsl,mpc8308-dma", "fsl,mpc5121-dma"; - reg = <0x2c000 0x1800>; - interrupts = <3 0x8 - 94 0x8>; - interrupt-parent = < &ipic >; - }; - - }; - - pci0: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000 - 0xb0000000 0x01000000>; - ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; - bus-range = <0 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &ipic 1 8>; - interrupts = <0x1 0x8>; - interrupt-parent = <&ipic>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8308rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8308rdb.dts deleted file mode 100644 index f66d10d9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8308rdb.dts +++ /dev/null @@ -1,311 +0,0 @@ -/* - * MPC8308RDB Device Tree Source - * - * Copyright 2009 Freescale Semiconductor Inc. - * Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "fsl,mpc8308rdb"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8308@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; // 128MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // CS0 and CS1 are swapped when - // booting from nand, but the - // addresses are the same. - ranges = <0x0 0x0 0xfe000000 0x00800000 - 0x1 0x0 0xe0600000 0x00002000 - 0x2 0x0 0xf0000000 0x00020000 - 0x3 0x0 0xfa000000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x60000>; - read-only; - }; - env@60000 { - reg = <0x60000 0x10000>; - }; - env1@70000 { - reg = <0x70000 0x10000>; - }; - kernel@80000 { - reg = <0x80000 0x200000>; - }; - dtb@280000 { - reg = <0x280000 0x10000>; - }; - ramdisk@290000 { - reg = <0x290000 0x570000>; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8315-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x2000>; - - jffs2@0 { - reg = <0x0 0x2000000>; - }; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8308-immr", "simple-bus"; - ranges = <0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "peripheral"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x24000 0x1000>; - - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = < &tbi0 >; - phy-handle = < &phy2 >; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = < &tbi1 >; - /* Vitesse 7385 isn't on the MDIO bus */ - fixed-link = <1 1 1000 0 0>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <133333333>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <133333333>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - gpio@c00 { - #gpio-cells = <2>; - device_type = "gpio"; - compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio"; - reg = <0xc00 0x18>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - ipic-msi@7c0 { - compatible = "fsl,ipic-msi"; - reg = <0x7c0 0x40>; - msi-available-ranges = <0x0 0x100>; - interrupts = < 0x43 0x8 - 0x4 0x8 - 0x51 0x8 - 0x52 0x8 - 0x56 0x8 - 0x57 0x8 - 0x58 0x8 - 0x59 0x8 >; - interrupt-parent = < &ipic >; - }; - - dma@2c000 { - compatible = "fsl,mpc8308-dma", "fsl,mpc5121-dma"; - reg = <0x2c000 0x1800>; - interrupts = <3 0x8 - 94 0x8>; - interrupt-parent = < &ipic >; - }; - - }; - - pci0: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000 - 0xb0000000 0x01000000>; - ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; - bus-range = <0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - interrupts = <0x1 0x8>; - interrupt-parent = <&ipic>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8313erdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8313erdb.dts deleted file mode 100644 index 1c836c6c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8313erdb.dts +++ /dev/null @@ -1,410 +0,0 @@ -/* - * MPC8313E RDB Device Tree Source - * - * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8313ERDB"; - compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8313@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; // 128MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // CS0 and CS1 are swapped when - // booting from nand, but the - // addresses are the same. - ranges = <0x0 0x0 0xfe000000 0x00800000 - 0x1 0x0 0xe2800000 0x00008000 - 0x2 0x0 0xf0000000 0x00020000 - 0x3 0x0 0xfa000000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8313-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x2000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - soc8313@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x03000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec2.2", "fsl,sec2.1", - "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <1>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x4c>; - fsl,descriptor-types-mask = <0x0122003f>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "utmi_wide"; - sleep = <&pmc 0x00300000>; - }; - - ptp_clock@24E00 { - compatible = "fsl,etsec-ptp"; - reg = <0x24E00 0xB0>; - interrupts = <12 0x8 13 0x8>; - interrupt-parent = < &ipic >; - fsl,tclk-period = <10>; - fsl,tmr-prsc = <100>; - fsl,tmr-add = <0x999999A4>; - fsl,tmr-fiper1 = <0x3B9AC9F6>; - fsl,tmr-fiper2 = <0x00018696>; - fsl,max-adj = <659999998>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - sleep = <&pmc 0x20000000>; - ranges = <0x0 0x24000 0x1000>; - - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 0x8 36 0x8 35 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = < &tbi0 >; - /* Vitesse 7385 isn't on the MDIO bus */ - fixed-link = <1 1 1000 0 0>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - phy4: ethernet-phy@4 { - interrupt-parent = <&ipic>; - interrupts = <20 0x8>; - reg = <0x4>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <34 0x8 33 0x8 32 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = < &tbi1 >; - phy-handle = < &phy4 >; - sleep = <&pmc 0x10000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 8>; - interrupt-parent = <&ipic>; - fsl,mpc8313-wakeup-timer = <>m1>; - - /* Remove this (or change to "okay") if you have - * a REVA3 or later board, if you apply one of the - * workarounds listed in section 8.5 of the board - * manual, or if you are adapting this device tree - * to a different board. - */ - status = "fail"; - }; - - gtm1: timer@500 { - compatible = "fsl,mpc8313-gtm", "fsl,gtm"; - reg = <0x500 0x100>; - interrupts = <90 8 78 8 84 8 72 8>; - interrupt-parent = <&ipic>; - }; - - timer@600 { - compatible = "fsl,mpc8313-gtm", "fsl,gtm"; - reg = <0x600 0x100>; - interrupts = <91 8 79 8 85 8 73 8>; - interrupt-parent = <&ipic>; - }; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x00010000>; - ranges; - - pci0: pci@e0008500 { - cell-index = <1>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0E -mini PCI */ - 0x7000 0x0 0x0 0x1 &ipic 18 0x8 - 0x7000 0x0 0x0 0x2 &ipic 18 0x8 - 0x7000 0x0 0x0 0x3 &ipic 18 0x8 - 0x7000 0x0 0x0 0x4 &ipic 18 0x8 - - /* IDSEL 0x0F - PCI slot */ - 0x7800 0x0 0x0 0x1 &ipic 17 0x8 - 0x7800 0x0 0x0 0x2 &ipic 18 0x8 - 0x7800 0x0 0x0 0x3 &ipic 17 0x8 - 0x7800 0x0 0x0 0x4 &ipic 18 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8313-dma", "fsl,elo-dma"; - reg = <0xe00082a8 4>; - ranges = <0 0xe0008100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - - dma-channel@0 { - compatible = "fsl,mpc8313-dma-channel", - "fsl,elo-dma-channel"; - reg = <0 0x28>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - }; - - dma-channel@80 { - compatible = "fsl,mpc8313-dma-channel", - "fsl,elo-dma-channel"; - reg = <0x80 0x28>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <1>; - }; - - dma-channel@100 { - compatible = "fsl,mpc8313-dma-channel", - "fsl,elo-dma-channel"; - reg = <0x100 0x28>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <2>; - }; - - dma-channel@180 { - compatible = "fsl,mpc8313-dma-channel", - "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <3>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8315erdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8315erdb.dts deleted file mode 100644 index 811848e9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8315erdb.dts +++ /dev/null @@ -1,480 +0,0 @@ -/* - * MPC8315E RDB Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "fsl,mpc8315erdb"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8315@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; // 128MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // CS0 and CS1 are swapped when - // booting from nand, but the - // addresses are the same. - ranges = <0x0 0x0 0xfe000000 0x00800000 - 0x1 0x0 0xe0600000 0x00002000 - 0x2 0x0 0xf0000000 0x00020000 - 0x3 0x0 0xfa000000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8315-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x2000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8315-immr", "simple-bus"; - ranges = <0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - - mcu_pio: mcu@a { - #gpio-cells = <2>; - compatible = "fsl,mc9s08qg8-mpc8315erdb", - "fsl,mcu-mpc8349emitx"; - reg = <0x0a>; - gpio-controller; - }; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8315-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "utmi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = < &phy0 >; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&ipic>; - interrupts = <20 0x8>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <19 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = < &phy1 >; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <133333333>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <133333333>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0", - "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", - "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x97c>; - fsl,descriptor-types-mask = <0x3a30abf>; - }; - - sata@18000 { - compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - cell-index = <1>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - }; - - sata@19000 { - compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - cell-index = <2>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - }; - - gtm1: timer@500 { - compatible = "fsl,mpc8315-gtm", "fsl,gtm"; - reg = <0x500 0x100>; - interrupts = <90 8 78 8 84 8 72 8>; - interrupt-parent = <&ipic>; - clock-frequency = <133333333>; - }; - - timer@600 { - compatible = "fsl,mpc8315-gtm", "fsl,gtm"; - reg = <0x600 0x100>; - interrupts = <91 8 79 8 85 8 73 8>; - interrupt-parent = <&ipic>; - clock-frequency = <133333333>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - ipic-msi@7c0 { - compatible = "fsl,ipic-msi"; - reg = <0x7c0 0x40>; - msi-available-ranges = <0 0x100>; - interrupts = <0x43 0x8 - 0x4 0x8 - 0x51 0x8 - 0x52 0x8 - 0x56 0x8 - 0x57 0x8 - 0x58 0x8 - 0x59 0x8>; - interrupt-parent = < &ipic >; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc", - "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 8>; - interrupt-parent = <&ipic>; - fsl,mpc8313-wakeup-timer = <>m1>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0E -mini PCI */ - 0x7000 0x0 0x0 0x1 &ipic 18 0x8 - 0x7000 0x0 0x0 0x2 &ipic 18 0x8 - 0x7000 0x0 0x0 0x3 &ipic 18 0x8 - 0x7000 0x0 0x0 0x4 &ipic 18 0x8 - - /* IDSEL 0x0F -mini PCI */ - 0x7800 0x0 0x0 0x1 &ipic 17 0x8 - 0x7800 0x0 0x0 0x2 &ipic 17 0x8 - 0x7800 0x0 0x0 0x3 &ipic 17 0x8 - 0x7800 0x0 0x0 0x4 &ipic 17 0x8 - - /* IDSEL 0x10 - PCI slot */ - 0x8000 0x0 0x0 0x1 &ipic 48 0x8 - 0x8000 0x0 0x0 0x2 &ipic 17 0x8 - 0x8000 0x0 0x0 0x3 &ipic 48 0x8 - 0x8000 0x0 0x0 0x4 &ipic 17 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x01000000 0 0x00000000 0xe0300000 0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc0000000 - 0x02000000 0 0xc0000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - leds { - compatible = "gpio-leds"; - - pwr { - gpios = <&mcu_pio 0 0>; - default-state = "on"; - }; - - hdd { - gpios = <&mcu_pio 1 0>; - linux,default-trigger = "ide-disk"; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc832x_mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc832x_mds.dts deleted file mode 100644 index da9c72dd..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc832x_mds.dts +++ /dev/null @@ -1,441 +0,0 @@ -/* - * MPC8323E EMDS Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - - * To enable external serial I/O on a Freescale MPC 8323 SYS/MDS board, do - * this: - * - * 1) On chip U61, lift (disconnect) pins 21 (TXD) and 22 (RXD) from the board. - * 2) Solder a wire from U61-21 to P19A-23. P19 is a grid of pins on the board - * next to the serial ports. - * 3) Solder a wire from U61-22 to P19K-22. - * - * Note that there's a typo in the schematic. The board labels the last column - * of pins "P19K", but in the schematic, that column is called "P19J". So if - * you're going by the schematic, the pin is called "P19J-K22". - */ - -/dts-v1/; - -/ { - model = "MPC8323EMDS"; - compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8323@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <16384>; // L1, 16K - i-cache-size = <16384>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; - }; - - bcsr@f8000000 { - compatible = "fsl,mpc8323mds-bcsr"; - reg = <0xf8000000 0x8000>; - }; - - soc8323@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <132000000>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8323-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <1>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x4c>; - fsl,descriptor-types-mask = <0x0122003f>; - sleep = <&pmc 0x03000000>; - }; - - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - par_io@1400 { - reg = <0x1400 0x100>; - device_type = "par_io"; - num-ports = <7>; - - pio3: ucc_pin@03 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 3 4 3 0 2 0 /* MDIO */ - 3 5 1 0 2 0 /* MDC */ - 0 13 2 0 1 0 /* RX_CLK (CLK9) */ - 3 24 2 0 1 0 /* TX_CLK (CLK10) */ - 1 0 1 0 1 0 /* TxD0 */ - 1 1 1 0 1 0 /* TxD1 */ - 1 2 1 0 1 0 /* TxD2 */ - 1 3 1 0 1 0 /* TxD3 */ - 1 4 2 0 1 0 /* RxD0 */ - 1 5 2 0 1 0 /* RxD1 */ - 1 6 2 0 1 0 /* RxD2 */ - 1 7 2 0 1 0 /* RxD3 */ - 1 8 2 0 1 0 /* RX_ER */ - 1 9 1 0 1 0 /* TX_ER */ - 1 10 2 0 1 0 /* RX_DV */ - 1 11 2 0 1 0 /* COL */ - 1 12 1 0 1 0 /* TX_EN */ - 1 13 2 0 1 0>; /* CRS */ - }; - pio4: ucc_pin@04 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 3 31 2 0 1 0 /* RX_CLK (CLK7) */ - 3 6 2 0 1 0 /* TX_CLK (CLK8) */ - 1 18 1 0 1 0 /* TxD0 */ - 1 19 1 0 1 0 /* TxD1 */ - 1 20 1 0 1 0 /* TxD2 */ - 1 21 1 0 1 0 /* TxD3 */ - 1 22 2 0 1 0 /* RxD0 */ - 1 23 2 0 1 0 /* RxD1 */ - 1 24 2 0 1 0 /* RxD2 */ - 1 25 2 0 1 0 /* RxD3 */ - 1 26 2 0 1 0 /* RX_ER */ - 1 27 1 0 1 0 /* TX_ER */ - 1 28 2 0 1 0 /* RX_DV */ - 1 29 2 0 1 0 /* COL */ - 1 30 1 0 1 0 /* TX_EN */ - 1 31 2 0 1 0>; /* CRS */ - }; - pio5: ucc_pin@05 { - pio-map = < - /* - * open has - * port pin dir drain sel irq - */ - 2 0 1 0 2 0 /* TxD5 */ - 2 8 2 0 2 0 /* RxD5 */ - - 2 29 2 0 0 0 /* CTS5 */ - 2 31 1 0 2 0 /* RTS5 */ - - 2 24 2 0 0 0 /* CD */ - - >; - }; - - }; - }; - - qe@e0100000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - ranges = <0x0 0xe0100000 0x00100000>; - reg = <0xe0100000 0x480>; - brg-frequency = <0>; - bus-frequency = <198000000>; - fsl,qe-num-riscs = <1>; - fsl,qe-num-snums = <28>; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x00010000 0x00004000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0x4000>; - }; - }; - - spi@4c0 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x4c0 0x40>; - interrupts = <2>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - spi@500 { - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - usb@6c0 { - compatible = "qe_udc"; - reg = <0x6c0 0x40 0x8b00 0x100>; - interrupts = <11>; - interrupt-parent = <&qeic>; - mode = "slave"; - }; - - enet0: ucc@2200 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <3>; - reg = <0x2200 0x200>; - interrupts = <34>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "clk9"; - tx-clock-name = "clk10"; - phy-handle = <&phy3>; - pio-handle = <&pio3>; - }; - - enet1: ucc@3200 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <4>; - reg = <0x3200 0x200>; - interrupts = <35>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "clk7"; - tx-clock-name = "clk8"; - phy-handle = <&phy4>; - pio-handle = <&pio4>; - }; - - ucc@2400 { - device_type = "serial"; - compatible = "ucc_uart"; - cell-index = <5>; /* The UCC number, 1-7*/ - port-number = <0>; /* Which ttyQEx device */ - soft-uart; /* We need Soft-UART */ - reg = <0x2400 0x200>; - interrupts = <40>; /* From Table 18-12 */ - interrupt-parent = < &qeic >; - /* - * For Soft-UART, we need to set TX to 1X, which - * means specifying separate clock sources. - */ - rx-clock-name = "brg5"; - tx-clock-name = "brg6"; - pio-handle = < &pio5 >; - }; - - - mdio@2320 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2320 0x18>; - compatible = "fsl,ucc-mdio"; - - phy3: ethernet-phy@03 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - phy4: ethernet-phy@04 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x4>; - device_type = "ethernet-phy"; - }; - }; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - big-endian; - interrupts = <32 0x8 33 0x8>; //high:32 low:33 - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x11 AD17 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 AD18 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 AD19 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 AD21*/ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 AD22*/ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 AD23*/ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 AD24*/ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xd0000000 0x0 0x00100000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - sleep = <&pmc 0x00010000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc832x_rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc832x_rdb.dts deleted file mode 100644 index ff7b15b3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc832x_rdb.dts +++ /dev/null @@ -1,373 +0,0 @@ -/* - * MPC832x RDB Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8323ERDB"; - compatible = "MPC8323ERDB", "MPC832xRDB", "MPC83xxRDB"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet1; - ethernet1 = &enet0; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8323@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <0x20>; // 32 bytes - i-cache-line-size = <0x20>; // 32 bytes - d-cache-size = <16384>; // L1, 16K - i-cache-size = <16384>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x04000000>; - }; - - soc8323@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8323-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <1>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x4c>; - fsl,descriptor-types-mask = <0x0122003f>; - sleep = <&pmc 0x03000000>; - }; - - ipic:pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - par_io@1400 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0x1400 0x100>; - ranges = <3 0x1448 0x18>; - compatible = "fsl,mpc8323-qe-pario"; - device_type = "par_io"; - num-ports = <7>; - - qe_pio_d: gpio-controller@1448 { - #gpio-cells = <2>; - compatible = "fsl,mpc8323-qe-pario-bank"; - reg = <3 0x18>; - gpio-controller; - }; - - ucc2pio:ucc_pin@02 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 3 4 3 0 2 0 /* MDIO */ - 3 5 1 0 2 0 /* MDC */ - 3 21 2 0 1 0 /* RX_CLK (CLK16) */ - 3 23 2 0 1 0 /* TX_CLK (CLK3) */ - 0 18 1 0 1 0 /* TxD0 */ - 0 19 1 0 1 0 /* TxD1 */ - 0 20 1 0 1 0 /* TxD2 */ - 0 21 1 0 1 0 /* TxD3 */ - 0 22 2 0 1 0 /* RxD0 */ - 0 23 2 0 1 0 /* RxD1 */ - 0 24 2 0 1 0 /* RxD2 */ - 0 25 2 0 1 0 /* RxD3 */ - 0 26 2 0 1 0 /* RX_ER */ - 0 27 1 0 1 0 /* TX_ER */ - 0 28 2 0 1 0 /* RX_DV */ - 0 29 2 0 1 0 /* COL */ - 0 30 1 0 1 0 /* TX_EN */ - 0 31 2 0 1 0>; /* CRS */ - }; - ucc3pio:ucc_pin@03 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 13 2 0 1 0 /* RX_CLK (CLK9) */ - 3 24 2 0 1 0 /* TX_CLK (CLK10) */ - 1 0 1 0 1 0 /* TxD0 */ - 1 1 1 0 1 0 /* TxD1 */ - 1 2 1 0 1 0 /* TxD2 */ - 1 3 1 0 1 0 /* TxD3 */ - 1 4 2 0 1 0 /* RxD0 */ - 1 5 2 0 1 0 /* RxD1 */ - 1 6 2 0 1 0 /* RxD2 */ - 1 7 2 0 1 0 /* RxD3 */ - 1 8 2 0 1 0 /* RX_ER */ - 1 9 1 0 1 0 /* TX_ER */ - 1 10 2 0 1 0 /* RX_DV */ - 1 11 2 0 1 0 /* COL */ - 1 12 1 0 1 0 /* TX_EN */ - 1 13 2 0 1 0>; /* CRS */ - }; - }; - }; - - qe@e0100000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - ranges = <0x0 0xe0100000 0x00100000>; - reg = <0xe0100000 0x480>; - brg-frequency = <0>; - bus-frequency = <198000000>; - fsl,qe-num-riscs = <1>; - fsl,qe-num-snums = <28>; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x00010000 0x00004000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0x4000>; - }; - }; - - spi@4c0 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x4c0 0x40>; - interrupts = <2>; - interrupt-parent = <&qeic>; - gpios = <&qe_pio_d 13 0>; - mode = "cpu-qe"; - - mmc-slot@0 { - compatible = "fsl,mpc8323rdb-mmc-slot", - "mmc-spi-slot"; - reg = <0>; - gpios = <&qe_pio_d 14 1 - &qe_pio_d 15 0>; - voltage-ranges = <3300 3300>; - spi-max-frequency = <50000000>; - }; - }; - - spi@500 { - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - enet0: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "clk16"; - tx-clock-name = "clk3"; - phy-handle = <&phy00>; - pio-handle = <&ucc2pio>; - }; - - enet1: ucc@2200 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <3>; - reg = <0x2200 0x200>; - interrupts = <34>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "clk9"; - tx-clock-name = "clk10"; - phy-handle = <&phy04>; - pio-handle = <&ucc3pio>; - }; - - mdio@3120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3120 0x18>; - compatible = "fsl,ucc-mdio"; - - phy00:ethernet-phy@00 { - interrupt-parent = <&ipic>; - interrupts = <0>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy04:ethernet-phy@04 { - interrupt-parent = <&ipic>; - interrupts = <0>; - reg = <0x4>; - device_type = "ethernet-phy"; - }; - }; - - qeic:interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - big-endian; - interrupts = <32 0x8 33 0x8>; //high:32 low:33 - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x10 AD16 (USB) */ - 0x8000 0x0 0x0 0x1 &ipic 17 0x8 - - /* IDSEL 0x11 AD17 (Mini1)*/ - 0x8800 0x0 0x0 0x1 &ipic 18 0x8 - 0x8800 0x0 0x0 0x2 &ipic 19 0x8 - 0x8800 0x0 0x0 0x3 &ipic 20 0x8 - 0x8800 0x0 0x0 0x4 &ipic 48 0x8 - - /* IDSEL 0x12 AD18 (PCI/Mini2) */ - 0x9000 0x0 0x0 0x1 &ipic 19 0x8 - 0x9000 0x0 0x0 0x2 &ipic 20 0x8 - 0x9000 0x0 0x0 0x3 &ipic 48 0x8 - 0x9000 0x0 0x0 0x4 &ipic 17 0x8>; - - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x01000000 0x0 0xd0000000 0xd0000000 0x0 0x04000000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - sleep = <&pmc 0x00010000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8349emitx.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8349emitx.dts deleted file mode 100644 index 2608679d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8349emitx.dts +++ /dev/null @@ -1,426 +0,0 @@ -/* - * MPC8349E-mITX Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8349EMITX"; - compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8349@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc8349@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; // from bootloader - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - gpio1: gpio-controller@c00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8349-gpio"; - reg = <0xc00 0x100>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - gpio2: gpio-controller@d00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8349-gpio"; - reg = <0xd00 0x100>; - interrupts = <75 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - eeprom: at24@50 { - compatible = "st-micro,24c256"; - reg = <0x50>; - }; - - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - interrupts = <18 0x8>; - interrupt-parent = <&ipic>; - }; - - pcf1: iexp@38 { - #gpio-cells = <2>; - compatible = "ti,pcf8574a"; - reg = <0x38>; - gpio-controller; - }; - - pcf2: iexp@39 { - #gpio-cells = <2>; - compatible = "ti,pcf8574a"; - reg = <0x39>; - gpio-controller; - }; - - spd: at24@51 { - compatible = "at24,spd"; - reg = <0x51>; - }; - - mcu_pio: mcu@a { - #gpio-cells = <2>; - compatible = "fsl,mc9s08qg8-mpc8349emitx", - "fsl,mcu-mpc8349emitx"; - reg = <0x0a>; - gpio-controller; - }; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@22000 { - compatible = "fsl-usb2-mph"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <39 0x8>; - phy_type = "ulpi"; - port0; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "peripheral"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy1c>; - linux,network-index = <0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - /* Vitesse 8201 */ - phy1c: ethernet-phy@1c { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x1c>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - /* Vitesse 7385 isn't on the MDIO bus */ - fixed-link = <1 1 1000 0 0>; - linux,network-index = <1>; - tbi-handle = <&tbi1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; // from bootloader - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; // from bootloader - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - gpio-leds { - compatible = "gpio-leds"; - - green { - label = "Green"; - gpios = <&pcf1 0 1>; - linux,default-trigger = "heartbeat"; - }; - - yellow { - label = "Yellow"; - gpios = <&pcf1 1 1>; - /* linux,default-trigger = "heartbeat"; */ - default-state = "on"; - }; - }; - - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x10 - SATA */ - 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */ - >; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pci@e0008600 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0E - MiniPCI Slot */ - 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */ - - /* IDSEL 0x0F - PCI Slot */ - 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */ - 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */ - >; - interrupt-parent = <&ipic>; - interrupts = <67 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008600 0x100 /* internal registers */ - 0xe0008380 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8349e-localbus", - "fsl,pq2pro-localbus", - "simple-bus"; - reg = <0xe0005000 0xd8>; - ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */ - 0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */ - 0x2 0x0 0xf9000000 0x200000 /* exp slot */ - 0x3 0x0 0xf0000000 0x210>; /* CF slot */ - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - flash@0,800000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x800000 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - pata@3,0 { - compatible = "fsl,mpc8349emitx-pata", "ata-generic"; - reg = <0x3 0x0 0x10 0x3 0x20c 0x4>; - reg-shift = <1>; - pio-mode = <6>; - interrupts = <23 0x8>; - interrupt-parent = <&ipic>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8349emitxgp.dts deleted file mode 100644 index 6cd044d8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8349emitxgp.dts +++ /dev/null @@ -1,251 +0,0 @@ -/* - * MPC8349E-mITX-GP Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8349EMITXGP"; - compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8349@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc8349@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; // from bootloader - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - interrupts = <18 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "otg"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy1c>; - linux,network-index = <0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - /* Vitesse 8201 */ - phy1c: ethernet-phy@1c { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x1c>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; // from bootloader - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; // from bootloader - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - }; - - pci0: pci@e0008600 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0F - PCI Slot */ - 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */ - 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */ - >; - interrupt-parent = <&ipic>; - interrupts = <67 0x8>; - bus-range = <0x1 0x1>; - ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008600 0x100 /* internal registers */ - 0xe0008380 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc834x_mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc834x_mds.dts deleted file mode 100644 index 45528640..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc834x_mds.dts +++ /dev/null @@ -1,409 +0,0 @@ -/* - * MPC8349E MDS Device Tree Source - * - * Copyright 2005, 2006 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8349EMDS"; - compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8349@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - bcsr@e2400000 { - compatible = "fsl,mpc8349mds-bcsr"; - reg = <0xe2400000 0x8000>; - }; - - soc8349@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - /* phy type (ULPI or SERIAL) are only types supported for MPH */ - /* port = 0 or 1 */ - usb@22000 { - compatible = "fsl-usb2-mph"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <39 0x8>; - phy_type = "ulpi"; - port0; - }; - /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "otg"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - linux,network-index = <0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - linux,network-index = <1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pci@e0008600 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <67 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 - 0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008600 0x100 /* internal registers */ - 0xe0008380 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc836x_mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc836x_mds.dts deleted file mode 100644 index 81dd513d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc836x_mds.dts +++ /dev/null @@ -1,487 +0,0 @@ -/* - * MPC8360E EMDS Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - - -/* -/memreserve/ 00000000 1000000; -*/ - -/dts-v1/; - -/ { - model = "MPC8360MDS"; - compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8360@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <66000000>; - bus-frequency = <264000000>; - clock-frequency = <528000000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", - "simple-bus"; - reg = <0xe0005000 0xd8>; - ranges = <0 0 0xfe000000 0x02000000 - 1 0 0xf8000000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x2000000>; - bank-width = <2>; - device-width = <1>; - }; - - bcsr@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360mds-bcsr"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - - bcsr13: gpio-controller@d { - #gpio-cells = <2>; - compatible = "fsl,mpc8360mds-bcsr-gpio"; - reg = <0xd 1>; - gpio-controller; - }; - }; - }; - - soc8360@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <264000000>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <264000000>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <264000000>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - sleep = <&pmc 0x03000000>; - }; - - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - par_io@1400 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0x1400 0x100>; - ranges = <0 0x1400 0x100>; - device_type = "par_io"; - num-ports = <7>; - - qe_pio_b: gpio-controller@18 { - #gpio-cells = <2>; - compatible = "fsl,mpc8360-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0x18 0x18>; - gpio-controller; - }; - - pio1: ucc_pin@01 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 3 1 0 1 0 /* TxD0 */ - 0 4 1 0 1 0 /* TxD1 */ - 0 5 1 0 1 0 /* TxD2 */ - 0 6 1 0 1 0 /* TxD3 */ - 1 6 1 0 3 0 /* TxD4 */ - 1 7 1 0 1 0 /* TxD5 */ - 1 9 1 0 2 0 /* TxD6 */ - 1 10 1 0 2 0 /* TxD7 */ - 0 9 2 0 1 0 /* RxD0 */ - 0 10 2 0 1 0 /* RxD1 */ - 0 11 2 0 1 0 /* RxD2 */ - 0 12 2 0 1 0 /* RxD3 */ - 0 13 2 0 1 0 /* RxD4 */ - 1 1 2 0 2 0 /* RxD5 */ - 1 0 2 0 2 0 /* RxD6 */ - 1 4 2 0 2 0 /* RxD7 */ - 0 7 1 0 1 0 /* TX_EN */ - 0 8 1 0 1 0 /* TX_ER */ - 0 15 2 0 1 0 /* RX_DV */ - 0 16 2 0 1 0 /* RX_ER */ - 0 0 2 0 1 0 /* RX_CLK */ - 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ - 2 8 2 0 1 0>; /* GTX125 - CLK9 */ - }; - pio2: ucc_pin@02 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 17 1 0 1 0 /* TxD0 */ - 0 18 1 0 1 0 /* TxD1 */ - 0 19 1 0 1 0 /* TxD2 */ - 0 20 1 0 1 0 /* TxD3 */ - 1 2 1 0 1 0 /* TxD4 */ - 1 3 1 0 2 0 /* TxD5 */ - 1 5 1 0 3 0 /* TxD6 */ - 1 8 1 0 3 0 /* TxD7 */ - 0 23 2 0 1 0 /* RxD0 */ - 0 24 2 0 1 0 /* RxD1 */ - 0 25 2 0 1 0 /* RxD2 */ - 0 26 2 0 1 0 /* RxD3 */ - 0 27 2 0 1 0 /* RxD4 */ - 1 12 2 0 2 0 /* RxD5 */ - 1 13 2 0 3 0 /* RxD6 */ - 1 11 2 0 2 0 /* RxD7 */ - 0 21 1 0 1 0 /* TX_EN */ - 0 22 1 0 1 0 /* TX_ER */ - 0 29 2 0 1 0 /* RX_DV */ - 0 30 2 0 1 0 /* RX_ER */ - 0 31 2 0 1 0 /* RX_CLK */ - 2 2 1 0 2 0 /* GTX_CLK - CLK10 */ - 2 3 2 0 1 0 /* GTX125 - CLK4 */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0>; /* MDC */ - }; - - }; - }; - - qe@e0100000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - ranges = <0x0 0xe0100000 0x00100000>; - reg = <0xe0100000 0x480>; - brg-frequency = <0>; - bus-frequency = <396000000>; - fsl,qe-num-riscs = <2>; - fsl,qe-num-snums = <28>; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x00010000 0x0000c000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0xc000>; - }; - }; - - timer@440 { - compatible = "fsl,mpc8360-qe-gtm", - "fsl,qe-gtm", "fsl,gtm"; - reg = <0x440 0x40>; - clock-frequency = <132000000>; - interrupts = <12 13 14 15>; - interrupt-parent = <&qeic>; - }; - - spi@4c0 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x4c0 0x40>; - interrupts = <2>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - spi@500 { - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - usb@6c0 { - compatible = "fsl,mpc8360-qe-usb", - "fsl,mpc8323-qe-usb"; - reg = <0x6c0 0x40 0x8b00 0x100>; - interrupts = <11>; - interrupt-parent = <&qeic>; - fsl,fullspeed-clock = "clk21"; - fsl,lowspeed-clock = "brg9"; - gpios = <&qe_pio_b 2 0 /* USBOE */ - &qe_pio_b 3 0 /* USBTP */ - &qe_pio_b 8 0 /* USBTN */ - &qe_pio_b 9 0 /* USBRP */ - &qe_pio_b 11 0 /* USBRN */ - &bcsr13 5 0 /* SPEED */ - &bcsr13 4 1>; /* POWER */ - }; - - enet0: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk9"; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - pio-handle = <&pio1>; - }; - - enet1: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk4"; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - pio-handle = <&pio2>; - }; - - mdio@2120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2120 0x18>; - compatible = "fsl,ucc-mdio"; - - phy0: ethernet-phy@00 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@01 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - tbi-phy@2 { - device_type = "tbi-phy"; - reg = <0x2>; - }; - }; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - big-endian; - interrupts = <32 0x8 33 0x8>; // high:32 low:33 - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 AD17 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 AD18 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 AD19 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 AD21*/ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 AD22*/ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 AD23*/ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 AD24*/ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - sleep = <&pmc 0x00010000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc836x_rdk.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc836x_rdk.dts deleted file mode 100644 index b6e9aec1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc836x_rdk.dts +++ /dev/null @@ -1,471 +0,0 @@ -/* - * MPC8360E RDK Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * Copyright 2007-2008 MontaVista Software, Inc. - * - * Author: Anton Vorontsov <avorontsov@ru.mvista.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360rdk"; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8360@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - /* filled by u-boot */ - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - /* filled by u-boot */ - reg = <0 0>; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8360-immr", "fsl,immr", "fsl,soc", - "simple-bus"; - ranges = <0 0xe0000000 0x200000>; - reg = <0xe0000000 0x200>; - /* filled by u-boot */ - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <16 8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - serial0: serial@4500 { - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - interrupts = <9 8>; - interrupt-parent = <&ipic>; - /* filled by u-boot */ - clock-frequency = <0>; - }; - - serial1: serial@4600 { - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - interrupts = <10 8>; - interrupt-parent = <&ipic>; - /* filled by u-boot */ - clock-frequency = <0>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - sleep = <&pmc 0x03000000>; - }; - - ipic: interrupt-controller@700 { - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "fsl,pq2pro-pic", "fsl,ipic"; - interrupt-controller; - reg = <0x700 0x100>; - }; - - qe_pio_b: gpio-controller@1418 { - #gpio-cells = <2>; - compatible = "fsl,mpc8360-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0x1418 0x18>; - gpio-controller; - }; - - qe_pio_e: gpio-controller@1460 { - #gpio-cells = <2>; - compatible = "fsl,mpc8360-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0x1460 0x18>; - gpio-controller; - }; - - qe@100000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe", "simple-bus"; - ranges = <0 0x100000 0x100000>; - reg = <0x100000 0x480>; - /* filled by u-boot */ - clock-frequency = <0>; - bus-frequency = <0>; - brg-frequency = <0>; - fsl,qe-num-riscs = <2>; - fsl,qe-num-snums = <28>; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0 0x10000 0xc000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0 0xc000>; - }; - }; - - timer@440 { - compatible = "fsl,mpc8360-qe-gtm", - "fsl,qe-gtm", "fsl,gtm"; - reg = <0x440 0x40>; - interrupts = <12 13 14 15>; - interrupt-parent = <&qeic>; - clock-frequency = <166666666>; - }; - - usb@6c0 { - compatible = "fsl,mpc8360-qe-usb", - "fsl,mpc8323-qe-usb"; - reg = <0x6c0 0x40 0x8b00 0x100>; - interrupts = <11>; - interrupt-parent = <&qeic>; - fsl,fullspeed-clock = "clk21"; - gpios = <&qe_pio_b 2 0 /* USBOE */ - &qe_pio_b 3 0 /* USBTP */ - &qe_pio_b 8 0 /* USBTN */ - &qe_pio_b 9 0 /* USBRP */ - &qe_pio_b 11 0 /* USBRN */ - &qe_pio_e 20 0 /* SPEED */ - &qe_pio_e 21 1 /* POWER */>; - }; - - spi@4c0 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x4c0 0x40>; - interrupts = <2>; - interrupt-parent = <&qeic>; - mode = "cpu-qe"; - }; - - spi@500 { - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - mode = "cpu-qe"; - }; - - enet0: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - rx-clock-name = "none"; - tx-clock-name = "clk9"; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-rxid"; - /* filled by u-boot */ - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - - enet1: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - rx-clock-name = "none"; - tx-clock-name = "clk4"; - phy-handle = <&phy4>; - phy-connection-type = "rgmii-rxid"; - /* filled by u-boot */ - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - - enet2: ucc@2600 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <7>; - reg = <0x2600 0x200>; - interrupts = <42>; - interrupt-parent = <&qeic>; - rx-clock-name = "clk20"; - tx-clock-name = "clk19"; - phy-handle = <&phy1>; - phy-connection-type = "mii"; - /* filled by u-boot */ - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - - enet3: ucc@3200 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <4>; - reg = <0x3200 0x200>; - interrupts = <35>; - interrupt-parent = <&qeic>; - rx-clock-name = "clk8"; - tx-clock-name = "clk7"; - phy-handle = <&phy3>; - phy-connection-type = "mii"; - /* filled by u-boot */ - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - - mdio@2120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,ucc-mdio"; - reg = <0x2120 0x18>; - - phy1: ethernet-phy@1 { - device_type = "ethernet-phy"; - compatible = "national,DP83848VV"; - reg = <1>; - }; - - phy2: ethernet-phy@2 { - device_type = "ethernet-phy"; - compatible = "broadcom,BCM5481UA2KMLG"; - reg = <2>; - }; - - phy3: ethernet-phy@3 { - device_type = "ethernet-phy"; - compatible = "national,DP83848VV"; - reg = <3>; - }; - - phy4: ethernet-phy@4 { - device_type = "ethernet-phy"; - compatible = "broadcom,BCM5481UA2KMLG"; - reg = <4>; - }; - }; - - serial2: ucc@2400 { - device_type = "serial"; - compatible = "ucc_uart"; - reg = <0x2400 0x200>; - cell-index = <5>; - port-number = <0>; - rx-clock-name = "brg7"; - tx-clock-name = "brg8"; - interrupts = <40>; - interrupt-parent = <&qeic>; - soft-uart; - }; - - serial3: ucc@3400 { - device_type = "serial"; - compatible = "ucc_uart"; - reg = <0x3400 0x200>; - cell-index = <6>; - port-number = <1>; - rx-clock-name = "brg13"; - tx-clock-name = "brg14"; - interrupts = <41>; - interrupt-parent = <&qeic>; - soft-uart; - }; - - qeic: interrupt-controller@80 { - #address-cells = <0>; - #interrupt-cells = <1>; - compatible = "fsl,qe-ic"; - interrupt-controller; - reg = <0x80 0x80>; - big-endian; - interrupts = <32 8 33 8>; - interrupt-parent = <&ipic>; - }; - }; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", - "simple-bus"; - reg = <0xe0005000 0xd8>; - ranges = <0 0 0xff800000 0x0800000 - 1 0 0x60000000 0x0001000 - 2 0 0x70000000 0x4000000>; - - flash@0,0 { - compatible = "intel,PC28F640P30T85", "cfi-flash"; - reg = <0 0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - upm@1,0 { - compatible = "fsl,upm-nand"; - reg = <1 0 1>; - fsl,upm-addr-offset = <16>; - fsl,upm-cmd-offset = <8>; - gpios = <&qe_pio_e 18 0>; - - flash { - compatible = "stm,nand512-a"; - }; - }; - - display@2,0 { - device_type = "display"; - compatible = "fujitsu,MB86277", "fujitsu,mint"; - reg = <2 0 0x4000000>; - fujitsu,sh3; - little-endian; - /* filled by u-boot */ - address = <0>; - depth = <0>; - width = <0>; - height = <0>; - linebytes = <0>; - /* linux,opened; - added by uboot */ - }; - }; - - pci0: pci@e0008500 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci"; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>; - interrupts = <66 8>; - interrupt-parent = <&ipic>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = </* miniPCI0 IDSEL 0x14 AD20 */ - 0xa000 0 0 1 &ipic 18 8 - 0xa000 0 0 2 &ipic 19 8 - - /* PCI1 IDSEL 0x15 AD21 */ - 0xa800 0 0 1 &ipic 19 8 - 0xa800 0 0 2 &ipic 20 8 - 0xa800 0 0 3 &ipic 21 8 - 0xa800 0 0 4 &ipic 18 8>; - sleep = <&pmc 0x00010000>; - /* filled by u-boot */ - bus-range = <0 0>; - clock-frequency = <0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_mds.dts deleted file mode 100644 index cfccef57..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_mds.dts +++ /dev/null @@ -1,511 +0,0 @@ -/* - * MPC8377E MDS Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "fsl,mpc8377emds"; - compatible = "fsl,mpc8377emds","fsl,mpc837xmds"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8377@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // booting from NOR flash - ranges = <0 0x0 0xfe000000 0x02000000 - 1 0x0 0xf8000000 0x00008000 - 3 0x0 0xe0600000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - fs@100000 { - reg = <0x100000 0x800000>; - }; - - kernel@1d00000 { - reg = <0x1d00000 0x200000>; - }; - - dtb@1f00000 { - reg = <0x1f00000 0x100000>; - }; - }; - - bcsr@1,0 { - reg = <1 0x0 0x8000>; - compatible = "fsl,mpc837xmds-bcsr"; - }; - - nand@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8377-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <3 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <19 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8377-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "host"; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - phy3: ethernet-phy@3 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy3>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - sata@18000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x000000c0>; - }; - - sata@19000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000030>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - sleep = <&pmc 0x00300000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa8000000 - 0x02000000 0 0xa8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - sleep = <&pmc 0x000c0000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc8000000 - 0x02000000 0 0xc8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_rdb.dts deleted file mode 100644 index 353deff1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ /dev/null @@ -1,503 +0,0 @@ -/* - * MPC8377E RDB Device Tree Source - * - * Copyright 2007, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "fsl,mpc8377rdb"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8377@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // CS0 and CS1 are swapped when - // booting from nand, but the - // addresses are the same. - ranges = <0x0 0x0 0xfe000000 0x00800000 - 0x1 0x0 0xe0600000 0x00008000 - 0x2 0x0 0xf0000000 0x00020000 - 0x3 0x0 0xfa000000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8377-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - gpio1: gpio-controller@c00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; - reg = <0xc00 0x100>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - gpio2: gpio-controller@d00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; - reg = <0xd00 0x100>; - interrupts = <75 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - at24@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - - mcu_pio: mcu@a { - #gpio-cells = <2>; - compatible = "fsl,mc9s08qg8-mpc8377erdb", - "fsl,mcu-mpc8349emitx"; - reg = <0x0a>; - gpio-controller; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8377-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <111111111>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - fixed-link = <1 1 1000 0 0>; - tbi-handle = <&tbi1>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - sata@18000 { - compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x000000c0>; - }; - - sata@19000 { - compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000030>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ - - /* IDSEL AD14 IRQ6 inta */ - 0x7000 0x0 0x0 0x1 &ipic 22 0x8 - - /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ - 0x7800 0x0 0x0 0x1 &ipic 21 0x8 - 0x7800 0x0 0x0 0x2 &ipic 22 0x8 - 0x7800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ - 0xE000 0x0 0x0 0x1 &ipic 23 0x8 - 0xE000 0x0 0x0 0x2 &ipic 21 0x8 - 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - sleep = <&pmc 0x00300000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa8000000 - 0x02000000 0 0xa8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - sleep = <&pmc 0x000c0000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc8000000 - 0x02000000 0 0xc8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - leds { - compatible = "gpio-leds"; - - pwr { - gpios = <&mcu_pio 0 0>; - default-state = "on"; - }; - - hdd { - gpios = <&mcu_pio 1 0>; - linux,default-trigger = "ide-disk"; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_wlan.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_wlan.dts deleted file mode 100644 index ef4a305a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_wlan.dts +++ /dev/null @@ -1,465 +0,0 @@ -/* - * MPC8377E WLAN Device Tree Source - * - * Copyright 2007-2009 Freescale Semiconductor Inc. - * Copyright 2009 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "fsl,mpc8377wlan"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8377@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - ranges = <0x0 0x0 0xfc000000 0x04000000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x4000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - reg = <0 0x80000>; - label = "u-boot"; - read-only; - }; - - partition@a0000 { - reg = <0xa0000 0x300000>; - label = "kernel"; - }; - - partition@3a0000 { - reg = <0x3a0000 0x3c60000>; - label = "rootfs"; - }; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - gpio1: gpio-controller@c00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; - reg = <0xc00 0x100>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - gpio2: gpio-controller@d00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; - reg = <0xd00 0x100>; - interrupts = <75 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - at24@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8377-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - clock-frequency = <133333333>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - phy3: ethernet-phy@3 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - phy-handle = <&phy3>; - tbi-handle = <&tbi1>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - sata@18000 { - compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x000000c0>; - }; - - sata@19000 { - compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000030>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ - - /* IDSEL AD14 IRQ6 inta */ - 0x7000 0x0 0x0 0x1 &ipic 22 0x8 - - /* IDSEL AD15 IRQ5 inta */ - 0x7800 0x0 0x0 0x1 &ipic 21 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - sleep = <&pmc 0x00300000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa8000000 - 0x02000000 0 0xa8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - sleep = <&pmc 0x000c0000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc8000000 - 0x02000000 0 0xc8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8378_mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8378_mds.dts deleted file mode 100644 index 538fcb92..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8378_mds.dts +++ /dev/null @@ -1,495 +0,0 @@ -/* - * MPC8378E MDS Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "fsl,mpc8378emds"; - compatible = "fsl,mpc8378emds","fsl,mpc837xmds"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8378@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // booting from NOR flash - ranges = <0 0x0 0xfe000000 0x02000000 - 1 0x0 0xf8000000 0x00008000 - 3 0x0 0xe0600000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - fs@100000 { - reg = <0x100000 0x800000>; - }; - - kernel@1d00000 { - reg = <0x1d00000 0x200000>; - }; - - dtb@1f00000 { - reg = <0x1f00000 0x100000>; - }; - }; - - bcsr@1,0 { - reg = <1 0x0 0x8000>; - compatible = "fsl,mpc837xmds-bcsr"; - }; - - nand@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8378-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <3 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <19 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8378-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8378-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "host"; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - phy3: ethernet-phy@3 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy3>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - clock-frequency = <0>; - sleep = <&pmc 0x00010000>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - sleep = <&pmc 0x00300000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa8000000 - 0x02000000 0 0xa8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - sleep = <&pmc 0x000c0000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc8000000 - 0x02000000 0 0xc8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8378_rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8378_rdb.dts deleted file mode 100644 index 32333a90..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ /dev/null @@ -1,487 +0,0 @@ -/* - * MPC8378E RDB Device Tree Source - * - * Copyright 2007, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "fsl,mpc8378rdb"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8378@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // CS0 and CS1 are swapped when - // booting from nand, but the - // addresses are the same. - ranges = <0x0 0x0 0xfe000000 0x00800000 - 0x1 0x0 0xe0600000 0x00008000 - 0x2 0x0 0xf0000000 0x00020000 - 0x3 0x0 0xfa000000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8378-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - gpio1: gpio-controller@c00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio"; - reg = <0xc00 0x100>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - gpio2: gpio-controller@d00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio"; - reg = <0xd00 0x100>; - interrupts = <75 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - at24@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - - mcu_pio: mcu@a { - #gpio-cells = <2>; - compatible = "fsl,mc9s08qg8-mpc8378erdb", - "fsl,mcu-mpc8349emitx"; - reg = <0x0a>; - gpio-controller; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8378-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <111111111>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8378-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - fixed-link = <1 1 1000 0 0>; - tbi-handle = <&tbi1>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ - - /* IDSEL AD14 IRQ6 inta */ - 0x7000 0x0 0x0 0x1 &ipic 22 0x8 - - /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ - 0x7800 0x0 0x0 0x1 &ipic 21 0x8 - 0x7800 0x0 0x0 0x2 &ipic 22 0x8 - 0x7800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ - 0xE000 0x0 0x0 0x1 &ipic 23 0x8 - 0xE000 0x0 0x0 0x2 &ipic 21 0x8 - 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - sleep = <&pmc 0x00300000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa8000000 - 0x02000000 0 0xa8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - sleep = <&pmc 0x000c0000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc8000000 - 0x02000000 0 0xc8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - leds { - compatible = "gpio-leds"; - - pwr { - gpios = <&mcu_pio 0 0>; - default-state = "on"; - }; - - hdd { - gpios = <&mcu_pio 1 0>; - linux,default-trigger = "ide-disk"; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8379_mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8379_mds.dts deleted file mode 100644 index 5387092f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8379_mds.dts +++ /dev/null @@ -1,461 +0,0 @@ -/* - * MPC8379E MDS Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "fsl,mpc8379emds"; - compatible = "fsl,mpc8379emds","fsl,mpc837xmds"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8379@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // booting from NOR flash - ranges = <0 0x0 0xfe000000 0x02000000 - 1 0x0 0xf8000000 0x00008000 - 3 0x0 0xe0600000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - fs@100000 { - reg = <0x100000 0x800000>; - }; - - kernel@1d00000 { - reg = <0x1d00000 0x200000>; - }; - - dtb@1f00000 { - reg = <0x1f00000 0x100000>; - }; - }; - - bcsr@1,0 { - reg = <1 0x0 0x8000>; - compatible = "fsl,mpc837xmds-bcsr"; - }; - - nand@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8379-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <3 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <19 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8379-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "host"; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - phy3: ethernet-phy@3 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy3>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - sata@18000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x000000c0>; - }; - - sata@19000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000030>; - }; - - sata@1a000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x1a000 0x1000>; - interrupts = <46 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x0000000c>; - }; - - sata@1b000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x1b000 0x1000>; - interrupts = <47 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000003>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8379_rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8379_rdb.dts deleted file mode 100644 index 46224c24..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ /dev/null @@ -1,453 +0,0 @@ -/* - * MPC8379E RDB Device Tree Source - * - * Copyright 2007, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "fsl,mpc8379rdb"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8379@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // CS0 and CS1 are swapped when - // booting from nand, but the - // addresses are the same. - ranges = <0x0 0x0 0xfe000000 0x00800000 - 0x1 0x0 0xe0600000 0x00008000 - 0x2 0x0 0xf0000000 0x00020000 - 0x3 0x0 0xfa000000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8379-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - gpio1: gpio-controller@c00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; - reg = <0xc00 0x100>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - gpio2: gpio-controller@d00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; - reg = <0xd00 0x100>; - interrupts = <75 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - at24@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - - mcu_pio: mcu@a { - #gpio-cells = <2>; - compatible = "fsl,mc9s08qg8-mpc8379erdb", - "fsl,mcu-mpc8349emitx"; - reg = <0x0a>; - gpio-controller; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8379-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <111111111>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - fixed-link = <1 1 1000 0 0>; - tbi-handle = <&tbi1>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - sata@18000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x000000c0>; - }; - - sata@19000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000030>; - }; - - sata@1a000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x1a000 0x1000>; - interrupts = <46 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x0000000c>; - }; - - sata@1b000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x1b000 0x1000>; - interrupts = <47 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000003>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ - - /* IDSEL AD14 IRQ6 inta */ - 0x7000 0x0 0x0 0x1 &ipic 22 0x8 - - /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ - 0x7800 0x0 0x0 0x1 &ipic 21 0x8 - 0x7800 0x0 0x0 0x2 &ipic 22 0x8 - 0x7800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ - 0xE000 0x0 0x0 0x1 &ipic 23 0x8 - 0xE000 0x0 0x0 0x2 &ipic 21 0x8 - 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - leds { - compatible = "gpio-leds"; - - pwr { - gpios = <&mcu_pio 0 0>; - default-state = "on"; - }; - - hdd { - gpios = <&mcu_pio 1 0>; - linux,default-trigger = "ide-disk"; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds.dts deleted file mode 100644 index 19736222..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds.dts +++ /dev/null @@ -1,109 +0,0 @@ -/* - * MPC8536 DS Device Tree Source - * - * Copyright 2008, 2011 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8536si-pre.dtsi" - -/ { - model = "fsl,mpc8536ds"; - compatible = "fsl,mpc8536ds"; - - cpus { - #cpus = <1>; - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8536@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0 0 0>; // Filled by U-Boot - }; - - lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 - 0x2 0x0 0x0 0xffa00000 0x00040000 - 0x3 0x0 0x0 0xffdf0000 0x00008000>; - }; - - board_soc: soc: soc@ffe00000 { - ranges = <0x0 0 0xffe00000 0x100000>; - }; - - pci0: pci@ffe08000 { - reg = <0 0xffe08000 0 0x1000>; - ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000 - 0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 J17 Slot 1 */ - 0x8800 0 0 1 &mpic 1 1 0 0 - 0x8800 0 0 2 &mpic 2 1 0 0 - 0x8800 0 0 3 &mpic 3 1 0 0 - 0x8800 0 0 4 &mpic 4 1 0 0>; - }; - - pci1: pcie@ffe09000 { - reg = <0 0xffe09000 0 0x1000>; - ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000 - 0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x98000000 - 0x02000000 0 0x98000000 - 0 0x08000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000 - 0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x90000000 - 0x02000000 0 0x90000000 - 0 0x08000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci3: pcie@ffe0b000 { - reg = <0 0xffe0b000 0 0x1000>; - ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 - 0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00100000>; - }; - }; -}; - -/include/ "fsl/mpc8536si-post.dtsi" -/include/ "mpc8536ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds.dtsi deleted file mode 100644 index cc46dbd9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds.dtsi +++ /dev/null @@ -1,234 +0,0 @@ -/* - * MPC8536DS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - reg = <0x0 0x03000000>; - label = "ramdisk-nor"; - }; - - partition@3000000 { - reg = <0x03000000 0x00e00000>; - label = "diagnostic-nor"; - read-only; - }; - - partition@3e00000 { - reg = <0x03e00000 0x00200000>; - label = "dink-nor"; - read-only; - }; - - partition@4000000 { - reg = <0x04000000 0x00400000>; - label = "kernel-nor"; - }; - - partition@4400000 { - reg = <0x04400000 0x03b00000>; - label = "fs-nor"; - }; - - partition@7f00000 { - reg = <0x07f00000 0x00080000>; - label = "dtb-nor"; - }; - - partition@7f80000 { - reg = <0x07f80000 0x00080000>; - label = "u-boot-nor"; - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8536-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - reg = <0x0 0x02000000>; - label = "u-boot-nand"; - read-only; - }; - - partition@2000000 { - reg = <0x02000000 0x10000000>; - label = "fs-nand"; - }; - - partition@12000000 { - reg = <0x12000000 0x08000000>; - label = "ramdisk-nand"; - }; - - partition@1a000000 { - reg = <0x1a000000 0x04000000>; - label = "kernel-nand"; - }; - - partition@1e000000 { - reg = <0x1e000000 0x01000000>; - label = "dtb-nand"; - }; - - partition@1f000000 { - reg = <0x1f000000 0x21000000>; - label = "empty-nand"; - }; - }; - - board-control@3,0 { - compatible = "fsl,mpc8536ds-fpga-pixis"; - reg = <0x3 0x0 0x8000>; - }; -}; - -&board_soc { - i2c@3100 { - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0 0x1 0 0>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - flash@1 { - compatible = "spansion,s25sl12801"; - reg = <1>; - spi-max-frequency = <40000000>; - }; - flash@2 { - compatible = "spansion,s25sl12801"; - reg = <2>; - spi-max-frequency = <40000000>; - }; - flash@3 { - compatible = "spansion,s25sl12801"; - reg = <3>; - spi-max-frequency = <40000000>; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - usb@23000 { - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <10 0x1 0 0>; - reg = <0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupts = <10 0x1 0 0>; - reg = <1>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@26000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - mdio@26520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x26520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - usb@2b000 { - dr_mode = "peripheral"; - phy_type = "ulpi"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds_36b.dts deleted file mode 100644 index f8a3b341..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds_36b.dts +++ /dev/null @@ -1,109 +0,0 @@ -/* - * MPC8536DS Device Tree Source (36-bit address map) - * - * Copyright 2008-2009, 2011 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8536si-pre.dtsi" - -/ { - model = "fsl,mpc8536ds"; - compatible = "fsl,mpc8536ds"; - - cpus { - #cpus = <1>; - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8536@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0 0 0>; // Filled by U-Boot - }; - - lbc: localbus@ffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 - 0x2 0x0 0xf 0xffa00000 0x00040000 - 0x3 0x0 0xf 0xffdf0000 0x00008000>; - }; - - board_soc: soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pci@ffe08000 { - reg = <0xf 0xffe08000 0 0x1000>; - ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000 - 0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 J17 Slot 1 */ - 0x8800 0 0 1 &mpic 1 1 0 0 - 0x8800 0 0 2 &mpic 2 1 0 0 - 0x8800 0 0 3 &mpic 3 1 0 0 - 0x8800 0 0 4 &mpic 4 1 0 0>; - }; - - pci1: pcie@ffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000 - 0x01000000 0 0x00000000 0xf 0xffc20000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xf8000000 - 0x02000000 0 0xf8000000 - 0 0x08000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci2: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x02000000 0 0xf8000000 0xc 0x10000000 0 0x08000000 - 0x01000000 0 0x00000000 0xf 0xffc10000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xf8000000 - 0x02000000 0 0xf8000000 - 0 0x08000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci3: pcie@fffe0b000 { - reg = <0xf 0xffe0b000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xffc30000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00100000>; - }; - }; -}; - -/include/ "fsl/mpc8536si-post.dtsi" -/include/ "mpc8536ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8540ads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8540ads.dts deleted file mode 100644 index f99fb110..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8540ads.dts +++ /dev/null @@ -1,360 +0,0 @@ -/* - * MPC8540 ADS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8540ADS"; - compatible = "MPC8540ADS", "MPC85xxADS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8540@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x8000000>; // 128M at 0x0 - }; - - soc8540@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8540-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <7 1>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "FEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <41 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy3>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x02 */ - 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 0x03 */ - 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x04 */ - 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x05 */ - 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x0c */ - 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 0x0d */ - 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x0e */ - 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x0f */ - 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x14 */ - 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8541cds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8541cds.dts deleted file mode 100644 index 0f5e9391..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8541cds.dts +++ /dev/null @@ -1,379 +0,0 @@ -/* - * MPC8541 CDS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8541CDS"; - compatible = "MPC8541CDS", "MPC85xxCDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8541@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x8000000>; // 128M at 0x0 - }; - - soc8541@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8541-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8541-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8541-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8541-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9000 0x1000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8541-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic"; - }; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x10 */ - 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x12 (Slot 1) */ - 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x13 (Slot 2) */ - 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 - - /* IDSEL 0x14 (Slot 3) */ - 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x15 (Slot 4) */ - 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* Bus 1 (Tundra Bridge) */ - /* IDSEL 0x12 (ISA bridge) */ - 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - - i8259@19000 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x19000 0x0 0x0 0x0 0x1>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <1>; - interrupt-parent = <&pci0>; - }; - }; - - pci1: pci@e0009000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0009000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8544ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8544ds.dts deleted file mode 100644 index e934987e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8544ds.dts +++ /dev/null @@ -1,105 +0,0 @@ -/* - * MPC8544 DS Device Tree Source - * - * Copyright 2007, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8544si-pre.dtsi" - -/ { - model = "MPC8544DS"; - compatible = "MPC8544DS", "MPC85xxDS"; - - memory { - device_type = "memory"; - reg = <0 0 0 0>; // Filled by U-Boot - }; - - lbc: localbus@e0005000 { - reg = <0 0xe0005000 0 0x1000>; - }; - - board_soc: soc: soc8544@e0000000 { - ranges = <0x0 0x0 0xe0000000 0x100000>; - }; - - pci0: pci@e0008000 { - reg = <0 0xe0008000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 J17 Slot 1 */ - 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x12 J16 Slot 2 */ - - 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>; - }; - - pci1: pcie@e0009000 { - reg = <0x0 0xe0009000 0x0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci2: pcie@e000a000 { - reg = <0x0 0xe000a000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - board_pci3: pci3: pcie@e000b000 { - reg = <0x0 0xe000b000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xb0000000 0 0xb0000000 0x0 0x100000 - 0x1000000 0x0 0x00000000 0 0xb0100000 0x0 0x100000>; - pcie@0 { - ranges = <0x2000000 0x0 0xb0000000 - 0x2000000 0x0 0xb0000000 - 0x0 0x100000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/* - * mpc8544ds.dtsi must be last to ensure board_pci3 overrides pci3 settings - * for interrupt-map & interrupt-map-mask - */ - -/include/ "fsl/mpc8544si-post.dtsi" -/include/ "mpc8544ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8544ds.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8544ds.dtsi deleted file mode 100644 index 270f64b9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8544ds.dtsi +++ /dev/null @@ -1,161 +0,0 @@ -/* - * MPC8544DS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_soc { - enet0: ethernet@24000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi0>; - phy-connection-type = "rgmii-id"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <10 1 0 0>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupts = <10 1 0 0>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@26000 { - phy-handle = <&phy1>; - tbi-handle = <&tbi1>; - phy-connection-type = "rgmii-id"; - }; - - mdio@26520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; -}; - -&board_pci3 { - pcie@0 { - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - // IDSEL 0x1c USB - 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2 - 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2 - 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2 - 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2 - - // IDSEL 0x1d Audio - 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 - - // IDSEL 0x1e Legacy - 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 - 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 - 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 - >; - - - uli1575@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0xb0000000 - 0x2000000 0x0 0xb0000000 - 0x0 0x100000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 - 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <9 2 0 0>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <0x1 0x60 0x1 0x1 0x64 0x1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0x0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <0x1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - - gpio@400 { - reg = <0x1 0x400 0x80>; - }; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds.dtsi deleted file mode 100644 index c61f525e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds.dtsi +++ /dev/null @@ -1,306 +0,0 @@ -/* - * MPC8548CDS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x01000000>; - bank-width = <2>; - device-width = <2>; - - partition@0 { - reg = <0x0 0x0b00000>; - label = "ramdisk-nor"; - }; - - partition@300000 { - reg = <0x0b00000 0x0400000>; - label = "kernel-nor"; - }; - - partition@700000 { - reg = <0x0f00000 0x060000>; - label = "dtb-nor"; - }; - - partition@760000 { - reg = <0x0f60000 0x020000>; - label = "env-nor"; - read-only; - }; - - partition@780000 { - reg = <0x0f80000 0x080000>; - label = "u-boot-nor"; - read-only; - }; - }; - - board-control@1,0 { - compatible = "fsl,mpc8548cds-fpga"; - reg = <0x1 0x0 0x1000>; - }; -}; - -&board_soc { - i2c@3000 { - eeprom@50 { - compatible = "atmel,24c64"; - reg = <0x50>; - }; - - eeprom@56 { - compatible = "atmel,24c64"; - reg = <0x56>; - }; - - eeprom@57 { - compatible = "atmel,24c64"; - reg = <0x57>; - }; - }; - - i2c@3100 { - eeprom@50 { - compatible = "atmel,24c64"; - reg = <0x50>; - }; - }; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <5 1 0 0>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupts = <5 1 0 0>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupts = <5 1 0 0>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupts = <5 1 0 0>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@26000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - }; - - mdio@26520 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@27000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - }; - - mdio@27520 { - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; -}; - -&board_pci0 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x4 (PCIX Slot 2) */ - 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x5 (PCIX Slot 3) */ - 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0 - 0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0 - 0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0 - 0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0 - - /* IDSEL 0x6 (PCIX Slot 4) */ - 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0 - 0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x8 (PCIX Slot 5) */ - 0x4000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0x4000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0x4000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x4000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0xC (Tsi310 bridge) */ - 0x6000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0x6000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0x6000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x6000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x14 (Slot 2) */ - 0xa000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0xa000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xa000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xa000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x15 (Slot 3) */ - 0xa800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0 - 0xa800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0 - 0xa800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0 - 0xa800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0 - - /* IDSEL 0x16 (Slot 4) */ - 0xb000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0xb000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0xb000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0 - 0xb000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x18 (Slot 5) */ - 0xc000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0xc000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xc000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xc000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x1C (Tsi310 bridge PCI primary) */ - 0xe000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0xe000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xe000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xe000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>; - - pci_bridge@1c { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x00 (PrPMC Site) */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x04 (VIA chip) */ - 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x05 (8139) */ - 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x06 (Slot 6) */ - 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0 - 0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDESL 0x07 (Slot 7) */ - 0x3800 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x3800 0x0 0x0 0x2 &mpic 0x0 0x1 0 0 - 0x3800 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x3800 0x0 0x0 0x4 &mpic 0x2 0x1 0 0>; - - reg = <0xe000 0x0 0x0 0x0 0x0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x80000>; - clock-frequency = <33333333>; - - isa@4 { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0x2000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <0 1 0 0>; - interrupt-parent = <&mpic>; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds_32b.dts deleted file mode 100644 index 6fd63163..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds_32b.dts +++ /dev/null @@ -1,86 +0,0 @@ -/* - * MPC8548 CDS Device Tree Source (32-bit address map) - * - * Copyright 2006, 2008, 2011-2012 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8548si-pre.dtsi" - -/ { - model = "MPC8548CDS"; - compatible = "MPC8548CDS", "MPC85xxCDS"; - - memory { - device_type = "memory"; - reg = <0 0 0x0 0x8000000>; // 128M at 0x0 - }; - - board_lbc: lbc: localbus@e0005000 { - reg = <0 0xe0005000 0 0x1000>; - - ranges = <0x0 0x0 0x0 0xff000000 0x01000000 - 0x1 0x0 0x0 0xf8004000 0x00001000>; - - }; - - board_soc: soc: soc8548@e0000000 { - ranges = <0 0x0 0xe0000000 0x100000>; - }; - - board_pci0: pci0: pci@e0008000 { - reg = <0 0xe0008000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>; - clock-frequency = <66666666>; - }; - - pci1: pci@e0009000 { - reg = <0 0xe0009000 0 0x1000>; - ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0 - 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>; - }; - - pci2: pcie@e000a000 { - reg = <0 0xe000a000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - rio: rapidio@e00c0000 { - reg = <0x0 0xe00c0000 0x0 0x20000>; - port1 { - ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; - }; - }; -}; - -/* - * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings - * for interrupt-map & interrupt-map-mask. - */ - -/include/ "fsl/mpc8548si-post.dtsi" -/include/ "mpc8548cds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds_36b.dts deleted file mode 100644 index 10e551b1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds_36b.dts +++ /dev/null @@ -1,86 +0,0 @@ -/* - * MPC8548 CDS Device Tree Source (36-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8548si-pre.dtsi" - -/ { - model = "MPC8548CDS"; - compatible = "MPC8548CDS", "MPC85xxCDS"; - - memory { - device_type = "memory"; - reg = <0 0 0x0 0x8000000>; // 128M at 0x0 - }; - - board_lbc: lbc: localbus@fe0005000 { - reg = <0xf 0xe0005000 0 0x1000>; - - ranges = <0x0 0x0 0xf 0xff000000 0x01000000 - 0x1 0x0 0xf 0xf8004000 0x00001000>; - - }; - - board_soc: soc: soc8548@fe0000000 { - ranges = <0 0xf 0xe0000000 0x100000>; - }; - - board_pci0: pci0: pci@fe0008000 { - reg = <0xf 0xe0008000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0xf 0xe2000000 0x0 0x800000>; - clock-frequency = <66666666>; - }; - - pci1: pci@fe0009000 { - reg = <0xf 0xe0009000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0xf 0xe2800000 0x0 0x800000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0 - 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>; - }; - - pci2: pcie@fe000a000 { - reg = <0xf 0xe000a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xe3000000 0x0 0x100000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - rio: rapidio@fe00c0000 { - reg = <0xf 0xe00c0000 0x0 0x20000>; - port1 { - ranges = <0x0 0x0 0xc 0x40000000 0x0 0x20000000>; - }; - }; -}; - -/* - * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings - * for interrupt-map & interrupt-map-mask. - */ - -/include/ "fsl/mpc8548si-post.dtsi" -/include/ "mpc8548cds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8555cds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8555cds.dts deleted file mode 100644 index fe104386..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8555cds.dts +++ /dev/null @@ -1,379 +0,0 @@ -/* - * MPC8555 CDS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8555CDS"; - compatible = "MPC8555CDS", "MPC85xxCDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8555@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x8000000>; // 128M at 0x0 - }; - - soc8555@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8555-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8555-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8555-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9000 0x1000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8555-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic"; - }; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x10 */ - 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x12 (Slot 1) */ - 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x13 (Slot 2) */ - 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 - - /* IDSEL 0x14 (Slot 3) */ - 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x15 (Slot 4) */ - 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* Bus 1 (Tundra Bridge) */ - /* IDSEL 0x12 (ISA bridge) */ - 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - - i8259@19000 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x19000 0x0 0x0 0x0 0x1>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <1>; - interrupt-parent = <&pci0>; - }; - }; - - pci1: pci@e0009000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0009000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8560ads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8560ads.dts deleted file mode 100644 index 6e85e1ba..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8560ads.dts +++ /dev/null @@ -1,394 +0,0 @@ -/* - * MPC8560 ADS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8560ADS"; - compatible = "MPC8560ADS", "MPC85xxADS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8560@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <82500000>; - bus-frequency = <330000000>; - clock-frequency = <825000000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x10000000>; - }; - - soc8560@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <330000000>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8560-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <7 1>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <7 1>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x4000 0x9000 0x2000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8560-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <165000000>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; - }; - - serial0: serial@91a00 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a00 0x20 0x88000 0x100>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - current-speed = <115200>; - interrupts = <40 8>; - interrupt-parent = <&cpmpic>; - }; - - serial1: serial@91a20 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a20 0x20 0x88100 0x100>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x4a00000>; - current-speed = <115200>; - interrupts = <41 8>; - interrupt-parent = <&cpmpic>; - }; - - enet2: ethernet@91320 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x16200300>; - interrupts = <33 8>; - interrupt-parent = <&cpmpic>; - phy-handle = <&phy2>; - }; - - enet3: ethernet@91340 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x1a400300>; - interrupts = <34 8>; - interrupt-parent = <&cpmpic>; - phy-handle = <&phy3>; - }; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x2 */ - 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 0x3 */ - 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x4 */ - 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x5 */ - 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 12 */ - 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 13 */ - 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 14*/ - 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 15 */ - 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 18 */ - 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 19 */ - 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 20 */ - 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 21 */ - 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8568mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8568mds.dts deleted file mode 100644 index 09598bb5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8568mds.dts +++ /dev/null @@ -1,322 +0,0 @@ -/* - * MPC8568E MDS Device Tree Source - * - * Copyright 2007, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8568si-pre.dtsi" - -/ { - model = "MPC8568EMDS"; - compatible = "MPC8568EMDS", "MPC85xxMDS"; - - aliases { - pci0 = &pci0; - pci1 = &pci1; - rapidio0 = &rio; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; - }; - - lbc: localbus@e0005000 { - reg = <0x0 0xe0005000 0x0 0x1000>; - ranges = <0x0 0x0 0xfe000000 0x02000000 - 0x1 0x0 0xf8000000 0x00008000 - 0x2 0x0 0xf0000000 0x04000000 - 0x4 0x0 0xf8008000 0x00008000 - 0x5 0x0 0xf8010000 0x00008000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x02000000>; - bank-width = <2>; - device-width = <2>; - }; - - bcsr@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8568mds-bcsr"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - - bcsr5: gpio-controller@11 { - #gpio-cells = <2>; - compatible = "fsl,mpc8568mds-bcsr-gpio"; - reg = <0x5 0x1>; - gpio-controller; - }; - }; - - pib@4,0 { - compatible = "fsl,mpc8568mds-pib"; - reg = <4 0 0x8000>; - }; - - pib@5,0 { - compatible = "fsl,mpc8568mds-pib"; - reg = <5 0 0x8000>; - }; - }; - - soc: soc8568@e0000000 { - ranges = <0x0 0x0 0xe0000000 0x100000>; - - i2c-sleep-nexus { - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <3 1 0 0>; - }; - }; - }; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - }; - - mdio@24520 { - phy0: ethernet-phy@7 { - interrupts = <1 1 0 0>; - reg = <0x7>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupts = <2 1 0 0>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupts = <1 1 0 0>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupts = <2 1 0 0>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy3>; - sleep = <&pmc 0x00000040>; - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - par_io@e0100 { - num-ports = <7>; - - pio1: ucc_pin@01 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x4 0xa 0x1 0x0 0x2 0x0 /* TxD0 */ - 0x4 0x9 0x1 0x0 0x2 0x0 /* TxD1 */ - 0x4 0x8 0x1 0x0 0x2 0x0 /* TxD2 */ - 0x4 0x7 0x1 0x0 0x2 0x0 /* TxD3 */ - 0x4 0x17 0x1 0x0 0x2 0x0 /* TxD4 */ - 0x4 0x16 0x1 0x0 0x2 0x0 /* TxD5 */ - 0x4 0x15 0x1 0x0 0x2 0x0 /* TxD6 */ - 0x4 0x14 0x1 0x0 0x2 0x0 /* TxD7 */ - 0x4 0xf 0x2 0x0 0x2 0x0 /* RxD0 */ - 0x4 0xe 0x2 0x0 0x2 0x0 /* RxD1 */ - 0x4 0xd 0x2 0x0 0x2 0x0 /* RxD2 */ - 0x4 0xc 0x2 0x0 0x2 0x0 /* RxD3 */ - 0x4 0x1d 0x2 0x0 0x2 0x0 /* RxD4 */ - 0x4 0x1c 0x2 0x0 0x2 0x0 /* RxD5 */ - 0x4 0x1b 0x2 0x0 0x2 0x0 /* RxD6 */ - 0x4 0x1a 0x2 0x0 0x2 0x0 /* RxD7 */ - 0x4 0xb 0x1 0x0 0x2 0x0 /* TX_EN */ - 0x4 0x18 0x1 0x0 0x2 0x0 /* TX_ER */ - 0x4 0x10 0x2 0x0 0x2 0x0 /* RX_DV */ - 0x4 0x1e 0x2 0x0 0x2 0x0 /* RX_ER */ - 0x4 0x11 0x2 0x0 0x2 0x0 /* RX_CLK */ - 0x4 0x13 0x1 0x0 0x2 0x0 /* GTX_CLK */ - 0x1 0x1f 0x2 0x0 0x3 0x0>; /* GTX125 */ - }; - - pio2: ucc_pin@02 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x5 0xa 0x1 0x0 0x2 0x0 /* TxD0 */ - 0x5 0x9 0x1 0x0 0x2 0x0 /* TxD1 */ - 0x5 0x8 0x1 0x0 0x2 0x0 /* TxD2 */ - 0x5 0x7 0x1 0x0 0x2 0x0 /* TxD3 */ - 0x5 0x17 0x1 0x0 0x2 0x0 /* TxD4 */ - 0x5 0x16 0x1 0x0 0x2 0x0 /* TxD5 */ - 0x5 0x15 0x1 0x0 0x2 0x0 /* TxD6 */ - 0x5 0x14 0x1 0x0 0x2 0x0 /* TxD7 */ - 0x5 0xf 0x2 0x0 0x2 0x0 /* RxD0 */ - 0x5 0xe 0x2 0x0 0x2 0x0 /* RxD1 */ - 0x5 0xd 0x2 0x0 0x2 0x0 /* RxD2 */ - 0x5 0xc 0x2 0x0 0x2 0x0 /* RxD3 */ - 0x5 0x1d 0x2 0x0 0x2 0x0 /* RxD4 */ - 0x5 0x1c 0x2 0x0 0x2 0x0 /* RxD5 */ - 0x5 0x1b 0x2 0x0 0x2 0x0 /* RxD6 */ - 0x5 0x1a 0x2 0x0 0x2 0x0 /* RxD7 */ - 0x5 0xb 0x1 0x0 0x2 0x0 /* TX_EN */ - 0x5 0x18 0x1 0x0 0x2 0x0 /* TX_ER */ - 0x5 0x10 0x2 0x0 0x2 0x0 /* RX_DV */ - 0x5 0x1e 0x2 0x0 0x2 0x0 /* RX_ER */ - 0x5 0x11 0x2 0x0 0x2 0x0 /* RX_CLK */ - 0x5 0x13 0x1 0x0 0x2 0x0 /* GTX_CLK */ - 0x1 0x1f 0x2 0x0 0x3 0x0 /* GTX125 */ - 0x4 0x6 0x3 0x0 0x2 0x0 /* MDIO */ - 0x4 0x5 0x1 0x0 0x2 0x0>; /* MDC */ - }; - }; - }; - - qe: qe@e0080000 { - ranges = <0x0 0x0 0xe0080000 0x40000>; - reg = <0x0 0xe0080000 0x0 0x480>; - - spi@4c0 { - mode = "cpu"; - }; - - spi@500 { - mode = "cpu"; - }; - - enet2: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk16"; - pio-handle = <&pio1>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - enet3: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk16"; - pio-handle = <&pio2>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - mdio@2120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2120 0x18>; - compatible = "fsl,ucc-mdio"; - - /* These are the same PHYs as on - * gianfar's MDIO bus */ - qe_phy0: ethernet-phy@07 { - interrupt-parent = <&mpic>; - interrupts = <1 1 0 0>; - reg = <0x7>; - device_type = "ethernet-phy"; - }; - qe_phy1: ethernet-phy@01 { - interrupt-parent = <&mpic>; - interrupts = <2 1 0 0>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - qe_phy2: ethernet-phy@02 { - interrupt-parent = <&mpic>; - interrupts = <1 1 0 0>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - qe_phy3: ethernet-phy@03 { - interrupt-parent = <&mpic>; - interrupts = <2 1 0 0>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - }; - }; - - pci0: pci@e0008000 { - reg = <0x0 0xe0008000 0x0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0x0 0xe2000000 0x0 0x800000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x12 AD18 */ - 0x9000 0x0 0x0 0x1 &mpic 0x5 0x1 0 0 - 0x9000 0x0 0x0 0x2 &mpic 0x6 0x1 0 0 - 0x9000 0x0 0x0 0x3 &mpic 0x7 0x1 0 0 - 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 0 0 - - /* IDSEL 0x13 AD19 */ - 0x9800 0x0 0x0 0x1 &mpic 0x6 0x1 0 0 - 0x9800 0x0 0x0 0x2 &mpic 0x7 0x1 0 0 - 0x9800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x9800 0x0 0x0 0x4 &mpic 0x5 0x1 0 0>; - }; - - /* PCI Express */ - pci1: pcie@e000a000 { - ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0x0 0xe2800000 0x0 0x800000>; - reg = <0x0 0xe000a000 0x0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x800000>; - }; - }; - - rio: rapidio@e00c00000 { - reg = <0x0 0xe00c0000 0x0 0x20000>; - port1 { - ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; - }; - }; - - leds { - compatible = "gpio-leds"; - - green { - gpios = <&bcsr5 1 0>; - }; - - amber { - gpios = <&bcsr5 2 0>; - }; - - red { - gpios = <&bcsr5 3 0>; - }; - }; -}; - -/include/ "fsl/mpc8568si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8569mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8569mds.dts deleted file mode 100644 index 7e283c89..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8569mds.dts +++ /dev/null @@ -1,452 +0,0 @@ -/* - * MPC8569E MDS Device Tree Source - * - * Copyright (C) 2009 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8569si-pre.dtsi" - -/ { - model = "MPC8569EMDS"; - compatible = "fsl,MPC8569EMDS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ethernet2 = &enet2; - ethernet3 = &enet3; - ethernet5 = &enet5; - ethernet7 = &enet7; - rapidio0 = &rio; - }; - - memory { - device_type = "memory"; - }; - - lbc: localbus@e0005000 { - reg = <0x0 0xe0005000 0x0 0x1000>; - - ranges = <0x0 0x0 0x0 0xfe000000 0x02000000 - 0x1 0x0 0x0 0xf8000000 0x00008000 - 0x2 0x0 0x0 0xf0000000 0x04000000 - 0x3 0x0 0x0 0xfc000000 0x00008000 - 0x4 0x0 0x0 0xf8008000 0x00008000 - 0x5 0x0 0x0 0xf8010000 0x00008000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x02000000>; - bank-width = <1>; - device-width = <1>; - partition@0 { - label = "ramdisk"; - reg = <0x00000000 0x01c00000>; - }; - partition@1c00000 { - label = "kernel"; - reg = <0x01c00000 0x002e0000>; - }; - partiton@1ee0000 { - label = "dtb"; - reg = <0x01ee0000 0x00020000>; - }; - partition@1f00000 { - label = "firmware"; - reg = <0x01f00000 0x00080000>; - read-only; - }; - partition@1f80000 { - label = "u-boot"; - reg = <0x01f80000 0x00080000>; - read-only; - }; - }; - - bcsr@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8569mds-bcsr"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - - bcsr17: gpio-controller@11 { - #gpio-cells = <2>; - compatible = "fsl,mpc8569mds-bcsr-gpio"; - reg = <0x11 0x1>; - gpio-controller; - }; - }; - - nand@3,0 { - compatible = "fsl,mpc8569-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <3 0 0x8000>; - }; - - pib@4,0 { - compatible = "fsl,mpc8569mds-pib"; - reg = <4 0 0x8000>; - }; - - pib@5,0 { - compatible = "fsl,mpc8569mds-pib"; - reg = <5 0 0x8000>; - }; - }; - - soc: soc@e0000000 { - ranges = <0x0 0x0 0xe0000000 0x100000>; - - i2c-sleep-nexus { - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <3 1 0 0>; - }; - }; - }; - - sdhc@2e000 { - status = "disabled"; - sdhci,1-bit-only; - }; - - par_io@e0100 { - num-ports = <7>; - - qe_pio_e: gpio-controller@80 { - #gpio-cells = <2>; - compatible = "fsl,mpc8569-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0x80 0x18>; - gpio-controller; - }; - - qe_pio_f: gpio-controller@a0 { - #gpio-cells = <2>; - compatible = "fsl,mpc8569-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0xa0 0x18>; - gpio-controller; - }; - - pio1: ucc_pin@01 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ - 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/ - 0x0 0x0 0x1 0x0 0x3 0x0 /* ENET1_TXD0_SER1_TXD0 */ - 0x0 0x1 0x1 0x0 0x3 0x0 /* ENET1_TXD1_SER1_TXD1 */ - 0x0 0x2 0x1 0x0 0x1 0x0 /* ENET1_TXD2_SER1_TXD2 */ - 0x0 0x3 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */ - 0x0 0x6 0x2 0x0 0x3 0x0 /* ENET1_RXD0_SER1_RXD0 */ - 0x0 0x7 0x2 0x0 0x1 0x0 /* ENET1_RXD1_SER1_RXD1 */ - 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */ - 0x0 0x9 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */ - 0x0 0x4 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */ - 0x0 0xc 0x2 0x0 0x3 0x0 /* ENET1_RX_DV_SER1_CTS_B */ - 0x2 0x8 0x2 0x0 0x1 0x0 /* ENET1_GRXCLK */ - 0x2 0x14 0x1 0x0 0x2 0x0>; /* ENET1_GTXCLK */ - }; - - pio2: ucc_pin@02 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ - 0x2 0x10 0x2 0x0 0x3 0x0 /* CLK17 */ - 0x0 0xe 0x1 0x0 0x2 0x0 /* ENET2_TXD0_SER2_TXD0 */ - 0x0 0xf 0x1 0x0 0x2 0x0 /* ENET2_TXD1_SER2_TXD1 */ - 0x0 0x10 0x1 0x0 0x1 0x0 /* ENET2_TXD2_SER2_TXD2 */ - 0x0 0x11 0x1 0x0 0x1 0x0 /* ENET2_TXD3_SER2_TXD3 */ - 0x0 0x14 0x2 0x0 0x2 0x0 /* ENET2_RXD0_SER2_RXD0 */ - 0x0 0x15 0x2 0x0 0x1 0x0 /* ENET2_RXD1_SER2_RXD1 */ - 0x0 0x16 0x2 0x0 0x1 0x0 /* ENET2_RXD2_SER2_RXD2 */ - 0x0 0x17 0x2 0x0 0x1 0x0 /* ENET2_RXD3_SER2_RXD3 */ - 0x0 0x12 0x1 0x0 0x2 0x0 /* ENET2_TX_EN_SER2_RTS_B */ - 0x0 0x1a 0x2 0x0 0x3 0x0 /* ENET2_RX_DV_SER2_CTS_B */ - 0x2 0x3 0x2 0x0 0x1 0x0 /* ENET2_GRXCLK */ - 0x2 0x2 0x1 0x0 0x2 0x0>; /* ENET2_GTXCLK */ - }; - - pio3: ucc_pin@03 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ - 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/ - 0x0 0x1d 0x1 0x0 0x2 0x0 /* ENET3_TXD0_SER3_TXD0 */ - 0x0 0x1e 0x1 0x0 0x3 0x0 /* ENET3_TXD1_SER3_TXD1 */ - 0x0 0x1f 0x1 0x0 0x2 0x0 /* ENET3_TXD2_SER3_TXD2 */ - 0x1 0x0 0x1 0x0 0x3 0x0 /* ENET3_TXD3_SER3_TXD3 */ - 0x1 0x3 0x2 0x0 0x3 0x0 /* ENET3_RXD0_SER3_RXD0 */ - 0x1 0x4 0x2 0x0 0x1 0x0 /* ENET3_RXD1_SER3_RXD1 */ - 0x1 0x5 0x2 0x0 0x2 0x0 /* ENET3_RXD2_SER3_RXD2 */ - 0x1 0x6 0x2 0x0 0x3 0x0 /* ENET3_RXD3_SER3_RXD3 */ - 0x1 0x1 0x1 0x0 0x1 0x0 /* ENET3_TX_EN_SER3_RTS_B */ - 0x1 0x9 0x2 0x0 0x3 0x0 /* ENET3_RX_DV_SER3_CTS_B */ - 0x2 0x9 0x2 0x0 0x2 0x0 /* ENET3_GRXCLK */ - 0x2 0x19 0x1 0x0 0x2 0x0>; /* ENET3_GTXCLK */ - }; - - pio4: ucc_pin@04 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ - 0x2 0x10 0x2 0x0 0x3 0x0 /* CLK17 */ - 0x1 0xc 0x1 0x0 0x2 0x0 /* ENET4_TXD0_SER4_TXD0 */ - 0x1 0xd 0x1 0x0 0x2 0x0 /* ENET4_TXD1_SER4_TXD1 */ - 0x1 0xe 0x1 0x0 0x1 0x0 /* ENET4_TXD2_SER4_TXD2 */ - 0x1 0xf 0x1 0x0 0x2 0x0 /* ENET4_TXD3_SER4_TXD3 */ - 0x1 0x12 0x2 0x0 0x2 0x0 /* ENET4_RXD0_SER4_RXD0 */ - 0x1 0x13 0x2 0x0 0x1 0x0 /* ENET4_RXD1_SER4_RXD1 */ - 0x1 0x14 0x2 0x0 0x1 0x0 /* ENET4_RXD2_SER4_RXD2 */ - 0x1 0x15 0x2 0x0 0x2 0x0 /* ENET4_RXD3_SER4_RXD3 */ - 0x1 0x10 0x1 0x0 0x2 0x0 /* ENET4_TX_EN_SER4_RTS_B */ - 0x1 0x18 0x2 0x0 0x3 0x0 /* ENET4_RX_DV_SER4_CTS_B */ - 0x2 0x11 0x2 0x0 0x2 0x0 /* ENET4_GRXCLK */ - 0x2 0x18 0x1 0x0 0x2 0x0>; /* ENET4_GTXCLK */ - }; - }; - }; - - qe: qe@e0080000 { - ranges = <0x0 0x0 0xe0080000 0x40000>; - reg = <0x0 0xe0080000 0x0 0x480>; - - spi@4c0 { - gpios = <&qe_pio_e 30 0>; - mode = "cpu-qe"; - - serial-flash@0 { - compatible = "stm,m25p40"; - reg = <0>; - spi-max-frequency = <25000000>; - }; - }; - - spi@500 { - mode = "cpu"; - }; - - usb@6c0 { - fsl,fullspeed-clock = "clk5"; - fsl,lowspeed-clock = "brg10"; - gpios = <&qe_pio_f 3 0 /* USBOE */ - &qe_pio_f 4 0 /* USBTP */ - &qe_pio_f 5 0 /* USBTN */ - &qe_pio_f 6 0 /* USBRP */ - &qe_pio_f 8 0 /* USBRN */ - &bcsr17 1 0 /* SPEED */ - &bcsr17 2 0>; /* POWER */ - }; - - enet0: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk12"; - pio-handle = <&pio1>; - tbi-handle = <&tbi1>; - phy-handle = <&qe_phy0>; - phy-connection-type = "rgmii-id"; - }; - - mdio@2120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2120 0x18>; - compatible = "fsl,ucc-mdio"; - - qe_phy0: ethernet-phy@07 { - interrupt-parent = <&mpic>; - interrupts = <1 1 0 0>; - reg = <0x7>; - device_type = "ethernet-phy"; - }; - qe_phy1: ethernet-phy@01 { - interrupt-parent = <&mpic>; - interrupts = <2 1 0 0>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - qe_phy2: ethernet-phy@02 { - interrupt-parent = <&mpic>; - interrupts = <3 1 0 0>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - qe_phy3: ethernet-phy@03 { - interrupt-parent = <&mpic>; - interrupts = <4 1 0 0>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - qe_phy5: ethernet-phy@04 { - reg = <0x04>; - device_type = "ethernet-phy"; - }; - qe_phy7: ethernet-phy@06 { - reg = <0x6>; - device_type = "ethernet-phy"; - }; - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - mdio@3520 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3520 0x18>; - compatible = "fsl,ucc-mdio"; - - tbi6: tbi-phy@15 { - reg = <0x15>; - device_type = "tbi-phy"; - }; - }; - mdio@3720 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3720 0x38>; - compatible = "fsl,ucc-mdio"; - tbi8: tbi-phy@17 { - reg = <0x17>; - device_type = "tbi-phy"; - }; - }; - - enet2: ucc@2200 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk12"; - pio-handle = <&pio3>; - tbi-handle = <&tbi3>; - phy-handle = <&qe_phy2>; - phy-connection-type = "rgmii-id"; - }; - - mdio@2320 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2320 0x18>; - compatible = "fsl,ucc-mdio"; - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet1: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk17"; - pio-handle = <&pio2>; - tbi-handle = <&tbi2>; - phy-handle = <&qe_phy1>; - phy-connection-type = "rgmii-id"; - }; - - mdio@3120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3120 0x18>; - compatible = "fsl,ucc-mdio"; - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet3: ucc@3200 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk17"; - pio-handle = <&pio4>; - tbi-handle = <&tbi4>; - phy-handle = <&qe_phy3>; - phy-connection-type = "rgmii-id"; - }; - - mdio@3320 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3320 0x18>; - compatible = "fsl,ucc-mdio"; - tbi4: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet5: ucc@3400 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "none"; - tbi-handle = <&tbi6>; - phy-handle = <&qe_phy5>; - phy-connection-type = "sgmii"; - }; - - enet7: ucc@3600 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "none"; - tbi-handle = <&tbi8>; - phy-handle = <&qe_phy7>; - phy-connection-type = "sgmii"; - }; - }; - - /* PCI Express */ - pci1: pcie@e000a000 { - reg = <0x0 0xe000a000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x00800000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x800000>; - }; - }; - - rio: rapidio@e00c00000 { - reg = <0x0 0xe00c0000 0x0 0x20000>; - port1 { - ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; - }; - port2 { - status = "disabled"; - }; - }; -}; - -/include/ "fsl/mpc8569si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds.dts deleted file mode 100644 index 0c9f2955..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds.dts +++ /dev/null @@ -1,90 +0,0 @@ -/* - * MPC8572 DS Device Tree Source - * - * Copyright 2007-2009 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8572si-pre.dtsi" - -/ { - model = "fsl,MPC8572DS"; - compatible = "fsl,MPC8572DS"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 - 0x1 0x0 0x0 0xe0000000 0x08000000 - 0x2 0x0 0x0 0xffa00000 0x00040000 - 0x3 0x0 0x0 0xffdf0000 0x00008000 - 0x4 0x0 0x0 0xffa40000 0x00040000 - 0x5 0x0 0x0 0xffa80000 0x00040000 - 0x6 0x0 0x0 0xffac0000 0x00040000>; - }; - - board_soc: soc: soc8572@ffe00000 { - ranges = <0x0 0 0xffe00000 0x100000>; - }; - - board_pci0: pci0: pcie@ffe08000 { - reg = <0 0xffe08000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci1: pcie@ffe09000 { - reg = <0 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci2: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; -}; - -/* - * mpc8572ds.dtsi must be last to ensure board_pci0 overrides pci0 settings - * for interrupt-map & interrupt-map-mask - */ - -/include/ "fsl/mpc8572si-post.dtsi" -/include/ "mpc8572ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds.dtsi deleted file mode 100644 index 14178944..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds.dtsi +++ /dev/null @@ -1,411 +0,0 @@ -/* - * MPC8572DS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - reg = <0x0 0x03000000>; - label = "ramdisk-nor"; - }; - - partition@3000000 { - reg = <0x03000000 0x00e00000>; - label = "diagnostic-nor"; - read-only; - }; - - partition@3e00000 { - reg = <0x03e00000 0x00200000>; - label = "dink-nor"; - read-only; - }; - - partition@4000000 { - reg = <0x04000000 0x00400000>; - label = "kernel-nor"; - }; - - partition@4400000 { - reg = <0x04400000 0x03b00000>; - label = "fs-nor"; - }; - - partition@7f00000 { - reg = <0x07f00000 0x00060000>; - label = "dtb-nor"; - }; - - partition@7f60000 { - reg = <0x07f60000 0x00020000>; - label = "env-nor"; - read-only; - }; - - partition@7f80000 { - reg = <0x07f80000 0x00080000>; - label = "u-boot-nor"; - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - reg = <0x0 0x02000000>; - label = "u-boot-nand"; - read-only; - }; - - partition@2000000 { - reg = <0x02000000 0x10000000>; - label = "fs-nand"; - }; - - partition@12000000 { - reg = <0x12000000 0x08000000>; - label = "ramdisk-nand"; - }; - - partition@1a000000 { - reg = <0x1a000000 0x04000000>; - label = "kernel-nand"; - }; - - partition@1e000000 { - reg = <0x1e000000 0x01000000>; - label = "dtb-nand"; - }; - - partition@1f000000 { - reg = <0x1f000000 0x21000000>; - label = "empty-nand"; - }; - }; - - nand@4,0 { - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x4 0x0 0x40000>; - }; - - nand@5,0 { - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x5 0x0 0x40000>; - }; - - nand@6,0 { - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x6 0x0 0x40000>; - }; -}; - -&board_soc { - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <10 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <10 1 0 0>; - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - interrupts = <10 1 0 0>; - reg = <0x2>; - }; - phy3: ethernet-phy@3 { - interrupts = <10 1 0 0>; - reg = <0x3>; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - ptp_clock@24e00 { - fsl,tclk-period = <5>; - fsl,tmr-prsc = <200>; - fsl,tmr-add = <0xAAAAAAAB>; - fsl,tmr-fiper1 = <0x3B9AC9FB>; - fsl,tmr-fiper2 = <0x3B9AC9FB>; - fsl,max-adj = <499999999>; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@26000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - - }; - mdio@26520 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@27000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "rgmii-id"; - }; - - mdio@27520 { - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; -}; - -&board_pci0 { - pcie@0 { - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x11 func 0 - PCI slot 1 */ - 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 1 - PCI slot 1 */ - 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 2 - PCI slot 1 */ - 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 3 - PCI slot 1 */ - 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 4 - PCI slot 1 */ - 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 5 - PCI slot 1 */ - 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 6 - PCI slot 1 */ - 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 7 - PCI slot 1 */ - 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x12 func 0 - PCI slot 2 */ - 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 1 - PCI slot 2 */ - 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 2 - PCI slot 2 */ - 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 3 - PCI slot 2 */ - 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 4 - PCI slot 2 */ - 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 5 - PCI slot 2 */ - 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 6 - PCI slot 2 */ - 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 7 - PCI slot 2 */ - 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - // IDSEL 0x1c USB - 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2 - 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2 - 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2 - 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2 - - // IDSEL 0x1d Audio - 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 - - // IDSEL 0x1e Legacy - 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 - 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 - 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 - >; - - - uli1575@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 - 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <9 2 0 0>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <0x1 0x60 0x1 0x1 0x64 0x1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0x0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <0x1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - - gpio@400 { - reg = <0x1 0x400 0x80>; - }; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_36b.dts deleted file mode 100644 index 6c3d0b30..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_36b.dts +++ /dev/null @@ -1,90 +0,0 @@ -/* - * MPC8572DS Device Tree Source (36-bit address map) - * - * Copyright 2007-2009 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8572si-pre.dtsi" - -/ { - model = "fsl,MPC8572DS"; - compatible = "fsl,MPC8572DS"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 - 0x1 0x0 0xf 0xe0000000 0x08000000 - 0x2 0x0 0xf 0xffa00000 0x00040000 - 0x3 0x0 0xf 0xffdf0000 0x00008000 - 0x4 0x0 0xf 0xffa40000 0x00040000 - 0x5 0x0 0xf 0xffa80000 0x00040000 - 0x6 0x0 0xf 0xffac0000 0x00040000>; - }; - - board_soc: soc: soc8572@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - board_pci0: pci0: pcie@fffe08000 { - reg = <0xf 0xffe08000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci1: pcie@fffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci2: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; -}; - -/* - * mpc8572ds.dtsi must be last to ensure board_pci0 overrides pci0 settings - * for interrupt-map & interrupt-map-mask - */ - -/include/ "fsl/mpc8572si-post.dtsi" -/include/ "mpc8572ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts deleted file mode 100644 index d34d1271..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts +++ /dev/null @@ -1,82 +0,0 @@ -/* - * MPC8572 DS Core0 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0, - * eth1, crypto, pci0, pci1. - * - * Copyright 2007-2009 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc8572ds.dts" - -/ { - model = "fsl,MPC8572DS"; - compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP"; - - cpus { - PowerPC,8572@0 { - }; - PowerPC,8572@1 { - status = "disabled"; - }; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc8572@ffe00000 { - serial@4600 { - status = "disabled"; - }; - dma@c300 { - status = "disabled"; - }; - gpio-controller@f000 { - }; - l2-cache-controller@20000 { - cache-size = <0x80000>; // L2, 512K - }; - ethernet@26000 { - status = "disabled"; - }; - mdio@26520 { - status = "disabled"; - }; - ethernet@27000 { - status = "disabled"; - }; - mdio@27520 { - status = "disabled"; - }; - pic@40000 { - protected-sources = < - 31 32 33 37 38 39 /* enet2 enet3 */ - 76 77 78 79 26 42 /* dma2 pci2 serial*/ - 0xe4 0xe5 0xe6 0xe7 /* msi */ - >; - }; - - msi@41600 { - msi-available-ranges = <0 0x80>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0>; - }; - timer@42100 { - status = "disabled"; - }; - }; - pcie@ffe0a000 { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts deleted file mode 100644 index d6a8fafc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts +++ /dev/null @@ -1,118 +0,0 @@ -/* - * MPC8572 DS Core1 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts allows core1 to have l2, dma2, eth2, eth3, pci2, msi. - * - * Please note to add "-b 1" for core1's dts compiling. - * - * Copyright 2007-2009 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc8572ds.dts" - -/ { - model = "fsl,MPC8572DS"; - compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP"; - - cpus { - PowerPC,8572@0 { - status = "disabled"; - }; - PowerPC,8572@1 { - }; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc8572@ffe00000 { - ecm-law@0 { - status = "disabled"; - }; - ecm@1000 { - status = "disabled"; - }; - memory-controller@2000 { - status = "disabled"; - }; - memory-controller@6000 { - status = "disabled"; - }; - i2c@3000 { - status = "disabled"; - }; - i2c@3100 { - status = "disabled"; - }; - serial@4500 { - status = "disabled"; - }; - gpio-controller@f000 { - status = "disabled"; - }; - l2-cache-controller@20000 { - cache-size = <0x80000>; // L2, 512K - }; - dma@21300 { - status = "disabled"; - }; - ethernet@24000 { - status = "disabled"; - }; - mdio@24520 { - status = "disabled"; - }; - ptp_clock@24e00 { - status = "disabled"; - }; - ethernet@25000 { - status = "disabled"; - }; - mdio@25520 { - status = "disabled"; - }; - crypto@30000 { - status = "disabled"; - }; - pic@40000 { - protected-sources = < - 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */ - 29 30 34 35 36 40 /* enet0 enet1 */ - 24 25 20 21 22 23 /* pci0 pci1 dma1 */ - 43 /* i2c */ - 0x1 0x2 0x3 0x4 /* pci slot */ - 0x9 0xa 0xb 0xc /* usb */ - 0x6 0x7 0xe 0x5 /* Audio elgacy SATA */ - 0xe0 0xe1 0xe2 0xe3 /* msi */ - >; - }; - timer@41100 { - status = "disabled"; - }; - msi@41600 { - msi-available-ranges = <0x80 0x80>; - interrupts = < - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - }; - global-utilities@e0000 { - status = "disabled"; - }; - }; - pcie@ffe08000 { - status = "disabled"; - }; - pcie@ffe09000 { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8610_hpcd.dts deleted file mode 100644 index 6a109a0c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8610_hpcd.dts +++ /dev/null @@ -1,506 +0,0 @@ -/* - * MPC8610 HPCD Device Tree Source - * - * Copyright 2007-2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License Version 2 as published - * by the Free Software Foundation. - */ - -/dts-v1/; - -/ { - model = "MPC8610HPCD"; - compatible = "fsl,MPC8610HPCD"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8610@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; // L1 - i-cache-size = <32768>; // L1 - sleep = <&pmc 0x00008000 0 // core - &pmc 0x00004000 0>; // timebase - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512M at 0x0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8610-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - ranges = <0 0 0xf8000000 0x08000000 - 1 0 0xf0000000 0x08000000 - 2 0 0xe8400000 0x00008000 - 4 0 0xe8440000 0x00008000 - 5 0 0xe8480000 0x00008000 - 6 0 0xe84c0000 0x00008000 - 3 0 0xe8000000 0x00000020>; - sleep = <&pmc 0x08000000 0>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x8000000>; - bank-width = <2>; - device-width = <1>; - }; - - flash@1,0 { - compatible = "cfi-flash"; - reg = <1 0 0x8000000>; - bank-width = <2>; - device-width = <1>; - }; - - flash@2,0 { - compatible = "fsl,mpc8610-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <2 0 0x8000>; - }; - - flash@4,0 { - compatible = "fsl,mpc8610-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <4 0 0x8000>; - }; - - flash@5,0 { - compatible = "fsl,mpc8610-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <5 0 0x8000>; - }; - - flash@6,0 { - compatible = "fsl,mpc8610-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <6 0 0x8000>; - }; - - board-control@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,fpga-pixis"; - reg = <3 0 0x20>; - ranges = <0 3 0 0x20>; - interrupt-parent = <&mpic>; - interrupts = <8 8>; - - sdcsr_pio: gpio-controller@a { - #gpio-cells = <2>; - compatible = "fsl,fpga-pixis-gpio-bank"; - reg = <0xa 1>; - gpio-controller; - }; - }; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - device_type = "soc"; - compatible = "fsl,mpc8610-immr", "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - bus-frequency = <0>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8610-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - cs4270:codec@4f { - compatible = "cirrus,cs4270"; - reg = <0x4f>; - /* MCLK source is a stand-alone oscillator */ - clock-frequency = <12288000>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - sleep = <&pmc 0x00000004 0>; - dfsrr; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - sleep = <&pmc 0x00000002 0>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - sleep = <&pmc 0x00000008 0>; - }; - - spi@7000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8610-spi", "fsl,spi"; - reg = <0x7000 0x40>; - cell-index = <0>; - interrupts = <59 2>; - interrupt-parent = <&mpic>; - mode = "cpu"; - gpios = <&sdcsr_pio 7 0>; - sleep = <&pmc 0x00000800 0>; - - mmc-slot@0 { - compatible = "fsl,mpc8610hpcd-mmc-slot", - "mmc-spi-slot"; - reg = <0>; - gpios = <&sdcsr_pio 0 1 /* nCD */ - &sdcsr_pio 1 0>; /* WP */ - voltage-ranges = <3300 3300>; - spi-max-frequency = <50000000>; - }; - }; - - display@2c000 { - compatible = "fsl,diu"; - reg = <0x2c000 100>; - interrupts = <72 2>; - interrupt-parent = <&mpic>; - sleep = <&pmc 0x04000000 0>; - }; - - mpic: interrupt-controller@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,mpc8610-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8610-guts"; - reg = <0xe0000 0x1000>; - ranges = <0 0xe0000 0x1000>; - fsl,has-rstcr; - - pmc: power@70 { - compatible = "fsl,mpc8610-pmc", - "fsl,mpc8641d-pmc"; - reg = <0x70 0x20>; - }; - }; - - wdt@e4000 { - compatible = "fsl,mpc8610-wdt"; - reg = <0xe4000 0x100>; - }; - - ssi@16000 { - compatible = "fsl,mpc8610-ssi"; - cell-index = <0>; - reg = <0x16000 0x100>; - interrupt-parent = <&mpic>; - interrupts = <62 2>; - fsl,mode = "i2s-slave"; - codec-handle = <&cs4270>; - fsl,playback-dma = <&dma00>; - fsl,capture-dma = <&dma01>; - fsl,fifo-depth = <8>; - sleep = <&pmc 0 0x08000000>; - }; - - ssi@16100 { - compatible = "fsl,mpc8610-ssi"; - status = "disabled"; - cell-index = <1>; - reg = <0x16100 0x100>; - interrupt-parent = <&mpic>; - interrupts = <63 2>; - fsl,fifo-depth = <8>; - sleep = <&pmc 0 0x04000000>; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma"; - cell-index = <0>; - reg = <0x21300 0x4>; /* DMA general status register */ - ranges = <0x0 0x21100 0x200>; - sleep = <&pmc 0x00000400 0>; - - dma00: dma-channel@0 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,ssi-dma-channel"; - cell-index = <0>; - reg = <0x0 0x80>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma01: dma-channel@1 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,ssi-dma-channel"; - cell-index = <1>; - reg = <0x80 0x80>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@2 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <2>; - reg = <0x100 0x80>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@3 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <3>; - reg = <0x180 0x80>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma"; - cell-index = <1>; - reg = <0xc300 0x4>; /* DMA general status register */ - ranges = <0x0 0xc100 0x200>; - sleep = <&pmc 0x00000200 0>; - - dma-channel@0 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <0>; - reg = <0x0 0x80>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@1 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <1>; - reg = <0x80 0x80>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@2 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <2>; - reg = <0x100 0x80>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@3 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <3>; - reg = <0x180 0x80>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - }; - - pci0: pci@e0008000 { - compatible = "fsl,mpc8610-pci"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe1000000 0x0 0x00100000>; - sleep = <&pmc 0x80000000 0>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x11 */ - 0x8800 0 0 1 &mpic 4 1 - 0x8800 0 0 2 &mpic 5 1 - 0x8800 0 0 3 &mpic 6 1 - 0x8800 0 0 4 &mpic 7 1 - - /* IDSEL 0x12 */ - 0x9000 0 0 1 &mpic 5 1 - 0x9000 0 0 2 &mpic 6 1 - 0x9000 0 0 3 &mpic 7 1 - 0x9000 0 0 4 &mpic 4 1 - >; - }; - - pci1: pcie@e000a000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe000a000 0x1000>; - bus-range = <1 3>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>; - sleep = <&pmc 0x40000000 0>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x1b */ - 0xd800 0 0 1 &mpic 2 1 - - /* IDSEL 0x1c*/ - 0xe000 0 0 1 &mpic 1 1 - 0xe000 0 0 2 &mpic 1 1 - 0xe000 0 0 3 &mpic 1 1 - 0xe000 0 0 4 &mpic 1 1 - - /* IDSEL 0x1f */ - 0xf800 0 0 1 &mpic 3 2 - 0xf800 0 0 2 &mpic 0 1 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x10000000 - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00100000>; - uli1575@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x10000000 - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00100000>; - - isa@1e { - device_type = "isa"; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0 0 0 0>; - ranges = <1 0 0x01000000 0 0 - 0x00001000>; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <1 0x70 2>; - }; - }; - }; - }; - }; - - pci2: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8641-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0x0000 0 0 1 &mpic 4 1 - 0x0000 0 0 2 &mpic 5 1 - 0x0000 0 0 3 &mpic 6 1 - 0x0000 0 0 4 &mpic 7 1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - sleep = <&pmc 0x20000000 0>; - clock-frequency = <33333333>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8641_hpcn.dts deleted file mode 100644 index 1e8666cc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ /dev/null @@ -1,667 +0,0 @@ -/* - * MPC8641 HPCN Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8641HPCN"; - compatible = "fsl,mpc8641hpcn"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8641@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; // L1 - i-cache-size = <32768>; // L1 - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - PowerPC,8641@1 { - device_type = "cpu"; - reg = <1>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x40000000>; // 1G at 0x0 - }; - - localbus@ffe05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8641-localbus", "simple-bus"; - reg = <0xffe05000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0 0 0xef800000 0x00800000 - 2 0 0xffdf8000 0x00008000 - 3 0 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x00800000>; - bank-width = <2>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00300000>; - }; - partition@300000 { - label = "firmware b"; - reg = <0x00300000 0x00100000>; - read-only; - }; - partition@400000 { - label = "fs"; - reg = <0x00400000 0x00300000>; - }; - partition@700000 { - label = "firmware a"; - reg = <0x00700000 0x00100000>; - read-only; - }; - }; - }; - - soc8641@ffe00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x00000000 0xffe00000 0x00100000>; - bus-frequency = <0>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8641-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <28 2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - rmu: rmu@d3000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,srio-rmu"; - reg = <0xd3000 0x500>; - ranges = <0x0 0xd3000 0x500>; - - message-unit@0 { - compatible = "fsl,srio-msg-unit"; - reg = <0x0 0x100>; - interrupts = < - 53 2 /* msg1_tx_irq */ - 54 2>;/* msg1_rx_irq */ - }; - message-unit@100 { - compatible = "fsl,srio-msg-unit"; - reg = <0x100 0x100>; - interrupts = < - 55 2 /* msg2_tx_irq */ - 56 2>;/* msg2_rx_irq */ - }; - doorbell-unit@400 { - compatible = "fsl,srio-dbell-unit"; - reg = <0x400 0x80>; - interrupts = < - 49 2 /* bell_outb_irq */ - 50 2>;/* bell_inb_irq */ - }; - port-write-unit@4e0 { - compatible = "fsl,srio-port-write-unit"; - reg = <0x4e0 0x20>; - interrupts = <48 2>; - }; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8641-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@ffe08000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xffe08000 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xff00 0 0 7>; - interrupt-map = < - /* IDSEL 0x11 func 0 - PCI slot 1 */ - 0x8800 0 0 1 &mpic 2 1 - 0x8800 0 0 2 &mpic 3 1 - 0x8800 0 0 3 &mpic 4 1 - 0x8800 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 1 - PCI slot 1 */ - 0x8900 0 0 1 &mpic 2 1 - 0x8900 0 0 2 &mpic 3 1 - 0x8900 0 0 3 &mpic 4 1 - 0x8900 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 2 - PCI slot 1 */ - 0x8a00 0 0 1 &mpic 2 1 - 0x8a00 0 0 2 &mpic 3 1 - 0x8a00 0 0 3 &mpic 4 1 - 0x8a00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 3 - PCI slot 1 */ - 0x8b00 0 0 1 &mpic 2 1 - 0x8b00 0 0 2 &mpic 3 1 - 0x8b00 0 0 3 &mpic 4 1 - 0x8b00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 4 - PCI slot 1 */ - 0x8c00 0 0 1 &mpic 2 1 - 0x8c00 0 0 2 &mpic 3 1 - 0x8c00 0 0 3 &mpic 4 1 - 0x8c00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 5 - PCI slot 1 */ - 0x8d00 0 0 1 &mpic 2 1 - 0x8d00 0 0 2 &mpic 3 1 - 0x8d00 0 0 3 &mpic 4 1 - 0x8d00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 6 - PCI slot 1 */ - 0x8e00 0 0 1 &mpic 2 1 - 0x8e00 0 0 2 &mpic 3 1 - 0x8e00 0 0 3 &mpic 4 1 - 0x8e00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 7 - PCI slot 1 */ - 0x8f00 0 0 1 &mpic 2 1 - 0x8f00 0 0 2 &mpic 3 1 - 0x8f00 0 0 3 &mpic 4 1 - 0x8f00 0 0 4 &mpic 1 1 - - /* IDSEL 0x12 func 0 - PCI slot 2 */ - 0x9000 0 0 1 &mpic 3 1 - 0x9000 0 0 2 &mpic 4 1 - 0x9000 0 0 3 &mpic 1 1 - 0x9000 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 1 - PCI slot 2 */ - 0x9100 0 0 1 &mpic 3 1 - 0x9100 0 0 2 &mpic 4 1 - 0x9100 0 0 3 &mpic 1 1 - 0x9100 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 2 - PCI slot 2 */ - 0x9200 0 0 1 &mpic 3 1 - 0x9200 0 0 2 &mpic 4 1 - 0x9200 0 0 3 &mpic 1 1 - 0x9200 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 3 - PCI slot 2 */ - 0x9300 0 0 1 &mpic 3 1 - 0x9300 0 0 2 &mpic 4 1 - 0x9300 0 0 3 &mpic 1 1 - 0x9300 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 4 - PCI slot 2 */ - 0x9400 0 0 1 &mpic 3 1 - 0x9400 0 0 2 &mpic 4 1 - 0x9400 0 0 3 &mpic 1 1 - 0x9400 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 5 - PCI slot 2 */ - 0x9500 0 0 1 &mpic 3 1 - 0x9500 0 0 2 &mpic 4 1 - 0x9500 0 0 3 &mpic 1 1 - 0x9500 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 6 - PCI slot 2 */ - 0x9600 0 0 1 &mpic 3 1 - 0x9600 0 0 2 &mpic 4 1 - 0x9600 0 0 3 &mpic 1 1 - 0x9600 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 7 - PCI slot 2 */ - 0x9700 0 0 1 &mpic 3 1 - 0x9700 0 0 2 &mpic 4 1 - 0x9700 0 0 3 &mpic 1 1 - 0x9700 0 0 4 &mpic 2 1 - - // IDSEL 0x1c USB - 0xe000 0 0 1 &i8259 12 2 - 0xe100 0 0 2 &i8259 9 2 - 0xe200 0 0 3 &i8259 10 2 - 0xe300 0 0 4 &i8259 11 2 - - // IDSEL 0x1d Audio - 0xe800 0 0 1 &i8259 6 2 - - // IDSEL 0x1e Legacy - 0xf000 0 0 1 &i8259 7 2 - 0xf100 0 0 1 &i8259 7 2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0 0 1 &i8259 14 2 - 0xf900 0 0 1 &i8259 5 2 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - uli1575@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x20000000 - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0 0 0 0>; - ranges = <1 0 0x01000000 0 0 - 0x00001000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <1 0x20 2 - 1 0xa0 2 - 1 0x4d0 2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <9 2>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <1 0x60 1 1 0x64 1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = - "pnpPNP,b00"; - reg = <1 0x70 2>; - }; - - gpio@400 { - reg = <1 0x400 0x80>; - }; - }; - }; - }; - - }; - - pci1: pcie@ffe09000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xffe09000 0x1000>; - bus-range = <0 0xff>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0000 0 0 1 &mpic 4 1 - 0x0000 0 0 2 &mpic 5 1 - 0x0000 0 0 3 &mpic 6 1 - 0x0000 0 0 4 &mpic 7 1 - >; - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - }; - }; -/* - * Only one of Rapid IO or PCI can be present due to HW limitations and - * due to the fact that the 2 now share address space in the new memory - * map. The most likely case is that we have PCI, so comment out the - * rapidio node. Leave it here for reference. - - rapidio@ffec0000 { - reg = <0xffec0000 0x11000>; - compatible = "fsl,srio"; - interrupt-parent = <&mpic>; - interrupts = <48 2>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - ranges = <0 0 0x80000000 0 0x20000000>; - }; - }; -*/ - -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts deleted file mode 100644 index fd4cd4da..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts +++ /dev/null @@ -1,609 +0,0 @@ -/* - * MPC8641 HPCN Device Tree Source - * - * Copyright 2008-2009 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8641HPCN"; - compatible = "fsl,mpc8641hpcn"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8641@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - PowerPC,8641@1 { - device_type = "cpu"; - reg = <1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x00000000 0x0 0x40000000>; // 1G at 0x0 - }; - - localbus@fffe05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8641-localbus", "simple-bus"; - reg = <0x0f 0xffe05000 0x0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0 0 0xf 0xef800000 0x00800000 - 2 0 0xf 0xffdf8000 0x00008000 - 3 0 0xf 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x00800000>; - bank-width = <2>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00300000>; - }; - partition@300000 { - label = "firmware b"; - reg = <0x00300000 0x00100000>; - read-only; - }; - partition@400000 { - label = "fs"; - reg = <0x00400000 0x00300000>; - }; - partition@700000 { - label = "firmware a"; - reg = <0x00700000 0x00100000>; - read-only; - }; - }; - }; - - soc8641@fffe00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x00000000 0x0f 0xffe00000 0x00100000>; - bus-frequency = <0>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8641-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <28 2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8641-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@fffe08000 { - cell-index = <0>; - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x0f 0xffe08000 0x0 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0xe0000000 0x0c 0x00000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0x0f 0xffc00000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xff00 0 0 7>; - interrupt-map = < - /* IDSEL 0x11 func 0 - PCI slot 1 */ - 0x8800 0 0 1 &mpic 2 1 - 0x8800 0 0 2 &mpic 3 1 - 0x8800 0 0 3 &mpic 4 1 - 0x8800 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 1 - PCI slot 1 */ - 0x8900 0 0 1 &mpic 2 1 - 0x8900 0 0 2 &mpic 3 1 - 0x8900 0 0 3 &mpic 4 1 - 0x8900 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 2 - PCI slot 1 */ - 0x8a00 0 0 1 &mpic 2 1 - 0x8a00 0 0 2 &mpic 3 1 - 0x8a00 0 0 3 &mpic 4 1 - 0x8a00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 3 - PCI slot 1 */ - 0x8b00 0 0 1 &mpic 2 1 - 0x8b00 0 0 2 &mpic 3 1 - 0x8b00 0 0 3 &mpic 4 1 - 0x8b00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 4 - PCI slot 1 */ - 0x8c00 0 0 1 &mpic 2 1 - 0x8c00 0 0 2 &mpic 3 1 - 0x8c00 0 0 3 &mpic 4 1 - 0x8c00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 5 - PCI slot 1 */ - 0x8d00 0 0 1 &mpic 2 1 - 0x8d00 0 0 2 &mpic 3 1 - 0x8d00 0 0 3 &mpic 4 1 - 0x8d00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 6 - PCI slot 1 */ - 0x8e00 0 0 1 &mpic 2 1 - 0x8e00 0 0 2 &mpic 3 1 - 0x8e00 0 0 3 &mpic 4 1 - 0x8e00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 7 - PCI slot 1 */ - 0x8f00 0 0 1 &mpic 2 1 - 0x8f00 0 0 2 &mpic 3 1 - 0x8f00 0 0 3 &mpic 4 1 - 0x8f00 0 0 4 &mpic 1 1 - - /* IDSEL 0x12 func 0 - PCI slot 2 */ - 0x9000 0 0 1 &mpic 3 1 - 0x9000 0 0 2 &mpic 4 1 - 0x9000 0 0 3 &mpic 1 1 - 0x9000 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 1 - PCI slot 2 */ - 0x9100 0 0 1 &mpic 3 1 - 0x9100 0 0 2 &mpic 4 1 - 0x9100 0 0 3 &mpic 1 1 - 0x9100 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 2 - PCI slot 2 */ - 0x9200 0 0 1 &mpic 3 1 - 0x9200 0 0 2 &mpic 4 1 - 0x9200 0 0 3 &mpic 1 1 - 0x9200 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 3 - PCI slot 2 */ - 0x9300 0 0 1 &mpic 3 1 - 0x9300 0 0 2 &mpic 4 1 - 0x9300 0 0 3 &mpic 1 1 - 0x9300 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 4 - PCI slot 2 */ - 0x9400 0 0 1 &mpic 3 1 - 0x9400 0 0 2 &mpic 4 1 - 0x9400 0 0 3 &mpic 1 1 - 0x9400 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 5 - PCI slot 2 */ - 0x9500 0 0 1 &mpic 3 1 - 0x9500 0 0 2 &mpic 4 1 - 0x9500 0 0 3 &mpic 1 1 - 0x9500 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 6 - PCI slot 2 */ - 0x9600 0 0 1 &mpic 3 1 - 0x9600 0 0 2 &mpic 4 1 - 0x9600 0 0 3 &mpic 1 1 - 0x9600 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 7 - PCI slot 2 */ - 0x9700 0 0 1 &mpic 3 1 - 0x9700 0 0 2 &mpic 4 1 - 0x9700 0 0 3 &mpic 1 1 - 0x9700 0 0 4 &mpic 2 1 - - // IDSEL 0x1c USB - 0xe000 0 0 1 &i8259 12 2 - 0xe100 0 0 2 &i8259 9 2 - 0xe200 0 0 3 &i8259 10 2 - 0xe300 0 0 4 &i8259 11 2 - - // IDSEL 0x1d Audio - 0xe800 0 0 1 &i8259 6 2 - - // IDSEL 0x1e Legacy - 0xf000 0 0 1 &i8259 7 2 - 0xf100 0 0 1 &i8259 7 2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0 0 1 &i8259 14 2 - 0xf900 0 0 1 &i8259 5 2 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xe0000000 - 0x02000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - uli1575@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x02000000 0x0 0xe0000000 - 0x02000000 0x0 0xe0000000 - 0x0 0x20000000 - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0 0 0 0>; - ranges = <1 0 0x01000000 0 0 - 0x00001000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <1 0x20 2 - 1 0xa0 2 - 1 0x4d0 2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <9 2>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <1 0x60 1 1 0x64 1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = - "pnpPNP,b00"; - reg = <1 0x70 2>; - }; - - gpio@400 { - reg = <1 0x400 0x80>; - }; - }; - }; - }; - - }; - - pci1: pcie@fffe09000 { - cell-index = <1>; - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x0f 0xffe09000 0x0 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0xe0000000 0x0c 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0x0f 0xffc10000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0000 0 0 1 &mpic 4 1 - 0x0000 0 0 2 &mpic 5 1 - 0x0000 0 0 3 &mpic 6 1 - 0x0000 0 0 4 &mpic 7 1 - >; - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xe0000000 - 0x02000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc866ads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc866ads.dts deleted file mode 100644 index bd700651..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc866ads.dts +++ /dev/null @@ -1,191 +0,0 @@ -/* - * MPC866 ADS Device Tree Source - * - * Copyright 2006 MontaVista Software, Inc. - * Copyright 2008 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC866ADS"; - compatible = "fsl,mpc866ads"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,866@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <16>; // 16 bytes - i-cache-line-size = <16>; // 16 bytes - d-cache-size = <0x2000>; // L1, 8K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - interrupts = <15 2>; // decrementer interrupt - interrupt-parent = <&PIC>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x800000>; - }; - - localbus@ff000100 { - compatible = "fsl,mpc866-localbus", "fsl,pq1-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xff000100 0x40>; - - ranges = < - 0x1 0x0 0xff080000 0x8000 - 0x5 0x0 0xff0a0000 0x8000 - >; - - board-control@1,0 { - reg = <0x1 0x0 0x20 0x5 0x300 0x4>; - compatible = "fsl,mpc866ads-bcsr"; - }; - }; - - soc@ff000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xff000000 0x100000>; - reg = <0xff000000 0x200>; - bus-frequency = <0>; - - mdio@e00 { - compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio"; - reg = <0xe00 0x188>; - #address-cells = <1>; - #size-cells = <0>; - PHY: ethernet-phy@f { - reg = <0xf>; - device_type = "ethernet-phy"; - }; - }; - - ethernet@e00 { - device_type = "network"; - compatible = "fsl,mpc866-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0xe00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <3 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY>; - linux,network-index = <0>; - }; - - PIC: pic@0 { - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x0 0x24>; - compatible = "fsl,mpc866-pic", "fsl,pq1-pic"; - }; - - cpm@9c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc866-cpm", "fsl,cpm1"; - ranges; - reg = <0x9c0 0x40>; - brg-frequency = <0>; - interrupts = <0 2>; // cpm error interrupt - interrupt-parent = <&CPM_PIC>; - - muram@2000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2000 0x2000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x1c00>; - }; - }; - - brg@9f0 { - compatible = "fsl,mpc866-brg", - "fsl,cpm1-brg", - "fsl,cpm-brg"; - reg = <0x9f0 0x10>; - clock-frequency = <0>; - }; - - CPM_PIC: pic@930 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - interrupts = <5 2 0 2>; - interrupt-parent = <&PIC>; - reg = <0x930 0x20>; - compatible = "fsl,mpc866-cpm-pic", - "fsl,cpm1-pic"; - }; - - - serial@a80 { - device_type = "serial"; - compatible = "fsl,mpc866-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa80 0x10 0x3e80 0x40>; - interrupts = <4>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x90>; - }; - - serial@a90 { - device_type = "serial"; - compatible = "fsl,mpc866-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa90 0x10 0x3f80 0x40>; - interrupts = <3>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0xd0>; - }; - - ethernet@a00 { - device_type = "network"; - compatible = "fsl,mpc866-scc-enet", - "fsl,cpm1-scc-enet"; - reg = <0xa00 0x18 0x3c00 0x100>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <30>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-command = <0000>; - linux,network-index = <1>; - }; - - i2c@860 { - compatible = "fsl,mpc866-i2c", - "fsl,cpm1-i2c"; - reg = <0x860 0x20 0x3c80 0x30>; - interrupts = <16>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-command = <0x10>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - }; - - chosen { - linux,stdout-path = "/soc/cpm/serial@a80"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc885ads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc885ads.dts deleted file mode 100644 index b123e9f7..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc885ads.dts +++ /dev/null @@ -1,235 +0,0 @@ -/* - * MPC885 ADS Device Tree Source - * - * Copyright 2006 MontaVista Software, Inc. - * Copyright 2007,2008 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC885ADS"; - compatible = "fsl,mpc885ads"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,885@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <16>; - i-cache-line-size = <16>; - d-cache-size = <8192>; - i-cache-size = <8192>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - interrupts = <15 2>; // decrementer interrupt - interrupt-parent = <&PIC>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; - }; - - localbus@ff000100 { - compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xff000100 0x40>; - - ranges = < - 0x0 0x0 0xfe000000 0x800000 - 0x1 0x0 0xff080000 0x8000 - 0x5 0x0 0xff0a0000 0x8000 - >; - - flash@0,0 { - compatible = "jedec-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <4>; - device-width = <1>; - }; - - board-control@1,0 { - reg = <0x1 0x0 0x20 0x5 0x300 0x4>; - compatible = "fsl,mpc885ads-bcsr"; - }; - }; - - soc@ff000000 { - compatible = "fsl,mpc885", "fsl,pq1-soc"; - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xff000000 0x4000>; - bus-frequency = <0>; - - // Temporary -- will go away once kernel uses ranges for get_immrbase(). - reg = <0xff000000 0x4000>; - - mdio@e00 { - compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio"; - reg = <0xe00 0x188>; - #address-cells = <1>; - #size-cells = <0>; - - PHY0: ethernet-phy@0 { - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - PHY2: ethernet-phy@2 { - reg = <0x2>; - device_type = "ethernet-phy"; - }; - }; - - ethernet@e00 { - device_type = "network"; - compatible = "fsl,mpc885-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0xe00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <3 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - }; - - ethernet@1e00 { - device_type = "network"; - compatible = "fsl,mpc885-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0x1e00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <7 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - }; - - PIC: interrupt-controller@0 { - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x0 0x24>; - compatible = "fsl,mpc885-pic", "fsl,pq1-pic"; - }; - - pcmcia@80 { - #address-cells = <3>; - #interrupt-cells = <1>; - #size-cells = <2>; - compatible = "fsl,pq-pcmcia"; - device_type = "pcmcia"; - reg = <0x80 0x80>; - interrupt-parent = <&PIC>; - interrupts = <13 1>; - }; - - cpm@9c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc885-cpm", "fsl,cpm1"; - command-proc = <0x9c0>; - interrupts = <0>; // cpm error interrupt - interrupt-parent = <&CPM_PIC>; - reg = <0x9c0 0x40>; - ranges; - - muram@2000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2000 0x2000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x1c00>; - }; - }; - - brg@9f0 { - compatible = "fsl,mpc885-brg", - "fsl,cpm1-brg", - "fsl,cpm-brg"; - clock-frequency = <0>; - reg = <0x9f0 0x10>; - }; - - CPM_PIC: interrupt-controller@930 { - interrupt-controller; - #interrupt-cells = <1>; - interrupts = <5 2 0 2>; - interrupt-parent = <&PIC>; - reg = <0x930 0x20>; - compatible = "fsl,mpc885-cpm-pic", - "fsl,cpm1-pic"; - }; - - serial@a80 { - device_type = "serial"; - compatible = "fsl,mpc885-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa80 0x10 0x3e80 0x40>; - interrupts = <4>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x90>; - }; - - serial@a90 { - device_type = "serial"; - compatible = "fsl,mpc885-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa90 0x10 0x3f80 0x40>; - interrupts = <3>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0xd0>; - }; - - ethernet@a40 { - device_type = "network"; - compatible = "fsl,mpc885-scc-enet", - "fsl,cpm1-scc-enet"; - reg = <0xa40 0x18 0x3e00 0x100>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <28>; - interrupt-parent = <&CPM_PIC>; - phy-handle = <&PHY2>; - fsl,cpm-command = <0x80>; - linux,network-index = <2>; - }; - - i2c@860 { - compatible = "fsl,mpc885-i2c", - "fsl,cpm1-i2c"; - reg = <0x860 0x20 0x3c80 0x30>; - interrupts = <16>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-command = <0x10>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - }; - - chosen { - linux,stdout-path = "/soc/cpm/serial@a80"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mucmc52.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mucmc52.dts deleted file mode 100644 index 21d34720..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mucmc52.dts +++ /dev/null @@ -1,250 +0,0 @@ -/* - * Manroland mucmc52 board Device Tree Source - * - * Copyright (C) 2009 DENX Software Engineering GmbH - * Heiko Schocher <hs@denx.de> - * Copyright 2006-2007 Secret Lab Technologies Ltd. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "manroland,mucmc52"; - compatible = "manroland,mucmc52"; - - soc5200@f0000000 { - gpt0: timer@600 { // GPT 0 in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt1: timer@610 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt2: timer@620 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt3: timer@630 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - timer@640 { - status = "disabled"; - }; - - timer@650 { - status = "disabled"; - }; - - timer@660 { - status = "disabled"; - }; - - timer@670 { - status = "disabled"; - }; - - rtc@800 { - status = "disabled"; - }; - - can@900 { - status = "disabled"; - }; - - can@980 { - status = "disabled"; - }; - - spi@f00 { - status = "disabled"; - }; - - usb@1000 { - status = "disabled"; - }; - - psc@2000 { // PSC1 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2200 { // PSC2 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2400 { // PSC3 - status = "disabled"; - }; - - psc@2600 { // PSC4 - status = "disabled"; - }; - - psc@2800 { // PSC5 - status = "disabled"; - }; - - psc@2c00 { // PSC6 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - compatible = "intel,lxt971"; - reg = <0>; - }; - }; - - i2c@3d00 { - status = "disabled"; - }; - - i2c@3d40 { - hwmon@2c { - compatible = "ad,adm9240"; - reg = <0x2c>; - }; - rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; - }; - }; - - pci@f0000d00 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x10 */ - 0x8000 0 0 1 &mpc5200_pic 0 3 3 - 0x8000 0 0 2 &mpc5200_pic 0 3 3 - 0x8000 0 0 3 &mpc5200_pic 0 2 3 - 0x8000 0 0 4 &mpc5200_pic 0 1 3 - >; - ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000 - 0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; - }; - - localbus { - ranges = <0 0 0xff800000 0x00800000 - 1 0 0x80000000 0x00800000 - 3 0 0x80000000 0x00800000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x00800000>; - bank-width = <4>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - partition@0 { - label = "DTS"; - reg = <0x0 0x00100000>; - }; - partition@100000 { - label = "Kernel"; - reg = <0x100000 0x00200000>; - }; - partition@300000 { - label = "RootFS"; - reg = <0x00300000 0x00200000>; - }; - partition@500000 { - label = "user"; - reg = <0x00500000 0x00200000>; - }; - partition@700000 { - label = "U-Boot"; - reg = <0x00700000 0x00040000>; - }; - partition@740000 { - label = "Env"; - reg = <0x00740000 0x00020000>; - }; - partition@760000 { - label = "red. Env"; - reg = <0x00760000 0x00020000>; - }; - partition@780000 { - label = "reserve"; - reg = <0x00780000 0x00080000>; - }; - }; - - simple100: gpio-controller-100@3,600100 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600100 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple104: gpio-controller-104@3,600104 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600104 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple200: gpio-controller-200@3,600200 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600200 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple201: gpio-controller-201@3,600201 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600201 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple202: gpio-controller-202@3,600202 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600202 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple203: gpio-controller-203@3,600203 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600203 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple204: gpio-controller-204@3,600204 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600204 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple206: gpio-controller-206@3,600206 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600206 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple207: gpio-controller-207@3,600207 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600207 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple20f: gpio-controller-20f@3,60020f { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x0060020f 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/obs600.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/obs600.dts deleted file mode 100644 index 18e7d79e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/obs600.dts +++ /dev/null @@ -1,314 +0,0 @@ -/* - * Device Tree Source for PlatHome OpenBlockS 600 (405EX) - * - * Copyright 2011 Ben Herrenschmidt, IBM Corp. - * - * Based on Kilauea by: - * - * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "PlatHome,OpenBlockS 600"; - compatible = "plathome,obs600"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405EX"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; /* 16 kB */ - d-cache-size = <16384>; /* 16 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic-405ex", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-405ex","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-405ex","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - CPM0: cpm { - compatible = "ibm,cpm"; - dcr-access-method = "native"; - dcr-reg = <0x0b0 0x003>; - unused-units = <0x00000000>; - idle-doze = <0x02000000>; - standby = <0xe3e74800>; - }; - - plb { - compatible = "ibm,plb-405ex", "ibm,plb4"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2"; - dcr-reg = <0x010 0x002>; - interrupt-parent = <&UIC2>; - interrupts = <0x5 0x4 /* ECC DED Error */ - 0x6 0x4>; /* ECC SEC Error */ - }; - - CRYPTO: crypto@ef700000 { - compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto"; - reg = <0xef700000 0x80400>; - interrupt-parent = <&UIC0>; - interrupts = <0x17 0x2>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-405ex", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x80000000 0x80000000 0x10000000 - 0xef600000 0xef600000 0x00a00000 - 0xf0000000 0xf0000000 0x10000000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-405ex", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x08000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel + initrd"; - reg = <0x00000000 0x03de0000>; - }; - partition@3de0000 { - label = "user config area"; - reg = <0x03de0000 0x00080000>; - }; - partition@3e60000 { - label = "user program area"; - reg = <0x03e60000 0x04000000>; - }; - partition@7e60000 { - label = "flat device tree"; - reg = <0x07e60000 0x00080000>; - }; - partition@7ee0000 { - label = "test program"; - reg = <0x07ee0000 0x00080000>; - }; - partition@7f60000 { - label = "u-boot env"; - reg = <0x07f60000 0x00040000>; - }; - partition@7fa0000 { - label = "u-boot"; - reg = <0x07fa0000 0x00060000>; - }; - }; - }; - - UART0: serial@ef600200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600200 0x00000008>; - virtual-reg = <0xef600200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1a 0x4>; - }; - - UART1: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600400 { - compatible = "ibm,iic-405ex", "ibm,iic"; - reg = <0xef600400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - - rtc@68 { - compatible = "dallas,ds1340"; - reg = <0x68>; - }; - }; - - IIC1: i2c@ef600500 { - compatible = "ibm,iic-405ex", "ibm,iic"; - reg = <0xef600500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - RGMII0: emac-rgmii@ef600b00 { - compatible = "ibm,rgmii-405ex", "ibm,rgmii"; - reg = <0xef600b00 0x00000104>; - has-mdio; - }; - - EMAC0: ethernet@ef600900 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 - /*Wake*/ 0x1 &UIC1 0x1d 0x4>; - reg = <0xef600900 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600a00 { - linux,network-index = <0x1>; - device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 - /*Wake*/ 0x1 &UIC1 0x1f 0x4>; - reg = <0xef600a00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - GPIO: gpio@ef600800 { - device_type = "gpio"; - compatible = "ibm,gpio-405ex", "ibm,ppc4xx-gpio"; - reg = <0xef600800 0x50>; - }; - }; - }; - chosen { - linux,stdout-path = "/plb/opb/serial@ef600200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb.dts deleted file mode 100644 index b868d229..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb.dts +++ /dev/null @@ -1,66 +0,0 @@ -/* - * P1010 RDB Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/p1010si-pre.dtsi" - -/ { - model = "fsl,P1010RDB"; - compatible = "fsl,P1010RDB"; - - memory { - device_type = "memory"; - }; - - board_ifc: ifc: ifc@ffe1e000 { - /* NOR, NAND Flashes and CPLD on board */ - ranges = <0x0 0x0 0x0 0xee000000 0x02000000 - 0x1 0x0 0x0 0xff800000 0x00010000 - 0x3 0x0 0x0 0xffb00000 0x00000020>; - reg = <0x0 0xffe1e000 0 0x2000>; - }; - - board_soc: soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - reg = <0 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1010rdb.dtsi" -/include/ "fsl/p1010si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb.dtsi deleted file mode 100644 index 49776143..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb.dtsi +++ /dev/null @@ -1,234 +0,0 @@ -/* - * P1010 RDB Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_ifc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR DTB Image"; - }; - - partition@80000 { - /* 7 MB for Linux Kernel Image */ - reg = <0x00080000 0x00700000>; - label = "NOR Linux Kernel Image"; - }; - - partition@800000 { - /* 20MB for JFFS2 based Root file System */ - reg = <0x00800000 0x01400000>; - label = "NOR JFFS2 Root File System"; - }; - - partition@1f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x01f00000 0x00100000>; - label = "NOR U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,ifc-nand"; - reg = <0x1 0x0 0x10000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND DTB Image"; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND Linux Kernel Image"; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND Compressed RFS Image"; - }; - - partition@a00000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00f00000>; - label = "NAND JFFS2 Root File System"; - }; - - partition@1900000 { - /* 7MB for User Area */ - reg = <0x01900000 0x00700000>; - label = "NAND User area"; - }; - }; - - cpld@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1010rdb-cpld"; - reg = <0x3 0x0 0x0000020>; - bank-width = <1>; - device-width = <1>; - }; -}; - -&board_soc { - i2c@3000 { - rtc@68 { - compatible = "pericom,pt7c4338"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; - - partition@0 { - /* 1MB for u-boot Bootloader Image */ - /* 1MB for Environment */ - reg = <0x0 0x00100000>; - label = "SPI Flash U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 512KB for DTB Image */ - reg = <0x00100000 0x00080000>; - label = "SPI Flash DTB Image"; - }; - - partition@180000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00180000 0x00400000>; - label = "SPI Flash Linux Kernel Image"; - }; - - partition@580000 { - /* 4MB for Compressed RFS Image */ - reg = <0x00580000 0x00400000>; - label = "SPI Flash Compressed RFSImage"; - }; - - partition@980000 { - /* 6.5MB for JFFS2 based RFS */ - reg = <0x00980000 0x00680000>; - label = "SPI Flash JFFS2 RFS"; - }; - }; - }; - - usb@22000 { - phy_type = "utmi"; - dr_mode = "host"; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x1>; - }; - - phy1: ethernet-phy@1 { - interrupts = <2 1 0 0>; - reg = <0x0>; - }; - - phy2: ethernet-phy@2 { - interrupts = <2 1 0 0>; - reg = <0x2>; - }; - - tbi-phy@3 { - device_type = "tbi-phy"; - reg = <0x3>; - }; - }; - - mdio@25000 { - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26000 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy1>; - tbi-handle = <&tbi0>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy2>; - tbi-handle = <&tbi1>; - phy-connection-type = "sgmii"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb_36b.dts deleted file mode 100644 index 64776f4a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb_36b.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* - * P1010 RDB Device Tree Source (36-bit address map) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1010si-pre.dtsi" - -/ { - model = "fsl,P1010RDB"; - compatible = "fsl,P1010RDB"; - - memory { - device_type = "memory"; - }; - - board_ifc: ifc: ifc@fffe1e000 { - /* NOR, NAND Flashes and CPLD on board */ - ranges = <0x0 0x0 0xf 0xee000000 0x02000000 - 0x1 0x0 0xf 0xff800000 0x00010000 - 0x3 0x0 0xf 0xffb00000 0x00000020>; - reg = <0xf 0xffe1e000 0 0x2000>; - }; - - board_soc: soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1010rdb.dtsi" -/include/ "fsl/p1010si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc.dtsi deleted file mode 100644 index a24699cf..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc.dtsi +++ /dev/null @@ -1,151 +0,0 @@ -/* - * P1020 MBG-PC Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x4000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* 128KB for DTB Image */ - reg = <0x0 0x00020000>; - label = "NOR DTB Image"; - }; - - partition@20000 { - /* 3.875 MB for Linux Kernel Image */ - reg = <0x00020000 0x003e0000>; - label = "NOR Linux Kernel Image"; - }; - - partition@400000 { - /* 58MB for Root file System */ - reg = <0x00400000 0x03a00000>; - label = "NOR Root File System"; - }; - - partition@3e00000 { - /* This location must not be altered */ - /* 1M for Vitesse 7385 Switch firmware */ - reg = <0x3e00000 0x00100000>; - label = "NOR Vitesse-7385 Firmware"; - read-only; - }; - - partition@3f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x03f00000 0x00100000>; - label = "NOR U-Boot Image"; - read-only; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; -}; - -&soc { - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <2 1 0 0>; - reg = <0x1>; - }; - }; - - mdio@25000 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26000 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi1>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - /* USB2 is shared with localbus, so it must be disabled - by default. We can't put 'status = "disabled";' here - since U-Boot doesn't clear the status property when - it enables USB2. OTOH, U-Boot does create a new node - when there isn't any. So, just comment it out. - */ - usb@23000 { - status = "disabled"; - phy_type = "ulpi"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts deleted file mode 100644 index ab8f076e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* - * P1020 MBG-PC Device Tree Source (32-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020MBG-PC"; - compatible = "fsl,P1020MBG-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0x0 0xffe05000 0x0 0x1000>; - - /* NOR and L2 switch */ - ranges = <0x0 0x0 0x0 0xec000000 0x04000000 - 0x1 0x0 0x0 0xffa00000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000>; - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - reg = <0x0 0xffe09000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0x0 0xffe0a000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020mbg-pc.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts deleted file mode 100644 index 9e9f4014..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* - * P1020 MBG-PC Device Tree Source (36-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020MBG-PC"; - compatible = "fsl,P1020MBG-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0x0 0x1000>; - - /* NOR and L2 switch */ - ranges = <0x0 0x0 0xf 0xec000000 0x04000000 - 0x1 0x0 0xf 0xffa00000 0x00040000 - 0x2 0x0 0xf 0xffb00000 0x00020000>; - }; - - soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - reg = <0xf 0xffe09000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020mbg-pc.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc.dtsi deleted file mode 100644 index c952cd37..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc.dtsi +++ /dev/null @@ -1,247 +0,0 @@ -/* - * P1020 RDB-PC Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR DTB Image"; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR Linux Kernel Image"; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1020-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND DTB Image"; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND Linux Kernel Image"; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND Compressed RFS Image"; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00f00000>; - label = "NAND Writable User area"; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; - - cpld@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cpld"; - reg = <0x3 0x0 0x20000>; - read-only; - }; -}; - -&soc { - i2c@3000 { - rtc@68 { - compatible = "pericom,pt7c4338"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - - partition@u-boot { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "u-boot"; - read-only; - }; - - partition@dtb { - /* 512KB for DTB Image*/ - reg = <0x00080000 0x00080000>; - label = "dtb"; - }; - - partition@kernel { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "kernel"; - }; - - partition@fs { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "file system"; - }; - - partition@jffs-fs { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "file system jffs2"; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - /* USB2 is shared with localbus, so it must be disabled - by default. We can't put 'status = "disabled";' here - since U-Boot doesn't clear the status property when - it enables USB2. OTOH, U-Boot does create a new node - when there isn't any. So, just comment it out. - usb@23000 { - phy_type = "ulpi"; - }; - */ - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x1>; - }; - - tbi0: tbi-phy@11 { - device_type = "tbi-phy"; - reg = <0x11>; - }; - }; - - mdio@25000 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi1>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_32b.dts deleted file mode 100644 index 4de69b72..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_32b.dts +++ /dev/null @@ -1,90 +0,0 @@ -/* - * P1020 RDB-PC Device Tree Source (32-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020RDB-PC"; - compatible = "fsl,P1020RDB-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xff800000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000 - 0x3 0x0 0x0 0xffa00000 0x00020000>; - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - reg = <0 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020rdb-pc.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts deleted file mode 100644 index 5237da74..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts +++ /dev/null @@ -1,90 +0,0 @@ -/* - * P1020 RDB-PC Device Tree Source (36-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020RDB-PC"; - compatible = "fsl,P1020RDB-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0xf 0xef000000 0x01000000 - 0x1 0x0 0xf 0xff800000 0x00040000 - 0x2 0x0 0xf 0xffb00000 0x00040000 - 0x3 0x0 0xf 0xffa00000 0x00020000>; - }; - - soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020rdb-pc.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts deleted file mode 100644 index f4115159..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts +++ /dev/null @@ -1,64 +0,0 @@ -/* - * P1020 RDB-PC Core0 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb, - * eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi. - * - * Please note to add "-b 0" for core0's dts compiling. - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "p1020rdb-pc_32b.dts" - -/ { - model = "fsl,P1020RDB-PC"; - compatible = "fsl,P1020RDB-PC"; - - aliases { - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - PowerPC,P1020@1 { - status = "disabled"; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc@ffe00000 { - serial1: serial@4600 { - status = "disabled"; - }; - - enet0: ethernet@b0000 { - status = "disabled"; - }; - - mpic: pic@40000 { - protected-sources = < - 42 29 30 34 /* serial1, enet0-queue-group0 */ - 17 18 24 45 /* enet0-queue-group1, crypto */ - >; - pic-no-reset; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts deleted file mode 100644 index a91335ad..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts +++ /dev/null @@ -1,142 +0,0 @@ -/* - * P1020 RDB-PC Core1 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts allows core1 to have l2, eth0, crypto. - * - * Please note to add "-b 1" for core1's dts compiling. - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "p1020rdb-pc_32b.dts" - -/ { - model = "fsl,P1020RDB-PC"; - compatible = "fsl,P1020RDB-PC"; - - aliases { - ethernet0 = &enet0; - serial0 = &serial1; - }; - - cpus { - PowerPC,P1020@0 { - status = "disabled"; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc@ffe00000 { - ecm-law@0 { - status = "disabled"; - }; - - ecm@1000 { - status = "disabled"; - }; - - memory-controller@2000 { - status = "disabled"; - }; - - i2c@3000 { - status = "disabled"; - }; - - i2c@3100 { - status = "disabled"; - }; - - serial0: serial@4500 { - status = "disabled"; - }; - - spi@7000 { - status = "disabled"; - }; - - gpio: gpio-controller@f000 { - status = "disabled"; - }; - - dma@21300 { - status = "disabled"; - }; - - mdio@24000 { - status = "disabled"; - }; - - mdio@25000 { - status = "disabled"; - }; - - enet1: ethernet@b1000 { - status = "disabled"; - }; - - enet2: ethernet@b2000 { - status = "disabled"; - }; - - usb@22000 { - status = "disabled"; - }; - - sdhci@2e000 { - status = "disabled"; - }; - - mpic: pic@40000 { - protected-sources = < - 16 /* ecm, mem, L2, pci0, pci1 */ - 43 42 59 /* i2c, serial0, spi */ - 47 63 62 /* gpio, tdm */ - 20 21 22 23 /* dma */ - 03 02 /* mdio */ - 35 36 40 /* enet1-queue-group0 */ - 51 52 67 /* enet1-queue-group1 */ - 31 32 33 /* enet2-queue-group0 */ - 25 26 27 /* enet2-queue-group1 */ - 28 72 58 /* usb, sdhci, crypto */ - 0xb0 0xb1 0xb2 /* message */ - 0xb3 0xb4 0xb5 - 0xb6 0xb7 - 0xe0 0xe1 0xe2 /* msi */ - 0xe3 0xe4 0xe5 - 0xe6 0xe7 /* sdhci, crypto , pci */ - >; - pic-no-reset; - }; - - msi@41600 { - status = "disabled"; - }; - - global-utilities@e0000 { //global utilities block - status = "disabled"; - }; - }; - - pci0: pcie@ffe09000 { - status = "disabled"; - }; - - pci1: pcie@ffe0a000 { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb.dts deleted file mode 100644 index 518bf99b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb.dts +++ /dev/null @@ -1,66 +0,0 @@ -/* - * P1020 RDB Device Tree Source - * - * Copyright 2009-2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020RDB"; - compatible = "fsl,P1020RDB"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xffa00000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000>; - }; - - board_soc: soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - reg = <0 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020rdb.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb.dtsi deleted file mode 100644 index 1fb7e0e0..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb.dtsi +++ /dev/null @@ -1,246 +0,0 @@ -/* - * P1020 RDB Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR (RO) Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR (RO) DTB Image"; - read-only; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR (RO) Linux Kernel Image"; - read-only; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR (RW) JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR (RO) U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1020-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND (RO) U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND (RO) DTB Image"; - read-only; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND (RO) Linux Kernel Image"; - read-only; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND (RO) Compressed RFS Image"; - read-only; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND (RW) JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00f00000>; - label = "NAND (RW) Writable User area"; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; -}; - -&board_soc { - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - - partition@u-boot { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "u-boot"; - read-only; - }; - - partition@dtb { - /* 512KB for DTB Image */ - reg = <0x00080000 0x00080000>; - label = "dtb"; - read-only; - }; - - partition@kernel { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "kernel"; - read-only; - }; - - partition@fs { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "file system"; - read-only; - }; - - partition@jffs-fs { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "file system jffs2"; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - dr_mode = "host"; - }; - - /* USB2 is shared with localbus. It is used - only in case of SPI and SD boot after - appropriate device-tree fixup done by uboot */ - usb@23000 { - phy_type = "ulpi"; - dr_mode = "host"; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x1>; - }; - - tbi-phy@2 { - device_type = "tbi-phy"; - reg = <0x2>; - }; - }; - - mdio@25000 { - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi0>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_36b.dts deleted file mode 100644 index bdbdb609..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_36b.dts +++ /dev/null @@ -1,66 +0,0 @@ -/* - * P1020 RDB Device Tree Source (36-bit address map) - * - * Copyright 2009-2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020RDB"; - compatible = "fsl,P1020RDB"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0xf 0xef000000 0x01000000 - 0x1 0x0 0xf 0xffa00000 0x00040000 - 0x2 0x0 0xf 0xffb00000 0x00020000>; - }; - - board_soc: soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020rdb.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts deleted file mode 100644 index 41b4585c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts +++ /dev/null @@ -1,63 +0,0 @@ -/* - * P1020 RDB Core0 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb, - * eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi. - * - * Please note to add "-b 0" for core0's dts compiling. - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "p1020rdb.dts" - -/ { - model = "fsl,P1020RDB"; - compatible = "fsl,P1020RDB", "fsl,MPC85XXRDB-CAMP"; - - aliases { - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - PowerPC,P1020@1 { - status = "disabled"; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc@ffe00000 { - serial1: serial@4600 { - status = "disabled"; - }; - - enet0: ethernet@b0000 { - status = "disabled"; - }; - - mpic: pic@40000 { - protected-sources = < - 42 29 30 34 /* serial1, enet0-queue-group0 */ - 17 18 24 45 /* enet0-queue-group1, crypto */ - >; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts deleted file mode 100644 index 51745382..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts +++ /dev/null @@ -1,141 +0,0 @@ -/* - * P1020 RDB Core1 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts allows core1 to have l2, eth0, crypto. - * - * Please note to add "-b 1" for core1's dts compiling. - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "p1020rdb.dts" - -/ { - model = "fsl,P1020RDB"; - compatible = "fsl,P1020RDB", "fsl,MPC85XXRDB-CAMP"; - - aliases { - ethernet0 = &enet0; - serial0 = &serial1; - }; - - cpus { - PowerPC,P1020@0 { - status = "disabled"; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc@ffe00000 { - ecm-law@0 { - status = "disabled"; - }; - - ecm@1000 { - status = "disabled"; - }; - - memory-controller@2000 { - status = "disabled"; - }; - - i2c@3000 { - status = "disabled"; - }; - - i2c@3100 { - status = "disabled"; - }; - - serial0: serial@4500 { - status = "disabled"; - }; - - spi@7000 { - status = "disabled"; - }; - - gpio: gpio-controller@f000 { - status = "disabled"; - }; - - dma@21300 { - status = "disabled"; - }; - - mdio@24000 { - status = "disabled"; - }; - - mdio@25000 { - status = "disabled"; - }; - - enet1: ethernet@b1000 { - status = "disabled"; - }; - - enet2: ethernet@b2000 { - status = "disabled"; - }; - - usb@22000 { - status = "disabled"; - }; - - sdhci@2e000 { - status = "disabled"; - }; - - mpic: pic@40000 { - protected-sources = < - 16 /* ecm, mem, L2, pci0, pci1 */ - 43 42 59 /* i2c, serial0, spi */ - 47 63 62 /* gpio, tdm */ - 20 21 22 23 /* dma */ - 03 02 /* mdio */ - 35 36 40 /* enet1-queue-group0 */ - 51 52 67 /* enet1-queue-group1 */ - 31 32 33 /* enet2-queue-group0 */ - 25 26 27 /* enet2-queue-group1 */ - 28 72 58 /* usb, sdhci, crypto */ - 0xb0 0xb1 0xb2 /* message */ - 0xb3 0xb4 0xb5 - 0xb6 0xb7 - 0xe0 0xe1 0xe2 /* msi */ - 0xe3 0xe4 0xe5 - 0xe6 0xe7 /* sdhci, crypto , pci */ - >; - }; - - msi@41600 { - status = "disabled"; - }; - - global-utilities@e0000 { //global utilities block - status = "disabled"; - }; - }; - - pci0: pcie@ffe09000 { - status = "disabled"; - }; - - pci1: pcie@ffe0a000 { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc.dtsi deleted file mode 100644 index 7ea85eab..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc.dtsi +++ /dev/null @@ -1,140 +0,0 @@ -/* - * P1020 UTM-PC Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* 256KB for DTB Image */ - reg = <0x0 0x00040000>; - label = "NOR DTB Image"; - }; - - partition@40000 { - /* 3.75 MB for Linux Kernel Image */ - reg = <0x00040000 0x003c0000>; - label = "NOR Linux Kernel Image"; - }; - - partition@400000 { - /* 27MB for Root file System */ - reg = <0x00400000 0x01b00000>; - label = "NOR Root File System"; - }; - - partition@1f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x01f00000 0x00100000>; - label = "NOR U-Boot Image"; - read-only; - }; - }; -}; - -&soc { - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <2 1 0 0>; - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - interrupts = <1 1 0 0>; - reg = <0x2>; - }; - }; - - mdio@25000 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26000 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi1>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - /* USB2 is shared with localbus, so it must be disabled - by default. We can't put 'status = "disabled";' here - since U-Boot doesn't clear the status property when - it enables USB2. OTOH, U-Boot does create a new node - when there isn't any. So, just comment it out. - */ - usb@23000 { - status = "disabled"; - phy_type = "ulpi"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc_32b.dts deleted file mode 100644 index 4bfdd897..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc_32b.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* - * P1020 UTM-PC Device Tree Source (32-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020UTM-PC"; - compatible = "fsl,P1020UTM-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0x0 0xffe05000 0x0 0x1000>; - - /* NOR */ - ranges = <0x0 0x0 0x0 0xec000000 0x02000000 - 0x1 0x0 0x0 0xffa00000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000>; - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - reg = <0x0 0xffe09000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0x0 0xffe0a000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020utm-pc.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc_36b.dts deleted file mode 100644 index abec5355..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc_36b.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* - * P1020 UTM-PC Device Tree Source (36-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020UTM-PC"; - compatible = "fsl,P1020UTM-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0x0 0x1000>; - - /* NOR */ - ranges = <0x0 0x0 0xf 0xec000000 0x02000000 - 0x1 0x0 0xf 0xffa00000 0x00040000 - 0x2 0x0 0xf 0xffb00000 0x00020000>; - }; - - soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - reg = <0xf 0xffe09000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020utm-pc.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021mds.dts deleted file mode 100644 index 97116f19..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021mds.dts +++ /dev/null @@ -1,325 +0,0 @@ -/* - * P1021 MDS Device Tree Source - * - * Copyright 2010,2012 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/p1021si-pre.dtsi" -/ { - model = "fsl,P1021"; - compatible = "fsl,P1021MDS"; - - aliases { - ethernet3 = &enet3; - ethernet4 = &enet4; - }; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0x0 0xffe05000 0x0 0x1000>; - - /* NAND Flash, BCSR, PMC0/1*/ - ranges = <0x0 0x0 0x0 0xfc000000 0x02000000 - 0x1 0x0 0x0 0xf8000000 0x00008000 - 0x2 0x0 0x0 0xf8010000 0x00020000 - 0x3 0x0 0x0 0xf8020000 0x00020000>; - - nand@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1021-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x0 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND (RO) U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND (RO) DTB Image"; - read-only; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND (RO) Linux Kernel Image"; - read-only; - }; - - partition@600000 { - /* 5MB for Compressed Root file System Image */ - reg = <0x00600000 0x00500000>; - label = "NAND (RO) Compressed RFS Image"; - read-only; - }; - - partition@b00000 { - /* 6MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00600000>; - label = "NAND (RW) JFFS2 Root File System"; - }; - - partition@1100000 { - /* 14MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00e00000>; - label = "NAND (RW) Writable User area"; - }; - - partition@1f00000 { - /* 1MB for microcode */ - reg = <0x01f00000 0x00100000>; - label = "NAND (RO) QE Ucode"; - read-only; - }; - }; - - bcsr@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1021mds-bcsr"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - }; - - pib@2,0 { - compatible = "fsl,p1021mds-pib"; - reg = <2 0 0x10000>; - }; - - pib@3,0 { - compatible = "fsl,p1021mds-pib"; - reg = <3 0 0x10000>; - }; - }; - - soc: soc@ffe00000 { - compatible = "fsl,p1021-immr", "simple-bus"; - ranges = <0x0 0x0 0xffe00000 0x100000>; - - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - spi@7000 { - - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - - partition@u-boot { - label = "u-boot-spi"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel-spi"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb-spi"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system-spi"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - dr_mode = "host"; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupts = <1 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <2 1 0 0>; - reg = <0x1>; - }; - phy4: ethernet-phy@4 { - reg = <0x4>; - }; - tbi-phy@5 { - device_type = "tbi-phy"; - reg = <0x5>; - }; - }; - - mdio@25000 { - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - ethernet@b0000 { - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - ethernet@b1000 { - phy-handle = <&phy4>; - tbi-handle = <&tbi0>; - phy-connection-type = "sgmii"; - }; - - ethernet@b2000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - par_io@e0100 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xe0100 0x60>; - ranges = <0x0 0xe0100 0x60>; - device_type = "par_io"; - num-ports = <3>; - pio1: ucc_pin@01 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */ - 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */ - 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */ - 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */ - 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */ - 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */ - 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */ - 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */ - 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */ - 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */ - 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */ - 0x0 0x5 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */ - 0x0 0xd 0x1 0x0 0x2 0x0 /* ENET1_TX_ER */ - 0x0 0x4 0x2 0x0 0x2 0x0 /* ENET1_RX_DV_SER1_CTS_B */ - 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RX_ER_SER1_CD_B */ - 0x0 0x11 0x2 0x0 0x2 0x0 /* ENET1_CRS */ - 0x0 0x10 0x2 0x0 0x2 0x0>; /* ENET1_COL */ - }; - - pio2: ucc_pin@02 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */ - 0x1 0xb 0x2 0x0 0x1 0x0 /* CLK13 */ - 0x1 0x7 0x1 0x0 0x2 0x0 /* ENET5_TXD0_SER5_TXD0 */ - 0x1 0xa 0x1 0x0 0x2 0x0 /* ENET5_TXD1_SER5_TXD1 */ - 0x1 0x6 0x2 0x0 0x2 0x0 /* ENET5_RXD0_SER5_RXD0 */ - 0x1 0x9 0x2 0x0 0x2 0x0 /* ENET5_RXD1_SER5_RXD1 */ - 0x1 0x5 0x1 0x0 0x2 0x0 /* ENET5_TX_EN_SER5_RTS_B */ - 0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */ - 0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */ - }; - }; - }; - - pci0: pcie@ffe09000 { - reg = <0 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - qe: qe@ffe80000 { - ranges = <0x0 0x0 0xffe80000 0x40000>; - reg = <0 0xffe80000 0 0x480>; - brg-frequency = <0>; - bus-frequency = <0>; - status = "disabled"; /* no firmware loaded */ - - enet3: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "clk12"; - tx-clock-name = "clk9"; - pio-handle = <&pio1>; - phy-handle = <&qe_phy0>; - phy-connection-type = "mii"; - }; - - mdio@2120 { - qe_phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <4 1 0 0>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - qe_phy1: ethernet-phy@03 { - interrupt-parent = <&mpic>; - interrupts = <5 1 0 0>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet4: ucc@2400 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk13"; - pio-handle = <&pio2>; - phy-handle = <&qe_phy1>; - phy-connection-type = "rmii"; - }; - }; -}; - -/include/ "fsl/p1021si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb.dts deleted file mode 100644 index 90b6b4ca..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb.dts +++ /dev/null @@ -1,96 +0,0 @@ -/* - * P1021 RDB Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1021si-pre.dtsi" -/ { - model = "fsl,P1021RDB"; - compatible = "fsl,P1021RDB-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xff800000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000>; - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - reg = <0 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - qe: qe@ffe80000 { - ranges = <0x0 0x0 0xffe80000 0x40000>; - reg = <0 0xffe80000 0 0x480>; - brg-frequency = <0>; - bus-frequency = <0>; - }; -}; - -/include/ "p1021rdb.dtsi" -/include/ "fsl/p1021si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb.dtsi deleted file mode 100644 index b973461a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb.dtsi +++ /dev/null @@ -1,236 +0,0 @@ -/* - * P1021 RDB Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR DTB Image"; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR Linux Kernel Image"; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR U-Boot Image"; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1021-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND DTB Image"; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND Linux Kernel Image"; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND Compressed RFS Image"; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for User Writable Area */ - reg = <0x01100000 0x00f00000>; - label = "NAND Writable User area"; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; -}; - -&soc { - i2c@3000 { - rtc@68 { - compatible = "pericom,pt7c4338"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - - partition@u-boot { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "SPI Flash U-Boot Image"; - read-only; - }; - - partition@dtb { - /* 512KB for DTB Image */ - reg = <0x00080000 0x00080000>; - label = "SPI Flash DTB Image"; - }; - - partition@kernel { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "SPI Flash Linux Kernel Image"; - }; - - partition@fs { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "SPI Flash Compressed RFSImage"; - }; - - partition@jffs-fs { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "SPI Flash JFFS2 RFS"; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <3 1 0 0>; - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <2 1 0 0>; - reg = <0x1>; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@25000 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26000 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi1>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy1>; - tbi-handle = <&tbi2>; - phy-connection-type = "rgmii-id"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb_36b.dts deleted file mode 100644 index ea6d8b5f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb_36b.dts +++ /dev/null @@ -1,96 +0,0 @@ -/* - * P1021 RDB Device Tree Source (36-bit address map) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1021si-pre.dtsi" -/ { - model = "fsl,P1021RDB"; - compatible = "fsl,P1021RDB-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0xf 0xef000000 0x01000000 - 0x1 0x0 0xf 0xff800000 0x00040000 - 0x2 0x0 0xf 0xffb00000 0x00020000>; - }; - - soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - reg = <0xf 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - qe: qe@fffe80000 { - ranges = <0x0 0xf 0xffe80000 0x40000>; - reg = <0xf 0xffe80000 0 0x480>; - brg-frequency = <0>; - bus-frequency = <0>; - }; -}; - -/include/ "p1021rdb.dtsi" -/include/ "fsl/p1021si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds.dtsi deleted file mode 100644 index 7cdb5050..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds.dtsi +++ /dev/null @@ -1,234 +0,0 @@ -/* - * P1022 DS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_lbc { - /* - * This node is used to access the pixis via "indirect" mode, - * which is done by writing the pixis register index to chip - * select 0 and the value to/from chip select 1. Indirect - * mode is the only way to access the pixis when DIU video - * is enabled. Note that this assumes that the first column - * of the 'ranges' property above is the chip select number. - */ - board-control@0,0 { - compatible = "fsl,p1022ds-indirect-pixis"; - reg = <0x0 0x0 1 /* CS0 */ - 0x1 0x0 1>; /* CS1 */ - interrupt-parent = <&mpic>; - interrupts = <8 0 0 0>; - }; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - reg = <0x0 0x03000000>; - label = "ramdisk-nor"; - read-only; - }; - - partition@3000000 { - reg = <0x03000000 0x00e00000>; - label = "diagnostic-nor"; - read-only; - }; - - partition@3e00000 { - reg = <0x03e00000 0x00200000>; - label = "dink-nor"; - read-only; - }; - - partition@4000000 { - reg = <0x04000000 0x00400000>; - label = "kernel-nor"; - read-only; - }; - - partition@4400000 { - reg = <0x04400000 0x03b00000>; - label = "jffs2-nor"; - }; - - partition@7f00000 { - reg = <0x07f00000 0x00080000>; - label = "dtb-nor"; - read-only; - }; - - partition@7f80000 { - reg = <0x07f80000 0x00080000>; - label = "u-boot-nor"; - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - reg = <0x0 0x02000000>; - label = "u-boot-nand"; - read-only; - }; - - partition@2000000 { - reg = <0x02000000 0x10000000>; - label = "jffs2-nand"; - }; - - partition@12000000 { - reg = <0x12000000 0x10000000>; - label = "ramdisk-nand"; - read-only; - }; - - partition@22000000 { - reg = <0x22000000 0x04000000>; - label = "kernel-nand"; - }; - - partition@26000000 { - reg = <0x26000000 0x01000000>; - label = "dtb-nand"; - read-only; - }; - - partition@27000000 { - reg = <0x27000000 0x19000000>; - label = "reserved-nand"; - }; - }; - - board-control@3,0 { - compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis"; - reg = <3 0 0x30>; - interrupt-parent = <&mpic>; - /* - * IRQ8 is generated if the "EVENT" switch is pressed - * and PX_CTL[EVESEL] is set to 00. - */ - interrupts = <8 0 0 0>; - }; -}; - -&board_soc { - i2c@3100 { - wm8776:codec@1a { - compatible = "wlf,wm8776"; - reg = <0x1a>; - /* - * clock-frequency will be set by U-Boot if - * the clock is enabled. - */ - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - - partition@0 { - label = "u-boot-spi"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@100000 { - label = "kernel-spi"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@600000 { - label = "dtb-spi"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@700000 { - label = "file system-spi"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - ssi@15000 { - fsl,mode = "i2s-slave"; - codec-handle = <&wm8776>; - fsl,ssi-asynchronous; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - usb@23000 { - status = "disabled"; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x1>; - }; - phy1: ethernet-phy@1 { - interrupts = <9 1 0 0>; - reg = <0x2>; - }; - tbi-phy@2 { - device_type = "tbi-phy"; - reg = <0x2>; - }; - }; - - ethernet@b0000 { - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - ethernet@b1000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds_32b.dts deleted file mode 100644 index d96cae00..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds_32b.dts +++ /dev/null @@ -1,103 +0,0 @@ -/* - * P1022 DS 32-bit Physical Address Map Device Tree Source - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1022si-pre.dtsi" -/ { - model = "fsl,P1022DS"; - compatible = "fsl,P1022DS"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@ffe05000 { - ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 - 0x1 0x0 0x0 0xe0000000 0x08000000 - 0x2 0x0 0x0 0xff800000 0x00040000 - 0x3 0x0 0x0 0xffdf0000 0x00008000>; - reg = <0x0 0xffe05000 0 0x1000>; - }; - - board_soc: soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - reg = <0x0 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - ranges = <0x2000000 0x0 0xe0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; - reg = <0 0xffe0a000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci2: pcie@ffe0b000 { - ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - reg = <0 0xffe0b000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "fsl/p1022si-post.dtsi" -/include/ "p1022ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds_36b.dts deleted file mode 100644 index f7aacce4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds_36b.dts +++ /dev/null @@ -1,103 +0,0 @@ -/* - * P1022 DS 36-bit Physical Address Map Device Tree Source - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1022si-pre.dtsi" -/ { - model = "fsl,P1022DS"; - compatible = "fsl,P1022DS"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@fffe05000 { - ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 - 0x1 0x0 0xf 0xe0000000 0x08000000 - 0x2 0x0 0xf 0xff800000 0x00040000 - 0x3 0x0 0xf 0xffdf0000 0x00008000>; - reg = <0xf 0xffe05000 0 0x1000>; - }; - - board_soc: soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - reg = <0xf 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>; - reg = <0xf 0xffe0a000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci2: pcie@fffe0b000 { - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - reg = <0xf 0xffe0b000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "fsl/p1022si-post.dtsi" -/include/ "p1022ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1023rds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1023rds.dts deleted file mode 100644 index beb6cb12..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1023rds.dts +++ /dev/null @@ -1,219 +0,0 @@ -/* - * P1023 RDS Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Author: Roy Zang <tie-fei.zang@freescale.com> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1023si-pre.dtsi" - -/ { - model = "fsl,P1023"; - compatible = "fsl,P1023RDS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - memory { - device_type = "memory"; - }; - - soc: soc@ff600000 { - ranges = <0x0 0x0 0xff600000 0x200000>; - - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - spi@7000 { - fsl_dataflash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "atmel,at45db081d"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - /* 512KB for u-boot Bootloader Image */ - label = "u-boot-spi"; - reg = <0x00000000 0x00080000>; - read-only; - }; - partition@dtb { - /* 512KB for DTB Image */ - label = "dtb-spi"; - reg = <0x00080000 0x00080000>; - read-only; - }; - }; - }; - - usb@22000 { - dr_mode = "host"; - phy_type = "ulpi"; - }; - }; - - lbc: localbus@ff605000 { - reg = <0 0xff605000 0 0x1000>; - - /* NOR Flash, BCSR */ - ranges = <0x0 0x0 0x0 0xee000000 0x02000000 - 0x1 0x0 0x0 0xe0000000 0x00008000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x02000000>; - bank-width = <2>; - device-width = <1>; - partition@0 { - label = "ramdisk"; - reg = <0x00000000 0x01c00000>; - }; - partition@1c00000 { - label = "kernel"; - reg = <0x01c00000 0x002e0000>; - }; - partiton@1ee0000 { - label = "dtb"; - reg = <0x01ee0000 0x00020000>; - }; - partition@1f00000 { - label = "firmware"; - reg = <0x01f00000 0x00080000>; - read-only; - }; - partition@1f80000 { - label = "u-boot"; - reg = <0x01f80000 0x00080000>; - read-only; - }; - }; - - fpga@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1023rds-fpga"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - - bcsr@20 { - compatible = "fsl,p1023rds-bcsr"; - reg = <0x20 0x20>; - }; - }; - }; - - pci0: pcie@ff60a000 { - reg = <0 0xff60a000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; - pcie@0 { - /* IRQ[0:3] are pulled up on board, set to active-low */ - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 0 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - board_pci1: pci1: pcie@ff609000 { - reg = <0 0xff609000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - pcie@0 { - /* - * IRQ[4:6] only for PCIe, set to active-high, - * IRQ[7] is pulled up on board, set to active-low - */ - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 4 2 0 0 - 0000 0 0 2 &mpic 5 2 0 0 - 0000 0 0 3 &mpic 6 2 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci2: pcie@ff60b000 { - reg = <0 0xff60b000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - /* - * IRQ[8:10] are pulled up on board, set to active-low - * IRQ[11] only for PCIe, set to active-high, - */ - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 8 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 2 0 0 - >; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "fsl/p1023si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb.dtsi deleted file mode 100644 index cf3676fc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb.dtsi +++ /dev/null @@ -1,286 +0,0 @@ -/* - * P1025 RDB Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR DTB Image"; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR Linux Kernel Image"; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1025-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND DTB Image"; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND Linux Kernel Image"; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND Compressed RFS Image"; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00f00000>; - label = "NAND Writable User area"; - }; - }; - -}; - -&soc { - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - - partition@u-boot { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "u-boot"; - read-only; - }; - - partition@dtb { - /* 512KB for DTB Image */ - reg = <0x00080000 0x00080000>; - label = "dtb"; - }; - - partition@kernel { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "kernel"; - }; - - partition@fs { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "file system"; - }; - - partition@jffs-fs { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "file system jffs2"; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - /* USB2 is shared with localbus, so it must be disabled - by default. We can't put 'status = "disabled";' here - since U-Boot doesn't clear the status property when - it enables USB2. OTOH, U-Boot does create a new node - when there isn't any. So, just comment it out. - usb@23000 { - phy_type = "ulpi"; - }; - */ - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x1>; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@25000 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26000 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi1>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - par_io@e0100 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xe0100 0x60>; - ranges = <0x0 0xe0100 0x60>; - device_type = "par_io"; - num-ports = <3>; - pio1: ucc_pin@01 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */ - 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */ - 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */ - 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */ - 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */ - 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */ - 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */ - 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */ - 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */ - 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */ - 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */ - 0x0 0x5 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */ - 0x0 0xd 0x1 0x0 0x2 0x0 /* ENET1_TX_ER */ - 0x0 0x4 0x2 0x0 0x2 0x0 /* ENET1_RX_DV_SER1_CTS_B */ - 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RX_ER_SER1_CD_B */ - 0x0 0x11 0x2 0x0 0x2 0x0 /* ENET1_CRS */ - 0x0 0x10 0x2 0x0 0x2 0x0>; /* ENET1_COL */ - }; - - pio2: ucc_pin@02 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */ - 0x1 0xb 0x2 0x0 0x1 0x0 /* CLK13 */ - 0x1 0x7 0x1 0x0 0x2 0x0 /* ENET5_TXD0_SER5_TXD0 */ - 0x1 0xa 0x1 0x0 0x2 0x0 /* ENET5_TXD1_SER5_TXD1 */ - 0x1 0x6 0x2 0x0 0x2 0x0 /* ENET5_RXD0_SER5_RXD0 */ - 0x1 0x9 0x2 0x0 0x2 0x0 /* ENET5_RXD1_SER5_RXD1 */ - 0x1 0x5 0x1 0x0 0x2 0x0 /* ENET5_TX_EN_SER5_RTS_B */ - 0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */ - 0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */ - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb_32b.dts deleted file mode 100644 index ac5729c1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb_32b.dts +++ /dev/null @@ -1,135 +0,0 @@ -/* - * P1025 RDB Device Tree Source (32-bit address map) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1021si-pre.dtsi" -/ { - model = "fsl,P1025RDB"; - compatible = "fsl,P1025RDB"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xff800000 0x00040000>; - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - reg = <0 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - qe: qe@ffe80000 { - ranges = <0x0 0x0 0xffe80000 0x40000>; - reg = <0 0xffe80000 0 0x480>; - brg-frequency = <0>; - bus-frequency = <0>; - status = "disabled"; /* no firmware loaded */ - - enet3: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - rx-clock-name = "clk12"; - tx-clock-name = "clk9"; - pio-handle = <&pio1>; - phy-handle = <&qe_phy0>; - phy-connection-type = "mii"; - }; - - mdio@2120 { - qe_phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <4 1 0 0>; - reg = <0x6>; - device_type = "ethernet-phy"; - }; - qe_phy1: ethernet-phy@03 { - interrupt-parent = <&mpic>; - interrupts = <5 1 0 0>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet4: ucc@2400 { - device_type = "network"; - compatible = "ucc_geth"; - rx-clock-name = "none"; - tx-clock-name = "clk13"; - pio-handle = <&pio2>; - phy-handle = <&qe_phy1>; - phy-connection-type = "rmii"; - }; - }; -}; - -/include/ "p1025rdb.dtsi" -/include/ "fsl/p1021si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb_36b.dts deleted file mode 100644 index 4ce4bfa0..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb_36b.dts +++ /dev/null @@ -1,88 +0,0 @@ -/* - * P1025 RDB Device Tree Source (36-bit address map) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1021si-pre.dtsi" -/ { - model = "fsl,P1025RDB"; - compatible = "fsl,P1025RDB"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes */ - ranges = <0x0 0x0 0xf 0xef000000 0x01000000 - 0x1 0x0 0xf 0xff800000 0x00040000>; - }; - - soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xe 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1025rdb.dtsi" -/include/ "fsl/p1021si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020ds.dts deleted file mode 100644 index 237310cc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020ds.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* - * P2020 DS Device Tree Source - * - * Copyright 2009-2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/p2020si-pre.dtsi" - -/ { - model = "fsl,P2020DS"; - compatible = "fsl,P2020DS"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@ffe05000 { - ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 - 0x1 0x0 0x0 0xe0000000 0x08000000 - 0x2 0x0 0x0 0xffa00000 0x00040000 - 0x3 0x0 0x0 0xffdf0000 0x00008000 - 0x4 0x0 0x0 0xffa40000 0x00040000 - 0x5 0x0 0x0 0xffa80000 0x00040000 - 0x6 0x0 0x0 0xffac0000 0x00040000>; - reg = <0 0xffe05000 0 0x1000>; - }; - - board_soc: soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci2: pcie@ffe08000 { - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - reg = <0 0xffe08000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - board_pci1: pci1: pcie@ffe09000 { - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - reg = <0 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci0: pcie@ffe0a000 { - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; - reg = <0 0xffe0a000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; -}; - -/* - * p2020ds.dtsi must be last to ensure board_pci0 overrides pci0 settings - * for interrupt-map & interrupt-map-mask - */ - -/include/ "fsl/p2020si-post.dtsi" -/include/ "p2020ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020ds.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020ds.dtsi deleted file mode 100644 index d3b939c5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020ds.dtsi +++ /dev/null @@ -1,317 +0,0 @@ -/* - * P2020DS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - ramdisk@0 { - reg = <0x0 0x03000000>; - read-only; - }; - - diagnostic@3000000 { - reg = <0x03000000 0x00e00000>; - read-only; - }; - - dink@3e00000 { - reg = <0x03e00000 0x00200000>; - read-only; - }; - - kernel@4000000 { - reg = <0x04000000 0x00400000>; - read-only; - }; - - jffs2@4400000 { - reg = <0x04400000 0x03b00000>; - }; - - dtb@7f00000 { - reg = <0x07f00000 0x00080000>; - read-only; - }; - - u-boot@7f80000 { - reg = <0x07f80000 0x00080000>; - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - u-boot@0 { - reg = <0x0 0x02000000>; - read-only; - }; - - jffs2@2000000 { - reg = <0x02000000 0x10000000>; - }; - - ramdisk@12000000 { - reg = <0x12000000 0x08000000>; - read-only; - }; - - kernel@1a000000 { - reg = <0x1a000000 0x04000000>; - }; - - dtb@1e000000 { - reg = <0x1e000000 0x01000000>; - read-only; - }; - - empty@1f000000 { - reg = <0x1f000000 0x21000000>; - }; - }; - - board-control@3,0 { - compatible = "fsl,p2020ds-fpga", "fsl,fpga-ngpixis"; - reg = <0x3 0x0 0x30>; - }; - - nand@4,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x4 0x0 0x40000>; - }; - - nand@5,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x5 0x0 0x40000>; - }; - - nand@6,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x6 0x0 0x40000>; - }; -}; - -&board_soc { - usb@22000 { - phy_type = "ulpi"; - dr_mode = "host"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <3 1 0 0>; - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - interrupts = <3 1 0 0>; - reg = <0x2>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26520 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - - }; - - ptp_clock@24e00 { - fsl,tclk-period = <5>; - fsl,tmr-prsc = <200>; - fsl,tmr-add = <0xCCCCCCCD>; - fsl,tmr-fiper1 = <0x3B9AC9FB>; - fsl,tmr-fiper2 = <0x0001869B>; - fsl,max-adj = <249999999>; - }; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - }; - - enet2: ethernet@26000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - }; -}; - -&board_pci1 { - pcie@0 { - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - - // IDSEL 0x11 func 0 - PCI slot 1 - 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8800 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 1 - PCI slot 1 - 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8900 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 2 - PCI slot 1 - 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 3 - PCI slot 1 - 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 4 - PCI slot 1 - 0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 5 - PCI slot 1 - 0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 6 - PCI slot 1 - 0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 7 - PCI slot 1 - 0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x1d Audio - 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 - - // IDSEL 0x1e Legacy - 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 - 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 - 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 - >; - - uli1575@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 - 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <4 1 0 0>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <0x1 0x60 0x1 0x1 0x64 0x1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0x0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <0x1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - - gpio@400 { - reg = <0x1 0x400 0x80>; - }; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc.dtsi deleted file mode 100644 index c21d1c7d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc.dtsi +++ /dev/null @@ -1,241 +0,0 @@ -/* - * P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR DTB Image"; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR Linux Kernel Image"; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p2020-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND DTB Image"; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND Linux Kernel Image"; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND Compressed RFS Image"; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00f00000>; - label = "NAND Writable User area"; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; - - cpld@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cpld"; - reg = <0x3 0x0 0x20000>; - read-only; - }; -}; - -&soc { - i2c@3000 { - rtc@68 { - compatible = "pericom,pt7c4338"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,m25p80"; - reg = <0>; - spi-max-frequency = <40000000>; - - partition@0 { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "SPI U-Boot Image"; - read-only; - }; - - partition@80000 { - /* 512KB for DTB Image */ - reg = <0x00080000 0x00080000>; - label = "SPI DTB Image"; - }; - - partition@100000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "SPI Linux Kernel Image"; - }; - - partition@500000 { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "SPI Compressed RFS Image"; - }; - - partition@900000 { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "SPI JFFS2 RFS"; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <2 1 0 0>; - reg = <0x1>; - }; - }; - - mdio@25520 { - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26520 { - status = "disabled"; - }; - - ptp_clock@24e00 { - fsl,tclk-period = <5>; - fsl,tmr-prsc = <200>; - fsl,tmr-add = <0xCCCCCCCD>; - fsl,tmr-fiper1 = <0x3B9AC9FB>; - fsl,tmr-fiper2 = <0x0001869B>; - fsl,max-adj = <249999999>; - }; - - enet0: ethernet@24000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@26000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts deleted file mode 100644 index 852e5b27..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts +++ /dev/null @@ -1,96 +0,0 @@ -/* - * P2020 RDB-PC 32Bit Physical Address Map Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p2020si-pre.dtsi" - -/ { - model = "fsl,P2020RDB"; - compatible = "fsl,P2020RDB-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - /* NOR and NAND Flashes */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xff800000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000 - 0x3 0x0 0x0 0xffa00000 0x00020000>; - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe08000 { - reg = <0 0xffe08000 0 0x1000>; - status = "disabled"; - }; - - pci1: pcie@ffe09000 { - reg = <0 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci2: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p2020rdb-pc.dtsi" -/include/ "fsl/p2020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts deleted file mode 100644 index b5a56ca5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts +++ /dev/null @@ -1,96 +0,0 @@ -/* - * P2020 RDB-PC 36Bit Physical Address Map Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p2020si-pre.dtsi" - -/ { - model = "fsl,P2020RDB"; - compatible = "fsl,P2020RDB-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - /* NOR and NAND Flashes */ - ranges = <0x0 0x0 0xf 0xef000000 0x01000000 - 0x1 0x0 0xf 0xff800000 0x00040000 - 0x2 0x0 0xf 0xffb00000 0x00020000 - 0x3 0x0 0xf 0xffa00000 0x00020000>; - }; - - soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe08000 { - reg = <0xf 0xffe08000 0 0x1000>; - status = "disabled"; - }; - - pci1: pcie@fffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci2: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p2020rdb-pc.dtsi" -/include/ "fsl/p2020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb.dts deleted file mode 100644 index 153bc76b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb.dts +++ /dev/null @@ -1,291 +0,0 @@ -/* - * P2020 RDB Device Tree Source - * - * Copyright 2009-2012 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/p2020si-pre.dtsi" - -/ { - model = "fsl,P2020RDB"; - compatible = "fsl,P2020RDB"; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - /* NOR and NAND Flashes */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xff800000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR (RO) Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR (RO) DTB Image"; - read-only; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR (RO) Linux Kernel Image"; - read-only; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR (RW) JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR (RO) U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p2020-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND (RO) U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND (RO) DTB Image"; - read-only; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND (RO) Linux Kernel Image"; - read-only; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND (RO) Compressed RFS Image"; - read-only; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND (RW) JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00f00000>; - label = "NAND (RW) Writable User area"; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; - - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; - - partition@0 { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "SPI (RO) U-Boot Image"; - read-only; - }; - - partition@80000 { - /* 512KB for DTB Image */ - reg = <0x00080000 0x00080000>; - label = "SPI (RO) DTB Image"; - read-only; - }; - - partition@100000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "SPI (RO) Linux Kernel Image"; - read-only; - }; - - partition@500000 { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "SPI (RO) Compressed RFS Image"; - read-only; - }; - - partition@900000 { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "SPI (RW) JFFS2 RFS"; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - dr_mode = "host"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <3 1 0 0>; - reg = <0x1>; - }; - tbi-phy@2 { - device_type = "tbi-phy"; - reg = <0x2>; - }; - }; - - mdio@25520 { - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26520 { - status = "disabled"; - }; - - ptp_clock@24e00 { - fsl,tclk-period = <5>; - fsl,tmr-prsc = <200>; - fsl,tmr-add = <0xCCCCCCCD>; - fsl,tmr-fiper1 = <0x3B9AC9FB>; - fsl,tmr-fiper2 = <0x0001869B>; - fsl,max-adj = <249999999>; - }; - - enet0: ethernet@24000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@26000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - }; - - pci0: pcie@ffe08000 { - reg = <0 0xffe08000 0 0x1000>; - status = "disabled"; - }; - - pci1: pcie@ffe09000 { - reg = <0 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci2: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "fsl/p2020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts deleted file mode 100644 index 66aac864..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts +++ /dev/null @@ -1,67 +0,0 @@ -/* - * P2020 RDB Core0 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb, - * eth1, eth2, sdhc, crypto, global-util, pci0. - * - * Copyright 2009-2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "p2020rdb.dts" - -/ { - model = "fsl,P2020RDB"; - compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP"; - - cpus { - PowerPC,P2020@1 { - status = "disabled"; - }; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc@ffe00000 { - serial1: serial@4600 { - status = "disabled"; - }; - - dma@c300 { - status = "disabled"; - }; - - enet0: ethernet@24000 { - status = "disabled"; - }; - - mpic: pic@40000 { - protected-sources = < - 42 76 77 78 79 /* serial1 , dma2 */ - 29 30 34 26 /* enet0, pci1 */ - 0xe0 0xe1 0xe2 0xe3 /* msi */ - 0xe4 0xe5 0xe6 0xe7 - >; - }; - - msi@41600 { - status = "disabled"; - }; - }; - - pci0: pcie@ffe08000 { - status = "disabled"; - }; - - pci2: pcie@ffe0a000 { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts deleted file mode 100644 index 9bd8ef49..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts +++ /dev/null @@ -1,125 +0,0 @@ -/* - * P2020 RDB Core1 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts allows core1 to have l2, dma2, eth0, pci1, msi. - * - * Please note to add "-b 1" for core1's dts compiling. - * - * Copyright 2009-2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "p2020rdb.dts" - -/ { - model = "fsl,P2020RDB"; - compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP"; - - cpus { - PowerPC,P2020@0 { - status = "disabled"; - }; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc@ffe00000 { - ecm-law@0 { - status = "disabled"; - }; - - ecm@1000 { - status = "disabled"; - }; - - memory-controller@2000 { - status = "disabled"; - }; - - i2c@3000 { - status = "disabled"; - }; - - i2c@3100 { - status = "disabled"; - }; - - serial0: serial@4500 { - status = "disabled"; - }; - - spi@7000 { - status = "disabled"; - }; - - gpio: gpio-controller@f000 { - status = "disabled"; - }; - - dma@21300 { - status = "disabled"; - }; - - usb@22000 { - status = "disabled"; - }; - - mdio@24520 { - status = "disabled"; - }; - - mdio@25520 { - status = "disabled"; - }; - - mdio@26520 { - status = "disabled"; - }; - - enet1: ethernet@25000 { - status = "disabled"; - }; - - enet2: ethernet@26000 { - status = "disabled"; - }; - - sdhci@2e000 { - status = "disabled"; - }; - - crypto@30000 { - status = "disabled"; - }; - - mpic: pic@40000 { - protected-sources = < - 17 18 43 42 59 47 /*ecm, mem, i2c, serial0, spi,gpio */ - 16 20 21 22 23 28 /* L2, dma1, USB */ - 03 35 36 40 31 32 33 /* mdio, enet1, enet2 */ - 72 45 58 25 /* sdhci, crypto , pci */ - >; - }; - - global-utilities@e0000 { //global utilities block - status = "disabled"; - }; - - }; - - pci0: pcie@ffe08000 { - status = "disabled"; - }; - - pci1: pcie@ffe09000 { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2041rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2041rdb.dts deleted file mode 100644 index 28521397..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2041rdb.dts +++ /dev/null @@ -1,180 +0,0 @@ -/* - * P2041RDB Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p2041si-pre.dtsi" - -/ { - model = "fsl,P2041RDB"; - compatible = "fsl,P2041RDB"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - memory { - device_type = "memory"; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - soc: soc@ffe000000 { - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118000 { - lm75b@48 { - compatible = "nxp,lm75a"; - reg = <0x48>; - }; - eeprom@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - rtc@68 { - compatible = "pericom,pt7c4338"; - reg = <0x68>; - }; - }; - - i2c@118100 { - eeprom@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - }; - - usb1: usb@211000 { - dr_mode = "host"; - }; - }; - - rio: rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - lbc: localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xe8000000 0x08000000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x08000000>; - bank-width = <2>; - device-width = <2>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; -}; - -/include/ "fsl/p2041si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p3041ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p3041ds.dts deleted file mode 100644 index 22a215e9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p3041ds.dts +++ /dev/null @@ -1,233 +0,0 @@ -/* - * P3041DS Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p3041si-pre.dtsi" - -/ { - model = "fsl,P3041DS"; - compatible = "fsl,P3041DS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - memory { - device_type = "memory"; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - soc: soc@ffe000000 { - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118100 { - eeprom@51 { - compatible = "at24,24c256"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "at24,24c256"; - reg = <0x52>; - }; - }; - - i2c@119100 { - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0x1 0x1 0 0>; - }; - }; - }; - - rio: rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - lbc: localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xe8000000 0x08000000 - 2 0 0xf 0xffa00000 0x00040000 - 3 0 0xf 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x08000000>; - bank-width = <2>; - device-width = <2>; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - label = "NAND U-Boot Image"; - reg = <0x0 0x02000000>; - read-only; - }; - - partition@2000000 { - label = "NAND Root File System"; - reg = <0x02000000 0x10000000>; - }; - - partition@12000000 { - label = "NAND Compressed RFS Image"; - reg = <0x12000000 0x08000000>; - }; - - partition@1a000000 { - label = "NAND Linux Kernel Image"; - reg = <0x1a000000 0x04000000>; - }; - - partition@1e000000 { - label = "NAND DTB Image"; - reg = <0x1e000000 0x01000000>; - }; - - partition@1f000000 { - label = "NAND Writable User area"; - reg = <0x1f000000 0x21000000>; - }; - }; - - board-control@3,0 { - compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis"; - reg = <3 0 0x30>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci3: pcie@ffe203000 { - reg = <0xf 0xfe203000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; -}; - -/include/ "fsl/p3041si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p3060qds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p3060qds.dts deleted file mode 100644 index 9ae875c8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p3060qds.dts +++ /dev/null @@ -1,242 +0,0 @@ -/* - * P3060QDS Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p3060si-pre.dtsi" - -/ { - model = "fsl,P3060QDS"; - compatible = "fsl,P3060QDS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - memory { - device_type = "memory"; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - soc: soc@ffe000000 { - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - flash@1 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,en25q32b"; - reg = <1>; - spi-max-frequency = <40000000>; /* input clock */ - partition@spi1 { - label = "spi1"; - reg = <0x00000000 0x00400000>; - }; - }; - flash@2 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "atmel,at45db081d"; - reg = <2>; - spi-max-frequency = <40000000>; /* input clock */ - partition@spi1 { - label = "spi2"; - reg = <0x00000000 0x00100000>; - }; - }; - flash@3 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,sst25wf040"; - reg = <3>; - spi-max-frequency = <40000000>; /* input clock */ - partition@spi3 { - label = "spi3"; - reg = <0x00000000 0x00080000>; - }; - }; - }; - - i2c@118000 { - eeprom@51 { - compatible = "at24,24c256"; - reg = <0x51>; - }; - eeprom@53 { - compatible = "at24,24c256"; - reg = <0x53>; - }; - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0x1 0x1 0 0>; - }; - }; - - usb0: usb@210000 { - phy_type = "ulpi"; - }; - - usb1: usb@211000 { - dr_mode = "host"; - phy_type = "ulpi"; - }; - }; - - rio: rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - lbc: localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xe8000000 0x08000000 - 2 0 0xf 0xffa00000 0x00040000 - 3 0 0xf 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x08000000>; - bank-width = <2>; - device-width = <2>; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - label = "NAND U-Boot Image"; - reg = <0x0 0x02000000>; - read-only; - }; - - partition@2000000 { - label = "NAND Root File System"; - reg = <0x02000000 0x10000000>; - }; - - partition@12000000 { - label = "NAND Compressed RFS Image"; - reg = <0x12000000 0x08000000>; - }; - - partition@1a000000 { - label = "NAND Linux Kernel Image"; - reg = <0x1a000000 0x04000000>; - }; - - partition@1e000000 { - label = "NAND DTB Image"; - reg = <0x1e000000 0x01000000>; - }; - - partition@1f000000 { - label = "NAND Writable User area"; - reg = <0x1f000000 0x21000000>; - }; - }; - - board-control@3,0 { - compatible = "fsl,p3060qds-fpga", "fsl,fpga-qixis"; - reg = <3 0 0x100>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; -}; - -/include/ "fsl/p3060si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p4080ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p4080ds.dts deleted file mode 100644 index 3e204609..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p4080ds.dts +++ /dev/null @@ -1,187 +0,0 @@ -/* - * P4080DS Device Tree Source - * - * Copyright 2009-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p4080si-pre.dtsi" - -/ { - model = "fsl,P4080DS"; - compatible = "fsl,P4080DS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - memory { - device_type = "memory"; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - soc: soc@ffe000000 { - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118100 { - eeprom@51 { - compatible = "at24,24c256"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "at24,24c256"; - reg = <0x52>; - }; - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0x1 0x1 0 0>; - }; - }; - - usb0: usb@210000 { - phy_type = "ulpi"; - }; - - usb1: usb@211000 { - dr_mode = "host"; - phy_type = "ulpi"; - }; - }; - - rio: rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - lbc: localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xe8000000 0x08000000 - 3 0 0xf 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x08000000>; - bank-width = <2>; - device-width = <2>; - }; - - board-control@3,0 { - compatible = "fsl,p4080ds-fpga", "fsl,fpga-ngpixis"; - reg = <3 0 0x30>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - -}; - -/include/ "fsl/p4080si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p5020ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p5020ds.dts deleted file mode 100644 index 27c07ed6..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p5020ds.dts +++ /dev/null @@ -1,233 +0,0 @@ -/* - * P5020DS Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p5020si-pre.dtsi" - -/ { - model = "fsl,P5020DS"; - compatible = "fsl,P5020DS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - memory { - device_type = "memory"; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - soc: soc@ffe000000 { - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118100 { - eeprom@51 { - compatible = "at24,24c256"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "at24,24c256"; - reg = <0x52>; - }; - }; - - i2c@119100 { - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0x1 0x1 0 0>; - }; - }; - }; - - rio: rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - lbc: localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xe8000000 0x08000000 - 2 0 0xf 0xffa00000 0x00040000 - 3 0 0xf 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x08000000>; - bank-width = <2>; - device-width = <2>; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - label = "NAND U-Boot Image"; - reg = <0x0 0x02000000>; - read-only; - }; - - partition@2000000 { - label = "NAND Root File System"; - reg = <0x02000000 0x10000000>; - }; - - partition@12000000 { - label = "NAND Compressed RFS Image"; - reg = <0x12000000 0x08000000>; - }; - - partition@1a000000 { - label = "NAND Linux Kernel Image"; - reg = <0x1a000000 0x04000000>; - }; - - partition@1e000000 { - label = "NAND DTB Image"; - reg = <0x1e000000 0x01000000>; - }; - - partition@1f000000 { - label = "NAND Writable User area"; - reg = <0x1f000000 0x21000000>; - }; - }; - - board-control@3,0 { - compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis"; - reg = <3 0 0x30>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci3: pcie@ffe203000 { - reg = <0xf 0xfe203000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; -}; - -/include/ "fsl/p5020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/pcm030.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/pcm030.dts deleted file mode 100644 index 9e354997..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/pcm030.dts +++ /dev/null @@ -1,137 +0,0 @@ -/* - * phyCORE-MPC5200B-tiny (pcm030) board Device Tree Source - * - * Copyright 2006 Pengutronix - * Sascha Hauer <s.hauer@pengutronix.de> - * Copyright 2007 Pengutronix - * Juergen Beisert <j.beisert@pengutronix.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "phytec,pcm030"; - compatible = "phytec,pcm030"; - - soc5200@f0000000 { - timer@600 { // General Purpose Timer - fsl,has-wdt; - }; - - gpt2: timer@620 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt3: timer@630 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt4: timer@640 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt5: timer@650 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt6: timer@660 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt7: timer@670 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - psc@2000 { /* PSC1 in ac97 mode */ - compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97"; - cell-index = <0>; - }; - - /* PSC2 port is used by CAN1/2 */ - psc@2200 { - status = "disabled"; - }; - - psc@2400 { /* PSC3 in UART mode */ - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - /* PSC4 is ??? */ - psc@2600 { - status = "disabled"; - }; - - /* PSC5 is ??? */ - psc@2800 { - status = "disabled"; - }; - - psc@2c00 { /* PSC6 in UART mode */ - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - i2c@3d40 { - rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "catalyst,24c32"; - reg = <0x52>; - pagesize = <32>; - }; - }; - - sram@8000 { - compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - pci@f0000d00 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot - 0xc000 0 0 2 &mpc5200_pic 1 1 3 - 0xc000 0 0 3 &mpc5200_pic 1 2 3 - 0xc000 0 0 4 &mpc5200_pic 1 3 3 - - 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot - 0xc800 0 0 2 &mpc5200_pic 1 2 3 - 0xc800 0 0 3 &mpc5200_pic 1 3 3 - 0xc800 0 0 4 &mpc5200_pic 0 0 3>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 - 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; - }; - - localbus { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/pcm032.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/pcm032.dts deleted file mode 100644 index 1dd478bf..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/pcm032.dts +++ /dev/null @@ -1,218 +0,0 @@ -/* - * phyCORE-MPC5200B-IO (pcm032) board Device Tree Source - * - * Copyright (C) 2006-2009 Pengutronix - * Sascha Hauer <s.hauer@pengutronix.de> - * Juergen Beisert <j.beisert@pengutronix.de> - * Wolfram Sang <w.sang@pengutronix.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "phytec,pcm032"; - compatible = "phytec,pcm032"; - - memory { - reg = <0x00000000 0x08000000>; // 128MB - }; - - soc5200@f0000000 { - timer@600 { // General Purpose Timer - fsl,has-wdt; - }; - - gpt2: timer@620 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt3: timer@630 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt4: timer@640 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt5: timer@650 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt6: timer@660 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x660 0x10>; - interrupts = <1 15 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt7: timer@670 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - psc@2000 { /* PSC1 is ac97 */ - compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97"; - cell-index = <0>; - }; - - /* PSC2 port is used by CAN1/2 */ - psc@2200 { - status = "disabled"; - }; - - psc@2400 { /* PSC3 in UART mode */ - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - /* PSC4 is ??? */ - psc@2600 { - status = "disabled"; - }; - - /* PSC5 is ??? */ - psc@2800 { - status = "disabled"; - }; - - psc@2c00 { /* PSC6 in UART mode */ - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - i2c@3d40 { - rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "catalyst,24c32"; - reg = <0x52>; - pagesize = <32>; - }; - }; - }; - - pci@f0000d00 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot - 0xc000 0 0 2 &mpc5200_pic 1 1 3 - 0xc000 0 0 3 &mpc5200_pic 1 2 3 - 0xc000 0 0 4 &mpc5200_pic 1 3 3 - - 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot - 0xc800 0 0 2 &mpc5200_pic 1 2 3 - 0xc800 0 0 3 &mpc5200_pic 1 3 3 - 0xc800 0 0 4 &mpc5200_pic 0 0 3>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 - 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; - }; - - localbus { - ranges = <0 0 0xfe000000 0x02000000 - 1 0 0xfc000000 0x02000000 - 2 0 0xfbe00000 0x00200000 - 3 0 0xf9e00000 0x02000000 - 4 0 0xf7e00000 0x02000000 - 5 0 0xe6000000 0x02000000 - 6 0 0xe8000000 0x02000000 - 7 0 0xea000000 0x02000000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - bank-width = <4>; - #size-cells = <1>; - #address-cells = <1>; - - partition@0 { - label = "ubootl"; - reg = <0x00000000 0x00040000>; - }; - partition@40000 { - label = "kernel"; - reg = <0x00040000 0x001c0000>; - }; - partition@200000 { - label = "jffs2"; - reg = <0x00200000 0x01d00000>; - }; - partition@1f00000 { - label = "uboot"; - reg = <0x01f00000 0x00040000>; - }; - partition@1f40000 { - label = "env"; - reg = <0x01f40000 0x00040000>; - }; - partition@1f80000 { - label = "oftree"; - reg = <0x01f80000 0x00040000>; - }; - partition@1fc0000 { - label = "space"; - reg = <0x01fc0000 0x00040000>; - }; - }; - - sram@2,0 { - compatible = "mtd-ram"; - reg = <2 0 0x00200000>; - bank-width = <2>; - }; - - /* - * example snippets for FPGA - * - * fpga@3,0 { - * compatible = "fpga_driver"; - * reg = <3 0 0x02000000>; - * bank-width = <4>; - * }; - * - * fpga@4,0 { - * compatible = "fpga_driver"; - * reg = <4 0 0x02000000>; - * bank-width = <4>; - * }; - */ - - /* - * example snippets for free chipselects - * - * device@5,0 { - * compatible = "custom_driver"; - * reg = <5 0 0x02000000>; - * }; - * - * device@6,0 { - * compatible = "custom_driver"; - * reg = <6 0 0x02000000>; - * }; - * - * device@7,0 { - * compatible = "custom_driver"; - * reg = <7 0 0x02000000>; - * }; - */ - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/pdm360ng.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/pdm360ng.dts deleted file mode 100644 index 94dfa5c9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/pdm360ng.dts +++ /dev/null @@ -1,410 +0,0 @@ -/* - * Device Tree Source for IFM PDM360NG. - * - * Copyright 2009 - 2010 DENX Software Engineering. - * Anatolij Gustschin <agust@denx.de> - * - * Based on MPC5121E ADS dts. - * Copyright 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "pdm360ng"; - compatible = "ifm,pdm360ng"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&ipic>; - - aliases { - ethernet0 = ð0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,5121@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <0x20>; // 32 bytes - i-cache-line-size = <0x20>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <49500000>;// 49.5 MHz (csb/4) - bus-frequency = <198000000>; // 198 MHz csb bus - clock-frequency = <396000000>; // 396 MHz ppc core - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - nfc@40000000 { - compatible = "fsl,mpc5121-nfc"; - reg = <0x40000000 0x100000>; - interrupts = <0x6 0x8>; - #address-cells = <0x1>; - #size-cells = <0x1>; - bank-width = <0x1>; - chips = <0x1>; - - partition@0 { - label = "nand0"; - reg = <0x0 0x40000000>; - }; - }; - - sram@50000000 { - compatible = "fsl,mpc5121-sram"; - reg = <0x50000000 0x20000>; // 128K at 0x50000000 - }; - - localbus@80000020 { - compatible = "fsl,mpc5121-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0x80000020 0x40>; - - ranges = <0x0 0x0 0xf0000000 0x10000000 /* Flash */ - 0x2 0x0 0x50040000 0x00020000>; /* CS2: MRAM */ - - flash@0,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - reg = <0 0x00000000 0x08000000 - 0 0x08000000 0x08000000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <4>; - device-width = <2>; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00080000>; - read-only; - }; - partition@80000 { - label = "environment"; - reg = <0x00080000 0x00080000>; - read-only; - }; - partition@100000 { - label = "splash-image"; - reg = <0x00100000 0x00080000>; - read-only; - }; - partition@180000 { - label = "device-tree"; - reg = <0x00180000 0x00040000>; - }; - partition@1c0000 { - label = "kernel"; - reg = <0x001c0000 0x00500000>; - }; - partition@6c0000 { - label = "filesystem"; - reg = <0x006c0000 0x07940000>; - }; - }; - - mram0@2,0 { - compatible = "mtd-ram"; - reg = <2 0x00000 0x10000>; - bank-width = <2>; - }; - - mram1@2,10000 { - compatible = "mtd-ram"; - reg = <2 0x010000 0x10000>; - bank-width = <2>; - }; - }; - - soc@80000000 { - compatible = "fsl,mpc5121-immr"; - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - ranges = <0x0 0x80000000 0x400000>; - reg = <0x80000000 0x400000>; - bus-frequency = <66000000>; // 66 MHz ips bus - - // IPIC - // interrupts cell = <intr #, sense> - // sense values match linux IORESOURCE_IRQ_* defines: - // sense == 8: Level, low assertion - // sense == 2: Edge, high-to-low change - // - ipic: interrupt-controller@c00 { - compatible = "fsl,mpc5121-ipic", "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0xc00 0x100>; - }; - - rtc@a00 { // Real time clock - compatible = "fsl,mpc5121-rtc"; - reg = <0xa00 0x100>; - interrupts = <79 0x8 80 0x8>; - }; - - reset@e00 { // Reset module - compatible = "fsl,mpc5121-reset"; - reg = <0xe00 0x100>; - }; - - clock@f00 { // Clock control - compatible = "fsl,mpc5121-clock"; - reg = <0xf00 0x100>; - }; - - pmc@1000{ //Power Management Controller - compatible = "fsl,mpc5121-pmc"; - reg = <0x1000 0x100>; - interrupts = <83 0x2>; - }; - - gpio@1100 { - compatible = "fsl,mpc5121-gpio"; - reg = <0x1100 0x100>; - interrupts = <78 0x8>; - }; - - can@1300 { - compatible = "fsl,mpc5121-mscan"; - interrupts = <12 0x8>; - reg = <0x1300 0x80>; - }; - - can@1380 { - compatible = "fsl,mpc5121-mscan"; - interrupts = <13 0x8>; - reg = <0x1380 0x80>; - }; - - i2c@1700 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5121-i2c"; - reg = <0x1700 0x20>; - interrupts = <0x9 0x8>; - fsl,preserve-clocking; - - eeprom@50 { - compatible = "at,24c01"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "stm,m41t00"; - reg = <0x68>; - }; - }; - - i2c@1740 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5121-i2c"; - reg = <0x1740 0x20>; - interrupts = <0xb 0x8>; - fsl,preserve-clocking; - }; - - i2ccontrol@1760 { - compatible = "fsl,mpc5121-i2c-ctrl"; - reg = <0x1760 0x8>; - }; - - axe@2000 { - compatible = "fsl,mpc5121-axe"; - reg = <0x2000 0x100>; - interrupts = <42 0x8>; - }; - - display@2100 { - compatible = "fsl,mpc5121-diu"; - reg = <0x2100 0x100>; - interrupts = <64 0x8>; - }; - - can@2300 { - compatible = "fsl,mpc5121-mscan"; - interrupts = <90 0x8>; - reg = <0x2300 0x80>; - }; - - can@2380 { - compatible = "fsl,mpc5121-mscan"; - interrupts = <91 0x8>; - reg = <0x2380 0x80>; - }; - - viu@2400 { - compatible = "fsl,mpc5121-viu"; - reg = <0x2400 0x400>; - interrupts = <67 0x8>; - }; - - mdio@2800 { - compatible = "fsl,mpc5121-fec-mdio"; - reg = <0x2800 0x200>; - #address-cells = <1>; - #size-cells = <0>; - phy: ethernet-phy@0 { - compatible = "smsc,lan8700"; - reg = <0x1f>; - }; - }; - - eth0: ethernet@2800 { - compatible = "fsl,mpc5121-fec"; - reg = <0x2800 0x200>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <4 0x8>; - phy-handle = < &phy >; - }; - - // USB1 using external ULPI PHY - usb@3000 { - compatible = "fsl,mpc5121-usb2-dr"; - reg = <0x3000 0x600>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <43 0x8>; - dr_mode = "host"; - phy_type = "ulpi"; - }; - - // USB0 using internal UTMI PHY - usb@4000 { - compatible = "fsl,mpc5121-usb2-dr"; - reg = <0x4000 0x600>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <44 0x8>; - dr_mode = "otg"; - phy_type = "utmi_wide"; - fsl,invert-pwr-fault; - }; - - // IO control - ioctl@a000 { - compatible = "fsl,mpc5121-ioctl"; - reg = <0xA000 0x1000>; - }; - - // 512x PSCs are not 52xx PSCs compatible - serial@11000 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <0>; - reg = <0x11000 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11100 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <1>; - reg = <0x11100 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11200 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <2>; - reg = <0x11200 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11300 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <3>; - reg = <0x11300 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11400 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <4>; - reg = <0x11400 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11600 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <6>; - reg = <0x11600 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11800 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <8>; - reg = <0x11800 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11B00 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <11>; - reg = <0x11B00 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - pscfifo@11f00 { - compatible = "fsl,mpc5121-psc-fifo"; - reg = <0x11f00 0x100>; - interrupts = <40 0x8>; - }; - - spi@11900 { - compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc"; - cell-index = <9>; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x11900 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - - // 7845 touch screen controller - ts@0 { - compatible = "ti,ads7846"; - reg = <0x0>; - spi-max-frequency = <3000000>; - // pen irq is GPIO25 - interrupts = <78 0x8>; - }; - }; - - dma@14000 { - compatible = "fsl,mpc5121-dma"; - reg = <0x14000 0x1800>; - interrupts = <65 0x8>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/pq2fads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/pq2fads.dts deleted file mode 100644 index 0bb66937..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/pq2fads.dts +++ /dev/null @@ -1,250 +0,0 @@ -/* - * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip. - * - * Copyright 2007,2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "pq2fads"; - compatible = "fsl,pq2fads"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; - }; - - localbus@f0010100 { - compatible = "fsl,mpc8280-localbus", - "fsl,pq2-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xf0010100 0x60>; - - ranges = <0x0 0x0 0xff800000 0x800000 - 0x1 0x0 0xf4500000 0x8000 - 0x8 0x0 0xf8200000 0x8000>; - - flash@0,0 { - compatible = "jedec-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <4>; - device-width = <1>; - }; - - bcsr@1,0 { - reg = <0x1 0x0 0x20>; - compatible = "fsl,pq2fads-bcsr"; - }; - - PCI_PIC: pic@8,0 { - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x8 0x0 0x8>; - compatible = "fsl,pq2ads-pci-pic"; - interrupt-parent = <&PIC>; - interrupts = <24 8>; - }; - }; - - pci0: pci@f0010800 { - device_type = "pci"; - reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>; - compatible = "fsl,mpc8280-pci", "fsl,pq2-pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - clock-frequency = <66000000>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &PCI_PIC 0 - 0xb000 0x0 0x0 0x2 &PCI_PIC 1 - 0xb000 0x0 0x0 0x3 &PCI_PIC 2 - 0xb000 0x0 0x0 0x4 &PCI_PIC 3 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &PCI_PIC 4 - 0xb800 0x0 0x0 0x2 &PCI_PIC 5 - 0xb800 0x0 0x0 0x3 &PCI_PIC 6 - 0xb800 0x0 0x0 0x4 &PCI_PIC 7 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &PCI_PIC 8 - 0xc000 0x0 0x0 0x2 &PCI_PIC 9 - 0xc000 0x0 0x0 0x3 &PCI_PIC 10 - 0xc000 0x0 0x0 0x4 &PCI_PIC 11>; - - interrupt-parent = <&PIC>; - interrupts = <18 8>; - ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>; - }; - - soc@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8280", "fsl,pq2-soc"; - ranges = <0x0 0xf0000000 0x53000>; - - // Temporary -- will go away once kernel uses ranges for get_immrbase(). - reg = <0xf0000000 0x53000>; - - cpm@119c0 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - compatible = "fsl,mpc8280-cpm", "fsl,cpm2"; - reg = <0x119c0 0x30>; - ranges; - - muram@0 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9800 0x800>; - }; - }; - - brg@119f0 { - compatible = "fsl,mpc8280-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x119f0 0x10 0x115f0 0x10>; - }; - - serial0: serial@11a00 { - device_type = "serial"; - compatible = "fsl,mpc8280-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a00 0x20 0x8000 0x100>; - interrupts = <40 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - }; - - serial1: serial@11a20 { - device_type = "serial"; - compatible = "fsl,mpc8280-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a20 0x20 0x8100 0x100>; - interrupts = <41 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x4a00000>; - }; - - enet0: ethernet@11320 { - device_type = "network"; - compatible = "fsl,mpc8280-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>; - interrupts = <33 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - fsl,cpm-command = <0x16200300>; - }; - - enet1: ethernet@11340 { - device_type = "network"; - compatible = "fsl,mpc8280-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>; - interrupts = <34 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - fsl,cpm-command = <0x1a400300>; - local-mac-address = [00 e0 0c 00 79 01]; - }; - - mdio@10d40 { - device_type = "mdio"; - compatible = "fsl,pq2fads-mdio-bitbang", - "fsl,mpc8280-mdio-bitbang", - "fsl,cpm2-mdio-bitbang"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x10d40 0x14>; - fsl,mdio-pin = <9>; - fsl,mdc-pin = <10>; - - PHY0: ethernet-phy@0 { - interrupt-parent = <&PIC>; - interrupts = <25 2>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - interrupt-parent = <&PIC>; - interrupts = <25 2>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - }; - - usb@11b60 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8280-usb", - "fsl,cpm2-usb"; - reg = <0x11b60 0x18 0x8b00 0x100>; - interrupt-parent = <&PIC>; - interrupts = <11 8>; - fsl,cpm-command = <0x2e600000>; - }; - }; - - PIC: interrupt-controller@10c00 { - #interrupt-cells = <2>; - interrupt-controller; - reg = <0x10c00 0x80>; - compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic"; - }; - - }; - - chosen { - linux,stdout-path = "/soc/cpm/serial@11a00"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/prpmc2800.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/prpmc2800.dts deleted file mode 100644 index 1ee6ff43..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/prpmc2800.dts +++ /dev/null @@ -1,302 +0,0 @@ -/* Device Tree Source for Motorola PrPMC2800 - * - * Author: Mark A. Greer <mgreer@mvista.com> - * - * 2007 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - * - * Property values that are labeled as "Default" will be updated by bootwrapper - * if it can determine the exact PrPMC type. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "PrPMC280/PrPMC2800"; /* Default */ - compatible = "motorola,PrPMC2800"; - coherency-off; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,7447 { - device_type = "cpu"; - reg = <0>; - clock-frequency = <733333333>; /* Default */ - bus-frequency = <133333333>; - timebase-frequency = <33333333>; - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x20000000>; /* Default (512MB) */ - }; - - system-controller@f1000000 { /* Marvell Discovery mv64360 */ - #address-cells = <1>; - #size-cells = <1>; - model = "mv64360"; /* Default */ - compatible = "marvell,mv64360"; - clock-frequency = <133333333>; - reg = <0xf1000000 0x10000>; - virtual-reg = <0xf1000000>; - ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */ - 0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */ - 0xa0000000 0xa0000000 0x4000000 /* User FLASH */ - 0x00000000 0xf1000000 0x0010000 /* Bridge's regs */ - 0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */ - - flash@a0000000 { - device_type = "rom"; - compatible = "direct-mapped"; - reg = <0xa0000000 0x4000000>; /* Default (64MB) */ - probe-type = "CFI"; - bank-width = <4>; - partitions = <0x00000000 0x00100000 /* RO */ - 0x00100000 0x00040001 /* RW */ - 0x00140000 0x00400000 /* RO */ - 0x00540000 0x039c0000 /* RO */ - 0x03f00000 0x00100000>; /* RO */ - partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B"; - }; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - device_type = "mdio"; - compatible = "marvell,mv64360-mdio"; - PHY0: ethernet-phy@1 { - device_type = "ethernet-phy"; - compatible = "broadcom,bcm5421"; - interrupts = <76>; /* GPP 12 */ - interrupt-parent = <&PIC>; - reg = <1>; - }; - PHY1: ethernet-phy@3 { - device_type = "ethernet-phy"; - compatible = "broadcom,bcm5421"; - interrupts = <76>; /* GPP 12 */ - interrupt-parent = <&PIC>; - reg = <3>; - }; - }; - - ethernet-group@2000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "marvell,mv64360-eth-group"; - reg = <0x2000 0x2000>; - ethernet@0 { - device_type = "network"; - compatible = "marvell,mv64360-eth"; - reg = <0>; - interrupts = <32>; - interrupt-parent = <&PIC>; - phy = <&PHY0>; - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - ethernet@1 { - device_type = "network"; - compatible = "marvell,mv64360-eth"; - reg = <1>; - interrupts = <33>; - interrupt-parent = <&PIC>; - phy = <&PHY1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - }; - - SDMA0: sdma@4000 { - compatible = "marvell,mv64360-sdma"; - reg = <0x4000 0xc18>; - virtual-reg = <0xf1004000>; - interrupts = <36>; - interrupt-parent = <&PIC>; - }; - - SDMA1: sdma@6000 { - compatible = "marvell,mv64360-sdma"; - reg = <0x6000 0xc18>; - virtual-reg = <0xf1006000>; - interrupts = <38>; - interrupt-parent = <&PIC>; - }; - - BRG0: brg@b200 { - compatible = "marvell,mv64360-brg"; - reg = <0xb200 0x8>; - clock-src = <8>; - clock-frequency = <133333333>; - current-speed = <9600>; - }; - - BRG1: brg@b208 { - compatible = "marvell,mv64360-brg"; - reg = <0xb208 0x8>; - clock-src = <8>; - clock-frequency = <133333333>; - current-speed = <9600>; - }; - - CUNIT: cunit@f200 { - reg = <0xf200 0x200>; - }; - - MPSCROUTING: mpscrouting@b400 { - reg = <0xb400 0xc>; - }; - - MPSCINTR: mpscintr@b800 { - reg = <0xb800 0x100>; - virtual-reg = <0xf100b800>; - }; - - MPSC0: mpsc@8000 { - device_type = "serial"; - compatible = "marvell,mv64360-mpsc"; - reg = <0x8000 0x38>; - virtual-reg = <0xf1008000>; - sdma = <&SDMA0>; - brg = <&BRG0>; - cunit = <&CUNIT>; - mpscrouting = <&MPSCROUTING>; - mpscintr = <&MPSCINTR>; - cell-index = <0>; - interrupts = <40>; - interrupt-parent = <&PIC>; - }; - - MPSC1: mpsc@9000 { - device_type = "serial"; - compatible = "marvell,mv64360-mpsc"; - reg = <0x9000 0x38>; - virtual-reg = <0xf1009000>; - sdma = <&SDMA1>; - brg = <&BRG1>; - cunit = <&CUNIT>; - mpscrouting = <&MPSCROUTING>; - mpscintr = <&MPSCINTR>; - cell-index = <1>; - interrupts = <42>; - interrupt-parent = <&PIC>; - }; - - wdt@b410 { /* watchdog timer */ - compatible = "marvell,mv64360-wdt"; - reg = <0xb410 0x8>; - }; - - i2c@c000 { - device_type = "i2c"; - compatible = "marvell,mv64360-i2c"; - reg = <0xc000 0x20>; - virtual-reg = <0xf100c000>; - interrupts = <37>; - interrupt-parent = <&PIC>; - }; - - PIC: pic { - #interrupt-cells = <1>; - #address-cells = <0>; - compatible = "marvell,mv64360-pic"; - reg = <0x0 0x88>; - interrupt-controller; - }; - - mpp@f000 { - compatible = "marvell,mv64360-mpp"; - reg = <0xf000 0x10>; - }; - - gpp@f100 { - compatible = "marvell,mv64360-gpp"; - reg = <0xf100 0x20>; - }; - - pci@80000000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "marvell,mv64360-pci"; - reg = <0xcf8 0x8>; - ranges = <0x01000000 0x0 0x0 - 0x88000000 0x0 0x01000000 - 0x02000000 0x0 0x80000000 - 0x80000000 0x0 0x08000000>; - bus-range = <0 255>; - clock-frequency = <66000000>; - interrupt-pci-iack = <0xc34>; - interrupt-parent = <&PIC>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0a */ - 0x5000 0 0 1 &PIC 80 - 0x5000 0 0 2 &PIC 81 - 0x5000 0 0 3 &PIC 91 - 0x5000 0 0 4 &PIC 93 - - /* IDSEL 0x0b */ - 0x5800 0 0 1 &PIC 91 - 0x5800 0 0 2 &PIC 93 - 0x5800 0 0 3 &PIC 80 - 0x5800 0 0 4 &PIC 81 - - /* IDSEL 0x0c */ - 0x6000 0 0 1 &PIC 91 - 0x6000 0 0 2 &PIC 93 - 0x6000 0 0 3 &PIC 80 - 0x6000 0 0 4 &PIC 81 - - /* IDSEL 0x0d */ - 0x6800 0 0 1 &PIC 93 - 0x6800 0 0 2 &PIC 80 - 0x6800 0 0 3 &PIC 81 - 0x6800 0 0 4 &PIC 91 - >; - }; - - cpu-error@0070 { - compatible = "marvell,mv64360-cpu-error"; - reg = <0x70 0x10 0x128 0x28>; - interrupts = <3>; - interrupt-parent = <&PIC>; - }; - - sram-ctrl@0380 { - compatible = "marvell,mv64360-sram-ctrl"; - reg = <0x380 0x80>; - interrupts = <13>; - interrupt-parent = <&PIC>; - }; - - pci-error@1d40 { - compatible = "marvell,mv64360-pci-error"; - reg = <0x1d40 0x40 0xc28 0x4>; - interrupts = <12>; - interrupt-parent = <&PIC>; - }; - - mem-ctrl@1400 { - compatible = "marvell,mv64360-mem-ctrl"; - reg = <0x1400 0x60>; - interrupts = <17>; - interrupt-parent = <&PIC>; - }; - }; - - chosen { - bootargs = "ip=on"; - linux,stdout-path = &MPSC0; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ps3.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ps3.dts deleted file mode 100644 index 96ba5b51..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ps3.dts +++ /dev/null @@ -1,70 +0,0 @@ -/* - * PS3 Game Console device tree. - * - * Copyright (C) 2007 Sony Computer Entertainment Inc. - * Copyright 2007 Sony Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/dts-v1/; - -/ { - model = "SonyPS3"; - compatible = "sony,ps3"; - #size-cells = <2>; - #address-cells = <2>; - - chosen { - }; - - /* - * We'll get the size of the bootmem block from lv1 after startup, - * so we'll put a null entry here. - */ - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0x00000000>; - }; - - /* - * The boot cpu is always zero for PS3. - * - * dtc expects a clock-frequency and timebase-frequency entries, so - * we'll put a null entries here. These will be initialized after - * startup with data from lv1. - * - * Seems the only way currently to indicate a processor has multiple - * threads is with an ibm,ppc-interrupt-server#s entry. We'll put one - * here so we can bring up both of ours. See smp_setup_cpu_maps(). - */ - - cpus { - #size-cells = <0>; - #address-cells = <1>; - - cpu@0 { - device_type = "cpu"; - reg = <0x00000000>; - ibm,ppc-interrupt-server#s = <0x0 0x1>; - clock-frequency = <0>; - timebase-frequency = <0>; - i-cache-size = <32768>; - d-cache-size = <32768>; - i-cache-line-size = <128>; - d-cache-line-size = <128>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/rainier.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/rainier.dts deleted file mode 100644 index 9684c80e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/rainier.dts +++ /dev/null @@ -1,350 +0,0 @@ -/* - * Device Tree Source for AMCC Rainier - * - * Based on Sequoia code - * Copyright (c) 2007 MontaVista Software, Inc. - * - * FIXME: Draft only! - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,rainier"; - compatible = "amcc,rainier"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - serial3 = &UART3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440GRx"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440grx","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440grx","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-440grx","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440grx", "ibm,sdr-440ep"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440grx", "ibm,cpr-440ep"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-440grx", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali"; - dcr-reg = <0x010 0x002>; - }; - - DMA0: dma { - compatible = "ibm,dma-440grx", "ibm,dma-4xx"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440grx", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-440grx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0x00000001 0x00000000 0x80000000 - 0x80000000 0x00000001 0x80000000 0x80000000>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440grx", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl256n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Kernel"; - reg = <0x00000000 0x00180000>; - }; - partition@180000 { - label = "ramdisk"; - reg = <0x00180000 0x00200000>; - }; - partition@380000 { - label = "file system"; - reg = <0x00380000 0x03aa0000>; - }; - partition@3e20000 { - label = "kozio"; - reg = <0x03e20000 0x00140000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - UART2: serial@ef600500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600500 0x00000008>; - virtual-reg = <0xef600500>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC1>; - interrupts = <0x3 0x4>; - }; - - UART3: serial@ef600600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600600 0x00000008>; - virtual-reg = <0xef600600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC1>; - interrupts = <0x4 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-440grx", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-440grx", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-440grx", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - RGMII0: emac-rgmii@ef601000 { - compatible = "ibm,rgmii-440grx", "ibm,rgmii"; - reg = <0xef601000 0x00000008>; - has-mdio; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 - /*Wake*/ 0x1 &UIC1 0x1d 0x4>; - reg = <0xef600e00 0x00000074>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 - /*Wake*/ 0x1 &UIC1 0x1f 0x4>; - reg = <0xef600f00 0x00000074>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCI0: pci@1ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440grx-pci", "ibm,plb-pci"; - primary; - reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */ - 0x00000001 0xeed00000 0x00000004 /* IACK */ - 0x00000001 0xeed00000 0x00000004 /* Special cycle */ - 0x00000001 0xef400000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000 - 0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000 - 0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* All PCI interrupts are routed to IRQ 67 */ - interrupt-map-mask = <0x0 0x0 0x0 0x0>; - interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - bootargs = "console=ttyS0,115200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/redwood.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/redwood.dts deleted file mode 100644 index d86a3a49..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/redwood.dts +++ /dev/null @@ -1,387 +0,0 @@ -/* - * Device Tree Source for AMCC Redwood(460SX) - * - * Copyright 2008 AMCC <tmarri@amcc.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,redwood"; - compatible = "amcc,redwood"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,460SX"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-460sx"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-460sx"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-460sx", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-460sx", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-460sx", "ibm,mcmal2"; - dcr-reg = <0x180 0x62>; - num-tx-chans = <4>; - num-rx-chans = <32>; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&UIC1>; - interrupts = < /*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x1 0x4 - /*TXDE*/ 0x2 0x4 - /*RXDE*/ 0x3 0x4 - /*COAL TX0*/ 0x18 0x2 - /*COAL TX1*/ 0x19 0x2 - /*COAL TX2*/ 0x1a 0x2 - /*COAL TX3*/ 0x1b 0x2 - /*COAL RX0*/ 0x1c 0x2 - /*COAL RX1*/ 0x1d 0x2 - /*COAL RX2*/ 0x1e 0x2 - /*COAL RX3*/ 0x1f 0x2>; - }; - - POB0: opb { - compatible = "ibm,opb-460sx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-460sx", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x6 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x0000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "ramdisk"; - reg = <0x00200000 0x01400000>; - }; - partition@1600000 { - label = "jffs2"; - reg = <0x01600000 0x00400000>; - }; - partition@1a00000 { - label = "user"; - reg = <0x01a00000 0x02560000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - }; - - UART0: serial@ef600200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600200 0x00000008>; - virtual-reg = <0xef600200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - RGMII0: emac-rgmii@ef600900 { - compatible = "ibm,rgmii-460sx", "ibm,rgmii"; - reg = <0xef600900 0x00000008>; - }; - - EMAC0: ethernet@ef600a00 { - device_type = "network"; - compatible = "ibm,emac-460sx", "ibm,emac4"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4 - /*Wake*/ 0x1 &UIC2 0x1d 0x4>; - reg = <0xef600a00 0x00000070>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - PCIE0: pciex@d00000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ - 0x0000000c 0x10000000 0x00001000>; /* Registers */ - dcr-reg = <0x100 0x020>; - sdr-base = <0x300>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 10 to 0x1f */ - bus-range = <0x10 0x1f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@d20000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ - 0x0000000c 0x10001000 0x00001000>; /* Registers */ - dcr-reg = <0x120 0x020>; - sdr-base = <0x340>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 10 to 0x1f */ - bus-range = <0x20 0x2f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; - }; - - PCIE2: pciex@d40000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; - primary; - port = <0x2>; /* port number */ - reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ - 0x0000000c 0x10002000 0x00001000>; /* Registers */ - dcr-reg = <0x140 0x020>; - sdr-base = <0x370>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 10 to 0x1f */ - bus-range = <0x30 0x3f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; - }; - - MSI: ppc4xx-msi@400300000 { - compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; - reg = < 0x4 0x00300000 0x100 - 0x4 0x00300000 0x100>; - sdr-base = <0x3B0>; - msi-data = <0x00000000>; - msi-mask = <0x44440000>; - interrupt-count = <3>; - interrupts =<0 1 2 3>; - interrupt-parent = <&UIC0>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &UIC0 0xC 1 - 1 &UIC0 0x0D 1 - 2 &UIC0 0x0E 1 - 3 &UIC0 0x0F 1>; - }; - - }; - - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600200"; - }; - -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/sam440ep.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/sam440ep.dts deleted file mode 100644 index f0663be1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/sam440ep.dts +++ /dev/null @@ -1,293 +0,0 @@ -/* - * Device Tree Source for ACube Sam440ep based off bamboo.dts code - * original copyrights below - * - * Copyright (c) 2006, 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * Modified from bamboo.dts for sam440ep: - * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "acube,sam440ep"; - compatible = "acube,sam440ep"; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - serial3 = &UART3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440EP"; - reg = <0>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0 0>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 9>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 9>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 4 0x1f 4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440ep"; - dcr-reg = <0x00e 2>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440ep"; - dcr-reg = <0x00c 2>; - }; - - plb { - compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; - dcr-reg = <0x010 2>; - }; - - DMA0: dma { - compatible = "ibm,dma-440ep", "ibm,dma-440gp"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0 &UIC0 10 4 - /*RXEOB*/ 1 &UIC0 11 4 - /*SERR*/ 2 &UIC1 0 4 - /*TXDE*/ 3 &UIC1 1 4 - /*RXDE*/ 4 &UIC1 2 4>; - }; - - POB0: opb { - compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Bamboo is oddball in the 44x world and doesn't use the ERPN - * bits. - */ - ranges = <0x00000000 0 0x00000000 0x80000000 - 0x80000000 0 0x80000000 0x80000000>; - interrupt-parent = <&UIC1>; - interrupts = <7 4>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 2>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <5 1>; - interrupt-parent = <&UIC1>; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 8>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <0x1c200>; - interrupt-parent = <&UIC0>; - interrupts = <0 4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 8>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <1 4>; - }; - - UART2: serial@ef600500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600500 8>; - virtual-reg = <0xef600500>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <3 4>; - }; - - UART3: serial@ef600600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600600 8>; - virtual-reg = <0xef600600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <4 4>; - }; - - IIC0: i2c@ef600700 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - index = <0>; - reg = <0xef600700 0x14>; - interrupt-parent = <&UIC0>; - interrupts = <2 4>; - rtc@68 { - compatible = "stm,m41t80"; - reg = <0x68>; - }; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - index = <5>; - reg = <0xef600800 0x14>; - interrupt-parent = <&UIC0>; - interrupts = <7 4>; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; - reg = <0xef600d00 0xc>; - }; - - EMAC0: ethernet@ef600e00 { - linux,network-index = <0>; - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 4 0x1d 4>; - reg = <0xef600e00 0x70>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0 1>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <0x5dc>; - rx-fifo-size = <0x1000>; - tx-fifo-size = <0x800>; - phy-mode = "rmii"; - phy-map = <00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - }; - - EMAC1: ethernet@ef600f00 { - linux,network-index = <1>; - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1e 4 0x1f 4>; - reg = <0xef600f00 0x70>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <2 3>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <0x5dc>; - rx-fifo-size = <0x1000>; - tx-fifo-size = <0x800>; - phy-mode = "rmii"; - phy-map = <00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - }; - usb@ef601000 { - compatible = "ohci-be"; - reg = <0xef601000 0x80>; - interrupts = <8 4 9 4>; - interrupt-parent = <&UIC1>; - }; - }; - - PCI0: pci@ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; - primary; - reg = <0 0xeec00000 8 /* Config space access */ - 0 0xeed00000 4 /* IACK */ - 0 0xeed00000 4 /* Special cycle */ - 0 0xef400000 0x40>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 - 0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8349.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8349.dts deleted file mode 100644 index b1e45a85..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8349.dts +++ /dev/null @@ -1,333 +0,0 @@ -/* - * SBC8349E Device Tree Source - * - * Copyright 2007 Wind River Inc. - * - * Paul Gortmaker (see MAINTAINERS for contact information) - * - * -based largely on the Freescale MPC834x_MDS dts. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "SBC8349E"; - compatible = "SBC834xE"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8349@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - soc8349@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - /* phy type (ULPI or SERIAL) are only types supported for MPH */ - /* port = 0 or 1 */ - usb@22000 { - compatible = "fsl-usb2-mph"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <39 0x8>; - phy_type = "ulpi"; - port0; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - linux,network-index = <0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@19 { - interrupt-parent = <&ipic>; - interrupts = <20 0x8>; - reg = <0x19>; - device_type = "ethernet-phy"; - }; - - phy1: ethernet-phy@1a { - interrupt-parent = <&ipic>; - interrupts = <21 0x8>; - reg = <0x1a>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - linux,network-index = <1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8349-localbus", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - ranges = <0x0 0x0 0xff800000 0x00800000 /* 8MB Flash */ - 0x1 0x0 0xf8000000 0x00002000 /* 8KB EEPROM */ - 0x2 0x0 0x10000000 0x04000000 /* 64MB SDRAM */ - 0x3 0x0 0x10000000 0x04000000>; /* 64MB SDRAM */ - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "intel,28F640J3A", "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00040000>; - read-only; - }; - - partition@40000 { - label = "user"; - reg = <0x00040000 0x006c0000>; - }; - - partition@700000 { - label = "legacy u-boot"; - reg = <0x00700000 0x00100000>; - read-only; - }; - - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 48 0x8 - 0x8800 0x0 0x0 0x2 &ipic 17 0x8 - 0x8800 0x0 0x0 0x3 &ipic 18 0x8 - 0x8800 0x0 0x0 0x4 &ipic 19 0x8>; - - interrupt-parent = <&ipic>; - interrupts = <0x42 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8548.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8548.dts deleted file mode 100644 index 77be7711..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8548.dts +++ /dev/null @@ -1,428 +0,0 @@ -/* - * SBC8548 Device Tree Source - * - * Copyright 2007 Wind River Systems Inc. - * - * Paul Gortmaker (see MAINTAINERS for contact information) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - - -/dts-v1/; - -/ { - model = "SBC8548"; - compatible = "SBC8548"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8548@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <0x20>; // 32 bytes - i-cache-line-size = <0x20>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - localbus@e0000000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "simple-bus"; - reg = <0xe0000000 0x5000>; - interrupt-parent = <&mpic>; - - ranges = <0x0 0x0 0xff800000 0x00800000 /*8MB Flash*/ - 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/ - 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/ - 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */ - 0x6 0x0 0xfb800000 0x04000000>; /*64MB Flash*/ - - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <1>; - device-width = <1>; - partition@0x0 { - label = "space"; - reg = <0x00000000 0x00100000>; - }; - partition@0x100000 { - label = "bootloader"; - reg = <0x00100000 0x00700000>; - read-only; - }; - }; - - epld@5,0 { - compatible = "wrs,epld-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0x5 0x0 0x00b10000>; - ranges = < - 0x0 0x0 0x5 0x000000 0x1fff /* LED */ - 0x1 0x0 0x5 0x100000 0x1fff /* Switches */ - 0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */ - 0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */ - >; - - led@0,0 { - compatible = "led"; - reg = <0x0 0x0 0x1fff>; - }; - - switches@1,0 { - compatible = "switches"; - reg = <0x1 0x0 0x1fff>; - }; - - hw-rev@3,0 { - compatible = "hw-rev"; - reg = <0x3 0x0 0x1fff>; - }; - - eeprom@b,0 { - compatible = "eeprom"; - reg = <0xb 0 0x1fff>; - }; - - }; - - alt-flash@6,0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6 0x0 0x04000000>; - compatible = "cfi-flash"; - bank-width = <4>; - device-width = <1>; - partition@0x0 { - label = "bootloader"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@0x00100000 { - label = "file-system"; - reg = <0x00100000 0x01f00000>; - }; - partition@0x02000000 { - label = "boot-config"; - reg = <0x02000000 0x00100000>; - }; - partition@0x02100000 { - label = "space"; - reg = <0x02100000 0x01f00000>; - }; - }; - }; - - soc8548@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x00000000 0xe0000000 0x00100000>; - bus-frequency = <0>; - compatible = "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8548-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8548-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <0x12 0x2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8548-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <0x20>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupt-parent = <&mpic>; - interrupts = <0x10 0x2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@19 { - interrupt-parent = <&mpic>; - interrupts = <0x6 0x1>; - reg = <0x19>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1a { - interrupt-parent = <&mpic>; - interrupts = <0x7 0x1>; - reg = <0x1a>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <0x2a 0x2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <0x2a 0x2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities reg - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - crypto@30000 { - compatible = "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0xfe>; - fsl,descriptor-types-mask = <0x12b0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x01 (PCI-X slot) @66MHz */ - 0x0800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x0800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x0800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x0800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 (PCI, 3.3V 32bit) @33MHz */ - 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1>; - - interrupt-parent = <&mpic>; - interrupts = <0x18 0x2>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00800000>; - clock-frequency = <66000000>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - }; - - pci1: pcie@e000a000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x0 (PEX) */ - 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1>; - - interrupt-parent = <&mpic>; - interrupts = <0x1a 0x2>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2800000 0x0 0x08000000>; - clock-frequency = <33000000>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe000a000 0x1000>; - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x10000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00800000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8560.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8560.dts deleted file mode 100644 index 72078eb1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8560.dts +++ /dev/null @@ -1,406 +0,0 @@ -/* - * SBC8560 Device Tree Source - * - * Copyright 2007 Wind River Systems Inc. - * - * Paul Gortmaker (see MAINTAINERS for contact information) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "SBC8560"; - compatible = "SBC8560"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8560@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <0x20>; // 32 bytes - i-cache-line-size = <0x20>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; - }; - - soc@ff700000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xff700000 0x00100000>; - clock-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8560-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8560-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <0x12 0x2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8560-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <0x20>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <0x10 0x2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - phy0: ethernet-phy@19 { - interrupt-parent = <&mpic>; - interrupts = <0x6 0x1>; - reg = <0x19>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1a { - interrupt-parent = <&mpic>; - interrupts = <0x7 0x1>; - reg = <0x1a>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@1b { - interrupt-parent = <&mpic>; - interrupts = <0x8 0x1>; - reg = <0x1b>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@1c { - interrupt-parent = <&mpic>; - interrupts = <0x8 0x1>; - reg = <0x1c>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,open-pic"; - reg = <0x40000 0x40000>; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x4000 0x9000 0x2000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8560-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <165000000>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x2e 0x2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; - }; - - enet2: ethernet@91320 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x16200300>; - interrupts = <0x21 0x8>; - interrupt-parent = <&cpmpic>; - phy-handle = <&phy2>; - }; - - enet3: ethernet@91340 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x1a400300>; - interrupts = <0x22 0x8>; - interrupt-parent = <&cpmpic>; - phy-handle = <&phy3>; - }; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8560-guts"; - reg = <0xe0000 0x1000>; - }; - }; - - pci0: pci@ff708000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xff708000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x02 */ - 0x1000 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x1000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x1000 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x1000 0x0 0x0 0x4 &mpic 0x5 0x1>; - - interrupt-parent = <&mpic>; - interrupts = <0x18 0x2>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - }; - - localbus@ff705000 { - compatible = "fsl,mpc8560-localbus", "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xff705000 0x100>; // BRx, ORx, etc. - - ranges = < - 0x0 0x0 0xff800000 0x0800000 // 8MB boot flash - 0x1 0x0 0xe4000000 0x4000000 // 64MB flash - 0x3 0x0 0x20000000 0x4000000 // 64MB SDRAM - 0x4 0x0 0x24000000 0x4000000 // 64MB SDRAM - 0x5 0x0 0xfc000000 0x0c00000 // EPLD - 0x6 0x0 0xe0000000 0x4000000 // 64MB flash - 0x7 0x0 0x80000000 0x0200000 // ATM1,2 - >; - - epld@5,0 { - compatible = "wrs,epld-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0x5 0x0 0xc00000>; - ranges = < - 0x0 0x0 0x5 0x000000 0x1fff // LED disp. - 0x1 0x0 0x5 0x100000 0x1fff // switches - 0x2 0x0 0x5 0x200000 0x1fff // ID reg. - 0x3 0x0 0x5 0x300000 0x1fff // status reg. - 0x4 0x0 0x5 0x400000 0x1fff // reset reg. - 0x5 0x0 0x5 0x500000 0x1fff // Wind port - 0x7 0x0 0x5 0x700000 0x1fff // UART #1 - 0x8 0x0 0x5 0x800000 0x1fff // UART #2 - 0x9 0x0 0x5 0x900000 0x1fff // RTC - 0xb 0x0 0x5 0xb00000 0x1fff // EEPROM - >; - - bidr@2,0 { - compatible = "wrs,sbc8560-bidr"; - reg = <0x2 0x0 0x10>; - }; - - bcsr@3,0 { - compatible = "wrs,sbc8560-bcsr"; - reg = <0x3 0x0 0x10>; - }; - - brstcr@4,0 { - compatible = "wrs,sbc8560-brstcr"; - reg = <0x4 0x0 0x10>; - }; - - serial0: serial@7,0 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x7 0x0 0x100>; - clock-frequency = <1843200>; - interrupts = <0x9 0x2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@8,0 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x8 0x0 0x100>; - clock-frequency = <1843200>; - interrupts = <0xa 0x2>; - interrupt-parent = <&mpic>; - }; - - rtc@9,0 { - compatible = "m48t59"; - reg = <0x9 0x0 0x1fff>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8641d.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8641d.dts deleted file mode 100644 index 56bebce8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8641d.dts +++ /dev/null @@ -1,459 +0,0 @@ -/* - * SBC8641D Device Tree Source - * - * Copyright 2008 Wind River Systems Inc. - * - * Paul Gortmaker (see MAINTAINERS for contact information) - * - * Based largely on the mpc8641_hpcn.dts by Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "SBC8641D"; - compatible = "wind,sbc8641"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8641@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; // L1 - i-cache-size = <32768>; // L1 - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - PowerPC,8641@1 { - device_type = "cpu"; - reg = <1>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512M at 0x0 - }; - - localbus@f8005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8641-localbus", "simple-bus"; - reg = <0xf8005000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash - 1 0 0xf0000000 0x00010000 // 64KB EEPROM - 2 0 0xf1000000 0x00100000 // EPLD (1MB) - 3 0 0xe0000000 0x04000000 // 64MB LB SDRAM (CS3) - 4 0 0xe4000000 0x04000000 // 64MB LB SDRAM (CS4) - 6 0 0xf4000000 0x00100000 // LCD display (1MB) - 7 0 0xe8000000 0x04000000>; // 64MB OneNAND - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x01000000>; - bank-width = <2>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "dtb"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@300000 { - label = "kernel"; - reg = <0x00100000 0x00400000>; - read-only; - }; - partition@400000 { - label = "fs"; - reg = <0x00500000 0x00a00000>; - }; - partition@700000 { - label = "firmware"; - reg = <0x00f00000 0x00100000>; - read-only; - }; - }; - - epld@2,0 { - compatible = "wrs,epld-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <2 0 0x100000>; - ranges = <0 0 5 0 1 // User switches - 1 0 5 1 1 // Board ID/Rev - 3 0 5 3 1>; // LEDs - }; - }; - - soc@f8000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x00000000 0xf8000000 0x00100000>; - bus-frequency = <0>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8641-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1f { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0x1f>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <28 2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - big-endian; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8641-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@f8008000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xf8008000 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xff00 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0000 0 0 1 &mpic 0 1 - 0x0000 0 0 2 &mpic 1 1 - 0x0000 0 0 3 &mpic 2 1 - 0x0000 0 0 4 &mpic 3 1 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00100000>; - }; - - }; - - pci1: pcie@f8009000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xf8009000 0x1000>; - bus-range = <0 0xff>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0000 0 0 1 &mpic 4 1 - 0x0000 0 0 2 &mpic 5 1 - 0x0000 0 0 3 &mpic 6 1 - 0x0000 0 0 4 &mpic 7 1 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00100000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/sequoia.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/sequoia.dts deleted file mode 100644 index b1d32924..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/sequoia.dts +++ /dev/null @@ -1,412 +0,0 @@ -/* - * Device Tree Source for AMCC Sequoia - * - * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com> - * Copyright (c) 2006, 2007 IBM Corp. - * - * FIXME: Draft only! - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,sequoia"; - compatible = "amcc,sequoia"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - serial3 = &UART3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440EPx"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440epx","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440epx","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-440epx","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440epx", "ibm,sdr-440ep"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440epx", "ibm,cpr-440ep"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-440epx", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali"; - dcr-reg = <0x010 0x002>; - }; - - CRYPTO: crypto@e0100000 { - compatible = "amcc,ppc440epx-crypto","amcc,ppc4xx-crypto"; - reg = <0 0xE0100000 0x80400>; - interrupt-parent = <&UIC0>; - interrupts = <0x17 0x4>; - }; - - rng@e0120000 { - compatible = "amcc,ppc440epx-rng","amcc,ppc4xx-rng"; - reg = <0 0xE0120000 0x150>; - }; - - DMA0: dma { - compatible = "ibm,dma-440epx", "ibm,dma-4xx"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440epx", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - USB1: usb@e0000400 { - compatible = "ibm,usb-ohci-440epx", "ohci-be"; - reg = <0x00000000 0xe0000400 0x00000060>; - interrupt-parent = <&UIC0>; - interrupts = <0x15 0x8>; - }; - - USB0: ehci@e0000300 { - compatible = "ibm,usb-ehci-440epx", "usb-ehci"; - interrupt-parent = <&UIC0>; - interrupts = <0x1a 0x4>; - reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>; - big-endian; - }; - - POB0: opb { - compatible = "ibm,opb-440epx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0x00000001 0x00000000 0x80000000 - 0x80000000 0x00000001 0x80000000 0x80000000>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440epx", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl256n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Kernel"; - reg = <0x00000000 0x00180000>; - }; - partition@180000 { - label = "ramdisk"; - reg = <0x00180000 0x00200000>; - }; - partition@380000 { - label = "file system"; - reg = <0x00380000 0x03aa0000>; - }; - partition@3e20000 { - label = "kozio"; - reg = <0x03e20000 0x00140000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - - ndfc@3,0 { - compatible = "ibm,ndfc"; - reg = <0x00000003 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00084000>; - }; - partition@84000 { - label = "user"; - reg = <0x00000000 0x01f7c000>; - }; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - UART2: serial@ef600500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600500 0x00000008>; - virtual-reg = <0xef600500>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC1>; - interrupts = <0x3 0x4>; - }; - - UART3: serial@ef600600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600600 0x00000008>; - virtual-reg = <0xef600600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC1>; - interrupts = <0x4 0x4>; - }; - - IIC0: i2c@ef600700 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ibm,iic-440epx", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - - hwmon@48 { - compatible = "adi,ad7414"; - reg = <0x48>; - }; - }; - - IIC1: i2c@ef600800 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ibm,iic-440epx", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-440epx", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - RGMII0: emac-rgmii@ef601000 { - compatible = "ibm,rgmii-440epx", "ibm,rgmii"; - reg = <0xef601000 0x00000008>; - has-mdio; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-440epx", "ibm,emac4"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 - /*Wake*/ 0x1 &UIC1 0x1d 0x4>; - reg = <0xef600e00 0x00000074>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-440epx", "ibm,emac4"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 - /*Wake*/ 0x1 &UIC1 0x1f 0x4>; - reg = <0xef600f00 0x00000074>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCI0: pci@1ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440epx-pci", "ibm,plb-pci"; - primary; - reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */ - 0x00000001 0xeed00000 0x00000004 /* IACK */ - 0x00000001 0xeed00000 0x00000004 /* Special cycle */ - 0x00000001 0xef400000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - * From the 440EPx user manual: - * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB - * I/O 1 E800 0000 1 E800 FFFF 64KB - * I/O 1 E880 0000 1 EBFF FFFF 56MB - */ - ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000 - 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000 - 0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* All PCI interrupts are routed to IRQ 67 */ - interrupt-map-mask = <0x0 0x0 0x0 0x0>; - interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - bootargs = "console=ttyS0,115200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/socrates.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/socrates.dts deleted file mode 100644 index 134a5ff9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/socrates.dts +++ /dev/null @@ -1,352 +0,0 @@ -/* - * Device Tree Source for the Socrates board (MPC8544). - * - * Copyright (c) 2008 Emcraft Systems. - * Sergei Poselenov, <sposelenov@emcraft.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "abb,socrates"; - compatible = "abb,socrates"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8544@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; // Filled in by U-Boot - }; - - soc8544@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - - ranges = <0x00000000 0xe0000000 0x00100000>; - bus-frequency = <0>; // Filled in by U-Boot - compatible = "fsl,mpc8544-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8544-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8544-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8544-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl,mpc8544-i2c", "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - fsl,preserve-clocking; - - dtt@28 { - compatible = "winbond,w83782d"; - reg = <0x28>; - }; - rtc@32 { - compatible = "epson,rx8025"; - reg = <0x32>; - interrupts = <7 1>; - interrupt-parent = <&mpic>; - }; - dtt@4c { - compatible = "dallas,ds75"; - reg = <0x4c>; - }; - ts@4a { - compatible = "ti,tsc2003"; - reg = <0x4a>; - interrupt-parent = <&mpic>; - interrupts = <8 1>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl,mpc8544-i2c", "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - fsl,preserve-clocking; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - phy-handle = <&phy0>; - tbi-handle = <&tbi0>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <0 1>; - reg = <0>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <0 1>; - reg = <1>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - }; - }; - }; - - enet1: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - phy-handle = <&phy1>; - tbi-handle = <&tbi1>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - - localbus { - compatible = "fsl,mpc8544-localbus", - "fsl,pq3-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xe0005000 0x40>; - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = <0 0 0xfc000000 0x04000000 - 2 0 0xc8000000 0x04000000 - 3 0 0xc0000000 0x00100000 - >; /* Overwritten by U-Boot */ - - nor_flash@0,0 { - compatible = "amd,s29gl256n", "cfi-flash"; - bank-width = <2>; - reg = <0x0 0x000000 0x4000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x0 0x1e0000>; - read-only; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x1e0000 0x20000>; - }; - partition@200000 { - label = "root"; - reg = <0x200000 0x200000>; - }; - partition@400000 { - label = "user"; - reg = <0x400000 0x3b80000>; - }; - partition@3f80000 { - label = "env"; - reg = <0x3f80000 0x40000>; - read-only; - }; - partition@3fc0000 { - label = "u-boot"; - reg = <0x3fc0000 0x40000>; - read-only; - }; - }; - - display@2,0 { - compatible = "fujitsu,lime"; - reg = <2 0x0 0x4000000>; - interrupt-parent = <&mpic>; - interrupts = <6 1>; - }; - - fpga_pic: fpga-pic@3,10 { - compatible = "abb,socrates-fpga-pic"; - reg = <3 0x10 0x10>; - interrupt-controller; - /* IRQs 2, 10, 11, active low, level-sensitive */ - interrupts = <2 1 10 1 11 1>; - interrupt-parent = <&mpic>; - #interrupt-cells = <3>; - }; - - spi@3,60 { - compatible = "abb,socrates-spi"; - reg = <3 0x60 0x10>; - interrupts = <8 4 0>; // number, type, routing - interrupt-parent = <&fpga_pic>; - }; - - nand@3,70 { - compatible = "abb,socrates-nand"; - reg = <3 0x70 0x04>; - bank-width = <1>; - #address-cells = <1>; - #size-cells = <1>; - data@0 { - label = "data"; - reg = <0x0 0x40000000>; - }; - }; - - can@3,100 { - compatible = "philips,sja1000"; - reg = <3 0x100 0x80>; - interrupts = <2 8 1>; // number, type, routing - interrupt-parent = <&fpga_pic>; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 1 &mpic 5 1 - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 1 &mpic 4 1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>; - }; - -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/storcenter.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/storcenter.dts deleted file mode 100644 index 2a555738..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/storcenter.dts +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Device Tree Source for IOMEGA StorCenter - * - * Copyright 2007 Oyvind Repvik - * Copyright 2007 Jon Loeliger - * - * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - model = "StorCenter"; - compatible = "iomega,storcenter"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8241@0 { - device_type = "cpu"; - reg = <0>; - clock-frequency = <200000000>; - timebase-frequency = <25000000>; - bus-frequency = <0>; /* from bootwrapper */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; - d-cache-size = <16384>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x04000000>; /* 64MB @ 0x0 */ - }; - - soc@fc000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8241", "mpc10x"; - store-gathering = <0>; /* 0 == off, !0 == on */ - ranges = <0x0 0xfc000000 0x100000>; - reg = <0xfc000000 0x100000>; /* EUMB */ - bus-frequency = <0>; /* fixed by loader */ - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x20>; - clock-frequency = <97553800>; /* Hz */ - current-speed = <115200>; - interrupts = <25 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x20>; - clock-frequency = <97553800>; /* Hz */ - current-speed = <9600>; - interrupts = <26 2>; - interrupt-parent = <&mpic>; - }; - - mpic: interrupt-controller@40000 { - #interrupt-cells = <2>; - #address-cells = <0>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - interrupt-controller; - reg = <0x40000 0x40000>; - }; - - }; - - pci0: pci@fe800000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "mpc10x-pci"; - reg = <0xfe800000 0x1000>; - ranges = <0x01000000 0x0 0x0 0xfe000000 0x0 0x00c00000 - 0x02000000 0x0 0x80000000 0x80000000 0x0 0x70000000>; - bus-range = <0 0xff>; - clock-frequency = <97553800>; - interrupt-parent = <&mpic>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 13 - IDE */ - 0x6800 0 0 1 &mpic 0 1 - 0x6800 0 0 2 &mpic 0 1 - 0x6800 0 0 3 &mpic 0 1 - 0x6800 0 0 4 &mpic 0 1 - /* IDSEL 14 - USB */ - 0x7000 0 0 1 &mpic 0 1 - 0x7000 0 0 2 &mpic 0 1 - 0x7000 0 0 3 &mpic 0 1 - 0x7000 0 0 4 &mpic 0 1 - /* IDSEL 15 - ETH */ - 0x7800 0 0 1 &mpic 0 1 - 0x7800 0 0 2 &mpic 0 1 - 0x7800 0 0 3 &mpic 0 1 - 0x7800 0 0 4 &mpic 0 1 - >; - }; - - chosen { - linux,stdout-path = &serial0; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/stx_gp3_8560.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/stx_gp3_8560.dts deleted file mode 100644 index b670d03f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/stx_gp3_8560.dts +++ /dev/null @@ -1,306 +0,0 @@ -/* - * STX GP3 - 8560 ADS Device Tree Source - * - * Copyright 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "stx,gp3"; - compatible = "stx,gp3-8560", "stx,gp3"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8560@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc@fdf00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0 0xfdf00000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8560-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8560-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <5 4>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy4: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <5 4>; - reg = <4>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy4>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x4000 0x9000 0x2000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8560-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <0>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; - }; - - serial0: serial@91a20 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a20 0x20 0x88100 0x100>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x4a00000>; - interrupts = <41 8>; - interrupt-parent = <&cpmpic>; - }; - }; - }; - - pci0: pci@fdf08000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x0c */ - 0x6000 0 0 1 &mpic 1 1 - 0x6000 0 0 2 &mpic 2 1 - 0x6000 0 0 3 &mpic 3 1 - 0x6000 0 0 4 &mpic 4 1 - - /* IDSEL 0x0d */ - 0x6800 0 0 1 &mpic 4 1 - 0x6800 0 0 2 &mpic 1 1 - 0x6800 0 0 3 &mpic 2 1 - 0x6800 0 0 4 &mpic 3 1 - - /* IDSEL 0x0e */ - 0x7000 0 0 1 &mpic 3 1 - 0x7000 0 0 2 &mpic 4 1 - 0x7000 0 0 3 &mpic 1 1 - 0x7000 0 0 4 &mpic 2 1 - - /* IDSEL 0x0f */ - 0x7800 0 0 1 &mpic 2 1 - 0x7800 0 0 2 &mpic 3 1 - 0x7800 0 0 3 &mpic 4 1 - 0x7800 0 0 4 &mpic 1 1>; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xfdf08000 0x1000>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/stxssa8555.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/stxssa8555.dts deleted file mode 100644 index 4f166b01..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/stxssa8555.dts +++ /dev/null @@ -1,380 +0,0 @@ -/* - * MPC8555-based STx GP3 Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * - * Copyright 2010 Silicon Turnkey Express LLC. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "stx,gp3"; - compatible = "stx,gp3-8560", "stx,gp3"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8555@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc8555@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8555-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8555-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8555-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x4>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9000 0x1000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8555-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic"; - }; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x10 */ - 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x12 (Slot 1) */ - 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x13 (Slot 2) */ - 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 - - /* IDSEL 0x14 (Slot 3) */ - 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x15 (Slot 4) */ - 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* Bus 1 (Tundra Bridge) */ - /* IDSEL 0x12 (ISA bridge) */ - 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - - i8259@19000 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x19000 0x0 0x0 0x0 0x1>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <1>; - interrupt-parent = <&pci0>; - }; - }; - - pci1: pci@e0009000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0009000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/taishan.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/taishan.dts deleted file mode 100644 index 1657ad0b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/taishan.dts +++ /dev/null @@ -1,427 +0,0 @@ -/* - * Device Tree Source for IBM/AMCC Taishan - * - * Copyright 2007 IBM Corp. - * Hugh Blemings <hugh@au.ibm.com> based off code by - * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,taishan"; - compatible = "amcc,taishan"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC2; - ethernet1 = &EMAC3; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440GX"; - reg = <0x00000000>; - clock-frequency = <800000000>; // 800MHz - timebase-frequency = <0>; // Filled in by zImage - i-cache-line-size = <50>; - d-cache-line-size = <50>; - i-cache-size = <32768>; /* 32 kB */ - d-cache-size = <32768>; /* 32 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage - }; - - - UICB0: interrupt-controller-base { - compatible = "ibm,uic-440gx", "ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x200 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440gx", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */ - interrupt-parent = <&UICB0>; - - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440gx", "ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x3 0x4 0x2 0x4>; /* cascade */ - interrupt-parent = <&UICB0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-440gx", "ibm,uic"; - interrupt-controller; - cell-index = <2>; /* was 1 */ - dcr-reg = <0x210 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x5 0x4 0x4 0x4>; /* cascade */ - interrupt-parent = <&UICB0>; - }; - - - CPC0: cpc { - compatible = "ibm,cpc-440gp"; - dcr-reg = <0x0b0 0x003 0x0e0 0x010>; - // FIXME: anything else? - }; - - L2C0: l2c { - compatible = "ibm,l2-cache-440gx", "ibm,l2-cache"; - dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ - 0x030 0x008>; /* L2 cache DCR's */ - cache-line-size = <32>; /* 32 bytes */ - cache-size = <262144>; /* L2, 256K */ - interrupt-parent = <&UIC2>; - interrupts = <0x17 0x1>; - }; - - plb { - compatible = "ibm,plb-440gx", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <160000000>; // 160MHz - - SDRAM0: memory-controller { - compatible = "ibm,sdram-440gp"; - dcr-reg = <0x010 0x002>; - // FIXME: anything else? - }; - - SRAM0: sram { - compatible = "ibm,sram-440gp"; - dcr-reg = <0x020 0x008 0x00a 0x001>; - }; - - DMA0: dma { - // FIXME: ??? - compatible = "ibm,dma-440gp"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440gx", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <4>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-440gx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Wish there was a nicer way of specifying a full 32-bit - range */ - ranges = <0x00000000 0x00000001 0x00000000 0x80000000 - 0x80000000 0x00000001 0x80000000 0x80000000>; - dcr-reg = <0x090 0x00b>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <80000000>; // 80MHz - - - EBC0: ebc { - compatible = "ibm,ebc-440gx", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <80000000>; // 80MHz - - /* ranges property is supplied by zImage - * based on firmware's configuration of the - * EBC bridge */ - - interrupts = <0x5 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "cfi-flash"; - bank-width = <4>; - device-width = <2>; - reg = <0x0 0x0 0x4000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x0 0x180000>; - }; - partition@180000 { - label = "root"; - reg = <0x180000 0x200000>; - }; - partition@380000 { - label = "user"; - reg = <0x380000 0x3bc0000>; - }; - partition@3f40000 { - label = "env"; - reg = <0x3f40000 0x80000>; - }; - partition@3fc0000 { - label = "u-boot"; - reg = <0x3fc0000 0x40000>; - }; - }; - }; - - - - UART0: serial@40000200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x40000200 0x00000008>; - virtual-reg = <0xe0000200>; - clock-frequency = <11059200>; - current-speed = <115200>; /* 115200 */ - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@40000300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x40000300 0x00000008>; - virtual-reg = <0xe0000300>; - clock-frequency = <11059200>; - current-speed = <115200>; /* 115200 */ - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@40000400 { - /* FIXME */ - compatible = "ibm,iic-440gp", "ibm,iic"; - reg = <0x40000400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - IIC1: i2c@40000500 { - /* FIXME */ - compatible = "ibm,iic-440gp", "ibm,iic"; - reg = <0x40000500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - GPIO0: gpio@40000700 { - /* FIXME */ - compatible = "ibm,gpio-440gp"; - reg = <0x40000700 0x00000020>; - }; - - ZMII0: emac-zmii@40000780 { - compatible = "ibm,zmii-440gx", "ibm,zmii"; - reg = <0x40000780 0x0000000c>; - }; - - RGMII0: emac-rgmii@40000790 { - compatible = "ibm,rgmii"; - reg = <0x40000790 0x00000008>; - }; - - TAH0: emac-tah@40000b50 { - compatible = "ibm,tah-440gx", "ibm,tah"; - reg = <0x40000b50 0x00000030>; - }; - - TAH1: emac-tah@40000d50 { - compatible = "ibm,tah-440gx", "ibm,tah"; - reg = <0x40000d50 0x00000030>; - }; - - EMAC0: ethernet@40000800 { - unused = <0x1>; - device_type = "network"; - compatible = "ibm,emac-440gx", "ibm,emac4"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0x40000800 0x00000074>; - local-mac-address = [000000000000]; // Filled in by zImage - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000001>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - }; - EMAC1: ethernet@40000900 { - unused = <0x1>; - device_type = "network"; - compatible = "ibm,emac-440gx", "ibm,emac4"; - interrupt-parent = <&UIC1>; - interrupts = <0x1e 0x4 0x1f 0x4>; - reg = <0x40000900 0x00000074>; - local-mac-address = [000000000000]; // Filled in by zImage - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000001>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - }; - - EMAC2: ethernet@40000c00 { - device_type = "network"; - compatible = "ibm,emac-440gx", "ibm,emac4"; - interrupt-parent = <&UIC2>; - interrupts = <0x0 0x4 0x1 0x4>; - reg = <0x40000c00 0x00000074>; - local-mac-address = [000000000000]; // Filled in by zImage - mal-device = <&MAL0>; - mal-tx-channel = <2>; - mal-rx-channel = <2>; - cell-index = <2>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-address = <1>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - zmii-device = <&ZMII0>; - zmii-channel = <2>; - tah-device = <&TAH0>; - tah-channel = <0>; - }; - - EMAC3: ethernet@40000e00 { - device_type = "network"; - compatible = "ibm,emac-440gx", "ibm,emac4"; - interrupt-parent = <&UIC2>; - interrupts = <0x2 0x4 0x3 0x4>; - reg = <0x40000e00 0x00000074>; - local-mac-address = [000000000000]; // Filled in by zImage - mal-device = <&MAL0>; - mal-tx-channel = <3>; - mal-rx-channel = <3>; - cell-index = <3>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-address = <3>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - zmii-device = <&ZMII0>; - zmii-channel = <3>; - tah-device = <&TAH1>; - tah-channel = <0>; - }; - - - GPT0: gpt@40000a00 { - /* FIXME */ - reg = <0x40000a00 0x000000d4>; - interrupt-parent = <&UIC0>; - interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>; - }; - - }; - - PCIX0: pci@20ec00000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix"; - primary; - large-inbound-windows; - enable-msi-hole; - reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */ - 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ - 0x00000002 0x0ed00000 0x00000004 /* Special cycles */ - 0x00000002 0x0ec80000 0x00000100 /* Internal registers */ - 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 1 */ - 0x800 0x0 0x0 0x1 &UIC0 0x17 0x8 - 0x800 0x0 0x0 0x2 &UIC0 0x18 0x8 - 0x800 0x0 0x0 0x3 &UIC0 0x19 0x8 - 0x800 0x0 0x0 0x4 &UIC0 0x1a 0x8 - - /* IDSEL 2 */ - 0x1000 0x0 0x0 0x1 &UIC0 0x18 0x8 - 0x1000 0x0 0x0 0x2 &UIC0 0x19 0x8 - 0x1000 0x0 0x0 0x3 &UIC0 0x1a 0x8 - 0x1000 0x0 0x0 0x4 &UIC0 0x17 0x8 - >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@40000300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm5200.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm5200.dts deleted file mode 100644 index 1db07f6c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm5200.dts +++ /dev/null @@ -1,211 +0,0 @@ -/* - * TQM5200 board Device Tree Source - * - * Copyright (C) 2007 Semihalf - * Marian Balakowicz <m8@semihalf.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm5200"; - compatible = "tqc,tqm5200"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&mpc5200_pic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,5200@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x04000000>; // 64MB - }; - - soc5200@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc5200-immr"; - ranges = <0 0xf0000000 0x0000c000>; - reg = <0xf0000000 0x00000100>; - bus-frequency = <0>; // from bootloader - system-frequency = <0>; // from bootloader - - cdm@200 { - compatible = "fsl,mpc5200-cdm"; - reg = <0x200 0x38>; - }; - - mpc5200_pic: interrupt-controller@500 { - // 5200 interrupts are encoded into two levels; - interrupt-controller; - #interrupt-cells = <3>; - compatible = "fsl,mpc5200-pic"; - reg = <0x500 0x80>; - }; - - timer@600 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x600 0x10>; - interrupts = <1 9 0>; - fsl,has-wdt; - }; - - can@900 { - compatible = "fsl,mpc5200-mscan"; - interrupts = <2 17 0>; - reg = <0x900 0x80>; - }; - - can@980 { - compatible = "fsl,mpc5200-mscan"; - interrupts = <2 18 0>; - reg = <0x980 0x80>; - }; - - gpio_simple: gpio@b00 { - compatible = "fsl,mpc5200-gpio"; - reg = <0xb00 0x40>; - interrupts = <1 7 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - usb@1000 { - compatible = "fsl,mpc5200-ohci","ohci-be"; - reg = <0x1000 0xff>; - interrupts = <2 6 0>; - }; - - dma-controller@1200 { - compatible = "fsl,mpc5200-bestcomm"; - reg = <0x1200 0x80>; - interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 - 3 4 0 3 5 0 3 6 0 3 7 0 - 3 8 0 3 9 0 3 10 0 3 11 0 - 3 12 0 3 13 0 3 14 0 3 15 0>; - }; - - xlb@1f00 { - compatible = "fsl,mpc5200-xlb"; - reg = <0x1f00 0x100>; - }; - - serial@2000 { // PSC1 - compatible = "fsl,mpc5200-psc-uart"; - reg = <0x2000 0x100>; - interrupts = <2 1 0>; - }; - - serial@2200 { // PSC2 - compatible = "fsl,mpc5200-psc-uart"; - reg = <0x2200 0x100>; - interrupts = <2 2 0>; - }; - - serial@2400 { // PSC3 - compatible = "fsl,mpc5200-psc-uart"; - reg = <0x2400 0x100>; - interrupts = <2 3 0>; - }; - - ethernet@3000 { - compatible = "fsl,mpc5200-fec"; - reg = <0x3000 0x400>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <2 5 0>; - phy-handle = <&phy0>; - }; - - mdio@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-mdio"; - reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts - interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. - - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - ata@3a00 { - compatible = "fsl,mpc5200-ata"; - reg = <0x3a00 0x100>; - interrupts = <2 7 0>; - }; - - i2c@3d40 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d40 0x40>; - interrupts = <2 16 0>; - - rtc@68 { - compatible = "dallas,ds1307"; - reg = <0x68>; - }; - }; - - sram@8000 { - compatible = "fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - localbus { - compatible = "fsl,mpc5200-lpb","simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0xfc000000 0x02000000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - bank-width = <4>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - }; - }; - - pci@f0000d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "fsl,mpc5200-pci"; - reg = <0xf0000d00 0x100>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 - 0xc000 0 0 2 &mpc5200_pic 0 0 3 - 0xc000 0 0 3 &mpc5200_pic 0 0 3 - 0xc000 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8540.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8540.dts deleted file mode 100644 index ed264d9a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8540.dts +++ /dev/null @@ -1,349 +0,0 @@ -/* - * TQM 8540 Device Tree Source - * - * Copyright 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm8540"; - compatible = "tqc,tqm8540"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8540@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8540-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8540-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "FEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <41 2>; - interrupt-parent = <&mpic>; - phy-handle = <&phy3>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - }; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8540-localbus", "fsl,pq3-localbus", - "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = <0x0 0x0 0xfe000000 0x02000000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x02000000>; - bank-width = <4>; - device-width = <2>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00180000>; - }; - partition@180000 { - label = "root"; - reg = <0x00180000 0x01dc0000>; - }; - partition@1f40000 { - label = "env1"; - reg = <0x01f40000 0x00040000>; - }; - partition@1f80000 { - label = "env2"; - reg = <0x01f80000 0x00040000>; - }; - partition@1fc0000 { - label = "u-boot"; - reg = <0x01fc0000 0x00040000>; - read-only; - }; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 28 */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1 - 0xe000 0 0 3 &mpic 6 1 - 0xe000 0 0 4 &mpic 5 1 - - /* IDSEL 11 */ - 0x5800 0 0 1 &mpic 6 1 - 0x5800 0 0 2 &mpic 5 1 - >; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8541.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8541.dts deleted file mode 100644 index 92524211..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8541.dts +++ /dev/null @@ -1,329 +0,0 @@ -/* - * TQM 8541 Device Tree Source - * - * Copyright 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm8541"; - compatible = "tqc,tqm8541"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8541@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8541-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8541-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8541-cpm", "fsl,cpm2", "simple-bus"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x2000 0x9000 0x1000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8541-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <0>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic"; - }; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 28 */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1 - 0xe000 0 0 3 &mpic 6 1 - 0xe000 0 0 4 &mpic 5 1 - - /* IDSEL 11 */ - 0x5800 0 0 1 &mpic 6 1 - 0x5800 0 0 2 &mpic 5 1 - >; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8548-bigflash.dts deleted file mode 100644 index 6e1ac508..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8548-bigflash.dts +++ /dev/null @@ -1,504 +0,0 @@ -/* - * TQM8548 Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * Copyright 2008 Wolfgang Grandegger <wg@denx.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm8548"; - compatible = "tqc,tqm8548"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8548@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; // Filled in by U-Boot - }; - - soc@a0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xa0000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8548-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8548-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8548-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8548-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy1: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - phy4: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <4>; - device_type = "ethernet-phy"; - }; - phy5: ethernet-phy@5 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <5>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy4>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy5>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - current-speed = <115200>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - current-speed = <115200>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { // global utilities reg - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - localbus@a0005000 { - compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xa0005000 0x100>; // BRx, ORx, etc. - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = < - 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 - 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 - 2 0x0 0xa3000000 0x00008000 // CAN (2 x CC770) - 3 0x0 0xa3010000 0x00008000 // NAND FLASH - - >; - - flash@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <1 0x0 0x8000000>; - bank-width = <4>; - device-width = <1>; - - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00300000>; - }; - partition@500000 { - label = "user"; - reg = <0x00500000 0x07a00000>; - }; - partition@7f00000 { - label = "env1"; - reg = <0x07f00000 0x00040000>; - }; - partition@7f40000 { - label = "env2"; - reg = <0x07f40000 0x00040000>; - }; - partition@7f80000 { - label = "u-boot"; - reg = <0x07f80000 0x00080000>; - read-only; - }; - }; - - /* Note: CAN support needs be enabled in U-Boot */ - can@2,0 { - compatible = "bosch,cc770"; // Bosch CC770 - reg = <2 0x0 0x100>; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - bosch,external-clock-frequency = <16000000>; - bosch,disconnect-rx1-input; - bosch,disconnect-tx1-output; - bosch,iso-low-speed-mux; - bosch,clock-out-frequency = <16000000>; - }; - - can@2,100 { - compatible = "bosch,cc770"; // Bosch CC770 - reg = <2 0x100 0x100>; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - bosch,external-clock-frequency = <16000000>; - bosch,disconnect-rx1-input; - bosch,disconnect-tx1-output; - bosch,iso-low-speed-mux; - }; - - /* Note: NAND support needs to be enabled in U-Boot */ - upm@3,0 { - #address-cells = <0>; - #size-cells = <0>; - compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand"; - reg = <3 0x0 0x800>; - fsl,upm-addr-offset = <0x10>; - fsl,upm-cmd-offset = <0x08>; - /* Micron MT29F8G08FAB multi-chip device */ - fsl,upm-addr-line-cs-offsets = <0x0 0x200>; - fsl,upm-wait-flags = <0x5>; - chip-delay = <25>; // in micro-seconds - - nand@0 { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "fs"; - reg = <0x00000000 0x10000000>; - }; - }; - }; - }; - - pci0: pci@a0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xa0008000 0x1000>; - clock-frequency = <33333333>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 28 */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1 - 0xe000 0 0 3 &mpic 6 1 - 0xe000 0 0 4 &mpic 5 1 - - /* IDSEL 11 */ - 0x5800 0 0 1 &mpic 6 1 - 0x5800 0 0 2 &mpic 5 1 - >; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xa2000000 0 0x01000000>; - }; - - pci1: pcie@a000a000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 (PEX) */ - 0x00000 0 0 1 &mpic 0 1 - 0x00000 0 0 2 &mpic 1 1 - 0x00000 0 0 3 &mpic 2 1 - 0x00000 0 0 4 &mpic 3 1>; - - interrupt-parent = <&mpic>; - interrupts = <26 2>; - bus-range = <0 0xff>; - ranges = <0x02000000 0 0xb0000000 0xb0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xaf000000 0 0x08000000>; - clock-frequency = <33333333>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xa000a000 0x1000>; - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0 0xb0000000 0x02000000 0 - 0xb0000000 0 0x10000000 - 0x01000000 0 0x00000000 0x01000000 0 - 0x00000000 0 0x08000000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8548.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8548.dts deleted file mode 100644 index 161e75ea..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8548.dts +++ /dev/null @@ -1,504 +0,0 @@ -/* - * TQM8548 Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * Copyright 2008 Wolfgang Grandegger <wg@denx.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm8548"; - compatible = "tqc,tqm8548"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8548@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; // Filled in by U-Boot - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8548-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8548-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8548-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8548-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy1: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - phy4: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <4>; - device_type = "ethernet-phy"; - }; - phy5: ethernet-phy@5 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <5>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy4>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy5>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - current-speed = <115200>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - current-speed = <115200>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { // global utilities reg - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - localbus@e0005000 { - compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xe0005000 0x100>; // BRx, ORx, etc. - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = < - 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 - 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 - 2 0x0 0xe3000000 0x00008000 // CAN (2 x CC770) - 3 0x0 0xe3010000 0x00008000 // NAND FLASH - - >; - - flash@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <1 0x0 0x8000000>; - bank-width = <4>; - device-width = <1>; - - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00300000>; - }; - partition@500000 { - label = "user"; - reg = <0x00500000 0x07a00000>; - }; - partition@7f00000 { - label = "env1"; - reg = <0x07f00000 0x00040000>; - }; - partition@7f40000 { - label = "env2"; - reg = <0x07f40000 0x00040000>; - }; - partition@7f80000 { - label = "u-boot"; - reg = <0x07f80000 0x00080000>; - read-only; - }; - }; - - /* Note: CAN support needs be enabled in U-Boot */ - can@2,0 { - compatible = "bosch,cc770"; // Bosch CC770 - reg = <2 0x0 0x100>; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - bosch,external-clock-frequency = <16000000>; - bosch,disconnect-rx1-input; - bosch,disconnect-tx1-output; - bosch,iso-low-speed-mux; - bosch,clock-out-frequency = <16000000>; - }; - - can@2,100 { - compatible = "bosch,cc770"; // Bosch CC770 - reg = <2 0x100 0x100>; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - bosch,external-clock-frequency = <16000000>; - bosch,disconnect-rx1-input; - bosch,disconnect-tx1-output; - bosch,iso-low-speed-mux; - }; - - /* Note: NAND support needs to be enabled in U-Boot */ - upm@3,0 { - #address-cells = <0>; - #size-cells = <0>; - compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand"; - reg = <3 0x0 0x800>; - fsl,upm-addr-offset = <0x10>; - fsl,upm-cmd-offset = <0x08>; - /* Micron MT29F8G08FAB multi-chip device */ - fsl,upm-addr-line-cs-offsets = <0x0 0x200>; - fsl,upm-wait-flags = <0x5>; - chip-delay = <25>; // in micro-seconds - - nand@0 { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "fs"; - reg = <0x00000000 0x10000000>; - }; - }; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <33333333>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 28 */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1 - 0xe000 0 0 3 &mpic 6 1 - 0xe000 0 0 4 &mpic 5 1 - - /* IDSEL 11 */ - 0x5800 0 0 1 &mpic 6 1 - 0x5800 0 0 2 &mpic 5 1 - >; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; - }; - - pci1: pcie@e000a000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 (PEX) */ - 0x00000 0 0 1 &mpic 0 1 - 0x00000 0 0 2 &mpic 1 1 - 0x00000 0 0 3 &mpic 2 1 - 0x00000 0 0 4 &mpic 3 1>; - - interrupt-parent = <&mpic>; - interrupts = <26 2>; - bus-range = <0 0xff>; - ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x20000000 - 0x01000000 0 0x00000000 0xef000000 0 0x08000000>; - clock-frequency = <33333333>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe000a000 0x1000>; - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0 0xc0000000 0x02000000 0 - 0xc0000000 0 0x20000000 - 0x01000000 0 0x00000000 0x01000000 0 - 0x00000000 0 0x08000000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8555.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8555.dts deleted file mode 100644 index aa6ff0d3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8555.dts +++ /dev/null @@ -1,329 +0,0 @@ -/* - * TQM 8555 Device Tree Source - * - * Copyright 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm8555"; - compatible = "tqc,tqm8555"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8555@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8555-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8555-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-cpm", "fsl,cpm2", "simple-bus"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x2000 0x9000 0x1000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8555-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <0>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic"; - }; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 28 */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1 - 0xe000 0 0 3 &mpic 6 1 - 0xe000 0 0 4 &mpic 5 1 - - /* IDSEL 11 */ - 0x5800 0 0 1 &mpic 6 1 - 0x5800 0 0 2 &mpic 5 1 - >; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8560.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8560.dts deleted file mode 100644 index 7665a16a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8560.dts +++ /dev/null @@ -1,402 +0,0 @@ -/* - * TQM 8560 Device Tree Source - * - * Copyright 2008 Freescale Semiconductor Inc. - * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm8560"; - compatible = "tqc,tqm8560"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8560@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8560-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8560-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x4000 0x9000 0x2000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8560-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <0>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; - }; - - serial0: serial@91a00 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a00 0x20 0x88000 0x100>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - current-speed = <115200>; - interrupts = <40 8>; - interrupt-parent = <&cpmpic>; - }; - - serial1: serial@91a20 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a20 0x20 0x88100 0x100>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x4a00000>; - current-speed = <115200>; - interrupts = <41 8>; - interrupt-parent = <&cpmpic>; - }; - - enet2: ethernet@91340 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x1a400300>; - interrupts = <34 8>; - interrupt-parent = <&cpmpic>; - phy-handle = <&phy3>; - }; - }; - }; - - localbus@e0005000 { - compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xe0005000 0x100>; // BRx, ORx, etc. - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = < - 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 - 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 - 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527) - >; - - flash@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <1 0x0 0x8000000>; - bank-width = <4>; - device-width = <1>; - - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00300000>; - }; - partition@500000 { - label = "user"; - reg = <0x00500000 0x07a00000>; - }; - partition@7f00000 { - label = "env1"; - reg = <0x07f00000 0x00040000>; - }; - partition@7f40000 { - label = "env2"; - reg = <0x07f40000 0x00040000>; - }; - partition@7f80000 { - label = "u-boot"; - reg = <0x07f80000 0x00080000>; - read-only; - }; - }; - - /* Note: CAN support needs be enabled in U-Boot */ - can0@2,0 { - compatible = "intel,82527"; // Bosch CC770 - reg = <2 0x0 0x100>; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - }; - - can1@2,100 { - compatible = "intel,82527"; // Bosch CC770 - reg = <2 0x100 0x100>; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 28 */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1 - 0xe000 0 0 3 &mpic 6 1 - 0xe000 0 0 4 &mpic 5 1 - - /* IDSEL 11 */ - 0x5800 0 0 1 &mpic 6 1 - 0x5800 0 0 2 &mpic 5 1 - >; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8xx.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8xx.dts deleted file mode 100644 index c3dba251..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8xx.dts +++ /dev/null @@ -1,197 +0,0 @@ -/* - * TQM8XX Device Tree Source - * - * Heiko Schocher <hs@denx.de> - * 2010 DENX Software Engineering GmbH - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "TQM8xx"; - compatible = "tqc,tqm8xx"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = ð0; - ethernet1 = ð1; - mdio1 = &phy1; - serial0 = &smc1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,860@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <16>; // 16 bytes - i-cache-line-size = <16>; // 16 bytes - d-cache-size = <0x1000>; // L1, 4K - i-cache-size = <0x1000>; // L1, 4K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - interrupts = <15 2>; // decrementer interrupt - interrupt-parent = <&PIC>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x2000000>; - }; - - localbus@fff00100 { - compatible = "fsl,mpc860-localbus", "fsl,pq1-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xfff00100 0x40>; - - ranges = < - 0x0 0x0 0x40000000 0x800000 - 0x3 0x0 0xc0000000 0x200 - >; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x800000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <4>; - device-width = <2>; - }; - - /* Note: CAN support needs be enabled in U-Boot */ - can@3,0 { - compatible = "intc,82527"; - reg = <3 0x0 0x80>; - interrupts = <8 1>; - interrupt-parent = <&PIC>; - bosch,external-clock-frequency = <16000000>; - bosch,disconnect-rx1-input; - bosch,disconnect-tx1-output; - bosch,iso-low-speed-mux; - bosch,clock-out-frequency = <16000000>; - }; - - can@3,100 { - compatible = "intc,82527"; - reg = <3 0x100 0x80>; - interrupts = <8 1>; - interrupt-parent = <&PIC>; - bosch,external-clock-frequency = <16000000>; - bosch,disconnect-rx1-input; - bosch,disconnect-tx1-output; - bosch,iso-low-speed-mux; - }; - }; - - soc@fff00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xfff00000 0x00004000>; - - phy1: mdio@e00 { - compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio"; - reg = <0xe00 0x188>; - #address-cells = <1>; - #size-cells = <0>; - PHY: ethernet-phy@f { - reg = <0xf>; - device_type = "ethernet-phy"; - }; - }; - - eth1: ethernet@e00 { - device_type = "network"; - compatible = "fsl,mpc866-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0xe00 0x188>; - interrupts = <3 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY>; - linux,network-index = <1>; - }; - - PIC: pic@0 { - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x0 0x24>; - compatible = "fsl,mpc860-pic", "fsl,pq1-pic"; - }; - - cpm@9c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc860-cpm", "fsl,cpm1"; - ranges; - reg = <0x9c0 0x40>; - brg-frequency = <0>; - interrupts = <0 2>; // cpm error interrupt - interrupt-parent = <&CPM_PIC>; - - muram@2000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2000 0x2000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000>; - }; - }; - - brg@9f0 { - compatible = "fsl,mpc860-brg", - "fsl,cpm1-brg", - "fsl,cpm-brg"; - reg = <0x9f0 0x10>; - clock-frequency = <0>; - }; - - CPM_PIC: pic@930 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - interrupts = <5 2 0 2>; - interrupt-parent = <&PIC>; - reg = <0x930 0x20>; - compatible = "fsl,mpc860-cpm-pic", - "fsl,cpm1-pic"; - }; - - - smc1: serial@a80 { - device_type = "serial"; - compatible = "fsl,mpc860-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa80 0x10 0x3e80 0x40>; - interrupts = <4>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x90>; - }; - - eth0: ethernet@a00 { - device_type = "network"; - compatible = "fsl,mpc860-scc-enet", - "fsl,cpm1-scc-enet"; - reg = <0xa00 0x18 0x3c00 0x100>; - interrupts = <30>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-command = <0000>; - linux,network-index = <0>; - fixed-link = <0 0 10 0 0>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/uc101.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/uc101.dts deleted file mode 100644 index ba83d548..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/uc101.dts +++ /dev/null @@ -1,190 +0,0 @@ -/* - * Manroland uc101 board Device Tree Source - * - * Copyright (C) 2009 DENX Software Engineering GmbH - * Heiko Schocher <hs@denx.de> - * Copyright 2006-2007 Secret Lab Technologies Ltd. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "manroland,uc101"; - compatible = "manroland,uc101"; - - soc5200@f0000000 { - gpt0: timer@600 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt1: timer@610 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt2: timer@620 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt3: timer@630 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x630 0x10>; - interrupts = <1 12 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt4: timer@640 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt5: timer@650 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt6: timer@660 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt7: timer@670 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - rtc@800 { - status = "disabled"; - }; - - can@900 { - status = "disabled"; - }; - - can@980 { - status = "disabled"; - }; - - spi@f00 { - status = "disabled"; - }; - - usb@1000 { - status = "disabled"; - }; - - psc@2000 { // PSC1 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2200 { // PSC2 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2400 { // PSC3 - status = "disabled"; - }; - - psc@2600 { // PSC4 - status = "disabled"; - }; - - psc@2800 { // PSC5 - status = "disabled"; - }; - - psc@2c00 { // PSC6 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - compatible = "intel,lxt971"; - reg = <0>; - }; - }; - - i2c@3d00 { - status = "disabled"; - }; - - i2c@3d40 { - fsl,preserve-clocking; - clock-frequency = <400000>; - - hwmon@2c { - compatible = "ad,adm9240"; - reg = <0x2c>; - }; - rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; - }; - }; - - pci@f0000d00 { - status = "disabled"; - }; - - localbus { - ranges = <0 0 0xff800000 0x00800000 - 1 0 0x80000000 0x00800000 - 3 0 0x80000000 0x00800000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x00800000>; - bank-width = <2>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - - partition@0 { - label = "DTS"; - reg = <0x0 0x00100000>; - }; - partition@100000 { - label = "Kernel"; - reg = <0x100000 0x00200000>; - }; - partition@300000 { - label = "RootFS"; - reg = <0x00300000 0x00200000>; - }; - partition@500000 { - label = "user"; - reg = <0x00500000 0x00200000>; - }; - partition@700000 { - label = "U-Boot"; - reg = <0x00700000 0x00040000>; - }; - partition@740000 { - label = "Env"; - reg = <0x00740000 0x00010000>; - }; - partition@750000 { - label = "red. Env"; - reg = <0x00750000 0x00010000>; - }; - partition@760000 { - label = "reserve"; - reg = <0x00760000 0x000a0000>; - }; - }; - - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/virtex440-ml507.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/virtex440-ml507.dts deleted file mode 100644 index 52d8c1ad..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/virtex440-ml507.dts +++ /dev/null @@ -1,398 +0,0 @@ -/* - * This file supports the Xilinx ML507 board with the 440 processor. - * A reference design for the FPGA is provided at http://git.xilinx.com. - * - * (C) Copyright 2008 Xilinx, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - * - * --- - * - * Device Tree Generator version: 1.1 - * - * CAUTION: This file is automatically generated by libgen. - * Version: Xilinx EDK 10.1.03 EDK_K_SP3.6 - * - * XPS project directory: ml507_ppc440_emb_ref - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,virtex440"; - dcr-parent = <&ppc440_0>; - model = "testing"; - DDR2_SDRAM: memory@0 { - device_type = "memory"; - reg = < 0 0x10000000 >; - } ; - chosen { - bootargs = "console=ttyS0 root=/dev/ram"; - linux,stdout-path = &RS232_Uart_1; - } ; - cpus { - #address-cells = <1>; - #cpus = <1>; - #size-cells = <0>; - ppc440_0: cpu@0 { - clock-frequency = <400000000>; - compatible = "PowerPC,440", "ibm,ppc440"; - d-cache-line-size = <0x20>; - d-cache-size = <0x8000>; - dcr-access-method = "native"; - dcr-controller ; - device_type = "cpu"; - i-cache-line-size = <0x20>; - i-cache-size = <0x8000>; - model = "PowerPC,440"; - reg = <0>; - timebase-frequency = <400000000>; - xlnx,apu-control = <1>; - xlnx,apu-udi-0 = <0>; - xlnx,apu-udi-1 = <0>; - xlnx,apu-udi-10 = <0>; - xlnx,apu-udi-11 = <0>; - xlnx,apu-udi-12 = <0>; - xlnx,apu-udi-13 = <0>; - xlnx,apu-udi-14 = <0>; - xlnx,apu-udi-15 = <0>; - xlnx,apu-udi-2 = <0>; - xlnx,apu-udi-3 = <0>; - xlnx,apu-udi-4 = <0>; - xlnx,apu-udi-5 = <0>; - xlnx,apu-udi-6 = <0>; - xlnx,apu-udi-7 = <0>; - xlnx,apu-udi-8 = <0>; - xlnx,apu-udi-9 = <0>; - xlnx,dcr-autolock-enable = <1>; - xlnx,dcu-rd-ld-cache-plb-prio = <0>; - xlnx,dcu-rd-noncache-plb-prio = <0>; - xlnx,dcu-rd-touch-plb-prio = <0>; - xlnx,dcu-rd-urgent-plb-prio = <0>; - xlnx,dcu-wr-flush-plb-prio = <0>; - xlnx,dcu-wr-store-plb-prio = <0>; - xlnx,dcu-wr-urgent-plb-prio = <0>; - xlnx,dma0-control = <0>; - xlnx,dma0-plb-prio = <0>; - xlnx,dma0-rxchannelctrl = <0x1010000>; - xlnx,dma0-rxirqtimer = <0x3ff>; - xlnx,dma0-txchannelctrl = <0x1010000>; - xlnx,dma0-txirqtimer = <0x3ff>; - xlnx,dma1-control = <0>; - xlnx,dma1-plb-prio = <0>; - xlnx,dma1-rxchannelctrl = <0x1010000>; - xlnx,dma1-rxirqtimer = <0x3ff>; - xlnx,dma1-txchannelctrl = <0x1010000>; - xlnx,dma1-txirqtimer = <0x3ff>; - xlnx,dma2-control = <0>; - xlnx,dma2-plb-prio = <0>; - xlnx,dma2-rxchannelctrl = <0x1010000>; - xlnx,dma2-rxirqtimer = <0x3ff>; - xlnx,dma2-txchannelctrl = <0x1010000>; - xlnx,dma2-txirqtimer = <0x3ff>; - xlnx,dma3-control = <0>; - xlnx,dma3-plb-prio = <0>; - xlnx,dma3-rxchannelctrl = <0x1010000>; - xlnx,dma3-rxirqtimer = <0x3ff>; - xlnx,dma3-txchannelctrl = <0x1010000>; - xlnx,dma3-txirqtimer = <0x3ff>; - xlnx,endian-reset = <0>; - xlnx,generate-plb-timespecs = <1>; - xlnx,icu-rd-fetch-plb-prio = <0>; - xlnx,icu-rd-spec-plb-prio = <0>; - xlnx,icu-rd-touch-plb-prio = <0>; - xlnx,interconnect-imask = <0xffffffff>; - xlnx,mplb-allow-lock-xfer = <1>; - xlnx,mplb-arb-mode = <0>; - xlnx,mplb-awidth = <0x20>; - xlnx,mplb-counter = <0x500>; - xlnx,mplb-dwidth = <0x80>; - xlnx,mplb-max-burst = <8>; - xlnx,mplb-native-dwidth = <0x80>; - xlnx,mplb-p2p = <0>; - xlnx,mplb-prio-dcur = <2>; - xlnx,mplb-prio-dcuw = <3>; - xlnx,mplb-prio-icu = <4>; - xlnx,mplb-prio-splb0 = <1>; - xlnx,mplb-prio-splb1 = <0>; - xlnx,mplb-read-pipe-enable = <1>; - xlnx,mplb-sync-tattribute = <0>; - xlnx,mplb-wdog-enable = <1>; - xlnx,mplb-write-pipe-enable = <1>; - xlnx,mplb-write-post-enable = <1>; - xlnx,num-dma = <1>; - xlnx,pir = <0xf>; - xlnx,ppc440mc-addr-base = <0>; - xlnx,ppc440mc-addr-high = <0xfffffff>; - xlnx,ppc440mc-arb-mode = <0>; - xlnx,ppc440mc-bank-conflict-mask = <0xc00000>; - xlnx,ppc440mc-control = <0xf810008f>; - xlnx,ppc440mc-max-burst = <8>; - xlnx,ppc440mc-prio-dcur = <2>; - xlnx,ppc440mc-prio-dcuw = <3>; - xlnx,ppc440mc-prio-icu = <4>; - xlnx,ppc440mc-prio-splb0 = <1>; - xlnx,ppc440mc-prio-splb1 = <0>; - xlnx,ppc440mc-row-conflict-mask = <0x3ffe00>; - xlnx,ppcdm-asyncmode = <0>; - xlnx,ppcds-asyncmode = <0>; - xlnx,user-reset = <0>; - DMA0: sdma@80 { - compatible = "xlnx,ll-dma-1.00.a"; - dcr-reg = < 0x80 0x11 >; - interrupt-parent = <&xps_intc_0>; - interrupts = < 10 2 11 2 >; - } ; - } ; - } ; - plb_v46_0: plb@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,plb-v46-1.03.a", "simple-bus"; - ranges ; - DIP_Switches_8Bit: gpio@81460000 { - compatible = "xlnx,xps-gpio-1.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 7 2 >; - reg = < 0x81460000 0x10000 >; - xlnx,all-inputs = <1>; - xlnx,all-inputs-2 = <0>; - xlnx,dout-default = <0>; - xlnx,dout-default-2 = <0>; - xlnx,family = "virtex5"; - xlnx,gpio-width = <8>; - xlnx,interrupt-present = <1>; - xlnx,is-bidir = <1>; - xlnx,is-bidir-2 = <1>; - xlnx,is-dual = <0>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - } ; - FLASH: flash@fc000000 { - bank-width = <2>; - compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash"; - reg = < 0xfc000000 0x2000000 >; - xlnx,family = "virtex5"; - xlnx,include-datawidth-matching-0 = <0x1>; - xlnx,include-datawidth-matching-1 = <0x0>; - xlnx,include-datawidth-matching-2 = <0x0>; - xlnx,include-datawidth-matching-3 = <0x0>; - xlnx,include-negedge-ioregs = <0x0>; - xlnx,include-plb-ipif = <0x1>; - xlnx,include-wrbuf = <0x1>; - xlnx,max-mem-width = <0x10>; - xlnx,mch-native-dwidth = <0x20>; - xlnx,mch-plb-clk-period-ps = <0x2710>; - xlnx,mch-splb-awidth = <0x20>; - xlnx,mch0-accessbuf-depth = <0x10>; - xlnx,mch0-protocol = <0x0>; - xlnx,mch0-rddatabuf-depth = <0x10>; - xlnx,mch1-accessbuf-depth = <0x10>; - xlnx,mch1-protocol = <0x0>; - xlnx,mch1-rddatabuf-depth = <0x10>; - xlnx,mch2-accessbuf-depth = <0x10>; - xlnx,mch2-protocol = <0x0>; - xlnx,mch2-rddatabuf-depth = <0x10>; - xlnx,mch3-accessbuf-depth = <0x10>; - xlnx,mch3-protocol = <0x0>; - xlnx,mch3-rddatabuf-depth = <0x10>; - xlnx,mem0-width = <0x10>; - xlnx,mem1-width = <0x20>; - xlnx,mem2-width = <0x20>; - xlnx,mem3-width = <0x20>; - xlnx,num-banks-mem = <0x1>; - xlnx,num-channels = <0x2>; - xlnx,priority-mode = <0x0>; - xlnx,synch-mem-0 = <0x0>; - xlnx,synch-mem-1 = <0x0>; - xlnx,synch-mem-2 = <0x0>; - xlnx,synch-mem-3 = <0x0>; - xlnx,synch-pipedelay-0 = <0x2>; - xlnx,synch-pipedelay-1 = <0x2>; - xlnx,synch-pipedelay-2 = <0x2>; - xlnx,synch-pipedelay-3 = <0x2>; - xlnx,tavdv-ps-mem-0 = <0x1adb0>; - xlnx,tavdv-ps-mem-1 = <0x3a98>; - xlnx,tavdv-ps-mem-2 = <0x3a98>; - xlnx,tavdv-ps-mem-3 = <0x3a98>; - xlnx,tcedv-ps-mem-0 = <0x1adb0>; - xlnx,tcedv-ps-mem-1 = <0x3a98>; - xlnx,tcedv-ps-mem-2 = <0x3a98>; - xlnx,tcedv-ps-mem-3 = <0x3a98>; - xlnx,thzce-ps-mem-0 = <0x88b8>; - xlnx,thzce-ps-mem-1 = <0x1b58>; - xlnx,thzce-ps-mem-2 = <0x1b58>; - xlnx,thzce-ps-mem-3 = <0x1b58>; - xlnx,thzoe-ps-mem-0 = <0x1b58>; - xlnx,thzoe-ps-mem-1 = <0x1b58>; - xlnx,thzoe-ps-mem-2 = <0x1b58>; - xlnx,thzoe-ps-mem-3 = <0x1b58>; - xlnx,tlzwe-ps-mem-0 = <0x88b8>; - xlnx,tlzwe-ps-mem-1 = <0x0>; - xlnx,tlzwe-ps-mem-2 = <0x0>; - xlnx,tlzwe-ps-mem-3 = <0x0>; - xlnx,twc-ps-mem-0 = <0x2af8>; - xlnx,twc-ps-mem-1 = <0x3a98>; - xlnx,twc-ps-mem-2 = <0x3a98>; - xlnx,twc-ps-mem-3 = <0x3a98>; - xlnx,twp-ps-mem-0 = <0x11170>; - xlnx,twp-ps-mem-1 = <0x2ee0>; - xlnx,twp-ps-mem-2 = <0x2ee0>; - xlnx,twp-ps-mem-3 = <0x2ee0>; - xlnx,xcl0-linesize = <0x4>; - xlnx,xcl0-writexfer = <0x1>; - xlnx,xcl1-linesize = <0x4>; - xlnx,xcl1-writexfer = <0x1>; - xlnx,xcl2-linesize = <0x4>; - xlnx,xcl2-writexfer = <0x1>; - xlnx,xcl3-linesize = <0x4>; - xlnx,xcl3-writexfer = <0x1>; - } ; - Hard_Ethernet_MAC: xps-ll-temac@81c00000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,compound"; - ethernet@81c00000 { - compatible = "xlnx,xps-ll-temac-1.01.b"; - device_type = "network"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 5 2 >; - llink-connected = <&DMA0>; - local-mac-address = [ 02 00 00 00 00 00 ]; - reg = < 0x81c00000 0x40 >; - xlnx,bus2core-clk-ratio = <1>; - xlnx,phy-type = <1>; - xlnx,phyaddr = <1>; - xlnx,rxcsum = <1>; - xlnx,rxfifo = <0x1000>; - xlnx,temac-type = <0>; - xlnx,txcsum = <1>; - xlnx,txfifo = <0x1000>; - } ; - } ; - IIC_EEPROM: i2c@81600000 { - compatible = "xlnx,xps-iic-2.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 6 2 >; - reg = < 0x81600000 0x10000 >; - xlnx,clk-freq = <0x5f5e100>; - xlnx,family = "virtex5"; - xlnx,gpo-width = <0x1>; - xlnx,iic-freq = <0x186a0>; - xlnx,scl-inertial-delay = <0x0>; - xlnx,sda-inertial-delay = <0x0>; - xlnx,ten-bit-adr = <0x0>; - } ; - LEDs_8Bit: gpio@81400000 { - compatible = "xlnx,xps-gpio-1.00.a"; - reg = < 0x81400000 0x10000 >; - xlnx,all-inputs = <0>; - xlnx,all-inputs-2 = <0>; - xlnx,dout-default = <0>; - xlnx,dout-default-2 = <0>; - xlnx,family = "virtex5"; - xlnx,gpio-width = <8>; - xlnx,interrupt-present = <0>; - xlnx,is-bidir = <1>; - xlnx,is-bidir-2 = <1>; - xlnx,is-dual = <0>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - } ; - LEDs_Positions: gpio@81420000 { - compatible = "xlnx,xps-gpio-1.00.a"; - reg = < 0x81420000 0x10000 >; - xlnx,all-inputs = <0>; - xlnx,all-inputs-2 = <0>; - xlnx,dout-default = <0>; - xlnx,dout-default-2 = <0>; - xlnx,family = "virtex5"; - xlnx,gpio-width = <5>; - xlnx,interrupt-present = <0>; - xlnx,is-bidir = <1>; - xlnx,is-bidir-2 = <1>; - xlnx,is-dual = <0>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - } ; - Push_Buttons_5Bit: gpio@81440000 { - compatible = "xlnx,xps-gpio-1.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 8 2 >; - reg = < 0x81440000 0x10000 >; - xlnx,all-inputs = <1>; - xlnx,all-inputs-2 = <0>; - xlnx,dout-default = <0>; - xlnx,dout-default-2 = <0>; - xlnx,family = "virtex5"; - xlnx,gpio-width = <5>; - xlnx,interrupt-present = <1>; - xlnx,is-bidir = <1>; - xlnx,is-bidir-2 = <1>; - xlnx,is-dual = <0>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - } ; - RS232_Uart_1: serial@83e00000 { - clock-frequency = <100000000>; - compatible = "xlnx,xps-uart16550-2.00.b", "ns16550"; - current-speed = <9600>; - device_type = "serial"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 9 2 >; - reg = < 0x83e00000 0x10000 >; - reg-offset = <0x1003>; - reg-shift = <2>; - xlnx,family = "virtex5"; - xlnx,has-external-rclk = <0>; - xlnx,has-external-xin = <0>; - xlnx,is-a-16550 = <1>; - } ; - SysACE_CompactFlash: sysace@83600000 { - compatible = "xlnx,xps-sysace-1.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 4 2 >; - reg = < 0x83600000 0x10000 >; - xlnx,family = "virtex5"; - xlnx,mem-width = <0x10>; - } ; - xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 { - compatible = "xlnx,xps-bram-if-cntlr-1.00.a"; - reg = < 0xffff0000 0x10000 >; - xlnx,family = "virtex5"; - } ; - xps_intc_0: interrupt-controller@81800000 { - #interrupt-cells = <2>; - compatible = "xlnx,xps-intc-1.00.a"; - interrupt-controller ; - reg = < 0x81800000 0x10000 >; - xlnx,num-intr-inputs = <0xc>; - } ; - xps_timebase_wdt_1: xps-timebase-wdt@83a00000 { - compatible = "xlnx,xps-timebase-wdt-1.00.b"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 2 0 1 2 >; - reg = < 0x83a00000 0x10000 >; - xlnx,family = "virtex5"; - xlnx,wdt-enable-once = <0>; - xlnx,wdt-interval = <0x1e>; - } ; - xps_timer_1: timer@83c00000 { - compatible = "xlnx,xps-timer-1.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 3 2 >; - reg = < 0x83c00000 0x10000 >; - xlnx,count-width = <0x20>; - xlnx,family = "virtex5"; - xlnx,gen0-assert = <1>; - xlnx,gen1-assert = <1>; - xlnx,one-timer-only = <1>; - xlnx,trig0-assert = <1>; - xlnx,trig1-assert = <1>; - } ; - } ; -} ; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/virtex440-ml510.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/virtex440-ml510.dts deleted file mode 100644 index 81a8dc2c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/virtex440-ml510.dts +++ /dev/null @@ -1,465 +0,0 @@ -/* - * Xilinx ML510 Reference Design support - * - * This DTS file was created for the ml510_bsb1_pcores_ppc440 reference design. - * The reference design contains a bug which prevent PCI DMA from working - * properly. A description of the bug is given in the plbv46_pci section. It - * needs to be fixed by the user until Xilinx updates their reference design. - * - * Copyright 2009, Roderick Colenbrander - */ - -/dts-v1/; -/ { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,ml510-ref-design", "xlnx,virtex440"; - dcr-parent = <&ppc440_0>; - DDR2_SDRAM_DIMM0: memory@0 { - device_type = "memory"; - reg = < 0x0 0x20000000 >; - } ; - alias { - ethernet0 = &Hard_Ethernet_MAC; - serial0 = &RS232_Uart_1; - } ; - chosen { - bootargs = "console=ttyS0 root=/dev/ram"; - linux,stdout-path = "/plb@0/serial@83e00000"; - } ; - cpus { - #address-cells = <1>; - #cpus = <0x1>; - #size-cells = <0>; - ppc440_0: cpu@0 { - #address-cells = <1>; - #size-cells = <1>; - clock-frequency = <300000000>; - compatible = "PowerPC,440", "ibm,ppc440"; - d-cache-line-size = <0x20>; - d-cache-size = <0x8000>; - dcr-access-method = "native"; - dcr-controller ; - device_type = "cpu"; - i-cache-line-size = <0x20>; - i-cache-size = <0x8000>; - model = "PowerPC,440"; - reg = <0>; - timebase-frequency = <300000000>; - xlnx,apu-control = <0x2000>; - xlnx,apu-udi-0 = <0x0>; - xlnx,apu-udi-1 = <0x0>; - xlnx,apu-udi-10 = <0x0>; - xlnx,apu-udi-11 = <0x0>; - xlnx,apu-udi-12 = <0x0>; - xlnx,apu-udi-13 = <0x0>; - xlnx,apu-udi-14 = <0x0>; - xlnx,apu-udi-15 = <0x0>; - xlnx,apu-udi-2 = <0x0>; - xlnx,apu-udi-3 = <0x0>; - xlnx,apu-udi-4 = <0x0>; - xlnx,apu-udi-5 = <0x0>; - xlnx,apu-udi-6 = <0x0>; - xlnx,apu-udi-7 = <0x0>; - xlnx,apu-udi-8 = <0x0>; - xlnx,apu-udi-9 = <0x0>; - xlnx,dcr-autolock-enable = <0x1>; - xlnx,dcu-rd-ld-cache-plb-prio = <0x0>; - xlnx,dcu-rd-noncache-plb-prio = <0x0>; - xlnx,dcu-rd-touch-plb-prio = <0x0>; - xlnx,dcu-rd-urgent-plb-prio = <0x0>; - xlnx,dcu-wr-flush-plb-prio = <0x0>; - xlnx,dcu-wr-store-plb-prio = <0x0>; - xlnx,dcu-wr-urgent-plb-prio = <0x0>; - xlnx,dma0-control = <0x0>; - xlnx,dma0-plb-prio = <0x0>; - xlnx,dma0-rxchannelctrl = <0x1010000>; - xlnx,dma0-rxirqtimer = <0x3ff>; - xlnx,dma0-txchannelctrl = <0x1010000>; - xlnx,dma0-txirqtimer = <0x3ff>; - xlnx,dma1-control = <0x0>; - xlnx,dma1-plb-prio = <0x0>; - xlnx,dma1-rxchannelctrl = <0x1010000>; - xlnx,dma1-rxirqtimer = <0x3ff>; - xlnx,dma1-txchannelctrl = <0x1010000>; - xlnx,dma1-txirqtimer = <0x3ff>; - xlnx,dma2-control = <0x0>; - xlnx,dma2-plb-prio = <0x0>; - xlnx,dma2-rxchannelctrl = <0x1010000>; - xlnx,dma2-rxirqtimer = <0x3ff>; - xlnx,dma2-txchannelctrl = <0x1010000>; - xlnx,dma2-txirqtimer = <0x3ff>; - xlnx,dma3-control = <0x0>; - xlnx,dma3-plb-prio = <0x0>; - xlnx,dma3-rxchannelctrl = <0x1010000>; - xlnx,dma3-rxirqtimer = <0x3ff>; - xlnx,dma3-txchannelctrl = <0x1010000>; - xlnx,dma3-txirqtimer = <0x3ff>; - xlnx,endian-reset = <0x0>; - xlnx,generate-plb-timespecs = <0x1>; - xlnx,icu-rd-fetch-plb-prio = <0x0>; - xlnx,icu-rd-spec-plb-prio = <0x0>; - xlnx,icu-rd-touch-plb-prio = <0x0>; - xlnx,interconnect-imask = <0xffffffff>; - xlnx,mplb-allow-lock-xfer = <0x1>; - xlnx,mplb-arb-mode = <0x0>; - xlnx,mplb-awidth = <0x20>; - xlnx,mplb-counter = <0x500>; - xlnx,mplb-dwidth = <0x80>; - xlnx,mplb-max-burst = <0x8>; - xlnx,mplb-native-dwidth = <0x80>; - xlnx,mplb-p2p = <0x0>; - xlnx,mplb-prio-dcur = <0x2>; - xlnx,mplb-prio-dcuw = <0x3>; - xlnx,mplb-prio-icu = <0x4>; - xlnx,mplb-prio-splb0 = <0x1>; - xlnx,mplb-prio-splb1 = <0x0>; - xlnx,mplb-read-pipe-enable = <0x1>; - xlnx,mplb-sync-tattribute = <0x0>; - xlnx,mplb-wdog-enable = <0x1>; - xlnx,mplb-write-pipe-enable = <0x1>; - xlnx,mplb-write-post-enable = <0x1>; - xlnx,num-dma = <0x0>; - xlnx,pir = <0xf>; - xlnx,ppc440mc-addr-base = <0x0>; - xlnx,ppc440mc-addr-high = <0x1fffffff>; - xlnx,ppc440mc-arb-mode = <0x0>; - xlnx,ppc440mc-bank-conflict-mask = <0x1800000>; - xlnx,ppc440mc-control = <0xf810008f>; - xlnx,ppc440mc-max-burst = <0x8>; - xlnx,ppc440mc-prio-dcur = <0x2>; - xlnx,ppc440mc-prio-dcuw = <0x3>; - xlnx,ppc440mc-prio-icu = <0x4>; - xlnx,ppc440mc-prio-splb0 = <0x1>; - xlnx,ppc440mc-prio-splb1 = <0x0>; - xlnx,ppc440mc-row-conflict-mask = <0x7ffe00>; - xlnx,ppcdm-asyncmode = <0x0>; - xlnx,ppcds-asyncmode = <0x0>; - xlnx,user-reset = <0x0>; - } ; - } ; - plb_v46_0: plb@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,plb-v46-1.03.a", "simple-bus"; - ranges ; - FLASH: flash@fc000000 { - bank-width = <2>; - compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash"; - reg = < 0xfc000000 0x2000000 >; - xlnx,family = "virtex5"; - xlnx,include-datawidth-matching-0 = <0x1>; - xlnx,include-datawidth-matching-1 = <0x0>; - xlnx,include-datawidth-matching-2 = <0x0>; - xlnx,include-datawidth-matching-3 = <0x0>; - xlnx,include-negedge-ioregs = <0x0>; - xlnx,include-plb-ipif = <0x1>; - xlnx,include-wrbuf = <0x1>; - xlnx,max-mem-width = <0x10>; - xlnx,mch-native-dwidth = <0x20>; - xlnx,mch-plb-clk-period-ps = <0x2710>; - xlnx,mch-splb-awidth = <0x20>; - xlnx,mch0-accessbuf-depth = <0x10>; - xlnx,mch0-protocol = <0x0>; - xlnx,mch0-rddatabuf-depth = <0x10>; - xlnx,mch1-accessbuf-depth = <0x10>; - xlnx,mch1-protocol = <0x0>; - xlnx,mch1-rddatabuf-depth = <0x10>; - xlnx,mch2-accessbuf-depth = <0x10>; - xlnx,mch2-protocol = <0x0>; - xlnx,mch2-rddatabuf-depth = <0x10>; - xlnx,mch3-accessbuf-depth = <0x10>; - xlnx,mch3-protocol = <0x0>; - xlnx,mch3-rddatabuf-depth = <0x10>; - xlnx,mem0-width = <0x10>; - xlnx,mem1-width = <0x20>; - xlnx,mem2-width = <0x20>; - xlnx,mem3-width = <0x20>; - xlnx,num-banks-mem = <0x1>; - xlnx,num-channels = <0x2>; - xlnx,priority-mode = <0x0>; - xlnx,synch-mem-0 = <0x0>; - xlnx,synch-mem-1 = <0x0>; - xlnx,synch-mem-2 = <0x0>; - xlnx,synch-mem-3 = <0x0>; - xlnx,synch-pipedelay-0 = <0x2>; - xlnx,synch-pipedelay-1 = <0x2>; - xlnx,synch-pipedelay-2 = <0x2>; - xlnx,synch-pipedelay-3 = <0x2>; - xlnx,tavdv-ps-mem-0 = <0x1adb0>; - xlnx,tavdv-ps-mem-1 = <0x3a98>; - xlnx,tavdv-ps-mem-2 = <0x3a98>; - xlnx,tavdv-ps-mem-3 = <0x3a98>; - xlnx,tcedv-ps-mem-0 = <0x1adb0>; - xlnx,tcedv-ps-mem-1 = <0x3a98>; - xlnx,tcedv-ps-mem-2 = <0x3a98>; - xlnx,tcedv-ps-mem-3 = <0x3a98>; - xlnx,thzce-ps-mem-0 = <0x88b8>; - xlnx,thzce-ps-mem-1 = <0x1b58>; - xlnx,thzce-ps-mem-2 = <0x1b58>; - xlnx,thzce-ps-mem-3 = <0x1b58>; - xlnx,thzoe-ps-mem-0 = <0x1b58>; - xlnx,thzoe-ps-mem-1 = <0x1b58>; - xlnx,thzoe-ps-mem-2 = <0x1b58>; - xlnx,thzoe-ps-mem-3 = <0x1b58>; - xlnx,tlzwe-ps-mem-0 = <0x88b8>; - xlnx,tlzwe-ps-mem-1 = <0x0>; - xlnx,tlzwe-ps-mem-2 = <0x0>; - xlnx,tlzwe-ps-mem-3 = <0x0>; - xlnx,twc-ps-mem-0 = <0x1adb0>; - xlnx,twc-ps-mem-1 = <0x3a98>; - xlnx,twc-ps-mem-2 = <0x3a98>; - xlnx,twc-ps-mem-3 = <0x3a98>; - xlnx,twp-ps-mem-0 = <0x11170>; - xlnx,twp-ps-mem-1 = <0x2ee0>; - xlnx,twp-ps-mem-2 = <0x2ee0>; - xlnx,twp-ps-mem-3 = <0x2ee0>; - xlnx,xcl0-linesize = <0x4>; - xlnx,xcl0-writexfer = <0x1>; - xlnx,xcl1-linesize = <0x4>; - xlnx,xcl1-writexfer = <0x1>; - xlnx,xcl2-linesize = <0x4>; - xlnx,xcl2-writexfer = <0x1>; - xlnx,xcl3-linesize = <0x4>; - xlnx,xcl3-writexfer = <0x1>; - } ; - Hard_Ethernet_MAC: xps-ll-temac@81c00000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,compound"; - ethernet@81c00000 { - compatible = "xlnx,xps-ll-temac-1.01.b"; - device_type = "network"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 8 2 >; - llink-connected = <&Hard_Ethernet_MAC_fifo>; - local-mac-address = [ 02 00 00 00 00 00 ]; - reg = < 0x81c00000 0x40 >; - xlnx,bus2core-clk-ratio = <0x1>; - xlnx,phy-type = <0x3>; - xlnx,phyaddr = <0x1>; - xlnx,rxcsum = <0x0>; - xlnx,rxfifo = <0x8000>; - xlnx,temac-type = <0x0>; - xlnx,txcsum = <0x0>; - xlnx,txfifo = <0x8000>; - } ; - } ; - Hard_Ethernet_MAC_fifo: xps-ll-fifo@81a00000 { - compatible = "xlnx,xps-ll-fifo-1.01.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 6 2 >; - reg = < 0x81a00000 0x10000 >; - xlnx,family = "virtex5"; - } ; - IIC_EEPROM: i2c@81600000 { - compatible = "xlnx,xps-iic-2.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 9 2 >; - reg = < 0x81600000 0x10000 >; - xlnx,clk-freq = <0x5f5e100>; - xlnx,family = "virtex5"; - xlnx,gpo-width = <0x1>; - xlnx,iic-freq = <0x186a0>; - xlnx,scl-inertial-delay = <0x5>; - xlnx,sda-inertial-delay = <0x5>; - xlnx,ten-bit-adr = <0x0>; - } ; - LCD_OPTIONAL: gpio@81420000 { - compatible = "xlnx,xps-gpio-1.00.a"; - reg = < 0x81420000 0x10000 >; - xlnx,all-inputs = <0x0>; - xlnx,all-inputs-2 = <0x0>; - xlnx,dout-default = <0x0>; - xlnx,dout-default-2 = <0x0>; - xlnx,family = "virtex5"; - xlnx,gpio-width = <0xb>; - xlnx,interrupt-present = <0x0>; - xlnx,is-bidir = <0x1>; - xlnx,is-bidir-2 = <0x1>; - xlnx,is-dual = <0x0>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - } ; - LEDs_4Bit: gpio@81400000 { - compatible = "xlnx,xps-gpio-1.00.a"; - reg = < 0x81400000 0x10000 >; - xlnx,all-inputs = <0x0>; - xlnx,all-inputs-2 = <0x0>; - xlnx,dout-default = <0x0>; - xlnx,dout-default-2 = <0x0>; - xlnx,family = "virtex5"; - xlnx,gpio-width = <0x4>; - xlnx,interrupt-present = <0x0>; - xlnx,is-bidir = <0x1>; - xlnx,is-bidir-2 = <0x1>; - xlnx,is-dual = <0x0>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - } ; - RS232_Uart_1: serial@83e00000 { - clock-frequency = <100000000>; - compatible = "xlnx,xps-uart16550-2.00.b", "ns16550"; - current-speed = <9600>; - device_type = "serial"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 11 2 >; - reg = < 0x83e00000 0x10000 >; - reg-offset = <0x1003>; - reg-shift = <2>; - xlnx,family = "virtex5"; - xlnx,has-external-rclk = <0x0>; - xlnx,has-external-xin = <0x0>; - xlnx,is-a-16550 = <0x1>; - } ; - SPI_EEPROM: xps-spi@feff8000 { - compatible = "xlnx,xps-spi-2.00.b"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 10 2 >; - reg = < 0xfeff8000 0x80 >; - xlnx,family = "virtex5"; - xlnx,fifo-exist = <0x1>; - xlnx,num-ss-bits = <0x1>; - xlnx,num-transfer-bits = <0x8>; - xlnx,sck-ratio = <0x80>; - } ; - SysACE_CompactFlash: sysace@83600000 { - compatible = "xlnx,xps-sysace-1.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 7 2 >; - reg = < 0x83600000 0x10000 >; - xlnx,family = "virtex5"; - xlnx,mem-width = <0x10>; - } ; - plbv46_pci_0: plbv46-pci@85e00000 { - #size-cells = <2>; - #address-cells = <3>; - compatible = "xlnx,plbv46-pci-1.03.a"; - device_type = "pci"; - reg = < 0x85e00000 0x10000 >; - - /* - * The default ML510 BSB has C_IPIFBAR2PCIBAR_0 set to - * 0 which means that a read/write to the memory mapped - * i/o region (which starts at 0xa0000000) for pci - * bar 0 on the plb side translates to 0. - * It is important to set this value to 0xa0000000, so - * that inbound and outbound pci transactions work - * properly including DMA. - */ - ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf0000000 0 0x00010000>; - - #interrupt-cells = <1>; - interrupt-parent = <&xps_intc_0>; - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - /* IRQ mapping for pci slots and ALI M1533 - * periperhals. In total there are 5 interrupt - * lines connected to a xps_intc controller. - * Four of them are PCI IRQ A, B, C, D and - * which correspond to respectively xpx_intc - * 5, 4, 3 and 2. The fifth interrupt line is - * connected to the south bridge and this one - * uses irq 1 and is active high instead of - * active low. - * - * The M1533 contains various peripherals - * including AC97 audio, a modem, USB, IDE and - * some power management stuff. The modem - * isn't connected on the ML510 and the power - * management core also isn't used. - */ - - /* IDSEL 0x16 / dev=6, bus=0 / PCI slot 3 */ - 0x3000 0 0 1 &xps_intc_0 3 2 - 0x3000 0 0 2 &xps_intc_0 2 2 - 0x3000 0 0 3 &xps_intc_0 5 2 - 0x3000 0 0 4 &xps_intc_0 4 2 - - /* IDSEL 0x13 / dev=3, bus=1 / PCI slot 4 */ - /* - 0x11800 0 0 1 &xps_intc_0 5 0 2 - 0x11800 0 0 2 &xps_intc_0 4 0 2 - 0x11800 0 0 3 &xps_intc_0 3 0 2 - 0x11800 0 0 4 &xps_intc_0 2 0 2 - */ - - /* According to the datasheet + schematic - * ABCD [FPGA] of slot 5 is mapped to DABC. - * Testing showed that at least A maps to B, - * the mapping of the other pins is a guess - * and for that reason the lines have been - * commented out. - */ - /* IDSEL 0x15 / dev=5, bus=0 / PCI slot 5 */ - 0x2800 0 0 1 &xps_intc_0 4 2 - /* - 0x2800 0 0 2 &xps_intc_0 3 2 - 0x2800 0 0 3 &xps_intc_0 2 2 - 0x2800 0 0 4 &xps_intc_0 5 2 - */ - - /* IDSEL 0x12 / dev=2, bus=1 / PCI slot 6 */ - /* - 0x11000 0 0 1 &xps_intc_0 4 0 2 - 0x11000 0 0 2 &xps_intc_0 3 0 2 - 0x11000 0 0 3 &xps_intc_0 2 0 2 - 0x11000 0 0 4 &xps_intc_0 5 0 2 - */ - - /* IDSEL 0x11 / dev=1, bus=0 / AC97 audio */ - 0x0800 0 0 1 &i8259 7 2 - - /* IDSEL 0x1b / dev=11, bus=0 / IDE */ - 0x5800 0 0 1 &i8259 14 2 - - /* IDSEL 0x1f / dev 15, bus=0 / 2x USB 1.1 */ - 0x7800 0 0 1 &i8259 7 2 - >; - ali_m1533 { - #size-cells = <1>; - #address-cells = <2>; - i8259: interrupt-controller@20 { - reg = <1 0x20 2 - 1 0xa0 2 - 1 0x4d0 2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - - /* south bridge irq is active high */ - interrupts = <1 3>; - interrupt-parent = <&xps_intc_0>; - }; - }; - } ; - xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 { - compatible = "xlnx,xps-bram-if-cntlr-1.00.a"; - reg = < 0xffff0000 0x10000 >; - xlnx,family = "virtex5"; - } ; - xps_intc_0: interrupt-controller@81800000 { - #interrupt-cells = <0x2>; - compatible = "xlnx,xps-intc-1.00.a"; - interrupt-controller ; - reg = < 0x81800000 0x10000 >; - xlnx,num-intr-inputs = <0xc>; - } ; - xps_tft_0: tft@86e00000 { - compatible = "xlnx,xps-tft-1.00.a"; - reg = < 0x86e00000 0x10000 >; - xlnx,dcr-splb-slave-if = <0x1>; - xlnx,default-tft-base-addr = <0x0>; - xlnx,family = "virtex5"; - xlnx,i2c-slave-addr = <0x76>; - xlnx,mplb-awidth = <0x20>; - xlnx,mplb-dwidth = <0x80>; - xlnx,mplb-native-dwidth = <0x40>; - xlnx,mplb-smallest-slave = <0x20>; - xlnx,tft-interface = <0x1>; - } ; - } ; -} ; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/walnut.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/walnut.dts deleted file mode 100644 index 4a9f726a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/walnut.dts +++ /dev/null @@ -1,246 +0,0 @@ -/* - * Device Tree Source for IBM Walnut - * - * Copyright 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "ibm,walnut"; - compatible = "ibm,walnut"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405GP"; - reg = <0x00000000>; - clock-frequency = <200000000>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; - d-cache-size = <16384>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - plb { - compatible = "ibm,plb3"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - MAL: mcmal { - compatible = "ibm,mcmal-405gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <1>; - num-rx-chans = <1>; - interrupt-parent = <&UIC0>; - interrupts = < - 0xb 0x4 /* TXEOB */ - 0xc 0x4 /* RXEOB */ - 0xa 0x4 /* SERR */ - 0xd 0x4 /* TXDE */ - 0xe 0x4 /* RXDE */>; - }; - - POB0: opb { - compatible = "ibm,opb-405gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xef600000 0xef600000 0x00a00000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by zImage */ - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC: i2c@ef600500 { - compatible = "ibm,iic-405gp", "ibm,iic"; - reg = <0xef600500 0x00000011>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - GPIO: gpio@ef600700 { - compatible = "ibm,gpio-405gp"; - reg = <0xef600700 0x00000020>; - }; - - EMAC: ethernet@ef600800 { - device_type = "network"; - compatible = "ibm,emac-405gp", "ibm,emac"; - interrupt-parent = <&UIC0>; - interrupts = < - 0xf 0x4 /* Ethernet */ - 0x9 0x4 /* Ethernet Wake Up */>; - local-mac-address = [000000000000]; /* Filled in by zImage */ - reg = <0xef600800 0x00000070>; - mal-device = <&MAL>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000001>; - }; - - }; - - EBC0: ebc { - compatible = "ibm,ebc-405gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - /* The ranges property is supplied by the bootwrapper - * and is based on the firmware's configuration of the - * EBC bridge - */ - clock-frequency = <0>; /* Filled in by zImage */ - - sram@0,0 { - reg = <0x00000000 0x00000000 0x00080000>; - }; - - flash@0,80000 { - compatible = "jedec-flash"; - bank-width = <1>; - reg = <0x00000000 0x00080000 0x00080000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "OpenBIOS"; - reg = <0x00000000 0x00080000>; - read-only; - }; - }; - - nvram@1,0 { - /* NVRAM and RTC */ - compatible = "ds1743-nvram"; - #bytes = <0x2000>; - reg = <0x00000001 0x00000000 0x00002000>; - }; - - keyboard@2,0 { - compatible = "intel,82C42PC"; - reg = <0x00000002 0x00000000 0x00000002>; - }; - - ir@3,0 { - compatible = "ti,TIR2000PAG"; - reg = <0x00000003 0x00000000 0x00000010>; - }; - - fpga@7,0 { - compatible = "Walnut-FPGA"; - reg = <0x00000007 0x00000000 0x00000010>; - virtual-reg = <0xf0300005>; - }; - }; - - PCI0: pci@ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; - primary; - reg = <0xeec00000 0x00000008 /* Config space access */ - 0xeed80000 0x00000004 /* IACK */ - 0xeed80000 0x00000004 /* Special cycle */ - 0xef480000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 - 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* Walnut has all 4 IRQ pins tied together per slot */ - interrupt-map-mask = <0xf800 0x0 0x0 0x0>; - interrupt-map = < - /* IDSEL 1 */ - 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 - - /* IDSEL 2 */ - 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8 - - /* IDSEL 3 */ - 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8 - - /* IDSEL 4 */ - 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8 - >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/warp.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/warp.dts deleted file mode 100644 index e576ee85..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/warp.dts +++ /dev/null @@ -1,309 +0,0 @@ -/* - * Device Tree Source for PIKA Warp - * - * Copyright (c) 2008-2009 PIKA Technologies - * Sean MacLennan <smaclennan@pikatech.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "pika,warp"; - compatible = "pika,warp"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440EP"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440ep"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440ep"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - DMA0: dma { - compatible = "ibm,dma-440ep", "ibm,dma-440gp"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0x00000000 0x00000000 0x80000000 - 0x80000000 0x00000000 0x80000000 0x80000000>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - fpga@2,0 { - compatible = "pika,fpga"; - reg = <0x00000002 0x00000000 0x00001000>; - interrupts = <0x18 0x8>; - interrupt-parent = <&UIC0>; - }; - - fpga@2,2000 { - compatible = "pika,fpga-sgl"; - reg = <0x00000002 0x00002000 0x00000200>; - }; - - fpga@2,4000 { - compatible = "pika,fpga-sd"; - reg = <0x00000002 0x00004000 0x00004000>; - }; - - nor@0,0 { - compatible = "amd,s29gl032a", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x00400000>; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "splash"; - reg = <0x00000000 0x00010000>; - }; - partition@300000 { - label = "fpga"; - reg = <0x0300000 0x00040000>; - }; - partition@340000 { - label = "env"; - reg = <0x0340000 0x00040000>; - }; - partition@380000 { - label = "u-boot"; - reg = <0x0380000 0x00080000>; - }; - }; - - ndfc@1,0 { - compatible = "ibm,ndfc"; - reg = <0x00000001 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x03E00000>; - }; - partition@40000000 { - label = "persistent"; - reg = <0x04000000 0x04000000>; - }; - partition@80000000 { - label = "persistent1"; - reg = <0x08000000 0x04000000>; - }; - partition@C0000000 { - label = "persistent2"; - reg = <0x0C000000 0x04000000>; - }; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - - ad7414@4a { - compatible = "adi,ad7414"; - reg = <0x4a>; - interrupts = <0x19 0x8>; - interrupt-parent = <&UIC0>; - }; - - /* This will create 52 and 53 */ - at24@52 { - compatible = "at,24c04"; - reg = <0x52>; - }; - }; - - GPIO0: gpio@ef600b00 { - compatible = "ibm,ppc4xx-gpio"; - reg = <0xef600b00 0x00000048>; - #gpio-cells = <2>; - gpio-controller; - }; - - GPIO1: gpio@ef600c00 { - compatible = "ibm,ppc4xx-gpio"; - reg = <0xef600c00 0x00000048>; - #gpio-cells = <2>; - gpio-controller; - }; - - power-leds { - compatible = "gpio-leds"; - green { - gpios = <&GPIO1 0 0>; - default-state = "keep"; - }; - red { - gpios = <&GPIO1 1 0>; - default-state = "keep"; - }; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0xef600e00 0x00000070>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0 1>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - }; - - usb@ef601000 { - compatible = "ohci-be"; - reg = <0xef601000 0x00000080>; - interrupts = <0x8 0x1 0x9 0x1>; - interrupt-parent = < &UIC1 >; - }; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/wii.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/wii.dts deleted file mode 100644 index 77528c9a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/wii.dts +++ /dev/null @@ -1,218 +0,0 @@ -/* - * arch/powerpc/boot/dts/wii.dts - * - * Nintendo Wii platform device tree source - * Copyright (C) 2008-2009 The GameCube Linux Team - * Copyright (C) 2008,2009 Albert Herranz - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - */ - -/dts-v1/; - -/* - * This is commented-out for now. - * Until a later patch is merged, the kernel can use only the first - * contiguous RAM range and will BUG() if the memreserve is outside - * that range. - */ -/*/memreserve/ 0x10000000 0x0004000;*/ /* DSP RAM */ - -/ { - model = "nintendo,wii"; - compatible = "nintendo,wii"; - #address-cells = <1>; - #size-cells = <1>; - - chosen { - bootargs = "root=/dev/mmcblk0p2 rootwait udbg-immortal"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x01800000 /* MEM1 24MB 1T-SRAM */ - 0x10000000 0x04000000>; /* MEM2 64MB GDDR3 */ - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,broadway@0 { - device_type = "cpu"; - reg = <0>; - clock-frequency = <729000000>; /* 729MHz */ - bus-frequency = <243000000>; /* 243MHz core-to-bus 3x */ - timebase-frequency = <60750000>; /* 243MHz / 4 */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - }; - }; - - /* devices contained in the hollywood chipset */ - hollywood { - #address-cells = <1>; - #size-cells = <1>; - compatible = "nintendo,hollywood"; - ranges = <0x0c000000 0x0c000000 0x01000000 - 0x0d000000 0x0d000000 0x00800000 - 0x0d800000 0x0d800000 0x00800000>; - interrupt-parent = <&PIC0>; - - video@0c002000 { - compatible = "nintendo,hollywood-vi", - "nintendo,flipper-vi"; - reg = <0x0c002000 0x100>; - interrupts = <8>; - }; - - processor-interface@0c003000 { - compatible = "nintendo,hollywood-pi", - "nintendo,flipper-pi"; - reg = <0x0c003000 0x100>; - - PIC0: pic0 { - #interrupt-cells = <1>; - compatible = "nintendo,flipper-pic"; - interrupt-controller; - }; - }; - - dsp@0c005000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "nintendo,hollywood-dsp", - "nintendo,flipper-dsp"; - reg = <0x0c005000 0x200>; - interrupts = <6>; - }; - - gamepad-controller@0d006400 { - compatible = "nintendo,hollywood-si", - "nintendo,flipper-si"; - reg = <0x0d006400 0x100>; - interrupts = <3>; - }; - - audio@0c006c00 { - compatible = "nintendo,hollywood-ai", - "nintendo,flipper-ai"; - reg = <0x0d006c00 0x20>; - interrupts = <6>; - }; - - /* External Interface bus */ - exi@0d006800 { - compatible = "nintendo,hollywood-exi", - "nintendo,flipper-exi"; - reg = <0x0d006800 0x40>; - virtual-reg = <0x0d006800>; - interrupts = <4>; - }; - - usb@0d040000 { - compatible = "nintendo,hollywood-usb-ehci", - "usb-ehci"; - reg = <0x0d040000 0x100>; - interrupts = <4>; - interrupt-parent = <&PIC1>; - }; - - usb@0d050000 { - compatible = "nintendo,hollywood-usb-ohci", - "usb-ohci"; - reg = <0x0d050000 0x100>; - interrupts = <5>; - interrupt-parent = <&PIC1>; - }; - - usb@0d060000 { - compatible = "nintendo,hollywood-usb-ohci", - "usb-ohci"; - reg = <0x0d060000 0x100>; - interrupts = <6>; - interrupt-parent = <&PIC1>; - }; - - sd@0d070000 { - compatible = "nintendo,hollywood-sdhci", - "sdhci"; - reg = <0x0d070000 0x200>; - interrupts = <7>; - interrupt-parent = <&PIC1>; - }; - - sdio@0d080000 { - compatible = "nintendo,hollywood-sdhci", - "sdhci"; - reg = <0x0d080000 0x200>; - interrupts = <8>; - interrupt-parent = <&PIC1>; - }; - - ipc@0d000000 { - compatible = "nintendo,hollywood-ipc"; - reg = <0x0d000000 0x10>; - interrupts = <30>; - interrupt-parent = <&PIC1>; - }; - - PIC1: pic1@0d800030 { - #interrupt-cells = <1>; - compatible = "nintendo,hollywood-pic"; - reg = <0x0d800030 0x10>; - interrupt-controller; - interrupts = <14>; - }; - - GPIO: gpio@0d8000c0 { - #gpio-cells = <2>; - compatible = "nintendo,hollywood-gpio"; - reg = <0x0d8000c0 0x40>; - gpio-controller; - - /* - * This is commented out while a standard binding - * for i2c over gpio is defined. - */ - /* - i2c-video { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - - gpios = <&GPIO 15 0 - &GPIO 14 0>; - clock-frequency = <250000>; - no-clock-stretching; - scl-is-open-drain; - sda-is-open-drain; - sda-enforce-dir; - - AVE: audio-video-encoder@70 { - compatible = "nintendo,wii-audio-video-encoder"; - reg = <0x70>; - }; - }; - */ - }; - - control@0d800100 { - compatible = "nintendo,hollywood-control"; - reg = <0x0d800100 0x300>; - }; - - disk@0d806000 { - compatible = "nintendo,hollywood-di"; - reg = <0x0d806000 0x40>; - interrupts = <2>; - }; - }; -}; - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/xcalibur1501.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/xcalibur1501.dts deleted file mode 100644 index cc00f4dd..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/xcalibur1501.dts +++ /dev/null @@ -1,696 +0,0 @@ -/* - * Copyright (C) 2008 Extreme Engineering Solutions, Inc. - * Based on MPC8572DS device tree from Freescale Semiconductor, Inc. - * - * XCalibur1501 6U CompactPCI single-board computer based on MPC8572E - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; -/ { - model = "xes,xcalibur1501"; - compatible = "xes,xcalibur1501", "xes,MPC8572"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8572@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - - PowerPC,8572@1 { - device_type = "cpu"; - reg = <0x1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; // Filled in by U-Boot - }; - - localbus@ef005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; - reg = <0 0xef005000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - /* Local bus region mappings */ - ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Flash 1 */ - 1 0 0 0xf0000000 0x8000000 /* CS1: Flash 2 */ - 2 0 0 0xef800000 0x40000 /* CS2: NAND CE1 */ - 3 0 0 0xef840000 0x40000 /* CS3: NAND CE2 */ - 4 0 0 0xe9000000 0x100000>; /* CS4: USB */ - - nor-boot@0,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - reg = <0 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Primary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Primary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Primary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Primary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Primary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nor-alternate@1,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - //reg = <0xf0000000 0x08000000>; /* 128MB */ - reg = <1 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Secondary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Secondary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Secondary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Secondary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Secondary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - /* - * Actual part could be ST Micro NAND08GW3B2A (1 GB), - * Micron MT29F8G08DAA (2x 512 MB), or Micron - * MT29F16G08FAA (2x 1 GB), depending on the build - * configuration - */ - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <2 0 0x40000>; - /* U-Boot should fix this up if chip size > 1 GB */ - partition@0 { - label = "NAND Filesystem"; - reg = <0 0x40000000>; - }; - }; - - usb@4,0 { - compatible = "nxp,usb-isp1761"; - reg = <4 0 0x100000>; - bus-width = <32>; - interrupt-parent = <&mpic>; - interrupts = <10 1>; - }; - }; - - soc8572@ef000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8572-immr", "simple-bus"; - ranges = <0x0 0 0xef000000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8572-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - memory-controller@6000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x6000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8572-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x100000>; // L2, 1M - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - temp-sensor@48 { - compatible = "dallas,ds1631", "dallas,ds1621"; - reg = <0x48>; - }; - - temp-sensor@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - cpu-supervisor@51 { - compatible = "dallas,ds4510"; - reg = <0x51>; - }; - - eeprom@54 { - compatible = "atmel,at24c128b"; - reg = <0x54>; - }; - - rtc@68 { - compatible = "stm,m41t00", - "dallas,ds1338"; - reg = <0x68>; - }; - - pcie-switch@6a { - compatible = "plx,pex8648"; - reg = <0x6a>; - }; - - /* On-board signals for VID, flash, serial */ - gpio1: gpio@18 { - compatible = "nxp,pca9557"; - reg = <0x18>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - /* PMC0/XMC0 signals */ - gpio2: gpio@1c { - compatible = "nxp,pca9557"; - reg = <0x1c>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - /* PMC1/XMC1 signals */ - gpio3: gpio@1d { - compatible = "nxp,pca9557"; - reg = <0x1d>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - /* CompactPCI signals (sysen, GA[4:0]) */ - gpio4: gpio@1e { - compatible = "nxp,pca9557"; - reg = <0x1e>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - /* CompactPCI J5 GPIO and FAL/DEG/PRST */ - gpio5: gpio@1f { - compatible = "nxp,pca9557"; - reg = <0x1f>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - /* eTSEC 1 front panel 0 */ - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <4 1>; - reg = <0x1>; - }; - phy1: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <4 1>; - reg = <0x2>; - }; - phy2: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x3>; - }; - phy3: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x4>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC 2 front panel 1 */ - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC 3 PICMG2.16 backplane port 0 */ - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC 4 PICMG2.16 backplane port 1 */ - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* UART0 */ - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - /* UART1 */ - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,mpc8572-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - msi@41600 { - compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - gpio0: gpio@f000 { - compatible = "fsl,mpc8572-gpio"; - reg = <0xf000 0x1000>; - interrupts = <47 2>; - interrupt-parent = <&mpic>; - #gpio-cells = <2>; - gpio-controller; - }; - - gpio-leds { - compatible = "gpio-leds"; - - heartbeat { - label = "Heartbeat"; - gpios = <&gpio0 4 1>; - linux,default-trigger = "heartbeat"; - }; - - yellow { - label = "Yellow"; - gpios = <&gpio0 5 1>; - }; - - red { - label = "Red"; - gpios = <&gpio0 6 1>; - }; - - green { - label = "Green"; - gpios = <&gpio0 7 1>; - }; - }; - - /* PME (pattern-matcher) */ - pme@10000 { - compatible = "fsl,mpc8572-pme", "pme8572"; - reg = <0x10000 0x5000>; - interrupts = <57 2 64 2 65 2 66 2 67 2>; - interrupt-parent = <&mpic>; - }; - - tlu@2f000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x2f000 0x1000>; - interupts = <61 2 >; - interrupt-parent = <&mpic>; - }; - - tlu@15000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x15000 0x1000>; - interupts = <75 2>; - interrupt-parent = <&mpic>; - }; - }; - - /* - * PCI Express controller 3 @ ef008000 is not used. - * This would have been pci0 on other mpc85xx platforms. - * - * PCI Express controller 2 @ ef009000 is not used. - * This would have been pci1 on other mpc85xx platforms. - */ - - /* PCI Express controller 1, wired to PEX8648 PCIe switch */ - pci2: pcie@ef00a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef00a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000 - 0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5200.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5200.dts deleted file mode 100644 index 8fd7b703..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5200.dts +++ /dev/null @@ -1,468 +0,0 @@ -/* - * Copyright (C) 2009 Extreme Engineering Solutions, Inc. - * Based on TQM8548 device tree - * - * XPedite5200 PrPMC/XMC module based on MPC8548E - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; - -/ { - model = "xes,xpedite5200"; - compatible = "xes,xpedite5200", "xes,MPC8548"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8548@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; // Filled in by U-Boot - }; - - soc@ef000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xef000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8548-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8548-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8548-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8548-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - /* On-card I2C */ - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - /* - * Board GPIO: - * 0: BRD_CFG0 (1: P14 IO present) - * 1: BRD_CFG1 (1: FP ethernet present) - * 2: BRD_CFG2 (1: XMC IO present) - * 3: XMC root complex indicator - * 4: Flash boot device indicator - * 5: Flash write protect enable - * 6: PMC monarch indicator - * 7: PMC EREADY - */ - gpio1: gpio@18 { - compatible = "nxp,pca9556"; - reg = <0x18>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - /* P14 GPIO */ - gpio2: gpio@19 { - compatible = "nxp,pca9556"; - reg = <0x19>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - eeprom@50 { - compatible = "atmel,at24c16"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "stm,m41t00", - "dallas,ds1338"; - reg = <0x68>; - }; - - dtt@48 { - compatible = "maxim,max1237"; - reg = <0x34>; - }; - }; - - /* Off-card I2C */ - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - /* eTSEC1: Front panel port 0 */ - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x1>; - }; - phy1: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x2>; - }; - phy2: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x3>; - }; - phy3: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x4>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC2: Front panel port 1 */ - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC3: Rear panel port 2 */ - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC4: Rear panel port 3 */ - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - current-speed = <115200>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - current-speed = <115200>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { // global utilities reg - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - localbus@ef005000 { - compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xef005000 0x100>; // BRx, ORx, etc. - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = < - 0 0x0 0xfc000000 0x04000000 // NOR boot flash - 1 0x0 0xf8000000 0x04000000 // NOR expansion flash - 2 0x0 0xef800000 0x00010000 // NAND CE1 - 3 0x0 0xef840000 0x00010000 // NAND CE2 - >; - - nor-boot@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x4000000>; - bank-width = <2>; - - partition@0 { - label = "Primary OS"; - reg = <0x00000000 0x180000>; - }; - partition@180000 { - label = "Secondary OS"; - reg = <0x00180000 0x180000>; - }; - partition@300000 { - label = "User"; - reg = <0x00300000 0x3c80000>; - }; - partition@3f80000 { - label = "Boot firmware"; - reg = <0x03f80000 0x80000>; - }; - }; - - nor-alternate@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <1 0x0 0x4000000>; - bank-width = <2>; - - partition@0 { - label = "Filesystem"; - reg = <0x00000000 0x3f80000>; - }; - partition@3f80000 { - label = "Alternate boot firmware"; - reg = <0x03f80000 0x80000>; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xes,address-ctl-nand"; - reg = <2 0x0 0x10000>; - cle-line = <0x8>; /* CLE tied to A3 */ - ale-line = <0x10>; /* ALE tied to A4 */ - - /* U-Boot should fix this up */ - partition@0 { - label = "NAND Filesystem"; - reg = <0 0x40000000>; - }; - }; - }; - - /* PMC interface */ - pci0: pci@ef008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xef008000 0x1000>; - clock-frequency = <33333333>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1>; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x40000000 - 0x01000000 0 0x00000000 0xe8000000 0 0x00800000>; - }; - - /* XMC PCIe is not yet enabled in U-Boot on XPedite5200 */ -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5200_xmon.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5200_xmon.dts deleted file mode 100644 index 0baa8283..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5200_xmon.dts +++ /dev/null @@ -1,508 +0,0 @@ -/* - * Copyright (C) 2009 Extreme Engineering Solutions, Inc. - * Based on TQM8548 device tree - * - * XPedite5200 PrPMC/XMC module based on MPC8548E. This dts is for the - * xMon boot loader memory map which differs from U-Boot's. - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; - -/ { - model = "xes,xpedite5200"; - compatible = "xes,xpedite5200", "xes,MPC8548"; - #address-cells = <1>; - #size-cells = <1>; - form-factor = "PMC/XMC"; - boot-bank = <0x0>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8548@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; // Filled in by boot loader - }; - - soc@ef000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xef000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8548-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8548-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8548-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8548-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - /* On-card I2C */ - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - /* - * Board GPIO: - * 0: BRD_CFG0 (1: P14 IO present) - * 1: BRD_CFG1 (1: FP ethernet present) - * 2: BRD_CFG2 (1: XMC IO present) - * 3: XMC root complex indicator - * 4: Flash boot device indicator - * 5: Flash write protect enable - * 6: PMC monarch indicator - * 7: PMC EREADY - */ - gpio1: gpio@18 { - compatible = "nxp,pca9556"; - reg = <0x18>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - /* P14 GPIO */ - gpio2: gpio@19 { - compatible = "nxp,pca9556"; - reg = <0x19>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - eeprom@50 { - compatible = "atmel,at24c16"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "stm,m41t00", - "dallas,ds1338"; - reg = <0x68>; - }; - - dtt@48 { - compatible = "maxim,max1237"; - reg = <0x34>; - }; - }; - - /* Off-card I2C */ - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - /* eTSEC1: Front panel port 0 */ - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x1>; - }; - phy1: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x2>; - }; - phy2: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x3>; - }; - phy3: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x4>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC2: Front panel port 1 */ - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC3: Rear panel port 2 */ - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC4: Rear panel port 3 */ - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - current-speed = <9600>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - current-speed = <9600>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { // global utilities reg - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - localbus@ef005000 { - compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xef005000 0x100>; // BRx, ORx, etc. - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = < - 0 0x0 0xf8000000 0x08000000 // NOR boot flash - 1 0x0 0xf0000000 0x08000000 // NOR expansion flash - 2 0x0 0xe8000000 0x00010000 // NAND CE1 - 3 0x0 0xe8010000 0x00010000 // NAND CE2 - >; - - nor-boot@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x4000000>; - bank-width = <2>; - - partition@0 { - label = "Primary OS"; - reg = <0x00000000 0x180000>; - }; - partition@180000 { - label = "Secondary OS"; - reg = <0x00180000 0x180000>; - }; - partition@300000 { - label = "User"; - reg = <0x00300000 0x3c80000>; - }; - partition@3f80000 { - label = "Boot firmware"; - reg = <0x03f80000 0x80000>; - }; - }; - - nor-alternate@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <1 0x0 0x4000000>; - bank-width = <2>; - - partition@0 { - label = "Filesystem"; - reg = <0x00000000 0x3f80000>; - }; - partition@3f80000 { - label = "Alternate boot firmware"; - reg = <0x03f80000 0x80000>; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xes,address-ctl-nand"; - reg = <2 0x0 0x10000>; - cle-line = <0x8>; /* CLE tied to A3 */ - ale-line = <0x10>; /* ALE tied to A4 */ - - partition@0 { - label = "NAND Filesystem"; - reg = <0 0x40000000>; - }; - }; - }; - - /* PMC interface */ - pci0: pci@ef008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xef008000 0x1000>; - clock-frequency = <33333333>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1>; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xd0000000 0 0x01000000>; - }; - - /* XMC PCIe */ - pci1: pcie@ef00a000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x00000 0 0 1 &mpic 0 1 - 0x00000 0 0 2 &mpic 1 1 - 0x00000 0 0 3 &mpic 2 1 - 0x00000 0 0 4 &mpic 3 1>; - - interrupt-parent = <&mpic>; - interrupts = <26 2>; - bus-range = <0 0xff>; - ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000 - 0x01000000 0 0x00000000 0xd1000000 0 0x01000000>; - clock-frequency = <33333333>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xef00a000 0x1000>; - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0 0xc0000000 0x02000000 0 - 0xc0000000 0 0x20000000 - 0x01000000 0 0x00000000 0x01000000 0 - 0x00000000 0 0x08000000>; - }; - }; - - /* Needed for dtbImage boot wrapper compatibility */ - chosen { - linux,stdout-path = &serial0; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5301.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5301.dts deleted file mode 100644 index 53c1c6a9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5301.dts +++ /dev/null @@ -1,640 +0,0 @@ -/* - * Copyright (C) 2008 Extreme Engineering Solutions, Inc. - * Based on MPC8572DS device tree from Freescale Semiconductor, Inc. - * - * XPedite5301 PMC/XMC module based on MPC8572E - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; -/ { - model = "xes,xpedite5301"; - compatible = "xes,xpedite5301", "xes,MPC8572"; - #address-cells = <2>; - #size-cells = <2>; - form-factor = "PMC/XMC"; - boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */ - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8572@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - - PowerPC,8572@1 { - device_type = "cpu"; - reg = <0x1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; // Filled in by U-Boot - }; - - localbus@ef005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; - reg = <0 0xef005000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - /* Local bus region mappings */ - ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Boot flash */ - 1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */ - 2 0 0 0xef800000 0x40000 /* CS2: NAND CE1 */ - 3 0 0 0xef840000 0x40000>; /* CS3: NAND CE2 */ - - nor-boot@0,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - reg = <0 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Primary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Primary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Primary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Primary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Primary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nor-alternate@1,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - //reg = <0xf0000000 0x08000000>; /* 128MB */ - reg = <1 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Secondary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Secondary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Secondary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Secondary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Secondary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - /* - * Actual part could be ST Micro NAND08GW3B2A (1 GB), - * Micron MT29F8G08DAA (2x 512 MB), or Micron - * MT29F16G08FAA (2x 1 GB), depending on the build - * configuration - */ - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <2 0 0x40000>; - /* U-Boot should fix this up if chip size > 1 GB */ - partition@0 { - label = "NAND Filesystem"; - reg = <0 0x40000000>; - }; - }; - - }; - - soc8572@ef000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8572-immr", "simple-bus"; - ranges = <0x0 0 0xef000000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8572-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - memory-controller@6000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x6000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8572-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x100000>; // L2, 1M - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - temp-sensor@48 { - compatible = "dallas,ds1631", "dallas,ds1621"; - reg = <0x48>; - }; - - temp-sensor@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - cpu-supervisor@51 { - compatible = "dallas,ds4510"; - reg = <0x51>; - }; - - eeprom@54 { - compatible = "atmel,at24c128b"; - reg = <0x54>; - }; - - rtc@68 { - compatible = "stm,m41t00", - "dallas,ds1338"; - reg = <0x68>; - }; - - pcie-switch@70 { - compatible = "plx,pex8518"; - reg = <0x70>; - }; - - gpio1: gpio@18 { - compatible = "nxp,pca9557"; - reg = <0x18>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio2: gpio@1c { - compatible = "nxp,pca9557"; - reg = <0x1c>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio3: gpio@1e { - compatible = "nxp,pca9557"; - reg = <0x1e>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio4: gpio@1f { - compatible = "nxp,pca9557"; - reg = <0x1f>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - /* eTSEC 1 */ - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x1>; - }; - phy1: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x2>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC 2 */ - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* UART0 */ - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - /* UART1 */ - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,mpc8572-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - msi@41600 { - compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - gpio0: gpio@f000 { - compatible = "fsl,mpc8572-gpio"; - reg = <0xf000 0x1000>; - interrupts = <47 2>; - interrupt-parent = <&mpic>; - #gpio-cells = <2>; - gpio-controller; - }; - - gpio-leds { - compatible = "gpio-leds"; - - heartbeat { - label = "Heartbeat"; - gpios = <&gpio0 4 1>; - linux,default-trigger = "heartbeat"; - }; - - yellow { - label = "Yellow"; - gpios = <&gpio0 5 1>; - }; - - red { - label = "Red"; - gpios = <&gpio0 6 1>; - }; - - green { - label = "Green"; - gpios = <&gpio0 7 1>; - }; - }; - - /* PME (pattern-matcher) */ - pme@10000 { - compatible = "fsl,mpc8572-pme", "pme8572"; - reg = <0x10000 0x5000>; - interrupts = <57 2 64 2 65 2 66 2 67 2>; - interrupt-parent = <&mpic>; - }; - - tlu@2f000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x2f000 0x1000>; - interupts = <61 2 >; - interrupt-parent = <&mpic>; - }; - - tlu@15000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x15000 0x1000>; - interupts = <75 2>; - interrupt-parent = <&mpic>; - }; - }; - - /* - * PCI Express controller 3 @ ef008000 is not used. - * This would have been pci0 on other mpc85xx platforms. - */ - - /* PCI Express controller 2, wired to XMC P15 connector */ - pci1: pcie@ef009000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef009000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe8800000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x5 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x6 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x7 0x1 - >; - pcie@0 { - reg = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000000>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - /* PCI Express controller 1, wired to PEX8112 for PMC interface */ - pci2: pcie@ef00a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef00a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000 - 0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5330.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5330.dts deleted file mode 100644 index 21522598..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5330.dts +++ /dev/null @@ -1,707 +0,0 @@ -/* - * Copyright (C) 2008 Extreme Engineering Solutions, Inc. - * Based on MPC8572DS device tree from Freescale Semiconductor, Inc. - * - * XPedite5330 3U CompactPCI module based on MPC8572E - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; -/ { - model = "xes,xpedite5330"; - compatible = "xes,xpedite5330", "xes,MPC8572"; - #address-cells = <2>; - #size-cells = <2>; - form-factor = "3U CompactPCI"; - boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */ - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - pmcslots { - #address-cells = <1>; - #size-cells = <0>; - - pmcslot@0 { - cell-index = <0>; - /* - * boolean properties (true if defined): - * monarch; - * module-present; - */ - }; - }; - - xmcslots { - #address-cells = <1>; - #size-cells = <0>; - - xmcslot@0 { - cell-index = <0>; - /* - * boolean properties (true if defined): - * module-present; - */ - }; - }; - - cpci { - /* - * boolean properties (true if defined): - * system-controller; - */ - system-controller; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8572@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - - PowerPC,8572@1 { - device_type = "cpu"; - reg = <0x1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; // Filled in by U-Boot - }; - - localbus@ef005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; - reg = <0 0xef005000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - /* Local bus region mappings */ - ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Boot flash */ - 1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */ - 2 0 0 0xef800000 0x40000 /* CS2: NAND CE1 */ - 3 0 0 0xef840000 0x40000>; /* CS3: NAND CE2 */ - - nor-boot@0,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - reg = <0 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Primary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Primary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Primary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Primary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Primary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nor-alternate@1,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - //reg = <0xf0000000 0x08000000>; /* 128MB */ - reg = <1 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Secondary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Secondary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Secondary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Secondary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Secondary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - /* - * Actual part could be ST Micro NAND08GW3B2A (1 GB), - * Micron MT29F8G08DAA (2x 512 MB), or Micron - * MT29F16G08FAA (2x 1 GB), depending on the build - * configuration - */ - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <2 0 0x40000>; - /* U-Boot should fix this up if chip size > 1 GB */ - partition@0 { - label = "NAND Filesystem"; - reg = <0 0x40000000>; - }; - }; - - }; - - soc8572@ef000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8572-immr", "simple-bus"; - ranges = <0x0 0 0xef000000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8572-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - memory-controller@6000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x6000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8572-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x100000>; // L2, 1M - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - temp-sensor@48 { - compatible = "dallas,ds1631", "dallas,ds1621"; - reg = <0x48>; - }; - - temp-sensor@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - cpu-supervisor@51 { - compatible = "dallas,ds4510"; - reg = <0x51>; - }; - - eeprom@54 { - compatible = "atmel,at24c128b"; - reg = <0x54>; - }; - - rtc@68 { - compatible = "stm,m41t00", - "dallas,ds1338"; - reg = <0x68>; - }; - - pcie-switch@70 { - compatible = "plx,pex8518"; - reg = <0x70>; - }; - - gpio1: gpio@18 { - compatible = "nxp,pca9557"; - reg = <0x18>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio2: gpio@1c { - compatible = "nxp,pca9557"; - reg = <0x1c>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio3: gpio@1e { - compatible = "nxp,pca9557"; - reg = <0x1e>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio4: gpio@1f { - compatible = "nxp,pca9557"; - reg = <0x1f>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - /* eTSEC 1 */ - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x1>; - }; - phy1: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x2>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC 2 */ - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* UART0 */ - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - /* UART1 */ - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,mpc8572-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - msi@41600 { - compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - gpio0: gpio@f000 { - compatible = "fsl,mpc8572-gpio"; - reg = <0xf000 0x1000>; - interrupts = <47 2>; - interrupt-parent = <&mpic>; - #gpio-cells = <2>; - gpio-controller; - }; - - gpio-leds { - compatible = "gpio-leds"; - - heartbeat { - label = "Heartbeat"; - gpios = <&gpio0 4 1>; - linux,default-trigger = "heartbeat"; - }; - - yellow { - label = "Yellow"; - gpios = <&gpio0 5 1>; - }; - - red { - label = "Red"; - gpios = <&gpio0 6 1>; - }; - - green { - label = "Green"; - gpios = <&gpio0 7 1>; - }; - }; - - /* PME (pattern-matcher) */ - pme@10000 { - compatible = "fsl,mpc8572-pme", "pme8572"; - reg = <0x10000 0x5000>; - interrupts = <57 2 64 2 65 2 66 2 67 2>; - interrupt-parent = <&mpic>; - }; - - tlu@2f000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x2f000 0x1000>; - interupts = <61 2 >; - interrupt-parent = <&mpic>; - }; - - tlu@15000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x15000 0x1000>; - interupts = <75 2>; - interrupt-parent = <&mpic>; - }; - }; - - /* PCI Express controller 3 - CompactPCI bus via PEX8112 bridge */ - pci0: pcie@ef008000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef008000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe9000000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xe0000000 - 0x02000000 0x0 0xe0000000 - 0x0 0x10000000 - - 0x01000000 0x0 0x0 - 0x01000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - /* PCI Express controller 2, PMC module via PEX8112 bridge */ - pci1: pcie@ef009000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef009000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe8800000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x5 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x6 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x7 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - /* PCI Express controller 1, XMC P15 */ - pci2: pcie@ef00a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef00a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000 - 0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5370.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5370.dts deleted file mode 100644 index 11dbda10..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5370.dts +++ /dev/null @@ -1,638 +0,0 @@ -/* - * Copyright (C) 2008 Extreme Engineering Solutions, Inc. - * Based on MPC8572DS device tree from Freescale Semiconductor, Inc. - * - * XPedite5370 3U VPX single-board computer based on MPC8572E - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; -/ { - model = "xes,xpedite5370"; - compatible = "xes,xpedite5370", "xes,MPC8572"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8572@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - - PowerPC,8572@1 { - device_type = "cpu"; - reg = <0x1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; // Filled in by U-Boot - }; - - localbus@ef005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; - reg = <0 0xef005000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - /* Local bus region mappings */ - ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Boot flash */ - 1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */ - 2 0 0 0xef800000 0x40000 /* CS2: NAND CE1 */ - 3 0 0 0xef840000 0x40000>; /* CS3: NAND CE2 */ - - nor-boot@0,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - reg = <0 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Primary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Primary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Primary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Primary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Primary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nor-alternate@1,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - //reg = <0xf0000000 0x08000000>; /* 128MB */ - reg = <1 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Secondary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Secondary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Secondary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Secondary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Secondary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - /* - * Actual part could be ST Micro NAND08GW3B2A (1 GB), - * Micron MT29F8G08DAA (2x 512 MB), or Micron - * MT29F16G08FAA (2x 1 GB), depending on the build - * configuration - */ - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <2 0 0x40000>; - /* U-Boot should fix this up if chip size > 1 GB */ - partition@0 { - label = "NAND Filesystem"; - reg = <0 0x40000000>; - }; - }; - - }; - - soc8572@ef000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8572-immr", "simple-bus"; - ranges = <0x0 0 0xef000000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8572-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - memory-controller@6000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x6000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8572-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x100000>; // L2, 1M - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - temp-sensor@48 { - compatible = "dallas,ds1631", "dallas,ds1621"; - reg = <0x48>; - }; - - temp-sensor@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - cpu-supervisor@51 { - compatible = "dallas,ds4510"; - reg = <0x51>; - }; - - eeprom@54 { - compatible = "atmel,at24c128b"; - reg = <0x54>; - }; - - rtc@68 { - compatible = "stm,m41t00", - "dallas,ds1338"; - reg = <0x68>; - }; - - pcie-switch@70 { - compatible = "plx,pex8518"; - reg = <0x70>; - }; - - gpio1: gpio@18 { - compatible = "nxp,pca9557"; - reg = <0x18>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio2: gpio@1c { - compatible = "nxp,pca9557"; - reg = <0x1c>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio3: gpio@1e { - compatible = "nxp,pca9557"; - reg = <0x1e>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio4: gpio@1f { - compatible = "nxp,pca9557"; - reg = <0x1f>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - /* eTSEC 1 */ - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x1>; - }; - phy1: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x2>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC 2 */ - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* UART0 */ - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - /* UART1 */ - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,mpc8572-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - msi@41600 { - compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - gpio0: gpio@f000 { - compatible = "fsl,mpc8572-gpio"; - reg = <0xf000 0x1000>; - interrupts = <47 2>; - interrupt-parent = <&mpic>; - #gpio-cells = <2>; - gpio-controller; - }; - - gpio-leds { - compatible = "gpio-leds"; - - heartbeat { - label = "Heartbeat"; - gpios = <&gpio0 4 1>; - linux,default-trigger = "heartbeat"; - }; - - yellow { - label = "Yellow"; - gpios = <&gpio0 5 1>; - }; - - red { - label = "Red"; - gpios = <&gpio0 6 1>; - }; - - green { - label = "Green"; - gpios = <&gpio0 7 1>; - }; - }; - - /* PME (pattern-matcher) */ - pme@10000 { - compatible = "fsl,mpc8572-pme", "pme8572"; - reg = <0x10000 0x5000>; - interrupts = <57 2 64 2 65 2 66 2 67 2>; - interrupt-parent = <&mpic>; - }; - - tlu@2f000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x2f000 0x1000>; - interupts = <61 2 >; - interrupt-parent = <&mpic>; - }; - - tlu@15000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x15000 0x1000>; - interupts = <75 2>; - interrupt-parent = <&mpic>; - }; - }; - - /* - * PCI Express controller 3 @ ef008000 is not used. - * This would have been pci0 on other mpc85xx platforms. - */ - - /* PCI Express controller 2, wired to VPX P1,P2 backplane */ - pci1: pcie@ef009000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef009000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe8800000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x5 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x6 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x7 0x1 - >; - pcie@0 { - reg = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000000>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - /* PCI Express controller 1, wired to PEX8518 PCIe switch */ - pci2: pcie@ef00a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef00a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000 - 0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/yosemite.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/yosemite.dts deleted file mode 100644 index 30bb4753..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/yosemite.dts +++ /dev/null @@ -1,332 +0,0 @@ -/* - * Device Tree Source for AMCC Yosemite - * - * Copyright 2008 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,yosemite"; - compatible = "amcc,yosemite"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - serial3 = &UART3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440EP"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440ep"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440ep"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - DMA0: dma { - compatible = "ibm,dma-440ep", "ibm,dma-440gp"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Bamboo is oddball in the 44x world and doesn't use the ERPN - * bits. - */ - ranges = <0x00000000 0x00000000 0x00000000 0x80000000 - 0x80000000 0x00000000 0x80000000 0x80000000>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl256n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "ramdisk"; - reg = <0x00200000 0x01400000>; - }; - partition@1600000 { - label = "jffs2"; - reg = <0x01600000 0x00400000>; - }; - partition@1a00000 { - label = "user"; - reg = <0x01a00000 0x02540000>; - }; - partition@3f40000 { - label = "env"; - reg = <0x03f40000 0x00040000>; - }; - partition@3f80000 { - label = "u-boot"; - reg = <0x03f80000 0x00080000>; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - UART2: serial@ef600500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600500 0x00000008>; - virtual-reg = <0xef600500>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - status = "disabled"; - }; - - UART3: serial@ef600600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600600 0x00000008>; - virtual-reg = <0xef600600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x4 0x4>; - status = "disabled"; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - spi@ef600900 { - compatible = "amcc,spi-440ep"; - reg = <0xef600900 0x00000006>; - interrupts = <0x8 0x4>; - interrupt-parent = <&UIC0>; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0xef600e00 0x00000070>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0 1>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1e 0x4 0x1f 0x4>; - reg = <0xef600f00 0x00000070>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <2 3>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - }; - - usb@ef601000 { - compatible = "ohci-be"; - reg = <0xef601000 0x00000080>; - interrupts = <0x8 0x4 0x9 0x4>; - interrupt-parent = < &UIC1 >; - }; - }; - - PCI0: pci@ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; - primary; - reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ - 0x00000000 0xeed00000 0x00000004 /* IACK */ - 0x00000000 0xeed00000 0x00000004 /* Special cycle */ - 0x00000000 0xef400000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 - 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - interrupt-map-mask = <0xf800 0x0 0x0 0x0>; - interrupt-map = < - /* IDSEL 12 */ - 0x6000 0x0 0x0 0x0 &UIC0 0x19 0x8 - >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dummy.c b/ANDROID_3.4.5/arch/powerpc/boot/dummy.c deleted file mode 100644 index 31dbf45b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dummy.c +++ /dev/null @@ -1,4 +0,0 @@ -int main(void) -{ - return 0; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ebony.c b/ANDROID_3.4.5/arch/powerpc/boot/ebony.c deleted file mode 100644 index 5532ab32..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ebony.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - * Copyright 2007 David Gibson, IBM Corporation. - * - * Based on earlier code: - * Copyright (C) Paul Mackerras 1997. - * - * Matt Porter <mporter@kernel.crashing.org> - * Copyright 2002-2005 MontaVista Software Inc. - * - * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> - * Copyright (c) 2003, 2004 Zultys Technologies - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "string.h" -#include "stdio.h" -#include "page.h" -#include "ops.h" -#include "reg.h" -#include "io.h" -#include "dcr.h" -#include "4xx.h" -#include "44x.h" - -static u8 *ebony_mac0, *ebony_mac1; - -#define EBONY_FPGA_PATH "/plb/opb/ebc/fpga" -#define EBONY_FPGA_FLASH_SEL 0x01 -#define EBONY_SMALL_FLASH_PATH "/plb/opb/ebc/small-flash" - -static void ebony_flashsel_fixup(void) -{ - void *devp; - u32 reg[3] = {0x0, 0x0, 0x80000}; - u8 *fpga; - u8 fpga_reg0 = 0x0; - - devp = finddevice(EBONY_FPGA_PATH); - if (!devp) - fatal("Couldn't locate FPGA node %s\n\r", EBONY_FPGA_PATH); - - if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga)) - fatal("%s has missing or invalid virtual-reg property\n\r", - EBONY_FPGA_PATH); - - fpga_reg0 = in_8(fpga); - - devp = finddevice(EBONY_SMALL_FLASH_PATH); - if (!devp) - fatal("Couldn't locate small flash node %s\n\r", - EBONY_SMALL_FLASH_PATH); - - if (getprop(devp, "reg", reg, sizeof(reg)) != sizeof(reg)) - fatal("%s has reg property of unexpected size\n\r", - EBONY_SMALL_FLASH_PATH); - - /* Invert address bit 14 (IBM-endian) if FLASH_SEL fpga bit is set */ - if (fpga_reg0 & EBONY_FPGA_FLASH_SEL) - reg[1] ^= 0x80000; - - setprop(devp, "reg", reg, sizeof(reg)); -} - -static void ebony_fixups(void) -{ - // FIXME: sysclk should be derived by reading the FPGA registers - unsigned long sysclk = 33000000; - - ibm440gp_fixup_clocks(sysclk, 6 * 1843200); - ibm4xx_sdram_fixup_memsize(); - dt_fixup_mac_address_by_alias("ethernet0", ebony_mac0); - dt_fixup_mac_address_by_alias("ethernet1", ebony_mac1); - ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); - ebony_flashsel_fixup(); -} - -void ebony_init(void *mac0, void *mac1) -{ - platform_ops.fixups = ebony_fixups; - platform_ops.exit = ibm44x_dbcr_reset; - ebony_mac0 = mac0; - ebony_mac1 = mac1; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/elf.h b/ANDROID_3.4.5/arch/powerpc/boot/elf.h deleted file mode 100644 index 1941bc50..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/elf.h +++ /dev/null @@ -1,157 +0,0 @@ -#ifndef _PPC_BOOT_ELF_H_ -#define _PPC_BOOT_ELF_H_ - -/* 32-bit ELF base types. */ -typedef unsigned int Elf32_Addr; -typedef unsigned short Elf32_Half; -typedef unsigned int Elf32_Off; -typedef signed int Elf32_Sword; -typedef unsigned int Elf32_Word; - -/* 64-bit ELF base types. */ -typedef unsigned long long Elf64_Addr; -typedef unsigned short Elf64_Half; -typedef signed short Elf64_SHalf; -typedef unsigned long long Elf64_Off; -typedef signed int Elf64_Sword; -typedef unsigned int Elf64_Word; -typedef unsigned long long Elf64_Xword; -typedef signed long long Elf64_Sxword; - -/* These constants are for the segment types stored in the image headers */ -#define PT_NULL 0 -#define PT_LOAD 1 -#define PT_DYNAMIC 2 -#define PT_INTERP 3 -#define PT_NOTE 4 -#define PT_SHLIB 5 -#define PT_PHDR 6 -#define PT_TLS 7 /* Thread local storage segment */ -#define PT_LOOS 0x60000000 /* OS-specific */ -#define PT_HIOS 0x6fffffff /* OS-specific */ -#define PT_LOPROC 0x70000000 -#define PT_HIPROC 0x7fffffff -#define PT_GNU_EH_FRAME 0x6474e550 - -#define PT_GNU_STACK (PT_LOOS + 0x474e551) - -/* These constants define the different elf file types */ -#define ET_NONE 0 -#define ET_REL 1 -#define ET_EXEC 2 -#define ET_DYN 3 -#define ET_CORE 4 -#define ET_LOPROC 0xff00 -#define ET_HIPROC 0xffff - -/* These constants define the various ELF target machines */ -#define EM_NONE 0 -#define EM_PPC 20 /* PowerPC */ -#define EM_PPC64 21 /* PowerPC64 */ - -#define EI_NIDENT 16 - -typedef struct elf32_hdr { - unsigned char e_ident[EI_NIDENT]; - Elf32_Half e_type; - Elf32_Half e_machine; - Elf32_Word e_version; - Elf32_Addr e_entry; /* Entry point */ - Elf32_Off e_phoff; - Elf32_Off e_shoff; - Elf32_Word e_flags; - Elf32_Half e_ehsize; - Elf32_Half e_phentsize; - Elf32_Half e_phnum; - Elf32_Half e_shentsize; - Elf32_Half e_shnum; - Elf32_Half e_shstrndx; -} Elf32_Ehdr; - -typedef struct elf64_hdr { - unsigned char e_ident[16]; /* ELF "magic number" */ - Elf64_Half e_type; - Elf64_Half e_machine; - Elf64_Word e_version; - Elf64_Addr e_entry; /* Entry point virtual address */ - Elf64_Off e_phoff; /* Program header table file offset */ - Elf64_Off e_shoff; /* Section header table file offset */ - Elf64_Word e_flags; - Elf64_Half e_ehsize; - Elf64_Half e_phentsize; - Elf64_Half e_phnum; - Elf64_Half e_shentsize; - Elf64_Half e_shnum; - Elf64_Half e_shstrndx; -} Elf64_Ehdr; - -/* These constants define the permissions on sections in the program - header, p_flags. */ -#define PF_R 0x4 -#define PF_W 0x2 -#define PF_X 0x1 - -typedef struct elf32_phdr { - Elf32_Word p_type; - Elf32_Off p_offset; - Elf32_Addr p_vaddr; - Elf32_Addr p_paddr; - Elf32_Word p_filesz; - Elf32_Word p_memsz; - Elf32_Word p_flags; - Elf32_Word p_align; -} Elf32_Phdr; - -typedef struct elf64_phdr { - Elf64_Word p_type; - Elf64_Word p_flags; - Elf64_Off p_offset; /* Segment file offset */ - Elf64_Addr p_vaddr; /* Segment virtual address */ - Elf64_Addr p_paddr; /* Segment physical address */ - Elf64_Xword p_filesz; /* Segment size in file */ - Elf64_Xword p_memsz; /* Segment size in memory */ - Elf64_Xword p_align; /* Segment alignment, file & memory */ -} Elf64_Phdr; - -#define EI_MAG0 0 /* e_ident[] indexes */ -#define EI_MAG1 1 -#define EI_MAG2 2 -#define EI_MAG3 3 -#define EI_CLASS 4 -#define EI_DATA 5 -#define EI_VERSION 6 -#define EI_OSABI 7 -#define EI_PAD 8 - -#define ELFMAG0 0x7f /* EI_MAG */ -#define ELFMAG1 'E' -#define ELFMAG2 'L' -#define ELFMAG3 'F' -#define ELFMAG "\177ELF" -#define SELFMAG 4 - -#define ELFCLASSNONE 0 /* EI_CLASS */ -#define ELFCLASS32 1 -#define ELFCLASS64 2 -#define ELFCLASSNUM 3 - -#define ELFDATANONE 0 /* e_ident[EI_DATA] */ -#define ELFDATA2LSB 1 -#define ELFDATA2MSB 2 - -#define EV_NONE 0 /* e_version, EI_VERSION */ -#define EV_CURRENT 1 -#define EV_NUM 2 - -#define ELFOSABI_NONE 0 -#define ELFOSABI_LINUX 3 - -struct elf_info { - unsigned long loadsize; - unsigned long memsize; - unsigned long elfoffset; -}; -int parse_elf64(void *hdr, struct elf_info *info); -int parse_elf32(void *hdr, struct elf_info *info); - -#endif /* _PPC_BOOT_ELF_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/elf_util.c b/ANDROID_3.4.5/arch/powerpc/boot/elf_util.c deleted file mode 100644 index 1567a0c0..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/elf_util.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * - * Updates for PPC64 by Todd Inglett, Dave Engebretsen & Peter Bergner. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <stdarg.h> -#include <stddef.h> -#include "elf.h" -#include "page.h" -#include "string.h" -#include "stdio.h" - -int parse_elf64(void *hdr, struct elf_info *info) -{ - Elf64_Ehdr *elf64 = hdr; - Elf64_Phdr *elf64ph; - unsigned int i; - - if (!(elf64->e_ident[EI_MAG0] == ELFMAG0 && - elf64->e_ident[EI_MAG1] == ELFMAG1 && - elf64->e_ident[EI_MAG2] == ELFMAG2 && - elf64->e_ident[EI_MAG3] == ELFMAG3 && - elf64->e_ident[EI_CLASS] == ELFCLASS64 && - elf64->e_ident[EI_DATA] == ELFDATA2MSB && - (elf64->e_type == ET_EXEC || - elf64->e_type == ET_DYN) && - elf64->e_machine == EM_PPC64)) - return 0; - - elf64ph = (Elf64_Phdr *)((unsigned long)elf64 + - (unsigned long)elf64->e_phoff); - for (i = 0; i < (unsigned int)elf64->e_phnum; i++, elf64ph++) - if (elf64ph->p_type == PT_LOAD) - break; - if (i >= (unsigned int)elf64->e_phnum) - return 0; - - info->loadsize = (unsigned long)elf64ph->p_filesz; - info->memsize = (unsigned long)elf64ph->p_memsz; - info->elfoffset = (unsigned long)elf64ph->p_offset; - - return 1; -} - -int parse_elf32(void *hdr, struct elf_info *info) -{ - Elf32_Ehdr *elf32 = hdr; - Elf32_Phdr *elf32ph; - unsigned int i; - - if (!(elf32->e_ident[EI_MAG0] == ELFMAG0 && - elf32->e_ident[EI_MAG1] == ELFMAG1 && - elf32->e_ident[EI_MAG2] == ELFMAG2 && - elf32->e_ident[EI_MAG3] == ELFMAG3 && - elf32->e_ident[EI_CLASS] == ELFCLASS32 && - elf32->e_ident[EI_DATA] == ELFDATA2MSB && - (elf32->e_type == ET_EXEC || - elf32->e_type == ET_DYN) && - elf32->e_machine == EM_PPC)) - return 0; - - elf32ph = (Elf32_Phdr *) ((unsigned long)elf32 + elf32->e_phoff); - for (i = 0; i < elf32->e_phnum; i++, elf32ph++) - if (elf32ph->p_type == PT_LOAD) - break; - if (i >= elf32->e_phnum) - return 0; - - info->loadsize = elf32ph->p_filesz; - info->memsize = elf32ph->p_memsz; - info->elfoffset = elf32ph->p_offset; - return 1; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ep405.c b/ANDROID_3.4.5/arch/powerpc/boot/ep405.c deleted file mode 100644 index 2d08a862..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ep405.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Embedded Planet EP405 with PlanetCore firmware - * - * (c) Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp,\ - * - * Based on ep88xc.c by - * - * Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "planetcore.h" -#include "dcr.h" -#include "4xx.h" -#include "io.h" - -static char *table; -static u64 mem_size; - -static void platform_fixups(void) -{ - u64 val; - void *nvrtc; - - dt_fixup_memory(0, mem_size); - planetcore_set_mac_addrs(table); - - if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) { - printf("No PlanetCore crystal frequency key.\r\n"); - return; - } - ibm405gp_fixup_clocks(val, 0xa8c000); - ibm4xx_quiesce_eth((u32 *)0xef600800, NULL); - ibm4xx_fixup_ebc_ranges("/plb/ebc"); - - if (!planetcore_get_decimal(table, PLANETCORE_KEY_KB_NVRAM, &val)) { - printf("No PlanetCore NVRAM size key.\r\n"); - return; - } - nvrtc = finddevice("/plb/ebc/nvrtc@4,200000"); - if (nvrtc != NULL) { - u32 reg[3] = { 4, 0x200000, 0}; - getprop(nvrtc, "reg", reg, 3); - reg[2] = (val << 10) & 0xffffffff; - setprop(nvrtc, "reg", reg, 3); - } -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - table = (char *)r3; - planetcore_prepare_table(table); - - if (!planetcore_get_decimal(table, PLANETCORE_KEY_MB_RAM, &mem_size)) - return; - - mem_size *= 1024 * 1024; - simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64); - - fdt_init(_dtb_start); - - planetcore_set_stdout_path(table); - - serial_console_init(); - platform_ops.fixups = platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ep8248e.c b/ANDROID_3.4.5/arch/powerpc/boot/ep8248e.c deleted file mode 100644 index f57d14d0..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ep8248e.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Embedded Planet EP8248E with PlanetCore firmware - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "planetcore.h" -#include "pq2.h" - -static char *table; -static u64 mem_size; - -#include <io.h> - -static void platform_fixups(void) -{ - u64 val; - - dt_fixup_memory(0, mem_size); - planetcore_set_mac_addrs(table); - - if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) { - printf("No PlanetCore crystal frequency key.\r\n"); - return; - } - - pq2_fixup_clocks(val); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - table = (char *)r3; - planetcore_prepare_table(table); - - if (!planetcore_get_decimal(table, PLANETCORE_KEY_MB_RAM, &mem_size)) - return; - - mem_size *= 1024 * 1024; - simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64); - - fdt_init(_dtb_start); - - planetcore_set_stdout_path(table); - serial_console_init(); - platform_ops.fixups = platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ep88xc.c b/ANDROID_3.4.5/arch/powerpc/boot/ep88xc.c deleted file mode 100644 index a400f540..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ep88xc.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Embedded Planet EP88xC with PlanetCore firmware - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "planetcore.h" -#include "mpc8xx.h" - -static char *table; -static u64 mem_size; - -static void platform_fixups(void) -{ - u64 val; - - dt_fixup_memory(0, mem_size); - planetcore_set_mac_addrs(table); - - if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) { - printf("No PlanetCore crystal frequency key.\r\n"); - return; - } - - mpc885_fixup_clocks(val); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - table = (char *)r3; - planetcore_prepare_table(table); - - if (!planetcore_get_decimal(table, PLANETCORE_KEY_MB_RAM, &mem_size)) - return; - - mem_size *= 1024 * 1024; - simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64); - - fdt_init(_dtb_start); - - planetcore_set_stdout_path(table); - - serial_console_init(); - platform_ops.fixups = platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/epapr.c b/ANDROID_3.4.5/arch/powerpc/boot/epapr.c deleted file mode 100644 index 06c1961b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/epapr.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Bootwrapper for ePAPR compliant firmwares - * - * Copyright 2010 David Gibson <david@gibson.dropbear.id.au>, IBM Corporation. - * - * Based on earlier bootwrappers by: - * (c) Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp,\ - * and - * Scott Wood <scottwood@freescale.com> - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "io.h" -#include <libfdt.h> - -BSS_STACK(4096); - -#define EPAPR_SMAGIC 0x65504150 -#define EPAPR_EMAGIC 0x45504150 - -static unsigned epapr_magic; -static unsigned long ima_size; -static unsigned long fdt_addr; - -static void platform_fixups(void) -{ - if ((epapr_magic != EPAPR_EMAGIC) - && (epapr_magic != EPAPR_SMAGIC)) - fatal("r6 contained 0x%08x instead of ePAPR magic number\n", - epapr_magic); - - if (ima_size < (unsigned long)_end) - printf("WARNING: Image loaded outside IMA!" - " (_end=%p, ima_size=0x%lx)\n", _end, ima_size); - if (ima_size < fdt_addr) - printf("WARNING: Device tree address is outside IMA!" - "(fdt_addr=0x%lx, ima_size=0x%lx)\n", fdt_addr, - ima_size); - if (ima_size < fdt_addr + fdt_totalsize((void *)fdt_addr)) - printf("WARNING: Device tree extends outside IMA!" - " (fdt_addr=0x%lx, size=0x%x, ima_size=0x%lx\n", - fdt_addr, fdt_totalsize((void *)fdt_addr), ima_size); -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - epapr_magic = r6; - ima_size = r7; - fdt_addr = r3; - - /* FIXME: we should process reserve entries */ - - simple_alloc_init(_end, ima_size - (unsigned long)_end, 32, 64); - - fdt_init((void *)fdt_addr); - - serial_console_init(); - platform_ops.fixups = platform_fixups; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/fixed-head.S b/ANDROID_3.4.5/arch/powerpc/boot/fixed-head.S deleted file mode 100644 index 8e14cd9e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/fixed-head.S +++ /dev/null @@ -1,4 +0,0 @@ - .text - .global _zimage_start -_zimage_start: - b _zimage_start_lib diff --git a/ANDROID_3.4.5/arch/powerpc/boot/flatdevtree_env.h b/ANDROID_3.4.5/arch/powerpc/boot/flatdevtree_env.h deleted file mode 100644 index 66e0ebb1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/flatdevtree_env.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file adds the header file glue so that the shared files - * flatdevicetree.[ch] can compile and work in the powerpc bootwrapper. - * - * strncmp & strchr copied from <file:lib/string.c> - * Copyright (C) 1991, 1992 Linus Torvalds - * - * Maintained by: Mark A. Greer <mgreer@mvista.com> - */ -#ifndef _PPC_BOOT_FLATDEVTREE_ENV_H_ -#define _PPC_BOOT_FLATDEVTREE_ENV_H_ - -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "string.h" -#include "stdio.h" -#include "ops.h" - -#define be16_to_cpu(x) (x) -#define cpu_to_be16(x) (x) -#define be32_to_cpu(x) (x) -#define cpu_to_be32(x) (x) -#define be64_to_cpu(x) (x) -#define cpu_to_be64(x) (x) - -#endif /* _PPC_BOOT_FLATDEVTREE_ENV_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/fsl-soc.c b/ANDROID_3.4.5/arch/powerpc/boot/fsl-soc.c deleted file mode 100644 index b835ed69..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/fsl-soc.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Freescale SOC support functions - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "types.h" -#include "fsl-soc.h" -#include "stdio.h" - -static u32 prop_buf[MAX_PROP_LEN / 4]; - -u32 *fsl_get_immr(void) -{ - void *soc; - unsigned long ret = 0; - - soc = find_node_by_devtype(NULL, "soc"); - if (soc) { - int size; - u32 naddr; - - size = getprop(soc, "#address-cells", prop_buf, MAX_PROP_LEN); - if (size == 4) - naddr = prop_buf[0]; - else - naddr = 2; - - if (naddr != 1 && naddr != 2) - goto err; - - size = getprop(soc, "ranges", prop_buf, MAX_PROP_LEN); - - if (size < 12) - goto err; - if (prop_buf[0] != 0) - goto err; - if (naddr == 2 && prop_buf[1] != 0) - goto err; - - if (!dt_xlate_addr(soc, prop_buf + naddr, 8, &ret)) - ret = 0; - } - -err: - if (!ret) - printf("fsl_get_immr: Failed to find immr base\r\n"); - - return (u32 *)ret; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/fsl-soc.h b/ANDROID_3.4.5/arch/powerpc/boot/fsl-soc.h deleted file mode 100644 index 5da26fc6..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/fsl-soc.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef _PPC_BOOT_FSL_SOC_H_ -#define _PPC_BOOT_FSL_SOC_H_ - -#include "types.h" - -u32 *fsl_get_immr(void); - -#endif diff --git a/ANDROID_3.4.5/arch/powerpc/boot/gamecube-head.S b/ANDROID_3.4.5/arch/powerpc/boot/gamecube-head.S deleted file mode 100644 index 65a9b2a3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/gamecube-head.S +++ /dev/null @@ -1,111 +0,0 @@ -/* - * arch/powerpc/boot/gamecube-head.S - * - * Nintendo GameCube bootwrapper entry. - * Copyright (C) 2004-2009 The GameCube Linux Team - * Copyright (C) 2008,2009 Albert Herranz - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - */ - -#include "ppc_asm.h" - -/* - * The entry code does no assumptions regarding: - * - if the data and instruction caches are enabled or not - * - if the MMU is enabled or not - * - * We enable the caches if not already enabled, enable the MMU with an - * identity mapping scheme and jump to the start code. - */ - - .text - - .globl _zimage_start -_zimage_start: - - /* turn the MMU off */ - mfmsr 9 - rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */ - bcl 20, 31, 1f -1: - mflr 8 - clrlwi 8, 8, 3 /* convert to a real address */ - addi 8, 8, _mmu_off - 1b - mtsrr0 8 - mtsrr1 9 - rfi -_mmu_off: - /* MMU disabled */ - - /* setup BATs */ - isync - li 8, 0 - mtspr 0x210, 8 /* IBAT0U */ - mtspr 0x212, 8 /* IBAT1U */ - mtspr 0x214, 8 /* IBAT2U */ - mtspr 0x216, 8 /* IBAT3U */ - mtspr 0x218, 8 /* DBAT0U */ - mtspr 0x21a, 8 /* DBAT1U */ - mtspr 0x21c, 8 /* DBAT2U */ - mtspr 0x21e, 8 /* DBAT3U */ - - li 8, 0x01ff /* first 16MiB */ - li 9, 0x0002 /* rw */ - mtspr 0x211, 9 /* IBAT0L */ - mtspr 0x210, 8 /* IBAT0U */ - mtspr 0x219, 9 /* DBAT0L */ - mtspr 0x218, 8 /* DBAT0U */ - - lis 8, 0x0c00 /* I/O mem */ - ori 8, 8, 0x3ff /* 32MiB */ - lis 9, 0x0c00 - ori 9, 9, 0x002a /* uncached, guarded, rw */ - mtspr 0x21b, 9 /* DBAT1L */ - mtspr 0x21a, 8 /* DBAT1U */ - - lis 8, 0x0100 /* next 8MiB */ - ori 8, 8, 0x00ff /* 8MiB */ - lis 9, 0x0100 - ori 9, 9, 0x0002 /* rw */ - mtspr 0x215, 9 /* IBAT2L */ - mtspr 0x214, 8 /* IBAT2U */ - mtspr 0x21d, 9 /* DBAT2L */ - mtspr 0x21c, 8 /* DBAT2U */ - - /* enable and invalidate the caches if not already enabled */ - mfspr 8, 0x3f0 /* HID0 */ - andi. 0, 8, (1<<15) /* HID0_ICE */ - bne 1f - ori 8, 8, (1<<15)|(1<<11) /* HID0_ICE|HID0_ICFI*/ -1: - andi. 0, 8, (1<<14) /* HID0_DCE */ - bne 1f - ori 8, 8, (1<<14)|(1<<10) /* HID0_DCE|HID0_DCFI*/ -1: - mtspr 0x3f0, 8 /* HID0 */ - isync - - /* initialize arguments */ - li 3, 0 - li 4, 0 - li 5, 0 - - /* turn the MMU on */ - bcl 20, 31, 1f -1: - mflr 8 - addi 8, 8, _mmu_on - 1b - mfmsr 9 - ori 9, 9, (1<<4)|(1<<5) /* MSR_DR|MSR_IR */ - mtsrr0 8 - mtsrr1 9 - sync - rfi -_mmu_on: - b _zimage_start_lib - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/gamecube.c b/ANDROID_3.4.5/arch/powerpc/boot/gamecube.c deleted file mode 100644 index 28ae7057..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/gamecube.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * arch/powerpc/boot/gamecube.c - * - * Nintendo GameCube bootwrapper support - * Copyright (C) 2004-2009 The GameCube Linux Team - * Copyright (C) 2008,2009 Albert Herranz - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - */ - -#include <stddef.h> -#include "stdio.h" -#include "types.h" -#include "io.h" -#include "ops.h" - -#include "ugecon.h" - -BSS_STACK(8192); - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5) -{ - u32 heapsize = 16*1024*1024 - (u32)_end; - - simple_alloc_init(_end, heapsize, 32, 64); - fdt_init(_dtb_start); - - if (ug_probe()) - console_ops.write = ug_console_write; -} - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/gunzip_util.c b/ANDROID_3.4.5/arch/powerpc/boot/gunzip_util.c deleted file mode 100644 index ef2aed0f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/gunzip_util.c +++ /dev/null @@ -1,204 +0,0 @@ -/* - * Copyright 2007 David Gibson, IBM Corporation. - * Based on earlier work, Copyright (C) Paul Mackerras 1997. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <stddef.h> -#include "string.h" -#include "stdio.h" -#include "ops.h" -#include "gunzip_util.h" - -#define HEAD_CRC 2 -#define EXTRA_FIELD 4 -#define ORIG_NAME 8 -#define COMMENT 0x10 -#define RESERVED 0xe0 - -/** - * gunzip_start - prepare to decompress gzip data - * @state: decompressor state structure to be initialized - * @src: buffer containing gzip compressed or uncompressed data - * @srclen: size in bytes of the buffer at src - * - * If the buffer at @src contains a gzip header, this function - * initializes zlib to decompress the data, storing the decompression - * state in @state. The other functions in this file can then be used - * to decompress data from the gzipped stream. - * - * If the buffer at @src does not contain a gzip header, it is assumed - * to contain uncompressed data. The buffer information is recorded - * in @state and the other functions in this file will simply copy - * data from the uncompressed data stream at @src. - * - * Any errors, such as bad compressed data, cause an error to be - * printed an the platform's exit() function to be called. - */ -void gunzip_start(struct gunzip_state *state, void *src, int srclen) -{ - char *hdr = src; - int hdrlen = 0; - - memset(state, 0, sizeof(*state)); - - /* Check for gzip magic number */ - if ((hdr[0] == 0x1f) && (hdr[1] == 0x8b)) { - /* gzip data, initialize zlib parameters */ - int r, flags; - - state->s.workspace = state->scratch; - if (zlib_inflate_workspacesize() > sizeof(state->scratch)) - fatal("insufficient scratch space for gunzip\n\r"); - - /* skip header */ - hdrlen = 10; - flags = hdr[3]; - if (hdr[2] != Z_DEFLATED || (flags & RESERVED) != 0) - fatal("bad gzipped data\n\r"); - if ((flags & EXTRA_FIELD) != 0) - hdrlen = 12 + hdr[10] + (hdr[11] << 8); - if ((flags & ORIG_NAME) != 0) - while (hdr[hdrlen++] != 0) - ; - if ((flags & COMMENT) != 0) - while (hdr[hdrlen++] != 0) - ; - if ((flags & HEAD_CRC) != 0) - hdrlen += 2; - if (hdrlen >= srclen) - fatal("gunzip_start: ran out of data in header\n\r"); - - r = zlib_inflateInit2(&state->s, -MAX_WBITS); - if (r != Z_OK) - fatal("inflateInit2 returned %d\n\r", r); - } - - state->s.total_in = hdrlen; - state->s.next_in = src + hdrlen; - state->s.avail_in = srclen - hdrlen; -} - -/** - * gunzip_partial - extract bytes from a gzip data stream - * @state: gzip state structure previously initialized by gunzip_start() - * @dst: buffer to store extracted data - * @dstlen: maximum number of bytes to extract - * - * This function extracts at most @dstlen bytes from the data stream - * previously associated with @state by gunzip_start(), decompressing - * if necessary. Exactly @dstlen bytes are extracted unless the data - * stream doesn't contain enough bytes, in which case the entire - * remainder of the stream is decompressed. - * - * Returns the actual number of bytes extracted. If any errors occur, - * such as a corrupted compressed stream, an error is printed an the - * platform's exit() function is called. - */ -int gunzip_partial(struct gunzip_state *state, void *dst, int dstlen) -{ - int len; - - if (state->s.workspace) { - /* gunzipping */ - int r; - - state->s.next_out = dst; - state->s.avail_out = dstlen; - r = zlib_inflate(&state->s, Z_FULL_FLUSH); - if (r != Z_OK && r != Z_STREAM_END) - fatal("inflate returned %d msg: %s\n\r", r, state->s.msg); - len = state->s.next_out - (unsigned char *)dst; - } else { - /* uncompressed image */ - len = min(state->s.avail_in, (unsigned)dstlen); - memcpy(dst, state->s.next_in, len); - state->s.next_in += len; - state->s.avail_in -= len; - } - return len; -} - -/** - * gunzip_exactly - extract a fixed number of bytes from a gzip data stream - * @state: gzip state structure previously initialized by gunzip_start() - * @dst: buffer to store extracted data - * @dstlen: number of bytes to extract - * - * This function extracts exactly @dstlen bytes from the data stream - * previously associated with @state by gunzip_start(), decompressing - * if necessary. - * - * If there are less @dstlen bytes available in the data stream, or if - * any other errors occur, such as a corrupted compressed stream, an - * error is printed an the platform's exit() function is called. - */ -void gunzip_exactly(struct gunzip_state *state, void *dst, int dstlen) -{ - int len; - - len = gunzip_partial(state, dst, dstlen); - if (len < dstlen) - fatal("\n\rgunzip_exactly: ran out of data!" - " Wanted %d, got %d.\n\r", dstlen, len); -} - -/** - * gunzip_discard - discard bytes from a gzip data stream - * @state: gzip state structure previously initialized by gunzip_start() - * @len: number of bytes to discard - * - * This function extracts, then discards exactly @len bytes from the - * data stream previously associated with @state by gunzip_start(). - * Subsequent gunzip_partial(), gunzip_exactly() or gunzip_finish() - * calls will extract the data following the discarded bytes in the - * data stream. - * - * If there are less @len bytes available in the data stream, or if - * any other errors occur, such as a corrupted compressed stream, an - * error is printed an the platform's exit() function is called. - */ -void gunzip_discard(struct gunzip_state *state, int len) -{ - static char discard_buf[128]; - - while (len > sizeof(discard_buf)) { - gunzip_exactly(state, discard_buf, sizeof(discard_buf)); - len -= sizeof(discard_buf); - } - - if (len > 0) - gunzip_exactly(state, discard_buf, len); -} - -/** - * gunzip_finish - extract all remaining bytes from a gzip data stream - * @state: gzip state structure previously initialized by gunzip_start() - * @dst: buffer to store extracted data - * @dstlen: maximum number of bytes to extract - * - * This function extracts all remaining data, or at most @dstlen - * bytes, from the stream previously associated with @state by - * gunzip_start(). zlib is then shut down, so it is an error to use - * any of the functions in this file on @state until it is - * re-initialized with another call to gunzip_start(). - * - * If any errors occur, such as a corrupted compressed stream, an - * error is printed an the platform's exit() function is called. - */ -int gunzip_finish(struct gunzip_state *state, void *dst, int dstlen) -{ - int len; - - len = gunzip_partial(state, dst, dstlen); - - if (state->s.workspace) { - zlib_inflateEnd(&state->s); - } - - return len; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/gunzip_util.h b/ANDROID_3.4.5/arch/powerpc/boot/gunzip_util.h deleted file mode 100644 index b3dfa6e8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/gunzip_util.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Decompression convenience functions - * - * Copyright 2007 David Gibson, IBM Corporation. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#ifndef _PPC_BOOT_GUNZIP_UTIL_H_ -#define _PPC_BOOT_GUNZIP_UTIL_H_ - -#include "zlib.h" - -/* - * These functions are designed to make life easy for decompressing - * kernel images, initrd images or any other gzip compressed image, - * particularly if its useful to decompress part of the image (e.g. to - * examine headers) before decompressing the remainder. - * - * To use: - * - declare a gunzip_state structure - * - use gunzip_start() to initialize the state, associating it - * with a stream of compressed data - * - use gunzip_partial(), gunzip_exactly() and gunzip_discard() - * in any combination to extract pieces of data from the stream - * - Finally use gunzip_finish() to extract the tail of the - * compressed stream and wind up zlib - */ - -/* scratch space for gunzip; 46912 is from zlib_inflate_workspacesize() */ -#define GUNZIP_SCRATCH_SIZE 46912 - -struct gunzip_state { - z_stream s; - char scratch[46912]; -}; - -void gunzip_start(struct gunzip_state *state, void *src, int srclen); -int gunzip_partial(struct gunzip_state *state, void *dst, int dstlen); -void gunzip_exactly(struct gunzip_state *state, void *dst, int len); -void gunzip_discard(struct gunzip_state *state, int len); -int gunzip_finish(struct gunzip_state *state, void *dst, int len); - -#endif /* _PPC_BOOT_GUNZIP_UTIL_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/hack-coff.c b/ANDROID_3.4.5/arch/powerpc/boot/hack-coff.c deleted file mode 100644 index 5e5a6573..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/hack-coff.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * hack-coff.c - hack the header of an xcoff file to fill in - * a few fields needed by the Open Firmware xcoff loader on - * Power Macs but not initialized by objcopy. - * - * Copyright (C) Paul Mackerras 1997. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <stdio.h> -#include <stdlib.h> -#include <unistd.h> -#include <fcntl.h> -#include <string.h> -#include "rs6000.h" - -#define AOUT_MAGIC 0x010b - -#define get_16be(x) ((((unsigned char *)(x))[0] << 8) \ - + ((unsigned char *)(x))[1]) -#define put_16be(x, v) (((unsigned char *)(x))[0] = (v) >> 8, \ - ((unsigned char *)(x))[1] = (v) & 0xff) -#define get_32be(x) ((((unsigned char *)(x))[0] << 24) \ - + (((unsigned char *)(x))[1] << 16) \ - + (((unsigned char *)(x))[2] << 8) \ - + ((unsigned char *)(x))[3]) - -int -main(int ac, char **av) -{ - int fd; - int i, nsect; - int aoutsz; - struct external_filehdr fhdr; - AOUTHDR aout; - struct external_scnhdr shdr; - - if (ac != 2) { - fprintf(stderr, "Usage: hack-coff coff-file\n"); - exit(1); - } - if ((fd = open(av[1], 2)) == -1) { - perror(av[2]); - exit(1); - } - if (read(fd, &fhdr, sizeof(fhdr)) != sizeof(fhdr)) - goto readerr; - i = get_16be(fhdr.f_magic); - if (i != U802TOCMAGIC && i != U802WRMAGIC && i != U802ROMAGIC) { - fprintf(stderr, "%s: not an xcoff file\n", av[1]); - exit(1); - } - aoutsz = get_16be(fhdr.f_opthdr); - if (read(fd, &aout, aoutsz) != aoutsz) - goto readerr; - nsect = get_16be(fhdr.f_nscns); - for (i = 0; i < nsect; ++i) { - if (read(fd, &shdr, sizeof(shdr)) != sizeof(shdr)) - goto readerr; - if (strcmp(shdr.s_name, ".text") == 0) { - put_16be(aout.o_snentry, i+1); - put_16be(aout.o_sntext, i+1); - } else if (strcmp(shdr.s_name, ".data") == 0) { - put_16be(aout.o_sndata, i+1); - } else if (strcmp(shdr.s_name, ".bss") == 0) { - put_16be(aout.o_snbss, i+1); - } - } - put_16be(aout.magic, AOUT_MAGIC); - if (lseek(fd, (long) sizeof(struct external_filehdr), 0) == -1 - || write(fd, &aout, aoutsz) != aoutsz) { - fprintf(stderr, "%s: write error\n", av[1]); - exit(1); - } - close(fd); - exit(0); - -readerr: - fprintf(stderr, "%s: read error or file too short\n", av[1]); - exit(1); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/holly.c b/ANDROID_3.4.5/arch/powerpc/boot/holly.c deleted file mode 100644 index 58013b92..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/holly.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright 2007 IBM Corporation - * - * Stephen Winiecki <stevewin@us.ibm.com> - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * Based on earlier code: - * Copyright (C) Paul Mackerras 1997. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - */ -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "string.h" -#include "stdio.h" -#include "page.h" -#include "ops.h" -#include "io.h" - -BSS_STACK(4096); - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5) -{ - u32 heapsize = 0x8000000 - (u32)_end; /* 128M */ - - simple_alloc_init(_end, heapsize, 32, 64); - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/install.sh b/ANDROID_3.4.5/arch/powerpc/boot/install.sh deleted file mode 100644 index b6a256bc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/install.sh +++ /dev/null @@ -1,55 +0,0 @@ -#!/bin/sh -# -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# -# Copyright (C) 1995 by Linus Torvalds -# -# Blatantly stolen from in arch/i386/boot/install.sh by Dave Hansen -# -# "make install" script for ppc64 architecture -# -# Arguments: -# $1 - kernel version -# $2 - kernel image file -# $3 - kernel map file -# $4 - default install path (blank if root directory) -# $5 and more - kernel boot files; zImage*, uImage, cuImage.*, etc. -# - -# Bail with error code if anything goes wrong -set -e - -# User may have a custom install script - -if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi -if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi - -# Default install - -# this should work for both the pSeries zImage and the iSeries vmlinux.sm -image_name=`basename $2` - -if [ -f $4/$image_name ]; then - mv $4/$image_name $4/$image_name.old -fi - -if [ -f $4/System.map ]; then - mv $4/System.map $4/System.old -fi - -cat $2 > $4/$image_name -cp $3 $4/System.map - -# Copy all the bootable image files -path=$4 -shift 4 -while [ $# -ne 0 ]; do - image_name=`basename $1` - if [ -f $path/$image_name ]; then - mv $path/$image_name $path/$image_name.old - fi - cat $1 > $path/$image_name - shift -done; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/io.h b/ANDROID_3.4.5/arch/powerpc/boot/io.h deleted file mode 100644 index 7c09f486..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/io.h +++ /dev/null @@ -1,102 +0,0 @@ -#ifndef _IO_H -#define __IO_H - -#include "types.h" - -/* - * Low-level I/O routines. - * - * Copied from <file:arch/powerpc/include/asm/io.h> (which has no copyright) - */ -static inline int in_8(const volatile unsigned char *addr) -{ - int ret; - - __asm__ __volatile__("lbz%U1%X1 %0,%1; twi 0,%0,0; isync" - : "=r" (ret) : "m" (*addr)); - return ret; -} - -static inline void out_8(volatile unsigned char *addr, int val) -{ - __asm__ __volatile__("stb%U0%X0 %1,%0; sync" - : "=m" (*addr) : "r" (val)); -} - -static inline unsigned in_le16(const volatile u16 *addr) -{ - unsigned ret; - - __asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync" - : "=r" (ret) : "r" (addr), "m" (*addr)); - - return ret; -} - -static inline unsigned in_be16(const volatile u16 *addr) -{ - unsigned ret; - - __asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync" - : "=r" (ret) : "m" (*addr)); - return ret; -} - -static inline void out_le16(volatile u16 *addr, int val) -{ - __asm__ __volatile__("sthbrx %1,0,%2; sync" : "=m" (*addr) - : "r" (val), "r" (addr)); -} - -static inline void out_be16(volatile u16 *addr, int val) -{ - __asm__ __volatile__("sth%U0%X0 %1,%0; sync" - : "=m" (*addr) : "r" (val)); -} - -static inline unsigned in_le32(const volatile unsigned *addr) -{ - unsigned ret; - - __asm__ __volatile__("lwbrx %0,0,%1; twi 0,%0,0; isync" - : "=r" (ret) : "r" (addr), "m" (*addr)); - return ret; -} - -static inline unsigned in_be32(const volatile unsigned *addr) -{ - unsigned ret; - - __asm__ __volatile__("lwz%U1%X1 %0,%1; twi 0,%0,0; isync" - : "=r" (ret) : "m" (*addr)); - return ret; -} - -static inline void out_le32(volatile unsigned *addr, int val) -{ - __asm__ __volatile__("stwbrx %1,0,%2; sync" : "=m" (*addr) - : "r" (val), "r" (addr)); -} - -static inline void out_be32(volatile unsigned *addr, int val) -{ - __asm__ __volatile__("stw%U0%X0 %1,%0; sync" - : "=m" (*addr) : "r" (val)); -} - -static inline void sync(void) -{ - asm volatile("sync" : : : "memory"); -} - -static inline void eieio(void) -{ - asm volatile("eieio" : : : "memory"); -} - -static inline void barrier(void) -{ - asm volatile("" : : : "memory"); -} - -#endif /* _IO_H */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/libfdt-wrapper.c b/ANDROID_3.4.5/arch/powerpc/boot/libfdt-wrapper.c deleted file mode 100644 index bb8b9b35..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/libfdt-wrapper.c +++ /dev/null @@ -1,199 +0,0 @@ -/* - * This file does the necessary interface mapping between the bootwrapper - * device tree operations and the interface provided by shared source - * files flatdevicetree.[ch]. - * - * Copyright 2007 David Gibson, IBM Corporation. - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA - * 02110-1301 USA - */ - -#include <stddef.h> -#include <stdio.h> -#include <page.h> -#include <libfdt.h> -#include "ops.h" - -#define DEBUG 0 -#define BAD_ERROR(err) (((err) < 0) \ - && ((err) != -FDT_ERR_NOTFOUND) \ - && ((err) != -FDT_ERR_EXISTS)) - -#define check_err(err) \ - ({ \ - if (BAD_ERROR(err) || ((err < 0) && DEBUG)) \ - printf("%s():%d %s\n\r", __func__, __LINE__, \ - fdt_strerror(err)); \ - if (BAD_ERROR(err)) \ - exit(); \ - (err < 0) ? -1 : 0; \ - }) - -#define offset_devp(off) \ - ({ \ - int _offset = (off); \ - check_err(_offset) ? NULL : (void *)(_offset+1); \ - }) - -#define devp_offset_find(devp) (((int)(devp))-1) -#define devp_offset(devp) (devp ? ((int)(devp))-1 : 0) - -static void *fdt; -static void *buf; /* = NULL */ - -#define EXPAND_GRANULARITY 1024 - -static void expand_buf(int minexpand) -{ - int size = fdt_totalsize(fdt); - int rc; - - size = _ALIGN(size + minexpand, EXPAND_GRANULARITY); - buf = platform_ops.realloc(buf, size); - if (!buf) - fatal("Couldn't find %d bytes to expand device tree\n\r", size); - rc = fdt_open_into(fdt, buf, size); - if (rc != 0) - fatal("Couldn't expand fdt into new buffer: %s\n\r", - fdt_strerror(rc)); - - fdt = buf; -} - -static void *fdt_wrapper_finddevice(const char *path) -{ - return offset_devp(fdt_path_offset(fdt, path)); -} - -static int fdt_wrapper_getprop(const void *devp, const char *name, - void *buf, const int buflen) -{ - const void *p; - int len; - - p = fdt_getprop(fdt, devp_offset(devp), name, &len); - if (!p) - return check_err(len); - memcpy(buf, p, min(len, buflen)); - return len; -} - -static int fdt_wrapper_setprop(const void *devp, const char *name, - const void *buf, const int len) -{ - int rc; - - rc = fdt_setprop(fdt, devp_offset(devp), name, buf, len); - if (rc == -FDT_ERR_NOSPACE) { - expand_buf(len + 16); - rc = fdt_setprop(fdt, devp_offset(devp), name, buf, len); - } - - return check_err(rc); -} - -static int fdt_wrapper_del_node(const void *devp) -{ - return fdt_del_node(fdt, devp_offset(devp)); -} - -static void *fdt_wrapper_get_parent(const void *devp) -{ - return offset_devp(fdt_parent_offset(fdt, devp_offset(devp))); -} - -static void *fdt_wrapper_create_node(const void *devp, const char *name) -{ - int offset; - - offset = fdt_add_subnode(fdt, devp_offset(devp), name); - if (offset == -FDT_ERR_NOSPACE) { - expand_buf(strlen(name) + 16); - offset = fdt_add_subnode(fdt, devp_offset(devp), name); - } - - return offset_devp(offset); -} - -static void *fdt_wrapper_find_node_by_prop_value(const void *prev, - const char *name, - const char *val, - int len) -{ - int offset = fdt_node_offset_by_prop_value(fdt, devp_offset_find(prev), - name, val, len); - return offset_devp(offset); -} - -static void *fdt_wrapper_find_node_by_compatible(const void *prev, - const char *val) -{ - int offset = fdt_node_offset_by_compatible(fdt, devp_offset_find(prev), - val); - return offset_devp(offset); -} - -static char *fdt_wrapper_get_path(const void *devp, char *buf, int len) -{ - int rc; - - rc = fdt_get_path(fdt, devp_offset(devp), buf, len); - if (check_err(rc)) - return NULL; - return buf; -} - -static unsigned long fdt_wrapper_finalize(void) -{ - int rc; - - rc = fdt_pack(fdt); - if (rc != 0) - fatal("Couldn't pack flat tree: %s\n\r", - fdt_strerror(rc)); - return (unsigned long)fdt; -} - -void fdt_init(void *blob) -{ - int err; - int bufsize; - - dt_ops.finddevice = fdt_wrapper_finddevice; - dt_ops.getprop = fdt_wrapper_getprop; - dt_ops.setprop = fdt_wrapper_setprop; - dt_ops.get_parent = fdt_wrapper_get_parent; - dt_ops.create_node = fdt_wrapper_create_node; - dt_ops.find_node_by_prop_value = fdt_wrapper_find_node_by_prop_value; - dt_ops.find_node_by_compatible = fdt_wrapper_find_node_by_compatible; - dt_ops.del_node = fdt_wrapper_del_node; - dt_ops.get_path = fdt_wrapper_get_path; - dt_ops.finalize = fdt_wrapper_finalize; - - /* Make sure the dt blob is the right version and so forth */ - fdt = blob; - bufsize = fdt_totalsize(fdt) + EXPAND_GRANULARITY; - buf = malloc(bufsize); - if(!buf) - fatal("malloc failed. can't relocate the device tree\n\r"); - - err = fdt_open_into(fdt, buf, bufsize); - - if (err != 0) - fatal("fdt_init(): %s\n\r", fdt_strerror(err)); - - fdt = buf; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/libfdt_env.h b/ANDROID_3.4.5/arch/powerpc/boot/libfdt_env.h deleted file mode 100644 index c89fdb1b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/libfdt_env.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef _ARCH_POWERPC_BOOT_LIBFDT_ENV_H -#define _ARCH_POWERPC_BOOT_LIBFDT_ENV_H - -#include <types.h> -#include <string.h> - -typedef u32 uint32_t; -typedef u64 uint64_t; -typedef unsigned long uintptr_t; - -#define fdt16_to_cpu(x) (x) -#define cpu_to_fdt16(x) (x) -#define fdt32_to_cpu(x) (x) -#define cpu_to_fdt32(x) (x) -#define fdt64_to_cpu(x) (x) -#define cpu_to_fdt64(x) (x) - -#endif /* _ARCH_POWERPC_BOOT_LIBFDT_ENV_H */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/main.c b/ANDROID_3.4.5/arch/powerpc/boot/main.c deleted file mode 100644 index a28f0216..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/main.c +++ /dev/null @@ -1,217 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * - * Updates for PPC64 by Todd Inglett, Dave Engebretsen & Peter Bergner. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <stdarg.h> -#include <stddef.h> -#include "elf.h" -#include "page.h" -#include "string.h" -#include "stdio.h" -#include "ops.h" -#include "gunzip_util.h" -#include "reg.h" - -static struct gunzip_state gzstate; - -struct addr_range { - void *addr; - unsigned long size; -}; - -#undef DEBUG - -static struct addr_range prep_kernel(void) -{ - char elfheader[256]; - void *vmlinuz_addr = _vmlinux_start; - unsigned long vmlinuz_size = _vmlinux_end - _vmlinux_start; - void *addr = 0; - struct elf_info ei; - int len; - - /* gunzip the ELF header of the kernel */ - gunzip_start(&gzstate, vmlinuz_addr, vmlinuz_size); - gunzip_exactly(&gzstate, elfheader, sizeof(elfheader)); - - if (!parse_elf64(elfheader, &ei) && !parse_elf32(elfheader, &ei)) - fatal("Error: not a valid PPC32 or PPC64 ELF file!\n\r"); - - if (platform_ops.image_hdr) - platform_ops.image_hdr(elfheader); - - /* We need to alloc the memsize: gzip will expand the kernel - * text/data, then possible rubbish we don't care about. But - * the kernel bss must be claimed (it will be zero'd by the - * kernel itself) - */ - printf("Allocating 0x%lx bytes for kernel ...\n\r", ei.memsize); - - if (platform_ops.vmlinux_alloc) { - addr = platform_ops.vmlinux_alloc(ei.memsize); - } else { - /* - * Check if the kernel image (without bss) would overwrite the - * bootwrapper. The device tree has been moved in fdt_init() - * to an area allocated with malloc() (somewhere past _end). - */ - if ((unsigned long)_start < ei.loadsize) - fatal("Insufficient memory for kernel at address 0!" - " (_start=%p, uncompressed size=%08lx)\n\r", - _start, ei.loadsize); - - if ((unsigned long)_end < ei.memsize) - fatal("The final kernel image would overwrite the " - "device tree\n\r"); - } - - /* Finally, gunzip the kernel */ - printf("gunzipping (0x%p <- 0x%p:0x%p)...", addr, - vmlinuz_addr, vmlinuz_addr+vmlinuz_size); - /* discard up to the actual load data */ - gunzip_discard(&gzstate, ei.elfoffset - sizeof(elfheader)); - len = gunzip_finish(&gzstate, addr, ei.loadsize); - if (len != ei.loadsize) - fatal("ran out of data! only got 0x%x of 0x%lx bytes.\n\r", - len, ei.loadsize); - printf("done 0x%x bytes\n\r", len); - - flush_cache(addr, ei.loadsize); - - return (struct addr_range){addr, ei.memsize}; -} - -static struct addr_range prep_initrd(struct addr_range vmlinux, void *chosen, - unsigned long initrd_addr, - unsigned long initrd_size) -{ - /* If we have an image attached to us, it overrides anything - * supplied by the loader. */ - if (_initrd_end > _initrd_start) { - printf("Attached initrd image at 0x%p-0x%p\n\r", - _initrd_start, _initrd_end); - initrd_addr = (unsigned long)_initrd_start; - initrd_size = _initrd_end - _initrd_start; - } else if (initrd_size > 0) { - printf("Using loader supplied ramdisk at 0x%lx-0x%lx\n\r", - initrd_addr, initrd_addr + initrd_size); - } - - /* If there's no initrd at all, we're done */ - if (! initrd_size) - return (struct addr_range){0, 0}; - - /* - * If the initrd is too low it will be clobbered when the - * kernel relocates to its final location. In this case, - * allocate a safer place and move it. - */ - if (initrd_addr < vmlinux.size) { - void *old_addr = (void *)initrd_addr; - - printf("Allocating 0x%lx bytes for initrd ...\n\r", - initrd_size); - initrd_addr = (unsigned long)malloc(initrd_size); - if (! initrd_addr) - fatal("Can't allocate memory for initial " - "ramdisk !\n\r"); - printf("Relocating initrd 0x%lx <- 0x%p (0x%lx bytes)\n\r", - initrd_addr, old_addr, initrd_size); - memmove((void *)initrd_addr, old_addr, initrd_size); - } - - printf("initrd head: 0x%lx\n\r", *((unsigned long *)initrd_addr)); - - /* Tell the kernel initrd address via device tree */ - setprop_val(chosen, "linux,initrd-start", (u32)(initrd_addr)); - setprop_val(chosen, "linux,initrd-end", (u32)(initrd_addr+initrd_size)); - - return (struct addr_range){(void *)initrd_addr, initrd_size}; -} - -/* A buffer that may be edited by tools operating on a zImage binary so as to - * edit the command line passed to vmlinux (by setting /chosen/bootargs). - * The buffer is put in it's own section so that tools may locate it easier. - */ -static char cmdline[COMMAND_LINE_SIZE] - __attribute__((__section__("__builtin_cmdline"))); - -static void prep_cmdline(void *chosen) -{ - if (cmdline[0] == '\0') - getprop(chosen, "bootargs", cmdline, COMMAND_LINE_SIZE-1); - - printf("\n\rLinux/PowerPC load: %s", cmdline); - /* If possible, edit the command line */ - if (console_ops.edit_cmdline) - console_ops.edit_cmdline(cmdline, COMMAND_LINE_SIZE); - printf("\n\r"); - - /* Put the command line back into the devtree for the kernel */ - setprop_str(chosen, "bootargs", cmdline); -} - -struct platform_ops platform_ops; -struct dt_ops dt_ops; -struct console_ops console_ops; -struct loader_info loader_info; - -void start(void) -{ - struct addr_range vmlinux, initrd; - kernel_entry_t kentry; - unsigned long ft_addr = 0; - void *chosen; - - /* Do this first, because malloc() could clobber the loader's - * command line. Only use the loader command line if a - * built-in command line wasn't set by an external tool */ - if ((loader_info.cmdline_len > 0) && (cmdline[0] == '\0')) - memmove(cmdline, loader_info.cmdline, - min(loader_info.cmdline_len, COMMAND_LINE_SIZE-1)); - - if (console_ops.open && (console_ops.open() < 0)) - exit(); - if (platform_ops.fixups) - platform_ops.fixups(); - - printf("\n\rzImage starting: loaded at 0x%p (sp: 0x%p)\n\r", - _start, get_sp()); - - /* Ensure that the device tree has a /chosen node */ - chosen = finddevice("/chosen"); - if (!chosen) - chosen = create_node(NULL, "chosen"); - - vmlinux = prep_kernel(); - initrd = prep_initrd(vmlinux, chosen, - loader_info.initrd_addr, loader_info.initrd_size); - prep_cmdline(chosen); - - printf("Finalizing device tree..."); - if (dt_ops.finalize) - ft_addr = dt_ops.finalize(); - if (ft_addr) - printf(" flat tree at 0x%lx\n\r", ft_addr); - else - printf(" using OF tree (promptr=%p)\n\r", loader_info.promptr); - - if (console_ops.close) - console_ops.close(); - - kentry = (kernel_entry_t) vmlinux.addr; - if (ft_addr) - kentry(ft_addr, 0, NULL); - else - kentry((unsigned long)initrd.addr, initrd.size, - loader_info.promptr); - - /* console closed so printf in fatal below may not work */ - fatal("Error: Linux kernel returned to zImage boot wrapper!\n\r"); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/mktree.c b/ANDROID_3.4.5/arch/powerpc/boot/mktree.c deleted file mode 100644 index e2ae2434..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/mktree.c +++ /dev/null @@ -1,150 +0,0 @@ -/* - * Makes a tree bootable image for IBM Evaluation boards. - * Basically, just take a zImage, skip the ELF header, and stuff - * a 32 byte header on the front. - * - * We use htonl, which is a network macro, to make sure we're doing - * The Right Thing on an LE machine. It's non-obvious, but it should - * work on anything BSD'ish. - */ - -#include <fcntl.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <sys/stat.h> -#include <unistd.h> -#include <netinet/in.h> -#ifdef __sun__ -#include <inttypes.h> -#else -#include <stdint.h> -#endif - -/* This gets tacked on the front of the image. There are also a few - * bytes allocated after the _start label used by the boot rom (see - * head.S for details). - */ -typedef struct boot_block { - uint32_t bb_magic; /* 0x0052504F */ - uint32_t bb_dest; /* Target address of the image */ - uint32_t bb_num_512blocks; /* Size, rounded-up, in 512 byte blks */ - uint32_t bb_debug_flag; /* Run debugger or image after load */ - uint32_t bb_entry_point; /* The image address to start */ - uint32_t bb_checksum; /* 32 bit checksum including header */ - uint32_t reserved[2]; -} boot_block_t; - -#define IMGBLK 512 -unsigned int tmpbuf[IMGBLK / sizeof(unsigned int)]; - -int main(int argc, char *argv[]) -{ - int in_fd, out_fd; - int nblks, i; - unsigned int cksum, *cp; - struct stat st; - boot_block_t bt; - - if (argc < 5) { - fprintf(stderr, "usage: %s <zImage-file> <boot-image> <load address> <entry point>\n",argv[0]); - exit(1); - } - - if (stat(argv[1], &st) < 0) { - perror("stat"); - exit(2); - } - - nblks = (st.st_size + IMGBLK) / IMGBLK; - - bt.bb_magic = htonl(0x0052504F); - - /* If we have the optional entry point parameter, use it */ - bt.bb_dest = htonl(strtoul(argv[3], NULL, 0)); - bt.bb_entry_point = htonl(strtoul(argv[4], NULL, 0)); - - /* We know these from the linker command. - * ...and then move it up into memory a little more so the - * relocation can happen. - */ - bt.bb_num_512blocks = htonl(nblks); - bt.bb_debug_flag = 0; - - bt.bb_checksum = 0; - - /* To be neat and tidy :-). - */ - bt.reserved[0] = 0; - bt.reserved[1] = 0; - - if ((in_fd = open(argv[1], O_RDONLY)) < 0) { - perror("zImage open"); - exit(3); - } - - if ((out_fd = open(argv[2], (O_RDWR | O_CREAT | O_TRUNC), 0666)) < 0) { - perror("bootfile open"); - exit(3); - } - - cksum = 0; - cp = (void *)&bt; - for (i = 0; i < sizeof(bt) / sizeof(unsigned int); i++) - cksum += *cp++; - - /* Assume zImage is an ELF file, and skip the 64K header. - */ - if (read(in_fd, tmpbuf, sizeof(tmpbuf)) != sizeof(tmpbuf)) { - fprintf(stderr, "%s is too small to be an ELF image\n", - argv[1]); - exit(4); - } - - if (tmpbuf[0] != htonl(0x7f454c46)) { - fprintf(stderr, "%s is not an ELF image\n", argv[1]); - exit(4); - } - - if (lseek(in_fd, (64 * 1024), SEEK_SET) < 0) { - fprintf(stderr, "%s failed to seek in ELF image\n", argv[1]); - exit(4); - } - - nblks -= (64 * 1024) / IMGBLK; - - /* And away we go...... - */ - if (write(out_fd, &bt, sizeof(bt)) != sizeof(bt)) { - perror("boot-image write"); - exit(5); - } - - while (nblks-- > 0) { - if (read(in_fd, tmpbuf, sizeof(tmpbuf)) < 0) { - perror("zImage read"); - exit(5); - } - cp = tmpbuf; - for (i = 0; i < sizeof(tmpbuf) / sizeof(unsigned int); i++) - cksum += *cp++; - if (write(out_fd, tmpbuf, sizeof(tmpbuf)) != sizeof(tmpbuf)) { - perror("boot-image write"); - exit(5); - } - } - - /* rewrite the header with the computed checksum. - */ - bt.bb_checksum = htonl(cksum); - if (lseek(out_fd, 0, SEEK_SET) < 0) { - perror("rewrite seek"); - exit(1); - } - if (write(out_fd, &bt, sizeof(bt)) != sizeof(bt)) { - perror("boot-image rewrite"); - exit(1); - } - - exit(0); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/mpc52xx-psc.c b/ANDROID_3.4.5/arch/powerpc/boot/mpc52xx-psc.c deleted file mode 100644 index d4cb4e4e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/mpc52xx-psc.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * MPC5200 PSC serial console support. - * - * Author: Grant Likely <grant.likely@secretlab.ca> - * - * Copyright (c) 2007 Secret Lab Technologies Ltd. - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * It is assumed that the firmware (or the platform file) has already set - * up the port. - */ - -#include "types.h" -#include "io.h" -#include "ops.h" - -/* Programmable Serial Controller (PSC) status register bits */ -#define MPC52xx_PSC_SR 0x04 -#define MPC52xx_PSC_SR_RXRDY 0x0100 -#define MPC52xx_PSC_SR_RXFULL 0x0200 -#define MPC52xx_PSC_SR_TXRDY 0x0400 -#define MPC52xx_PSC_SR_TXEMP 0x0800 - -#define MPC52xx_PSC_BUFFER 0x0C - -static void *psc; - -static int psc_open(void) -{ - /* Assume the firmware has already configured the PSC into - * uart mode */ - return 0; -} - -static void psc_putc(unsigned char c) -{ - while (!(in_be16(psc + MPC52xx_PSC_SR) & MPC52xx_PSC_SR_TXRDY)) ; - out_8(psc + MPC52xx_PSC_BUFFER, c); -} - -static unsigned char psc_tstc(void) -{ - return (in_be16(psc + MPC52xx_PSC_SR) & MPC52xx_PSC_SR_RXRDY) != 0; -} - -static unsigned char psc_getc(void) -{ - while (!(in_be16(psc + MPC52xx_PSC_SR) & MPC52xx_PSC_SR_RXRDY)) ; - return in_8(psc + MPC52xx_PSC_BUFFER); -} - -int mpc5200_psc_console_init(void *devp, struct serial_console_data *scdp) -{ - /* Get the base address of the psc registers */ - if (dt_get_virtual_reg(devp, &psc, 1) < 1) - return -1; - - scdp->open = psc_open; - scdp->putc = psc_putc; - scdp->getc = psc_getc; - scdp->tstc = psc_tstc; - - return 0; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/mpc8xx.c b/ANDROID_3.4.5/arch/powerpc/boot/mpc8xx.c deleted file mode 100644 index add55a7f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/mpc8xx.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * MPC8xx support functions - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "types.h" -#include "fsl-soc.h" -#include "mpc8xx.h" -#include "stdio.h" -#include "io.h" - -#define MPC8XX_PLPRCR (0x284/4) /* PLL and Reset Control Register */ - -/* Return system clock from crystal frequency */ -u32 mpc885_get_clock(u32 crystal) -{ - u32 *immr; - u32 plprcr; - int mfi, mfn, mfd, pdf, div; - u32 ret; - - immr = fsl_get_immr(); - if (!immr) { - printf("mpc885_get_clock: Couldn't get IMMR base.\r\n"); - return 0; - } - - plprcr = in_be32(&immr[MPC8XX_PLPRCR]); - - mfi = (plprcr >> 16) & 15; - if (mfi < 5) { - printf("Warning: PLPRCR[MFI] value of %d out-of-bounds\r\n", - mfi); - mfi = 5; - } - - pdf = (plprcr >> 1) & 0xf; - div = (plprcr >> 20) & 3; - mfd = (plprcr >> 22) & 0x1f; - mfn = (plprcr >> 27) & 0x1f; - - ret = crystal * mfi; - - if (mfn != 0) - ret += crystal * mfn / (mfd + 1); - - return ret / (pdf + 1); -} - -/* Set common device tree fields based on the given clock frequencies. */ -void mpc8xx_set_clocks(u32 sysclk) -{ - void *node; - - dt_fixup_cpu_clocks(sysclk, sysclk / 16, sysclk); - - node = finddevice("/soc/cpm"); - if (node) - setprop(node, "clock-frequency", &sysclk, 4); - - node = finddevice("/soc/cpm/brg"); - if (node) - setprop(node, "clock-frequency", &sysclk, 4); -} - -int mpc885_fixup_clocks(u32 crystal) -{ - u32 sysclk = mpc885_get_clock(crystal); - if (!sysclk) - return 0; - - mpc8xx_set_clocks(sysclk); - return 1; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/mpc8xx.h b/ANDROID_3.4.5/arch/powerpc/boot/mpc8xx.h deleted file mode 100644 index 3f59901a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/mpc8xx.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _PPC_BOOT_MPC8xx_H_ -#define _PPC_BOOT_MPC8xx_H_ - -#include "types.h" - -void mpc8xx_set_clocks(u32 sysclk); - -u32 mpc885_get_clock(u32 crystal); -int mpc885_fixup_clocks(u32 crystal); - -#endif diff --git a/ANDROID_3.4.5/arch/powerpc/boot/mpsc.c b/ANDROID_3.4.5/arch/powerpc/boot/mpsc.c deleted file mode 100644 index 425ad88c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/mpsc.c +++ /dev/null @@ -1,169 +0,0 @@ -/* - * MPSC/UART driver for the Marvell mv64360, mv64460, ... - * - * Author: Mark A. Greer <mgreer@mvista.com> - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "string.h" -#include "stdio.h" -#include "io.h" -#include "ops.h" - - -#define MPSC_CHR_1 0x000c - -#define MPSC_CHR_2 0x0010 -#define MPSC_CHR_2_TA (1<<7) -#define MPSC_CHR_2_TCS (1<<9) -#define MPSC_CHR_2_RA (1<<23) -#define MPSC_CHR_2_CRD (1<<25) -#define MPSC_CHR_2_EH (1<<31) - -#define MPSC_CHR_4 0x0018 -#define MPSC_CHR_4_Z (1<<29) - -#define MPSC_CHR_5 0x001c -#define MPSC_CHR_5_CTL1_INTR (1<<12) -#define MPSC_CHR_5_CTL1_VALID (1<<15) - -#define MPSC_CHR_10 0x0030 - -#define MPSC_INTR_CAUSE 0x0000 -#define MPSC_INTR_CAUSE_RCC (1<<6) -#define MPSC_INTR_MASK 0x0080 - -#define SDMA_SDCM 0x0008 -#define SDMA_SDCM_AR (1<<15) -#define SDMA_SDCM_AT (1<<31) - -static volatile char *mpsc_base; -static volatile char *mpscintr_base; -static u32 chr1, chr2; - -static int mpsc_open(void) -{ - chr1 = in_le32((u32 *)(mpsc_base + MPSC_CHR_1)) & 0x00ff0000; - chr2 = in_le32((u32 *)(mpsc_base + MPSC_CHR_2)) & ~(MPSC_CHR_2_TA - | MPSC_CHR_2_TCS | MPSC_CHR_2_RA | MPSC_CHR_2_CRD - | MPSC_CHR_2_EH); - out_le32((u32 *)(mpsc_base + MPSC_CHR_4), MPSC_CHR_4_Z); - out_le32((u32 *)(mpsc_base + MPSC_CHR_5), - MPSC_CHR_5_CTL1_INTR | MPSC_CHR_5_CTL1_VALID); - out_le32((u32 *)(mpsc_base + MPSC_CHR_2), chr2 | MPSC_CHR_2_EH); - return 0; -} - -static void mpsc_putc(unsigned char c) -{ - while (in_le32((u32 *)(mpsc_base + MPSC_CHR_2)) & MPSC_CHR_2_TCS); - - out_le32((u32 *)(mpsc_base + MPSC_CHR_1), chr1 | c); - out_le32((u32 *)(mpsc_base + MPSC_CHR_2), chr2 | MPSC_CHR_2_TCS); -} - -static unsigned char mpsc_getc(void) -{ - u32 cause = 0; - unsigned char c; - - while (!(cause & MPSC_INTR_CAUSE_RCC)) - cause = in_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE)); - - c = in_8((u8 *)(mpsc_base + MPSC_CHR_10 + 2)); - out_8((u8 *)(mpsc_base + MPSC_CHR_10 + 2), c); - out_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE), - cause & ~MPSC_INTR_CAUSE_RCC); - - return c; -} - -static u8 mpsc_tstc(void) -{ - return (u8)((in_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE)) - & MPSC_INTR_CAUSE_RCC) != 0); -} - -static void mpsc_stop_dma(volatile char *sdma_base) -{ - out_le32((u32 *)(mpsc_base + MPSC_CHR_2),MPSC_CHR_2_TA | MPSC_CHR_2_RA); - out_le32((u32 *)(sdma_base + SDMA_SDCM), SDMA_SDCM_AR | SDMA_SDCM_AT); - - while ((in_le32((u32 *)(sdma_base + SDMA_SDCM)) - & (SDMA_SDCM_AR | SDMA_SDCM_AT)) != 0) - udelay(100); -} - -static volatile char *mpsc_get_virtreg_of_phandle(void *devp, char *prop) -{ - void *v; - int n; - - n = getprop(devp, prop, &v, sizeof(v)); - if (n != sizeof(v)) - goto err_out; - - devp = find_node_by_linuxphandle((u32)v); - if (devp == NULL) - goto err_out; - - n = getprop(devp, "virtual-reg", &v, sizeof(v)); - if (n == sizeof(v)) - return v; - -err_out: - return NULL; -} - -int mpsc_console_init(void *devp, struct serial_console_data *scdp) -{ - void *v; - int n, reg_set; - volatile char *sdma_base; - - n = getprop(devp, "virtual-reg", &v, sizeof(v)); - if (n != sizeof(v)) - goto err_out; - mpsc_base = v; - - sdma_base = mpsc_get_virtreg_of_phandle(devp, "sdma"); - if (sdma_base == NULL) - goto err_out; - - mpscintr_base = mpsc_get_virtreg_of_phandle(devp, "mpscintr"); - if (mpscintr_base == NULL) - goto err_out; - - n = getprop(devp, "cell-index", &v, sizeof(v)); - if (n != sizeof(v)) - goto err_out; - reg_set = (int)v; - - mpscintr_base += (reg_set == 0) ? 0x4 : 0xc; - - /* Make sure the mpsc ctlrs are shutdown */ - out_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE), 0); - out_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE), 0); - out_le32((u32 *)(mpscintr_base + MPSC_INTR_MASK), 0); - out_le32((u32 *)(mpscintr_base + MPSC_INTR_MASK), 0); - - mpsc_stop_dma(sdma_base); - - scdp->open = mpsc_open; - scdp->putc = mpsc_putc; - scdp->getc = mpsc_getc; - scdp->tstc = mpsc_tstc; - scdp->close = NULL; - - return 0; - -err_out: - return -1; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/mv64x60.c b/ANDROID_3.4.5/arch/powerpc/boot/mv64x60.c deleted file mode 100644 index d9bb302b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/mv64x60.c +++ /dev/null @@ -1,581 +0,0 @@ -/* - * Marvell hostbridge routines - * - * Author: Mark A. Greer <source@mvista.com> - * - * 2004, 2005, 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "page.h" -#include "string.h" -#include "stdio.h" -#include "io.h" -#include "ops.h" -#include "mv64x60.h" - -#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) - -#define MV64x60_CPU2MEM_WINDOWS 4 -#define MV64x60_CPU2MEM_0_BASE 0x0008 -#define MV64x60_CPU2MEM_0_SIZE 0x0010 -#define MV64x60_CPU2MEM_1_BASE 0x0208 -#define MV64x60_CPU2MEM_1_SIZE 0x0210 -#define MV64x60_CPU2MEM_2_BASE 0x0018 -#define MV64x60_CPU2MEM_2_SIZE 0x0020 -#define MV64x60_CPU2MEM_3_BASE 0x0218 -#define MV64x60_CPU2MEM_3_SIZE 0x0220 - -#define MV64x60_ENET2MEM_BAR_ENABLE 0x2290 -#define MV64x60_ENET2MEM_0_BASE 0x2200 -#define MV64x60_ENET2MEM_0_SIZE 0x2204 -#define MV64x60_ENET2MEM_1_BASE 0x2208 -#define MV64x60_ENET2MEM_1_SIZE 0x220c -#define MV64x60_ENET2MEM_2_BASE 0x2210 -#define MV64x60_ENET2MEM_2_SIZE 0x2214 -#define MV64x60_ENET2MEM_3_BASE 0x2218 -#define MV64x60_ENET2MEM_3_SIZE 0x221c -#define MV64x60_ENET2MEM_4_BASE 0x2220 -#define MV64x60_ENET2MEM_4_SIZE 0x2224 -#define MV64x60_ENET2MEM_5_BASE 0x2228 -#define MV64x60_ENET2MEM_5_SIZE 0x222c -#define MV64x60_ENET2MEM_ACC_PROT_0 0x2294 -#define MV64x60_ENET2MEM_ACC_PROT_1 0x2298 -#define MV64x60_ENET2MEM_ACC_PROT_2 0x229c - -#define MV64x60_MPSC2MEM_BAR_ENABLE 0xf250 -#define MV64x60_MPSC2MEM_0_BASE 0xf200 -#define MV64x60_MPSC2MEM_0_SIZE 0xf204 -#define MV64x60_MPSC2MEM_1_BASE 0xf208 -#define MV64x60_MPSC2MEM_1_SIZE 0xf20c -#define MV64x60_MPSC2MEM_2_BASE 0xf210 -#define MV64x60_MPSC2MEM_2_SIZE 0xf214 -#define MV64x60_MPSC2MEM_3_BASE 0xf218 -#define MV64x60_MPSC2MEM_3_SIZE 0xf21c -#define MV64x60_MPSC_0_REMAP 0xf240 -#define MV64x60_MPSC_1_REMAP 0xf244 -#define MV64x60_MPSC2MEM_ACC_PROT_0 0xf254 -#define MV64x60_MPSC2MEM_ACC_PROT_1 0xf258 -#define MV64x60_MPSC2REGS_BASE 0xf25c - -#define MV64x60_IDMA2MEM_BAR_ENABLE 0x0a80 -#define MV64x60_IDMA2MEM_0_BASE 0x0a00 -#define MV64x60_IDMA2MEM_0_SIZE 0x0a04 -#define MV64x60_IDMA2MEM_1_BASE 0x0a08 -#define MV64x60_IDMA2MEM_1_SIZE 0x0a0c -#define MV64x60_IDMA2MEM_2_BASE 0x0a10 -#define MV64x60_IDMA2MEM_2_SIZE 0x0a14 -#define MV64x60_IDMA2MEM_3_BASE 0x0a18 -#define MV64x60_IDMA2MEM_3_SIZE 0x0a1c -#define MV64x60_IDMA2MEM_4_BASE 0x0a20 -#define MV64x60_IDMA2MEM_4_SIZE 0x0a24 -#define MV64x60_IDMA2MEM_5_BASE 0x0a28 -#define MV64x60_IDMA2MEM_5_SIZE 0x0a2c -#define MV64x60_IDMA2MEM_6_BASE 0x0a30 -#define MV64x60_IDMA2MEM_6_SIZE 0x0a34 -#define MV64x60_IDMA2MEM_7_BASE 0x0a38 -#define MV64x60_IDMA2MEM_7_SIZE 0x0a3c -#define MV64x60_IDMA2MEM_ACC_PROT_0 0x0a70 -#define MV64x60_IDMA2MEM_ACC_PROT_1 0x0a74 -#define MV64x60_IDMA2MEM_ACC_PROT_2 0x0a78 -#define MV64x60_IDMA2MEM_ACC_PROT_3 0x0a7c - -#define MV64x60_PCI_ACC_CNTL_WINDOWS 6 -#define MV64x60_PCI0_PCI_DECODE_CNTL 0x0d3c -#define MV64x60_PCI1_PCI_DECODE_CNTL 0x0dbc - -#define MV64x60_PCI0_BAR_ENABLE 0x0c3c -#define MV64x60_PCI02MEM_0_SIZE 0x0c08 -#define MV64x60_PCI0_ACC_CNTL_0_BASE_LO 0x1e00 -#define MV64x60_PCI0_ACC_CNTL_0_BASE_HI 0x1e04 -#define MV64x60_PCI0_ACC_CNTL_0_SIZE 0x1e08 -#define MV64x60_PCI0_ACC_CNTL_1_BASE_LO 0x1e10 -#define MV64x60_PCI0_ACC_CNTL_1_BASE_HI 0x1e14 -#define MV64x60_PCI0_ACC_CNTL_1_SIZE 0x1e18 -#define MV64x60_PCI0_ACC_CNTL_2_BASE_LO 0x1e20 -#define MV64x60_PCI0_ACC_CNTL_2_BASE_HI 0x1e24 -#define MV64x60_PCI0_ACC_CNTL_2_SIZE 0x1e28 -#define MV64x60_PCI0_ACC_CNTL_3_BASE_LO 0x1e30 -#define MV64x60_PCI0_ACC_CNTL_3_BASE_HI 0x1e34 -#define MV64x60_PCI0_ACC_CNTL_3_SIZE 0x1e38 -#define MV64x60_PCI0_ACC_CNTL_4_BASE_LO 0x1e40 -#define MV64x60_PCI0_ACC_CNTL_4_BASE_HI 0x1e44 -#define MV64x60_PCI0_ACC_CNTL_4_SIZE 0x1e48 -#define MV64x60_PCI0_ACC_CNTL_5_BASE_LO 0x1e50 -#define MV64x60_PCI0_ACC_CNTL_5_BASE_HI 0x1e54 -#define MV64x60_PCI0_ACC_CNTL_5_SIZE 0x1e58 - -#define MV64x60_PCI1_BAR_ENABLE 0x0cbc -#define MV64x60_PCI12MEM_0_SIZE 0x0c88 -#define MV64x60_PCI1_ACC_CNTL_0_BASE_LO 0x1e80 -#define MV64x60_PCI1_ACC_CNTL_0_BASE_HI 0x1e84 -#define MV64x60_PCI1_ACC_CNTL_0_SIZE 0x1e88 -#define MV64x60_PCI1_ACC_CNTL_1_BASE_LO 0x1e90 -#define MV64x60_PCI1_ACC_CNTL_1_BASE_HI 0x1e94 -#define MV64x60_PCI1_ACC_CNTL_1_SIZE 0x1e98 -#define MV64x60_PCI1_ACC_CNTL_2_BASE_LO 0x1ea0 -#define MV64x60_PCI1_ACC_CNTL_2_BASE_HI 0x1ea4 -#define MV64x60_PCI1_ACC_CNTL_2_SIZE 0x1ea8 -#define MV64x60_PCI1_ACC_CNTL_3_BASE_LO 0x1eb0 -#define MV64x60_PCI1_ACC_CNTL_3_BASE_HI 0x1eb4 -#define MV64x60_PCI1_ACC_CNTL_3_SIZE 0x1eb8 -#define MV64x60_PCI1_ACC_CNTL_4_BASE_LO 0x1ec0 -#define MV64x60_PCI1_ACC_CNTL_4_BASE_HI 0x1ec4 -#define MV64x60_PCI1_ACC_CNTL_4_SIZE 0x1ec8 -#define MV64x60_PCI1_ACC_CNTL_5_BASE_LO 0x1ed0 -#define MV64x60_PCI1_ACC_CNTL_5_BASE_HI 0x1ed4 -#define MV64x60_PCI1_ACC_CNTL_5_SIZE 0x1ed8 - -#define MV64x60_CPU2PCI_SWAP_NONE 0x01000000 - -#define MV64x60_CPU2PCI0_IO_BASE 0x0048 -#define MV64x60_CPU2PCI0_IO_SIZE 0x0050 -#define MV64x60_CPU2PCI0_IO_REMAP 0x00f0 -#define MV64x60_CPU2PCI0_MEM_0_BASE 0x0058 -#define MV64x60_CPU2PCI0_MEM_0_SIZE 0x0060 -#define MV64x60_CPU2PCI0_MEM_0_REMAP_LO 0x00f8 -#define MV64x60_CPU2PCI0_MEM_0_REMAP_HI 0x0320 - -#define MV64x60_CPU2PCI1_IO_BASE 0x0090 -#define MV64x60_CPU2PCI1_IO_SIZE 0x0098 -#define MV64x60_CPU2PCI1_IO_REMAP 0x0108 -#define MV64x60_CPU2PCI1_MEM_0_BASE 0x00a0 -#define MV64x60_CPU2PCI1_MEM_0_SIZE 0x00a8 -#define MV64x60_CPU2PCI1_MEM_0_REMAP_LO 0x0110 -#define MV64x60_CPU2PCI1_MEM_0_REMAP_HI 0x0340 - -struct mv64x60_mem_win { - u32 hi; - u32 lo; - u32 size; -}; - -struct mv64x60_pci_win { - u32 fcn; - u32 hi; - u32 lo; - u32 size; -}; - -/* PCI config access routines */ -struct { - u32 addr; - u32 data; -} static mv64x60_pci_cfgio[2] = { - { /* hose 0 */ - .addr = 0xcf8, - .data = 0xcfc, - }, - { /* hose 1 */ - .addr = 0xc78, - .data = 0xc7c, - } -}; - -u32 mv64x60_cfg_read(u8 *bridge_base, u8 hose, u8 bus, u8 devfn, u8 offset) -{ - out_le32((u32 *)(bridge_base + mv64x60_pci_cfgio[hose].addr), - (1 << 31) | (bus << 16) | (devfn << 8) | offset); - return in_le32((u32 *)(bridge_base + mv64x60_pci_cfgio[hose].data)); -} - -void mv64x60_cfg_write(u8 *bridge_base, u8 hose, u8 bus, u8 devfn, u8 offset, - u32 val) -{ - out_le32((u32 *)(bridge_base + mv64x60_pci_cfgio[hose].addr), - (1 << 31) | (bus << 16) | (devfn << 8) | offset); - out_le32((u32 *)(bridge_base + mv64x60_pci_cfgio[hose].data), val); -} - -/* I/O ctlr -> system memory setup */ -static struct mv64x60_mem_win mv64x60_cpu2mem[MV64x60_CPU2MEM_WINDOWS] = { - { - .lo = MV64x60_CPU2MEM_0_BASE, - .size = MV64x60_CPU2MEM_0_SIZE, - }, - { - .lo = MV64x60_CPU2MEM_1_BASE, - .size = MV64x60_CPU2MEM_1_SIZE, - }, - { - .lo = MV64x60_CPU2MEM_2_BASE, - .size = MV64x60_CPU2MEM_2_SIZE, - }, - { - .lo = MV64x60_CPU2MEM_3_BASE, - .size = MV64x60_CPU2MEM_3_SIZE, - }, -}; - -static struct mv64x60_mem_win mv64x60_enet2mem[MV64x60_CPU2MEM_WINDOWS] = { - { - .lo = MV64x60_ENET2MEM_0_BASE, - .size = MV64x60_ENET2MEM_0_SIZE, - }, - { - .lo = MV64x60_ENET2MEM_1_BASE, - .size = MV64x60_ENET2MEM_1_SIZE, - }, - { - .lo = MV64x60_ENET2MEM_2_BASE, - .size = MV64x60_ENET2MEM_2_SIZE, - }, - { - .lo = MV64x60_ENET2MEM_3_BASE, - .size = MV64x60_ENET2MEM_3_SIZE, - }, -}; - -static struct mv64x60_mem_win mv64x60_mpsc2mem[MV64x60_CPU2MEM_WINDOWS] = { - { - .lo = MV64x60_MPSC2MEM_0_BASE, - .size = MV64x60_MPSC2MEM_0_SIZE, - }, - { - .lo = MV64x60_MPSC2MEM_1_BASE, - .size = MV64x60_MPSC2MEM_1_SIZE, - }, - { - .lo = MV64x60_MPSC2MEM_2_BASE, - .size = MV64x60_MPSC2MEM_2_SIZE, - }, - { - .lo = MV64x60_MPSC2MEM_3_BASE, - .size = MV64x60_MPSC2MEM_3_SIZE, - }, -}; - -static struct mv64x60_mem_win mv64x60_idma2mem[MV64x60_CPU2MEM_WINDOWS] = { - { - .lo = MV64x60_IDMA2MEM_0_BASE, - .size = MV64x60_IDMA2MEM_0_SIZE, - }, - { - .lo = MV64x60_IDMA2MEM_1_BASE, - .size = MV64x60_IDMA2MEM_1_SIZE, - }, - { - .lo = MV64x60_IDMA2MEM_2_BASE, - .size = MV64x60_IDMA2MEM_2_SIZE, - }, - { - .lo = MV64x60_IDMA2MEM_3_BASE, - .size = MV64x60_IDMA2MEM_3_SIZE, - }, -}; - -static u32 mv64x60_dram_selects[MV64x60_CPU2MEM_WINDOWS] = {0xe,0xd,0xb,0x7}; - -/* - * ENET, MPSC, and IDMA ctlrs on the MV64x60 have separate windows that - * must be set up so that the respective ctlr can access system memory. - * Configure them to be same as cpu->memory windows. - */ -void mv64x60_config_ctlr_windows(u8 *bridge_base, u8 *bridge_pbase, - u8 is_coherent) -{ - u32 i, base, size, enables, prot = 0, snoop_bits = 0; - - /* Disable ctlr->mem windows */ - out_le32((u32 *)(bridge_base + MV64x60_ENET2MEM_BAR_ENABLE), 0x3f); - out_le32((u32 *)(bridge_base + MV64x60_MPSC2MEM_BAR_ENABLE), 0xf); - out_le32((u32 *)(bridge_base + MV64x60_ENET2MEM_BAR_ENABLE), 0xff); - - if (is_coherent) - snoop_bits = 0x2 << 12; /* Writeback */ - - enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)) & 0xf; - - for (i=0; i<MV64x60_CPU2MEM_WINDOWS; i++) { - if (enables & (1 << i)) /* Set means disabled */ - continue; - - base = in_le32((u32 *)(bridge_base + mv64x60_cpu2mem[i].lo)) - << 16; - base |= snoop_bits | (mv64x60_dram_selects[i] << 8); - size = in_le32((u32 *)(bridge_base + mv64x60_cpu2mem[i].size)) - << 16; - prot |= (0x3 << (i << 1)); /* RW access */ - - out_le32((u32 *)(bridge_base + mv64x60_enet2mem[i].lo), base); - out_le32((u32 *)(bridge_base + mv64x60_enet2mem[i].size), size); - out_le32((u32 *)(bridge_base + mv64x60_mpsc2mem[i].lo), base); - out_le32((u32 *)(bridge_base + mv64x60_mpsc2mem[i].size), size); - out_le32((u32 *)(bridge_base + mv64x60_idma2mem[i].lo), base); - out_le32((u32 *)(bridge_base + mv64x60_idma2mem[i].size), size); - } - - out_le32((u32 *)(bridge_base + MV64x60_ENET2MEM_ACC_PROT_0), prot); - out_le32((u32 *)(bridge_base + MV64x60_ENET2MEM_ACC_PROT_1), prot); - out_le32((u32 *)(bridge_base + MV64x60_ENET2MEM_ACC_PROT_2), prot); - out_le32((u32 *)(bridge_base + MV64x60_MPSC2MEM_ACC_PROT_0), prot); - out_le32((u32 *)(bridge_base + MV64x60_MPSC2MEM_ACC_PROT_1), prot); - out_le32((u32 *)(bridge_base + MV64x60_IDMA2MEM_ACC_PROT_0), prot); - out_le32((u32 *)(bridge_base + MV64x60_IDMA2MEM_ACC_PROT_1), prot); - out_le32((u32 *)(bridge_base + MV64x60_IDMA2MEM_ACC_PROT_2), prot); - out_le32((u32 *)(bridge_base + MV64x60_IDMA2MEM_ACC_PROT_3), prot); - - /* Set mpsc->bridge's reg window to the bridge's internal registers. */ - out_le32((u32 *)(bridge_base + MV64x60_MPSC2REGS_BASE), - (u32)bridge_pbase); - - out_le32((u32 *)(bridge_base + MV64x60_ENET2MEM_BAR_ENABLE), enables); - out_le32((u32 *)(bridge_base + MV64x60_MPSC2MEM_BAR_ENABLE), enables); - out_le32((u32 *)(bridge_base + MV64x60_IDMA2MEM_BAR_ENABLE), enables); -} - -/* PCI MEM -> system memory, et. al. setup */ -static struct mv64x60_pci_win mv64x60_pci2mem[2] = { - { /* hose 0 */ - .fcn = 0, - .hi = 0x14, - .lo = 0x10, - .size = MV64x60_PCI02MEM_0_SIZE, - }, - { /* hose 1 */ - .fcn = 0, - .hi = 0x94, - .lo = 0x90, - .size = MV64x60_PCI12MEM_0_SIZE, - }, -}; - -static struct -mv64x60_mem_win mv64x60_pci_acc[2][MV64x60_PCI_ACC_CNTL_WINDOWS] = { - { /* hose 0 */ - { - .hi = MV64x60_PCI0_ACC_CNTL_0_BASE_HI, - .lo = MV64x60_PCI0_ACC_CNTL_0_BASE_LO, - .size = MV64x60_PCI0_ACC_CNTL_0_SIZE, - }, - { - .hi = MV64x60_PCI0_ACC_CNTL_1_BASE_HI, - .lo = MV64x60_PCI0_ACC_CNTL_1_BASE_LO, - .size = MV64x60_PCI0_ACC_CNTL_1_SIZE, - }, - { - .hi = MV64x60_PCI0_ACC_CNTL_2_BASE_HI, - .lo = MV64x60_PCI0_ACC_CNTL_2_BASE_LO, - .size = MV64x60_PCI0_ACC_CNTL_2_SIZE, - }, - { - .hi = MV64x60_PCI0_ACC_CNTL_3_BASE_HI, - .lo = MV64x60_PCI0_ACC_CNTL_3_BASE_LO, - .size = MV64x60_PCI0_ACC_CNTL_3_SIZE, - }, - }, - { /* hose 1 */ - { - .hi = MV64x60_PCI1_ACC_CNTL_0_BASE_HI, - .lo = MV64x60_PCI1_ACC_CNTL_0_BASE_LO, - .size = MV64x60_PCI1_ACC_CNTL_0_SIZE, - }, - { - .hi = MV64x60_PCI1_ACC_CNTL_1_BASE_HI, - .lo = MV64x60_PCI1_ACC_CNTL_1_BASE_LO, - .size = MV64x60_PCI1_ACC_CNTL_1_SIZE, - }, - { - .hi = MV64x60_PCI1_ACC_CNTL_2_BASE_HI, - .lo = MV64x60_PCI1_ACC_CNTL_2_BASE_LO, - .size = MV64x60_PCI1_ACC_CNTL_2_SIZE, - }, - { - .hi = MV64x60_PCI1_ACC_CNTL_3_BASE_HI, - .lo = MV64x60_PCI1_ACC_CNTL_3_BASE_LO, - .size = MV64x60_PCI1_ACC_CNTL_3_SIZE, - }, - }, -}; - -static struct mv64x60_mem_win mv64x60_pci2reg[2] = { - { - .hi = 0x24, - .lo = 0x20, - .size = 0, - }, - { - .hi = 0xa4, - .lo = 0xa0, - .size = 0, - }, -}; - -/* Only need to use 1 window (per hose) to get access to all of system memory */ -void mv64x60_config_pci_windows(u8 *bridge_base, u8 *bridge_pbase, u8 hose, - u8 bus, u32 mem_size, u32 acc_bits) -{ - u32 i, offset, bar_enable, enables; - - /* Disable all windows but PCI MEM -> Bridge's regs window */ - enables = ~(1 << 9); - bar_enable = hose ? MV64x60_PCI1_BAR_ENABLE : MV64x60_PCI0_BAR_ENABLE; - out_le32((u32 *)(bridge_base + bar_enable), enables); - - for (i=0; i<MV64x60_PCI_ACC_CNTL_WINDOWS; i++) - out_le32((u32 *)(bridge_base + mv64x60_pci_acc[hose][i].lo), 0); - - /* If mem_size is 0, leave windows disabled */ - if (mem_size == 0) - return; - - /* Cause automatic updates of PCI remap regs */ - offset = hose ? - MV64x60_PCI1_PCI_DECODE_CNTL : MV64x60_PCI0_PCI_DECODE_CNTL; - i = in_le32((u32 *)(bridge_base + offset)); - out_le32((u32 *)(bridge_base + offset), i & ~0x1); - - mem_size = (mem_size - 1) & 0xfffff000; - - /* Map PCI MEM addr 0 -> System Mem addr 0 */ - mv64x60_cfg_write(bridge_base, hose, bus, - PCI_DEVFN(0, mv64x60_pci2mem[hose].fcn), - mv64x60_pci2mem[hose].hi, 0); - mv64x60_cfg_write(bridge_base, hose, bus, - PCI_DEVFN(0, mv64x60_pci2mem[hose].fcn), - mv64x60_pci2mem[hose].lo, 0); - out_le32((u32 *)(bridge_base + mv64x60_pci2mem[hose].size),mem_size); - - acc_bits |= MV64x60_PCI_ACC_CNTL_ENABLE; - out_le32((u32 *)(bridge_base + mv64x60_pci_acc[hose][0].hi), 0); - out_le32((u32 *)(bridge_base + mv64x60_pci_acc[hose][0].lo), acc_bits); - out_le32((u32 *)(bridge_base + mv64x60_pci_acc[hose][0].size),mem_size); - - /* Set PCI MEM->bridge's reg window to where they are in CPU mem map */ - i = (u32)bridge_base; - i &= 0xffff0000; - i |= (0x2 << 1); - mv64x60_cfg_write(bridge_base, hose, bus, PCI_DEVFN(0,0), - mv64x60_pci2reg[hose].hi, 0); - mv64x60_cfg_write(bridge_base, hose, bus, PCI_DEVFN(0,0), - mv64x60_pci2reg[hose].lo, i); - - enables &= ~0x1; /* Enable PCI MEM -> System Mem window 0 */ - out_le32((u32 *)(bridge_base + bar_enable), enables); -} - -/* CPU -> PCI I/O & MEM setup */ -struct mv64x60_cpu2pci_win mv64x60_cpu2pci_io[2] = { - { /* hose 0 */ - .lo = MV64x60_CPU2PCI0_IO_BASE, - .size = MV64x60_CPU2PCI0_IO_SIZE, - .remap_hi = 0, - .remap_lo = MV64x60_CPU2PCI0_IO_REMAP, - }, - { /* hose 1 */ - .lo = MV64x60_CPU2PCI1_IO_BASE, - .size = MV64x60_CPU2PCI1_IO_SIZE, - .remap_hi = 0, - .remap_lo = MV64x60_CPU2PCI1_IO_REMAP, - }, -}; - -struct mv64x60_cpu2pci_win mv64x60_cpu2pci_mem[2] = { - { /* hose 0 */ - .lo = MV64x60_CPU2PCI0_MEM_0_BASE, - .size = MV64x60_CPU2PCI0_MEM_0_SIZE, - .remap_hi = MV64x60_CPU2PCI0_MEM_0_REMAP_HI, - .remap_lo = MV64x60_CPU2PCI0_MEM_0_REMAP_LO, - }, - { /* hose 1 */ - .lo = MV64x60_CPU2PCI1_MEM_0_BASE, - .size = MV64x60_CPU2PCI1_MEM_0_SIZE, - .remap_hi = MV64x60_CPU2PCI1_MEM_0_REMAP_HI, - .remap_lo = MV64x60_CPU2PCI1_MEM_0_REMAP_LO, - }, -}; - -/* Only need to set up 1 window to pci mem space */ -void mv64x60_config_cpu2pci_window(u8 *bridge_base, u8 hose, u32 pci_base_hi, - u32 pci_base_lo, u32 cpu_base, u32 size, - struct mv64x60_cpu2pci_win *offset_tbl) -{ - cpu_base >>= 16; - cpu_base |= MV64x60_CPU2PCI_SWAP_NONE; - out_le32((u32 *)(bridge_base + offset_tbl[hose].lo), cpu_base); - - if (offset_tbl[hose].remap_hi != 0) - out_le32((u32 *)(bridge_base + offset_tbl[hose].remap_hi), - pci_base_hi); - out_le32((u32 *)(bridge_base + offset_tbl[hose].remap_lo), - pci_base_lo >> 16); - - size = (size - 1) >> 16; - out_le32((u32 *)(bridge_base + offset_tbl[hose].size), size); -} - -/* Read mem ctlr to get the amount of mem in system */ -u32 mv64x60_get_mem_size(u8 *bridge_base) -{ - u32 enables, i, v; - u32 mem = 0; - - enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)) & 0xf; - - for (i=0; i<MV64x60_CPU2MEM_WINDOWS; i++) - if (!(enables & (1<<i))) { - v = in_le32((u32*)(bridge_base - + mv64x60_cpu2mem[i].size)); - v = ((v & 0xffff) + 1) << 16; - mem += v; - } - - return mem; -} - -/* Get physical address of bridge's registers */ -u8 *mv64x60_get_bridge_pbase(void) -{ - u32 v[2]; - void *devp; - - devp = find_node_by_compatible(NULL, "marvell,mv64360"); - if (devp == NULL) - goto err_out; - if (getprop(devp, "reg", v, sizeof(v)) != sizeof(v)) - goto err_out; - - return (u8 *)v[0]; - -err_out: - return 0; -} - -/* Get virtual address of bridge's registers */ -u8 *mv64x60_get_bridge_base(void) -{ - u32 v; - void *devp; - - devp = find_node_by_compatible(NULL, "marvell,mv64360"); - if (devp == NULL) - goto err_out; - if (getprop(devp, "virtual-reg", &v, sizeof(v)) != sizeof(v)) - goto err_out; - - return (u8 *)v; - -err_out: - return 0; -} - -u8 mv64x60_is_coherent(void) -{ - u32 v; - void *devp; - - devp = finddevice("/"); - if (devp == NULL) - return 1; /* Assume coherency on */ - - if (getprop(devp, "coherency-off", &v, sizeof(v)) < 0) - return 1; /* Coherency on */ - else - return 0; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/mv64x60.h b/ANDROID_3.4.5/arch/powerpc/boot/mv64x60.h deleted file mode 100644 index b827105e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/mv64x60.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Author: Mark A. Greer <source@mvista.com> - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef _PPC_BOOT_MV64x60_H_ -#define _PPC_BOOT_MV64x60_H_ - -#define MV64x60_CPU_BAR_ENABLE 0x0278 - -#define MV64x60_PCI_ACC_CNTL_ENABLE (1<<0) -#define MV64x60_PCI_ACC_CNTL_REQ64 (1<<1) -#define MV64x60_PCI_ACC_CNTL_SNOOP_NONE 0x00000000 -#define MV64x60_PCI_ACC_CNTL_SNOOP_WT 0x00000004 -#define MV64x60_PCI_ACC_CNTL_SNOOP_WB 0x00000008 -#define MV64x60_PCI_ACC_CNTL_SNOOP_MASK 0x0000000c -#define MV64x60_PCI_ACC_CNTL_ACCPROT (1<<4) -#define MV64x60_PCI_ACC_CNTL_WRPROT (1<<5) -#define MV64x60_PCI_ACC_CNTL_SWAP_BYTE 0x00000000 -#define MV64x60_PCI_ACC_CNTL_SWAP_NONE 0x00000040 -#define MV64x60_PCI_ACC_CNTL_SWAP_BYTE_WORD 0x00000080 -#define MV64x60_PCI_ACC_CNTL_SWAP_WORD 0x000000c0 -#define MV64x60_PCI_ACC_CNTL_SWAP_MASK 0x000000c0 -#define MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES 0x00000000 -#define MV64x60_PCI_ACC_CNTL_MBURST_64_BYTES 0x00000100 -#define MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES 0x00000200 -#define MV64x60_PCI_ACC_CNTL_MBURST_MASK 0x00000300 -#define MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES 0x00000000 -#define MV64x60_PCI_ACC_CNTL_RDSIZE_64_BYTES 0x00000400 -#define MV64x60_PCI_ACC_CNTL_RDSIZE_128_BYTES 0x00000800 -#define MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES 0x00000c00 -#define MV64x60_PCI_ACC_CNTL_RDSIZE_MASK 0x00000c00 - -struct mv64x60_cpu2pci_win { - u32 lo; - u32 size; - u32 remap_hi; - u32 remap_lo; -}; - -extern struct mv64x60_cpu2pci_win mv64x60_cpu2pci_io[2]; -extern struct mv64x60_cpu2pci_win mv64x60_cpu2pci_mem[2]; - -u32 mv64x60_cfg_read(u8 *bridge_base, u8 hose, u8 bus, u8 devfn, - u8 offset); -void mv64x60_cfg_write(u8 *bridge_base, u8 hose, u8 bus, u8 devfn, - u8 offset, u32 val); - -void mv64x60_config_ctlr_windows(u8 *bridge_base, u8 *bridge_pbase, - u8 is_coherent); -void mv64x60_config_pci_windows(u8 *bridge_base, u8 *bridge_pbase, u8 hose, - u8 bus, u32 mem_size, u32 acc_bits); -void mv64x60_config_cpu2pci_window(u8 *bridge_base, u8 hose, u32 pci_base_hi, - u32 pci_base_lo, u32 cpu_base, u32 size, - struct mv64x60_cpu2pci_win *offset_tbl); -u32 mv64x60_get_mem_size(u8 *bridge_base); -u8 *mv64x60_get_bridge_pbase(void); -u8 *mv64x60_get_bridge_base(void); -u8 mv64x60_is_coherent(void); - -int mv64x60_i2c_open(void); -int mv64x60_i2c_read(u32 devaddr, u8 *buf, u32 offset, u32 offset_size, - u32 count); -void mv64x60_i2c_close(void); - -#endif /* _PPC_BOOT_MV64x60_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/mv64x60_i2c.c b/ANDROID_3.4.5/arch/powerpc/boot/mv64x60_i2c.c deleted file mode 100644 index 52a3212b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/mv64x60_i2c.c +++ /dev/null @@ -1,204 +0,0 @@ -/* - * Bootloader version of the i2c driver for the MV64x60. - * - * Author: Dale Farnsworth <dfarnsworth@mvista.com> - * Maintained by: Mark A. Greer <mgreer@mvista.com> - * - * 2003, 2007 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program is - * licensed "as is" without any warranty of any kind, whether express or - * implied. - */ - -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "page.h" -#include "string.h" -#include "stdio.h" -#include "io.h" -#include "ops.h" -#include "mv64x60.h" - -/* Register defines */ -#define MV64x60_I2C_REG_SLAVE_ADDR 0x00 -#define MV64x60_I2C_REG_DATA 0x04 -#define MV64x60_I2C_REG_CONTROL 0x08 -#define MV64x60_I2C_REG_STATUS 0x0c -#define MV64x60_I2C_REG_BAUD 0x0c -#define MV64x60_I2C_REG_EXT_SLAVE_ADDR 0x10 -#define MV64x60_I2C_REG_SOFT_RESET 0x1c - -#define MV64x60_I2C_CONTROL_ACK 0x04 -#define MV64x60_I2C_CONTROL_IFLG 0x08 -#define MV64x60_I2C_CONTROL_STOP 0x10 -#define MV64x60_I2C_CONTROL_START 0x20 -#define MV64x60_I2C_CONTROL_TWSIEN 0x40 -#define MV64x60_I2C_CONTROL_INTEN 0x80 - -#define MV64x60_I2C_STATUS_BUS_ERR 0x00 -#define MV64x60_I2C_STATUS_MAST_START 0x08 -#define MV64x60_I2C_STATUS_MAST_REPEAT_START 0x10 -#define MV64x60_I2C_STATUS_MAST_WR_ADDR_ACK 0x18 -#define MV64x60_I2C_STATUS_MAST_WR_ADDR_NO_ACK 0x20 -#define MV64x60_I2C_STATUS_MAST_WR_ACK 0x28 -#define MV64x60_I2C_STATUS_MAST_WR_NO_ACK 0x30 -#define MV64x60_I2C_STATUS_MAST_LOST_ARB 0x38 -#define MV64x60_I2C_STATUS_MAST_RD_ADDR_ACK 0x40 -#define MV64x60_I2C_STATUS_MAST_RD_ADDR_NO_ACK 0x48 -#define MV64x60_I2C_STATUS_MAST_RD_DATA_ACK 0x50 -#define MV64x60_I2C_STATUS_MAST_RD_DATA_NO_ACK 0x58 -#define MV64x60_I2C_STATUS_MAST_WR_ADDR_2_ACK 0xd0 -#define MV64x60_I2C_STATUS_MAST_WR_ADDR_2_NO_ACK 0xd8 -#define MV64x60_I2C_STATUS_MAST_RD_ADDR_2_ACK 0xe0 -#define MV64x60_I2C_STATUS_MAST_RD_ADDR_2_NO_ACK 0xe8 -#define MV64x60_I2C_STATUS_NO_STATUS 0xf8 - -static u8 *ctlr_base; - -static int mv64x60_i2c_wait_for_status(int wanted) -{ - int i; - int status; - - for (i=0; i<1000; i++) { - udelay(10); - status = in_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_STATUS)) - & 0xff; - if (status == wanted) - return status; - } - return -status; -} - -static int mv64x60_i2c_control(int control, int status) -{ - out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_CONTROL), control & 0xff); - return mv64x60_i2c_wait_for_status(status); -} - -static int mv64x60_i2c_read_byte(int control, int status) -{ - out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_CONTROL), control & 0xff); - if (mv64x60_i2c_wait_for_status(status) < 0) - return -1; - return in_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_DATA)) & 0xff; -} - -static int mv64x60_i2c_write_byte(int data, int control, int status) -{ - out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_DATA), data & 0xff); - out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_CONTROL), control & 0xff); - return mv64x60_i2c_wait_for_status(status); -} - -int mv64x60_i2c_read(u32 devaddr, u8 *buf, u32 offset, u32 offset_size, - u32 count) -{ - int i; - int data; - int control; - int status; - - if (ctlr_base == NULL) - return -1; - - /* send reset */ - out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_SOFT_RESET), 0); - out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_SLAVE_ADDR), 0); - out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_EXT_SLAVE_ADDR), 0); - out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_BAUD), (4 << 3) | 0x4); - - if (mv64x60_i2c_control(MV64x60_I2C_CONTROL_TWSIEN, - MV64x60_I2C_STATUS_NO_STATUS) < 0) - return -1; - - /* send start */ - control = MV64x60_I2C_CONTROL_START | MV64x60_I2C_CONTROL_TWSIEN; - status = MV64x60_I2C_STATUS_MAST_START; - if (mv64x60_i2c_control(control, status) < 0) - return -1; - - /* select device for writing */ - data = devaddr & ~0x1; - control = MV64x60_I2C_CONTROL_TWSIEN; - status = MV64x60_I2C_STATUS_MAST_WR_ADDR_ACK; - if (mv64x60_i2c_write_byte(data, control, status) < 0) - return -1; - - /* send offset of data */ - control = MV64x60_I2C_CONTROL_TWSIEN; - status = MV64x60_I2C_STATUS_MAST_WR_ACK; - if (offset_size > 1) { - if (mv64x60_i2c_write_byte(offset >> 8, control, status) < 0) - return -1; - } - if (mv64x60_i2c_write_byte(offset, control, status) < 0) - return -1; - - /* resend start */ - control = MV64x60_I2C_CONTROL_START | MV64x60_I2C_CONTROL_TWSIEN; - status = MV64x60_I2C_STATUS_MAST_REPEAT_START; - if (mv64x60_i2c_control(control, status) < 0) - return -1; - - /* select device for reading */ - data = devaddr | 0x1; - control = MV64x60_I2C_CONTROL_TWSIEN; - status = MV64x60_I2C_STATUS_MAST_RD_ADDR_ACK; - if (mv64x60_i2c_write_byte(data, control, status) < 0) - return -1; - - /* read all but last byte of data */ - control = MV64x60_I2C_CONTROL_ACK | MV64x60_I2C_CONTROL_TWSIEN; - status = MV64x60_I2C_STATUS_MAST_RD_DATA_ACK; - - for (i=1; i<count; i++) { - data = mv64x60_i2c_read_byte(control, status); - if (data < 0) { - printf("errors on iteration %d\n", i); - return -1; - } - *buf++ = data; - } - - /* read last byte of data */ - control = MV64x60_I2C_CONTROL_TWSIEN; - status = MV64x60_I2C_STATUS_MAST_RD_DATA_NO_ACK; - data = mv64x60_i2c_read_byte(control, status); - if (data < 0) - return -1; - *buf++ = data; - - /* send stop */ - control = MV64x60_I2C_CONTROL_STOP | MV64x60_I2C_CONTROL_TWSIEN; - status = MV64x60_I2C_STATUS_NO_STATUS; - if (mv64x60_i2c_control(control, status) < 0) - return -1; - - return count; -} - -int mv64x60_i2c_open(void) -{ - u32 v; - void *devp; - - devp = find_node_by_compatible(NULL, "marvell,mv64360-i2c"); - if (devp == NULL) - goto err_out; - if (getprop(devp, "virtual-reg", &v, sizeof(v)) != sizeof(v)) - goto err_out; - - ctlr_base = (u8 *)v; - return 0; - -err_out: - return -1; -} - -void mv64x60_i2c_close(void) -{ - ctlr_base = NULL; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ns16550.c b/ANDROID_3.4.5/arch/powerpc/boot/ns16550.c deleted file mode 100644 index 8c9ead94..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ns16550.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * 16550 serial console support. - * - * Original copied from <file:arch/ppc/boot/common/ns16550.c> - * (which had no copyright) - * Modifications: 2006 (c) MontaVista Software, Inc. - * - * Modified by: Mark A. Greer <mgreer@mvista.com> - */ -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "string.h" -#include "stdio.h" -#include "io.h" -#include "ops.h" - -#define UART_DLL 0 /* Out: Divisor Latch Low */ -#define UART_DLM 1 /* Out: Divisor Latch High */ -#define UART_FCR 2 /* Out: FIFO Control Register */ -#define UART_LCR 3 /* Out: Line Control Register */ -#define UART_MCR 4 /* Out: Modem Control Register */ -#define UART_LSR 5 /* In: Line Status Register */ -#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ -#define UART_LSR_DR 0x01 /* Receiver data ready */ -#define UART_MSR 6 /* In: Modem Status Register */ -#define UART_SCR 7 /* I/O: Scratch Register */ - -static unsigned char *reg_base; -static u32 reg_shift; - -static int ns16550_open(void) -{ - out_8(reg_base + (UART_FCR << reg_shift), 0x06); - return 0; -} - -static void ns16550_putc(unsigned char c) -{ - while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_THRE) == 0); - out_8(reg_base, c); -} - -static unsigned char ns16550_getc(void) -{ - while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) == 0); - return in_8(reg_base); -} - -static u8 ns16550_tstc(void) -{ - return ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) != 0); -} - -int ns16550_console_init(void *devp, struct serial_console_data *scdp) -{ - int n; - u32 reg_offset; - - if (dt_get_virtual_reg(devp, (void **)®_base, 1) < 1) - return -1; - - n = getprop(devp, "reg-offset", ®_offset, sizeof(reg_offset)); - if (n == sizeof(reg_offset)) - reg_base += reg_offset; - - n = getprop(devp, "reg-shift", ®_shift, sizeof(reg_shift)); - if (n != sizeof(reg_shift)) - reg_shift = 0; - - scdp->open = ns16550_open; - scdp->putc = ns16550_putc; - scdp->getc = ns16550_getc; - scdp->tstc = ns16550_tstc; - scdp->close = NULL; - - return 0; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/of.c b/ANDROID_3.4.5/arch/powerpc/boot/of.c deleted file mode 100644 index 61d9899a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/of.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "string.h" -#include "stdio.h" -#include "page.h" -#include "ops.h" - -#include "of.h" - -/* Value picked to match that used by yaboot */ -#define PROG_START 0x01400000 /* only used on 64-bit systems */ -#define RAM_END (512<<20) /* Fixme: use OF */ -#define ONE_MB 0x100000 - - - -static unsigned long claim_base; - -static void *of_try_claim(unsigned long size) -{ - unsigned long addr = 0; - - if (claim_base == 0) - claim_base = _ALIGN_UP((unsigned long)_end, ONE_MB); - - for(; claim_base < RAM_END; claim_base += ONE_MB) { -#ifdef DEBUG - printf(" trying: 0x%08lx\n\r", claim_base); -#endif - addr = (unsigned long)of_claim(claim_base, size, 0); - if ((void *)addr != (void *)-1) - break; - } - if (addr == 0) - return NULL; - claim_base = PAGE_ALIGN(claim_base + size); - return (void *)addr; -} - -static void of_image_hdr(const void *hdr) -{ - const Elf64_Ehdr *elf64 = hdr; - - if (elf64->e_ident[EI_CLASS] == ELFCLASS64) { - /* - * Maintain a "magic" minimum address. This keeps some older - * firmware platforms running. - */ - if (claim_base < PROG_START) - claim_base = PROG_START; - } -} - -void platform_init(unsigned long a1, unsigned long a2, void *promptr) -{ - platform_ops.image_hdr = of_image_hdr; - platform_ops.malloc = of_try_claim; - platform_ops.exit = of_exit; - platform_ops.vmlinux_alloc = of_vmlinux_alloc; - - dt_ops.finddevice = of_finddevice; - dt_ops.getprop = of_getprop; - dt_ops.setprop = of_setprop; - - of_console_init(); - - of_init(promptr); - loader_info.promptr = promptr; - if (a1 && a2 && a2 != 0xdeadbeef) { - loader_info.initrd_addr = a1; - loader_info.initrd_size = a2; - } -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/of.h b/ANDROID_3.4.5/arch/powerpc/boot/of.h deleted file mode 100644 index e4c68f73..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/of.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef _PPC_BOOT_OF_H_ -#define _PPC_BOOT_OF_H_ - -typedef void *phandle; -typedef void *ihandle; - -void of_init(void *promptr); -int of_call_prom(const char *service, int nargs, int nret, ...); -void *of_claim(unsigned long virt, unsigned long size, unsigned long align); -void *of_vmlinux_alloc(unsigned long size); -void of_exit(void); -void *of_finddevice(const char *name); -int of_getprop(const void *phandle, const char *name, void *buf, - const int buflen); -int of_setprop(const void *phandle, const char *name, const void *buf, - const int buflen); - -/* Console functions */ -void of_console_init(void); - -#endif /* _PPC_BOOT_OF_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ofconsole.c b/ANDROID_3.4.5/arch/powerpc/boot/ofconsole.c deleted file mode 100644 index ce0e0242..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ofconsole.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * OF console routines - * - * Copyright (C) Paul Mackerras 1997. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "string.h" -#include "stdio.h" -#include "page.h" -#include "ops.h" - -#include "of.h" - -static void *of_stdout_handle; - -static int of_console_open(void) -{ - void *devp; - - if (((devp = of_finddevice("/chosen")) != NULL) - && (of_getprop(devp, "stdout", &of_stdout_handle, - sizeof(of_stdout_handle)) - == sizeof(of_stdout_handle))) - return 0; - - return -1; -} - -static void of_console_write(const char *buf, int len) -{ - of_call_prom("write", 3, 1, of_stdout_handle, buf, len); -} - -void of_console_init(void) -{ - console_ops.open = of_console_open; - console_ops.write = of_console_write; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/oflib.c b/ANDROID_3.4.5/arch/powerpc/boot/oflib.c deleted file mode 100644 index b0ec9cf3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/oflib.c +++ /dev/null @@ -1,213 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "string.h" -#include "stdio.h" -#include "page.h" -#include "ops.h" - -#include "of.h" - -static int (*prom) (void *); - -void of_init(void *promptr) -{ - prom = (int (*)(void *))promptr; -} - -int of_call_prom(const char *service, int nargs, int nret, ...) -{ - int i; - struct prom_args { - const char *service; - int nargs; - int nret; - unsigned int args[12]; - } args; - va_list list; - - args.service = service; - args.nargs = nargs; - args.nret = nret; - - va_start(list, nret); - for (i = 0; i < nargs; i++) - args.args[i] = va_arg(list, unsigned int); - va_end(list); - - for (i = 0; i < nret; i++) - args.args[nargs+i] = 0; - - if (prom(&args) < 0) - return -1; - - return (nret > 0)? args.args[nargs]: 0; -} - -static int of_call_prom_ret(const char *service, int nargs, int nret, - unsigned int *rets, ...) -{ - int i; - struct prom_args { - const char *service; - int nargs; - int nret; - unsigned int args[12]; - } args; - va_list list; - - args.service = service; - args.nargs = nargs; - args.nret = nret; - - va_start(list, rets); - for (i = 0; i < nargs; i++) - args.args[i] = va_arg(list, unsigned int); - va_end(list); - - for (i = 0; i < nret; i++) - args.args[nargs+i] = 0; - - if (prom(&args) < 0) - return -1; - - if (rets != (void *) 0) - for (i = 1; i < nret; ++i) - rets[i-1] = args.args[nargs+i]; - - return (nret > 0)? args.args[nargs]: 0; -} - -/* returns true if s2 is a prefix of s1 */ -static int string_match(const char *s1, const char *s2) -{ - for (; *s2; ++s2) - if (*s1++ != *s2) - return 0; - return 1; -} - -/* - * Older OF's require that when claiming a specific range of addresses, - * we claim the physical space in the /memory node and the virtual - * space in the chosen mmu node, and then do a map operation to - * map virtual to physical. - */ -static int need_map = -1; -static ihandle chosen_mmu; -static phandle memory; - -static int check_of_version(void) -{ - phandle oprom, chosen; - char version[64]; - - oprom = of_finddevice("/openprom"); - if (oprom == (phandle) -1) - return 0; - if (of_getprop(oprom, "model", version, sizeof(version)) <= 0) - return 0; - version[sizeof(version)-1] = 0; - printf("OF version = '%s'\r\n", version); - if (!string_match(version, "Open Firmware, 1.") - && !string_match(version, "FirmWorks,3.")) - return 0; - chosen = of_finddevice("/chosen"); - if (chosen == (phandle) -1) { - chosen = of_finddevice("/chosen@0"); - if (chosen == (phandle) -1) { - printf("no chosen\n"); - return 0; - } - } - if (of_getprop(chosen, "mmu", &chosen_mmu, sizeof(chosen_mmu)) <= 0) { - printf("no mmu\n"); - return 0; - } - memory = (ihandle) of_call_prom("open", 1, 1, "/memory"); - if (memory == (ihandle) -1) { - memory = (ihandle) of_call_prom("open", 1, 1, "/memory@0"); - if (memory == (ihandle) -1) { - printf("no memory node\n"); - return 0; - } - } - printf("old OF detected\r\n"); - return 1; -} - -void *of_claim(unsigned long virt, unsigned long size, unsigned long align) -{ - int ret; - unsigned int result; - - if (need_map < 0) - need_map = check_of_version(); - if (align || !need_map) - return (void *) of_call_prom("claim", 3, 1, virt, size, align); - - ret = of_call_prom_ret("call-method", 5, 2, &result, "claim", memory, - align, size, virt); - if (ret != 0 || result == -1) - return (void *) -1; - ret = of_call_prom_ret("call-method", 5, 2, &result, "claim", chosen_mmu, - align, size, virt); - /* 0x12 == coherent + read/write */ - ret = of_call_prom("call-method", 6, 1, "map", chosen_mmu, - 0x12, size, virt, virt); - return (void *) virt; -} - -void *of_vmlinux_alloc(unsigned long size) -{ - unsigned long start = (unsigned long)_start, end = (unsigned long)_end; - void *addr; - void *p; - - /* With some older POWER4 firmware we need to claim the area the kernel - * will reside in. Newer firmwares don't need this so we just ignore - * the return value. - */ - addr = of_claim(start, end - start, 0); - printf("Trying to claim from 0x%lx to 0x%lx (0x%lx) got %p\r\n", - start, end, end - start, addr); - - p = malloc(size); - if (!p) - fatal("Can't allocate memory for kernel image!\n\r"); - - return p; -} - -void of_exit(void) -{ - of_call_prom("exit", 0, 0); -} - -/* - * OF device tree routines - */ -void *of_finddevice(const char *name) -{ - return (phandle) of_call_prom("finddevice", 1, 1, name); -} - -int of_getprop(const void *phandle, const char *name, void *buf, - const int buflen) -{ - return of_call_prom("getprop", 4, 1, phandle, name, buf, buflen); -} - -int of_setprop(const void *phandle, const char *name, const void *buf, - const int buflen) -{ - return of_call_prom("setprop", 4, 1, phandle, name, buf, buflen); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ops.h b/ANDROID_3.4.5/arch/powerpc/boot/ops.h deleted file mode 100644 index b3218ce4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ops.h +++ /dev/null @@ -1,262 +0,0 @@ -/* - * Global definition of all the bootwrapper operations. - * - * Author: Mark A. Greer <mgreer@mvista.com> - * - * 2006 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef _PPC_BOOT_OPS_H_ -#define _PPC_BOOT_OPS_H_ - -#include <stddef.h> -#include "types.h" -#include "string.h" - -#define COMMAND_LINE_SIZE 512 -#define MAX_PATH_LEN 256 -#define MAX_PROP_LEN 256 /* What should this be? */ - -typedef void (*kernel_entry_t)(unsigned long r3, unsigned long r4, void *r5); - -/* Platform specific operations */ -struct platform_ops { - void (*fixups)(void); - void (*image_hdr)(const void *); - void * (*malloc)(unsigned long size); - void (*free)(void *ptr); - void * (*realloc)(void *ptr, unsigned long size); - void (*exit)(void); - void * (*vmlinux_alloc)(unsigned long size); -}; -extern struct platform_ops platform_ops; - -/* Device Tree operations */ -struct dt_ops { - void * (*finddevice)(const char *name); - int (*getprop)(const void *phandle, const char *name, void *buf, - const int buflen); - int (*setprop)(const void *phandle, const char *name, - const void *buf, const int buflen); - int (*del_node)(const void *phandle); - void *(*get_parent)(const void *phandle); - /* The node must not already exist. */ - void *(*create_node)(const void *parent, const char *name); - void *(*find_node_by_prop_value)(const void *prev, - const char *propname, - const char *propval, int proplen); - void *(*find_node_by_compatible)(const void *prev, - const char *compat); - unsigned long (*finalize)(void); - char *(*get_path)(const void *phandle, char *buf, int len); -}; -extern struct dt_ops dt_ops; - -/* Console operations */ -struct console_ops { - int (*open)(void); - void (*write)(const char *buf, int len); - void (*edit_cmdline)(char *buf, int len); - void (*close)(void); - void *data; -}; -extern struct console_ops console_ops; - -/* Serial console operations */ -struct serial_console_data { - int (*open)(void); - void (*putc)(unsigned char c); - unsigned char (*getc)(void); - u8 (*tstc)(void); - void (*close)(void); -}; - -struct loader_info { - void *promptr; - unsigned long initrd_addr, initrd_size; - char *cmdline; - int cmdline_len; -}; -extern struct loader_info loader_info; - -void start(void); -void fdt_init(void *blob); -int serial_console_init(void); -int ns16550_console_init(void *devp, struct serial_console_data *scdp); -int mpsc_console_init(void *devp, struct serial_console_data *scdp); -int cpm_console_init(void *devp, struct serial_console_data *scdp); -int mpc5200_psc_console_init(void *devp, struct serial_console_data *scdp); -int uartlite_console_init(void *devp, struct serial_console_data *scdp); -void *simple_alloc_init(char *base, unsigned long heap_size, - unsigned long granularity, unsigned long max_allocs); -extern void flush_cache(void *, unsigned long); -int dt_xlate_reg(void *node, int res, unsigned long *addr, unsigned long *size); -int dt_xlate_addr(void *node, u32 *buf, int buflen, unsigned long *xlated_addr); -int dt_is_compatible(void *node, const char *compat); -void dt_get_reg_format(void *node, u32 *naddr, u32 *nsize); -int dt_get_virtual_reg(void *node, void **addr, int nres); - -static inline void *finddevice(const char *name) -{ - return (dt_ops.finddevice) ? dt_ops.finddevice(name) : NULL; -} - -static inline int getprop(void *devp, const char *name, void *buf, int buflen) -{ - return (dt_ops.getprop) ? dt_ops.getprop(devp, name, buf, buflen) : -1; -} - -static inline int setprop(void *devp, const char *name, - const void *buf, int buflen) -{ - return (dt_ops.setprop) ? dt_ops.setprop(devp, name, buf, buflen) : -1; -} -#define setprop_val(devp, name, val) \ - do { \ - typeof(val) x = (val); \ - setprop((devp), (name), &x, sizeof(x)); \ - } while (0) - -static inline int setprop_str(void *devp, const char *name, const char *buf) -{ - if (dt_ops.setprop) - return dt_ops.setprop(devp, name, buf, strlen(buf) + 1); - - return -1; -} - -static inline int del_node(const void *devp) -{ - return dt_ops.del_node ? dt_ops.del_node(devp) : -1; -} - -static inline void *get_parent(const char *devp) -{ - return dt_ops.get_parent ? dt_ops.get_parent(devp) : NULL; -} - -static inline void *create_node(const void *parent, const char *name) -{ - return dt_ops.create_node ? dt_ops.create_node(parent, name) : NULL; -} - - -static inline void *find_node_by_prop_value(const void *prev, - const char *propname, - const char *propval, int proplen) -{ - if (dt_ops.find_node_by_prop_value) - return dt_ops.find_node_by_prop_value(prev, propname, - propval, proplen); - - return NULL; -} - -static inline void *find_node_by_prop_value_str(const void *prev, - const char *propname, - const char *propval) -{ - return find_node_by_prop_value(prev, propname, propval, - strlen(propval) + 1); -} - -static inline void *find_node_by_devtype(const void *prev, - const char *type) -{ - return find_node_by_prop_value_str(prev, "device_type", type); -} - -static inline void *find_node_by_alias(const char *alias) -{ - void *devp = finddevice("/aliases"); - - if (devp) { - char path[MAX_PATH_LEN]; - if (getprop(devp, alias, path, MAX_PATH_LEN) > 0) - return finddevice(path); - } - - return NULL; -} - -static inline void *find_node_by_compatible(const void *prev, - const char *compat) -{ - if (dt_ops.find_node_by_compatible) - return dt_ops.find_node_by_compatible(prev, compat); - - return NULL; -} - -void dt_fixup_memory(u64 start, u64 size); -void dt_fixup_cpu_clocks(u32 cpufreq, u32 tbfreq, u32 busfreq); -void dt_fixup_clock(const char *path, u32 freq); -void dt_fixup_mac_address_by_alias(const char *alias, const u8 *addr); -void dt_fixup_mac_address(u32 index, const u8 *addr); -void __dt_fixup_mac_addresses(u32 startindex, ...); -#define dt_fixup_mac_addresses(...) \ - __dt_fixup_mac_addresses(0, __VA_ARGS__, NULL) - - -static inline void *find_node_by_linuxphandle(const u32 linuxphandle) -{ - return find_node_by_prop_value(NULL, "linux,phandle", - (char *)&linuxphandle, sizeof(u32)); -} - -static inline char *get_path(const void *phandle, char *buf, int len) -{ - if (dt_ops.get_path) - return dt_ops.get_path(phandle, buf, len); - - return NULL; -} - -static inline void *malloc(unsigned long size) -{ - return (platform_ops.malloc) ? platform_ops.malloc(size) : NULL; -} - -static inline void free(void *ptr) -{ - if (platform_ops.free) - platform_ops.free(ptr); -} - -static inline void exit(void) -{ - if (platform_ops.exit) - platform_ops.exit(); - for(;;); -} -#define fatal(args...) { printf(args); exit(); } - - -#define BSS_STACK(size) \ - static char _bss_stack[size]; \ - void *_platform_stack_top = _bss_stack + sizeof(_bss_stack); - -extern unsigned long timebase_period_ns; -void udelay(long delay); - -extern char _start[]; -extern char __bss_start[]; -extern char _end[]; -extern char _vmlinux_start[]; -extern char _vmlinux_end[]; -extern char _initrd_start[]; -extern char _initrd_end[]; -extern char _dtb_start[]; -extern char _dtb_end[]; - -static inline __attribute__((const)) -int __ilog2_u32(u32 n) -{ - int bit; - asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n)); - return 31 - bit; -} - -#endif /* _PPC_BOOT_OPS_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/page.h b/ANDROID_3.4.5/arch/powerpc/boot/page.h deleted file mode 100644 index 14eca30f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/page.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef _PPC_BOOT_PAGE_H -#define _PPC_BOOT_PAGE_H -/* - * Copyright (C) 2001 PPC64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifdef __ASSEMBLY__ -#define ASM_CONST(x) x -#else -#define __ASM_CONST(x) x##UL -#define ASM_CONST(x) __ASM_CONST(x) -#endif - -/* PAGE_SHIFT determines the page size */ -#define PAGE_SHIFT 12 -#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT) -#define PAGE_MASK (~(PAGE_SIZE-1)) - -/* align addr on a size boundary - adjust address up/down if needed */ -#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1))) -#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1))) - -/* align addr on a size boundary - adjust address up if needed */ -#define _ALIGN(addr,size) _ALIGN_UP(addr,size) - -/* to align the pointer to the (next) page boundary */ -#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE) - -#endif /* _PPC_BOOT_PAGE_H */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/planetcore.c b/ANDROID_3.4.5/arch/powerpc/boot/planetcore.c deleted file mode 100644 index 0d8558a4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/planetcore.c +++ /dev/null @@ -1,166 +0,0 @@ -/* - * PlanetCore configuration data support functions - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "stdio.h" -#include "stdlib.h" -#include "ops.h" -#include "planetcore.h" -#include "io.h" - -/* PlanetCore passes information to the OS in the form of - * a table of key=value strings, separated by newlines. - * - * The list is terminated by an empty string (i.e. two - * consecutive newlines). - * - * To make it easier to parse, we first convert all the - * newlines into null bytes. - */ - -void planetcore_prepare_table(char *table) -{ - do { - if (*table == '\n') - *table = 0; - - table++; - } while (*(table - 1) || *table != '\n'); - - *table = 0; -} - -const char *planetcore_get_key(const char *table, const char *key) -{ - int keylen = strlen(key); - - do { - if (!strncmp(table, key, keylen) && table[keylen] == '=') - return table + keylen + 1; - - table += strlen(table) + 1; - } while (strlen(table) != 0); - - return NULL; -} - -int planetcore_get_decimal(const char *table, const char *key, u64 *val) -{ - const char *str = planetcore_get_key(table, key); - if (!str) - return 0; - - *val = strtoull(str, NULL, 10); - return 1; -} - -int planetcore_get_hex(const char *table, const char *key, u64 *val) -{ - const char *str = planetcore_get_key(table, key); - if (!str) - return 0; - - *val = strtoull(str, NULL, 16); - return 1; -} - -static u64 mac_table[4] = { - 0x000000000000, - 0x000000800000, - 0x000000400000, - 0x000000c00000, -}; - -void planetcore_set_mac_addrs(const char *table) -{ - u8 addr[4][6]; - u64 int_addr; - u32 i; - int j; - - if (!planetcore_get_hex(table, PLANETCORE_KEY_MAC_ADDR, &int_addr)) - return; - - for (i = 0; i < 4; i++) { - u64 this_dev_addr = (int_addr & ~0x000000c00000) | - mac_table[i]; - - for (j = 5; j >= 0; j--) { - addr[i][j] = this_dev_addr & 0xff; - this_dev_addr >>= 8; - } - - dt_fixup_mac_address(i, addr[i]); - } -} - -static char prop_buf[MAX_PROP_LEN]; - -void planetcore_set_stdout_path(const char *table) -{ - char *path; - const char *label; - void *node, *chosen; - - label = planetcore_get_key(table, PLANETCORE_KEY_SERIAL_PORT); - if (!label) - return; - - node = find_node_by_prop_value_str(NULL, "linux,planetcore-label", - label); - if (!node) - return; - - path = get_path(node, prop_buf, MAX_PROP_LEN); - if (!path) - return; - - chosen = finddevice("/chosen"); - if (!chosen) - chosen = create_node(NULL, "chosen"); - if (!chosen) - return; - - setprop_str(chosen, "linux,stdout-path", path); -} - -void planetcore_set_serial_speed(const char *table) -{ - void *chosen, *stdout; - u64 baud; - u32 baud32; - int len; - - chosen = finddevice("/chosen"); - if (!chosen) - return; - - len = getprop(chosen, "linux,stdout-path", prop_buf, MAX_PROP_LEN); - if (len <= 0) - return; - - stdout = finddevice(prop_buf); - if (!stdout) { - printf("planetcore_set_serial_speed: " - "Bad /chosen/linux,stdout-path.\r\n"); - - return; - } - - if (!planetcore_get_decimal(table, PLANETCORE_KEY_SERIAL_BAUD, - &baud)) { - printf("planetcore_set_serial_speed: No SB tag.\r\n"); - return; - } - - baud32 = baud; - setprop(stdout, "current-speed", &baud32, 4); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/planetcore.h b/ANDROID_3.4.5/arch/powerpc/boot/planetcore.h deleted file mode 100644 index 0d4094f1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/planetcore.h +++ /dev/null @@ -1,49 +0,0 @@ -#ifndef _PPC_BOOT_PLANETCORE_H_ -#define _PPC_BOOT_PLANETCORE_H_ - -#include "types.h" - -#define PLANETCORE_KEY_BOARD_TYPE "BO" -#define PLANETCORE_KEY_BOARD_REV "BR" -#define PLANETCORE_KEY_MB_RAM "D1" -#define PLANETCORE_KEY_MAC_ADDR "EA" -#define PLANETCORE_KEY_FLASH_SPEED "FS" -#define PLANETCORE_KEY_IP_ADDR "IP" -#define PLANETCORE_KEY_KB_NVRAM "NV" -#define PLANETCORE_KEY_PROCESSOR "PR" -#define PLANETCORE_KEY_PROC_VARIANT "PV" -#define PLANETCORE_KEY_SERIAL_BAUD "SB" -#define PLANETCORE_KEY_SERIAL_PORT "SP" -#define PLANETCORE_KEY_SWITCH "SW" -#define PLANETCORE_KEY_TEMP_OFFSET "TC" -#define PLANETCORE_KEY_TARGET_IP "TIP" -#define PLANETCORE_KEY_CRYSTAL_HZ "XT" - -/* Prepare the table for processing, by turning all newlines - * into NULL bytes. - */ -void planetcore_prepare_table(char *table); - -/* Return the value associated with a given key in text, - * decimal, or hex format. - * - * Returns zero/NULL on failure, non-zero on success. - */ -const char *planetcore_get_key(const char *table, const char *key); -int planetcore_get_decimal(const char *table, const char *key, u64 *val); -int planetcore_get_hex(const char *table, const char *key, u64 *val); - -/* Updates the device tree local-mac-address properties based - * on the EA tag. - */ -void planetcore_set_mac_addrs(const char *table); - -/* Sets the linux,stdout-path in the /chosen node. This requires the - * linux,planetcore-label property in each serial node. - */ -void planetcore_set_stdout_path(const char *table); - -/* Sets the current-speed property in the serial node. */ -void planetcore_set_serial_speed(const char *table); - -#endif diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ppc_asm.h b/ANDROID_3.4.5/arch/powerpc/boot/ppc_asm.h deleted file mode 100644 index 1c2c2817..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ppc_asm.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef _PPC64_PPC_ASM_H -#define _PPC64_PPC_ASM_H -/* - * - * Definitions used by various bits of low-level assembly code on PowerPC. - * - * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* Condition Register Bit Fields */ - -#define cr0 0 -#define cr1 1 -#define cr2 2 -#define cr3 3 -#define cr4 4 -#define cr5 5 -#define cr6 6 -#define cr7 7 - - -/* General Purpose Registers (GPRs) */ - -#define r0 0 -#define r1 1 -#define r2 2 -#define r3 3 -#define r4 4 -#define r5 5 -#define r6 6 -#define r7 7 -#define r8 8 -#define r9 9 -#define r10 10 -#define r11 11 -#define r12 12 -#define r13 13 -#define r14 14 -#define r15 15 -#define r16 16 -#define r17 17 -#define r18 18 -#define r19 19 -#define r20 20 -#define r21 21 -#define r22 22 -#define r23 23 -#define r24 24 -#define r25 25 -#define r26 26 -#define r27 27 -#define r28 28 -#define r29 29 -#define r30 30 -#define r31 31 - -#endif /* _PPC64_PPC_ASM_H */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ppcboot-hotfoot.h b/ANDROID_3.4.5/arch/powerpc/boot/ppcboot-hotfoot.h deleted file mode 100644 index 1a3e80b5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ppcboot-hotfoot.h +++ /dev/null @@ -1,133 +0,0 @@ -/* - * This interface is used for compatibility with old U-boots *ONLY*. - * Please do not imitate or extend this. - */ - -/* - * Unfortunately, the ESTeem Hotfoot board uses a mangled version of - * ppcboot.h for historical reasons, and in the interest of having a - * mainline kernel boot on the production board+bootloader, this was the - * least-offensive solution. Please direct all flames to: - * - * Solomon Peachy <solomon@linux-wlan.com> - * - * (This header is identical to ppcboot.h except for the - * TARGET_HOTFOOT bits) - */ - -/* - * (C) Copyright 2000, 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __PPCBOOT_H__ -#define __PPCBOOT_H__ - -/* - * Board information passed to kernel from PPCBoot - * - * include/asm-ppc/ppcboot.h - */ - -#include "types.h" - -typedef struct bd_info { - unsigned long bi_memstart; /* start of DRAM memory */ - unsigned long bi_memsize; /* size of DRAM memory in bytes */ - unsigned long bi_flashstart; /* start of FLASH memory */ - unsigned long bi_flashsize; /* size of FLASH memory */ - unsigned long bi_flashoffset; /* reserved area for startup monitor */ - unsigned long bi_sramstart; /* start of SRAM memory */ - unsigned long bi_sramsize; /* size of SRAM memory */ -#if defined(TARGET_8xx) || defined(TARGET_CPM2) || defined(TARGET_85xx) ||\ - defined(TARGET_83xx) - unsigned long bi_immr_base; /* base of IMMR register */ -#endif -#if defined(TARGET_PPC_MPC52xx) - unsigned long bi_mbar_base; /* base of internal registers */ -#endif - unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ - unsigned long bi_ip_addr; /* IP Address */ - unsigned char bi_enetaddr[6]; /* Ethernet address */ -#if defined(TARGET_HOTFOOT) - /* second onboard ethernet port */ - unsigned char bi_enet1addr[6]; -#define HAVE_ENET1ADDR -#endif /* TARGET_HOOTFOOT */ - unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ - unsigned long bi_intfreq; /* Internal Freq, in MHz */ - unsigned long bi_busfreq; /* Bus Freq, in MHz */ -#if defined(TARGET_CPM2) - unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ - unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ - unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ - unsigned long bi_vco; /* VCO Out from PLL, in MHz */ -#endif -#if defined(TARGET_PPC_MPC52xx) - unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ - unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ -#endif - unsigned long bi_baudrate; /* Console Baudrate */ -#if defined(TARGET_4xx) - unsigned char bi_s_version[4]; /* Version of this structure */ - unsigned char bi_r_version[32]; /* Version of the ROM (IBM) */ - unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */ - unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */ - unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ - unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ -#endif -#if defined(TARGET_HOTFOOT) - unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */ -#endif -#if defined(TARGET_HYMOD) - hymod_conf_t bi_hymod_conf; /* hymod configuration information */ -#endif -#if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \ - defined(TARGET_85xx) || defined(TARGET_83xx) || defined(TARGET_HAS_ETH1) - /* second onboard ethernet port */ - unsigned char bi_enet1addr[6]; -#define HAVE_ENET1ADDR -#endif -#if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \ - defined(TARGET_85xx) || defined(TARGET_HAS_ETH2) - /* third onboard ethernet ports */ - unsigned char bi_enet2addr[6]; -#define HAVE_ENET2ADDR -#endif -#if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3) - /* fourth onboard ethernet ports */ - unsigned char bi_enet3addr[6]; -#define HAVE_ENET3ADDR -#endif -#if defined(TARGET_HOTFOOT) - int bi_phynum[2]; /* Determines phy mapping */ - int bi_phymode[2]; /* Determines phy mode */ -#endif -#if defined(TARGET_4xx) - unsigned int bi_opbfreq; /* OB clock in Hz */ - int bi_iic_fast[2]; /* Use fast i2c mode */ -#endif -#if defined(TARGET_440GX) - int bi_phynum[4]; /* phy mapping */ - int bi_phymode[4]; /* phy mode */ -#endif -} bd_t; - -#define bi_tbfreq bi_intfreq - -#endif /* __PPCBOOT_H__ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ppcboot.h b/ANDROID_3.4.5/arch/powerpc/boot/ppcboot.h deleted file mode 100644 index 6ae6f906..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ppcboot.h +++ /dev/null @@ -1,109 +0,0 @@ -/* - * This interface is used for compatibility with old U-boots *ONLY*. - * Please do not imitate or extend this. - */ - -/* - * (C) Copyright 2000, 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __PPCBOOT_H__ -#define __PPCBOOT_H__ - -/* - * Board information passed to kernel from PPCBoot - * - * include/asm-ppc/ppcboot.h - */ - -#include "types.h" - -typedef struct bd_info { - unsigned long bi_memstart; /* start of DRAM memory */ - unsigned long bi_memsize; /* size of DRAM memory in bytes */ - unsigned long bi_flashstart; /* start of FLASH memory */ - unsigned long bi_flashsize; /* size of FLASH memory */ - unsigned long bi_flashoffset; /* reserved area for startup monitor */ - unsigned long bi_sramstart; /* start of SRAM memory */ - unsigned long bi_sramsize; /* size of SRAM memory */ -#if defined(TARGET_8xx) || defined(TARGET_CPM2) || defined(TARGET_85xx) ||\ - defined(TARGET_83xx) - unsigned long bi_immr_base; /* base of IMMR register */ -#endif -#if defined(TARGET_PPC_MPC52xx) - unsigned long bi_mbar_base; /* base of internal registers */ -#endif - unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ - unsigned long bi_ip_addr; /* IP Address */ - unsigned char bi_enetaddr[6]; /* Ethernet address */ - unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ - unsigned long bi_intfreq; /* Internal Freq, in MHz */ - unsigned long bi_busfreq; /* Bus Freq, in MHz */ -#if defined(TARGET_CPM2) - unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ - unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ - unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ - unsigned long bi_vco; /* VCO Out from PLL, in MHz */ -#endif -#if defined(TARGET_PPC_MPC52xx) - unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ - unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ -#endif - unsigned long bi_baudrate; /* Console Baudrate */ -#if defined(TARGET_4xx) - unsigned char bi_s_version[4]; /* Version of this structure */ - unsigned char bi_r_version[32]; /* Version of the ROM (IBM) */ - unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */ - unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */ - unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ - unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ -#endif -#if defined(TARGET_HYMOD) - hymod_conf_t bi_hymod_conf; /* hymod configuration information */ -#endif -#if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \ - defined(TARGET_85xx) || defined(TARGET_83xx) || defined(TARGET_HAS_ETH1) - /* second onboard ethernet port */ - unsigned char bi_enet1addr[6]; -#define HAVE_ENET1ADDR -#endif -#if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \ - defined(TARGET_85xx) || defined(TARGET_HAS_ETH2) - /* third onboard ethernet ports */ - unsigned char bi_enet2addr[6]; -#define HAVE_ENET2ADDR -#endif -#if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3) - /* fourth onboard ethernet ports */ - unsigned char bi_enet3addr[6]; -#define HAVE_ENET3ADDR -#endif -#if defined(TARGET_4xx) - unsigned int bi_opbfreq; /* OB clock in Hz */ - int bi_iic_fast[2]; /* Use fast i2c mode */ -#endif -#if defined(TARGET_440GX) - int bi_phynum[4]; /* phy mapping */ - int bi_phymode[4]; /* phy mode */ -#endif -} bd_t; - -#define bi_tbfreq bi_intfreq - -#endif /* __PPCBOOT_H__ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/pq2.c b/ANDROID_3.4.5/arch/powerpc/boot/pq2.c deleted file mode 100644 index f6d11855..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/pq2.c +++ /dev/null @@ -1,102 +0,0 @@ -/* - * PowerQUICC II support functions - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "types.h" -#include "fsl-soc.h" -#include "pq2.h" -#include "stdio.h" -#include "io.h" - -#define PQ2_SCCR (0x10c80/4) /* System Clock Configuration Register */ -#define PQ2_SCMR (0x10c88/4) /* System Clock Mode Register */ - -static int pq2_corecnf_map[] = { - 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, -1, - 6, 5, 13, 2, 14, 4, 15, 9, 0, 11, 8, 10, 16, 12, 7, -1 -}; - -/* Get various clocks from crystal frequency. - * Returns zero on failure and non-zero on success. - */ -int pq2_get_clocks(u32 crystal, u32 *sysfreq, u32 *corefreq, - u32 *timebase, u32 *brgfreq) -{ - u32 *immr; - u32 sccr, scmr, mainclk, busclk; - int corecnf, busdf, plldf, pllmf, dfbrg; - - immr = fsl_get_immr(); - if (!immr) { - printf("pq2_get_clocks: Couldn't get IMMR base.\r\n"); - return 0; - } - - sccr = in_be32(&immr[PQ2_SCCR]); - scmr = in_be32(&immr[PQ2_SCMR]); - - dfbrg = sccr & 3; - corecnf = (scmr >> 24) & 0x1f; - busdf = (scmr >> 20) & 0xf; - plldf = (scmr >> 12) & 1; - pllmf = scmr & 0xfff; - - mainclk = crystal * (pllmf + 1) / (plldf + 1); - busclk = mainclk / (busdf + 1); - - if (sysfreq) - *sysfreq = mainclk / 2; - if (timebase) - *timebase = busclk / 4; - if (brgfreq) - *brgfreq = mainclk / (1 << ((dfbrg + 1) * 2)); - - if (corefreq) { - int coremult = pq2_corecnf_map[corecnf]; - - if (coremult < 0) - *corefreq = mainclk / 2; - else if (coremult == 0) - return 0; - else - *corefreq = busclk * coremult / 2; - } - - return 1; -} - -/* Set common device tree fields based on the given clock frequencies. */ -void pq2_set_clocks(u32 sysfreq, u32 corefreq, u32 timebase, u32 brgfreq) -{ - void *node; - - dt_fixup_cpu_clocks(corefreq, timebase, sysfreq); - - node = finddevice("/soc/cpm"); - if (node) - setprop(node, "clock-frequency", &sysfreq, 4); - - node = finddevice("/soc/cpm/brg"); - if (node) - setprop(node, "clock-frequency", &brgfreq, 4); -} - -int pq2_fixup_clocks(u32 crystal) -{ - u32 sysfreq, corefreq, timebase, brgfreq; - - if (!pq2_get_clocks(crystal, &sysfreq, &corefreq, &timebase, &brgfreq)) - return 0; - - pq2_set_clocks(sysfreq, corefreq, timebase, brgfreq); - return 1; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/pq2.h b/ANDROID_3.4.5/arch/powerpc/boot/pq2.h deleted file mode 100644 index 481698c7..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/pq2.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _PPC_BOOT_PQ2_H_ -#define _PPC_BOOT_PQ2_H_ - -#include "types.h" - -int pq2_get_clocks(u32 crystal, u32 *sysfreq, u32 *corefreq, - u32 *timebase, u32 *brgfreq); -void pq2_set_clocks(u32 sysfreq, u32 corefreq, u32 timebase, u32 brgfreq); -int pq2_fixup_clocks(u32 crystal); - -#endif diff --git a/ANDROID_3.4.5/arch/powerpc/boot/prpmc2800.c b/ANDROID_3.4.5/arch/powerpc/boot/prpmc2800.c deleted file mode 100644 index da31d603..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/prpmc2800.c +++ /dev/null @@ -1,571 +0,0 @@ -/* - * Motorola ECC prpmc280/f101 & prpmc2800/f101e platform code. - * - * Author: Mark A. Greer <mgreer@mvista.com> - * - * 2007 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "page.h" -#include "string.h" -#include "stdio.h" -#include "io.h" -#include "ops.h" -#include "gunzip_util.h" -#include "mv64x60.h" - -#define KB 1024U -#define MB (KB*KB) -#define GB (KB*MB) -#define MHz (1000U*1000U) -#define GHz (1000U*MHz) - -#define BOARD_MODEL "PrPMC2800" -#define BOARD_MODEL_MAX 32 /* max strlen(BOARD_MODEL) + 1 */ - -#define EEPROM2_ADDR 0xa4 -#define EEPROM3_ADDR 0xa8 - -BSS_STACK(16*KB); - -static u8 *bridge_base; - -typedef enum { - BOARD_MODEL_PRPMC280, - BOARD_MODEL_PRPMC2800, -} prpmc2800_board_model; - -typedef enum { - BRIDGE_TYPE_MV64360, - BRIDGE_TYPE_MV64362, -} prpmc2800_bridge_type; - -struct prpmc2800_board_info { - prpmc2800_board_model model; - char variant; - prpmc2800_bridge_type bridge_type; - u8 subsys0; - u8 subsys1; - u8 vpd4; - u8 vpd4_mask; - u32 core_speed; - u32 mem_size; - u32 boot_flash; - u32 user_flash; -}; - -static struct prpmc2800_board_info prpmc2800_board_info[] = { - { - .model = BOARD_MODEL_PRPMC280, - .variant = 'a', - .bridge_type = BRIDGE_TYPE_MV64360, - .subsys0 = 0xff, - .subsys1 = 0xff, - .vpd4 = 0x00, - .vpd4_mask = 0x0f, - .core_speed = 1*GHz, - .mem_size = 512*MB, - .boot_flash = 1*MB, - .user_flash = 64*MB, - }, - { - .model = BOARD_MODEL_PRPMC280, - .variant = 'b', - .bridge_type = BRIDGE_TYPE_MV64362, - .subsys0 = 0xff, - .subsys1 = 0xff, - .vpd4 = 0x01, - .vpd4_mask = 0x0f, - .core_speed = 1*GHz, - .mem_size = 512*MB, - .boot_flash = 0, - .user_flash = 0, - }, - { - .model = BOARD_MODEL_PRPMC280, - .variant = 'c', - .bridge_type = BRIDGE_TYPE_MV64360, - .subsys0 = 0xff, - .subsys1 = 0xff, - .vpd4 = 0x02, - .vpd4_mask = 0x0f, - .core_speed = 733*MHz, - .mem_size = 512*MB, - .boot_flash = 1*MB, - .user_flash = 64*MB, - }, - { - .model = BOARD_MODEL_PRPMC280, - .variant = 'd', - .bridge_type = BRIDGE_TYPE_MV64360, - .subsys0 = 0xff, - .subsys1 = 0xff, - .vpd4 = 0x03, - .vpd4_mask = 0x0f, - .core_speed = 1*GHz, - .mem_size = 1*GB, - .boot_flash = 1*MB, - .user_flash = 64*MB, - }, - { - .model = BOARD_MODEL_PRPMC280, - .variant = 'e', - .bridge_type = BRIDGE_TYPE_MV64360, - .subsys0 = 0xff, - .subsys1 = 0xff, - .vpd4 = 0x04, - .vpd4_mask = 0x0f, - .core_speed = 1*GHz, - .mem_size = 512*MB, - .boot_flash = 1*MB, - .user_flash = 64*MB, - }, - { - .model = BOARD_MODEL_PRPMC280, - .variant = 'f', - .bridge_type = BRIDGE_TYPE_MV64362, - .subsys0 = 0xff, - .subsys1 = 0xff, - .vpd4 = 0x05, - .vpd4_mask = 0x0f, - .core_speed = 733*MHz, - .mem_size = 128*MB, - .boot_flash = 1*MB, - .user_flash = 0, - }, - { - .model = BOARD_MODEL_PRPMC280, - .variant = 'g', - .bridge_type = BRIDGE_TYPE_MV64360, - .subsys0 = 0xff, - .subsys1 = 0xff, - .vpd4 = 0x06, - .vpd4_mask = 0x0f, - .core_speed = 1*GHz, - .mem_size = 256*MB, - .boot_flash = 1*MB, - .user_flash = 0, - }, - { - .model = BOARD_MODEL_PRPMC280, - .variant = 'h', - .bridge_type = BRIDGE_TYPE_MV64360, - .subsys0 = 0xff, - .subsys1 = 0xff, - .vpd4 = 0x07, - .vpd4_mask = 0x0f, - .core_speed = 1*GHz, - .mem_size = 1*GB, - .boot_flash = 1*MB, - .user_flash = 64*MB, - }, - { - .model = BOARD_MODEL_PRPMC2800, - .variant = 'a', - .bridge_type = BRIDGE_TYPE_MV64360, - .subsys0 = 0xb2, - .subsys1 = 0x8c, - .vpd4 = 0x00, - .vpd4_mask = 0x00, - .core_speed = 1*GHz, - .mem_size = 512*MB, - .boot_flash = 2*MB, - .user_flash = 64*MB, - }, - { - .model = BOARD_MODEL_PRPMC2800, - .variant = 'b', - .bridge_type = BRIDGE_TYPE_MV64362, - .subsys0 = 0xb2, - .subsys1 = 0x8d, - .vpd4 = 0x00, - .vpd4_mask = 0x00, - .core_speed = 1*GHz, - .mem_size = 512*MB, - .boot_flash = 0, - .user_flash = 0, - }, - { - .model = BOARD_MODEL_PRPMC2800, - .variant = 'c', - .bridge_type = BRIDGE_TYPE_MV64360, - .subsys0 = 0xb2, - .subsys1 = 0x8e, - .vpd4 = 0x00, - .vpd4_mask = 0x00, - .core_speed = 733*MHz, - .mem_size = 512*MB, - .boot_flash = 2*MB, - .user_flash = 64*MB, - }, - { - .model = BOARD_MODEL_PRPMC2800, - .variant = 'd', - .bridge_type = BRIDGE_TYPE_MV64360, - .subsys0 = 0xb2, - .subsys1 = 0x8f, - .vpd4 = 0x00, - .vpd4_mask = 0x00, - .core_speed = 1*GHz, - .mem_size = 1*GB, - .boot_flash = 2*MB, - .user_flash = 64*MB, - }, - { - .model = BOARD_MODEL_PRPMC2800, - .variant = 'e', - .bridge_type = BRIDGE_TYPE_MV64360, - .subsys0 = 0xa2, - .subsys1 = 0x8a, - .vpd4 = 0x00, - .vpd4_mask = 0x00, - .core_speed = 1*GHz, - .mem_size = 512*MB, - .boot_flash = 2*MB, - .user_flash = 64*MB, - }, - { - .model = BOARD_MODEL_PRPMC2800, - .variant = 'f', - .bridge_type = BRIDGE_TYPE_MV64362, - .subsys0 = 0xa2, - .subsys1 = 0x8b, - .vpd4 = 0x00, - .vpd4_mask = 0x00, - .core_speed = 733*MHz, - .mem_size = 128*MB, - .boot_flash = 2*MB, - .user_flash = 0, - }, - { - .model = BOARD_MODEL_PRPMC2800, - .variant = 'g', - .bridge_type = BRIDGE_TYPE_MV64360, - .subsys0 = 0xa2, - .subsys1 = 0x8c, - .vpd4 = 0x00, - .vpd4_mask = 0x00, - .core_speed = 1*GHz, - .mem_size = 2*GB, - .boot_flash = 2*MB, - .user_flash = 64*MB, - }, - { - .model = BOARD_MODEL_PRPMC2800, - .variant = 'h', - .bridge_type = BRIDGE_TYPE_MV64360, - .subsys0 = 0xa2, - .subsys1 = 0x8d, - .vpd4 = 0x00, - .vpd4_mask = 0x00, - .core_speed = 733*MHz, - .mem_size = 1*GB, - .boot_flash = 2*MB, - .user_flash = 64*MB, - }, -}; - -static struct prpmc2800_board_info *prpmc2800_get_board_info(u8 *vpd) -{ - struct prpmc2800_board_info *bip; - int i; - - for (i=0,bip=prpmc2800_board_info; i<ARRAY_SIZE(prpmc2800_board_info); - i++,bip++) - if ((vpd[0] == bip->subsys0) && (vpd[1] == bip->subsys1) - && ((vpd[4] & bip->vpd4_mask) == bip->vpd4)) - return bip; - - return NULL; -} - -/* Get VPD from i2c eeprom 2, then match it to a board info entry */ -static struct prpmc2800_board_info *prpmc2800_get_bip(void) -{ - struct prpmc2800_board_info *bip; - u8 vpd[5]; - int rc; - - if (mv64x60_i2c_open()) - fatal("Error: Can't open i2c device\n\r"); - - /* Get VPD from i2c eeprom-2 */ - memset(vpd, 0, sizeof(vpd)); - rc = mv64x60_i2c_read(EEPROM2_ADDR, vpd, 0x1fde, 2, sizeof(vpd)); - if (rc < 0) - fatal("Error: Couldn't read eeprom2\n\r"); - mv64x60_i2c_close(); - - /* Get board type & related info */ - bip = prpmc2800_get_board_info(vpd); - if (bip == NULL) { - printf("Error: Unsupported board or corrupted VPD:\n\r"); - printf(" 0x%x 0x%x 0x%x 0x%x 0x%x\n\r", - vpd[0], vpd[1], vpd[2], vpd[3], vpd[4]); - printf("Using device tree defaults...\n\r"); - } - - return bip; -} - -static void prpmc2800_bridge_setup(u32 mem_size) -{ - u32 i, v[12], enables, acc_bits; - u32 pci_base_hi, pci_base_lo, size, buf[2]; - unsigned long cpu_base; - int rc; - void *devp; - u8 *bridge_pbase, is_coherent; - struct mv64x60_cpu2pci_win *tbl; - - bridge_pbase = mv64x60_get_bridge_pbase(); - is_coherent = mv64x60_is_coherent(); - - if (is_coherent) - acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_WB - | MV64x60_PCI_ACC_CNTL_SWAP_NONE - | MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES - | MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES; - else - acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_NONE - | MV64x60_PCI_ACC_CNTL_SWAP_NONE - | MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES - | MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES; - - mv64x60_config_ctlr_windows(bridge_base, bridge_pbase, is_coherent); - mv64x60_config_pci_windows(bridge_base, bridge_pbase, 0, 0, mem_size, - acc_bits); - - /* Get the cpu -> pci i/o & mem mappings from the device tree */ - devp = find_node_by_compatible(NULL, "marvell,mv64360-pci"); - if (devp == NULL) - fatal("Error: Missing marvell,mv64360-pci" - " device tree node\n\r"); - - rc = getprop(devp, "ranges", v, sizeof(v)); - if (rc != sizeof(v)) - fatal("Error: Can't find marvell,mv64360-pci ranges" - " property\n\r"); - - /* Get the cpu -> pci i/o & mem mappings from the device tree */ - devp = find_node_by_compatible(NULL, "marvell,mv64360"); - if (devp == NULL) - fatal("Error: Missing marvell,mv64360 device tree node\n\r"); - - enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)); - enables |= 0x0007fe00; /* Disable all cpu->pci windows */ - out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables); - - for (i=0; i<12; i+=6) { - switch (v[i] & 0xff000000) { - case 0x01000000: /* PCI I/O Space */ - tbl = mv64x60_cpu2pci_io; - break; - case 0x02000000: /* PCI MEM Space */ - tbl = mv64x60_cpu2pci_mem; - break; - default: - continue; - } - - pci_base_hi = v[i+1]; - pci_base_lo = v[i+2]; - cpu_base = v[i+3]; - size = v[i+5]; - - buf[0] = cpu_base; - buf[1] = size; - - if (!dt_xlate_addr(devp, buf, sizeof(buf), &cpu_base)) - fatal("Error: Can't translate PCI address 0x%x\n\r", - (u32)cpu_base); - - mv64x60_config_cpu2pci_window(bridge_base, 0, pci_base_hi, - pci_base_lo, cpu_base, size, tbl); - } - - enables &= ~0x00000600; /* Enable cpu->pci0 i/o, cpu->pci0 mem0 */ - out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables); -} - -static void prpmc2800_fixups(void) -{ - u32 v[2], l, mem_size; - int rc; - void *devp; - char model[BOARD_MODEL_MAX]; - struct prpmc2800_board_info *bip; - - bip = prpmc2800_get_bip(); /* Get board info based on VPD */ - - mem_size = (bip) ? bip->mem_size : mv64x60_get_mem_size(bridge_base); - prpmc2800_bridge_setup(mem_size); /* Do necessary bridge setup */ - - /* If the VPD doesn't match what we know about, just use the - * defaults already in the device tree. - */ - if (!bip) - return; - - /* Know the board type so override device tree defaults */ - /* Set /model appropriately */ - devp = finddevice("/"); - if (devp == NULL) - fatal("Error: Missing '/' device tree node\n\r"); - memset(model, 0, BOARD_MODEL_MAX); - strncpy(model, BOARD_MODEL, BOARD_MODEL_MAX - 2); - l = strlen(model); - if (bip->model == BOARD_MODEL_PRPMC280) - l--; - model[l++] = bip->variant; - model[l++] = '\0'; - setprop(devp, "model", model, l); - - /* Set /cpus/PowerPC,7447/clock-frequency */ - devp = find_node_by_prop_value_str(NULL, "device_type", "cpu"); - if (devp == NULL) - fatal("Error: Missing proper cpu device tree node\n\r"); - v[0] = bip->core_speed; - setprop(devp, "clock-frequency", &v[0], sizeof(v[0])); - - /* Set /memory/reg size */ - devp = finddevice("/memory"); - if (devp == NULL) - fatal("Error: Missing /memory device tree node\n\r"); - v[0] = 0; - v[1] = bip->mem_size; - setprop(devp, "reg", v, sizeof(v)); - - /* Update model, if this is a mv64362 */ - if (bip->bridge_type == BRIDGE_TYPE_MV64362) { - devp = find_node_by_compatible(NULL, "marvell,mv64360"); - if (devp == NULL) - fatal("Error: Missing marvell,mv64360" - " device tree node\n\r"); - setprop(devp, "model", "mv64362", strlen("mv64362") + 1); - } - - /* Set User FLASH size */ - devp = find_node_by_compatible(NULL, "direct-mapped"); - if (devp == NULL) - fatal("Error: Missing User FLASH device tree node\n\r"); - rc = getprop(devp, "reg", v, sizeof(v)); - if (rc != sizeof(v)) - fatal("Error: Can't find User FLASH reg property\n\r"); - v[1] = bip->user_flash; - setprop(devp, "reg", v, sizeof(v)); -} - -#define MV64x60_MPP_CNTL_0 0xf000 -#define MV64x60_MPP_CNTL_2 0xf008 -#define MV64x60_GPP_IO_CNTL 0xf100 -#define MV64x60_GPP_LEVEL_CNTL 0xf110 -#define MV64x60_GPP_VALUE_SET 0xf118 - -static void prpmc2800_reset(void) -{ - u32 temp; - - udelay(5000000); - - if (bridge_base != 0) { - temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0)); - temp &= 0xFFFF0FFF; - out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0), temp); - - temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); - temp |= 0x00000004; - out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp); - - temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); - temp |= 0x00000004; - out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp); - - temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2)); - temp &= 0xFFFF0FFF; - out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2), temp); - - temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); - temp |= 0x00080000; - out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp); - - temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); - temp |= 0x00080000; - out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp); - - out_le32((u32 *)(bridge_base + MV64x60_GPP_VALUE_SET), - 0x00080004); - } - - for (;;); -} - -#define HEAP_SIZE (16*MB) -static struct gunzip_state gzstate; - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - struct elf_info ei; - char *heap_start, *dtb; - int dt_size = _dtb_end - _dtb_start; - void *vmlinuz_addr = _vmlinux_start; - unsigned long vmlinuz_size = _vmlinux_end - _vmlinux_start; - char elfheader[256]; - - if (dt_size <= 0) /* No fdt */ - exit(); - - /* - * Start heap after end of the kernel (after decompressed to - * address 0) or the end of the zImage, whichever is higher. - * That's so things allocated by simple_alloc won't overwrite - * any part of the zImage and the kernel won't overwrite the dtb - * when decompressed & relocated. - */ - gunzip_start(&gzstate, vmlinuz_addr, vmlinuz_size); - gunzip_exactly(&gzstate, elfheader, sizeof(elfheader)); - - if (!parse_elf32(elfheader, &ei)) - exit(); - - heap_start = (char *)(ei.memsize + ei.elfoffset); /* end of kernel*/ - heap_start = max(heap_start, (char *)_end); /* end of zImage */ - - if ((unsigned)simple_alloc_init(heap_start, HEAP_SIZE, 2*KB, 16) - > (128*MB)) - exit(); - - /* Relocate dtb to safe area past end of zImage & kernel */ - dtb = malloc(dt_size); - if (!dtb) - exit(); - memmove(dtb, _dtb_start, dt_size); - fdt_init(dtb); - - bridge_base = mv64x60_get_bridge_base(); - - platform_ops.fixups = prpmc2800_fixups; - platform_ops.exit = prpmc2800_reset; - - if (serial_console_init() < 0) - exit(); -} - -/* _zimage_start called very early--need to turn off external interrupts */ -asm (" .globl _zimage_start\n\ - _zimage_start:\n\ - mfmsr 10\n\ - rlwinm 10,10,0,~(1<<15) /* Clear MSR_EE */\n\ - sync\n\ - mtmsr 10\n\ - isync\n\ - b _zimage_start_lib\n\ -"); diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ps3-head.S b/ANDROID_3.4.5/arch/powerpc/boot/ps3-head.S deleted file mode 100644 index b6fcbaf5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ps3-head.S +++ /dev/null @@ -1,89 +0,0 @@ -/* - * PS3 bootwrapper entry. - * - * Copyright (C) 2007 Sony Computer Entertainment Inc. - * Copyright 2007 Sony Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include "ppc_asm.h" - - .machine "ppc64" - - .text - -/* - * __system_reset_overlay - The PS3 first stage entry. - * - * The bootwraper build script copies the 512 bytes at symbol - * __system_reset_overlay to offset 0x100 of the rom image. This symbol - * must occupy 512 or less bytes. - * - * The PS3 has a single processor with two threads. - */ - - .globl __system_reset_overlay -__system_reset_overlay: - - /* Switch to 32-bit mode. */ - - mfmsr r9 - clrldi r9,r9,1 - mtmsrd r9 - nop - - /* Get thread number in r3 and branch. */ - - mfspr r3, 0x88 - cntlzw. r3, r3 - beq 1f - - /* Secondary goes to __secondary_hold in kernel. */ - - li r4, 0x60 - mtctr r4 - bctr - -1: - /* Save the value at addr zero for a null pointer write check later. */ - - li r4, 0 - lwz r3, 0(r4) - - /* Primary delays then goes to _zimage_start in wrapper. */ - - or 31, 31, 31 /* db16cyc */ - or 31, 31, 31 /* db16cyc */ - - lis r4, _zimage_start@ha - addi r4, r4, _zimage_start@l - mtctr r4 - bctr - - . = __system_reset_overlay + 512 - -/* - * __system_reset_kernel - Place holder for the kernel reset vector. - * - * The bootwrapper build script copies 512 bytes from offset 0x100 - * of the rom image to the symbol __system_reset_kernel. At runtime - * the bootwrapper program copies the 512 bytes at __system_reset_kernel - * to ram address 0x100. This symbol must occupy 512 bytes. - */ - - .globl __system_reset_kernel -__system_reset_kernel: - - . = __system_reset_kernel + 512 diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ps3-hvcall.S b/ANDROID_3.4.5/arch/powerpc/boot/ps3-hvcall.S deleted file mode 100644 index d6068f18..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ps3-hvcall.S +++ /dev/null @@ -1,186 +0,0 @@ -/* - * PS3 bootwrapper hvcalls. - * - * Copyright (C) 2007 Sony Computer Entertainment Inc. - * Copyright 2007 Sony Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include "ppc_asm.h" - - .machine "ppc64" - -/* - * The PS3 hypervisor uses a 64 bit "C" language calling convention. - * The routines here marshal arguments between the 32 bit wrapper - * program and the 64 bit hvcalls. - * - * wrapper lv1 - * 32-bit (h,l) 64-bit - * - * 1: r3,r4 <-> r3 - * 2: r5,r6 <-> r4 - * 3: r7,r8 <-> r5 - * 4: r9,r10 <-> r6 - * 5: 8(r1),12(r1) <-> r7 - * 6: 16(r1),20(r1) <-> r8 - * 7: 24(r1),28(r1) <-> r9 - * 8: 32(r1),36(r1) <-> r10 - * - */ - -.macro GLOBAL name - .section ".text" - .balign 4 - .globl \name -\name: -.endm - -.macro NO_SUPPORT name - GLOBAL \name - b ps3_no_support -.endm - -.macro HVCALL num - li r11, \num - .long 0x44000022 - extsw r3, r3 -.endm - -.macro SAVE_LR offset=4 - mflr r0 - stw r0, \offset(r1) -.endm - -.macro LOAD_LR offset=4 - lwz r0, \offset(r1) - mtlr r0 -.endm - -.macro LOAD_64_REG target,high,low - sldi r11, \high, 32 - or \target, r11, \low -.endm - -.macro LOAD_64_STACK target,offset - ld \target, \offset(r1) -.endm - -.macro LOAD_R3 - LOAD_64_REG r3,r3,r4 -.endm - -.macro LOAD_R4 - LOAD_64_REG r4,r5,r6 -.endm - -.macro LOAD_R5 - LOAD_64_REG r5,r7,r8 -.endm - -.macro LOAD_R6 - LOAD_64_REG r6,r9,r10 -.endm - -.macro LOAD_R7 - LOAD_64_STACK r7,8 -.endm - -.macro LOAD_R8 - LOAD_64_STACK r8,16 -.endm - -.macro LOAD_R9 - LOAD_64_STACK r9,24 -.endm - -.macro LOAD_R10 - LOAD_64_STACK r10,32 -.endm - -.macro LOAD_REGS_0 - stwu 1,-16(1) - stw 3, 8(1) -.endm - -.macro LOAD_REGS_5 - LOAD_R3 - LOAD_R4 - LOAD_R5 - LOAD_R6 - LOAD_R7 -.endm - -.macro LOAD_REGS_6 - LOAD_REGS_5 - LOAD_R8 -.endm - -.macro LOAD_REGS_8 - LOAD_REGS_6 - LOAD_R9 - LOAD_R10 -.endm - -.macro STORE_REGS_0_1 - lwz r11, 8(r1) - std r4, 0(r11) - mr r4, r3 - li r3, 0 - addi r1,r1,16 -.endm - -.macro STORE_REGS_5_2 - lwz r11, 16(r1) - std r4, 0(r11) - lwz r11, 20(r1) - std r5, 0(r11) -.endm - -.macro STORE_REGS_6_1 - lwz r11, 24(r1) - std r4, 0(r11) -.endm - -GLOBAL lv1_get_logical_ppe_id - SAVE_LR - LOAD_REGS_0 - HVCALL 69 - STORE_REGS_0_1 - LOAD_LR - blr - -GLOBAL lv1_get_logical_partition_id - SAVE_LR - LOAD_REGS_0 - HVCALL 74 - STORE_REGS_0_1 - LOAD_LR - blr - -GLOBAL lv1_get_repository_node_value - SAVE_LR - LOAD_REGS_5 - HVCALL 91 - STORE_REGS_5_2 - LOAD_LR - blr - -GLOBAL lv1_panic - SAVE_LR - LOAD_REGS_8 - HVCALL 255 - LOAD_LR - blr diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ps3.c b/ANDROID_3.4.5/arch/powerpc/boot/ps3.c deleted file mode 100644 index 9954d988..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ps3.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * PS3 bootwrapper support. - * - * Copyright (C) 2007 Sony Computer Entertainment Inc. - * Copyright 2007 Sony Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "string.h" -#include "stdio.h" -#include "page.h" -#include "ops.h" - -extern int lv1_panic(u64 in_1); -extern int lv1_get_logical_partition_id(u64 *out_1); -extern int lv1_get_logical_ppe_id(u64 *out_1); -extern int lv1_get_repository_node_value(u64 in_1, u64 in_2, u64 in_3, - u64 in_4, u64 in_5, u64 *out_1, u64 *out_2); - -#ifdef DEBUG -#define DBG(fmt...) printf(fmt) -#else -static inline int __attribute__ ((format (printf, 1, 2))) DBG( - const char *fmt, ...) {return 0;} -#endif - -BSS_STACK(4096); - -/* A buffer that may be edited by tools operating on a zImage binary so as to - * edit the command line passed to vmlinux (by setting /chosen/bootargs). - * The buffer is put in it's own section so that tools may locate it easier. - */ - -static char cmdline[COMMAND_LINE_SIZE] - __attribute__((__section__("__builtin_cmdline"))); - -static void prep_cmdline(void *chosen) -{ - if (cmdline[0] == '\0') - getprop(chosen, "bootargs", cmdline, COMMAND_LINE_SIZE-1); - else - setprop_str(chosen, "bootargs", cmdline); - - printf("cmdline: '%s'\n", cmdline); -} - -static void ps3_console_write(const char *buf, int len) -{ -} - -static void ps3_exit(void) -{ - printf("ps3_exit\n"); - - /* lv1_panic will shutdown the lpar. */ - - lv1_panic(0); /* zero = do not reboot */ - while (1); -} - -static int ps3_repository_read_rm_size(u64 *rm_size) -{ - int result; - u64 lpar_id; - u64 ppe_id; - u64 v2; - - result = lv1_get_logical_partition_id(&lpar_id); - - if (result) - return -1; - - result = lv1_get_logical_ppe_id(&ppe_id); - - if (result) - return -1; - - /* - * n1: 0000000062690000 : ....bi.. - * n2: 7075000000000000 : pu...... - * n3: 0000000000000001 : ........ - * n4: 726d5f73697a6500 : rm_size. - */ - - result = lv1_get_repository_node_value(lpar_id, 0x0000000062690000ULL, - 0x7075000000000000ULL, ppe_id, 0x726d5f73697a6500ULL, rm_size, - &v2); - - printf("%s:%d: ppe_id %lu \n", __func__, __LINE__, - (unsigned long)ppe_id); - printf("%s:%d: lpar_id %lu \n", __func__, __LINE__, - (unsigned long)lpar_id); - printf("%s:%d: rm_size %llxh \n", __func__, __LINE__, *rm_size); - - return result ? -1 : 0; -} - -void ps3_copy_vectors(void) -{ - extern char __system_reset_kernel[]; - - memcpy((void *)0x100, __system_reset_kernel, 512); - flush_cache((void *)0x100, 512); -} - -void platform_init(unsigned long null_check) -{ - const u32 heapsize = 0x1000000 - (u32)_end; /* 16MiB */ - void *chosen; - unsigned long ft_addr; - u64 rm_size; - unsigned long val; - - console_ops.write = ps3_console_write; - platform_ops.exit = ps3_exit; - - printf("\n-- PS3 bootwrapper --\n"); - - simple_alloc_init(_end, heapsize, 32, 64); - fdt_init(_dtb_start); - - chosen = finddevice("/chosen"); - - ps3_repository_read_rm_size(&rm_size); - dt_fixup_memory(0, rm_size); - - if (_initrd_end > _initrd_start) { - setprop_val(chosen, "linux,initrd-start", (u32)(_initrd_start)); - setprop_val(chosen, "linux,initrd-end", (u32)(_initrd_end)); - } - - prep_cmdline(chosen); - - ft_addr = dt_ops.finalize(); - - ps3_copy_vectors(); - - printf(" flat tree at 0x%lx\n\r", ft_addr); - - val = *(unsigned long *)0; - - if (val != null_check) - printf("null check failed: %lx != %lx\n\r", val, null_check); - - ((kernel_entry_t)0)(ft_addr, 0, NULL); - - ps3_exit(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/redboot-83xx.c b/ANDROID_3.4.5/arch/powerpc/boot/redboot-83xx.c deleted file mode 100644 index 79aa9e15..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/redboot-83xx.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * RedBoot firmware support - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * Copyright (c) 2008 Codehermit - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "redboot.h" -#include "fsl-soc.h" -#include "io.h" - -static bd_t bd; -BSS_STACK(4096); - -#define MHZ(x) ((x + 500000) / 1000000) - -static void platform_fixups(void) -{ - void *node; - - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_mac_addresses(bd.bi_enetaddr); - dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq); - - node = finddevice("/soc/cpm/brg"); - if (node) { - printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n", - bd.bi_busfreq, MHZ(bd.bi_busfreq)); - setprop(node, "clock-frequency", &bd.bi_busfreq, 4); - } - -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - memcpy(&bd, (char *)r3, sizeof(bd)); - - if (bd.bi_tag != 0x42444944) - return; - - simple_alloc_init(_end, - bd.bi_memstart + bd.bi_memsize - (unsigned long)_end, - 32, 64); - - fdt_init(_dtb_start); - serial_console_init(); - platform_ops.fixups = platform_fixups; - - loader_info.cmdline = (char *)bd.bi_cmdline; - loader_info.cmdline_len = strlen((char *)bd.bi_cmdline); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/redboot-8xx.c b/ANDROID_3.4.5/arch/powerpc/boot/redboot-8xx.c deleted file mode 100644 index f7945adc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/redboot-8xx.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * RedBoot firmware support - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "redboot.h" -#include "fsl-soc.h" -#include "io.h" - -static bd_t bd; -BSS_STACK(4096); - -#define MHZ(x) ((x + 500000) / 1000000) - -static void platform_fixups(void) -{ - void *node; - - dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_mac_addresses(bd.bi_enetaddr); - dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq); - - node = finddevice("/soc/cpm/brg"); - if (node) { - printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n", - bd.bi_busfreq, MHZ(bd.bi_busfreq)); - setprop(node, "clock-frequency", &bd.bi_busfreq, 4); - } -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - memcpy(&bd, (char *)r3, sizeof(bd)); - - if (bd.bi_tag != 0x42444944) - return; - - simple_alloc_init(_end, - bd.bi_memstart + bd.bi_memsize - (unsigned long)_end, - 32, 64); - - fdt_init(_dtb_start); - serial_console_init(); - platform_ops.fixups = platform_fixups; - - loader_info.cmdline = (char *)bd.bi_cmdline; - loader_info.cmdline_len = strlen((char *)bd.bi_cmdline); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/redboot.h b/ANDROID_3.4.5/arch/powerpc/boot/redboot.h deleted file mode 100644 index ace0b7fe..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/redboot.h +++ /dev/null @@ -1,56 +0,0 @@ -#ifndef _PPC_REDBOOT_H -#define _PPC_REDBOOT_H - -//========================================================================= -// include/asm-ppc/redboot.h -// Copyright (c) 2002, 2003 Gary Thomas (<gary@mlbassoc.com> -// Copyright (c) 1997 Dan Malek (dmalek@jlc.net) - -// -// Board specific details, as provided by RedBoot -// - -/* A Board Information structure that is given to a program when - * RedBoot starts it up. Note: not all fields make sense for all - * architectures and it's up to the platform specific code to fill - * in the details. - */ -typedef struct bd_info { - unsigned int bi_tag; /* Should be 0x42444944 "BDID" */ - unsigned int bi_size; /* Size of this structure */ - unsigned int bi_revision; /* revision of this structure */ - unsigned int bi_bdate; /* bootstrap date, i.e. 0x19971106 */ - unsigned int bi_memstart; /* Memory start address */ - unsigned int bi_memsize; /* Memory (end) size in bytes */ - unsigned int bi_intfreq; /* Internal Freq, in Hz */ - unsigned int bi_busfreq; /* Bus Freq, in Hz */ - unsigned int bi_cpmfreq; /* CPM Freq, in Hz */ - unsigned int bi_brgfreq; /* BRG Freq, in Hz */ - unsigned int bi_vco; /* VCO Out from PLL */ - unsigned int bi_pci_freq; /* PCI Freq, in Hz */ - unsigned int bi_baudrate; /* Default console baud rate */ - unsigned int bi_immr; /* IMMR when called from boot rom */ - unsigned char bi_enetaddr[6]; - unsigned int bi_flashbase; /* Physical address of FLASH memory */ - unsigned int bi_flashsize; /* Length of FLASH memory */ - int bi_flashwidth; /* Width (8,16,32,64) */ - unsigned char *bi_cmdline; /* Pointer to command line */ - unsigned char bi_esa[3][6]; /* Ethernet station addresses */ - unsigned int bi_ramdisk_begin, bi_ramdisk_end; - struct { /* Information about [main] video screen */ - short x_res; /* Horizontal resolution in pixels */ - short y_res; /* Vertical resolution in pixels */ - short bpp; /* Bits/pixel */ - short mode; /* Type of pixels (packed, indexed) */ - unsigned long fb; /* Pointer to frame buffer (pixel) memory */ - } bi_video; - void (*bi_cputc)(char); /* Write a character to the RedBoot console */ - char (*bi_cgetc)(void); /* Read a character from the RedBoot console */ - int (*bi_ctstc)(void); /* Test for input on the RedBoot console */ -} bd_t; - -#define BI_REV 0x0102 /* Version 1.02 */ - -#define bi_pci_busfreq bi_pci_freq -#define bi_immr_base bi_immr -#endif diff --git a/ANDROID_3.4.5/arch/powerpc/boot/reg.h b/ANDROID_3.4.5/arch/powerpc/boot/reg.h deleted file mode 100644 index 9c2c9978..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/reg.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef _PPC_BOOT_REG_H -#define _PPC_BOOT_REG_H -/* - * Copyright 2007 Davud Gibson, IBM Corporation. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -static inline u32 mfpvr(void) -{ - u32 pvr; - asm volatile ("mfpvr %0" : "=r"(pvr)); - return pvr; -} - -#define __stringify_1(x) #x -#define __stringify(x) __stringify_1(x) - -#define mfspr(rn) ({unsigned long rval; \ - asm volatile("mfspr %0," __stringify(rn) \ - : "=r" (rval)); rval; }) -#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) - -register void *__stack_pointer asm("r1"); -#define get_sp() (__stack_pointer) - -#endif /* _PPC_BOOT_REG_H */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/rs6000.h b/ANDROID_3.4.5/arch/powerpc/boot/rs6000.h deleted file mode 100644 index 433f4508..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/rs6000.h +++ /dev/null @@ -1,243 +0,0 @@ -/* IBM RS/6000 "XCOFF" file definitions for BFD. - Copyright (C) 1990, 1991 Free Software Foundation, Inc. - FIXME: Can someone provide a transliteration of this name into ASCII? - Using the following chars caused a compiler warning on HIUX (so I replaced - them with octal escapes), and isn't useful without an understanding of what - character set it is. - Written by Mimi Ph\373\364ng-Th\345o V\365 of IBM - and John Gilmore of Cygnus Support. */ - -/********************** FILE HEADER **********************/ - -struct external_filehdr { - char f_magic[2]; /* magic number */ - char f_nscns[2]; /* number of sections */ - char f_timdat[4]; /* time & date stamp */ - char f_symptr[4]; /* file pointer to symtab */ - char f_nsyms[4]; /* number of symtab entries */ - char f_opthdr[2]; /* sizeof(optional hdr) */ - char f_flags[2]; /* flags */ -}; - - /* IBM RS/6000 */ -#define U802WRMAGIC 0730 /* writeable text segments **chh** */ -#define U802ROMAGIC 0735 /* readonly sharable text segments */ -#define U802TOCMAGIC 0737 /* readonly text segments and TOC */ - -#define BADMAG(x) \ - ((x).f_magic != U802ROMAGIC && (x).f_magic != U802WRMAGIC && \ - (x).f_magic != U802TOCMAGIC) - -#define FILHDR struct external_filehdr -#define FILHSZ 20 - - -/********************** AOUT "OPTIONAL HEADER" **********************/ - - -typedef struct -{ - unsigned char magic[2]; /* type of file */ - unsigned char vstamp[2]; /* version stamp */ - unsigned char tsize[4]; /* text size in bytes, padded to FW bdry */ - unsigned char dsize[4]; /* initialized data " " */ - unsigned char bsize[4]; /* uninitialized data " " */ - unsigned char entry[4]; /* entry pt. */ - unsigned char text_start[4]; /* base of text used for this file */ - unsigned char data_start[4]; /* base of data used for this file */ - unsigned char o_toc[4]; /* address of TOC */ - unsigned char o_snentry[2]; /* section number of entry point */ - unsigned char o_sntext[2]; /* section number of .text section */ - unsigned char o_sndata[2]; /* section number of .data section */ - unsigned char o_sntoc[2]; /* section number of TOC */ - unsigned char o_snloader[2]; /* section number of .loader section */ - unsigned char o_snbss[2]; /* section number of .bss section */ - unsigned char o_algntext[2]; /* .text alignment */ - unsigned char o_algndata[2]; /* .data alignment */ - unsigned char o_modtype[2]; /* module type (??) */ - unsigned char o_cputype[2]; /* cpu type */ - unsigned char o_maxstack[4]; /* max stack size (??) */ - unsigned char o_maxdata[4]; /* max data size (??) */ - unsigned char o_resv2[12]; /* reserved */ -} -AOUTHDR; - -#define AOUTSZ 72 -#define SMALL_AOUTSZ (28) -#define AOUTHDRSZ 72 - -#define RS6K_AOUTHDR_OMAGIC 0x0107 /* old: text & data writeable */ -#define RS6K_AOUTHDR_NMAGIC 0x0108 /* new: text r/o, data r/w */ -#define RS6K_AOUTHDR_ZMAGIC 0x010B /* paged: text r/o, both page-aligned */ - - -/********************** SECTION HEADER **********************/ - - -struct external_scnhdr { - char s_name[8]; /* section name */ - char s_paddr[4]; /* physical address, aliased s_nlib */ - char s_vaddr[4]; /* virtual address */ - char s_size[4]; /* section size */ - char s_scnptr[4]; /* file ptr to raw data for section */ - char s_relptr[4]; /* file ptr to relocation */ - char s_lnnoptr[4]; /* file ptr to line numbers */ - char s_nreloc[2]; /* number of relocation entries */ - char s_nlnno[2]; /* number of line number entries*/ - char s_flags[4]; /* flags */ -}; - -/* - * names of "special" sections - */ -#define _TEXT ".text" -#define _DATA ".data" -#define _BSS ".bss" -#define _PAD ".pad" -#define _LOADER ".loader" - -#define SCNHDR struct external_scnhdr -#define SCNHSZ 40 - -/* XCOFF uses a special .loader section with type STYP_LOADER. */ -#define STYP_LOADER 0x1000 - -/* XCOFF uses a special .debug section with type STYP_DEBUG. */ -#define STYP_DEBUG 0x2000 - -/* XCOFF handles line number or relocation overflow by creating - another section header with STYP_OVRFLO set. */ -#define STYP_OVRFLO 0x8000 - -/********************** LINE NUMBERS **********************/ - -/* 1 line number entry for every "breakpointable" source line in a section. - * Line numbers are grouped on a per function basis; first entry in a function - * grouping will have l_lnno = 0 and in place of physical address will be the - * symbol table index of the function name. - */ -struct external_lineno { - union { - char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/ - char l_paddr[4]; /* (physical) address of line number */ - } l_addr; - char l_lnno[2]; /* line number */ -}; - - -#define LINENO struct external_lineno -#define LINESZ 6 - - -/********************** SYMBOLS **********************/ - -#define E_SYMNMLEN 8 /* # characters in a symbol name */ -#define E_FILNMLEN 14 /* # characters in a file name */ -#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */ - -struct external_syment -{ - union { - char e_name[E_SYMNMLEN]; - struct { - char e_zeroes[4]; - char e_offset[4]; - } e; - } e; - char e_value[4]; - char e_scnum[2]; - char e_type[2]; - char e_sclass[1]; - char e_numaux[1]; -}; - - - -#define N_BTMASK (017) -#define N_TMASK (060) -#define N_BTSHFT (4) -#define N_TSHIFT (2) - - -union external_auxent { - struct { - char x_tagndx[4]; /* str, un, or enum tag indx */ - union { - struct { - char x_lnno[2]; /* declaration line number */ - char x_size[2]; /* str/union/array size */ - } x_lnsz; - char x_fsize[4]; /* size of function */ - } x_misc; - union { - struct { /* if ISFCN, tag, or .bb */ - char x_lnnoptr[4]; /* ptr to fcn line # */ - char x_endndx[4]; /* entry ndx past block end */ - } x_fcn; - struct { /* if ISARY, up to 4 dimen. */ - char x_dimen[E_DIMNUM][2]; - } x_ary; - } x_fcnary; - char x_tvndx[2]; /* tv index */ - } x_sym; - - union { - char x_fname[E_FILNMLEN]; - struct { - char x_zeroes[4]; - char x_offset[4]; - } x_n; - } x_file; - - struct { - char x_scnlen[4]; /* section length */ - char x_nreloc[2]; /* # relocation entries */ - char x_nlinno[2]; /* # line numbers */ - } x_scn; - - struct { - char x_tvfill[4]; /* tv fill value */ - char x_tvlen[2]; /* length of .tv */ - char x_tvran[2][2]; /* tv range */ - } x_tv; /* info about .tv section (in auxent of symbol .tv)) */ - - struct { - unsigned char x_scnlen[4]; - unsigned char x_parmhash[4]; - unsigned char x_snhash[2]; - unsigned char x_smtyp[1]; - unsigned char x_smclas[1]; - unsigned char x_stab[4]; - unsigned char x_snstab[2]; - } x_csect; - -}; - -#define SYMENT struct external_syment -#define SYMESZ 18 -#define AUXENT union external_auxent -#define AUXESZ 18 -#define DBXMASK 0x80 /* for dbx storage mask */ -#define SYMNAME_IN_DEBUG(symptr) ((symptr)->n_sclass & DBXMASK) - - - -/********************** RELOCATION DIRECTIVES **********************/ - - -struct external_reloc { - char r_vaddr[4]; - char r_symndx[4]; - char r_size[1]; - char r_type[1]; -}; - - -#define RELOC struct external_reloc -#define RELSZ 10 - -#define DEFAULT_DATA_SECTION_ALIGNMENT 4 -#define DEFAULT_BSS_SECTION_ALIGNMENT 4 -#define DEFAULT_TEXT_SECTION_ALIGNMENT 4 -/* For new sections we havn't heard of before */ -#define DEFAULT_SECTION_ALIGNMENT 4 diff --git a/ANDROID_3.4.5/arch/powerpc/boot/serial.c b/ANDROID_3.4.5/arch/powerpc/boot/serial.c deleted file mode 100644 index f2156f07..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/serial.c +++ /dev/null @@ -1,151 +0,0 @@ -/* - * Generic serial console support - * - * Author: Mark A. Greer <mgreer@mvista.com> - * - * Code in serial_edit_cmdline() copied from <file:arch/ppc/boot/simple/misc.c> - * and was written by Matt Porter <mporter@kernel.crashing.org>. - * - * 2001,2006 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "string.h" -#include "stdio.h" -#include "io.h" -#include "ops.h" - -static int serial_open(void) -{ - struct serial_console_data *scdp = console_ops.data; - return scdp->open(); -} - -static void serial_write(const char *buf, int len) -{ - struct serial_console_data *scdp = console_ops.data; - - while (*buf != '\0') - scdp->putc(*buf++); -} - -static void serial_edit_cmdline(char *buf, int len) -{ - int timer = 0, count; - char ch, *cp; - struct serial_console_data *scdp = console_ops.data; - - cp = buf; - count = strlen(buf); - cp = &buf[count]; - count++; - - while (timer++ < 5*1000) { - if (scdp->tstc()) { - while (((ch = scdp->getc()) != '\n') && (ch != '\r')) { - /* Test for backspace/delete */ - if ((ch == '\b') || (ch == '\177')) { - if (cp != buf) { - cp--; - count--; - printf("\b \b"); - } - /* Test for ^x/^u (and wipe the line) */ - } else if ((ch == '\030') || (ch == '\025')) { - while (cp != buf) { - cp--; - count--; - printf("\b \b"); - } - } else if (count < len) { - *cp++ = ch; - count++; - scdp->putc(ch); - } - } - break; /* Exit 'timer' loop */ - } - udelay(1000); /* 1 msec */ - } - *cp = 0; -} - -static void serial_close(void) -{ - struct serial_console_data *scdp = console_ops.data; - - if (scdp->close) - scdp->close(); -} - -static void *serial_get_stdout_devp(void) -{ - void *devp; - char devtype[MAX_PROP_LEN]; - char path[MAX_PATH_LEN]; - - devp = finddevice("/chosen"); - if (devp == NULL) - goto err_out; - - if (getprop(devp, "linux,stdout-path", path, MAX_PATH_LEN) > 0) { - devp = finddevice(path); - if (devp == NULL) - goto err_out; - - if ((getprop(devp, "device_type", devtype, sizeof(devtype)) > 0) - && !strcmp(devtype, "serial")) - return devp; - } -err_out: - return NULL; -} - -static struct serial_console_data serial_cd; - -/* Node's "compatible" property determines which serial driver to use */ -int serial_console_init(void) -{ - void *devp; - int rc = -1; - - devp = serial_get_stdout_devp(); - if (devp == NULL) - goto err_out; - - if (dt_is_compatible(devp, "ns16550") || - dt_is_compatible(devp, "pnpPNP,501")) - rc = ns16550_console_init(devp, &serial_cd); - else if (dt_is_compatible(devp, "marvell,mv64360-mpsc")) - rc = mpsc_console_init(devp, &serial_cd); - else if (dt_is_compatible(devp, "fsl,cpm1-scc-uart") || - dt_is_compatible(devp, "fsl,cpm1-smc-uart") || - dt_is_compatible(devp, "fsl,cpm2-scc-uart") || - dt_is_compatible(devp, "fsl,cpm2-smc-uart")) - rc = cpm_console_init(devp, &serial_cd); - else if (dt_is_compatible(devp, "fsl,mpc5200-psc-uart")) - rc = mpc5200_psc_console_init(devp, &serial_cd); - else if (dt_is_compatible(devp, "xlnx,opb-uartlite-1.00.b") || - dt_is_compatible(devp, "xlnx,xps-uartlite-1.00.a")) - rc = uartlite_console_init(devp, &serial_cd); - - /* Add other serial console driver calls here */ - - if (!rc) { - console_ops.open = serial_open; - console_ops.write = serial_write; - console_ops.close = serial_close; - console_ops.data = &serial_cd; - - if (serial_cd.getc) - console_ops.edit_cmdline = serial_edit_cmdline; - - return 0; - } -err_out: - return -1; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/simple_alloc.c b/ANDROID_3.4.5/arch/powerpc/boot/simple_alloc.c deleted file mode 100644 index 65ec135d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/simple_alloc.c +++ /dev/null @@ -1,150 +0,0 @@ -/* - * Implement primitive realloc(3) functionality. - * - * Author: Mark A. Greer <mgreer@mvista.com> - * - * 2006 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include <stddef.h> -#include "types.h" -#include "page.h" -#include "string.h" -#include "ops.h" - -#define ENTRY_BEEN_USED 0x01 -#define ENTRY_IN_USE 0x02 - -static struct alloc_info { - unsigned long flags; - unsigned long base; - unsigned long size; -} *alloc_tbl; - -static unsigned long tbl_entries; -static unsigned long alloc_min; -static unsigned long next_base; -static unsigned long space_left; - -/* - * First time an entry is used, its base and size are set. - * An entry can be freed and re-malloc'd but its base & size don't change. - * Should be smart enough for needs of bootwrapper. - */ -static void *simple_malloc(unsigned long size) -{ - unsigned long i; - struct alloc_info *p = alloc_tbl; - - if (size == 0) - goto err_out; - - size = _ALIGN_UP(size, alloc_min); - - for (i=0; i<tbl_entries; i++, p++) - if (!(p->flags & ENTRY_BEEN_USED)) { /* never been used */ - if (size <= space_left) { - p->base = next_base; - p->size = size; - p->flags = ENTRY_BEEN_USED | ENTRY_IN_USE; - next_base += size; - space_left -= size; - return (void *)p->base; - } - goto err_out; /* not enough space left */ - } - /* reuse an entry keeping same base & size */ - else if (!(p->flags & ENTRY_IN_USE) && (size <= p->size)) { - p->flags |= ENTRY_IN_USE; - return (void *)p->base; - } -err_out: - return NULL; -} - -static struct alloc_info *simple_find_entry(void *ptr) -{ - unsigned long i; - struct alloc_info *p = alloc_tbl; - - for (i=0; i<tbl_entries; i++,p++) { - if (!(p->flags & ENTRY_BEEN_USED)) - break; - if ((p->flags & ENTRY_IN_USE) && - (p->base == (unsigned long)ptr)) - return p; - } - return NULL; -} - -static void simple_free(void *ptr) -{ - struct alloc_info *p = simple_find_entry(ptr); - - if (p != NULL) - p->flags &= ~ENTRY_IN_USE; -} - -/* - * Change size of area pointed to by 'ptr' to 'size'. - * If 'ptr' is NULL, then its a malloc(). If 'size' is 0, then its a free(). - * 'ptr' must be NULL or a pointer to a non-freed area previously returned by - * simple_realloc() or simple_malloc(). - */ -static void *simple_realloc(void *ptr, unsigned long size) -{ - struct alloc_info *p; - void *new; - - if (size == 0) { - simple_free(ptr); - return NULL; - } - - if (ptr == NULL) - return simple_malloc(size); - - p = simple_find_entry(ptr); - if (p == NULL) /* ptr not from simple_malloc/simple_realloc */ - return NULL; - if (size <= p->size) /* fits in current block */ - return ptr; - - new = simple_malloc(size); - memcpy(new, ptr, p->size); - simple_free(ptr); - return new; -} - -/* - * Returns addr of first byte after heap so caller can see if it took - * too much space. If so, change args & try again. - */ -void *simple_alloc_init(char *base, unsigned long heap_size, - unsigned long granularity, unsigned long max_allocs) -{ - unsigned long heap_base, tbl_size; - - heap_size = _ALIGN_UP(heap_size, granularity); - alloc_min = granularity; - tbl_entries = max_allocs; - - tbl_size = tbl_entries * sizeof(struct alloc_info); - - alloc_tbl = (struct alloc_info *)_ALIGN_UP((unsigned long)base, 8); - memset(alloc_tbl, 0, tbl_size); - - heap_base = _ALIGN_UP((unsigned long)alloc_tbl + tbl_size, alloc_min); - - next_base = heap_base; - space_left = heap_size; - - platform_ops.malloc = simple_malloc; - platform_ops.free = simple_free; - platform_ops.realloc = simple_realloc; - - return (void *)(heap_base + heap_size); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/simpleboot.c b/ANDROID_3.4.5/arch/powerpc/boot/simpleboot.c deleted file mode 100644 index 21cd4807..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/simpleboot.c +++ /dev/null @@ -1,90 +0,0 @@ -/* - * The simple platform -- for booting when firmware doesn't supply a device - * tree or any platform configuration information. - * All data is extracted from an embedded device tree - * blob. - * - * Authors: Scott Wood <scottwood@freescale.com> - * Grant Likely <grant.likely@secretlab.ca> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * Copyright (c) 2008 Secret Lab Technologies Ltd. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "types.h" -#include "io.h" -#include "stdio.h" -#include <libfdt.h> - -BSS_STACK(4*1024); - -extern int platform_specific_init(void) __attribute__((weak)); - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - const u32 *na, *ns, *reg, *timebase; - u64 memsize64; - int node, size, i; - - /* Make sure FDT blob is sane */ - if (fdt_check_header(_dtb_start) != 0) - fatal("Invalid device tree blob\n"); - - /* Find the #address-cells and #size-cells properties */ - node = fdt_path_offset(_dtb_start, "/"); - if (node < 0) - fatal("Cannot find root node\n"); - na = fdt_getprop(_dtb_start, node, "#address-cells", &size); - if (!na || (size != 4)) - fatal("Cannot find #address-cells property"); - ns = fdt_getprop(_dtb_start, node, "#size-cells", &size); - if (!ns || (size != 4)) - fatal("Cannot find #size-cells property"); - - /* Find the memory range */ - node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type", - "memory", sizeof("memory")); - if (node < 0) - fatal("Cannot find memory node\n"); - reg = fdt_getprop(_dtb_start, node, "reg", &size); - if (size < (*na+*ns) * sizeof(u32)) - fatal("cannot get memory range\n"); - - /* Only interested in memory based at 0 */ - for (i = 0; i < *na; i++) - if (*reg++ != 0) - fatal("Memory range is not based at address 0\n"); - - /* get the memsize and trucate it to under 4G on 32 bit machines */ - memsize64 = 0; - for (i = 0; i < *ns; i++) - memsize64 = (memsize64 << 32) | *reg++; - if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL) - memsize64 = 0xffffffff; - - /* finally, setup the timebase */ - node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type", - "cpu", sizeof("cpu")); - if (!node) - fatal("Cannot find cpu node\n"); - timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size); - if (timebase && (size == 4)) - timebase_period_ns = 1000000000 / *timebase; - - /* Now we have the memory size; initialize the heap */ - simple_alloc_init(_end, memsize64 - (unsigned long)_end, 32, 64); - - /* prepare the device tree and find the console */ - fdt_init(_dtb_start); - - if (platform_specific_init) - platform_specific_init(); - - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/stdio.c b/ANDROID_3.4.5/arch/powerpc/boot/stdio.c deleted file mode 100644 index 5b57800b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/stdio.c +++ /dev/null @@ -1,334 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <stdarg.h> -#include <stddef.h> -#include "string.h" -#include "stdio.h" -#include "ops.h" - -size_t strnlen(const char * s, size_t count) -{ - const char *sc; - - for (sc = s; count-- && *sc != '\0'; ++sc) - /* nothing */; - return sc - s; -} - -extern unsigned int __div64_32(unsigned long long *dividend, - unsigned int divisor); - -/* The unnecessary pointer compare is there - * to check for type safety (n must be 64bit) - */ -# define do_div(n,base) ({ \ - unsigned int __base = (base); \ - unsigned int __rem; \ - (void)(((typeof((n)) *)0) == ((unsigned long long *)0)); \ - if (((n) >> 32) == 0) { \ - __rem = (unsigned int)(n) % __base; \ - (n) = (unsigned int)(n) / __base; \ - } else \ - __rem = __div64_32(&(n), __base); \ - __rem; \ - }) - -static int skip_atoi(const char **s) -{ - int i, c; - - for (i = 0; '0' <= (c = **s) && c <= '9'; ++*s) - i = i*10 + c - '0'; - return i; -} - -#define ZEROPAD 1 /* pad with zero */ -#define SIGN 2 /* unsigned/signed long */ -#define PLUS 4 /* show plus */ -#define SPACE 8 /* space if plus */ -#define LEFT 16 /* left justified */ -#define SPECIAL 32 /* 0x */ -#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */ - -static char * number(char * str, unsigned long long num, int base, int size, int precision, int type) -{ - char c,sign,tmp[66]; - const char *digits="0123456789abcdefghijklmnopqrstuvwxyz"; - int i; - - if (type & LARGE) - digits = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"; - if (type & LEFT) - type &= ~ZEROPAD; - if (base < 2 || base > 36) - return 0; - c = (type & ZEROPAD) ? '0' : ' '; - sign = 0; - if (type & SIGN) { - if ((signed long long)num < 0) { - sign = '-'; - num = - (signed long long)num; - size--; - } else if (type & PLUS) { - sign = '+'; - size--; - } else if (type & SPACE) { - sign = ' '; - size--; - } - } - if (type & SPECIAL) { - if (base == 16) - size -= 2; - else if (base == 8) - size--; - } - i = 0; - if (num == 0) - tmp[i++]='0'; - else while (num != 0) { - tmp[i++] = digits[do_div(num, base)]; - } - if (i > precision) - precision = i; - size -= precision; - if (!(type&(ZEROPAD+LEFT))) - while(size-->0) - *str++ = ' '; - if (sign) - *str++ = sign; - if (type & SPECIAL) { - if (base==8) - *str++ = '0'; - else if (base==16) { - *str++ = '0'; - *str++ = digits[33]; - } - } - if (!(type & LEFT)) - while (size-- > 0) - *str++ = c; - while (i < precision--) - *str++ = '0'; - while (i-- > 0) - *str++ = tmp[i]; - while (size-- > 0) - *str++ = ' '; - return str; -} - -int vsprintf(char *buf, const char *fmt, va_list args) -{ - int len; - unsigned long long num; - int i, base; - char * str; - const char *s; - - int flags; /* flags to number() */ - - int field_width; /* width of output field */ - int precision; /* min. # of digits for integers; max - number of chars for from string */ - int qualifier; /* 'h', 'l', or 'L' for integer fields */ - /* 'z' support added 23/7/1999 S.H. */ - /* 'z' changed to 'Z' --davidm 1/25/99 */ - - - for (str=buf ; *fmt ; ++fmt) { - if (*fmt != '%') { - *str++ = *fmt; - continue; - } - - /* process flags */ - flags = 0; - repeat: - ++fmt; /* this also skips first '%' */ - switch (*fmt) { - case '-': flags |= LEFT; goto repeat; - case '+': flags |= PLUS; goto repeat; - case ' ': flags |= SPACE; goto repeat; - case '#': flags |= SPECIAL; goto repeat; - case '0': flags |= ZEROPAD; goto repeat; - } - - /* get field width */ - field_width = -1; - if ('0' <= *fmt && *fmt <= '9') - field_width = skip_atoi(&fmt); - else if (*fmt == '*') { - ++fmt; - /* it's the next argument */ - field_width = va_arg(args, int); - if (field_width < 0) { - field_width = -field_width; - flags |= LEFT; - } - } - - /* get the precision */ - precision = -1; - if (*fmt == '.') { - ++fmt; - if ('0' <= *fmt && *fmt <= '9') - precision = skip_atoi(&fmt); - else if (*fmt == '*') { - ++fmt; - /* it's the next argument */ - precision = va_arg(args, int); - } - if (precision < 0) - precision = 0; - } - - /* get the conversion qualifier */ - qualifier = -1; - if (*fmt == 'l' && *(fmt + 1) == 'l') { - qualifier = 'q'; - fmt += 2; - } else if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' - || *fmt == 'Z') { - qualifier = *fmt; - ++fmt; - } - - /* default base */ - base = 10; - - switch (*fmt) { - case 'c': - if (!(flags & LEFT)) - while (--field_width > 0) - *str++ = ' '; - *str++ = (unsigned char) va_arg(args, int); - while (--field_width > 0) - *str++ = ' '; - continue; - - case 's': - s = va_arg(args, char *); - if (!s) - s = "<NULL>"; - - len = strnlen(s, precision); - - if (!(flags & LEFT)) - while (len < field_width--) - *str++ = ' '; - for (i = 0; i < len; ++i) - *str++ = *s++; - while (len < field_width--) - *str++ = ' '; - continue; - - case 'p': - if (field_width == -1) { - field_width = 2*sizeof(void *); - flags |= ZEROPAD; - } - str = number(str, - (unsigned long) va_arg(args, void *), 16, - field_width, precision, flags); - continue; - - - case 'n': - if (qualifier == 'l') { - long * ip = va_arg(args, long *); - *ip = (str - buf); - } else if (qualifier == 'Z') { - size_t * ip = va_arg(args, size_t *); - *ip = (str - buf); - } else { - int * ip = va_arg(args, int *); - *ip = (str - buf); - } - continue; - - case '%': - *str++ = '%'; - continue; - - /* integer number formats - set up the flags and "break" */ - case 'o': - base = 8; - break; - - case 'X': - flags |= LARGE; - case 'x': - base = 16; - break; - - case 'd': - case 'i': - flags |= SIGN; - case 'u': - break; - - default: - *str++ = '%'; - if (*fmt) - *str++ = *fmt; - else - --fmt; - continue; - } - if (qualifier == 'l') { - num = va_arg(args, unsigned long); - if (flags & SIGN) - num = (signed long) num; - } else if (qualifier == 'q') { - num = va_arg(args, unsigned long long); - if (flags & SIGN) - num = (signed long long) num; - } else if (qualifier == 'Z') { - num = va_arg(args, size_t); - } else if (qualifier == 'h') { - num = (unsigned short) va_arg(args, int); - if (flags & SIGN) - num = (signed short) num; - } else { - num = va_arg(args, unsigned int); - if (flags & SIGN) - num = (signed int) num; - } - str = number(str, num, base, field_width, precision, flags); - } - *str = '\0'; - return str-buf; -} - -int sprintf(char * buf, const char *fmt, ...) -{ - va_list args; - int i; - - va_start(args, fmt); - i=vsprintf(buf,fmt,args); - va_end(args); - return i; -} - -static char sprint_buf[1024]; - -int -printf(const char *fmt, ...) -{ - va_list args; - int n; - - va_start(args, fmt); - n = vsprintf(sprint_buf, fmt, args); - va_end(args); - if (console_ops.write) - console_ops.write(sprint_buf, n); - return n; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/stdio.h b/ANDROID_3.4.5/arch/powerpc/boot/stdio.h deleted file mode 100644 index adffc584..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/stdio.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _PPC_BOOT_STDIO_H_ -#define _PPC_BOOT_STDIO_H_ - -#include <stdarg.h> - -#define ENOMEM 12 /* Out of Memory */ -#define EINVAL 22 /* Invalid argument */ -#define ENOSPC 28 /* No space left on device */ - -extern int printf(const char *fmt, ...) __attribute__((format(printf, 1, 2))); - -#define fprintf(fmt, args...) printf(args) - -extern int sprintf(char *buf, const char *fmt, ...) - __attribute__((format(printf, 2, 3))); - -extern int vsprintf(char *buf, const char *fmt, va_list args); - -#endif /* _PPC_BOOT_STDIO_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/stdlib.c b/ANDROID_3.4.5/arch/powerpc/boot/stdlib.c deleted file mode 100644 index e00d58c2..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/stdlib.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * stdlib functions - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "stdlib.h" - -/* Not currently supported: leading whitespace, sign, 0x prefix, zero base */ -unsigned long long int strtoull(const char *ptr, char **end, int base) -{ - unsigned long long ret = 0; - - if (base > 36) - goto out; - - while (*ptr) { - int digit; - - if (*ptr >= '0' && *ptr <= '9' && *ptr < '0' + base) - digit = *ptr - '0'; - else if (*ptr >= 'A' && *ptr < 'A' + base - 10) - digit = *ptr - 'A' + 10; - else if (*ptr >= 'a' && *ptr < 'a' + base - 10) - digit = *ptr - 'a' + 10; - else - break; - - ret *= base; - ret += digit; - ptr++; - } - -out: - if (end) - *end = (char *)ptr; - - return ret; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/stdlib.h b/ANDROID_3.4.5/arch/powerpc/boot/stdlib.h deleted file mode 100644 index 1bf01ac7..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/stdlib.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _PPC_BOOT_STDLIB_H_ -#define _PPC_BOOT_STDLIB_H_ - -unsigned long long int strtoull(const char *ptr, char **end, int base); - -#endif diff --git a/ANDROID_3.4.5/arch/powerpc/boot/string.S b/ANDROID_3.4.5/arch/powerpc/boot/string.S deleted file mode 100644 index acc9428f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/string.S +++ /dev/null @@ -1,269 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * NOTE: this code runs in 32 bit mode and is packaged as ELF32. - */ - -#include "ppc_asm.h" - - .text - .globl strcpy -strcpy: - addi r5,r3,-1 - addi r4,r4,-1 -1: lbzu r0,1(r4) - cmpwi 0,r0,0 - stbu r0,1(r5) - bne 1b - blr - - .globl strncpy -strncpy: - cmpwi 0,r5,0 - beqlr - mtctr r5 - addi r6,r3,-1 - addi r4,r4,-1 -1: lbzu r0,1(r4) - cmpwi 0,r0,0 - stbu r0,1(r6) - bdnzf 2,1b /* dec ctr, branch if ctr != 0 && !cr0.eq */ - blr - - .globl strcat -strcat: - addi r5,r3,-1 - addi r4,r4,-1 -1: lbzu r0,1(r5) - cmpwi 0,r0,0 - bne 1b - addi r5,r5,-1 -1: lbzu r0,1(r4) - cmpwi 0,r0,0 - stbu r0,1(r5) - bne 1b - blr - - .globl strchr -strchr: - addi r3,r3,-1 -1: lbzu r0,1(r3) - cmpw 0,r0,r4 - beqlr - cmpwi 0,r0,0 - bne 1b - li r3,0 - blr - - .globl strcmp -strcmp: - addi r5,r3,-1 - addi r4,r4,-1 -1: lbzu r3,1(r5) - cmpwi 1,r3,0 - lbzu r0,1(r4) - subf. r3,r0,r3 - beqlr 1 - beq 1b - blr - - .globl strncmp -strncmp: - mtctr r5 - addi r5,r3,-1 - addi r4,r4,-1 -1: lbzu r3,1(r5) - cmpwi 1,r3,0 - lbzu r0,1(r4) - subf. r3,r0,r3 - beqlr 1 - bdnzt eq,1b - blr - - .globl strlen -strlen: - addi r4,r3,-1 -1: lbzu r0,1(r4) - cmpwi 0,r0,0 - bne 1b - subf r3,r3,r4 - blr - - .globl memset -memset: - rlwimi r4,r4,8,16,23 - rlwimi r4,r4,16,0,15 - addi r6,r3,-4 - cmplwi 0,r5,4 - blt 7f - stwu r4,4(r6) - beqlr - andi. r0,r6,3 - add r5,r0,r5 - subf r6,r0,r6 - rlwinm r0,r5,32-2,2,31 - mtctr r0 - bdz 6f -1: stwu r4,4(r6) - bdnz 1b -6: andi. r5,r5,3 -7: cmpwi 0,r5,0 - beqlr - mtctr r5 - addi r6,r6,3 -8: stbu r4,1(r6) - bdnz 8b - blr - - .globl memmove -memmove: - cmplw 0,r3,r4 - bgt backwards_memcpy - /* fall through */ - - .globl memcpy -memcpy: - rlwinm. r7,r5,32-3,3,31 /* r7 = r5 >> 3 */ - addi r6,r3,-4 - addi r4,r4,-4 - beq 3f /* if less than 8 bytes to do */ - andi. r0,r6,3 /* get dest word aligned */ - mtctr r7 - bne 5f - andi. r0,r4,3 /* check src word aligned too */ - bne 3f -1: lwz r7,4(r4) - lwzu r8,8(r4) - stw r7,4(r6) - stwu r8,8(r6) - bdnz 1b - andi. r5,r5,7 -2: cmplwi 0,r5,4 - blt 3f - lwzu r0,4(r4) - addi r5,r5,-4 - stwu r0,4(r6) -3: cmpwi 0,r5,0 - beqlr - mtctr r5 - addi r4,r4,3 - addi r6,r6,3 -4: lbzu r0,1(r4) - stbu r0,1(r6) - bdnz 4b - blr -5: subfic r0,r0,4 - cmpw cr1,r0,r5 - add r7,r0,r4 - andi. r7,r7,3 /* will source be word-aligned too? */ - ble cr1,3b - bne 3b /* do byte-by-byte if not */ - mtctr r0 -6: lbz r7,4(r4) - addi r4,r4,1 - stb r7,4(r6) - addi r6,r6,1 - bdnz 6b - subf r5,r0,r5 - rlwinm. r7,r5,32-3,3,31 - beq 2b - mtctr r7 - b 1b - - .globl backwards_memcpy -backwards_memcpy: - rlwinm. r7,r5,32-3,3,31 /* r7 = r5 >> 3 */ - add r6,r3,r5 - add r4,r4,r5 - beq 3f - andi. r0,r6,3 - mtctr r7 - bne 5f - andi. r0,r4,3 - bne 3f -1: lwz r7,-4(r4) - lwzu r8,-8(r4) - stw r7,-4(r6) - stwu r8,-8(r6) - bdnz 1b - andi. r5,r5,7 -2: cmplwi 0,r5,4 - blt 3f - lwzu r0,-4(r4) - subi r5,r5,4 - stwu r0,-4(r6) -3: cmpwi 0,r5,0 - beqlr - mtctr r5 -4: lbzu r0,-1(r4) - stbu r0,-1(r6) - bdnz 4b - blr -5: cmpw cr1,r0,r5 - subf r7,r0,r4 - andi. r7,r7,3 - ble cr1,3b - bne 3b - mtctr r0 -6: lbzu r7,-1(r4) - stbu r7,-1(r6) - bdnz 6b - subf r5,r0,r5 - rlwinm. r7,r5,32-3,3,31 - beq 2b - mtctr r7 - b 1b - - .globl memchr -memchr: - cmpwi 0,r5,0 - blelr - mtctr r5 - addi r3,r3,-1 -1: lbzu r0,1(r3) - cmpw r0,r4 - beqlr - bdnz 1b - li r3,0 - blr - - .globl memcmp -memcmp: - cmpwi 0,r5,0 - ble 2f - mtctr r5 - addi r6,r3,-1 - addi r4,r4,-1 -1: lbzu r3,1(r6) - lbzu r0,1(r4) - subf. r3,r0,r3 - bdnzt 2,1b - blr -2: li r3,0 - blr - - -/* - * Flush the dcache and invalidate the icache for a range of addresses. - * - * flush_cache(addr, len) - */ - .global flush_cache -flush_cache: - addi 4,4,0x1f /* len = (len + 0x1f) / 0x20 */ - rlwinm. 4,4,27,5,31 - mtctr 4 - beqlr -1: dcbf 0,3 - icbi 0,3 - addi 3,3,0x20 - bdnz 1b - sync - isync - blr - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/string.h b/ANDROID_3.4.5/arch/powerpc/boot/string.h deleted file mode 100644 index 50091cc0..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/string.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef _PPC_BOOT_STRING_H_ -#define _PPC_BOOT_STRING_H_ -#include <stddef.h> - -extern char *strcpy(char *dest, const char *src); -extern char *strncpy(char *dest, const char *src, size_t n); -extern char *strcat(char *dest, const char *src); -extern char *strchr(const char *s, int c); -extern int strcmp(const char *s1, const char *s2); -extern int strncmp(const char *s1, const char *s2, size_t n); -extern size_t strlen(const char *s); -extern size_t strnlen(const char *s, size_t count); - -extern void *memset(void *s, int c, size_t n); -extern void *memmove(void *dest, const void *src, unsigned long n); -extern void *memcpy(void *dest, const void *src, unsigned long n); -extern void *memchr(const void *s, int c, size_t n); -extern int memcmp(const void *s1, const void *s2, size_t n); - -#endif /* _PPC_BOOT_STRING_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/treeboot-bamboo.c b/ANDROID_3.4.5/arch/powerpc/boot/treeboot-bamboo.c deleted file mode 100644 index 9eee48fc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/treeboot-bamboo.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright IBM Corporation, 2007 - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * Based on ebony wrapper: - * Copyright 2007 David Gibson, IBM Corporation. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; version 2 of the License - */ -#include "ops.h" -#include "stdio.h" -#include "44x.h" -#include "stdlib.h" - -BSS_STACK(4096); - -#define PIBS_MAC0 0xfffc0400 -#define PIBS_MAC1 0xfffc0500 -char pibs_mac0[6]; -char pibs_mac1[6]; - -static void read_pibs_mac(void) -{ - unsigned long long mac64; - - mac64 = strtoull((char *)PIBS_MAC0, 0, 16); - memcpy(&pibs_mac0, (char *)&mac64+2, 6); - - mac64 = strtoull((char *)PIBS_MAC1, 0, 16); - memcpy(&pibs_mac1, (char *)&mac64+2, 6); -} - -void platform_init(void) -{ - unsigned long end_of_ram = 0x8000000; - unsigned long avail_ram = end_of_ram - (unsigned long)_end; - - simple_alloc_init(_end, avail_ram, 32, 64); - read_pibs_mac(); - bamboo_init((u8 *)&pibs_mac0, (u8 *)&pibs_mac1); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/treeboot-currituck.c b/ANDROID_3.4.5/arch/powerpc/boot/treeboot-currituck.c deleted file mode 100644 index 925ae43b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/treeboot-currituck.c +++ /dev/null @@ -1,119 +0,0 @@ -/* - * Copyright © 2011 Tony Breeds IBM Corporation - * - * Based on earlier code: - * Copyright (C) Paul Mackerras 1997. - * - * Matt Porter <mporter@kernel.crashing.org> - * Copyright 2002-2005 MontaVista Software Inc. - * - * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> - * Copyright (c) 2003, 2004 Zultys Technologies - * - * Copyright 2007 David Gibson, IBM Corporation. - * Copyright 2010 Ben. Herrenschmidt, IBM Corporation. - * Copyright © 2011 David Kleikamp IBM Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "string.h" -#include "stdio.h" -#include "page.h" -#include "ops.h" -#include "reg.h" -#include "io.h" -#include "dcr.h" -#include "4xx.h" -#include "44x.h" -#include "libfdt.h" - -BSS_STACK(4096); - -#define MAX_RANKS 0x4 -#define DDR3_MR0CF 0x80010011U - -static unsigned long long ibm_currituck_memsize; -static unsigned long long ibm_currituck_detect_memsize(void) -{ - u32 reg; - unsigned i; - unsigned long long memsize = 0; - - for(i = 0; i < MAX_RANKS; i++){ - reg = mfdcrx(DDR3_MR0CF + i); - - if (!(reg & 1)) - continue; - - reg &= 0x0000f000; - reg >>= 12; - memsize += (0x800000ULL << reg); - } - - return memsize; -} - -static void ibm_currituck_fixups(void) -{ - void *devp = finddevice("/"); - u32 dma_ranges[7]; - - dt_fixup_memory(0x0ULL, ibm_currituck_memsize); - - while ((devp = find_node_by_devtype(devp, "pci"))) { - if (getprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges)) < 0) { - printf("%s: Failed to get dma-ranges\r\n", __func__); - continue; - } - - dma_ranges[5] = ibm_currituck_memsize >> 32; - dma_ranges[6] = ibm_currituck_memsize & 0xffffffffUL; - - setprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges)); - } -} - -#define SPRN_PIR 0x11E /* Processor Indentification Register */ -void platform_init(void) -{ - unsigned long end_of_ram, avail_ram; - u32 pir_reg; - int node, size; - const u32 *timebase; - - ibm_currituck_memsize = ibm_currituck_detect_memsize(); - if (ibm_currituck_memsize >> 32) - end_of_ram = ~0UL; - else - end_of_ram = ibm_currituck_memsize; - avail_ram = end_of_ram - (unsigned long)_end; - - simple_alloc_init(_end, avail_ram, 128, 64); - platform_ops.fixups = ibm_currituck_fixups; - platform_ops.exit = ibm44x_dbcr_reset; - pir_reg = mfspr(SPRN_PIR); - - /* Make sure FDT blob is sane */ - if (fdt_check_header(_dtb_start) != 0) - fatal("Invalid device tree blob\n"); - - node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type", - "cpu", sizeof("cpu")); - if (!node) - fatal("Cannot find cpu node\n"); - timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size); - if (timebase && (size == 4)) - timebase_period_ns = 1000000000 / *timebase; - - fdt_set_boot_cpuid_phys(_dtb_start, pir_reg); - fdt_init(_dtb_start); - - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/treeboot-ebony.c b/ANDROID_3.4.5/arch/powerpc/boot/treeboot-ebony.c deleted file mode 100644 index 21cc4834..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/treeboot-ebony.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Old U-boot compatibility for Ebony - * - * Author: David Gibson <david@gibson.dropbear.id.au> - * - * Copyright 2007 David Gibson, IBM Corporatio. - * Based on cuboot-83xx.c, which is: - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "44x.h" - -BSS_STACK(4096); - -#define OPENBIOS_MAC_BASE 0xfffffe0c -#define OPENBIOS_MAC_OFFSET 0xc - -void platform_init(void) -{ - unsigned long end_of_ram = 0x8000000; - unsigned long avail_ram = end_of_ram - (unsigned long)_end; - - simple_alloc_init(_end, avail_ram, 32, 64); - ebony_init((u8 *)OPENBIOS_MAC_BASE, - (u8 *)(OPENBIOS_MAC_BASE + OPENBIOS_MAC_OFFSET)); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/treeboot-iss4xx.c b/ANDROID_3.4.5/arch/powerpc/boot/treeboot-iss4xx.c deleted file mode 100644 index 329e710f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/treeboot-iss4xx.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright 2010 Ben. Herrenschmidt, IBM Corporation. - * - * Based on earlier code: - * Copyright (C) Paul Mackerras 1997. - * - * Matt Porter <mporter@kernel.crashing.org> - * Copyright 2002-2005 MontaVista Software Inc. - * - * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> - * Copyright (c) 2003, 2004 Zultys Technologies - * - * Copyright 2007 David Gibson, IBM Corporation. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "elf.h" -#include "string.h" -#include "stdio.h" -#include "page.h" -#include "ops.h" -#include "reg.h" -#include "io.h" -#include "dcr.h" -#include "4xx.h" -#include "44x.h" -#include "libfdt.h" - -BSS_STACK(4096); - -static u32 ibm4xx_memstart; - -static void iss_4xx_fixups(void) -{ - void *memory; - u32 reg[3]; - - memory = finddevice("/memory"); - if (!memory) - fatal("Can't find memory node\n"); - /* This assumes #address-cells = 2, #size-cells =1 and that */ - getprop(memory, "reg", reg, sizeof(reg)); - if (reg[2]) - /* If the device tree specifies the memory range, use it */ - ibm4xx_memstart = reg[1]; - else - /* othersize, read it from the SDRAM controller */ - ibm4xx_sdram_fixup_memsize(); -} - -static void *iss_4xx_vmlinux_alloc(unsigned long size) -{ - return (void *)ibm4xx_memstart; -} - -#define SPRN_PIR 0x11E /* Processor Indentification Register */ -void platform_init(void) -{ - unsigned long end_of_ram = 0x08000000; - unsigned long avail_ram = end_of_ram - (unsigned long)_end; - u32 pir_reg; - - simple_alloc_init(_end, avail_ram, 128, 64); - platform_ops.fixups = iss_4xx_fixups; - platform_ops.vmlinux_alloc = iss_4xx_vmlinux_alloc; - platform_ops.exit = ibm44x_dbcr_reset; - pir_reg = mfspr(SPRN_PIR); - fdt_set_boot_cpuid_phys(_dtb_start, pir_reg); - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/treeboot-walnut.c b/ANDROID_3.4.5/arch/powerpc/boot/treeboot-walnut.c deleted file mode 100644 index 097974e5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/treeboot-walnut.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Old U-boot compatibility for Walnut - * - * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * Copyright 2007 IBM Corporation - * Based on cuboot-83xx.c, which is: - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "stdio.h" -#include "dcr.h" -#include "4xx.h" -#include "io.h" - -BSS_STACK(4096); - -static void walnut_flashsel_fixup(void) -{ - void *devp, *sram; - u32 reg_flash[3] = {0x0, 0x0, 0x80000}; - u32 reg_sram[3] = {0x0, 0x0, 0x80000}; - u8 *fpga; - u8 fpga_brds1 = 0x0; - - devp = finddevice("/plb/ebc/fpga"); - if (!devp) - fatal("Couldn't locate FPGA node\n\r"); - - if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga)) - fatal("no virtual-reg property\n\r"); - - fpga_brds1 = in_8(fpga); - - devp = finddevice("/plb/ebc/flash"); - if (!devp) - fatal("Couldn't locate flash node\n\r"); - - if (getprop(devp, "reg", reg_flash, sizeof(reg_flash)) != sizeof(reg_flash)) - fatal("flash reg property has unexpected size\n\r"); - - sram = finddevice("/plb/ebc/sram"); - if (!sram) - fatal("Couldn't locate sram node\n\r"); - - if (getprop(sram, "reg", reg_sram, sizeof(reg_sram)) != sizeof(reg_sram)) - fatal("sram reg property has unexpected size\n\r"); - - if (fpga_brds1 & 0x1) { - reg_flash[1] ^= 0x80000; - reg_sram[1] ^= 0x80000; - } - - setprop(devp, "reg", reg_flash, sizeof(reg_flash)); - setprop(sram, "reg", reg_sram, sizeof(reg_sram)); -} - -#define WALNUT_OPENBIOS_MAC_OFF 0xfffffe0b -static void walnut_fixups(void) -{ - ibm4xx_sdram_fixup_memsize(); - ibm405gp_fixup_clocks(33330000, 0xa8c000); - ibm4xx_quiesce_eth((u32 *)0xef600800, NULL); - ibm4xx_fixup_ebc_ranges("/plb/ebc"); - walnut_flashsel_fixup(); - dt_fixup_mac_address_by_alias("ethernet0", (u8 *) WALNUT_OPENBIOS_MAC_OFF); -} - -void platform_init(void) -{ - unsigned long end_of_ram = 0x2000000; - unsigned long avail_ram = end_of_ram - (unsigned long) _end; - - simple_alloc_init(_end, avail_ram, 32, 32); - platform_ops.fixups = walnut_fixups; - platform_ops.exit = ibm40x_dbcr_reset; - fdt_init(_dtb_start); - serial_console_init(); -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/types.h b/ANDROID_3.4.5/arch/powerpc/boot/types.h deleted file mode 100644 index 31393d17..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/types.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef _TYPES_H_ -#define _TYPES_H_ - -#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) - -typedef unsigned char u8; -typedef unsigned short u16; -typedef unsigned int u32; -typedef unsigned long long u64; -typedef signed char s8; -typedef short s16; -typedef int s32; -typedef long long s64; - -#define min(x,y) ({ \ - typeof(x) _x = (x); \ - typeof(y) _y = (y); \ - (void) (&_x == &_y); \ - _x < _y ? _x : _y; }) - -#define max(x,y) ({ \ - typeof(x) _x = (x); \ - typeof(y) _y = (y); \ - (void) (&_x == &_y); \ - _x > _y ? _x : _y; }) - -#endif /* _TYPES_H_ */ diff --git a/ANDROID_3.4.5/arch/powerpc/boot/uartlite.c b/ANDROID_3.4.5/arch/powerpc/boot/uartlite.c deleted file mode 100644 index 46bed69b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/uartlite.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - * Xilinx UARTLITE bootloader driver - * - * Copyright (C) 2007 Secret Lab Technologies Ltd. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include <stdarg.h> -#include <stddef.h> -#include "types.h" -#include "string.h" -#include "stdio.h" -#include "io.h" -#include "ops.h" - -#define ULITE_RX 0x00 -#define ULITE_TX 0x04 -#define ULITE_STATUS 0x08 -#define ULITE_CONTROL 0x0c - -#define ULITE_STATUS_RXVALID 0x01 -#define ULITE_STATUS_TXFULL 0x08 - -#define ULITE_CONTROL_RST_RX 0x02 - -static void * reg_base; - -static int uartlite_open(void) -{ - /* Clear the RX FIFO */ - out_be32(reg_base + ULITE_CONTROL, ULITE_CONTROL_RST_RX); - return 0; -} - -static void uartlite_putc(unsigned char c) -{ - u32 reg = ULITE_STATUS_TXFULL; - while (reg & ULITE_STATUS_TXFULL) /* spin on TXFULL bit */ - reg = in_be32(reg_base + ULITE_STATUS); - out_be32(reg_base + ULITE_TX, c); -} - -static unsigned char uartlite_getc(void) -{ - u32 reg = 0; - while (!(reg & ULITE_STATUS_RXVALID)) /* spin waiting for RXVALID bit */ - reg = in_be32(reg_base + ULITE_STATUS); - return in_be32(reg_base + ULITE_RX); -} - -static u8 uartlite_tstc(void) -{ - u32 reg = in_be32(reg_base + ULITE_STATUS); - return reg & ULITE_STATUS_RXVALID; -} - -int uartlite_console_init(void *devp, struct serial_console_data *scdp) -{ - int n; - unsigned long reg_phys; - - n = getprop(devp, "virtual-reg", ®_base, sizeof(reg_base)); - if (n != sizeof(reg_base)) { - if (!dt_xlate_reg(devp, 0, ®_phys, NULL)) - return -1; - - reg_base = (void *)reg_phys; - } - - scdp->open = uartlite_open; - scdp->putc = uartlite_putc; - scdp->getc = uartlite_getc; - scdp->tstc = uartlite_tstc; - scdp->close = NULL; - return 0; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ugecon.c b/ANDROID_3.4.5/arch/powerpc/boot/ugecon.c deleted file mode 100644 index 8f2a6b31..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ugecon.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * arch/powerpc/boot/ugecon.c - * - * USB Gecko bootwrapper console. - * Copyright (C) 2008-2009 The GameCube Linux Team - * Copyright (C) 2008,2009 Albert Herranz - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - */ - -#include <stddef.h> -#include "stdio.h" -#include "types.h" -#include "io.h" -#include "ops.h" - - -#define EXI_CLK_32MHZ 5 - -#define EXI_CSR 0x00 -#define EXI_CSR_CLKMASK (0x7<<4) -#define EXI_CSR_CLK_32MHZ (EXI_CLK_32MHZ<<4) -#define EXI_CSR_CSMASK (0x7<<7) -#define EXI_CSR_CS_0 (0x1<<7) /* Chip Select 001 */ - -#define EXI_CR 0x0c -#define EXI_CR_TSTART (1<<0) -#define EXI_CR_WRITE (1<<2) -#define EXI_CR_READ_WRITE (2<<2) -#define EXI_CR_TLEN(len) (((len)-1)<<4) - -#define EXI_DATA 0x10 - - -/* virtual address base for input/output, retrieved from device tree */ -static void *ug_io_base; - - -static u32 ug_io_transaction(u32 in) -{ - u32 *csr_reg = ug_io_base + EXI_CSR; - u32 *data_reg = ug_io_base + EXI_DATA; - u32 *cr_reg = ug_io_base + EXI_CR; - u32 csr, data, cr; - - /* select */ - csr = EXI_CSR_CLK_32MHZ | EXI_CSR_CS_0; - out_be32(csr_reg, csr); - - /* read/write */ - data = in; - out_be32(data_reg, data); - cr = EXI_CR_TLEN(2) | EXI_CR_READ_WRITE | EXI_CR_TSTART; - out_be32(cr_reg, cr); - - while (in_be32(cr_reg) & EXI_CR_TSTART) - barrier(); - - /* deselect */ - out_be32(csr_reg, 0); - - data = in_be32(data_reg); - return data; -} - -static int ug_is_txfifo_ready(void) -{ - return ug_io_transaction(0xc0000000) & 0x04000000; -} - -static void ug_raw_putc(char ch) -{ - ug_io_transaction(0xb0000000 | (ch << 20)); -} - -static void ug_putc(char ch) -{ - int count = 16; - - if (!ug_io_base) - return; - - while (!ug_is_txfifo_ready() && count--) - barrier(); - if (count >= 0) - ug_raw_putc(ch); -} - -void ug_console_write(const char *buf, int len) -{ - char *b = (char *)buf; - - while (len--) { - if (*b == '\n') - ug_putc('\r'); - ug_putc(*b++); - } -} - -static int ug_is_adapter_present(void) -{ - if (!ug_io_base) - return 0; - return ug_io_transaction(0x90000000) == 0x04700000; -} - -static void *ug_grab_exi_io_base(void) -{ - u32 v; - void *devp; - - devp = find_node_by_compatible(NULL, "nintendo,flipper-exi"); - if (devp == NULL) - goto err_out; - if (getprop(devp, "virtual-reg", &v, sizeof(v)) != sizeof(v)) - goto err_out; - - return (void *)v; - -err_out: - return NULL; -} - -void *ug_probe(void) -{ - void *exi_io_base; - int i; - - exi_io_base = ug_grab_exi_io_base(); - if (!exi_io_base) - return NULL; - - /* look for a usbgecko on memcard slots A and B */ - for (i = 0; i < 2; i++) { - ug_io_base = exi_io_base + 0x14 * i; - if (ug_is_adapter_present()) - break; - } - if (i == 2) - ug_io_base = NULL; - return ug_io_base; -} - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/ugecon.h b/ANDROID_3.4.5/arch/powerpc/boot/ugecon.h deleted file mode 100644 index 43737539..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/ugecon.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * arch/powerpc/boot/ugecon.h - * - * USB Gecko early bootwrapper console. - * Copyright (C) 2008-2009 The GameCube Linux Team - * Copyright (C) 2008,2009 Albert Herranz - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - */ - -#ifndef __UGECON_H -#define __UGECON_H - -extern void *ug_probe(void); - -extern void ug_putc(char ch); -extern void ug_console_write(const char *buf, int len); - -#endif /* __UGECON_H */ - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/util.S b/ANDROID_3.4.5/arch/powerpc/boot/util.S deleted file mode 100644 index 427ddfc1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/util.S +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Copied from <file:arch/powerpc/kernel/misc_32.S> - * - * This file contains miscellaneous low-level functions. - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Largely rewritten by Cort Dougan (cort@cs.nmt.edu) - * and Paul Mackerras. - * - * kexec bits: - * Copyright (C) 2002-2003 Eric Biederman <ebiederm@xmission.com> - * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ -#include "ppc_asm.h" - -#define SPRN_PVR 0x11F /* Processor Version Register */ - - .text - -/* udelay (on non-601 processors) needs to know the period of the - * timebase in nanoseconds. This used to be hardcoded to be 60ns - * (period of 66MHz/4). Now a variable is used that is initialized to - * 60 for backward compatibility, but it can be overridden as necessary - * with code something like this: - * extern unsigned long timebase_period_ns; - * timebase_period_ns = 1000000000 / bd->bi_tbfreq; - */ - .data - .globl timebase_period_ns -timebase_period_ns: - .long 60 - - .text -/* - * Delay for a number of microseconds - */ - .globl udelay -udelay: - mfspr r4,SPRN_PVR - srwi r4,r4,16 - cmpwi 0,r4,1 /* 601 ? */ - bne .udelay_not_601 -00: li r0,86 /* Instructions / microsecond? */ - mtctr r0 -10: addi r0,r0,0 /* NOP */ - bdnz 10b - subic. r3,r3,1 - bne 00b - blr - -.udelay_not_601: - mulli r4,r3,1000 /* nanoseconds */ - /* Change r4 to be the number of ticks using: - * (nanoseconds + (timebase_period_ns - 1 )) / timebase_period_ns - * timebase_period_ns defaults to 60 (16.6MHz) */ - mflr r5 - bl 0f -0: mflr r6 - mtlr r5 - lis r5,0b@ha - addi r5,r5,0b@l - subf r5,r5,r6 /* In case we're relocated */ - addis r5,r5,timebase_period_ns@ha - lwz r5,timebase_period_ns@l(r5) - add r4,r4,r5 - addi r4,r4,-1 - divw r4,r4,r5 /* BUS ticks */ -1: mftbu r5 - mftb r6 - mftbu r7 - cmpw 0,r5,r7 - bne 1b /* Get [synced] base time */ - addc r9,r6,r4 /* Compute end time */ - addze r8,r5 -2: mftbu r5 - cmpw 0,r5,r8 - blt 2b - bgt 3f - mftb r6 - cmpw 0,r6,r9 - blt 2b -3: blr diff --git a/ANDROID_3.4.5/arch/powerpc/boot/virtex.c b/ANDROID_3.4.5/arch/powerpc/boot/virtex.c deleted file mode 100644 index f622805f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/virtex.c +++ /dev/null @@ -1,100 +0,0 @@ -/* - * The platform specific code for virtex devices since a boot loader is not - * always used. - * - * (C) Copyright 2008 Xilinx, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ops.h" -#include "io.h" -#include "stdio.h" - -#define UART_DLL 0 /* Out: Divisor Latch Low */ -#define UART_DLM 1 /* Out: Divisor Latch High */ -#define UART_FCR 2 /* Out: FIFO Control Register */ -#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ -#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ -#define UART_LCR 3 /* Out: Line Control Register */ -#define UART_MCR 4 /* Out: Modem Control Register */ -#define UART_MCR_RTS 0x02 /* RTS complement */ -#define UART_MCR_DTR 0x01 /* DTR complement */ -#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ -#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ - -static int virtex_ns16550_console_init(void *devp) -{ - unsigned char *reg_base; - u32 reg_shift, reg_offset, clk, spd; - u16 divisor; - int n; - - if (dt_get_virtual_reg(devp, (void **)®_base, 1) < 1) - return -1; - - n = getprop(devp, "reg-offset", ®_offset, sizeof(reg_offset)); - if (n == sizeof(reg_offset)) - reg_base += reg_offset; - - n = getprop(devp, "reg-shift", ®_shift, sizeof(reg_shift)); - if (n != sizeof(reg_shift)) - reg_shift = 0; - - n = getprop(devp, "current-speed", (void *)&spd, sizeof(spd)); - if (n != sizeof(spd)) - spd = 9600; - - /* should there be a default clock rate?*/ - n = getprop(devp, "clock-frequency", (void *)&clk, sizeof(clk)); - if (n != sizeof(clk)) - return -1; - - divisor = clk / (16 * spd); - - /* Access baud rate */ - out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_DLAB); - - /* Baud rate based on input clock */ - out_8(reg_base + (UART_DLL << reg_shift), divisor & 0xFF); - out_8(reg_base + (UART_DLM << reg_shift), divisor >> 8); - - /* 8 data, 1 stop, no parity */ - out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_WLEN8); - - /* RTS/DTR */ - out_8(reg_base + (UART_MCR << reg_shift), UART_MCR_RTS | UART_MCR_DTR); - - /* Clear transmitter and receiver */ - out_8(reg_base + (UART_FCR << reg_shift), - UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR); - return 0; -} - -/* For virtex, the kernel may be loaded without using a bootloader and if so - some UARTs need more setup than is provided in the normal console init -*/ -int platform_specific_init(void) -{ - void *devp; - char devtype[MAX_PROP_LEN]; - char path[MAX_PATH_LEN]; - - devp = finddevice("/chosen"); - if (devp == NULL) - return -1; - - if (getprop(devp, "linux,stdout-path", path, MAX_PATH_LEN) > 0) { - devp = finddevice(path); - if (devp == NULL) - return -1; - - if ((getprop(devp, "device_type", devtype, sizeof(devtype)) > 0) - && !strcmp(devtype, "serial") - && (dt_is_compatible(devp, "ns16550"))) - virtex_ns16550_console_init(devp); - } - return 0; -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/virtex405-head.S b/ANDROID_3.4.5/arch/powerpc/boot/virtex405-head.S deleted file mode 100644 index 3edb13f9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/virtex405-head.S +++ /dev/null @@ -1,30 +0,0 @@ -#include "ppc_asm.h" - - .text - .global _zimage_start -_zimage_start: - - /* PPC errata 213: needed by Virtex-4 FX */ - mfccr0 0 - oris 0,0,0x50000000@h - mtccr0 0 - - /* - * Invalidate the data cache if the data cache is turned off. - * - The 405 core does not invalidate the data cache on power-up - * or reset but does turn off the data cache. We cannot assume - * that the cache contents are valid. - * - If the data cache is turned on this must have been done by - * a bootloader and we assume that the cache contents are - * valid. - */ - mfdccr r9 - cmplwi r9,0 - bne 2f - lis r9,0 - li r8,256 - mtctr r8 -1: dccci r0,r9 - addi r9,r9,0x20 - bdnz 1b -2: b _zimage_start_lib diff --git a/ANDROID_3.4.5/arch/powerpc/boot/wii-head.S b/ANDROID_3.4.5/arch/powerpc/boot/wii-head.S deleted file mode 100644 index edd79b83..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/wii-head.S +++ /dev/null @@ -1,142 +0,0 @@ -/* - * arch/powerpc/boot/wii-head.S - * - * Nintendo Wii bootwrapper entry. - * Copyright (C) 2008-2009 The GameCube Linux Team - * Copyright (C) 2008,2009 Albert Herranz - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - */ - -#include "ppc_asm.h" - -/* - * The entry code does no assumptions regarding: - * - if the data and instruction caches are enabled or not - * - if the MMU is enabled or not - * - if the high BATs are enabled or not - * - * We enable the high BATs, enable the caches if not already enabled, - * enable the MMU with an identity mapping scheme and jump to the start code. - */ - - .text - - .globl _zimage_start -_zimage_start: - - /* turn the MMU off */ - mfmsr 9 - rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */ - bcl 20, 31, 1f -1: - mflr 8 - clrlwi 8, 8, 3 /* convert to a real address */ - addi 8, 8, _mmu_off - 1b - mtsrr0 8 - mtsrr1 9 - rfi -_mmu_off: - /* MMU disabled */ - - /* setup BATs */ - isync - li 8, 0 - mtspr 0x210, 8 /* IBAT0U */ - mtspr 0x212, 8 /* IBAT1U */ - mtspr 0x214, 8 /* IBAT2U */ - mtspr 0x216, 8 /* IBAT3U */ - mtspr 0x218, 8 /* DBAT0U */ - mtspr 0x21a, 8 /* DBAT1U */ - mtspr 0x21c, 8 /* DBAT2U */ - mtspr 0x21e, 8 /* DBAT3U */ - - mtspr 0x230, 8 /* IBAT4U */ - mtspr 0x232, 8 /* IBAT5U */ - mtspr 0x234, 8 /* IBAT6U */ - mtspr 0x236, 8 /* IBAT7U */ - mtspr 0x238, 8 /* DBAT4U */ - mtspr 0x23a, 8 /* DBAT5U */ - mtspr 0x23c, 8 /* DBAT6U */ - mtspr 0x23e, 8 /* DBAT7U */ - - li 8, 0x01ff /* first 16MiB */ - li 9, 0x0002 /* rw */ - mtspr 0x211, 9 /* IBAT0L */ - mtspr 0x210, 8 /* IBAT0U */ - mtspr 0x219, 9 /* DBAT0L */ - mtspr 0x218, 8 /* DBAT0U */ - - lis 8, 0x0c00 /* I/O mem */ - ori 8, 8, 0x3ff /* 32MiB */ - lis 9, 0x0c00 - ori 9, 9, 0x002a /* uncached, guarded, rw */ - mtspr 0x21b, 9 /* DBAT1L */ - mtspr 0x21a, 8 /* DBAT1U */ - - lis 8, 0x0100 /* next 8MiB */ - ori 8, 8, 0x00ff /* 8MiB */ - lis 9, 0x0100 - ori 9, 9, 0x0002 /* rw */ - mtspr 0x215, 9 /* IBAT2L */ - mtspr 0x214, 8 /* IBAT2U */ - mtspr 0x21d, 9 /* DBAT2L */ - mtspr 0x21c, 8 /* DBAT2U */ - - lis 8, 0x1000 /* MEM2 */ - ori 8, 8, 0x07ff /* 64MiB */ - lis 9, 0x1000 - ori 9, 9, 0x0002 /* rw */ - mtspr 0x216, 8 /* IBAT3U */ - mtspr 0x217, 9 /* IBAT3L */ - mtspr 0x21e, 8 /* DBAT3U */ - mtspr 0x21f, 9 /* DBAT3L */ - - /* enable the high BATs */ - mfspr 8, 0x3f3 /* HID4 */ - oris 8, 8, 0x0200 - mtspr 0x3f3, 8 /* HID4 */ - - /* enable and invalidate the caches if not already enabled */ - mfspr 8, 0x3f0 /* HID0 */ - andi. 0, 8, (1<<15) /* HID0_ICE */ - bne 1f - ori 8, 8, (1<<15)|(1<<11) /* HID0_ICE|HID0_ICFI*/ -1: - andi. 0, 8, (1<<14) /* HID0_DCE */ - bne 1f - ori 8, 8, (1<<14)|(1<<10) /* HID0_DCE|HID0_DCFI*/ -1: - mtspr 0x3f0, 8 /* HID0 */ - isync - - /* initialize arguments */ - li 3, 0 - li 4, 0 - li 5, 0 - - /* turn the MMU on */ - bcl 20, 31, 1f -1: - mflr 8 - addi 8, 8, _mmu_on - 1b - mfmsr 9 - ori 9, 9, (1<<4)|(1<<5) /* MSR_DR|MSR_IR */ - mtsrr0 8 - mtsrr1 9 - sync - rfi -_mmu_on: - /* turn on the front blue led (aka: yay! we got here!) */ - lis 8, 0x0d00 - ori 8, 8, 0x00c0 - lwz 9, 0(8) - ori 9, 9, 0x20 - stw 9, 0(8) - - b _zimage_start_lib - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/wii.c b/ANDROID_3.4.5/arch/powerpc/boot/wii.c deleted file mode 100644 index 2ebaec03..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/wii.c +++ /dev/null @@ -1,158 +0,0 @@ -/* - * arch/powerpc/boot/wii.c - * - * Nintendo Wii bootwrapper support - * Copyright (C) 2008-2009 The GameCube Linux Team - * Copyright (C) 2008,2009 Albert Herranz - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - */ - -#include <stddef.h> -#include "stdio.h" -#include "types.h" -#include "io.h" -#include "ops.h" - -#include "ugecon.h" - -BSS_STACK(8192); - -#define HW_REG(x) ((void *)(x)) - -#define EXI_CTRL HW_REG(0x0d800070) -#define EXI_CTRL_ENABLE (1<<0) - -#define MEM2_TOP (0x10000000 + 64*1024*1024) -#define FIRMWARE_DEFAULT_SIZE (12*1024*1024) - - -struct mipc_infohdr { - char magic[3]; - u8 version; - u32 mem2_boundary; - u32 ipc_in; - size_t ipc_in_size; - u32 ipc_out; - size_t ipc_out_size; -}; - -static int mipc_check_address(u32 pa) -{ - /* only MEM2 addresses */ - if (pa < 0x10000000 || pa > 0x14000000) - return -EINVAL; - return 0; -} - -static struct mipc_infohdr *mipc_get_infohdr(void) -{ - struct mipc_infohdr **hdrp, *hdr; - - /* 'mini' header pointer is the last word of MEM2 memory */ - hdrp = (struct mipc_infohdr **)0x13fffffc; - if (mipc_check_address((u32)hdrp)) { - printf("mini: invalid hdrp %08X\n", (u32)hdrp); - hdr = NULL; - goto out; - } - - hdr = *hdrp; - if (mipc_check_address((u32)hdr)) { - printf("mini: invalid hdr %08X\n", (u32)hdr); - hdr = NULL; - goto out; - } - if (memcmp(hdr->magic, "IPC", 3)) { - printf("mini: invalid magic\n"); - hdr = NULL; - goto out; - } - -out: - return hdr; -} - -static int mipc_get_mem2_boundary(u32 *mem2_boundary) -{ - struct mipc_infohdr *hdr; - int error; - - hdr = mipc_get_infohdr(); - if (!hdr) { - error = -1; - goto out; - } - - if (mipc_check_address(hdr->mem2_boundary)) { - printf("mini: invalid mem2_boundary %08X\n", - hdr->mem2_boundary); - error = -EINVAL; - goto out; - } - *mem2_boundary = hdr->mem2_boundary; - error = 0; -out: - return error; - -} - -static void platform_fixups(void) -{ - void *mem; - u32 reg[4]; - u32 mem2_boundary; - int len; - int error; - - mem = finddevice("/memory"); - if (!mem) - fatal("Can't find memory node\n"); - - /* two ranges of (address, size) words */ - len = getprop(mem, "reg", reg, sizeof(reg)); - if (len != sizeof(reg)) { - /* nothing to do */ - goto out; - } - - /* retrieve MEM2 boundary from 'mini' */ - error = mipc_get_mem2_boundary(&mem2_boundary); - if (error) { - /* if that fails use a sane value */ - mem2_boundary = MEM2_TOP - FIRMWARE_DEFAULT_SIZE; - } - - if (mem2_boundary > reg[2] && mem2_boundary < reg[2] + reg[3]) { - reg[3] = mem2_boundary - reg[2]; - printf("top of MEM2 @ %08X\n", reg[2] + reg[3]); - setprop(mem, "reg", reg, sizeof(reg)); - } - -out: - return; -} - -void platform_init(unsigned long r3, unsigned long r4, unsigned long r5) -{ - u32 heapsize = 24*1024*1024 - (u32)_end; - - simple_alloc_init(_end, heapsize, 32, 64); - fdt_init(_dtb_start); - - /* - * 'mini' boots the Broadway processor with EXI disabled. - * We need it enabled before probing for the USB Gecko. - */ - out_be32(EXI_CTRL, in_be32(EXI_CTRL) | EXI_CTRL_ENABLE); - - if (ug_probe()) - console_ops.write = ug_console_write; - - platform_ops.fixups = platform_fixups; -} - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/wrapper b/ANDROID_3.4.5/arch/powerpc/boot/wrapper deleted file mode 100755 index 6761c746..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/wrapper +++ /dev/null @@ -1,442 +0,0 @@ -#!/bin/sh - -# Copyright (C) 2006 Paul Mackerras, IBM Corporation <paulus@samba.org> -# This program may be used under the terms of version 2 of the GNU -# General Public License. - -# This script takes a kernel binary and optionally an initrd image -# and/or a device-tree blob, and creates a bootable zImage for a -# given platform. - -# Options: -# -o zImage specify output file -# -p platform specify platform (links in $platform.o) -# -i initrd specify initrd file -# -d devtree specify device-tree blob -# -s tree.dts specify device-tree source file (needs dtc installed) -# -c cache $kernel.strip.gz (use if present & newer, else make) -# -C prefix specify command prefix for cross-building tools -# (strip, objcopy, ld) -# -D dir specify directory containing data files used by script -# (default ./arch/powerpc/boot) -# -W dir specify working directory for temporary files (default .) - -# Stop execution if any command fails -set -e - -# Allow for verbose output -if [ "$V" = 1 ]; then - set -x -fi - -# defaults -kernel= -ofile=zImage -platform=of -initrd= -dtb= -dts= -cacheit= -binary= -gzip=.gz -pie= - -# cross-compilation prefix -CROSS= - -# mkimage wrapper script -MKIMAGE=$srctree/scripts/mkuboot.sh - -# directory for object and other files used by this script -object=arch/powerpc/boot -objbin=$object -dtc=scripts/dtc/dtc - -# directory for working files -tmpdir=. - -usage() { - echo 'Usage: wrapper [-o output] [-p platform] [-i initrd]' >&2 - echo ' [-d devtree] [-s tree.dts] [-c] [-C cross-prefix]' >&2 - echo ' [-D datadir] [-W workingdir] [--no-gzip] [vmlinux]' >&2 - exit 1 -} - -while [ "$#" -gt 0 ]; do - case "$1" in - -o) - shift - [ "$#" -gt 0 ] || usage - ofile="$1" - ;; - -p) - shift - [ "$#" -gt 0 ] || usage - platform="$1" - ;; - -i) - shift - [ "$#" -gt 0 ] || usage - initrd="$1" - ;; - -d) - shift - [ "$#" -gt 0 ] || usage - dtb="$1" - ;; - -s) - shift - [ "$#" -gt 0 ] || usage - dts="$1" - ;; - -c) - cacheit=y - ;; - -C) - shift - [ "$#" -gt 0 ] || usage - CROSS="$1" - ;; - -D) - shift - [ "$#" -gt 0 ] || usage - object="$1" - objbin="$1" - ;; - -W) - shift - [ "$#" -gt 0 ] || usage - tmpdir="$1" - ;; - --no-gzip) - gzip= - ;; - -?) - usage - ;; - *) - [ -z "$kernel" ] || usage - kernel="$1" - ;; - esac - shift -done - -if [ -n "$dts" ]; then - if [ ! -r "$dts" -a -r "$object/dts/$dts" ]; then - dts="$object/dts/$dts" - fi - if [ -z "$dtb" ]; then - dtb="$platform.dtb" - fi - $dtc -O dtb -o "$dtb" -b 0 "$dts" -fi - -if [ -z "$kernel" ]; then - kernel=vmlinux -fi - -platformo=$object/"$platform".o -lds=$object/zImage.lds -ext=strip -objflags=-S -tmp=$tmpdir/zImage.$$.o -ksection=.kernel:vmlinux.strip -isection=.kernel:initrd -link_address='0x400000' -make_space=y - -case "$platform" in -pseries) - platformo=$object/of.o - link_address='0x4000000' - ;; -maple) - platformo=$object/of.o - link_address='0x400000' - ;; -pmac|chrp) - platformo=$object/of.o - ;; -coff) - platformo="$object/crt0.o $object/of.o" - lds=$object/zImage.coff.lds - link_address='0x500000' - pie= - ;; -miboot|uboot*) - # miboot and U-boot want just the bare bits, not an ELF binary - ext=bin - objflags="-O binary" - tmp="$ofile" - ksection=image - isection=initrd - ;; -cuboot*) - binary=y - gzip= - case "$platform" in - *-mpc866ads|*-mpc885ads|*-adder875*|*-ep88xc) - platformo=$object/cuboot-8xx.o - ;; - *5200*|*-motionpro) - platformo=$object/cuboot-52xx.o - ;; - *-pq2fads|*-ep8248e|*-mpc8272*|*-storcenter) - platformo=$object/cuboot-pq2.o - ;; - *-mpc824*) - platformo=$object/cuboot-824x.o - ;; - *-mpc83*|*-asp834x*) - platformo=$object/cuboot-83xx.o - ;; - *-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*) - platformo=$object/cuboot-85xx-cpm2.o - ;; - *-mpc85*|*-tqm85*|*-sbc85*) - platformo=$object/cuboot-85xx.o - ;; - *-amigaone) - link_address='0x800000' - ;; - esac - ;; -ps3) - platformo="$object/ps3-head.o $object/ps3-hvcall.o $object/ps3.o" - lds=$object/zImage.ps3.lds - gzip= - ext=bin - objflags="-O binary --set-section-flags=.bss=contents,alloc,load,data" - ksection=.kernel:vmlinux.bin - isection=.kernel:initrd - link_address='' - make_space=n - pie= - ;; -ep88xc|ep405|ep8248e) - platformo="$object/fixed-head.o $object/$platform.o" - binary=y - ;; -adder875-redboot) - platformo="$object/fixed-head.o $object/redboot-8xx.o" - binary=y - ;; -simpleboot-virtex405-*) - platformo="$object/virtex405-head.o $object/simpleboot.o $object/virtex.o" - binary=y - ;; -simpleboot-virtex440-*) - platformo="$object/fixed-head.o $object/simpleboot.o $object/virtex.o" - binary=y - ;; -simpleboot-*) - platformo="$object/fixed-head.o $object/simpleboot.o" - binary=y - ;; -asp834x-redboot) - platformo="$object/fixed-head.o $object/redboot-83xx.o" - binary=y - ;; -xpedite52*) - link_address='0x1400000' - platformo=$object/cuboot-85xx.o - ;; -gamecube|wii) - link_address='0x600000' - platformo="$object/$platform-head.o $object/$platform.o" - ;; -treeboot-currituck) - link_address='0x1000000' - ;; -treeboot-iss4xx-mpic) - platformo="$object/treeboot-iss4xx.o" - ;; -epapr) - link_address='0x20000000' - pie=-pie - ;; -esac - -vmz="$tmpdir/`basename \"$kernel\"`.$ext" -if [ -z "$cacheit" -o ! -f "$vmz$gzip" -o "$vmz$gzip" -ot "$kernel" ]; then - ${CROSS}objcopy $objflags "$kernel" "$vmz.$$" - - strip_size=$(stat -c %s $vmz.$$) - - if [ -n "$gzip" ]; then - gzip -n -f -9 "$vmz.$$" - fi - - if [ -n "$cacheit" ]; then - mv -f "$vmz.$$$gzip" "$vmz$gzip" - else - vmz="$vmz.$$" - fi -else - # Calculate the vmlinux.strip size - ${CROSS}objcopy $objflags "$kernel" "$vmz.$$" - strip_size=$(stat -c %s $vmz.$$) - rm -f $vmz.$$ -fi - -if [ "$make_space" = "y" ]; then - # Round the size to next higher MB limit - round_size=$(((strip_size + 0xfffff) & 0xfff00000)) - - round_size=0x$(printf "%x" $round_size) - link_addr=$(printf "%d" $link_address) - - if [ $link_addr -lt $strip_size ]; then - echo "INFO: Uncompressed kernel (size 0x$(printf "%x\n" $strip_size))" \ - "overlaps the address of the wrapper($link_address)" - echo "INFO: Fixing the link_address of wrapper to ($round_size)" - link_address=$round_size - fi -fi - -vmz="$vmz$gzip" - -# Extract kernel version information, some platforms want to include -# it in the image header -version=`${CROSS}strings "$kernel" | grep '^Linux version [-0-9.]' | \ - cut -d' ' -f3` -if [ -n "$version" ]; then - uboot_version="-n Linux-$version" -fi - -# physical offset of kernel image -membase=`${CROSS}objdump -p "$kernel" | grep -m 1 LOAD | awk '{print $7}'` - -case "$platform" in -uboot) - rm -f "$ofile" - ${MKIMAGE} -A ppc -O linux -T kernel -C gzip -a $membase -e $membase \ - $uboot_version -d "$vmz" "$ofile" - if [ -z "$cacheit" ]; then - rm -f "$vmz" - fi - exit 0 - ;; -uboot-obs600) - rm -f "$ofile" - # obs600 wants a multi image with an initrd, so we need to put a fake - # one in even when building a "normal" image. - if [ -n "$initrd" ]; then - real_rd="$initrd" - else - real_rd=`mktemp` - echo "\0" >>"$real_rd" - fi - ${MKIMAGE} -A ppc -O linux -T multi -C gzip -a $membase -e $membase \ - $uboot_version -d "$vmz":"$real_rd":"$dtb" "$ofile" - if [ -z "$initrd" ]; then - rm -f "$real_rd" - fi - if [ -z "$cacheit" ]; then - rm -f "$vmz" - fi - exit 0 - ;; -esac - -addsec() { - ${CROSS}objcopy $4 $1 \ - --add-section=$3="$2" \ - --set-section-flags=$3=contents,alloc,load,readonly,data -} - -addsec $tmp "$vmz" $ksection $object/empty.o -if [ -z "$cacheit" ]; then - rm -f "$vmz" -fi - -if [ -n "$initrd" ]; then - addsec $tmp "$initrd" $isection -fi - -if [ -n "$dtb" ]; then - addsec $tmp "$dtb" .kernel:dtb - if [ -n "$dts" ]; then - rm $dtb - fi -fi - -if [ "$platform" != "miboot" ]; then - if [ -n "$link_address" ] ; then - text_start="-Ttext $link_address" - fi - ${CROSS}ld -m elf32ppc -T $lds $text_start $pie -o "$ofile" \ - $platformo $tmp $object/wrapper.a - rm $tmp -fi - -# Some platforms need the zImage's entry point and base address -base=0x`${CROSS}nm "$ofile" | grep ' _start$' | cut -d' ' -f1` -entry=`${CROSS}objdump -f "$ofile" | grep '^start address ' | cut -d' ' -f3` - -if [ -n "$binary" ]; then - mv "$ofile" "$ofile".elf - ${CROSS}objcopy -O binary "$ofile".elf "$ofile" -fi - -# post-processing needed for some platforms -case "$platform" in -pseries|chrp|maple) - $objbin/addnote "$ofile" - ;; -coff) - ${CROSS}objcopy -O aixcoff-rs6000 --set-start "$entry" "$ofile" - $objbin/hack-coff "$ofile" - ;; -cuboot*) - gzip -n -f -9 "$ofile" - ${MKIMAGE} -A ppc -O linux -T kernel -C gzip -a "$base" -e "$entry" \ - $uboot_version -d "$ofile".gz "$ofile" - ;; -treeboot*) - mv "$ofile" "$ofile.elf" - $objbin/mktree "$ofile.elf" "$ofile" "$base" "$entry" - if [ -z "$cacheit" ]; then - rm -f "$ofile.elf" - fi - exit 0 - ;; -ps3) - # The ps3's loader supports loading a gzipped binary image from flash - # rom to ram addr zero. The loader then enters the system reset - # vector at addr 0x100. A bootwrapper overlay is used to arrange for - # a binary image of the kernel to be at addr zero, and yet have a - # suitable bootwrapper entry at 0x100. To construct the final rom - # image 512 bytes from offset 0x100 is copied to the bootwrapper - # place holder at symbol __system_reset_kernel. The 512 bytes of the - # bootwrapper entry code at symbol __system_reset_overlay is then - # copied to offset 0x100. At runtime the bootwrapper program copies - # the data at __system_reset_kernel back to addr 0x100. - - system_reset_overlay=0x`${CROSS}nm "$ofile" \ - | grep ' __system_reset_overlay$' \ - | cut -d' ' -f1` - system_reset_overlay=`printf "%d" $system_reset_overlay` - system_reset_kernel=0x`${CROSS}nm "$ofile" \ - | grep ' __system_reset_kernel$' \ - | cut -d' ' -f1` - system_reset_kernel=`printf "%d" $system_reset_kernel` - overlay_dest="256" - overlay_size="512" - - ${CROSS}objcopy -O binary "$ofile" "$ofile.bin" - - dd if="$ofile.bin" of="$ofile.bin" conv=notrunc \ - skip=$overlay_dest seek=$system_reset_kernel \ - count=$overlay_size bs=1 - - dd if="$ofile.bin" of="$ofile.bin" conv=notrunc \ - skip=$system_reset_overlay seek=$overlay_dest \ - count=$overlay_size bs=1 - - odir="$(dirname "$ofile.bin")" - rm -f "$odir/otheros.bld" - gzip -n --force -9 --stdout "$ofile.bin" > "$odir/otheros.bld" - ;; -esac diff --git a/ANDROID_3.4.5/arch/powerpc/boot/zImage.coff.lds.S b/ANDROID_3.4.5/arch/powerpc/boot/zImage.coff.lds.S deleted file mode 100644 index de4c9e3c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/zImage.coff.lds.S +++ /dev/null @@ -1,49 +0,0 @@ -OUTPUT_ARCH(powerpc:common) -ENTRY(_zimage_start_opd) -EXTERN(_zimage_start_opd) -SECTIONS -{ - .text : - { - _start = .; - *(.text) - *(.fixup) - _etext = .; - } - . = ALIGN(4096); - .data : - { - *(.rodata*) - *(.data*) - *(__builtin_*) - *(.sdata*) - *(.got2) - - _dtb_start = .; - *(.kernel:dtb) - _dtb_end = .; - - _vmlinux_start = .; - *(.kernel:vmlinux.strip) - _vmlinux_end = .; - - _initrd_start = .; - *(.kernel:initrd) - _initrd_end = .; - } - - . = ALIGN(4096); - _edata = .; - __bss_start = .; - .bss : - { - *(.sbss) - *(.bss) - } - _end = . ; - - /DISCARD/ : - { - *(.comment) - } -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/zImage.lds.S b/ANDROID_3.4.5/arch/powerpc/boot/zImage.lds.S deleted file mode 100644 index 2bd8731f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/zImage.lds.S +++ /dev/null @@ -1,66 +0,0 @@ -OUTPUT_ARCH(powerpc:common) -ENTRY(_zimage_start) -EXTERN(_zimage_start) -SECTIONS -{ - .text : - { - _start = .; - *(.text) - *(.fixup) - _etext = .; - } - . = ALIGN(4096); - .data : - { - *(.rodata*) - *(.data*) - *(.sdata*) - *(.got2) - } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .dynamic : - { - __dynamic_start = .; - *(.dynamic) - } - .hash : { *(.hash) } - .interp : { *(.interp) } - .rela.dyn : { *(.rela*) } - - . = ALIGN(8); - .kernel:dtb : - { - _dtb_start = .; - *(.kernel:dtb) - _dtb_end = .; - } - - . = ALIGN(4096); - .kernel:vmlinux.strip : - { - _vmlinux_start = .; - *(.kernel:vmlinux.strip) - _vmlinux_end = .; - } - - . = ALIGN(4096); - .kernel:initrd : - { - _initrd_start = .; - *(.kernel:initrd) - _initrd_end = .; - } - - . = ALIGN(4096); - .bss : - { - _edata = .; - __bss_start = .; - *(.sbss) - *(.bss) - *(COMMON) - _end = . ; - } -} diff --git a/ANDROID_3.4.5/arch/powerpc/boot/zImage.ps3.lds.S b/ANDROID_3.4.5/arch/powerpc/boot/zImage.ps3.lds.S deleted file mode 100644 index aaa469c1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/zImage.ps3.lds.S +++ /dev/null @@ -1,50 +0,0 @@ -OUTPUT_ARCH(powerpc:common) -ENTRY(_zimage_start) -EXTERN(_zimage_start) -SECTIONS -{ - _vmlinux_start = .; - .kernel:vmlinux.bin : { *(.kernel:vmlinux.bin) } - _vmlinux_end = .; - - . = ALIGN(4096); - _dtb_start = .; - .kernel:dtb : { *(.kernel:dtb) } - _dtb_end = .; - - . = ALIGN(4096); - _initrd_start = .; - .kernel:initrd : { *(.kernel:initrd) } - _initrd_end = .; - - _start = .; - .text : - { - *(.text) - *(.fixup) - } - _etext = .; - . = ALIGN(4096); - .data : - { - *(.rodata*) - *(.data*) - *(.sdata*) - __got2_start = .; - *(.got2) - __got2_end = .; - } - - . = ALIGN(4096); - _edata = .; - - . = ALIGN(4096); - __bss_start = .; - .bss : - { - *(.sbss) - *(.bss) - } - . = ALIGN(4096); - _end = . ; -} |