1 files changed, 0 insertions, 98 deletions
diff --git a/ANDROID_3.4.5/arch/arm/kernel/head-nommu.S b/ANDROID_3.4.5/arch/arm/kernel/head-nommu.S
deleted file mode 100644
index 278cfc14..00000000
--- a/ANDROID_3.4.5/arch/arm/kernel/head-nommu.S
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- *  linux/arch/arm/kernel/head-nommu.S
- *
- *  Copyright (C) 1994-2002 Russell King
- *  Copyright (C) 2003-2006 Hyok S. Choi
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  Common kernel startup code (non-paged MM)
- *
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-
-#include <asm/assembler.h>
-#include <asm/ptrace.h>
-#include <asm/asm-offsets.h>
-#include <asm/cp15.h>
-#include <asm/thread_info.h>
-
-/*
- * Kernel startup entry point.
- * ---------------------------
- *
- * This is normally called from the decompressor code.  The requirements
- * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
- * r1 = machine nr.
- *
- * See linux/arch/arm/tools/mach-types for the complete list of machine
- * numbers for r1.
- *
- */
-	.arm
-
-	__HEAD
-ENTRY(stext)
-
- THUMB(	adr	r9, BSYM(1f)	)	@ Kernel is always entered in ARM.
- THUMB(	bx	r9		)	@ If this is a Thumb-2 kernel,
- THUMB(	.thumb			)	@ switch to Thumb now.
- THUMB(1:			)
-
-	setmode	PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
-						@ and irqs disabled
-#ifndef CONFIG_CPU_CP15
-	ldr	r9, =CONFIG_PROCESSOR_ID
-#else
-	mrc	p15, 0, r9, c0, c0		@ get processor id
-#endif
-	bl	__lookup_processor_type		@ r5=procinfo r9=cpuid
-	movs	r10, r5				@ invalid processor (r5=0)?
-	beq	__error_p				@ yes, error 'p'
-
-	adr	lr, BSYM(__after_proc_init)	@ return (PIC) address
- ARM(	add	pc, r10, #PROCINFO_INITFUNC	)
- THUMB(	add	r12, r10, #PROCINFO_INITFUNC	)
- THUMB(	mov	pc, r12				)
-ENDPROC(stext)
-
-/*
- * Set the Control Register and Read the process ID.
- */
-__after_proc_init:
-#ifdef CONFIG_CPU_CP15
-	/*
-	 * CP15 system control register value returned in r0 from
-	 * the CPU init function.
-	 */
-#ifdef CONFIG_ALIGNMENT_TRAP
-	orr	r0, r0, #CR_A
-#else
-	bic	r0, r0, #CR_A
-#endif
-#ifdef CONFIG_CPU_DCACHE_DISABLE
-	bic	r0, r0, #CR_C
-#endif
-#ifdef CONFIG_CPU_BPREDICT_DISABLE
-	bic	r0, r0, #CR_Z
-#endif
-#ifdef CONFIG_CPU_ICACHE_DISABLE
-	bic	r0, r0, #CR_I
-#endif
-#ifdef CONFIG_CPU_HIGH_VECTOR
-	orr	r0, r0, #CR_V
-#else
-	bic	r0, r0, #CR_V
-#endif
-	mcr	p15, 0, r0, c1, c0, 0		@ write control reg
-#endif /* CONFIG_CPU_CP15 */
-
-	b	__mmap_switched			@ clear the BSS and jump
-						@ to start_kernel
-ENDPROC(__after_proc_init)
-	.ltorg
-
-#include "head-common.S"