1 files changed, 0 insertions, 117 deletions
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/omap3.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/omap3.dtsi
deleted file mode 100644
index c6121357..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/omap3.dtsi
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * Device Tree Source for OMAP3 SoC
- *
- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2.  This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	compatible = "ti,omap3430", "ti,omap3";
-
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		serial3 = &uart4;
-	};
-
-	cpus {
-		cpu@0 {
-			compatible = "arm,cortex-a8";
-		};
-	};
-
-	/*
-	 * The soc node represents the soc top level view. It is uses for IPs
-	 * that are not memory mapped in the MPU view or for the MPU itself.
-	 */
-	soc {
-		compatible = "ti,omap-infra";
-		mpu {
-			compatible = "ti,omap3-mpu";
-			ti,hwmods = "mpu";
-		};
-
-		iva {
-			compatible = "ti,iva2.2";
-			ti,hwmods = "iva";
-
-			dsp {
-				compatible = "ti,omap3-c64";
-			};
-		};
-	};
-
-	/*
-	 * XXX: Use a flat representation of the OMAP3 interconnect.
-	 * The real OMAP interconnect network is quite complex.
-	 * Since that will not bring real advantage to represent that in DT for
-	 * the moment, just use a fake OCP bus entry to represent the whole bus
-	 * hierarchy.
-	 */
-	ocp {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		ti,hwmods = "l3_main";
-
-		intc: interrupt-controller@48200000 {
-			compatible = "ti,omap2-intc";
-			interrupt-controller;
-			#interrupt-cells = <1>;
-			ti,intc-size = <96>;
-			reg = <0x48200000 0x1000>;
-		};
-
-		uart1: serial@4806a000 {
-			compatible = "ti,omap3-uart";
-			ti,hwmods = "uart1";
-			clock-frequency = <48000000>;
-		};
-
-		uart2: serial@4806c000 {
-			compatible = "ti,omap3-uart";
-			ti,hwmods = "uart2";
-			clock-frequency = <48000000>;
-		};
-
-		uart3: serial@49020000 {
-			compatible = "ti,omap3-uart";
-			ti,hwmods = "uart3";
-			clock-frequency = <48000000>;
-		};
-
-		uart4: serial@49042000 {
-			compatible = "ti,omap3-uart";
-			ti,hwmods = "uart4";
-			clock-frequency = <48000000>;
-		};
-
-		i2c1: i2c@48070000 {
-			compatible = "ti,omap3-i2c";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			ti,hwmods = "i2c1";
-		};
-
-		i2c2: i2c@48072000 {
-			compatible = "ti,omap3-i2c";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			ti,hwmods = "i2c2";
-		};
-
-		i2c3: i2c@48060000 {
-			compatible = "ti,omap3-i2c";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			ti,hwmods = "i2c3";
-		};
-	};
-};