Moved, renamed, and deleted files

The original directory structure was scattered and unorganized.
Changes are basically to make it look like kernel structure.

21 files changed, 44671 insertions, 0 deletions

diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/HalPwrSeqCmd.c b/drivers/net/wireless/rtl8188C_8192C/hal/HalPwrSeqCmd.c
new file mode 100755
index 00000000..c59bb664
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/HalPwrSeqCmd.c
@@ -0,0 +1,177 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/*++
+Copyright (c) Realtek Semiconductor Corp. All rights reserved.
+
+Module Name:
+	HalPwrSeqCmd.c
+
+Abstract:
+	Implement HW Power sequence configuration CMD handling routine for Realtek devices.
+
+Major Change History:
+	When       Who               What
+	---------- ---------------   -------------------------------
+	2011-10-26 Lucas            Modify to be compatible with SD4-CE driver.
+	2011-07-07 Roger            Create.
+
+--*/
+#include <HalPwrSeqCmd.h>
+#include <sdio_ops.h>
+
+
+//
+//	Description:
+//		This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC.
+//
+//	Assumption:
+//		We should follow specific format which was released from HW SD.
+//
+//	2011.07.07, added by Roger.
+//
+u8 HalPwrSeqCmdParsing(
+	PADAPTER		padapter,
+	u8				CutVersion,
+	u8				FabVersion,
+	u8				InterfaceType,
+	WLAN_PWR_CFG	PwrSeqCmd[])
+{
+	WLAN_PWR_CFG 	PwrCfgCmd = {0};
+	u8				bPollingBit = _FALSE;
+	u32				AryIdx = 0;
+	u8				value = 0;
+	u32				offset = 0;
+	u32				pollingCount = 0; // polling autoload done.
+	u32				maxPollingCnt = 5000;
+
+	do {
+		PwrCfgCmd = PwrSeqCmd[AryIdx];
+
+		RT_TRACE(_module_hal_init_c_ , _drv_info_,
+				 ("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n",
+					GET_PWR_CFG_OFFSET(PwrCfgCmd),
+					GET_PWR_CFG_CUT_MASK(PwrCfgCmd),
+					GET_PWR_CFG_FAB_MASK(PwrCfgCmd),
+					GET_PWR_CFG_INTF_MASK(PwrCfgCmd),
+					GET_PWR_CFG_BASE(PwrCfgCmd),
+					GET_PWR_CFG_CMD(PwrCfgCmd),
+					GET_PWR_CFG_MASK(PwrCfgCmd),
+					GET_PWR_CFG_VALUE(PwrCfgCmd)));
+
+		//2 Only Handle the command whose FAB, CUT, and Interface are matched
+		if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) &&
+			(GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) &&
+			(GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType))
+		{
+			switch (GET_PWR_CFG_CMD(PwrCfgCmd))
+			{
+				case PWR_CMD_READ:
+					RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n"));
+					break;
+
+				case PWR_CMD_WRITE:
+					RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n"));
+					offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
+
+#ifdef CONFIG_SDIO_HCI
+					//
+					// <Roger_Notes> We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface
+					// 2011.07.07.
+					//
+					if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
+					{
+						// Read Back SDIO Local value
+						value = SdioLocalCmd52Read1Byte(padapter, offset);
+
+						value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
+						value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
+
+						// Write Back SDIO Local value
+						SdioLocalCmd52Write1Byte(padapter, offset, value);
+					}
+					else
+#endif
+					{
+						// Read the value from system register
+						value = rtw_read8(padapter, offset);
+
+						value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
+						value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
+
+						// Write the value back to sytem register
+						rtw_write8(padapter, offset, value);
+					}
+					break;
+
+				case PWR_CMD_POLLING:
+					RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n"));
+
+					bPollingBit = _FALSE;
+					offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
+
+					do {
+#ifdef CONFIG_SDIO_HCI
+						if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
+							value = SdioLocalCmd52Read1Byte(padapter, offset);
+						else
+#endif
+							value = rtw_read8(padapter, offset);
+
+						value &= GET_PWR_CFG_MASK(PwrCfgCmd);
+						if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)))
+							bPollingBit = _TRUE;
+						else
+							rtw_udelay_os(10);
+
+						if (pollingCount++ > maxPollingCnt) {
+							RT_TRACE(_module_hal_init_c_ , _drv_err_, ("Fail to polling Offset[%#x]\n", offset));
+							return _FALSE;
+						}
+					} while (!bPollingBit);
+
+					break;
+
+				case PWR_CMD_DELAY:
+					RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n"));
+					if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
+						rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd));
+					else
+						rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000);
+					break;
+
+				case PWR_CMD_END:
+					// When this command is parsed, end the process
+					RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n"));
+					return _TRUE;
+					break;
+
+				default:
+					RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n"));
+					break;
+			}
+		}
+
+		AryIdx++;//Add Array Index
+	}while(1);
+
+	return _TRUE;
+}
+
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/hal_com.c b/drivers/net/wireless/rtl8188C_8192C/hal/hal_com.c
new file mode 100755
index 00000000..4dcafd65
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/hal_com.c
@@ -0,0 +1,371 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+
+#include <hal_intf.h>
+#include <hal_com.h>
+
+#ifdef CONFIG_RTL8192C
+#include <rtl8192c_hal.h>
+#endif
+#ifdef CONFIG_RTL8192D
+#include <rtl8192d_hal.h>
+#endif
+
+#define _HAL_COM_C_
+
+//============================================================
+// Global var
+//============================================================
+u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = {
+	0x7f8001fe, // 0, +6.0dB
+	0x788001e2, // 1, +5.5dB
+	0x71c001c7, // 2, +5.0dB
+	0x6b8001ae, // 3, +4.5dB
+	0x65400195, // 4, +4.0dB
+	0x5fc0017f, // 5, +3.5dB
+	0x5a400169, // 6, +3.0dB
+	0x55400155, // 7, +2.5dB
+	0x50800142, // 8, +2.0dB
+	0x4c000130, // 9, +1.5dB
+	0x47c0011f, // 10, +1.0dB
+	0x43c0010f, // 11, +0.5dB
+	0x40000100, // 12, +0dB
+	0x3c8000f2, // 13, -0.5dB
+	0x390000e4, // 14, -1.0dB
+	0x35c000d7, // 15, -1.5dB
+	0x32c000cb, // 16, -2.0dB
+	0x300000c0, // 17, -2.5dB
+	0x2d4000b5, // 18, -3.0dB
+	0x2ac000ab, // 19, -3.5dB
+	0x288000a2, // 20, -4.0dB
+	0x26000098, // 21, -4.5dB
+	0x24000090, // 22, -5.0dB
+	0x22000088, // 23, -5.5dB
+	0x20000080, // 24, -6.0dB
+	0x1e400079, // 25, -6.5dB
+	0x1c800072, // 26, -7.0dB
+	0x1b00006c, // 27. -7.5dB
+	0x19800066, // 28, -8.0dB
+	0x18000060, // 29, -8.5dB
+	0x16c0005b, // 30, -9.0dB
+	0x15800056, // 31, -9.5dB
+	0x14400051, // 32, -10.0dB
+	0x1300004c, // 33, -10.5dB
+	0x12000048, // 34, -11.0dB
+	0x11000044, // 35, -11.5dB
+	0x10000040, // 36, -12.0dB
+	0x0f00003c,// 37, -12.5dB
+	0x0e400039,// 38, -13.0dB    
+	0x0d800036,// 39, -13.5dB
+	0x0cc00033,// 40, -14.0dB
+	0x0c000030,// 41, -14.5dB
+	0x0b40002d,// 42, -15.0dB	
+};
+
+
+u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
+	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},	// 0, +0dB
+	{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},	// 1, -0.5dB
+	{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},	// 2, -1.0dB
+	{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},	// 3, -1.5dB
+	{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},	// 4, -2.0dB 
+	{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},	// 5, -2.5dB
+	{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},	// 6, -3.0dB
+	{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},	// 7, -3.5dB
+	{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},	// 8, -4.0dB 
+	{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},	// 9, -4.5dB
+	{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},	// 10, -5.0dB 
+	{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},	// 11, -5.5dB
+	{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},	// 12, -6.0dB 
+	{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},	// 13, -6.5dB
+	{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},	// 14, -7.0dB 
+	{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},	// 15, -7.5dB
+	{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},	// 16, -8.0dB 
+	{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},	// 17, -8.5dB
+	{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},	// 18, -9.0dB 
+	{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	// 19, -9.5dB
+	{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	// 20, -10.0dB
+	{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},	// 21, -10.5dB
+	{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},	// 22, -11.0dB
+	{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},	// 23, -11.5dB
+	{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},	// 24, -12.0dB
+	{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},	// 25, -12.5dB
+	{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},	// 26, -13.0dB
+	{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},	// 27, -13.5dB
+	{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},	// 28, -14.0dB
+	{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},	// 29, -14.5dB
+	{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},	// 30, -15.0dB
+	{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},	// 31, -15.5dB
+	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}	// 32, -16.0dB
+};
+
+
+u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= {
+	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},	// 0, +0dB	
+	{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},	// 1, -0.5dB 
+	{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},	// 2, -1.0dB  
+	{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},	// 3, -1.5dB
+	{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},	// 4, -2.0dB  
+	{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},	// 5, -2.5dB
+	{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},	// 6, -3.0dB  
+	{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},	// 7, -3.5dB  
+	{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},	// 8, -4.0dB  
+	{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},	// 9, -4.5dB
+	{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},	// 10, -5.0dB  
+	{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},	// 11, -5.5dB
+	{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},	// 12, -6.0dB  
+	{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},	// 13, -6.5dB 
+	{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},	// 14, -7.0dB  
+	{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},	// 15, -7.5dB
+	{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},	// 16, -8.0dB  
+	{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},	// 17, -8.5dB
+	{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},	// 18, -9.0dB  
+	{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	// 19, -9.5dB
+	{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	// 20, -10.0dB
+	{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},	// 21, -10.5dB
+	{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},	// 22, -11.0dB
+	{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	// 23, -11.5dB
+	{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	// 24, -12.0dB
+	{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},	// 25, -12.5dB
+	{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	// 26, -13.0dB
+	{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	// 27, -13.5dB
+	{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	// 28, -14.0dB
+	{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	// 29, -14.5dB
+	{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	// 30, -15.0dB
+	{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	// 31, -15.5dB
+	{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}	// 32, -16.0dB
+};	
+
+
+#ifdef CONFIG_CHIP_VER_INTEGRATION
+void dump_chip_info(HAL_VERSION	ChipVersion)
+{
+	if(IS_81XXC(ChipVersion)){
+		DBG_871X("Chip Version Info: %s_",IS_92C_SERIAL(ChipVersion)?"CHIP_8192C":"CHIP_8188C");
+	}
+	else if(IS_92D(ChipVersion)){
+		DBG_871X("Chip Version Info: CHIP_8192D_");
+	}
+	else if(IS_8723_SERIES(ChipVersion)){
+		DBG_871X("Chip Version Info: CHIP_8723A_");
+	}
+	else if(IS_8188E(ChipVersion)){
+		DBG_871X("Chip Version Info: CHIP_8188E_");
+	}
+
+	DBG_871X("%s_",IS_NORMAL_CHIP(ChipVersion)?"Normal_Chip":"Test_Chip");	
+	DBG_871X("%s_",IS_CHIP_VENDOR_TSMC(ChipVersion)?"TSMC":"UMC");
+	if(IS_A_CUT(ChipVersion)) DBG_871X("A_CUT_");	
+	else if(IS_B_CUT(ChipVersion)) DBG_871X("B_CUT_");	
+	else if(IS_C_CUT(ChipVersion)) DBG_871X("C_CUT_");	
+	else if(IS_D_CUT(ChipVersion)) DBG_871X("D_CUT_");	
+	else if(IS_E_CUT(ChipVersion)) DBG_871X("E_CUT_");	
+	else DBG_871X("UNKNOWN_CUT(%d)_",ChipVersion.CUTVersion);
+	
+	if(IS_1T1R(ChipVersion))	DBG_871X("1T1R_");	
+	else if(IS_1T2R(ChipVersion))	DBG_871X("1T2R_");	
+	else if(IS_2T2R(ChipVersion))	DBG_871X("2T2R_");
+	else DBG_871X("UNKNOWN_RFTYPE(%d)_",ChipVersion.RFType);
+
+	
+	DBG_871X("RomVer(%d)\n",ChipVersion.ROMVer);	
+}
+
+#endif
+
+#define	EEPROM_CHANNEL_PLAN_BY_HW_MASK	0x80
+
+u8	//return the final channel plan decision
+hal_com_get_channel_plan(
+	IN	PADAPTER	padapter,
+	IN	u8			hw_channel_plan,	//channel plan from HW (efuse/eeprom)
+	IN	u8			sw_channel_plan,	//channel plan from SW (registry/module param)
+	IN	u8			def_channel_plan,	//channel plan used when the former two is invalid
+	IN	BOOLEAN		AutoLoadFail
+	)
+{
+	u8 swConfig;
+	u8 chnlPlan;
+
+	swConfig = _TRUE;
+	if (!AutoLoadFail)
+	{
+		if (!rtw_is_channel_plan_valid(sw_channel_plan))
+			swConfig = _FALSE;
+		if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)
+			swConfig = _FALSE;
+	}
+
+	if (swConfig == _TRUE)
+		chnlPlan = sw_channel_plan;
+	else
+		chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK);
+
+	if (!rtw_is_channel_plan_valid(chnlPlan))
+		chnlPlan = def_channel_plan;
+
+	return chnlPlan;
+}
+
+u8	MRateToHwRate(u8 rate)
+{
+	u8	ret = DESC_RATE1M;
+		
+	switch(rate)
+	{
+		// CCK and OFDM non-HT rates
+	case IEEE80211_CCK_RATE_1MB:	ret = DESC_RATE1M;	break;
+	case IEEE80211_CCK_RATE_2MB:	ret = DESC_RATE2M;	break;
+	case IEEE80211_CCK_RATE_5MB:	ret = DESC_RATE5_5M;	break;
+	case IEEE80211_CCK_RATE_11MB:	ret = DESC_RATE11M;	break;
+	case IEEE80211_OFDM_RATE_6MB:	ret = DESC_RATE6M;	break;
+	case IEEE80211_OFDM_RATE_9MB:	ret = DESC_RATE9M;	break;
+	case IEEE80211_OFDM_RATE_12MB:	ret = DESC_RATE12M;	break;
+	case IEEE80211_OFDM_RATE_18MB:	ret = DESC_RATE18M;	break;
+	case IEEE80211_OFDM_RATE_24MB:	ret = DESC_RATE24M;	break;
+	case IEEE80211_OFDM_RATE_36MB:	ret = DESC_RATE36M;	break;
+	case IEEE80211_OFDM_RATE_48MB:	ret = DESC_RATE48M;	break;
+	case IEEE80211_OFDM_RATE_54MB:	ret = DESC_RATE54M;	break;
+
+		// HT rates since here
+	//case MGN_MCS0:		ret = DESC_RATEMCS0;	break;
+	//case MGN_MCS1:		ret = DESC_RATEMCS1;	break;
+	//case MGN_MCS2:		ret = DESC_RATEMCS2;	break;
+	//case MGN_MCS3:		ret = DESC_RATEMCS3;	break;
+	//case MGN_MCS4:		ret = DESC_RATEMCS4;	break;
+	//case MGN_MCS5:		ret = DESC_RATEMCS5;	break;
+	//case MGN_MCS6:		ret = DESC_RATEMCS6;	break;
+	//case MGN_MCS7:		ret = DESC_RATEMCS7;	break;
+
+	default:		break;
+	}
+
+	return ret;
+}
+
+void	HalSetBrateCfg(
+	IN PADAPTER		Adapter,
+	IN u8			*mBratesOS,
+	OUT u16			*pBrateCfg)
+{
+	u8	i, is_brate, brate;
+
+	for(i=0;i<NDIS_802_11_LENGTH_RATES_EX;i++)
+	{
+		is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
+		brate = mBratesOS[i] & 0x7f;
+		
+		if( is_brate )
+		{		
+			switch(brate)
+			{
+				case IEEE80211_CCK_RATE_1MB:	*pBrateCfg |= RATE_1M;	break;
+				case IEEE80211_CCK_RATE_2MB:	*pBrateCfg |= RATE_2M;	break;
+				case IEEE80211_CCK_RATE_5MB:	*pBrateCfg |= RATE_5_5M;break;
+				case IEEE80211_CCK_RATE_11MB:	*pBrateCfg |= RATE_11M;	break;
+				case IEEE80211_OFDM_RATE_6MB:	*pBrateCfg |= RATE_6M;	break;
+				case IEEE80211_OFDM_RATE_9MB:	*pBrateCfg |= RATE_9M;	break;
+				case IEEE80211_OFDM_RATE_12MB:	*pBrateCfg |= RATE_12M;	break;
+				case IEEE80211_OFDM_RATE_18MB:	*pBrateCfg |= RATE_18M;	break;
+				case IEEE80211_OFDM_RATE_24MB:	*pBrateCfg |= RATE_24M;	break;
+				case IEEE80211_OFDM_RATE_36MB:	*pBrateCfg |= RATE_36M;	break;
+				case IEEE80211_OFDM_RATE_48MB:	*pBrateCfg |= RATE_48M;	break;
+				case IEEE80211_OFDM_RATE_54MB:	*pBrateCfg |= RATE_54M;	break;
+			}
+		}
+	}
+}
+
+void hal_init_macaddr(_adapter *adapter)
+{
+	rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr);
+#ifdef  CONFIG_CONCURRENT_MODE
+	if (adapter->pbuddy_adapter)
+		rtw_hal_set_hwreg(adapter->pbuddy_adapter, HW_VAR_MAC_ADDR, adapter->pbuddy_adapter->eeprompriv.mac_addr);
+#endif
+}
+
+/* 
+* C2H event format:
+* Field	 TRIGGER		CONTENT	   CMD_SEQ 	CMD_LEN		 CMD_ID
+* BITS	 [127:120]	[119:16]      [15:8]		  [7:4]	 	   [3:0]
+*/
+
+void c2h_evt_clear(_adapter *adapter)
+{
+	rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
+}
+
+s32 c2h_evt_read(_adapter *adapter, u8 *buf)
+{
+	s32 ret = _FAIL;
+	struct c2h_evt_hdr *c2h_evt;
+	int i;
+	u8 trigger;
+
+	if (buf == NULL)
+		goto exit;
+
+	trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
+
+	if (trigger == C2H_EVT_HOST_CLOSE) {
+		goto exit; /* Not ready */
+	} else if (trigger != C2H_EVT_FW_CLOSE) {
+		goto clear_evt; /* Not a valid value */
+	}
+
+	c2h_evt = (struct c2h_evt_hdr *)buf;
+
+	_rtw_memset(c2h_evt, 0, 16);
+
+	*buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
+	*(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);	
+
+	RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ",
+		&c2h_evt , sizeof(c2h_evt));
+
+	if (0) {
+		DBG_871X("%s id:%u, len:%u, seq:%u, trigger:0x%02x\n", __func__
+			, c2h_evt->id, c2h_evt->plen, c2h_evt->seq, trigger);
+	}
+
+	/* Read the content */
+	for (i = 0; i < c2h_evt->plen; i++)
+		c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + sizeof(*c2h_evt) + i);
+
+	RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): Command Content:\n",
+		c2h_evt->payload, c2h_evt->plen);
+
+	ret = _SUCCESS;
+
+clear_evt:
+	/* 
+	* Clear event to notify FW we have read the command.
+	* If this field isn't clear, the FW won't update the next command message.
+	*/
+	c2h_evt_clear(adapter);
+exit:
+	return ret;
+}
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/hal_intf.c b/drivers/net/wireless/rtl8188C_8192C/hal/hal_intf.c
new file mode 100755
index 00000000..95d7d61b
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/hal_intf.c
@@ -0,0 +1,491 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#define _HAL_INTF_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+
+#include <hal_intf.h>
+
+#ifdef CONFIG_SDIO_HCI
+	#include <sdio_hal.h>
+#elif defined(CONFIG_USB_HCI)
+	#include <usb_hal.h>
+#elif defined(CONFIG_GSPI_HCI)
+	#include <gspi_hal.h>
+#endif
+
+void rtw_hal_chip_configure(_adapter *padapter)
+{
+	if(padapter->HalFunc.intf_chip_configure)
+		padapter->HalFunc.intf_chip_configure(padapter);
+}
+
+void rtw_hal_read_chip_info(_adapter *padapter)
+{
+	if(padapter->HalFunc.read_adapter_info)
+		padapter->HalFunc.read_adapter_info(padapter);
+}
+
+void rtw_hal_read_chip_version(_adapter *padapter)
+{
+	if(padapter->HalFunc.read_chip_version)
+		padapter->HalFunc.read_chip_version(padapter);
+}
+
+void rtw_hal_def_value_init(_adapter *padapter)
+{
+	if(padapter->HalFunc.init_default_value)
+		padapter->HalFunc.init_default_value(padapter);
+}
+
+void rtw_hal_free_data(_adapter *padapter)
+{
+	if(padapter->HalFunc.free_hal_data)
+		padapter->HalFunc.free_hal_data(padapter);
+}
+
+void rtw_hal_dm_init(_adapter *padapter)
+{
+	if(padapter->HalFunc.dm_init)
+		padapter->HalFunc.dm_init(padapter);
+}
+
+void rtw_hal_dm_deinit(_adapter *padapter)
+{
+	// cancel dm  timer
+	if(padapter->HalFunc.dm_deinit)
+		padapter->HalFunc.dm_deinit(padapter);	
+}
+
+void rtw_hal_sw_led_init(_adapter *padapter)
+{
+	if(padapter->HalFunc.InitSwLeds)
+		padapter->HalFunc.InitSwLeds(padapter);
+}
+
+void rtw_hal_sw_led_deinit(_adapter *padapter)
+{
+	if(padapter->HalFunc.DeInitSwLeds)
+		padapter->HalFunc.DeInitSwLeds(padapter);
+}
+
+uint	 rtw_hal_init(_adapter *padapter) 
+{
+	uint	status = _SUCCESS;
+
+	if(padapter->hw_init_completed == _TRUE)
+	{
+		DBG_871X("rtw_hal_init: hw_init_completed == _TRUE\n");
+		return status;
+	}
+#ifdef CONFIG_DEINIT_BEFORE_INIT
+	status = padapter->HalFunc.hal_deinit(padapter);
+	if(status != _SUCCESS){
+		DBG_871X("rtw_hal_init: hal_deinit before hal_init FAIL !!\n");
+		return status;
+	}
+#endif
+	
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	// before init mac0, driver must init mac1 first to avoid usb rx error.
+	if((padapter->pbuddy_adapter != NULL) && (padapter->DualMacConcurrent == _TRUE)
+		&& (padapter->adapter_type == PRIMARY_ADAPTER))
+	{
+		if(padapter->pbuddy_adapter->hw_init_completed == _TRUE)
+		{
+			DBG_871X("rtw_hal_init: pbuddy_adapter hw_init_completed == _TRUE\n");
+		}
+		else
+		{
+#ifdef CONFIG_DEINIT_BEFORE_INIT
+			status = padapter->HalFunc.hal_deinit(padapter->pbuddy_adapter);
+			if(status != _SUCCESS){
+				DBG_871X("rtw_hal_init: hal_deinit before hal_init FAIL !!(pbuddy_adapter)\n");
+				return status;
+			}
+#endif
+			status = 	padapter->HalFunc.hal_init(padapter->pbuddy_adapter);
+			if(status == _SUCCESS){
+				padapter->pbuddy_adapter->hw_init_completed = _TRUE;
+			}
+			else{
+			 	padapter->pbuddy_adapter->hw_init_completed = _FALSE;
+				RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail(pbuddy_adapter)\n"));
+				return status;
+			}
+		}
+	}
+#else
+	if(adapter_to_dvobj(padapter)->NumInterfaces == 2 && padapter->registrypriv.mac_phy_mode != 1)
+	{
+		if(padapter->pbuddy_adapter->hw_init_completed == _FALSE)
+		{
+#ifdef CONFIG_DEINIT_BEFORE_INIT
+			status = padapter->HalFunc.hal_deinit(padapter->pbuddy_adapter);
+			if(status != _SUCCESS){
+				DBG_871X("rtw_hal_init: hal_deinit before hal_init FAIL !!(pbuddy_adapter)\n");
+				return status;
+			}
+#endif
+			status = padapter->HalFunc.hal_init(padapter->pbuddy_adapter);
+			if(status == _SUCCESS){
+				padapter->pbuddy_adapter->hw_init_completed = _TRUE;
+			}
+			else{
+				padapter->pbuddy_adapter->hw_init_completed = _FALSE;
+				RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail for another interface\n"));
+			}
+		}
+	}
+#endif
+
+	padapter->hw_init_completed=_FALSE;
+
+	status = padapter->HalFunc.hal_init(padapter);
+
+	if(status == _SUCCESS){
+		padapter->hw_init_completed = _TRUE;
+		
+		if (padapter->registrypriv.notch_filter == 1)
+			rtw_hal_notch_filter(padapter, 1);
+		
+		rtw_hal_reset_security_engine(padapter);
+	}
+	else{
+	 	padapter->hw_init_completed = _FALSE;
+		RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail\n"));
+	}
+
+	RT_TRACE(_module_hal_init_c_,_drv_err_,("-rtl871x_hal_init:status=0x%x\n",status));
+
+	return status;
+
+}	
+
+uint rtw_hal_deinit(_adapter *padapter)
+{
+	uint	status = _SUCCESS;
+	
+_func_enter_;
+
+	status = padapter->HalFunc.hal_deinit(padapter);
+
+	if(status == _SUCCESS){
+		padapter->hw_init_completed = _FALSE;
+	}
+	else
+	{
+		RT_TRACE(_module_hal_init_c_,_drv_err_,("\n rtw_hal_deinit: hal_init fail\n"));
+	}
+	
+_func_exit_;
+	
+	return status;
+}
+
+void rtw_hal_set_hwreg(_adapter *padapter, u8 variable, u8 *val)
+{
+	if (padapter->HalFunc.SetHwRegHandler)
+		padapter->HalFunc.SetHwRegHandler(padapter, variable, val);
+}
+
+void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val)
+{
+	if (padapter->HalFunc.GetHwRegHandler)
+		padapter->HalFunc.GetHwRegHandler(padapter, variable, val);
+}
+
+u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue)
+{	
+	if(padapter->HalFunc.SetHalDefVarHandler)
+		return padapter->HalFunc.SetHalDefVarHandler(padapter,eVariable,pValue);
+	return _FAIL;
+}
+
+u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue)
+{	
+	if(padapter->HalFunc.GetHalDefVarHandler)
+		return padapter->HalFunc.GetHalDefVarHandler(padapter,eVariable,pValue);
+	return _FAIL;	
+}
+
+void rtw_hal_enable_interrupt(_adapter *padapter)
+{
+	if (padapter->HalFunc.enable_interrupt)
+		padapter->HalFunc.enable_interrupt(padapter);
+	else 
+		DBG_871X("%s: HalFunc.enable_interrupt is NULL!\n", __FUNCTION__);
+	
+}
+void rtw_hal_disable_interrupt(_adapter *padapter)
+{
+	if (padapter->HalFunc.disable_interrupt)
+		padapter->HalFunc.disable_interrupt(padapter);
+	else 
+		DBG_871X("%s: HalFunc.disable_interrupt is NULL!\n", __FUNCTION__);
+	
+}
+
+u32	rtw_hal_inirp_init(_adapter *padapter)
+{
+	u32 rst = _FAIL;
+	if(padapter->HalFunc.inirp_init)	
+		rst = padapter->HalFunc.inirp_init(padapter);	
+	else		
+		DBG_871X(" %s HalFunc.inirp_init is NULL!!!\n",__FUNCTION__);		
+	return rst;
+}
+	
+u32	rtw_hal_inirp_deinit(_adapter *padapter)
+{
+	
+	if(padapter->HalFunc.inirp_deinit)
+		return padapter->HalFunc.inirp_deinit(padapter);
+
+	return _FAIL;
+		
+}
+
+u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val)
+{
+	if(padapter->HalFunc.interface_ps_func)
+		return padapter->HalFunc.interface_ps_func(padapter,efunc_id,val);
+	return _FAIL;
+}
+
+s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	if(padapter->HalFunc.hal_xmit)
+		return padapter->HalFunc.hal_xmit(padapter, pxmitframe);
+
+	return _FALSE;
+}
+
+s32	rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe)
+{
+	s32 ret = _FAIL;
+	if(padapter->HalFunc.mgnt_xmit)
+		ret = padapter->HalFunc.mgnt_xmit(padapter, pmgntframe);
+	return ret;
+}
+
+s32 rtw_hal_init_xmit_priv(_adapter *padapter)
+{
+	if(padapter->HalFunc.init_xmit_priv != NULL)
+		return padapter->HalFunc.init_xmit_priv(padapter);
+	return _FAIL;
+}
+
+void rtw_hal_free_xmit_priv(_adapter *padapter)
+{
+	if(padapter->HalFunc.free_xmit_priv != NULL)
+		padapter->HalFunc.free_xmit_priv(padapter);
+}
+
+s32 rtw_hal_init_recv_priv(_adapter *padapter)
+{
+	if(padapter->HalFunc.init_recv_priv)
+		return padapter->HalFunc.init_recv_priv(padapter);
+
+	return _FAIL;
+}
+
+void rtw_hal_free_recv_priv(_adapter *padapter)
+{	
+	if(padapter->HalFunc.free_recv_priv)
+		padapter->HalFunc.free_recv_priv(padapter);
+}
+
+void rtw_hal_update_ra_mask(_adapter *padapter, u32 mac_id)
+{
+	if(padapter->HalFunc.UpdateRAMaskHandler)
+		padapter->HalFunc.UpdateRAMaskHandler(padapter,mac_id);
+}
+
+void rtw_hal_add_ra_tid(_adapter *padapter, u32 bitmap, u8 arg)
+{
+	if(padapter->HalFunc.Add_RateATid)
+		padapter->HalFunc.Add_RateATid(padapter, bitmap, arg);
+}
+
+u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask)
+{
+	u32 data = 0;
+	if (padapter->HalFunc.read_bbreg)
+		data = padapter->HalFunc.read_bbreg(padapter, RegAddr, BitMask);
+	return data;
+}
+
+void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
+{
+	if (padapter->HalFunc.write_bbreg)
+		padapter->HalFunc.write_bbreg(padapter, RegAddr, BitMask, Data);
+}
+
+u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask)
+{
+	u32 data = 0;
+	if (padapter->HalFunc.read_rfreg)
+		data = padapter->HalFunc.read_rfreg(padapter, eRFPath, RegAddr, BitMask);
+	return data;
+}
+
+void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
+{
+	if (padapter->HalFunc.write_rfreg)
+		padapter->HalFunc.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data);
+}
+
+s32 rtw_hal_interrupt_handler(_adapter *padapter)
+{
+	if(padapter->HalFunc.interrupt_handler)
+		return padapter->HalFunc.interrupt_handler(padapter);
+	return _FAIL;
+}
+
+void rtw_hal_set_bwmode(_adapter *padapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset)
+{
+	if(padapter->HalFunc.set_bwmode_handler)
+		padapter->HalFunc.set_bwmode_handler(padapter, Bandwidth, Offset);
+}
+
+void rtw_hal_set_chan(_adapter *padapter, u8 channel)
+{
+	if(padapter->HalFunc.set_channel_handler)
+		padapter->HalFunc.set_channel_handler(padapter, channel);
+}
+
+void rtw_hal_dm_watchdog(_adapter *padapter)
+{
+	if(padapter->HalFunc.hal_dm_watchdog)
+		padapter->HalFunc.hal_dm_watchdog(padapter);
+}
+
+void rtw_hal_bcn_related_reg_setting(_adapter *padapter)
+{
+	if(padapter->HalFunc.SetBeaconRelatedRegistersHandler)
+		padapter->HalFunc.SetBeaconRelatedRegistersHandler(padapter);
+}
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+u8 rtw_hal_antdiv_before_linked(_adapter *padapter)
+{
+	if (padapter->HalFunc.AntDivBeforeLinkHandler)
+		return padapter->HalFunc.AntDivBeforeLinkHandler(padapter);
+	return _FALSE;
+}
+
+void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src)
+{
+	if (padapter->HalFunc.AntDivCompareHandler)
+		padapter->HalFunc.AntDivCompareHandler(padapter, dst, src);
+}
+#endif
+
+#ifdef CONFIG_HOSTAPD_MLME
+s32	rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
+{
+	if (padapter->HalFunc.hostap_mgnt_xmit_entry)
+		return padapter->HalFunc.hostap_mgnt_xmit_entry(padapter, pkt);
+	return _FAIL;
+}
+#endif //CONFIG_HOSTAPD_MLME
+
+#ifdef DBG_CONFIG_ERROR_DETECT
+void rtw_hal_sreset_init(_adapter *padapter)
+{
+	if(padapter->HalFunc.sreset_init_value)
+		padapter->HalFunc.sreset_init_value(padapter);
+}
+
+void rtw_hal_sreset_reset(_adapter *padapter)
+{
+	if(padapter->HalFunc.silentreset)
+		padapter->HalFunc.silentreset(padapter);
+}
+
+void rtw_hal_sreset_reset_value(_adapter *padapter)
+{
+	if(padapter->HalFunc.sreset_reset_value)
+		padapter->HalFunc.sreset_reset_value(padapter);
+}
+
+void rtw_hal_sreset_xmit_status_check(_adapter *padapter)
+{
+#ifdef CONFIG_CONCURRENT_MODE
+	if (padapter->adapter_type != PRIMARY_ADAPTER)
+		return;
+#endif
+	if(padapter->HalFunc.sreset_xmit_status_check)
+		padapter->HalFunc.sreset_xmit_status_check(padapter);
+}
+
+void rtw_hal_sreset_linked_status_check(_adapter *padapter)
+{
+	if(padapter->HalFunc.sreset_linked_status_check)
+		padapter->HalFunc.sreset_linked_status_check(padapter);
+}
+
+u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter)
+{
+	u8 status = 0;
+	if(padapter->HalFunc.sreset_get_wifi_status)
+		status = padapter->HalFunc.sreset_get_wifi_status(padapter);
+	return status;
+}
+#endif //DBG_CONFIG_ERROR_DETECT
+
+#ifdef CONFIG_IOL
+int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms)
+{
+	if (adapter->HalFunc.IOL_exec_cmds_sync)
+		return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms);
+	return _FAIL;
+}
+#endif
+
+void rtw_hal_notch_filter(_adapter *adapter, bool enable)
+{
+	if(adapter->HalFunc.hal_notch_filter)
+		adapter->HalFunc.hal_notch_filter(adapter,enable);
+}
+
+void rtw_hal_reset_security_engine(_adapter * adapter)
+{
+	if(adapter->HalFunc.hal_reset_security_engine)
+		adapter->HalFunc.hal_reset_security_engine(adapter);
+}
+
+s32 rtw_hal_c2h_handler(_adapter *adapter, struct c2h_evt_hdr *c2h_evt)
+{
+	s32 ret = _FAIL;
+	if (adapter->HalFunc.c2h_handler)
+		ret = adapter->HalFunc.c2h_handler(adapter, c2h_evt);
+	return ret;
+}
+
+c2h_id_filter rtw_hal_c2h_id_filter_ccx(_adapter *adapter)
+{
+	return adapter->HalFunc.c2h_id_filter_ccx;
+}
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_cmd.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_cmd.c
new file mode 100755
index 00000000..33921e2e
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_cmd.c
@@ -0,0 +1,1159 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTL8192C_CMD_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <cmd_osdep.h>
+#include <mlme_osdep.h>
+#include <rtw_byteorder.h>
+#include <circ_buf.h>
+#include <rtw_ioctl_set.h>
+
+#include <rtl8192c_hal.h>
+
+
+#define RTL92C_MAX_H2C_BOX_NUMS	4
+#define RTL92C_MAX_CMD_LEN	5
+#define MESSAGE_BOX_SIZE		4
+#define EX_MESSAGE_BOX_SIZE	2
+
+static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 msgbox_num)
+{
+	u8	read_down = _FALSE;
+	int 	retry_cnts = 100;
+	
+	u8 valid;
+
+//	DBG_8192C(" _is_fw_read_cmd_down ,isnormal_chip(%x),reg_1cc(%x),msg_box(%d)...\n",isvern,rtw_read8(padapter,REG_HMETFR),msgbox_num);
+	
+	do{
+		valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num);
+		if(0 == valid ){
+			read_down = _TRUE;
+		}			
+	}while( (!read_down) && (retry_cnts--));
+
+	return read_down;
+	
+}
+
+
+/*****************************************
+* H2C Msg format :
+*| 31 - 8		|7		| 6 - 0	|	
+*| h2c_msg 	|Ext_bit	|CMD_ID	|
+*
+******************************************/
+int rtl8192c_FillH2CCmd(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer)
+{
+	u8	bcmd_down = _FALSE;
+	int 	retry_cnts = 100;
+	u8	h2c_box_num;
+	u32	msgbox_addr;
+	u32  msgbox_ex_addr;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	u32	h2c_cmd = 0;
+	u16	h2c_cmd_ex = 0;
+	int ret = _FAIL;
+
+_func_enter_;	
+
+	padapter = GET_PRIMARY_ADAPTER(padapter);		
+	pHalData = GET_HAL_DATA(padapter);
+
+	if(padapter->bFWReady == _FALSE)
+	{
+		DBG_8192C("FillH2CCmd(): return H2C cmd because fw is not ready\n");
+		return ret;
+	}
+
+	_enter_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL);
+
+	if(!pCmdBuffer){
+		goto exit;
+	}
+	if(CmdLen > RTL92C_MAX_CMD_LEN){
+		goto exit;
+	}
+	//pay attention to if  race condition happened in  H2C cmd setting.
+	do{
+		h2c_box_num = pHalData->LastHMEBoxNum;
+
+		if(!_is_fw_read_cmd_down(padapter, h2c_box_num)){
+			DBG_8192C(" fw read cmd failed...\n");
+			goto exit;
+		}
+
+		if(CmdLen<=3)
+		{
+			_rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen );
+		}
+		else{
+			_rtw_memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer, EX_MESSAGE_BOX_SIZE);
+			_rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer+2,( CmdLen-EX_MESSAGE_BOX_SIZE));
+			*(u8*)(&h2c_cmd) |= BIT(7);
+		}
+
+		*(u8*)(&h2c_cmd) |= ElementID;
+
+		if(h2c_cmd & BIT(7)){
+			msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num *EX_MESSAGE_BOX_SIZE);
+			h2c_cmd_ex = cpu_to_le16( h2c_cmd_ex );
+			rtw_write16(padapter, msgbox_ex_addr, h2c_cmd_ex);
+		}
+		msgbox_addr =REG_HMEBOX_0 + (h2c_box_num *MESSAGE_BOX_SIZE);
+		h2c_cmd = cpu_to_le32( h2c_cmd );
+		rtw_write32(padapter,msgbox_addr, h2c_cmd);
+
+		bcmd_down = _TRUE;
+
+	//	DBG_8192C("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n"
+	//	 	,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex);
+
+		 pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL92C_MAX_H2C_BOX_NUMS ;
+
+	}while((!bcmd_down) && (retry_cnts--));
+/*
+	if(bcmd_down)
+		DBG_8192C("H2C Cmd exe down. \n"	);	
+	else
+		DBG_8192C("H2C Cmd exe failed. \n"	);
+*/
+	ret = _SUCCESS;
+
+exit:
+
+	_exit_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL);	
+
+_func_exit_;
+
+	return ret;
+
+}
+
+u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf)
+{	
+	u8 ElementID, CmdLen;
+	u8 *pCmdBuffer;
+	struct cmd_msg_parm  *pcmdmsg;
+	
+	if(!pbuf)
+		return H2C_PARAMETERS_ERROR;
+
+	pcmdmsg = (struct cmd_msg_parm*)pbuf;
+	ElementID = pcmdmsg->eid;
+	CmdLen = pcmdmsg->sz;
+	pCmdBuffer = pcmdmsg->buf;
+
+	rtl8192c_FillH2CCmd(padapter, ElementID, CmdLen, pCmdBuffer);
+
+	return H2C_SUCCESS;
+}
+
+#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED)
+u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter ,u8 bfwpoll, u16 period)
+{
+	u8	res=_SUCCESS;
+	struct H2C_SS_RFOFF_PARAM param;
+	DBG_8192C("==>%s bfwpoll(%x)\n",__FUNCTION__,bfwpoll);
+	param.gpio_period = period;//Polling GPIO_11 period time
+	param.ROFOn = (_TRUE == bfwpoll)?1:0;
+	rtl8192c_FillH2CCmd(padapter, SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (u8*)(&param));		
+	return res;
+}
+#endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED
+
+u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param)
+{	
+	u8	res=_SUCCESS;
+
+_func_enter_;
+
+	*((u32*) param ) = cpu_to_le32( *((u32*) param ) );
+
+	rtl8192c_FillH2CCmd(padapter, RSSI_SETTING_EID, 3, param);
+
+_func_exit_;
+
+	return res;
+}
+
+u8 rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg)
+{	
+	u8	buf[5];
+	u8	res=_SUCCESS;
+	
+_func_enter_;	
+	
+	_rtw_memset(buf, 0, 5);
+	mask = cpu_to_le32( mask );
+	_rtw_memcpy(buf, &mask, 4);
+	buf[4]  = arg;
+
+	rtl8192c_FillH2CCmd(padapter, MACID_CONFIG_EID, 5, buf);
+	
+_func_exit_;
+
+	return res;
+
+}
+
+//bitmap[0:27] = tx_rate_bitmap
+//bitmap[28:31]= Rate Adaptive id
+//arg[0:4] = macid
+//arg[5] = Short GI
+void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg)
+{	
+	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+		
+	if(pHalData->fw_ractrl == _TRUE)
+	{
+		rtl8192c_set_raid_cmd(pAdapter, bitmap, arg);
+	}
+	else
+	{
+		u8 macid, init_rate, shortGIrate=_FALSE;
+
+		init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f;
+		
+		macid = arg&0x1f;
+		
+		shortGIrate = (arg&BIT(5)) ? _TRUE:_FALSE;
+		
+		if (shortGIrate==_TRUE)
+			init_rate |= BIT(6);
+
+		rtw_write8(pAdapter, (REG_INIDATA_RATE_SEL+macid), (u8)init_rate);		
+	}
+
+}
+
+void rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode)
+{
+	SETPWRMODE_PARM H2CSetPwrMode;
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	
+_func_enter_;
+
+	DBG_871X("%s(): Mode = %d, SmartPS = %d\n", __FUNCTION__,Mode,pwrpriv->smart_ps);
+
+	H2CSetPwrMode.Mode = Mode;
+
+	H2CSetPwrMode.SmartPS = pwrpriv->smart_ps;
+
+	H2CSetPwrMode.BcnPassTime = 1;//pPSC->RegMaxLPSAwakeIntvl;
+
+	rtl8192c_FillH2CCmd(padapter, SET_PWRMODE_EID, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode);
+	
+_func_exit_;
+}
+
+void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength)
+{
+	struct rtw_ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;
+	u32					rate_len, pktlen;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	u8	bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;	
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	
+	_rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/);
+	//pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_BEACON);
+	
+	pframe += sizeof(struct rtw_ieee80211_hdr_3addr);	
+	pktlen = sizeof (struct rtw_ieee80211_hdr_3addr);
+	
+	//timestamp will be inserted by hardware
+	pframe += 8;
+	pktlen += 8;
+
+	// beacon interval: 2 bytes
+	_rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); 
+
+	pframe += 2;
+	pktlen += 2;
+
+	// capability info: 2 bytes
+	_rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2);
+
+	pframe += 2;
+	pktlen += 2;
+
+	if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+	{
+		//DBG_871X("ie len=%d\n", cur_network->IELength);
+		pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs);
+		_rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen);
+		
+		goto _ConstructBeacon;
+	}
+
+	//below for ad-hoc mode
+
+	// SSID
+	pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen);
+
+	// supported rates...
+	rate_len = rtw_get_rateset_len(cur_network->SupportedRates);
+	pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen);
+
+	// DS parameter set
+	pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen);
+
+	if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)
+	{
+		u32 ATIMWindow;
+		// IBSS Parameter Set...
+		//ATIMWindow = cur->Configuration.ATIMWindow;
+		ATIMWindow = 0;
+		pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen);
+	}	
+
+
+	//todo: ERP IE
+	
+	
+	// EXTERNDED SUPPORTED RATE
+	if (rate_len > 8)
+	{
+		pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen);
+	}
+
+
+	//todo:HT for adhoc
+
+_ConstructBeacon:
+
+	if ((pktlen + TXDESC_SIZE) > 512)
+	{
+		DBG_871X("beacon frame too large\n");
+		return;
+	}
+
+	*pLength = pktlen;
+
+	//DBG_871X("%s bcn_sz=%d\n", __FUNCTION__, pktlen);
+
+}
+
+void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength)
+{
+	struct rtw_ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;
+	u32					pktlen;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
+
+	// Frame control.
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	SetPwrMgt(fctrl);
+	SetFrameSubType(pframe, WIFI_PSPOLL);
+
+	// AID.
+	SetDuration(pframe, (pmlmeinfo->aid | 0xc000));
+
+	// BSSID.
+	_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+	// TA.
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	*pLength = 16;
+}
+
+void ConstructNullFunctionData(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bForcePowerSave)
+{
+	struct rtw_ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;
+	u32					pktlen;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wlan_network	*cur_network = &pmlmepriv->cur_network;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave);
+
+	pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	if (bForcePowerSave)
+	{
+		SetPwrMgt(fctrl);
+	}
+
+	switch(cur_network->network.InfrastructureMode)
+	{			
+		case Ndis802_11Infrastructure:
+			SetToDs(fctrl);
+			_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN);
+			break;
+		case Ndis802_11APMode:
+			SetFrDs(fctrl);
+			_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN);
+			break;
+		case Ndis802_11IBSS:
+		default:
+			_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+			break;
+	}
+
+	SetSeqNum(pwlanhdr, 0);
+
+	SetFrameSubType(pframe, WIFI_DATA_NULL);
+
+	pframe += sizeof(struct rtw_ieee80211_hdr_3addr);
+	pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
+
+	*pLength = pktlen;
+}
+
+void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID)
+{
+	struct rtw_ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;	
+	u8					*mac, *bssid;
+	u32					pktlen;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	
+	
+	//DBG_871X("%s\n", __FUNCTION__);
+	
+	pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;	
+	
+	mac = myid(&(padapter->eeprompriv));
+	bssid = cur_network->MacAddress;
+	
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, 0);
+	SetFrameSubType(fctrl, WIFI_PROBERSP);
+	
+	pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
+	pframe += pktlen;
+
+	if(cur_network->IELength>MAX_IE_SZ)
+		return;
+
+	_rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength);
+	pframe += cur_network->IELength;
+	pktlen += cur_network->IELength;
+	
+	*pLength = pktlen;
+}
+
+//
+// Description: In normal chip, we should send some packet to Hw which will be used by Fw
+//			in FW LPS mode. The function is to fill the Tx descriptor of this packets, then 
+//			Fw can tell Hw to send these packet derectly.
+// Added by tynli. 2009.10.15.
+//
+static VOID
+FillFakeTxDescriptor92C(
+	IN PADAPTER		Adapter,
+	IN u8*			pDesc,
+	IN u32			BufferLen,
+	IN BOOLEAN		IsPsPoll
+)
+{
+	struct tx_desc	*ptxdesc = (struct tx_desc *)pDesc;
+
+	// Clear all status
+	_rtw_memset(pDesc, 0, 32);
+
+	//offset 0
+	ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg;
+
+	ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000); //32 bytes for TX Desc
+
+	ptxdesc->txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header
+
+	//offset 4
+	ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<<QSEL_SHT)&0x00001f00); // Fixed queue of Mgnt queue
+
+	//Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw.
+	if(IsPsPoll)
+	{
+		ptxdesc->txdw1 |= cpu_to_le32(NAVUSEHDR);
+	}
+	else
+	{
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
+		ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
+	}
+
+	//offset 16
+	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+#ifdef CONFIG_USB_HCI
+	// USB interface drop packet if the checksum of descriptor isn't correct.
+	// Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
+	rtl8192cu_cal_txdesc_chksum(ptxdesc);
+#endif
+	
+	//RT_PRINT_DATA(COMP_CMD, DBG_TRACE, "TxFillCmdDesc8192C(): H2C Tx Cmd Content ----->\n", pDesc, TX_DESC_SIZE);
+}
+
+// To check if reserved page content is destroyed by beacon beacuse beacon is too large.
+// 2010.06.23. Added by tynli.
+VOID
+CheckFwRsvdPageContent(
+	IN	PADAPTER		Adapter
+)
+{
+	HAL_DATA_TYPE*	pHalData = GET_HAL_DATA(Adapter);
+	u32	MaxBcnPageNum;	
+	
+ 	if(pHalData->FwRsvdPageStartOffset != 0)
+ 	{
+ 		/*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize);
+		RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset), 
+			("CheckFwRsvdPageContent(): The reserved page content has been"\
+			"destroyed by beacon!!! MaxBcnPageNum(%d) FwRsvdPageStartOffset(%d)\n!",
+			MaxBcnPageNum, pHalData->FwRsvdPageStartOffset));*/
+ 	}
+}
+
+//
+// Description: Fill the reserved packets that FW will use to RSVD page. 
+//			Now we just send 4 types packet to rsvd page.
+//			(1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp.
+//	Input: 
+//	    bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw,
+//				 		so we need to set the packet length to total lengh.
+//			      TRUE: At the second time, we should send the first packet (default:beacon)
+//						to Hw again and set the lengh in descriptor to the real beacon lengh.
+// 2009.10.15 by tynli.
+static void SetFwRsvdPagePkt(PADAPTER Adapter, BOOLEAN bDLFinished)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);	
+	struct xmit_frame	*pmgntframe;
+	struct pkt_attrib	*pattrib;
+	struct xmit_priv	*pxmitpriv = &(Adapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(Adapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u32	BeaconLength, ProbeRspLength, PSPollLength, NullFunctionDataLength;
+	u8	*ReservedPagePacket;
+	u8	PageNum=0, U1bTmp, TxDescLen=0, TxDescOffset=0;
+	u16	BufIndex=0;
+	u32	TotalPacketLen;
+	RSVDPAGE_LOC	RsvdPageLoc;
+	BOOLEAN	bDLOK = _FALSE;
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	ReservedPagePacket = (u8*)rtw_malloc(1000);
+	if(ReservedPagePacket == NULL){
+		DBG_871X("%s(): alloc ReservedPagePacket fail !!!\n", __FUNCTION__);
+		return;
+	}
+
+	_rtw_memset(ReservedPagePacket, 0, 1000);
+
+	TxDescLen = 32;//TX_DESC_SIZE;
+
+#ifdef CONFIG_USB_HCI
+	BufIndex = TXDESC_OFFSET;
+	TxDescOffset = TxDescLen+8; //Shift index for 8 bytes because the dummy bytes in the first descipstor.
+#else
+	BufIndex = 0;
+	TxDescOffset = 0;
+#endif
+
+	//(1) beacon
+	ConstructBeacon(Adapter,&ReservedPagePacket[BufIndex],&BeaconLength);
+
+	//DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: BCN\n", &ReservedPagePacket[BufIndex], (BeaconLength+BufIndex));
+
+//--------------------------------------------------------------------
+
+	// When we count the first page size, we need to reserve description size for the RSVD 
+	// packet, it will be filled in front of the packet in TXPKTBUF.
+	U1bTmp = (u8)PageNum_128(BeaconLength+TxDescLen);
+	PageNum += U1bTmp;
+	// To reserved 2 pages for beacon buffer. 2010.06.24.
+	if(PageNum == 1)
+		PageNum+=1;
+	pHalData->FwRsvdPageStartOffset = PageNum;
+
+	BufIndex = (PageNum*128) + TxDescOffset;
+		
+	//(2) ps-poll
+	ConstructPSPoll(Adapter, &ReservedPagePacket[BufIndex],&PSPollLength);
+	
+	FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE);
+
+	//DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PS-POLL\n", &ReservedPagePacket[BufIndex-TxDescLen], (PSPollLength+TxDescLen));
+
+	RsvdPageLoc.LocPsPoll = PageNum;
+
+//------------------------------------------------------------------
+			
+	U1bTmp = (u8)PageNum_128(PSPollLength+TxDescLen);
+	PageNum += U1bTmp;
+
+	BufIndex = (PageNum*128) + TxDescOffset;
+
+	//(3) null data
+	ConstructNullFunctionData(
+		Adapter, 
+		&ReservedPagePacket[BufIndex],
+		&NullFunctionDataLength,
+		get_my_bssid(&(pmlmeinfo->network)),
+		_FALSE);
+	
+	FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], NullFunctionDataLength, _FALSE);
+
+	RsvdPageLoc.LocNullData = PageNum;
+	
+	//DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: NULL DATA \n", &ReservedPagePacket[BufIndex-TxDescLen], (NullFunctionDataLength+TxDescLen));
+//------------------------------------------------------------------
+
+	U1bTmp = (u8)PageNum_128(NullFunctionDataLength+TxDescLen);
+	PageNum += U1bTmp;
+
+	BufIndex = (PageNum*128) + TxDescOffset;
+	
+	//(4) probe response
+	ConstructProbeRsp(
+		Adapter, 
+		&ReservedPagePacket[BufIndex],
+		&ProbeRspLength,
+		get_my_bssid(&(pmlmeinfo->network)),
+		_FALSE);
+	
+	FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, _FALSE);
+
+	RsvdPageLoc.LocProbeRsp = PageNum;
+
+	//DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PROBE RSP \n", &ReservedPagePacket[BufIndex-TxDescLen], (ProbeRspLength-TxDescLen));
+
+//------------------------------------------------------------------
+
+	U1bTmp = (u8)PageNum_128(ProbeRspLength+TxDescLen);
+
+	PageNum += U1bTmp;
+
+	TotalPacketLen = (PageNum*128);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(Adapter, pattrib);
+	pattrib->qsel = 0x10;
+	pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescLen;
+	_rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen);
+
+	rtw_hal_mgnt_xmit(Adapter, pmgntframe);
+
+	bDLOK = _TRUE;
+
+	if(bDLOK)
+	{
+		DBG_871X("Set RSVD page location to Fw.\n");
+		rtl8192c_FillH2CCmd(Adapter, RSVD_PAGE_EID, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc);
+	}
+
+	rtw_mfree(ReservedPagePacket,1000);
+
+}
+
+void rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus)
+{
+	JOINBSSRPT_PARM	JoinBssRptParm;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+_func_enter_;
+
+	DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus);
+
+	if(mstatus == 1)
+	{
+		BOOLEAN bRecover = _FALSE;
+	
+		// We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C.
+		// Suggested by filen. Added by tynli.
+		rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid));
+		// Do not set TSF again here or vWiFi beacon DMA INT will not work.
+		//correct_TSF(padapter, pmlmeext);
+		// Hw sequende enable by dedault. 2010.06.23. by tynli.
+		//rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF));
+		//rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF);
+
+		//set REG_CR bit 8
+		//U1bTmp = rtw_read8(padapter, REG_CR+1);
+		rtw_write8(padapter,  REG_CR+1, 0x03);
+
+		// Disable Hw protection for a time which revserd for Hw sending beacon.
+		// Fix download reserved page packet fail that access collision with the protection time.
+		// 2010.05.11. Added by tynli.
+		//SetBcnCtrlReg(padapter, 0, BIT3);
+		//SetBcnCtrlReg(padapter, BIT4, 0);
+		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3)));
+		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4));
+
+		// Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.
+		if(pHalData->RegFwHwTxQCtrl&BIT6)
+			bRecover = _TRUE;
+
+		// To tell Hw the packet is not a real beacon frame.
+		//U1bTmp = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2);
+		rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6)));
+		pHalData->RegFwHwTxQCtrl &= (~BIT6);
+		SetFwRsvdPagePkt(padapter, 0);
+
+		// 2010.05.11. Added by tynli.
+		//SetBcnCtrlReg(padapter, BIT3, 0);
+		//SetBcnCtrlReg(padapter, 0, BIT4);
+		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3));
+		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4)));
+
+		// To make sure that if there exists an adapter which would like to send beacon.
+		// If exists, the origianl value of 0x422[6] will be 1, we should check this to
+		// prevent from setting 0x422[6] to 0 after download reserved page, or it will cause 
+		// the beacon cannot be sent by HW.
+		// 2010.06.23. Added by tynli.
+		if(bRecover)
+		{
+			rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6));
+			pHalData->RegFwHwTxQCtrl |= BIT6;
+		}
+
+		// Clear CR[8] or beacon packet will not be send to TxBuf anymore.
+		rtw_write8(padapter, REG_CR+1, 0x02);
+	}
+
+	JoinBssRptParm.OpMode = mstatus;
+
+	rtl8192c_FillH2CCmd(padapter, JOINBSS_RPT_EID, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm);
+	
+_func_exit_;
+}
+
+#ifdef CONFIG_P2P_PS
+void rtl8192c_set_p2p_ctw_period_cmd(_adapter* padapter, u8 ctwindow)
+{
+	struct P2P_PS_CTWPeriod_t p2p_ps_ctw;
+
+	p2p_ps_ctw.CTWPeriod = ctwindow;
+
+	rtl8192c_FillH2CCmd(padapter, P2P_PS_CTW_CMD_EID, 1, (u8 *)(&p2p_ps_ctw));
+	
+}
+
+void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);	
+	struct pwrctrl_priv		*pwrpriv = &padapter->pwrctrlpriv;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+	struct P2P_PS_Offload_t	*p2p_ps_offload = &pHalData->p2p_ps_offload;
+	u8	i;
+	u16	ctwindow;
+	u32	start_time, tsf_low;
+
+_func_enter_;
+
+	switch(p2p_ps_state)
+	{
+		case P2P_PS_DISABLE:
+			DBG_8192C("P2P_PS_DISABLE \n");
+			_rtw_memset(p2p_ps_offload, 0 ,1);
+			break;
+		case P2P_PS_ENABLE:
+			DBG_8192C("P2P_PS_ENABLE \n");
+			// update CTWindow value.
+			if( pwdinfo->ctwindow > 0 )
+			{
+				p2p_ps_offload->CTWindow_En = 1;
+				ctwindow = pwdinfo->ctwindow;
+				if(IS_HARDWARE_TYPE_8723A(padapter))
+				{
+					//rtw_write16(padapter, REG_ATIMWND, ctwindow);
+				}
+				else
+				{
+					rtl8192c_set_p2p_ctw_period_cmd(padapter, ctwindow);
+				}
+			}
+
+			// hw only support 2 set of NoA
+			for( i=0 ; i<pwdinfo->noa_num ; i++)
+			{
+				// To control the register setting for which NOA
+				rtw_write8(padapter, 0x5CF, (i << 4));
+				if(i == 0)
+					p2p_ps_offload->NoA0_En = 1;
+				else
+					p2p_ps_offload->NoA1_En = 1;
+
+				// config P2P NoA Descriptor Register
+				rtw_write32(padapter, 0x5E0, pwdinfo->noa_duration[i]);
+
+				rtw_write32(padapter, 0x5E4, pwdinfo->noa_interval[i]);
+
+				//Get Current TSF value
+				tsf_low = rtw_read32(padapter, REG_TSFTR);
+
+				start_time = pwdinfo->noa_start_time[i];
+				if(pwdinfo->noa_count[i] != 1)
+				{
+					while( start_time <= (tsf_low+(50*1024) ) )
+					{
+						start_time += pwdinfo->noa_interval[i];
+						if(pwdinfo->noa_count[i] != 255)
+							pwdinfo->noa_count[i]--;
+					}
+				}
+				//DBG_8192C("%s(): start_time = %x\n",__FUNCTION__,start_time);
+				rtw_write32(padapter, 0x5E8, start_time);
+
+				rtw_write8(padapter, 0x5EC, pwdinfo->noa_count[i]);
+			}
+
+			if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) )
+			{
+				// rst p2p circuit
+				rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4));
+
+				p2p_ps_offload->Offload_En = 1;
+
+				if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO))
+				{
+					p2p_ps_offload->role= 1;
+					p2p_ps_offload->AllStaSleep = 0;
+				}
+				else
+				{
+					p2p_ps_offload->role= 0;
+				}
+
+				p2p_ps_offload->discovery = 0;
+			}
+			break;
+		case P2P_PS_SCAN:
+			DBG_8192C("P2P_PS_SCAN \n");
+			p2p_ps_offload->discovery = 1;
+			break;
+		case P2P_PS_SCAN_DONE:
+			DBG_8192C("P2P_PS_SCAN_DONE \n");
+			p2p_ps_offload->discovery = 0;
+			pwdinfo->p2p_ps_state = P2P_PS_ENABLE;
+			break;
+		default:
+			break;
+	}
+
+	rtl8192c_FillH2CCmd(padapter, P2P_PS_OFFLOAD_EID, 1, (u8 *)p2p_ps_offload);
+
+_func_exit_;
+
+}
+#endif // CONFIG_P2P_PS
+
+#ifdef CONFIG_IOL
+#include <rtw_iol.h>
+int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms)
+{
+	IO_OFFLOAD_LOC	IoOffloadLoc;
+	u32 start_time = rtw_get_current_time();
+	u32 passing_time_ms;
+	u8 polling_ret;
+	int ret = _FAIL;
+
+	if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS)
+		goto exit;
+
+	dump_mgntframe_and_wait(adapter, xmit_frame, max_wating_ms);
+
+	IoOffloadLoc.LocCmd = 0;
+	if(_SUCCESS != rtl8192c_FillH2CCmd(adapter, H2C_92C_IO_OFFLOAD, sizeof(IO_OFFLOAD_LOC), (u8 *)&IoOffloadLoc))
+		goto exit;
+
+	//polling if the IO offloading is done
+	while( (passing_time_ms=rtw_get_passing_time_ms(start_time)) <= max_wating_ms) {
+		#if 0 //C2H
+		if(0xff == rtw_read8(adapter, REG_C2HEVT_CLEAR))
+			break;
+		#else// 0x1c3
+		if(0x00 != (polling_ret=rtw_read8(adapter, 0x1c3)))
+			break;
+		#endif
+		rtw_msleep_os(5);
+	}
+	#if 0 //debug
+	DBG_871X("IOL %s, polling_ret:0x%02x, 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n"
+			, polling_ret==0xff?"success":"error"
+			, polling_ret
+			, rtw_read32(adapter, 0x1c0)
+			, rtw_read32(adapter, 0x1c4)
+			, rtw_read32(adapter, 0x1cc)
+			, rtw_read32(adapter, 0x1e8)
+			, rtw_read32(adapter, 0x130)
+			, rtw_read32(adapter, 0x134)
+	);
+	rtw_write32(adapter, 0x1c0, 0x0);
+	#endif
+
+	if(polling_ret == 0xff)
+		ret =_SUCCESS;
+	else {
+		DBG_871X("IOL %s, polling_ret:0x%02x\n"
+			//", 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n"
+			, polling_ret==0xff?"success":"error"
+			, polling_ret
+			//, rtw_read32(adapter, 0x1c0)
+			//, rtw_read32(adapter, 0x1c4)
+			//, rtw_read32(adapter, 0x1cc)
+			//, rtw_read32(adapter, 0x1e8)
+			//, rtw_read32(adapter, 0x130)
+			//, rtw_read32(adapter, 0x134)
+		);
+		#if 0 //debug
+		rtw_write16(adapter, 0x1c4, 0x0000); 
+		rtw_msleep_os(10);
+		DBG_871X("after reset, 0x1c4=0x%08x\n", rtw_read32(adapter, 0x1c4));
+		#endif
+
+	}
+
+	{
+		#if 0 //C2H
+		u32 c2h_evt;
+		int i;
+		c2h_evt = rtw_read32(adapter, REG_C2HEVT_MSG_NORMAL);
+		DBG_871X("%s io-offloading complete, in %ums: 0x%08x\n", __FUNCTION__, passing_time_ms, c2h_evt);
+		rtw_write8(adapter, REG_C2HEVT_CLEAR, 0x0);
+		#else// 0x1c3
+		DBG_871X("IOL %s complete in %ums\n", __FUNCTION__, passing_time_ms);
+		rtw_write8(adapter, 0x1c3, 0x0);
+		#endif
+	}
+
+exit:
+	return ret;
+
+}
+#endif //CONFIG_IOL
+
+
+#ifdef CONFIG_BEACON_DISABLE_OFFLOAD
+/* 
+ rtl8192c_dis_beacon_fun_cmd()
+	This function shall only be called by PORT1.
+	PORT0's beacon function can't be disabled, because it's used by RA function in FW/HW.
+	
+	// Still has the REG_BCN_CTRL_1 modified by unknowned party issue in case of Primary Interface + PORT1 combination.
+*/
+u8 rtl8192c_dis_beacon_fun_cmd(_adapter* padapter)
+{	
+	u8	buf[2];
+	u8	res=_SUCCESS;
+	
+_func_enter_;	
+	
+	_rtw_memset(buf, 0, sizeof(buf));
+
+	if (padapter->iface_type == IFACE_PORT0) {
+		//buf[0] = 0x1;
+		DBG_871X("%s(): ERROR! padapter->iface_type = %d\n", __FUNCTION__, padapter->iface_type);
+		return _FAIL;		
+	} else
+		buf[1] = 0x1;
+
+	rtl8192c_FillH2CCmd(padapter, H2C_92C_DISABLE_BCN_FUNC, 2, buf);
+	
+_func_exit_;
+
+	return res;
+
+}
+#endif  // CONFIG_BEACON_DISABLE_OFFLOAD
+
+
+#ifdef CONFIG_TSF_RESET_OFFLOAD
+/*
+	ask FW to Reset sync register at Beacon early interrupt
+*/
+u8 rtl8192c_reset_tsf(_adapter *padapter, u8 reset_port )
+{	
+	u8	buf[2];
+	u8	res=_SUCCESS;
+	
+_func_enter_;
+	if (IFACE_PORT0==reset_port) {
+		buf[0] = 0x1; buf[1] = 0;
+	
+	} else{
+		buf[0] = 0x0; buf[1] = 0x1;
+	}
+	rtl8192c_FillH2CCmd(padapter, H2C_92C_RESET_TSF, 2, buf);
+_func_exit_;
+
+	return res;
+}
+
+int reset_tsf(PADAPTER Adapter, u8 reset_port )
+{
+	u8 reset_cnt_before = 0, reset_cnt_after = 0, loop_cnt = 0;
+	u32 reg_reset_tsf_cnt = (IFACE_PORT0==reset_port) ?
+				REG_FW_RESET_TSF_CNT_0:REG_FW_RESET_TSF_CNT_1;
+
+	rtw_scan_abort(Adapter->pbuddy_adapter);	/*	site survey will cause reset_tsf fail	*/
+	reset_cnt_after = reset_cnt_before = rtw_read8(Adapter,reg_reset_tsf_cnt);
+	rtl8192c_reset_tsf(Adapter, reset_port);
+
+	while ((reset_cnt_after == reset_cnt_before ) && (loop_cnt < 10)) {
+		rtw_msleep_os(100);
+		loop_cnt++;
+		reset_cnt_after = rtw_read8(Adapter, reg_reset_tsf_cnt);
+	}
+
+	return(loop_cnt >= 10) ? _FAIL : _TRUE;
+}
+
+
+#endif	// CONFIG_TSF_RESET_OFFLOAD
+
+#ifdef CONFIG_WOWLAN
+
+void rtl8192c_set_wowlan_cmd(_adapter* padapter)
+{
+	u8	res=_SUCCESS;
+	SETWOWLAN_PARM pwowlan_parm;
+	struct pwrctrl_priv *pwrpriv=&padapter->pwrctrlpriv;
+	
+_func_enter_;
+
+	pwowlan_parm.mode =0;
+	pwowlan_parm.gpio_index=0;
+	pwowlan_parm.gpio_duration=0;
+	pwowlan_parm.second_mode =0;
+	pwowlan_parm.reserve=0;
+	
+	if(pwrpriv->wowlan_mode ==_TRUE){
+		pwowlan_parm.mode |=FW_WOWLAN_FUN_EN;
+		//printk("\n %s 1.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode );
+		if(pwrpriv->wowlan_pattern ==_TRUE){
+			pwowlan_parm.mode |= FW_WOWLAN_PATTERN_MATCH;
+		//printk("\n %s 2.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode );
+		}
+		if(pwrpriv->wowlan_magic ==_TRUE){
+			pwowlan_parm.mode |=FW_WOWLAN_MAGIC_PKT;
+		//printk("\n %s 3.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode );
+		}
+		if(pwrpriv->wowlan_unicast ==_TRUE){
+			pwowlan_parm.mode |=FW_WOWLAN_UNICAST;
+		//printk("\n %s 4.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode );
+		}
+		//WOWLAN_GPIO_ACTIVE means GPIO high active
+		//pwowlan_parm.mode |=FW_WOWLAN_GPIO_ACTIVE;
+		pwowlan_parm.mode |=FW_WOWLAN_REKEY_WAKEUP;
+		pwowlan_parm.mode |=FW_WOWLAN_DEAUTH_WAKEUP;
+		
+		rtl8192c_set_FwJoinBssReport_cmd( padapter, 1);
+		
+		//GPIO3
+		pwowlan_parm.gpio_index=3;
+		
+		//duration unit is 64us
+		pwowlan_parm.gpio_duration=0xff;
+		//
+		pwowlan_parm.second_mode|=FW_WOWLAN_GPIO_WAKEUP_EN;
+		//printk("\n %s 5.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode );
+		{	u8 *ptr=(u8 *)&pwowlan_parm;
+			printk("\n %s H2C_WO_WLAN=%x %02x:%02x:%02x:%02x:%02x \n",__FUNCTION__,H2C_WO_WLAN_CMD,ptr[0],ptr[1],ptr[2],ptr[3],ptr[4] );
+		}
+		rtl8192c_FillH2CCmd(padapter, H2C_WO_WLAN_CMD, 4, (u8 *)&pwowlan_parm);
+
+		//keep alive period = 3 * 10 BCN interval
+		pwowlan_parm.mode =3;
+		pwowlan_parm.gpio_index=3;
+		rtl8192c_FillH2CCmd(padapter, KEEP_ALIVE_CONTROL_CMD, 2, (u8 *)&pwowlan_parm);
+		printk("%s after KEEP_ALIVE_CONTROL_CMD register 0x81=%x \n",__FUNCTION__,rtw_read8(padapter, 0x81));
+
+		pwowlan_parm.mode =1;
+		pwowlan_parm.gpio_index=0;
+		pwowlan_parm.gpio_duration=0;
+		rtl8192c_FillH2CCmd(padapter, DISCONNECT_DECISION_CTRL_CMD, 3, (u8 *)&pwowlan_parm);
+		printk("%s after DISCONNECT_DECISION_CTRL_CMD register 0x81=%x \n",__FUNCTION__,rtw_read8(padapter, 0x81));
+		
+		//enable GPIO wakeup
+		pwowlan_parm.mode =1;
+		pwowlan_parm.gpio_index=0;
+		pwowlan_parm.gpio_duration=0;
+		rtl8192c_FillH2CCmd(padapter, REMOTE_WAKE_CTRL_CMD, 3, (u8 *)&pwowlan_parm);
+	}
+	else
+		rtl8192c_FillH2CCmd(padapter, H2C_WO_WLAN_CMD, 3, (u8 *)&pwowlan_parm);
+
+	
+_func_exit_;
+
+	return ;
+
+}
+
+#endif  //CONFIG_WOWLAN
+
+
+
+
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_dm.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_dm.c
new file mode 100755
index 00000000..ca7f4087
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_dm.c
@@ -0,0 +1,4977 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+//============================================================
+// Description:
+//
+// This file is for 92CE/92CU dynamic mechanism only
+//
+//
+//============================================================
+
+//============================================================
+// include files
+//============================================================
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+
+#include <rtl8192c_hal.h>
+#ifdef CONFIG_INTEL_PROXIM
+#include "../proxim/intel_proxim.h"	
+#endif
+//============================================================
+// Global var
+//============================================================
+static u32 EDCAParam[maxAP][3] =
+{          // UL			DL
+	{0x5ea322, 0x00a630, 0x00a44f}, //atheros AP
+	{0x5ea32b, 0x5ea42b, 0x5e4322}, //broadcom AP
+	{0x3ea430, 0x00a630, 0x3ea44f}, //cisco AP
+	{0x5ea44f, 0x00a44f, 0x5ea42b}, //marvell AP
+	{0x5ea422, 0x00a44f, 0x00a44f}, //ralink AP
+	//{0x5ea44f, 0x5ea44f, 0x5ea44f}, //realtek AP
+	{0xa44f, 0x5ea44f, 0x5e431c}, //realtek AP
+	{0x5ea42b, 0xa630, 0x5e431c}, //airgocap AP
+	{0x5ea42b, 0x5ea42b, 0x5ea42b}, //unknown AP
+//	{0x5e4322, 0x00a44f, 0x5ea44f}, //unknown AP
+};
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	dm_DIGInit()
+ *
+ * Overview:	Set DIG scheme init value.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *
+ *---------------------------------------------------------------------------*/
+static void	dm_DIGInit(
+	IN	PADAPTER	pAdapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	
+
+	pDigTable->Dig_Enable_Flag = _TRUE;
+	pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
+	
+	pDigTable->CurIGValue = 0x20;
+	pDigTable->PreIGValue = 0x0;
+
+	pDigTable->CurSTAConnectState = pDigTable->PreSTAConnectState = DIG_STA_DISCONNECT;
+	pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT;
+
+	pDigTable->RssiLowThresh 	= DM_DIG_THRESH_LOW;
+	pDigTable->RssiHighThresh 	= DM_DIG_THRESH_HIGH;
+
+	pDigTable->FALowThresh	= DM_FALSEALARM_THRESH_LOW;
+	pDigTable->FAHighThresh	= DM_FALSEALARM_THRESH_HIGH;
+
+	
+	pDigTable->rx_gain_range_max = DM_DIG_MAX;
+	pDigTable->rx_gain_range_min = DM_DIG_MIN;
+	pDigTable->rx_gain_range_min_nolink = 0;
+
+	pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
+	pDigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX;
+	pDigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN;
+
+	pDigTable->PreCCKPDState = CCK_PD_STAGE_MAX;
+	pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi;
+
+	pDigTable->ForbiddenIGI = DM_DIG_MIN;
+	pDigTable->LargeFAHit = 0;
+	pDigTable->Recover_cnt = 0;
+	pdmpriv->DIG_Dynamic_MIN  = 0x25; //for FUNAI_TV
+}
+
+
+static u8 dm_initial_gain_MinPWDB(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T			*pDigTable = &pdmpriv->DM_DigTable;
+	int	Rssi_val_min = 0;
+	
+	if((pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) &&
+		(pDigTable->CurSTAConnectState == DIG_STA_CONNECT) )
+	{
+		if(pdmpriv->EntryMinUndecoratedSmoothedPWDB != 0)
+#ifdef CONFIG_CONCURRENT_MODE
+			Rssi_val_min  =  (pdmpriv->UndecoratedSmoothedPWDB+pdmpriv->EntryMinUndecoratedSmoothedPWDB)/2;
+#else
+			Rssi_val_min  =  (pdmpriv->EntryMinUndecoratedSmoothedPWDB > pdmpriv->UndecoratedSmoothedPWDB)?
+					pdmpriv->UndecoratedSmoothedPWDB:pdmpriv->EntryMinUndecoratedSmoothedPWDB;		
+#endif //CONFIG_CONCURRENT_MODE
+		else
+			Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB;
+	}
+	else if(pDigTable->CurSTAConnectState == DIG_STA_CONNECT || 
+			pDigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT) 
+		Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB;
+	else if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT)
+		Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+
+	//printk("%s CurMultiSTAConnectState(0x%02x) UndecoratedSmoothedPWDB(%d),EntryMinUndecoratedSmoothedPWDB(%d)\n"
+	//,__FUNCTION__,pDigTable->CurSTAConnectState,
+	//pdmpriv->UndecoratedSmoothedPWDB,pdmpriv->EntryMinUndecoratedSmoothedPWDB);
+
+	return (u8)Rssi_val_min;
+}
+
+
+static VOID 
+dm_FalseAlarmCounterStatistics(
+	IN	PADAPTER	Adapter
+	)
+{
+	u32 ret_value;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);
+#ifdef CONFIG_CONCURRENT_MODE
+	PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
+#endif //CONFIG_CONCURRENT_MODE
+	
+	ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter1, bMaskDWord);
+       FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16);	
+
+       ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter2, bMaskDWord);
+	FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
+	FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16);
+	ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter3, bMaskDWord);
+	FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
+	ret_value = PHY_QueryBBReg(Adapter, rOFDM0_FrameSync, bMaskDWord);
+	FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff);
+	FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16);
+
+	FalseAlmCnt->Cnt_Ofdm_fail = 	FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal +
+								FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail+
+								FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail;
+
+	
+	//hold cck counter
+	PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, BIT(14), 1);
+	
+	ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterLower, bMaskByte0);
+	FalseAlmCnt->Cnt_Cck_fail = ret_value;
+
+	ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterUpper, bMaskByte3);
+	FalseAlmCnt->Cnt_Cck_fail +=  (ret_value& 0xff)<<8;
+	
+	FalseAlmCnt->Cnt_all = (	FalseAlmCnt->Cnt_Parity_Fail +
+						FalseAlmCnt->Cnt_Rate_Illegal +
+						FalseAlmCnt->Cnt_Crc8_fail +
+						FalseAlmCnt->Cnt_Mcs_fail +
+						FalseAlmCnt->Cnt_Cck_fail);	
+
+	Adapter->recvpriv.FalseAlmCnt_all = FalseAlmCnt->Cnt_all;
+#ifdef CONFIG_CONCURRENT_MODE
+	if(pbuddy_adapter)
+		pbuddy_adapter->recvpriv.FalseAlmCnt_all = FalseAlmCnt->Cnt_all;
+#endif //CONFIG_CONCURRENT_MODE
+
+	//reset false alarm counter registers
+	PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 1);
+	PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 0);
+	//reset cck counter
+	PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 0);
+	//enable cck counter
+	PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 2);
+
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("Cnt_Parity_Fail = %ld, Cnt_Rate_Illegal = %ld, Cnt_Crc8_fail = %ld, Cnt_Mcs_fail = %ld\n", 
+	//			FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal, FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail) );
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %ld, Cnt_Cck_fail = %ld, Cnt_all = %ld\n", 
+	//			FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) );
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %ld, Cnt_Cck_fail = %ld, Cnt_all = %ld\n", 
+	//			FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) );
+}
+
+
+static VOID
+DM_Write_DIG(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	
+#ifdef CONFIG_CONCURRENT_MODE
+	if(rtw_buddy_adapter_up(pAdapter))
+	{
+		PADAPTER pbuddy_adapter = pAdapter->pbuddy_adapter;
+		PHAL_DATA_TYPE	pbuddy_HalData = GET_HAL_DATA(pbuddy_adapter);
+		struct dm_priv *pbuddy_dmpriv = &pbuddy_HalData->dmpriv;
+		DIG_T	*pbuddy_DigTable = &pbuddy_dmpriv->DM_DigTable;
+
+		//sync IGValue
+		pbuddy_DigTable->PreIGValue = pDigTable->PreIGValue;
+		pbuddy_DigTable->CurIGValue = pDigTable->CurIGValue;
+	}
+#endif //CONFIG_CONCURRENT_MODE	
+
+
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("CurIGValue = 0x%lx, PreIGValue = 0x%lx, BackoffVal = %d\n", 
+	//			DM_DigTable.CurIGValue, DM_DigTable.PreIGValue, DM_DigTable.BackoffVal));
+
+	if (pDigTable->Dig_Enable_Flag == _FALSE)
+	{
+		//RT_TRACE(	COMP_DIG, DBG_LOUD, ("DIG is disabled\n"));
+		pDigTable->PreIGValue = 0x17;
+		return;
+	}
+
+	if( (pDigTable->PreIGValue != pDigTable->CurIGValue) || ( pAdapter->bForceWriteInitGain ) )
+	{
+		// Set initial gain.
+		//PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pDigTable->CurIGValue);
+		//PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pDigTable->CurIGValue);
+		//printk("%s DIG(0x%02x)\n",__FUNCTION__,pDigTable->CurIGValue);
+		PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, 0x7f, pDigTable->CurIGValue);
+		PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, 0x7f, pDigTable->CurIGValue);
+		pDigTable->PreIGValue = pDigTable->CurIGValue;
+	}
+}
+
+
+static VOID 
+dm_CtrlInitGainByFA(
+	IN	PADAPTER	pAdapter
+)	
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);
+
+	u8	value_IGI = pDigTable->CurIGValue;
+	
+	if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH0)	
+		value_IGI --;
+	else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH1)	
+		value_IGI += 0;
+	else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH2)	
+		value_IGI ++;
+	else if(FalseAlmCnt->Cnt_all >= DM_DIG_FA_TH2)	
+		value_IGI +=2;
+	
+	if(value_IGI > DM_DIG_FA_UPPER)			
+		value_IGI = DM_DIG_FA_UPPER;
+	if(value_IGI < DM_DIG_FA_LOWER)
+		value_IGI = DM_DIG_FA_LOWER;
+
+	if(FalseAlmCnt->Cnt_all > 10000)
+		value_IGI = DM_DIG_FA_UPPER;
+	
+	pDigTable->CurIGValue = value_IGI;
+	
+	DM_Write_DIG(pAdapter);
+	
+}
+
+#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
+VOID dm_CtrlInitGainByRssi( IN PADAPTER pAdapter) 
+{ 
+
+	u32 isBT;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);	
+
+	 //modify DIG upper bound
+	if((pDigTable->Rssi_val_min + 20) > DM_DIG_MAX )
+		pDigTable->rx_gain_range_max = DM_DIG_MAX;
+ 	else
+  		pDigTable->rx_gain_range_max = pDigTable->Rssi_val_min + 20;
+
+	//modify DIG lower bound	
+	if((FalseAlmCnt->Cnt_all > 500)&&(pdmpriv->DIG_Dynamic_MIN < 0x25))
+  		pdmpriv->DIG_Dynamic_MIN++;
+ 	if((FalseAlmCnt->Cnt_all < 500)&&(pdmpriv->DIG_Dynamic_MIN > DM_DIG_MIN))
+  		pdmpriv->DIG_Dynamic_MIN--;
+	if((pDigTable->Rssi_val_min < 8) && (pdmpriv->DIG_Dynamic_MIN > DM_DIG_MIN))
+		pdmpriv->DIG_Dynamic_MIN--;
+	
+ 	//modify DIG lower bound, deal with abnorally large false alarm
+ 	if(FalseAlmCnt->Cnt_all > 10000)
+ 	{
+ 		//RT_TRACE(COMP_DIG, DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n"));
+  		pDigTable->LargeFAHit++;
+ 		 if(pDigTable->ForbiddenIGI < pDigTable->CurIGValue)
+  		{
+   			pDigTable->ForbiddenIGI = pDigTable->CurIGValue;
+	  		pDigTable->LargeFAHit = 1;
+	  	}
+	  	if(pDigTable->LargeFAHit >= 3)
+	  	{
+			if((pDigTable->ForbiddenIGI+1) >pDigTable->rx_gain_range_max)
+		    		pDigTable->rx_gain_range_min = pDigTable->rx_gain_range_max;
+		   	else
+		    		pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1);
+		   	pDigTable->Recover_cnt = 3600; //3600=2hr
+		  }
+	 }
+	 else
+	 {
+	  //Recovery mechanism for IGI lower bound
+	  	if(pDigTable->Recover_cnt != 0){
+	   		pDigTable->Recover_cnt --;
+	  	}
+	  	else
+	 	{
+			if(pDigTable->LargeFAHit == 0 )
+	   		{
+	   			if((pDigTable->ForbiddenIGI -1) < pdmpriv->DIG_Dynamic_MIN) //DM_DIG_MIN)
+			    	{
+			     		pDigTable->ForbiddenIGI = pdmpriv->DIG_Dynamic_MIN; //DM_DIG_MIN;
+			     		pDigTable->rx_gain_range_min = pdmpriv->DIG_Dynamic_MIN; //DM_DIG_MIN;
+			    	}
+			    	else
+			    	{
+			     		pDigTable->ForbiddenIGI --;
+			     		pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1);
+			    	}
+	   		}
+	   		else if(pDigTable->LargeFAHit == 3 )
+	   		{
+	    			pDigTable->LargeFAHit = 0;
+	   		}
+	  	}
+	 }
+ #ifdef CONFIG_USB_HCI
+	if(FalseAlmCnt->Cnt_all < 250)
+	{
+#endif
+		//DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by SS mode\n");
+		
+		isBT = rtw_read8(pAdapter, 0x4fd) & 0x01;
+
+		if(!isBT){
+
+			if(FalseAlmCnt->Cnt_all > pDigTable->FAHighThresh)
+			{
+				if((pDigTable->BackoffVal -2) < pDigTable->BackoffVal_range_min)
+					pDigTable->BackoffVal = pDigTable->BackoffVal_range_min;
+				else
+					pDigTable->BackoffVal -= 2; 
+			}	
+			else if(FalseAlmCnt->Cnt_all < pDigTable->FALowThresh)
+			{
+				if((pDigTable->BackoffVal+2) > pDigTable->BackoffVal_range_max)
+					pDigTable->BackoffVal = pDigTable->BackoffVal_range_max;
+				else
+					pDigTable->BackoffVal +=2;
+			}	
+		}
+		else
+			pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
+
+		pDigTable->CurIGValue = pDigTable->Rssi_val_min+10-pDigTable->BackoffVal;	
+
+		//DBG_8192C("Rssi_val_min = %x BackoffVal %x\n",pDigTable->Rssi_val_min, pDigTable->BackoffVal);
+#ifdef CONFIG_USB_HCI
+	}
+	else
+	{		
+		//DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by FA mode\n");
+		//DBG_8192C("RSSI = 0x%x", pDigTable->Rssi_val_min);
+
+		//Adjust initial gain by false alarm		
+		if(FalseAlmCnt->Cnt_all > 1000)
+			pDigTable->CurIGValue = pDigTable ->PreIGValue+2;
+		else if (FalseAlmCnt->Cnt_all > 750)
+			pDigTable->CurIGValue = pDigTable->PreIGValue+1;
+		else if(FalseAlmCnt->Cnt_all < 500)
+			pDigTable->CurIGValue = pDigTable->PreIGValue-1;	
+	}
+#endif
+
+	//Check initial gain by upper/lower bound
+	if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max)
+		pDigTable->CurIGValue = pDigTable->rx_gain_range_max;
+
+	if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min)
+		pDigTable->CurIGValue = pDigTable->rx_gain_range_min;
+
+	//printk("%s => rx_gain_range_max(0x%02x) rx_gain_range_min(0x%02x)\n",__FUNCTION__,
+	//	pDigTable->rx_gain_range_max,pDigTable->rx_gain_range_min);
+	//printk("%s CurIGValue(0x%02x)  <====\n",__FUNCTION__,pDigTable->CurIGValue );		
+
+	DM_Write_DIG(pAdapter);
+
+}
+#else
+static VOID dm_CtrlInitGainByRssi(IN	PADAPTER	pAdapter)	
+{
+	u32 isBT;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);
+
+	//modify DIG upper bound
+	if((pDigTable->Rssi_val_min + 20) > DM_DIG_MAX )
+		pDigTable->rx_gain_range_max = DM_DIG_MAX;
+	else
+		pDigTable->rx_gain_range_max = pDigTable->Rssi_val_min + 20;
+	//printk("%s Rssi_val_min(0x%02x),rx_gain_range_max(0x%02x)\n",__FUNCTION__,pDigTable->Rssi_val_min,pDigTable->rx_gain_range_max);
+
+	//modify DIG lower bound, deal with abnorally large false alarm
+	if(FalseAlmCnt->Cnt_all > 10000)
+	{
+		//RT_TRACE(COMP_DIG, DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n"));
+
+		pDigTable->LargeFAHit++;
+		if(pDigTable->ForbiddenIGI < pDigTable->CurIGValue)
+		{
+			pDigTable->ForbiddenIGI = pDigTable->CurIGValue;
+			pDigTable->LargeFAHit = 1;
+		}
+
+		if(pDigTable->LargeFAHit >= 3)
+		{
+			if((pDigTable->ForbiddenIGI+1) > pDigTable->rx_gain_range_max)
+				pDigTable->rx_gain_range_min = pDigTable->rx_gain_range_max;
+			else
+				pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1);
+			pDigTable->Recover_cnt = 3600; //3600=2hr
+		}
+	}
+	else
+	{
+		//Recovery mechanism for IGI lower bound
+		if(pDigTable->Recover_cnt != 0)
+			pDigTable->Recover_cnt --;
+		else
+		{
+			if(pDigTable->LargeFAHit == 0 )
+			{
+				if((pDigTable->ForbiddenIGI -1) < DM_DIG_MIN)
+				{
+					pDigTable->ForbiddenIGI = DM_DIG_MIN;
+					pDigTable->rx_gain_range_min = DM_DIG_MIN;
+				}
+				else
+				{
+					pDigTable->ForbiddenIGI --;
+					pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1);
+				}
+			}
+			else if(pDigTable->LargeFAHit == 3 )
+			{
+				pDigTable->LargeFAHit = 0;
+			}
+		}
+	}
+
+	//RT_TRACE(COMP_DIG, DBG_LOUD, ("DM_DigTable.ForbiddenIGI = 0x%x, DM_DigTable.LargeFAHit = 0x%x\n",pDigTable->ForbiddenIGI, pDigTable->LargeFAHit));
+	//RT_TRACE(COMP_DIG, DBG_LOUD, ("DM_DigTable.rx_gain_range_max = 0x%x, DM_DigTable.rx_gain_range_min = 0x%x\n",pDigTable->rx_gain_range_max, pDigTable->rx_gain_range_min));
+
+#ifdef CONFIG_USB_HCI
+	if(FalseAlmCnt->Cnt_all < 250)
+	{
+#endif
+		//DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by SS mode\n");
+		
+		isBT = rtw_read8(pAdapter, 0x4fd) & 0x01;
+
+		if(!isBT){
+
+			if(FalseAlmCnt->Cnt_all > pDigTable->FAHighThresh)
+			{
+				if((pDigTable->BackoffVal -2) < pDigTable->BackoffVal_range_min)
+					pDigTable->BackoffVal = pDigTable->BackoffVal_range_min;
+				else
+					pDigTable->BackoffVal -= 2; 
+			}	
+			else if(FalseAlmCnt->Cnt_all < pDigTable->FALowThresh)
+			{
+				if((pDigTable->BackoffVal+2) > pDigTable->BackoffVal_range_max)
+					pDigTable->BackoffVal = pDigTable->BackoffVal_range_max;
+				else
+					pDigTable->BackoffVal +=2;
+			}	
+		}
+		else
+			pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
+
+		pDigTable->CurIGValue = pDigTable->Rssi_val_min+10-pDigTable->BackoffVal;	
+
+		//DBG_8192C("Rssi_val_min = %x BackoffVal %x\n",pDigTable->Rssi_val_min, pDigTable->BackoffVal);
+#ifdef CONFIG_USB_HCI
+	}
+	else
+	{		
+		//DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by FA mode\n");
+		//DBG_8192C("RSSI = 0x%x", pDigTable->Rssi_val_min);
+
+		//Adjust initial gain by false alarm		
+		if(FalseAlmCnt->Cnt_all > 1000)
+			pDigTable->CurIGValue = pDigTable ->PreIGValue+2;
+		else if (FalseAlmCnt->Cnt_all > 750)
+			pDigTable->CurIGValue = pDigTable->PreIGValue+1;
+		else if(FalseAlmCnt->Cnt_all < 500)
+			pDigTable->CurIGValue = pDigTable->PreIGValue-1;	
+	}
+#endif
+
+	//Check initial gain by upper/lower bound
+	if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max)
+		pDigTable->CurIGValue = pDigTable->rx_gain_range_max;
+
+	if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min)
+		pDigTable->CurIGValue = pDigTable->rx_gain_range_min;
+
+	//printk("%s => rx_gain_range_max(0x%02x) rx_gain_range_min(0x%02x)\n",__FUNCTION__,
+	//	pDigTable->rx_gain_range_max,pDigTable->rx_gain_range_min);
+	//printk("%s CurIGValue(0x%02x)  <====\n",__FUNCTION__,pDigTable->CurIGValue );		
+
+	DM_Write_DIG(pAdapter);
+
+}
+#endif
+
+static VOID
+dm_initial_gain_Multi_STA(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_priv	*pmlmepriv = &(pAdapter->mlmepriv);
+	DIG_T			*pDigTable = &pdmpriv->DM_DigTable;
+	int				rssi_strength =  pdmpriv->EntryMinUndecoratedSmoothedPWDB;	
+	BOOLEAN			bMulti_STA = _FALSE;
+	
+#ifdef CONFIG_CONCURRENT_MODE
+	//AP Mode
+	if(check_buddy_fwstate(pAdapter, WIFI_AP_STATE) == _TRUE && (rssi_strength !=0))
+	{
+		bMulti_STA = _TRUE;
+	}	
+	else if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT && rssi_strength==0) //STA+STA MODE
+	{
+		bMulti_STA = _TRUE;
+		rssi_strength = pdmpriv->UndecoratedSmoothedPWDB;		
+	}
+#endif //CONFIG_CONCURRENT_MODE
+
+
+	//ADHOC and AP Mode
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+	{
+		bMulti_STA = _TRUE;
+	}
+
+
+	if((bMulti_STA == _FALSE) 
+		|| (pDigTable->CurSTAConnectState == DIG_STA_DISCONNECT))	 
+	{
+		pdmpriv->binitialized = _FALSE;
+		pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
+		return;
+	}	
+	else if(pdmpriv->binitialized == _FALSE)
+	{
+		pdmpriv->binitialized = _TRUE;
+		pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_0;
+		pDigTable->CurIGValue = 0x20;
+		DM_Write_DIG(pAdapter);
+	}
+
+	// Initial gain control by ap mode 
+	if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT)
+	{
+		if (	(rssi_strength < pDigTable->RssiLowThresh) 	&& 
+			(pDigTable->Dig_Ext_Port_Stage != DIG_EXT_PORT_STAGE_1))
+		{					
+			// Set to dig value to 0x20 for Luke's opinion after disable dig
+			if(pDigTable->Dig_Ext_Port_Stage == DIG_EXT_PORT_STAGE_2)
+			{
+				pDigTable->CurIGValue = 0x20;
+				DM_Write_DIG(pAdapter);				
+			}	
+			pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_1;	
+		}	
+		else if (rssi_strength > pDigTable->RssiHighThresh)
+		{
+			pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_2;
+			dm_CtrlInitGainByFA(pAdapter);
+		} 
+	}	
+	else if(pDigTable->Dig_Ext_Port_Stage != DIG_EXT_PORT_STAGE_0)
+	{
+		pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_0;
+		pDigTable->CurIGValue = 0x20;
+		DM_Write_DIG(pAdapter);
+	}
+
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("CurMultiSTAConnectState = %x Dig_Ext_Port_Stage %x\n", 
+	//			DM_DigTable.CurMultiSTAConnectState, DM_DigTable.Dig_Ext_Port_Stage));
+}
+
+static VOID 
+dm_initial_gain_STA_beforelinked(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	PFALSE_ALARM_STATISTICS pFalseAlmCnt = &(pdmpriv->FalseAlmCnt);
+	
+	//CurrentIGI = pDM_DigTable->rx_gain_range_min;//pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min
+	//ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n"));
+	//2012.03.30 LukeLee: enable DIG before link but with very high thresholds
+      	if(pFalseAlmCnt->Cnt_all > 10000)
+		pDigTable->CurIGValue = pDigTable->CurIGValue + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2;
+	else if (pFalseAlmCnt->Cnt_all > 8000)
+		pDigTable->CurIGValue = pDigTable->CurIGValue + 1;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1;
+	else if(pFalseAlmCnt->Cnt_all < 500)
+		 pDigTable->CurIGValue = pDigTable->CurIGValue - 1;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; 
+
+	//Check initial gain by upper/lower bound
+	if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max)
+		pDigTable->CurIGValue = pDigTable->rx_gain_range_max;
+
+	if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min)
+		pDigTable->CurIGValue = pDigTable->rx_gain_range_min;
+	
+	printk("%s ==> FalseAlmCnt->Cnt_all:%d CurIGValue:0x%02x \n",__FUNCTION__,pFalseAlmCnt->Cnt_all ,pDigTable->CurIGValue);		 
+}
+
+static VOID 
+dm_initial_gain_STA(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("PreSTAConnectState = %x, CurSTAConnectState = %x\n", 
+	//			DM_DigTable.PreSTAConnectState, DM_DigTable.CurSTAConnectState));
+
+
+	if(pDigTable->PreSTAConnectState == pDigTable->CurSTAConnectState||
+	   pDigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT ||
+	   pDigTable->CurSTAConnectState == DIG_STA_CONNECT)
+	{
+		// beforeconnect -> beforeconnect or  connect -> connect
+		// (dis)connect -> beforeconnect
+		// disconnect -> connecct or beforeconnect -> connect
+		if(pDigTable->CurSTAConnectState != DIG_STA_DISCONNECT)
+		{
+			pDigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter);
+			dm_CtrlInitGainByRssi(pAdapter);
+		}	
+#ifdef CONFIG_IOCTL_CFG80211
+		else if((wdev_to_priv(pAdapter->rtw_wdev))->p2p_enabled == _TRUE)
+		{
+			pDigTable->CurIGValue = 0x30;
+			DM_Write_DIG(pAdapter);
+		}
+#endif		
+		else{ // pDigTable->CurSTAConnectState == DIG_STA_DISCONNECT 
+		#ifdef CONFIG_BEFORE_LINKED_DIG
+			//printk("%s==> ##1 CurIGI(0x%02x),PreIGValue(0x%02x) \n",__FUNCTION__,pDigTable->CurIGValue,pDigTable->PreIGValue );
+			dm_initial_gain_STA_beforelinked(pAdapter);
+			DM_Write_DIG(pAdapter);
+		#endif //CONFIG_BEFORE_LINKED_DIG
+		}
+	}
+	else	
+	{		
+		// connect -> disconnect or beforeconnect -> disconnect
+		pDigTable->Rssi_val_min = 0;
+		pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
+		pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
+		pDigTable->CurIGValue = 0x20;
+		pDigTable->PreIGValue = 0;	
+		#ifdef CONFIG_BEFORE_LINKED_DIG			
+		//printk("%s==> ##2 CurIGI(0x%02x),PreIGValue(0x%02x) \n",__FUNCTION__,pDigTable->CurIGValue,pDigTable->PreIGValue );	
+		dm_initial_gain_STA_beforelinked(pAdapter);			 
+ 		#endif //CONFIG_BEFORE_LINKED_DIG
+		
+
+		DM_Write_DIG(pAdapter);
+	}
+
+}
+
+
+static void dm_CCK_PacketDetectionThresh(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+
+	if(pDigTable->CurSTAConnectState == DIG_STA_CONNECT)
+	{
+		pDigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter);
+		if(pDigTable->PreCCKPDState == CCK_PD_STAGE_LowRssi)
+		{
+			if(pDigTable->Rssi_val_min <= 25)
+				pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi;
+			else
+				pDigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi;
+		}
+		else{
+			if(pDigTable->Rssi_val_min <= 20)
+				pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi;
+			else
+				pDigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi;
+		}
+	}
+	else
+		pDigTable->CurCCKPDState=CCK_PD_STAGE_MAX;
+	
+	if(pDigTable->PreCCKPDState != pDigTable->CurCCKPDState)
+	{
+		if((pDigTable->CurCCKPDState == CCK_PD_STAGE_LowRssi)||
+			(pDigTable->CurCCKPDState == CCK_PD_STAGE_MAX))
+		{
+			PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0x83);
+				
+			//PHY_SetBBReg(pAdapter, rCCK0_System, bMaskByte1, 0x40);
+			//if(IS_92C_SERIAL(pHalData->VersionID))
+				//PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd7);
+		}
+		else
+		{
+			PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0xcd);
+			//PHY_SetBBReg(pAdapter,rCCK0_System, bMaskByte1, 0x47);
+			//if(IS_92C_SERIAL(pHalData->VersionID))
+				//PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd3);
+		}
+
+		pDigTable->PreCCKPDState = pDigTable->CurCCKPDState;
+	}
+	
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("CCKPDStage=%x\n",pDigTable->CurCCKPDState));
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("is92C=%x\n",IS_92C_SERIAL(pHalData->VersionID)));
+	
+}
+
+
+static	void
+dm_CtrlInitGainByTwoPort(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_priv	*pmlmepriv = &(pAdapter->mlmepriv);
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+
+	if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE)
+		return;
+
+	// Decide the current status and if modify initial gain or not
+	if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE)
+	{
+		pDigTable->CurSTAConnectState = DIG_STA_BEFORE_CONNECT;
+	}
+	else if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) 
+	{
+		pDigTable->CurSTAConnectState = DIG_STA_CONNECT;
+	}	
+	else
+	{
+		pDigTable->CurSTAConnectState = DIG_STA_DISCONNECT;
+	}
+	
+
+	pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT;
+	if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+	{
+		if((is_IBSS_empty(pAdapter)==_FAIL) && (pAdapter->stapriv.asoc_sta_count > 2))
+			pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT;
+	}
+	
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+	{
+		if(pAdapter->stapriv.asoc_sta_count > 2)
+			pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT;					
+	}
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if(check_buddy_fwstate(pAdapter, WIFI_AP_STATE) == _TRUE)
+	{
+		PADAPTER pbuddy_adapter = pAdapter->pbuddy_adapter;
+		
+		if(pbuddy_adapter->stapriv.asoc_sta_count > 2)
+		{
+			pDigTable->CurSTAConnectState = DIG_STA_CONNECT;
+			pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT;	
+		}	
+	}	
+	else if(check_buddy_fwstate(pAdapter, WIFI_STATION_STATE) == _TRUE	&& 
+		check_buddy_fwstate(pAdapter, _FW_LINKED) == _TRUE)
+	{
+		pDigTable->CurSTAConnectState = DIG_STA_CONNECT;
+
+	}
+#endif //CONFIG_CONCURRENT_MODE
+
+
+	dm_initial_gain_STA(pAdapter);
+	dm_initial_gain_Multi_STA(pAdapter);
+	//Baron temp DIG solution for DMP
+	//dm_CtrlInitGainByFA(pAdapter);
+
+	dm_CCK_PacketDetectionThresh(pAdapter);
+
+	pDigTable->PreSTAConnectState = pDigTable->CurSTAConnectState;
+	
+}
+
+
+static void dm_DIG(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	
+	//RTPRINT(FDM, DM_Monitor, ("dm_DIG() ==>\n"));
+	
+	if(pdmpriv->bDMInitialGainEnable == _FALSE)
+		return;
+	
+	//if(pDigTable->Dig_Enable_Flag == _FALSE)
+	//	return;
+	
+	if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_DIG))
+		return;
+	
+	//RTPRINT(FDM, DM_Monitor, ("dm_DIG() progress \n"));
+
+	dm_CtrlInitGainByTwoPort(pAdapter);
+	
+	//RTPRINT(FDM, DM_Monitor, ("dm_DIG() <==\n"));
+}
+
+static void dm_SavePowerIndex(IN	PADAPTER	Adapter)
+{
+	u8			index;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32			Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
+	
+	for(index = 0; index< 6; index++)
+		pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]);
+}
+
+static void dm_RestorePowerIndex(IN	PADAPTER	Adapter)
+{
+	u8			index;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32			Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
+	
+	for(index = 0; index< 6; index++)
+		rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]);
+}
+
+static void dm_WritePowerIndex(
+		IN	PADAPTER	Adapter, 
+		IN 	u8		Value)
+{
+	u8			index;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32			Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
+	
+	for(index = 0; index< 6; index++)
+		rtw_write8(Adapter, Power_Index_REG[index], Value);
+}
+
+static void dm_InitDynamicTxPower(IN	PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+#ifdef CONFIG_USB_HCI
+#ifdef CONFIG_INTEL_PROXIM
+	if((pHalData->BoardType == BOARD_USB_High_PA)||(Adapter->proximity.proxim_support==_TRUE))
+#else
+	if(pHalData->BoardType == BOARD_USB_High_PA)
+#endif
+	{
+		dm_SavePowerIndex(Adapter);
+		pdmpriv->bDynamicTxPowerEnable = _TRUE;
+	}		
+	else	
+#else
+		pdmpriv->bDynamicTxPowerEnable = _FALSE;
+#endif
+
+	pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal;
+	pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+}
+
+
+static void dm_DynamicTxPower(IN	PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+	int	UndecoratedSmoothedPWDB;
+
+	if(!pdmpriv->bDynamicTxPowerEnable)
+		return;
+
+	// If dynamic high power is disabled.
+	if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_HP) )
+	{
+		pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+		return;
+	}
+
+	// STA not connected and AP not connected
+	if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) &&	
+		(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0))
+	{
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("Not connected to any \n"));
+		pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+
+		//the LastDTPlvl should reset when disconnect, 
+		//otherwise the tx power level wouldn't change when disconnect and connect again.
+		// Maddest 20091220.
+		pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal;
+		return;
+	}
+#ifdef CONFIG_INTEL_PROXIM
+	if(Adapter->proximity.proxim_on== _TRUE){
+		struct proximity_priv *prox_priv=Adapter->proximity.proximity_priv;
+	// Intel set fixed tx power 
+	printk("\n %s  Adapter->proximity.proxim_on=%d prox_priv->proxim_modeinfo->power_output=%d \n",__FUNCTION__,Adapter->proximity.proxim_on,prox_priv->proxim_modeinfo->power_output);
+	if(prox_priv!=NULL){
+	if(prox_priv->proxim_modeinfo->power_output> 0)
+	
+	{
+		switch(prox_priv->proxim_modeinfo->power_output){
+			case 1:
+				pdmpriv->DynamicTxHighPowerLvl  = TxHighPwrLevel_100;
+				printk("TxHighPwrLevel_100\n");
+				break;
+			case 2:
+				pdmpriv->DynamicTxHighPowerLvl  = TxHighPwrLevel_70;
+				printk("TxHighPwrLevel_70\n");
+				break;
+			case 3:
+				pdmpriv->DynamicTxHighPowerLvl  = TxHighPwrLevel_50;
+				printk("TxHighPwrLevel_50\n");
+				break;
+			case 4:
+				pdmpriv->DynamicTxHighPowerLvl  = TxHighPwrLevel_35;
+				printk("TxHighPwrLevel_35\n");
+				break;
+			case 5:
+				pdmpriv->DynamicTxHighPowerLvl  = TxHighPwrLevel_15;
+				printk("TxHighPwrLevel_15\n");
+				break;
+			default:
+				pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100;
+				printk("TxHighPwrLevel_100\n");
+				break;
+		}		
+	}
+	}
+	}
+	else
+#endif		
+{
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)	// Default port
+	{
+		//todo: AP Mode
+		if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
+		       (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE))
+		{
+			UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+			//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
+		}
+		else
+		{
+			UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB;
+			//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
+		}
+	}
+	else // associated entry pwdb
+	{	
+		UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
+	}
+		
+	if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2)
+	{
+		pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n"));
+	}
+	else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) &&
+		(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) )
+	{
+		pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
+	}
+	else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5))
+	{
+		pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n"));
+	}
+}
+	if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) )
+	{
+		PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
+		if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) // HP1 -> Normal  or HP2 -> Normal
+			dm_RestorePowerIndex(Adapter);
+		else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
+			dm_WritePowerIndex(Adapter, 0x14);
+		else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
+			dm_WritePowerIndex(Adapter, 0x10);
+	}
+	pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl;
+	
+}
+
+
+static VOID
+DM_ChangeDynamicInitGainThresh(
+	IN	PADAPTER	pAdapter,
+	IN	u32		DM_Type,
+	IN	u32		DM_Value)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+
+	if (DM_Type == DIG_TYPE_THRESH_HIGH)
+	{
+		pDigTable->RssiHighThresh = DM_Value;		
+	}
+	else if (DM_Type == DIG_TYPE_THRESH_LOW)
+	{
+		pDigTable->RssiLowThresh = DM_Value;
+	}
+	else if (DM_Type == DIG_TYPE_ENABLE)
+	{
+		pDigTable->Dig_Enable_Flag = _TRUE;
+	}	
+	else if (DM_Type == DIG_TYPE_DISABLE)
+	{
+		pDigTable->Dig_Enable_Flag = _FALSE;
+	}	
+	else if (DM_Type == DIG_TYPE_BACKOFF)
+	{
+		if(DM_Value > 30)
+			DM_Value = 30;
+		pDigTable->BackoffVal = (u8)DM_Value;
+	}
+	else if(DM_Type == DIG_TYPE_RX_GAIN_MIN)
+	{
+		if(DM_Value == 0)
+			DM_Value = 0x1;
+		pDigTable->rx_gain_range_min = (u8)DM_Value;
+	}
+	else if(DM_Type == DIG_TYPE_RX_GAIN_MAX)
+	{
+		if(DM_Value > 0x50)
+			DM_Value = 0x50;
+		pDigTable->rx_gain_range_max = (u8)DM_Value;
+	}
+}	/* DM_ChangeDynamicInitGainThresh */
+
+
+static VOID PWDB_Monitor(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	int	i;
+	int	tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff;
+	u8 	sta_cnt=0;
+	u32 PWDB_rssi[NUM_STA]={0};//[0~15]:MACID, [16~31]:PWDB_rssi
+
+	if(check_fwstate(&Adapter->mlmepriv, _FW_LINKED) != _TRUE)
+		return;
+
+
+	if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+	{
+		_irqL irqL;
+		_list	*plist, *phead;
+		struct sta_info *psta;
+		struct sta_priv *pstapriv = &Adapter->stapriv;
+		u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff};
+	
+		_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+		for(i=0; i< NUM_STA; i++)
+		{
+			phead = &(pstapriv->sta_hash[i]);
+			plist = get_next(phead);
+		
+			while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
+			{
+				psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
+
+				plist = get_next(plist);
+
+				if(_rtw_memcmp(psta	->hwaddr, bcast_addr, ETH_ALEN) || 
+					_rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN))
+					continue;
+
+				if(psta->state & WIFI_ASOC_STATE)
+				{
+					
+					if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
+						tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+
+					if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
+						tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+
+					PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16));
+				}
+			
+			}
+
+		}
+	
+		_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+
+		
+		if(pHalData->fw_ractrl == _TRUE)
+		{
+			// Report every sta's RSSI to FW
+			for(i=0; i< sta_cnt; i++)
+			{
+				rtl8192c_set_rssi_cmd(Adapter, (u8*)&PWDB_rssi[i]);
+			}
+		}
+
+	}
+
+
+
+	if(tmpEntryMaxPWDB != 0)	// If associated entry is found
+	{
+		pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;		
+	}
+	else
+	{
+		pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0;
+	}
+	
+	if(tmpEntryMinPWDB != 0xff) // If associated entry is found
+	{
+		pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;		
+	}
+	else
+	{
+		pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0;
+	}
+
+
+	if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE)
+	{
+	
+		if(pHalData->fw_ractrl == _TRUE)
+		{
+			u32 param = (u32)(pdmpriv->UndecoratedSmoothedPWDB<<16);
+		
+			param |= 0;//macid=0 for sta mode;
+			
+			rtl8192c_set_rssi_cmd(Adapter, (u8*)&param);
+		}
+	}
+
+}
+
+
+static void
+DM_InitEdcaTurbo(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	pHalData->bCurrentTurboEDCA = _FALSE;
+	Adapter->recvpriv.bIsAnyNonBEPkts = _FALSE;
+
+}
+
+
+static void
+dm_CheckEdcaTurbo(
+	IN	PADAPTER	Adapter
+	)
+{
+	u32 	trafficIndex;
+	u32	edca_param;
+	u64	cur_tx_bytes = 0;
+	u64	cur_rx_bytes = 0;
+	u8	bbtchange = _FALSE;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	struct xmit_priv		*pxmitpriv = &(Adapter->xmitpriv);
+	struct recv_priv		*precvpriv = &(Adapter->recvpriv);
+	struct registry_priv	*pregpriv = &Adapter->registrypriv;
+	struct mlme_ext_priv	*pmlmeext = &(Adapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);	
+#endif
+
+
+	if ((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0))
+	{
+		goto dm_CheckEdcaTurbo_EXIT;
+	}
+
+	if (pmlmeinfo->assoc_AP_vendor >= maxAP)
+	{
+		goto dm_CheckEdcaTurbo_EXIT;
+	}
+
+#ifdef CONFIG_BT_COEXIST
+	if(pbtpriv->BT_Coexist)
+	{
+		if( (pbtpriv->BT_EDCA[UP_LINK]!=0) ||  (pbtpriv->BT_EDCA[DOWN_LINK]!=0))
+		{
+			bbtchange = _TRUE;		
+		}
+	}
+#endif
+
+	// Check if the status needs to be changed.
+	if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) )
+	{
+		cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes;
+		cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes;
+
+		//traffic, TX or RX
+		if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP))
+		{
+			if (cur_tx_bytes > (cur_rx_bytes << 2))
+			{ // Uplink TP is present.
+				trafficIndex = UP_LINK; 
+			}
+			else
+			{ // Balance TP is present.
+				trafficIndex = DOWN_LINK;
+			}
+		}
+		else
+		{
+			if (cur_rx_bytes > (cur_tx_bytes << 2))
+			{ // Downlink TP is present.
+				trafficIndex = DOWN_LINK;
+			}
+			else
+			{ // Balance TP is present.
+				trafficIndex = UP_LINK;
+			}
+		}
+
+		if ((pdmpriv->prv_traffic_idx != trafficIndex) || (!pHalData->bCurrentTurboEDCA))
+		{
+#ifdef CONFIG_BT_COEXIST
+			if(_TRUE == bbtchange)
+			{
+				edca_param = pbtpriv->BT_EDCA[trafficIndex];
+			}
+			else
+#endif
+			{
+#if 0
+				//adjust EDCA parameter for BE queue
+				edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
+#else
+
+				if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N))
+				{
+					edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
+				}
+				else
+				{
+					edca_param = EDCAParam[unknownAP][trafficIndex];
+				}
+#endif
+			}
+
+#ifdef CONFIG_PCI_HCI
+			if(IS_92C_SERIAL(pHalData->VersionID))
+			{
+				edca_param = 0x60a42b;
+			}
+			else
+			{
+				edca_param = 0x6ea42b;
+			}
+#endif
+			rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
+
+			pdmpriv->prv_traffic_idx = trafficIndex;
+		}
+		
+		pHalData->bCurrentTurboEDCA = _TRUE;
+	}
+	else
+	{
+		//
+		// Turn Off EDCA turbo here.
+		// Restore original EDCA according to the declaration of AP.
+		//
+		 if(pHalData->bCurrentTurboEDCA)
+		{
+			rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE);
+			pHalData->bCurrentTurboEDCA = _FALSE;
+		}
+	}
+
+dm_CheckEdcaTurbo_EXIT:
+	// Set variables for next time.
+	precvpriv->bIsAnyNonBEPkts = _FALSE;
+	pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes;
+	precvpriv->last_rx_bytes = precvpriv->rx_bytes;
+
+}
+
+#define DPK_DELTA_MAPPING_NUM	13
+#define index_mapping_HP_NUM		15
+
+static	VOID
+dm_TXPowerTrackingCallback_ThermalMeter_92C(
+            IN PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8			ThermalValue = 0, delta, delta_LCK, delta_IQK, delta_HP, TimeOut = 100;
+	int 			ele_A, ele_D, TempCCk, X, value32;
+	int			Y, ele_C;
+	s8			OFDM_index[2], CCK_index = 0, OFDM_index_old[2], CCK_index_old = 0;
+	int			i = 0;
+	BOOLEAN		is2T = IS_92C_SERIAL(pHalData->VersionID);
+
+#if MP_DRIVER == 1
+	PMPT_CONTEXT	pMptCtx = &(Adapter->mppriv.MptCtx);	
+	u8			*TxPwrLevel = pMptCtx->TxPwrLevel;
+#endif
+	u8			OFDM_min_index = 6, rf; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur
+#if 0
+	u32			DPK_delta_mapping[2][DPK_DELTA_MAPPING_NUM] = {
+					{0x1c, 0x1c, 0x1d, 0x1d, 0x1e, 
+					 0x1f, 0x00, 0x00, 0x01, 0x01,
+					 0x02, 0x02, 0x03},
+					{0x1c, 0x1d, 0x1e, 0x1e, 0x1e,
+					 0x1f, 0x00, 0x00, 0x01, 0x02,
+					 0x02, 0x03, 0x03}};
+#endif
+#ifdef CONFIG_USB_HCI
+	u8			ThermalValue_HP_count = 0;
+	u32			ThermalValue_HP = 0;
+	s32			index_mapping_HP[index_mapping_HP_NUM] = {
+					0,	1,	3,	4,	6,	
+					7,	9,	10,	12,	13,	
+					15,	16,	18,	19,	21
+					};
+
+	s8			index_HP;
+#endif
+
+	pdmpriv->TXPowerTrackingCallbackCnt++;	//cosa add for debug
+	pdmpriv->bTXPowerTrackingInit = _TRUE;
+
+	if(pHalData->CurrentChannel == 14 && !pdmpriv->bCCKinCH14)
+		pdmpriv->bCCKinCH14 = _TRUE;
+	else if(pHalData->CurrentChannel != 14 && pdmpriv->bCCKinCH14)
+		pdmpriv->bCCKinCH14 = _FALSE;
+
+	//DBG_8192C("===>dm_TXPowerTrackingCallback_ThermalMeter_92C\n");
+
+	ThermalValue = (u8)PHY_QueryRFReg(Adapter, RF_PATH_A, RF_T_METER, 0x1f);	// 0x24: RF Reg[4:0]	
+
+	//DBG_8192C("\n\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n",ThermalValue,pdmpriv->ThermalValue,  pHalData->EEPROMThermalMeter);
+
+	rtl8192c_PHY_APCalibrate(Adapter, (ThermalValue - pHalData->EEPROMThermalMeter));
+
+	if(is2T)
+		rf = 2;
+	else
+		rf = 1;
+	
+	if(ThermalValue)
+	{
+//		if(!pHalData->ThermalValue)
+		{
+			//Query OFDM path A default setting 		
+			ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord)&bMaskOFDM_D;
+			for(i=0; i<OFDM_TABLE_SIZE_92C; i++)	//find the index
+			{
+				if(ele_D == (OFDMSwingTable[i]&bMaskOFDM_D))
+				{
+					OFDM_index_old[0] = (u8)i;
+					//DBG_8192C("Initial pathA ele_D reg0x%x = 0x%x, OFDM_index=0x%x\n", rOFDM0_XATxIQImbalance, ele_D, OFDM_index_old[0]);
+					break;
+				}
+			}
+
+			//Query OFDM path B default setting 
+			if(is2T)
+			{
+				ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord)&bMaskOFDM_D;
+				for(i=0; i<OFDM_TABLE_SIZE_92C; i++)	//find the index
+				{
+					if(ele_D == (OFDMSwingTable[i]&bMaskOFDM_D))
+					{
+						OFDM_index_old[1] = (u8)i;
+						//DBG_8192C("Initial pathB ele_D reg0x%x = 0x%x, OFDM_index=0x%x\n",rOFDM0_XBTxIQImbalance, ele_D, OFDM_index_old[1]);
+						break;
+					}
+				}
+			}
+
+			//Query CCK default setting From 0xa24
+			TempCCk = PHY_QueryBBReg(Adapter, rCCK0_TxFilter2, bMaskDWord)&bMaskCCK;
+			for(i=0 ; i<CCK_TABLE_SIZE ; i++)
+			{
+				if(pdmpriv->bCCKinCH14)
+				{
+					if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4)==_TRUE)
+					{
+						CCK_index_old =(u8)i;
+						//DBG_8192C("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch 14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14);
+						break;
+					}
+				}
+				else
+				{
+					if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4)==_TRUE)
+					{
+						CCK_index_old =(u8)i;
+						//DBG_8192C("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14);
+						break;
+					}			
+				}
+			}	
+
+			if(!pdmpriv->ThermalValue)
+			{
+				pdmpriv->ThermalValue = pHalData->EEPROMThermalMeter;
+				pdmpriv->ThermalValue_LCK = ThermalValue;
+				pdmpriv->ThermalValue_IQK = ThermalValue;
+				pdmpriv->ThermalValue_DPK = pHalData->EEPROMThermalMeter;
+
+#ifdef CONFIG_USB_HCI
+				for(i = 0; i < rf; i++)
+					pdmpriv->OFDM_index_HP[i] = pdmpriv->OFDM_index[i] = OFDM_index_old[i];
+				pdmpriv->CCK_index_HP = pdmpriv->CCK_index = CCK_index_old;
+#else
+				for(i = 0; i < rf; i++)
+					pdmpriv->OFDM_index[i] = OFDM_index_old[i];
+				pdmpriv->CCK_index = CCK_index_old;
+#endif
+			}
+
+#ifdef CONFIG_USB_HCI
+			if(pHalData->BoardType == BOARD_USB_High_PA)
+			{
+				pdmpriv->ThermalValue_HP[pdmpriv->ThermalValue_HP_index] = ThermalValue;
+				pdmpriv->ThermalValue_HP_index++;
+				if(pdmpriv->ThermalValue_HP_index == HP_THERMAL_NUM)
+					pdmpriv->ThermalValue_HP_index = 0;
+
+				for(i = 0; i < HP_THERMAL_NUM; i++)
+				{
+					if(pdmpriv->ThermalValue_HP[i])
+					{
+						ThermalValue_HP += pdmpriv->ThermalValue_HP[i];
+						ThermalValue_HP_count++;
+					}			
+				}
+		
+				if(ThermalValue_HP_count)
+					ThermalValue = (u8)(ThermalValue_HP / ThermalValue_HP_count);
+			}
+#endif
+		}
+
+		delta = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue);
+#ifdef CONFIG_USB_HCI
+		if(pHalData->BoardType == BOARD_USB_High_PA)
+		{
+			if(pdmpriv->bDoneTxpower)
+				delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue);
+			else
+				delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue);						
+		}
+		else
+#endif	
+		{
+			delta_HP = 0;			
+		}
+		delta_LCK = (ThermalValue > pdmpriv->ThermalValue_LCK)?(ThermalValue - pdmpriv->ThermalValue_LCK):(pdmpriv->ThermalValue_LCK - ThermalValue);
+		delta_IQK = (ThermalValue > pdmpriv->ThermalValue_IQK)?(ThermalValue - pdmpriv->ThermalValue_IQK):(pdmpriv->ThermalValue_IQK - ThermalValue);
+
+		//DBG_8192C("Readback Thermal Meter = 0x%lx pre thermal meter 0x%lx EEPROMthermalmeter 0x%lx delta 0x%lx delta_LCK 0x%lx delta_IQK 0x%lx\n", ThermalValue, pHalData->ThermalValue, pHalData->EEPROMThermalMeter, delta, delta_LCK, delta_IQK);
+
+		if(delta_LCK > 1)
+		{
+			pdmpriv->ThermalValue_LCK = ThermalValue;
+			rtl8192c_PHY_LCCalibrate(Adapter);
+		}
+		
+		if((delta > 0 || delta_HP > 0) && pdmpriv->TxPowerTrackControl)
+		{
+#ifdef CONFIG_USB_HCI
+			if(pHalData->BoardType == BOARD_USB_High_PA)
+			{
+				pdmpriv->bDoneTxpower = _TRUE;
+				delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue);						
+				
+				if(delta_HP > index_mapping_HP_NUM-1)					
+					index_HP = index_mapping_HP[index_mapping_HP_NUM-1];
+				else
+					index_HP = index_mapping_HP[delta_HP];
+				
+				if(ThermalValue > pHalData->EEPROMThermalMeter)	//set larger Tx power
+				{
+					for(i = 0; i < rf; i++)
+					 	OFDM_index[i] = pdmpriv->OFDM_index_HP[i] - index_HP;
+					CCK_index = pdmpriv->CCK_index_HP -index_HP;						
+				}
+				else
+				{
+					for(i = 0; i < rf; i++)
+						OFDM_index[i] = pdmpriv->OFDM_index_HP[i] + index_HP;
+					CCK_index = pdmpriv->CCK_index_HP + index_HP;						
+				}	
+				
+				delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue);
+				
+			}
+			else
+#endif
+			{
+				if(ThermalValue > pdmpriv->ThermalValue)
+				{ 
+					for(i = 0; i < rf; i++)
+					 	pdmpriv->OFDM_index[i] -= delta;
+					pdmpriv->CCK_index -= delta;
+				}
+				else
+				{
+					for(i = 0; i < rf; i++)			
+						pdmpriv->OFDM_index[i] += delta;
+					pdmpriv->CCK_index += delta;
+				}
+			}
+
+			/*if(is2T)
+			{
+				DBG_8192C("temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", 
+					pdmpriv->OFDM_index[0], pdmpriv->OFDM_index[1], pdmpriv->CCK_index);
+			}
+			else
+			{
+				DBG_8192C("temp OFDM_A_index=0x%x, CCK_index=0x%x\n",
+					pdmpriv->OFDM_index[0], pdmpriv->CCK_index);
+			}*/
+
+			//no adjust
+#ifdef CONFIG_USB_HCI
+			if(pHalData->BoardType != BOARD_USB_High_PA)
+#endif
+			{
+				if(ThermalValue > pHalData->EEPROMThermalMeter)
+				{
+					for(i = 0; i < rf; i++)			
+						OFDM_index[i] = pdmpriv->OFDM_index[i]+1;
+					CCK_index = pdmpriv->CCK_index+1;			
+				}
+				else
+				{
+					for(i = 0; i < rf; i++)			
+						OFDM_index[i] = pdmpriv->OFDM_index[i];
+					CCK_index = pdmpriv->CCK_index;						
+				}
+
+#if MP_DRIVER == 1
+				for(i = 0; i < rf; i++)
+				{
+					if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26)
+					{
+						if(ThermalValue > pHalData->EEPROMThermalMeter)
+						{
+							if (delta < 5)
+								OFDM_index[i] -= 1;					
+							else 
+								OFDM_index[i] -= 2;					
+						}
+						else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter)
+						{
+							OFDM_index[i] += 1;
+						}
+					}
+					else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter)
+					{
+						if (delta < 5)
+							OFDM_index[i] -= 1;					
+						else 
+							OFDM_index[i] -= 2;								
+					}
+					else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5)
+					{
+						OFDM_index[i] -= 1;								
+					}
+				}
+
+				{
+					if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26)
+					{
+						if(ThermalValue > pHalData->EEPROMThermalMeter)
+						{
+							if (delta < 5)
+								CCK_index -= 1; 				
+							else 
+								CCK_index -= 2; 				
+						}
+						else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter)
+						{
+							CCK_index += 1;
+						}
+					}
+					else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter)
+					{
+						if (delta < 5)
+							CCK_index -= 1; 				
+						else 
+							CCK_index -= 2; 							
+					}
+					else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5)
+					{
+						CCK_index -= 1; 							
+					}
+				}
+#endif
+			}
+
+			for(i = 0; i < rf; i++)
+			{
+				if(OFDM_index[i] > (OFDM_TABLE_SIZE_92C-1))
+					OFDM_index[i] = (OFDM_TABLE_SIZE_92C-1);
+				else if (OFDM_index[i] < OFDM_min_index)
+					OFDM_index[i] = OFDM_min_index;
+			}
+						
+			if(CCK_index > (CCK_TABLE_SIZE-1))
+				CCK_index = (CCK_TABLE_SIZE-1);
+			else if (CCK_index < 0)
+				CCK_index = 0;		
+
+			/*if(is2T)
+			{
+				DBG_8192C("new OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", 
+					OFDM_index[0], OFDM_index[1], CCK_index);
+			}
+			else
+			{
+				DBG_8192C("new OFDM_A_index=0x%x, CCK_index=0x%x\n", 
+					OFDM_index[0], CCK_index);
+			}*/
+		}
+
+		if(pdmpriv->TxPowerTrackControl && (delta != 0 || delta_HP != 0))
+		{
+			//Adujst OFDM Ant_A according to IQK result
+			ele_D = (OFDMSwingTable[OFDM_index[0]] & 0xFFC00000)>>22;
+			X = pdmpriv->RegE94;
+			Y = pdmpriv->RegE9C;		
+
+			if(X != 0)
+			{
+				if ((X & 0x00000200) != 0)
+					X = X | 0xFFFFFC00;
+				ele_A = ((X * ele_D)>>8)&0x000003FF;
+					
+				//new element C = element D x Y
+				if ((Y & 0x00000200) != 0)
+					Y = Y | 0xFFFFFC00;
+				ele_C = ((Y * ele_D)>>8)&0x000003FF;
+				
+				//wirte new elements A, C, D to regC80 and regC94, element B is always 0
+				value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A;
+				PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32);
+				
+				value32 = (ele_C&0x000003C0)>>6;
+				PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32);
+
+				value32 = ((X * ele_D)>>7)&0x01;
+				PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31, value32);
+
+				value32 = ((Y * ele_D)>>7)&0x01;
+				PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT29, value32);
+
+			}
+			else
+			{
+				PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[OFDM_index[0]]);				
+				PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00);
+				PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31|BIT29, 0x00);
+			}
+
+			//RTPRINT(FINIT, INIT_IQK, ("TxPwrTracking path A: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D));		
+
+			//Adjust CCK according to IQK result
+			if(!pdmpriv->bCCKinCH14){
+				rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]);
+				rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]);
+				rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]);
+				rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]);
+				rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]);
+				rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]);
+				rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]);
+				rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]);
+			}
+			else{
+				rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]);
+				rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]);
+				rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]);
+				rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]);
+				rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]);
+				rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]);
+				rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]);
+				rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]);	
+			}		
+
+			if(is2T)
+			{						
+				ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000)>>22;
+				
+				//new element A = element D x X
+				X = pdmpriv->RegEB4;
+				Y = pdmpriv->RegEBC;
+				
+				if(X != 0){
+					if ((X & 0x00000200) != 0)	//consider minus
+						X = X | 0xFFFFFC00;
+					ele_A = ((X * ele_D)>>8)&0x000003FF;
+					
+					//new element C = element D x Y
+					if ((Y & 0x00000200) != 0)
+						Y = Y | 0xFFFFFC00;
+					ele_C = ((Y * ele_D)>>8)&0x00003FF;
+					
+					//wirte new elements A, C, D to regC88 and regC9C, element B is always 0
+					value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A;
+					PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
+
+					value32 = (ele_C&0x000003C0)>>6;
+					PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32);	
+
+					value32 = ((X * ele_D)>>7)&0x01;
+					PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27, value32);
+
+					value32 = ((Y * ele_D)>>7)&0x01;
+					PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT25, value32);
+
+				}
+				else{
+					PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[OFDM_index[1]]);										
+					PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
+					PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27|BIT25, 0x00);
+				}
+
+				//DBG_8192C("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D);
+			}
+
+			/*
+			DBG_8192C("TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n", \
+					PHY_QueryBBReg(Adapter, 0xc80, bMaskDWord),\
+					PHY_QueryBBReg(Adapter, 0xc94, bMaskDWord), \
+					PHY_QueryRFReg(Adapter, RF_PATH_A, 0x24, bMaskDWord));
+			*/
+		}
+
+#if MP_DRIVER == 1
+		if(delta_IQK > 1)
+#else
+		if(delta_IQK > 3)
+#endif
+		{
+			pdmpriv->ThermalValue_IQK = ThermalValue;
+			rtl8192c_PHY_IQCalibrate(Adapter,_FALSE);
+		}
+
+		//update thermal meter value
+		if(pdmpriv->TxPowerTrackControl)
+			pdmpriv->ThermalValue = ThermalValue;
+
+	}
+
+	//DBG_8192C("<===dm_TXPowerTrackingCallback_ThermalMeter_92C\n");
+	
+	pdmpriv->TXPowercount = 0;
+
+}
+
+
+static	VOID
+dm_InitializeTXPowerTracking_ThermalMeter(
+	IN	PADAPTER		Adapter)
+{	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	//pMgntInfo->bTXPowerTracking = _TRUE;
+	pdmpriv->TXPowercount = 0;
+	pdmpriv->bTXPowerTrackingInit = _FALSE;
+	pdmpriv->ThermalValue = 0;
+	
+#if	(MP_DRIVER != 1)	//for mp driver, turn off txpwrtracking as default
+	pdmpriv->TxPowerTrackControl = _TRUE;
+#endif
+	
+	MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl);
+}
+
+
+static VOID
+DM_InitializeTXPowerTracking(
+	IN	PADAPTER		Adapter)
+{
+	dm_InitializeTXPowerTracking_ThermalMeter(Adapter);	
+}	
+
+//
+//	Description:
+//		- Dispatch TxPower Tracking direct call ONLY for 92s.
+//		- We shall NOT schedule Workitem within PASSIVE LEVEL, which will cause system resource
+//		   leakage under some platform.
+//
+//	Assumption:
+//		PASSIVE_LEVEL when this routine is called.
+//
+//	Added by Roger, 2009.06.18.
+//
+static VOID
+DM_TXPowerTracking92CDirectCall(
+            IN	PADAPTER		Adapter)
+{	
+	dm_TXPowerTrackingCallback_ThermalMeter_92C(Adapter);
+}
+
+static VOID
+dm_CheckTXPowerTracking_ThermalMeter(
+	IN	PADAPTER		Adapter)
+{	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	//u1Byte					TxPowerCheckCnt = 5;	//10 sec
+
+	//if(!pMgntInfo->bTXPowerTracking /*|| (!pdmpriv->TxPowerTrackControl && pdmpriv->bAPKdone)*/)
+	if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_SS))
+	{
+		return;
+	}
+
+	if(!pdmpriv->TM_Trigger)		//at least delay 1 sec
+	{
+		//pHalData->TxPowerCheckCnt++;	//cosa add for debug
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60);
+		//DBG_8192C("Trigger 92C Thermal Meter!!\n");
+		
+		pdmpriv->TM_Trigger = 1;
+		return;
+		
+	}
+	else
+	{
+		//DBG_8192C("Schedule TxPowerTracking direct call!!\n");
+		DM_TXPowerTracking92CDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18.
+		pdmpriv->TM_Trigger = 0;
+	}
+
+}
+
+
+VOID
+rtl8192c_dm_CheckTXPowerTracking(
+	IN	PADAPTER		Adapter)
+{
+	dm_CheckTXPowerTracking_ThermalMeter(Adapter);
+}
+
+#ifdef CONFIG_BT_COEXIST
+static BOOLEAN BT_BTStateChange(PADAPTER Adapter)
+{
+	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(Adapter);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+	struct registry_priv	*registry_par = &Adapter->registrypriv;
+	
+	struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
+	
+	u32 		Polling, Ratio_Tx, Ratio_PRI;
+	u32 			BT_Tx, BT_PRI;
+	u8			BT_State;
+	static u8		ServiceTypeCnt = 0;
+	u8			CurServiceType;
+	static u8		LastServiceType = BT_Idle;
+
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE)	
+		return _FALSE;
+	
+	BT_State = rtw_read8(Adapter, 0x4fd);
+/*
+	temp = PlatformEFIORead4Byte(Adapter, 0x488);
+	BT_Tx = (u2Byte)(((temp<<8)&0xff00)+((temp>>8)&0xff));
+	BT_PRI = (u2Byte)(((temp>>8)&0xff00)+((temp>>24)&0xff));
+
+	temp = PlatformEFIORead4Byte(Adapter, 0x48c);
+	Polling = ((temp<<8)&0xff000000) + ((temp>>8)&0x00ff0000) + 
+			((temp<<8)&0x0000ff00) + ((temp>>8)&0x000000ff);
+	
+*/
+	BT_Tx = rtw_read32(Adapter, 0x488);
+	
+	DBG_8192C("Ratio 0x488  =%x\n", BT_Tx);
+	BT_Tx =BT_Tx & 0x00ffffff;
+	//RTPRINT(FBT, BT_TRACE, ("Ratio BT_Tx  =%x\n", BT_Tx));
+
+	BT_PRI = rtw_read32(Adapter, 0x48c);
+	
+	DBG_8192C("Ratio 0x48c  =%x\n", BT_PRI);
+	BT_PRI =BT_PRI & 0x00ffffff;
+	//RTPRINT(FBT, BT_TRACE, ("Ratio BT_PRI  =%x\n", BT_PRI));
+
+
+	Polling = rtw_read32(Adapter, 0x490);
+	//RTPRINT(FBT, BT_TRACE, ("Ratio 0x490  =%x\n", Polling));
+
+
+	if(BT_Tx==0xffffffff && BT_PRI==0xffffffff && Polling==0xffffffff && BT_State==0xff)
+		return _FALSE;
+
+	BT_State &= BIT0;
+
+	if(BT_State != pbtpriv->BT_CUR_State)
+	{
+		pbtpriv->BT_CUR_State = BT_State;
+	
+		if(registry_par->bt_sco == 3)
+		{
+			ServiceTypeCnt = 0;
+		
+			pbtpriv->BT_Service = BT_Idle;
+
+			DBG_8192C("BT_%s\n", BT_State?"ON":"OFF");
+
+			BT_State = BT_State | 
+					((pbtpriv->BT_Ant_isolation==1)?0:BIT1) |BIT2;
+
+			rtw_write8(Adapter, 0x4fd, BT_State);
+			DBG_8192C("BT set 0x4fd to %x\n", BT_State);
+		}
+		
+		return _TRUE;
+	}
+	DBG_8192C("bRegBT_Sco =  %d\n",registry_par->bt_sco);
+
+	Ratio_Tx = BT_Tx*1000/Polling;
+	Ratio_PRI = BT_PRI*1000/Polling;
+
+	pbtpriv->Ratio_Tx=Ratio_Tx;
+	pbtpriv->Ratio_PRI=Ratio_PRI;
+	
+	DBG_8192C("Ratio_Tx=%d\n", Ratio_Tx);
+	DBG_8192C("Ratio_PRI=%d\n", Ratio_PRI);
+
+	
+	if(BT_State && registry_par->bt_sco==3)
+	{
+		DBG_8192C("bt_sco  ==3 Follow Counter\n");
+//		if(BT_Tx==0xffff && BT_PRI==0xffff && Polling==0xffffffff)
+//		{
+//			ServiceTypeCnt = 0;
+//			return FALSE;
+//		}
+//		else
+		{
+		/*
+			Ratio_Tx = BT_Tx*1000/Polling;
+			Ratio_PRI = BT_PRI*1000/Polling;
+
+			pHalData->bt_coexist.Ratio_Tx=Ratio_Tx;
+			pHalData->bt_coexist.Ratio_PRI=Ratio_PRI;
+			
+			RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx));
+			RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI));
+
+		*/	
+			if((Ratio_Tx < 30)  && (Ratio_PRI < 30)) 
+			  	CurServiceType = BT_Idle;
+			else if((Ratio_PRI > 110) && (Ratio_PRI < 250))
+				CurServiceType = BT_SCO;
+			else if((Ratio_Tx >= 200)&&(Ratio_PRI >= 200))
+				CurServiceType = BT_Busy;
+			else if((Ratio_Tx >=350) && (Ratio_Tx < 500))
+				CurServiceType = BT_OtherBusy;
+			else if(Ratio_Tx >=500)
+				CurServiceType = BT_PAN;
+			else
+				CurServiceType=BT_OtherAction;
+		}
+
+/*		if(pHalData->bt_coexist.bStopCount)
+		{
+			ServiceTypeCnt=0;
+			pHalData->bt_coexist.bStopCount=FALSE;
+		}
+*/
+//		if(CurServiceType == BT_OtherBusy)
+		{
+			ServiceTypeCnt=2;
+			LastServiceType=CurServiceType;
+		}
+#if 0
+		else if(CurServiceType == LastServiceType)
+		{
+			if(ServiceTypeCnt<3)
+				ServiceTypeCnt++;
+		}
+		else
+		{
+			ServiceTypeCnt = 0;
+			LastServiceType = CurServiceType;
+		}
+#endif
+
+		if(ServiceTypeCnt==2)
+		{
+			pbtpriv->BT_Service = LastServiceType;
+			BT_State = BT_State | 
+					((pbtpriv->BT_Ant_isolation==1)?0:BIT1) |
+					//((pbtpriv->BT_Service==BT_SCO)?0:BIT2);
+					((pbtpriv->BT_Service!=BT_Idle)?0:BIT2);
+
+			//if(pbtpriv->BT_Service==BT_Busy)
+			//	BT_State&= ~(BIT2);
+
+			if(pbtpriv->BT_Service==BT_SCO)
+			{
+				DBG_8192C("BT TYPE Set to  ==> BT_SCO\n");
+			}
+			else if(pbtpriv->BT_Service==BT_Idle)
+			{
+				DBG_8192C("BT TYPE Set to  ==> BT_Idle\n");
+			}
+			else if(pbtpriv->BT_Service==BT_OtherAction)
+			{
+				DBG_8192C("BT TYPE Set to  ==> BT_OtherAction\n");
+			}
+			else if(pbtpriv->BT_Service==BT_Busy)
+			{
+				DBG_8192C("BT TYPE Set to  ==> BT_Busy\n");
+			}
+			else if(pbtpriv->BT_Service==BT_PAN)
+			{
+				DBG_8192C("BT TYPE Set to  ==> BT_PAN\n");
+			}
+			else
+			{
+				DBG_8192C("BT TYPE Set to ==> BT_OtherBusy\n");
+			}
+				
+			//Add interrupt migration when bt is not in idel state (no traffic).
+			//suggestion by Victor.
+			if(pbtpriv->BT_Service!=BT_Idle)//EDCA_VI_PARAM modify
+			{
+			
+				rtw_write16(Adapter, 0x504, 0x0ccc);
+				rtw_write8(Adapter, 0x506, 0x54);
+				rtw_write8(Adapter, 0x507, 0x54);
+			
+			}
+			else
+			{
+				rtw_write8(Adapter, 0x506, 0x00);
+				rtw_write8(Adapter, 0x507, 0x00);			
+			}
+				
+			rtw_write8(Adapter, 0x4fd, BT_State);
+			DBG_8192C("BT_SCO set 0x4fd to %x\n", BT_State);
+			return _TRUE;
+		}
+	}
+
+	return _FALSE;
+
+}
+
+static BOOLEAN
+BT_WifiConnectChange(
+	IN	PADAPTER	Adapter
+	)
+{
+	struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
+//	PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;
+	static BOOLEAN	bMediaConnect = _FALSE;
+
+	//if(!pMgntInfo->bMediaConnect || MgntRoamingInProgress(pMgntInfo))
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE)	
+	{
+		bMediaConnect = _FALSE;
+	}
+	else
+	{
+		if(!bMediaConnect)
+		{
+			bMediaConnect = _TRUE;
+			return _TRUE;
+		}
+		bMediaConnect = _TRUE;
+	}
+
+	return _FALSE;
+}
+
+#define BT_RSSI_STATE_NORMAL_POWER	BIT0
+#define BT_RSSI_STATE_AMDPU_OFF		BIT1
+#define BT_RSSI_STATE_SPECIAL_LOW	BIT2
+#define BT_RSSI_STATE_BG_EDCA_LOW	BIT3
+
+static s32 GET_UNDECORATED_AVERAGE_RSSI(PADAPTER	Adapter)	
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	s32 	average_rssi;
+	
+	if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE))
+	{	
+		average_rssi = 	pdmpriv->EntryMinUndecoratedSmoothedPWDB;	
+	}
+	else
+	{
+		average_rssi = 	pdmpriv->UndecoratedSmoothedPWDB;
+	}
+	return average_rssi;
+}
+
+static u8 BT_RssiStateChange(
+	IN	PADAPTER	Adapter
+	)
+{
+	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv		*pmlmepriv = &(Adapter->mlmepriv);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	//PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;
+	s32			UndecoratedSmoothedPWDB;
+	u8			CurrBtRssiState = 0x00;
+
+
+
+
+	//if(pMgntInfo->bMediaConnect)	// Default port
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)	
+	{
+		UndecoratedSmoothedPWDB = GET_UNDECORATED_AVERAGE_RSSI(Adapter);
+	}
+	else // associated entry pwdb
+	{
+		if(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)
+			UndecoratedSmoothedPWDB = 100;	// No any RSSI information. Assume to be MAX.
+		else
+			UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+	}
+
+	// Check RSSI to determine HighPower/NormalPower state for BT coexistence.
+	if(UndecoratedSmoothedPWDB >= 67)
+		CurrBtRssiState &= (~BT_RSSI_STATE_NORMAL_POWER);
+	else if(UndecoratedSmoothedPWDB < 62)
+		CurrBtRssiState |= BT_RSSI_STATE_NORMAL_POWER;
+
+	// Check RSSI to determine AMPDU setting for BT coexistence.
+	if(UndecoratedSmoothedPWDB >= 40)
+		CurrBtRssiState &= (~BT_RSSI_STATE_AMDPU_OFF);
+	else if(UndecoratedSmoothedPWDB <= 32)
+		CurrBtRssiState |= BT_RSSI_STATE_AMDPU_OFF;
+
+	// Marked RSSI state. It will be used to determine BT coexistence setting later.
+	if(UndecoratedSmoothedPWDB < 35)
+		CurrBtRssiState |=  BT_RSSI_STATE_SPECIAL_LOW;
+	else
+		CurrBtRssiState &= (~BT_RSSI_STATE_SPECIAL_LOW);
+
+	// Check BT state related to BT_Idle in B/G mode.
+	if(UndecoratedSmoothedPWDB < 15)
+		CurrBtRssiState |=  BT_RSSI_STATE_BG_EDCA_LOW;
+	else
+		CurrBtRssiState &= (~BT_RSSI_STATE_BG_EDCA_LOW);
+	
+	if(CurrBtRssiState != pbtpriv->BtRssiState)
+	{
+		pbtpriv->BtRssiState = CurrBtRssiState;
+		return _TRUE;
+	}
+	else
+	{
+		return _FALSE;
+	}
+}
+
+static void dm_BTCoexist(PADAPTER Adapter )
+{
+	HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv			*pdmpriv = &pHalData->dmpriv;
+	struct mlme_priv	 		*pmlmepriv = &(Adapter->mlmepriv);
+	struct mlme_ext_info		*pmlmeinfo = &Adapter->mlmeextpriv.mlmext_info;
+	struct mlme_ext_priv		*pmlmeext = &Adapter->mlmeextpriv;
+
+	struct btcoexist_priv		*pbtpriv = &(pHalData->bt_coexist);
+	//PMGNT_INFO				pMgntInfo = &Adapter->MgntInfo;
+	//PRT_HIGH_THROUGHPUT		pHTInfo = GET_HT_INFO(pMgntInfo);
+	
+	//PRX_TS_RECORD	pRxTs = NULL;
+	u8			BT_gpio_mux;
+
+	BOOLEAN		bWifiConnectChange, bBtStateChange,bRssiStateChange;
+
+	if(pbtpriv->bCOBT == _FALSE)		return;
+
+	if(!( pdmpriv->DMFlag & DYNAMIC_FUNC_BT)) return;
+	
+	if( (pbtpriv->BT_Coexist) &&(pbtpriv->BT_CoexistType == BT_CSR_BC4) && (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _FALSE)	)
+	{
+		bWifiConnectChange = BT_WifiConnectChange(Adapter);
+		bBtStateChange	= BT_BTStateChange(Adapter);
+		bRssiStateChange 	= BT_RssiStateChange(Adapter);
+		
+		DBG_8192C("bWifiConnectChange %d, bBtStateChange  %d,bRssiStateChange  %d\n",
+			bWifiConnectChange,bBtStateChange,bRssiStateChange);
+
+		// add by hpfan for debug message
+		BT_gpio_mux = rtw_read8(Adapter, REG_GPIO_MUXCFG);
+		DBG_8192C("BTCoexit Reg_0x40 (%2x)\n", BT_gpio_mux);
+
+		if( bWifiConnectChange ||bBtStateChange  ||bRssiStateChange )
+		{
+			if(pbtpriv->BT_CUR_State)
+			{
+				
+				// Do not allow receiving A-MPDU aggregation.
+				if(pbtpriv->BT_Ampdu)// 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU.
+				{
+			
+					if(pmlmeinfo->assoc_AP_vendor == ciscoAP)	
+					{
+						if(pbtpriv->BT_Service!=BT_Idle)
+						{
+							if(pmlmeinfo->bAcceptAddbaReq)
+							{
+								DBG_8192C("BT_Disallow AMPDU \n");	
+								pmlmeinfo->bAcceptAddbaReq = _FALSE;
+								send_delba(Adapter,0, get_my_bssid(&(pmlmeinfo->network)));
+							}
+						}
+						else
+						{
+							if(!pmlmeinfo->bAcceptAddbaReq)
+							{
+								DBG_8192C("BT_Allow AMPDU  RSSI >=40\n");	
+								pmlmeinfo->bAcceptAddbaReq = _TRUE;
+							}
+						}
+					}
+					else
+					{
+						if(!pmlmeinfo->bAcceptAddbaReq)
+						{
+							DBG_8192C("BT_Allow AMPDU BT Idle\n");	
+							pmlmeinfo->bAcceptAddbaReq = _TRUE;
+						}
+					}
+				}
+				
+#if 0
+				else if((pHalData->bt_coexist.BT_Service==BT_SCO) || (pHalData->bt_coexist.BT_Service==BT_Busy))
+				{				
+					if(pHalData->bt_coexist.BtRssiState & BT_RSSI_STATE_AMDPU_OFF)
+					{
+						if(pMgntInfo->bBT_Ampdu && pHTInfo->bAcceptAddbaReq)
+						{
+							RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32\n"));	
+							pHTInfo->bAcceptAddbaReq = FALSE;
+							if(GetTs(Adapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, FALSE))
+								TsInitDelBA(Adapter, (PTS_COMMON_INFO)pRxTs, RX_DIR);
+						}
+					}
+					else
+					{
+						if(pMgntInfo->bBT_Ampdu && !pHTInfo->bAcceptAddbaReq)
+						{
+							RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU  RSSI >=40\n"));	
+							pHTInfo->bAcceptAddbaReq = TRUE;
+						}
+					}
+				}
+				else
+				{
+					if(pMgntInfo->bBT_Ampdu && !pHTInfo->bAcceptAddbaReq)
+					{
+						RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT not in SCO or BUSY\n"));	
+						pHTInfo->bAcceptAddbaReq = TRUE;
+					}
+				}
+#endif
+
+				if(pbtpriv->BT_Ant_isolation)
+				{			
+					DBG_8192C("BT_IsolationLow\n");
+
+// 20100427 Joseph: Do not adjust Rate adaptive for BT coexist suggested by SD3.
+#if 0
+					RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n"));
+					if(pMgntInfo->bUseRAMask)
+					{
+						// 20100407 Joseph: Fix rate adaptive modification for BT coexist.
+						// This fix is not complete yet. It shall also consider VWifi and Adhoc case,
+						// which connect with multiple STAs.
+						Adapter->HalFunc.UpdateHalRAMaskHandler(
+												Adapter,
+												FALSE,
+												0,
+												NULL,
+												NULL,
+												pMgntInfo->RateAdaptive.RATRState,
+												RAMask_Normal);
+					}
+					else
+					{
+						Adapter->HalFunc.UpdateHalRATRTableHandler(
+									Adapter, 
+									&pMgntInfo->dot11OperationalRateSet,
+									pMgntInfo->dot11HTOperationalRateSet,NULL);
+					}
+#endif
+
+					// 20100415 Joseph: Modify BT coexist mechanism suggested by Yaying.
+					// Now we only enable HW BT coexist when BT in "Busy" state.
+					if(1)//pMgntInfo->LinkDetectInfo.NumRecvDataInPeriod >= 20)
+					{
+						if((pmlmeinfo->assoc_AP_vendor == ciscoAP)	&&
+							pbtpriv->BT_Service==BT_OtherAction)
+						{
+							DBG_8192C("BT_Turn ON Coexist\n");
+							rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0);	
+						}
+						else
+						{
+							if((pbtpriv->BT_Service==BT_Busy) &&
+								(pbtpriv->BtRssiState & BT_RSSI_STATE_NORMAL_POWER))
+							{
+								DBG_8192C("BT_Turn ON Coexist\n");
+								rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0);
+							}
+							else if((pbtpriv->BT_Service==BT_OtherAction) &&
+									(pbtpriv->BtRssiState & BT_RSSI_STATE_SPECIAL_LOW))
+							{
+								DBG_8192C("BT_Turn ON Coexist\n");
+								rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0);	
+							}
+							else if(pbtpriv->BT_Service==BT_PAN)
+							{
+								DBG_8192C("BT_Turn ON Coexist\n");
+								rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00);	
+							}
+							else
+							{
+								DBG_8192C("BT_Turn OFF Coexist\n");
+								rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00);
+							}
+						}
+					}
+					else
+					{
+						DBG_8192C("BT: There is no Wifi traffic!! Turn off Coexist\n");
+						rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00);
+					}
+
+					if(1)//pMgntInfo->LinkDetectInfo.NumRecvDataInPeriod >= 20)
+					{
+						if(pbtpriv->BT_Service==BT_PAN)
+						{
+							DBG_8192C("BT_Turn ON Coexist(Reg0x44 = 0x10100)\n");
+							rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x10100);	
+						}
+						else
+						{
+							DBG_8192C("BT_Turn OFF Coexist(Reg0x44 = 0x0)\n");
+							rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x0);	
+						}
+					}
+					else
+					{
+						DBG_8192C("BT: There is no Wifi traffic!! Turn off Coexist(Reg0x44 = 0x0)\n");
+						rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x0);	
+					}
+
+					// 20100430 Joseph: Integrate the BT coexistence EDCA tuning here.
+					if(pbtpriv->BtRssiState & BT_RSSI_STATE_NORMAL_POWER)
+					{
+						if(pbtpriv->BT_Service==BT_OtherBusy)
+						{
+							//pbtpriv->BtEdcaUL = 0x5ea72b;
+							//pbtpriv->BtEdcaDL = 0x5ea72b;
+							pbtpriv->BT_EDCA[UP_LINK] = 0x5ea72b;
+							pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea72b;							
+							
+							DBG_8192C("BT in BT_OtherBusy state Tx (%d) >350 parameter(0x%x) = 0x%x\n", pbtpriv->Ratio_Tx ,REG_EDCA_BE_PARAM, 0x5ea72b);
+						}
+						else if(pbtpriv->BT_Service==BT_Busy)
+						{
+							//pbtpriv->BtEdcaUL = 0x5eb82f;
+							//pbtpriv->BtEdcaDL = 0x5eb82f;
+
+							pbtpriv->BT_EDCA[UP_LINK] = 0x5eb82f;
+							pbtpriv->BT_EDCA[DOWN_LINK] = 0x5eb82f;							
+							
+							DBG_8192C("BT in BT_Busy state parameter(0x%x) = 0x%x\n", REG_EDCA_BE_PARAM, 0x5eb82f);		
+						}
+						else if(pbtpriv->BT_Service==BT_SCO)
+						{
+							if(pbtpriv->Ratio_Tx>160)
+							{
+								//pbtpriv->BtEdcaUL = 0x5ea72f;
+								//pbtpriv->BtEdcaDL = 0x5ea72f;
+								pbtpriv->BT_EDCA[UP_LINK] = 0x5ea72f;
+								pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea72f;							
+								DBG_8192C("BT in BT_SCO state Tx (%d) >160 parameter(0x%x) = 0x%x\n",pbtpriv->Ratio_Tx, REG_EDCA_BE_PARAM, 0x5ea72f);
+							}
+							else
+							{
+								//pbtpriv->BtEdcaUL = 0x5ea32b;
+								//pbtpriv->BtEdcaDL = 0x5ea42b;
+
+								pbtpriv->BT_EDCA[UP_LINK] = 0x5ea32b;
+								pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea42b;						
+								
+								DBG_8192C("BT in BT_SCO state Tx (%d) <160 parameter(0x%x) = 0x%x\n", pbtpriv->Ratio_Tx,REG_EDCA_BE_PARAM, 0x5ea32f);
+							}									
+						}
+						else
+						{
+							// BT coexistence mechanism does not control EDCA parameter.
+							//pbtpriv->BtEdcaUL = 0;
+							//pbtpriv->BtEdcaDL = 0;
+
+							pbtpriv->BT_EDCA[UP_LINK] = 0;
+							pbtpriv->BT_EDCA[DOWN_LINK] = 0;							
+							DBG_8192C("BT in  State  %d  and parameter(0x%x) use original setting.\n",pbtpriv->BT_Service, REG_EDCA_BE_PARAM);
+						}
+
+						if((pbtpriv->BT_Service!=BT_Idle) &&
+							(pmlmeext->cur_wireless_mode  == WIRELESS_MODE_G) &&
+							(pbtpriv->BtRssiState & BT_RSSI_STATE_BG_EDCA_LOW))
+						{
+							//pbtpriv->BtEdcaUL = 0x5eb82b;
+							//pbtpriv->BtEdcaDL = 0x5eb82b;
+
+							pbtpriv->BT_EDCA[UP_LINK] = 0x5eb82b;
+							pbtpriv->BT_EDCA[DOWN_LINK] = 0x5eb82b;							
+							
+							DBG_8192C("BT set parameter(0x%x) = 0x%x\n", REG_EDCA_BE_PARAM, 0x5eb82b);		
+						}
+					}
+					else
+					{
+						// BT coexistence mechanism does not control EDCA parameter.
+						//pbtpriv->BtEdcaUL = 0;
+						//pbtpriv->BtEdcaDL = 0;
+
+						pbtpriv->BT_EDCA[UP_LINK] = 0;
+						pbtpriv->BT_EDCA[DOWN_LINK] = 0;					
+					}
+
+					// 20100415 Joseph: Set RF register 0x1E and 0x1F for BT coexist suggested by Yaying.
+					if(pbtpriv->BT_Service!=BT_Idle)
+					{
+						DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n", 0xf);
+						PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, 0xf);
+						//RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1E[7:4] = 0x%x \n", 0xf));
+						//PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, 0xf);
+					}
+					else
+					{
+						DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n",pbtpriv->BtRfRegOrigin1E);
+						PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, pbtpriv->BtRfRegOrigin1E);
+						//RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1F[7:4] = 0x%x \n", pHalData->bt_coexist.BtRfRegOrigin1F));
+						//PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1F);
+					}	
+				}
+				else
+				{
+					DBG_8192C("BT_IsolationHigh\n");
+					// Do nothing.
+				}			
+			}
+			else
+			{
+			
+				if(pbtpriv->BT_Ampdu && !pmlmeinfo->bAcceptAddbaReq)
+				{
+					DBG_8192C("BT_Allow AMPDU bt is off\n");	
+					pmlmeinfo->bAcceptAddbaReq = _TRUE;
+				}
+			
+				DBG_8192C("BT_Turn OFF Coexist bt is off \n");
+				rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00);
+
+				DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n", pbtpriv->BtRfRegOrigin1E);
+				PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, pbtpriv->BtRfRegOrigin1E);
+				//RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1F[7:4] = 0x%x \n", pHalData->bt_coexist.BtRfRegOrigin1F));
+				//PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1F);
+
+				// BT coexistence mechanism does not control EDCA parameter since BT is disabled.
+				//pbtpriv->BtEdcaUL = 0;
+				//pbtpriv->BtEdcaDL = 0;
+				pbtpriv->BT_EDCA[UP_LINK] = 0;
+				pbtpriv->BT_EDCA[DOWN_LINK] = 0;				
+				
+
+// 20100427 Joseph: Do not adjust Rate adaptive for BT coexist suggested by SD3.
+#if 0
+				RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n"));
+				if(pMgntInfo->bUseRAMask)
+				{
+					// 20100407 Joseph: Fix rate adaptive modification for BT coexist.
+					// This fix is not complete yet. It shall also consider VWifi and Adhoc case,
+					// which connect with multiple STAs.
+					Adapter->HalFunc.UpdateHalRAMaskHandler(
+											Adapter,
+											FALSE,
+											0,
+											NULL,
+											NULL,
+											pMgntInfo->RateAdaptive.RATRState,
+											RAMask_Normal);
+				}
+				else
+				{
+					Adapter->HalFunc.UpdateHalRATRTableHandler(
+								Adapter, 
+								&pMgntInfo->dot11OperationalRateSet,
+								pMgntInfo->dot11HTOperationalRateSet,NULL);
+				}
+#endif
+			}
+		}
+	}
+}
+
+static void dm_InitBtCoexistDM(	PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+
+	if( !pbtpriv->BT_Coexist ) return;
+	
+	pbtpriv->BtRfRegOrigin1E = (u8)PHY_QueryRFReg(Adapter, PathA, 0x1e, 0xf0);
+	pbtpriv->BtRfRegOrigin1F = (u8)PHY_QueryRFReg(Adapter, PathA, 0x1f, 0xf0);
+}
+
+void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+	
+	pbtpriv->bCOBT = bStart;
+	send_delba(padapter,0, get_my_bssid(&(pmlmeinfo->network)));
+	send_delba(padapter,1, get_my_bssid(&(pmlmeinfo->network)));
+	
+}
+
+void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir)
+{
+	struct mlme_ext_info		*pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
+	DBG_8192C("issue_delete_ba : %s...\n",(dir==0)?"RX_DIR":"TX_DIR");
+	send_delba(padapter,dir, get_my_bssid(&(pmlmeinfo->network)));
+}
+
+#endif
+
+#if 0//def CONFIG_PCI_HCI
+
+BOOLEAN
+BT_BTStateChange(
+	IN	PADAPTER	Adapter
+	)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;
+	
+	u4Byte 			temp, Polling, Ratio_Tx, Ratio_PRI;
+	u4Byte 			BT_Tx, BT_PRI;
+	u1Byte			BT_State;
+	static u1Byte		ServiceTypeCnt = 0;
+	u1Byte			CurServiceType;
+	static u1Byte		LastServiceType = BT_Idle;
+
+	if(!pMgntInfo->bMediaConnect)
+		return FALSE;
+	
+	BT_State = PlatformEFIORead1Byte(Adapter, 0x4fd);
+/*
+	temp = PlatformEFIORead4Byte(Adapter, 0x488);
+	BT_Tx = (u2Byte)(((temp<<8)&0xff00)+((temp>>8)&0xff));
+	BT_PRI = (u2Byte)(((temp>>8)&0xff00)+((temp>>24)&0xff));
+
+	temp = PlatformEFIORead4Byte(Adapter, 0x48c);
+	Polling = ((temp<<8)&0xff000000) + ((temp>>8)&0x00ff0000) + 
+			((temp<<8)&0x0000ff00) + ((temp>>8)&0x000000ff);
+	
+*/
+	BT_Tx = PlatformEFIORead4Byte(Adapter, 0x488);
+	
+	RTPRINT(FBT, BT_TRACE, ("Ratio 0x488  =%x\n", BT_Tx));
+	BT_Tx =BT_Tx & 0x00ffffff;
+	//RTPRINT(FBT, BT_TRACE, ("Ratio BT_Tx  =%x\n", BT_Tx));
+
+	BT_PRI = PlatformEFIORead4Byte(Adapter, 0x48c);
+	
+	RTPRINT(FBT, BT_TRACE, ("Ratio Ratio 0x48c  =%x\n", BT_PRI));
+	BT_PRI =BT_PRI & 0x00ffffff;
+	//RTPRINT(FBT, BT_TRACE, ("Ratio BT_PRI  =%x\n", BT_PRI));
+
+
+	Polling = PlatformEFIORead4Byte(Adapter, 0x490);
+	//RTPRINT(FBT, BT_TRACE, ("Ratio 0x490  =%x\n", Polling));
+
+
+	if(BT_Tx==0xffffffff && BT_PRI==0xffffffff && Polling==0xffffffffff && BT_State==0xff)
+		return FALSE;
+
+	BT_State &= BIT0;
+
+	if(BT_State != pHalData->bt_coexist.BT_CUR_State)
+	{
+		pHalData->bt_coexist.BT_CUR_State = BT_State;
+	
+		if(pMgntInfo->bRegBT_Sco == 3)
+		{
+			ServiceTypeCnt = 0;
+		
+			pHalData->bt_coexist.BT_Service = BT_Idle;
+
+			RTPRINT(FBT, BT_TRACE, ("BT_%s\n", BT_State?"ON":"OFF"));
+
+			BT_State = BT_State | 
+					((pHalData->bt_coexist.BT_Ant_isolation==1)?0:BIT1) |BIT2;
+
+			PlatformEFIOWrite1Byte(Adapter, 0x4fd, BT_State);
+			RTPRINT(FBT, BT_TRACE, ("BT set 0x4fd to %x\n", BT_State));
+		}
+		
+		return TRUE;
+	}
+	RTPRINT(FBT, BT_TRACE, ("bRegBT_Sco   %d\n", pMgntInfo->bRegBT_Sco));
+
+	Ratio_Tx = BT_Tx*1000/Polling;
+	Ratio_PRI = BT_PRI*1000/Polling;
+
+	pHalData->bt_coexist.Ratio_Tx=Ratio_Tx;
+	pHalData->bt_coexist.Ratio_PRI=Ratio_PRI;
+	
+	RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx));
+	RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI));
+
+	
+	if(BT_State && pMgntInfo->bRegBT_Sco==3)
+	{
+		RTPRINT(FBT, BT_TRACE, ("bRegBT_Sco  ==3 Follow Counter\n"));
+//		if(BT_Tx==0xffff && BT_PRI==0xffff && Polling==0xffffffff)
+//		{
+//			ServiceTypeCnt = 0;
+//			return FALSE;
+//		}
+//		else
+		{
+		/*
+			Ratio_Tx = BT_Tx*1000/Polling;
+			Ratio_PRI = BT_PRI*1000/Polling;
+
+			pHalData->bt_coexist.Ratio_Tx=Ratio_Tx;
+			pHalData->bt_coexist.Ratio_PRI=Ratio_PRI;
+			
+			RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx));
+			RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI));
+
+		*/	
+			if((Ratio_Tx <= 50)  && (Ratio_PRI <= 50)) 
+			  	CurServiceType = BT_Idle;
+			else if((Ratio_PRI > 150) && (Ratio_PRI < 200))
+				CurServiceType = BT_SCO;
+			else if((Ratio_Tx >= 200)&&(Ratio_PRI >= 200))
+				CurServiceType = BT_Busy;
+			else if(Ratio_Tx >= 350)
+				CurServiceType = BT_OtherBusy;
+			else
+				CurServiceType=BT_OtherAction;
+
+		}
+/*		if(pHalData->bt_coexist.bStopCount)
+		{
+			ServiceTypeCnt=0;
+			pHalData->bt_coexist.bStopCount=FALSE;
+		}
+*/
+		if(CurServiceType == BT_OtherBusy)
+		{
+			ServiceTypeCnt=2;
+			LastServiceType=CurServiceType;
+		}
+		else if(CurServiceType == LastServiceType)
+		{
+			if(ServiceTypeCnt<3)
+				ServiceTypeCnt++;
+		}
+		else
+		{
+			ServiceTypeCnt = 0;
+			LastServiceType = CurServiceType;
+		}
+
+		if(ServiceTypeCnt==2)
+		{
+			pHalData->bt_coexist.BT_Service = LastServiceType;
+			BT_State = BT_State | 
+					((pHalData->bt_coexist.BT_Ant_isolation==1)?0:BIT1) |
+					((pHalData->bt_coexist.BT_Service==BT_SCO)?0:BIT2);
+
+			if(pHalData->bt_coexist.BT_Service==BT_Busy)
+				BT_State&= ~(BIT2);
+
+			if(pHalData->bt_coexist.BT_Service==BT_SCO)
+			{
+				RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to  ==> BT_SCO\n"));
+			}
+			else if(pHalData->bt_coexist.BT_Service==BT_Idle)
+			{
+				RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to  ==> BT_Idle\n"));
+			}
+			else if(pHalData->bt_coexist.BT_Service==BT_OtherAction)
+			{
+				RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to  ==> BT_OtherAction\n"));
+			}
+			else if(pHalData->bt_coexist.BT_Service==BT_Busy)
+			{
+				RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to  ==> BT_Busy\n"));
+			}
+			else
+			{
+				RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_OtherBusy\n"));
+			}
+				
+			//Add interrupt migration when bt is not in idel state (no traffic).
+			//suggestion by Victor.
+			if(pHalData->bt_coexist.BT_Service!=BT_Idle)
+			{
+			
+				PlatformEFIOWrite2Byte(Adapter, 0x504, 0x0ccc);
+				PlatformEFIOWrite1Byte(Adapter, 0x506, 0x54);
+				PlatformEFIOWrite1Byte(Adapter, 0x507, 0x54);
+			
+			}
+			else
+			{
+				PlatformEFIOWrite1Byte(Adapter, 0x506, 0x00);
+				PlatformEFIOWrite1Byte(Adapter, 0x507, 0x00);			
+			}
+				
+			PlatformEFIOWrite1Byte(Adapter, 0x4fd, BT_State);
+			RTPRINT(FBT, BT_TRACE, ("BT_SCO set 0x4fd to %x\n", BT_State));
+			return TRUE;
+		}
+	}
+
+	return FALSE;
+
+}
+
+BOOLEAN
+BT_WifiConnectChange(
+	IN	PADAPTER	Adapter
+	)
+{
+	PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;
+	static BOOLEAN	bMediaConnect = FALSE;
+
+	if(!pMgntInfo->bMediaConnect || MgntRoamingInProgress(pMgntInfo))
+	{
+		bMediaConnect = FALSE;
+	}
+	else
+	{
+		if(!bMediaConnect)
+		{
+			bMediaConnect = TRUE;
+			return TRUE;
+		}
+		bMediaConnect = TRUE;
+	}
+
+	return FALSE;
+}
+
+BOOLEAN
+BT_RSSIChangeWithAMPDU(
+	IN	PADAPTER	Adapter
+	)
+{
+	PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	if(!Adapter->pNdisCommon->bRegBT_Ampdu || !Adapter->pNdisCommon->bRegAcceptAddbaReq)
+		return FALSE;
+
+	RTPRINT(FBT, BT_TRACE, ("RSSI is %d\n",pHalData->UndecoratedSmoothedPWDB));
+	
+	if((pHalData->UndecoratedSmoothedPWDB<=32) && pMgntInfo->pHTInfo->bAcceptAddbaReq)
+	{
+		RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32  Need change\n"));				
+		return TRUE;
+
+	}
+	else if((pHalData->UndecoratedSmoothedPWDB>=40) && !pMgntInfo->pHTInfo->bAcceptAddbaReq )
+	{
+		RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40, Need change\n"));
+		return TRUE;
+	}
+	else 
+		return FALSE;
+
+}
+
+
+VOID
+dm_BTCoexist(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;
+	static u1Byte		LastTxPowerLvl = 0xff;
+	PRX_TS_RECORD	pRxTs = NULL;
+
+	BOOLEAN			bWifiConnectChange, bBtStateChange,bRSSIChangeWithAMPDU;
+
+	if( (pHalData->bt_coexist.BluetoothCoexist) &&
+		(pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) && 
+		(!ACTING_AS_AP(Adapter))	)
+	{
+		bWifiConnectChange = BT_WifiConnectChange(Adapter);
+		bBtStateChange = BT_BTStateChange(Adapter);
+		bRSSIChangeWithAMPDU = BT_RSSIChangeWithAMPDU(Adapter);
+		RTPRINT(FBT, BT_TRACE, ("bWifiConnectChange %d, bBtStateChange  %d,LastTxPowerLvl  %x,  DynamicTxHighPowerLvl  %x\n",
+			bWifiConnectChange,bBtStateChange,LastTxPowerLvl,pHalData->DynamicTxHighPowerLvl));
+		if( bWifiConnectChange ||bBtStateChange  ||
+			(LastTxPowerLvl != pHalData->DynamicTxHighPowerLvl)	||bRSSIChangeWithAMPDU)
+		{
+			LastTxPowerLvl = pHalData->DynamicTxHighPowerLvl;
+
+			if(pHalData->bt_coexist.BT_CUR_State)
+			{
+				// Do not allow receiving A-MPDU aggregation.
+				if((pHalData->bt_coexist.BT_Service==BT_SCO) || (pHalData->bt_coexist.BT_Service==BT_Busy))
+				{
+					if(pHalData->UndecoratedSmoothedPWDB<=32)
+					{
+						if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq)
+						{
+							RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32\n"));	
+							pMgntInfo->pHTInfo->bAcceptAddbaReq = FALSE;
+							if(GetTs(Adapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, FALSE))
+								TsInitDelBA(Adapter, (PTS_COMMON_INFO)pRxTs, RX_DIR);
+						}
+					}
+					else if(pHalData->UndecoratedSmoothedPWDB>=40)
+					{
+						if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq)
+						{
+							RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU  RSSI >=40\n"));	
+							pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE;
+						}
+					}
+				}
+				else
+				{
+					if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq)
+					{
+						RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT not in SCO or BUSY\n"));	
+						pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE;
+					}
+				}
+
+				if(pHalData->bt_coexist.BT_Ant_isolation)
+				{			
+					RTPRINT(FBT, BT_TRACE, ("BT_IsolationLow\n"));
+					RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n"));
+					Adapter->HalFunc.UpdateHalRATRTableHandler(
+								Adapter, 
+								&pMgntInfo->dot11OperationalRateSet,
+								pMgntInfo->dot11HTOperationalRateSet,NULL);
+					
+					if(pHalData->bt_coexist.BT_Service==BT_SCO)
+					{
+
+						RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist with SCO \n"));
+						PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14);					
+					}
+					else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal)
+					{
+						RTPRINT(FBT, BT_TRACE, ("BT_Turn ON Coexist\n"));
+						PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0xb4);
+					}
+					else
+					{
+						RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist\n"));
+						PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14);
+					}
+				}
+				else
+				{
+					RTPRINT(FBT, BT_TRACE, ("BT_IsolationHigh\n"));
+					// Do nothing.
+				}
+			}
+			else
+			{
+				if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq)
+				{
+					RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU bt is off\n"));	
+					pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE;
+				}
+
+				RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist bt is off \n"));
+				PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14);
+
+				RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n"));
+				Adapter->HalFunc.UpdateHalRATRTableHandler(
+							Adapter, 
+							&pMgntInfo->dot11OperationalRateSet,
+							pMgntInfo->dot11HTOperationalRateSet,NULL);
+			}
+		}
+	}
+}
+#endif
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	dm_CheckRfCtrlGPIO()
+ *
+ * Overview:	Copy 8187B template for 9xseries.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	01/10/2008	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+static VOID
+dm_CheckRfCtrlGPIO(
+	IN	PADAPTER	Adapter
+	)
+{
+#if 0
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+#if defined (CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI)
+	#ifdef CONFIG_USB_HCI
+		// 2010/08/12 MH Add for CU selective suspend.
+		PRT_USB_DEVICE		pDevice = GET_RT_USB_DEVICE(Adapter);
+	#else
+		PRT_SDIO_DEVICE	pDevice = GET_RT_SDIO_DEVICE(Adapter);
+	#endif
+#endif
+
+	if(!Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)
+		return;
+
+	RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n"));
+
+#if defined (CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI)
+	// Walk around for DTM test, we will not enable HW - radio on/off because r/w
+	// page 1 register before Lextra bus is enabled cause system fails when resuming
+	// from S4. 20080218, Emily
+	if(Adapter->bInHctTest)
+		return;
+
+//#if ((HAL_CODE_BASE == RTL8192_S) )
+	//Adapter->HalFunc.GPIOChangeRFHandler(Adapter, GPIORF_POLLING);
+//#else
+	// 2010/07/27 MH Only Minicard and support selective suspend, we can not turn off all MAC power to 
+	// stop 8051. For dongle and minicard, we both support selective suspend mode.
+	//if(pDevice->RegUsbSS && Adapter->HalFunc.GetInterfaceSelectionHandler(Adapter) == INTF_SEL2_MINICARD)
+
+	//
+	// 2010/08/12 MH We support severl power consumption combination as below.
+	//
+	// Power consumption combination  
+	//	SS Enable: (LPS disable + IPS + SW/HW radio off)
+	//	1. Dongle + PDN  (support HW radio off)
+	//	2. Dongle + Normal  (No HW radio off)
+	//	3. MiniCard + PDN (support HW radio off)
+	//	4. MiniCard + Normal (support HW radio off)
+	//
+	//	SS Disable: (LPS + IPS + SW/HW radio off)
+	//	1. Dongle + PDN  (support HW radio off)
+	//	2. Dongle + Normal  (No HW radio off)
+	//	3. MiniCard + PDN (support HW radio off)
+	//	4. MiniCard + Normal (support HW radio off)
+	//
+	//	For Power down module detection. We need to read power register no matter
+	//	dongle or minicard, we will add the item is the detection method.
+	//
+	//
+	//vivi add du case
+	if ((IS_HARDWARE_TYPE_8192CU(Adapter)||IS_HARDWARE_TYPE_8192DU(Adapter))
+		&& pDevice->RegUsbSS)
+	{
+		RT_TRACE(COMP_RF, DBG_LOUD, ("USB SS Enabled\n"));
+		if (SUPPORT_HW_RADIO_DETECT(Adapter))
+		{	// Support HW radio detection
+			RT_TRACE(COMP_RF, DBG_LOUD, ("USB Card Type 2/3/4 support GPIO Detect\n"));
+			GpioDetectTimerStart(Adapter);
+		}
+		else
+		{	// Dongle does not support HW radio detection.?? In the fufure??
+			RT_TRACE(COMP_RF, DBG_LOUD, ("USB DONGLE Non-GPIO-Detect\n"));				
+		}			
+	}
+	else if (IS_HARDWARE_TYPE_8192CU(Adapter) ||
+		IS_HARDWARE_TYPE_8723AU(Adapter)||
+		IS_HARDWARE_TYPE_8192DU(Adapter) ||
+		IS_HARDWARE_TYPE_8723AS(Adapter))
+	{	// Not support Selective suspend 
+		RT_TRACE(COMP_RF, DBG_LOUD, ("USB SS Disable\n"));
+		if (SUPPORT_HW_RADIO_DETECT(Adapter))
+		{
+			RT_TRACE(COMP_RF, DBG_LOUD, ("USB Card Type 2/3/4 support GPIO Detect\n"));
+			PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) );
+		}
+		else
+		{
+			RT_TRACE(COMP_RF, DBG_LOUD, ("USB DONGLE Non-GPIO-Detect\n"));
+		}
+	}
+	else
+	{	// CE only support noemal HW radio detection now. Support timers GPIO detection in SE/CU.		
+		PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) );
+	}
+//#endif
+#else if defined CONFIG_PCI_HCI
+	if(Adapter->bInHctTest)
+		return;
+
+	// CE only support noemal HW radio detection now. We support timers GPIO detection in SE.		
+	PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) );
+#endif
+#endif
+}	/* dm_CheckRfCtrlGPIO */
+
+static VOID
+dm_InitRateAdaptiveMask(
+	IN	PADAPTER	Adapter	
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PRATE_ADAPTIVE	pRA = (PRATE_ADAPTIVE)&pdmpriv->RateAdaptive;
+	
+	pRA->RATRState = DM_RATR_STA_INIT;
+	pRA->PreRATRState = DM_RATR_STA_INIT;
+
+	if (pdmpriv->DM_Type == DM_Type_ByDriver)
+		pdmpriv->bUseRAMask = _TRUE;
+	else
+		pdmpriv->bUseRAMask = _FALSE;	
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	dm_RefreshRateAdaptiveMask()
+ *
+ * Overview:	Update rate table mask according to rssi
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/27/2009	hpfan	Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+static VOID
+dm_RefreshRateAdaptiveMask(	IN	PADAPTER	pAdapter)
+{
+#if 0
+	PADAPTER 				pTargetAdapter;
+	HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(pAdapter);
+	PMGNT_INFO				pMgntInfo = &(ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, TRUE)->MgntInfo);
+	PRATE_ADAPTIVE			pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive;
+	u4Byte					LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
+
+	if(pAdapter->bDriverStopped)
+	{
+		RT_TRACE(COMP_RATR, DBG_TRACE, ("<---- dm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
+		return;
+	}
+
+	if(!pMgntInfo->bUseRAMask)
+	{
+		RT_TRACE(COMP_RATR, DBG_LOUD, ("<---- dm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
+		return;
+	}
+
+	// if default port is connected, update RA table for default port (infrastructure mode only)
+	if(pAdapter->MgntInfo.mAssoc && (!ACTING_AS_AP(pAdapter)))
+	{
+		
+		// decide rastate according to rssi
+		switch (pRA->PreRATRState)
+		{
+			case DM_RATR_STA_HIGH:
+				HighRSSIThreshForRA = 50;
+				LowRSSIThreshForRA = 20;
+				break;
+			
+			case DM_RATR_STA_MIDDLE:
+				HighRSSIThreshForRA = 55;
+				LowRSSIThreshForRA = 20;
+				break;
+			
+			case DM_RATR_STA_LOW:
+				HighRSSIThreshForRA = 50;
+				LowRSSIThreshForRA = 25;
+				break;
+
+			default:
+				HighRSSIThreshForRA = 50;
+				LowRSSIThreshForRA = 20;
+				break;
+		}
+
+		if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA)
+			pRA->RATRState = DM_RATR_STA_HIGH;
+		else if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA)
+			pRA->RATRState = DM_RATR_STA_MIDDLE;
+		else
+			pRA->RATRState = DM_RATR_STA_LOW;
+
+		if(pRA->PreRATRState != pRA->RATRState)
+		{
+			RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid);
+			RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %d\n", pHalData->UndecoratedSmoothedPWDB));
+			RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pRA->RATRState));
+			RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pRA->PreRATRState, pRA->RATRState));
+			pAdapter->HalFunc.UpdateHalRAMaskHandler(
+									pAdapter,
+									FALSE,
+									0,
+									NULL,
+									NULL,
+									pRA->RATRState);
+			pRA->PreRATRState = pRA->RATRState;
+		}
+	}
+
+	//
+	// The following part configure AP/VWifi/IBSS rate adaptive mask.
+	//
+	if(ACTING_AS_AP(pAdapter) || ACTING_AS_IBSS(pAdapter))
+	{
+		pTargetAdapter = pAdapter;
+	}
+	else
+	{
+		pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, FALSE);
+		if(!ACTING_AS_AP(pTargetAdapter))
+			pTargetAdapter = NULL;
+	}
+
+	// if extension port (softap) is started, updaet RA table for more than one clients associate
+	if(pTargetAdapter != NULL)
+	{
+		int	i;
+		PRT_WLAN_STA	pEntry;
+		PRATE_ADAPTIVE     pEntryRA;
+
+		for(i = 0; i < ASSOCIATE_ENTRY_NUM; i++)
+		{
+			if(	pTargetAdapter->MgntInfo.AsocEntry[i].bUsed && pTargetAdapter->MgntInfo.AsocEntry[i].bAssociated)
+			{
+				pEntry = pTargetAdapter->MgntInfo.AsocEntry+i;
+				pEntryRA = &pEntry->RateAdaptive;
+
+				switch (pEntryRA->PreRATRState)
+				{
+					case DM_RATR_STA_HIGH:
+					{
+						HighRSSIThreshForRA = 50;
+						LowRSSIThreshForRA = 20;
+					}
+					break;
+					
+					case DM_RATR_STA_MIDDLE:
+					{
+						HighRSSIThreshForRA = 55;
+						LowRSSIThreshForRA = 20;
+					}
+					break;
+					
+					case DM_RATR_STA_LOW:
+					{
+						HighRSSIThreshForRA = 50;
+						LowRSSIThreshForRA = 25;
+					}
+					break;
+
+					default:
+					{
+						HighRSSIThreshForRA = 50;
+						LowRSSIThreshForRA = 20;
+					}
+				}
+
+				if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA)
+					pEntryRA->RATRState = DM_RATR_STA_HIGH;
+				else if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA)
+					pEntryRA->RATRState = DM_RATR_STA_MIDDLE;
+				else
+					pEntryRA->RATRState = DM_RATR_STA_LOW;
+
+				if(pEntryRA->PreRATRState != pEntryRA->RATRState)
+				{
+					RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("AsocEntry addr : "), pEntry->MacAddr);
+					RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB));
+					RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pEntryRA->RATRState));
+					RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pEntryRA->PreRATRState, pEntryRA->RATRState));
+					pAdapter->HalFunc.UpdateHalRAMaskHandler(
+											pTargetAdapter,
+											FALSE,
+											pEntry->AID+1,
+											pEntry->MacAddr,
+											pEntry,
+											pEntryRA->RATRState);
+					pEntryRA->PreRATRState = pEntryRA->RATRState;
+				}
+
+			}
+		}
+	}
+#endif	
+}
+
+static VOID
+dm_CheckProtection(
+	IN	PADAPTER	Adapter
+	)
+{
+#if 0
+	PMGNT_INFO		pMgntInfo = &(Adapter->MgntInfo);
+	u1Byte			CurRate, RateThreshold;
+
+	if(pMgntInfo->pHTInfo->bCurBW40MHz)
+		RateThreshold = MGN_MCS1;
+	else
+		RateThreshold = MGN_MCS3;
+
+	if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold)
+	{
+		pMgntInfo->bDmDisableProtect = TRUE;
+		DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
+	}
+	else
+	{
+		pMgntInfo->bDmDisableProtect = FALSE;
+		DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
+	}
+#endif
+}
+
+static VOID
+dm_CheckStatistics(
+	IN	PADAPTER	Adapter
+	)
+{
+#if 0
+	if(!Adapter->MgntInfo.bMediaConnect)
+		return;
+
+	//2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly.
+	rtw_hal_get_hwreg( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) );
+
+	// Calculate current Tx Rate(Successful transmited!!)
+
+	// Calculate current Rx Rate(Successful received!!)
+	
+	//for tx tx retry count
+	rtw_hal_get_hwreg( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) );
+#endif	
+}
+
+static void dm_CheckPbcGPIO(_adapter *padapter)
+{	
+	u8	tmp1byte;
+	u8	bPbcPressed = _FALSE;
+	int i=0;
+
+	if(!padapter->registrypriv.hw_wps_pbc)
+		return;
+
+	do
+	{
+		i++;
+#ifdef CONFIG_USB_HCI
+	tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
+	tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT);
+	rtw_write8(padapter, GPIO_IO_SEL, tmp1byte);	//enable GPIO[2] as output mode
+
+	tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
+	rtw_write8(padapter,  GPIO_IN, tmp1byte);		//reset the floating voltage level
+
+	tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
+	tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
+	rtw_write8(padapter, GPIO_IO_SEL, tmp1byte);	//enable GPIO[2] as input mode
+
+	tmp1byte =rtw_read8(padapter, GPIO_IN);
+	
+	if (tmp1byte == 0xff)
+	{
+		bPbcPressed = _FALSE;
+		break ;
+	}	
+
+	if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)
+	{
+		bPbcPressed = _TRUE;
+
+		if(i<=3)
+			rtw_msleep_os(50);
+	}
+#else
+	tmp1byte = rtw_read8(padapter, GPIO_IN);
+	//RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte));
+
+	if (tmp1byte == 0xff || padapter->init_adpt_in_progress)
+	{
+		bPbcPressed = _FALSE;
+		break ;
+	}
+
+	if((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0)
+	{
+		bPbcPressed = _TRUE;
+
+		if(i<=3)
+			rtw_msleep_os(50);
+	}
+#endif		
+
+	}while(i<=3 && bPbcPressed == _TRUE);
+	
+	if( _TRUE == bPbcPressed)
+	{
+		// Here we only set bPbcPressed to true
+		// After trigger PBC, the variable will be set to false		
+		DBG_8192C("CheckPbcGPIO - PBC is pressed, try_cnt=%d\n", i-1);
+                
+#ifdef RTK_DMP_PLATFORM
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12))
+		kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_NET_PBC);
+#else
+		kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC);
+#endif
+#else
+
+		if ( padapter->pid[0] == 0 )
+		{	//	0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver.
+			return;
+		}
+
+#ifdef PLATFORM_LINUX
+		rtw_signal_process(padapter->pid[0], SIGUSR1);
+#endif
+#endif
+	}	
+}
+
+#ifdef CONFIG_PCI_HCI
+//
+//	Description:
+//		Perform interrupt migration dynamically to reduce CPU utilization.
+//
+//	Assumption:
+//		1. Do not enable migration under WIFI test.
+//
+//	Created by Roger, 2010.03.05.
+//
+VOID
+dm_InterruptMigration(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	BOOLEAN			bCurrentIntMt, bCurrentACIntDisable;
+	BOOLEAN			IntMtToSet = _FALSE; 
+	BOOLEAN			ACIntToSet = _FALSE;
+	
+	
+	// Retrieve current interrupt migration and Tx four ACs IMR settings first.
+	bCurrentIntMt = pHalData->bInterruptMigration;
+	bCurrentACIntDisable = pHalData->bDisableTxInt;
+
+	//
+	// <Roger_Notes> Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics 
+	// when interrupt migration is set before. 2010.03.05.
+	// 
+	if(!Adapter->registrypriv.wifi_spec && 
+		(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) &&
+		pmlmepriv->LinkDetectInfo.bHigherBusyTraffic)
+	{			
+		IntMtToSet = _TRUE;
+
+		// To check whether we should disable Tx interrupt or not.
+		if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic )
+			ACIntToSet = _TRUE;				
+	}		
+	
+	//Update current settings.
+	if( bCurrentIntMt != IntMtToSet ){
+		DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet);
+		if(IntMtToSet)
+		{
+			//
+			// <Roger_Notes> Set interrrupt migration timer and corresponging Tx/Rx counter. 
+			// timer 25ns*0xfa0=100us for 0xf packets.
+			// 2010.03.05.
+			//
+			rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx
+			pHalData->bInterruptMigration = IntMtToSet;
+		}
+		else
+		{
+			// Reset all interrupt migration settings.
+			rtw_write32(Adapter, REG_INT_MIG, 0);
+			pHalData->bInterruptMigration = IntMtToSet;
+		}
+	}
+
+	/*if( bCurrentACIntDisable != ACIntToSet ){
+		DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet);
+		if(ACIntToSet) // Disable four ACs interrupts.
+		{
+			//
+			// <Roger_Notes> Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization.
+			// When extremely highly Rx OK occurs, we will disable Tx interrupts.
+			// 2010.03.05.
+			//
+			UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS );
+			pHalData->bDisableTxInt = ACIntToSet;
+		}
+		else// Enable four ACs interrupts.
+		{
+			UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 );
+			pHalData->bDisableTxInt = ACIntToSet;
+		}
+	}*/
+	
+}
+
+#endif
+
+//
+// Initialize GPIO setting registers
+//
+static void
+dm_InitGPIOSetting(
+	IN	PADAPTER	Adapter
+	)
+{
+	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(Adapter);
+	
+	u8	tmp1byte;
+	
+	tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
+	tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
+	
+#ifdef CONFIG_BT_COEXIST
+	// UMB-B cut bug. We need to support the modification.
+	if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) && 
+		pHalData->bt_coexist.BT_Coexist)
+	{
+		tmp1byte |= (BIT5);	
+	}
+#endif	
+	rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
+
+}
+
+static void update_EDCA_param(_adapter *padapter)
+{
+	u32 	trafficIndex;
+	u32	edca_param;
+	u64	cur_tx_bytes = 0;
+	u64	cur_rx_bytes = 0;
+	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
+	struct recv_priv		*precvpriv = &(padapter->recvpriv);
+	struct registry_priv	*pregpriv = &padapter->registrypriv;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);	
+	u8	bbtchange = _FALSE;
+#endif
+	
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	//associated AP
+	if ((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0))
+	{
+		return;
+	}
+	
+	if (pmlmeinfo->assoc_AP_vendor >= maxAP)
+	{
+		return;
+	}
+
+	cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes;
+	cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes;
+
+	//traffic, TX or RX
+	if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP))
+	{
+		if (cur_tx_bytes > (cur_rx_bytes << 2))
+		{ // Uplink TP is present.
+			trafficIndex = UP_LINK; 
+		}
+		else
+		{ // Balance TP is present.
+			trafficIndex = DOWN_LINK;
+		}
+	}
+	else
+	{
+		if (cur_rx_bytes > (cur_tx_bytes << 2))
+		{ // Downlink TP is present.
+			trafficIndex = DOWN_LINK;
+		}
+		else
+		{ // Balance TP is present.
+			trafficIndex = UP_LINK;
+		}
+	}
+
+#ifdef CONFIG_BT_COEXIST
+	if(pbtpriv->BT_Coexist)
+	{
+		if( (pbtpriv->BT_EDCA[UP_LINK]!=0) ||  (pbtpriv->BT_EDCA[DOWN_LINK]!=0))
+		{
+			bbtchange = _TRUE;
+		}
+	}
+#endif
+
+	if (pdmpriv->prv_traffic_idx != trafficIndex)
+	{
+#if 0
+#ifdef CONFIG_BT_COEXIST
+		if(_TRUE == bbtchange)		
+			rtw_write32(padapter, REG_EDCA_BE_PARAM, pbtpriv->BT_EDCA[trafficIndex]);		
+		else
+#endif
+		//adjust EDCA parameter for BE queue
+		//fire_write_MAC_cmd(padapter, EDCA_BE_PARAM, EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]);
+		rtw_write32(padapter, REG_EDCA_BE_PARAM, EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]);
+
+#else
+		if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N))
+		{
+			edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
+		}
+		else if((pmlmeinfo->assoc_AP_vendor == airgocapAP) &&
+			((pmlmeext->cur_wireless_mode == WIRELESS_11G) ||(pmlmeext->cur_wireless_mode == WIRELESS_11BG)))
+		{
+			edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
+		}
+		else
+		{
+			edca_param = EDCAParam[unknownAP][trafficIndex];
+		}
+
+#ifdef CONFIG_BT_COEXIST
+		if(_TRUE == bbtchange)		
+			edca_param = pbtpriv->BT_EDCA[trafficIndex];
+#endif
+
+		rtw_write32(padapter, REG_EDCA_BE_PARAM, edca_param);
+#endif
+		pdmpriv->prv_traffic_idx = trafficIndex;
+	}
+	
+//exit_update_EDCA_param:	
+
+	pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes;
+	precvpriv->last_rx_bytes = precvpriv->rx_bytes;
+
+	return;
+}
+
+static void dm_InitDynamicBBPowerSaving(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PS_T	*pPSTable = &pdmpriv->DM_PSTable;
+
+	pPSTable->PreCCAState = CCA_MAX;
+	pPSTable->CurCCAState = CCA_MAX;
+	pPSTable->PreRFState = RF_MAX;
+	pPSTable->CurRFState = RF_MAX;
+	pPSTable->Rssi_val_min = 0;
+}
+
+static void dm_1R_CCA(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PS_T	*pPSTable = &pdmpriv->DM_PSTable;
+
+	if(pPSTable->Rssi_val_min != 0)
+	{
+		if(pPSTable->PreCCAState == CCA_2R)
+		{
+			if(pPSTable->Rssi_val_min >= 35)
+				pPSTable->CurCCAState = CCA_1R;
+			else
+				pPSTable->CurCCAState = CCA_2R;
+		}
+		else{
+			if(pPSTable->Rssi_val_min <= 30)
+				pPSTable->CurCCAState = CCA_2R;
+			else
+				pPSTable->CurCCAState = CCA_1R;
+		}
+	}
+	else
+		pPSTable->CurCCAState=CCA_MAX;
+
+	if(pPSTable->PreCCAState != pPSTable->CurCCAState)
+	{
+		if(pPSTable->CurCCAState == CCA_1R)
+		{
+			if(pHalData->rf_type == RF_2T2R)
+			{
+				PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable  , bMaskByte0, 0x13);
+				PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20);
+			}
+			else
+			{
+				PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable  , bMaskByte0, 0x23);
+				PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100
+			}
+		}
+		else
+		{
+			PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x33);
+			PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63);
+		}
+		pPSTable->PreCCAState = pPSTable->CurCCAState;
+	}
+	//DBG_8192C("dm_1R_CCA(): CCAStage=%x\n", pPSTable->CurCCAState);
+}
+
+void
+rtl8192c_dm_RF_Saving(
+	IN	PADAPTER	pAdapter,
+	IN	u8	bForceInNormal 
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PS_T	*pPSTable = &pdmpriv->DM_PSTable;
+
+	if(pdmpriv->initialize == 0){
+		pdmpriv->rf_saving_Reg874 = (PHY_QueryBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord)&0x1CC000)>>14;
+		pdmpriv->rf_saving_RegC70 = (PHY_QueryBBReg(pAdapter, rOFDM0_AGCParameter1, bMaskDWord)&BIT3)>>3;
+		pdmpriv->rf_saving_Reg85C = (PHY_QueryBBReg(pAdapter, rFPGA0_XCD_SwitchControl, bMaskDWord)&0xFF000000)>>24;
+		pdmpriv->rf_saving_RegA74 = (PHY_QueryBBReg(pAdapter, 0xa74, bMaskDWord)&0xF000)>>12;
+		//Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord);
+		pdmpriv->initialize = 1;
+	}
+
+	if(!bForceInNormal)
+	{
+		if(pPSTable->Rssi_val_min != 0)
+		{
+			 
+			if(pPSTable->PreRFState == RF_Normal)
+			{
+			#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
+				if(pPSTable->Rssi_val_min >= 50)
+			#else
+				if(pPSTable->Rssi_val_min >= 30)
+			#endif
+					pPSTable->CurRFState = RF_Save;
+				else
+					pPSTable->CurRFState = RF_Normal;
+			}
+			else{
+			#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
+				if(pPSTable->Rssi_val_min <= 45)
+			#else
+				if(pPSTable->Rssi_val_min <= 25)
+			#endif
+					pPSTable->CurRFState = RF_Normal;
+				else
+					pPSTable->CurRFState = RF_Save;
+			}
+		}
+		else
+			pPSTable->CurRFState=RF_MAX;
+	}
+	else
+	{
+		pPSTable->CurRFState = RF_Normal;
+	}
+	
+	if(pPSTable->PreRFState != pPSTable->CurRFState)
+	{
+		if(pPSTable->CurRFState == RF_Save)
+		{
+			PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW  , 0x1C0000, 0x2); //Reg874[20:18]=3'b010
+			PHY_SetBBReg(pAdapter, rOFDM0_AGCParameter1, BIT3, 0); //RegC70[3]=1'b0
+			PHY_SetBBReg(pAdapter, rFPGA0_XCD_SwitchControl, 0xFF000000, 0x63); //Reg85C[31:24]=0x63
+			PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, 0xC000, 0x2); //Reg874[15:14]=2'b10
+			PHY_SetBBReg(pAdapter, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3
+			PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x0); //Reg818[28]=1'b0
+			PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x1); //Reg818[28]=1'b1
+			DBG_8192C("%s(): RF_Save\n", __FUNCTION__);
+		}
+		else
+		{
+			PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW  , 0x1CC000, pdmpriv->rf_saving_Reg874);
+			PHY_SetBBReg(pAdapter, rOFDM0_AGCParameter1, BIT3, pdmpriv->rf_saving_RegC70);
+			PHY_SetBBReg(pAdapter, rFPGA0_XCD_SwitchControl, 0xFF000000, pdmpriv->rf_saving_Reg85C);
+			PHY_SetBBReg(pAdapter, 0xa74, 0xF000, pdmpriv->rf_saving_RegA74);
+			PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x0);
+			DBG_8192C("%s(): RF_Normal\n", __FUNCTION__);
+		}
+		pPSTable->PreRFState = pPSTable->CurRFState;
+	}
+}
+
+static void
+dm_DynamicBBPowerSaving(
+IN	PADAPTER	pAdapter
+	)
+{	
+
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct mlme_priv	*pmlmepriv = &pAdapter->mlmepriv;
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PS_T	*pPSTable = &pdmpriv->DM_PSTable;
+
+	//1 1.Determine the minimum RSSI 
+	if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) &&	
+		(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0))
+	{
+		pPSTable->Rssi_val_min = 0;
+		//RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n"));
+	}
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)	// Default port
+	{
+		//if(ACTING_AS_AP(pAdapter) || pMgntInfo->mIbss)
+		 if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
+			       (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE))	//todo: AP Mode
+		{
+			pPSTable->Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+			//RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Client PWDB = 0x%lx \n", pPSTable->Rssi_val_min));
+		}
+		else
+		{
+			pPSTable->Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB;
+			//RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("STA Default Port PWDB = 0x%lx \n", pPSTable->Rssi_val_min));
+		}
+	}
+	else // associated entry pwdb
+	{	
+		pPSTable->Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+		//RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Ext Port PWDB = 0x%lx \n", pPSTable->Rssi_val_min));
+	}
+	
+	//1 2.Power Saving for 92C
+	if(IS_92C_SERIAL(pHalData->VersionID))
+	{
+		//dm_1R_CCA(pAdapter);
+	}
+	
+	// 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable.
+	// 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns to 600ns. 
+	//1 3.Power Saving for 88C
+	else
+	{
+		rtl8192c_dm_RF_Saving(pAdapter, _FALSE);
+	}
+}
+
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+// Add new function to reset the state of antenna diversity before link.
+//
+void SwAntDivResetBeforeLink8192C(IN PADAPTER Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table;
+	
+	pDM_SWAT_Table->SWAS_NoLink_State = 0;
+}
+
+// Compare RSSI for deciding antenna
+void	SwAntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	if((0 != pHalData->AntDivCfg) && (!IS_92C_SERIAL(pHalData->VersionID)) )
+	{
+		//DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi),
+		//	src->Rssi,query_rx_pwr_percentage(src->Rssi));
+		//select optimum_antenna for before linked =>For antenna diversity
+		if(dst->Rssi >=  src->Rssi )//keep org parameter
+		{
+			src->Rssi = dst->Rssi;
+			src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna;						
+		}
+	}
+}
+
+// Add new function to reset the state of antenna diversity before link.
+u8 SwAntDivBeforeLink8192C(IN PADAPTER Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	SWAT_T			*pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table;
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	
+	// Condition that does not need to use antenna diversity.
+	if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))
+	{
+		//DBG_8192C("SwAntDivBeforeLink8192C(): No AntDiv Mechanism.\n");
+		return _FALSE;
+	}
+
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)	
+	{
+		pDM_SWAT_Table->SWAS_NoLink_State = 0;
+		return _FALSE;
+	}
+	// Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF.
+/*	
+	if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect)
+	{
+	
+	
+		RT_TRACE(COMP_SWAS, DBG_LOUD, 
+				("SwAntDivCheckBeforeLink8192C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", 
+				pMgntInfo->RFChangeInProgress,
+				pHalData->eRFPowerState));
+	
+		pDM_SWAT_Table->SWAS_NoLink_State = 0;
+		
+		return FALSE;
+	}
+*/	
+	
+	if(pDM_SWAT_Table->SWAS_NoLink_State == 0){
+		//switch channel
+		pDM_SWAT_Table->SWAS_NoLink_State = 1;
+		pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A;
+
+		//PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna);
+		rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE);
+		//DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B");
+		return _TRUE;
+	}
+	else
+	{
+		pDM_SWAT_Table->SWAS_NoLink_State = 0;
+		return _FALSE;
+	}
+		
+
+
+}
+#endif
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+//
+// 20100514 Luke/Joseph:
+// Add new function to reset antenna diversity state after link.
+//
+void
+SwAntDivRestAfterLink8192C(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	SWAT_T			*pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table;
+
+	if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))	
+		return;
+
+	//DBG_8192C("======>   SwAntDivRestAfterLink <========== \n");
+	pHalData->RSSI_cnt_A= 0;
+	pHalData->RSSI_cnt_B= 0;
+	pHalData->RSSI_test = _FALSE;
+	
+	pDM_SWAT_Table->try_flag = 0xff;
+	pDM_SWAT_Table->RSSI_Trying = 0;	
+	pDM_SWAT_Table->SelectAntennaMap=0xAA;
+	pDM_SWAT_Table->CurAntenna = pHalData->CurAntenna;
+	pDM_SWAT_Table->PreAntenna = pHalData->CurAntenna;
+		
+	pdmpriv->lastTxOkCnt=0;
+	pdmpriv->lastRxOkCnt=0;
+
+	pdmpriv->TXByteCnt_A=0;
+	pdmpriv->TXByteCnt_B=0;
+	pdmpriv->RXByteCnt_A=0;
+	pdmpriv->RXByteCnt_B=0;
+	pdmpriv->DoubleComfirm=0;	
+	pdmpriv->TrafficLoad = TRAFFIC_LOW;
+	
+}
+
+
+//
+// 20100514 Luke/Joseph:
+// Add new function for antenna diversity after link.
+// This is the main function of antenna diversity after link.
+// This function is called in HalDmWatchDog() and dm_SW_AntennaSwitchCallback().
+// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test.
+// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing.
+// After 500ms, dm_SW_AntennaSwitchCallback() calls this function to compare the signal just
+// listened on the air with the RSSI of original antenna.
+// It chooses the antenna with better RSSI.
+// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting 
+// penalty to get next try.
+//
+static VOID
+dm_SW_AntennaSwitch(
+	PADAPTER	Adapter,
+	u8			Step
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	SWAT_T	*pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table;
+	s32			curRSSI=100, RSSI_A, RSSI_B;
+	u64			curTxOkCnt, curRxOkCnt;
+	u64			CurByteCnt = 0, PreByteCnt = 0;	
+	u8		nextAntenna = 0;
+	u8			Score_A=0, Score_B=0;
+	u8			i;
+
+	// Condition that does not need to use antenna diversity.
+	if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))
+	{
+		//RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): No AntDiv Mechanism.\n"));
+		return;
+	}
+	// If dynamic ant_div is disabled.
+	if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_ANT_DIV) )
+	{	
+		return;
+	}
+	
+	if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)	==_FALSE)
+		return;
+#if 0 //to do
+	// Radio off: Status reset to default and return.
+	if(pHalData->eRFPowerState==eRfOff)
+	{
+		SwAntDivRestAfterLink(Adapter);
+		return;
+	}
+#endif
+	//DBG_8192C("\n............................ %s.........................\n",__FUNCTION__);
+	// Handling step mismatch condition.
+	// Peak step is not finished at last time. Recover the variable and check again.
+	if( Step != pDM_SWAT_Table->try_flag	)
+	{
+		SwAntDivRestAfterLink8192C(Adapter);
+	}
+
+
+	if(pDM_SWAT_Table->try_flag == 0xff)
+	{
+#if 0
+		// Select RSSI checking target
+		if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter))
+		{
+			// Target: Infrastructure mode AP.
+			pHalData->RSSI_target = NULL;
+			RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): RSSI_target is DEF AP!\n"));
+		}
+		else
+		{
+			u8			index = 0;
+			PRT_WLAN_STA	pEntry = NULL;
+			PADAPTER		pTargetAdapter = NULL;
+		
+			if(	pMgntInfo->mIbss || ACTING_AS_AP(Adapter) )
+			{
+				// Target: AP/IBSS peer.
+				pTargetAdapter = Adapter;
+			}
+			else if(ACTING_AS_AP(ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE)))
+			{
+				// Target: VWIFI peer.
+				pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE);
+			}
+
+			if(pTargetAdapter != NULL)
+			{
+				for(index=0; index<ASSOCIATE_ENTRY_NUM; index++)
+				{
+					pEntry = AsocEntry_EnumStation(pTargetAdapter, index);
+					if(pEntry != NULL)
+					{
+						if(pEntry->bAssociated)
+							break;			
+					}
+				}
+			}
+
+			if(pEntry == NULL)
+			{
+				SwAntDivRestAfterLink(Adapter);
+				RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): No Link.\n"));
+				return;
+			}
+			else
+			{
+				pHalData->RSSI_target = pEntry;
+				RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): RSSI_target is PEER STA\n"));
+			}
+		}
+			
+			
+#endif
+		
+		pHalData->RSSI_cnt_A= 0;
+		pHalData->RSSI_cnt_B= 0;
+		pDM_SWAT_Table->try_flag = 0;
+	//	DBG_8192C("dm_SW_AntennaSwitch(): Set try_flag to 0 prepare for peak!\n");
+		return;
+	}
+	else
+	{
+		curTxOkCnt = Adapter->xmitpriv.tx_bytes - pdmpriv->lastTxOkCnt;
+		curRxOkCnt = Adapter->recvpriv.rx_bytes - pdmpriv->lastRxOkCnt;
+
+		pdmpriv->lastTxOkCnt = Adapter->xmitpriv.tx_bytes ;
+		pdmpriv->lastRxOkCnt = Adapter->recvpriv.rx_bytes ;
+
+		if(pDM_SWAT_Table->try_flag == 1)
+		{
+			if(pDM_SWAT_Table->CurAntenna == Antenna_A)
+		{
+				pdmpriv->TXByteCnt_A += curTxOkCnt;
+				pdmpriv->RXByteCnt_A += curRxOkCnt;
+				//DBG_8192C("#####  TXByteCnt_A(%lld) , RXByteCnt_A(%lld) ####\n",pdmpriv->TXByteCnt_A,pdmpriv->RXByteCnt_A);
+			}
+			else
+			{
+				pdmpriv->TXByteCnt_B += curTxOkCnt;
+				pdmpriv->RXByteCnt_B += curRxOkCnt;
+				//DBG_8192C("#####  TXByteCnt_B(%lld) , RXByteCnt_B(%lld) ####\n",pdmpriv->TXByteCnt_B,pdmpriv->RXByteCnt_B);
+			}
+		
+			nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A;
+			pDM_SWAT_Table->RSSI_Trying--;
+			//DBG_8192C("RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying);
+			
+			if(pDM_SWAT_Table->RSSI_Trying == 0)
+			{
+				CurByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pdmpriv->TXByteCnt_A+pdmpriv->RXByteCnt_A) : (pdmpriv->TXByteCnt_B+pdmpriv->RXByteCnt_B);
+				PreByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pdmpriv->TXByteCnt_B+pdmpriv->RXByteCnt_B) : (pdmpriv->TXByteCnt_A+pdmpriv->RXByteCnt_A);
+
+				//DBG_8192C("CurByteCnt = %lld\n", CurByteCnt);
+				//DBG_8192C("PreByteCnt = %lld\n",PreByteCnt);		
+				
+				if(pdmpriv->TrafficLoad == TRAFFIC_HIGH)
+				{
+					PreByteCnt = PreByteCnt*9;	//normalize:Cur=90ms:Pre=10ms					
+				}
+				else if(pdmpriv->TrafficLoad == TRAFFIC_LOW)
+				{					
+					//CurByteCnt = CurByteCnt/2;
+					CurByteCnt = CurByteCnt>>1;//normalize:100ms:50ms					
+				}
+
+
+				//DBG_8192C("After DIV=>CurByteCnt = %lld\n", CurByteCnt);
+				//DBG_8192C("PreByteCnt = %lld\n",PreByteCnt);		
+
+				if(pHalData->RSSI_cnt_A > 0)
+					RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; 
+				else
+					RSSI_A = 0;
+				if(pHalData->RSSI_cnt_B > 0)
+					RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; 
+				else
+					RSSI_B = 0;
+				
+				curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B;
+				pDM_SWAT_Table->PreRSSI =  (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_B : RSSI_A;
+				//DBG_8192C("Luke:PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI);
+				//DBG_8192C("SWAS: preAntenna= %s, curAntenna= %s \n", 
+				//(pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"));
+				//DBG_8192C("Luke:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n",
+					//RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B);
+			}
+
+			}
+			else
+			{
+		
+			if(pHalData->RSSI_cnt_A > 0)
+				RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; 
+			else
+				RSSI_A = 0;
+			if(pHalData->RSSI_cnt_B > 0)
+				RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; 
+			else
+				RSSI_B = 0;
+			curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B;
+			pDM_SWAT_Table->PreRSSI =  (pDM_SWAT_Table->PreAntenna == Antenna_A)? RSSI_A : RSSI_B;
+			//DBG_8192C("Ekul:PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI);
+			//DBG_8192C("SWAS: preAntenna= %s, curAntenna= %s \n", 
+			//(pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"));
+
+			//DBG_8192C("Ekul:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n",
+			//	RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B);
+			//RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt));
+			//RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt));
+			}
+
+		//1 Trying State
+		if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0))
+		{
+
+			if(pDM_SWAT_Table->TestMode == TP_MODE)
+			{
+				//DBG_8192C("SWAS: TestMode = TP_MODE\n");
+				//DBG_8192C("TRY:CurByteCnt = %lld\n", CurByteCnt);
+				//DBG_8192C("TRY:PreByteCnt = %lld\n",PreByteCnt);		
+				if(CurByteCnt < PreByteCnt)
+				{
+					if(pDM_SWAT_Table->CurAntenna == Antenna_A)
+						pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1;
+					else
+						pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1;
+				}
+				else
+				{
+					if(pDM_SWAT_Table->CurAntenna == Antenna_A)
+						pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1;
+					else
+						pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1;
+				}
+				for (i= 0; i<8; i++)
+				{
+					if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1)
+						Score_A++;
+					else
+						Score_B++;
+				}
+				//DBG_8192C("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap);
+				//DBG_8192C("Score_A=%d, Score_B=%d\n", Score_A, Score_B);
+				
+				if(pDM_SWAT_Table->CurAntenna == Antenna_A)
+				{
+					nextAntenna = (Score_A > Score_B)?Antenna_A:Antenna_B;
+				}
+				else
+				{
+					nextAntenna = (Score_B > Score_A)?Antenna_B:Antenna_A;
+				}
+				//RT_TRACE(COMP_SWAS, DBG_LOUD, ("nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B"));
+				//RT_TRACE(COMP_SWAS, DBG_LOUD, ("preAntenna= %s, curAntenna= %s \n", 
+					//(DM_SWAT_Table.PreAntenna == Antenna_A?"A":"B"), (DM_SWAT_Table.CurAntenna == Antenna_A?"A":"B")));
+
+				if(nextAntenna != pDM_SWAT_Table->CurAntenna)
+				{
+					//DBG_8192C("SWAS: Switch back to another antenna\n");
+				}
+				else
+				{
+					//DBG_8192C("SWAS: current anntena is good\n");
+				}	
+			}
+
+			if(pDM_SWAT_Table->TestMode == RSSI_MODE)
+			{	
+				//DBG_8192C("SWAS: TestMode = RSSI_MODE\n");
+				pDM_SWAT_Table->SelectAntennaMap=0xAA;
+				if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna
+				{
+					//DBG_8192C("SWAS: Switch back to another antenna\n");
+					nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A;
+				}
+				else // current anntena is good
+				{
+					nextAntenna = pDM_SWAT_Table->CurAntenna;
+					//DBG_8192C("SWAS: current anntena is good\n");
+				}
+				}
+				pDM_SWAT_Table->try_flag = 0;
+				pHalData->RSSI_test = _FALSE;
+				pHalData->RSSI_sum_A = 0;
+				pHalData->RSSI_cnt_A = 0;
+				pHalData->RSSI_sum_B = 0;
+				pHalData->RSSI_cnt_B = 0;
+				pdmpriv->TXByteCnt_A = 0;
+				pdmpriv->TXByteCnt_B = 0;
+				pdmpriv->RXByteCnt_A = 0;
+				pdmpriv->RXByteCnt_B = 0;
+			
+			}
+
+		//1 Normal State
+		else if(pDM_SWAT_Table->try_flag == 0)
+			{
+			if(pdmpriv->TrafficLoad == TRAFFIC_HIGH)
+				{
+				if(((curTxOkCnt+curRxOkCnt)>>1) > 1875000)
+					pdmpriv->TrafficLoad = TRAFFIC_HIGH;
+				else
+					pdmpriv->TrafficLoad = TRAFFIC_LOW;
+			}
+			else if(pdmpriv->TrafficLoad == TRAFFIC_LOW)
+				{
+				if(((curTxOkCnt+curRxOkCnt)>>1) > 1875000)
+					pdmpriv->TrafficLoad = TRAFFIC_HIGH;
+				else
+					pdmpriv->TrafficLoad = TRAFFIC_LOW;
+			}
+			if(pdmpriv->TrafficLoad == TRAFFIC_HIGH)
+				pDM_SWAT_Table->bTriggerAntennaSwitch = 0;
+			//DBG_8192C("Normal:TrafficLoad = %lld\n", curTxOkCnt+curRxOkCnt);
+
+			//Prepare To Try Antenna		
+					nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A;
+					pDM_SWAT_Table->try_flag = 1;
+					pHalData->RSSI_test = _TRUE;
+			if((curRxOkCnt+curTxOkCnt) > 1000)
+			{
+				pDM_SWAT_Table->RSSI_Trying = 4;
+				pDM_SWAT_Table->TestMode = TP_MODE;
+				}
+				else
+				{
+				pDM_SWAT_Table->RSSI_Trying = 2;
+				pDM_SWAT_Table->TestMode = RSSI_MODE;
+
+			}
+			//DBG_8192C("SWAS: Normal State -> Begin Trying! TestMode=%s\n",(pDM_SWAT_Table->TestMode == TP_MODE)?"TP":"RSSI");
+			
+			
+			pHalData->RSSI_sum_A = 0;
+			pHalData->RSSI_cnt_A = 0;
+			pHalData->RSSI_sum_B = 0;
+			pHalData->RSSI_cnt_B = 0;
+		}
+	}
+
+	//1 4.Change TRX antenna
+	if(nextAntenna != pDM_SWAT_Table->CurAntenna)
+	{
+		//DBG_8192C("@@@@@@@@ SWAS: Change TX Antenna!\n ");		
+		rtw_antenna_select_cmd(Adapter, nextAntenna, 1);
+	}
+
+	//1 5.Reset Statistics
+	pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna;
+	pDM_SWAT_Table->CurAntenna = nextAntenna;
+	pDM_SWAT_Table->PreRSSI = curRSSI;
+
+
+	//1 6.Set next timer
+
+	if(pDM_SWAT_Table->RSSI_Trying == 0)
+		return;
+
+	if(pDM_SWAT_Table->RSSI_Trying%2 == 0)
+	{
+		if(pDM_SWAT_Table->TestMode == TP_MODE)
+		{
+			if(pdmpriv->TrafficLoad == TRAFFIC_HIGH)
+			{
+				_set_timer(&pdmpriv->SwAntennaSwitchTimer,10 ); //ms
+				//DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 10 ms\n");
+			}
+			else if(pdmpriv->TrafficLoad == TRAFFIC_LOW)
+			{
+				_set_timer(&pdmpriv->SwAntennaSwitchTimer, 50 ); //ms
+				//DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 50 ms\n");
+			}
+	}
+	else
+	{
+			_set_timer(&pdmpriv->SwAntennaSwitchTimer, 500 ); //ms
+			//DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n");
+		}
+	}
+	else
+	{
+		if(pDM_SWAT_Table->TestMode == TP_MODE)
+		{
+			if(pdmpriv->TrafficLoad == TRAFFIC_HIGH)			
+				_set_timer(&pdmpriv->SwAntennaSwitchTimer,90 ); //ms			
+			else if(pdmpriv->TrafficLoad == TRAFFIC_LOW)
+				_set_timer(&pdmpriv->SwAntennaSwitchTimer,100 ); //ms
+		}
+		else
+		{
+			_set_timer(&pdmpriv->SwAntennaSwitchTimer,500 ); //ms
+			//DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n");
+		}
+	}
+
+//	RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: -----The End-----\n "));
+
+}
+
+//
+// 20100514 Luke/Joseph:
+// Callback function for 500ms antenna test trying.
+//
+static void dm_SW_AntennaSwitchCallback(void *FunctionContext)
+{
+	_adapter *padapter = (_adapter *)FunctionContext;
+
+	if(padapter->net_closed == _TRUE)
+			return;
+	// Only 
+	dm_SW_AntennaSwitch(padapter, SWAW_STEP_DETERMINE);
+}
+
+
+//
+// 20100722
+// This function is used to gather the RSSI information for antenna testing.
+// It selects the RSSI of the peer STA that we want to know.
+//
+void SwAntDivRSSICheck8192C(_adapter *padapter ,u32 RxPWDBAll)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);	
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	SWAT_T	*pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table;
+
+	if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0)
+		return;
+	
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)		
+	{			
+		if(pDM_SWAT_Table->CurAntenna == Antenna_A)
+		{			
+			pHalData->RSSI_sum_A += RxPWDBAll;
+			pHalData->RSSI_cnt_A++;
+		}
+		else
+		{
+			pHalData->RSSI_sum_B+= RxPWDBAll;
+			pHalData->RSSI_cnt_B++;
+		
+		}
+		//DBG_8192C("%s Ant_(%s),RSSI_sum(%d),RSSI_cnt(%d)\n",__FUNCTION__,(2==pHalData->CurAntenna)?"A":"B",pHalData->RSSI_sum,pHalData->RSSI_cnt);
+	}
+	
+}
+
+
+
+static VOID
+dm_SW_AntennaSwitchInit(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	SWAT_T	*pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table;
+
+	pHalData->RSSI_sum_A = 0;	
+	pHalData->RSSI_sum_B = 0;
+	pHalData->RSSI_cnt_A = 0;
+	pHalData->RSSI_cnt_B = 0;
+
+	pDM_SWAT_Table->CurAntenna = pHalData->CurAntenna;
+	pDM_SWAT_Table->PreAntenna = pHalData->CurAntenna;
+	pDM_SWAT_Table->try_flag = 0xff;
+	pDM_SWAT_Table->PreRSSI = 0;
+	pDM_SWAT_Table->bTriggerAntennaSwitch = 0;	
+	pDM_SWAT_Table->SelectAntennaMap=0xAA;
+	
+	// Move the timer initialization to InitializeVariables function.
+	//PlatformInitializeTimer(Adapter, &pMgntInfo->SwAntennaSwitchTimer, (RT_TIMER_CALL_BACK)dm_SW_AntennaSwitchCallback, NULL, "SwAntennaSwitchTimer");	
+}
+
+#endif
+
+//#define	RSSI_CCK	0
+//#define	RSSI_OFDM	1
+static void dm_RSSIMonitorInit(
+	IN	PADAPTER	Adapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	pdmpriv->OFDM_Pkt_Cnt = 0;
+	pdmpriv->RSSI_Select = RSSI_DEFAULT;
+}
+
+static void dm_RSSIMonitorCheck(
+	IN	PADAPTER	Adapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
+
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE)
+		return;
+		
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE |WIFI_ADHOC_STATE) == _TRUE )
+	{
+		if(Adapter->stapriv.asoc_sta_count < 2)
+			return;			
+	}		
+	
+	if(pdmpriv->OFDM_Pkt_Cnt == 0)
+		pdmpriv->RSSI_Select = RSSI_CCK;
+	else
+		pdmpriv->RSSI_Select = RSSI_OFDM;
+
+	pdmpriv->OFDM_Pkt_Cnt = 0;	
+	//DBG_8192C("RSSI_Select=%s OFDM_Pkt_Cnt(%d)\n",
+		//(pdmpriv->RSSI_Select == RSSI_OFDM)?"RSSI_OFDM":"RSSI_CCK",
+		//pdmpriv->OFDM_Pkt_Cnt);
+}
+
+//============================================================
+// functions
+//============================================================
+void rtl8192c_init_dm_priv(IN PADAPTER Adapter)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	//_rtw_memset(pdmpriv, 0, sizeof(struct dm_priv));
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	_init_timer(&(pdmpriv->SwAntennaSwitchTimer),  Adapter->pnetdev , dm_SW_AntennaSwitchCallback, Adapter);
+#endif
+}
+
+void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	_cancel_timer_ex(&pdmpriv->SwAntennaSwitchTimer);
+#endif
+}
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY
+void dm_InitHybridAntDiv(IN PADAPTER Adapter)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+
+	if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0)
+		return;
+	
+	//Set OFDM HW RX Antenna Diversity
+	PHY_SetBBReg(Adapter,0xc50, BIT7, 1); //Enable Hardware antenna switch
+	PHY_SetBBReg(Adapter,0x870, BIT9|BIT8, 0); //Enable hardware control of "ANT_SEL" & "ANT_SELB"
+	PHY_SetBBReg(Adapter,0xCA4, BIT11, 0); //Switch to another antenna by checking pwdb threshold
+	PHY_SetBBReg(Adapter,0xCA4, 0x7FF, 0x080); //Pwdb threshold=8dB
+	PHY_SetBBReg(Adapter,0xC54, BIT23, 1); //Decide final antenna by comparing 2 antennas' pwdb
+	PHY_SetBBReg(Adapter,0x874, BIT23, 0); //No update ANTSEL during GNT_BT=1
+	PHY_SetBBReg(Adapter,0x80C, BIT21, 1); //TX atenna selection from tx_info
+	//Set CCK HW RX Antenna Diversity
+	PHY_SetBBReg(Adapter,0xA00, BIT15, 1);//Enable antenna diversity
+	PHY_SetBBReg(Adapter,0xA0C, BIT4, 0); //Antenna diversity decision period = 32 sample
+	PHY_SetBBReg(Adapter,0xA0C, 0xf, 0xf); //Threshold for antenna diversity. Check another antenna power if input power < ANT_lim*4
+	PHY_SetBBReg(Adapter,0xA10, BIT13, 1); //polarity ana_A=1 and ana_B=0
+	PHY_SetBBReg(Adapter,0xA14, 0x1f, 0x8); //default antenna power = inpwr*(0.5 + r_ant_step/16)
+	
+	pHalData->CCK_Ant1_Cnt = 0;
+	pHalData->CCK_Ant2_Cnt = 0;
+	pHalData->OFDM_Ant1_Cnt = 0;
+	pHalData->OFDM_Ant2_Cnt = 0;
+}
+
+
+#define 	RxDefaultAnt1		0x65a9
+#define	RxDefaultAnt2		0x569a
+
+void dm_SelectRXDefault(IN	PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	
+	if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0)
+		return;
+	
+	//DbgPrint(" Ant1_Cnt=%d, Ant2_Cnt=%d\n", pHalData->Ant1_Cnt, pHalData->Ant2_Cnt);
+	//DBG_8192C(" CCK_Ant1_Cnt = %d,  CCK_Ant2_Cnt = %d\n", pHalData->CCK_Ant1_Cnt, pHalData->CCK_Ant2_Cnt);
+	//DBG_8192C(" OFDM_Ant1_Cnt = %d,  OFDM_Ant2_Cnt = %d\n", pHalData->OFDM_Ant1_Cnt, pHalData->OFDM_Ant2_Cnt);
+	if((pHalData->OFDM_Ant1_Cnt == 0) && (pHalData->OFDM_Ant2_Cnt == 0)) 
+	{
+		if((pHalData->CCK_Ant1_Cnt + pHalData->CCK_Ant2_Cnt) >=10 )
+		{
+			if(pHalData->CCK_Ant1_Cnt > (5*pHalData->CCK_Ant2_Cnt))
+			{
+				DBG_8192C(" RX Default = Ant1\n");
+				PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1);
+			}
+			else if(pHalData->CCK_Ant2_Cnt > (5*pHalData->CCK_Ant1_Cnt))
+			{
+				DBG_8192C(" RX Default = Ant2\n");
+				PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2);
+			}
+			else if(pHalData->CCK_Ant1_Cnt > pHalData->CCK_Ant2_Cnt)
+			{
+				DBG_8192C(" RX Default = Ant2\n");
+				PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2);
+			}
+			else
+			{
+				DBG_8192C(" RX Default = Ant1\n");
+				PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1);
+			}
+			pHalData->CCK_Ant1_Cnt = 0;
+			pHalData->CCK_Ant2_Cnt = 0;
+			pHalData->OFDM_Ant1_Cnt = 0;
+			pHalData->OFDM_Ant2_Cnt = 0;
+		}
+	}
+	else
+	{
+		if(pHalData->OFDM_Ant1_Cnt > pHalData->OFDM_Ant2_Cnt)
+		{
+			DBG_8192C(" RX Default = Ant1\n");
+			PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1);
+		}
+		else
+		{
+			DBG_8192C(" RX Default = Ant2\n");
+			PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2);
+		}
+		pHalData->CCK_Ant1_Cnt = 0;
+		pHalData->CCK_Ant2_Cnt = 0;
+		pHalData->OFDM_Ant1_Cnt = 0;
+		pHalData->OFDM_Ant2_Cnt = 0;
+	}
+
+
+}
+
+#endif
+
+void
+rtl8192c_InitHalDm(
+	IN	PADAPTER	Adapter
+	)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	i;
+
+#ifdef CONFIG_USB_HCI
+	dm_InitGPIOSetting(Adapter);
+#endif
+
+	pdmpriv->DM_Type = DM_Type_ByDriver;	
+	pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
+	pdmpriv->UndecoratedSmoothedPWDB = (-1);
+	pdmpriv->UndecoratedSmoothedCCK = (-1);
+	
+	
+	//.1 DIG INIT
+	pdmpriv->bDMInitialGainEnable = _TRUE;
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_DIG;
+	dm_DIGInit(Adapter);
+
+	//.2 DynamicTxPower INIT
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_HP;
+	dm_InitDynamicTxPower(Adapter);
+
+	//.3
+	DM_InitEdcaTurbo(Adapter);
+
+	//.4 RateAdaptive INIT
+	dm_InitRateAdaptiveMask(Adapter);
+
+	//.5 Tx Power Tracking Init.
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_SS;
+	DM_InitializeTXPowerTracking(Adapter);
+
+#ifdef CONFIG_BT_COEXIST
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_BT;
+	dm_InitBtCoexistDM(Adapter);
+#endif
+
+	dm_InitDynamicBBPowerSaving(Adapter);
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_ANT_DIV;
+	dm_SW_AntennaSwitchInit(Adapter);
+#endif
+
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_ANT_DIV;
+	dm_InitHybridAntDiv(Adapter);
+#endif
+
+	dm_RSSIMonitorInit(Adapter);
+
+	pdmpriv->DMFlag_tmp = pdmpriv->DMFlag;
+
+	// Save REG_INIDATA_RATE_SEL value for TXDESC.
+	for(i = 0 ; i<32 ; i++)
+	{
+		pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f;
+	}
+}
+
+#ifdef CONFIG_CONCURRENT_MODE
+static void FindMinimumRSSI(PADAPTER Adapter)
+{
+	PHAL_DATA_TYPE	pbuddy_HalData;
+	struct dm_priv *pbuddy_dmpriv;
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
+	struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
+
+	if(!rtw_buddy_adapter_up(Adapter))
+		return;
+	
+	pbuddy_HalData = GET_HAL_DATA(pbuddy_adapter);
+	pbuddy_dmpriv = &pbuddy_HalData->dmpriv;
+
+	//get min. [PWDB] when both interfaces are connected
+	if((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE 
+		&& Adapter->stapriv.asoc_sta_count > 2 
+		&& check_buddy_fwstate(Adapter, _FW_LINKED)) || 
+		(check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE 
+		&& pbuddy_adapter->stapriv.asoc_sta_count > 2
+		&& check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ||
+		(check_fwstate(pmlmepriv, WIFI_STATION_STATE) 
+		&& check_fwstate(pmlmepriv, _FW_LINKED)
+		&& check_buddy_fwstate(Adapter,WIFI_STATION_STATE) 
+		&& check_buddy_fwstate(Adapter,_FW_LINKED)))
+	{
+		if(pdmpriv->UndecoratedSmoothedPWDB > pbuddy_dmpriv->UndecoratedSmoothedPWDB)
+			pdmpriv->UndecoratedSmoothedPWDB = pbuddy_dmpriv->UndecoratedSmoothedPWDB;
+	}//primary interface is not connected
+	else if((check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE 
+		&& pbuddy_adapter->stapriv.asoc_sta_count > 2) || 
+		(check_buddy_fwstate(Adapter,WIFI_STATION_STATE) 
+		&& check_buddy_fwstate(Adapter,_FW_LINKED)))
+	{
+		pdmpriv->UndecoratedSmoothedPWDB = pbuddy_dmpriv->UndecoratedSmoothedPWDB;
+	}
+	//secondary is not connected
+	else if((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE 
+		&& Adapter->stapriv.asoc_sta_count > 2) || 
+		(check_fwstate(pmlmepriv, WIFI_STATION_STATE) 
+		&& check_fwstate(pmlmepriv, _FW_LINKED)))
+	{
+		pbuddy_dmpriv->UndecoratedSmoothedPWDB = 0;
+	}
+	//both interfaces are not connected
+	else
+	{
+		pdmpriv->UndecoratedSmoothedPWDB = 0;
+		pbuddy_dmpriv->UndecoratedSmoothedPWDB = 0;
+	}
+		
+	//primary interface is ap mode
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE && Adapter->stapriv.asoc_sta_count > 2)
+	{
+		pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB = 0;
+	}//secondary interface is ap mode
+	else if(check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE && pbuddy_adapter->stapriv.asoc_sta_count > 2)
+	{
+		pdmpriv->EntryMinUndecoratedSmoothedPWDB = pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB;
+	}
+	else //both interfaces are not ap mode
+	{
+		pdmpriv->EntryMinUndecoratedSmoothedPWDB = pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB = 0;
+	}
+
+} 
+
+#endif //CONFIG_CONCURRENT_MODE
+
+VOID
+rtl8192c_HalDmWatchDog(
+	IN	PADAPTER	Adapter
+	)
+{
+	BOOLEAN		bFwCurrentInPSMode = _FALSE;
+	BOOLEAN		bFwPSAwake = _TRUE;
+	u8 hw_init_completed = _FALSE;
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_priv	*pmlmepriv = &Adapter->mlmepriv;
+#ifdef CONFIG_CONCURRENT_MODE
+	PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
+#endif //CONFIG_CONCURRENT_MODE
+
+	#if defined(CONFIG_CONCURRENT_MODE)
+	if (Adapter->isprimary == _FALSE && pbuddy_adapter) {
+		hw_init_completed = pbuddy_adapter->hw_init_completed;
+	} else
+	#endif
+	{
+		hw_init_completed = Adapter->hw_init_completed;
+	}
+
+	if (hw_init_completed == _FALSE)
+		goto skip_dm;
+
+#ifdef CONFIG_LPS
+	#if defined(CONFIG_CONCURRENT_MODE)
+	if (Adapter->iface_type != IFACE_PORT0 && pbuddy_adapter) {
+		bFwCurrentInPSMode = pbuddy_adapter->pwrctrlpriv.bFwCurrentInPSMode;
+		rtw_hal_get_hwreg(pbuddy_adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
+	} else
+	#endif
+	{
+		bFwCurrentInPSMode = Adapter->pwrctrlpriv.bFwCurrentInPSMode;
+		rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
+	}
+#endif
+
+#ifdef CONFIG_P2P_PS
+	// Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
+	// modifed by thomas. 2011.06.11.
+	if(Adapter->wdinfo.p2p_ps_mode)
+		bFwPSAwake = _FALSE;
+#endif // CONFIG_P2P_PS
+
+	// Stop dynamic mechanism when:
+	// 1. RF is OFF. (No need to do DM.)
+	// 2. Fw is under power saving mode for FwLPS. (Prevent from SW/FW I/O racing.)
+	// 3. IPS workitem is scheduled. (Prevent from IPS sequence to be swapped with DM.
+	//     Sometimes DM execution time is longer than 100ms such that the assertion
+	//     in MgntActSet_RF_State() called by InactivePsWorkItem will be triggered by 
+	//     wating to long for RFChangeInProgress.)
+	// 4. RFChangeInProgress is TRUE. (Prevent from broken by IPS/HW/SW Rf off.)
+	// Noted by tynli. 2010.06.01.
+	//if(rfState == eRfOn)
+	if( (hw_init_completed == _TRUE) 
+		&& ((!bFwCurrentInPSMode) && bFwPSAwake))
+	{
+		//
+		// Calculate Tx/Rx statistics.
+		//
+		dm_CheckStatistics(Adapter);
+
+		//
+		// For PWDB monitor and record some value for later use.
+		//
+		PWDB_Monitor(Adapter);
+
+		dm_RSSIMonitorCheck(Adapter);
+
+#ifdef CONFIG_CONCURRENT_MODE
+		if(Adapter->adapter_type > PRIMARY_ADAPTER)
+			goto _record_initrate;
+
+		FindMinimumRSSI(Adapter);
+#endif
+
+		//
+		// Dynamic Initial Gain mechanism.
+		//
+		dm_FalseAlarmCounterStatistics(Adapter);
+		dm_DIG(Adapter);
+
+		//
+		//Dynamic BB Power Saving Mechanism
+		//
+		dm_DynamicBBPowerSaving(Adapter);
+
+		//
+		// Dynamic Tx Power mechanism.
+		//
+		dm_DynamicTxPower(Adapter);
+
+		//
+		// Tx Power Tracking.
+		//
+#if MP_DRIVER == 0
+#ifdef CONFIG_BUSY_TRAFFIC_SKIP_PWR_TRACK
+		if(pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE)
+#endif //CONFIG_BUSY_TRAFFIC_SKIP_PWR_TRACK
+#endif
+			rtl8192c_dm_CheckTXPowerTracking(Adapter);
+
+		//
+		// Rate Adaptive by Rx Signal Strength mechanism.
+		//
+		dm_RefreshRateAdaptiveMask(Adapter);
+
+#ifdef CONFIG_BT_COEXIST
+		//BT-Coexist
+		dm_BTCoexist(Adapter);
+#endif
+
+		// EDCA turbo
+		//update the EDCA paramter according to the Tx/RX mode
+		//update_EDCA_param(Adapter);
+		dm_CheckEdcaTurbo(Adapter);
+
+		//
+		// Dynamically switch RTS/CTS protection.
+		//
+		//dm_CheckProtection(Adapter);
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+		//
+		// Software Antenna diversity
+		//
+		dm_SW_AntennaSwitch(Adapter, SWAW_STEP_PEAK);
+#endif
+
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY
+		//Hybrid Antenna Diversity
+		dm_SelectRXDefault(Adapter);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+		// 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput.
+		// Tx Migration settings.
+		//dm_InterruptMigration(Adapter);
+
+		//if(Adapter->HalFunc.TxCheckStuckHandler(Adapter))
+		//	PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem));
+#endif
+
+
+_record_initrate:
+
+		// Read REG_INIDATA_RATE_SEL value for TXDESC.
+		if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE)
+		{
+			pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f;
+
+#ifdef CONFIG_TDLS
+			if(Adapter->tdlsinfo.setup_state == TDLS_LINKED_STATE)
+			{
+				u8 i=1;
+				for(; i < (Adapter->tdlsinfo.macid_index) ; i++)
+				{
+					pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f;
+				}
+			}
+#endif //CONFIG_TDLS
+
+		}
+		else
+		{
+			u8	i;
+			for(i=1 ; i < (Adapter->stapriv.asoc_sta_count + 1); i++)
+			{
+				pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f;
+			}
+		}
+	}
+
+skip_dm:
+
+	// Check GPIO to determine current RF on/off and Pbc status.
+	// Check Hardware Radio ON/OFF or not	
+	//if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)
+	//{
+		//RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n"));
+	//	dm_CheckRfCtrlGPIO(Adapter);
+	//}
+
+#ifdef CONFIG_PCI_HCI
+	if(pHalData->bGpioHwWpsPbc)
+#endif
+	{
+		dm_CheckPbcGPIO(Adapter);				// Add by hpfan 2008-03-11
+	}
+
+}
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_hal_init.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_hal_init.c
new file mode 100755
index 00000000..795c6929
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_hal_init.c
@@ -0,0 +1,3627 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#define _RTL8192C_HAL_INIT_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+#include <rtw_efuse.h>
+
+#include <rtl8192c_hal.h>
+
+#ifdef CONFIG_USB_HCI
+#include <usb_hal.h>
+#endif
+
+#ifdef CONFIG_PCI_HCI
+#include <pci_hal.h>
+#endif
+
+static BOOLEAN
+hal_EfusePgPacketWrite2ByteHeader(
+	IN	PADAPTER		pAdapter,
+	IN	u8				efuseType,
+	IN	u16				*pAddr,
+	IN	PPGPKT_STRUCT	pTargetPkt,
+	IN	BOOLEAN			bPseudoTest);
+static BOOLEAN
+hal_EfusePgPacketWrite1ByteHeader(
+	IN	PADAPTER		pAdapter, 
+	IN	u8				efuseType,
+	IN	u16				*pAddr,
+	IN	PPGPKT_STRUCT	pTargetPkt,
+	IN	BOOLEAN			bPseudoTest);
+static BOOLEAN
+hal_EfusePgPacketWriteData(
+	IN	PADAPTER		pAdapter, 
+	IN	u8				efuseType,
+	IN	u16				*pAddr,
+	IN	PPGPKT_STRUCT	pTargetPkt,
+	IN	BOOLEAN			bPseudoTest);
+static BOOLEAN 
+hal_EfusePgPacketWrite_BT(
+	IN	PADAPTER		pAdapter, 
+	IN	u8				offset,
+	IN	u8				word_en,
+	IN	u8				*pData,
+	IN	BOOLEAN			bPseudoTest);
+
+static VOID
+_FWDownloadEnable(
+	IN	PADAPTER		Adapter,
+	IN	BOOLEAN			enable
+	)
+{
+	u8	tmp;
+
+	if(enable)
+	{
+		#ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+		{
+			u8 val;
+			if( (val=rtw_read8(Adapter, REG_MCUFWDL)))
+				DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val);
+		}
+		#endif
+	
+		// 8051 enable
+		tmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+		rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp|0x04);
+
+		// MCU firmware download enable.
+		tmp = rtw_read8(Adapter, REG_MCUFWDL);
+		rtw_write8(Adapter, REG_MCUFWDL, tmp|0x01);
+
+		// 8051 reset
+		tmp = rtw_read8(Adapter, REG_MCUFWDL+2);
+		rtw_write8(Adapter, REG_MCUFWDL+2, tmp&0xf7);
+	}
+	else
+	{
+		// MCU firmware download enable.
+		tmp = rtw_read8(Adapter, REG_MCUFWDL);
+		rtw_write8(Adapter, REG_MCUFWDL, tmp&0xfe);
+
+		// Reserved for fw extension.
+		rtw_write8(Adapter, REG_MCUFWDL+1, 0x00);
+	}
+}
+
+
+#define MAX_REG_BOLCK_SIZE	196
+#define MIN_REG_BOLCK_SIZE	8
+
+static int
+_BlockWrite(
+	IN		PADAPTER		Adapter,
+	IN		PVOID		buffer,
+	IN		u32			size
+	)
+{
+	int ret = _SUCCESS;
+
+#ifdef CONFIG_PCI_HCI
+	u32			blockSize	= sizeof(u32);	// Use 4-byte write to download FW
+	u8			*bufferPtr	= (u8 *)buffer;
+	u32			*pu4BytePtr	= (u32 *)buffer;
+	u32			i, offset, blockCount, remainSize;
+	u8			remainFW[4] = {0, 0, 0, 0};
+	u8			*p = NULL;
+
+	blockCount = size / blockSize;
+	remainSize = size % blockSize;
+
+	for(i = 0 ; i < blockCount ; i++){
+		offset = i * blockSize;
+		rtw_write32(Adapter, (FW_8192C_START_ADDRESS + offset), cpu_to_le32(*(pu4BytePtr + i)));
+	}
+
+	p = (u8*)((u32*)(bufferPtr + blockCount * blockSize));
+	if(remainSize){
+		switch (remainSize) {
+		case 0:
+			break;
+		case 3:
+			remainFW[2]=*(p+2);
+		case 2: 	
+			remainFW[1]=*(p+1);
+		case 1: 	
+			remainFW[0]=*(p);
+			ret = rtw_write32(Adapter, (FW_8192C_START_ADDRESS + blockCount * blockSize), 
+				 le32_to_cpu(*(u32*)remainFW));	
+		}
+		return ret;
+	}
+#else
+  
+#ifdef SUPPORTED_BLOCK_IO
+	u32			blockSize	= MAX_REG_BOLCK_SIZE;	// Use 196-byte write to download FW	
+	u32			blockSize2  	= MIN_REG_BOLCK_SIZE;	
+#else
+	u32			blockSize	= sizeof(u32);	// Use 4-byte write to download FW
+	u32*		pu4BytePtr	= (u32*)buffer;
+	u32			blockSize2  	= sizeof(u8);
+#endif
+	u8*			bufferPtr	= (u8*)buffer;
+	u32			i, offset = 0, offset2, blockCount, remainSize, remainSize2;
+
+	blockCount = size / blockSize;
+	remainSize = size % blockSize;
+
+	for(i = 0 ; i < blockCount ; i++){
+		offset = i * blockSize;
+		#ifdef SUPPORTED_BLOCK_IO
+		ret = rtw_writeN(Adapter, (FW_8192C_START_ADDRESS + offset), blockSize, (bufferPtr + offset));
+		#else
+		ret = rtw_write32(Adapter, (FW_8192C_START_ADDRESS + offset), le32_to_cpu(*(pu4BytePtr + i)));
+		#endif
+
+		if(ret == _FAIL)
+			goto exit;
+	}
+
+	if(remainSize){
+		#if defined(SUPPORTED_BLOCK_IO) && defined(DBG_BLOCK_WRITE_ISSUE) //Can this be enabled?
+		offset = blockCount * blockSize;
+		ret = rtw_writeN(Adapter, (FW_8192C_START_ADDRESS + offset), remainSize, (bufferPtr + offset));
+		goto exit;
+		#endif
+		offset2 = blockCount * blockSize;		
+		blockCount = remainSize / blockSize2;
+		remainSize2 = remainSize % blockSize2;
+
+		for(i = 0 ; i < blockCount ; i++){
+			offset = offset2 + i * blockSize2;
+			#ifdef SUPPORTED_BLOCK_IO
+			ret = rtw_writeN(Adapter, (FW_8192C_START_ADDRESS + offset), blockSize2, (bufferPtr + offset));
+			#else
+			ret = rtw_write8(Adapter, (FW_8192C_START_ADDRESS + offset ), *(bufferPtr + offset));
+			#endif
+
+			if(ret == _FAIL)
+				goto exit;
+		}		
+
+		if(remainSize2)
+		{
+			offset += blockSize2;
+			bufferPtr += offset;
+			
+			for(i = 0 ; i < remainSize2 ; i++){
+				ret = rtw_write8(Adapter, (FW_8192C_START_ADDRESS + offset + i), *(bufferPtr + i));
+
+				if(ret == _FAIL)
+					goto exit;
+			}
+		}
+	}
+#endif
+
+exit:
+	return ret;
+}
+
+static int
+_PageWrite(
+	IN		PADAPTER	Adapter,
+	IN		u32			page,
+	IN		PVOID		buffer,
+	IN		u32			size
+	)
+{
+	u8 value8;
+	u8 u8Page = (u8) (page & 0x07) ;
+
+	value8 = (rtw_read8(Adapter, REG_MCUFWDL+2)& 0xF8 ) | u8Page ;
+	rtw_write8(Adapter, REG_MCUFWDL+2,value8);
+	return _BlockWrite(Adapter,buffer,size);
+}
+
+static VOID
+_FillDummy(
+	u8*		pFwBuf,
+	u32*	pFwLen
+	)
+{
+	u32	FwLen = *pFwLen;
+	u8	remain = (u8)(FwLen%4);
+	remain = (remain==0)?0:(4-remain);
+
+	while(remain>0)
+	{
+		pFwBuf[FwLen] = 0;
+		FwLen++;
+		remain--;
+	}
+
+	*pFwLen = FwLen;
+}
+
+static int
+_WriteFW(
+	IN		PADAPTER		Adapter,
+	IN		PVOID			buffer,
+	IN		u32			size
+	)
+{
+	// Since we need dynamic decide method of dwonload fw, so we call this function to get chip version.
+	// We can remove _ReadChipVersion from ReadAdapterInfo8192C later.
+
+	int ret = _SUCCESS;
+	u32 	pageNums,remainSize ;
+	u32 	page,offset;
+	u8*	bufferPtr = (u8*)buffer;
+
+#ifdef CONFIG_PCI_HCI
+	// 20100120 Joseph: Add for 88CE normal chip. 
+	// Fill in zero to make firmware image to dword alignment.
+//		_FillDummy(bufferPtr, &size);
+#endif
+
+	pageNums = size / MAX_PAGE_SIZE ;		
+	//RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n"));			
+	remainSize = size % MAX_PAGE_SIZE;		
+	
+	for(page = 0; page < pageNums;  page++){
+		offset = page *MAX_PAGE_SIZE;
+		ret = _PageWrite(Adapter,page, (bufferPtr+offset),MAX_PAGE_SIZE);			
+		
+		if(ret == _FAIL)
+			goto exit;
+	}
+	if(remainSize){
+		offset = pageNums *MAX_PAGE_SIZE;
+		page = pageNums;
+		ret = _PageWrite(Adapter,page, (bufferPtr+offset),remainSize);
+
+		if(ret == _FAIL)
+			goto exit;
+	}	
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("_WriteFW Done- for Normal chip.\n"));
+
+exit:
+	return ret;
+}
+
+static int _FWFreeToGo(
+	IN		PADAPTER		Adapter
+	)
+{
+	u32			counter = 0;
+	u32			value32;
+	u32	restarted = _FALSE;
+	
+	// polling CheckSum report
+	do{
+		value32 = rtw_read32(Adapter, REG_MCUFWDL);
+	}while((counter ++ < POLLING_READY_TIMEOUT_COUNT) && (!(value32 & FWDL_ChkSum_rpt)));	
+
+	if(counter >= POLLING_READY_TIMEOUT_COUNT){	
+		DBG_8192C("chksum report faill ! REG_MCUFWDL:0x%08x\n",value32);
+		return _FAIL;
+	} else {
+		//DBG_8192C("chksum report success ! REG_MCUFWDL:0x%08x, counter:%u\n",value32, counter);
+	}
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n",value32));
+
+
+	value32 = rtw_read32(Adapter, REG_MCUFWDL);
+	value32 |= MCUFWDL_RDY;
+	value32 &= ~WINTINI_RDY;
+	rtw_write32(Adapter, REG_MCUFWDL, value32);
+	
+
+POLLING_FW_READY:	
+	// polling for FW ready
+	counter = 0;
+	do
+	{
+		if(rtw_read32(Adapter, REG_MCUFWDL) & WINTINI_RDY){
+			//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Polling FW ready success!! REG_MCUFWDL:0x%08x .\n",PlatformIORead4Byte(Adapter, REG_MCUFWDL)) );
+			return _SUCCESS;
+		}
+		rtw_udelay_os(5);
+	}while(counter++ < POLLING_READY_TIMEOUT_COUNT);
+
+	DBG_8192C("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", rtw_read32(Adapter, REG_MCUFWDL));
+
+	if(restarted == _FALSE) {
+		u8 tmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+		DBG_8192C("Reset 51 write8 REG_SYS_FUNC_EN:0x%04x\n", tmp & ~BIT2);
+		rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp & ~BIT2);
+		DBG_8192C("Reset 51 write8 REG_SYS_FUNC_EN:0x%04x\n", tmp|BIT2);
+		rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp|BIT2);
+		restarted = _TRUE;
+		goto POLLING_FW_READY;
+	}
+		
+	
+	return _FAIL;
+	
+}
+
+
+VOID
+rtl8192c_FirmwareSelfReset(
+	IN		PADAPTER		Adapter
+)
+{
+	u8	u1bTmp;
+	u8	Delay = 100;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+		
+	if((pHalData->FirmwareVersion > 0x21) ||
+		(pHalData->FirmwareVersion == 0x21 &&
+		pHalData->FirmwareSubVersion >= 0x01)) // after 88C Fw v33.1
+	{
+		//0x1cf=0x20. Inform 8051 to reset. 2009.12.25. tynli_test
+		rtw_write8(Adapter, REG_HMETFR+3, 0x20);
+	
+		u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+		while(u1bTmp&BIT2)
+		{
+			Delay--;
+			if(Delay == 0)
+				break;
+			rtw_udelay_os(50);
+			u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+		}
+
+		if((u1bTmp&BIT2) && (Delay == 0))
+		{
+			DBG_8192C("FirmwareDownload92C():fw reset by itself Fail!!!!!! 0x03 = %x\n", u1bTmp);
+			//RT_ASSERT(FALSE, ("PowerOffAdapter8192CE(): 0x03 = %x\n", u1bTmp));
+			#ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+			{
+				u8 val;
+				if( (val=rtw_read8(Adapter, REG_MCUFWDL)))
+					DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val);
+			}
+			#endif
+			rtw_write8(Adapter,REG_SYS_FUNC_EN+1,(rtw_read8(Adapter, REG_SYS_FUNC_EN+1)&~BIT2));
+		}
+
+		DBG_8192C("%s =====> 8051 reset success (%d) .\n", __FUNCTION__ ,Delay);
+	}
+}
+
+#ifdef CONFIG_FILE_FWIMG
+extern char *rtw_fw_file_path;
+u8	FwBuffer8192C[FW_8192C_SIZE];
+#endif //CONFIG_FILE_FWIMG
+//
+//	Description:
+//		Download 8192C firmware code.
+//
+//
+int FirmwareDownload92C(
+	IN	PADAPTER			Adapter,
+	IN	BOOLEAN			bUsedWoWLANFw
+)
+{	
+	int	rtStatus = _SUCCESS;	
+	u8 writeFW_retry = 0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	s8 			R92CFwImageFileName_TSMC[] ={RTL8192C_FW_TSMC_IMG};
+	s8 			R92CFwImageFileName_UMC[] ={RTL8192C_FW_UMC_IMG};
+	s8 			R92CFwImageFileName_UMC_B[] ={RTL8192C_FW_UMC_B_IMG};
+#ifdef CONFIG_WOWLAN
+	s8 			R92CFwImageFileName_TSMC_WW[] ={RTL8192C_FW_TSMC_WW_IMG};
+	s8 			R92CFwImageFileName_UMC_WW[] ={RTL8192C_FW_UMC_WW_IMG};
+	s8 			R92CFwImageFileName_UMC_B_WW[] ={RTL8192C_FW_UMC_B_WW_IMG};
+#endif //CONFIG_WOWLAN
+	
+	//s8 			R8723FwImageFileName_UMC[] ={RTL8723_FW_UMC_IMG};
+	u8*			FwImage = NULL;
+	u32			FwImageLen = 0;
+	char*		pFwImageFileName;	
+#ifdef CONFIG_WOWLAN
+	u8*			FwImageWoWLAN;
+	u32			FwImageWoWLANLen;
+	char*		pFwImageFileName_WoWLAN;
+#endif	//CONFIG_WOWLAN
+	u8*			pucMappedFile = NULL;
+	//vivi, merge 92c and 92s into one driver, 20090817
+	//vivi modify this temply, consider it later!!!!!!!!
+	//PRT_FIRMWARE	pFirmware = GET_FIRMWARE_819X(Adapter);	
+	//PRT_FIRMWARE_92C	pFirmware = GET_FIRMWARE_8192C(Adapter);
+	PRT_FIRMWARE_92C	pFirmware = NULL;
+	PRT_8192C_FIRMWARE_HDR		pFwHdr = NULL;
+	u8		*pFirmwareBuf;
+	u32		FirmwareLen;
+
+	pFirmware = (PRT_FIRMWARE_92C)rtw_zvmalloc(sizeof(RT_FIRMWARE_92C));
+	
+	if(!pFirmware)
+	{
+		rtStatus = _FAIL;
+		goto Exit;
+	}
+
+	if(IS_VENDOR_UMC_A_CUT(pHalData->VersionID) && !IS_92C_SERIAL(pHalData->VersionID))
+	{
+		pFwImageFileName = R92CFwImageFileName_UMC;
+		FwImage = Rtl819XFwUMCACutImageArray;
+		FwImageLen = UMCACutImgArrayLength;
+#ifdef CONFIG_WOWLAN
+		pFwImageFileName_WoWLAN = R92CFwImageFileName_UMC_WW;
+		FwImageWoWLAN= Rtl8192C_FwUMCWWImageArray;
+		FwImageWoWLANLen =UMCACutWWImgArrayLength ;
+#endif	//CONFIG_WOWLAN		
+		DBG_8192C(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_UMC\n");
+	}
+	else if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
+	{
+		// The ROM code of UMC B-cut Fw is the same as TSMC. by tynli. 2011.01.14.
+		pFwImageFileName = R92CFwImageFileName_UMC_B;
+		FwImage = Rtl819XFwUMCBCutImageArray;
+		FwImageLen = UMCBCutImgArrayLength;
+#ifdef CONFIG_WOWLAN
+		pFwImageFileName_WoWLAN = R92CFwImageFileName_UMC_B_WW;
+		FwImageWoWLAN= Rtl8192C_FwUMCBCutWWImageArray;
+		FwImageWoWLANLen =UMCBCutWWImgArrayLength ;
+#endif //CONFIG_WOWLAN
+		
+		DBG_8192C(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_UMC_B\n");
+	}
+	else
+	{
+		pFwImageFileName = R92CFwImageFileName_TSMC;
+		FwImage = Rtl819XFwTSMCImageArray;
+		FwImageLen = TSMCImgArrayLength;
+#ifdef CONFIG_WOWLAN
+		pFwImageFileName_WoWLAN = R92CFwImageFileName_TSMC_WW;
+		FwImageWoWLAN= Rtl8192C_FwTSMCWWImageArray;
+		FwImageWoWLANLen =TSMCWWImgArrayLength ;
+#endif //CONFIG_WOWLAN
+		DBG_8192C(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_TSMC\n");
+	}
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> FirmwareDownload91C() fw:%s\n", pFwImageFileName));
+
+	#ifdef CONFIG_FILE_FWIMG
+	if(rtw_is_file_readable(rtw_fw_file_path) == _TRUE)
+	{
+		DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path);
+		pFirmware->eFWSource = FW_SOURCE_IMG_FILE; // We should decided by Reg.
+	}
+	else
+	#endif //CONFIG_FILE_FWIMG
+	{
+		DBG_871X("%s accquire FW from embedded image\n", __FUNCTION__);
+		pFirmware->eFWSource = FW_SOURCE_HEADER_FILE;
+	}
+
+
+	switch(pFirmware->eFWSource)
+	{
+		case FW_SOURCE_IMG_FILE:
+			
+			#ifdef CONFIG_FILE_FWIMG
+			rtStatus = rtw_retrive_from_file(rtw_fw_file_path, FwBuffer8192C, FW_8192C_SIZE);
+			pFirmware->ulFwLength = rtStatus>=0?rtStatus:0;
+			pFirmware->szFwBuffer = FwBuffer8192C;
+			#endif //CONFIG_FILE_FWIMG
+
+			if(pFirmware->ulFwLength <= 0)
+			{
+				rtStatus = _FAIL;
+				goto Exit;
+			}
+			break;
+		case FW_SOURCE_HEADER_FILE:
+			if(FwImageLen > FW_8192C_SIZE){
+				rtStatus = _FAIL;
+				//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Firmware size exceed 0x%X. Check it.\n", FW_8192C_SIZE) );
+				DBG_871X("Firmware size exceed 0x%X. Check it.\n", FW_8192C_SIZE);
+				goto Exit;
+			}
+
+			pFirmware->szFwBuffer = FwImage;
+			pFirmware->ulFwLength = FwImageLen;
+#ifdef CONFIG_WOWLAN
+			{
+				pFirmware->szWoWLANFwBuffer=FwImageWoWLAN;
+				pFirmware->ulWoWLANFwLength = FwImageWoWLANLen;
+			}
+#endif //CONFIG_WOWLAN
+			
+			break;
+	}
+
+#ifdef CONFIG_WOWLAN	
+	if(bUsedWoWLANFw)	{		
+		pFirmwareBuf = pFirmware->szWoWLANFwBuffer;		
+		FirmwareLen = pFirmware->ulWoWLANFwLength;		
+		pFwHdr = (PRT_8192C_FIRMWARE_HDR)pFirmware->szWoWLANFwBuffer;	
+	}	
+	else
+#endif	//CONFIG_WOWLAN
+	{	
+	#ifdef DBG_FW_STORE_FILE_PATH //used to store firmware to file...
+	if(pFirmware->ulFwLength > 0)
+	{
+		rtw_store_to_file(DBG_FW_STORE_FILE_PATH, pFirmware->szFwBuffer, pFirmware->ulFwLength);
+	}
+	#endif
+
+	pFirmwareBuf = pFirmware->szFwBuffer;
+	FirmwareLen = pFirmware->ulFwLength;
+
+	// To Check Fw header. Added by tynli. 2009.12.04.
+	pFwHdr = (PRT_8192C_FIRMWARE_HDR)pFirmware->szFwBuffer;
+	}
+	pHalData->FirmwareVersion =  le16_to_cpu(pFwHdr->Version); 
+	pHalData->FirmwareSubVersion = le16_to_cpu(pFwHdr->Subversion); 
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" FirmwareVersion(%#x), Signature(%#x)\n", 
+	//	Adapter->MgntInfo.FirmwareVersion, pFwHdr->Signature));
+
+	DBG_8192C("fw_ver=v%d, fw_subver=%d, sig=0x%x\n", 
+		pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, le16_to_cpu(pFwHdr->Signature)&0xFFF0);
+
+	if(IS_FW_HEADER_EXIST(pFwHdr))
+	{
+		//RT_TRACE(COMP_INIT, DBG_LOUD,("Shift 32 bytes for FW header!!\n"));
+		pFirmwareBuf = pFirmwareBuf + 32;
+		FirmwareLen = FirmwareLen -32;
+	}
+		
+	// Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself,
+	// or it will cause download Fw fail. 2010.02.01. by tynli.
+	if(rtw_read8(Adapter, REG_MCUFWDL)&BIT7) //8051 RAM code
+	{	
+		rtl8192c_FirmwareSelfReset(Adapter);
+		rtw_write8(Adapter, REG_MCUFWDL, 0x00);		
+	}
+
+		
+	_FWDownloadEnable(Adapter, _TRUE);
+	while(1) {
+		u8 tmp8;
+		tmp8 = rtw_read8(Adapter, REG_MCUFWDL);
+		
+		//reset the FWDL chksum
+		rtw_write8(Adapter, REG_MCUFWDL, tmp8|FWDL_ChkSum_rpt);
+		
+		//tmp8 = rtw_read8(Adapter, REG_MCUFWDL);
+		//DBG_8192C("Before _WriteFW, REG_MCUFWDL:0x%02x, writeFW_retry:%u\n", tmp8, writeFW_retry);
+		
+		rtStatus = _WriteFW(Adapter, pFirmwareBuf, FirmwareLen);
+		
+		//tmp8 = rtw_read8(Adapter, REG_MCUFWDL);
+		//DBG_8192C("After _WriteFW, REG_MCUFWDL:0x%02x, rtStatus:%d\n", tmp8, rtStatus);
+
+		if(rtStatus == _SUCCESS || ++writeFW_retry>3)
+			break;
+	} 
+	_FWDownloadEnable(Adapter, _FALSE);
+
+	if(_SUCCESS != rtStatus){
+		DBG_8192C("DL Firmware failed!\n");
+		goto Exit;
+	}
+
+	rtStatus = _FWFreeToGo(Adapter);
+	if(_SUCCESS != rtStatus){
+		DBG_8192C("DL Firmware failed!\n");
+		goto Exit;
+	}	
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" Firmware is ready to run!\n"));
+
+Exit:
+
+	if(pFirmware) {
+		rtw_vmfree((u8*)pFirmware, sizeof(RT_FIRMWARE_92C));
+	}
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" <=== FirmwareDownload91C()\n"));
+	return rtStatus;
+
+}
+
+VOID
+InitializeFirmwareVars92C(
+	IN	PADAPTER		Adapter
+)
+{
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(Adapter);
+
+	// Init Fw LPS related.
+	Adapter->pwrctrlpriv.bFwCurrentInPSMode = _FALSE;
+
+	//Init H2C counter. by tynli. 2009.12.09.
+	pHalData->LastHMEBoxNum = 0;
+}
+
+#ifdef CONFIG_WOWLAN
+//===========================================
+
+//
+// Description: Prepare some information to Fw for WoWLAN.
+//			(1) Download wowlan Fw.
+//			(2) Download RSVD page packets.
+//			(3) Enable AP offload if needed.
+//
+// 2011.04.12 by tynli.
+//
+VOID
+SetFwRelatedForWoWLAN8192CU(
+	IN	PADAPTER			padapter,
+	IN	u8			bHostIsGoingtoSleep
+)
+{	
+	int	status=_FAIL;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	u8	 bRecover = _FALSE;
+	
+	if(bHostIsGoingtoSleep)
+	{
+		//
+		// 1. Before WoWLAN we need to re-download WoWLAN Fw.
+		//
+		status = FirmwareDownload92C(padapter, bHostIsGoingtoSleep);
+		if(status != _SUCCESS)
+		{
+			DBG_8192C("ConfigFwRelatedForWoWLAN8192CU(): Re-Download Firmware failed!!\n");
+			return;
+		}
+		else
+		{
+			DBG_8192C("ConfigFwRelatedForWoWLAN8192CU(): Re-Download Firmware Success !!\n");
+		}
+
+		//
+		// 2. Re-Init the variables about Fw related setting.
+		//
+		InitializeFirmwareVars92C(padapter);
+
+		
+	}
+}
+#endif // CONFIG_WOWLAN
+
+#ifdef CONFIG_BT_COEXIST
+static void _update_bt_param(_adapter *padapter)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+	struct registry_priv	*registry_par = &padapter->registrypriv;
+
+	if(2 != registry_par->bt_iso)
+		pbtpriv->BT_Ant_isolation = registry_par->bt_iso;// 0:Low, 1:High, 2:From Efuse
+
+	if(registry_par->bt_sco == 1) // 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter, 4.Busy, 5.OtherBusy
+		pbtpriv->BT_Service = BT_OtherAction;
+	else if(registry_par->bt_sco==2)
+		pbtpriv->BT_Service = BT_SCO;
+	else if(registry_par->bt_sco==4)
+		pbtpriv->BT_Service = BT_Busy;
+	else if(registry_par->bt_sco==5)
+		pbtpriv->BT_Service = BT_OtherBusy;		
+	else
+		pbtpriv->BT_Service = BT_Idle;
+
+	pbtpriv->BT_Ampdu = registry_par->bt_ampdu;
+	pbtpriv->bCOBT = _TRUE;
+#if 1
+	DBG_8192C("BT Coexistance = %s\n", (pbtpriv->BT_Coexist==_TRUE)?"enable":"disable");
+	if(pbtpriv->BT_Coexist)
+	{
+		if(pbtpriv->BT_Ant_Num == Ant_x2)
+		{
+			DBG_8192C("BlueTooth BT_Ant_Num = Antx2\n");
+		}
+		else if(pbtpriv->BT_Ant_Num == Ant_x1)
+		{
+			DBG_8192C("BlueTooth BT_Ant_Num = Antx1\n");
+		}
+		switch(pbtpriv->BT_CoexistType)
+		{
+			case BT_2Wire:
+				DBG_8192C("BlueTooth BT_CoexistType = BT_2Wire\n");
+				break;
+			case BT_ISSC_3Wire:
+				DBG_8192C("BlueTooth BT_CoexistType = BT_ISSC_3Wire\n");
+				break;
+			case BT_Accel:
+				DBG_8192C("BlueTooth BT_CoexistType = BT_Accel\n");
+				break;
+			case BT_CSR_BC4:
+				DBG_8192C("BlueTooth BT_CoexistType = BT_CSR_BC4\n");
+				break;
+			case BT_RTL8756:
+				DBG_8192C("BlueTooth BT_CoexistType = BT_RTL8756\n");
+				break;
+			default:
+				DBG_8192C("BlueTooth BT_CoexistType = Unknown\n");
+				break;
+		}
+		DBG_8192C("BlueTooth BT_Ant_isolation = %d\n", pbtpriv->BT_Ant_isolation);
+
+
+		switch(pbtpriv->BT_Service)
+		{
+			case BT_OtherAction:
+				DBG_8192C("BlueTooth BT_Service = BT_OtherAction\n");
+				break;
+			case BT_SCO:
+				DBG_8192C("BlueTooth BT_Service = BT_SCO\n");
+				break;
+			case BT_Busy:
+				DBG_8192C("BlueTooth BT_Service = BT_Busy\n");
+				break;
+			case BT_OtherBusy:
+				DBG_8192C("BlueTooth BT_Service = BT_OtherBusy\n");
+				break;			
+			default:
+				DBG_8192C("BlueTooth BT_Service = BT_Idle\n");
+				break;
+		}
+
+		DBG_8192C("BT_RadioSharedType = 0x%x\n", pbtpriv->BT_RadioSharedType);
+	}
+#endif
+
+}
+
+
+#define GET_BT_COEXIST(priv) (&priv->bt_coexist)
+
+void rtl8192c_ReadBluetoothCoexistInfo(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+	u8	rf_opt4;
+
+	if(AutoloadFail){
+		pbtpriv->BT_Coexist = _FALSE;
+		pbtpriv->BT_CoexistType= BT_2Wire;
+		pbtpriv->BT_Ant_Num = Ant_x2;
+		pbtpriv->BT_Ant_isolation= 0;
+		pbtpriv->BT_RadioSharedType = BT_Radio_Shared;		
+		return;
+	}
+
+	pbtpriv->BT_Coexist = (((PROMContent[EEPROM_RF_OPT1]&BOARD_TYPE_NORMAL_MASK)>>5) == BOARD_USB_COMBO)?_TRUE:_FALSE;	// bit [7:5]
+	rf_opt4 = PROMContent[EEPROM_RF_OPT4];
+	pbtpriv->BT_CoexistType 		= ((rf_opt4&0xe)>>1);			// bit [3:1]
+	pbtpriv->BT_Ant_Num 		= (rf_opt4&0x1);				// bit [0]
+	pbtpriv->BT_Ant_isolation 	= ((rf_opt4&0x10)>>4);			// bit [4]
+	pbtpriv->BT_RadioSharedType 	= ((rf_opt4&0x20)>>5);			// bit [5]
+
+	_update_bt_param(Adapter);
+
+}
+#endif
+
+VERSION_8192C
+rtl8192c_ReadChipVersion(
+	IN	PADAPTER	Adapter
+	)
+{
+	u32			value32;
+	//VERSION_8192C	version;
+	u32			ChipVersion=0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	value32 = rtw_read32(Adapter, REG_SYS_CFG);
+
+	if (value32 & TRP_VAUX_EN)
+	{
+#if 0
+		// Test chip.
+		if(IS_HARDWARE_TYPE_8723A(Adapter)) {
+			ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
+			ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function.			
+		}
+		else	 {
+		version = (value32 & TYPE_ID) ?VERSION_TEST_CHIP_92C :VERSION_TEST_CHIP_88C;		
+	}
+#else
+		// tynli_test. 2011.01.10.
+		if(IS_HARDWARE_TYPE_8192C(Adapter))
+		{
+			ChipVersion = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C : VERSION_TEST_CHIP_88C;						
+		}
+		else
+		{
+			ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
+			ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function.			
+		}
+#endif
+	}
+	else
+	{
+#if 0
+		// Normal mass production chip.
+		ChipVersion = NORMAL_CHIP;
+#if !RTL8723_FPGA_TRUE_PHY_VERIFICATION
+		ChipVersion |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
+#endif
+		ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
+		ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function.
+		if(IS_8723_SERIES(ChipVersion))
+		{
+			if(IS_VENDOR_UMC(ChipVersion))
+				ChipVersion |= ((value32 & CHIP_VER_RTL_MASK) ? CHIP_VENDOR_UMC_B_CUT : 0);
+		}
+		else
+		{
+			// Mark out by tynli. UMC B-cut IC will not set the SYS_CFG[19] to UMC
+			// because we do not want the custmor to know. 2011.01.11.
+			//if(IS_VENDOR_UMC(ChipVersion))
+			{
+				// To check the value of B-cut. by tynli. 2011.01.11.
+				u1bTmp = (u1Byte)((value32 & CHIP_VER_RTL_MASK)>>12);
+				if(u1bTmp == 1)
+				{	// B-cut
+					ChipVersion |= CHIP_VENDOR_UMC_B_CUT;
+				}
+			}
+		}
+#else
+		// Normal mass production chip.
+		ChipVersion = NORMAL_CHIP;
+//#if !RTL8723_FPGA_TRUE_PHY_VERIFICATION
+		ChipVersion |= ((value32 & TYPE_ID) ? RF_TYPE_2T2R : 0); //92c
+//#endif
+		ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
+		ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function.
+		if(IS_HARDWARE_TYPE_8192C(Adapter))
+		{
+			// 88/92C UMC B-cut IC will not set the SYS_CFG[19] to UMC
+			// because we do not want the custmor to know. by tynli. 2011.01.17.
+			//MSG_8192C("mask result = 0x%x is_UMC %d chipversion 0x%x\n", (value32 & CHIP_VER_RTL_MASK), IS_CHIP_VENDOR_UMC(ChipVersion), ChipVersion);
+			if((!IS_CHIP_VENDOR_UMC(ChipVersion) )&& (value32 & CHIP_VER_RTL_MASK))
+			{
+				//MSG_8192C("chip mask result = 0x%x\n", ((value32 & CHIP_VER_RTL_MASK) | CHIP_VENDOR_UMC));
+				ChipVersion |= ((value32 & CHIP_VER_RTL_MASK) | CHIP_VENDOR_UMC); // IC version (CUT)
+				//MSG_8192C("chip version = 0x%x\n", ChipVersion);
+			}
+		}
+		else
+		{
+			if(IS_CHIP_VENDOR_UMC(ChipVersion))
+				ChipVersion |= ((value32 & CHIP_VER_RTL_MASK)); // IC version (CUT)
+		}
+
+		if(IS_92C_SERIAL(ChipVersion))
+		{
+			value32 = rtw_read32(Adapter, REG_HPON_FSM);
+			ChipVersion |= ((CHIP_BONDING_IDENTIFIER(value32) == CHIP_BONDING_92C_1T2R) ? RF_TYPE_1T2R : 0);			
+		}
+		else if(IS_8723_SERIES(ChipVersion))
+		{
+			//RT_ASSERT(IS_HARDWARE_TYPE_8723A(Adapter), ("Incorrect chip version!!\n"));
+			value32 = rtw_read32(Adapter, REG_GPIO_OUTSTS);
+			ChipVersion |= ((value32 & RF_RL_ID)>>20);	 //ROM code version.	
+		}
+#endif
+
+	}
+
+	//version = (VERSION_8192C)ChipVersion;
+
+	// For multi-function consideration. Added by Roger, 2010.10.06.
+	if(IS_8723_SERIES(ChipVersion))
+	{
+		pHalData->MultiFunc = RT_MULTI_FUNC_NONE;
+		value32 = rtw_read32(Adapter, REG_MULTI_FUNC_CTRL);
+		pHalData->MultiFunc =(RT_MULTI_FUNC) (pHalData->MultiFunc| ((value32 & WL_FUNC_EN) ?  RT_MULTI_FUNC_WIFI : 0) );
+		pHalData->MultiFunc =(RT_MULTI_FUNC) (pHalData->MultiFunc| ((value32 & BT_FUNC_EN) ?  RT_MULTI_FUNC_BT : 0) );
+		pHalData->MultiFunc =(RT_MULTI_FUNC) (pHalData->MultiFunc| ((value32 & GPS_FUNC_EN) ?  RT_MULTI_FUNC_GPS : 0) );
+		pHalData->PolarityCtl = ((value32 & WL_HWPDN_SL) ?  RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT);
+		//MSG_8192C("ReadChipVersion(): MultiFunc(%x), PolarityCtl(%x) \n", pHalData->MultiFunc, pHalData->PolarityCtl);
+
+		//For regulator mode. by tynli. 2011.01.14
+		pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
+		//MSG_8192C("ReadChipVersion(): RegulatorMode(%x) \n", pHalData->RegulatorMode);
+	}
+
+//#if DBG
+#if 1
+	switch(ChipVersion)
+	{
+		case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C_1T2R.\n");
+			break;
+		case VERSION_NORMAL_TSMC_CHIP_92C:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C.\n");
+			break;
+		case VERSION_NORMAL_TSMC_CHIP_88C:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_A_CUT.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_88C_A_CUT.\n");
+			break;			
+		case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_B_CUT.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_88C_B_CUT.\n");
+			break;
+		case VERSION_TEST_CHIP_92C:
+			MSG_8192C("Chip Version ID: VERSION_TEST_CHIP_92C.\n");
+			break;
+		case VERSION_TEST_CHIP_88C:
+			MSG_8192C("Chip Version ID: VERSION_TEST_CHIP_88C.\n");
+			break;
+		case VERSION_TEST_UMC_CHIP_8723:
+			MSG_8192C("Chip Version ID: VERSION_TEST_UMC_CHIP_8723.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT.\n");
+			break;			
+		default:
+			MSG_8192C("Chip Version ID: ???????????????.\n");
+			break;
+	}
+#endif
+
+	pHalData->VersionID = ChipVersion;
+
+	if(IS_1T2R(ChipVersion))
+		pHalData->rf_type = RF_1T2R;
+	else if(IS_2T2R(ChipVersion))
+		pHalData->rf_type = RF_2T2R;
+	else if(IS_8723_SERIES(ChipVersion))
+		pHalData->rf_type = RF_1T1R;
+	else
+		pHalData->rf_type = RF_1T1R;
+
+	MSG_8192C("RF_Type is %x!!\n", pHalData->rf_type);
+
+	return ChipVersion;
+}
+
+void
+rtl8192c_EfuseParseChnlPlan(
+	IN	PADAPTER		padapter,
+	IN	u8*			hwinfo,
+	IN	BOOLEAN			AutoLoadFail
+	)
+{
+	padapter->mlmepriv.ChannelPlan = hal_com_get_channel_plan(
+		padapter
+		, hwinfo?hwinfo[EEPROM_CHANNEL_PLAN]:0xFF
+		, padapter->registrypriv.channel_plan
+		, RT_CHANNEL_DOMAIN_WORLD_WIDE_13
+		, AutoLoadFail
+	);
+
+	DBG_871X("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan);
+}
+
+u8 GetEEPROMSize8192C(PADAPTER Adapter)
+{
+	u8	size = 0;
+	u32	curRCR;
+
+	curRCR = rtw_read16(Adapter, REG_9346CR);
+	size = (curRCR & BOOT_FROM_EEPROM) ? 6 : 4; // 6: EEPROM used is 93C46, 4: boot from E-Fuse.
+	
+	MSG_8192C("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46");
+	
+	return size;
+}
+
+void rtl8192c_free_hal_data(_adapter * padapter)
+{
+_func_enter_;
+
+	DBG_8192C("=====> rtl8192c_free_hal_data =====\n");
+
+	if(padapter->HalData)
+		rtw_mfree(padapter->HalData, sizeof(HAL_DATA_TYPE));
+	DBG_8192C("<===== rtl8192c_free_hal_data =====\n");
+
+_func_exit_;
+}
+
+//===========================================================
+//				Efuse related code
+//===========================================================
+enum{
+		VOLTAGE_V25						= 0x03,
+		LDOE25_SHIFT						= 28 ,
+	};
+
+static VOID
+hal_EfusePowerSwitch_RTL8192C(
+	IN	PADAPTER	pAdapter,
+	IN	u8		bWrite,
+	IN	u8		PwrState)
+{
+	u8	tempval;
+	u16	tmpV16;
+
+	if (PwrState == _TRUE)
+	{
+		// 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid
+		tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL);
+		if( ! (tmpV16 & PWC_EV12V ) ){
+			tmpV16 |= PWC_EV12V ;
+			rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16);
+		}
+		// Reset: 0x0000h[28], default valid
+		tmpV16 =  rtw_read16(pAdapter,REG_SYS_FUNC_EN);
+		if( !(tmpV16 & FEN_ELDR) ){
+			tmpV16 |= FEN_ELDR ;
+			rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16);
+		}
+
+		// Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid
+		tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR);
+		if( (!(tmpV16 & LOADER_CLK_EN) )  ||(!(tmpV16 & ANA8M) ) ){
+			tmpV16 |= (LOADER_CLK_EN |ANA8M ) ;
+			rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16);
+		}
+
+		if(bWrite == _TRUE)
+		{
+			// Enable LDO 2.5V before read/write action
+			tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
+			tempval &= 0x0F;
+			tempval |= (VOLTAGE_V25 << 4);
+			rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80));
+		}
+	}
+	else
+	{
+		if(bWrite == _TRUE){
+			// Disable LDO 2.5V after read/write action
+			tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
+			rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F));
+		}
+	}
+}
+
+static VOID
+hal_EfusePowerSwitch_RTL8723(
+	IN	PADAPTER	pAdapter,
+	IN	u8		bWrite,
+	IN	u8		PwrState)
+{
+	u8	tempval;
+	u16	tmpV16;
+
+	if (PwrState == _TRUE)
+	{
+		rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);	
+
+		// 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid
+		tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL);
+		if( ! (tmpV16 & PWC_EV12V ) ){
+			tmpV16 |= PWC_EV12V ;
+			 rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16);
+		}
+		// Reset: 0x0000h[28], default valid
+		tmpV16 =  rtw_read16(pAdapter,REG_SYS_FUNC_EN);
+		if( !(tmpV16 & FEN_ELDR) ){
+			tmpV16 |= FEN_ELDR ;
+			rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16);
+		}
+
+		// Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid
+		tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR);
+		if( (!(tmpV16 & LOADER_CLK_EN) )  ||(!(tmpV16 & ANA8M) ) ){
+			tmpV16 |= (LOADER_CLK_EN |ANA8M ) ;
+			rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16);
+		}
+
+		if(bWrite == _TRUE)
+		{
+			// Enable LDO 2.5V before read/write action
+			tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
+			tempval &= 0x0F;
+			tempval |= (VOLTAGE_V25 << 4);
+			rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80));
+		}
+	}
+	else
+	{
+		rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF);
+
+		if(bWrite == _TRUE){
+			// Disable LDO 2.5V after read/write action
+			tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
+			rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F));
+		}
+	}	
+}
+
+static VOID
+rtl8192c_EfusePowerSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	u8		bWrite,
+	IN	u8		PwrState)
+{
+	if(IS_HARDWARE_TYPE_8192C(pAdapter))
+	{
+		hal_EfusePowerSwitch_RTL8192C(pAdapter, bWrite, PwrState);
+	}
+	else if(IS_HARDWARE_TYPE_8723A(pAdapter))
+	{
+		hal_EfusePowerSwitch_RTL8723(pAdapter, bWrite, PwrState);
+	}	
+}
+
+static VOID
+ReadEFuse_RTL8192C(
+	PADAPTER	Adapter,
+	u16		 _offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN	BOOLEAN		bPseudoTest
+	)
+{
+	u8	efuseTbl[EFUSE_MAP_LEN];
+	u8	rtemp8[1];
+	u16 	eFuse_Addr = 0;
+	u8  	offset, wren;
+	u16	i, j;
+	u16	eFuseWord[EFUSE_MAX_SECTION][EFUSE_MAX_WORD_UNIT];
+	u16	efuse_utilized = 0;
+	u8	efuse_usage = 0;
+
+	//
+	// Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10.
+	//
+	if((_offset + _size_byte)>EFUSE_MAP_LEN)
+	{// total E-Fuse table is 128bytes
+		//DBG_8192C("ReadEFuse_RTL8192C(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte);
+		return;
+	}
+
+	// 0. Refresh efuse init map as all oxFF.
+	for (i = 0; i < EFUSE_MAX_SECTION; i++)
+		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
+			eFuseWord[i][j] = 0xFFFF;
+
+
+	//
+	// 1. Read the first byte to check if efuse is empty!!!
+	// 
+	//
+	ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);	
+	if(*rtemp8 != 0xFF)
+	{
+		efuse_utilized++;
+		//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr));
+		eFuse_Addr++;
+	}
+
+	//
+	// 2. Read real efuse content. Filter PG header and every section data.
+	//
+	while((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN))
+	{
+		// Check PG header for section num.
+		offset = ((*rtemp8 >> 4) & 0x0f);
+
+		if(offset < EFUSE_MAX_SECTION)
+		{
+			// Get word enable value from PG header
+			wren = (*rtemp8 & 0x0f);
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren));
+
+			for(i=0; i<EFUSE_MAX_WORD_UNIT; i++)
+			{
+				// Check word enable condition in the section				
+				if(!(wren & 0x01))
+				{
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr));
+					ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);	eFuse_Addr++;
+					efuse_utilized++;
+					eFuseWord[offset][i] = (*rtemp8 & 0xff);
+					
+
+					if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN) 
+						break;
+
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr));
+					ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);	eFuse_Addr++;
+					efuse_utilized++;
+					eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00);
+
+					if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN) 
+						break;
+				}
+				
+				wren >>= 1;
+				
+			}
+		}
+
+		//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr));
+		// Read next PG header
+		ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);	
+		if(*rtemp8 != 0xFF && (eFuse_Addr < 512))
+		{
+			efuse_utilized++;
+			eFuse_Addr++;
+		}
+	}
+
+	//
+	// 3. Collect 16 sections and 4 word unit into Efuse map.
+	//
+	for(i=0; i<EFUSE_MAX_SECTION; i++)
+	{
+		for(j=0; j<EFUSE_MAX_WORD_UNIT; j++)
+		{
+			efuseTbl[(i*8)+(j*2)]=(eFuseWord[i][j] & 0xff);
+			efuseTbl[(i*8)+((j*2)+1)]=((eFuseWord[i][j] >> 8) & 0xff);
+		}
+	}
+
+	//
+	// 4. Copy from Efuse map to output pointer memory!!!
+	//
+	for(i=0; i<_size_byte; i++)
+	{		
+		pbuf[i] = efuseTbl[_offset+i];
+	}
+
+	//
+	// 5. Calculate Efuse utilization.
+	//
+	efuse_usage = (u8)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN);
+	rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized);
+	//rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_USAGE, (pu1Byte)&efuse_usage);
+}
+
+static VOID
+ReadEFuse_RTL8723(
+	PADAPTER	Adapter,
+	u16		 _offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN	BOOLEAN		bPseudoTest
+	)
+{
+	u8	efuseTbl[EFUSE_MAP_LEN_8723];
+	u16	eFuse_Addr = 0;
+	u8	offset = 0, wden = 0;
+	u16	i, j;
+	u16	eFuseWord[EFUSE_MAX_SECTION_8723][EFUSE_MAX_WORD_UNIT];
+	u16	efuse_utilized = 0;
+	u8	efuse_usage = 0;
+	u8	offset_2_0=0;
+	u8	efuseHeader=0, efuseExtHdr=0, efuseData=0;
+	//
+	// Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10.
+	//
+	if((_offset + _size_byte)>EFUSE_MAP_LEN_8723)
+	{
+		//RT_TRACE(COMP_EFUSE, DBG_LOUD, ("ReadEFuse_RTL8723(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte));
+		return;
+	}
+
+	// 0. Refresh efuse init map as all oxFF.
+	for (i = 0; i < EFUSE_MAX_SECTION_8723; i++)
+		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
+			eFuseWord[i][j] = 0xFFFF;
+
+	//
+	// 1. Read the first byte to check if efuse is empty!!!
+	// 
+	//
+	ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+	
+	if(efuseHeader != 0xFF)
+	{
+		efuse_utilized++;
+	}
+	else
+	{
+		//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("EFUSE is empty\n"));
+		return;
+	}
+
+
+	//
+	// 2. Read real efuse content. Filter PG header and every section data.
+	//
+	while((efuseHeader != 0xFF) && AVAILABLE_EFUSE_ADDR(eFuse_Addr))
+	{
+		//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=%x\n", eFuse_Addr-1, efuseHeader));
+	
+		// Check PG header for section num.
+		if(EXT_HEADER(efuseHeader))		//extended header
+		{
+			offset_2_0 = GET_HDR_OFFSET_2_0(efuseHeader);
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header offset_2_0=%x\n", offset_2_0));
+
+			ReadEFuseByte(Adapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest);
+
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=%x\n", eFuse_Addr-1, efuseExtHdr));
+
+			if(efuseExtHdr != 0xff)
+			{
+				efuse_utilized++;
+				if(ALL_WORDS_DISABLED(efuseExtHdr))
+				{
+					ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+					if(efuseHeader != 0xff)
+					{
+						efuse_utilized++;
+					}
+					continue;
+				}
+				else
+				{
+					offset = ((efuseExtHdr & 0xF0) >> 1) | offset_2_0;
+					wden = (efuseExtHdr & 0x0F);
+				}
+			}
+			else
+			{
+				//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Error condition, extended = 0xff\n"));
+				// We should handle this condition.
+			}
+		}
+		else
+		{
+			offset = ((efuseHeader >> 4) & 0x0f);
+			wden = (efuseHeader & 0x0f);
+		}
+
+		if(offset < EFUSE_MAX_SECTION_8723)
+		{
+			// Get word enable value from PG header
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wden));
+
+			for(i=0; i<EFUSE_MAX_WORD_UNIT; i++)
+			{
+				// Check word enable condition in the section				
+				if(!(wden & (0x01<<i)))
+				{
+					ReadEFuseByte(Adapter, eFuse_Addr++, &efuseData, bPseudoTest);
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=%x\n", eFuse_Addr-1, efuseData));
+					efuse_utilized++;
+					eFuseWord[offset][i] = (efuseData & 0xff);
+
+					if(!AVAILABLE_EFUSE_ADDR(eFuse_Addr))
+						break;
+
+					ReadEFuseByte(Adapter, eFuse_Addr++, &efuseData, bPseudoTest);
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=%x\n", eFuse_Addr-1, efuseData));
+					efuse_utilized++;
+					eFuseWord[offset][i] |= (((u16)efuseData << 8) & 0xff00);
+
+					if(!AVAILABLE_EFUSE_ADDR(eFuse_Addr)) 
+						break;
+				}
+			}
+		}
+
+		// Read next PG header
+		ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+
+		if(efuseHeader != 0xFF)
+		{
+			efuse_utilized++;
+		}
+	}
+
+	//
+	// 3. Collect 16 sections and 4 word unit into Efuse map.
+	//
+	for(i=0; i<EFUSE_MAX_SECTION_8723; i++)
+	{
+		for(j=0; j<EFUSE_MAX_WORD_UNIT; j++)
+		{
+			efuseTbl[(i*8)+(j*2)]=(eFuseWord[i][j] & 0xff);
+			efuseTbl[(i*8)+((j*2)+1)]=((eFuseWord[i][j] >> 8) & 0xff);
+		}
+	}
+
+	//
+	// 4. Copy from Efuse map to output pointer memory!!!
+	//
+	for(i=0; i<_size_byte; i++)
+	{		
+		pbuf[i] = efuseTbl[_offset+i];
+	}
+
+	//
+	// 5. Calculate Efuse utilization.
+	//
+	efuse_usage = (u8)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN);
+	rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized);
+	//rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_USAGE, (pu1Byte)&efuse_usage);
+}
+
+static BOOLEAN
+Hal_EfuseSwitchToBank(
+	IN		PADAPTER	pAdapter,
+	IN		u8			bank,
+	IN		BOOLEAN		bPseudoTest
+	)
+{
+	BOOLEAN		bRet = _FALSE;
+	u32		value32=0;
+
+	//RTPRINT(FEEPROM, EFUSE_PG, ("Efuse switch bank to %d\n", bank));
+	if(bPseudoTest)
+	{
+		fakeEfuseBank = bank;
+		bRet = _TRUE;
+	}
+	else
+	{
+		if(IS_HARDWARE_TYPE_8723A(pAdapter) && 
+			INCLUDE_MULTI_FUNC_BT(pAdapter))
+		{		
+			value32 = rtw_read32(pAdapter, EFUSE_TEST);
+			bRet = _TRUE;
+			switch(bank)
+			{
+			case 0:
+				value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
+				break;
+			case 1:
+				value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0);
+				break;
+			case 2:
+				value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1);
+				break;
+			case 3:
+				value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2);
+				break;
+			default:
+				value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
+				bRet = _FALSE;
+				break;
+			}
+			rtw_write32(pAdapter, EFUSE_TEST, value32);
+		}
+		else
+			bRet = _TRUE;
+	}
+	return bRet;
+}
+
+static VOID
+ReadEFuse_BT(
+	PADAPTER	Adapter,
+	u16		 _offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN	BOOLEAN	bPseudoTest
+	)
+{
+	u8  	*efuseTbl;
+	u16 	eFuse_Addr = 0;
+	u8  	offset = 0, wden = 0;
+	u16	i, j;
+	u16 	**eFuseWord;
+	u16	efuse_utilized = 0;
+	u8	efuse_usage = 0;
+	u8	offset_2_0=0;
+	u8	efuseHeader=0, efuseExtHdr=0, efuseData=0;
+	u8	bank=0;
+	BOOLEAN	bCheckNextBank=_FALSE;
+
+	efuseTbl = rtw_malloc(EFUSE_BT_MAP_LEN);
+	if(efuseTbl == NULL){
+		DBG_8192C("efuseTbl malloc fail !\n");
+		return;
+	}
+
+	eFuseWord = (u16 **)rtw_zmalloc(sizeof(u16 *)*EFUSE_BT_MAX_SECTION);
+	if(eFuseWord == NULL){
+		DBG_8192C("eFuseWord malloc fail !\n");
+		return;
+	}
+	else{
+		for(i=0;i<EFUSE_BT_MAX_SECTION;i++){
+			eFuseWord[i]= (u16 *)rtw_zmalloc(sizeof(u16)*EFUSE_MAX_WORD_UNIT);
+			if(eFuseWord[i]==NULL){
+				DBG_8192C("eFuseWord[] malloc fail !\n");
+				return;
+			}
+		}
+	}
+
+	//
+	// Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10.
+	//
+	if((_offset + _size_byte)>EFUSE_BT_MAP_LEN)
+	{
+		//RT_TRACE(COMP_EFUSE, DBG_LOUD, ("ReadEFuse_BT(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte));
+		return;
+	}
+
+	// 0. Refresh efuse init map as all oxFF.
+	for (i = 0; i < EFUSE_BT_MAX_SECTION; i++)
+		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
+			eFuseWord[i][j] = 0xFFFF;
+
+	for(bank=1; bank<EFUSE_MAX_BANK; bank++)
+	{
+		if(!Hal_EfuseSwitchToBank(Adapter, bank, bPseudoTest))
+		{
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Hal_EfuseSwitchToBank() Fail!!\n"));
+			return;
+		}
+		eFuse_Addr = 0;
+		//
+		// 1. Read the first byte to check if efuse is empty!!!
+		// 
+		ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+		
+		if(efuseHeader != 0xFF)
+		{
+			efuse_utilized++;
+		}
+		else
+		{
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("EFUSE is empty\n"));
+			return;
+		}
+		//
+		// 2. Read real efuse content. Filter PG header and every section data.
+		//
+		while((efuseHeader != 0xFF) && AVAILABLE_EFUSE_ADDR(eFuse_Addr))
+		{
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=0x%02x (header)\n", (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseHeader));
+		
+			// Check PG header for section num.
+			if(EXT_HEADER(efuseHeader))		//extended header
+			{
+				offset_2_0 = GET_HDR_OFFSET_2_0(efuseHeader);
+				//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header offset_2_0=%x\n", offset_2_0));
+
+				ReadEFuseByte(Adapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest);
+
+				//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=0x%02x (ext header)\n", (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseExtHdr));
+
+				if(efuseExtHdr != 0xff)
+				{
+					efuse_utilized++;
+					if(ALL_WORDS_DISABLED(efuseExtHdr))
+					{
+						ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+						if(efuseHeader != 0xff)
+						{
+							efuse_utilized++;
+						}
+						continue;
+					}
+					else
+					{
+						offset = ((efuseExtHdr & 0xF0) >> 1) | offset_2_0;
+						wden = (efuseExtHdr & 0x0F);
+					}
+				}
+				else
+				{
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Error condition, extended = 0xff\n"));
+					// We should handle this condition.
+				}
+			}
+			else
+			{
+				offset = ((efuseHeader >> 4) & 0x0f);
+				wden = (efuseHeader & 0x0f);
+			}
+
+			if(offset < EFUSE_BT_MAX_SECTION)
+			{
+				// Get word enable value from PG header
+				//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wden));
+
+				for(i=0; i<EFUSE_MAX_WORD_UNIT; i++)
+				{
+					// Check word enable condition in the section				
+					if(!(wden & (0x01<<i)))
+					{
+						ReadEFuseByte(Adapter, eFuse_Addr++, &efuseData, bPseudoTest);
+						//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=0x%02x\n", (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseData));
+						efuse_utilized++;
+						eFuseWord[offset][i] = (efuseData & 0xff);
+
+						if(!AVAILABLE_EFUSE_ADDR(eFuse_Addr))
+							break;
+
+						ReadEFuseByte(Adapter, eFuse_Addr++, &efuseData, bPseudoTest);
+						//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=0x%02x\n", (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseData));
+						efuse_utilized++;
+						eFuseWord[offset][i] |= (((u16)efuseData << 8) & 0xff00);
+
+						if(!AVAILABLE_EFUSE_ADDR(eFuse_Addr)) 
+							break;
+					}
+				}
+			}
+
+			// Read next PG header
+			ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+
+			if(efuseHeader != 0xFF)
+			{
+				efuse_utilized++;
+			}
+			else
+			{
+				if((eFuse_Addr + EFUSE_PROTECT_BYTES_BANK) >= EFUSE_REAL_CONTENT_LEN)
+					bCheckNextBank = _TRUE;
+				else
+					bCheckNextBank = _FALSE;
+			}
+		}
+		if(!bCheckNextBank)
+		{
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Stop to check next bank\n"));
+			break;
+		}
+	}
+
+	// switch bank back to bank 0 for later BT and wifi use.
+	Hal_EfuseSwitchToBank(Adapter, 0, bPseudoTest);
+		
+	//
+	// 3. Collect 16 sections and 4 word unit into Efuse map.
+	//
+	for(i=0; i<EFUSE_BT_MAX_SECTION; i++)
+	{
+		for(j=0; j<EFUSE_MAX_WORD_UNIT; j++)
+		{
+			efuseTbl[(i*8)+(j*2)]=(eFuseWord[i][j] & 0xff);
+			efuseTbl[(i*8)+((j*2)+1)]=((eFuseWord[i][j] >> 8) & 0xff);
+		}
+	}
+
+	//
+	// 4. Copy from Efuse map to output pointer memory!!!
+	//
+	for(i=0; i<_size_byte; i++)
+	{		
+		pbuf[i] = efuseTbl[_offset+i];
+	}
+	
+	//
+	// 5. Calculate Efuse utilization.
+	//
+	efuse_usage = (u8)((efuse_utilized*100)/EFUSE_BT_REAL_CONTENT_LEN);
+	if(bPseudoTest)
+	{
+		fakeBTEfuseUsedBytes =  (EFUSE_REAL_CONTENT_LEN*(bank-1))+eFuse_Addr-1;
+	}
+	else
+	{
+		BTEfuseUsedBytes =  (EFUSE_REAL_CONTENT_LEN*(bank-1))+eFuse_Addr-1;
+	}
+
+	for(i=0;i<EFUSE_BT_MAX_SECTION;i++)
+		rtw_mfree((u8 *)eFuseWord[i], sizeof(u16)*EFUSE_MAX_WORD_UNIT);
+	rtw_mfree((u8 *)eFuseWord, sizeof(u16 *)*EFUSE_BT_MAX_SECTION);
+	rtw_mfree(efuseTbl, EFUSE_BT_MAP_LEN);
+}
+
+
+static VOID
+ReadEFuseByIC(
+	PADAPTER	Adapter,
+	u8		efuseType,
+	u16		 _offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN BOOLEAN	bPseudoTest
+	)
+{
+	if(efuseType == EFUSE_WIFI)
+	{
+		if(IS_HARDWARE_TYPE_8192C(Adapter))
+		{
+			ReadEFuse_RTL8192C(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
+		}
+		else if(IS_HARDWARE_TYPE_8723A(Adapter))
+		{
+			ReadEFuse_RTL8723(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
+		}
+	}
+	else
+		ReadEFuse_BT(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
+}
+
+static VOID
+ReadEFuse_Pseudo(
+	PADAPTER	Adapter,
+	u8		efuseType,
+	u16		 _offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN BOOLEAN	bPseudoTest
+	)
+{
+	if(efuseType == EFUSE_WIFI)
+		ReadEFuse_RTL8723(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
+	else
+		ReadEFuse_BT(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
+}
+
+static VOID
+rtl8192c_ReadEFuse(
+	PADAPTER	Adapter,
+	u8		efuseType,
+	u16		_offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN	BOOLEAN	bPseudoTest
+	)
+{
+	if(bPseudoTest)
+	{
+		ReadEFuse_Pseudo(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
+	}
+	else
+	{
+		ReadEFuseByIC(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
+	}
+}
+
+static VOID
+Hal_EFUSEGetEfuseDefinition(
+	IN		PADAPTER	pAdapter,
+	IN		u8		efuseType,
+	IN		u8		type,
+	OUT		PVOID		*pOut
+	)
+{
+	switch(type)
+	{
+		case TYPE_EFUSE_MAX_SECTION:
+			{
+				u8	*pMax_section;
+				pMax_section = (u8 *)pOut;
+
+				if(efuseType == EFUSE_WIFI)
+				{
+					if(IS_HARDWARE_TYPE_8192C(pAdapter))
+					{
+						*pMax_section = EFUSE_MAX_SECTION;
+					}
+					else if(IS_HARDWARE_TYPE_8723A(pAdapter))
+					{
+						*pMax_section = EFUSE_MAX_SECTION_8723;
+					}
+				}
+				else
+					*pMax_section = EFUSE_BT_MAX_SECTION;
+			}
+			break;
+		case TYPE_EFUSE_REAL_CONTENT_LEN:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = EFUSE_REAL_CONTENT_LEN;
+				else
+					*pu2Tmp = EFUSE_BT_REAL_CONTENT_LEN;
+			}
+			break;
+		case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
+			{
+				u16	*pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES);
+				else
+					*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_PROTECT_BYTES_BANK);
+			}
+			break;
+		case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES);
+				else
+					*pu2Tmp = (u16)(EFUSE_BT_REAL_CONTENT_LEN-(EFUSE_PROTECT_BYTES_BANK*3));
+			}
+			break;
+		case TYPE_EFUSE_MAP_LEN:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+
+				if(efuseType == EFUSE_WIFI)
+				{
+					if(IS_HARDWARE_TYPE_8192C(pAdapter))
+					{
+						*pu2Tmp = (u16)EFUSE_MAP_LEN;
+					}
+					else if(IS_HARDWARE_TYPE_8723A(pAdapter))
+					{
+						*pu2Tmp = (u16)EFUSE_MAP_LEN_8723;
+					}
+				}
+				else
+					*pu2Tmp = (u16)EFUSE_BT_MAP_LEN;
+			}
+			break;
+		case TYPE_EFUSE_PROTECT_BYTES_BANK:
+			{
+				u8 *pu1Tmp;
+				pu1Tmp = (u8 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES);
+				else
+					*pu1Tmp = (u8)(EFUSE_PROTECT_BYTES_BANK);
+			}
+			break;
+		default:
+			{
+				u8 *pu1Tmp;
+				pu1Tmp = (u8 *)pOut;
+				*pu1Tmp = 0;
+			}
+			break;
+	}
+}
+
+static VOID
+Hal_EFUSEGetEfuseDefinition_Pseudo(
+	IN		PADAPTER	pAdapter,
+	IN		u8		efuseType,
+	IN		u8		type,
+	OUT		PVOID		*pOut
+	)
+{
+	switch(type)
+	{
+		case TYPE_EFUSE_MAX_SECTION:
+			{
+				u8	*pMax_section;
+				pMax_section = (u8 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pMax_section = EFUSE_MAX_SECTION_8723;
+				else
+					*pMax_section = EFUSE_BT_MAX_SECTION;
+			}
+			break;
+		case TYPE_EFUSE_REAL_CONTENT_LEN:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = EFUSE_REAL_CONTENT_LEN;
+				else
+					*pu2Tmp = EFUSE_BT_REAL_CONTENT_LEN;
+			}
+			break;
+		case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES);
+				else
+					*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_PROTECT_BYTES_BANK);
+			}
+			break;
+		case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES);
+				else
+					*pu2Tmp = (u16)(EFUSE_BT_REAL_CONTENT_LEN-(EFUSE_PROTECT_BYTES_BANK*3));
+			}
+			break;
+		case TYPE_EFUSE_MAP_LEN:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = (u16)EFUSE_MAP_LEN_8723;
+				else
+					*pu2Tmp = (u16)EFUSE_BT_MAP_LEN;
+			}
+			break;
+		case TYPE_EFUSE_PROTECT_BYTES_BANK:
+			{
+				u8 *pu1Tmp;
+				pu1Tmp = (u8 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES);
+				else
+					*pu1Tmp = (u8)(EFUSE_PROTECT_BYTES_BANK);
+			}
+			break;
+		default:
+			{
+				u8 *pu1Tmp;
+				pu1Tmp = (u8 *)pOut;
+				*pu1Tmp = 0;
+			}
+			break;
+	}
+}
+
+static VOID
+rtl8192c_EFUSE_GetEfuseDefinition(
+	IN		PADAPTER	pAdapter,
+	IN		u8		efuseType,
+	IN		u8		type,
+	OUT		PVOID		*pOut,
+	IN		BOOLEAN		bPseudoTest
+	)
+{
+	if(bPseudoTest)
+	{
+		Hal_EFUSEGetEfuseDefinition_Pseudo(pAdapter, efuseType, type, pOut);
+	}
+	else
+	{
+		Hal_EFUSEGetEfuseDefinition(pAdapter, efuseType, type, pOut);
+	}
+}
+
+static u8
+Hal_EfuseWordEnableDataWrite(	IN	PADAPTER	pAdapter,
+							IN	u16		efuse_addr,
+							IN	u8		word_en, 
+							IN	u8		*data,
+							IN	BOOLEAN		bPseudoTest)
+{		
+	u16	tmpaddr = 0;
+	u16	start_addr = efuse_addr;
+	u8	badworden = 0x0F;
+	u8	tmpdata[8]; 
+	
+	_rtw_memset((PVOID)tmpdata, 0xff, PGPKT_DATA_SIZE);
+	//RT_TRACE(COMP_EFUSE, DBG_LOUD, ("word_en = %x efuse_addr=%x\n", word_en, efuse_addr));
+
+	if(!(word_en&BIT0))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(pAdapter,start_addr++, data[0], bPseudoTest);
+		efuse_OneByteWrite(pAdapter,start_addr++, data[1], bPseudoTest);
+
+		efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[0], bPseudoTest);
+		efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[1], bPseudoTest);
+		if((data[0]!=tmpdata[0])||(data[1]!=tmpdata[1])){
+			badworden &= (~BIT0);
+		}
+	}
+	if(!(word_en&BIT1))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(pAdapter,start_addr++, data[2], bPseudoTest);
+		efuse_OneByteWrite(pAdapter,start_addr++, data[3], bPseudoTest);
+				
+		efuse_OneByteRead(pAdapter,tmpaddr    , &tmpdata[2], bPseudoTest);
+		efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[3], bPseudoTest);
+		if((data[2]!=tmpdata[2])||(data[3]!=tmpdata[3])){
+			badworden &=( ~BIT1);
+		}
+	}
+	if(!(word_en&BIT2))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(pAdapter,start_addr++, data[4], bPseudoTest);
+		efuse_OneByteWrite(pAdapter,start_addr++, data[5], bPseudoTest);
+
+		efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[4], bPseudoTest);							
+		efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[5], bPseudoTest);
+		if((data[4]!=tmpdata[4])||(data[5]!=tmpdata[5])){
+			badworden &=( ~BIT2);
+		}
+	}
+	if(!(word_en&BIT3))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(pAdapter,start_addr++, data[6], bPseudoTest);
+		efuse_OneByteWrite(pAdapter,start_addr++, data[7], bPseudoTest);
+
+		efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[6], bPseudoTest);
+		efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[7], bPseudoTest);
+		if((data[6]!=tmpdata[6])||(data[7]!=tmpdata[7])){
+			badworden &=( ~BIT3);
+		}
+	}
+	return badworden;
+}
+
+static u8
+Hal_EfuseWordEnableDataWrite_Pseudo(	IN	PADAPTER	pAdapter,
+							IN	u16		efuse_addr,
+							IN	u8		word_en, 
+							IN	u8		*data,
+							IN	BOOLEAN		bPseudoTest)
+{
+	u8	ret=0;
+	
+	ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
+
+	return ret;
+}
+
+static u8
+rtl8192c_Efuse_WordEnableDataWrite(	IN	PADAPTER	pAdapter,
+							IN	u16		efuse_addr,
+							IN	u8		word_en, 
+							IN	u8		*data,
+							IN	BOOLEAN		bPseudoTest)
+{
+	u8	ret=0;
+
+	if(bPseudoTest)
+	{
+		ret = Hal_EfuseWordEnableDataWrite_Pseudo(pAdapter, efuse_addr, word_en, data, bPseudoTest);
+	}
+	else
+	{
+		ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
+	}
+	
+	return ret;
+}
+
+
+static u16
+hal_EfuseGetCurrentSize_8192C(IN	PADAPTER	pAdapter,
+	IN		BOOLEAN		bPseudoTest)
+{
+	int bContinual = _TRUE;
+
+	u16	efuse_addr = 0;
+	u8	hoffset=0,hworden=0;	
+	u8	efuse_data,word_cnts=0;
+		
+	while (	bContinual && 
+			efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && 
+			(efuse_addr  < EFUSE_REAL_CONTENT_LEN) )
+	{			
+		if(efuse_data!=0xFF)
+		{					
+			hoffset = (efuse_data>>4) & 0x0F;
+			hworden =  efuse_data & 0x0F;									
+			word_cnts = Efuse_CalculateWordCnts(hworden);
+			//read next header							
+			efuse_addr = efuse_addr + (word_cnts*2)+1;						
+		}
+		else
+		{
+			bContinual = _FALSE ;			
+		}
+	}
+
+	return efuse_addr;	
+}
+
+static u16
+Hal_EfuseGetCurrentSize_BT(IN	PADAPTER	pAdapter,
+		IN		BOOLEAN			bPseudoTest)
+{
+	int	bContinual = _TRUE;
+	u16	efuse_addr = 0;
+	u8	hoffset=0,hworden=0;	
+	u8	efuse_data,word_cnts=0;
+	u8	bank=0, startBank=0;
+	u16	retU2=0;
+	u32	total_efuse_used=0;
+
+	if(bPseudoTest)
+	{
+		efuse_addr = (u16)((fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN));
+		startBank = (u8)(1+(fakeBTEfuseUsedBytes/EFUSE_REAL_CONTENT_LEN));
+	}
+	else
+	{
+		efuse_addr = (u16)((BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN));
+		startBank = (u8)(1+(BTEfuseUsedBytes/EFUSE_REAL_CONTENT_LEN));
+	}
+
+	if((startBank < 1) || (startBank >= EFUSE_MAX_BANK))
+		DBG_8192C("Error, bank error, bank=%d\n", bank);
+
+	//RTPRINT(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT(), start bank=%d, start_efuse_addr = %d\n", startBank, efuse_addr));
+	
+	for(bank=startBank; bank<EFUSE_MAX_BANK; bank++)
+	{
+		if(!Hal_EfuseSwitchToBank(pAdapter, bank, bPseudoTest))
+			break;
+		else
+		{
+			bContinual = _TRUE;
+			if(bank != startBank)	// only when bank is switched we have to reset the efuse_addr.
+				efuse_addr = 0;
+		}
+		
+		while (	bContinual && 
+				efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && 
+				AVAILABLE_EFUSE_ADDR(efuse_addr))
+		{			
+			if(efuse_data!=0xFF)
+			{
+				if((efuse_data&0x1F) == 0x0F)		//extended header
+				{
+					hoffset = efuse_data;
+					efuse_addr++;
+					efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest);
+					if((efuse_data & 0x0F) == 0x0F)
+					{
+						efuse_addr++;
+						continue;
+					}
+					else
+					{
+						hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+						hworden = efuse_data & 0x0F;
+					}
+				}		
+				else
+				{
+					hoffset = (efuse_data>>4) & 0x0F;
+					hworden =  efuse_data & 0x0F;									
+				}
+				word_cnts = Efuse_CalculateWordCnts(hworden);
+				//read next header							
+				efuse_addr = efuse_addr + (word_cnts*2)+1;						
+			}
+			else
+			{
+				bContinual = _FALSE ;
+			}
+		}
+
+		// Check if we need to check next bank efuse
+		if(efuse_addr < (EFUSE_REAL_CONTENT_LEN-EFUSE_PROTECT_BYTES_BANK))
+		{
+			break;// don't need to check next bank.
+		}
+	}
+
+	retU2 = ((bank-1)*EFUSE_REAL_CONTENT_LEN)+efuse_addr;
+	if(bPseudoTest)
+	{
+		fakeBTEfuseUsedBytes = retU2;
+		//RTPRINT(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT(), return %d\n", fakeBTEfuseUsedBytes));
+	}
+	else
+	{
+		BTEfuseUsedBytes = retU2;
+		//RTPRINT(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT(), return %d\n", BTEfuseUsedBytes));
+	}
+
+	return retU2;
+}	
+
+
+static u16
+hal_EfuseGetCurrentSize_8723(IN	PADAPTER	pAdapter,
+		IN		BOOLEAN			bPseudoTest)
+{
+	int	bContinual = _TRUE;
+
+	u16	efuse_addr = 0;
+	u8	hoffset=0,hworden=0;	
+	u8	efuse_data,word_cnts=0;
+
+	if(bPseudoTest)
+	{
+		efuse_addr = (u16)(fakeEfuseUsedBytes);
+	}
+	else
+	{
+		rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
+	}
+	//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723(), start_efuse_addr = %d\n", efuse_addr));
+	
+	while (	bContinual && 
+			efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && 
+			AVAILABLE_EFUSE_ADDR(efuse_addr))
+	{			
+		if(efuse_data!=0xFF)
+		{					
+			if((efuse_data&0x1F) == 0x0F)		//extended header
+			{
+				hoffset = efuse_data;
+				efuse_addr++;
+				efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest);
+				if((efuse_data & 0x0F) == 0x0F)
+				{
+					efuse_addr++;
+					continue;
+				}
+				else
+				{
+					hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+					hworden = efuse_data & 0x0F;
+				}
+			}		
+			else
+			{
+				hoffset = (efuse_data>>4) & 0x0F;
+				hworden =  efuse_data & 0x0F;									
+			}
+			word_cnts = Efuse_CalculateWordCnts(hworden);
+			//read next header							
+			efuse_addr = efuse_addr + (word_cnts*2)+1;						
+		}
+		else
+		{
+			bContinual = _FALSE ;			
+		}
+	}
+
+	if(bPseudoTest)
+	{
+		fakeEfuseUsedBytes = efuse_addr;
+		//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723(), return %d\n", fakeEfuseUsedBytes));
+	}
+	else
+	{
+		rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
+		//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723(), return %d\n", efuse_addr));
+	}
+	
+	return efuse_addr;	
+}	
+
+static u16
+Hal_EfuseGetCurrentSize_Pseudo(IN	PADAPTER	pAdapter,
+		IN		BOOLEAN			bPseudoTest)
+{
+	u16	ret=0;
+	
+	ret = hal_EfuseGetCurrentSize_8723(pAdapter, bPseudoTest);
+
+	return ret;
+}
+
+static u16
+rtl8192c_EfuseGetCurrentSize(
+	IN	PADAPTER	pAdapter,
+	IN	u8			efuseType,
+	IN	BOOLEAN		bPseudoTest)
+{
+	u16	ret=0;
+
+	if(efuseType == EFUSE_WIFI)
+	{
+		if(bPseudoTest)
+		{
+			ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest);
+		}
+		else
+		{
+			if(IS_HARDWARE_TYPE_8192C(pAdapter))
+			{
+				ret = hal_EfuseGetCurrentSize_8192C(pAdapter, bPseudoTest);
+			}
+			else if(IS_HARDWARE_TYPE_8723A(pAdapter))
+			{
+				ret = hal_EfuseGetCurrentSize_8723(pAdapter, bPseudoTest);
+			}
+		}
+	}
+	else
+	{
+		ret = Hal_EfuseGetCurrentSize_BT(pAdapter, bPseudoTest);
+	}
+
+	return ret;
+}
+
+static int
+hal_EfusePgPacketRead_8192C(	IN	PADAPTER	pAdapter,
+					IN	u8			offset,
+					IN	u8			*data,
+					IN	BOOLEAN			bPseudoTest)
+{	
+	u8	ReadState = PG_STATE_HEADER;	
+	
+	int	bContinual = _TRUE;
+	int	bDataEmpty = _TRUE ;	
+
+	u8	efuse_data,word_cnts=0;
+	u16	efuse_addr = 0;
+	u8	hoffset=0,hworden=0;	
+	u8	tmpidx=0;
+	u8	tmpdata[8];
+	
+	if(data==NULL)	return _FALSE;
+	if(offset>15)		return _FALSE;	
+	
+
+	_rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+	_rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+	
+	//
+	// <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
+	// Skip dummy parts to prevent unexpected data read from Efuse.
+	// By pass right now. 2009.02.19.
+	//
+	while(bContinual && (efuse_addr  < EFUSE_REAL_CONTENT_LEN) )
+	{			
+		//-------  Header Read -------------
+		if(ReadState & PG_STATE_HEADER)
+		{
+			if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF)){				
+				hoffset = (efuse_data>>4) & 0x0F;
+				hworden =  efuse_data & 0x0F;									
+				word_cnts = Efuse_CalculateWordCnts(hworden);
+				bDataEmpty = _TRUE ;
+
+				if(hoffset==offset){
+					for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++){
+						if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) ){
+							tmpdata[tmpidx] = efuse_data;
+							if(efuse_data!=0xff){						
+								bDataEmpty = _FALSE;
+							}
+						}					
+					}
+					if(bDataEmpty==_FALSE){
+						ReadState = PG_STATE_DATA;							
+					}else{//read next header							
+						efuse_addr = efuse_addr + (word_cnts*2)+1;
+						ReadState = PG_STATE_HEADER; 
+					}
+				}
+				else{//read next header	
+					efuse_addr = efuse_addr + (word_cnts*2)+1;
+					ReadState = PG_STATE_HEADER; 
+				}
+				
+			}
+			else{
+				bContinual = _FALSE ;
+			}
+		}		
+		//-------  Data section Read -------------
+		else if(ReadState & PG_STATE_DATA)
+		{
+			efuse_WordEnableDataRead(hworden,tmpdata,data);
+			efuse_addr = efuse_addr + (word_cnts*2)+1;
+			ReadState = PG_STATE_HEADER; 
+		}
+		
+	}
+		
+	if(	(data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff)  && (data[3]==0xff) &&
+		(data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff)  && (data[7]==0xff))
+		return _FALSE;
+	else
+		return _TRUE;
+
+}
+
+static int
+hal_EfusePgPacketRead_8723(	IN	PADAPTER	pAdapter,
+					IN	u8			offset,
+					IN	u8			*data,
+					IN	BOOLEAN			bPseudoTest)
+{	
+	u8	ReadState = PG_STATE_HEADER;	
+	
+	int	bContinual = _TRUE;
+	int	bDataEmpty = _TRUE ;	
+
+	u8	efuse_data,word_cnts=0;
+	u16	efuse_addr = 0;
+	u8	hoffset=0,hworden=0;	
+	u8	tmpidx=0;
+	u8	tmpdata[8];
+	u8	max_section=0;
+	u8	tmp_header = 0;
+
+	EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (PVOID)&max_section, bPseudoTest);
+	
+	if(data==NULL)
+		return _FALSE;
+	if(offset>max_section)
+		return _FALSE;
+
+	_rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+	_rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+	
+	
+	//
+	// <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
+	// Skip dummy parts to prevent unexpected data read from Efuse.
+	// By pass right now. 2009.02.19.
+	//
+	while(bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr) )
+	{			
+		//-------  Header Read -------------
+		if(ReadState & PG_STATE_HEADER)
+		{
+			if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF))			
+			{
+				if(EXT_HEADER(efuse_data))
+				{
+					tmp_header = efuse_data;
+					efuse_addr++;
+					efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest);
+					if(!ALL_WORDS_DISABLED(efuse_data))
+					{
+						hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+						hworden = efuse_data & 0x0F;						
+					}
+					else
+					{
+						DBG_8192C("Error, All words disabled\n");
+						efuse_addr++;
+						continue;
+					}
+				}
+				else	
+				{
+					hoffset = (efuse_data>>4) & 0x0F;
+					hworden =  efuse_data & 0x0F;									
+				}
+				word_cnts = Efuse_CalculateWordCnts(hworden);
+				bDataEmpty = _TRUE ;
+
+				if(hoffset==offset)
+				{
+					for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++)
+					{
+						if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) )
+						{
+							tmpdata[tmpidx] = efuse_data;
+							if(efuse_data!=0xff)
+							{						
+								bDataEmpty = _FALSE;
+							}
+						}					
+					}
+					if(bDataEmpty==_FALSE){
+						ReadState = PG_STATE_DATA;							
+					}else{//read next header							
+						efuse_addr = efuse_addr + (word_cnts*2)+1;
+						ReadState = PG_STATE_HEADER; 
+					}
+				}
+				else{//read next header	
+					efuse_addr = efuse_addr + (word_cnts*2)+1;
+					ReadState = PG_STATE_HEADER; 
+				}
+				
+			}
+			else{
+				bContinual = _FALSE ;
+			}
+		}		
+		//-------  Data section Read -------------
+		else if(ReadState & PG_STATE_DATA)
+		{
+			efuse_WordEnableDataRead(hworden,tmpdata,data);
+			efuse_addr = efuse_addr + (word_cnts*2)+1;
+			ReadState = PG_STATE_HEADER; 
+		}
+		
+	}			
+	
+	if(	(data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff)  && (data[3]==0xff) &&
+		(data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff)  && (data[7]==0xff))
+		return _FALSE;
+	else
+		return _TRUE;
+
+}
+
+static int
+Hal_EfusePgPacketRead(	IN	PADAPTER	pAdapter,
+					IN	u8			offset,
+					IN	u8			*data,
+					IN	BOOLEAN			bPseudoTest)
+{
+	int	ret=0;
+
+	if(IS_HARDWARE_TYPE_8192C(pAdapter))
+	{
+		ret = hal_EfusePgPacketRead_8192C(pAdapter, offset, data, bPseudoTest);
+	}
+	else if(IS_HARDWARE_TYPE_8723A(pAdapter))
+	{
+		ret = hal_EfusePgPacketRead_8723(pAdapter, offset, data, bPseudoTest);
+	}
+
+	return ret;
+}
+
+static int
+Hal_EfusePgPacketRead_Pseudo(	IN	PADAPTER	pAdapter,
+					IN	u8			offset,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	int	ret=0;
+	
+	ret = hal_EfusePgPacketRead_8723(pAdapter, offset, data, bPseudoTest);
+
+	return ret;
+}
+
+static int
+rtl8192c_Efuse_PgPacketRead(	IN	PADAPTER	pAdapter,
+					IN	u8			offset,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	int	ret=0;
+
+	if(bPseudoTest)
+	{
+		ret = Hal_EfusePgPacketRead_Pseudo(pAdapter, offset, data, bPseudoTest);
+	}
+	else
+	{
+		ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest);
+	}
+
+	return ret;
+}
+
+static BOOLEAN
+hal_EfuseFixHeaderProcess(
+	IN		PADAPTER			pAdapter,
+	IN		u8					efuseType,
+	IN		PPGPKT_STRUCT		pFixPkt,
+	IN		u16					*pAddr,
+	IN		BOOLEAN				bPseudoTest
+)
+{
+	u8	originaldata[8], badworden=0;
+	u16	efuse_addr=*pAddr;
+	u32	PgWriteSuccess=0;
+	
+	_rtw_memset((PVOID)originaldata, 0xff, 8);
+					
+	if(Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest))
+	{	//check if data exist
+		badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata, bPseudoTest);
+
+		if(badworden != 0xf)	// write fail
+		{
+			if(efuseType == EFUSE_WIFI)
+				PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest);
+			else
+				PgWriteSuccess = hal_EfusePgPacketWrite_BT(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest);
+			if(!PgWriteSuccess)
+				return _FALSE;
+			else
+				efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);
+		}
+		else
+		{
+			efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1;
+		}
+	}
+	else
+	{
+		efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1;
+	}
+	*pAddr = efuse_addr;
+	return _TRUE;
+}
+
+static BOOLEAN
+hal_EfusePgPacketWrite2ByteHeader(
+	IN			PADAPTER		pAdapter,
+	IN			u8				efuseType,
+	IN			u16				*pAddr,
+	IN			PPGPKT_STRUCT	pTargetPkt,
+	IN			BOOLEAN			bPseudoTest)
+{
+	BOOLEAN		bRet=_FALSE, bContinual=_TRUE;
+	u16	efuse_addr=*pAddr, efuse_max_available_len=0;
+	u8	pg_header=0, tmp_header=0, pg_header_temp=0;
+	u8	repeatcnt=0;
+
+	//RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 2byte header\n"));
+	EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest);
+
+	while(efuse_addr < efuse_max_available_len)
+	{
+		pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
+		//RTPRINT(FEEPROM, EFUSE_PG, ("pg_header = 0x%x\n", pg_header));
+		efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
+		efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
+
+		while(tmp_header == 0xFF)
+		{
+			if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
+			{
+				//RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for pg_header!!\n"));
+				return _FALSE;
+			}
+
+			efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
+			efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
+		}
+		
+		//to write ext_header
+		if(tmp_header == pg_header)
+		{
+			efuse_addr++;
+			pg_header_temp = pg_header;
+			pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en;
+
+			efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
+			efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
+
+			while(tmp_header == 0xFF)
+			{											
+				if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
+				{
+					//RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for ext_header!!\n"));
+					return _FALSE;
+				}							
+
+				efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
+				efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
+			}
+
+			if((tmp_header & 0x0F) == 0x0F)	//word_en PG fail
+			{
+				if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
+				{
+					//RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for word_en!!\n"));
+					return _FALSE;
+				}
+				else
+				{
+					efuse_addr++;
+					continue;
+				}
+			}
+			else if(pg_header != tmp_header)	//offset PG fail						
+			{
+				PGPKT_STRUCT	fixPkt;
+				//RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for offset PG fail, need to cover the existed data\n"));
+				fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1);
+				fixPkt.word_en = tmp_header & 0x0F;					
+				fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
+				if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest))
+					return _FALSE;
+			}
+			else
+			{
+				bRet = _TRUE;
+				break;
+			}
+		}
+		else if ((tmp_header & 0x1F) == 0x0F)		//wrong extended header
+		{
+			efuse_addr+=2;
+			continue;						
+		}
+	}
+
+	*pAddr = efuse_addr;
+	return bRet;
+}
+
+static BOOLEAN
+hal_EfusePgPacketWrite1ByteHeader(
+	IN			PADAPTER		pAdapter, 
+	IN			u8				efuseType,
+	IN			u16				*pAddr,
+	IN			PPGPKT_STRUCT	pTargetPkt,
+	IN			BOOLEAN			bPseudoTest)
+{
+	BOOLEAN		bRet=_FALSE;
+	u8	pg_header=0, tmp_header=0;
+	u16	efuse_addr=*pAddr;
+	u8	repeatcnt=0;
+
+	//RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 1byte header\n"));
+	pg_header = ((pTargetPkt->offset << 4) & 0xf0) |pTargetPkt->word_en;
+	
+	efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
+	efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
+
+	while(tmp_header == 0xFF)
+	{
+		if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
+		{
+			return _FALSE;
+		}
+		efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest);
+		efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest);
+	}
+	
+	if(pg_header == tmp_header)
+	{
+		bRet = _TRUE;
+	}
+	else
+	{
+		PGPKT_STRUCT	fixPkt;
+		//RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for fixed PG packet, need to cover the existed data\n"));
+		fixPkt.offset = (tmp_header>>4) & 0x0F;
+		fixPkt.word_en = tmp_header & 0x0F;					
+		fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
+		if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest))
+			return _FALSE;
+	}
+	
+	*pAddr = efuse_addr;
+	return bRet;
+}
+
+static BOOLEAN
+hal_EfusePgPacketWriteData(
+	IN			PADAPTER		pAdapter, 
+	IN			u8				efuseType,
+	IN			u16				*pAddr,
+	IN			PPGPKT_STRUCT	pTargetPkt,
+	IN			BOOLEAN			bPseudoTest)
+{
+	BOOLEAN	bRet=_FALSE;
+	u16	efuse_addr=*pAddr;
+	u8	badworden=0;
+	u32	PgWriteSuccess=0;
+
+	badworden = 0x0f;
+	badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest);
+	if(badworden == 0x0F)
+	{
+		// write ok
+		//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData ok!!\n"));
+		return _TRUE;
+	}
+	else
+	{
+		//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData Fail!!\n"));
+		//reorganize other pg packet
+		if(efuseType == EFUSE_WIFI)
+			PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
+		else
+			PgWriteSuccess = hal_EfusePgPacketWrite_BT(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
+		if(!PgWriteSuccess)
+			return _FALSE;
+		else
+			return _TRUE;
+	}
+
+	return bRet;
+}
+
+static BOOLEAN
+hal_EfusePgPacketWriteHeader(
+	IN			PADAPTER		pAdapter, 
+	IN			u8				efuseType,
+	IN			u16				*pAddr,
+	IN			PPGPKT_STRUCT	pTargetPkt,
+	IN			BOOLEAN			bPseudoTest)
+{
+	BOOLEAN		bRet=_FALSE;
+
+	if(pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE)
+	{
+		bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
+	}
+	else
+	{
+		bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
+	}
+
+	return bRet;
+}
+
+static BOOLEAN
+hal_EfusePgCheckAvailableAddr(
+	IN	PADAPTER	pAdapter,
+	IN	u8			efuseType,
+	IN	BOOLEAN		bPseudoTest
+	)
+{
+	u16	efuse_max_available_len=0;
+	
+	EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&efuse_max_available_len, bPseudoTest);
+	//RTPRINT(FEEPROM, EFUSE_PG, ("efuse_max_available_len = %d\n", efuse_max_available_len));
+
+	if(Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len)
+	{
+		//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgCheckAvailableAddr error!!\n"));
+		return _FALSE;
+	}
+	return _TRUE;
+}
+
+static VOID
+hal_EfuseConstructPGPkt(
+					IN	u8 				offset,
+					IN	u8				word_en,
+					IN	u8				*pData,
+					IN	PPGPKT_STRUCT	pTargetPkt
+
+)
+{
+	_rtw_memset((PVOID)pTargetPkt->data, 0xFF, sizeof(u8)*8);
+	pTargetPkt->offset = offset;
+	pTargetPkt->word_en= word_en;
+	efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data);
+	pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
+
+	//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseConstructPGPkt(), targetPkt, offset=%d, word_en=0x%x, word_cnts=%d\n", pTargetPkt->offset, pTargetPkt->word_en, pTargetPkt->word_cnts));
+}
+
+static BOOLEAN
+hal_EfuseCheckIfDatafollowed(
+	IN		PADAPTER		pAdapter,
+	IN		u8				word_cnts,
+	IN		u16				startAddr,
+	IN		BOOLEAN			bPseudoTest
+	)
+{
+	BOOLEAN		bRet=_FALSE;
+	u8	i, efuse_data;
+	
+	for(i=0; i<(word_cnts*2) ; i++)
+	{
+		if(efuse_OneByteRead(pAdapter, (startAddr+i) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF))
+			bRet = _TRUE;
+	}
+
+	return bRet;
+}
+
+static BOOLEAN
+wordEnMatched(
+	IN	PPGPKT_STRUCT	pTargetPkt,
+	IN	PPGPKT_STRUCT	pCurPkt,
+	IN	u8				*pWden
+)
+{
+	u8	match_word_en = 0x0F;	// default all words are disabled
+	u8	i;
+
+	// check if the same words are enabled both target and current PG packet
+	if( ((pTargetPkt->word_en & BIT0) == 0) &&
+		((pCurPkt->word_en & BIT0) == 0) )
+	{
+		match_word_en &= ~BIT0;				// enable word 0
+	}
+	if( ((pTargetPkt->word_en & BIT1) == 0) &&
+		((pCurPkt->word_en & BIT1) == 0) )
+	{
+		match_word_en &= ~BIT1;				// enable word 1
+	}
+	if( ((pTargetPkt->word_en & BIT2) == 0) &&
+		((pCurPkt->word_en & BIT2) == 0) )
+	{
+		match_word_en &= ~BIT2;				// enable word 2
+	}
+	if( ((pTargetPkt->word_en & BIT3) == 0) &&
+		((pCurPkt->word_en & BIT3) == 0) )
+	{
+		match_word_en &= ~BIT3;				// enable word 3
+	}
+
+	*pWden = match_word_en;
+
+	if(match_word_en != 0xf)
+		return _TRUE;
+	else
+		return _FALSE;
+}
+
+static BOOLEAN
+hal_EfusePartialWriteCheck(
+					IN	PADAPTER		pAdapter,
+					IN	u8				efuseType,
+					IN	u16				*pAddr,
+					IN	PPGPKT_STRUCT	pTargetPkt,
+					IN	BOOLEAN			bPseudoTest
+					)
+{
+	BOOLEAN		bRet=_FALSE;
+	u8	i, efuse_data=0, cur_header=0;
+	u8	new_wden=0, matched_wden=0, badworden=0;
+	u16	startAddr=0, efuse_max_available_len=0, efuse_max=0;
+	PGPKT_STRUCT	curPkt;
+
+	EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest);
+	EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&efuse_max, bPseudoTest);
+
+	if(efuseType == EFUSE_WIFI)
+	{
+		if(bPseudoTest)
+		{
+			startAddr = (u16)(fakeEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
+		}
+		else
+		{
+			rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr);
+			startAddr%=EFUSE_REAL_CONTENT_LEN;
+		}
+	}
+	else
+	{
+		if(bPseudoTest)
+		{
+			startAddr = (u16)(fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
+		}
+		else
+		{
+			startAddr = (u16)(BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
+		}
+	}
+	//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePartialWriteCheck(), startAddr=%d\n", startAddr));
+
+	while(1)
+	{
+		if(startAddr >= efuse_max_available_len) 
+		{
+			bRet = _FALSE;
+			break;
+		}
+		
+		if(efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data!=0xFF))
+		{
+			if(EXT_HEADER(efuse_data))
+			{
+				cur_header = efuse_data;
+				startAddr++;
+				efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest);
+				if(ALL_WORDS_DISABLED(efuse_data))
+				{
+					//RTPRINT(FEEPROM, EFUSE_PG, ("Error condition, all words disabled"));
+					bRet = _FALSE;
+					break;
+				}
+				else
+				{
+					curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+					curPkt.word_en = efuse_data & 0x0F;
+				}
+			}
+			else
+			{
+				cur_header  =  efuse_data;					
+				curPkt.offset = (cur_header>>4) & 0x0F;
+				curPkt.word_en = cur_header & 0x0F;
+			}
+
+			curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en);
+			// if same header is found but no data followed
+			// write some part of data followed by the header.
+			if( (curPkt.offset == pTargetPkt->offset) && 
+				(!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1, bPseudoTest)) &&
+				wordEnMatched(pTargetPkt, &curPkt, &matched_wden) )
+			{
+				//RTPRINT(FEEPROM, EFUSE_PG, ("Need to partial write data by the previous wrote header\n"));
+				// Here to write partial data
+				badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest);
+				if(badworden != 0x0F)
+				{
+					u32	PgWriteSuccess=0;
+					// if write fail on some words, write these bad words again
+					if(efuseType == EFUSE_WIFI)
+						PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
+					else
+						PgWriteSuccess = hal_EfusePgPacketWrite_BT(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
+
+					if(!PgWriteSuccess)
+					{
+						bRet = _FALSE;	// write fail, return
+						break;
+					}					
+				}
+				// partial write ok, update the target packet for later use		
+				for(i=0; i<4; i++)
+				{
+					if((matched_wden & (0x1<<i)) == 0)	// this word has been written
+					{
+						pTargetPkt->word_en |= (0x1<<i);	// disable the word
+					}
+				}
+				pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
+			}
+			// read from next header
+			startAddr = startAddr + (curPkt.word_cnts*2) +1;	
+		}
+		else
+		{
+			// not used header, 0xff
+			*pAddr = startAddr;
+			//RTPRINT(FEEPROM, EFUSE_PG, ("Started from unused header offset=%d\n", startAddr));
+			bRet = _TRUE;
+			break;
+		}
+	}	
+	return bRet;
+}
+
+static BOOLEAN 
+hal_EfusePgPacketWrite_BT(
+					IN	PADAPTER	pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*pData,
+					IN	BOOLEAN		bPseudoTest
+					)
+{
+	PGPKT_STRUCT 	targetPkt;
+	u16	startAddr=0;
+	u8	efuseType=EFUSE_BT;
+	
+	if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest))
+		return _FALSE;
+
+	hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
+
+	if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
+		return _FALSE;
+
+	if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
+		return _FALSE;
+
+	if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
+		return _FALSE;
+
+	return _TRUE;
+}
+
+static BOOLEAN 
+hal_EfusePgPacketWrite_8723(
+					IN	PADAPTER		pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*pData,
+					IN	BOOLEAN		bPseudoTest
+					)
+{
+	PGPKT_STRUCT 	targetPkt;
+	u16			startAddr=0;
+	u8			efuseType=EFUSE_WIFI;
+	
+	if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest))
+		return _FALSE;
+
+	hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
+
+	if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
+		return _FALSE;
+
+	if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
+		return _FALSE;
+
+	if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
+		return _FALSE;
+
+	return _TRUE;
+}
+
+static int
+hal_EfusePgPacketWrite_8192C(IN	PADAPTER	pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	u8	WriteState = PG_STATE_HEADER;		
+
+	int	bContinual = _TRUE,bDataEmpty=_TRUE, bResult = _TRUE;
+	u16	efuse_addr = 0;
+	u8	efuse_data;
+
+	u8	pg_header = 0;
+
+	u8	tmp_word_cnts=0,target_word_cnts=0;
+	u8	tmp_header,match_word_en,tmp_word_en;
+
+	PGPKT_STRUCT target_pkt;	
+	PGPKT_STRUCT tmp_pkt;
+	
+	u8	originaldata[sizeof(u8)*8];
+	u8	tmpindex = 0,badworden = 0x0F;
+
+	static int	repeat_times = 0;
+	u8	efuseType=EFUSE_WIFI;
+
+	//
+	// <Roger_Notes> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
+	// So we have to prevent unexpected data string connection, which will cause
+	// incorrect data auto-load from HW. The total size is equal or smaller than 498bytes
+	// (i.e., offset 0~497, and dummy 1bytes) expected after CP test.
+	// 2009.02.19.
+	//
+	if( Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES))
+	{
+		//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWrite_8192C(), over size\n"));
+		return _FALSE;
+	}
+
+	// Init the 8 bytes content as 0xff
+	target_pkt.offset = offset;
+	target_pkt.word_en= word_en;
+
+	_rtw_memset((PVOID)target_pkt.data, 0xFF, sizeof(u8)*8);
+	
+	efuse_WordEnableDataRead(word_en,data,target_pkt.data);
+	target_word_cnts = Efuse_CalculateWordCnts(target_pkt.word_en);
+
+	//efuse_reg_ctrl(pAdapter,_TRUE);//power on
+	//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE Power ON\n"));
+
+	//
+	// <Roger_Notes> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
+	// So we have to prevent unexpected data string connection, which will cause
+	// incorrect data auto-load from HW. Dummy 1bytes is additional.
+	// 2009.02.19.
+	//
+	while( bContinual && (efuse_addr  < (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES)) )
+	{
+		
+		if(WriteState==PG_STATE_HEADER)
+		{	
+			bDataEmpty=_TRUE;
+			badworden = 0x0F;		
+			//************  so *******************
+			//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER\n"));
+			if (	efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) &&
+				(efuse_data!=0xFF))
+			{ 	
+				tmp_header  =  efuse_data;
+				
+				tmp_pkt.offset 	= (tmp_header>>4) & 0x0F;
+				tmp_pkt.word_en 	= tmp_header & 0x0F;					
+				tmp_word_cnts =  Efuse_CalculateWordCnts(tmp_pkt.word_en);
+
+				//************  so-1 *******************
+				if(tmp_pkt.offset  != target_pkt.offset)
+				{
+					efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet
+					#if (EFUSE_ERROE_HANDLE == 1)
+					WriteState = PG_STATE_HEADER;
+					#endif
+				}
+				else
+				{	
+					//************  so-2 *******************
+					for(tmpindex=0 ; tmpindex<(tmp_word_cnts*2) ; tmpindex++)
+					{
+						if(efuse_OneByteRead(pAdapter, (efuse_addr+1+tmpindex) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF)){
+							bDataEmpty = _FALSE;	
+						}
+					}	
+					//************  so-2-1 *******************
+					if(bDataEmpty == _FALSE)
+					{						
+						efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet										
+						#if (EFUSE_ERROE_HANDLE == 1)
+						WriteState=PG_STATE_HEADER;
+						#endif
+					}
+					else
+					{//************  so-2-2 *******************
+						match_word_en = 0x0F;
+						if(   !( (target_pkt.word_en&BIT0)|(tmp_pkt.word_en&BIT0)  ))
+						{
+							 match_word_en &= (~BIT0);
+						}	
+						if(   !( (target_pkt.word_en&BIT1)|(tmp_pkt.word_en&BIT1)  ))
+						{
+							 match_word_en &= (~BIT1);
+						}
+						if(   !( (target_pkt.word_en&BIT2)|(tmp_pkt.word_en&BIT2)  ))
+						{
+							 match_word_en &= (~BIT2);
+						}
+						if(   !( (target_pkt.word_en&BIT3)|(tmp_pkt.word_en&BIT3)  ))
+						{
+							 match_word_en &= (~BIT3);
+						}					
+												
+						//************  so-2-2-A *******************
+						if((match_word_en&0x0F)!=0x0F)
+						{							
+							badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1, tmp_pkt.word_en ,target_pkt.data, bPseudoTest);
+							
+							//************  so-2-2-A-1 *******************
+							//############################
+							if(0x0F != (badworden&0x0F))
+							{														
+								u8	reorg_offset = offset;
+								u8	reorg_worden=badworden;								
+								Efuse_PgPacketWrite(pAdapter,reorg_offset,reorg_worden,originaldata, bPseudoTest);
+							}	
+							//############################						
+
+							tmp_word_en = 0x0F;	
+							if(  (target_pkt.word_en&BIT0)^(match_word_en&BIT0)  )
+							{
+								tmp_word_en &= (~BIT0);
+							}
+							if(   (target_pkt.word_en&BIT1)^(match_word_en&BIT1) )
+							{
+								tmp_word_en &=  (~BIT1);
+							}
+							if(   (target_pkt.word_en&BIT2)^(match_word_en&BIT2) )
+							{
+								tmp_word_en &= (~BIT2);
+							}						
+							if(   (target_pkt.word_en&BIT3)^(match_word_en&BIT3) )
+							{
+								tmp_word_en &=(~BIT3);
+							}							
+						
+							//************  so-2-2-A-2 *******************	
+							if((tmp_word_en&0x0F)!=0x0F){
+								//reorganize other pg packet						
+								//efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr							
+								efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);
+								//===========================
+								target_pkt.offset = offset;
+								target_pkt.word_en= tmp_word_en;					
+								//===========================
+							}else{								
+								bContinual = _FALSE;
+							}
+							#if (EFUSE_ERROE_HANDLE == 1)
+							WriteState=PG_STATE_HEADER;
+							repeat_times++;
+							if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+								bContinual = _FALSE;
+								bResult = _FALSE;
+							}
+							#endif
+						}
+						else{//************  so-2-2-B *******************
+							//reorganize other pg packet						
+							efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr							
+							//===========================
+							target_pkt.offset = offset;
+							target_pkt.word_en= target_pkt.word_en;					
+							//===========================			
+							#if (EFUSE_ERROE_HANDLE == 1)
+							WriteState=PG_STATE_HEADER;
+							#endif
+						}		
+					}				
+				}				
+				//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-1\n"));
+			}
+			else		//************  s1: header == oxff  *******************
+			{
+				pg_header = ((target_pkt.offset << 4)&0xf0) |target_pkt.word_en;
+
+				efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest);
+				efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest);
+		
+				if(tmp_header == pg_header)
+				{ //************  s1-1*******************								
+					WriteState = PG_STATE_DATA;						
+				}				
+				#if (EFUSE_ERROE_HANDLE == 1)
+				else if(tmp_header == 0xFF){//************  s1-3: if Write or read func doesn't work *******************		
+					//efuse_addr doesn't change
+					WriteState = PG_STATE_HEADER;					
+					repeat_times++;
+					if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+						bContinual = _FALSE;
+						bResult = _FALSE;
+					}
+				}
+				#endif
+				else
+				{//************  s1-2 : fixed the header procedure *******************							
+					tmp_pkt.offset = (tmp_header>>4) & 0x0F;
+					tmp_pkt.word_en=  tmp_header & 0x0F;					
+					tmp_word_cnts =  Efuse_CalculateWordCnts(tmp_pkt.word_en);
+																											
+					//************  s1-2-A :cover the exist data *******************
+					//memset(originaldata,0xff,sizeof(UINT8)*8);
+					_rtw_memset((PVOID)originaldata, 0xff, sizeof(u8)*8);
+					
+					if(Efuse_PgPacketRead( pAdapter, tmp_pkt.offset,originaldata, bPseudoTest))
+					{	//check if data exist 					
+						//efuse_reg_ctrl(pAdapter,_TRUE);//power on
+						badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1,tmp_pkt.word_en,originaldata, bPseudoTest);	
+						//############################
+						if(0x0F != (badworden&0x0F))
+						{														
+							u8	reorg_offset = tmp_pkt.offset;
+							u8	reorg_worden=badworden;								
+							Efuse_PgPacketWrite(pAdapter,reorg_offset,reorg_worden,originaldata, bPseudoTest);
+							efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);	 
+						}
+						//############################
+						else{
+							efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet							
+						}
+					}
+					 //************  s1-2-B: wrong address*******************
+					else
+					{
+						efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet
+					}
+
+					#if (EFUSE_ERROE_HANDLE == 1)
+					WriteState=PG_STATE_HEADER;	
+					repeat_times++;
+					if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+						bContinual = _FALSE;
+						bResult = _FALSE;
+					}
+					#endif
+					
+					//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-2\n"));
+				}
+
+			}
+
+		}
+		//write data state
+		else if(WriteState==PG_STATE_DATA) 
+		{	//************  s1-1  *******************
+			//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_DATA\n"));
+			badworden = 0x0f;
+			badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1,target_pkt.word_en,target_pkt.data, bPseudoTest);	
+			if((badworden&0x0F)==0x0F)
+			{ //************  s1-1-A *******************
+				bContinual = _FALSE;
+			}
+			else
+			{//reorganize other pg packet //************  s1-1-B *******************
+				efuse_addr = efuse_addr + (2*target_word_cnts) +1;//next pg packet addr
+										
+				//===========================
+				target_pkt.offset = offset;
+				target_pkt.word_en= badworden;		
+				target_word_cnts =  Efuse_CalculateWordCnts(target_pkt.word_en); 
+				//===========================			
+				#if (EFUSE_ERROE_HANDLE == 1)
+				WriteState=PG_STATE_HEADER;	
+				repeat_times++;
+				if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+					bContinual = _FALSE;
+					bResult = _FALSE;
+				}
+				#endif
+				//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-3\n"));
+			}
+		}
+	}
+
+	if(efuse_addr  >= (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES))
+	{
+		//RT_TRACE(COMP_EFUSE, DBG_LOUD, ("hal_EfusePgPacketWrite_8192C(): efuse_addr(%#x) Out of size!!\n", efuse_addr));
+	}
+	//efuse_reg_ctrl(pAdapter,_FALSE);//power off
+	
+	return _TRUE;
+}
+
+static int 
+Hal_EfusePgPacketWrite_Pseudo(IN	PADAPTER	pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	int ret;
+	
+	ret = hal_EfusePgPacketWrite_8723(pAdapter, offset, word_en, data, bPseudoTest);
+
+	return ret;
+}
+
+static int
+Hal_EfusePgPacketWrite(IN	PADAPTER	pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	int	ret=0;
+
+	if(IS_HARDWARE_TYPE_8192C(pAdapter))
+	{
+		ret = hal_EfusePgPacketWrite_8192C(pAdapter, offset, word_en, data, bPseudoTest);
+	}
+	else if(IS_HARDWARE_TYPE_8723A(pAdapter))
+	{
+		ret = hal_EfusePgPacketWrite_8723(pAdapter, offset, word_en, data, bPseudoTest);
+	}
+
+	return ret;
+}
+
+static int 
+rtl8192c_Efuse_PgPacketWrite(IN	PADAPTER	pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	int	ret;
+
+	if(bPseudoTest)
+	{
+		ret = Hal_EfusePgPacketWrite_Pseudo(pAdapter, offset, word_en, data, bPseudoTest);
+	}
+	else
+	{
+		ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest);
+	}
+	return ret;
+}
+
+VOID
+rtl8192c_EfuseParseIDCode(
+	IN	PADAPTER	pAdapter,
+	IN	u8			*hwinfo
+	)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	u16			i,EEPROMId;
+	
+	// Checl 0x8129 again for making sure autoload status!!
+	EEPROMId = *((u16 *)&hwinfo[0]);
+	if( le16_to_cpu(EEPROMId) != RTL_EEPROM_ID)
+	{
+		DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
+		pEEPROM->bautoload_fail_flag = _TRUE;
+	}
+	else
+	{
+		pEEPROM->bautoload_fail_flag = _FALSE;
+	}
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM ID = 0x%4x\n", EEPROMId));
+}
+
+void rtl8192c_read_chip_version(PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(pAdapter);
+	pHalData->VersionID = rtl8192c_ReadChipVersion(pAdapter);
+}
+
+void hal_notch_filter_8192c(_adapter *adapter, bool enable)
+{
+	if (enable) {
+		DBG_871X("Enable notch filter\n");
+		rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1);
+	} else {
+		DBG_871X("Disable notch filter\n");
+		rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1);
+	}
+}
+
+void hal_reset_security_engine_8192c(_adapter * adapter)
+{
+	rtw_write8(adapter, 0x522, 0xFF);
+	rtw_write8(adapter, 0x21, 0x35);
+	rtw_usleep_os(300);
+	rtw_write8(adapter, 0x101, rtw_read8(adapter,0x101)&~0x02);
+	rtw_write8(adapter, 0x101, rtw_read8(adapter,0x101)|0x02);
+	rtw_write8(adapter, 0x21, 0x55);
+	rtw_write8(adapter, 0x522, 0x00);
+}
+
+s32 c2h_id_filter_ccx_8192c(u8 id)
+{
+	s32 ret = _FALSE;
+	if (id == C2H_CCX_TX_RPT)
+		ret = _TRUE;
+	
+	return ret;
+}
+
+static s32 c2h_handler_8192c(_adapter *padapter, struct c2h_evt_hdr *c2h_evt)
+{
+	s32 ret = _SUCCESS;
+	u8 i = 0;
+
+	if (c2h_evt == NULL) {
+		DBG_8192C("%s c2h_evt is NULL\n",__FUNCTION__);
+		ret = _FAIL;
+		goto exit;
+	}
+
+	switch (c2h_evt->id) {
+	case C2H_CCX_TX_RPT:
+		handle_txrpt_ccx_8192c(padapter, c2h_evt->payload);
+		break;
+	default:
+		ret = _FAIL;
+		break;
+	}
+
+exit:
+	return ret;
+}
+
+void rtl8192c_set_hal_ops(struct hal_ops *pHalFunc)
+{
+	pHalFunc->free_hal_data = &rtl8192c_free_hal_data;
+
+	pHalFunc->dm_init = &rtl8192c_init_dm_priv;
+	pHalFunc->dm_deinit = &rtl8192c_deinit_dm_priv;
+	pHalFunc->read_chip_version = &rtl8192c_read_chip_version;
+
+	pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C;
+	pHalFunc->set_channel_handler = &PHY_SwChnl8192C;
+
+	pHalFunc->hal_dm_watchdog = &rtl8192c_HalDmWatchDog;
+
+	pHalFunc->Add_RateATid = &rtl8192c_Add_RateATid;
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+	pHalFunc->AntDivBeforeLinkHandler = &SwAntDivBeforeLink8192C;
+	pHalFunc->AntDivCompareHandler = &SwAntDivCompare8192C;
+#endif
+
+	pHalFunc->read_bbreg = &rtl8192c_PHY_QueryBBReg;
+	pHalFunc->write_bbreg = &rtl8192c_PHY_SetBBReg;
+	pHalFunc->read_rfreg = &rtl8192c_PHY_QueryRFReg;
+	pHalFunc->write_rfreg = &rtl8192c_PHY_SetRFReg;
+
+	//Efuse related function
+	pHalFunc->EfusePowerSwitch = &rtl8192c_EfusePowerSwitch;
+	pHalFunc->ReadEFuse = &rtl8192c_ReadEFuse;
+	pHalFunc->EFUSEGetEfuseDefinition = &rtl8192c_EFUSE_GetEfuseDefinition;
+	pHalFunc->EfuseGetCurrentSize = &rtl8192c_EfuseGetCurrentSize;
+	pHalFunc->Efuse_PgPacketRead = &rtl8192c_Efuse_PgPacketRead;
+	pHalFunc->Efuse_PgPacketWrite = &rtl8192c_Efuse_PgPacketWrite;
+	pHalFunc->Efuse_WordEnableDataWrite = &rtl8192c_Efuse_WordEnableDataWrite;
+
+#ifdef DBG_CONFIG_ERROR_DETECT
+	pHalFunc->sreset_init_value = &sreset_init_value;
+	pHalFunc->sreset_reset_value = &sreset_reset_value;	
+	pHalFunc->silentreset = &rtl8192c_silentreset_for_specific_platform;
+	pHalFunc->sreset_xmit_status_check = &rtl8192c_sreset_xmit_status_check;
+	pHalFunc->sreset_linked_status_check  = &rtl8192c_sreset_linked_status_check;
+	pHalFunc->sreset_get_wifi_status  = &sreset_get_wifi_status;
+#endif
+
+#ifdef CONFIG_IOL
+	pHalFunc->IOL_exec_cmds_sync = &rtl8192c_IOL_exec_cmds_sync;
+#endif
+	pHalFunc->hal_notch_filter = &hal_notch_filter_8192c;
+	pHalFunc->hal_reset_security_engine = hal_reset_security_engine_8192c;
+
+	pHalFunc->c2h_handler = c2h_handler_8192c;
+	pHalFunc->c2h_id_filter_ccx = c2h_id_filter_ccx_8192c;
+}
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_mp.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_mp.c
new file mode 100755
index 00000000..a4194c4c
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_mp.c
@@ -0,0 +1,1207 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTL8192C_MP_C_
+#ifdef CONFIG_MP_INCLUDED
+
+#include <drv_types.h>
+#include <rtw_mp.h>
+
+#ifdef CONFIG_RTL8192C
+#include <rtl8192c_hal.h>
+#endif
+
+
+
+s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+
+	if (!netif_running(padapter->pnetdev)) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: interface not opened!\n"));
+		return _FAIL;
+	}
+
+	if (check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _FALSE) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: not in MP mode!\n"));
+		return _FAIL;
+	}
+
+	if (enable)
+		pdmpriv->TxPowerTrackControl = _TRUE;
+	else
+		pdmpriv->TxPowerTrackControl = _FALSE;
+
+	return _SUCCESS;
+}
+
+void Hal_GetPowerTracking(PADAPTER padapter, u8 *enable)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+
+	*enable = pdmpriv->TxPowerTrackControl;
+}
+
+static void Hal_disable_dm(PADAPTER padapter)
+{
+	u8 v8;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+
+	//3 1. disable firmware dynamic mechanism
+	// disable Power Training, Rate Adaptive
+	v8 = rtw_read8(padapter, REG_BCN_CTRL);
+	v8 &= ~EN_BCN_FUNCTION;
+	rtw_write8(padapter, REG_BCN_CTRL, v8);
+
+	//3 2. disable driver dynamic mechanism
+	// disable Dynamic Initial Gain
+	// disable High Power
+	// disable Power Tracking
+	Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
+
+	// enable APK, LCK and IQK but disable power tracking
+	pdmpriv->TxPowerTrackControl = _FALSE;
+	Switch_DM_Func(padapter, DYNAMIC_FUNC_SS, _TRUE);
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_SwitchRfSetting
+ *
+ * Overview:	Change RF Setting when we siwthc channel/rate/BW for MP.
+ *
+ * Input:       IN	PADAPTER				pAdapter
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 01/08/2009	MHC		Suggestion from SD3 Willis for 92S series.
+ * 01/09/2009	MHC		Add CCK modification for 40MHZ. Suggestion from SD3.
+ *
+ *---------------------------------------------------------------------------*/
+void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+	struct mp_priv *pmp = &pAdapter->mppriv;
+	u8 ChannelToSw = pmp->channel, eRFPath = RF_PATH_A;
+	u8 ulRateIdx = pmp->rateidx;
+	u8 ulbandwidth = pmp->bandwidth;
+	PMPT_CONTEXT	pMptCtx = &(pAdapter->mppriv.MptCtx);
+    BOOLEAN             bInteralPA = _FALSE;
+    u32				value = 0;
+
+#ifdef CONFIG_USB_HCI
+	if (IS_92C_SERIAL(pHalData->VersionID))
+	{
+		//92CE-VAU (92cu mCard)
+		if( BOARD_MINICARD == pHalData->BoardType)
+		{
+			if (ulRateIdx < MPT_RATE_6M)					// CCK rate
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400);
+			}
+			else 											//OFDM~MCS rate
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000);
+			}
+		}
+		else	//92CU dongle
+		{
+			if (ulRateIdx < MPT_RATE_6M)	// CCK rate
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400);
+			}
+			else if (ChannelToSw & BIT0)	// OFDM rate, odd number channel
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200);
+			}
+			else if (ChannelToSw == 4)	// OFDM rate, even number channel
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28200);
+				write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe0004);
+				write_rfreg(pAdapter, 0, RF_SYN_G7, 0x709);
+				rtw_msleep_os(1);
+				write_rfreg(pAdapter, 0, RF_SYN_G7, 0x4B333);
+			}
+			else if(ChannelToSw == 10)	// OFDM rate, even number channel
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28000);
+				write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe000A);
+				write_rfreg(pAdapter, 0, RF_SYN_G7, 0x709);
+				rtw_msleep_os(1);
+				write_rfreg(pAdapter, 0, RF_SYN_G7, 0x7B333);
+			}
+			else if(ChannelToSw == 12)	// OFDM rate, even number channel
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28200);
+				write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe000C);
+				write_rfreg(pAdapter, 0, RF_SYN_G7, 0x50B);
+				rtw_msleep_os(1);
+				write_rfreg(pAdapter, 0, RF_SYN_G7, 0x4B333);
+			}
+			else
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200);
+			}
+		}
+	}
+	else	//88cu
+	{
+
+		//mcard interface
+
+		if( BOARD_MINICARD == pHalData->BoardType)
+		{
+			if (ulRateIdx < MPT_RATE_6M)	// CCK rate
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400);
+			}
+			else 	//OFDM~MCS rate
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200);
+			}
+
+			if(ChannelToSw == 6 || ChannelToSw == 8)
+			{
+				write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x22);
+				write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x22);
+				write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, 0x4F);
+			}
+			else
+			{
+				write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x20);
+				write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x20);
+				write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, pMptCtx->backup0xc30);
+			}
+		}
+		else
+		{
+			if (ulRateIdx < MPT_RATE_6M)	// CCK rate
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400);
+			}
+			else if (ChannelToSw & BIT0)	// OFDM rate, odd number channel
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200);
+			}
+			else
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000);
+			}
+		}
+	}
+
+#else	//PCI_INTERFACE
+
+	if (ulRateIdx < MPT_RATE_6M)	// CCK rate
+	{
+		write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400);
+	}
+	else	//OFDM~MCS rate
+	{
+		write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000);
+	}
+	//88CE
+	if(!IS_92C_SERIAL(pHalData->VersionID))
+	{
+		if(ChannelToSw == 6 || ChannelToSw == 8)
+		{
+			write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x22);
+			write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x22);
+			write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, 0x4F);
+		}
+		else
+		{
+			write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pMptCtx->backup0xc50);
+			write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pMptCtx->backup0xc58);
+			write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, pMptCtx->backup0xc30);
+		}
+	 }
+
+#endif //CONFIG_USB_HCI
+
+
+}
+/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/
+
+/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
+void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14)
+{
+	u32		TempVal = 0, TempVal2 = 0, TempVal3 = 0;
+	u32		CurrCCKSwingVal = 0, CCKSwingIndex = 12;
+	u8		i;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+
+	// get current cck swing value and check 0xa22 & 0xa23 later to match the table.
+	CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord);
+
+	if (!bInCH14)
+	{
+		// Readback the current bb cck swing value and compare with the table to
+		// get the current swing index
+		for (i = 0; i < CCK_TABLE_SIZE; i++)
+		{
+			if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) &&
+				(((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1]))
+			{
+				CCKSwingIndex = i;
+//				RT_TRACE(COMP_INIT, DBG_LOUD,("Ch1~13, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n",
+//					(rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex));
+				break;
+			}
+		}
+
+		//Write 0xa22 0xa23
+		TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] +
+				(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8) ;
+
+
+		//Write 0xa24 ~ 0xa27
+		TempVal2 = 0;
+		TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] +
+				(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) +
+				(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16 )+
+				(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24);
+
+		//Write 0xa28  0xa29
+		TempVal3 = 0;
+		TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] +
+				(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8) ;
+	}
+	else
+	{
+		for (i = 0; i < CCK_TABLE_SIZE; i++)
+		{
+			if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) &&
+				(((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1]))
+			{
+				CCKSwingIndex = i;
+//				RT_TRACE(COMP_INIT, DBG_LOUD,("Ch14, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n",
+//					(rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex));
+				break;
+			}
+		}
+
+		//Write 0xa22 0xa23
+		TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] +
+				(CCKSwingTable_Ch14[CCKSwingIndex][1]<<8) ;
+
+		//Write 0xa24 ~ 0xa27
+		TempVal2 = 0;
+		TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] +
+				(CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) +
+				(CCKSwingTable_Ch14[CCKSwingIndex][4]<<16 )+
+				(CCKSwingTable_Ch14[CCKSwingIndex][5]<<24);
+
+		//Write 0xa28  0xa29
+		TempVal3 = 0;
+		TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] +
+				(CCKSwingTable_Ch14[CCKSwingIndex][7]<<8) ;
+	}
+
+	write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal);
+	write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2);
+	write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3);
+}
+
+void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven)
+{
+	s32		TempCCk;
+	u8		CCK_index, CCK_index_old;
+	u8		Action = 0;	//0: no action, 1: even->odd, 2:odd->even
+	u8		TimeOut = 100;
+	s32		i = 0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;
+
+
+	if (!IS_92C_SERIAL(pHalData->VersionID))
+		return;
+#if 0
+	while(PlatformAtomicExchange(&Adapter->IntrCCKRefCount, TRUE) == TRUE)
+	{
+		PlatformSleepUs(100);
+		TimeOut--;
+		if(TimeOut <= 0)
+		{
+			RTPRINT(FINIT, INIT_TxPower,
+			 ("!!!MPT_CCKTxPowerAdjustbyIndex Wait for check CCK gain index too long!!!\n" ));
+			break;
+		}
+	}
+#endif
+	if (beven && !pMptCtx->bMptIndexEven)	//odd->even
+	{
+		Action = 2;
+		pMptCtx->bMptIndexEven = _TRUE;
+	}
+	else if (!beven && pMptCtx->bMptIndexEven)	//even->odd
+	{
+		Action = 1;
+		pMptCtx->bMptIndexEven = _FALSE;
+	}
+
+	if (Action != 0)
+	{
+		//Query CCK default setting From 0xa24
+		TempCCk = read_bbreg(pAdapter, rCCK0_TxFilter2, bMaskDWord) & bMaskCCK;
+		for (i = 0; i < CCK_TABLE_SIZE; i++)
+		{
+			if (pHalData->dmpriv.bCCKinCH14)
+			{
+				if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4) == _TRUE)
+				{
+					CCK_index_old = (u8) i;
+//					RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch 14 %d\n",
+//						rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14));
+					break;
+				}
+			}
+			else
+			{
+				if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4) == _TRUE)
+				{
+					CCK_index_old = (u8) i;
+//					RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch14 %d\n",
+//						rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14));
+					break;
+				}
+			}
+		}
+
+		if (Action == 1)
+			CCK_index = CCK_index_old - 1;
+		else
+			CCK_index = CCK_index_old + 1;
+
+//		RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: new CCK_index=0x%x\n",
+//			 CCK_index));
+
+		//Adjust CCK according to gain index
+		if (!pHalData->dmpriv.bCCKinCH14) {
+			rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]);
+			rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]);
+			rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]);
+			rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]);
+			rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]);
+			rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]);
+			rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]);
+			rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]);
+		} else {
+			rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]);
+			rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]);
+			rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]);
+			rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]);
+			rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]);
+			rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]);
+			rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]);
+			rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]);
+		}
+	}
+#if 0
+	RTPRINT(FINIT, INIT_TxPower,
+	("MPT_CCKTxPowerAdjustbyIndex 0xa20=%x\n", PlatformEFIORead4Byte(Adapter, 0xa20)));
+
+	PlatformAtomicExchange(&Adapter->IntrCCKRefCount, FALSE);
+#endif
+}
+/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
+
+/*
+ * SetChannel
+ * Description
+ *	Use H2C command to change channel,
+ *	not only modify rf register, but also other setting need to be done.
+ */
+void Hal_SetChannel(PADAPTER pAdapter)
+{
+#if 0
+	struct mp_priv *pmp = &pAdapter->mppriv;
+
+//	SelectChannel(pAdapter, pmp->channel);
+	set_channel_bwmode(pAdapter, pmp->channel, pmp->channel_offset, pmp->bandwidth);
+#else
+	u8 		eRFPath;
+
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct mp_priv	*pmp = &pAdapter->mppriv;
+	u8		channel = pmp->channel;
+	u8		bandwidth = pmp->bandwidth;
+	u8		rate = pmp->rateidx;
+
+
+	// set RF channel register
+	for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++)
+	{
+      if(IS_HARDWARE_TYPE_8192D(pAdapter))
+			_write_rfreg(pAdapter, (RF_RADIO_PATH_E)eRFPath, rRfChannel, 0xFF, channel);
+		else
+		_write_rfreg(pAdapter, eRFPath, rRfChannel, 0x3FF, channel);
+	}
+	Hal_mpt_SwitchRfSetting(pAdapter);
+
+	SelectChannel(pAdapter, channel);
+
+	if (pHalData->CurrentChannel == 14 && !pHalData->dmpriv.bCCKinCH14) {
+		pHalData->dmpriv.bCCKinCH14 = _TRUE;
+		Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14);
+	}
+	else if (pHalData->CurrentChannel != 14 && pHalData->dmpriv.bCCKinCH14) {
+		pHalData->dmpriv.bCCKinCH14 = _FALSE;
+		Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14);
+	}
+
+#endif
+}
+
+/*
+ * Notice
+ *	Switch bandwitdth may change center frequency(channel)
+ */
+void Hal_SetBandwidth(PADAPTER pAdapter)
+{
+	struct mp_priv *pmp = &pAdapter->mppriv;
+
+
+	SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset);
+	Hal_mpt_SwitchRfSetting(pAdapter);
+}
+
+void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower)
+{
+	u32 tmpval = 0;
+
+
+	// rf-A cck tx power
+	write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]);
+	tmpval = (TxPower[RF_PATH_A]<<16) | (TxPower[RF_PATH_A]<<8) | TxPower[RF_PATH_A];
+	write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
+
+	// rf-B cck tx power
+	write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]);
+	tmpval = (TxPower[RF_PATH_B]<<16) | (TxPower[RF_PATH_B]<<8) | TxPower[RF_PATH_B];
+	write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-SetCCKTxPower: A[0x%02x] B[0x%02x]\n",
+		  TxPower[RF_PATH_A], TxPower[RF_PATH_B]));
+}
+
+void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower)
+{
+	u32 TxAGC = 0;
+	u8 tmpval = 0;
+	PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+
+	// HT Tx-rf(A)
+	tmpval = TxPower[RF_PATH_A];
+	TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval;
+
+	write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC);
+
+	// HT Tx-rf(B)
+	tmpval = TxPower[RF_PATH_B];
+	TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval;
+
+	write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC);
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-SetOFDMTxPower: A[0x%02x] B[0x%02x]\n",
+		  TxPower[RF_PATH_A], TxPower[RF_PATH_B]));
+}
+
+void Hal_SetAntennaPathPower(PADAPTER pAdapter)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+	u8 TxPowerLevel[MAX_RF_PATH_NUMS];
+	u8 rfPath;
+
+	TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx;
+	TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b;
+
+	switch (pAdapter->mppriv.antenna_tx)
+	{
+		case ANTENNA_A:
+		default:
+			rfPath = RF_PATH_A;
+			break;
+		case ANTENNA_B:
+			rfPath = RF_PATH_B;
+			break;
+		case ANTENNA_C:
+			rfPath = RF_PATH_C;
+			break;
+	}
+
+	switch (pHalData->rf_chip)
+	{
+		case RF_8225:
+		case RF_8256:
+		case RF_6052:
+			Hal_SetCCKTxPower(pAdapter, TxPowerLevel);
+			if (pAdapter->mppriv.rateidx < MPT_RATE_6M)	// CCK rate
+				Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0);
+			Hal_SetOFDMTxPower(pAdapter, TxPowerLevel);
+			break;
+
+		default:
+			break;
+	}
+}
+
+void Hal_SetTxPower(PADAPTER pAdapter)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+	u8 TxPower = pAdapter->mppriv.txpoweridx;
+	u8 TxPowerLevel[MAX_RF_PATH_NUMS];
+	u8 rf, rfPath;
+
+	for (rf = 0; rf < MAX_RF_PATH_NUMS; rf++) {
+		TxPowerLevel[rf] = TxPower;
+	}
+
+	switch (pAdapter->mppriv.antenna_tx)
+	{
+		case ANTENNA_A:
+		default:
+			rfPath = RF_PATH_A;
+			break;
+		case ANTENNA_B:
+			rfPath = RF_PATH_B;
+			break;
+		case ANTENNA_C:
+			rfPath = RF_PATH_C;
+			break;
+	}
+
+	switch (pHalData->rf_chip)
+	{
+		// 2008/09/12 MH Test only !! We enable the TX power tracking for MP!!!!!
+		// We should call normal driver API later!!
+		case RF_8225:
+		case RF_8256:
+		case RF_6052:
+			Hal_SetCCKTxPower(pAdapter, TxPowerLevel);
+			if (pAdapter->mppriv.rateidx < MPT_RATE_6M)	// CCK rate
+				Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0);
+			Hal_SetOFDMTxPower(pAdapter, TxPowerLevel);
+			break;
+
+		default:
+			break;
+	}
+
+//	SetCCKTxPower(pAdapter, TxPower);
+//	SetOFDMTxPower(pAdapter, TxPower);
+}
+
+void Hal_SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset)
+{
+	u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC;
+
+	TxAGCOffset_B = (ulTxAGCOffset&0x000000ff);
+	TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8);
+	TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16);
+
+	tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B);
+	write_bbreg(pAdapter, rFPGA0_TxGainStage,
+			(bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC);
+}
+
+void Hal_SetDataRate(PADAPTER pAdapter)
+{
+	Hal_mpt_SwitchRfSetting(pAdapter);
+}
+
+#if  !defined (CONFIG_RTL8192C)  &&  !defined (CONFIG_RTL8192D)
+/*------------------------------Define structure----------------------------*/
+typedef struct _R_ANTENNA_SELECT_OFDM {
+	u32	r_tx_antenna:4;
+	u32	r_ant_l:4;
+	u32	r_ant_non_ht:4;
+	u32	r_ant_ht1:4;
+	u32	r_ant_ht2:4;
+	u32	r_ant_ht_s1:4;
+	u32	r_ant_non_ht_s1:4;
+	u32	OFDM_TXSC:2;
+	u32	Reserved:2;
+}R_ANTENNA_SELECT_OFDM;
+
+typedef struct _R_ANTENNA_SELECT_CCK {
+	u8	r_cckrx_enable_2:2;
+	u8	r_cckrx_enable:2;
+	u8	r_ccktx_enable:4;
+}R_ANTENNA_SELECT_CCK;
+#endif
+
+void Hal_SetAntenna(PADAPTER pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+	R_ANTENNA_SELECT_OFDM *p_ofdm_tx;	/* OFDM Tx register */
+	R_ANTENNA_SELECT_CCK *p_cck_txrx;
+
+	u8	r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0;
+	u8	chgTx = 0, chgRx = 0;
+	u32	r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0;
+
+
+	p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val;
+	p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val;
+
+	p_ofdm_tx->r_ant_ht1	= 0x1;
+	p_ofdm_tx->r_ant_ht2	= 0x2;	// Second TX RF path is A
+	p_ofdm_tx->r_ant_non_ht = 0x3;	// 0x1+0x2=0x3
+
+	switch (pAdapter->mppriv.antenna_tx)
+	{
+		case ANTENNA_A:
+			p_ofdm_tx->r_tx_antenna		= 0x1;
+			r_ofdm_tx_en_val		= 0x1;
+			p_ofdm_tx->r_ant_l 		= 0x1;
+			p_ofdm_tx->r_ant_ht_s1 		= 0x1;
+			p_ofdm_tx->r_ant_non_ht_s1 	= 0x1;
+			p_cck_txrx->r_ccktx_enable	= 0x8;
+			chgTx = 1;
+
+			// From SD3 Willis suggestion !!! Set RF A=TX and B as standby
+//			if (IS_HARDWARE_TYPE_8192S(pAdapter))
+			{
+			write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2);
+			write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1);
+			r_ofdm_tx_en_val		= 0x3;
+
+			// Power save
+			//cosa r_ant_select_ofdm_val = 0x11111111;
+
+			// We need to close RFB by SW control
+			if (pHalData->rf_type == RF_2T2R)
+			{
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1);
+				PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0);
+			}
+			}
+			break;
+
+		case ANTENNA_B:
+			p_ofdm_tx->r_tx_antenna		= 0x2;
+			r_ofdm_tx_en_val		= 0x2;
+			p_ofdm_tx->r_ant_l 		= 0x2;
+			p_ofdm_tx->r_ant_ht_s1 		= 0x2;
+			p_ofdm_tx->r_ant_non_ht_s1 	= 0x2;
+			p_cck_txrx->r_ccktx_enable	= 0x4;
+			chgTx = 1;
+
+			// From SD3 Willis suggestion !!! Set RF A as standby
+			//if (IS_HARDWARE_TYPE_8192S(pAdapter))
+			{
+			PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1);
+			PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2);
+//			r_ofdm_tx_en_val		= 0x3;
+
+			// Power save
+			//cosa r_ant_select_ofdm_val = 0x22222222;
+
+			// 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table.
+			// 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control
+			if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R)
+			{
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1);
+				PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0);
+//				PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1);
+			}
+			}
+		break;
+
+		case ANTENNA_AB:	// For 8192S
+			p_ofdm_tx->r_tx_antenna		= 0x3;
+			r_ofdm_tx_en_val		= 0x3;
+			p_ofdm_tx->r_ant_l 		= 0x3;
+			p_ofdm_tx->r_ant_ht_s1 		= 0x3;
+			p_ofdm_tx->r_ant_non_ht_s1 	= 0x3;
+			p_cck_txrx->r_ccktx_enable	= 0xC;
+			chgTx = 1;
+
+			// From SD3 Willis suggestion !!! Set RF B as standby
+			//if (IS_HARDWARE_TYPE_8192S(pAdapter))
+			{
+			PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2);
+			PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2);
+
+			// Disable Power save
+			//cosa r_ant_select_ofdm_val = 0x3321333;
+#if 0
+			// 2008/10/31 MH From SD3 Willi's suggestion. We must read RFA 2T table.
+			if ((pHalData->VersionID == VERSION_8192S_ACUT)) // For RTL8192SU A-Cut only, by Roger, 2008.11.07.
+			{
+				mpt_RFConfigFromPreParaArrary(pAdapter, 1, RF_PATH_A);
+			}
+#endif
+			// 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control
+			if (pHalData->rf_type == RF_2T2R)
+			{
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0);
+//				PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1);
+			}
+			}
+			break;
+
+		default:
+			break;
+	}
+
+	//
+	// r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D
+	// r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D
+	// r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D
+	//
+	switch (pAdapter->mppriv.antenna_rx)
+	{
+		case ANTENNA_A:
+			r_rx_antenna_ofdm 		= 0x1;	// A
+			p_cck_txrx->r_cckrx_enable 	= 0x0;	// default: A
+			p_cck_txrx->r_cckrx_enable_2	= 0x0;	// option: A
+			chgRx = 1;
+			break;
+
+		case ANTENNA_B:
+			r_rx_antenna_ofdm 		= 0x2;	// B
+			p_cck_txrx->r_cckrx_enable 	= 0x1;	// default: B
+			p_cck_txrx->r_cckrx_enable_2	= 0x1;	// option: B
+			chgRx = 1;
+			break;
+
+		case ANTENNA_AB:
+			r_rx_antenna_ofdm 		= 0x3;	// AB
+			p_cck_txrx->r_cckrx_enable 	= 0x0;	// default:A
+			p_cck_txrx->r_cckrx_enable_2	= 0x1;	// option:B
+			chgRx = 1;
+			break;
+
+		default:
+			break;
+	}
+
+	if (chgTx && chgRx)
+	{
+		switch(pHalData->rf_chip)
+		{
+			case RF_8225:
+			case RF_8256:
+			case RF_6052:
+				//r_ant_sel_cck_val = r_ant_select_cck_val;
+				PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val);	//OFDM Tx
+				PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val);		//OFDM Tx
+				PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm);	//OFDM Rx
+				PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm);	//OFDM Rx
+				PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val);//r_ant_sel_cck_val);		//CCK TxRx
+
+				break;
+
+			default:
+				break;
+		}
+	}
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n"));
+}
+
+s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+
+
+	if (!netif_running(pAdapter->pnetdev)) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n"));
+		return _FAIL;
+	}
+
+	if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n"));
+		return _FAIL;
+	}
+
+	target_ther &= 0xff;
+	if (target_ther < 0x07)
+		target_ther = 0x07;
+	else if (target_ther > 0x1d)
+		target_ther = 0x1d;
+
+	pHalData->EEPROMThermalMeter = target_ther;
+
+	return _SUCCESS;
+}
+
+void Hal_TriggerRFThermalMeter(PADAPTER pAdapter)
+{
+  
+	write_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x60);	// 0x24: RF Reg[6:5]
+
+//	RT_TRACE(_module_mp_,_drv_alert_, ("TriggerRFThermalMeter() finished.\n" ));
+}
+
+u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter)
+{
+	u32 ThermalValue = 0;
+
+	ThermalValue = _read_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x1F);	// 0x24: RF Reg[4:0]
+//	RT_TRACE(_module_mp_, _drv_alert_, ("ThermalValue = 0x%x\n", ThermalValue));
+	return (u8)ThermalValue;
+}
+
+void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value)
+{
+#if 0
+	fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER);
+	rtw_msleep_os(1000);
+	fw_cmd_data(pAdapter, value, 1);
+	*value &= 0xFF;
+#else
+
+	Hal_TriggerRFThermalMeter(pAdapter);
+	rtw_msleep_os(1000);
+	*value = Hal_ReadRFThermalMeter(pAdapter);
+#endif
+}
+
+void Hal_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart)
+{
+    HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+	pAdapter->mppriv.MptCtx.bSingleCarrier = bStart;
+	if (bStart)// Start Single Carrier.
+	{
+		RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test start\n"));
+		// 1. if OFDM block on?
+		if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
+			write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on
+
+		{
+		// 2. set CCK test mode off, set to CCK normal mode
+		write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
+		// 3. turn on scramble setting
+		write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
+         }
+		// 4. Turn On Single Carrier Tx and turn off the other test modes.
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+#ifdef CONFIG_RTL8192C
+		// 5. Disable TX power saving at STF & LLTF
+		write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 1);
+#endif
+	}
+	else// Stop Single Carrier.
+	{
+		RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test stop\n"));
+
+		// Turn off all test modes.
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+#ifdef CONFIG_RTL8192C
+		// Cancel disable TX power saving at STF&LLTF
+		write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 0);
+#endif
+		//Delay 10 ms //delay_ms(10);
+		rtw_msleep_os(10);
+
+		//BB Reset
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+	}
+}
+
+
+void Hal_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	BOOLEAN		is92C = IS_92C_SERIAL(pHalData->VersionID);
+
+	u8 rfPath;
+
+	switch (pAdapter->mppriv.antenna_tx)
+	{
+		case ANTENNA_A:
+		default:
+			rfPath = RF_PATH_A;
+			break;
+		case ANTENNA_B:
+			rfPath = RF_PATH_B;
+			break;
+		case ANTENNA_C:
+			rfPath = RF_PATH_C;
+			break;
+	}
+
+	pAdapter->mppriv.MptCtx.bSingleTone = bStart;
+	if (bStart)// Start Single Tone.
+	{
+		RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test start\n"));
+		write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0);
+		write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0);
+
+		if (is92C)
+       		 {
+			_write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x01);
+			rtw_usleep_os(100);
+			if (rfPath == RF_PATH_A)
+				write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x10000); // PAD all on.
+			else if (rfPath == RF_PATH_B)
+				write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x10000); // PAD all on.
+		} else {
+			write_rfreg(pAdapter, rfPath, 0x21, 0xd4000);
+			rtw_usleep_os(100);
+		}
+		
+		write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); // PAD all on.
+		rtw_usleep_os(100);
+	}
+	else// Stop Single Tone.
+	{
+		RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test stop\n"));
+		write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1);
+		write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
+
+		if (is92C) {
+			_write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x00);
+			rtw_usleep_os(100);
+			write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x32d75); // PAD all on.
+			write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x32d75); // PAD all on.
+			rtw_usleep_os(100);
+		} else {
+			write_rfreg(pAdapter, rfPath, 0x21, 0x54000);
+			rtw_usleep_os(100);
+
+			write_rfreg(pAdapter, rfPath, 0x00, 0x30000); // PAD all on.
+			rtw_usleep_os(100);
+		}
+	}
+	
+}
+
+
+void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart)
+{
+	pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart;
+	if (bStart) // Start Carrier Suppression.
+	{
+		RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test start\n"));
+		//if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B)
+		if (pAdapter->mppriv.rateidx <= MPT_RATE_11M)
+		  {
+			// 1. if CCK block on?
+			if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
+				write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on
+
+			//Turn Off All Test Mode
+			write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+			write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+			write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+
+			write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2);    //transmit mode
+			write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0);  //turn off scramble setting
+
+			//Set CCK Tx Test Rate
+			//PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, pMgntInfo->ForcedDataRate);
+			write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0);    //Set FTxRate to 1Mbps
+		}
+	}
+	else// Stop Carrier Suppression.
+	{
+		RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test stop\n"));
+		//if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B)
+		if (pAdapter->mppriv.rateidx <= MPT_RATE_11M ) {
+			write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0);    //normal mode
+			write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1);  //turn on scramble setting
+
+			//BB Reset
+			write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+			write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+		}
+	}
+	//DbgPrint("\n MPT_ProSetCarrierSupp() is finished. \n");
+}
+
+void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart)
+{
+	u32 cckrate;
+
+	if (bStart)
+	{
+		RT_TRACE(_module_mp_, _drv_alert_,
+			 ("SetCCKContinuousTx: test start\n"));
+
+		// 1. if CCK block on?
+		if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
+			write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on
+
+		//Turn Off All Test Mode
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+		//Set CCK Tx Test Rate
+		#if 0
+		switch(pAdapter->mppriv.rateidx)
+		{
+			case 2:
+				cckrate = 0;
+				break;
+			case 4:
+				cckrate = 1;
+				break;
+			case 11:
+				cckrate = 2;
+				break;
+			case 22:
+				cckrate = 3;
+				break;
+			default:
+				cckrate = 0;
+				break;
+		}
+		#else
+		cckrate  = pAdapter->mppriv.rateidx;
+		#endif
+		write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate);
+		write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2);	//transmit mode
+		write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);	//turn on scramble setting
+
+#ifdef CONFIG_RTL8192C
+		// Patch for CCK 11M waveform
+		if (cckrate == MPT_RATE_1M)
+			write_bbreg(pAdapter, 0xA71, BIT(6), bDisable);
+		else
+			write_bbreg(pAdapter, 0xA71, BIT(6), bEnable);
+#endif
+
+	}
+	else {
+		RT_TRACE(_module_mp_, _drv_info_,
+			 ("SetCCKContinuousTx: test stop\n"));
+
+		write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0);	//normal mode
+		write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);	//turn on scramble setting
+
+		//BB Reset
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+	}
+
+	pAdapter->mppriv.MptCtx.bCckContTx = bStart;
+	pAdapter->mppriv.MptCtx.bOfdmContTx = _FALSE;
+}/* mpt_StartCckContTx */
+
+void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart)
+{
+    HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+	if (bStart) {
+		RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n"));
+		// 1. if OFDM block on?
+		if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
+			write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on
+        {
+
+		// 2. set CCK test mode off, set to CCK normal mode
+		write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
+
+		// 3. turn on scramble setting
+		write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
+        }
+		// 4. Turn On Continue Tx and turn off the other test modes.
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+	} else {
+		RT_TRACE(_module_mp_,_drv_info_, ("SetOFDMContinuousTx: test stop\n"));
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+		//Delay 10 ms
+		rtw_msleep_os(10);
+		//BB Reset
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+	}
+
+	pAdapter->mppriv.MptCtx.bCckContTx = _FALSE;
+	pAdapter->mppriv.MptCtx.bOfdmContTx = bStart;
+}/* mpt_StartOfdmContTx */
+
+void Hal_SetContinuousTx(PADAPTER pAdapter, u8 bStart)
+{
+#if 0
+	// ADC turn off [bit24-21] adc port0 ~ port1
+	if (bStart) {
+		write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) & 0xFE1FFFFF);
+		rtw_usleep_os(100);
+	}
+#endif
+	RT_TRACE(_module_mp_, _drv_info_,
+		 ("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx));
+
+	pAdapter->mppriv.MptCtx.bStartContTx = bStart;
+	if (pAdapter->mppriv.rateidx <= MPT_RATE_11M)
+	{
+		Hal_SetCCKContinuousTx(pAdapter, bStart);
+	}
+	else if ((pAdapter->mppriv.rateidx >= MPT_RATE_6M) &&
+		 (pAdapter->mppriv.rateidx <= MPT_RATE_MCS15))
+	{
+		Hal_SetOFDMContinuousTx(pAdapter, bStart);
+	}
+#if 0
+	// ADC turn on [bit24-21] adc port0 ~ port1
+	if (!bStart) {
+		write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) | 0x01E00000);
+	}
+#endif
+}
+
+#endif // CONFIG_MP_INCLUDE
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_phycfg.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_phycfg.c
new file mode 100755
index 00000000..b86ac8ad
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_phycfg.c
@@ -0,0 +1,4841 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/******************************************************************************
+
+ Module:	rtl8192c_phycfg.c	
+
+ Note:		Merge 92SE/SU PHY config as below
+			1. BB register R/W API
+ 			2. RF register R/W API
+ 			3. Initial BB/RF/MAC config by reading BB/MAC/RF txt.
+ 			3. Power setting API
+ 			4. Channel switch API
+ 			5. Initial gain switch API.
+ 			6. Other BB/MAC/RF API.
+ 			
+ Function:	PHY: Extern function, phy: local function
+ 		 
+ Export:	PHY_FunctionName
+
+ Abbrev:	NONE
+
+ History:
+	Data		Who		Remark	
+	08/08/2008  MHC    	1. Port from 9x series phycfg.c
+						2. Reorganize code arch and ad description.
+						3. Collect similar function.
+						4. Seperate extern/local API.
+	08/12/2008	MHC		We must merge or move USB PHY relative function later.
+	10/07/2008	MHC		Add IQ calibration for PHY.(Only 1T2R mode now!!!)
+	11/06/2008	MHC		Add TX Power index PG file to config in 0xExx register
+						area to map with EEPROM/EFUSE tx pwr index.
+	
+******************************************************************************/
+#define _HAL_8192C_PHYCFG_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+
+#ifdef CONFIG_IOL
+#include <rtw_iol.h>
+#endif
+
+#include <rtl8192c_hal.h>
+
+
+/*---------------------------Define Local Constant---------------------------*/
+/* Channel switch:The size of command tables for switch channel*/
+#define MAX_PRECMD_CNT 16
+#define MAX_RFDEPENDCMD_CNT 16
+#define MAX_POSTCMD_CNT 16
+
+#define MAX_DOZE_WAITING_TIMES_9x 64
+
+/*---------------------------Define Local Constant---------------------------*/
+
+
+/*------------------------Define global variable-----------------------------*/
+
+/*------------------------Define local variable------------------------------*/
+
+
+/*--------------------Define export function prototype-----------------------*/
+// Please refer to header file
+/*--------------------Define export function prototype-----------------------*/
+
+/*----------------------------Function Body----------------------------------*/
+//
+// 1. BB register R/W API
+//
+
+/**
+* Function:	phy_CalculateBitShift
+*
+* OverView:	Get shifted position of the BitMask
+*
+* Input:
+*			u4Byte		BitMask,	
+*
+* Output:	none
+* Return:		u4Byte		Return the shift bit bit position of the mask
+*/
+static	u32
+phy_CalculateBitShift(
+	u32 BitMask
+	)
+{
+	u32 i;
+
+	for(i=0; i<=31; i++)
+	{
+		if ( ((BitMask>>i) &  0x1 ) == 1)
+			break;
+	}
+
+	return (i);
+}
+
+
+/**
+* Function:	PHY_QueryBBReg
+*
+* OverView:	Read "sepcific bits" from BB register
+*
+* Input:
+*			PADAPTER		Adapter,
+*			u4Byte			RegAddr,		//The target address to be readback
+*			u4Byte			BitMask		//The target bit position in the target address
+*										//to be readback	
+* Output:	None
+* Return:		u4Byte			Data			//The readback register value
+* Note:		This function is equal to "GetRegSetting" in PHY programming guide
+*/
+u32
+rtl8192c_PHY_QueryBBReg(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask
+	)
+{	
+  	u32	ReturnValue = 0, OriginalValue, BitShift;
+	u16	BBWaitCounter = 0;
+
+#if (DISABLE_BB_RF == 1)
+	return 0;
+#endif
+
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask));
+
+	OriginalValue = rtw_read32(Adapter, RegAddr);
+	BitShift = phy_CalculateBitShift(BitMask);
+	ReturnValue = (OriginalValue & BitMask) >> BitShift;
+
+	//RTPRINT(FPHY, PHY_BBR, ("BBR MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, OriginalValue));
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx), OriginalValue(%#lx)\n", RegAddr, BitMask, OriginalValue));
+
+	return (ReturnValue);
+
+}
+
+
+/**
+* Function:	PHY_SetBBReg
+*
+* OverView:	Write "Specific bits" to BB register (page 8~) 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			u4Byte			RegAddr,		//The target address to be modified
+*			u4Byte			BitMask		//The target bit position in the target address
+*										//to be modified	
+*			u4Byte			Data			//The new register value in the target bit position
+*										//of the target address			
+*
+* Output:	None
+* Return:		None
+* Note:		This function is equal to "PutRegSetting" in PHY programming guide
+*/
+
+VOID
+rtl8192c_PHY_SetBBReg(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask,
+	IN	u32		Data
+	)
+{
+	HAL_DATA_TYPE	*pHalData		= GET_HAL_DATA(Adapter);
+	//u16			BBWaitCounter	= 0;
+	u32			OriginalValue, BitShift;
+
+#if (DISABLE_BB_RF == 1)
+	return;
+#endif
+
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data));
+
+	if(BitMask!= bMaskDWord){//if not "double word" write
+		OriginalValue = rtw_read32(Adapter, RegAddr);
+		BitShift = phy_CalculateBitShift(BitMask);
+		Data = ((OriginalValue & (~BitMask)) | (Data << BitShift));
+	}
+
+	rtw_write32(Adapter, RegAddr, Data);
+
+	//RTPRINT(FPHY, PHY_BBW, ("BBW MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, Data));
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data));
+	
+}
+
+
+//
+// 2. RF register R/W API
+//
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_FwRFSerialRead()
+ *
+ * Overview:	We support firmware to execute RF-R/W.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	01/21/2008	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+static	u32
+phy_FwRFSerialRead(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset	)
+{
+	u32		retValue = 0;		
+	//RT_ASSERT(FALSE,("deprecate!\n"));
+	return	(retValue);
+
+}	/* phy_FwRFSerialRead */
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_FwRFSerialWrite()
+ *
+ * Overview:	We support firmware to execute RF-R/W.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	01/21/2008	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+static	VOID
+phy_FwRFSerialWrite(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u32				Data	)
+{
+	//RT_ASSERT(FALSE,("deprecate!\n"));
+}
+
+
+/**
+* Function:	phy_RFSerialRead
+*
+* OverView:	Read regster from RF chips 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			RF_RADIO_PATH_E	eRFPath,	//Radio path of A/B/C/D
+*			u4Byte			Offset,		//The target address to be read			
+*
+* Output:	None
+* Return:		u4Byte			reback value
+* Note:		Threre are three types of serial operations: 
+*			1. Software serial write
+*			2. Hardware LSSI-Low Speed Serial Interface 
+*			3. Hardware HSSI-High speed
+*			serial write. Driver need to implement (1) and (2).
+*			This function is equal to the combination of RF_ReadReg() and  RFLSSIRead()
+*/
+static	u32
+phy_RFSerialRead(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset
+	)
+{
+	u32						retValue = 0;
+	HAL_DATA_TYPE				*pHalData = GET_HAL_DATA(Adapter);
+	BB_REGISTER_DEFINITION_T	*pPhyReg = &pHalData->PHYRegDef[eRFPath];
+	u32						NewOffset;
+	u32 						tmplong,tmplong2;
+	u8					RfPiEnable=0;
+#if 0
+	if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs
+		return	retValue;
+	if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs
+		return	retValue;
+#endif
+	//
+	// Make sure RF register offset is correct 
+	//
+	Offset &= 0x3f;
+
+	//
+	// Switch page for 8256 RF IC
+	//
+	NewOffset = Offset;
+
+	// 2009/06/17 MH We can not execute IO for power save or other accident mode.
+	//if(RT_CANNOT_IO(Adapter))
+	//{
+	//	RTPRINT(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n"));
+	//	return	0xFFFFFFFF;
+	//}
+
+	// For 92S LSSI Read RFLSSIRead
+	// For RF A/B write 0x824/82c(does not work in the future) 
+	// We must use 0x824 for RF A and B to execute read trigger
+	tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord);
+	if(eRFPath == RF_PATH_A)
+		tmplong2 = tmplong;
+	else
+		tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord);
+
+	tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge;	//T65 RF
+	
+	PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge));	
+	rtw_udelay_os(10);// PlatformStallExecution(10);
+	
+	PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2);	
+	rtw_udelay_os(100);//PlatformStallExecution(100);
+	
+	PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong|bLSSIReadEdge);	
+	rtw_udelay_os(10);//PlatformStallExecution(10);
+
+	if(eRFPath == RF_PATH_A)
+		RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8);
+	else if(eRFPath == RF_PATH_B)
+		RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8);
+	
+	if(RfPiEnable)
+	{	// Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF
+		retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData);
+		//DBG_8192C("Readback from RF-PI : 0x%x\n", retValue);
+	}
+	else
+	{	//Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF
+		retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData);
+		//DBG_8192C("Readback from RF-SI : 0x%x\n", retValue);
+	}
+	//DBG_8192C("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue);
+	
+	return retValue;	
+		
+}
+
+
+
+/**
+* Function:	phy_RFSerialWrite
+*
+* OverView:	Write data to RF register (page 8~) 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			RF_RADIO_PATH_E	eRFPath,	//Radio path of A/B/C/D
+*			u4Byte			Offset,		//The target address to be read			
+*			u4Byte			Data			//The new register Data in the target bit position
+*										//of the target to be read			
+*
+* Output:	None
+* Return:		None
+* Note:		Threre are three types of serial operations: 
+*			1. Software serial write
+*			2. Hardware LSSI-Low Speed Serial Interface 
+*			3. Hardware HSSI-High speed
+*			serial write. Driver need to implement (1) and (2).
+*			This function is equal to the combination of RF_ReadReg() and  RFLSSIRead()
+ *
+ * Note: 		  For RF8256 only
+ *			 The total count of RTL8256(Zebra4) register is around 36 bit it only employs 
+ *			 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) 
+ *			 to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration
+ *			 programming guide" for more details. 
+ *			 Thus, we define a sub-finction for RTL8526 register address conversion
+ *		       ===========================================================
+ *			 Register Mode		RegCTL[1]		RegCTL[0]		Note
+ *								(Reg00[12])		(Reg00[10])
+ *		       ===========================================================
+ *			 Reg_Mode0				0				x			Reg 0 ~15(0x0 ~ 0xf)
+ *		       ------------------------------------------------------------------
+ *			 Reg_Mode1				1				0			Reg 16 ~30(0x1 ~ 0xf)
+ *		       ------------------------------------------------------------------
+ *			 Reg_Mode2				1				1			Reg 31 ~ 45(0x1 ~ 0xf)
+ *		       ------------------------------------------------------------------
+ *
+ *	2008/09/02	MH	Add 92S RF definition
+ *	
+ *
+ *
+*/
+static	VOID
+phy_RFSerialWrite(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u32				Data
+	)
+{
+	u32						DataAndAddr = 0;
+	HAL_DATA_TYPE				*pHalData = GET_HAL_DATA(Adapter);
+	BB_REGISTER_DEFINITION_T	*pPhyReg = &pHalData->PHYRegDef[eRFPath];
+	u32						NewOffset;
+	
+#if 0
+	//<Roger_TODO> We should check valid regs for RF_6052 case.
+	if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs
+		return;
+	if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs
+		return;
+#endif
+
+	// 2009/06/17 MH We can not execute IO for power save or other accident mode.
+	//if(RT_CANNOT_IO(Adapter))
+	//{
+	//	RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n"));
+	//	return;
+	//}
+
+	Offset &= 0x3f;
+
+	//
+	// Shadow Update
+	//
+	//PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data);
+
+	//
+	// Switch page for 8256 RF IC
+	//
+	NewOffset = Offset;
+
+	//
+	// Put write addr in [5:0]  and write data in [31:16]
+	//
+	//DataAndAddr = (Data<<16) | (NewOffset&0x3f);
+	DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff;	// T65 RF
+
+	//
+	// Write Operation
+	//
+	PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
+	//RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr));
+
+}
+
+
+/**
+* Function:	PHY_QueryRFReg
+*
+* OverView:	Query "Specific bits" to RF register (page 8~) 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			RF_RADIO_PATH_E	eRFPath,	//Radio path of A/B/C/D
+*			u4Byte			RegAddr,		//The target address to be read
+*			u4Byte			BitMask		//The target bit position in the target address
+*										//to be read	
+*
+* Output:	None
+* Return:		u4Byte			Readback value
+* Note:		This function is equal to "GetRFRegSetting" in PHY programming guide
+*/
+u32
+rtl8192c_PHY_QueryRFReg(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				RegAddr,
+	IN	u32				BitMask
+	)
+{
+	u32 Original_Value, Readback_Value, BitShift;	
+	//HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	//u8	RFWaitCounter = 0;
+	//_irqL	irqL;
+
+#if (DISABLE_BB_RF == 1)
+	return 0;
+#endif
+	
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), BitMask(%#lx)\n", RegAddr, eRFPath,BitMask));
+	
+#ifdef CONFIG_USB_HCI
+	//PlatformAcquireMutex(&pHalData->mxRFOperate);
+#else
+	//_enter_critical(&pHalData->rf_lock, &irqL);
+#endif
+
+	
+	Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
+	
+	BitShift =  phy_CalculateBitShift(BitMask);
+	Readback_Value = (Original_Value & BitMask) >> BitShift;	
+
+#ifdef CONFIG_USB_HCI
+	//PlatformReleaseMutex(&pHalData->mxRFOperate);
+#else
+	//_exit_critical(&pHalData->rf_lock, &irqL);
+#endif
+
+
+	//RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask,
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x),  Original_Value(%#lx)\n", 
+	//				RegAddr, eRFPath, Original_Value));
+	
+	return (Readback_Value);
+}
+
+/**
+* Function:	PHY_SetRFReg
+*
+* OverView:	Write "Specific bits" to RF register (page 8~) 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			RF_RADIO_PATH_E	eRFPath,	//Radio path of A/B/C/D
+*			u4Byte			RegAddr,		//The target address to be modified
+*			u4Byte			BitMask		//The target bit position in the target address
+*										//to be modified	
+*			u4Byte			Data			//The new register Data in the target bit position
+*										//of the target address			
+*
+* Output:	None
+* Return:		None
+* Note:		This function is equal to "PutRFRegSetting" in PHY programming guide
+*/
+VOID
+rtl8192c_PHY_SetRFReg(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				RegAddr,
+	IN	u32				BitMask,
+	IN	u32				Data
+	)
+{
+
+	//HAL_DATA_TYPE	*pHalData		= GET_HAL_DATA(Adapter);
+	//u1Byte			RFWaitCounter	= 0;
+	u32		Original_Value, BitShift;
+	//_irqL	irqL;
+
+#if (DISABLE_BB_RF == 1)
+	return;
+#endif
+	
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", 
+	//	RegAddr, BitMask, Data, eRFPath));
+	//RTPRINT(FINIT, INIT_RF, ("PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", 
+	//	RegAddr, BitMask, Data, eRFPath));
+
+
+#ifdef CONFIG_USB_HCI
+	//PlatformAcquireMutex(&pHalData->mxRFOperate);
+#else
+	//_enter_critical(&pHalData->rf_lock, &irqL);
+#endif
+
+	
+	// RF data is 12 bits only
+	if (BitMask != bRFRegOffsetMask) 
+	{
+		Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
+		BitShift =  phy_CalculateBitShift(BitMask);
+		Data = ((Original_Value & (~BitMask)) | (Data<< BitShift));
+	}
+		
+	phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data);
+	
+
+
+#ifdef CONFIG_USB_HCI
+	//PlatformReleaseMutex(&pHalData->mxRFOperate);
+#else
+	//_exit_critical(&pHalData->rf_lock, &irqL);
+#endif
+	
+	//PHY_QueryRFReg(Adapter,eRFPath,RegAddr,BitMask);
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", 
+	//		RegAddr, BitMask, Data, eRFPath));
+
+}
+
+
+//
+// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt.
+//
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigMACWithParaFile()
+ *
+ * Overview:    This function read BB parameters from general file format, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			ps1Byte 			pFileName			
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ * Note: 		The format of MACPHY_REG.txt is different from PHY and RF. 
+ *			[Register][Mask][Value]
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigMACWithParaFile(
+	IN	PADAPTER		Adapter,
+	IN	u8* 			pFileName
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	int		rtStatus = _SUCCESS;
+
+	return rtStatus;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigMACWithHeaderFile()
+ *
+ * Overview:    This function read BB parameters from Header file we gen, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			ps1Byte 			pFileName			
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ * Note: 		The format of MACPHY_REG.txt is different from PHY and RF. 
+ *			[Register][Mask][Value]
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigMACWithHeaderFile(
+	IN	PADAPTER		Adapter
+)
+{
+	u32					i = 0;
+	u32					ArrayLength = 0;
+	u32*				ptrArray;	
+	//HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(Adapter);
+
+	//2008.11.06 Modified by tynli.
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Read Rtl819XMACPHY_Array\n"));
+	ArrayLength = MAC_2T_ArrayLength;
+	ptrArray = Rtl819XMAC_Array;
+
+#ifdef CONFIG_IOL_MAC
+	if(rtw_IOL_applied(Adapter))
+	{
+		struct xmit_frame	*xmit_frame;
+		if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
+			return _FAIL;
+
+		for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column
+			rtw_IOL_append_WB_cmd(xmit_frame, ptrArray[i], (u8)ptrArray[i+1]);
+		}
+
+		return rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000);
+	}
+	else
+#endif
+	{
+		for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column
+			rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]);
+		}
+	}
+	
+	return _SUCCESS;
+	
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_MACConfig8192C
+ *
+ * Overview:	Condig MAC by header file or parameter file.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ *  When		Who		Remark
+ *  08/12/2008	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+int
+PHY_MACConfig8192C(
+	IN	PADAPTER	Adapter
+	)
+{
+	int		rtStatus = _SUCCESS;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	s8			*pszMACRegFile;
+	s8			sz88CMACRegFile[] = RTL8188C_PHY_MACREG;
+	s8			sz92CMACRegFile[] = RTL8192C_PHY_MACREG;
+	BOOLEAN		is92C = IS_92C_SERIAL(pHalData->VersionID);
+
+	if(is92C)
+		pszMACRegFile = sz92CMACRegFile;
+	else
+		pszMACRegFile = sz88CMACRegFile;
+
+	//
+	// Config MAC
+	//
+#ifdef CONFIG_EMBEDDED_FWIMG
+	rtStatus = phy_ConfigMACWithHeaderFile(Adapter);
+#else
+	
+	// Not make sure EEPROM, add later
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Read MACREG.txt\n"));
+	rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+	//this switching setting cause some 8192cu hw have redownload fw fail issue
+	//improve 2-stream TX EVM by Jenyu
+	if(is92C)
+		rtw_write8(Adapter, REG_SPS0_CTRL+3,0x71);
+#endif
+
+
+	// 2010.07.13 AMPDU aggregation number 9
+	//rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM);
+	rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0A); //By tynli. 2010.11.18.
+#ifdef CONFIG_USB_HCI
+	if(is92C && (BOARD_USB_DONGLE == pHalData->BoardType))
+		rtw_write8(Adapter, 0x40,0x04);	
+#endif		
+
+	return rtStatus;
+
+}
+
+
+/**
+* Function:	phy_InitBBRFRegisterDefinition
+*
+* OverView:	Initialize Register definition offset for Radio Path A/B/C/D
+*
+* Input:
+*			PADAPTER		Adapter,
+*
+* Output:	None
+* Return:		None
+* Note:		The initialization value is constant and it should never be changes
+*/
+static	VOID
+phy_InitBBRFRegisterDefinition(
+	IN	PADAPTER		Adapter
+)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);	
+
+	// RF Interface Sowrtware Control
+	pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870
+	pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872)
+	pHalData->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 LSBs if read 32-bit from 0x874
+	pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876)
+
+	// RF Interface Readback Value
+	pHalData->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; // 16 LSBs if read 32-bit from 0x8E0	
+	pHalData->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2)
+	pHalData->PHYRegDef[RF_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 LSBs if read 32-bit from 0x8E4
+	pHalData->PHYRegDef[RF_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6)
+
+	// RF Interface Output (and Enable)
+	pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860
+	pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864
+
+	// RF Interface (Output and)  Enable
+	pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862)
+	pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866)
+
+	//Addr of LSSI. Wirte RF register by driver
+	pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter
+	pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
+
+	// RF parameter
+	pHalData->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter;  //BB Band Select
+	pHalData->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter;
+	pHalData->PHYRegDef[RF_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter;
+	pHalData->PHYRegDef[RF_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter;
+
+	// Tx AGC Gain Stage (same for all path. Should we remove this?)
+	pHalData->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
+	pHalData->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
+	pHalData->PHYRegDef[RF_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
+	pHalData->PHYRegDef[RF_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
+
+	// Tranceiver A~D HSSI Parameter-1
+	pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1;  //wire control parameter1
+	pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1;  //wire control parameter1
+
+	// Tranceiver A~D HSSI Parameter-2
+	pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2;  //wire control parameter2
+	pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2;  //wire control parameter2
+
+	// RF switch Control
+	pHalData->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; //TR/Ant switch control
+	pHalData->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl;
+	pHalData->PHYRegDef[RF_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl;
+	pHalData->PHYRegDef[RF_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl;
+
+	// AGC control 1 
+	pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1;
+	pHalData->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1;
+	pHalData->PHYRegDef[RF_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1;
+	pHalData->PHYRegDef[RF_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1;
+
+	// AGC control 2 
+	pHalData->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2;
+	pHalData->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2;
+	pHalData->PHYRegDef[RF_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2;
+	pHalData->PHYRegDef[RF_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2;
+
+	// RX AFE control 1 
+	pHalData->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance;
+	pHalData->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
+	pHalData->PHYRegDef[RF_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance;
+	pHalData->PHYRegDef[RF_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance;	
+
+	// RX AFE control 1  
+	pHalData->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE;
+	pHalData->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE;
+	pHalData->PHYRegDef[RF_PATH_C].rfRxAFE = rOFDM0_XCRxAFE;
+	pHalData->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE;	
+
+	// Tx AFE control 1 
+	pHalData->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance;
+	pHalData->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
+	pHalData->PHYRegDef[RF_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance;
+	pHalData->PHYRegDef[RF_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance;	
+
+	// Tx AFE control 2 
+	pHalData->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE;
+	pHalData->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE;
+	pHalData->PHYRegDef[RF_PATH_C].rfTxAFE = rOFDM0_XCTxAFE;
+	pHalData->PHYRegDef[RF_PATH_D].rfTxAFE = rOFDM0_XDTxAFE;	
+
+	// Tranceiver LSSI Readback SI mode 
+	pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
+	pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
+	pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack;
+	pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack;	
+
+	// Tranceiver LSSI Readback PI mode 
+	pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
+	pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
+	//pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack;
+	//pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack;	
+
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigBBWithParaFile()
+ *
+ * Overview:    This function read BB parameters from general file format, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			ps1Byte 			pFileName			
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *	2008/11/06	MH	For 92S we do not support silent reset now. Disable 
+ *					parameter file compare!!!!!!??
+ *			
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithParaFile(
+	IN	PADAPTER		Adapter,
+	IN	u8* 			pFileName
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	int		rtStatus = _SUCCESS;
+
+	return rtStatus;	
+}
+
+
+
+//****************************************
+// The following is for High Power PA
+//****************************************
+VOID
+phy_ConfigBBExternalPA(
+	IN	PADAPTER			Adapter
+)
+{
+#ifdef CONFIG_USB_HCI
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u16 i=0;
+	u32 temp=0;
+
+	if(!pHalData->ExternalPA)
+	{
+		return;
+	}
+
+	// 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the 
+	// same code as SU. It is already updated in PHY_REG_1T_HP.txt.
+#if 0
+	PHY_SetBBReg(Adapter, 0xee8, BIT28, 1);
+	temp = PHY_QueryBBReg(Adapter, 0x860, bMaskDWord);
+	temp |= (BIT26|BIT21|BIT10|BIT5);
+	PHY_SetBBReg(Adapter, 0x860, bMaskDWord, temp);
+	PHY_SetBBReg(Adapter, 0x870, BIT10, 0);
+	PHY_SetBBReg(Adapter, 0xc80, bMaskDWord, 0x20000080);
+	PHY_SetBBReg(Adapter, 0xc88, bMaskDWord, 0x40000100);
+#endif
+
+#endif
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigBBWithHeaderFile()
+ *
+ * Overview:    This function read BB parameters from general file format, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			u1Byte 			ConfigType     0 => PHY_CONFIG
+ *										 1 =>AGC_TAB
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithHeaderFile(
+	IN	PADAPTER		Adapter,
+	IN	u8 			ConfigType
+)
+{
+	int i;
+	u32*	Rtl819XPHY_REGArray_Table;
+	u32*	Rtl819XAGCTAB_Array_Table;
+	u16	PHY_REGArrayLen, AGCTAB_ArrayLen;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	int ret = _SUCCESS;
+
+	//
+	// 2009.11.24. Modified by tynli.
+	//
+	if(IS_92C_SERIAL(pHalData->VersionID))
+	{
+		AGCTAB_ArrayLen = AGCTAB_2TArrayLength;
+		Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_2TArray;
+		PHY_REGArrayLen = PHY_REG_2TArrayLength;
+		Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_2TArray;
+#ifdef CONFIG_USB_HCI
+		if(pHalData->BoardType == BOARD_MINICARD )
+		{
+			PHY_REGArrayLen = PHY_REG_2T_mCardArrayLength;
+			Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_2T_mCardArray;			
+		}
+#endif
+	}
+	else
+	{
+		AGCTAB_ArrayLen = AGCTAB_1TArrayLength;
+		Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_1TArray;
+		PHY_REGArrayLen = PHY_REG_1TArrayLength;
+		Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1TArray;
+#ifdef CONFIG_USB_HCI
+		if(pHalData->BoardType == BOARD_MINICARD )
+		{
+			PHY_REGArrayLen = PHY_REG_1T_mCardArrayLength;
+			Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T_mCardArray;			
+		}
+		else if(pHalData->BoardType == BOARD_USB_High_PA)
+		{
+			AGCTAB_ArrayLen = AGCTAB_1T_HPArrayLength;
+			Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_1T_HPArray;
+			PHY_REGArrayLen = PHY_REG_1T_HPArrayLength;
+			Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T_HPArray;			
+		}
+#endif
+	}
+
+	if(ConfigType == BaseBand_Config_PHY_REG)
+	{
+		#ifdef CONFIG_IOL_BB_PHY_REG
+		if(rtw_IOL_applied(Adapter))
+		{
+			struct xmit_frame	*xmit_frame;
+			u32 tmp_value;
+
+			if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) {
+				ret = _FAIL;
+				goto exit;
+			}
+
+			for(i=0;i<PHY_REGArrayLen;i=i+2)
+			{
+				tmp_value=Rtl819XPHY_REGArray_Table[i+1];
+				
+				if (Rtl819XPHY_REGArray_Table[i] == 0xfe)
+					rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 50);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xfd)
+					rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 5);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xfc)
+					rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 1);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xfb)
+					rtw_IOL_append_DELAY_US_cmd(xmit_frame, 50);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xfa)
+					rtw_IOL_append_DELAY_US_cmd(xmit_frame, 5);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xf9)
+					rtw_IOL_append_DELAY_US_cmd(xmit_frame, 1);
+
+				rtw_IOL_append_WD_cmd(xmit_frame, Rtl819XPHY_REGArray_Table[i], tmp_value);	
+				//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1]));
+			}
+		
+			ret = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000);
+		}
+		else
+		#endif
+		{
+			for(i=0;i<PHY_REGArrayLen;i=i+2)
+			{
+				if (Rtl819XPHY_REGArray_Table[i] == 0xfe){
+					#ifdef CONFIG_LONG_DELAY_ISSUE
+					rtw_msleep_os(50);
+					#else
+					rtw_mdelay_os(50);
+					#endif
+				}
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xfd)
+					rtw_mdelay_os(5);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xfc)
+					rtw_mdelay_os(1);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xfb)
+					rtw_udelay_os(50);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xfa)
+					rtw_udelay_os(5);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xf9)
+					rtw_udelay_os(1);
+
+				PHY_SetBBReg(Adapter, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]);
+
+				// Add 1us delay between BB/RF register setting.
+				rtw_udelay_os(1);
+
+				//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1]));
+			}
+		}
+	
+		// for External PA
+		phy_ConfigBBExternalPA(Adapter);
+	}
+	else if(ConfigType == BaseBand_Config_AGC_TAB)
+	{
+		#ifdef CONFIG_IOL_BB_AGC_TAB
+		if(rtw_IOL_applied(Adapter))
+		{
+			struct xmit_frame	*xmit_frame;
+
+			if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) {
+				ret = _FAIL;
+				goto exit;
+			}
+
+			for(i=0;i<AGCTAB_ArrayLen;i=i+2)
+			{
+				rtw_IOL_append_WD_cmd(xmit_frame, Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1]);							
+				//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XAGCTAB_Array_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1]));
+			}
+		
+			ret = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000);
+		}
+		else
+		#endif
+		{
+			for(i=0;i<AGCTAB_ArrayLen;i=i+2)
+			{
+				PHY_SetBBReg(Adapter, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]);		
+
+				// Add 1us delay between BB/RF register setting.
+				rtw_udelay_os(1);
+				
+				//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XAGCTAB_Array_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1]));
+			}
+		}
+	}
+
+exit:
+	return ret;
+	
+}
+
+
+VOID
+storePwrIndexDiffRateOffset(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask,
+	IN	u32		Data
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	if(RegAddr == rTxAGC_A_Rate18_06)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0]));
+	}
+	if(RegAddr == rTxAGC_A_Rate54_24)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1]));
+	}
+	if(RegAddr == rTxAGC_A_CCK1_Mcs32)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6]));
+	}
+	if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7]));
+	}	
+	if(RegAddr == rTxAGC_A_Mcs03_Mcs00)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2]));
+	}
+	if(RegAddr == rTxAGC_A_Mcs07_Mcs04)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3]));
+	}
+	if(RegAddr == rTxAGC_A_Mcs11_Mcs08)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4]));
+	}
+	if(RegAddr == rTxAGC_A_Mcs15_Mcs12)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5]));
+	}
+	if(RegAddr == rTxAGC_B_Rate18_06)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8]));
+	}
+	if(RegAddr == rTxAGC_B_Rate54_24)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9]));
+	}
+	if(RegAddr == rTxAGC_B_CCK1_55_Mcs32)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14]));
+	}
+	if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15]));
+	}	
+	if(RegAddr == rTxAGC_B_Mcs03_Mcs00)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10]));
+	}
+	if(RegAddr == rTxAGC_B_Mcs07_Mcs04)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11]));
+	}
+	if(RegAddr == rTxAGC_B_Mcs11_Mcs08)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12]));
+	}
+	if(RegAddr == rTxAGC_B_Mcs15_Mcs12)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13]));
+		pHalData->pwrGroupCnt++;
+	}
+}
+/*-----------------------------------------------------------------------------
+ * Function:	phy_ConfigBBWithPgParaFile
+ *
+ * Overview:	
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/06/2008 	MHC		Create Version 0.
+ * 2009/07/29	tynli		(porting from 92SE branch)2009/03/11 Add copy parameter file to buffer for silent reset
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithPgParaFile(
+	IN	PADAPTER		Adapter,
+	IN	u8* 			pFileName)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	int		rtStatus = _SUCCESS;
+
+
+	return rtStatus;
+	
+}	/* phy_ConfigBBWithPgParaFile */
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_ConfigBBWithPgHeaderFile
+ *
+ * Overview:	Config PHY_REG_PG array 
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/06/2008 	MHC		Add later!!!!!!.. Please modify for new files!!!!
+ * 11/10/2008	tynli		Modify to mew files.
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithPgHeaderFile(
+	IN	PADAPTER		Adapter,
+	IN	u8 			ConfigType)
+{
+	int i;
+	u32*	Rtl819XPHY_REGArray_Table_PG;
+	u16	PHY_REGArrayPGLen;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	// Default: pHalData->RF_Type = RF_2T2R.
+	PHY_REGArrayPGLen = PHY_REG_Array_PGLength;
+	Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG;
+
+#ifdef CONFIG_USB_HCI
+// 2010/10/19 Chiyoko According to Alex/Willson opinion, VAU/dongle can share the same PHY_REG_PG.txt
+/*
+	if(pHalData->BoardType == BOARD_MINICARD )
+	{
+		PHY_REGArrayPGLen = PHY_REG_Array_PG_mCardLength;
+		Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG_mCard;
+	}
+	else */if(pHalData->BoardType ==BOARD_USB_High_PA )
+	{
+		PHY_REGArrayPGLen = PHY_REG_Array_PG_HPLength;
+		Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG_HP;
+	}
+#endif
+
+	if(ConfigType == BaseBand_Config_PHY_REG)
+	{
+		for(i=0;i<PHY_REGArrayPGLen;i=i+3)
+		{
+			#if 0 //without IO, no delay is neeeded...
+			if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfe){
+				#ifdef CONFIG_LONG_DELAY_ISSUE
+				rtw_msleep_os(50);
+				#else
+				rtw_mdelay_os(50);
+				#endif
+			}
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfd)
+				rtw_mdelay_os(5);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfc)
+				rtw_mdelay_os(1);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfb)
+				rtw_udelay_os(50);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfa)
+				rtw_udelay_os(5);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xf9)
+				rtw_udelay_os(1);
+			//PHY_SetBBReg(Adapter, Rtl819XPHY_REGArray_Table_PG[i], Rtl819XPHY_REGArray_Table_PG[i+1], Rtl819XPHY_REGArray_Table_PG[i+2]);		
+			#endif
+			
+			storePwrIndexDiffRateOffset(Adapter, Rtl819XPHY_REGArray_Table_PG[i], 
+				Rtl819XPHY_REGArray_Table_PG[i+1], 
+				Rtl819XPHY_REGArray_Table_PG[i+2]);
+			//RT_TRACE(COMP_SEND, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table_PG[0] is %lx Rtl819XPHY_REGArray_Table_PG[1] is %lx \n",Rtl819XPHY_REGArray_Table_PG[i], Rtl819XPHY_REGArray_Table_PG[i+1]));
+		}
+	}
+	else
+	{
+
+		//RT_TRACE(COMP_SEND, DBG_LOUD, ("phy_ConfigBBWithPgHeaderFile(): ConfigType != BaseBand_Config_PHY_REG\n"));
+	}
+	
+	return _SUCCESS;
+	
+}	/* phy_ConfigBBWithPgHeaderFile */
+
+#if (MP_DRIVER == 1)
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigBBWithMpParaFile()
+ *
+ * Overview:    This function read BB parameters from general file format, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			ps1Byte 			pFileName			
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *	2008/11/06	MH	For 92S we do not support silent reset now. Disable 
+ *					parameter file compare!!!!!!??
+ *			
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithMpParaFile(
+	IN	PADAPTER		Adapter,
+	IN	u8* 			pFileName
+)
+{
+#if 1
+	int		rtStatus = _SUCCESS;
+#else
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	s4Byte			nLinesRead, ithLine;
+	RT_STATUS		rtStatus = RT_STATUS_SUCCESS;
+	ps1Byte 		szLine;
+	u4Byte			u4bRegOffset, u4bRegMask, u4bRegValue;
+	u4Byte			u4bMove;
+	
+	if(ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FIRST_INIT))
+	{
+		rtStatus = PlatformReadFile(
+					Adapter, 
+					pFileName,
+					(pu1Byte)(pHalData->BufOfLines),
+					MAX_LINES_HWCONFIG_TXT,
+					MAX_BYTES_LINE_HWCONFIG_TXT,
+					&nLinesRead
+					);
+		if(rtStatus == RT_STATUS_SUCCESS)
+		{
+			PlatformMoveMemory(pHalData->BufOfLines6, pHalData->BufOfLines, nLinesRead*MAX_BYTES_LINE_HWCONFIG_TXT);
+			pHalData->nLinesRead6 = nLinesRead;
+		}
+		else
+		{
+			// Temporarily skip PHY_REG_MP.txt if file does not exist.
+			pHalData->nLinesRead6 = 0;
+			RT_TRACE(COMP_INIT, DBG_LOUD, ("No matched file \r\n"));
+			return RT_STATUS_SUCCESS;
+		}
+	}
+	else
+	{
+		PlatformMoveMemory(pHalData->BufOfLines, pHalData->BufOfLines6, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT);
+		nLinesRead = pHalData->nLinesRead6;
+		rtStatus = RT_STATUS_SUCCESS;
+	}
+
+
+	if(rtStatus == RT_STATUS_SUCCESS)
+	{
+		RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): read %s ok\n", pFileName));
+
+		for(ithLine = 0; ithLine < nLinesRead; ithLine++)
+		{
+			szLine = pHalData->BufOfLines[ithLine];
+
+			if(!IsCommentString(szLine))
+			{
+				// Get 1st hex value as register offset.
+				if(GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove))
+				{
+					if(u4bRegOffset == 0xff)
+					{ // Ending.
+						break;
+					}
+					else if (u4bRegOffset == 0xfe)
+						delay_ms(50);
+					else if (u4bRegOffset == 0xfd)
+						delay_ms(5);
+					else if (u4bRegOffset == 0xfc)
+						delay_ms(1);
+					else if (u4bRegOffset == 0xfb)
+						PlatformStallExecution(50);
+					else if (u4bRegOffset == 0xfa)
+						PlatformStallExecution(5);
+					else if (u4bRegOffset == 0xf9)
+						PlatformStallExecution(1);
+					
+					// Get 2nd hex value as register value.
+					szLine += u4bMove;
+					if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove))
+					{
+						RT_TRACE(COMP_FPGA, DBG_TRACE, ("[ADDR]%03lX=%08lX\n", u4bRegOffset, u4bRegValue));
+						PHY_SetBBReg(Adapter, u4bRegOffset, bMaskDWord, u4bRegValue);
+
+						// Add 1us delay between BB/RF register setting.
+						PlatformStallExecution(1);
+					}
+				}
+			}
+		}
+	}
+	else
+	{
+		RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): Failed%s\n", pFileName));
+	}
+#endif
+
+	return rtStatus;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_ConfigBBWithMpHeaderFile
+ *
+ * Overview:	Config PHY_REG_MP array 
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 02/04/2010	chiyokolin		Modify to new files.
+ *---------------------------------------------------------------------------*/
+static int
+phy_ConfigBBWithMpHeaderFile(
+	IN	PADAPTER		Adapter,
+	IN	u1Byte 			ConfigType)
+{
+	int i;
+	u32*	Rtl8192CPHY_REGArray_Table_MP;
+	u16	PHY_REGArrayMPLen;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	PHY_REGArrayMPLen = PHY_REG_Array_MPLength;
+	Rtl8192CPHY_REGArray_Table_MP = Rtl819XPHY_REG_Array_MP;
+
+	if(ConfigType == BaseBand_Config_PHY_REG)
+	{
+		for(i=0;i<PHY_REGArrayMPLen;i=i+2)
+		{
+			if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfe) {
+				#ifdef CONFIG_LONG_DELAY_ISSUE
+				rtw_msleep_os(50);
+				#else
+				rtw_mdelay_os(50);
+				#endif
+			}
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfd)
+				rtw_mdelay_os(5);
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfc)
+				rtw_mdelay_os(1);
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfb) {
+				#ifdef CONFIG_LONG_DELAY_ISSUE
+				rtw_msleep_os(50);
+				#else
+				rtw_mdelay_os(50);
+				#endif
+			}
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfa)
+				rtw_mdelay_os(5);
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xf9)
+				rtw_mdelay_os(1);
+			PHY_SetBBReg(Adapter, Rtl8192CPHY_REGArray_Table_MP[i], bMaskDWord, Rtl8192CPHY_REGArray_Table_MP[i+1]);		
+
+			// Add 1us delay between BB/RF register setting.
+			rtw_mdelay_os(1);
+
+//			RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl8192CPHY_REGArray_Table_MP[%d] is %lx Rtl8192CPHY_REGArray_Table_MP[%d] is %lx \n", i, i+1, Rtl8192CPHY_REGArray_Table_MP[i], Rtl8192CPHY_REGArray_Table_MP[i+1]));
+		}
+	}
+	else
+	{
+//		RT_TRACE(COMP_SEND, DBG_LOUD, ("phy_ConfigBBWithMpHeaderFile(): ConfigType != BaseBand_Config_PHY_REG\n"));
+	}
+
+	return _SUCCESS;
+}	/* phy_ConfigBBWithMpHeaderFile */
+
+#endif	// #if (MP_DRIVER == 1)
+
+static VOID
+phy_BB8192C_Config_1T(
+	IN PADAPTER Adapter
+	)
+{
+#if 0
+	//for path - A
+	PHY_SetBBReg(Adapter, rFPGA0_TxInfo, 0x3, 0x1);
+	PHY_SetBBReg(Adapter, rFPGA1_TxInfo, 0x0303, 0x0101);
+	PHY_SetBBReg(Adapter, 0xe74, 0x0c000000, 0x1);
+	PHY_SetBBReg(Adapter, 0xe78, 0x0c000000, 0x1);
+	PHY_SetBBReg(Adapter, 0xe7c, 0x0c000000, 0x1);
+	PHY_SetBBReg(Adapter, 0xe80, 0x0c000000, 0x1);
+	PHY_SetBBReg(Adapter, 0xe88, 0x0c000000, 0x1);
+#endif
+	//for path - B
+	PHY_SetBBReg(Adapter, rFPGA0_TxInfo, 0x3, 0x2);
+	PHY_SetBBReg(Adapter, rFPGA1_TxInfo, 0x300033, 0x200022);
+
+	// 20100519 Joseph: Add for 1T2R config. Suggested by Kevin, Jenyu and Yunan.
+	PHY_SetBBReg(Adapter, rCCK0_AFESetting, bMaskByte3, 0x45);
+	PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x23);
+	PHY_SetBBReg(Adapter, rOFDM0_AGCParameter1, 0x30, 0x1);	// B path first AGC
+	
+	PHY_SetBBReg(Adapter, 0xe74, 0x0c000000, 0x2);
+	PHY_SetBBReg(Adapter, 0xe78, 0x0c000000, 0x2);
+	PHY_SetBBReg(Adapter, 0xe7c, 0x0c000000, 0x2);
+	PHY_SetBBReg(Adapter, 0xe80, 0x0c000000, 0x2);
+	PHY_SetBBReg(Adapter, 0xe88, 0x0c000000, 0x2);
+
+	
+}
+
+// Joseph test: new initialize order!!
+// Test only!! This part need to be re-organized.
+// Now it is just for 8256.
+static	int
+phy_BB8190_Config_HardCode(
+	IN	PADAPTER	Adapter
+	)
+{
+	//RT_ASSERT(FALSE, ("This function is not implement yet!! \n"));
+	return _SUCCESS;
+}
+
+static	int
+phy_BB8192C_Config_ParaFile(
+	IN	PADAPTER	Adapter
+	)
+{
+	EEPROM_EFUSE_PRIV	*pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	int			rtStatus = _SUCCESS;
+
+	u8				szBBRegPgFile[] = RTL819X_PHY_REG_PG;
+	
+	u8				sz88CBBRegFile[] = RTL8188C_PHY_REG;	
+	u8				sz88CAGCTableFile[] = RTL8188C_AGC_TAB;
+
+	u8				sz92CBBRegFile[] = RTL8192C_PHY_REG;	
+	u8				sz92CAGCTableFile[] = RTL8192C_AGC_TAB;
+	
+	u8				*pszBBRegFile, *pszAGCTableFile, *pszBBRegMpFile;
+	
+	//RT_TRACE(COMP_INIT, DBG_TRACE, ("==>phy_BB8192S_Config_ParaFile\n"));
+
+	if(IS_92C_SERIAL(pHalData->VersionID)){
+		pszBBRegFile=(u8*)&sz92CBBRegFile ;
+		pszAGCTableFile =(u8*)&sz92CAGCTableFile;
+	}
+	else{
+		pszBBRegFile=(u8*)&sz88CBBRegFile ;
+		pszAGCTableFile =(u8*)&sz88CAGCTableFile;
+	}
+
+	//
+	// 1. Read PHY_REG.TXT BB INIT!!
+	// We will seperate as 88C / 92C according to chip version
+	//
+#ifdef CONFIG_EMBEDDED_FWIMG
+	rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_PHY_REG);	
+#else	
+	// No matter what kind of CHIP we always read PHY_REG.txt. We must copy different 
+	// type of parameter files to phy_reg.txt at first.	
+	rtStatus = phy_ConfigBBWithParaFile(Adapter,pszBBRegFile);
+#endif
+
+	if(rtStatus != _SUCCESS){
+		//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg Fail!!"));
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+
+#if MP_DRIVER == 1
+	//
+	// 1.1 Read PHY_REG_MP.TXT BB INIT!!
+	// We will seperate as 88C / 92C according to chip version
+	//
+#ifdef CONFIG_EMBEDDED_FWIMG
+	rtStatus = phy_ConfigBBWithMpHeaderFile(Adapter, BaseBand_Config_PHY_REG);	
+#else	
+	// No matter what kind of CHIP we always read PHY_REG.txt. We must copy different 
+	// type of parameter files to phy_reg.txt at first.	
+	rtStatus = phy_ConfigBBWithMpParaFile(Adapter, pszBBRegMpFile);
+#endif
+
+	if(rtStatus != _SUCCESS){
+//		RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg MP Fail!!"));
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}	
+#endif	// #if (MP_DRIVER == 1)
+
+	//
+	// 20100318 Joseph: Config 2T2R to 1T2R if necessary.
+	//
+	if(pHalData->rf_type == RF_1T2R)
+	{
+		phy_BB8192C_Config_1T(Adapter);
+		DBG_8192C("phy_BB8192C_Config_ParaFile():Config to 1T!!\n");
+	}
+
+	//
+	// 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt
+	//
+	if (pEEPROM->bautoload_fail_flag == _FALSE)
+	{
+		pHalData->pwrGroupCnt = 0;
+
+#ifdef CONFIG_EMBEDDED_FWIMG
+		rtStatus = phy_ConfigBBWithPgHeaderFile(Adapter, BaseBand_Config_PHY_REG);
+#else
+		rtStatus = phy_ConfigBBWithPgParaFile(Adapter, (u8*)&szBBRegPgFile);
+#endif
+	}
+	
+	if(rtStatus != _SUCCESS){
+		//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():BB_PG Reg Fail!!"));
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+
+	//
+	// 3. BB AGC table Initialization
+	//
+#ifdef CONFIG_EMBEDDED_FWIMG
+	rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_AGC_TAB);
+#else
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n"));
+	rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile);
+#endif
+
+	if(rtStatus != _SUCCESS){
+		//RT_TRACE(COMP_FPGA, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():AGC Table Fail\n"));
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+
+	// Check if the CCK HighPower is turned ON.
+	// This is used to calculate PWDB.
+	pHalData->bCckHighPower = (BOOLEAN)(PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, 0x200));
+	
+phy_BB8190_Config_ParaFile_Fail:
+
+	return rtStatus;
+}
+
+
+int
+PHY_BBConfig8192C(
+	IN	PADAPTER	Adapter
+	)
+{
+	int	rtStatus = _SUCCESS;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32	RegVal;
+	u8	TmpU1B=0;
+	u8	value8;
+
+	phy_InitBBRFRegisterDefinition(Adapter);
+
+	if(IS_HARDWARE_TYPE_8723A(Adapter))
+	{
+		// Suggested by Scott. tynli_test. 2010.12.30.
+		//1. 0x28[1] = 1
+		TmpU1B = rtw_read8(Adapter, REG_AFE_PLL_CTRL);
+		rtw_udelay_os(2);
+		rtw_write8(Adapter, REG_AFE_PLL_CTRL, (TmpU1B|BIT1));
+		rtw_udelay_os(2);
+		
+		//2. 0x29[7:0] = 0xFF
+		rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xff);
+		rtw_udelay_os(2);
+		
+		//3. 0x02[1:0] = 2b'11
+		TmpU1B = rtw_read8(Adapter, REG_SYS_FUNC_EN);
+		rtw_write8(Adapter, REG_SYS_FUNC_EN, (TmpU1B|FEN_BB_GLB_RSTn|FEN_BBRSTB));
+		
+		//undo clock gated
+		rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)&(~BIT31));
+		
+		//4. 0x25[6] = 0
+		TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+1);
+		rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, (TmpU1B&(~BIT6)));
+		
+		//5. 0x24[20] = 0 	//Advised by SD3 Alex Wang. 2011.02.09.
+		TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+2);
+		rtw_write8(Adapter, REG_AFE_XTAL_CTRL+2, (TmpU1B&(~BIT4)));
+		
+		//6. 0x1f[7:0] = 0x07
+		rtw_write8(Adapter, REG_RF_CTRL, 0x07);
+	}
+	else
+	{
+		// Enable BB and RF
+		RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN);
+		rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1));
+
+		// 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF.
+		rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83);
+		rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb);
+
+		rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB);
+
+#ifdef CONFIG_USB_HCI
+		rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB);
+#else
+		rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB);
+#endif
+		
+		//undo clock gated
+		rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)&(~BIT31));
+
+		// 2009/10/21 by SD1 Jong. Modified by tynli. Not in Documented in V8.1. 
+#ifdef CONFIG_USB_HCI
+		//To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23.
+		rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f);	
+		rtw_write8(Adapter, 0x15, 0xe9);
+#endif
+
+		rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80);
+
+#ifdef CONFIG_PCI_HCI
+		// Force use left antenna by default for 88C.
+	//	if(!IS_92C_SERIAL(pHalData->VersionID) || IS_92C_1T2R(pHalData->VersionID))
+		if(Adapter->ledpriv.LedStrategy != SW_LED_MODE10)
+		{
+			RegVal = rtw_read32(Adapter, REG_LEDCFG0);
+			rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23);
+		}
+#endif
+	}
+
+	//
+	// Config BB and AGC
+	//
+	rtStatus = phy_BB8192C_Config_ParaFile(Adapter);
+#if 0	
+	switch(Adapter->MgntInfo.bRegHwParaFile)
+	{
+		case 0:
+			phy_BB8190_Config_HardCode(Adapter);
+			break;
+
+		case 1:
+			rtStatus = phy_BB8192C_Config_ParaFile(Adapter);
+			break;
+
+		case 2:
+			// Partial Modify. 
+			phy_BB8190_Config_HardCode(Adapter);
+			phy_BB8192C_Config_ParaFile(Adapter);
+			break;
+
+		default:
+			phy_BB8190_Config_HardCode(Adapter);
+			break;
+	}
+#endif	
+#ifdef CONFIG_USB_HCI
+	if(IS_HARDWARE_TYPE_8192CU(Adapter)&&IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)
+		&&(pHalData->BoardType == BOARD_USB_High_PA))
+			rtw_write8(Adapter, 0xc72, 0x50);		
+#endif
+
+	return rtStatus;
+}
+
+
+int
+PHY_RFConfig8192C(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	int		rtStatus = _SUCCESS;
+
+	//
+	// RF config
+	//
+	rtStatus = PHY_RF6052_Config8192C(Adapter);
+#if 0	
+	switch(pHalData->rf_chip)
+	{
+		case RF_6052:
+			rtStatus = PHY_RF6052_Config(Adapter);
+			break;
+		case RF_8225:
+			rtStatus = PHY_RF8225_Config(Adapter);
+			break;
+		case RF_8256:			
+			rtStatus = PHY_RF8256_Config(Adapter);
+			break;
+		case RF_8258:
+			break;
+		case RF_PSEUDO_11N:
+			rtStatus = PHY_RF8225_Config(Adapter);
+			break;
+		default: //for MacOs Warning: "RF_TYPE_MIN" not handled in switch
+			break;
+	}
+#endif
+	return rtStatus;
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_ConfigRFWithParaFile()
+ *
+ * Overview:    This function read RF parameters from general file format, and do RF 3-wire
+ *
+ * Input:      	PADAPTER			Adapter
+ *			ps1Byte 				pFileName			
+ *			RF_RADIO_PATH_E	eRFPath
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ * Note:		Delay may be required for RF configuration
+ *---------------------------------------------------------------------------*/
+int
+rtl8192c_PHY_ConfigRFWithParaFile(
+	IN	PADAPTER			Adapter,
+	IN	u8* 				pFileName,
+	RF_RADIO_PATH_E		eRFPath
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	int	rtStatus = _SUCCESS;
+
+
+	return rtStatus;
+	
+}
+
+//****************************************
+// The following is for High Power PA
+//****************************************
+#define HighPowerRadioAArrayLen 22
+//This is for High power PA
+u32 Rtl8192S_HighPower_RadioA_Array[HighPowerRadioAArrayLen] = {
+0x013,0x00029ea4,
+0x013,0x00025e74,
+0x013,0x00020ea4,
+0x013,0x0001ced0,
+0x013,0x00019f40,
+0x013,0x00014e70,
+0x013,0x000106a0,
+0x013,0x0000c670,
+0x013,0x000082a0,
+0x013,0x00004270,
+0x013,0x00000240,
+};
+
+int
+PHY_ConfigRFExternalPA(
+	IN	PADAPTER			Adapter,
+	RF_RADIO_PATH_E		eRFPath
+)
+{
+	int	rtStatus = _SUCCESS;
+#ifdef CONFIG_USB_HCI
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u16 i=0;
+
+	if(!pHalData->ExternalPA)
+	{
+		return rtStatus;
+	}
+	
+	// 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the 
+	// same code as SU. It is already updated in radio_a_1T_HP.txt.
+#if 0	
+	//add for SU High Power PA
+	for(i = 0;i<HighPowerRadioAArrayLen; i=i+2)
+	{
+		RT_TRACE(COMP_INIT, DBG_LOUD, ("External PA, write RF 0x%lx=0x%lx\n", Rtl8192S_HighPower_RadioA_Array[i], Rtl8192S_HighPower_RadioA_Array[i+1]));
+		PHY_SetRFReg(Adapter, eRFPath, Rtl8192S_HighPower_RadioA_Array[i], bRFRegOffsetMask, Rtl8192S_HighPower_RadioA_Array[i+1]);
+	}
+#endif
+
+#endif
+	return rtStatus;
+}
+//****************************************
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_ConfigRFWithHeaderFile()
+ *
+ * Overview:    This function read RF parameters from general file format, and do RF 3-wire
+ *
+ * Input:      	PADAPTER			Adapter
+ *			ps1Byte 				pFileName			
+ *			RF_RADIO_PATH_E	eRFPath
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ * Note:		Delay may be required for RF configuration
+ *---------------------------------------------------------------------------*/
+int
+rtl8192c_PHY_ConfigRFWithHeaderFile(
+	IN	PADAPTER			Adapter,
+	RF_RADIO_PATH_E		eRFPath
+)
+{
+
+	int			i;
+	int			rtStatus = _SUCCESS;
+	u32*		Rtl819XRadioA_Array_Table;
+	u32*		Rtl819XRadioB_Array_Table;
+	u16		RadioA_ArrayLen,RadioB_ArrayLen;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	//
+	// 2009.11.24. Modified by tynli.
+	//
+	if(IS_92C_SERIAL(pHalData->VersionID))
+	{
+		RadioA_ArrayLen = RadioA_2TArrayLength;
+		Rtl819XRadioA_Array_Table = Rtl819XRadioA_2TArray;
+		RadioB_ArrayLen = RadioB_2TArrayLength;
+		Rtl819XRadioB_Array_Table = Rtl819XRadioB_2TArray;
+	}
+	else
+	{
+		RadioA_ArrayLen = RadioA_1TArrayLength;
+		Rtl819XRadioA_Array_Table = Rtl819XRadioA_1TArray;
+		RadioB_ArrayLen = RadioB_1TArrayLength;	
+		Rtl819XRadioB_Array_Table = Rtl819XRadioB_1TArray;
+#ifdef CONFIG_USB_HCI
+		if( BOARD_MINICARD == pHalData->BoardType )
+		{
+			RadioA_ArrayLen = RadioA_1T_mCardArrayLength;
+			Rtl819XRadioA_Array_Table = Rtl819XRadioA_1T_mCardArray;
+			RadioB_ArrayLen = RadioB_1T_mCardArrayLength;	
+			Rtl819XRadioB_Array_Table = Rtl819XRadioB_1T_mCardArray;			
+		}
+		else if( BOARD_USB_High_PA == pHalData->BoardType )
+		{
+			RadioA_ArrayLen = RadioA_1T_HPArrayLength;
+			Rtl819XRadioA_Array_Table = Rtl819XRadioA_1T_HPArray;
+		}
+#endif
+	}
+
+	switch(eRFPath){
+		case RF_PATH_A:
+			#ifdef CONFIG_IOL_RF_RF90_PATH_A
+			if(rtw_IOL_applied(Adapter))
+			{
+				struct xmit_frame	*xmit_frame;
+				if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) {
+					rtStatus = _FAIL;
+					goto exit;
+				}
+				
+				for(i = 0;i<RadioA_ArrayLen; i=i+2)
+				{
+					if(Rtl819XRadioA_Array_Table[i] == 0xfe)
+						rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 50);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xfd)
+						rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 5);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xfc)
+						rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 1);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xfb)
+						rtw_IOL_append_DELAY_US_cmd(xmit_frame, 50);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xfa)
+						rtw_IOL_append_DELAY_US_cmd(xmit_frame, 5);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xf9)
+						rtw_IOL_append_DELAY_US_cmd(xmit_frame, 1);
+					else
+					{
+						BB_REGISTER_DEFINITION_T	*pPhyReg = &pHalData->PHYRegDef[eRFPath];
+						u32	NewOffset = 0;
+						u32	DataAndAddr = 0;
+						
+						NewOffset = Rtl819XRadioA_Array_Table[i] & 0x3f;
+						DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioA_Array_Table[i+1]&0x000fffff)) & 0x0fffffff;	// T65 RF
+						rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr);
+					}
+				}	
+				rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000);
+			}
+			else
+			#endif
+			{
+				for(i = 0;i<RadioA_ArrayLen; i=i+2)
+				{
+					if(Rtl819XRadioA_Array_Table[i] == 0xfe) {
+						#ifdef CONFIG_LONG_DELAY_ISSUE
+						rtw_msleep_os(50);
+						#else
+						rtw_mdelay_os(50);
+						#endif
+					}
+					else if (Rtl819XRadioA_Array_Table[i] == 0xfd)
+						rtw_mdelay_os(5);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xfc)
+						rtw_mdelay_os(1);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xfb)
+						rtw_udelay_os(50);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xfa)
+						rtw_udelay_os(5);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xf9)
+						rtw_udelay_os(1);
+					else
+					{
+						PHY_SetRFReg(Adapter, eRFPath, Rtl819XRadioA_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioA_Array_Table[i+1]);
+						// Add 1us delay between BB/RF register setting.
+						rtw_udelay_os(1);
+					}
+				}
+			}
+
+			//Add for High Power PA
+			PHY_ConfigRFExternalPA(Adapter, eRFPath);
+			break;
+		case RF_PATH_B:
+			#ifdef CONFIG_IOL_RF_RF90_PATH_B
+			if(rtw_IOL_applied(Adapter))
+			{
+				struct xmit_frame	*xmit_frame;
+				if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) {
+					rtStatus = _FAIL;
+					goto exit;
+				}
+			
+				for(i = 0;i<RadioB_ArrayLen; i=i+2)
+				{
+					if(Rtl819XRadioB_Array_Table[i] == 0xfe)
+						rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 50);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xfd)
+						rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 5);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xfc)
+						rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 1);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xfb)
+						rtw_IOL_append_DELAY_US_cmd(xmit_frame, 50);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xfa)
+						rtw_IOL_append_DELAY_US_cmd(xmit_frame, 5);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xf9)
+						rtw_IOL_append_DELAY_US_cmd(xmit_frame, 1);
+					else
+					{
+						BB_REGISTER_DEFINITION_T	*pPhyReg = &pHalData->PHYRegDef[eRFPath];
+						u32	NewOffset = 0;
+						u32	DataAndAddr = 0;
+						
+						NewOffset = Rtl819XRadioB_Array_Table[i] & 0x3f;
+						DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioB_Array_Table[i+1]&0x000fffff)) & 0x0fffffff;	// T65 RF
+						rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr);
+					}
+				}	
+				rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000);
+			}
+			else
+			#endif
+			{
+				for(i = 0;i<RadioB_ArrayLen; i=i+2)
+				{
+					if(Rtl819XRadioB_Array_Table[i] == 0xfe)
+					{ // Deay specific ms. Only RF configuration require delay.												
+#if 0//#ifdef CONFIG_USB_HCI
+						#ifdef CONFIG_LONG_DELAY_ISSUE
+						rtw_msleep_os(1000);
+						#else
+						rtw_mdelay_os(1000);
+						#endif
+#else
+						#ifdef CONFIG_LONG_DELAY_ISSUE
+						rtw_msleep_os(50);
+						#else
+						rtw_mdelay_os(50);
+						#endif
+#endif
+					}
+					else if (Rtl819XRadioB_Array_Table[i] == 0xfd)
+						rtw_mdelay_os(5);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xfc)
+						rtw_mdelay_os(1);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xfb)
+						rtw_udelay_os(50);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xfa)
+						rtw_udelay_os(5);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xf9)
+						rtw_udelay_os(1);
+					else
+					{
+						PHY_SetRFReg(Adapter, eRFPath, Rtl819XRadioB_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioB_Array_Table[i+1]);
+						// Add 1us delay between BB/RF register setting.
+						rtw_udelay_os(1);
+					}	
+				}
+			}
+
+			break;
+		case RF_PATH_C:
+			break;
+		case RF_PATH_D:
+			break;
+	}
+
+exit:	
+	return rtStatus;
+
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_CheckBBAndRFOK()
+ *
+ * Overview:    This function is write register and then readback to make sure whether
+ *			  BB[PHY0, PHY1], RF[Patha, path b, path c, path d] is Ok
+ *
+ * Input:      	PADAPTER			Adapter
+ *			HW90_BLOCK_E		CheckBlock
+ *			RF_RADIO_PATH_E	eRFPath		// it is used only when CheckBlock is HW90_BLOCK_RF
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: PHY is OK
+ *			
+ * Note:		This function may be removed in the ASIC
+ *---------------------------------------------------------------------------*/
+int
+PHY_CheckBBAndRFOK(
+	IN	PADAPTER			Adapter,
+	IN	HW90_BLOCK_E		CheckBlock,
+	IN	RF_RADIO_PATH_E	eRFPath
+	)
+{
+	int			rtStatus = _SUCCESS;
+
+	u32				i, CheckTimes = 4,ulRegRead = 0;
+
+	u32				WriteAddr[4];
+	u32				WriteData[] = {0xfffff027, 0xaa55a02f, 0x00000027, 0x55aa502f};
+
+	// Initialize register address offset to be checked
+	WriteAddr[HW90_BLOCK_MAC] = 0x100;
+	WriteAddr[HW90_BLOCK_PHY0] = 0x900;
+	WriteAddr[HW90_BLOCK_PHY1] = 0x800;
+	WriteAddr[HW90_BLOCK_RF] = 0x3;
+	
+	for(i=0 ; i < CheckTimes ; i++)
+	{
+
+		//
+		// Write Data to register and readback
+		//
+		switch(CheckBlock)
+		{
+		case HW90_BLOCK_MAC:
+			//RT_ASSERT(FALSE, ("PHY_CheckBBRFOK(): Never Write 0x100 here!"));
+			//RT_TRACE(COMP_INIT, DBG_LOUD, ("PHY_CheckBBRFOK(): Never Write 0x100 here!\n"));
+			break;
+			
+		case HW90_BLOCK_PHY0:
+		case HW90_BLOCK_PHY1:
+			rtw_write32(Adapter, WriteAddr[CheckBlock], WriteData[i]);
+			ulRegRead = rtw_read32(Adapter, WriteAddr[CheckBlock]);
+			break;
+
+		case HW90_BLOCK_RF:
+			// When initialization, we want the delay function(delay_ms(), delay_us() 
+			// ==> actually we call PlatformStallExecution()) to do NdisStallExecution()
+			// [busy wait] instead of NdisMSleep(). So we acquire RT_INITIAL_SPINLOCK 
+			// to run at Dispatch level to achive it.	
+			//cosa PlatformAcquireSpinLock(Adapter, RT_INITIAL_SPINLOCK);
+			WriteData[i] &= 0xfff;
+			PHY_SetRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask, WriteData[i]);
+			// TODO: we should not delay for such a long time. Ask SD3
+			rtw_mdelay_os(10);
+			ulRegRead = PHY_QueryRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord);				
+			rtw_mdelay_os(10);
+			//cosa PlatformReleaseSpinLock(Adapter, RT_INITIAL_SPINLOCK);
+			break;
+			
+		default:
+			rtStatus = _FAIL;
+			break;
+		}
+
+
+		//
+		// Check whether readback data is correct
+		//
+		if(ulRegRead != WriteData[i])
+		{
+			//RT_TRACE(COMP_FPGA, DBG_LOUD, ("ulRegRead: %lx, WriteData: %lx \n", ulRegRead, WriteData[i]));
+			rtStatus = _FAIL;			
+			break;
+		}
+	}
+
+	return rtStatus;
+}
+
+
+VOID
+rtl8192c_PHY_GetHWRegOriginalValue(
+	IN	PADAPTER		Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	// read rx initial gain
+	pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0);
+	pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0);
+	pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0);
+	pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0);
+	//RT_TRACE(COMP_INIT, DBG_LOUD,
+	//("Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n", 
+	//pHalData->DefaultInitialGain[0], pHalData->DefaultInitialGain[1], 
+	//pHalData->DefaultInitialGain[2], pHalData->DefaultInitialGain[3]));
+
+	// read framesync
+	pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0);	 
+	pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Default framesync (0x%x) = 0x%x \n", 
+	//	rOFDM0_RxDetector3, pHalData->framesync));
+}
+
+
+//
+//	Description:
+//		Map dBm into Tx power index according to 
+//		current HW model, for example, RF and PA, and
+//		current wireless mode.
+//	By Bruce, 2008-01-29.
+//
+static	u8
+phy_DbmToTxPwrIdx(
+	IN	PADAPTER		Adapter,
+	IN	WIRELESS_MODE	WirelessMode,
+	IN	int			PowerInDbm
+	)
+{
+	u8				TxPwrIdx = 0;
+	int				Offset = 0;
+	
+
+	//
+	// Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to 
+	// 3dbm, and OFDM HT equals to 0dbm repectively.
+	// Note:
+	//	The mapping may be different by different NICs. Do not use this formula for what needs accurate result.  
+	// By Bruce, 2008-01-29.
+	// 
+	switch(WirelessMode)
+	{
+	case WIRELESS_MODE_B:
+		Offset = -7;
+		break;
+
+	case WIRELESS_MODE_G:
+	case WIRELESS_MODE_N_24G:
+		Offset = -8;
+		break;
+	default:
+		Offset = -8;
+		break;
+	}
+
+	if((PowerInDbm - Offset) > 0)
+	{
+		TxPwrIdx = (u8)((PowerInDbm - Offset) * 2);
+	}
+	else
+	{
+		TxPwrIdx = 0;
+	}
+
+	// Tx Power Index is too large.
+	if(TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S)
+		TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S;
+
+	return TxPwrIdx;
+}
+
+//
+//	Description:
+//		Map Tx power index into dBm according to 
+//		current HW model, for example, RF and PA, and
+//		current wireless mode.
+//	By Bruce, 2008-01-29.
+//
+int
+phy_TxPwrIdxToDbm(
+	IN	PADAPTER		Adapter,
+	IN	WIRELESS_MODE	WirelessMode,
+	IN	u8			TxPwrIdx
+	)
+{
+	int				Offset = 0;
+	int				PwrOutDbm = 0;
+	
+	//
+	// Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm.
+	// Note:
+	//	The mapping may be different by different NICs. Do not use this formula for what needs accurate result.  
+	// By Bruce, 2008-01-29.
+	// 
+	switch(WirelessMode)
+	{
+	case WIRELESS_MODE_B:
+		Offset = -7;
+		break;
+
+	case WIRELESS_MODE_G:
+	case WIRELESS_MODE_N_24G:
+		Offset = -8;
+	default:
+		Offset = -8;	
+		break;
+	}
+
+	PwrOutDbm = TxPwrIdx / 2 + Offset; // Discard the decimal part.
+
+	return PwrOutDbm;
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    GetTxPowerLevel8190()
+ *
+ * Overview:    This function is export to "common" moudule
+ *
+ * Input:       PADAPTER		Adapter
+ *			psByte			Power Level
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ *---------------------------------------------------------------------------*/
+VOID
+PHY_GetTxPowerLevel8192C(
+	IN	PADAPTER		Adapter,
+	OUT u32*    		powerlevel
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			TxPwrLevel = 0;
+	int			TxPwrDbm;
+	
+	//
+	// Because the Tx power indexes are different, we report the maximum of them to 
+	// meet the CCX TPC request. By Bruce, 2008-01-31.
+	//
+
+	// CCK
+	TxPwrLevel = pHalData->CurrentCckTxPwrIdx;
+	TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel);
+
+	// Legacy OFDM
+	TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff;
+
+	// Compare with Legacy OFDM Tx power.
+	if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm)
+		TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel);
+
+	// HT OFDM
+	TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx;
+	
+	// Compare with HT OFDM Tx power.
+	if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm)
+		TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel);
+
+	*powerlevel = TxPwrDbm;
+}
+
+
+static void getTxPowerIndex(
+	IN	PADAPTER		Adapter,
+	IN	u8			channel,
+	IN OUT u8*		cckPowerLevel,
+	IN OUT u8*		ofdmPowerLevel
+	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u8				index = (channel -1);
+	// 1. CCK
+	cckPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelCck[RF_PATH_A][index];	//RF-A
+	cckPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelCck[RF_PATH_B][index];	//RF-B
+
+	// 2. OFDM for 1S or 2S
+	if (GET_RF_TYPE(Adapter) == RF_1T2R || GET_RF_TYPE(Adapter) == RF_1T1R)
+	{
+		// Read HT 40 OFDM TX power
+		ofdmPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelHT40_1S[RF_PATH_A][index];
+		ofdmPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelHT40_1S[RF_PATH_B][index];
+	}
+	else if (GET_RF_TYPE(Adapter) == RF_2T2R)
+	{
+		// Read HT 40 OFDM TX power
+		ofdmPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelHT40_2S[RF_PATH_A][index];
+		ofdmPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelHT40_2S[RF_PATH_B][index];
+	}
+	//RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, set tx power index !!\n", channel));
+}
+
+static void ccxPowerIndexCheck(
+	IN	PADAPTER		Adapter,
+	IN	u8			channel,
+	IN OUT u8*		cckPowerLevel,
+	IN OUT u8*		ofdmPowerLevel
+	)
+{
+#if 0
+	PMGNT_INFO			pMgntInfo = &(Adapter->MgntInfo);
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	PRT_CCX_INFO		pCcxInfo = GET_CCX_INFO(pMgntInfo);
+
+	//
+	// CCX 2 S31, AP control of client transmit power:
+	// 1. We shall not exceed Cell Power Limit as possible as we can.
+	// 2. Tolerance is +/- 5dB.
+	// 3. 802.11h Power Contraint takes higher precedence over CCX Cell Power Limit.
+	// 
+	// TODO: 
+	// 1. 802.11h power contraint 
+	//
+	// 071011, by rcnjko.
+	//
+	if(	pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE && 
+		pMgntInfo->mAssoc &&
+		pCcxInfo->bUpdateCcxPwr &&
+		pCcxInfo->bWithCcxCellPwr &&
+		channel == pMgntInfo->dot11CurrentChannelNumber)
+	{
+		u1Byte	CckCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, pCcxInfo->CcxCellPwr);
+		u1Byte	LegacyOfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_G, pCcxInfo->CcxCellPwr);
+		u1Byte	OfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, pCcxInfo->CcxCellPwr);
+
+		RT_TRACE(COMP_TXAGC, DBG_LOUD, 
+		("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", 
+		pCcxInfo->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx));
+		RT_TRACE(COMP_TXAGC, DBG_LOUD, 
+		("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n",
+		channel, cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); 
+
+		// CCK
+		if(cckPowerLevel[0] > CckCellPwrIdx)
+			cckPowerLevel[0] = CckCellPwrIdx;
+		// Legacy OFDM, HT OFDM
+		if(ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff > LegacyOfdmCellPwrIdx)
+		{
+			if((OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0)
+			{
+				ofdmPowerLevel[0] = OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff;
+			}
+			else
+			{
+				ofdmPowerLevel[0] = 0;
+			}
+		}
+
+		RT_TRACE(COMP_TXAGC, DBG_LOUD, 
+		("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", 
+		cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0]));
+	}
+
+	pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0];
+	pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0];
+
+	RT_TRACE(COMP_TXAGC, DBG_LOUD, 
+		("PHY_SetTxPowerLevel8192S(): CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", 
+		cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0]));
+#endif	
+}
+/*-----------------------------------------------------------------------------
+ * Function:    SetTxPowerLevel8190()
+ *
+ * Overview:    This function is export to "HalCommon" moudule
+ *			We must consider RF path later!!!!!!!
+ *
+ * Input:       PADAPTER		Adapter
+ *			u1Byte		channel
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *	2008/11/04	MHC		We remove EEPROM_93C56.
+ *						We need to move CCX relative code to independet file.
+ *	2009/01/21	MHC		Support new EEPROM format from SD3 requirement.
+ *
+ *---------------------------------------------------------------------------*/
+VOID
+PHY_SetTxPowerLevel8192C(
+	IN	PADAPTER		Adapter,
+	IN	u8			channel
+	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u8	cckPowerLevel[2], ofdmPowerLevel[2];	// [0]:RF-A, [1]:RF-B
+
+#if(MP_DRIVER == 1)
+	return;
+#endif
+
+	if(pHalData->bTXPowerDataReadFromEEPORM == _FALSE)
+		return;
+
+	getTxPowerIndex(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]);
+	//RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, cckPowerLevel (A / B) = 0x%x / 0x%x,   ofdmPowerLevel (A / B) = 0x%x / 0x%x\n", 
+	//	channel, cckPowerLevel[0], cckPowerLevel[1], ofdmPowerLevel[0], ofdmPowerLevel[1]));
+
+	ccxPowerIndexCheck(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]);
+
+	rtl8192c_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]);
+	rtl8192c_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel);
+
+#if 0
+	switch(pHalData->rf_chip)
+	{
+		case RF_8225:
+			PHY_SetRF8225CckTxPower(Adapter, cckPowerLevel[0]);
+			PHY_SetRF8225OfdmTxPower(Adapter, ofdmPowerLevel[0]);
+		break;
+
+		case RF_8256:
+			PHY_SetRF8256CCKTxPower(Adapter, cckPowerLevel[0]);
+			PHY_SetRF8256OFDMTxPower(Adapter, ofdmPowerLevel[0]);
+			break;
+
+		case RF_6052:
+			PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]);
+			PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel);
+			break;
+
+		case RF_8258:
+			break;
+	}
+#endif
+
+}
+
+
+//
+//	Description:
+//		Update transmit power level of all channel supported.
+//
+//	TODO: 
+//		A mode.
+//	By Bruce, 2008-02-04.
+//
+BOOLEAN
+PHY_UpdateTxPowerDbm8192C(
+	IN	PADAPTER	Adapter,
+	IN	int		powerInDbm
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8				idx;
+	u8			rf_path;
+
+	// TODO: A mode Tx power.
+	u8	CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm);
+	u8	OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm);
+
+	if(OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0)
+		OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff;
+	else
+		OfdmTxPwrIdx = 0;
+
+	//RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_UpdateTxPowerDbm8192S(): %ld dBm , CckTxPwrIdx = %d, OfdmTxPwrIdx = %d\n", powerInDbm, CckTxPwrIdx, OfdmTxPwrIdx));
+
+	for(idx = 0; idx < 14; idx++)
+	{
+		for (rf_path = 0; rf_path < 2; rf_path++)
+		{
+			pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx;
+			pHalData->TxPwrLevelHT40_1S[rf_path][idx] = 
+			pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx;
+		}
+	}
+
+	//Adapter->HalFunc.SetTxPowerLevelHandler(Adapter, pHalData->CurrentChannel);//gtest:todo
+
+	return _TRUE;	
+}
+
+
+/*
+	Description:
+		When beacon interval is changed, the values of the 
+		hw registers should be modified.
+	By tynli, 2008.10.24.
+
+*/
+
+
+void	
+rtl8192c_PHY_SetBeaconHwReg(	
+	IN	PADAPTER		Adapter,
+	IN	u16			BeaconInterval	
+	)
+{
+
+}
+
+
+VOID 
+PHY_ScanOperationBackup8192C(
+	IN	PADAPTER	Adapter,
+	IN	u8		Operation
+	)
+{
+#if 0
+	IO_TYPE	IoType;
+	
+	if(!Adapter->bDriverStopped)
+	{
+		switch(Operation)
+		{
+			case SCAN_OPT_BACKUP:
+				IoType = IO_CMD_PAUSE_DM_BY_SCAN;
+				rtw_hal_set_hwreg(Adapter,HW_VAR_IO_CMD,  (pu1Byte)&IoType);
+
+				break;
+
+			case SCAN_OPT_RESTORE:
+				IoType = IO_CMD_RESUME_DM_BY_SCAN;
+				rtw_hal_set_hwreg(Adapter,HW_VAR_IO_CMD,  (pu1Byte)&IoType);
+				break;
+
+			default:
+				RT_TRACE(COMP_SCAN, DBG_LOUD, ("Unknown Scan Backup Operation. \n"));
+				break;
+		}
+	}
+#endif	
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_SetBWModeCallback8192C()
+ *
+ * Overview:    Timer callback function for SetSetBWMode
+ *
+ * Input:       	PRT_TIMER		pTimer
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Note:		(1) We do not take j mode into consideration now
+ *			(2) Will two workitem of "switch channel" and "switch channel bandwidth" run
+ *			     concurrently?
+ *---------------------------------------------------------------------------*/
+static VOID
+_PHY_SetBWMode92C(
+	IN	PADAPTER	Adapter
+)
+{
+//	PADAPTER			Adapter = (PADAPTER)pTimer->Adapter;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u8				regBwOpMode;
+	u8				regRRSR_RSC;
+
+	//return;
+
+	// Added it for 20/40 mhz switch time evaluation by guangan 070531
+	//u4Byte				NowL, NowH;
+	//u8Byte				BeginTime, EndTime; 
+
+	/*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C()  Switch to %s bandwidth\n", \
+					pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"))*/
+
+	if(pHalData->rf_chip == RF_PSEUDO_11N)
+	{
+		//pHalData->SetBWModeInProgress= _FALSE;
+		return;
+	}
+
+	// There is no 40MHz mode in RF_8225.
+	if(pHalData->rf_chip==RF_8225)
+		return;
+
+	if(Adapter->bDriverStopped)
+		return;
+
+	// Added it for 20/40 mhz switch time evaluation by guangan 070531
+	//NowL = PlatformEFIORead4Byte(Adapter, TSFR);
+	//NowH = PlatformEFIORead4Byte(Adapter, TSFR+4);
+	//BeginTime = ((u8Byte)NowH << 32) + NowL;
+		
+	//3//
+	//3//<1>Set MAC register
+	//3//
+	//Adapter->HalFunc.SetBWModeHandler();
+	
+	regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE);
+	regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2);
+	//regBwOpMode = rtw_hal_get_hwreg(Adapter,HW_VAR_BWMODE,(pu1Byte)&regBwOpMode);
+	
+	switch(pHalData->CurrentChannelBW)
+	{
+		case HT_CHANNEL_WIDTH_20:
+			regBwOpMode |= BW_OPMODE_20MHZ;
+			   // 2007/02/07 Mark by Emily becasue we have not verify whether this register works
+			rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode);
+			break;
+			   
+		case HT_CHANNEL_WIDTH_40:
+			regBwOpMode &= ~BW_OPMODE_20MHZ;
+				// 2007/02/07 Mark by Emily becasue we have not verify whether this register works
+			rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode);
+
+			regRRSR_RSC = (regRRSR_RSC&0x90) |(pHalData->nCur40MhzPrimeSC<<5);
+			rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC);
+			break;
+
+		default:
+			/*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C():
+						unknown Bandwidth: %#X\n",pHalData->CurrentChannelBW));*/
+			break;
+	}
+	
+	//3//
+	//3//<2>Set PHY related register
+	//3//
+	switch(pHalData->CurrentChannelBW)
+	{
+		/* 20 MHz channel*/
+		case HT_CHANNEL_WIDTH_20:
+			PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0);
+			PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
+			PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1);
+			
+			break;
+
+
+		/* 40 MHz channel*/
+		case HT_CHANNEL_WIDTH_40:
+			PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1);
+			PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1);
+			
+			// Set Control channel to upper or lower. These settings are required only for 40MHz
+			PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1));
+			PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC);
+			PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0);
+
+			PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1);
+			
+			break;
+
+
+			
+		default:
+			/*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): unknown Bandwidth: %#X\n"\
+						,pHalData->CurrentChannelBW));*/
+			break;
+			
+	}
+	//Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315
+
+	// Added it for 20/40 mhz switch time evaluation by guangan 070531
+	//NowL = PlatformEFIORead4Byte(Adapter, TSFR);
+	//NowH = PlatformEFIORead4Byte(Adapter, TSFR+4);
+	//EndTime = ((u8Byte)NowH << 32) + NowL;
+	//RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWModeCallback8190Pci: time of SetBWMode = %I64d us!\n", (EndTime - BeginTime)));
+
+	//3<3>Set RF related register
+	switch(pHalData->rf_chip)
+	{
+		case RF_8225:		
+			//PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW);
+			break;	
+			
+		case RF_8256:
+			// Please implement this function in Hal8190PciPhy8256.c
+			//PHY_SetRF8256Bandwidth(Adapter, pHalData->CurrentChannelBW);
+			break;
+			
+		case RF_8258:
+			// Please implement this function in Hal8190PciPhy8258.c
+			// PHY_SetRF8258Bandwidth();
+			break;
+
+		case RF_PSEUDO_11N:
+			// Do Nothing
+			break;
+			
+		case RF_6052:
+			rtl8192c_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW);
+			break;	
+			
+		default:
+			//RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID));
+			break;
+	}
+
+	//pHalData->SetBWModeInProgress= FALSE;
+
+	//RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C() \n" ));
+}
+
+
+ /*-----------------------------------------------------------------------------
+ * Function:   SetBWMode8190Pci()
+ *
+ * Overview:  This function is export to "HalCommon" moudule
+ *
+ * Input:       	PADAPTER			Adapter
+ *			HT_CHANNEL_WIDTH	Bandwidth	//20M or 40M
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Note:		We do not take j mode into consideration now
+ *---------------------------------------------------------------------------*/
+VOID
+PHY_SetBWMode8192C(
+	IN	PADAPTER					Adapter,
+	IN	HT_CHANNEL_WIDTH	Bandwidth,	// 20M or 40M
+	IN	unsigned char	Offset		// Upper, Lower, or Don't care
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	HT_CHANNEL_WIDTH 	tmpBW= pHalData->CurrentChannelBW;
+	// Modified it for 20/40 mhz switch by guangan 070531
+	//PMGNT_INFO	pMgntInfo=&Adapter->MgntInfo;
+
+	//return;
+	
+	//if(pHalData->SwChnlInProgress)
+//	if(pMgntInfo->bScanInProgress)
+//	{
+//		RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s Exit because bScanInProgress!\n", 
+//					Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"));
+//		return;
+//	}
+
+//	if(pHalData->SetBWModeInProgress)
+//	{
+//		// Modified it for 20/40 mhz switch by guangan 070531
+//		RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s cancel last timer because SetBWModeInProgress!\n", 
+//					Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"));
+//		PlatformCancelTimer(Adapter, &pHalData->SetBWModeTimer);
+//		//return;
+//	}
+
+	//if(pHalData->SetBWModeInProgress)
+	//	return;
+
+	//pHalData->SetBWModeInProgress= TRUE;
+	
+	pHalData->CurrentChannelBW = Bandwidth;
+
+#if 0
+	if(Offset==HT_EXTCHNL_OFFSET_LOWER)
+		pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER;
+	else if(Offset==HT_EXTCHNL_OFFSET_UPPER)
+		pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER;
+	else
+		pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+#else
+	pHalData->nCur40MhzPrimeSC = Offset;
+#endif
+
+	if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved))
+	{
+#ifdef USE_WORKITEM	
+		//PlatformScheduleWorkItem(&(pHalData->SetBWModeWorkItem));
+#else
+	#if 0
+		//PlatformSetTimer(Adapter, &(pHalData->SetBWModeTimer), 0);
+	#else
+		_PHY_SetBWMode92C(Adapter);
+	#endif
+#endif		
+	}
+	else
+	{
+		//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() SetBWModeInProgress FALSE driver sleep or unload\n"));	
+		//pHalData->SetBWModeInProgress= FALSE;	
+		pHalData->CurrentChannelBW = tmpBW;
+	}
+	
+}
+
+
+static void _PHY_SwChnl8192C(PADAPTER Adapter, u8 channel)
+{
+	u8 eRFPath;
+	u32 param1, param2;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	if ( Adapter->bNotifyChannelChange )
+	{
+		DBG_871X( "[%s] ch = %d\n", __FUNCTION__, channel );
+	}
+
+	//s1. pre common command - CmdID_SetTxPowerLevel
+	PHY_SetTxPowerLevel8192C(Adapter, channel);
+
+	//s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel
+	param1 = RF_CHNLBW;
+	param2 = channel;
+	for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	{
+		pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2);
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);
+	}
+	
+	
+	//s3. post common command - CmdID_End, None
+
+}
+
+VOID
+PHY_SwChnl8192C(	// Call after initialization
+	IN	PADAPTER	Adapter,
+	IN	u8		channel
+	)
+{
+	//PADAPTER Adapter =  ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	tmpchannel = pHalData->CurrentChannel;
+	BOOLEAN  bResult = _TRUE;
+
+	if(pHalData->rf_chip == RF_PSEUDO_11N)
+	{
+		//pHalData->SwChnlInProgress=FALSE;
+		return; 								//return immediately if it is peudo-phy	
+	}
+	
+	//if(pHalData->SwChnlInProgress)
+	//	return;
+
+	//if(pHalData->SetBWModeInProgress)
+	//	return;
+
+	//--------------------------------------------
+	switch(pHalData->CurrentWirelessMode)
+	{
+		case WIRELESS_MODE_A:
+		case WIRELESS_MODE_N_5G:
+			//RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14"));		
+			break;
+		
+		case WIRELESS_MODE_B:
+			//RT_ASSERT((channel<=14), ("WIRELESS_MODE_B but channel>14"));
+			break;
+		
+		case WIRELESS_MODE_G:
+		case WIRELESS_MODE_N_24G:
+			//RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14"));
+			break;
+
+		default:
+			//RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode));
+			break;
+	}
+	//--------------------------------------------
+	
+	//pHalData->SwChnlInProgress = TRUE;
+	if(channel == 0)
+		channel = 1;
+	
+	pHalData->CurrentChannel=channel;
+
+	//pHalData->SwChnlStage=0;
+	//pHalData->SwChnlStep=0;
+
+	if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved))
+	{
+#ifdef USE_WORKITEM	
+		//bResult = PlatformScheduleWorkItem(&(pHalData->SwChnlWorkItem));
+#else
+		#if 0		
+		//PlatformSetTimer(Adapter, &(pHalData->SwChnlTimer), 0);
+		#else
+		_PHY_SwChnl8192C(Adapter, channel);
+		#endif
+#endif
+		if(bResult)
+		{
+			//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress TRUE schdule workitem done\n"));
+		}
+		else
+		{
+			//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE schdule workitem error\n"));		
+			//if(IS_HARDWARE_TYPE_8192SU(Adapter))
+			//{
+			//	pHalData->SwChnlInProgress = FALSE; 	
+				pHalData->CurrentChannel = tmpchannel;			
+			//}
+		}
+
+	}
+	else
+	{
+		//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n"));	
+		//if(IS_HARDWARE_TYPE_8192SU(Adapter))
+		//{
+		//	pHalData->SwChnlInProgress = FALSE;		
+			pHalData->CurrentChannel = tmpchannel;
+		//}
+	}
+}
+
+
+static	BOOLEAN
+phy_SwChnlStepByStep(
+	IN	PADAPTER	Adapter,
+	IN	u8		channel,
+	IN	u8		*stage,
+	IN	u8		*step,
+	OUT u32		*delay
+	)
+{
+#if 0
+	HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(Adapter);
+	PCHANNEL_ACCESS_SETTING	pChnlAccessSetting;
+	SwChnlCmd				PreCommonCmd[MAX_PRECMD_CNT];
+	u4Byte					PreCommonCmdCnt;
+	SwChnlCmd				PostCommonCmd[MAX_POSTCMD_CNT];
+	u4Byte					PostCommonCmdCnt;
+	SwChnlCmd				RfDependCmd[MAX_RFDEPENDCMD_CNT];
+	u4Byte					RfDependCmdCnt;
+	SwChnlCmd				*CurrentCmd;	
+	u1Byte					eRFPath;	
+	u4Byte					RfTXPowerCtrl;
+	BOOLEAN					bAdjRfTXPowerCtrl = _FALSE;
+	
+	
+	RT_ASSERT((Adapter != NULL), ("Adapter should not be NULL\n"));
+#if(MP_DRIVER != 1)
+	RT_ASSERT(IsLegalChannel(Adapter, channel), ("illegal channel: %d\n", channel));
+#endif
+	RT_ASSERT((pHalData != NULL), ("pHalData should not be NULL\n"));
+	
+	pChnlAccessSetting = &Adapter->MgntInfo.Info8185.ChannelAccessSetting;
+	RT_ASSERT((pChnlAccessSetting != NULL), ("pChnlAccessSetting should not be NULL\n"));
+	
+	//for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	//for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	//{
+		// <1> Fill up pre common command.
+	PreCommonCmdCnt = 0;
+	phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, 
+				CmdID_SetTxPowerLevel, 0, 0, 0);
+	phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, 
+				CmdID_End, 0, 0, 0);
+	
+		// <2> Fill up post common command.
+	PostCommonCmdCnt = 0;
+
+	phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT, 
+				CmdID_End, 0, 0, 0);
+	
+		// <3> Fill up RF dependent command.
+	RfDependCmdCnt = 0;
+	switch( pHalData->RFChipID )
+	{
+		case RF_8225:		
+		RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel));
+		// 2008/09/04 MH Change channel. 
+		if(channel==14) channel++;
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_RF_WriteReg, rZebra1_Channel, (0x10+channel-1), 10);
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+		CmdID_End, 0, 0, 0);
+		break;	
+		
+	case RF_8256:
+		// TEST!! This is not the table for 8256!!
+		RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel));
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_RF_WriteReg, rRfChannel, channel, 10);
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+		CmdID_End, 0, 0, 0);
+		break;
+		
+	case RF_6052:
+		RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel));
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_RF_WriteReg, RF_CHNLBW, channel, 10);		
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+		CmdID_End, 0, 0, 0);		
+		
+		break;
+
+	case RF_8258:
+		break;
+
+	// For FPGA two MAC verification
+	case RF_PSEUDO_11N:
+		return TRUE;
+	default:
+		RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID));
+		return FALSE;
+		break;
+	}
+
+	
+	do{
+		switch(*stage)
+		{
+		case 0:
+			CurrentCmd=&PreCommonCmd[*step];
+			break;
+		case 1:
+			CurrentCmd=&RfDependCmd[*step];
+			break;
+		case 2:
+			CurrentCmd=&PostCommonCmd[*step];
+			break;
+		}
+		
+		if(CurrentCmd->CmdID==CmdID_End)
+		{
+			if((*stage)==2)
+			{
+				return TRUE;
+			}
+			else
+			{
+				(*stage)++;
+				(*step)=0;
+				continue;
+			}
+		}
+		
+		switch(CurrentCmd->CmdID)
+		{
+		case CmdID_SetTxPowerLevel:
+			PHY_SetTxPowerLevel8192C(Adapter,channel);
+			break;
+		case CmdID_WritePortUlong:
+			PlatformEFIOWrite4Byte(Adapter, CurrentCmd->Para1, CurrentCmd->Para2);
+			break;
+		case CmdID_WritePortUshort:
+			PlatformEFIOWrite2Byte(Adapter, CurrentCmd->Para1, (u2Byte)CurrentCmd->Para2);
+			break;
+		case CmdID_WritePortUchar:
+			PlatformEFIOWrite1Byte(Adapter, CurrentCmd->Para1, (u1Byte)CurrentCmd->Para2);
+			break;
+		case CmdID_RF_WriteReg:	// Only modify channel for the register now !!!!!
+			for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+			{
+#if 1
+				pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | CurrentCmd->Para2);
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);
+#else
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, (CurrentCmd->Para2));
+#endif
+			}
+			break;
+		}
+		
+		break;
+	}while(TRUE);
+	//cosa }/*for(Number of RF paths)*/
+
+	(*delay)=CurrentCmd->msDelay;
+	(*step)++;
+	return FALSE;
+#endif	
+	return _TRUE;
+}
+
+
+static	BOOLEAN
+phy_SetSwChnlCmdArray(
+	SwChnlCmd*		CmdTable,
+	u32			CmdTableIdx,
+	u32			CmdTableSz,
+	SwChnlCmdID		CmdID,
+	u32			Para1,
+	u32			Para2,
+	u32			msDelay
+	)
+{
+	SwChnlCmd* pCmd;
+
+	if(CmdTable == NULL)
+	{
+		//RT_ASSERT(FALSE, ("phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n"));
+		return _FALSE;
+	}
+	if(CmdTableIdx >= CmdTableSz)
+	{
+		//RT_ASSERT(FALSE, 
+		//		("phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%ld, CmdTableSz:%ld\n",
+		//		CmdTableIdx, CmdTableSz));
+		return _FALSE;
+	}
+
+	pCmd = CmdTable + CmdTableIdx;
+	pCmd->CmdID = CmdID;
+	pCmd->Para1 = Para1;
+	pCmd->Para2 = Para2;
+	pCmd->msDelay = msDelay;
+
+	return _TRUE;
+}
+
+
+static	void
+phy_FinishSwChnlNow(	// We should not call this function directly
+		IN	PADAPTER	Adapter,
+		IN	u8		channel
+		)
+{
+#if 0
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32			delay;
+  
+	while(!phy_SwChnlStepByStep(Adapter,channel,&pHalData->SwChnlStage,&pHalData->SwChnlStep,&delay))
+	{
+		if(delay>0)
+			rtw_mdelay_os(delay);
+	}
+#endif	
+}
+
+
+
+//
+// Description:
+//	Switch channel synchronously. Called by SwChnlByDelayHandler.
+//
+// Implemented by Bruce, 2008-02-14.
+// The following procedure is operted according to SwChanlCallback8190Pci().
+// However, this procedure is performed synchronously  which should be running under
+// passive level.
+// 
+VOID
+PHY_SwChnlPhy8192C(	// Only called during initialize
+	IN	PADAPTER	Adapter,
+	IN	u8		channel
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	//RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("==>PHY_SwChnlPhy8192S(), switch from channel %d to channel %d.\n", pHalData->CurrentChannel, channel));
+
+	// Cannot IO.
+	//if(RT_CANNOT_IO(Adapter))
+	//	return;
+
+	// Channel Switching is in progress.
+	//if(pHalData->SwChnlInProgress)
+	//	return;
+	
+	//return immediately if it is peudo-phy
+	if(pHalData->rf_chip == RF_PSEUDO_11N)
+	{
+		//pHalData->SwChnlInProgress=FALSE;
+		return;
+	}
+	
+	//pHalData->SwChnlInProgress = TRUE;
+	if( channel == 0)
+		channel = 1;
+	
+	pHalData->CurrentChannel=channel;
+	
+	//pHalData->SwChnlStage = 0;
+	//pHalData->SwChnlStep = 0;
+	
+	phy_FinishSwChnlNow(Adapter,channel);
+	
+	//pHalData->SwChnlInProgress = FALSE;
+}
+
+
+//
+//	Description:
+//		Configure H/W functionality to enable/disable Monitor mode.
+//		Note, because we possibly need to configure BB and RF in this function, 
+//		so caller should in PASSIVE_LEVEL. 080118, by rcnjko.
+//
+VOID
+PHY_SetMonitorMode8192C(
+	IN	PADAPTER			pAdapter,
+	IN	BOOLEAN				bEnableMonitorMode
+	)
+{
+#if 0
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(pAdapter);
+	BOOLEAN				bFilterOutNonAssociatedBSSID = FALSE;
+
+	//2 Note: we may need to stop antenna diversity.
+	if(bEnableMonitorMode)
+	{
+		bFilterOutNonAssociatedBSSID = FALSE;
+		RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): enable monitor mode\n"));
+
+		pHalData->bInMonitorMode = TRUE;
+		pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, TRUE, TRUE);
+		rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID);
+	}
+	else
+	{
+		bFilterOutNonAssociatedBSSID = TRUE;
+		RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): disable monitor mode\n"));
+
+		pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, FALSE, TRUE);
+		pHalData->bInMonitorMode = FALSE;
+		rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID);
+	}
+#endif	
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	PHYCheckIsLegalRfPath8190Pci()
+ *
+ * Overview:	Check different RF type to execute legal judgement. If RF Path is illegal
+ *			We will return false.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	11/15/2007	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+BOOLEAN	
+PHY_CheckIsLegalRfPath8192C(	
+	IN	PADAPTER	pAdapter,
+	IN	u32	eRFPath)
+{
+//	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	BOOLEAN				rtValue = _TRUE;
+
+	// NOt check RF Path now.!
+#if 0	
+	if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A)
+	{		
+		rtValue = FALSE;
+	}
+	if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A)
+	{
+
+	}
+#endif
+	return	rtValue;
+
+}	/* PHY_CheckIsLegalRfPath8192C */
+
+//-------------------------------------------------------------------------
+//
+//	IQK
+//
+//-------------------------------------------------------------------------
+#define MAX_TOLERANCE		5
+#define IQK_DELAY_TIME		1 	//ms
+
+static u8			//bit0 = 1 => Tx OK, bit1 = 1 => Rx OK
+_PHY_PathA_IQK(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		configPathB
+	)
+{
+	u32 regEAC, regE94, regE9C, regEA4;
+	u8 result = 0x00;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+	//RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n"));
+
+	//path-A IQK setting
+	//RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n"));
+	PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
+	PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
+	PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102);
+
+	PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 : 
+		IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502);
+
+	//path-B IQK setting
+	if(configPathB)
+	{
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22);
+		PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102);
+		PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202);
+	}
+
+	//LO calibration setting
+	//RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n"));
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1);
+
+	//One shot, path A LOK & IQK
+	//RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n"));
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
+	
+	// delay x ms
+	//RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME));
+	rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000);
+
+	// Check failed
+	regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC));
+	regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94));
+	regE9C= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C));
+	regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4));
+
+        if(!(regEAC & BIT28) &&		
+		(((regE94 & 0x03FF0000)>>16) != 0x142) &&
+		(((regE9C & 0x03FF0000)>>16) != 0x42) )
+		result |= 0x01;
+	else							//if Tx not OK, ignore Rx
+		return result;
+
+	if(!(regEAC & BIT27) &&		//if Tx is OK, check whether Rx is OK
+		(((regEA4 & 0x03FF0000)>>16) != 0x132) &&
+		(((regEAC & 0x03FF0000)>>16) != 0x36))
+		result |= 0x02;
+	else
+		DBG_8192C("Path A Rx IQK fail!!\n");
+	
+	return result;
+
+
+}
+
+static u8				//bit0 = 1 => Tx OK, bit1 = 1 => Rx OK
+_PHY_PathB_IQK(
+	IN	PADAPTER	pAdapter
+	)
+{
+	u32 regEAC, regEB4, regEBC, regEC4, regECC;
+	u8	result = 0x00;
+	//RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n"));
+
+	//One shot, path B LOK & IQK
+	//RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n"));
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002);
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000);
+
+	// delay x ms
+	//RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME));
+	rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000);
+
+	// Check failed
+	regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC));
+	regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4));
+	regEBC= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC));
+	regEC4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4));
+	regECC= PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC));
+
+	if(!(regEAC & BIT31) &&
+		(((regEB4 & 0x03FF0000)>>16) != 0x142) &&
+		(((regEBC & 0x03FF0000)>>16) != 0x42))
+		result |= 0x01;
+	else
+		return result;
+
+	if(!(regEAC & BIT30) &&
+		(((regEC4 & 0x03FF0000)>>16) != 0x132) &&
+		(((regECC & 0x03FF0000)>>16) != 0x36))
+		result |= 0x02;
+	else
+		DBG_8192C("Path B Rx IQK fail!!\n");
+	
+
+	return result;
+
+}
+
+static VOID
+_PHY_PathAFillIQKMatrix(
+	IN	PADAPTER	pAdapter,
+	IN 	BOOLEAN    	bIQKOK,
+	IN	int			result[][8],
+	IN	u8			final_candidate,
+	IN 	BOOLEAN		bTxOnly
+	)
+{
+	u32	Oldval_0, X, TX0_A, reg;
+	s32	Y, TX0_C;
+
+	DBG_8192C("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed");
+
+	if(final_candidate == 0xFF)
+		return;
+	else if(bIQKOK)
+	{
+		Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
+
+		X = result[final_candidate][0];
+		if ((X & 0x00000200) != 0)
+			X = X | 0xFFFFFC00;
+		TX0_A = (X * Oldval_0) >> 8;
+		//RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX0_A = 0x%lx, Oldval_0 0x%lx\n", X, TX0_A, Oldval_0));
+		PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A);
+		PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1));
+
+		Y = result[final_candidate][1];
+		if ((Y & 0x00000200) != 0)
+			Y = Y | 0xFFFFFC00;
+		TX0_C = (Y * Oldval_0) >> 8;
+		//RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX = 0x%lx\n", Y, TX0_C));
+		PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6));
+		PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F));
+		PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1));
+
+	        if(bTxOnly)
+		{
+			DBG_8192C("_PHY_PathAFillIQKMatrix only Tx OK\n");
+			return;
+		}
+
+		reg = result[final_candidate][2];
+		PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg);
+
+		reg = result[final_candidate][3] & 0x3F;
+		PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg);
+
+		reg = (result[final_candidate][3] >> 6) & 0xF;
+		PHY_SetBBReg(pAdapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg);
+	}
+}
+
+static VOID
+_PHY_PathBFillIQKMatrix(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN   	bIQKOK,
+	IN	int			result[][8],
+	IN	u8			final_candidate,
+	IN	BOOLEAN		bTxOnly			//do Tx only
+	)
+{
+	u32	Oldval_1, X, TX1_A, reg;
+	s32	Y, TX1_C;
+	
+	DBG_8192C("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed");
+
+	if(final_candidate == 0xFF)
+		return;
+	else if(bIQKOK)
+	{
+		Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
+
+		X = result[final_candidate][4];
+		if ((X & 0x00000200) != 0)
+			X = X | 0xFFFFFC00;		
+		TX1_A = (X * Oldval_1) >> 8;
+		//RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX1_A = 0x%lx\n", X, TX1_A));
+		PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A);
+		PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1));
+
+		Y = result[final_candidate][5];
+		if ((Y & 0x00000200) != 0)
+			Y = Y | 0xFFFFFC00;		
+		TX1_C = (Y * Oldval_1) >> 8;
+		//RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX1_C = 0x%lx\n", Y, TX1_C));
+		PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6));
+		PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F));
+		PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1));
+
+		if(bTxOnly)
+			return;
+
+		reg = result[final_candidate][6];
+		PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg);
+
+		reg = result[final_candidate][7] & 0x3F;
+		PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg);
+
+		reg = (result[final_candidate][7] >> 6) & 0xF;
+		PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg);
+	}
+}
+
+static VOID
+_PHY_SaveADDARegisters(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		ADDAReg,
+	IN	u32*		ADDABackup,
+	IN	u32			RegisterNum
+	)
+{
+	u32	i;
+	
+	//RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n"));
+	for( i = 0 ; i < RegisterNum ; i++){
+		ADDABackup[i] = PHY_QueryBBReg(pAdapter, ADDAReg[i], bMaskDWord);
+	}
+}
+
+static VOID
+_PHY_SaveMACRegisters(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		MACReg,
+	IN	u32*		MACBackup
+	)
+{
+	u32	i;
+	
+	//RTPRINT(FINIT, INIT_IQK, ("Save MAC parameters.\n"));
+	for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){
+		MACBackup[i] =rtw_read8(pAdapter, MACReg[i]);		
+	}
+	MACBackup[i] = rtw_read32(pAdapter, MACReg[i]);		
+
+}
+
+static VOID
+_PHY_ReloadADDARegisters(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		ADDAReg,
+	IN	u32*		ADDABackup,
+	IN	u32			RegiesterNum
+	)
+{
+	u32	i;
+
+	//RTPRINT(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n"));
+	for(i = 0 ; i < RegiesterNum ; i++){
+		PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, ADDABackup[i]);
+	}
+}
+
+static VOID
+_PHY_ReloadMACRegisters(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		MACReg,
+	IN	u32*		MACBackup
+	)
+{
+	u32	i;
+
+	//RTPRINT(FINIT, INIT_IQK, ("Reload MAC parameters !\n"));
+	for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){
+		rtw_write8(pAdapter, MACReg[i], (u8)MACBackup[i]);
+	}
+	rtw_write32(pAdapter, MACReg[i], MACBackup[i]);	
+}
+
+static VOID
+_PHY_PathADDAOn(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		ADDAReg,
+	IN	BOOLEAN		isPathAOn,
+	IN	BOOLEAN		is2T
+	)
+{
+	u32	pathOn;
+	u32	i;
+
+	//RTPRINT(FINIT, INIT_IQK, ("ADDA ON.\n"));
+
+	pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4;
+	if(_FALSE == is2T){
+		pathOn = 0x0bdb25a0;
+		PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, 0x0b1b25a0);
+	}
+	else{
+		PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, pathOn);
+	}
+	
+	for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){
+		PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, pathOn);
+	}
+	
+}
+
+static VOID
+_PHY_MACSettingCalibration(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		MACReg,
+	IN	u32*		MACBackup	
+	)
+{
+	u32	i = 0;
+
+	//RTPRINT(FINIT, INIT_IQK, ("MAC settings for Calibration.\n"));
+
+	rtw_write8(pAdapter, MACReg[i], 0x3F);
+
+	for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){
+		rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT3)));
+	}
+	rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT5)));	
+
+}
+
+static VOID
+_PHY_PathAStandBy(
+	IN	PADAPTER	pAdapter
+	)
+{
+	//RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n"));
+
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x0);
+	PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000);
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
+}
+
+static VOID
+_PHY_PIModeSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		PIMode
+	)
+{
+	u32	mode;
+
+	//RTPRINT(FINIT, INIT_IQK, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI")));
+
+	mode = PIMode ? 0x01000100 : 0x01000000;
+	PHY_SetBBReg(pAdapter, 0x820, bMaskDWord, mode);
+	PHY_SetBBReg(pAdapter, 0x828, bMaskDWord, mode);
+}
+
+/*
+return _FALSE => do IQK again
+*/
+static BOOLEAN							
+_PHY_SimularityCompare(
+	IN	PADAPTER	pAdapter,
+	IN	int 		result[][8],
+	IN	u8		 c1,
+	IN	u8		 c2
+	)
+{
+	u32		i, j, diff, SimularityBitMap, bound = 0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);	
+	u8		final_candidate[2] = {0xFF, 0xFF};	//for path A and path B
+	BOOLEAN		bResult = _TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID);
+	
+	if(is2T)
+		bound = 8;
+	else
+		bound = 4;
+
+	SimularityBitMap = 0;
+	
+	for( i = 0; i < bound; i++ )
+	{
+		diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]);
+		if (diff > MAX_TOLERANCE)
+		{
+			if((i == 2 || i == 6) && !SimularityBitMap)
+			{
+				if(result[c1][i]+result[c1][i+1] == 0)
+					final_candidate[(i/4)] = c2;
+				else if (result[c2][i]+result[c2][i+1] == 0)
+					final_candidate[(i/4)] = c1;
+				else
+					SimularityBitMap = SimularityBitMap|(1<<i);
+			}
+			else
+				SimularityBitMap = SimularityBitMap|(1<<i);
+		}
+	}
+	
+	if ( SimularityBitMap == 0)
+	{
+		for( i = 0; i < (bound/4); i++ )
+		{
+			if(final_candidate[i] != 0xFF)
+			{
+				for( j = i*4; j < (i+1)*4-2; j++)
+					result[3][j] = result[final_candidate[i]][j];
+				bResult = _FALSE;
+			}
+		}
+		return bResult;
+	}
+	else if (!(SimularityBitMap & 0x0F))			//path A OK
+	{
+		for(i = 0; i < 4; i++)
+			result[3][i] = result[c1][i];
+		return _FALSE;
+	}
+	else if (!(SimularityBitMap & 0xF0) && is2T)	//path B OK
+	{
+		for(i = 4; i < 8; i++)
+			result[3][i] = result[c1][i];
+		return _FALSE;
+	}	
+	else		
+		return _FALSE;
+	
+}
+
+static VOID	
+_PHY_IQCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	int 		result[][8],
+	IN	u8		t,
+	IN	BOOLEAN		is2T
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32			i;
+	u8			PathAOK, PathBOK;
+	u32			ADDA_REG[IQK_ADDA_REG_NUM] = {	
+						rFPGA0_XCD_SwitchControl, 	rBlue_Tooth, 	
+						rRx_Wait_CCA, 		rTx_CCK_RFON,
+						rTx_CCK_BBON, 	rTx_OFDM_RFON, 	
+						rTx_OFDM_BBON, 	rTx_To_Rx,
+						rTx_To_Tx, 		rRx_CCK, 	
+						rRx_OFDM, 		rRx_Wait_RIFS,
+						rRx_TO_Rx, 		rStandby, 	
+						rSleep, 			rPMPD_ANAEN };
+
+	u32			IQK_MAC_REG[IQK_MAC_REG_NUM] = {
+						REG_TXPAUSE, 		REG_BCN_CTRL,	
+						REG_BCN_CTRL_1,	REG_GPIO_MUXCFG};
+
+	u32			IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
+							rOFDM0_TRxPathEnable, 		rOFDM0_TRMuxPar,	
+							rFPGA0_XCD_RFInterfaceSW,	rConfig_AntA,	rConfig_AntB,
+							rFPGA0_XAB_RFInterfaceSW,	rFPGA0_XA_RFInterfaceOE,	
+							rFPGA0_XB_RFInterfaceOE,	rFPGA0_RFMOD	
+							};
+
+#if MP_DRIVER
+	const u32	retryCount = 9;
+#else
+	const u32	retryCount = 2;
+#endif
+
+	// Note: IQ calibration must be performed after loading 
+	// 		PHY_REG.txt , and radio_a, radio_b.txt	
+	
+	u32 bbvalue;
+
+	if(t==0)
+	{
+	 	bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("PHY_IQCalibrate()==>0x%08lx\n",bbvalue));
+
+		//RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R")));
+	
+	 	// Save ADDA parameters, turn Path A ADDA on
+	 	_PHY_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup,IQK_ADDA_REG_NUM);
+		_PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+		_PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM);
+	}
+ 	_PHY_PathADDAOn(pAdapter, ADDA_REG, _TRUE, is2T);
+
+	if(t==0)
+	{
+		pdmpriv->bRfPiEnable = (u8)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8));
+	}
+
+	if(!pdmpriv->bRfPiEnable){
+		// Switch BB to PI mode to do IQ Calibration.
+		_PHY_PIModeSwitch(pAdapter, _TRUE);
+	}
+
+	PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT24, 0x00);
+	PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600);
+	PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
+	PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000);
+	PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01);
+	PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01);
+	PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00);
+	PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00);
+
+	if(is2T)
+	{
+		PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000);
+		PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000);
+	}
+	
+	//MAC settings
+	_PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+
+	//Page B init
+	PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000);
+	
+	if(is2T)
+	{
+		PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000);
+	}
+	
+	// IQ calibration setting
+	//RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n"));		
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
+	PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00);
+	PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800);
+
+	for(i = 0 ; i < retryCount ; i++){
+		PathAOK = _PHY_PathA_IQK(pAdapter, is2T);
+		if(PathAOK == 0x03){
+				DBG_8192C("Path A IQK Success!!\n");
+				result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+				result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+				result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
+				result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
+			break;
+		}
+		else if (i == (retryCount-1) && PathAOK == 0x01)	//Tx IQK OK
+		{
+			DBG_8192C("Path A IQK Only  Tx Success!!\n");
+			
+			result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+			result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;			
+		}
+	}
+
+	if(0x00 == PathAOK){		
+		DBG_8192C("Path A IQK failed!!\n");
+	}
+
+	if(is2T){
+		_PHY_PathAStandBy(pAdapter);
+
+		// Turn Path B ADDA on
+		_PHY_PathADDAOn(pAdapter, ADDA_REG, _FALSE, is2T);
+
+		for(i = 0 ; i < retryCount ; i++){
+			PathBOK = _PHY_PathB_IQK(pAdapter);
+			if(PathBOK == 0x03){
+				DBG_8192C("Path B IQK Success!!\n");
+				result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+				result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+				result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
+				result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
+				break;
+			}
+			else if (i == (retryCount - 1) && PathBOK == 0x01)	//Tx IQK OK
+			{
+				DBG_8192C("Path B Only Tx IQK Success!!\n");
+				result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+				result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+			}
+		}
+
+		if(0x00 == PathBOK){		
+			DBG_8192C("Path B IQK failed!!\n");
+		}
+	}
+
+	//Back to BB mode, load original value
+	//RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n"));
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0);
+
+	if(t!=0)
+	{
+		if(!pdmpriv->bRfPiEnable){
+			// Switch back BB to SI mode after finish IQ Calibration.
+			_PHY_PIModeSwitch(pAdapter, _FALSE);
+		}
+
+		// Reload ADDA power saving parameters
+	 	_PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM);
+
+		// Reload MAC parameters
+		_PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+
+	 	// Reload BB parameters
+	 	_PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM);
+
+		// Restore RX initial gain
+		PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3);
+		if(is2T){
+			PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3);
+		}
+
+		//load 0xe30 IQC default value
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);
+
+	}
+	//RTPRINT(FINIT, INIT_IQK, ("_PHY_IQCalibrate() <==\n"));
+
+}
+
+
+static VOID	
+_PHY_LCCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		is2T
+	)
+{
+	u8	tmpReg;
+	u32 	RF_Amode = 0, RF_Bmode = 0, LC_Cal;
+
+	//Check continuous TX and Packet TX
+	tmpReg = rtw_read8(pAdapter, 0xd03);
+
+	if((tmpReg&0x70) != 0)			//Deal with contisuous TX case
+		rtw_write8(pAdapter, 0xd03, tmpReg&0x8F);	//disable all continuous TX
+	else 							// Deal with Packet TX case
+		rtw_write8(pAdapter, REG_TXPAUSE, 0xFF);			// block all queues
+
+	if((tmpReg&0x70) != 0)
+	{
+		//1. Read original RF mode
+		//Path-A
+		RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits);
+
+		//Path-B
+		if(is2T)
+			RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits);	
+
+		//2. Set RF mode = standby mode
+		//Path-A
+		PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000);
+
+		//Path-B
+		if(is2T)
+			PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000);
+	}
+	
+	//3. Read RF reg18
+	LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits);
+	
+	//4. Set LC calibration begin
+	PHY_SetRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000);
+
+	#ifdef CONFIG_LONG_DELAY_ISSUE
+	rtw_msleep_os(100);	
+	#else
+	rtw_mdelay_os(100);		
+	#endif
+
+	//Restore original situation
+	if((tmpReg&0x70) != 0)	//Deal with contisuous TX case 
+	{  
+		//Path-A
+		rtw_write8(pAdapter, 0xd03, tmpReg);
+		PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode);
+		
+		//Path-B
+		if(is2T)
+			PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode);
+	}
+	else // Deal with Packet TX case
+	{
+		rtw_write8(pAdapter, REG_TXPAUSE, 0x00);	
+	}
+	
+}
+
+
+//Analog Pre-distortion calibration
+#define		APK_BB_REG_NUM	8
+#define		APK_CURVE_REG_NUM 4
+#define		PATH_NUM		2
+
+static VOID	
+_PHY_APCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	char 		delta,
+	IN	BOOLEAN		is2T
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	u32 			regD[PATH_NUM];
+	u32			tmpReg, index, offset, i, apkbound;
+	u8			path, pathbound = PATH_NUM;
+	u32			BB_backup[APK_BB_REG_NUM];
+	u32			BB_REG[APK_BB_REG_NUM] = {	
+						rFPGA1_TxBlock, 	rOFDM0_TRxPathEnable, 
+						rFPGA0_RFMOD, 	rOFDM0_TRMuxPar, 
+						rFPGA0_XCD_RFInterfaceSW,	rFPGA0_XAB_RFInterfaceSW, 
+						rFPGA0_XA_RFInterfaceOE, 	rFPGA0_XB_RFInterfaceOE	};
+	u32			BB_AP_MODE[APK_BB_REG_NUM] = {	
+						0x00000020, 0x00a05430, 0x02040000, 
+						0x000800e4, 0x00204000 };
+	u32			BB_normal_AP_MODE[APK_BB_REG_NUM] = {	
+						0x00000020, 0x00a05430, 0x02040000, 
+						0x000800e4, 0x22204000 };						
+
+	u32			AFE_backup[IQK_ADDA_REG_NUM];
+	u32			AFE_REG[IQK_ADDA_REG_NUM] = {	
+						rFPGA0_XCD_SwitchControl, 	rBlue_Tooth, 	
+						rRx_Wait_CCA, 		rTx_CCK_RFON,
+						rTx_CCK_BBON, 	rTx_OFDM_RFON, 	
+						rTx_OFDM_BBON, 	rTx_To_Rx,
+						rTx_To_Tx, 		rRx_CCK, 	
+						rRx_OFDM, 		rRx_Wait_RIFS,
+						rRx_TO_Rx, 		rStandby, 	
+						rSleep, 			rPMPD_ANAEN };
+
+	u32			MAC_backup[IQK_MAC_REG_NUM];
+	u32			MAC_REG[IQK_MAC_REG_NUM] = {
+						REG_TXPAUSE, 		REG_BCN_CTRL,	
+						REG_BCN_CTRL_1,	REG_GPIO_MUXCFG};
+
+	u32			APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c},
+					{0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e}
+					};	
+
+	u32			APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c},	//path settings equal to path b settings
+					{0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c}
+					};
+	
+	u32			APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d},
+					{0x5201a, 0x52019, 0x52016, 0x52033, 0x52050}
+					};
+
+	u32			APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a},	//path settings equal to path b settings
+					{0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}
+					};
+#if 0
+	u32			APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80},		
+					{0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80}						
+					};
+#endif
+	u32			AFE_on_off[PATH_NUM] = {
+					0x04db25a4, 0x0b1b25a4};	//path A on path B off / path A off path B on
+
+	u32			APK_offset[PATH_NUM] = {
+					rConfig_AntA, rConfig_AntB};
+
+	u32			APK_normal_offset[PATH_NUM] = {
+					rConfig_Pmpd_AntA, rConfig_Pmpd_AntB};
+					
+	u32			APK_value[PATH_NUM] = {
+					0x92fc0000, 0x12fc0000};					
+
+	u32			APK_normal_value[PATH_NUM] = {
+					0x92680000, 0x12680000};					
+
+	char			APK_delta_mapping[APK_BB_REG_NUM][13] = {
+					{-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+					{-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+					{-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+					{-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+					{-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0}
+					};
+	
+	u32			APK_normal_setting_value_1[13] = {
+					0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28,
+					0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3,
+					0x12680000, 0x00880000, 0x00880000
+					};
+
+	u32			APK_normal_setting_value_2[16] = {
+					0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3,
+					0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025,
+					0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008,
+					0x00050006
+					};
+	
+	u32			APK_result[PATH_NUM][APK_BB_REG_NUM];	//val_1_1a, val_1_2a, val_2a, val_3a, val_4a
+	//u32			AP_curve[PATH_NUM][APK_CURVE_REG_NUM];
+
+	int			BB_offset, delta_V, delta_offset;
+
+#if (MP_DRIVER == 1)
+	PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;
+
+	pMptCtx->APK_bound[0] = 45;
+	pMptCtx->APK_bound[1] = 52;
+#endif
+
+	//RTPRINT(FINIT, INIT_IQK, ("==>PHY_APCalibrate() delta %d\n", delta));
+	
+	//RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s %s\n", (is2T ? "2T2R" : "1T1R"), (isNormal ? "Normal chip" : "Test chip")));
+
+	if(!is2T)
+		pathbound = 1;
+
+	//2 FOR NORMAL CHIP SETTINGS
+
+// Temporarily do not allow normal driver to do the following settings because these offset
+// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal
+// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the
+// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31.
+#if (MP_DRIVER != 1)
+	return;
+#endif
+
+	//settings adjust for normal chip
+	for(index = 0; index < PATH_NUM; index ++)
+	{
+		APK_offset[index] = APK_normal_offset[index];
+		APK_value[index] = APK_normal_value[index];
+		AFE_on_off[index] = 0x6fdb25a4;
+	}
+
+	for(index = 0; index < APK_BB_REG_NUM; index ++)
+	{
+		for(path = 0; path < pathbound; path++)
+		{
+			APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index];
+			APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index];
+		}
+		BB_AP_MODE[index] = BB_normal_AP_MODE[index];
+	}
+
+	apkbound = 6;
+
+	//save BB default value	
+	for(index = 0; index < APK_BB_REG_NUM ; index++)
+	{
+		if(index == 0)		//skip 
+			continue;				
+		BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord);
+	}
+
+	//save MAC default value													
+	_PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup);
+
+	//save AFE default value
+	_PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
+
+	for(path = 0; path < pathbound; path++)
+	{
+		if(path == RF_PATH_A)
+		{
+			//path A APK
+			//load APK setting
+			//path-A		
+			offset = rPdp_AntA;
+			for(index = 0; index < 11; index ++)			
+			{
+				PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+				
+				offset += 0x04;
+			}
+			
+			PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000);
+			
+			offset = rConfig_AntA;
+			for(; index < 13; index ++) 		
+			{
+				PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+				
+				offset += 0x04;
+			}	
+			
+			//page-B1
+			PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000);
+			
+			//path A
+			offset = rPdp_AntA;
+			for(index = 0; index < 16; index++)
+			{
+				PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]);		
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+				
+				offset += 0x04;
+			}				
+			PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);							
+		}
+		else if(path == RF_PATH_B)
+		{
+			//path B APK
+			//load APK setting
+			//path-B		
+			offset = rPdp_AntB;
+			for(index = 0; index < 10; index ++)			
+			{
+				PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+				
+				offset += 0x04;
+			}
+			PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000);
+			
+			PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000);
+			
+			offset = rConfig_AntA;
+			index = 11;
+			for(; index < 13; index ++) //offset 0xb68, 0xb6c		
+			{
+				PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+				
+				offset += 0x04;
+			}	
+			
+			//page-B1
+			PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000);
+			
+			//path B
+			offset = 0xb60;
+			for(index = 0; index < 16; index++)
+			{
+				PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]);		
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+				
+				offset += 0x04;
+			}				
+			PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);							
+		}		
+
+		//save RF default value
+		regD[path] = PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask);
+		
+		//Path A AFE all on, path B AFE All off or vise versa
+		for(index = 0; index < IQK_ADDA_REG_NUM ; index++)
+			PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]);
+		//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, 0xe70, bMaskDWord)));		
+
+		//BB to AP mode
+		if(path == 0)
+		{
+			for(index = 0; index < APK_BB_REG_NUM ; index++)
+			{
+				if(index == 0)		//skip 
+					continue;
+				else if (index < 5)
+					PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]);
+				else if (BB_REG[index] == 0x870)
+					PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26);
+				else
+					PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0);
+			}
+			PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);
+			PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);
+		}
+		else		//path B
+		{
+			PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00);
+			PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00);
+		}
+
+		//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord)));				
+
+		//MAC settings
+		_PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup);
+
+		if(path == RF_PATH_A)	//Path B to standby mode
+		{
+			PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0x10000);			
+		}
+		else			//Path A to standby mode
+		{
+			PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x10000);			
+			PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f);			
+			PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20103);						
+		}
+
+		delta_offset = ((delta+14)/2);
+		if(delta_offset < 0)
+			delta_offset = 0;
+		else if (delta_offset > 12)
+			delta_offset = 12;
+			
+		//AP calibration
+		for(index = 0; index < APK_BB_REG_NUM; index++)
+		{
+			if(index != 1)		//only DO PA11+PAD01001, AP RF setting
+				continue;
+					
+			tmpReg = APK_RF_init_value[path][index];
+#if 1			
+			if(!pdmpriv->bAPKThermalMeterIgnore)
+			{
+				BB_offset = (tmpReg & 0xF0000) >> 16;
+
+				if(!(tmpReg & BIT15)) //sign bit 0
+				{
+					BB_offset = -BB_offset;
+				}
+
+				delta_V = APK_delta_mapping[index][delta_offset];
+				
+				BB_offset += delta_V;
+
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() APK num %d delta_V %d delta_offset %d\n", index, delta_V, delta_offset));		
+				
+				if(BB_offset < 0)
+				{
+					tmpReg = tmpReg & (~BIT15);
+					BB_offset = -BB_offset;
+				}
+				else
+				{
+					tmpReg = tmpReg | BIT15;
+				}
+				tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16);
+			}
+#endif
+
+#ifdef CONFIG_PCI_HCI
+			if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
+				PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_IPA_A, bRFRegOffsetMask, 0x894ae);
+			else
+#endif
+				PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_IPA_A, bRFRegOffsetMask, 0x8992e);
+			//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, 0xc, bMaskDWord)));
+			PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_AC, bRFRegOffsetMask, APK_RF_value_0[path][index]);
+			//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, 0x0, bMaskDWord)));		
+			PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask, tmpReg);
+			//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, 0xd, bMaskDWord)));
+
+			// PA11+PAD01111, one shot	
+			i = 0;
+			do
+			{
+				PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80000000);
+				{
+					PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]);		
+					//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord)));
+					rtw_mdelay_os(3);				
+					PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]);
+					//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord)));
+					#ifdef CONFIG_LONG_DELAY_ISSUE
+					rtw_msleep_os(20);
+					#else
+					rtw_mdelay_os(20);
+					#endif
+				}
+				PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);
+				
+				if(path == RF_PATH_A)
+					tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0x03E00000);
+				else
+					tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0xF8000000);
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xbd8[25:21] %x\n", tmpReg));
+
+				i++;
+			}
+			while(tmpReg > apkbound && i < 4);
+
+			APK_result[path][index] = tmpReg;
+		}
+	}
+
+	//reload MAC default value	
+	_PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup);
+
+	//reload BB default value	
+	for(index = 0; index < APK_BB_REG_NUM ; index++)
+	{
+		if(index == 0)		//skip 
+			continue;
+		PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]);
+	}
+
+	//reload AFE default value
+	_PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
+
+	//reload RF path default value
+	for(path = 0; path < pathbound; path++)
+	{
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask, regD[path]);
+		if(path == RF_PATH_B)
+		{
+			PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f);			
+			PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20101);						
+		}
+
+		//note no index == 0
+		if (APK_result[path][1] > 6)
+			APK_result[path][1] = 6;
+		//RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1]));
+	}
+
+	//RTPRINT(FINIT, INIT_IQK, ("\n"));
+	
+
+	for(path = 0; path < pathbound; path++)
+	{
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G1_G4, bRFRegOffsetMask, 
+		((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1]));
+		if(path == RF_PATH_A)
+			PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, 
+			((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05));
+		else
+			PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, 
+			((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05));
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G9_G11, bRFRegOffsetMask, 
+		((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08));
+	}
+
+	pdmpriv->bAPKdone = _TRUE;
+
+	//RTPRINT(FINIT, INIT_IQK, ("<==PHY_APCalibrate()\n"));
+}
+
+static VOID _PHY_SetRFPathSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		bMain,
+	IN	BOOLEAN		is2T
+	)
+{
+	u8	u1bTmp;
+
+	if(!pAdapter->hw_init_completed)
+	{
+		u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7;
+		rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp);
+		//PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01);
+		PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
+	}
+
+	if(is2T)
+	{
+		if(bMain)
+			PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1);	//92C_Path_A			
+		else
+			PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2);	//BT							
+	}
+	else
+	{
+	
+		if(bMain)
+			PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2);	//Main
+		else
+			PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1);	//Aux		
+	}
+
+}
+
+//return value TRUE => Main; FALSE => Aux
+
+static BOOLEAN _PHY_QueryRFPathSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		is2T
+	)
+{
+//	if(is2T)
+//		return _TRUE;
+	
+	if(!pAdapter->hw_init_completed)
+	{
+		PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01);
+		PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
+	}
+
+	if(is2T)
+	{
+		if(PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01)
+			return _TRUE;
+		else
+			return _FALSE;
+	}
+	else
+	{
+		if(PHY_QueryBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02)
+			return _TRUE;
+		else
+			return _FALSE;
+	}
+}
+
+VOID
+rtl8192c_PHY_IQCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN 	bReCovery
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	s32			result[4][8];	//last is final result
+	u8			i, final_candidate;
+	BOOLEAN		bPathAOK, bPathBOK;
+	s32			RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0;
+	BOOLEAN		is12simular, is13simular, is23simular;	
+	BOOLEAN 	bStartContTx = _FALSE, bSingleTone = _FALSE, bCarrierSuppression = _FALSE;
+	u32			IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
+					rOFDM0_XARxIQImbalance, 	rOFDM0_XBRxIQImbalance, 
+					rOFDM0_ECCAThreshold, 	rOFDM0_AGCRSSITable,
+					rOFDM0_XATxIQImbalance, 	rOFDM0_XBTxIQImbalance, 
+					rOFDM0_XCTxAFE, 			rOFDM0_XDTxAFE, 
+					rOFDM0_RxIQExtAnta};
+
+
+#if MP_DRIVER == 1	
+	bStartContTx = pAdapter->mppriv.MptCtx.bStartContTx;
+	bSingleTone = pAdapter->mppriv.MptCtx.bSingleTone;
+	bCarrierSuppression = pAdapter->mppriv.MptCtx.bCarrierSuppression;	
+#endif
+
+	//ignore IQK when continuous Tx
+	if(bStartContTx || bSingleTone || bCarrierSuppression)
+		return;
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+	if(bReCovery)
+	{
+		_PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup_recover, 9);
+		return;
+	}
+	DBG_8192C("IQK:Start!!!\n");
+
+	for(i = 0; i < 8; i++)
+	{
+		result[0][i] = 0;
+		result[1][i] = 0;
+		result[2][i] = 0;
+		result[3][i] = 0;
+	}
+	final_candidate = 0xff;
+	bPathAOK = _FALSE;
+	bPathBOK = _FALSE;
+	is12simular = _FALSE;
+	is23simular = _FALSE;
+	is13simular = _FALSE;
+
+	for (i=0; i<3; i++)
+	{
+	 	if(IS_92C_SERIAL( pHalData->VersionID)){
+			 _PHY_IQCalibrate(pAdapter, result, i, _TRUE);
+	 	}
+	 	else{
+	 		// For 88C 1T1R
+	 		_PHY_IQCalibrate(pAdapter, result, i, _FALSE);
+ 		}
+		
+		if(i == 1)
+		{
+			is12simular = _PHY_SimularityCompare(pAdapter, result, 0, 1);
+			if(is12simular)
+			{
+				final_candidate = 0;
+				break;
+			}
+		}
+		
+		if(i == 2)
+		{
+			is13simular = _PHY_SimularityCompare(pAdapter, result, 0, 2);
+			if(is13simular)
+			{
+				final_candidate = 0;			
+				break;
+			}
+			
+			is23simular = _PHY_SimularityCompare(pAdapter, result, 1, 2);
+			if(is23simular)
+				final_candidate = 1;
+			else
+			{
+				for(i = 0; i < 8; i++)
+					RegTmp += result[3][i];
+
+				if(RegTmp != 0)
+					final_candidate = 3;			
+				else
+					final_candidate = 0xFF;
+			}
+		}
+	}
+
+        for (i=0; i<4; i++)
+	{
+		RegE94 = result[i][0];
+		RegE9C = result[i][1];
+		RegEA4 = result[i][2];
+		RegEAC = result[i][3];
+		RegEB4 = result[i][4];
+		RegEBC = result[i][5];
+		RegEC4 = result[i][6];
+		RegECC = result[i][7];
+		//RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%lx RegE9C=%lx RegEA4=%lx RegEAC=%lx RegEB4=%lx RegEBC=%lx RegEC4=%lx RegECC=%lx\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC));
+	}
+
+	if(final_candidate != 0xff)
+	{
+		pdmpriv->RegE94 = RegE94 = result[final_candidate][0];
+		pdmpriv->RegE9C = RegE9C = result[final_candidate][1];
+		RegEA4 = result[final_candidate][2];
+		RegEAC = result[final_candidate][3];
+		pdmpriv->RegEB4 = RegEB4 = result[final_candidate][4];
+		pdmpriv->RegEBC = RegEBC = result[final_candidate][5];
+		RegEC4 = result[final_candidate][6];
+		RegECC = result[final_candidate][7];
+		DBG_8192C("IQK: final_candidate is %x\n", final_candidate);
+		DBG_8192C("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC);
+		bPathAOK = bPathBOK = _TRUE;
+	}
+	else
+	{
+		RegE94 = RegEB4 = pdmpriv->RegE94 = pdmpriv->RegEB4 = 0x100;	//X default value
+		RegE9C = RegEBC = pdmpriv->RegE9C = pdmpriv->RegEBC = 0x0;		//Y default value
+	}
+	
+	if((RegE94 != 0)/*&&(RegEA4 != 0)*/)
+		_PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0));
+	
+	if(IS_92C_SERIAL( pHalData->VersionID)){
+		if((RegEB4 != 0)/*&&(RegEC4 != 0)*/)
+		_PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0));
+	}
+
+	_PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup_recover, 9);
+
+}
+
+
+VOID
+rtl8192c_PHY_LCCalibrate(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct mlme_ext_priv	*pmlmeext = &pAdapter->mlmeextpriv;
+	BOOLEAN 	bStartContTx = _FALSE, bSingleTone = _FALSE, bCarrierSuppression = _FALSE;
+
+#if MP_DRIVER == 1
+	bStartContTx = pAdapter->mppriv.MptCtx.bStartContTx;
+	bSingleTone = pAdapter->mppriv.MptCtx.bSingleTone;
+	bCarrierSuppression = pAdapter->mppriv.MptCtx.bCarrierSuppression;
+#endif
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+	//ignore IQK when continuous Tx
+	if(bStartContTx || bSingleTone || bCarrierSuppression)
+		return;
+
+	if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
+		return;
+
+	if(IS_92C_SERIAL( pHalData->VersionID)){
+		_PHY_LCCalibrate(pAdapter, _TRUE);
+	}
+	else{
+		// For 88C 1T1R
+		_PHY_LCCalibrate(pAdapter, _FALSE);
+	}
+}
+
+VOID
+rtl8192c_PHY_APCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	char 		delta	
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	//default disable APK, because Tx NG issue, suggest by Jenyu, 2011.11.25
+	return;
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+	if(pdmpriv->bAPKdone)
+		return;
+
+	if(IS_92C_SERIAL( pHalData->VersionID)){
+		_PHY_APCalibrate(pAdapter, delta, _TRUE);
+	}
+	else{
+		// For 88C 1T1R
+		_PHY_APCalibrate(pAdapter, delta, _FALSE);
+	}
+}
+
+VOID rtl8192c_PHY_SetRFPathSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		bMain
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+	if(IS_92C_SERIAL( pHalData->VersionID)){
+		_PHY_SetRFPathSwitch(pAdapter, bMain, _TRUE);
+	}
+	else{
+		// For 88C 1T1R
+		_PHY_SetRFPathSwitch(pAdapter, bMain, _FALSE);
+	}
+}
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_rf6052.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_rf6052.c
new file mode 100755
index 00000000..cf469693
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_rf6052.c
@@ -0,0 +1,1031 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/******************************************************************************
+ * 
+ * 
+ * Module:	rtl8192c_rf6052.c	( Source C File)
+ * 
+ * Note:	Provide RF 6052 series relative API.	 
+ *
+ * Function:	
+ * 		 
+ * Export:	
+ * 
+ * Abbrev:	
+ * 
+ * History:
+ * Data			Who		Remark
+ * 
+ * 09/25/2008	MHC		Create initial version.
+ * 11/05/2008 	MHC		Add API for tw power setting.
+ * 
+ * 	
+******************************************************************************/
+
+#define _RTL8192C_RF6052_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+
+#include <rtl8192c_hal.h>
+
+/*---------------------------Define Local Constant---------------------------*/
+// Define local structure for debug!!!!!
+typedef struct RF_Shadow_Compare_Map {
+	// Shadow register value
+	u32		Value;
+	// Compare or not flag
+	u8		Compare;
+	// Record If it had ever modified unpredicted
+	u8		ErrorOrNot;
+	// Recorver Flag
+	u8		Recorver;
+	//
+	u8		Driver_Write;
+}RF_SHADOW_T;
+/*---------------------------Define Local Constant---------------------------*/
+
+
+/*------------------------Define global variable-----------------------------*/
+/*------------------------Define global variable-----------------------------*/
+
+
+/*------------------------Define local variable------------------------------*/
+// 2008/11/20 MH For Debug only, RF
+//static	RF_SHADOW_T	RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0};
+static	RF_SHADOW_T	RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
+/*------------------------Define local variable------------------------------*/
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	RF_ChangeTxPath
+ *
+ * Overview:	For RL6052, we must change some RF settign for 1T or 2T.
+ *
+ * Input:		u2Byte DataRate		// 0x80-8f, 0x90-9f
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 09/25/2008 	MHC		Create Version 0.
+ *						Firmwaer support the utility later.
+ *
+ *---------------------------------------------------------------------------*/
+void rtl8192c_RF_ChangeTxPath(	IN	PADAPTER	Adapter, 
+										IN	u16		DataRate)
+{
+// We do not support gain table change inACUT now !!!! Delete later !!!
+#if 0//(RTL92SE_FPGA_VERIFY == 0)
+	static	u1Byte	RF_Path_Type = 2;	// 1 = 1T 2= 2T			
+	static	u4Byte	tx_gain_tbl1[6] 
+			= {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100};
+	static	u4Byte	tx_gain_tbl2[6] 
+			= {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030};
+	u1Byte	i;
+	
+	if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7)
+	{
+		// Set TX SYNC power G2G3 loop filter
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+					RF_TXPA_G2, bRFRegOffsetMask, 0x0f000);
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+					RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1);
+
+		// Change TX AGC gain table
+		for (i = 0; i < 6; i++)					
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+						RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]);
+
+		// Set PA to high value
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+					RF_TXPA_G2, bRFRegOffsetMask, 0x01e39);
+	}
+	else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8)
+	{
+		// Set TX SYNC power G2G3 loop filter
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+					RF_TXPA_G2, bRFRegOffsetMask, 0x04440);
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+					RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1);
+
+		// Change TX AGC gain table
+		for (i = 0; i < 6; i++)
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+						RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]);
+
+		// Set PA low gain
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+					RF_TXPA_G2, bRFRegOffsetMask, 0x01e19);
+	}
+#endif	
+	
+}	/* RF_ChangeTxPath */
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_RF6052SetBandwidth()
+ *
+ * Overview:    This function is called by SetBWModeCallback8190Pci() only
+ *
+ * Input:       PADAPTER				Adapter
+ *			WIRELESS_BANDWIDTH_E	Bandwidth	//20M or 40M
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Note:		For RF type 0222D
+ *---------------------------------------------------------------------------*/
+VOID
+rtl8192c_PHY_RF6052SetBandwidth(
+	IN	PADAPTER				Adapter,
+	IN	HT_CHANNEL_WIDTH		Bandwidth)	//20M or 40M
+{	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	switch(Bandwidth)
+	{
+		case HT_CHANNEL_WIDTH_20:
+			pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | 0x0400);
+			PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
+			break;
+				
+		case HT_CHANNEL_WIDTH_40:
+			pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff));
+			PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);			
+			break;
+				
+		default:
+			//RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth ));
+			break;			
+	}
+	
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	PHY_RF6052SetCckTxPower
+ *
+ * Overview:	
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/05/2008 	MHC		Simulate 8192series..
+ *
+ *---------------------------------------------------------------------------*/
+
+VOID
+rtl8192c_PHY_RF6052SetCckTxPower(
+	IN	PADAPTER		Adapter,
+	IN	u8*			pPowerlevel)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv	*pmlmepriv = &Adapter->mlmepriv;
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	struct mlme_ext_priv 		*pmlmeext = &Adapter->mlmeextpriv;
+	//PMGNT_INFO		pMgntInfo=&Adapter->MgntInfo;	
+	u32			TxAGC[2]={0, 0}, tmpval=0;
+	BOOLEAN		TurboScanOff = _FALSE;
+	u8			idx1, idx2;
+	u8*			ptr;
+
+	// 2010/10/18 MH Accorsing to SD3 eechou's suggestion, we need to disable turbo scan for RU.	
+	// Otherwise, external PA will be broken if power index > 0x20.
+#ifdef CONFIG_USB_HCI
+	if (pHalData->EEPROMRegulatory != 0 || pHalData->ExternalPA)
+#else
+	if (pHalData->EEPROMRegulatory != 0)
+#endif
+	{
+		//DbgPrint("TurboScanOff=1 EEPROMRegulatory=%d ExternalPA=%d\n", pHalData->EEPROMRegulatory, pHalData->ExternalPA);
+		TurboScanOff = _TRUE;
+	}
+
+	if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
+	{
+		TxAGC[RF_PATH_A] = 0x3f3f3f3f;
+		TxAGC[RF_PATH_B] = 0x3f3f3f3f;
+
+		TurboScanOff = _TRUE;//disable turbo scan
+		
+		if(TurboScanOff)
+		{
+			for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
+			{
+				TxAGC[idx1] = 
+					pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
+					(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
+#ifdef CONFIG_USB_HCI
+				// 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20.
+				if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA)
+					TxAGC[idx1] = 0x20;
+#endif
+			}
+		}
+	}
+	else
+	{
+// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism.
+// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism.
+// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder.
+		if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
+		{	
+			TxAGC[RF_PATH_A] = 0x10101010;
+			TxAGC[RF_PATH_B] = 0x10101010;
+		}
+		else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
+		{	
+			TxAGC[RF_PATH_A] = 0x00000000;
+			TxAGC[RF_PATH_B] = 0x00000000;
+		}
+		else
+		{
+			for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
+			{
+				TxAGC[idx1] = 
+					pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
+					(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
+			}
+
+			if(pHalData->EEPROMRegulatory==0)
+			{
+				tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + 
+						(pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8);
+				TxAGC[RF_PATH_A] += tmpval;
+				
+				tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + 
+						(pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24);
+				TxAGC[RF_PATH_B] += tmpval;
+			}
+		}
+	}
+
+	for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
+	{
+		ptr = (u8*)(&(TxAGC[idx1]));
+		for(idx2=0; idx2<4; idx2++)
+		{
+			if(*ptr > RF6052_MAX_TX_PWR)
+				*ptr = RF6052_MAX_TX_PWR;
+			ptr++;
+		}
+	}
+
+	// rf-A cck tx power
+	tmpval = TxAGC[RF_PATH_A]&0xff;
+	PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);
+	//RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_A_CCK1_Mcs32));
+	tmpval = TxAGC[RF_PATH_A]>>8;
+	PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
+	//RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11));
+
+	// rf-B cck tx power
+	tmpval = TxAGC[RF_PATH_B]>>24;
+	PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);
+	//RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11));
+	tmpval = TxAGC[RF_PATH_B]&0x00ffffff;
+	PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
+	//RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n", 
+	//	tmpval, rTxAGC_B_CCK1_55_Mcs32));
+	
+}	/* PHY_RF6052SetCckTxPower */
+
+//
+// powerbase0 for OFDM rates
+// powerbase1 for HT MCS rates
+//
+static void getPowerBase(
+	IN	PADAPTER	Adapter,
+	IN	u8*		pPowerLevel,
+	IN	u8		Channel,
+	IN OUT u32*	OfdmBase,
+	IN OUT u32*	MCSBase
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32			powerBase0, powerBase1;
+	u8			Legacy_pwrdiff=0;
+	s8			HT20_pwrdiff=0;
+	u8			i, powerlevel[2];
+
+	for(i=0; i<2; i++)
+	{
+		powerlevel[i] = pPowerLevel[i];
+		Legacy_pwrdiff = pHalData->TxPwrLegacyHtDiff[i][Channel-1];			
+		powerBase0 = powerlevel[i] + Legacy_pwrdiff; 
+
+		powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
+		*(OfdmBase+i) = powerBase0;
+		//RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i)));
+	}
+
+	for(i=0; i<2; i++)
+	{
+		//Check HT20 to HT40 diff
+		if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+		{
+			HT20_pwrdiff = pHalData->TxPwrHt20Diff[i][Channel-1];
+			powerlevel[i] += HT20_pwrdiff;
+		}
+		powerBase1 = powerlevel[i];
+		powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
+		*(MCSBase+i) = powerBase1;
+		//RTPRINT(FPHY, PHY_TXPWR, (" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i)));
+	}
+}
+
+static void getTxPowerWriteValByRegulatory(
+	IN		PADAPTER	Adapter,
+	IN		u8		Channel,
+	IN		u8		index,
+	IN		u32*		powerBase0,
+	IN		u32*		powerBase1,
+	OUT		u32*		pOutWriteVal
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	i, chnlGroup, pwr_diff_limit[4];
+	u32 	writeVal, customer_limit, rf;
+	
+	//
+	// Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate
+	//
+	for(rf=0; rf<2; rf++)
+	{
+		switch(pHalData->EEPROMRegulatory)
+		{
+			case 0:	// Realtek better performance
+					// increase power diff defined by Realtek for large power
+				chnlGroup = 0;
+				//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", 
+				//	chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
+				writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + 
+					((index<2)?powerBase0[rf]:powerBase1[rf]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
+				break;
+			case 1:	// Realtek regulatory
+					// increase power diff defined by Realtek for regulatory
+				{
+					if(pHalData->pwrGroupCnt == 1)
+						chnlGroup = 0;
+					if(pHalData->pwrGroupCnt >= 3)
+					{
+						if(Channel <= 3)
+							chnlGroup = 0;
+						else if(Channel >= 4 && Channel <= 9)
+							chnlGroup = 1;
+						else if(Channel > 9)
+							chnlGroup = 2;
+
+						if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+							chnlGroup++;
+						else
+							chnlGroup+=4;
+					}
+					//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", 
+					//chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
+					writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + 
+							((index<2)?powerBase0[rf]:powerBase1[rf]);
+					//RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
+				}
+				break;
+			case 2:	// Better regulatory
+					// don't increase any power diff
+				writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
+				break;
+			case 3:	// Customer defined power diff.
+					// increase power diff defined by customer.
+				chnlGroup = 0;
+				//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", 
+				//	chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
+
+				if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
+				{
+					//RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n", 
+					//	((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1]));
+				}
+				else
+				{
+					//RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n", 
+					//	((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1]));
+				}
+				for (i=0; i<4; i++)
+				{
+					pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8));
+					if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
+					{
+						if(pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1])
+							pwr_diff_limit[i] = pHalData->PwrGroupHT40[rf][Channel-1];
+					}
+					else
+					{
+						if(pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1])
+							pwr_diff_limit[i] = pHalData->PwrGroupHT20[rf][Channel-1];
+					}
+				}
+				customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) |
+								(pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit));
+
+				writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal));
+				break;
+			default:
+				chnlGroup = 0;
+				writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + 
+						((index<2)?powerBase0[rf]:powerBase1[rf]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
+				break;
+		}
+
+// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism.
+// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism.
+// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder.
+
+		if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
+			writeVal = 0x14141414;
+		else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
+			writeVal = 0x00000000;
+
+
+		// 20100628 Joseph: High power mode for BT-Coexist mechanism.
+		// This mechanism is only applied when Driver-Highpower-Mechanism is OFF.
+		if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
+		{
+			//RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n"));
+			writeVal = writeVal - 0x06060606;
+		}
+		else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
+		{
+			//RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n"));
+			writeVal = writeVal;
+		}
+		*(pOutWriteVal+rf) = writeVal;
+	}
+}
+
+static void writeOFDMPowerReg(
+	IN		PADAPTER	Adapter,
+	IN		u8		index,
+	IN 		u32*		pValue
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u16 RegOffset_A[6] = {	rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, 
+							rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, 
+							rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12};
+	u16 RegOffset_B[6] = {	rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24, 
+							rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
+							rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12};
+	u8 i, rf, pwr_val[4];
+	u32 writeVal;
+	u16 RegOffset;
+
+	for(rf=0; rf<2; rf++)
+	{
+		writeVal = pValue[rf];
+		for(i=0; i<4; i++)
+		{
+			pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
+			if (pwr_val[i]  > RF6052_MAX_TX_PWR)
+				pwr_val[i]  = RF6052_MAX_TX_PWR;
+		}
+		writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0];
+
+		if(rf == 0)
+			RegOffset = RegOffset_A[index];
+		else
+			RegOffset = RegOffset_B[index];
+		
+		PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal);
+		//RTPRINT(FPHY, PHY_TXPWR, ("Set 0x%x = %08x\n", RegOffset, writeVal));
+
+		// 201005115 Joseph: Set Tx Power diff for Tx power training mechanism.
+		if(((pHalData->rf_type == RF_2T2R) && 
+				(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))||
+		     ((pHalData->rf_type != RF_2T2R) && 
+				(RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04))	)
+		{
+			writeVal = pwr_val[3];
+			if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04)
+				RegOffset = 0xc90;
+			if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04)
+				RegOffset = 0xc98;
+			for(i=0; i<3; i++)
+			{
+				if(i!=2)
+					writeVal = (writeVal>8)?(writeVal-8):0;
+				else
+					writeVal = (writeVal>6)?(writeVal-6):0;
+				rtw_write8(Adapter, (u32)(RegOffset+i), (u8)writeVal);
+			}
+		}
+	}
+}
+/*-----------------------------------------------------------------------------
+ * Function:	PHY_RF6052SetOFDMTxPower
+ *
+ * Overview:	For legacy and HY OFDM, we must read EEPROM TX power index for 
+ *			different channel and read original value in TX power register area from
+ *			0xe00. We increase offset and original value to be correct tx pwr.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/05/2008 	MHC		Simulate 8192 series method.
+ * 01/06/2009	MHC		1. Prevent Path B tx power overflow or underflow dure to
+ *						A/B pwr difference or legacy/HT pwr diff.
+ *						2. We concern with path B legacy/HT OFDM difference.
+ * 01/22/2009	MHC		Support new EPRO format from SD3.
+ *
+ *---------------------------------------------------------------------------*/
+VOID 
+rtl8192c_PHY_RF6052SetOFDMTxPower(
+	IN	PADAPTER	Adapter,
+	IN	u8*		pPowerLevel,
+	IN	u8		Channel)
+{
+	//HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32 writeVal[2], powerBase0[2], powerBase1[2];
+	u8 index = 0;
+
+	getPowerBase(Adapter, pPowerLevel, Channel, &powerBase0[0], &powerBase1[0]);
+
+	for(index=0; index<6; index++)
+	{
+		getTxPowerWriteValByRegulatory(Adapter, Channel, index, 
+			&powerBase0[0], &powerBase1[0], &writeVal[0]);
+
+		writeOFDMPowerReg(Adapter, index, &writeVal[0]);
+	}
+	
+}
+
+
+static VOID
+phy_RF6052_Config_HardCode(
+	IN	PADAPTER		Adapter
+	)
+{
+	
+	// Set Default Bandwidth to 20M
+	//Adapter->HalFunc	.SetBWModeHandler(Adapter, HT_CHANNEL_WIDTH_20);
+
+	// TODO: Set Default Channel to channel one for RTL8225
+	
+}
+
+static int
+phy_RF6052_Config_ParaFile(
+	IN	PADAPTER		Adapter
+	)
+{
+	u32					u4RegValue;
+	u8					eRFPath;		
+	BB_REGISTER_DEFINITION_T	*pPhyReg;	
+
+	int					rtStatus = _SUCCESS;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	static char			sz88CRadioAFile[] = RTL8188C_PHY_RADIO_A;	
+	static char			sz88CRadioBFile[] = RTL8188C_PHY_RADIO_B;
+#ifdef CONFIG_USB_HCI
+	static char			sz88CRadioAFile_mCard[] = RTL8188C_PHY_RADIO_A_mCard;	
+	static char			sz88CRadioBFile_mCard[] = RTL8188C_PHY_RADIO_B_mCard;
+	static char			sz88CRadioAFile_HP[] = RTL8188C_PHY_RADIO_A_HP;	
+#endif
+	static char			sz92CRadioAFile[] = RTL8192C_PHY_RADIO_A;	
+	static char			sz92CRadioBFile[] = RTL8192C_PHY_RADIO_B;
+	static char			sz8723RadioAFile[] = RTL8723_PHY_RADIO_A;	
+	static char			sz8723RadioBFile[] = RTL8723_PHY_RADIO_B;
+	char					*pszRadioAFile, *pszRadioBFile;	
+
+
+	if(IS_HARDWARE_TYPE_8192C(Adapter))
+	{
+		if(IS_92C_SERIAL( pHalData->VersionID))// 88c's IPA  is different from 92c's
+		{
+			pszRadioAFile = sz92CRadioAFile;
+			pszRadioBFile = sz92CRadioBFile;
+		}
+		else
+		{
+			pszRadioAFile = sz88CRadioAFile;
+			pszRadioBFile = sz88CRadioBFile;
+#ifdef CONFIG_USB_HCI
+			if( BOARD_MINICARD == pHalData->BoardType)
+			{
+				pszRadioAFile = sz88CRadioAFile_mCard;
+				pszRadioBFile = sz88CRadioBFile_mCard;
+			}
+			else if( BOARD_USB_High_PA == pHalData->BoardType)
+			{
+				pszRadioAFile = sz88CRadioAFile_HP;
+			}
+#endif	
+		}
+	}
+	else if(IS_HARDWARE_TYPE_8723A(Adapter))
+	{
+		pszRadioAFile = sz8723RadioAFile;
+		pszRadioBFile = sz8723RadioBFile;	
+	}
+
+	//3//-----------------------------------------------------------------
+	//3// <2> Initialize RF
+	//3//-----------------------------------------------------------------
+	//for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	{
+
+		pPhyReg = &pHalData->PHYRegDef[eRFPath];
+		
+		/*----Store original RFENV control type----*/		
+		switch(eRFPath)
+		{
+		case RF_PATH_A:
+		case RF_PATH_C:
+			u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
+			break;
+		case RF_PATH_B :
+		case RF_PATH_D:
+			u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16);
+			break;
+		}
+
+		/*----Set RF_ENV enable----*/		
+		PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
+		rtw_udelay_os(1);//PlatformStallExecution(1);
+		
+		/*----Set RF_ENV output high----*/
+		PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
+		rtw_udelay_os(1);//PlatformStallExecution(1);
+
+		/* Set bit number of Address and Data for RF register */
+		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); 	// Set 1 to 4 bits for 8255
+		rtw_udelay_os(1);//PlatformStallExecution(1);
+
+		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);	// Set 0 to 12  bits for 8255
+		rtw_udelay_os(1);//PlatformStallExecution(1);
+
+		/*----Initialize RF fom connfiguration file----*/
+		switch(eRFPath)
+		{
+		case RF_PATH_A:
+#ifdef CONFIG_EMBEDDED_FWIMG
+			rtStatus= rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath);
+#else
+			rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF_RADIO_PATH_E)eRFPath);
+#endif
+			break;
+		case RF_PATH_B:
+#ifdef CONFIG_EMBEDDED_FWIMG
+			rtStatus = rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath);
+#else			
+			rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF_RADIO_PATH_E)eRFPath);
+#endif
+			break;
+		case RF_PATH_C:
+			break;
+		case RF_PATH_D:
+			break;
+		}
+
+		/*----Restore RFENV control type----*/;
+		switch(eRFPath)
+		{
+		case RF_PATH_A:
+		case RF_PATH_C:
+			PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
+			break;
+		case RF_PATH_B :
+		case RF_PATH_D:
+			PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
+			break;
+		}
+
+		if(rtStatus != _SUCCESS){
+			//RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath));
+			goto phy_RF6052_Config_ParaFile_Fail;
+		}
+
+	}
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n"));
+	return rtStatus;
+	
+phy_RF6052_Config_ParaFile_Fail:	
+	return rtStatus;
+}
+
+
+int
+PHY_RF6052_Config8192C(
+	IN	PADAPTER		Adapter)
+{
+	HAL_DATA_TYPE				*pHalData = GET_HAL_DATA(Adapter);
+	int					rtStatus = _SUCCESS;	
+	
+	//
+	// Initialize general global value
+	//
+	// TODO: Extend RF_PATH_C and RF_PATH_D in the future
+	if(pHalData->rf_type == RF_1T1R)
+		pHalData->NumTotalRFPath = 1;
+	else
+		pHalData->NumTotalRFPath = 2;
+
+	//
+	// Config BB and RF
+	//
+	rtStatus = phy_RF6052_Config_ParaFile(Adapter);
+#if 0	
+	switch( Adapter->MgntInfo.bRegHwParaFile )
+	{
+		case 0:
+			phy_RF6052_Config_HardCode(Adapter);
+			break;
+
+		case 1:
+			rtStatus = phy_RF6052_Config_ParaFile(Adapter);
+			break;
+
+		case 2:
+			// Partial Modify. 
+			phy_RF6052_Config_HardCode(Adapter);
+			phy_RF6052_Config_ParaFile(Adapter);
+			break;
+
+		default:
+			phy_RF6052_Config_HardCode(Adapter);
+			break;
+	}
+#endif	
+	return rtStatus;
+		
+}
+
+
+//
+// ==> RF shadow Operation API Code Section!!!
+//
+/*-----------------------------------------------------------------------------
+ * Function:	PHY_RFShadowRead
+ *				PHY_RFShadowWrite
+ *				PHY_RFShadowCompare
+ *				PHY_RFShadowRecorver
+ *				PHY_RFShadowCompareAll
+ *				PHY_RFShadowRecorverAll
+ *				PHY_RFShadowCompareFlagSet
+ *				PHY_RFShadowRecorverFlagSet
+ *
+ * Overview:	When we set RF register, we must write shadow at first.
+ *			When we are running, we must compare shadow abd locate error addr.
+ *			Decide to recorver or not.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/20/2008 	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+u32
+PHY_RFShadowRead(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset)
+{
+	return	RF_Shadow[eRFPath][Offset].Value;
+	
+}	/* PHY_RFShadowRead */
+
+
+VOID
+PHY_RFShadowWrite(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u32				Data)
+{
+	RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask);
+	RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE;
+	
+}	/* PHY_RFShadowWrite */
+
+
+BOOLEAN
+PHY_RFShadowCompare(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset)
+{
+	u32	reg;
+	// Check if we need to check the register
+	if (RF_Shadow[eRFPath][Offset].Compare == _TRUE)
+	{
+		reg = PHY_QueryRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask);
+		// Compare shadow and real rf register for 20bits!!
+		if (RF_Shadow[eRFPath][Offset].Value != reg)
+		{
+			// Locate error position.
+			RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE;
+			//RT_TRACE(COMP_INIT, DBG_LOUD, 
+			//("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n", 
+			//eRFPath, Offset, reg));
+		}
+		return RF_Shadow[eRFPath][Offset].ErrorOrNot ;
+	}
+	return _FALSE;
+}	/* PHY_RFShadowCompare */
+
+
+VOID
+PHY_RFShadowRecorver(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset)
+{
+	// Check if the address is error
+	if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE)
+	{
+		// Check if we need to recorver the register.
+		if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE)
+		{
+			PHY_SetRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask, 
+							RF_Shadow[eRFPath][Offset].Value);
+			//RT_TRACE(COMP_INIT, DBG_LOUD, 
+			//("PHY_RFShadowRecorver RF-%d Addr%02lx=%05lx", 
+			//eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value));
+		}
+	}
+	
+}	/* PHY_RFShadowRecorver */
+
+
+VOID
+PHY_RFShadowCompareAll(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			PHY_RFShadowCompare(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset);
+		}
+	}
+	
+}	/* PHY_RFShadowCompareAll */
+
+
+VOID
+PHY_RFShadowRecorverAll(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			PHY_RFShadowRecorver(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset);
+		}
+	}
+	
+}	/* PHY_RFShadowRecorverAll */
+
+
+VOID
+PHY_RFShadowCompareFlagSet(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u8				Type)
+{
+	// Set True or False!!!
+	RF_Shadow[eRFPath][Offset].Compare = Type;
+		
+}	/* PHY_RFShadowCompareFlagSet */
+
+
+VOID
+PHY_RFShadowRecorverFlagSet(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u8				Type)
+{
+	// Set True or False!!!
+	RF_Shadow[eRFPath][Offset].Recorver= Type;
+		
+}	/* PHY_RFShadowRecorverFlagSet */
+
+
+VOID
+PHY_RFShadowCompareFlagSetAll(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			// 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!!
+			if (Offset != 0x26 && Offset != 0x27)
+				PHY_RFShadowCompareFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _FALSE);
+			else
+				PHY_RFShadowCompareFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _TRUE);
+		}
+	}
+		
+}	/* PHY_RFShadowCompareFlagSetAll */
+
+
+VOID
+PHY_RFShadowRecorverFlagSetAll(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			// 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!!
+			if (Offset != 0x26 && Offset != 0x27)
+				PHY_RFShadowRecorverFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _FALSE);
+			else
+				PHY_RFShadowRecorverFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _TRUE);
+		}
+	}
+		
+}	/* PHY_RFShadowCompareFlagSetAll */
+
+VOID
+PHY_RFShadowRefresh(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			RF_Shadow[eRFPath][Offset].Value = 0;
+			RF_Shadow[eRFPath][Offset].Compare = _FALSE;
+			RF_Shadow[eRFPath][Offset].Recorver  = _FALSE;
+			RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE;
+			RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE;
+		}
+	}
+	
+}	/* PHY_RFShadowRead */
+
+/* End of HalRf6052.c */
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_rxdesc.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_rxdesc.c
new file mode 100755
index 00000000..3e0d795e
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_rxdesc.c
@@ -0,0 +1,876 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTL8192C_REDESC_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtl8192c_hal.h>
+
+static u8 evm_db2percentage(s8 value)
+{
+	//
+	// -33dB~0dB to 0%~99%
+	//
+	s8 ret_val;
+
+	ret_val = value;
+	//ret_val /= 2;
+
+	RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("EVMdbToPercentage92S Value=%d / %x \n", ret_val, ret_val));
+
+	if(ret_val >= 0)
+		ret_val = 0;
+	if(ret_val <= -33)
+		ret_val = -33;
+
+	ret_val = 0 - ret_val;
+	ret_val*=3;
+
+	if(ret_val == 99)
+		ret_val = 100;
+
+	return(ret_val);
+}
+
+
+static s32 signal_scale_mapping(_adapter *padapter, s32 cur_sig )
+{
+	s32 ret_sig;
+
+#ifdef CONFIG_USB_HCI
+	if(cur_sig >= 51 && cur_sig <= 100)
+	{
+		ret_sig = 100;
+	}
+	else if(cur_sig >= 41 && cur_sig <= 50)
+	{
+		ret_sig = 80 + ((cur_sig - 40)*2);
+	}
+	else if(cur_sig >= 31 && cur_sig <= 40)
+	{
+		ret_sig = 66 + (cur_sig - 30);
+	}
+	else if(cur_sig >= 21 && cur_sig <= 30)
+	{
+		ret_sig = 54 + (cur_sig - 20);
+	}
+	else if(cur_sig >= 10 && cur_sig <= 20)
+	{
+		ret_sig = 42 + (((cur_sig - 10) * 2) / 3);
+	}
+	else if(cur_sig >= 5 && cur_sig <= 9)
+	{
+		ret_sig = 22 + (((cur_sig - 5) * 3) / 2);
+	}
+	else if(cur_sig >= 1 && cur_sig <= 4)
+	{
+		ret_sig = 6 + (((cur_sig - 1) * 3) / 2);
+	}
+	else
+	{
+		ret_sig = cur_sig;
+	}
+#else
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+
+	if(pHalData->CustomerID == RT_CID_819x_Lenovo)
+	{
+		// Step 1. Scale mapping.
+		// 20100611 Joseph: Re-tunning RSSI presentation for Lenovo.
+		// 20100426 Joseph: Modify Signal strength mapping.
+		// This modification makes the RSSI indication similar to Intel solution.
+		// 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE.
+		if(cur_sig >= 54 && cur_sig <= 100)
+		{
+			ret_sig = 100;
+		}
+		else if(cur_sig>=42 && cur_sig <= 53 )
+		{
+			ret_sig = 95;
+		}
+		else if(cur_sig>=36 && cur_sig <= 41 )
+		{
+			ret_sig = 74 + ((cur_sig - 36) *20)/6;
+		}
+		else if(cur_sig>=33 && cur_sig <= 35 )
+		{
+			ret_sig = 65 + ((cur_sig - 33) *8)/2;
+		}
+		else if(cur_sig>=18 && cur_sig <= 32 )
+		{
+			ret_sig = 62 + ((cur_sig - 18) *2)/15;
+		}
+		else if(cur_sig>=15 && cur_sig <= 17 )
+		{
+			ret_sig = 33 + ((cur_sig - 15) *28)/2;
+		}
+		else if(cur_sig>=10 && cur_sig <= 14 )
+		{
+			ret_sig = 39;
+		}
+		else if(cur_sig>=8 && cur_sig <= 9 )
+		{
+			ret_sig = 33;
+		}
+		else if(cur_sig <= 8 )
+		{
+			ret_sig = 19;
+		}
+	}
+	else
+	{
+		// Step 1. Scale mapping.
+		if(cur_sig >= 61 && cur_sig <= 100)
+		{
+			ret_sig = 90 + ((cur_sig - 60) / 4);
+		}
+		else if(cur_sig >= 41 && cur_sig <= 60)
+		{
+			ret_sig = 78 + ((cur_sig - 40) / 2);
+		}
+		else if(cur_sig >= 31 && cur_sig <= 40)
+		{
+			ret_sig = 66 + (cur_sig - 30);
+		}
+		else if(cur_sig >= 21 && cur_sig <= 30)
+		{
+			ret_sig = 54 + (cur_sig - 20);
+		}
+		else if(cur_sig >= 5 && cur_sig <= 20)
+		{
+			ret_sig = 42 + (((cur_sig - 5) * 2) / 3);
+		}
+		else if(cur_sig == 4)
+		{
+			ret_sig = 36;
+		}
+		else if(cur_sig == 3)
+		{
+			ret_sig = 27;
+		}
+		else if(cur_sig == 2)
+		{
+			ret_sig = 18;
+		}
+		else if(cur_sig == 1)
+		{
+			ret_sig = 9;
+		}
+		else
+		{
+			ret_sig = cur_sig;
+		}
+	}
+#endif
+
+	return ret_sig;
+}
+
+
+static s32  translate2dbm(u8 signal_strength_idx)
+{
+	s32	signal_power; // in dBm.
+
+
+	// Translate to dBm (x=0.5y-95).
+	signal_power = (s32)((signal_strength_idx + 1) >> 1);
+	signal_power -= 95;
+
+	return signal_power;
+}
+
+static void query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat)
+{
+	PHY_STS_OFDM_8192CD_T	*pOfdm_buf;
+	PHY_STS_CCK_8192CD_T	*pCck_buf;
+	u8	i, max_spatial_stream, evm;
+	s8	rx_pwr[4], rx_pwr_all = 0;
+	u8	pwdb_all;
+	u32	rssi,total_rssi=0;
+	u8 	bcck_rate=0, rf_rx_num = 0, cck_highpwr = 0;
+	_adapter				*padapter = prframe->u.hdr.adapter;
+	struct rx_pkt_attrib	*pattrib = &prframe->u.hdr.attrib;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	u8	tmp_rxsnr;
+	s8	rx_snrX;
+
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY
+	PHY_RX_DRIVER_INFO_8192CD *pDrvInfo = ((PHY_RX_DRIVER_INFO_8192CD *)pphy_stat);
+	u8 	bant1_sel = (pDrvInfo->ANTSEL == 1)?_TRUE:_FALSE;	
+#endif
+
+	// Record it for next packet processing
+	bcck_rate=(pattrib->mcs_rate<=3? 1:0);
+
+	if(bcck_rate) //CCK
+	{
+		u8 report;
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY		
+		if(bant1_sel == _TRUE)
+			pHalData->CCK_Ant1_Cnt++;
+		else
+			pHalData->CCK_Ant2_Cnt++;
+#endif		
+
+		// CCK Driver info Structure is not the same as OFDM packet.
+		pCck_buf = (PHY_STS_CCK_8192CD_T *)pphy_stat;
+		//Adapter->RxStats.NumQryPhyStatusCCK++;
+
+		//
+		// (1)Hardware does not provide RSSI for CCK
+		// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
+		//
+
+		if(padapter->pwrctrlpriv.rf_pwrstate == rf_on)
+			cck_highpwr = (u8)pHalData->bCckHighPower;
+		else
+			cck_highpwr = _FALSE;
+
+		if(!cck_highpwr)
+		{
+			report = pCck_buf->cck_agc_rpt&0xc0;
+			report = report>>6;
+			switch(report)
+			{
+				// 03312009 modified by cosa
+				// Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion
+				// Note: different RF with the different RNA gain.
+				case 0x3:
+					rx_pwr_all = (-46) - (pCck_buf->cck_agc_rpt & 0x3e);
+					break;
+				case 0x2:
+					rx_pwr_all = (-26) - (pCck_buf->cck_agc_rpt & 0x3e);
+					break;
+				case 0x1:
+					rx_pwr_all = (-12) - (pCck_buf->cck_agc_rpt & 0x3e);
+					break;
+				case 0x0:
+					rx_pwr_all = (16) - (pCck_buf->cck_agc_rpt & 0x3e);
+					break;
+			}
+		}
+		else
+		{
+			report = pCck_buf->cck_agc_rpt & 0x60;
+			report = report>>5;
+			switch(report)
+			{
+				case 0x3:
+					rx_pwr_all = (-46) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
+					break;
+				case 0x2:
+					rx_pwr_all = (-26)- ((pCck_buf->cck_agc_rpt & 0x1f)<<1);
+					break;
+				case 0x1:
+					rx_pwr_all = (-12) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
+					break;
+				case 0x0:
+					rx_pwr_all = (16) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
+					break;
+			}
+		}
+
+		pwdb_all= query_rx_pwr_percentage(rx_pwr_all);
+		if(pHalData->CustomerID == RT_CID_819x_Lenovo)
+		{
+			// CCK gain is smaller than OFDM/MCS gain,
+			// so we add gain diff by experiences, the val is 6
+			pwdb_all+=6;
+			if(pwdb_all > 100)
+				pwdb_all = 100;
+			// modify the offset to make the same gain index with OFDM.
+			if(pwdb_all > 34 && pwdb_all <= 42)
+				pwdb_all -= 2;
+			else if(pwdb_all > 26 && pwdb_all <= 34)
+				pwdb_all -= 6;
+			else if(pwdb_all > 14 && pwdb_all <= 26)
+				pwdb_all -= 8;
+			else if(pwdb_all > 4 && pwdb_all <= 14)
+				pwdb_all -= 4;
+		}
+
+		pattrib->RxPWDBAll = pwdb_all;	//for DIG/rate adaptive
+		pattrib->RecvSignalPower = rx_pwr_all;	//dBM
+		padapter->recvpriv.rxpwdb = rx_pwr_all;
+		//
+		// (3) Get Signal Quality (EVM)
+		//
+		//if(bPacketMatchBSSID)
+		{
+			u8	sq;
+
+			if(pHalData->CustomerID == RT_CID_819x_Lenovo)
+			{
+				// mapping to 5 bars for vista signal strength
+				// signal quality in driver will be displayed to signal strength
+				// in vista.
+				if(pwdb_all >= 50)
+					sq = 100;
+				else if(pwdb_all >= 35 && pwdb_all < 50)
+					sq = 80;
+				else if(pwdb_all >= 22 && pwdb_all < 35)
+					sq = 60;
+				else if(pwdb_all >= 18 && pwdb_all < 22)
+					sq = 40;
+				else
+					sq = 20;
+			}
+			else
+			{
+				if(pwdb_all> 40)
+				{
+					sq = 100;
+				}
+				else
+				{
+					sq = pCck_buf->SQ_rpt;
+
+					if(pCck_buf->SQ_rpt > 64)
+						sq = 0;
+					else if (pCck_buf->SQ_rpt < 20)
+						sq= 100;
+					else
+						sq = ((64-sq) * 100) / 44;
+
+				}
+			}
+
+			pattrib->signal_qual=sq;
+			pattrib->rx_mimo_signal_qual[0]=sq;
+			pattrib->rx_mimo_signal_qual[1]=(-1);
+		}
+
+	}
+	else //OFDM/HT
+	{
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY	
+		if(bant1_sel == _TRUE)
+			pHalData->OFDM_Ant1_Cnt++;
+		else
+			pHalData->OFDM_Ant2_Cnt++;
+#endif
+		pdmpriv->OFDM_Pkt_Cnt++;
+
+		pOfdm_buf = (PHY_STS_OFDM_8192CD_T *)pphy_stat;
+	
+		//
+		// (1)Get RSSI per-path
+		//
+		for(i=0; i<pHalData->NumTotalRFPath; i++)
+		{
+			// 2008/01/30 MH we will judge RF RX path now.
+			if (pHalData->bRFPathRxEnable[i])
+				rf_rx_num++;
+			//else
+				//continue;
+
+			rx_pwr[i] =  ((pOfdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
+			padapter->recvpriv.RxRssi[i] = rx_pwr[i];
+			/* Translate DBM to percentage. */
+			pattrib->rx_rssi[i] = rssi = query_rx_pwr_percentage(rx_pwr[i]);
+			total_rssi += rssi;
+
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], rssi));
+
+			//Get Rx snr value in DB
+			tmp_rxsnr =	pOfdm_buf->rxsnr_X[i];
+			rx_snrX = (s8)(tmp_rxsnr);
+			rx_snrX >>= 1;
+			padapter->recvpriv.RxSNRdB[i] =  (int)rx_snrX;
+			pattrib->rx_snr[i]=pOfdm_buf->rxsnr_X[i];
+			/* Record Signal Strength for next packet */
+			//if(bPacketMatchBSSID)
+			{
+				//pRfd->Status.RxMIMOSignalStrength[i] =(u1Byte) RSSI;
+
+				//The following is for lenovo signal strength in vista
+				if(pHalData->CustomerID == RT_CID_819x_Lenovo)
+				{
+					u8	sq;
+
+					if(i == 0)
+					{
+						// mapping to 5 bars for vista signal strength
+						// signal quality in driver will be displayed to signal strength
+						// in vista.
+						if(rssi >= 50)
+							sq = 100;
+						else if(rssi >= 35 && rssi < 50)
+							sq = 80;
+						else if(rssi >= 22 && rssi < 35)
+							sq = 60;
+						else if(rssi >= 18 && rssi < 22)
+							sq = 40;
+						else
+							sq = 20;
+						//DbgPrint("ofdm/mcs RSSI=%d\n", RSSI);
+						//pRfd->Status.SignalQuality = SQ;
+						//DbgPrint("ofdm/mcs SQ = %d\n", pRfd->Status.SignalQuality);
+					}
+				}
+			}
+		}
+
+
+		//
+		// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive),average
+		//
+		rx_pwr_all = (((pOfdm_buf->pwdb_all ) >> 1 )& 0x7f) -110;//for OFDM Average RSSI
+		pwdb_all = query_rx_pwr_percentage(rx_pwr_all);
+
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("PWDB_ALL=%d\n",	pwdb_all));
+
+		pattrib->RxPWDBAll = pwdb_all;	//for DIG/rate adaptive
+		pattrib->RecvSignalPower = rx_pwr_all;//dBM
+		padapter->recvpriv.rxpwdb = rx_pwr_all;
+		//
+		// (3)EVM of HT rate
+		//
+		if(pHalData->CustomerID != RT_CID_819x_Lenovo)
+		{
+			if(pattrib->rxht &&  pattrib->mcs_rate >=20 && pattrib->mcs_rate<=27)
+				max_spatial_stream = 2; //both spatial stream make sense
+			else
+				max_spatial_stream = 1; //only spatial stream 1 makes sense
+
+			for(i=0; i<max_spatial_stream; i++)
+			{
+				// Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
+				// fill most significant bit to "zero" when doing shifting operation which may change a negative
+				// value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore.
+				evm = evm_db2percentage( (pOfdm_buf->rxevm_X[i]/*/ 2*/));//dbm
+
+				RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",
+					pattrib->mcs_rate, pOfdm_buf->rxevm_X[i], "%",evm));
+
+				//if(bPacketMatchBSSID)
+				{
+					if(i==0) // Fill value in RFD, Get the first spatial stream only
+					{
+						pattrib->signal_qual = (u8)(evm & 0xff);
+					}
+					pattrib->rx_mimo_signal_qual[i] = (u8)(evm & 0xff);
+				}
+			}
+
+		}
+
+		//
+		// 4. Record rx statistics for debug
+		//
+
+	}
+
+
+	//UI BSS List signal strength(in percentage), make it good looking, from 0~100.
+	//It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
+	if(bcck_rate)
+	{
+		pattrib->signal_strength=(u8)signal_scale_mapping(padapter, pwdb_all);
+	}
+	else
+	{
+		if (rf_rx_num != 0)
+		{
+			pattrib->signal_strength= (u8)(signal_scale_mapping(padapter, total_rssi/=rf_rx_num));
+		}
+	}
+	//DBG_8192C("%s,rx_pwr_all(%d),RxPWDBAll(%d)\n",__FUNCTION__,rx_pwr_all,pattrib->RxPWDBAll);
+
+}
+
+
+static void process_rssi(_adapter *padapter,union recv_frame *prframe)
+{
+	u32	last_rssi, tmp_val;
+	struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data;
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+	//DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength);
+	//if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
+	{
+	
+	#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+		if(signal_stat->update_req) {
+			signal_stat->total_num = 0;
+			signal_stat->total_val = 0;
+			signal_stat->update_req = 0;
+		}
+
+		signal_stat->total_num++;
+		signal_stat->total_val  += pattrib->signal_strength;
+		signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;		
+	#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
+	
+		//Adapter->RxStats.RssiCalculateCnt++;	//For antenna Test
+		if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX)
+		{
+			padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX;
+			last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index];
+			padapter->recvpriv.signal_strength_data.total_val -= last_rssi;
+		}
+		padapter->recvpriv.signal_strength_data.total_val  +=pattrib->signal_strength;
+
+		padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->signal_strength;
+		if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX)
+			padapter->recvpriv.signal_strength_data.index = 0;
+
+
+		tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num;
+		
+		if(padapter->recvpriv.is_signal_dbg) {
+			padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg;
+			padapter->recvpriv.rssi=(s8)translate2dbm((u8)padapter->recvpriv.signal_strength_dbg);
+		} else {
+			padapter->recvpriv.signal_strength= tmp_val;
+			padapter->recvpriv.rssi=(s8)translate2dbm((u8)tmp_val);
+		}
+
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num));
+	#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+	}
+
+}// Process_UI_RSSI_8192C
+
+
+static void process_PWDB(_adapter *padapter, union recv_frame *prframe)
+{
+	int	UndecoratedSmoothedPWDB;
+	int	UndecoratedSmoothedCCK;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	struct rx_pkt_attrib	*pattrib= &prframe->u.hdr.attrib;
+	struct sta_info		*psta = prframe->u.hdr.psta;
+	u8 isCCKrate=(pattrib->mcs_rate<=3? 1:0);
+
+
+	if(psta)
+	{
+		UndecoratedSmoothedPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+		UndecoratedSmoothedCCK = psta->rssi_stat.UndecoratedSmoothedCCK;
+	}
+	else
+	{
+		UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB;
+		UndecoratedSmoothedCCK = pdmpriv->UndecoratedSmoothedCCK;
+	}
+
+	//if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
+
+	if(!isCCKrate)
+	{
+		// Process OFDM RSSI
+		if(UndecoratedSmoothedPWDB < 0) // initialize
+		{
+			UndecoratedSmoothedPWDB = pattrib->RxPWDBAll;
+		}
+
+		if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedPWDB)
+		{
+			UndecoratedSmoothedPWDB =
+					( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) +
+					(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
+
+			UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB + 1;
+		}
+		else
+		{
+			UndecoratedSmoothedPWDB =
+					( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) +
+					(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
+		}
+	}
+	else
+	{
+		// Process CCK RSSI
+		if(UndecoratedSmoothedCCK < 0) // initialize
+		{
+			UndecoratedSmoothedCCK = pattrib->RxPWDBAll;
+		}
+
+		if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedCCK)
+		{
+			UndecoratedSmoothedCCK =
+					( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) +
+					(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
+
+			UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
+		}
+		else
+		{
+			UndecoratedSmoothedCCK =
+					( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) +
+					(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
+		}
+	}
+	
+	
+	if(psta)
+	{
+		//psta->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;//todo:
+		pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+
+		if(pdmpriv->RSSI_Select == RSSI_OFDM){
+			psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+		}
+		else if(pdmpriv->RSSI_Select == RSSI_CCK){
+			psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
+		}
+		else{
+			if(UndecoratedSmoothedPWDB <0 ) 
+				pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
+			else
+				pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+		}
+		psta->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
+	}
+	else
+	{
+		//pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+
+		if(pdmpriv->RSSI_Select == RSSI_OFDM){
+			pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+		}
+		else if(pdmpriv->RSSI_Select == RSSI_CCK){
+			pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
+		}
+		else	{
+			if(UndecoratedSmoothedPWDB <0 ) 
+				pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
+			else
+				pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+			
+		}
+		pdmpriv->UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
+	}
+
+	//UpdateRxSignalStatistics8192C(padapter, prframe);
+
+}
+
+
+static void process_link_qual(_adapter *padapter,union recv_frame *prframe)
+{
+	u32	last_evm=0, tmpVal;
+ 	struct rx_pkt_attrib *pattrib;
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	struct signal_stat * signal_stat;
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+	if(prframe == NULL || padapter==NULL){
+		return;
+	}
+
+	pattrib = &prframe->u.hdr.attrib;
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	signal_stat = &padapter->recvpriv.signal_qual_data;
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+	//DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual);
+
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	if(signal_stat->update_req) {
+		signal_stat->total_num = 0;
+		signal_stat->total_val = 0;
+		signal_stat->update_req = 0;
+	}
+
+	signal_stat->total_num++;
+	signal_stat->total_val  += pattrib->signal_qual;
+	signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
+	
+#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
+	if(pattrib->signal_qual != 0)
+	{
+			//
+			// 1. Record the general EVM to the sliding window.
+			//
+			if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX)
+			{
+				padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX;
+				last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index];
+				padapter->recvpriv.signal_qual_data.total_val -= last_evm;
+			}
+			padapter->recvpriv.signal_qual_data.total_val += pattrib->signal_qual;
+
+			padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->signal_qual;
+			if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX)
+				padapter->recvpriv.signal_qual_data.index = 0;
+
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d  pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->signal_qual));
+
+			// <1> Showed on UI for user, in percentage.
+			tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num;
+			padapter->recvpriv.signal_qual=(u8)tmpVal;
+
+	}
+	else
+	{
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->signal_qual));
+	}
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+}// Process_UiLinkQuality8192S
+
+
+static void process_phy_info(_adapter *padapter, union recv_frame *prframe)
+{
+	union recv_frame *precvframe = (union recv_frame *)prframe;
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	// If we switch to the antenna for testing, the signal strength 
+	// of the packets in this time shall not be counted into total receiving power. 
+	// This prevents error counting Rx signal strength and affecting other dynamic mechanism.
+
+	// Select the packets to do RSSI checking for antenna switching.
+	SwAntDivRSSICheck8192C(padapter, precvframe->u.hdr.attrib.RxPWDBAll);
+
+	if(GET_HAL_DATA(padapter)->RSSI_test == _TRUE)
+		return;
+#endif
+	//
+	// Check RSSI
+	//
+	process_rssi(padapter, precvframe);
+	//
+	// Check PWDB.
+	//
+	process_PWDB(padapter, precvframe); 
+	//
+	// Check EVM
+	//
+	process_link_qual(padapter,  precvframe);
+
+}
+
+
+void rtl8192c_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_info)
+{
+	struct rx_pkt_attrib	*pattrib = &precvframe->u.hdr.attrib;
+	_adapter				*padapter = precvframe->u.hdr.adapter;
+	u8	bPacketMatchBSSID =_FALSE;
+	u8	bPacketToSelf = _FALSE;
+	u8	bPacketBeacon = _FALSE;
+
+	if((pattrib->physt) && (pphy_info != NULL))
+	{
+		bPacketMatchBSSID = ((!IsFrameTypeCtrl(precvframe->u.hdr.rx_data)) && !(pattrib->icv_err) && !(pattrib->crc_err) &&
+			_rtw_memcmp(get_hdr_bssid(precvframe->u.hdr.rx_data), get_my_bssid(&padapter->mlmeextpriv.mlmext_info.network), ETH_ALEN));
+			
+
+		bPacketToSelf = bPacketMatchBSSID &&  (_rtw_memcmp(get_da(precvframe->u.hdr.rx_data), myid(&padapter->eeprompriv), ETH_ALEN));
+
+		bPacketBeacon =bPacketMatchBSSID && (GetFrameSubType(precvframe->u.hdr.rx_data) ==  WIFI_BEACON);
+
+		query_rx_phy_status(precvframe, pphy_info);
+
+		precvframe->u.hdr.psta = NULL;
+		if(bPacketMatchBSSID && check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
+		{
+			u8 *sa;
+			struct sta_info *psta=NULL;
+			struct sta_priv *pstapriv = &padapter->stapriv;
+			
+			sa = get_sa(precvframe->u.hdr.rx_data);
+
+			psta = rtw_get_stainfo(pstapriv, sa);
+			if(psta)
+			{
+				precvframe->u.hdr.psta = psta;
+				process_phy_info(padapter, precvframe);
+			}
+		}
+		else if(bPacketToSelf || bPacketBeacon)
+		{
+			if(check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+			{
+				u8 *sa;
+				struct sta_info *psta=NULL;
+				struct sta_priv *pstapriv = &padapter->stapriv;
+			
+				sa = get_sa(precvframe->u.hdr.rx_data);
+
+				psta = rtw_get_stainfo(pstapriv, sa);
+				if(psta)
+				{
+					precvframe->u.hdr.psta = psta;
+				}				
+			}
+					
+			process_phy_info(padapter, precvframe);
+		}
+	}
+}
+
+void rtl8192c_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc)
+{
+	struct rx_pkt_attrib	*pattrib = &precvframe->u.hdr.attrib;
+
+	//Offset 0
+	pattrib->physt = (u8)((le32_to_cpu(pdesc->rxdw0) >> 26) & 0x1);
+	pattrib->pkt_len =  (u16)(le32_to_cpu(pdesc->rxdw0)&0x00003fff);
+	pattrib->drvinfo_sz = (u8)((le32_to_cpu(pdesc->rxdw0) >> 16) & 0xf) * 8;//uint 2^3 = 8 bytes
+
+	pattrib->shift_sz = (u8)((le32_to_cpu(pdesc->rxdw0) >> 24) & 0x3);
+
+	pattrib->crc_err = (u8)((le32_to_cpu(pdesc->rxdw0) >> 14) & 0x1);
+	pattrib->icv_err = (u8)((le32_to_cpu(pdesc->rxdw0) >> 15) & 0x1);
+	pattrib->qos = (u8)(( le32_to_cpu( pdesc->rxdw0 ) >> 23) & 0x1);// Qos data, wireless lan header length is 26
+	pattrib->bdecrypted = (le32_to_cpu(pdesc->rxdw0) & BIT(27))? 0:1;
+
+	//Offset 4
+	pattrib->mfrag = (u8)((le32_to_cpu(pdesc->rxdw1) >> 27) & 0x1);//more fragment bit
+
+	//Offset 8
+	pattrib->frag_num = (u8)((le32_to_cpu(pdesc->rxdw2) >> 12) & 0xf);//fragmentation number
+
+	//Offset 12
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
+	if ( le32_to_cpu(pdesc->rxdw3) & BIT(13)){
+		pattrib->tcpchk_valid = 1; // valid
+		if ( le32_to_cpu(pdesc->rxdw3) & BIT(11) ) {
+			pattrib->tcp_chkrpt = 1; // correct
+			//DBG_8192C("tcp csum ok\n");
+		}
+		else
+			pattrib->tcp_chkrpt = 0; // incorrect
+
+		if ( le32_to_cpu(pdesc->rxdw3) & BIT(12) )
+			pattrib->ip_chkrpt = 1; // correct
+		else
+			pattrib->ip_chkrpt = 0; // incorrect
+	}
+	else {
+		pattrib->tcpchk_valid = 0; // invalid
+	}
+#endif
+
+	pattrib->mcs_rate=(u8)((le32_to_cpu(pdesc->rxdw3))&0x3f);
+	pattrib->rxht=(u8)((le32_to_cpu(pdesc->rxdw3) >>6)&0x1);
+	pattrib->sgi=(u8)((le32_to_cpu(pdesc->rxdw3) >>8)&0x1);
+	//Offset 16
+	//Offset 20
+
+}
+
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_sreset.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_sreset.c
new file mode 100755
index 00000000..f07cfaf6
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_sreset.c
@@ -0,0 +1,231 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#include <rtl8192c_sreset.h>
+#include <rtl8192c_hal.h>
+#ifdef DBG_CONFIG_ERROR_DETECT
+extern void rtw_cancel_all_timer(_adapter *padapter);
+static void _restore_security_setting(_adapter *padapter)
+{
+	u8 EntryId = 0;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;	
+	struct sta_priv * pstapriv = &padapter->stapriv;
+	struct sta_info *psta;
+	struct security_priv* psecuritypriv=&(padapter->securitypriv);	
+	struct mlme_ext_info	*pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
+
+	(pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X)
+		? rtw_write8(padapter, REG_SECCFG, 0xcc)
+		: rtw_write8(padapter, REG_SECCFG, 0xcf);
+	
+	if (	( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) ||
+		( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ ))		
+	{
+
+		for(EntryId=0; EntryId<4; EntryId++)
+		{
+			if(EntryId == psecuritypriv->dot11PrivacyKeyIndex)
+				rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1);
+			else
+				rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0);
+		}	
+
+	}
+	else if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
+		(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_))
+	{
+		psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));				
+		if (psta == NULL) {
+			//DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n"));
+		}
+		else
+		{			
+			//pairwise key
+			rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE);
+			//group key			
+			rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0);
+		}
+	}
+	
+}
+
+static void _restore_network_status(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX	*pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
+	unsigned short	caps;
+	u8	join_type;
+#if 1
+
+	//=======================================================
+	// reset related register of Beacon control 
+	
+	//set MSR to nolink		
+	Set_MSR(padapter, _HW_STATE_NOLINK_);		
+	// reject all data frame
+	rtw_write16(padapter, REG_RXFLTMAP2,0x00);		
+	//reset TSF
+	rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
+
+	//disable update TSF
+	rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4));
+
+	//=======================================================
+	rtw_joinbss_reset(padapter);
+	set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+	//pmlmeinfo->assoc_AP_vendor = maxAP;
+	
+	if (padapter->registrypriv.wifi_spec) {
+		// for WiFi test, follow WMM test plan spec
+		rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F431C);
+		rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E541C);
+		rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x0000A525);
+		rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A549);
+	
+                // for WiFi test, mixed mode with intel STA under bg mode throughput issue
+	        if (padapter->mlmepriv.htpriv.ht_option == 0)
+		     rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00004320);
+
+	} else {
+		rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F3217);
+		rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E4317);
+		rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00105320);
+		rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A444);
+	}
+	
+	//disable dynamic functions, such as high power, DIG
+	//Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);	
+#endif
+
+	rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
+	join_type = 0;
+	rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
+
+	Set_MSR(padapter, (pmlmeinfo->state & 0x3));
+
+	mlmeext_joinbss_event_callback(padapter, 1);
+	//restore Sequence No.
+	rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn);	
+}
+void rtl8192c_silentreset_for_specific_platform(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);	
+	struct sreset_priv *psrtpriv = &pHalData->srestpriv;
+	
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;		
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;	
+	_irqL irqL;
+
+#ifdef DBG_CONFIG_ERROR_RESET
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
+
+	if (!rtw_netif_queue_stopped(padapter->pnetdev))
+		rtw_netif_stop_queue(padapter->pnetdev);
+		
+	rtw_cancel_all_timer(padapter);	
+	tasklet_kill(&pxmitpriv->xmit_tasklet);	
+
+	_enter_critical_mutex(&psrtpriv->silentreset_mutex, &irqL);
+	psrtpriv->silent_reset_inprogress = _TRUE;
+	pwrpriv->change_rfpwrstate = rf_off;	
+#ifdef CONFIG_IPS
+	ips_enter(padapter);								
+	ips_leave(padapter);
+#endif
+	if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+	{
+		_restore_network_status(padapter);
+		_restore_security_setting(padapter);	
+	}
+	
+	_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING);
+	
+	psrtpriv->silent_reset_inprogress = _FALSE;
+	_exit_critical_mutex(&psrtpriv->silentreset_mutex, &irqL);
+		
+	tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
+	_set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000);	
+				
+	if (netif_queue_stopped(padapter->pnetdev))
+		netif_wake_queue(padapter->pnetdev);
+#endif
+}
+
+void rtl8192c_sreset_xmit_status_check(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);	
+	struct sreset_priv *psrtpriv = &pHalData->srestpriv;	
+	
+	unsigned long current_time;
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+	unsigned int diff_time;
+	u32 txdma_status;
+	if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){
+		DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);
+		rtl8192c_silentreset_for_specific_platform(padapter);						
+	}
+	
+	//total xmit irp = 4
+	//DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt);
+	//if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1)
+	current_time = rtw_get_current_time();
+	if(0==pxmitpriv->free_xmitbuf_cnt)
+	{
+		diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time);
+			
+		if(diff_time > 2000){
+			if(psrtpriv->last_tx_complete_time==0){
+				psrtpriv->last_tx_complete_time = current_time;
+			}
+			else{
+				diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time);
+				if(diff_time > 4000){
+					//padapter->Wifi_Error_Status = WIFI_TX_HANG;
+					DBG_8192C("%s tx hang\n", __FUNCTION__);
+					rtl8192c_silentreset_for_specific_platform(padapter);	
+				}
+			}
+		}	
+	}	
+}
+void rtl8192c_sreset_linked_status_check(_adapter *padapter)
+{
+	u32 regc50,regc58,reg824,reg800;
+	regc50 = rtw_read32(padapter,0xc50);
+	regc58 = rtw_read32(padapter,0xc58);
+	reg824 = rtw_read32(padapter,0x824);
+	reg800 = rtw_read32(padapter,0x800);	
+	if(	((regc50&0xFFFFFF00)!= 0x69543400)||
+		((regc58&0xFFFFFF00)!= 0x69543400)||
+		(((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))||
+		( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000)))
+	{
+		DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__,
+			regc50, regc58, reg824, reg800);
+		rtl8192c_silentreset_for_specific_platform(padapter);	
+	}
+}
+#endif
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_xmit.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_xmit.c
new file mode 100755
index 00000000..092700c3
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/rtl8192c_xmit.c
@@ -0,0 +1,63 @@
+/******************************************************************************

+ *

+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.

+ *

+ * This program is free software; you can redistribute it and/or modify it

+ * under the terms of version 2 of the GNU General Public License as

+ * published by the Free Software Foundation.

+ *

+ * This program is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for

+ * more details.

+ *

+ * You should have received a copy of the GNU General Public License along with

+ * this program; if not, write to the Free Software Foundation, Inc.,

+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA

+ *

+ *

+ ******************************************************************************/

+#define _RTL8192C_XMIT_C_

+

+#include <drv_conf.h>

+#include <osdep_service.h>

+#include <drv_types.h>

+#include <rtl8192c_hal.h>

+

+#ifdef CONFIG_XMIT_ACK

+void dump_txrpt_ccx_8192c(void *buf)

+{

+	struct txrpt_ccx_8192c *txrpt_ccx = buf; 

+

+	DBG_871X("%s:\n"

+		"retry_cnt:%u, rsvd_0:%u, rts_retry_cnt:%u, rsvd_1:%u\n"

+		"ccx_qtime:%u, missed_pkt_num:%u, rsvd_4:%u\n"

+		"mac_id:%u, des1_fragssn:%u\n"

+		"rpt_pkt_num:%u, pkt_drop:%u, lifetime_over:%u, retry_over:%u\n"

+		"edca_tx_queue:%u, rsvd_7:%u, bmc:%u, pkt_ok:%u, init_ccx:%u\n"

+		, __func__

+		, txrpt_ccx->retry_cnt, txrpt_ccx->rsvd_0, txrpt_ccx->rts_retry_cnt, txrpt_ccx->rsvd_1

+		, txrpt_ccx_qtime_8192c(txrpt_ccx), txrpt_ccx->missed_pkt_num, txrpt_ccx->rsvd_4

+		, txrpt_ccx->mac_id, txrpt_ccx->des1_fragssn

+		, txrpt_ccx->rpt_pkt_num, txrpt_ccx->pkt_drop, txrpt_ccx->lifetime_over, txrpt_ccx->retry_over

+		, txrpt_ccx->edca_tx_queue, txrpt_ccx->rsvd_7, txrpt_ccx->bmc, txrpt_ccx->pkt_ok, txrpt_ccx->int_ccx

+	);

+}

+

+void handle_txrpt_ccx_8192c(_adapter *adapter, void *buf)

+{

+	struct txrpt_ccx_8192c *txrpt_ccx = buf; 

+

+	#ifdef DBG_CCX

+	dump_txrpt_ccx_8192c(buf);

+	#endif

+

+	if (txrpt_ccx->int_ccx) {

+		if (txrpt_ccx->pkt_ok)

+			rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_SUCCESS);

+		else

+			rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL);

+	}

+}

+#endif //CONFIG_XMIT_ACK

+

diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/Hal8192CUHWImg.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/Hal8192CUHWImg.c
new file mode 100755
index 00000000..b49486b4
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/Hal8192CUHWImg.c
@@ -0,0 +1,8758 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+/*Created on  2011/ 6/15,  5:45*/
+
+#include <basic_types.h>
+#include "Hal8192CUHWImg.h"
+
+#ifdef CONFIG_BT_COEXISTENCE
+// =================== v84 TSMC COMMON 2012-04-13 =======================
+u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength] = {
+0xc1,0x88,0x02,0x00,0x54,0x00,0x01,0x00,0x04,0x13,0x11,0x07,0x3a,0x3d,0x00,0x00,
+0x58,0x97,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x50,0xa1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x57,0x91,0x00,0x00,0x00,0x00,0x00,0xa1,0xe8,0x00,0x00,0x00,
+0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02,
+0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09,
+0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08,
+0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18,
+0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21,
+0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20,
+0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10,
+0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20,
+0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04,
+0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,
+0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b,
+0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c,
+0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04,
+0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04,
+0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a,
+0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00,
+0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18,
+0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50,
+0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c,
+0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02,
+0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30,
+0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0,
+0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4,
+0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04,
+0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12,
+0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02,
+0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e,
+0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50,
+0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22,
+0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06,
+0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8,
+0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22,
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+0xe0,0xb4,0x01,0x02,0x80,0x03,0x90,0x9e,0x44,0xe0,0xff,0x12,0x4c,0xf0,0x22,0x90,
+0x9e,0x53,0xe0,0x64,0x01,0x60,0x08,0x90,0x9e,0x41,0xe0,0x60,0x02,0xa1,0x36,0x90,
+0x9e,0x35,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x9e,0x36,
+0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x9e,0x37,0xe0,
+0xc3,0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x36,0xf0,0x80,0x15,0x90,
+0x9e,0x38,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x37,0xf0,
+0x90,0x9e,0x36,0xf0,0x90,0x9e,0x35,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,
+0xe0,0x30,0xe2,0x32,0x90,0x9e,0x49,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,
+0x80,0x24,0x90,0x9e,0x4a,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,
+0x11,0x90,0x9e,0x4b,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,
+0x4a,0xf0,0x90,0x9e,0x49,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x9e,0x4c,
+0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x4d,0xe0,0xc3,
+0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x4e,0xe0,0xc3,0x94,
+0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x4d,0xf0,0x90,0x9e,0x4c,0xf0,0x90,
+0x04,0xfd,0xe0,0x44,0x01,0xf0,0x22,0x00,0x37,0xda,};
+
+// =================== v79 UMC A Cut COMMON 2011-10-06 =====================
+u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength] = {
+0xc1,0x88,0x02,0x00,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x09,0x58,0x3f,0x01,0x00,
+0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x5a,0x45,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x5f,0xfb,0x00,0x00,0x00,0x00,0x00,0xa1,0xdf,0x00,0x00,0x00,
+0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02,
+0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09,
+0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08,
+0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18,
+0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21,
+0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20,
+0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10,
+0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20,
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+0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c,
+0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04,
+0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04,
+0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a,
+0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00,
+0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18,
+0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50,
+0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c,
+0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02,
+0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30,
+0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0,
+0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4,
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+0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50,
+0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22,
+0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06,
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+0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22,
+0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2,
+0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70,
+0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5,
+0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3,
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+0x13,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x12,0xf0,0x90,
+0x9e,0x11,0xf0,0x90,0x9e,0x10,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0,
+0x30,0xe2,0x32,0x90,0x9e,0x24,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,
+0x24,0x90,0x9e,0x25,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,
+0x90,0x9e,0x26,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x25,
+0xf0,0x90,0x9e,0x24,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x9e,0x27,0xe0,
+0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x28,0xe0,0xc3,0x94,
+0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x29,0xe0,0xc3,0x94,0xff,
+0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x04,
+0xfd,0xe0,0x44,0x01,0xf0,0x22,0xf5,0x67,};
+
+// =================== v84 UMC B Cut COMMON 2012-04-13 =====================
+u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength] = {
+0xc2,0x88,0x02,0x00,0x54,0x00,0x01,0x00,0x04,0x13,0x11,0x08,0x26,0x3d,0x01,0x00,
+0x58,0x97,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x50,0xa1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x57,0x91,0x00,0x00,0x00,0x00,0x00,0xa1,0xe8,0x00,0x00,0x00,
+0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02,
+0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09,
+0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08,
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+0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x9e,0xa8,
+0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,
+0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x9e,0xa8,
+0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xed,0x54,0x0f,0xfd,0xec,0x54,0xf0,
+0xfc,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xed,0x44,0x10,
+0xfd,0xec,0x44,0x01,0xfc,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,
+0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x04,
+0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,
+0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,
+0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9,
+0xe4,0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x43,0xf0,
+0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x14,0xc2,0xaf,0x90,
+0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x49,0x05,0x7d,0x40,0x7f,0x01,0x12,
+0x36,0xaf,0xe5,0x14,0x24,0xff,0x92,0xaf,0x22,0x90,0x9e,0x3a,0xe0,0xc3,0x94,0x14,
+0x50,0x05,0xe0,0x04,0xf0,0x81,0x01,0x90,0x9e,0x3a,0xe0,0x64,0x14,0x60,0x02,0x81,
+0x01,0x90,0x9e,0x49,0xe0,0x70,0x25,0x90,0x9e,0x4c,0xe0,0x70,0x1f,0x90,0x9e,0x4a,
+0xe0,0x70,0x19,0x90,0x9e,0x4d,0xe0,0x70,0x13,0x90,0x9e,0x4b,0xe0,0x70,0x0d,0x90,
+0x9e,0x4e,0xe0,0x70,0x07,0x90,0x04,0xfd,0xe0,0x54,0xfe,0xf0,0x90,0x9e,0x49,0xe0,
+0x90,0x04,0x44,0xf0,0x90,0x9e,0x4a,0xe0,0x90,0x04,0x45,0xf0,0x90,0x9e,0x4b,0xe0,
+0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x4c,0xe0,0x90,0x04,0x48,0xf0,0x90,
+0x9e,0x4d,0xe0,0x90,0x04,0x49,0xf0,0x90,0x9e,0x4e,0xe0,0x90,0x04,0x4a,0xf0,0xa3,
+0xe4,0xf0,0x90,0x9e,0x35,0xe0,0x90,0x04,0x4c,0xf0,0x90,0x9e,0x36,0xe0,0x90,0x04,
+0x4d,0xf0,0x90,0x9e,0x37,0xe0,0x90,0x04,0x4e,0xf0,0x90,0x9e,0x38,0xe0,0x90,0x04,
+0x4f,0xf0,0xe4,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0x35,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,
+0xf0,0xa3,0xf0,0x90,0x9e,0x49,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,
+0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x19,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x1a,
+0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x1b,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x1c,
+0xf0,0x90,0x9e,0x52,0xe0,0xff,0x90,0x9e,0x1c,0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,
+0x9e,0x52,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40,0x11,0x90,0x9e,0x40,0xe0,0xb4,0x01,
+0x02,0x80,0x03,0x90,0x9e,0x44,0xe0,0xff,0x12,0x4c,0xf0,0x22,0x90,0x9e,0x53,0xe0,
+0x64,0x01,0x60,0x08,0x90,0x9e,0x41,0xe0,0x60,0x02,0xa1,0x23,0x90,0x9e,0x35,0xe0,
+0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x9e,0x36,0xe0,0xc3,0x94,
+0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x9e,0x37,0xe0,0xc3,0x94,0xff,
+0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x36,0xf0,0x80,0x15,0x90,0x9e,0x38,0xe0,
+0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x37,0xf0,0x90,0x9e,0x36,
+0xf0,0x90,0x9e,0x35,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,
+0x32,0x90,0x9e,0x49,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,
+0x9e,0x4a,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,
+0x4b,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x4a,0xf0,0x90,
+0x9e,0x49,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x9e,0x4c,0xe0,0xc3,0x94,
+0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x4d,0xe0,0xc3,0x94,0xff,0x50,
+0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x4e,0xe0,0xc3,0x94,0xff,0x50,0x0c,
+0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x4d,0xf0,0x90,0x9e,0x4c,0xf0,0x90,0x04,0xfd,0xe0,
+0x44,0x01,0xf0,0x22,0x68,0x4c,};
+#else
+// =================== v88 TSMC P2PPS with CCX report C2H 2012-12-05 =======================
+u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength] = {
+0xC1, 0x88, 0x02, 0x05, 0x58, 0x00, 0x02, 0x00, 0x12, 0x05, 0x17, 0x12, 0xDE, 0x3E, 0x00, 0x00,
+0x94, 0x18, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x02, 0x46, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0x60, 0xF2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0x68, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x4B, 0x87, 0x00, 0x00,
+0x05, 0x04, 0x03, 0x02, 0x00, 0x03, 0x06, 0x05, 0x04, 0x03, 0x00, 0x04, 0x06, 0x05, 0x04, 0x02,
+0x00, 0x04, 0x08, 0x07, 0x06, 0x04, 0x00, 0x06, 0x0A, 0x09, 0x08, 0x06, 0x00, 0x08, 0x0A, 0x09,
+0x08, 0x04, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x02, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x00, 0x00, 0x08,
+0x12, 0x11, 0x10, 0x08, 0x00, 0x10, 0x1A, 0x19, 0x18, 0x10, 0x00, 0x18, 0x22, 0x21, 0x20, 0x18,
+0x00, 0x20, 0x22, 0x21, 0x20, 0x10, 0x00, 0x20, 0x22, 0x21, 0x20, 0x08, 0x00, 0x20, 0x22, 0x21,
+0x1C, 0x08, 0x00, 0x20, 0x22, 0x21, 0x14, 0x08, 0x00, 0x20, 0x22, 0x20, 0x18, 0x08, 0x00, 0x20,
+0x31, 0x30, 0x20, 0x10, 0x00, 0x30, 0x31, 0x30, 0x18, 0x00, 0x00, 0x30, 0x31, 0x2F, 0x10, 0x10,
+0x00, 0x30, 0x31, 0x2C, 0x10, 0x10, 0x00, 0x30, 0x31, 0x28, 0x10, 0x00, 0x00, 0x30, 0x31, 0x20,
+0x10, 0x00, 0x00, 0x30, 0x31, 0x10, 0x10, 0x00, 0x00, 0x30, 0x04, 0x04, 0x04, 0x05, 0x04, 0x04,
+0x05, 0x07, 0x07, 0x07, 0x08, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x06, 0x0A, 0x0B, 0x0D, 0x05, 0x05,
+0x07, 0x07, 0x08, 0x0B, 0x0D, 0x0F, 0x04, 0x04, 0x04, 0x05, 0x07, 0x07, 0x09, 0x09, 0x0C, 0x0E,
+0x10, 0x12, 0x06, 0x07, 0x09, 0x0A, 0x0C, 0x0E, 0x11, 0x13, 0x09, 0x09, 0x09, 0x09, 0x0C, 0x0E,
+0x11, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x26, 0x2A, 0x18, 0x1A,
+0x1D, 0x1F, 0x21, 0x27, 0x29, 0x2A, 0x00, 0x00, 0x00, 0x1F, 0x23, 0x28, 0x2A, 0x2C, 0x00, 0x04,
+0x00, 0x04, 0x00, 0x08, 0x00, 0x10, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60,
+0x00, 0x90, 0x00, 0xC0, 0x00, 0xD8, 0x00, 0x50, 0x00, 0x78, 0x00, 0xA0, 0x00, 0xC8, 0x01, 0x40,
+0x01, 0x90, 0x01, 0xE0, 0x02, 0x30, 0x01, 0x2C, 0x01, 0x40, 0x01, 0xE0, 0x02, 0xD0, 0x03, 0xE8,
+0x04, 0xB0, 0x06, 0x40, 0x07, 0xD0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x04, 0x00, 0x08, 0x00, 0x0C,
+0x00, 0x12, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60, 0x00, 0x6C, 0x00, 0x28,
+0x00, 0x3C, 0x00, 0x50, 0x00, 0x64, 0x00, 0xA0, 0x00, 0xC8, 0x00, 0xF0, 0x01, 0x18, 0x00, 0x64,
+0x00, 0xA0, 0x00, 0xF0, 0x01, 0x68, 0x01, 0xF4, 0x02, 0x58, 0x03, 0x20, 0x03, 0xE8, 0x02, 0x02,
+0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x05, 0x07, 0x02, 0x03, 0x04, 0x0A, 0x0C, 0x0E,
+0x10, 0x12, 0x05, 0x07, 0x07, 0x08, 0x0B, 0x12, 0x24, 0x3C, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02,
+0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x05, 0x06,
+0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x20, 0x1E, 0x1C, 0x18, 0x10, 0x18, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0xBB, 0x01, 0x0C, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE0, 0x22, 0x50,
+0x06, 0xE9, 0x25, 0x82, 0xF8, 0xE6, 0x22, 0xBB, 0xFE, 0x06, 0xE9, 0x25, 0x82, 0xF8, 0xE2, 0x22,
+0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE4, 0x93, 0x22, 0xBB, 0x01, 0x06,
+0x89, 0x82, 0x8A, 0x83, 0xF0, 0x22, 0x50, 0x02, 0xF7, 0x22, 0xBB, 0xFE, 0x01, 0xF3, 0x22, 0xF8,
+0xBB, 0x01, 0x0D, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE8, 0xF0, 0x22,
+0x50, 0x06, 0xE9, 0x25, 0x82, 0xC8, 0xF6, 0x22, 0xBB, 0xFE, 0x05, 0xE9, 0x25, 0x82, 0xC8, 0xF2,
+0x22, 0xC5, 0xF0, 0xF8, 0xA3, 0xE0, 0x28, 0xF0, 0xC5, 0xF0, 0xF8, 0xE5, 0x82, 0x15, 0x82, 0x70,
+0x02, 0x15, 0x83, 0xE0, 0x38, 0xF0, 0x22, 0xBB, 0x01, 0x0A, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xF5,
+0xF0, 0xA3, 0xE0, 0x22, 0x50, 0x06, 0x87, 0xF0, 0x09, 0xE7, 0x19, 0x22, 0xBB, 0xFE, 0x07, 0xE3,
+0xF5, 0xF0, 0x09, 0xE3, 0x19, 0x22, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xF5, 0xF0, 0x74, 0x01,
+0x93, 0x22, 0xBB, 0x01, 0x10, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE0,
+0xF5, 0xF0, 0xA3, 0xE0, 0x22, 0x50, 0x09, 0xE9, 0x25, 0x82, 0xF8, 0x86, 0xF0, 0x08, 0xE6, 0x22,
+0xBB, 0xFE, 0x0A, 0xE9, 0x25, 0x82, 0xF8, 0xE2, 0xF5, 0xF0, 0x08, 0xE2, 0x22, 0xE5, 0x83, 0x2A,
+0xF5, 0x83, 0xE9, 0x93, 0xF5, 0xF0, 0xA3, 0xE9, 0x93, 0x22, 0xBB, 0x01, 0x0A, 0x89, 0x82, 0x8A,
+0x83, 0xF0, 0xE5, 0xF0, 0xA3, 0xF0, 0x22, 0x50, 0x06, 0xF7, 0x09, 0xA7, 0xF0, 0x19, 0x22, 0xBB,
+0xFE, 0x06, 0xF3, 0xE5, 0xF0, 0x09, 0xF3, 0x19, 0x22, 0xF8, 0xBB, 0x01, 0x11, 0xE5, 0x82, 0x29,
+0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE8, 0xF0, 0xE5, 0xF0, 0xA3, 0xF0, 0x22, 0x50, 0x09,
+0xE9, 0x25, 0x82, 0xC8, 0xF6, 0x08, 0xA6, 0xF0, 0x22, 0xBB, 0xFE, 0x09, 0xE9, 0x25, 0x82, 0xC8,
+0xF2, 0xE5, 0xF0, 0x08, 0xF2, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC,
+0x48, 0xFC, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xA4,
+0x25, 0x82, 0xF5, 0x82, 0xE5, 0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA,
+0xA3, 0xE0, 0xF9, 0x22, 0xF8, 0xE0, 0xFB, 0xA3, 0xA3, 0xE0, 0xF9, 0x25, 0xF0, 0xF0, 0xE5, 0x82,
+0x15, 0x82, 0x70, 0x02, 0x15, 0x83, 0xE0, 0xFA, 0x38, 0xF0, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0,
+0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93,
+0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74,
+0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4,
+0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5,
+0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0xB5, 0xF0, 0x06, 0x74, 0x03, 0x93, 0x68, 0x60,
+0xE9, 0xA3, 0xA3, 0xA3, 0xA3, 0x80, 0xD8, 0xE4, 0x90, 0x8A, 0xC5, 0xF0, 0xE5, 0x24, 0x70, 0x03,
+0x02, 0x44, 0x9D, 0xE5, 0x21, 0x64, 0x01, 0x60, 0x03, 0x02, 0x44, 0x9D, 0xE5, 0x24, 0x14, 0x60,
+0x29, 0x24, 0xFD, 0x60, 0x25, 0x24, 0x02, 0x24, 0xFB, 0x50, 0x02, 0x80, 0x23, 0x90, 0x8B, 0x0B,
+0xE0, 0x14, 0xF0, 0xE0, 0x60, 0x04, 0xA3, 0xE0, 0x60, 0x16, 0x90, 0x8B, 0x0B, 0xE0, 0x70, 0x0A,
+0x90, 0x8B, 0x19, 0xE0, 0x90, 0x8B, 0x0B, 0xF0, 0x80, 0x00, 0x90, 0x8A, 0xC5, 0x74, 0x01, 0xF0,
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+0x60, 0x07, 0xE4, 0xF0, 0x53, 0x25, 0xFD, 0x80, 0x24, 0x90, 0x8B, 0x0C, 0xE0, 0x04, 0xF0, 0x53,
+0x25, 0xEF, 0x90, 0x8B, 0x10, 0xE0, 0xFF, 0x90, 0x8B, 0x0C, 0xE0, 0xD3, 0x9F, 0x40, 0x0E, 0xE5,
+0x21, 0xB4, 0x01, 0x09, 0x90, 0x8B, 0x0D, 0xE0, 0x70, 0x03, 0xE0, 0x04, 0xF0, 0x90, 0x01, 0x5B,
+0xE0, 0x60, 0x10, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0x90,
+0x8B, 0x18, 0xF0, 0x90, 0x01, 0x5F, 0xE0, 0x60, 0x10, 0x90, 0x01, 0x5F, 0xE4, 0xF0, 0x90, 0x01,
+0x3C, 0x74, 0x08, 0xF0, 0xE4, 0x90, 0x8B, 0x17, 0xF0, 0x22, 0xE4, 0x90, 0x8B, 0x4F, 0xF0, 0xA3,
+0xF0, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x0F, 0xA3, 0xE0, 0x70, 0x0B, 0xA3, 0xE0, 0x70, 0x07, 0xA3,
+0xE0, 0x70, 0x03, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x8B, 0x50, 0xE0, 0x94, 0xE8, 0x90, 0x8B, 0x4F,
+0xE0, 0x94, 0x03, 0x40, 0x03, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x37, 0x54, 0x90,
+0x8B, 0x4F, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x42, 0x81, 0x80, 0xC6, 0x00, 0x92, 0x00};
+
+// =================== v88 UMC A Cut P2PPS with CCX report C2H 2012-12-05 =====================
+u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength] = {
+0xC1, 0x88, 0x02, 0x05, 0x58, 0x00, 0x02, 0x00, 0x12, 0x05, 0x17, 0x11, 0xDE, 0x3E, 0x01, 0x00,
+0x94, 0x18, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x02, 0x46, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0x60, 0xF2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0x68, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x4B, 0x87, 0x00, 0x00,
+0x05, 0x04, 0x03, 0x02, 0x00, 0x03, 0x06, 0x05, 0x04, 0x03, 0x00, 0x04, 0x06, 0x05, 0x04, 0x02,
+0x00, 0x04, 0x08, 0x07, 0x06, 0x04, 0x00, 0x06, 0x0A, 0x09, 0x08, 0x06, 0x00, 0x08, 0x0A, 0x09,
+0x08, 0x04, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x02, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x00, 0x00, 0x08,
+0x12, 0x11, 0x10, 0x08, 0x00, 0x10, 0x1A, 0x19, 0x18, 0x10, 0x00, 0x18, 0x22, 0x21, 0x20, 0x18,
+0x00, 0x20, 0x22, 0x21, 0x20, 0x10, 0x00, 0x20, 0x22, 0x21, 0x20, 0x08, 0x00, 0x20, 0x22, 0x21,
+0x1C, 0x08, 0x00, 0x20, 0x22, 0x21, 0x14, 0x08, 0x00, 0x20, 0x22, 0x20, 0x18, 0x08, 0x00, 0x20,
+0x31, 0x30, 0x20, 0x10, 0x00, 0x30, 0x31, 0x30, 0x18, 0x00, 0x00, 0x30, 0x31, 0x2F, 0x10, 0x10,
+0x00, 0x30, 0x31, 0x2C, 0x10, 0x10, 0x00, 0x30, 0x31, 0x28, 0x10, 0x00, 0x00, 0x30, 0x31, 0x20,
+0x10, 0x00, 0x00, 0x30, 0x31, 0x10, 0x10, 0x00, 0x00, 0x30, 0x04, 0x04, 0x04, 0x05, 0x04, 0x04,
+0x05, 0x07, 0x07, 0x07, 0x08, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x06, 0x0A, 0x0B, 0x0D, 0x05, 0x05,
+0x07, 0x07, 0x08, 0x0B, 0x0D, 0x0F, 0x04, 0x04, 0x04, 0x05, 0x07, 0x07, 0x09, 0x09, 0x0C, 0x0E,
+0x10, 0x12, 0x06, 0x07, 0x09, 0x0A, 0x0C, 0x0E, 0x11, 0x13, 0x09, 0x09, 0x09, 0x09, 0x0C, 0x0E,
+0x11, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x26, 0x2A, 0x18, 0x1A,
+0x1D, 0x1F, 0x21, 0x27, 0x29, 0x2A, 0x00, 0x00, 0x00, 0x1F, 0x23, 0x28, 0x2A, 0x2C, 0x00, 0x04,
+0x00, 0x04, 0x00, 0x08, 0x00, 0x10, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60,
+0x00, 0x90, 0x00, 0xC0, 0x00, 0xD8, 0x00, 0x50, 0x00, 0x78, 0x00, 0xA0, 0x00, 0xC8, 0x01, 0x40,
+0x01, 0x90, 0x01, 0xE0, 0x02, 0x30, 0x01, 0x2C, 0x01, 0x40, 0x01, 0xE0, 0x02, 0xD0, 0x03, 0xE8,
+0x04, 0xB0, 0x06, 0x40, 0x07, 0xD0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x04, 0x00, 0x08, 0x00, 0x0C,
+0x00, 0x12, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60, 0x00, 0x6C, 0x00, 0x28,
+0x00, 0x3C, 0x00, 0x50, 0x00, 0x64, 0x00, 0xA0, 0x00, 0xC8, 0x00, 0xF0, 0x01, 0x18, 0x00, 0x64,
+0x00, 0xA0, 0x00, 0xF0, 0x01, 0x68, 0x01, 0xF4, 0x02, 0x58, 0x03, 0x20, 0x03, 0xE8, 0x02, 0x02,
+0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x05, 0x07, 0x02, 0x03, 0x04, 0x0A, 0x0C, 0x0E,
+0x10, 0x12, 0x05, 0x07, 0x07, 0x08, 0x0B, 0x12, 0x24, 0x3C, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02,
+0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x05, 0x06,
+0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x20, 0x1E, 0x1C, 0x18, 0x10, 0x18, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0xBB, 0x01, 0x0C, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE0, 0x22, 0x50,
+0x06, 0xE9, 0x25, 0x82, 0xF8, 0xE6, 0x22, 0xBB, 0xFE, 0x06, 0xE9, 0x25, 0x82, 0xF8, 0xE2, 0x22,
+0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE4, 0x93, 0x22, 0xBB, 0x01, 0x06,
+0x89, 0x82, 0x8A, 0x83, 0xF0, 0x22, 0x50, 0x02, 0xF7, 0x22, 0xBB, 0xFE, 0x01, 0xF3, 0x22, 0xF8,
+0xBB, 0x01, 0x0D, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE8, 0xF0, 0x22,
+0x50, 0x06, 0xE9, 0x25, 0x82, 0xC8, 0xF6, 0x22, 0xBB, 0xFE, 0x05, 0xE9, 0x25, 0x82, 0xC8, 0xF2,
+0x22, 0xC5, 0xF0, 0xF8, 0xA3, 0xE0, 0x28, 0xF0, 0xC5, 0xF0, 0xF8, 0xE5, 0x82, 0x15, 0x82, 0x70,
+0x02, 0x15, 0x83, 0xE0, 0x38, 0xF0, 0x22, 0xBB, 0x01, 0x0A, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xF5,
+0xF0, 0xA3, 0xE0, 0x22, 0x50, 0x06, 0x87, 0xF0, 0x09, 0xE7, 0x19, 0x22, 0xBB, 0xFE, 0x07, 0xE3,
+0xF5, 0xF0, 0x09, 0xE3, 0x19, 0x22, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xF5, 0xF0, 0x74, 0x01,
+0x93, 0x22, 0xBB, 0x01, 0x10, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE0,
+0xF5, 0xF0, 0xA3, 0xE0, 0x22, 0x50, 0x09, 0xE9, 0x25, 0x82, 0xF8, 0x86, 0xF0, 0x08, 0xE6, 0x22,
+0xBB, 0xFE, 0x0A, 0xE9, 0x25, 0x82, 0xF8, 0xE2, 0xF5, 0xF0, 0x08, 0xE2, 0x22, 0xE5, 0x83, 0x2A,
+0xF5, 0x83, 0xE9, 0x93, 0xF5, 0xF0, 0xA3, 0xE9, 0x93, 0x22, 0xBB, 0x01, 0x0A, 0x89, 0x82, 0x8A,
+0x83, 0xF0, 0xE5, 0xF0, 0xA3, 0xF0, 0x22, 0x50, 0x06, 0xF7, 0x09, 0xA7, 0xF0, 0x19, 0x22, 0xBB,
+0xFE, 0x06, 0xF3, 0xE5, 0xF0, 0x09, 0xF3, 0x19, 0x22, 0xF8, 0xBB, 0x01, 0x11, 0xE5, 0x82, 0x29,
+0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE8, 0xF0, 0xE5, 0xF0, 0xA3, 0xF0, 0x22, 0x50, 0x09,
+0xE9, 0x25, 0x82, 0xC8, 0xF6, 0x08, 0xA6, 0xF0, 0x22, 0xBB, 0xFE, 0x09, 0xE9, 0x25, 0x82, 0xC8,
+0xF2, 0xE5, 0xF0, 0x08, 0xF2, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC,
+0x48, 0xFC, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xA4,
+0x25, 0x82, 0xF5, 0x82, 0xE5, 0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA,
+0xA3, 0xE0, 0xF9, 0x22, 0xF8, 0xE0, 0xFB, 0xA3, 0xA3, 0xE0, 0xF9, 0x25, 0xF0, 0xF0, 0xE5, 0x82,
+0x15, 0x82, 0x70, 0x02, 0x15, 0x83, 0xE0, 0xFA, 0x38, 0xF0, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0,
+0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93,
+0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74,
+0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4,
+0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5,
+0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0xB5, 0xF0, 0x06, 0x74, 0x03, 0x93, 0x68, 0x60,
+0xE9, 0xA3, 0xA3, 0xA3, 0xA3, 0x80, 0xD8, 0xE4, 0x90, 0x8A, 0xC5, 0xF0, 0xE5, 0x24, 0x70, 0x03,
+0x02, 0x44, 0x9D, 0xE5, 0x21, 0x64, 0x01, 0x60, 0x03, 0x02, 0x44, 0x9D, 0xE5, 0x24, 0x14, 0x60,
+0x29, 0x24, 0xFD, 0x60, 0x25, 0x24, 0x02, 0x24, 0xFB, 0x50, 0x02, 0x80, 0x23, 0x90, 0x8B, 0x0B,
+0xE0, 0x14, 0xF0, 0xE0, 0x60, 0x04, 0xA3, 0xE0, 0x60, 0x16, 0x90, 0x8B, 0x0B, 0xE0, 0x70, 0x0A,
+0x90, 0x8B, 0x19, 0xE0, 0x90, 0x8B, 0x0B, 0xF0, 0x80, 0x00, 0x90, 0x8A, 0xC5, 0x74, 0x01, 0xF0,
+0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x16, 0xA3, 0xE0, 0xB4, 0x06, 0x05, 0xE4, 0x90, 0x8A, 0xC5,
+0xF0, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x70, 0x04, 0x90, 0x8A, 0xC5, 0xF0, 0x90, 0x8A, 0xC5,
+0xE0, 0x60, 0x4A, 0x43, 0x25, 0x10, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x0C, 0xE0, 0x75,
+0xF0, 0x03, 0xA4, 0xFF, 0x90, 0x8B, 0x15, 0xE0, 0x2F, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD,
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+0xE0, 0x30, 0xE0, 0x09, 0x12, 0x7D, 0xC1, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x22, 0xE4, 0xF5,
+0x25, 0xF5, 0x24, 0x75, 0x23, 0x0C, 0x75, 0x22, 0x0C, 0x90, 0x8B, 0x1A, 0xF0, 0x90, 0x8B, 0x18,
+0xF0, 0x90, 0x8B, 0x17, 0xF0, 0x90, 0x8B, 0x19, 0x04, 0xF0, 0x90, 0x8B, 0x0B, 0xF0, 0xE4, 0x90,
+0x8B, 0x1B, 0xF0, 0x90, 0x8B, 0x0D, 0xF0, 0x90, 0x8B, 0x15, 0x74, 0x05, 0xF0, 0xE4, 0x90, 0x8B,
+0x0C, 0xF0, 0x90, 0x8B, 0x13, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x90, 0x8B, 0x10, 0xF0, 0xA3, 0x74,
+0x05, 0xF0, 0x90, 0x8B, 0x0F, 0x74, 0x14, 0xF0, 0x90, 0x8B, 0x16, 0x74, 0x05, 0xF0, 0xE4, 0x90,
+0x8B, 0x0E, 0xF0, 0x90, 0x8B, 0x0A, 0xF0, 0x90, 0x8B, 0x08, 0xF0, 0x90, 0x8B, 0x12, 0xF0, 0x22,
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+0x07, 0x74, 0x16, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0xFA, 0xF0, 0x74,
+0x15, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74,
+0x06, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x0F, 0xF0, 0x90, 0x04, 0x53,
+0xE4, 0xF0, 0x90, 0x04, 0x52, 0xF0, 0x90, 0x04, 0x51, 0x74, 0xFF, 0xF0, 0x90, 0x04, 0x50, 0x74,
+0xFD, 0xF0, 0x74, 0x14, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0x4D,
+0xFD, 0x74, 0x14, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xED, 0xF0, 0x22, 0x7D, 0x01,
+0x7F, 0x0C, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x67, 0x8D, 0x68, 0xE5, 0x67, 0x54,
+0x0F, 0xFF, 0xE5, 0x22, 0x54, 0x0F, 0x6F, 0x60, 0x72, 0xE5, 0x67, 0x30, 0xE2, 0x30, 0xE5, 0x22,
+0x20, 0xE2, 0x05, 0x7F, 0x01, 0x12, 0x4A, 0xB2, 0xE5, 0x22, 0x30, 0xE3, 0x10, 0xE5, 0x67, 0x20,
+0xE3, 0x0B, 0x12, 0x49, 0xD5, 0xEF, 0x60, 0x53, 0x12, 0x4A, 0xCC, 0x80, 0x4E, 0xE5, 0x22, 0x20,
+0xE3, 0x49, 0xE5, 0x67, 0x30, 0xE3, 0x44, 0xAF, 0x68, 0x12, 0x4A, 0x7C, 0x80, 0x3D, 0xE5, 0x22,
+0x54, 0x0F, 0xFF, 0xBF, 0x0C, 0x0E, 0xE5, 0x67, 0x20, 0xE3, 0x09, 0x12, 0x49, 0xD5, 0xEF, 0x60,
+0x2A, 0x12, 0x4A, 0xCC, 0xE5, 0x22, 0x54, 0x0F, 0xFF, 0xBF, 0x04, 0x0E, 0xE5, 0x67, 0x20, 0xE2,
+0x09, 0x12, 0x49, 0x93, 0xEF, 0x60, 0x14, 0x12, 0x4A, 0x32, 0xE5, 0x22, 0x54, 0x0F, 0xFF, 0xBF,
+0x02, 0x09, 0x12, 0x45, 0x00, 0xEF, 0x60, 0x03, 0x12, 0x4B, 0x10, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
+0x02, 0x46, 0x6E, 0x02, 0x50, 0xC6, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6,
+0x80, 0x01, 0xF2, 0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C,
+0xC8, 0xC3, 0x33, 0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01,
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+0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xC3, 0xEE, 0x94, 0x01, 0x90, 0x8A, 0xE4, 0xE0, 0x50, 0x1F, 0xFE,
+0x2F, 0xFF, 0xEE, 0xFD, 0xC3, 0x74, 0x03, 0x9D, 0xFD, 0xE4, 0x94, 0x00, 0xFC, 0x74, 0xEB, 0x2D,
+0xF5, 0x82, 0x74, 0x8A, 0x3C, 0xF5, 0x83, 0xE0, 0xFD, 0x12, 0x51, 0x88, 0x80, 0x2B, 0xFF, 0xFD,
+0xC3, 0x74, 0x03, 0x9D, 0xFD, 0xE4, 0x94, 0x00, 0xFC, 0x74, 0xEB, 0x2D, 0xF5, 0x82, 0x74, 0x8A,
+0x3C, 0xF5, 0x83, 0xE0, 0xFE, 0xEF, 0xFD, 0x90, 0x8A, 0xEA, 0xE0, 0x2D, 0xFD, 0x90, 0x8A, 0xE9,
+0xE0, 0x34, 0x00, 0x8D, 0x82, 0xF5, 0x83, 0xEE, 0xF0, 0x90, 0x8A, 0xE4, 0xE0, 0x04, 0xF0, 0x80,
+0x8D, 0xC3, 0x90, 0x8A, 0xE9, 0xE0, 0x94, 0x10, 0x40, 0x02, 0x41, 0x6B, 0x90, 0x8A, 0xE8, 0xE0,
+0x64, 0x04, 0x60, 0x02, 0x41, 0x6B, 0x90, 0x8A, 0xEC, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78,
+0x10, 0x12, 0x24, 0xF5, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x8A, 0xEB, 0xE0,
+0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x18, 0x12, 0x24, 0xF5, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01,
+0xD0, 0x00, 0x12, 0x43, 0x46, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x8A, 0xED,
+0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x08, 0x12, 0x24, 0xF5, 0xD0, 0x03, 0xD0, 0x02, 0xD0,
+0x01, 0xD0, 0x00, 0x12, 0x43, 0x46, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0xA3, 0xE0,
+0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x12, 0x43, 0x46, 0xA3, 0x12, 0x25, 0x08, 0x90, 0x8A, 0xEF, 0x12,
+0x43, 0x53, 0x90, 0x80, 0x96, 0x12, 0x25, 0x08, 0x90, 0x8A, 0xE9, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF,
+0x12, 0x2B, 0x08, 0x80, 0x36, 0x90, 0x8A, 0xED, 0xE0, 0xFE, 0xA3, 0xE0, 0x24, 0x00, 0xFF, 0xE4,
+0x3E, 0xFE, 0x90, 0x8A, 0xE6, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x32, 0x15, 0x80, 0x1D, 0x90, 0x8A,
+0xED, 0xE0, 0xFE, 0xA3, 0xE0, 0x24, 0x00, 0xFF, 0xE4, 0x3E, 0xFE, 0x90, 0x8A, 0xE6, 0xF0, 0xA3,
+0xEF, 0xF0, 0x12, 0x31, 0x82, 0x80, 0x04, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0x8F, 0x0F, 0xE4, 0x90, 0x8A, 0xF3, 0xF0, 0xE5, 0x0F, 0x14, 0xFE, 0x90, 0x8A, 0xF3,
+0xE0, 0xFF, 0xC3, 0x9E, 0x50, 0x0E, 0xEF, 0x04, 0xFD, 0x12, 0x2D, 0x4D, 0x90, 0x8A, 0xF3, 0xE0,
+0x04, 0xF0, 0x80, 0xE5, 0xE5, 0x0F, 0x14, 0xFF, 0x7D, 0xFF, 0x12, 0x2D, 0x4D, 0x90, 0x8A, 0xF3,
+0xE5, 0x0F, 0xF0, 0x90, 0x8A, 0xF3, 0xE0, 0xC3, 0x94, 0xFF, 0x50, 0x0F, 0xE0, 0xFF, 0x04, 0xFD,
+0x12, 0x2D, 0x4D, 0x90, 0x8A, 0xF3, 0xE0, 0x04, 0xF0, 0x80, 0xE8, 0xAD, 0x0F, 0x7F, 0xFF, 0x02,
+0x2D, 0x4D, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0xA3, 0x74,
+0x04, 0xF0, 0xA3, 0xE4, 0xF0, 0x90, 0x8A, 0xE2, 0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x09, 0xE0, 0x90,
+0x8A, 0xE1, 0xF0, 0x12, 0x24, 0x62, 0xFF, 0x90, 0x8A, 0xE1, 0xE0, 0x2F, 0x90, 0x8A, 0xE0, 0xF0,
+0x30, 0xE0, 0x0B, 0x90, 0x8A, 0xDB, 0xE4, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0x80, 0x07, 0xE4, 0x90,
+0x8A, 0xDB, 0xF0, 0xA3, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0xC3, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0x90,
+0x8A, 0xDD, 0xE0, 0x24, 0x20, 0xF0, 0x90, 0x8A, 0xDB, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFC, 0x2D,
+0xFF, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x90, 0x8A, 0xFD, 0xF0, 0x74,
+0x02, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFE, 0xEC, 0x2D, 0x24, 0x03, 0xF5,
+0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x24, 0x00, 0xFF, 0xE4, 0x3E, 0x90, 0x8A, 0xFE, 0xF0,
+0xA3, 0xEF, 0xF0, 0x90, 0x8A, 0xDA, 0x74, 0x04, 0xF0, 0x90, 0x8A, 0xDB, 0xA3, 0xE0, 0xFF, 0xA3,
+0xE0, 0x2F, 0xFF, 0x90, 0x8A, 0xDA, 0xE0, 0xFE, 0x2F, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0xFC,
+0xF5, 0x83, 0xE0, 0xFF, 0x74, 0xFC, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, 0xF0,
+0x90, 0x8A, 0xDA, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x08, 0xCF, 0x11, 0x89, 0xEF, 0x70, 0x45, 0x90,
+0x01, 0xC3, 0xE0, 0x60, 0x2B, 0xC3, 0x90, 0x8A, 0xE3, 0xE0, 0x94, 0xE8, 0x90, 0x8A, 0xE2, 0xE0,
+0x94, 0x03, 0x40, 0x09, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x10, 0xF0, 0x80, 0x79, 0x90, 0x8A, 0xE2,
+0xE4, 0x75, 0xF0, 0x01, 0x12, 0x42, 0x81, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x32, 0x15, 0x80, 0xCF,
+0x90, 0x01, 0xC6, 0xE0, 0x90, 0x01, 0xC3, 0x30, 0xE2, 0x05, 0x74, 0xFE, 0xF0, 0x80, 0x57, 0x74,
+0xFF, 0xF0, 0x80, 0x52, 0x90, 0x8A, 0xDD, 0xE0, 0xB4, 0x78, 0x2E, 0xE4, 0xF0, 0x90, 0x8A, 0xE0,
+0xE0, 0x04, 0xF0, 0x90, 0x8A, 0xDB, 0xE0, 0x70, 0x04, 0xA3, 0xE0, 0x64, 0x80, 0x90, 0x8A, 0xDB,
+0x70, 0x05, 0xF0, 0xA3, 0xF0, 0x80, 0x06, 0xE4, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0x90, 0x8A, 0xE0,
+0xE0, 0xC3, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0x80, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x24, 0x08, 0xF0,
+0x90, 0x8A, 0xDE, 0x74, 0xFF, 0xF5, 0xF0, 0x12, 0x42, 0x81, 0x90, 0x8A, 0xDE, 0xE0, 0x70, 0x02,
+0xA3, 0xE0, 0x60, 0x02, 0x61, 0x16, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x24, 0x62, 0x90, 0x8B,
+0x05, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0x90, 0x8B, 0x06, 0xF0, 0x22, 0xE4, 0xF5, 0x61,
+0x22, 0x91, 0x4A, 0x90, 0x8B, 0x33, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0,
+0x7F, 0x78, 0x7E, 0x08, 0x12, 0x22, 0x65, 0x90, 0x8B, 0x1C, 0x12, 0x25, 0x08, 0x7F, 0x04, 0x7E,
+0x0C, 0x12, 0x22, 0x65, 0x90, 0x8B, 0x20, 0x12, 0x25, 0x08, 0x7F, 0x00, 0x7E, 0x08, 0x12, 0x22,
+0x65, 0x90, 0x8B, 0x24, 0x12, 0x25, 0x08, 0x90, 0x8B, 0x09, 0xE0, 0x90, 0x8B, 0x1C, 0xB4, 0x01,
+0x0D, 0x12, 0x43, 0x53, 0xEF, 0x54, 0xC7, 0xFF, 0xED, 0x54, 0xC7, 0xFD, 0x80, 0x07, 0x12, 0x43,
+0x53, 0xEF, 0x54, 0xC7, 0xFF, 0xEC, 0x90, 0x80, 0x96, 0x12, 0x25, 0x08, 0x7F, 0x78, 0x7E, 0x08,
+0x12, 0x2B, 0x08, 0x90, 0x8B, 0x20, 0x12, 0x43, 0x53, 0xEF, 0x54, 0x0F, 0xFF, 0xEC, 0x90, 0x80,
+0x96, 0x12, 0x25, 0x08, 0x7F, 0x04, 0x7E, 0x0C, 0x12, 0x2B, 0x08, 0x90, 0x8B, 0x24, 0x12, 0x43,
+0x53, 0xEF, 0x44, 0x02, 0xFF, 0xEC, 0x90, 0x80, 0x96, 0x12, 0x25, 0x08, 0x7F, 0x00, 0x7E, 0x08,
+0x12, 0x2B, 0x08, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x22, 0x65, 0x90, 0x8B, 0x28, 0x12, 0x25, 0x08,
+0x90, 0x80, 0x96, 0x12, 0x25, 0x14, 0x00, 0x1B, 0x25, 0xA0, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2B,
+0x08, 0x90, 0x80, 0x68, 0x12, 0x25, 0x14, 0x00, 0x00, 0x00, 0x00, 0xE4, 0xFD, 0xFF, 0x12, 0x30,
+0x2C, 0x90, 0x8B, 0x09, 0xE0, 0xB4, 0x01, 0x11, 0x90, 0x80, 0x68, 0x12, 0x25, 0x14, 0x00, 0x00,
+0x00, 0x00, 0xE4, 0xFD, 0x7F, 0x01, 0x12, 0x30, 0x2C, 0x90, 0x00, 0x11, 0xE0, 0x54, 0xF6, 0xF0,
+0x02, 0x52, 0x0E, 0x91, 0x50, 0x90, 0x8B, 0x33, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74,
+0xFF, 0xF0, 0x90, 0x8B, 0x33, 0x74, 0x04, 0xF0, 0x22, 0xB1, 0x42, 0x90, 0x8B, 0x33, 0x74, 0x04,
+0xF0, 0x22, 0x90, 0x00, 0x11, 0xE0, 0x44, 0x09, 0xF0, 0x12, 0x52, 0x0E, 0x90, 0x8B, 0x1C, 0x12,
+0x43, 0x53, 0x90, 0x80, 0x96, 0x12, 0x25, 0x08, 0x7F, 0x78, 0x7E, 0x08, 0x12, 0x2B, 0x08, 0x90,
+0x8B, 0x20, 0x12, 0x43, 0x53, 0x90, 0x80, 0x96, 0x12, 0x25, 0x08, 0x7F, 0x04, 0x7E, 0x0C, 0x12,
+0x2B, 0x08, 0x90, 0x8B, 0x24, 0x12, 0x43, 0x53, 0x90, 0x80, 0x96, 0x12, 0x25, 0x08, 0x7F, 0x00,
+0x7E, 0x08, 0x12, 0x2B, 0x08, 0x90, 0x8B, 0x28, 0x12, 0x43, 0x53, 0x90, 0x80, 0x96, 0x12, 0x25,
+0x08, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2B, 0x08, 0x90, 0x80, 0x68, 0x12, 0x25, 0x14, 0x00, 0x03,
+0x2D, 0x95, 0xE4, 0xFD, 0xFF, 0x12, 0x30, 0x2C, 0x90, 0x8B, 0x09, 0xE0, 0xB4, 0x01, 0x11, 0x90,
+0x80, 0x68, 0x12, 0x25, 0x14, 0x00, 0x03, 0x2D, 0x95, 0xE4, 0xFD, 0x7F, 0x01, 0x12, 0x30, 0x2C,
+0x22, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, 0x3C, 0xE5, 0x22, 0x54, 0x0F, 0x14, 0x60, 0x2E,
+0x14, 0x60, 0x1E, 0x24, 0xFE, 0x60, 0x0E, 0x24, 0xF8, 0x70, 0x2A, 0xE4, 0x90, 0x8B, 0x2D, 0xF0,
+0x90, 0x05, 0x22, 0xF0, 0x22, 0x90, 0x8B, 0x2D, 0x74, 0x01, 0xF0, 0x90, 0x05, 0x22, 0xE4, 0xF0,
+0x22, 0x90, 0x8B, 0x2D, 0x74, 0x03, 0xF0, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x22, 0x90, 0x01,
+0xC6, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0xAE, 0x07, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x18,
+0x90, 0x8B, 0x2C, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x0C, 0xAF, 0x06, 0x7D, 0x01,
+0x12, 0x45, 0xA2, 0xB1, 0xC1, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0x01, 0x57, 0xE0, 0x60,
+0x3C, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90, 0x8B, 0x1B, 0xE0,
+0x60, 0x07, 0xE4, 0xF0, 0x53, 0x25, 0xFD, 0x80, 0x24, 0x90, 0x8B, 0x0C, 0xE0, 0x04, 0xF0, 0x53,
+0x25, 0xEF, 0x90, 0x8B, 0x10, 0xE0, 0xFF, 0x90, 0x8B, 0x0C, 0xE0, 0xD3, 0x9F, 0x40, 0x0E, 0xE5,
+0x21, 0xB4, 0x01, 0x09, 0x90, 0x8B, 0x0D, 0xE0, 0x70, 0x03, 0xE0, 0x04, 0xF0, 0x90, 0x01, 0x5B,
+0xE0, 0x60, 0x10, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0x90,
+0x8B, 0x18, 0xF0, 0x90, 0x01, 0x5F, 0xE0, 0x60, 0x10, 0x90, 0x01, 0x5F, 0xE4, 0xF0, 0x90, 0x01,
+0x3C, 0x74, 0x08, 0xF0, 0xE4, 0x90, 0x8B, 0x17, 0xF0, 0x22, 0xE4, 0x90, 0x8B, 0x4F, 0xF0, 0xA3,
+0xF0, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x0F, 0xA3, 0xE0, 0x70, 0x0B, 0xA3, 0xE0, 0x70, 0x07, 0xA3,
+0xE0, 0x70, 0x03, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x8B, 0x50, 0xE0, 0x94, 0xE8, 0x90, 0x8B, 0x4F,
+0xE0, 0x94, 0x03, 0x40, 0x03, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x32, 0x15, 0x90,
+0x8B, 0x4F, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x42, 0x81, 0x80, 0xC6, 0x00, 0xFB, 0x98};
+
+// =================== v88 UMC B Cut P2PPS with CCX report C2H 2012-12-05 =====================
+u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength] = {
+0xC2, 0x88, 0x02, 0x05, 0x58, 0x00, 0x02, 0x00, 0x12, 0x05, 0x17, 0x10, 0xC0, 0x3E, 0x01, 0x00,
+0x94, 0x18, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x02, 0x46, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0x60, 0xF3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0x67, 0x5B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x4B, 0x87, 0x00, 0x00,
+0x05, 0x04, 0x03, 0x02, 0x00, 0x03, 0x06, 0x05, 0x04, 0x03, 0x00, 0x04, 0x06, 0x05, 0x04, 0x02,
+0x00, 0x04, 0x08, 0x07, 0x06, 0x04, 0x00, 0x06, 0x0A, 0x09, 0x08, 0x06, 0x00, 0x08, 0x0A, 0x09,
+0x08, 0x04, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x02, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x00, 0x00, 0x08,
+0x12, 0x11, 0x10, 0x08, 0x00, 0x10, 0x1A, 0x19, 0x18, 0x10, 0x00, 0x18, 0x22, 0x21, 0x20, 0x18,
+0x00, 0x20, 0x22, 0x21, 0x20, 0x10, 0x00, 0x20, 0x22, 0x21, 0x20, 0x08, 0x00, 0x20, 0x22, 0x21,
+0x1C, 0x08, 0x00, 0x20, 0x22, 0x21, 0x14, 0x08, 0x00, 0x20, 0x22, 0x20, 0x18, 0x08, 0x00, 0x20,
+0x31, 0x30, 0x20, 0x10, 0x00, 0x30, 0x31, 0x30, 0x18, 0x00, 0x00, 0x30, 0x31, 0x2F, 0x10, 0x10,
+0x00, 0x30, 0x31, 0x2C, 0x10, 0x10, 0x00, 0x30, 0x31, 0x28, 0x10, 0x00, 0x00, 0x30, 0x31, 0x20,
+0x10, 0x00, 0x00, 0x30, 0x31, 0x10, 0x10, 0x00, 0x00, 0x30, 0x04, 0x04, 0x04, 0x05, 0x04, 0x04,
+0x05, 0x07, 0x07, 0x07, 0x08, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x06, 0x0A, 0x0B, 0x0D, 0x05, 0x05,
+0x07, 0x07, 0x08, 0x0B, 0x0D, 0x0F, 0x04, 0x04, 0x04, 0x05, 0x07, 0x07, 0x09, 0x09, 0x0C, 0x0E,
+0x10, 0x12, 0x06, 0x07, 0x09, 0x0A, 0x0C, 0x0E, 0x11, 0x13, 0x09, 0x09, 0x09, 0x09, 0x0C, 0x0E,
+0x11, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x26, 0x2A, 0x18, 0x1A,
+0x1D, 0x1F, 0x21, 0x27, 0x29, 0x2A, 0x00, 0x00, 0x00, 0x1F, 0x23, 0x28, 0x2A, 0x2C, 0x00, 0x04,
+0x00, 0x04, 0x00, 0x08, 0x00, 0x10, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60,
+0x00, 0x90, 0x00, 0xC0, 0x00, 0xD8, 0x00, 0x50, 0x00, 0x78, 0x00, 0xA0, 0x00, 0xC8, 0x01, 0x40,
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+0x00, 0x7B, 0xB1, 0x01, 0x7B, 0xF7, 0x02, 0x7C, 0x31, 0x03, 0x7C, 0x69, 0x04, 0x7C, 0xA2, 0x05,
+0x7C, 0xDD, 0x06, 0x00, 0x00, 0x7D, 0x15, 0xEE, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xB1, 0x48, 0xA1,
+0x15, 0x90, 0x8B, 0x2D, 0xE0, 0xFF, 0xB4, 0x05, 0x04, 0xB1, 0x24, 0xA1, 0x15, 0xEF, 0xB4, 0x06,
+0x06, 0x7F, 0x01, 0xB1, 0x39, 0x80, 0x16, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x03, 0x06, 0x7F, 0x01,
+0xB1, 0x1A, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, 0x02, 0xB1, 0x2E, 0xB1, 0x6B, 0xA1,
+0x15, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xB1, 0x48, 0x80, 0x09, 0x90, 0x8B,
+0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xB1, 0x24, 0x90, 0x8B, 0x2D, 0xE0, 0x70, 0x04, 0xB1, 0x61, 0xA1,
+0x15, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, 0x06, 0x7F, 0x01, 0xB1, 0x39, 0xA1, 0x15, 0xEE,
+0xB4, 0x03, 0x06, 0x7F, 0x01, 0xB1, 0x1A, 0xA1, 0x15, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x02, 0x60,
+0x02, 0xA1, 0x15, 0xB1, 0x2E, 0xA1, 0x15, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x06, 0x7F, 0x01,
+0xB1, 0x48, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xB1, 0x24, 0x90, 0x8B, 0x2D,
+0xE0, 0x70, 0x04, 0xB1, 0x61, 0x80, 0x16, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, 0x06, 0x7F,
+0x01, 0xB1, 0x39, 0x80, 0x08, 0xEE, 0xB4, 0x03, 0x04, 0x7F, 0x01, 0xB1, 0x1A, 0xB1, 0x8D, 0xA1,
+0x15, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xB1, 0x48, 0x80, 0x09, 0x90, 0x8B,
+0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xB1, 0x24, 0x90, 0x8B, 0x2D, 0xE0, 0x70, 0x04, 0xB1, 0x61, 0x80,
+0x14, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, 0x06, 0xE4, 0xFF, 0xB1, 0x39, 0x80, 0x06, 0xEE,
+0xB4, 0x02, 0x02, 0xB1, 0x2E, 0xB1, 0x76, 0xA1, 0x15, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06,
+0x06, 0xE4, 0xFF, 0xB1, 0x39, 0x80, 0x13, 0xEE, 0xB4, 0x03, 0x06, 0x7F, 0x01, 0xB1, 0x1A, 0x80,
+0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, 0x02, 0xB1, 0x2E, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x01,
+0x04, 0xB1, 0x6B, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xB1, 0x24, 0x71, 0x40,
+0x80, 0x73, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, 0x06, 0xE4, 0xFF, 0xB1, 0x39, 0x80, 0x13,
+0xEE, 0xB4, 0x03, 0x06, 0x7F, 0x01, 0xB1, 0x1A, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02,
+0x02, 0xB1, 0x2E, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x01, 0x04, 0xB1, 0x6B, 0x80, 0x0B, 0x90, 0x8B,
+0x2D, 0xE0, 0xB4, 0x04, 0x04, 0x7F, 0x01, 0xB1, 0x48, 0xB1, 0x80, 0x80, 0x38, 0x90, 0x8B, 0x2D,
+0xE0, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xB1, 0x48, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05,
+0x02, 0xB1, 0x24, 0x90, 0x8B, 0x2D, 0xE0, 0x70, 0x04, 0xB1, 0x61, 0x80, 0x16, 0x90, 0x8B, 0x2D,
+0xE0, 0xB4, 0x03, 0x06, 0xE4, 0xFF, 0xB1, 0x1A, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02,
+0x02, 0xB1, 0x2E, 0xB1, 0x9A, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x4A, 0xB2, 0x90, 0x8B, 0x2D,
+0x74, 0x01, 0xF0, 0x22, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0xF0, 0x22, 0x90, 0x05,
+0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0x04, 0xF0, 0x22, 0xEF, 0x60, 0x05, 0x90, 0x05, 0x22, 0xE4,
+0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x01, 0xF0, 0x22, 0x90, 0x8B, 0x56, 0xEF, 0xF0, 0x12, 0x4F, 0xED,
+0x90, 0x8B, 0x56, 0xE0, 0x60, 0x05, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0xE4, 0x90, 0x8B, 0x2D, 0xF0,
+0x22, 0x12, 0x4A, 0xCC, 0x90, 0x8B, 0x2D, 0x74, 0x01, 0xF0, 0x22, 0x7F, 0x01, 0x12, 0x4A, 0x7C,
+0xE4, 0x90, 0x8B, 0x2D, 0xF0, 0x22, 0x12, 0x4A, 0x32, 0x90, 0x8B, 0x2D, 0x74, 0x03, 0xF0, 0x22,
+0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x05, 0xF0, 0x22, 0x90, 0x05, 0x22,
+0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74, 0x6F, 0xF0,
+0x90, 0x8B, 0x2D, 0x74, 0x06, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x33,
+0x74, 0x04, 0xF0, 0x22, 0x12, 0x4F, 0xED, 0x90, 0x8B, 0x33, 0x74, 0x04, 0xF0, 0x22, 0x90, 0x01,
+0x57, 0xE0, 0x60, 0x3C, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90,
+0x8B, 0x1B, 0xE0, 0x60, 0x07, 0xE4, 0xF0, 0x53, 0x25, 0xFD, 0x80, 0x24, 0x90, 0x8B, 0x0C, 0xE0,
+0x04, 0xF0, 0x53, 0x25, 0xEF, 0x90, 0x8B, 0x10, 0xE0, 0xFF, 0x90, 0x8B, 0x0C, 0xE0, 0xD3, 0x9F,
+0x40, 0x0E, 0xE5, 0x21, 0xB4, 0x01, 0x09, 0x90, 0x8B, 0x0D, 0xE0, 0x70, 0x03, 0xE0, 0x04, 0xF0,
+0x90, 0x01, 0x5B, 0xE0, 0x60, 0x10, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04,
+0xF0, 0xE4, 0x90, 0x8B, 0x18, 0xF0, 0x90, 0x01, 0x5F, 0xE0, 0x60, 0x10, 0x90, 0x01, 0x5F, 0xE4,
+0xF0, 0x90, 0x01, 0x3C, 0x74, 0x08, 0xF0, 0xE4, 0x90, 0x8B, 0x17, 0xF0, 0x22, 0xE4, 0x90, 0x8B,
+0x4F, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x0F, 0xA3, 0xE0, 0x70, 0x0B, 0xA3, 0xE0,
+0x70, 0x07, 0xA3, 0xE0, 0x70, 0x03, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x8B, 0x50, 0xE0, 0x94, 0xE8,
+0x90, 0x8B, 0x4F, 0xE0, 0x94, 0x03, 0x40, 0x03, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12,
+0x37, 0x54, 0x90, 0x8B, 0x4F, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x42, 0x81, 0x80, 0xC6, 0x8F, 0x0F,
+0xE4, 0x90, 0x8A, 0xF3, 0xF0, 0xE5, 0x0F, 0x14, 0xFE, 0x90, 0x8A, 0xF3, 0xE0, 0xFF, 0xC3, 0x9E,
+0x50, 0x0E, 0xEF, 0x04, 0xFD, 0x12, 0x34, 0xB7, 0x90, 0x8A, 0xF3, 0xE0, 0x04, 0xF0, 0x80, 0xE5,
+0xE5, 0x0F, 0x14, 0xFF, 0x7D, 0xFF, 0x12, 0x34, 0xB7, 0x90, 0x8A, 0xF3, 0xE5, 0x0F, 0xF0, 0x90,
+0x8A, 0xF3, 0xE0, 0xC3, 0x94, 0xFF, 0x50, 0x0F, 0xE0, 0xFF, 0x04, 0xFD, 0x12, 0x34, 0xB7, 0x90,
+0x8A, 0xF3, 0xE0, 0x04, 0xF0, 0x80, 0xE8, 0xAD, 0x0F, 0x7F, 0xFF, 0x02, 0x34, 0xB7, 0xDC, 0xD3,
+};
+#endif
+
+//8188C_Formal_All_PHYforMP_111117	2011-11-23
+//8192C_Formal_92CU_PHYforMP_110817 	2011-11-23
+
+u32 Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength] = {
+0x024,0x0011800f,
+0x028,0x00ffdb83,
+0x800,0x80040002,
+0x804,0x00000003,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10000330, //for Broadcom AP IOT
+0x814,0x020c3d10,
+0x818,0x02200385,
+0x81c,0x00000000,
+0x820,0x01000100,
+0x824,0x00390004,
+0x828,0x01000100,
+0x82c,0x00390004,
+0x830,0x27272727,
+0x834,0x27272727,
+0x838,0x27272727,
+0x83c,0x27272727,
+0x840,0x00010000,
+0x844,0x00010000,
+0x848,0x27272727,
+0x84c,0x27272727,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x569a569a,
+0x85c,0x0c1b25a4,
+0x860,0x66e60230,
+0x864,0x061f0130,
+0x868,0x27272727,
+0x86c,0x2b2b2b27,
+0x870,0x07000700,
+0x874,0x22184000,
+0x878,0x08080808,
+0x87c,0x00000000,
+0x880,0xc0083070,
+0x884,0x000004d5,
+0x888,0x00000000,
+0x88c,0xcc0000c0,
+0x890,0x00000800,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x81121313,
+0xa00,0x00d047c8,
+0xa04,0x80ff000c,
+0xa08,0x8c838300,
+0xa0c,0x2e68120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x00d30000,
+0xa70,0x101fbf00,
+0xa74,0x00000007,
+0xc00,0x48071d40,
+0xc04,0x03a05633,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08800000,
+0xc1c,0x40000100,
+0xc20,0x00000000,
+0xc24,0x00000000,
+0xc28,0x00000000,
+0xc2c,0x00000000,
+0xc30,0x69e9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a97971c,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020107,
+0xc4c,0x007f037f,
+0xc50,0x69543420,
+0xc54,0x43bc0094,
+0xc58,0x69543420,
+0xc5c,0x433c0094,
+0xc60,0x00000000,
+0xc64,0x5116848b,
+0xc68,0x47c00bff,
+0xc6c,0x00000036,
+0xc70,0x2c7f000d,
+0xc74,0x2186115b,
+0xc78,0x0000001f,
+0xc7c,0x00b99612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x40000100,
+0xc8c,0xa0e40000,
+0xc90,0x00121820,
+0xc94,0x00000000,
+0xc98,0x00121820,
+0xc9c,0x00007f7f,
+0xca0,0x00000000,
+0xca4,0x00000080,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00080740,
+0xd04,0x00020403,
+0xd08,0x0000907f,
+0xd0c,0x20010201,
+0xd10,0xa0633333,
+0xd14,0x3333bc43,
+0xd18,0x7a8f5b6b,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x80608000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd4c,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x00000000,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x04518a3c,
+0xd68,0x00002101,
+0xd6c,0x2a201c16,
+0xd70,0x1812362e,
+0xd74,0x322c2220,
+0xd78,0x000e3c24,
+0xe00,0x2a2a2a2a,
+0xe04,0x2a2a2a2a,
+0xe08,0x03902a2a,
+0xe10,0x2a2a2a2a,
+0xe14,0x2a2a2a2a,
+0xe18,0x2a2a2a2a,
+0xe1c,0x2a2a2a2a,
+0xe28,0x00000000,
+0xe30,0x1000dc1f,
+0xe34,0x10008c1f,
+0xe38,0x02140102,
+0xe3c,0x681604c2,
+0xe40,0x01007c00,
+0xe44,0x01004800,
+0xe48,0xfb000000,
+0xe4c,0x000028d1,
+0xe50,0x1000dc1f,
+0xe54,0x10008c1f,
+0xe58,0x02140102,
+0xe5c,0x28160d05,
+0xe60,0x00000010,
+0xe68,0x001b25a4,
+0xe6c,0x63db25a4,
+0xe70,0x63db25a4,
+0xe74,0x0c1b25a4,
+0xe78,0x0c1b25a4,
+0xe7c,0x0c1b25a4,
+0xe80,0x0c1b25a4,
+0xe84,0x63db25a4,
+0xe88,0x0c1b25a4,
+0xe8c,0x63db25a4,
+0xed0,0x63db25a4,
+0xed4,0x63db25a4,
+0xed8,0x63db25a4,
+0xedc,0x001b25a4,
+0xee0,0x001b25a4,
+0xeec,0x6fdb25a4,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength] = {
+0x024,0x0011800f,
+0x028,0x00ffdb83,
+0x800,0x80040000,
+0x804,0x00000001,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10000330, //for Broadcom AP IOT
+0x814,0x020c3d10,
+0x818,0x02200385,
+0x81c,0x00000000,
+0x820,0x01000100,
+0x824,0x00390004,
+0x828,0x00000000,
+0x82c,0x00000000,
+0x830,0x00000000,
+0x834,0x00000000,
+0x838,0x00000000,
+0x83c,0x00000000,
+0x840,0x00010000,
+0x844,0x00000000,
+0x848,0x00000000,
+0x84c,0x00000000,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x569a569a,
+0x85c,0x001b25a4,
+0x860,0x66e60230,
+0x864,0x061f0130,
+0x868,0x00000000,
+0x86c,0x32323200,
+0x870,0x07000700,
+0x874,0x22004000,
+0x878,0x00000808,
+0x87c,0x00000000,
+0x880,0xc0083070,
+0x884,0x000004d5,
+0x888,0x00000000,
+0x88c,0xccc000c0,
+0x890,0x00000800,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x81121111,
+0xa00,0x00d047c8,
+0xa04,0x80ff000c,
+0xa08,0x8c838300,
+0xa0c,0x2e68120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x00d30000,
+0xa70,0x101fbf00,
+0xa74,0x00000007,
+0xc00,0x48071d40,
+0xc04,0x03a05611,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08800000,
+0xc1c,0x40000100,
+0xc20,0x00000000,
+0xc24,0x00000000,
+0xc28,0x00000000,
+0xc2c,0x00000000,
+0xc30,0x69e9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a97971c,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020107,
+0xc4c,0x007f037f,
+0xc50,0x69543420,
+0xc54,0x43bc0094,
+0xc58,0x69543420,
+0xc5c,0x433c0094,
+0xc60,0x00000000,
+0xc64,0x5116848b,
+0xc68,0x47c00bff,
+0xc6c,0x00000036,
+0xc70,0x2c7f000d,
+0xc74,0x018610db,
+0xc78,0x0000001f,
+0xc7c,0x00b91612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x40000100,
+0xc8c,0x20200000,
+0xc90,0x00121820,
+0xc94,0x00000000,
+0xc98,0x00121820,
+0xc9c,0x00007f7f,
+0xca0,0x00000000,
+0xca4,0x00000080,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00000740,
+0xd04,0x00020401,
+0xd08,0x0000907f,
+0xd0c,0x20010201,
+0xd10,0xa0633333,
+0xd14,0x3333bc43,
+0xd18,0x7a8f5b6b,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x80608000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd4c,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x00000000,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x04518a3c,
+0xd68,0x00002101,
+0xd6c,0x2a201c16,
+0xd70,0x1812362e,
+0xd74,0x322c2220,
+0xd78,0x000e3c24,
+0xe00,0x2a2a2a2a,
+0xe04,0x2a2a2a2a,
+0xe08,0x03902a2a,
+0xe10,0x2a2a2a2a,
+0xe14,0x2a2a2a2a,
+0xe18,0x2a2a2a2a,
+0xe1c,0x2a2a2a2a,
+0xe28,0x00000000,
+0xe30,0x1000dc1f,
+0xe34,0x10008c1f,
+0xe38,0x02140102,
+0xe3c,0x681604c2,
+0xe40,0x01007c00,
+0xe44,0x01004800,
+0xe48,0xfb000000,
+0xe4c,0x000028d1,
+0xe50,0x1000dc1f,
+0xe54,0x10008c1f,
+0xe58,0x02140102,
+0xe5c,0x28160d05,
+0xe60,0x00000008,
+0xe68,0x001b25a4,
+0xe6c,0x631b25a0,
+0xe70,0x631b25a0,
+0xe74,0x081b25a0,
+0xe78,0x081b25a0,
+0xe7c,0x081b25a0,
+0xe80,0x081b25a0,
+0xe84,0x631b25a0,
+0xe88,0x081b25a0,
+0xe8c,0x631b25a0,
+0xed0,0x631b25a0,
+0xed4,0x631b25a0,
+0xed8,0x631b25a0,
+0xedc,0x001b25a0,
+0xee0,0x001b25a0,
+0xeec,0x6b1b25a0,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength] = {
+0x0, };
+
+u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength] = {
+0x0, };
+
+u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength] = {
+0x0, };
+
+u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength] = {
+0xe00,0xffffffff,0x07090c0c,
+0xe04,0xffffffff,0x01020405,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x0b0c0c0e,
+0xe14,0xffffffff,0x01030506,
+0xe18,0xffffffff,0x0b0c0d0e,
+0xe1c,0xffffffff,0x01030509,
+0x830,0xffffffff,0x07090c0c,
+0x834,0xffffffff,0x01020405,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x0b0c0d0e,
+0x848,0xffffffff,0x01030509,
+0x84c,0xffffffff,0x0b0c0d0e,
+0x868,0xffffffff,0x01030509,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x06060606,
+0xe14,0xffffffff,0x00020406,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x06060606,
+0x848,0xffffffff,0x00020406,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+};
+
+u32  Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength] = {
+0xe00,0xffffffff,0x0a0c0c0c,
+0xe04,0xffffffff,0x02040608,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x0a0c0d0e,
+0xe14,0xffffffff,0x02040608,
+0xe18,0xffffffff,0x0a0c0d0e,
+0xe1c,0xffffffff,0x02040608,
+0x830,0xffffffff,0x0a0c0c0c,
+0x834,0xffffffff,0x02040608,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x0a0c0d0e,
+0x848,0xffffffff,0x02040608,
+0x84c,0xffffffff,0x0a0c0d0e,
+0x868,0xffffffff,0x02040608,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x06060606,
+0xe14,0xffffffff,0x00020406,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x06060606,
+0x848,0xffffffff,0x00020406,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+};
+
+u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength] = {
+0xc30,0x69e9ac4a,
+0xc3c,0x0a979718,
+};
+
+u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength] = {
+0x024,0x0011800f,
+0x028,0x00ffdb83,
+0x040,0x000c0004,
+0x800,0x80040000,
+0x804,0x00000001,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10000330, //for Broadcom AP IOT
+0x814,0x020c3d10,
+0x818,0x02200385,
+0x81c,0x00000000,
+0x820,0x01000100,
+0x824,0x00390204,
+0x828,0x00000000,
+0x82c,0x00000000,
+0x830,0x00000000,
+0x834,0x00000000,
+0x838,0x00000000,
+0x83c,0x00000000,
+0x840,0x00010000,
+0x844,0x00000000,
+0x848,0x00000000,
+0x84c,0x00000000,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x569a569a,
+0x85c,0x001b25a4,
+0x860,0x66e60230,
+0x864,0x061f0130,
+0x868,0x00000000,
+0x86c,0x20202000,
+0x870,0x03000300,
+0x874,0x22004000,
+0x878,0x00000808,
+0x87c,0x00ffc3f1,
+0x880,0xc0083070,
+0x884,0x000004d5,
+0x888,0x00000000,
+0x88c,0xccc000c0,
+0x890,0x00000800,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x81121111,
+0xa00,0x00d047c8,
+0xa04,0x80ff000c,
+0xa08,0x8c838300,
+0xa0c,0x2e68120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x15160000,
+0xa24,0x070b0f12,
+0xa28,0x00000104,
+0xa2c,0x00d30000,
+0xa70,0x101fbf00,
+0xa74,0x00000007,
+0xc00,0x48071d40,
+0xc04,0x03a05611,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08800000,
+0xc1c,0x40000100,
+0xc20,0x00000000,
+0xc24,0x00000000,
+0xc28,0x00000000,
+0xc2c,0x00000000,
+0xc30,0x69e9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a97971c,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020107,
+0xc4c,0x007f037f,
+0xc50,0x6954342e,
+0xc54,0x43bc0094,
+0xc58,0x6954342f,
+0xc5c,0x433c0094,
+0xc60,0x00000000,
+0xc64,0x5116848b,
+0xc68,0x47c00bff,
+0xc6c,0x00000036,
+0xc70,0x2c46000d,
+0xc74,0x018610db,
+0xc78,0x0000001f,
+0xc7c,0x00b91612,
+0xc80,0x24000090,
+0xc84,0x20f60000,
+0xc88,0x24000090,
+0xc8c,0x20200000,
+0xc90,0x00121820,
+0xc94,0x00000000,
+0xc98,0x00121820,
+0xc9c,0x00007f7f,
+0xca0,0x00000000,
+0xca4,0x00000080,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00000740,
+0xd04,0x00020401,
+0xd08,0x0000907f,
+0xd0c,0x20010201,
+0xd10,0xa0633333,
+0xd14,0x3333bc43,
+0xd18,0x7a8f5b6b,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x80608000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd4c,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x00000000,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x04518a3c,
+0xd68,0x00002101,
+0xd6c,0x2a201c16,
+0xd70,0x1812362e,
+0xd74,0x322c2220,
+0xd78,0x000e3c24,
+0xe00,0x24242424,
+0xe04,0x24242424,
+0xe08,0x03902024,
+0xe10,0x24242424,
+0xe14,0x24242424,
+0xe18,0x24242424,
+0xe1c,0x24242424,
+0xe28,0x00000000,
+0xe30,0x1000dc1f,
+0xe34,0x10008c1f,
+0xe38,0x02140102,
+0xe3c,0x681604c2,
+0xe40,0x01007c00,
+0xe44,0x01004800,
+0xe48,0xfb000000,
+0xe4c,0x000028d1,
+0xe50,0x1000dc1f,
+0xe54,0x10008c1f,
+0xe58,0x02140102,
+0xe5c,0x28160d05,
+0xe60,0x00000008,
+0xe68,0x001b25a4,
+0xe6c,0x631b25a0,
+0xe70,0x631b25a0,
+0xe74,0x081b25a0,
+0xe78,0x081b25a0,
+0xe7c,0x081b25a0,
+0xe80,0x081b25a0,
+0xe84,0x631b25a0,
+0xe88,0x081b25a0,
+0xe8c,0x631b25a0,
+0xed0,0x631b25a0,
+0xed4,0x631b25a0,
+0xed8,0x631b25a0,
+0xedc,0x001b25a0,
+0xee0,0x001b25a0,
+0xeec,0x6b1b25a0,
+0xee8,0x31555448,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength] = {
+0x024,0x0011800d,
+0x028,0x00ffdb83,
+0x800,0x80040000,
+0x804,0x00000001,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10000330, //for Broadcom AP IOT
+0x814,0x020c3d10,
+0x818,0x02200385,
+0x81c,0x00000000,
+0x820,0x01000100,
+0x824,0x00390004,
+0x828,0x00000000,
+0x82c,0x00000000,
+0x830,0x00000000,
+0x834,0x00000000,
+0x838,0x00000000,
+0x83c,0x00000000,
+0x840,0x00010000,
+0x844,0x00000000,
+0x848,0x00000000,
+0x84c,0x00000000,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x569a569a,
+0x85c,0x001b25a4,
+0x860,0x66e60230,
+0x864,0x061f0130,
+0x868,0x00000000,
+0x86c,0x32323200,
+0x870,0x07000700,
+0x874,0x22004000,
+0x878,0x00000808,
+0x87c,0x00000000,
+0x880,0xc0083070,
+0x884,0x000004d5,
+0x888,0x00000000,
+0x88c,0xccc000c0,
+0x890,0x00000800,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x81121111,
+0xa00,0x00d047c8,
+0xa04,0x80ff000c,
+0xa08,0x8c838300,
+0xa0c,0x2e68120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x00d30000,
+0xa70,0x101fbf00,
+0xa74,0x00000007,
+0xc00,0x48071d40,
+0xc04,0x03a05611,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08800000,
+0xc1c,0x40000100,
+0xc20,0x00000000,
+0xc24,0x00000000,
+0xc28,0x00000000,
+0xc2c,0x00000000,
+0xc30,0x69e9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a97971c,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020107,
+0xc4c,0x007f037f,
+0xc50,0x69543420,
+0xc54,0x43bc0094,
+0xc58,0x69543420,
+0xc5c,0x433c0094,
+0xc60,0x00000000,
+0xc64,0x5116848b,
+0xc68,0x47c00bff,
+0xc6c,0x00000036,
+0xc70,0x2c7f000d,
+0xc74,0x018610db,
+0xc78,0x0000001f,
+0xc7c,0x00b91612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x40000100,
+0xc8c,0x20200000,
+0xc90,0x00121820,
+0xc94,0x00000000,
+0xc98,0x00121820,
+0xc9c,0x00007f7f,
+0xca0,0x00000000,
+0xca4,0x00000080,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00000740,
+0xd04,0x00020401,
+0xd08,0x0000907f,
+0xd0c,0x20010201,
+0xd10,0xa0633333,
+0xd14,0x3333bc43,
+0xd18,0x7a8f5b6b,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x80608000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd4c,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x00000000,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x04518a3c,
+0xd68,0x00002101,
+0xd6c,0x2a201c16,
+0xd70,0x1812362e,
+0xd74,0x322c2220,
+0xd78,0x000e3c24,
+0xe00,0x2a2a2a2a,
+0xe04,0x2a2a2a2a,
+0xe08,0x03902a2a,
+0xe10,0x2a2a2a2a,
+0xe14,0x2a2a2a2a,
+0xe18,0x2a2a2a2a,
+0xe1c,0x2a2a2a2a,
+0xe28,0x00000000,
+0xe30,0x1000dc1f,
+0xe34,0x10008c1f,
+0xe38,0x02140102,
+0xe3c,0x681604c2,
+0xe40,0x01007c00,
+0xe44,0x01004800,
+0xe48,0xfb000000,
+0xe4c,0x000028d1,
+0xe50,0x1000dc1f,
+0xe54,0x10008c1f,
+0xe58,0x02140102,
+0xe5c,0x28160d05,
+0xe60,0x00000008,
+0xe68,0x001b25a4,
+0xe6c,0x631b25a0,
+0xe70,0x631b25a0,
+0xe74,0x081b25a0,
+0xe78,0x081b25a0,
+0xe7c,0x081b25a0,
+0xe80,0x081b25a0,
+0xe84,0x631b25a0,
+0xe88,0x081b25a0,
+0xe8c,0x631b25a0,
+0xed0,0x631b25a0,
+0xed4,0x631b25a0,
+0xed8,0x631b25a0,
+0xedc,0x001b25a0,
+0xee0,0x001b25a0,
+0xeec,0x6b1b25a0,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength] = {
+0x024,0x0011800d,
+0x028,0x00ffdb83,
+0x800,0x80040002,
+0x804,0x00000003,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10000330, //for Broadcom AP IOT
+0x814,0x020c3d10,
+0x818,0x02200385,
+0x81c,0x00000000,
+0x820,0x01000100,
+0x824,0x00390004,
+0x828,0x01000100,
+0x82c,0x00390004,
+0x830,0x27272727,
+0x834,0x27272727,
+0x838,0x27272727,
+0x83c,0x27272727,
+0x840,0x00010000,
+0x844,0x00010000,
+0x848,0x27272727,
+0x84c,0x27272727,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x569a569a,
+0x85c,0x0c1b25a4,
+0x860,0x66e60230,
+0x864,0x061f0130,
+0x868,0x27272727,
+0x86c,0x2b2b2b27,
+0x870,0x07000700,
+0x874,0x22184000,
+0x878,0x08080808,
+0x87c,0x00000000,
+0x880,0xc0083070,
+0x884,0x000004d5,
+0x888,0x00000000,
+0x88c,0xcc0000c0,
+0x890,0x00000800,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x81121313,
+0xa00,0x00d047c8,
+0xa04,0x80ff000c,
+0xa08,0x8c838300,
+0xa0c,0x2e68120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x00d30000,
+0xa70,0x101fbf00,
+0xa74,0x00000007,
+0xc00,0x48071d40,
+0xc04,0x03a05633,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08800000,
+0xc1c,0x40000100,
+0xc20,0x00000000,
+0xc24,0x00000000,
+0xc28,0x00000000,
+0xc2c,0x00000000,
+0xc30,0x69e9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a97971c,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020107,
+0xc4c,0x007f037f,
+0xc50,0x69543420,
+0xc54,0x43bc0094,
+0xc58,0x69543420,
+0xc5c,0x433c0094,
+0xc60,0x00000000,
+0xc64,0x5116848b,
+0xc68,0x47c00bff,
+0xc6c,0x00000036,
+0xc70,0x2c7f000d,
+0xc74,0x218610db,
+0xc78,0x0000001f,
+0xc7c,0x00b91612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x40000100,
+0xc8c,0xa0e40000,
+0xc90,0x00121820,
+0xc94,0x00000000,
+0xc98,0x00121820,
+0xc9c,0x00007f7f,
+0xca0,0x00000000,
+0xca4,0x00000080,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00080740,
+0xd04,0x00020403,
+0xd08,0x0000907f,
+0xd0c,0x20010201,
+0xd10,0xa0633333,
+0xd14,0x3333bc43,
+0xd18,0x7a8f5b6b,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x80608000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd4c,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x00000000,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x04518a3c,
+0xd68,0x00002101,
+0xd6c,0x2a201c16,
+0xd70,0x1812362e,
+0xd74,0x322c2220,
+0xd78,0x000e3c24,
+0xe00,0x2a2a2a2a,
+0xe04,0x2a2a2a2a,
+0xe08,0x03902a2a,
+0xe10,0x2a2a2a2a,
+0xe14,0x2a2a2a2a,
+0xe18,0x2a2a2a2a,
+0xe1c,0x2a2a2a2a,
+0xe28,0x00000000,
+0xe30,0x1000dc1f,
+0xe34,0x10008c1f,
+0xe38,0x02140102,
+0xe3c,0x681604c2,
+0xe40,0x01007c00,
+0xe44,0x01004800,
+0xe48,0xfb000000,
+0xe4c,0x000028d1,
+0xe50,0x1000dc1f,
+0xe54,0x10008c1f,
+0xe58,0x02140102,
+0xe5c,0x28160d05,
+0xe60,0x00000010,
+0xe68,0x001b25a4,
+0xe6c,0x63db25a4,
+0xe70,0x63db25a4,
+0xe74,0x0c1b25a4,
+0xe78,0x0c1b25a4,
+0xe7c,0x0c1b25a4,
+0xe80,0x0c1b25a4,
+0xe84,0x63db25a4,
+0xe88,0x0c1b25a4,
+0xe8c,0x63db25a4,
+0xed0,0x63db25a4,
+0xed4,0x63db25a4,
+0xed8,0x63db25a4,
+0xedc,0x001b25a4,
+0xee0,0x001b25a4,
+0xeec,0x6fdb25a4,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength] = {
+0xe00,0xffffffff,0x06080808,
+0xe04,0xffffffff,0x00040406,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x04060608,
+0xe14,0xffffffff,0x00020204,
+0xe18,0xffffffff,0x04060608,
+0xe1c,0xffffffff,0x00020204,
+0x830,0xffffffff,0x06080808,
+0x834,0xffffffff,0x00040406,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x04060608,
+0x848,0xffffffff,0x00020204,
+0x84c,0xffffffff,0x04060608,
+0x868,0xffffffff,0x00020204,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+};
+
+u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength] = {
+0x000,0x00030159,
+0x001,0x00031284,
+0x002,0x00098000,
+0x003,0x00018c63,
+0x004,0x000210e7,
+0x009,0x0002044f,
+0x00a,0x0001adb1,
+0x00b,0x00054867,
+0x00c,0x0008992e,
+0x00d,0x0000e52c,
+0x00e,0x00039ce7,
+0x00f,0x00000451,
+0x019,0x00000000,
+0x01a,0x00010255,
+0x01b,0x00060a00,
+0x01c,0x000fc378,
+0x01d,0x000a1250,
+0x01e,0x0004445f,
+0x01f,0x00080001,
+0x020,0x0000b614,
+0x021,0x0006c000,
+0x022,0x00000000,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00000483,
+0x026,0x0004f000,
+0x027,0x000ec7d9,
+0x028,0x000577c0,
+0x029,0x00004783,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x00000054,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000808,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x0000060a,
+0x02b,0x0004b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000060a,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066666,
+0x02c,0x0000001a,
+0x02a,0x000e0000,
+0x010,0x0004000f,
+0x011,0x000e31fc,
+0x010,0x0006000f,
+0x011,0x000ff9f8,
+0x010,0x0002000f,
+0x011,0x000203f9,
+0x010,0x0003000f,
+0x011,0x000ff500,
+0x010,0x00000000,
+0x011,0x00000000,
+0x010,0x0008000f,
+0x011,0x0003f100,
+0x010,0x0009000f,
+0x011,0x00023100,
+0x012,0x00032000,
+0x012,0x00071000,
+0x012,0x000b0000,
+0x012,0x000fc000,
+0x013,0x000287b3,
+0x013,0x000244b7,
+0x013,0x000204ab,
+0x013,0x0001c49f,
+0x013,0x00018493,
+0x013,0x0001429b,
+0x013,0x00010299,
+0x013,0x0000c29c,
+0x013,0x000081a0,
+0x013,0x000040ac,
+0x013,0x00000020,
+0x014,0x0001944c,
+0x014,0x00059444,
+0x014,0x0009944c,
+0x014,0x000d9444,
+0x015,0x0000f424,
+0x015,0x0004f424,
+0x015,0x0008f424,
+0x015,0x000cf424,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00044457,
+0x01f,0x00080000,
+0x000,0x00030159,
+};
+
+u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength] = {
+0x000,0x00030159,
+0x001,0x00031284,
+0x002,0x00098000,
+0x003,0x00018c63,
+0x004,0x000210e7,
+0x009,0x0002044f,
+0x00a,0x0001adb1,
+0x00b,0x00054867,
+0x00c,0x0008992e,
+0x00d,0x0000e52c,
+0x00e,0x00039ce7,
+0x00f,0x00000451,
+0x012,0x00032000,
+0x012,0x00071000,
+0x012,0x000b0000,
+0x012,0x000fc000,
+0x013,0x000287af,
+0x013,0x000244b7,
+0x013,0x000204ab,
+0x013,0x0001c49f,
+0x013,0x00018493,
+0x013,0x00014297,
+0x013,0x00010295,
+0x013,0x0000c298,
+0x013,0x0000819c,
+0x013,0x000040a8,
+0x013,0x0000001c,
+0x014,0x0001944c,
+0x014,0x00059444,
+0x014,0x0009944c,
+0x014,0x000d9444,
+0x015,0x0000f424,
+0x015,0x0004f424,
+0x015,0x0008f424,
+0x015,0x000cf424,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+};
+
+u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength] = {
+0x000,0x00030159,
+0x001,0x00031284,
+0x002,0x00098000,
+0x003,0x00018c63,
+0x004,0x000210e7,
+0x009,0x0002044f,
+0x00a,0x0001adb1,
+0x00b,0x00054867,
+0x00c,0x0008992e,
+0x00d,0x0000e52c,
+0x00e,0x00039ce7,
+0x00f,0x00000451,
+0x019,0x00000000,
+0x01a,0x00010255,
+0x01b,0x00060a00,
+0x01c,0x000fc378,
+0x01d,0x000a1250,
+0x01e,0x0004445f,
+0x01f,0x00080001,
+0x020,0x0000b614,
+0x021,0x0006c000,
+0x022,0x00000000,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00000483,
+0x026,0x0004f000,
+0x027,0x000ec7d9,
+0x028,0x000577c0,
+0x029,0x00004783,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x00000054,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000808,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x0000060a,
+0x02b,0x0004b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000060a,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066666,
+0x02c,0x0000001a,
+0x02a,0x000e0000,
+0x010,0x0004000f,
+0x011,0x000e31fc,
+0x010,0x0006000f,
+0x011,0x000ff9f8,
+0x010,0x0002000f,
+0x011,0x000203f9,
+0x010,0x0003000f,
+0x011,0x000ff500,
+0x010,0x00000000,
+0x011,0x00000000,
+0x010,0x0008000f,
+0x011,0x0003f100,
+0x010,0x0009000f,
+0x011,0x00023100,
+0x012,0x00032000,
+0x012,0x00071000,
+0x012,0x000b0000,
+0x012,0x000fc000,
+0x013,0x000287b3,
+0x013,0x000244b7,
+0x013,0x000204ab,
+0x013,0x0001c49f,
+0x013,0x00018493,
+0x013,0x0001429b,
+0x013,0x00010299,
+0x013,0x0000c29c,
+0x013,0x000081a0,
+0x013,0x000040ac,
+0x013,0x00000020,
+0x014,0x0001944c,
+0x014,0x00059444,
+0x014,0x0009944c,
+0x014,0x000d9444,
+0x015,0x0000f405,
+0x015,0x0004f405,
+0x015,0x0008f405,
+0x015,0x000cf405,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00044457,
+0x01f,0x00080000,
+0x000,0x00030159,
+};
+
+u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength] = {
+0x0, };
+
+
+u32 Rtl8192CURadioA_2T_mCardArray[RadioA_2T_mCardArrayLength] = {
+0x000,0x00030159,
+0x001,0x00031284,
+0x002,0x00098000,
+0x003,0x00018c63,
+0x004,0x000210e7,
+0x009,0x0002044f,
+0x00a,0x0001adb1,
+0x00b,0x00054867,
+0x00c,0x0008992e,
+0x00d,0x0000e52c,
+0x00e,0x00039ce7,
+0x00f,0x00000451,
+0x019,0x00000000,
+0x01a,0x00010255,
+0x01b,0x00060a00,
+0x01c,0x000fc378,
+0x01d,0x000a1250,
+0x01e,0x0004445f,
+0x01f,0x00080001,
+0x020,0x0000b614,
+0x021,0x0006c000,
+0x022,0x00000000,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00000483,
+0x026,0x0004f000,
+0x027,0x000ec7d9,
+0x028,0x000577c0,
+0x029,0x00004783,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x00000054,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000808,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x0000060a,
+0x02b,0x0004b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000060a,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066666,
+0x02c,0x0000001a,
+0x02a,0x000e0000,
+0x010,0x0004000f,
+0x011,0x000e31fc,
+0x010,0x0006000f,
+0x011,0x000ff9f8,
+0x010,0x0002000f,
+0x011,0x000203f9,
+0x010,0x0003000f,
+0x011,0x000ff500,
+0x010,0x00000000,
+0x011,0x00000000,
+0x010,0x0008000f,
+0x011,0x0003f100,
+0x010,0x0009000f,
+0x011,0x00023100,
+0x012,0x00032000,
+0x012,0x00071000,
+0x012,0x000b0000,
+0x012,0x000fc000,
+0x013,0x000287b3,
+0x013,0x000244b7,
+0x013,0x000204ab,
+0x013,0x0001c49f,
+0x013,0x00018493,
+0x013,0x0001429b,
+0x013,0x00010299,
+0x013,0x0000c29c,
+0x013,0x000081a0,
+0x013,0x000040ac,
+0x013,0x00000020,
+0x014,0x0001944c,
+0x014,0x00059444,
+0x014,0x0009944c,
+0x014,0x000d9444,
+0x015,0x0000f424,
+0x015,0x0004f424,
+0x015,0x0008f424,
+0x015,0x000cf424,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00044457,
+0x01f,0x00080000,
+0x000,0x00030159,
+};
+
+u32 Rtl8192CURadioB_2T_mCardArray[RadioB_2T_mCardArrayLength] = {
+0x000,0x00030159,
+0x001,0x00031284,
+0x002,0x00098000,
+0x003,0x00018c63,
+0x004,0x000210e7,
+0x009,0x0002044f,
+0x00a,0x0001adb1,
+0x00b,0x00054867,
+0x00c,0x0008992e,
+0x00d,0x0000e52c,
+0x00e,0x00039ce7,
+0x00f,0x00000451,
+0x012,0x00032000,
+0x012,0x00071000,
+0x012,0x000b0000,
+0x012,0x000fc000,
+0x013,0x000287af,
+0x013,0x000244b7,
+0x013,0x000204ab,
+0x013,0x0001c49f,
+0x013,0x00018493,
+0x013,0x00014297,
+0x013,0x00010295,
+0x013,0x0000c298,
+0x013,0x0000819c,
+0x013,0x000040a8,
+0x013,0x0000001c,
+0x014,0x0001944c,
+0x014,0x00059444,
+0x014,0x0009944c,
+0x014,0x000d9444,
+0x015,0x0000f424,
+0x015,0x0004f424,
+0x015,0x0008f424,
+0x015,0x000cf424,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+};
+
+u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength] = {
+0x000,0x00030159,
+0x001,0x00031284,
+0x002,0x00098000,
+0x003,0x00018c63,
+0x004,0x000210e7,
+0x009,0x0002044f,
+0x00a,0x0001adb1,
+0x00b,0x00054867,
+0x00c,0x0008992e,
+0x00d,0x0000e52c,
+0x00e,0x00039ce7,
+0x00f,0x00000451,
+0x019,0x00000000,
+0x01a,0x00010255,
+0x01b,0x00060a00,
+0x01c,0x000fc378,
+0x01d,0x000a1250,
+0x01e,0x0004445f,
+0x01f,0x00080001,
+0x020,0x0000b614,
+0x021,0x0006c000,
+0x022,0x00000000,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00000483,
+0x026,0x0004f200,
+0x027,0x000ec7d9,
+0x028,0x000577c0,
+0x029,0x00004783,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x00000054,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000808,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x0000060a,
+0x02b,0x0004b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000060a,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066666,
+0x02c,0x0000001a,
+0x02a,0x000e0000,
+0x010,0x0004000f,
+0x011,0x000e31fc,
+0x010,0x0006000f,
+0x011,0x000ff9f8,
+0x010,0x0002000f,
+0x011,0x000203f9,
+0x010,0x0003000f,
+0x011,0x000ff500,
+0x010,0x00000000,
+0x011,0x00000000,
+0x010,0x0008000f,
+0x011,0x0003f100,
+0x010,0x0009000f,
+0x011,0x00023100,
+0x012,0x00032000,
+0x012,0x00071000,
+0x012,0x000b0000,
+0x012,0x000fc000,
+0x013,0x000287b3,
+0x013,0x000244b7,
+0x013,0x000204ab,
+0x013,0x0001c49f,
+0x013,0x00018493,
+0x013,0x0001429b,
+0x013,0x00010299,
+0x013,0x0000c29c,
+0x013,0x000081a0,
+0x013,0x000040ac,
+0x013,0x00000020,
+0x014,0x0001944c,
+0x014,0x00059444,
+0x014,0x0009944c,
+0x014,0x000d9444,
+0x015,0x0000f424,
+0x015,0x0004f424,
+0x015,0x0008f424,
+0x015,0x000cf424,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00044457,
+0x01f,0x00080000,
+0x000,0x00030159,
+};
+
+u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength] = {
+0x0, };
+
+u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength] = {
+0x000,0x00030159,
+0x001,0x00031284,
+0x002,0x00098000,
+0x003,0x00018c63,
+0x004,0x000210e7,
+0x009,0x0002044f,
+0x00a,0x0001adb0,
+0x00b,0x00054867,
+0x00c,0x0008992e,
+0x00d,0x0000e529,
+0x00e,0x00039ce7,
+0x00f,0x00000451,
+0x019,0x00000000,
+0x01a,0x00000255,
+0x01b,0x00060a00,
+0x01c,0x000fc378,
+0x01d,0x000a1250,
+0x01e,0x0004445f,
+0x01f,0x00080001,
+0x020,0x0000b614,
+0x021,0x0006c000,
+0x022,0x0000083c,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00000483,
+0x026,0x0004f000,
+0x027,0x000ec7d9,
+0x028,0x000977c0,
+0x029,0x00004783,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x00000054,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000808,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x0000060a,
+0x02b,0x0004b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000060a,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066666,
+0x02c,0x0000001a,
+0x02a,0x000e0000,
+0x010,0x0004000f,
+0x011,0x000e31fc,
+0x010,0x0006000f,
+0x011,0x000ff9f8,
+0x010,0x0002000f,
+0x011,0x000203f9,
+0x010,0x0003000f,
+0x011,0x000ff500,
+0x010,0x00000000,
+0x011,0x00000000,
+0x010,0x0008000f,
+0x011,0x0003f100,
+0x010,0x0009000f,
+0x011,0x00023100,
+0x012,0x000d8000,
+0x012,0x00090000,
+0x012,0x00051000,
+0x012,0x00012000,
+0x013,0x00028fb4,
+0x013,0x00024fa8,
+0x013,0x000207a4,
+0x013,0x0001c3b0,
+0x013,0x000183a4,
+0x013,0x00014398,
+0x013,0x000101a4,
+0x013,0x0000c198,
+0x013,0x000080a4,
+0x013,0x00004098,
+0x013,0x00000000,
+0x014,0x0001944c,
+0x014,0x00059444,
+0x014,0x0009944c,
+0x014,0x000d9444,
+0x015,0x0000f405,
+0x015,0x0004f405,
+0x015,0x0008f405,
+0x015,0x000cf405,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00044457,
+0x01f,0x00080000,
+0x000,0x00030159,
+};
+
+u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength] = {
+0x0, };
+
+// MAC reg V14 - 2011-11-23
+u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength] = {
+0x420,0x00000080,
+0x423,0x00000000,
+0x430,0x00000000,
+0x431,0x00000000,
+0x432,0x00000000,
+0x433,0x00000001,
+0x434,0x00000004,
+0x435,0x00000005,
+0x436,0x00000006,
+0x437,0x00000007,
+0x438,0x00000000,
+0x439,0x00000000,
+0x43a,0x00000000,
+0x43b,0x00000001,
+0x43c,0x00000004,
+0x43d,0x00000005,
+0x43e,0x00000006,
+0x43f,0x00000007,
+0x440,0x0000005d,
+0x441,0x00000001,
+0x442,0x00000000,
+0x444,0x00000015,
+0x445,0x000000f0,
+0x446,0x0000000f,
+0x447,0x00000000,
+0x458,0x00000041,
+0x459,0x000000a8,
+0x45a,0x00000072,
+0x45b,0x000000b9,
+0x460,0x00000066,
+0x461,0x00000066,
+0x462,0x00000008,
+0x463,0x00000003,
+0x4c8,0x000000ff,
+0x4c9,0x00000008,
+0x4cc,0x000000ff,
+0x4cd,0x000000ff,
+0x4ce,0x00000001,
+0x500,0x00000026,
+0x501,0x000000a2,
+0x502,0x0000002f,
+0x503,0x00000000,
+0x504,0x00000028,
+0x505,0x000000a3,
+0x506,0x0000005e,
+0x507,0x00000000,
+0x508,0x0000002b,
+0x509,0x000000a4,
+0x50a,0x0000005e,
+0x50b,0x00000000,
+0x50c,0x0000004f,
+0x50d,0x000000a4,
+0x50e,0x00000000,
+0x50f,0x00000000,
+0x512,0x0000001c,
+0x514,0x0000000a,
+0x515,0x00000010,
+0x516,0x0000000a,
+0x517,0x00000010,
+0x51a,0x00000016,
+0x524,0x0000000f,
+0x525,0x0000004f,
+0x546,0x00000040,
+0x547,0x00000000,
+0x550,0x00000010,
+0x551,0x00000010,
+0x559,0x00000002,
+0x55a,0x00000002,
+0x55d,0x000000ff,
+0x605,0x00000030,
+0x608,0x0000000e,
+0x609,0x0000002a,
+0x652,0x00000020,
+0x652,0x00000020,
+0x63c,0x00000008,
+0x63d,0x00000008,
+0x63e,0x0000000c,
+0x63f,0x0000000c,
+0x66e,0x00000005,
+0x700,0x00000021,
+0x701,0x00000043,
+0x702,0x00000065,
+0x703,0x00000087,
+0x708,0x00000021,
+0x709,0x00000043,
+0x70a,0x00000065,
+0x70b,0x00000087,
+};
+
+u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength] = {
+0x0, };
+
+u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength] = {
+0xc78,0x7b000001,
+0xc78,0x7b010001,
+0xc78,0x7b020001,
+0xc78,0x7b030001,
+0xc78,0x7b040001,
+0xc78,0x7b050001,
+0xc78,0x7a060001,
+0xc78,0x79070001,
+0xc78,0x78080001,
+0xc78,0x77090001,
+0xc78,0x760a0001,
+0xc78,0x750b0001,
+0xc78,0x740c0001,
+0xc78,0x730d0001,
+0xc78,0x720e0001,
+0xc78,0x710f0001,
+0xc78,0x70100001,
+0xc78,0x6f110001,
+0xc78,0x6e120001,
+0xc78,0x6d130001,
+0xc78,0x6c140001,
+0xc78,0x6b150001,
+0xc78,0x6a160001,
+0xc78,0x69170001,
+0xc78,0x68180001,
+0xc78,0x67190001,
+0xc78,0x661a0001,
+0xc78,0x651b0001,
+0xc78,0x641c0001,
+0xc78,0x631d0001,
+0xc78,0x621e0001,
+0xc78,0x611f0001,
+0xc78,0x60200001,
+0xc78,0x49210001,
+0xc78,0x48220001,
+0xc78,0x47230001,
+0xc78,0x46240001,
+0xc78,0x45250001,
+0xc78,0x44260001,
+0xc78,0x43270001,
+0xc78,0x42280001,
+0xc78,0x41290001,
+0xc78,0x402a0001,
+0xc78,0x262b0001,
+0xc78,0x252c0001,
+0xc78,0x242d0001,
+0xc78,0x232e0001,
+0xc78,0x222f0001,
+0xc78,0x21300001,
+0xc78,0x20310001,
+0xc78,0x06320001,
+0xc78,0x05330001,
+0xc78,0x04340001,
+0xc78,0x03350001,
+0xc78,0x02360001,
+0xc78,0x01370001,
+0xc78,0x00380001,
+0xc78,0x00390001,
+0xc78,0x003a0001,
+0xc78,0x003b0001,
+0xc78,0x003c0001,
+0xc78,0x003d0001,
+0xc78,0x003e0001,
+0xc78,0x003f0001,
+0xc78,0x7b400001,
+0xc78,0x7b410001,
+0xc78,0x7b420001,
+0xc78,0x7b430001,
+0xc78,0x7b440001,
+0xc78,0x7b450001,
+0xc78,0x7a460001,
+0xc78,0x79470001,
+0xc78,0x78480001,
+0xc78,0x77490001,
+0xc78,0x764a0001,
+0xc78,0x754b0001,
+0xc78,0x744c0001,
+0xc78,0x734d0001,
+0xc78,0x724e0001,
+0xc78,0x714f0001,
+0xc78,0x70500001,
+0xc78,0x6f510001,
+0xc78,0x6e520001,
+0xc78,0x6d530001,
+0xc78,0x6c540001,
+0xc78,0x6b550001,
+0xc78,0x6a560001,
+0xc78,0x69570001,
+0xc78,0x68580001,
+0xc78,0x67590001,
+0xc78,0x665a0001,
+0xc78,0x655b0001,
+0xc78,0x645c0001,
+0xc78,0x635d0001,
+0xc78,0x625e0001,
+0xc78,0x615f0001,
+0xc78,0x60600001,
+0xc78,0x49610001,
+0xc78,0x48620001,
+0xc78,0x47630001,
+0xc78,0x46640001,
+0xc78,0x45650001,
+0xc78,0x44660001,
+0xc78,0x43670001,
+0xc78,0x42680001,
+0xc78,0x41690001,
+0xc78,0x406a0001,
+0xc78,0x266b0001,
+0xc78,0x256c0001,
+0xc78,0x246d0001,
+0xc78,0x236e0001,
+0xc78,0x226f0001,
+0xc78,0x21700001,
+0xc78,0x20710001,
+0xc78,0x06720001,
+0xc78,0x05730001,
+0xc78,0x04740001,
+0xc78,0x03750001,
+0xc78,0x02760001,
+0xc78,0x01770001,
+0xc78,0x00780001,
+0xc78,0x00790001,
+0xc78,0x007a0001,
+0xc78,0x007b0001,
+0xc78,0x007c0001,
+0xc78,0x007d0001,
+0xc78,0x007e0001,
+0xc78,0x007f0001,
+0xc78,0x3800001e,
+0xc78,0x3801001e,
+0xc78,0x3802001e,
+0xc78,0x3803001e,
+0xc78,0x3804001e,
+0xc78,0x3805001e,
+0xc78,0x3806001e,
+0xc78,0x3807001e,
+0xc78,0x3808001e,
+0xc78,0x3c09001e,
+0xc78,0x3e0a001e,
+0xc78,0x400b001e,
+0xc78,0x440c001e,
+0xc78,0x480d001e,
+0xc78,0x4c0e001e,
+0xc78,0x500f001e,
+0xc78,0x5210001e,
+0xc78,0x5611001e,
+0xc78,0x5a12001e,
+0xc78,0x5e13001e,
+0xc78,0x6014001e,
+0xc78,0x6015001e,
+0xc78,0x6016001e,
+0xc78,0x6217001e,
+0xc78,0x6218001e,
+0xc78,0x6219001e,
+0xc78,0x621a001e,
+0xc78,0x621b001e,
+0xc78,0x621c001e,
+0xc78,0x621d001e,
+0xc78,0x621e001e,
+0xc78,0x621f001e,
+};
+
+u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength] = {
+0xc78,0x7b000001,
+0xc78,0x7b010001,
+0xc78,0x7b020001,
+0xc78,0x7b030001,
+0xc78,0x7b040001,
+0xc78,0x7b050001,
+0xc78,0x7a060001,
+0xc78,0x79070001,
+0xc78,0x78080001,
+0xc78,0x77090001,
+0xc78,0x760a0001,
+0xc78,0x750b0001,
+0xc78,0x740c0001,
+0xc78,0x730d0001,
+0xc78,0x720e0001,
+0xc78,0x710f0001,
+0xc78,0x70100001,
+0xc78,0x6f110001,
+0xc78,0x6e120001,
+0xc78,0x6d130001,
+0xc78,0x6c140001,
+0xc78,0x6b150001,
+0xc78,0x6a160001,
+0xc78,0x69170001,
+0xc78,0x68180001,
+0xc78,0x67190001,
+0xc78,0x661a0001,
+0xc78,0x651b0001,
+0xc78,0x641c0001,
+0xc78,0x631d0001,
+0xc78,0x621e0001,
+0xc78,0x611f0001,
+0xc78,0x60200001,
+0xc78,0x49210001,
+0xc78,0x48220001,
+0xc78,0x47230001,
+0xc78,0x46240001,
+0xc78,0x45250001,
+0xc78,0x44260001,
+0xc78,0x43270001,
+0xc78,0x42280001,
+0xc78,0x41290001,
+0xc78,0x402a0001,
+0xc78,0x262b0001,
+0xc78,0x252c0001,
+0xc78,0x242d0001,
+0xc78,0x232e0001,
+0xc78,0x222f0001,
+0xc78,0x21300001,
+0xc78,0x20310001,
+0xc78,0x06320001,
+0xc78,0x05330001,
+0xc78,0x04340001,
+0xc78,0x03350001,
+0xc78,0x02360001,
+0xc78,0x01370001,
+0xc78,0x00380001,
+0xc78,0x00390001,
+0xc78,0x003a0001,
+0xc78,0x003b0001,
+0xc78,0x003c0001,
+0xc78,0x003d0001,
+0xc78,0x003e0001,
+0xc78,0x003f0001,
+0xc78,0x7b400001,
+0xc78,0x7b410001,
+0xc78,0x7b420001,
+0xc78,0x7b430001,
+0xc78,0x7b440001,
+0xc78,0x7b450001,
+0xc78,0x7a460001,
+0xc78,0x79470001,
+0xc78,0x78480001,
+0xc78,0x77490001,
+0xc78,0x764a0001,
+0xc78,0x754b0001,
+0xc78,0x744c0001,
+0xc78,0x734d0001,
+0xc78,0x724e0001,
+0xc78,0x714f0001,
+0xc78,0x70500001,
+0xc78,0x6f510001,
+0xc78,0x6e520001,
+0xc78,0x6d530001,
+0xc78,0x6c540001,
+0xc78,0x6b550001,
+0xc78,0x6a560001,
+0xc78,0x69570001,
+0xc78,0x68580001,
+0xc78,0x67590001,
+0xc78,0x665a0001,
+0xc78,0x655b0001,
+0xc78,0x645c0001,
+0xc78,0x635d0001,
+0xc78,0x625e0001,
+0xc78,0x615f0001,
+0xc78,0x60600001,
+0xc78,0x49610001,
+0xc78,0x48620001,
+0xc78,0x47630001,
+0xc78,0x46640001,
+0xc78,0x45650001,
+0xc78,0x44660001,
+0xc78,0x43670001,
+0xc78,0x42680001,
+0xc78,0x41690001,
+0xc78,0x406a0001,
+0xc78,0x266b0001,
+0xc78,0x256c0001,
+0xc78,0x246d0001,
+0xc78,0x236e0001,
+0xc78,0x226f0001,
+0xc78,0x21700001,
+0xc78,0x20710001,
+0xc78,0x06720001,
+0xc78,0x05730001,
+0xc78,0x04740001,
+0xc78,0x03750001,
+0xc78,0x02760001,
+0xc78,0x01770001,
+0xc78,0x00780001,
+0xc78,0x00790001,
+0xc78,0x007a0001,
+0xc78,0x007b0001,
+0xc78,0x007c0001,
+0xc78,0x007d0001,
+0xc78,0x007e0001,
+0xc78,0x007f0001,
+0xc78,0x3800001e,
+0xc78,0x3801001e,
+0xc78,0x3802001e,
+0xc78,0x3803001e,
+0xc78,0x3804001e,
+0xc78,0x3805001e,
+0xc78,0x3806001e,
+0xc78,0x3807001e,
+0xc78,0x3808001e,
+0xc78,0x3c09001e,
+0xc78,0x3e0a001e,
+0xc78,0x400b001e,
+0xc78,0x440c001e,
+0xc78,0x480d001e,
+0xc78,0x4c0e001e,
+0xc78,0x500f001e,
+0xc78,0x5210001e,
+0xc78,0x5611001e,
+0xc78,0x5a12001e,
+0xc78,0x5e13001e,
+0xc78,0x6014001e,
+0xc78,0x6015001e,
+0xc78,0x6016001e,
+0xc78,0x6217001e,
+0xc78,0x6218001e,
+0xc78,0x6219001e,
+0xc78,0x621a001e,
+0xc78,0x621b001e,
+0xc78,0x621c001e,
+0xc78,0x621d001e,
+0xc78,0x621e001e,
+0xc78,0x621f001e,
+};
+
+u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength] = {
+0xc78,0x7b000001,
+0xc78,0x7b010001,
+0xc78,0x7b020001,
+0xc78,0x7b030001,
+0xc78,0x7b040001,
+0xc78,0x7b050001,
+0xc78,0x7b060001,
+0xc78,0x7b070001,
+0xc78,0x7b080001,
+0xc78,0x7a090001,
+0xc78,0x790a0001,
+0xc78,0x780b0001,
+0xc78,0x770c0001,
+0xc78,0x760d0001,
+0xc78,0x750e0001,
+0xc78,0x740f0001,
+0xc78,0x73100001,
+0xc78,0x72110001,
+0xc78,0x71120001,
+0xc78,0x70130001,
+0xc78,0x6f140001,
+0xc78,0x6e150001,
+0xc78,0x6d160001,
+0xc78,0x6c170001,
+0xc78,0x6b180001,
+0xc78,0x6a190001,
+0xc78,0x691a0001,
+0xc78,0x681b0001,
+0xc78,0x671c0001,
+0xc78,0x661d0001,
+0xc78,0x651e0001,
+0xc78,0x641f0001,
+0xc78,0x63200001,
+0xc78,0x62210001,
+0xc78,0x61220001,
+0xc78,0x60230001,
+0xc78,0x46240001,
+0xc78,0x45250001,
+0xc78,0x44260001,
+0xc78,0x43270001,
+0xc78,0x42280001,
+0xc78,0x41290001,
+0xc78,0x402a0001,
+0xc78,0x262b0001,
+0xc78,0x252c0001,
+0xc78,0x242d0001,
+0xc78,0x232e0001,
+0xc78,0x222f0001,
+0xc78,0x21300001,
+0xc78,0x20310001,
+0xc78,0x06320001,
+0xc78,0x05330001,
+0xc78,0x04340001,
+0xc78,0x03350001,
+0xc78,0x02360001,
+0xc78,0x01370001,
+0xc78,0x00380001,
+0xc78,0x00390001,
+0xc78,0x003a0001,
+0xc78,0x003b0001,
+0xc78,0x003c0001,
+0xc78,0x003d0001,
+0xc78,0x003e0001,
+0xc78,0x003f0001,
+0xc78,0x7b400001,
+0xc78,0x7b410001,
+0xc78,0x7b420001,
+0xc78,0x7b430001,
+0xc78,0x7b440001,
+0xc78,0x7b450001,
+0xc78,0x7b460001,
+0xc78,0x7b470001,
+0xc78,0x7b480001,
+0xc78,0x7a490001,
+0xc78,0x794a0001,
+0xc78,0x784b0001,
+0xc78,0x774c0001,
+0xc78,0x764d0001,
+0xc78,0x754e0001,
+0xc78,0x744f0001,
+0xc78,0x73500001,
+0xc78,0x72510001,
+0xc78,0x71520001,
+0xc78,0x70530001,
+0xc78,0x6f540001,
+0xc78,0x6e550001,
+0xc78,0x6d560001,
+0xc78,0x6c570001,
+0xc78,0x6b580001,
+0xc78,0x6a590001,
+0xc78,0x695a0001,
+0xc78,0x685b0001,
+0xc78,0x675c0001,
+0xc78,0x665d0001,
+0xc78,0x655e0001,
+0xc78,0x645f0001,
+0xc78,0x63600001,
+0xc78,0x62610001,
+0xc78,0x61620001,
+0xc78,0x60630001,
+0xc78,0x46640001,
+0xc78,0x45650001,
+0xc78,0x44660001,
+0xc78,0x43670001,
+0xc78,0x42680001,
+0xc78,0x41690001,
+0xc78,0x406a0001,
+0xc78,0x266b0001,
+0xc78,0x256c0001,
+0xc78,0x246d0001,
+0xc78,0x236e0001,
+0xc78,0x226f0001,
+0xc78,0x21700001,
+0xc78,0x20710001,
+0xc78,0x06720001,
+0xc78,0x05730001,
+0xc78,0x04740001,
+0xc78,0x03750001,
+0xc78,0x02760001,
+0xc78,0x01770001,
+0xc78,0x00780001,
+0xc78,0x00790001,
+0xc78,0x007a0001,
+0xc78,0x007b0001,
+0xc78,0x007c0001,
+0xc78,0x007d0001,
+0xc78,0x007e0001,
+0xc78,0x007f0001,
+0xc78,0x3800001e,
+0xc78,0x3801001e,
+0xc78,0x3802001e,
+0xc78,0x3803001e,
+0xc78,0x3804001e,
+0xc78,0x3805001e,
+0xc78,0x3806001e,
+0xc78,0x3807001e,
+0xc78,0x3808001e,
+0xc78,0x3c09001e,
+0xc78,0x3e0a001e,
+0xc78,0x400b001e,
+0xc78,0x440c001e,
+0xc78,0x480d001e,
+0xc78,0x4c0e001e,
+0xc78,0x500f001e,
+0xc78,0x5210001e,
+0xc78,0x5611001e,
+0xc78,0x5a12001e,
+0xc78,0x5e13001e,
+0xc78,0x6014001e,
+0xc78,0x6015001e,
+0xc78,0x6016001e,
+0xc78,0x6217001e,
+0xc78,0x6218001e,
+0xc78,0x6219001e,
+0xc78,0x621a001e,
+0xc78,0x621b001e,
+0xc78,0x621c001e,
+0xc78,0x621d001e,
+0xc78,0x621e001e,
+0xc78,0x621f001e,
+};
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c
new file mode 100755
index 00000000..66970f1c
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c
@@ -0,0 +1,2564 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/*Created on  2011/11/ 8, 14:15*/
+
+#include <basic_types.h>
+#include "Hal8192CUHWImg_wowlan.h"
+
+
+u8 Rtl8192CUFwTSMCWWImgArray[TSMCWWImgArrayLength] = {
+0xc1,0x88,0x02,0x00,0x51,0x00,0x00,0x00,0x03,0x23,0x16,0x43,0x72,0x34,0x00,0x00,
+0x58,0x92,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0x43,0x9d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x57,0xcb,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x5c,0xb6,0x00,0x00,0x00,0x00,0x00,0x02,0x5d,0x99,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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+0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22,
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+0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8,
+0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22,
+0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2,
+0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70,
+0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,
+0x83,0x3a,0xf5,0x83,0xe0,0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,
+0x86,0xf0,0x08,0xe6,0x22,0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,
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+0x0f,0x75,};
+
+u8 Rtl8192CUFwUMCACutWWImgArray[UMCACutWWImgArrayLength] = {
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+0x7d,0xff,0x12,0x2d,0x4d,0x90,0x91,0x22,0xe5,0x1f,0xf0,0x90,0x91,0x22,0xe0,0xc3,
+0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x2d,0x4d,0x90,0x91,0x22,0xe0,0x04,
+0xf0,0x80,0xe8,0xad,0x1f,0x7f,0xff,0x02,0x2d,0x4d,0xc3,0xee,0x94,0x01,0x40,0x0a,
+0x0d,0xed,0x13,0x90,0xfd,0x10,0xf0,0xe4,0x2f,0xff,0x22,0xc3,0xee,0x94,0x01,0x40,
+0x1e,0x90,0xfd,0x11,0xe0,0xb5,0x05,0x14,0x90,0x01,0x17,0xe0,0xb5,0x05,0x07,0x90,
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+0x14,0x25,};
+
+
+
+u8 Rtl8192CUFwUMCBCutWWImgArray[UMCBCutWWImgArrayLength] = {
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+0x91,0x11,0xf0,0xa3,0xef,0xf0,0x90,0x02,0x87,0xe0,0x90,0x91,0x18,0xf0,0x90,0x91,
+0x56,0xe0,0x20,0xe0,0x02,0x61,0xb7,0xe4,0x90,0x91,0x17,0xf0,0x90,0x91,0x18,0xe0,
+0xff,0x90,0x91,0x17,0xe0,0xc3,0x9f,0x40,0x02,0x61,0xb7,0x90,0x91,0x11,0xe0,0xfc,
+0xa3,0xe0,0xfd,0xec,0xff,0x90,0xfd,0x11,0xf0,0x90,0x91,0x1c,0xef,0xf0,0x74,0x02,
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+0x34,0xfb,0xf5,0x83,0xe0,0x54,0xfc,0x90,0x91,0x16,0xf0,0x74,0x01,0x2d,0xf5,0x82,
+0xe4,0x34,0xfb,0xf5,0x83,0xe0,0xfe,0x74,0x00,0x2d,0xf5,0x82,0xe4,0x34,0xfb,0xf5,
+0x83,0xe0,0x7a,0x00,0x24,0x00,0xff,0xea,0x3e,0x54,0x3f,0xab,0x07,0xfa,0x90,0x91,
+0x13,0xf0,0xa3,0xeb,0xf0,0xaf,0x04,0xef,0x75,0xf0,0x08,0xa4,0x24,0x18,0xff,0xe4,
+0x35,0xf0,0xfe,0xef,0x2b,0xfb,0xee,0x3a,0xfa,0x90,0x91,0x5a,0xe0,0xfe,0xa3,0xe0,
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+0x24,0x00,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x30,0xe7,0x08,0x90,0x91,0x19,
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+0x01,0xff,0x90,0x91,0x5c,0xe0,0x34,0x00,0xfe,0xc3,0xed,0x9f,0xff,0xec,0x9e,0x90,
+0x91,0x11,0xf0,0xa3,0xef,0xf0,0x90,0x91,0x16,0xe0,0xff,0x24,0x40,0x60,0x04,0x24,
+0x20,0x70,0x27,0x90,0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x13,0x13,0x54,0x01,0x20,0xe0,
+0x02,0x61,0x8f,0xef,0x90,0x00,0x81,0xb4,0xa0,0x05,0xe0,0x44,0x04,0x80,0x03,0xe0,
+0x44,0x08,0xfd,0x7f,0x81,0x12,0x4d,0xa8,0x61,0x88,0x90,0x91,0x5e,0xe0,0xc4,0x13,
+0x13,0x54,0x03,0x20,0xe0,0x02,0x61,0x8f,0x90,0x91,0x15,0xe0,0xff,0x24,0x00,0xf5,
+0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x54,0x0c,0x64,0x08,0x70,0x72,0x90,0x91,0x19,
+0xe0,0xfe,0xef,0x2e,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x1e,0xf5,0x82,0xe4,0x34,0xfb,
+0xf5,0x83,0xe0,0x64,0x88,0x70,0x58,0x74,0x1f,0x2f,0xf5,0x82,0xe4,0x34,0xfb,0xf5,
+0x83,0xe0,0x64,0x8e,0x70,0x49,0x90,0x91,0x19,0xe0,0xff,0x90,0x91,0x15,0xe0,0x2f,
+0xff,0x90,0x91,0x1a,0xe0,0x2f,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x19,0xf5,0x82,0xe4,
+0x34,0xfb,0xf5,0x83,0xe0,0x64,0x03,0x70,0x26,0x74,0x1e,0x2f,0xf5,0x82,0xe4,0x34,
+0xfb,0xf5,0x83,0xe0,0x90,0x00,0x81,0x30,0xe3,0x05,0xe0,0x44,0x01,0x80,0x03,0xe0,
+0x44,0x02,0xfd,0x7f,0x81,0x12,0x4d,0xa8,0x90,0x91,0x56,0xe0,0x44,0x80,0xf0,0x90,
+0x91,0x56,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x30,0xe0,0x02,0x31,0x3f,0x71,
+0xbc,0xbf,0x01,0x13,0x90,0x91,0x11,0xe0,0xfe,0xa3,0xe0,0xff,0x12,0x44,0xb5,0x90,
+0x91,0x17,0xe0,0x04,0xf0,0x21,0xcc,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x56,0xe0,
+0xc4,0x13,0x13,0x13,0x54,0x01,0x30,0xe0,0x11,0xe0,0x44,0x80,0xf0,0x90,0x91,0x5e,
+0xe0,0xc4,0x54,0x0f,0x20,0xe0,0x03,0x7f,0x00,0x22,0x7f,0x01,0x22,0x8f,0x1f,0xe4,
+0x90,0x91,0x22,0xf0,0xe5,0x1f,0x14,0xfe,0x90,0x91,0x22,0xe0,0xff,0xc3,0x9e,0x50,
+0x0e,0xef,0x04,0xfd,0x12,0x34,0xb7,0x90,0x91,0x22,0xe0,0x04,0xf0,0x80,0xe5,0xe5,
+0x1f,0x14,0xff,0x7d,0xff,0x12,0x34,0xb7,0x90,0x91,0x22,0xe5,0x1f,0xf0,0x90,0x91,
+0x22,0xe0,0xc3,0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x34,0xb7,0x90,0x91,
+0x22,0xe0,0x04,0xf0,0x80,0xe8,0xad,0x1f,0x7f,0xff,0x02,0x34,0xb7,0xc3,0xee,0x94,
+0x01,0x40,0x0a,0x0d,0xed,0x13,0x90,0xfd,0x10,0xf0,0xe4,0x2f,0xff,0x22,0xc3,0xee,
+0x94,0x01,0x40,0x1e,0x90,0xfd,0x11,0xe0,0xb5,0x05,0x14,0x90,0x01,0x17,0xe0,0xb5,
+0x05,0x07,0x90,0xfd,0x11,0xe4,0xf0,0x80,0x06,0xed,0x04,0x90,0xfd,0x11,0xf0,0xe4,
+0x2f,0xff,0x22,0x00,0x18,0x58,};
+
+
+
+
+
+
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/rtl8192cu_led.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/rtl8192cu_led.c
new file mode 100755
index 00000000..0d7af4aa
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/rtl8192cu_led.c
@@ -0,0 +1,2675 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#include "drv_types.h"
+#include "rtl8192c_hal.h"
+
+//================================================================================
+//	Constant.
+//================================================================================
+
+//
+// Default LED behavior.
+//
+#define LED_BLINK_NORMAL_INTERVAL	100
+#define LED_BLINK_SLOWLY_INTERVAL	200
+#define LED_BLINK_LONG_INTERVAL	400
+
+#define LED_BLINK_NO_LINK_INTERVAL_ALPHA		1000
+#define LED_BLINK_LINK_INTERVAL_ALPHA			500		//500
+#define LED_BLINK_SCAN_INTERVAL_ALPHA		180 	//150
+#define LED_BLINK_FASTER_INTERVAL_ALPHA		50
+#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA	5000
+
+//================================================================================
+// LED object.
+//================================================================================
+
+
+//================================================================================
+//	Prototype of protected function.
+//================================================================================
+
+
+static void
+BlinkTimerCallback(
+	unsigned long data
+	);
+
+static void
+BlinkWorkItemCallback(
+	struct work_struct *work
+	);
+
+//
+//	Description:
+//		Reset blinking status of LED_871x object.
+//
+static void
+ResetLedStatus(PLED_871x	pLed) {
+	pLed->CurrLedState = RTW_LED_OFF; // Current LED state.
+	pLed->bLedOn = _FALSE; // true if LED is ON, false if LED is OFF.
+	
+	pLed->bLedBlinkInProgress = _FALSE; // true if it is blinking, false o.w..
+	pLed->bLedNoLinkBlinkInProgress = _FALSE;
+	pLed->bLedLinkBlinkInProgress = _FALSE;
+	pLed->bLedStartToLinkBlinkInProgress = _FALSE;
+	pLed->bLedScanBlinkInProgress = _FALSE;
+	pLed->bLedWPSBlinkInProgress = _FALSE;
+	pLed->BlinkTimes = 0; // Number of times to toggle led state for blinking.
+	pLed->BlinkingLedState = LED_UNKNOWN; // Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are.
+}
+
+//================================================================================
+// LED_819xUsb routines. 
+//================================================================================
+
+//
+//	Description:
+//		Initialize an LED_871x object.
+//
+static void
+InitLed871x(
+	_adapter			*padapter,
+	PLED_871x		pLed,
+	LED_PIN_871x	LedPin
+	)
+{
+	pLed->padapter = padapter;
+	pLed->LedPin = LedPin;
+
+	ResetLedStatus(pLed);
+
+	_init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed);
+	_init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed);
+}
+
+
+//
+//	Description:
+//		DeInitialize an LED_871x object.
+//
+static void
+DeInitLed871x(
+	PLED_871x			pLed
+	)
+{
+	//call _cancel_workitem_sync(&(pLed->BlinkWorkItem)) 
+    //before _cancel_timer_ex(&(pLed->BlinkTimer)) to 
+    //avoid led timer restarting when driver is removed
+
+	_cancel_workitem_sync(&(pLed->BlinkWorkItem));
+	
+	_cancel_timer_ex(&(pLed->BlinkTimer));
+	
+	// We should reset bLedBlinkInProgress if we cancel the LedControlTimer, 2005.03.10, by rcnjko.
+	ResetLedStatus(pLed);
+}
+
+//
+//	Description:
+//		Turn on LED according to LedPin specified.
+//
+static void
+SwLedOn(
+	_adapter			*padapter, 
+	PLED_871x		pLed
+)
+{
+	u8	LedCfg;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+
+	if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))
+	{
+		return;
+	}
+
+	if( 	(BOARD_MINICARD == pHalData->BoardType )||
+		(BOARD_USB_SOLO == pHalData->BoardType)||
+		(BOARD_USB_COMBO == pHalData->BoardType))
+	{
+		LedCfg = rtw_read8(padapter, REG_LEDCFG2);
+		switch(pLed->LedPin)
+		{	
+			case LED_PIN_GPIO0:
+				break;
+
+			case LED_PIN_LED0:
+				rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on.
+				break;
+
+			case LED_PIN_LED1:
+				rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); // SW control led1 on.
+				break;
+
+			default:
+				break;
+	
+		}
+	}
+	else
+	{	
+		switch(pLed->LedPin)
+		{
+			case LED_PIN_GPIO0:
+				break;
+
+			case LED_PIN_LED0:
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+				if(pHalData->AntDivCfg)
+				{
+					LedCfg = rtw_read8(padapter, REG_LEDCFG2);
+					rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xe0)|BIT7|BIT6|BIT5); // SW control led0 on.
+					//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0 0x%x\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG2)));
+				}
+				else
+#endif
+				{
+					LedCfg = rtw_read8(padapter, REG_LEDCFG0);
+					rtw_write8(padapter,REG_LEDCFG0, LedCfg&0x70); // SW control led0 on.
+					//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0)));
+				}
+				break;
+
+			case LED_PIN_LED1:
+				LedCfg = rtw_read8(padapter,(REG_LEDCFG1));
+				rtw_write8(padapter,(REG_LEDCFG1), LedCfg&0x70); // SW control led1 on.
+				//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED1 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0)));
+			
+				break;
+
+			default:
+				break;
+		}
+	}
+	pLed->bLedOn = _TRUE;
+	
+}
+
+
+//
+//	Description:
+//		Turn off LED according to LedPin specified.
+//
+static void
+SwLedOff(
+	_adapter			*padapter, 
+	PLED_871x		pLed
+)
+{
+	u8	LedCfg;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+
+	if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))	
+	{
+		goto exit;
+	}
+
+	if( 	(BOARD_MINICARD == pHalData->BoardType )||
+		(BOARD_USB_SOLO == pHalData->BoardType)||
+		(BOARD_USB_COMBO == pHalData->BoardType))
+	{
+		LedCfg = rtw_read8(padapter, REG_LEDCFG2);//0x4E
+
+		switch(pLed->LedPin)
+		{
+
+			case LED_PIN_GPIO0:
+				break;
+
+			case LED_PIN_LED0:
+				if(BOARD_USB_COMBO == pHalData->BoardType)
+				{
+					LedCfg &= 0x90; // Set to software control.				
+					rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));				
+					LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG);
+					LedCfg &= 0xFE;
+					rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);									
+				}
+				else
+				{
+					LedCfg &= 0xf0; // Set to software control.
+					if(pHalData->bLedOpenDrain == _TRUE) // Open-drain arrangement for controlling the LED
+						rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT1|BIT5|BIT6));
+					else
+						rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6));
+				}
+				break;
+
+			case LED_PIN_LED1:
+				LedCfg &= 0x0f; // Set to software control.
+				rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
+				break;
+
+			default:
+				break;
+		}
+	}
+	else
+	{
+		switch(pLed->LedPin)
+		{
+			case LED_PIN_GPIO0:
+				break;
+
+			case LED_PIN_LED0:
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+				if(pHalData->AntDivCfg)
+				{
+					LedCfg = rtw_read8(padapter, REG_LEDCFG2);
+					LedCfg &= 0xe0; // Set to software control. 			
+					rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT7|BIT6|BIT5));
+					//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0 0x%x\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG2)));
+				}
+				else
+#endif
+				{
+					LedCfg = rtw_read8(padapter, REG_LEDCFG0);
+					LedCfg &= 0x70; // Set to software control. 			
+					rtw_write8(padapter, REG_LEDCFG0, (LedCfg|BIT3));
+					//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0)));
+				}
+				break;
+
+			case LED_PIN_LED1:
+				LedCfg = rtw_read8(padapter, (REG_LEDCFG1));
+				LedCfg &= 0x70; // Set to software control.
+				rtw_write8(padapter,  (REG_LEDCFG1), (LedCfg|BIT3));
+				//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED1 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0)));
+				break;
+
+			default:
+				break;
+		}
+	}
+
+exit:
+	pLed->bLedOn = _FALSE;
+	
+}
+
+//================================================================================
+// Interface to manipulate LED objects.
+//================================================================================
+
+
+//
+//	Description:
+//		Implementation of LED blinking behavior.
+//		It toggle off LED and schedule corresponding timer if necessary.
+//
+static void
+SwLedBlink(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == RTW_LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+	// Determine if we shall change LED state again.
+	pLed->BlinkTimes--;
+	switch(pLed->CurrLedState)
+	{
+
+	case LED_BLINK_NORMAL: 
+		if(pLed->BlinkTimes == 0)
+		{
+			bStopBlinking = _TRUE;
+		}
+		break;
+		
+	case LED_BLINK_StartToBlink:
+		if( check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE) )
+		{
+			bStopBlinking = _TRUE;
+		}
+		if( check_fwstate(pmlmepriv, _FW_LINKED) &&
+			(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) )
+		{
+			bStopBlinking = _TRUE;
+		}
+		else if(pLed->BlinkTimes == 0)
+		{
+			bStopBlinking = _TRUE;
+		}
+		break;
+
+	case LED_BLINK_WPS:
+		if( pLed->BlinkTimes == 0 )
+		{
+			bStopBlinking = _TRUE;
+		}
+		break;
+
+
+	default:
+		bStopBlinking = _TRUE;
+		break;
+			
+	}
+	
+	if(bStopBlinking)
+	{
+		//if( padapter->pwrctrlpriv.cpwm >= PS_STATE_S2)
+		if(0)
+		{
+			SwLedOff(padapter, pLed);
+		}
+		else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (pLed->bLedOn == _FALSE))
+		{
+			SwLedOn(padapter, pLed);
+		}
+		else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) &&  pLed->bLedOn == _TRUE)
+		{
+			SwLedOff(padapter, pLed);
+		}
+
+		pLed->BlinkTimes = 0;
+		pLed->bLedBlinkInProgress = _FALSE;
+	}
+	else
+	{
+		// Assign LED state to toggle.
+		if( pLed->BlinkingLedState == RTW_LED_ON ) 
+			pLed->BlinkingLedState = RTW_LED_OFF;
+		else 
+			pLed->BlinkingLedState = RTW_LED_ON;
+
+		// Schedule a timer to toggle LED state. 
+		switch( pLed->CurrLedState )
+		{
+		case LED_BLINK_NORMAL:
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			break;
+		
+		case LED_BLINK_SLOWLY:
+		case LED_BLINK_StartToBlink:
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+			break;
+
+		case LED_BLINK_WPS:
+			{
+				if( pLed->BlinkingLedState == RTW_LED_ON )
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL);
+				else
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL);
+			}
+			break;
+
+		default:
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+			break;
+		}
+	}
+}
+
+
+static void
+SwLedBlink1(
+	PLED_871x			pLed
+	)
+{
+	_adapter				*padapter = pLed->padapter;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct led_priv		*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
+	PLED_871x 			pLed1 = &(ledpriv->SwLed1);	
+	u8					bStopBlinking = _FALSE;
+
+	if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO)
+		pLed = &(ledpriv->SwLed1);	
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == RTW_LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+
+	if(pHalData->EEPROMCustomerID == RT_CID_DEFAULT)
+	{
+		if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+		{
+			if(!pLed1->bSWLedCtrl)
+			{
+				SwLedOn(padapter, pLed1); 	
+				pLed1->bSWLedCtrl = _TRUE;
+			}
+			else if(!pLed1->bLedOn)	
+				SwLedOn(padapter, pLed1);
+			RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn on pLed1\n"));
+		}
+		else 
+		{
+			if(!pLed1->bSWLedCtrl)
+			{
+				SwLedOff(padapter, pLed1);
+				pLed1->bSWLedCtrl = _TRUE;
+			}
+			else if(pLed1->bLedOn)
+				SwLedOff(padapter, pLed1);
+			RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn off pLed1\n"));		
+		}
+	}
+
+
+	if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+	{
+		SwLedOff(padapter, pLed);
+		ResetLedStatus(pLed);
+		return;
+	}
+				
+
+	switch(pLed->CurrLedState)
+	{
+		case LED_BLINK_SLOWLY:			
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = RTW_LED_OFF; 
+			else
+				pLed->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			break;
+
+		case LED_BLINK_NORMAL:
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = RTW_LED_OFF; 
+			else
+				pLed->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+			break;
+			
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->bLedLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_NORMAL;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->bLedNoLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF;
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			if(bStopBlinking)
+			{
+				if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->bLedLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_NORMAL;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF;
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->bLedNoLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->BlinkTimes = 0;
+				pLed->bLedBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_BLINK_WPS:
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = RTW_LED_OFF; 
+			else
+				pLed->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			break;
+
+		case LED_BLINK_WPS_STOP:	//WPS success
+			if(pLed->BlinkingLedState == RTW_LED_ON)
+				bStopBlinking = _FALSE;
+			else
+				bStopBlinking = _TRUE;				
+
+			if(bStopBlinking)
+			{
+				pLed->bLedLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_NORMAL;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+				RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+					
+				pLed->bLedWPSBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				pLed->BlinkingLedState = RTW_LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+			}
+			break;
+					
+		default:
+			break;
+	}
+
+}
+
+static void
+SwLedBlink2(
+	PLED_871x			pLed
+	)
+{
+	_adapter				*padapter = pLed->padapter;
+	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
+	u8					bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == RTW_LED_ON) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+	switch(pLed->CurrLedState)
+	{	
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->CurrLedState = RTW_LED_ON;
+					pLed->BlinkingLedState = RTW_LED_ON; 
+					SwLedOn(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState));
+					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->CurrLedState = RTW_LED_OFF;
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+					SwLedOff(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->CurrLedState = RTW_LED_ON;
+					pLed->BlinkingLedState = RTW_LED_ON; 
+					SwLedOn(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState));
+					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->CurrLedState = RTW_LED_OFF;
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+					SwLedOff(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+					
+		default:
+			break;
+	}
+
+}
+
+static void
+SwLedBlink3(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == RTW_LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		if(pLed->CurrLedState != LED_BLINK_WPS_STOP)
+			SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}	
+
+	switch(pLed->CurrLedState)
+	{			
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->CurrLedState = RTW_LED_ON;
+					pLed->BlinkingLedState = RTW_LED_ON;				
+					if( !pLed->bLedOn )
+						SwLedOn(padapter, pLed);
+
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->CurrLedState = RTW_LED_OFF;
+					pLed->BlinkingLedState = RTW_LED_OFF;									
+					if( pLed->bLedOn )
+						SwLedOff(padapter, pLed);
+
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+				 	if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->CurrLedState = RTW_LED_ON;
+					pLed->BlinkingLedState = RTW_LED_ON;
+				
+					if( !pLed->bLedOn )
+						SwLedOn(padapter, pLed);
+
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->CurrLedState = RTW_LED_OFF;
+					pLed->BlinkingLedState = RTW_LED_OFF;					
+				
+					if( pLed->bLedOn )
+						SwLedOff(padapter, pLed);
+
+
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_BLINK_WPS:
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = RTW_LED_OFF; 
+			else
+				pLed->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			break;
+
+		case LED_BLINK_WPS_STOP:	//WPS success
+			if(pLed->BlinkingLedState == RTW_LED_ON)
+			{
+				pLed->BlinkingLedState = RTW_LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+				bStopBlinking = _FALSE;
+			}
+			else
+			{
+				bStopBlinking = _TRUE;				
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else 
+				{
+					pLed->CurrLedState = RTW_LED_ON;
+					pLed->BlinkingLedState = RTW_LED_ON; 
+					SwLedOn(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedWPSBlinkInProgress = _FALSE;	
+			}		
+			break;
+			
+					
+		default:
+			break;
+	}
+
+}
+
+
+static void
+SwLedBlink4(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	PLED_871x 		pLed1 = &(ledpriv->SwLed1);	
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == RTW_LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}	
+
+	if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN)
+	{
+		pLed1->BlinkingLedState = RTW_LED_OFF;
+		pLed1->CurrLedState = RTW_LED_OFF;
+		SwLedOff(padapter, pLed1);
+	}	
+
+	switch(pLed->CurrLedState)
+	{
+		case LED_BLINK_SLOWLY:			
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = RTW_LED_OFF; 
+			else
+				pLed->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			break;
+
+		case LED_BLINK_StartToBlink:
+			if( pLed->bLedOn )
+			{
+				pLed->BlinkingLedState = RTW_LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+			}
+			else
+			{
+				pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			}
+			break;			
+			
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _FALSE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else 
+				{
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+				}
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else 
+				{
+					pLed->bLedNoLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+				}
+				pLed->bLedBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_BLINK_WPS:
+			if( pLed->bLedOn )
+			{
+				pLed->BlinkingLedState = RTW_LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+			}
+			else
+			{
+				pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			}
+			break;
+
+		case LED_BLINK_WPS_STOP:	//WPS authentication fail
+			if( pLed->bLedOn )			
+				pLed->BlinkingLedState = RTW_LED_OFF; 			
+			else			
+				pLed->BlinkingLedState = RTW_LED_ON;
+
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			break;
+
+		case LED_BLINK_WPS_STOP_OVERLAP:	//WPS session overlap		
+			pLed->BlinkTimes--;
+			if(pLed->BlinkTimes == 0)
+			{
+				if(pLed->bLedOn)
+				{
+					pLed->BlinkTimes = 1;							
+				}
+				else
+				{
+					bStopBlinking = _TRUE;
+				}
+			}
+
+			if(bStopBlinking)
+			{				
+				pLed->BlinkTimes = 10;			
+				pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+			}
+			else
+			{
+				if( pLed->bLedOn )			
+					pLed->BlinkingLedState = RTW_LED_OFF;			
+				else			
+					pLed->BlinkingLedState = RTW_LED_ON;
+
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			}
+			break;
+
+					
+		default:
+			break;
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState));
+
+
+}
+
+static void
+SwLedBlink5(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == RTW_LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+	switch(pLed->CurrLedState)
+	{
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					pLed->CurrLedState = RTW_LED_OFF;
+					pLed->BlinkingLedState = RTW_LED_OFF; 									
+					if(pLed->bLedOn)				
+						SwLedOff(padapter, pLed);
+				}
+				else 
+				{		pLed->CurrLedState = RTW_LED_ON;
+						pLed->BlinkingLedState = RTW_LED_ON;					
+						if(!pLed->bLedOn)
+							_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+	
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					pLed->CurrLedState = RTW_LED_OFF;
+					pLed->BlinkingLedState = RTW_LED_OFF; 									
+					if(pLed->bLedOn)
+						SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					pLed->CurrLedState = RTW_LED_ON;
+					pLed->BlinkingLedState = RTW_LED_ON; 					
+					if(!pLed->bLedOn)
+						_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+
+				pLed->bLedBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = RTW_LED_OFF; 
+					else
+						pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+					
+		default:
+			break;
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState));
+
+
+}
+
+static void
+SwLedBlink6(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == RTW_LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink6\n"));
+}
+
+
+//
+//	Description:
+//		Callback function of LED BlinkTimer, 
+//		it just schedules to corresponding BlinkWorkItem.
+//
+static void
+BlinkTimerCallback(
+	unsigned long data
+	)
+{
+	PLED_871x	 pLed = (PLED_871x)data;
+	_adapter		*padapter = pLed->padapter;
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))	
+	{
+		//DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped);
+		return;
+	}
+
+#ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD
+	rtw_led_blink_cmd(padapter, pLed);
+#else
+	_set_workitem(&(pLed->BlinkWorkItem));
+#endif
+}
+
+//
+//	Description:
+//		Handler function of LED Blinking.
+//		We dispatch acture LED blink action according to LedStrategy.
+//
+void BlinkHandler(PLED_871x	 pLed)
+{
+	struct led_priv	*ledpriv = &(pLed->padapter->ledpriv);
+	_adapter		*padapter = pLed->padapter;
+
+	//DBG_871X("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid);
+
+	if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))	
+	{
+		//DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped);
+		return;
+	}
+
+	switch(ledpriv->LedStrategy)
+	{
+		case SW_LED_MODE0:
+			SwLedBlink(pLed);
+			break;
+		
+		case SW_LED_MODE1:
+			SwLedBlink1(pLed);
+			break;
+		
+		case SW_LED_MODE2:
+			SwLedBlink2(pLed);
+			break;
+			
+		case SW_LED_MODE3:
+			SwLedBlink3(pLed);
+			break;
+
+		case SW_LED_MODE4:
+			SwLedBlink4(pLed);
+			break;			
+
+		case SW_LED_MODE5:
+			SwLedBlink5(pLed);
+			break;
+
+		case SW_LED_MODE6:
+			SwLedBlink6(pLed);
+			break;
+
+		default:
+			//RT_TRACE(COMP_LED, DBG_LOUD, ("BlinkWorkItemCallback 0x%x \n", pHalData->LedStrategy));
+			//SwLedBlink(pLed);
+			break;
+	}
+}
+
+//
+//	Description:
+//		Callback function of LED BlinkWorkItem.
+//		We dispatch acture LED blink action according to LedStrategy.
+//
+static void BlinkWorkItemCallback(struct work_struct *work)
+{
+	PLED_871x	 pLed = container_of(work, LED_871x, BlinkWorkItem);
+	BlinkHandler(pLed);
+}
+
+
+
+//================================================================================
+// Default LED behavior.
+//================================================================================
+
+//
+//	Description:	
+//		Implement each led action for SW_LED_MODE0.
+//		This is default strategy.
+//
+static void
+SwLedControlMode0(
+	_adapter		*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	PLED_871x	pLed = &(ledpriv->SwLed1);
+
+	// Decide led state
+	switch(LedAction)
+	{
+	case LED_CTL_TX:
+	case LED_CTL_RX:
+		if( pLed->bLedBlinkInProgress == _FALSE )
+		{
+			pLed->bLedBlinkInProgress = _TRUE;
+
+			pLed->CurrLedState = LED_BLINK_NORMAL;
+			pLed->BlinkTimes = 2;
+
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = RTW_LED_OFF; 
+			else
+				pLed->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+		}
+		break;
+
+	case LED_CTL_START_TO_LINK:
+		if( pLed->bLedBlinkInProgress == _FALSE )
+		{
+			pLed->bLedBlinkInProgress = _TRUE;
+
+			pLed->CurrLedState = LED_BLINK_StartToBlink;
+			pLed->BlinkTimes = 24;
+
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = RTW_LED_OFF; 
+			else
+				pLed->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+		}
+		else
+		{
+			pLed->CurrLedState = LED_BLINK_StartToBlink;
+		}	
+		break;
+		
+	case LED_CTL_LINK:
+		pLed->CurrLedState = RTW_LED_ON;
+		if( pLed->bLedBlinkInProgress == _FALSE )
+		{
+			SwLedOn(padapter, pLed);
+		}
+		break;
+
+	case LED_CTL_NO_LINK:
+		pLed->CurrLedState = RTW_LED_OFF;
+		if( pLed->bLedBlinkInProgress == _FALSE )
+		{
+			SwLedOff(padapter, pLed);
+		}
+		break;
+	
+	case LED_CTL_POWER_OFF:
+		pLed->CurrLedState = RTW_LED_OFF;
+		if(pLed->bLedBlinkInProgress)
+		{
+			_cancel_timer_ex(&(pLed->BlinkTimer));
+			pLed->bLedBlinkInProgress = _FALSE;
+		}
+		SwLedOff(padapter, pLed);
+		break;
+
+	case LED_CTL_START_WPS:
+		if( pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == RTW_LED_ON)
+		{
+			pLed->bLedBlinkInProgress = _TRUE;
+
+			pLed->CurrLedState = LED_BLINK_WPS;
+			pLed->BlinkTimes = 20;
+
+			if( pLed->bLedOn )
+			{
+				pLed->BlinkingLedState = RTW_LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL);
+			}
+			else
+			{
+				pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL);
+			}
+		}
+		break;
+
+	case LED_CTL_STOP_WPS:
+		if(pLed->bLedBlinkInProgress)
+		{
+			pLed->CurrLedState = RTW_LED_OFF;
+			_cancel_timer_ex(&(pLed->BlinkTimer));
+			pLed->bLedBlinkInProgress = _FALSE;
+		}
+		break;
+		
+
+	default:
+		break;
+	}
+	
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState));
+	
+}
+
+ //ALPHA, added by chiyoko, 20090106
+static void
+SwLedControlMode1(
+	_adapter		*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct led_priv		*ledpriv = &(padapter->ledpriv);
+	PLED_871x			pLed = &(ledpriv->SwLed0);
+	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
+
+	if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO)
+		pLed = &(ledpriv->SwLed1);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_POWER_ON:
+		case LED_CTL_START_TO_LINK:	
+		case LED_CTL_NO_LINK:
+			if( pLed->bLedNoLinkBlinkInProgress == _FALSE )
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+				if( pLed->bLedLinkBlinkInProgress == _TRUE )
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedLinkBlinkInProgress = _FALSE;
+				}
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{	
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+	 			}
+				
+				pLed->bLedNoLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_SLOWLY;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			}
+			break;		
+
+		case LED_CTL_LINK:
+			if( pLed->bLedLinkBlinkInProgress == _FALSE )
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{	
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+	 			}
+				pLed->bLedLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_NORMAL;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_SITE_SURVEY:
+			 if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+			 	;
+			 else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			 {
+			 	if(IS_LED_WPS_BLINKING(pLed))
+					return;
+				
+	  			if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if( pLed->bLedLinkBlinkInProgress == _TRUE )
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					 pLed->bLedLinkBlinkInProgress = _FALSE;
+				}
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			 }
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+			if(pLed->bLedBlinkInProgress ==_FALSE)
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if( pLed->bLedLinkBlinkInProgress == _TRUE )
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedLinkBlinkInProgress = _FALSE;
+				}
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_START_WPS: //wait until xinpin finish
+		case LED_CTL_START_WPS_BOTTON:
+			 if(pLed->bLedWPSBlinkInProgress ==_FALSE)
+			 {
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if( pLed->bLedLinkBlinkInProgress == _TRUE )
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					 pLed->bLedLinkBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedScanBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedScanBlinkInProgress = _FALSE;
+				}				
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_WPS;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			 }
+			break;
+
+		
+		case LED_CTL_STOP_WPS:
+			if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedNoLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedLinkBlinkInProgress == _TRUE )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				 pLed->bLedLinkBlinkInProgress = _FALSE;
+			}
+			if(pLed->bLedBlinkInProgress ==_TRUE)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if(pLed->bLedScanBlinkInProgress ==_TRUE)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+			}
+			else
+			{
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+			}
+			
+			pLed->CurrLedState = LED_BLINK_WPS_STOP;
+			if(pLed->bLedOn)
+			{
+				pLed->BlinkingLedState = RTW_LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+			}
+			else
+			{
+				pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			}					
+			break;		
+
+		case LED_CTL_STOP_WPS_FAIL:			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;				
+			}			
+
+			pLed->bLedNoLinkBlinkInProgress = _TRUE;
+			pLed->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = RTW_LED_OFF;
+			else
+				pLed->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			break;				
+
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = RTW_LED_OFF;
+			pLed->BlinkingLedState = RTW_LED_OFF; 
+			if( pLed->bLedNoLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedNoLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+
+			SwLedOff(padapter, pLed);
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState));
+}
+
+ //Arcadyan/Sitecom , added by chiyoko, 20090216
+static void
+SwLedControlMode2(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x 		pLed = &(ledpriv->SwLed0);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_SITE_SURVEY:
+			 if(pmlmepriv->LinkDetectInfo.bBusyTraffic)
+			 	;		 
+			 else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			 {
+			 	if(IS_LED_WPS_BLINKING(pLed))
+					return;
+			 
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			 }
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+	  		{
+	  		  	if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_LINK:
+			pLed->CurrLedState = RTW_LED_ON;
+			pLed->BlinkingLedState = RTW_LED_ON;
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;			
+
+		case LED_CTL_START_WPS: //wait until xinpin finish
+		case LED_CTL_START_WPS_BOTTON:		
+			if(pLed->bLedWPSBlinkInProgress ==_FALSE)
+			{
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedScanBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedScanBlinkInProgress = _FALSE;
+				}				
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+				pLed->CurrLedState = RTW_LED_ON;
+				pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			 }			
+			break;
+			
+		case LED_CTL_STOP_WPS:
+			pLed->bLedWPSBlinkInProgress = _FALSE;
+			if(padapter->pwrctrlpriv.rf_pwrstate != rf_on)
+			{
+				SwLedOff(padapter, pLed);
+			}
+			else
+			{
+				pLed->CurrLedState = RTW_LED_ON;
+				pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), 0);
+				RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+			}
+			break;
+			
+		case LED_CTL_STOP_WPS_FAIL:			
+			pLed->bLedWPSBlinkInProgress = _FALSE;			
+			if(padapter->pwrctrlpriv.rf_pwrstate != rf_on)
+			{
+				SwLedOff(padapter, pLed);
+			}
+			else 
+			{
+				pLed->CurrLedState = RTW_LED_OFF;
+				pLed->BlinkingLedState = RTW_LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), 0);
+				RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); 				
+			}	
+			break;				
+
+		case LED_CTL_START_TO_LINK: 
+		case LED_CTL_NO_LINK:
+			if(!IS_LED_BLINKING(pLed))
+			{
+				pLed->CurrLedState = RTW_LED_OFF;
+				pLed->BlinkingLedState = RTW_LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			}
+			break;
+			
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = RTW_LED_OFF;
+			pLed->BlinkingLedState = RTW_LED_OFF;
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+			if( pLed->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;
+			}
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+}
+
+  //COREGA, added by chiyoko, 20090316
+ static void
+ SwLedControlMode3(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x		pLed = &(ledpriv->SwLed0);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_SITE_SURVEY:
+			if(pmlmepriv->LinkDetectInfo.bBusyTraffic)
+				;		 
+			else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			{
+				if(IS_LED_WPS_BLINKING(pLed))
+					return;
+
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+	  		{
+	  		  	if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_LINK:
+			if(IS_LED_WPS_BLINKING(pLed))
+				return;
+			
+			pLed->CurrLedState = RTW_LED_ON;
+			pLed->BlinkingLedState = RTW_LED_ON;
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;			
+
+		case LED_CTL_START_WPS: //wait until xinpin finish
+		case LED_CTL_START_WPS_BOTTON:		
+			if(pLed->bLedWPSBlinkInProgress ==_FALSE)
+			{
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedScanBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedScanBlinkInProgress = _FALSE;
+				}				
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_WPS;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}			
+			break;
+			
+		case LED_CTL_STOP_WPS:			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;				
+			}						
+			else
+			{
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+			}
+				
+			pLed->CurrLedState = LED_BLINK_WPS_STOP;
+			if(pLed->bLedOn)
+			{
+				pLed->BlinkingLedState = RTW_LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+			}
+			else
+			{
+				pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			}					
+
+			break;
+			
+		case LED_CTL_STOP_WPS_FAIL:			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;				
+			}			
+
+			pLed->CurrLedState = RTW_LED_OFF;
+			pLed->BlinkingLedState = RTW_LED_OFF;
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;				
+
+		case LED_CTL_START_TO_LINK: 
+		case LED_CTL_NO_LINK:
+			if(!IS_LED_BLINKING(pLed))
+			{
+				pLed->CurrLedState = RTW_LED_OFF;
+				pLed->BlinkingLedState = RTW_LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			}
+			break;
+			
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = RTW_LED_OFF;
+			pLed->BlinkingLedState = RTW_LED_OFF;
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+			if( pLed->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;
+			}
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+}
+
+
+ //Edimax-Belkin, added by chiyoko, 20090413
+static void
+SwLedControlMode4(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x		pLed = &(ledpriv->SwLed0);
+	PLED_871x		pLed1 = &(ledpriv->SwLed1);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_START_TO_LINK:	
+			if(pLed1->bLedWPSBlinkInProgress)
+			{
+				pLed1->bLedWPSBlinkInProgress = _FALSE;
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+		
+				pLed1->BlinkingLedState = RTW_LED_OFF;
+				pLed1->CurrLedState = RTW_LED_OFF;
+
+				if(pLed1->bLedOn)
+					_set_timer(&(pLed->BlinkTimer), 0);
+			}
+				
+			if( pLed->bLedStartToLinkBlinkInProgress == _FALSE )
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+	 			}
+	 			if(pLed->bLedNoLinkBlinkInProgress ==_TRUE)
+				{	
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+	 			}				
+				
+				pLed->bLedStartToLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_StartToBlink;
+				if( pLed->bLedOn )
+				{
+					pLed->BlinkingLedState = RTW_LED_OFF;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+				}
+				else
+				{
+					pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+				}
+			}
+			break;		
+
+		case LED_CTL_LINK:			
+		case LED_CTL_NO_LINK:
+			//LED1 settings
+			if(LedAction == LED_CTL_LINK)
+			{
+				if(pLed1->bLedWPSBlinkInProgress)
+				{
+					pLed1->bLedWPSBlinkInProgress = _FALSE;
+					_cancel_timer_ex(&(pLed1->BlinkTimer));
+			
+					pLed1->BlinkingLedState = RTW_LED_OFF;
+					pLed1->CurrLedState = RTW_LED_OFF;
+
+					if(pLed1->bLedOn)
+						_set_timer(&(pLed->BlinkTimer), 0);
+				}				
+			}
+			
+			if( pLed->bLedNoLinkBlinkInProgress == _FALSE )
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+	 			}
+				
+				pLed->bLedNoLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_SLOWLY;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			}
+			break;		
+
+		case LED_CTL_SITE_SURVEY:
+			if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+				;		 
+			else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			{
+				if(IS_LED_WPS_BLINKING(pLed))
+					return;
+
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if(pLed->bLedBlinkInProgress ==_FALSE)
+	  		{
+	  		  	if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+	  		  	if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_START_WPS: //wait until xinpin finish
+		case LED_CTL_START_WPS_BOTTON:
+			if(pLed1->bLedWPSBlinkInProgress)
+			{
+				pLed1->bLedWPSBlinkInProgress = _FALSE;
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+			
+				pLed1->BlinkingLedState = RTW_LED_OFF;
+				pLed1->CurrLedState = RTW_LED_OFF;
+
+				if(pLed1->bLedOn)
+					_set_timer(&(pLed->BlinkTimer), 0);
+			}
+				
+			if(pLed->bLedWPSBlinkInProgress ==_FALSE)
+			{
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedScanBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedScanBlinkInProgress = _FALSE;
+				}				
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_WPS;
+				if( pLed->bLedOn )
+				{
+					pLed->BlinkingLedState = RTW_LED_OFF;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+				}
+				else
+				{
+					pLed->BlinkingLedState = RTW_LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+				}
+			}
+			break;
+		
+		case LED_CTL_STOP_WPS:	//WPS connect success		
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;								
+			}
+
+			pLed->bLedNoLinkBlinkInProgress = _TRUE;
+			pLed->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = RTW_LED_OFF; 
+			else
+				pLed->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+
+			break;		
+
+		case LED_CTL_STOP_WPS_FAIL:		//WPS authentication fail			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;				
+			}			
+
+			pLed->bLedNoLinkBlinkInProgress = _TRUE;
+			pLed->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = RTW_LED_OFF; 
+			else
+				pLed->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+
+			//LED1 settings
+			if(pLed1->bLedWPSBlinkInProgress)
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+			else	
+				pLed1->bLedWPSBlinkInProgress = _TRUE;				
+
+			pLed1->CurrLedState = LED_BLINK_WPS_STOP;
+			if( pLed1->bLedOn )
+				pLed1->BlinkingLedState = RTW_LED_OFF; 
+			else
+				pLed1->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+
+			break;				
+
+		case LED_CTL_STOP_WPS_FAIL_OVERLAP:	//WPS session overlap		
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;								
+			}
+			
+			pLed->bLedNoLinkBlinkInProgress = _TRUE;
+			pLed->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = RTW_LED_OFF; 
+			else
+				pLed->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+
+			//LED1 settings
+			if(pLed1->bLedWPSBlinkInProgress)
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+			else	
+				pLed1->bLedWPSBlinkInProgress = _TRUE;				
+
+			pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP;
+			pLed1->BlinkTimes = 10;
+			if( pLed1->bLedOn )
+				pLed1->BlinkingLedState = RTW_LED_OFF; 
+			else
+				pLed1->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			
+			break;
+
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = RTW_LED_OFF;
+			pLed->BlinkingLedState = RTW_LED_OFF; 
+			
+			if( pLed->bLedNoLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedNoLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}	
+			if( pLed->bLedStartToLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedStartToLinkBlinkInProgress = _FALSE;
+			}			
+
+			if( pLed1->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+				pLed1->bLedWPSBlinkInProgress = _FALSE;
+			}
+
+			pLed1->BlinkingLedState = LED_UNKNOWN;				
+			SwLedOff(padapter, pLed);
+			SwLedOff(padapter, pLed1);			
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState));
+}
+
+
+
+ //Sercomm-Belkin, added by chiyoko, 20090415
+static void
+SwLedControlMode5(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x		pLed = &(ledpriv->SwLed0);
+
+	if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO)
+		pLed = &(ledpriv->SwLed1);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_POWER_ON:
+		case LED_CTL_NO_LINK:
+		case LED_CTL_LINK: 	//solid blue
+			pLed->CurrLedState = RTW_LED_ON;
+			pLed->BlinkingLedState = RTW_LED_ON; 
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;
+
+		case LED_CTL_SITE_SURVEY:
+			if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+				;		 
+			else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			{				
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if(pLed->bLedBlinkInProgress ==_FALSE)
+	  		{
+	  		  	if(pLed->CurrLedState == LED_SCAN_BLINK)
+				{
+					return;
+				}			
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = RTW_LED_OFF; 
+				else
+					pLed->BlinkingLedState = RTW_LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;				
+
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = RTW_LED_OFF;
+			pLed->BlinkingLedState = RTW_LED_OFF; 
+
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}			
+				
+			SwLedOff(padapter, pLed);
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState));
+}
+
+ //WNC-Corega, added by chiyoko, 20090902
+static void
+SwLedControlMode6(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x pLed0 = &(ledpriv->SwLed0);
+	
+	switch(LedAction)
+	{
+		case LED_CTL_POWER_ON:
+		case LED_CTL_LINK:
+		case LED_CTL_NO_LINK:
+			_cancel_timer_ex(&(pLed0->BlinkTimer));
+			pLed0->CurrLedState = RTW_LED_ON;
+			pLed0->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(pLed0->BlinkTimer), 0);
+			break;
+
+		case LED_CTL_POWER_OFF:
+			SwLedOff(padapter, pLed0);
+			break;
+
+		default:
+			break;
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("ledcontrol 6 Led %d\n", pLed0->CurrLedState));
+}
+
+
+//
+//	Description:	
+//		Dispatch LED action according to pHalData->LedStrategy. 
+//
+static void
+LedControl871x(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+	)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+
+       if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE) 
+	   	||(padapter->hw_init_completed == _FALSE) )	
+       {
+             return;
+       }
+
+
+	if( ledpriv->bRegUseLed == _FALSE)
+		return;
+
+	//if (!priv->up)
+	//	return;
+
+	//if(priv->bInHctTest)
+	//	return;
+
+	if( (padapter->pwrctrlpriv.rf_pwrstate != rf_on &&
+		padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) &&
+		(LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || 
+		 LedAction == LED_CTL_SITE_SURVEY || 
+		 LedAction == LED_CTL_LINK || 
+		 LedAction == LED_CTL_NO_LINK ||
+		 LedAction == LED_CTL_POWER_ON) )
+	{
+		return;
+	}
+	
+	switch(ledpriv->LedStrategy)
+	{
+		case SW_LED_MODE0:
+			//SwLedControlMode0(padapter, LedAction);
+			break;
+
+		case SW_LED_MODE1:
+			SwLedControlMode1(padapter, LedAction);
+			break;
+		case SW_LED_MODE2:
+			SwLedControlMode2(padapter, LedAction);
+                	break;
+
+		case SW_LED_MODE3:
+			SwLedControlMode3(padapter, LedAction);
+			break;	
+
+		case SW_LED_MODE4:
+			SwLedControlMode4(padapter, LedAction);
+			break;			
+
+		case SW_LED_MODE5:
+			SwLedControlMode5(padapter, LedAction);
+			break;
+
+		case SW_LED_MODE6:
+			SwLedControlMode6(padapter, LedAction);
+			break;
+
+		default:
+			break;
+	}
+	
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction));
+}
+
+//
+//	Description:
+//		Initialize all LED_871x objects.
+//
+void
+rtl8192cu_InitSwLeds(
+	_adapter	*padapter
+	)
+{
+	struct led_priv *pledpriv = &(padapter->ledpriv);
+
+	pledpriv->LedControlHandler = LedControl871x;
+
+	InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0);
+
+	InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1);
+}
+
+
+//
+//	Description:
+//		DeInitialize all LED_819xUsb objects.
+//
+void
+rtl8192cu_DeInitSwLeds(
+	_adapter	*padapter
+	)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+
+	DeInitLed871x( &(ledpriv->SwLed0) );
+	DeInitLed871x( &(ledpriv->SwLed1) );
+}
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/rtl8192cu_recv.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/rtl8192cu_recv.c
new file mode 100755
index 00000000..7dc6aac9
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/rtl8192cu_recv.c
@@ -0,0 +1,234 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTL8192CU_RECV_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <mlme_osdep.h>
+#include <ip.h>
+#include <if_ether.h>
+#include <ethernet.h>
+
+#include <usb_ops.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+#include <wifi.h>
+#include <circ_buf.h>
+
+#include <rtl8192c_hal.h>
+
+
+void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf)
+{
+
+	precvbuf->transfer_len = 0;
+
+	precvbuf->len = 0;
+
+	precvbuf->ref_cnt = 0;
+
+	if(precvbuf->pbuf)
+	{
+		precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf;
+		precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ;
+	}
+
+}
+
+int	rtl8192cu_init_recv_priv(_adapter *padapter)
+{
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	int	i, res = _SUCCESS;
+	struct recv_buf *precvbuf;
+
+#ifdef CONFIG_RECV_THREAD_MODE	
+	_rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed
+	_rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed
+#endif
+
+#ifdef PLATFORM_LINUX
+	tasklet_init(&precvpriv->recv_tasklet,
+	     (void(*)(unsigned long))rtl8192cu_recv_tasklet,
+	     (unsigned long)padapter);
+#endif
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+#ifdef PLATFORM_LINUX
+	precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL);
+	if(precvpriv->int_in_urb == NULL){
+		DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n");
+	}
+#endif
+	precvpriv->int_in_buf = rtw_zmalloc(sizeof(INTERRUPT_MSG_FORMAT_EX));
+	if(precvpriv->int_in_buf == NULL){
+		DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n");
+	}
+#endif
+
+	//init recv_buf
+	_rtw_init_queue(&precvpriv->free_recv_buf_queue);
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
+	_rtw_init_queue(&precvpriv->recv_buf_pending_queue);
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_RX
+
+	precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4);
+	if(precvpriv->pallocated_recv_buf==NULL){
+		res= _FAIL;
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n"));
+		goto exit;
+	}
+	_rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF *sizeof(struct recv_buf) + 4);
+
+	precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4);
+	//precvpriv->precv_buf = precvpriv->pallocated_recv_buf + 4 -
+	//						((uint) (precvpriv->pallocated_recv_buf) &(4-1));
+
+
+	precvbuf = (struct recv_buf*)precvpriv->precv_buf;
+
+	for(i=0; i < NR_RECVBUFF ; i++)
+	{
+		_rtw_init_listhead(&precvbuf->list);
+
+		_rtw_spinlock_init(&precvbuf->recvbuf_lock);
+
+		precvbuf->alloc_sz = MAX_RECVBUF_SZ;
+
+		res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf);
+		if(res==_FAIL)
+			break;
+
+		precvbuf->ref_cnt = 0;
+		precvbuf->adapter =padapter;
+
+
+		//rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue));
+
+		precvbuf++;
+
+	}
+
+	precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF;
+
+#ifdef PLATFORM_LINUX
+
+	skb_queue_head_init(&precvpriv->rx_skb_queue);
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+	{
+		int i;
+		SIZE_PTR tmpaddr=0;
+		SIZE_PTR alignment=0;
+		struct sk_buff *pskb=NULL;
+
+		skb_queue_head_init(&precvpriv->free_recv_skb_queue);
+
+		for(i=0; i<NR_PREALLOC_RECV_SKB; i++)
+		{
+
+	#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+			pskb = dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+	#else
+			pskb = netdev_alloc_skb(padapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+	#endif
+
+			if(pskb)
+			{
+				pskb->dev = padapter->pnetdev;
+
+				tmpaddr = (SIZE_PTR)pskb->data;
+				alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
+				skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
+
+				skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
+			}
+
+			pskb=NULL;
+
+		}
+	}
+#endif
+
+#endif
+
+exit:
+
+	return res;
+
+}
+
+void rtl8192cu_free_recv_priv (_adapter *padapter)
+{
+	int	i;
+	struct recv_buf	*precvbuf;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+
+	precvbuf = (struct recv_buf *)precvpriv->precv_buf;
+
+	for(i=0; i < NR_RECVBUFF ; i++)
+	{
+		rtw_os_recvbuf_resource_free(padapter, precvbuf);
+		precvbuf++;
+	}
+
+	if(precvpriv->pallocated_recv_buf)
+		rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4);
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+#ifdef PLATFORM_LINUX
+	if(precvpriv->int_in_urb)
+	{
+		usb_free_urb(precvpriv->int_in_urb);
+	}
+#endif
+	if(precvpriv->int_in_buf)
+		rtw_mfree(precvpriv->int_in_buf, sizeof(INTERRUPT_MSG_FORMAT_EX));
+#endif
+
+#ifdef PLATFORM_LINUX
+
+	if (skb_queue_len(&precvpriv->rx_skb_queue)) {
+		DBG_8192C(KERN_WARNING "rx_skb_queue not empty\n");
+	}
+
+	skb_queue_purge(&precvpriv->rx_skb_queue);
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+
+	if (skb_queue_len(&precvpriv->free_recv_skb_queue)) {
+		DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue));
+	}
+
+	skb_queue_purge(&precvpriv->free_recv_skb_queue);
+
+#endif
+
+#endif
+
+}
+
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/rtl8192cu_xmit.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/rtl8192cu_xmit.c
new file mode 100755
index 00000000..f9191c70
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/rtl8192cu_xmit.c
@@ -0,0 +1,1132 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTL8192C_XMIT_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+#include <wifi.h>
+#include <osdep_intf.h>
+#include <circ_buf.h>
+#include <usb_ops.h>
+#include <rtl8192c_hal.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+#error "Shall be Linux or Windows, but not both!\n"
+#endif
+
+
+s32	rtl8192cu_init_xmit_priv(_adapter *padapter)
+{
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+
+#ifdef PLATFORM_LINUX
+	tasklet_init(&pxmitpriv->xmit_tasklet,
+	     (void(*)(unsigned long))rtl8192cu_xmit_tasklet,
+	     (unsigned long)padapter);
+#endif
+	return _SUCCESS;
+}
+
+void	rtl8192cu_free_xmit_priv(_adapter *padapter)
+{
+}
+
+u32 rtw_get_ff_hwaddr(struct xmit_frame	*pxmitframe)
+{
+	u32 addr;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;	
+	
+	switch(pattrib->qsel)
+	{
+		case 0:
+		case 3:
+			addr = BE_QUEUE_INX;
+		 	break;
+		case 1:
+		case 2:
+			addr = BK_QUEUE_INX;
+			break;				
+		case 4:
+		case 5:
+			addr = VI_QUEUE_INX;
+			break;		
+		case 6:
+		case 7:
+			addr = VO_QUEUE_INX;
+			break;
+		case 0x10:
+			addr = BCN_QUEUE_INX;
+			break;
+		case 0x11://BC/MC in PS (HIQ)
+			addr = HIGH_QUEUE_INX;
+			break;
+		case 0x12:
+			addr = MGT_QUEUE_INX;
+			break;
+		default:
+			addr = BE_QUEUE_INX;
+			break;		
+			
+	}
+
+	return addr;
+
+}
+
+int urb_zero_packet_chk(_adapter *padapter, int sz)
+{
+	int blnSetTxDescOffset;
+	struct dvobj_priv	*pdvobj = adapter_to_dvobj(padapter);	
+
+	if ( pdvobj->ishighspeed )
+	{
+		if ( ( (sz + TXDESC_SIZE) % 512 ) == 0 ) {
+			blnSetTxDescOffset = 1;
+		} else {
+			blnSetTxDescOffset = 0;
+		}
+	}
+	else
+	{
+		if ( ( (sz + TXDESC_SIZE) % 64 ) == 0 ) 	{
+			blnSetTxDescOffset = 1;
+		} else {
+			blnSetTxDescOffset = 0;
+		}
+	}
+	
+	return blnSetTxDescOffset;
+	
+}
+
+void rtl8192cu_cal_txdesc_chksum(struct tx_desc	*ptxdesc)
+{
+		u16	*usPtr = (u16*)ptxdesc;
+		u32 count = 16;		// (32 bytes / 2 bytes per XOR) => 16 times
+		u32 index;
+		u16 checksum = 0;
+
+		//Clear first
+		ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
+	
+		for(index = 0 ; index < count ; index++){
+			checksum = checksum ^ le16_to_cpu(*(usPtr + index));
+		}
+
+		ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff&checksum);	
+
+}
+
+void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc)
+{
+	if ((pattrib->encrypt > 0) && !pattrib->bswenc)
+	{
+		switch (pattrib->encrypt)
+		{	
+			//SEC_TYPE
+			case _WEP40_:
+			case _WEP104_:
+					ptxdesc->txdw1 |= cpu_to_le32((0x01<<22)&0x00c00000);
+					break;				
+			case _TKIP_:
+			case _TKIP_WTMIC_:	
+					//ptxdesc->txdw1 |= cpu_to_le32((0x02<<22)&0x00c00000);
+					ptxdesc->txdw1 |= cpu_to_le32((0x01<<22)&0x00c00000);
+					break;
+			case _AES_:
+					ptxdesc->txdw1 |= cpu_to_le32((0x03<<22)&0x00c00000);
+					break;
+			case _NO_PRIVACY_:
+			default:
+					break;
+		
+		}
+		
+	}
+
+}
+
+static void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw)
+{
+	//DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode);	
+
+	switch(pattrib->vcs_mode)
+	{
+		case RTS_CTS:
+			*pdw |= cpu_to_le32(BIT(12));
+			break;
+		case CTS_TO_SELF:
+			*pdw |= cpu_to_le32(BIT(11));
+			break;
+		case NONE_VCS:
+		default:
+			break;		
+	}
+
+	if(pattrib->vcs_mode) {
+		*pdw |= cpu_to_le32(BIT(13));
+
+		// Set RTS BW
+		if(pattrib->ht_en)
+		{
+			*pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)?	cpu_to_le32(BIT(27)):0;
+
+			if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
+				*pdw |= cpu_to_le32((0x01<<28)&0x30000000);
+			else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
+				*pdw |= cpu_to_le32((0x02<<28)&0x30000000);
+			else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
+				*pdw |= 0;
+			else
+				*pdw |= cpu_to_le32((0x03<<28)&0x30000000);
+		}
+	}
+}
+
+static void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw)
+{
+	//DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset);
+
+	if(pattrib->ht_en)
+	{
+		*pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)?	cpu_to_le32(BIT(25)):0;
+
+		if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
+			*pdw |= cpu_to_le32((0x01<<20)&0x00300000);
+		else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
+			*pdw |= cpu_to_le32((0x02<<20)&0x00300000);
+		else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
+			*pdw |= 0;
+		else
+			*pdw |= cpu_to_le32((0x03<<20)&0x00300000);
+	}
+}
+
+static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bagg_pkt)
+{
+	int	pull=0;
+	uint	qsel;
+	_adapter			*padapter = pxmitframe->padapter;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;		
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct tx_desc	*ptxdesc = (struct tx_desc *)pmem;
+	struct ht_priv		*phtpriv = &pmlmepriv->htpriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	sint	bmcst = IS_MCAST(pattrib->ra);
+#ifdef CONFIG_P2P
+	struct wifidirect_info*	pwdinfo = &padapter->wdinfo;
+#endif //CONFIG_P2P
+
+#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
+	if((_FALSE == bagg_pkt) && (urb_zero_packet_chk(padapter, sz)==0))
+	{
+		ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ);
+		pull = 1;
+		pxmitframe->pkt_offset --;
+	}
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_TX
+
+	_rtw_memset(ptxdesc, 0, sizeof(struct tx_desc));
+
+	if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
+	{
+		//DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n");			
+
+		//offset 4
+		ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f);
+
+		qsel = (uint)(pattrib->qsel & 0x0000001f);
+		ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
+
+		ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000);
+
+		fill_txdesc_sectype(pattrib, ptxdesc);
+
+		if(pattrib->ampdu_en==_TRUE)
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(5));//AGG EN
+		else
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
+		
+		//offset 8
+
+
+		//offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
+
+
+		//offset 16 , offset 20
+		if (pattrib->qos_en)
+			ptxdesc->txdw4 |= cpu_to_le32(BIT(6));//QoS
+
+		if ((pattrib->ether_type != 0x888e) && (pattrib->ether_type != 0x0806) && (pattrib->dhcp_pkt != 1))
+		{
+              	//Non EAP & ARP & DHCP type data packet
+              	
+			fill_txdesc_vcs(pattrib, &ptxdesc->txdw4);
+			fill_txdesc_phy(pattrib, &ptxdesc->txdw4);
+
+			ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M
+			ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);//
+			//ptxdesc->txdw5 |= cpu_to_le32(0x0000000b);//DataRate - 54M
+
+			//use REG_INIDATA_RATE_SEL value
+			ptxdesc->txdw5 |= cpu_to_le32(pdmpriv->INIDATA_RATE[pattrib->mac_id]);
+
+              	if(0)//for driver dbg
+			{
+				ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+				
+				if(pattrib->ht_en)
+					ptxdesc->txdw5 |= cpu_to_le32(BIT(6));//SGI
+
+				ptxdesc->txdw5 |= cpu_to_le32(0x00000013);//init rate - mcs7
+			}
+
+		}
+		else
+		{
+			// EAP data packet and ARP packet.
+			// Use the 1M data rate to send the EAP/ARP packet.
+			// This will maybe make the handshake smooth.
+
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
+			
+		   	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+			if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
+				ptxdesc->txdw4 |= cpu_to_le32(BIT(24));// DATA_SHORT
+
+			ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
+		}
+		
+		//offset 24
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
+		if ( pattrib->hw_tcp_csum == 1 ) {
+			// ptxdesc->txdw6 = 0; // clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!!
+			u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8;
+			ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16);
+			DBG_8192C("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7);
+		}
+#endif
+	}
+	else if((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG)
+	{
+		//DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n");	
+		
+		//offset 4		
+		ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f);
+		
+		qsel = (uint)(pattrib->qsel&0x0000001f);
+		ptxdesc->txdw1 |= cpu_to_le32((qsel<<QSEL_SHT)&0x00001f00);
+
+		ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000);
+		
+		//fill_txdesc_sectype(pattrib, ptxdesc);
+		
+		//offset 8		
+#ifdef CONFIG_XMIT_ACK
+		//CCX-TXRPT ack for xmit mgmt frames.
+		if (pxmitframe->ack_report) {
+			ptxdesc->txdw2 |= cpu_to_le32(BIT(19));
+			#ifdef DBG_CCX
+			DBG_871X("%s set ccx\n", __func__);
+			#endif
+		}
+#endif //CONFIG_XMIT_ACK
+
+		//offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
+		
+		//offset 16
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+		
+		//offset 20
+		ptxdesc->txdw5 |= cpu_to_le32(BIT(17));//retry limit enable
+		if(pattrib->retry_ctrl == _TRUE)
+		{
+#ifdef CONFIG_P2P
+			if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
+			{
+				ptxdesc->txdw5 |= cpu_to_le32(0x00080000);//retry limit = 2
+			}
+			else
+#endif //CONFIG_P2P
+				ptxdesc->txdw5 |= cpu_to_le32(0x00180000);//retry limit = 6			
+		}
+		else
+			ptxdesc->txdw5 |= cpu_to_le32(0x00300000);//retry limit = 12
+
+#ifdef CONFIG_INTEL_PROXIM
+		if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){
+			printk("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate);
+			ptxdesc->txdw5 |= cpu_to_le32( pattrib->rate);
+		}
+		else
+#endif
+		{
+			ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
+		}
+	}
+	else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG)
+	{
+		DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
+	}
+#ifdef CONFIG_MP_INCLUDED
+	else if((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG)
+	{
+		fill_txdesc_for_mp(padapter, ptxdesc);
+	}
+#endif
+	else
+	{
+		DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
+		
+		//offset 4	
+		ptxdesc->txdw1 |= cpu_to_le32((4)&0x1f);//CAM_ID(MAC_ID)
+		
+		ptxdesc->txdw1 |= cpu_to_le32((6<< 16) & 0x000f0000);//raid
+		
+		//offset 8		
+
+		//offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
+		
+		//offset 16
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+		
+		//offset 20
+		ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
+	}
+
+	// 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS.
+	// (1) The sequence number of each non-Qos frame / broadcast / multicast /
+	// mgnt frame should be controled by Hw because Fw will also send null data
+	// which we cannot control when Fw LPS enable.
+	// --> default enable non-Qos data sequense number. 2010.06.23. by tynli.
+	// (2) Enable HW SEQ control for beacon packet, because we use Hw beacon.
+	// (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets.
+	// 2010.06.23. Added by tynli.
+	if(!pattrib->qos_en)
+	{		
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
+		ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
+	}
+
+	//offset 0
+	ptxdesc->txdw0 |= cpu_to_le32(sz&0x0000ffff);
+	ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
+	ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);//32 bytes for TX Desc
+
+	if(bmcst)	
+	{
+		ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
+	}	
+
+	RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("offset0-txdesc=0x%x\n", ptxdesc->txdw0));
+
+	//offset 4
+	// pkt_offset, unit:8 bytes padding
+	if (pxmitframe->pkt_offset > 0)
+		ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000);
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	if (pxmitframe->agg_num > 1)
+		ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << 24) & 0xff000000);
+#endif
+
+	rtl8192cu_cal_txdesc_chksum(ptxdesc);
+		
+	return pull;
+		
+}
+
+static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	s32 ret = _SUCCESS;
+	s32 inner_ret = _SUCCESS;
+	int t, sz, w_sz, pull=0;
+	u8 *mem_addr;
+	u32 ff_hwaddr;
+	struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+
+	if ((pxmitframe->frame_tag == DATA_FRAMETAG) &&
+	    (pxmitframe->attrib.ether_type != 0x0806) &&
+	    (pxmitframe->attrib.ether_type != 0x888e) &&
+	    (pxmitframe->attrib.dhcp_pkt != 1))
+	{
+		rtw_issue_addbareq_cmd(padapter, pxmitframe);
+	}
+	
+	mem_addr = pxmitframe->buf_addr;
+
+       RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_dump_xframe()\n"));
+	
+	for (t = 0; t < pattrib->nr_frags; t++)
+	{
+		if (inner_ret != _SUCCESS && ret == _SUCCESS)
+			ret = _FAIL;
+
+		if (t != (pattrib->nr_frags - 1))
+		{
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("pattrib->nr_frags=%d\n", pattrib->nr_frags));
+
+			sz = pxmitpriv->frag_len;
+			sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len);					
+		}
+		else //no frag
+		{
+			sz = pattrib->last_txcmdsz;
+		}
+
+		pull = update_txdesc(pxmitframe, mem_addr, sz, _FALSE);
+		
+		if(pull)
+		{
+			mem_addr += PACKET_OFFSET_SZ; //pull txdesc head
+			
+			//pxmitbuf ->pbuf = mem_addr;			
+			pxmitframe->buf_addr = mem_addr;
+
+			w_sz = sz + TXDESC_SIZE;
+		}
+		else
+		{
+			w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ;
+		}	
+
+		ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe);
+		
+		inner_ret = rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf);
+
+		rtw_count_tx_stats(padapter, pxmitframe, sz);
+
+
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_write_port, w_sz=%d\n", w_sz));
+		//DBG_8192C("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority);      
+
+		mem_addr += w_sz;
+
+		mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr)));
+
+	}
+	
+	rtw_free_xmitframe(pxmitpriv, pxmitframe);
+
+	if  (ret != _SUCCESS)
+		rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN);
+
+	return ret;
+}
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+static u32 xmitframe_need_length(struct xmit_frame *pxmitframe)
+{
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+
+	u32	len = 0;
+
+	// no consider fragement
+	len = pattrib->hdrlen + pattrib->iv_len +
+		SNAP_SIZE + sizeof(u16) +
+		pattrib->pktlen +
+		((pattrib->bswenc) ? pattrib->icv_len : 0);
+
+	if(pattrib->encrypt ==_TKIP_)
+		len += 8;
+
+	return len;
+}
+
+#define IDEA_CONDITION 1	// check all packets before enqueue
+s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct xmit_frame *pxmitframe = NULL;
+	struct xmit_frame *pfirstframe = NULL;
+
+	// aggregate variable
+	struct hw_xmit *phwxmit;
+	struct sta_info *psta = NULL;
+	struct tx_servq *ptxservq = NULL;
+
+	_irqL irqL;
+	_list *xmitframe_plist = NULL, *xmitframe_phead = NULL;
+
+	u32	pbuf;	// next pkt address
+	u32	pbuf_tail;	// last pkt tail
+	u32	len;	// packet length, except TXDESC_SIZE and PKT_OFFSET
+
+	u32	bulkSize = pHalData->UsbBulkOutSize;
+	u8	descCount;
+	u32	bulkPtr;
+
+	// dump frame variable
+	u32 ff_hwaddr;
+
+#ifndef IDEA_CONDITION
+	int res = _SUCCESS;
+#endif
+
+	RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n"));
+
+
+	// check xmitbuffer is ok
+	if (pxmitbuf == NULL) {
+		pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
+		if (pxmitbuf == NULL) return _FALSE;
+	}
+
+
+	//3 1. pick up first frame
+	do {
+		rtw_free_xmitframe(pxmitpriv, pxmitframe);
+			
+		pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
+		if (pxmitframe == NULL) {
+			// no more xmit frame, release xmit buffer
+			rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+			return _FALSE;
+		}
+
+
+#ifndef IDEA_CONDITION
+		if (pxmitframe->frame_tag != DATA_FRAMETAG) {
+			RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
+				 ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n",
+				  pxmitframe->frame_tag, DATA_FRAMETAG));
+//			rtw_free_xmitframe(pxmitpriv, pxmitframe);
+			continue;
+		}
+
+		// TID 0~15
+		if ((pxmitframe->attrib.priority < 0) ||
+		    (pxmitframe->attrib.priority > 15)) {
+			RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
+				 ("xmitframe_complete: TID(%d) should be 0~15!\n",
+				  pxmitframe->attrib.priority));
+//			rtw_free_xmitframe(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+		pxmitframe->pxmitbuf = pxmitbuf;
+		pxmitframe->buf_addr = pxmitbuf->pbuf;
+		pxmitbuf->priv_data = pxmitframe;
+
+		//pxmitframe->agg_num = 1; // alloc xmitframe should assign to 1.
+		pxmitframe->pkt_offset = 1; // first frame of aggregation, reserve offset
+
+#ifdef IDEA_CONDITION
+		rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+#else
+		res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+		if (res == _FALSE) {
+//			rtw_free_xmitframe(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+		// always return ndis_packet after rtw_xmitframe_coalesce
+		rtw_os_xmit_complete(padapter, pxmitframe);
+
+		break;
+	} while (1);
+
+	//3 2. aggregate same priority and same DA(AP or STA) frames
+	pfirstframe = pxmitframe;
+	len = xmitframe_need_length(pfirstframe) + TXDESC_OFFSET;
+	pbuf_tail = len;
+	pbuf = _RND8(pbuf_tail);
+
+	// check pkt amount in one bluk
+	descCount = 0;
+	bulkPtr = bulkSize;
+	if (pbuf < bulkPtr)
+		descCount++;
+	else {
+		descCount = 0;
+		bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; // round to next bulkSize
+	}
+
+	// dequeue same priority packet from station tx queue
+	psta = pfirstframe->attrib.psta;
+	switch (pfirstframe->attrib.priority) {
+		case 1:
+		case 2:
+			ptxservq = &(psta->sta_xmitpriv.bk_q);
+			phwxmit = pxmitpriv->hwxmits + 3;
+			break;
+
+		case 4:
+		case 5:
+			ptxservq = &(psta->sta_xmitpriv.vi_q);
+			phwxmit = pxmitpriv->hwxmits + 1;
+			break;
+
+		case 6:
+		case 7:
+			ptxservq = &(psta->sta_xmitpriv.vo_q);
+			phwxmit = pxmitpriv->hwxmits;
+			break;
+
+		case 0:
+		case 3:
+		default:
+			ptxservq = &(psta->sta_xmitpriv.be_q);
+			phwxmit = pxmitpriv->hwxmits + 2;
+			break;
+	}
+
+	_enter_critical_bh(&pxmitpriv->lock, &irqL);
+
+	xmitframe_phead = get_list_head(&ptxservq->sta_pending);
+	xmitframe_plist = get_next(xmitframe_phead);
+	while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE)
+	{
+		pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
+		xmitframe_plist = get_next(xmitframe_plist);
+
+		len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE; // no offset
+		if (pbuf + len > MAX_XMITBUF_SZ) break;
+
+		rtw_list_delete(&pxmitframe->list);
+		ptxservq->qcnt--;
+		phwxmit->accnt--;
+
+#ifndef IDEA_CONDITION
+		// suppose only data frames would be in queue
+		if (pxmitframe->frame_tag != DATA_FRAMETAG) {
+			RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
+				 ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n",
+				  pxmitframe->frame_tag, DATA_FRAMETAG));
+			rtw_free_xmitframe(pxmitpriv, pxmitframe);
+			continue;
+		}
+
+		// TID 0~15
+		if ((pxmitframe->attrib.priority < 0) ||
+		    (pxmitframe->attrib.priority > 15)) {
+			RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
+				 ("xmitframe_complete: TID(%d) should be 0~15!\n",
+				  pxmitframe->attrib.priority));
+			rtw_free_xmitframe(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+//		pxmitframe->pxmitbuf = pxmitbuf;
+		pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf;
+
+		pxmitframe->agg_num = 0; // not first frame of aggregation
+		pxmitframe->pkt_offset = 0; // not first frame of aggregation, no need to reserve offset
+
+#ifdef IDEA_CONDITION
+		rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+#else
+		res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+		if (res == _FALSE) {
+			rtw_free_xmitframe(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+		// always return ndis_packet after rtw_xmitframe_coalesce
+		rtw_os_xmit_complete(padapter, pxmitframe);
+
+		// (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz
+		update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz, _TRUE);
+
+		// don't need xmitframe any more
+		rtw_free_xmitframe(pxmitpriv, pxmitframe);
+
+		// handle pointer and stop condition
+		pbuf_tail = pbuf + len;
+		pbuf = _RND8(pbuf_tail);
+
+		pfirstframe->agg_num++;
+		if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num)
+			break;
+
+		if (pbuf < bulkPtr) {
+			descCount++;
+			if (descCount == pHalData->UsbTxAggDescNum)
+				break;
+		} else {
+			descCount = 0;
+			bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize;
+		}
+	}
+	if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE)
+		rtw_list_delete(&ptxservq->tx_pending);
+
+	_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+	if ((pfirstframe->attrib.ether_type != 0x0806) &&
+	    (pfirstframe->attrib.ether_type != 0x888e) &&
+	    (pfirstframe->attrib.dhcp_pkt != 1))
+	{
+		rtw_issue_addbareq_cmd(padapter, pfirstframe);
+	}
+
+#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
+	//3 3. update first frame txdesc
+	if ((pbuf_tail % bulkSize) == 0) {
+		// remove pkt_offset
+		pbuf_tail -= PACKET_OFFSET_SZ;
+		pfirstframe->buf_addr += PACKET_OFFSET_SZ;
+		pfirstframe->pkt_offset = 0;
+	}
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_TX
+	update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz, _TRUE);
+
+	//3 4. write xmit buffer to USB FIFO
+	ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe);
+
+	// xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr
+	rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf);
+
+
+	//3 5. update statisitc
+	pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE);
+	if (pfirstframe->pkt_offset == 1) pbuf_tail -= PACKET_OFFSET_SZ;
+	
+	rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail);
+
+	rtw_free_xmitframe(pxmitpriv, pfirstframe);
+
+	return _TRUE;
+}
+
+#else
+
+s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
+{		
+
+	struct hw_xmit *phwxmits;
+	sint hwentry;
+	struct xmit_frame *pxmitframe=NULL;	
+	int res=_SUCCESS, xcnt = 0;
+
+	phwxmits = pxmitpriv->hwxmits;
+	hwentry = pxmitpriv->hwxmit_entry;
+
+	RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete()\n"));
+
+	if(pxmitbuf==NULL)
+	{
+		pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);		
+		if(!pxmitbuf)
+		{
+			return _FALSE;
+		}			
+	}	
+
+
+	do
+	{		
+		pxmitframe =  rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry);
+		
+		if(pxmitframe)
+		{
+			pxmitframe->pxmitbuf = pxmitbuf;				
+
+			pxmitframe->buf_addr = pxmitbuf->pbuf;
+
+			pxmitbuf->priv_data = pxmitframe;	
+
+			if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
+			{	
+				if(pxmitframe->attrib.priority<=15)//TID0~15
+				{
+					res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+				}	
+							
+				rtw_os_xmit_complete(padapter, pxmitframe);//always return ndis_packet after rtw_xmitframe_coalesce 			
+			}
+
+				
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete(): rtw_dump_xframe\n"));
+
+			
+			if(res == _SUCCESS)
+			{
+				rtw_dump_xframe(padapter, pxmitframe);
+			}
+			else
+			{
+				rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+				rtw_free_xmitframe(pxmitpriv, pxmitframe);	
+			}
+	 			 		
+			xcnt++;
+			
+		}
+		else
+		{			
+			rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+			return _FALSE;
+		}
+
+		break;
+		
+	}while(0/*xcnt < (NR_XMITFRAME >> 3)*/);
+
+	return _TRUE;
+	
+}
+#endif
+
+
+
+static s32 xmitframe_direct(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	s32 res = _SUCCESS;
+
+
+	res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+	if (res == _SUCCESS) {
+		rtw_dump_xframe(padapter, pxmitframe);
+	}
+
+	return res;
+}
+
+/*
+ * Return
+ *	_TRUE	dump packet directly
+ *	_FALSE	enqueue packet
+ */
+static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+        _irqL irqL;
+	s32 res;
+	struct xmit_buf *pxmitbuf = NULL;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	
+	
+	_enter_critical_bh(&pxmitpriv->lock, &irqL);
+
+
+	if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0)
+		goto enqueue;
+
+
+	if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE)
+		goto enqueue;
+
+#ifdef CONFIG_CONCURRENT_MODE	
+	if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE)
+		goto enqueue;
+#endif
+
+	pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
+	if (pxmitbuf == NULL)
+		goto enqueue;
+
+	_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+	pxmitframe->pxmitbuf = pxmitbuf;
+	pxmitframe->buf_addr = pxmitbuf->pbuf;
+	pxmitbuf->priv_data = pxmitframe;
+
+	if (xmitframe_direct(padapter, pxmitframe) != _SUCCESS) {
+		rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+		rtw_free_xmitframe(pxmitpriv, pxmitframe);
+	}
+
+	return _TRUE;
+
+enqueue:
+	res = rtw_xmitframe_enqueue(padapter, pxmitframe);
+	_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+	if (res != _SUCCESS) {
+		RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n"));
+		rtw_free_xmitframe(pxmitpriv, pxmitframe);
+
+		// Trick, make the statistics correct
+		pxmitpriv->tx_pkts--;
+		pxmitpriv->tx_drop++;
+		return _TRUE;
+	}
+
+	return _FALSE;
+}
+
+s32 rtl8192cu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe)
+{
+	return rtw_dump_xframe(padapter, pmgntframe);
+}
+
+/*
+ * Return
+ *	_TRUE	dump packet directly ok
+ *	_FALSE	temporary can't transmit packets to hardware
+ */
+s32 rtl8192cu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	return pre_xmitframe(padapter, pxmitframe);
+}
+
+#ifdef  CONFIG_HOSTAPD_MLME
+
+static void rtl8192cu_hostap_mgnt_xmit_cb(struct urb *urb)
+{	
+#ifdef PLATFORM_LINUX
+	struct sk_buff *skb = (struct sk_buff *)urb->context;
+
+	//DBG_8192C("%s\n", __FUNCTION__);
+
+	dev_kfree_skb_any(skb);
+#endif	
+}
+
+s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
+{
+#ifdef PLATFORM_LINUX
+	u16 fc;
+	int rc, len, pipe;	
+	unsigned int bmcst, tid, qsel;
+	struct sk_buff *skb, *pxmit_skb;
+	struct urb *urb;
+	unsigned char *pxmitbuf;
+	struct tx_desc *ptxdesc;
+	struct rtw_ieee80211_hdr *tx_hdr;
+	struct hostapd_priv *phostapdpriv = padapter->phostapdpriv;	
+	struct net_device *pnetdev = padapter->pnetdev;
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
+	struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);	
+
+	
+	//DBG_8192C("%s\n", __FUNCTION__);
+
+	skb = pkt;
+	
+	len = skb->len;
+	tx_hdr = (struct rtw_ieee80211_hdr *)(skb->data);
+	fc = le16_to_cpu(tx_hdr->frame_ctl);
+	bmcst = IS_MCAST(tx_hdr->addr1);
+
+	if ((fc & RTW_IEEE80211_FCTL_FTYPE) != RTW_IEEE80211_FTYPE_MGMT)
+		goto _exit;
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+	pxmit_skb = dev_alloc_skb(len + TXDESC_SIZE);			
+#else			
+	pxmit_skb = netdev_alloc_skb(pnetdev, len + TXDESC_SIZE);
+#endif		
+
+	if(!pxmit_skb)
+		goto _exit;
+
+	pxmitbuf = pxmit_skb->data;
+
+	urb = usb_alloc_urb(0, GFP_ATOMIC);
+	if (!urb) {
+		goto _exit;
+	}
+
+	// ----- fill tx desc -----	
+	ptxdesc = (struct tx_desc *)pxmitbuf;	
+	_rtw_memset(ptxdesc, 0, sizeof(*ptxdesc));
+		
+	//offset 0	
+	ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff); 
+	ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);//default = 32 bytes for TX Desc
+	ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
+
+	if(bmcst)	
+	{
+		ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
+	}	
+
+	//offset 4	
+	ptxdesc->txdw1 |= cpu_to_le32(0x00);//MAC_ID
+
+	ptxdesc->txdw1 |= cpu_to_le32((0x12<<QSEL_SHT)&0x00001f00);
+
+	ptxdesc->txdw1 |= cpu_to_le32((0x06<< 16) & 0x000f0000);//b mode
+
+	//offset 8			
+
+	//offset 12		
+	ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl)<<16)&0xffff0000);
+
+	//offset 16		
+	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+		
+	//offset 20
+
+
+	//HW append seq
+	ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
+	ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
+	
+
+	rtl8192cu_cal_txdesc_chksum(ptxdesc);
+	// ----- end of fill tx desc -----
+
+	//
+	skb_put(pxmit_skb, len + TXDESC_SIZE);
+	pxmitbuf = pxmitbuf + TXDESC_SIZE;
+	_rtw_memcpy(pxmitbuf, skb->data, len);
+
+	//DBG_8192C("mgnt_xmit, len=%x\n", pxmit_skb->len);
+
+
+	// ----- prepare urb for submit -----
+	
+	//translate DMA FIFO addr to pipehandle
+	//pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX);
+	pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX]&0x0f);
+	
+	usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe,
+			  pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb);
+	
+	urb->transfer_flags |= URB_ZERO_PACKET;
+	usb_anchor_urb(urb, &phostapdpriv->anchored);
+	rc = usb_submit_urb(urb, GFP_ATOMIC);
+	if (rc < 0) {
+		usb_unanchor_urb(urb);
+		kfree_skb(skb);
+	}
+	usb_free_urb(urb);
+
+	
+_exit:	
+	
+	dev_kfree_skb_any(skb);
+
+#endif
+
+	return 0;
+
+}
+#endif
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/usb_halinit.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/usb_halinit.c
new file mode 100755
index 00000000..e0dd3bf9
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/usb_halinit.c
@@ -0,0 +1,6242 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _HCI_HAL_INIT_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_efuse.h>
+
+#include <rtl8192c_hal.h>
+#include <rtl8192c_led.h>
+
+#ifdef DBG_CONFIG_ERROR_DETECT
+#include "rtl8192c_sreset.h"
+#endif
+
+#ifdef CONFIG_IOL
+#include <rtw_iol.h>
+#endif
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+#ifndef CONFIG_USB_HCI
+
+#error "CONFIG_USB_HCI shall be on!\n"
+
+#endif
+
+#include <usb_ops.h>
+#include <usb_hal.h>
+#include <usb_osintf.h>
+
+#if DISABLE_BB_RF
+	#define		HAL_MAC_ENABLE	0
+	#define		HAL_BB_ENABLE		0
+	#define		HAL_RF_ENABLE		0
+#else
+	#define		HAL_MAC_ENABLE	1
+	#define		HAL_BB_ENABLE		1
+	#define		HAL_RF_ENABLE		1
+#endif
+
+//endpoint number 1,2,3,4,5
+// bult in : 1
+// bult out: 2 (High)
+// bult out: 3 (Normal) for 3 out_ep, (Low) for 2 out_ep
+// interrupt in: 4
+// bult out: 5 (Low) for 3 out_ep
+
+
+static VOID
+_OneOutEpMapping(
+	IN	HAL_DATA_TYPE	*pHalData
+	)
+{
+	//only endpoint number 0x02
+
+	pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+	pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI
+	pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[0];//BE
+	pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[0];//BK
+	
+	pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN
+	pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+	pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH
+	pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD
+}
+
+
+static VOID
+_TwoOutEpMapping(
+	IN	HAL_DATA_TYPE	*pHalData,
+	IN	BOOLEAN	 		bWIFICfg
+	)
+{
+
+/*
+#define VO_QUEUE_INX		0
+#define VI_QUEUE_INX		1
+#define BE_QUEUE_INX		2
+#define BK_QUEUE_INX		3
+#define BCN_QUEUE_INX	4
+#define MGT_QUEUE_INX	5
+#define HIGH_QUEUE_INX	6
+#define TXCMD_QUEUE_INX	7
+*/
+	if(bWIFICfg){ // Normal chip && wmm
+		
+		//	BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  0, 	1, 	0, 	1, 	0, 	0, 	0, 	0, 		0	};
+		//0:H(end_number=0x02), 1:L (end_number=0x03)
+
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[1];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[1];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[0];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD
+	}
+	else{//typical setting
+		
+		//BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  1, 	1, 	0, 	0, 	0, 	0, 	0, 	0, 		0	};			
+		//0:H(end_number=0x02), 1:L (end_number=0x03)
+
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[1];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[1];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD
+	}
+	
+}
+
+
+static VOID _ThreeOutEpMapping(
+	IN	HAL_DATA_TYPE	*pHalData,
+	IN	BOOLEAN	 		bWIFICfg
+	)
+{
+	if(bWIFICfg){//for WMM
+
+		//	BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  1, 	2, 	1, 	0, 	0, 	0, 	0, 	0, 		0	};
+		//0:H(end_number=0x02), 1:N(end_number=0x03), 2:L (end_number=0x05)
+
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[1];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[2];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[1];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD
+	}
+	else{//typical setting
+
+		//	BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  2, 	2, 	1, 	0, 	0, 	0, 	0, 	0, 		0	};			
+		//0:H(end_number=0x02), 1:N(end_number=0x03), 2:L (end_number=0x05)
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[1];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[2];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[2];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD
+	}
+
+}
+
+static BOOLEAN
+_MappingOutEP(
+	IN	PADAPTER	pAdapter,
+	IN	u8		NumOutPipe
+	)
+{		
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct registry_priv *pregistrypriv = &pAdapter->registrypriv;
+
+	BOOLEAN	 bWIFICfg = (pregistrypriv->wifi_spec) ?_TRUE:_FALSE;
+	
+	BOOLEAN result = _TRUE;
+
+	switch(NumOutPipe)
+	{
+		case 2:
+			_TwoOutEpMapping(pHalData, bWIFICfg);
+			break;
+		case 3:		
+			_ThreeOutEpMapping(pHalData, bWIFICfg);
+			break;
+		case 1:
+			_OneOutEpMapping(pHalData);
+			break;
+		default:
+			result = _FALSE;
+			break;
+	}
+
+	return result;
+	
+}
+
+static VOID
+_ConfigChipOutEP(
+	IN	PADAPTER	pAdapter,
+	IN	u8		NumOutPipe
+	)
+{
+	u8			value8;
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(pAdapter);
+
+	pHalData->OutEpQueueSel = 0;
+	pHalData->OutEpNumber	= 0;
+		
+	// Normal and High queue
+	value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 1));
+	
+	if(value8 & USB_NORMAL_SIE_EP_MASK){
+		pHalData->OutEpQueueSel |= TX_SELE_HQ;
+		pHalData->OutEpNumber++;
+	}
+	
+	if((value8 >> USB_NORMAL_SIE_EP_SHIFT) & USB_NORMAL_SIE_EP_MASK){
+		pHalData->OutEpQueueSel |= TX_SELE_NQ;
+		pHalData->OutEpNumber++;
+	}
+	
+	// Low queue
+	value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 2));
+	if(value8 & USB_NORMAL_SIE_EP_MASK){
+		pHalData->OutEpQueueSel |= TX_SELE_LQ;
+		pHalData->OutEpNumber++;
+	}
+
+	// TODO: Error recovery for this case
+	//RT_ASSERT((NumOutPipe == pHalData->OutEpNumber), ("Out EP number isn't match! %d(Descriptor) != %d (SIE reg)\n", (u4Byte)NumOutPipe, (u4Byte)pHalData->OutEpNumber));
+
+}
+
+static BOOLEAN HalUsbSetQueuePipeMapping8192CUsb(
+	IN	PADAPTER	pAdapter,
+	IN	u8		NumInPipe,
+	IN	u8		NumOutPipe
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(pAdapter);
+	BOOLEAN			result		= _FALSE;
+
+	_ConfigChipOutEP(pAdapter, NumOutPipe);
+
+	// Normal chip with one IN and one OUT doesn't have interrupt IN EP.
+	if(1 == pHalData->OutEpNumber){
+		if(1 != NumInPipe){
+			return result;
+		}
+	}
+
+	result = _MappingOutEP(pAdapter, NumOutPipe);
+	
+	return result;
+
+}
+
+void rtl8192cu_interface_configure(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
+	struct dvobj_priv	*pdvobjpriv = adapter_to_dvobj(padapter);
+
+	if (pdvobjpriv->ishighspeed == _TRUE)
+	{
+		pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;//512 bytes
+	}
+	else
+	{
+		pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;//64 bytes
+	}
+
+	pHalData->interfaceIndex = pdvobjpriv->InterfaceNumber;
+	pHalData->RtBulkInPipe = pdvobjpriv->ep_num[0];
+	pHalData->RtBulkOutPipe[0] = pdvobjpriv->ep_num[1];
+	pHalData->RtBulkOutPipe[1] = pdvobjpriv->ep_num[2];
+	pHalData->RtIntInPipe = pdvobjpriv->ep_num[3];
+	pHalData->RtBulkOutPipe[2] = pdvobjpriv->ep_num[4];
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	pHalData->UsbTxAggMode		= 1;
+	pHalData->UsbTxAggDescNum	= 0x6;	// only 4 bits
+#endif
+
+#ifdef CONFIG_USB_RX_AGGREGATION
+	pHalData->UsbRxAggMode		= USB_RX_AGG_DMA;// USB_RX_AGG_DMA;
+	pHalData->UsbRxAggBlockCount	= 8; //unit : 512b
+	pHalData->UsbRxAggBlockTimeout	= 0x6;
+	pHalData->UsbRxAggPageCount	= 48; //uint :128 b //0x0A;	// 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize
+	pHalData->UsbRxAggPageTimeout	= 0x4; //6, absolute time = 34ms/(2^6)
+#endif
+
+	HalUsbSetQueuePipeMapping8192CUsb(padapter,
+				pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
+
+}
+
+static u8 _InitPowerOn(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	u8	ret = _SUCCESS;
+	u16	value16=0;
+	u8	value8 = 0;
+	u32  value32 = 0;
+
+	// polling autoload done.
+	u32	pollingCount = 0;
+
+	do
+	{
+		if(rtw_read8(padapter, REG_APS_FSMCO) & PFM_ALDN){
+			//RT_TRACE(COMP_INIT,DBG_LOUD,("Autoload Done!\n"));
+			break;
+		}
+
+		if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){
+			//RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling REG_APS_FSMCO[PFM_ALDN] done!\n"));
+			return _FAIL;
+		}
+				
+	}while(_TRUE);
+
+
+//	For hardware power on sequence.
+
+	//0.	RSV_CTRL 0x1C[7:0] = 0x00			// unlock ISO/CLK/Power control register
+	rtw_write8(padapter, REG_RSV_CTRL, 0x0);	
+	// Power on when re-enter from IPS/Radio off/card disable
+	rtw_write8(padapter, REG_SPS0_CTRL, 0x2b);//enable SPS into PWM mode
+/*
+	value16 = PlatformIORead2Byte(Adapter, REG_AFE_XTAL_CTRL);//enable AFE clock
+	value16 &=  (~XTAL_GATE_AFE);
+	PlatformIOWrite2Byte(Adapter,REG_AFE_XTAL_CTRL, value16 );		
+*/
+	
+	rtw_udelay_os(100);//PlatformSleepUs(150);//this is not necessary when initially power on
+
+	value8 = rtw_read8(padapter, REG_LDOV12D_CTRL);	
+	if(0== (value8 & LDV12_EN) ){
+		value8 |= LDV12_EN;
+		rtw_write8(padapter, REG_LDOV12D_CTRL, value8);	
+		//RT_TRACE(COMP_INIT, DBG_LOUD, (" power-on :REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",value8));
+		rtw_udelay_os(100);//PlatformSleepUs(100);//this is not necessary when initially power on
+		value8 = rtw_read8(padapter, REG_SYS_ISO_CTRL);
+		value8 &= ~ISO_MD2PP;
+		rtw_write8(padapter, REG_SYS_ISO_CTRL, value8);			
+	}	
+	
+	// auto enable WLAN
+	pollingCount = 0;
+	value16 = rtw_read16(padapter, REG_APS_FSMCO);
+	value16 |= APFM_ONMAC;
+	rtw_write16(padapter, REG_APS_FSMCO, value16);
+
+	do
+	{
+		if(0 == (rtw_read16(padapter, REG_APS_FSMCO) & APFM_ONMAC)){
+			//RT_TRACE(COMP_INIT,DBG_LOUD,("MAC auto ON okay!\n"));
+			break;
+		}
+
+		if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){
+			//RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling REG_APS_FSMCO[APFM_ONMAC] done!\n"));
+			return _FAIL;
+		}
+				
+	}while(_TRUE);
+
+	//Enable Radio ,GPIO ,and LED function
+	rtw_write16(padapter,REG_APS_FSMCO,0x0812);
+
+#ifdef CONFIG_AUTOSUSPEND
+	//for usb Combo card ,BT
+	if((BOARD_USB_COMBO == pHalData->BoardType)&&(padapter->registrypriv.usbss_enable))
+	{
+		value32 =  rtw_read32(padapter, REG_APS_FSMCO);
+		value32 |= (SOP_ABG|SOP_AMB|XOP_BTCK);
+		rtw_write32(padapter, REG_APS_FSMCO, value32);		
+	}
+#endif	
+
+	// release RF digital isolation
+	value16 = rtw_read16(padapter, REG_SYS_ISO_CTRL);
+	value16 &= ~ISO_DIOR;
+	rtw_write16(padapter, REG_SYS_ISO_CTRL, value16);
+
+	// Enable MAC DMA/WMAC/SCHEDULE/SEC block
+	value16 = rtw_read16(padapter, REG_CR);
+	value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
+				| PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN | ENSEC);
+	rtw_write16(padapter, REG_CR, value16);
+	
+	//tynli_test for suspend mode.
+	{
+		rtw_write8(padapter,  0xfe10, 0x19);
+	}
+
+	// 2010/11/22 MH For slim combo debug mode check.
+	if (pHalData->BoardType == BOARD_USB_COMBO)
+	{
+		if (pHalData->SlimComboDbg == _TRUE)
+		{
+			DBG_8192C("SlimComboDbg == TRUE\n");
+
+			// 1. SIC?Test Mode ¤¤, Debug Ports ·|¦Û°Ê Enable, ©Ò¥H Driver ¤W¨Ó«á, 
+			//	­nÃö±¼½Ð³]©w 0x 00[7] -> "1", ±N¥¦ Disable.   effect if not: power consumption increase
+			rtw_write8(padapter, REG_SYS_ISO_CTRL, rtw_read8(padapter, REG_SYS_ISO_CTRL)|BIT7);
+
+			// 2. SIC?Test Mode ¤¤, GPIO-8?·| report Power State ©Ò¥H Driver ¤W¨Ó«á, ½Ð³]©w? 0x04[6] -> "1" ±N¥¦ Disable
+			// effect if not: GPIO-8 could not be GPIO or LED function
+			rtw_write8(padapter, REG_APS_FSMCO, rtw_read8(padapter, REG_APS_FSMCO)|BIT6);
+
+			// 3. SIC Test Mode ¤¤, EESK, EECS ·| report?Host Clock status, ©Ò¥H Driver ¤W¨Ó«á, ½Ð³]©w? 0x40[4] -> "1" ±N¥¦¤Á¦¨ EEPROM ¨Ï¥Î Pin (autoload still from Efuse)
+			//  effect if not:power consumption increase
+			value8 = rtw_read8(padapter, REG_GPIO_MUXCFG)|BIT4 ;
+		#ifdef CONFIG_BT_COEXIST	
+			// 2011/01/26 MH UMB-B cut bug. We need to support the modification.
+			if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) &&
+				pHalData->bt_coexist.BT_Coexist)
+			{
+				value8 |= (BIT5);	
+			}
+		#endif
+			rtw_write8(padapter, REG_GPIO_MUXCFG,value8 );
+			
+			
+			// 4. SIC Test Mode ¤¤,?SIC Debug ports ·|¦Û°Ê Enable , ©Ò¥H Driver ¤W¨Ó«á°¨¤W, ½Ð³]©w? 0x40[15:11] -> ¡§0x00¡¨, ±N¥¦Disable
+			//  4.1Two Steps setting for safety: 0x40[15,13,12, 11] -> "0", then ?0x40[14] -> "0"
+			// effect if not: Host could not transfer packets, and GPIO-3,2 will occupied by SIC then Co-exist could not work.
+			rtw_write16(padapter, REG_GPIO_MUXCFG, (rtw_read16(padapter, REG_GPIO_MUXCFG)&0x07FF)|BIT14);
+			rtw_write16(padapter, REG_GPIO_MUXCFG, rtw_read16(padapter, REG_GPIO_MUXCFG)&0x07FF);
+		}
+	}
+
+
+	// 2011/02/18 To Fix RU LNA  power leakage problem. We need to execute below below in
+	// Adapter init and halt sequence. Accordingto EEchou's opinion, we can enable the ability for all
+	// IC. According to Johnny's opinion, only RU will meet the condition.
+	if (IS_HARDWARE_TYPE_8192C(padapter) && (pHalData->BoardType == BOARD_USB_High_PA))
+		rtw_write32(padapter, rFPGA0_XCD_RFParameter, rtw_read32(padapter, rFPGA0_XCD_RFParameter)&(~BIT1));
+	return ret;
+
+}
+
+
+static void _dbg_dump_macreg(_adapter *padapter)
+{
+	u32 offset = 0;
+	u32 val32 = 0;
+	u32 index =0 ;
+	for(index=0;index<64;index++)
+	{
+		offset = index*4;
+		val32 = rtw_read32(padapter,offset);
+		DBG_8192C("offset : 0x%02x ,val:0x%08x\n",offset,val32);
+	}
+}
+
+
+static void _InitPABias(_adapter *padapter)
+{
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(padapter);
+	u8			pa_setting;
+	BOOLEAN		is92C = IS_92C_SERIAL(pHalData->VersionID);
+	
+	//FIXED PA current issue
+	//efuse_one_byte_read(padapter, 0x1FA, &pa_setting);
+	pa_setting = EFUSE_Read1Byte(padapter, 0x1FA);
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("_InitPABias 0x1FA 0x%x \n",pa_setting));
+
+	if(!(pa_setting & BIT0))
+	{
+		PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x0F406);
+		PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x4F406);		
+		PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x8F406);		
+		PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0xCF406);		
+		//RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path A\n"));
+	}	
+
+	if(!(pa_setting & BIT1) && is92C)
+	{
+		PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x0F406);
+		PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x4F406);		
+		PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x8F406);		
+		PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0xCF406);
+		//RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path B\n"));	
+	}
+
+	if(!(pa_setting & BIT4))
+	{
+		pa_setting = rtw_read8(padapter, 0x16);
+		pa_setting &= 0x0F;
+		rtw_write8(padapter, 0x16, pa_setting | 0x90);		
+	}
+}
+#ifdef CONFIG_BT_COEXIST
+static void _InitBTCoexist(_adapter *padapter)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+	u8 u1Tmp;
+
+	if(pbtpriv->BT_Coexist && pbtpriv->BT_CoexistType == BT_CSR_BC4)
+	{
+
+#if MP_DRIVER != 1
+		if(pbtpriv->BT_Ant_isolation)
+		{
+			rtw_write8( padapter,REG_GPIO_MUXCFG, 0xa0);
+			DBG_8192C("BT write 0x%x = 0x%x\n", REG_GPIO_MUXCFG, 0xa0);
+		}
+#endif		
+
+		u1Tmp = rtw_read8(padapter, 0x4fd) & BIT0;
+		u1Tmp = u1Tmp | 
+				((pbtpriv->BT_Ant_isolation==1)?0:BIT1) | 
+				((pbtpriv->BT_Service==BT_SCO)?0:BIT2);
+		rtw_write8( padapter, 0x4fd, u1Tmp);
+		DBG_8192C("BT write 0x%x = 0x%x for non-isolation\n", 0x4fd, u1Tmp);
+		
+		
+		rtw_write32(padapter, REG_BT_COEX_TABLE+4, 0xaaaa9aaa);
+		DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+4, 0xaaaa9aaa);
+		
+		rtw_write32(padapter, REG_BT_COEX_TABLE+8, 0xffbd0040);
+		DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+8, 0xffbd0040);
+
+		rtw_write32(padapter,  REG_BT_COEX_TABLE+0xc, 0x40000010);
+		DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+0xc, 0x40000010);
+
+		//Config to 1T1R
+		u1Tmp =  rtw_read8(padapter,rOFDM0_TRxPathEnable);
+		u1Tmp &= ~(BIT1);
+		rtw_write8( padapter, rOFDM0_TRxPathEnable, u1Tmp);
+		DBG_8192C("BT write 0xC04 = 0x%x\n", u1Tmp);
+			
+		u1Tmp = rtw_read8(padapter, rOFDM1_TRxPathEnable);
+		u1Tmp &= ~(BIT1);
+		rtw_write8( padapter, rOFDM1_TRxPathEnable, u1Tmp);
+		DBG_8192C("BT write 0xD04 = 0x%x\n", u1Tmp);
+
+	}
+}
+#endif
+
+//-------------------------------------------------------------------------
+//
+// LLT R/W/Init function
+//
+//-------------------------------------------------------------------------
+static u8 _LLTWrite(
+	IN  PADAPTER	Adapter,
+	IN	u32		address,
+	IN	u32		data
+	)
+{
+	u8	status = _SUCCESS;
+	int 		count = 0;
+	u32 		value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
+
+	rtw_write32(Adapter, REG_LLT_INIT, value);
+	
+	//polling
+	do{
+		
+		value = rtw_read32(Adapter, REG_LLT_INIT);
+		if(_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)){
+			break;
+		}
+		
+		if(count > POLLING_LLT_THRESHOLD){
+			//RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling write LLT done at address %d!\n", address));
+			status = _FAIL;
+			break;
+		}
+	}while(count++);
+
+	return status;
+	
+}
+
+
+static u8 _LLTRead(
+	IN  PADAPTER	Adapter,
+	IN	u32		address
+	)
+{
+	int		count = 0;
+	u32		value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS);
+
+	rtw_write32(Adapter, REG_LLT_INIT, value);
+
+	//polling and get value
+	do{
+		
+		value = rtw_read32(Adapter, REG_LLT_INIT);
+		if(_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)){
+			return (u8)value;
+		}
+		
+		if(count > POLLING_LLT_THRESHOLD){
+			//RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling read LLT done at address %d!\n", address));
+			break;
+		}
+	}while(count++);
+
+	return 0xFF;
+
+}
+
+
+static u8 InitLLTTable(
+	IN  PADAPTER	Adapter,
+	IN	u32		boundary
+	)
+{
+	u8	status = _SUCCESS;
+	u32		i;
+
+#ifdef CONFIG_IOL_LLT
+	if(rtw_IOL_applied(Adapter))
+	{
+		struct xmit_frame	*xmit_frame;
+		if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
+			return _FAIL;
+
+		rtw_IOL_append_LLT_cmd(xmit_frame, boundary);
+		status = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000);
+	}
+	else
+#endif
+	{
+		for(i = 0 ; i < (boundary - 1) ; i++){
+			status = _LLTWrite(Adapter, i , i + 1);
+			if(_SUCCESS != status){
+				return status;
+			}
+		}
+
+		// end of list
+		status = _LLTWrite(Adapter, (boundary - 1), 0xFF); 
+		if(_SUCCESS != status){
+			return status;
+		}
+
+		// Make the other pages as ring buffer
+		// This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer.
+		// Otherwise used as local loopback buffer. 
+		for(i = boundary ; i < LAST_ENTRY_OF_TX_PKT_BUFFER ; i++){
+			status = _LLTWrite(Adapter, i, (i + 1)); 
+			if(_SUCCESS != status){
+				return status;
+			}
+		}
+		
+		// Let last entry point to the start entry of ring buffer
+		status = _LLTWrite(Adapter, LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
+		if(_SUCCESS != status){
+			return status;
+		}
+	}
+
+	return status;
+	
+}
+
+
+//---------------------------------------------------------------
+//
+//	MAC init functions
+//
+//---------------------------------------------------------------
+static VOID
+_SetMacID(
+	IN  PADAPTER Adapter, u8* MacID
+	)
+{
+	u32 i;
+	for(i=0 ; i< MAC_ADDR_LEN ; i++){
+#ifdef  CONFIG_CONCURRENT_MODE		
+		if(Adapter->iface_type == IFACE_PORT1)
+			rtw_write32(Adapter, REG_MACID1+i, MacID[i]);
+		else
+#endif			
+		rtw_write32(Adapter, REG_MACID+i, MacID[i]);
+	}
+}
+
+static VOID
+_SetBSSID(
+	IN  PADAPTER Adapter, u8* BSSID
+	)
+{
+	u32 i;
+	for(i=0 ; i< MAC_ADDR_LEN ; i++){
+#ifdef  CONFIG_CONCURRENT_MODE		
+		if(Adapter->iface_type == IFACE_PORT1)
+			rtw_write32(Adapter, REG_BSSID1+i, BSSID[i]);
+		else
+#endif			
+		rtw_write32(Adapter, REG_BSSID+i, BSSID[i]);
+	}
+}
+
+
+// Shall USB interface init this?
+static VOID
+_InitInterrupt(
+	IN  PADAPTER Adapter
+	)
+{
+	u32	value32;
+
+	// HISR - turn all on
+	value32 = 0xFFFFFFFF;
+	rtw_write32(Adapter, REG_HISR, value32);
+
+	// HIMR - turn all on
+	rtw_write32(Adapter, REG_HIMR, value32);
+}
+
+
+static VOID
+_InitQueueReservedPage(
+	IN  PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	
+	u32			outEPNum	= (u32)pHalData->OutEpNumber;
+	u32			numHQ		= 0;
+	u32			numLQ		= 0;
+	u32			numNQ		= 0;
+	u32			numPubQ;
+	u32			value32;
+	u8			value8;
+	BOOLEAN		bWiFiConfig	= pregistrypriv->wifi_spec;
+	//u32			txQPageNum, txQPageUnit,txQRemainPage;
+
+	{ //for WMM 
+		//RT_ASSERT((outEPNum>=2), ("for WMM ,number of out-ep must more than or equal to 2!\n"));
+
+		numPubQ = (bWiFiConfig)?WMM_NORMAL_PAGE_NUM_PUBQ:NORMAL_PAGE_NUM_PUBQ;
+
+		if(pHalData->OutEpQueueSel & TX_SELE_HQ){
+			numHQ = (bWiFiConfig)?WMM_NORMAL_PAGE_NUM_HPQ:NORMAL_PAGE_NUM_HPQ;
+		}
+
+		if(pHalData->OutEpQueueSel & TX_SELE_LQ){
+			numLQ = (bWiFiConfig)?WMM_NORMAL_PAGE_NUM_LPQ:NORMAL_PAGE_NUM_LPQ;
+		}
+		// NOTE: This step shall be proceed before writting REG_RQPN.	
+		if(pHalData->OutEpQueueSel & TX_SELE_NQ){
+			numNQ = (bWiFiConfig)?WMM_NORMAL_PAGE_NUM_NPQ:NORMAL_PAGE_NUM_NPQ;
+		}
+		value8 = (u8)_NPQ(numNQ);
+		rtw_write8(Adapter, REG_RQPN_NPQ, value8);
+	}
+
+	// TX DMA
+	value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;	
+	rtw_write32(Adapter, REG_RQPN, value32);	
+}
+
+static VOID
+_InitTxBufferBoundary(
+	IN  PADAPTER Adapter
+	)
+{	
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+
+	u8	txpktbuf_bndy; 
+
+	if(!pregistrypriv->wifi_spec){
+		txpktbuf_bndy = TX_PAGE_BOUNDARY;
+	}
+	else{//for WMM
+		txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY;
+	}
+
+	rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
+	rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
+	rtw_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
+	rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);	
+#if 1
+	rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
+#else
+	txdmactrl = PlatformIORead2Byte(Adapter, REG_TDECTRL);
+	txdmactrl &= ~BCN_HEAD_MASK;
+	txdmactrl |= BCN_HEAD(txpktbuf_bndy);
+	PlatformIOWrite2Byte(Adapter, REG_TDECTRL, txdmactrl);
+#endif
+}
+
+static VOID
+_InitPageBoundary(
+	IN  PADAPTER Adapter
+	)
+{
+	// RX Page Boundary
+	//srand(static_cast<unsigned int>(time(NULL)) );
+	u16 rxff_bndy = 0x27FF;//(rand() % 1) ? 0x27FF : 0x23FF;
+
+	rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
+
+	// TODO: ?? shall we set tx boundary?
+}
+
+
+static VOID
+_InitNormalChipRegPriority(
+	IN	PADAPTER	Adapter,
+	IN	u16		beQ,
+	IN	u16		bkQ,
+	IN	u16		viQ,
+	IN	u16		voQ,
+	IN	u16		mgtQ,
+	IN	u16		hiQ
+	)
+{
+	u16 value16		= (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
+
+	value16 |=	_TXDMA_BEQ_MAP(beQ) 	| _TXDMA_BKQ_MAP(bkQ) |
+				_TXDMA_VIQ_MAP(viQ) 	| _TXDMA_VOQ_MAP(voQ) |
+				_TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ);
+	
+	rtw_write16(Adapter, REG_TRXDMA_CTRL, value16);
+}
+
+static VOID
+_InitNormalChipOneOutEpPriority(
+	IN	PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+
+	u16	value = 0;
+	switch(pHalData->OutEpQueueSel)
+	{
+		case TX_SELE_HQ:
+			value = QUEUE_HIGH;
+			break;
+		case TX_SELE_LQ:
+			value = QUEUE_LOW;
+			break;
+		case TX_SELE_NQ:
+			value = QUEUE_NORMAL;
+			break;
+		default:
+			//RT_ASSERT(FALSE,("Shall not reach here!\n"));
+			break;
+	}
+	
+	_InitNormalChipRegPriority(Adapter,
+								value,
+								value,
+								value,
+								value,
+								value,
+								value
+								);
+
+}
+
+static VOID
+_InitNormalChipTwoOutEpPriority(
+	IN	PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	u16			beQ,bkQ,viQ,voQ,mgtQ,hiQ;
+	
+
+	u16	valueHi = 0;
+	u16	valueLow = 0;
+	
+	switch(pHalData->OutEpQueueSel)
+	{
+		case (TX_SELE_HQ | TX_SELE_LQ):
+			valueHi = QUEUE_HIGH;
+			valueLow = QUEUE_LOW;
+			break;
+		case (TX_SELE_NQ | TX_SELE_LQ):
+			valueHi = QUEUE_NORMAL;
+			valueLow = QUEUE_LOW;
+			break;
+		case (TX_SELE_HQ | TX_SELE_NQ):
+			valueHi = QUEUE_HIGH;
+			valueLow = QUEUE_NORMAL;
+			break;
+		default:
+			//RT_ASSERT(FALSE,("Shall not reach here!\n"));
+			break;
+	}
+
+	if(!pregistrypriv->wifi_spec ){
+		beQ		= valueLow;
+		bkQ		= valueLow;
+		viQ		= valueHi;
+		voQ		= valueHi;
+		mgtQ	= valueHi; 
+		hiQ		= valueHi;								
+	}
+	else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE
+		beQ		= valueLow;
+		bkQ		= valueHi;		
+		viQ		= valueHi;
+		voQ		= valueLow;
+		mgtQ	= valueHi;
+		hiQ		= valueHi;							
+	}
+	
+	_InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ);
+
+}
+
+static VOID
+_InitNormalChipThreeOutEpPriority(
+	IN	PADAPTER Adapter
+	)
+{
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	u16			beQ,bkQ,viQ,voQ,mgtQ,hiQ;
+
+	if(!pregistrypriv->wifi_spec ){// typical setting
+		beQ		= QUEUE_LOW;
+		bkQ 		= QUEUE_LOW;
+		viQ 		= QUEUE_NORMAL;
+		voQ 		= QUEUE_HIGH;
+		mgtQ 	= QUEUE_HIGH;
+		hiQ 		= QUEUE_HIGH;			
+	}
+	else{// for WMM
+		beQ		= QUEUE_LOW;
+		bkQ 		= QUEUE_NORMAL;
+		viQ 		= QUEUE_NORMAL;
+		voQ 		= QUEUE_HIGH;
+		mgtQ 	= QUEUE_HIGH;
+		hiQ 		= QUEUE_HIGH;			
+	}
+	_InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ);
+}
+
+static VOID
+_InitNormalChipQueuePriority(
+	IN	PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+
+	switch(pHalData->OutEpNumber)
+	{
+		case 1:
+			_InitNormalChipOneOutEpPriority(Adapter);
+			break;
+		case 2:
+			_InitNormalChipTwoOutEpPriority(Adapter);
+			break;
+		case 3:
+			_InitNormalChipThreeOutEpPriority(Adapter);
+			break;
+		default:
+			//RT_ASSERT(FALSE,("Shall not reach here!\n"));
+			break;
+	}
+
+
+}
+
+static VOID
+_InitQueuePriority(
+	IN  PADAPTER Adapter
+	)
+{
+	_InitNormalChipQueuePriority(Adapter);
+}
+
+static VOID
+_InitHardwareDropIncorrectBulkOut(
+	IN  PADAPTER Adapter
+	)
+{
+	u32	value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK);
+	value32 |= DROP_DATA_EN;
+	rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32);
+}
+
+static VOID
+_InitNetworkType(
+	IN  PADAPTER Adapter
+	)
+{
+	u32	value32;
+
+	value32 = rtw_read32(Adapter, REG_CR);
+
+	// TODO: use the other function to set network type
+#if RTL8191C_FPGA_NETWORKTYPE_ADHOC
+	value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AD_HOC);
+#else
+	value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
+#endif
+	rtw_write32(Adapter, REG_CR, value32);
+//	RASSERT(pIoBase->rtw_read8(REG_CR + 2) == 0x2);
+}
+
+static VOID
+_InitTransferPageSize(
+	IN  PADAPTER Adapter
+	)
+{
+	// Tx page size is always 128.
+	
+	u8	value8;
+	value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
+	rtw_write8(Adapter, REG_PBP, value8);
+}
+
+static VOID
+_InitDriverInfoSize(
+	IN  PADAPTER	Adapter,
+	IN	u8		drvInfoSize
+	)
+{
+	rtw_write8(Adapter,REG_RX_DRVINFO_SZ, drvInfoSize);
+}
+
+static VOID
+_InitWMACSetting(
+	IN  PADAPTER Adapter
+	)
+{
+	//u4Byte			value32;
+	//u16			value16;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	//pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS;
+	//pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS;
+	// don't turn on AAP, it will allow all packets to driver
+	pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS;
+	
+#if (0 == RTL8192C_RX_PACKET_NO_INCLUDE_CRC)
+	pHalData->ReceiveConfig |= ACRC32;
+#endif
+
+	// some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile()
+	rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig);
+
+	// Accept all multicast address
+	rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF);
+	rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
+
+
+	// Accept all data frames
+	//value16 = 0xFFFF;
+	//rtw_write16(Adapter, REG_RXFLTMAP2, value16);
+
+	// 2010.09.08 hpfan
+	// Since ADF is removed from RCR, ps-poll will not be indicate to driver,
+	// RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll.
+	//value16 = 0x400;
+	//rtw_write16(Adapter, REG_RXFLTMAP1, value16);
+
+	// Accept all management frames
+	//value16 = 0xFFFF;
+	//rtw_write16(Adapter, REG_RXFLTMAP0, value16);
+
+	//enable RX_SHIFT bits
+	//rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1));	
+
+}
+
+static VOID
+_InitAdaptiveCtrl(
+	IN  PADAPTER Adapter
+	)
+{
+	u16	value16;
+	u32	value32;
+
+	// Response Rate Set
+	value32 = rtw_read32(Adapter, REG_RRSR);
+	value32 &= ~RATE_BITMAP_ALL;
+	value32 |= RATE_RRSR_CCK_ONLY_1M;
+	rtw_write32(Adapter, REG_RRSR, value32);
+
+	// CF-END Threshold
+	//m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1);
+
+	// SIFS (used in NAV)
+	value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
+	rtw_write16(Adapter, REG_SPEC_SIFS, value16);
+
+	// Retry Limit
+	value16 = _LRL(0x30) | _SRL(0x30);
+	rtw_write16(Adapter, REG_RL, value16);
+	
+}
+
+static VOID
+_InitRateFallback(
+	IN  PADAPTER Adapter
+	)
+{
+	// Set Data Auto Rate Fallback Retry Count register.
+	rtw_write32(Adapter, REG_DARFRC, 0x00000000);
+	rtw_write32(Adapter, REG_DARFRC+4, 0x10080404);
+	rtw_write32(Adapter, REG_RARFRC, 0x04030201);
+	rtw_write32(Adapter, REG_RARFRC+4, 0x08070605);
+
+}
+
+
+static VOID
+_InitEDCA(
+	IN  PADAPTER Adapter
+	)
+{
+	// Set Spec SIFS (used in NAV)
+	rtw_write16(Adapter,REG_SPEC_SIFS, 0x100a);
+	rtw_write16(Adapter,REG_MAC_SPEC_SIFS, 0x100a);
+
+    //REG514:SIFS_CCK_CTX
+    //REG515:SIFS_OFDM_CTX
+	//REG516:SIFS_CCK_TRX
+    //REG517:SIFS_OFDM_TRX    
+
+	// Set SIFS for CCK_CTS and OFDM_CTX
+	rtw_write16(Adapter,REG_SIFS_CTX, 0x100a);	
+
+	// Set SIFS for CCK_TRX and OFDM_TRX
+	rtw_write16(Adapter,REG_SIFS_TRX, 0x100a);
+
+	// TXOP
+	rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
+	rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
+	rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
+	rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
+}
+
+
+static VOID
+_InitBeaconMaxError(
+	IN  PADAPTER	Adapter,
+	IN	BOOLEAN		InfraMode
+	)
+{
+#ifdef RTL8192CU_ADHOC_WORKAROUND_SETTING
+	rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);	
+#else
+	//rtw_write8(Adapter, REG_BCN_MAX_ERR, (InfraMode ? 0xFF : 0x10));	
+#endif
+}
+
+
+#ifdef CONFIG_LED
+static void _InitHWLed(PADAPTER Adapter)
+{
+	struct led_priv *pledpriv = &(Adapter->ledpriv);
+	
+	if( pledpriv->LedStrategy != HW_LED)
+		return;
+	
+// HW led control
+// to do .... 
+//must consider cases of antenna diversity/ commbo card/solo card/mini card
+
+}
+#endif //CONFIG_LED
+
+static VOID
+_InitRDGSetting(
+	IN	PADAPTER Adapter
+	)
+{
+	rtw_write8(Adapter,REG_RD_CTRL,0xFF);
+	rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200);
+	rtw_write8(Adapter,REG_RD_RESP_PKT_TH,0x05);
+}
+
+static VOID
+_InitRxSetting(
+	IN	PADAPTER Adapter
+	)
+{
+	rtw_write32(Adapter, REG_MACID, 0x87654321);
+	rtw_write32(Adapter, 0x0700, 0x87654321);
+}
+
+static VOID
+_InitRetryFunction(
+	IN  PADAPTER Adapter
+	)
+{
+	u8	value8;
+	
+	value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL);
+	value8 |= EN_AMPDU_RTY_NEW;
+	rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
+
+	// Set ACK timeout
+	rtw_write8(Adapter, REG_ACKTO, 0x40);
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	usb_AggSettingTxUpdate()
+ *
+ * Overview:	Seperate TX/RX parameters update independent for TP detection and 
+ *			dynamic TX/RX aggreagtion parameters update.
+ *
+ * Input:			PADAPTER
+ *
+ * Output/Return:	NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	12/10/2010	MHC		Seperate to smaller function.
+ *
+ *---------------------------------------------------------------------------*/
+static VOID
+usb_AggSettingTxUpdate(
+	IN	PADAPTER			Adapter
+	)
+{
+#ifdef CONFIG_USB_TX_AGGREGATION
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	//PMGNT_INFO		pMgntInfo = &(Adapter->MgntInfo);	
+	u32			value32;
+
+	if(Adapter->registrypriv.wifi_spec)
+		pHalData->UsbTxAggMode = _FALSE;
+
+	if(pHalData->UsbTxAggMode){
+		value32 = rtw_read32(Adapter, REG_TDECTRL);
+		value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
+		value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
+		
+		rtw_write32(Adapter, REG_TDECTRL, value32);
+	}
+	
+#endif
+}	// usb_AggSettingTxUpdate
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	usb_AggSettingRxUpdate()
+ *
+ * Overview:	Seperate TX/RX parameters update independent for TP detection and 
+ *			dynamic TX/RX aggreagtion parameters update.
+ *
+ * Input:			PADAPTER
+ *
+ * Output/Return:	NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	12/10/2010	MHC		Seperate to smaller function.
+ *
+ *---------------------------------------------------------------------------*/
+static VOID
+usb_AggSettingRxUpdate(
+	IN	PADAPTER			Adapter
+	)
+{
+#ifdef CONFIG_USB_RX_AGGREGATION
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	//PMGNT_INFO		pMgntInfo = &(Adapter->MgntInfo);
+	u8			valueDMA;
+	u8			valueUSB;
+
+	valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL);
+	valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION);
+
+	switch(pHalData->UsbRxAggMode)
+	{
+		case USB_RX_AGG_DMA:
+			valueDMA |= RXDMA_AGG_EN;
+			valueUSB &= ~USB_AGG_EN;
+			break;
+		case USB_RX_AGG_USB:
+			valueDMA &= ~RXDMA_AGG_EN;
+			valueUSB |= USB_AGG_EN;
+			break;
+		case USB_RX_AGG_MIX:
+			valueDMA |= RXDMA_AGG_EN;
+			valueUSB |= USB_AGG_EN;
+			break;
+		case USB_RX_AGG_DISABLE:
+		default:
+			valueDMA &= ~RXDMA_AGG_EN;
+			valueUSB &= ~USB_AGG_EN;
+			break;
+	}
+
+	rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
+	rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
+
+	switch(pHalData->UsbRxAggMode)
+	{
+		case USB_RX_AGG_DMA:
+			rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount);
+			rtw_write8(Adapter, REG_USB_DMA_AGG_TO, pHalData->UsbRxAggPageTimeout);
+			break;
+		case USB_RX_AGG_USB:
+			rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount);
+			rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout);
+			break;
+		case USB_RX_AGG_MIX:
+			rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount);
+			rtw_write8(Adapter, REG_USB_DMA_AGG_TO, pHalData->UsbRxAggPageTimeout);
+			rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount);
+			rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout);
+			break;
+		case USB_RX_AGG_DISABLE:
+		default:
+			// TODO: 
+			break;
+	}
+
+	switch(PBP_128)
+	{
+		case PBP_128:
+			pHalData->HwRxPageSize = 128;
+			break;
+		case PBP_64:
+			pHalData->HwRxPageSize = 64;
+			break;
+		case PBP_256:
+			pHalData->HwRxPageSize = 256;
+			break;
+		case PBP_512:
+			pHalData->HwRxPageSize = 512;
+			break;
+		case PBP_1024:
+			pHalData->HwRxPageSize = 1024;
+			break;
+		default:
+			//RT_ASSERT(FALSE, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n"));
+			break;
+	}
+#endif
+}	// usb_AggSettingRxUpdate
+
+static VOID
+InitUsbAggregationSetting(
+	IN  PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	// Tx aggregation setting
+	usb_AggSettingTxUpdate(Adapter);
+
+	// Rx aggregation setting
+	usb_AggSettingRxUpdate(Adapter);
+
+	// 201/12/10 MH Add for USB agg mode dynamic switch.
+	pHalData->UsbRxHighSpeedMode = _FALSE;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	USB_AggModeSwitch()
+ *
+ * Overview:	When RX traffic is more than 40M, we need to adjust some parameters to increase
+ *			RX speed by increasing batch indication size. This will decrease TCP ACK speed, we
+ *			need to monitor the influence of FTP/network share.
+ *			For TX mode, we are still ubder investigation.
+ *
+ * Input:		PADAPTER
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	12/10/2010	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+VOID
+USB_AggModeSwitch(
+	IN	PADAPTER			Adapter
+	)
+{
+#if 0
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+
+	//pHalData->UsbRxHighSpeedMode = FALSE;
+	// How to measure the RX speed? We assume that when traffic is more than 
+	if (pMgntInfo->bRegAggDMEnable == _FALSE)
+	{
+		return;	// Inf not support.
+	}
+	
+	
+	if (pmlmepriv->LinkDetectInfo.bHigherBusyTraffic == _TRUE && 
+		pHalData->UsbRxHighSpeedMode == _FALSE)
+	{
+		pHalData->UsbRxHighSpeedMode = _TRUE;
+		DBG_8192C("UsbAggModeSwitchCheck to HIGH\n");
+	}
+	else if (pmlmepriv->LinkDetectInfo.bHigherBusyTraffic == _FALSE && 
+		pHalData->UsbRxHighSpeedMode == _TRUE)
+	{
+		pHalData->UsbRxHighSpeedMode = _FALSE;
+		DBG_8192C("UsbAggModeSwitchCheck to LOW\n");
+	}
+	else
+	{
+		return; 
+	}
+	
+	// 2010/12/10 MH Add for USB Aggregation judgement we need to 
+	//if( pMgntInfo->LinkDetectInfo.NumRxOkInPeriod > 4000 ||
+		//			pMgntInfo->LinkDetectInfo.NumTxOkInPeriod > 4000 )
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	//usb_AggSettingTxUpdate(Adapter);
+#endif
+		
+#ifdef CONFIG_USB_RX_AGGREGATION
+	if (pHalData->UsbRxHighSpeedMode == _TRUE)	
+	{
+		// 2010/12/10 MH The parameter is tested by SD1 engineer and SD3 channel emulator.
+		// USB mode
+		pHalData->UsbRxAggBlockCount		= 40;
+		pHalData->UsbRxAggBlockTimeout	= 5;
+		// Mix mode
+		pHalData->UsbRxAggPageCount		= 72;
+		pHalData->UsbRxAggPageTimeout	= 6;		
+	}
+	else
+	{
+		// USB mode
+		pHalData->UsbRxAggBlockCount		= pMgntInfo->RegUsbRxAggBlockCount;
+		pHalData->UsbRxAggBlockTimeout	= pMgntInfo->RegUsbRxAggBlockTimeout;	
+		// Mix mode
+		pHalData->UsbRxAggPageCount		= pMgntInfo->RegUsbRxAggPageCount;
+		pHalData->UsbRxAggPageTimeout	= pMgntInfo->RegUsbRxAggPageTimeout;	
+	}	
+#endif
+#endif
+}	// USB_AggModeSwitch
+
+static VOID
+_InitOperationMode(
+	IN	PADAPTER			Adapter
+	)
+{
+#if 0//gtest
+	PHAL_DATA_8192CUSB	pHalData = GetHalData8192CUsb(Adapter);
+	u1Byte				regBwOpMode = 0;
+	u4Byte				regRATR = 0, regRRSR = 0;
+
+
+	//1 This part need to modified according to the rate set we filtered!!
+	//
+	// Set RRSR, RATR, and REG_BWOPMODE registers
+	//
+	switch(Adapter->RegWirelessMode)
+	{
+		case WIRELESS_MODE_B:
+			regBwOpMode = BW_OPMODE_20MHZ;
+			regRATR = RATE_ALL_CCK;
+			regRRSR = RATE_ALL_CCK;
+			break;
+		case WIRELESS_MODE_A:
+			ASSERT(FALSE);
+#if 0
+			regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
+			regRATR = RATE_ALL_OFDM_AG;
+			regRRSR = RATE_ALL_OFDM_AG;
+#endif
+			break;
+		case WIRELESS_MODE_G:
+			regBwOpMode = BW_OPMODE_20MHZ;
+			regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			break;
+		case WIRELESS_MODE_AUTO:
+			if (Adapter->bInHctTest)
+			{
+			    regBwOpMode = BW_OPMODE_20MHZ;
+			    regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			    regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			}
+			else
+			{
+			    regBwOpMode = BW_OPMODE_20MHZ;
+			    regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+			    regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			}
+			break;
+		case WIRELESS_MODE_N_24G:
+			// It support CCK rate by default.
+			// CCK rate will be filtered out only when associated AP does not support it.
+			regBwOpMode = BW_OPMODE_20MHZ;
+				regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+				regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			break;
+		case WIRELESS_MODE_N_5G:
+			ASSERT(FALSE);
+#if 0
+			regBwOpMode = BW_OPMODE_5G;
+			regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+			regRRSR = RATE_ALL_OFDM_AG;
+#endif
+			break;
+	}
+
+	// Ziv ????????
+	//PlatformEFIOWrite4Byte(Adapter, REG_INIRTS_RATE_SEL, regRRSR);
+	PlatformEFIOWrite1Byte(Adapter, REG_BWOPMODE, regBwOpMode);
+
+	// For Min Spacing configuration.
+	switch(pHalData->RF_Type)
+	{
+		case RF_1T2R:
+		case RF_1T1R:
+			RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializeadapter: RF_Type%s\n", (pHalData->RF_Type==RF_1T1R? "(1T1R)":"(1T2R)")));
+			Adapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);						
+			break;
+		case RF_2T2R:
+		case RF_2T2R_GREEN:
+			RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializeadapter:RF_Type(2T2R)\n"));
+			Adapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);			
+			break;
+	}
+	
+	PlatformEFIOWrite1Byte(Adapter, REG_AMPDU_MIN_SPACE, Adapter->MgntInfo.MinSpaceCfg);
+#endif
+}
+
+
+ static VOID
+_InitBeaconParameters(
+	IN  PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	rtw_write16(Adapter, REG_BCN_CTRL, 0x1010);
+
+	// TODO: Remove these magic number
+	rtw_write16(Adapter, REG_TBTT_PROHIBIT,0x6404);// ms
+
+	rtw_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);// 5ms
+	rtw_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); // 2ms
+
+	// Suggested by designer timchen. Change beacon AIFS to the largest number
+	// beacause test chip does not contension before sending beacon. by tynli. 2009.11.03
+	rtw_write16(Adapter, REG_BCNTCFG, 0x660F);
+}
+
+static VOID
+_InitRFType(
+	IN	PADAPTER Adapter
+	)
+{
+	struct registry_priv	 *pregpriv = &Adapter->registrypriv;
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	BOOLEAN			is92CU		= IS_92C_SERIAL(pHalData->VersionID);
+
+#if	DISABLE_BB_RF
+	pHalData->rf_chip	= RF_PSEUDO_11N;
+	return;
+#endif
+
+	pHalData->rf_chip	= RF_6052;
+
+	if(_FALSE == is92CU){
+		pHalData->rf_type = RF_1T1R;
+		DBG_8192C("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n");
+		return;
+	}
+
+	// TODO: Consider that EEPROM set 92CU to 1T1R later.
+	// Force to overwrite setting according to chip version. Ignore EEPROM setting.
+	//pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R;
+	MSG_8192C("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type);
+
+}
+
+static VOID _InitAdhocWorkaroundParams(IN PADAPTER Adapter)
+{
+#if RTL8192CU_ADHOC_WORKAROUND_SETTING
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);	
+	pHalData->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL);
+	pHalData->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE); 
+	pHalData->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
+	pHalData->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT+2);
+#endif	
+}
+
+static VOID
+_BeaconFunctionEnable(
+	IN	PADAPTER		Adapter,
+	IN	BOOLEAN			Enable,
+	IN	BOOLEAN			Linked
+	)
+{
+	rtw_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1));
+	//SetBcnCtrlReg(Adapter, (BIT4 | BIT3 | BIT1), 0x00);
+	//RT_TRACE(COMP_BEACON, DBG_LOUD, ("_BeaconFunctionEnable 0x550 0x%x\n", PlatformEFIORead1Byte(Adapter, 0x550)));			
+
+	rtw_write8(Adapter, REG_RD_CTRL+1, 0x6F);	
+}
+
+
+// Set CCK and OFDM Block "ON"
+static VOID _BBTurnOnBlock(
+	IN	PADAPTER		Adapter
+	)
+{
+#if (DISABLE_BB_RF)
+	return;
+#endif
+
+	PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
+	PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
+}
+
+static VOID _RfPowerSave(
+	IN	PADAPTER		Adapter
+	)
+{
+#if 0
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	PMGNT_INFO		pMgntInfo	= &(Adapter->MgntInfo);
+	u1Byte			eRFPath;
+
+#if (DISABLE_BB_RF)
+	return;
+#endif
+
+	if(pMgntInfo->RegRfOff == TRUE){ // User disable RF via registry.
+		RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RegRfOff.\n"));
+		MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW);
+		// Those action will be discard in MgntActSet_RF_State because off the same state
+		for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
+	}
+	else if(pMgntInfo->RfOffReason > RF_CHANGE_BY_PS){ // H/W or S/W RF OFF before sleep.
+		RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RfOffReason(%ld).\n", pMgntInfo->RfOffReason));
+		MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason);
+	}
+	else{
+		pHalData->eRFPowerState = eRfOn;
+		pMgntInfo->RfOffReason = 0; 
+		if(Adapter->bInSetPower || Adapter->bResetInProgress)
+			PlatformUsbEnableInPipes(Adapter);
+		RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): RF is on.\n"));
+	}
+#endif
+}
+
+enum {
+	Antenna_Lfet = 1,
+	Antenna_Right = 2,	
+};
+
+static VOID
+_InitAntenna_Selection(IN	PADAPTER Adapter)
+{
+
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+
+	if(pHalData->AntDivCfg==0)
+		return;
+	DBG_8192C("==>  %s ....\n",__FUNCTION__);
+	
+	if((RF_1T1R == pHalData->rf_type))
+	{	
+		rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0)|BIT23);	
+		PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
+		
+		if(PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
+			pHalData->CurAntenna = Antenna_A;
+		else
+			pHalData->CurAntenna = Antenna_B;
+		DBG_8192C("%s,Cur_ant:(%x)%s\n",__FUNCTION__,pHalData->CurAntenna,(pHalData->CurAntenna == Antenna_A)?"Antenna_A":"Antenna_B");
+			
+}
+
+
+}
+//
+// 2010/08/09 MH Add for power down check.
+//
+static BOOLEAN
+HalDetectPwrDownMode(
+	IN PADAPTER				Adapter
+	)
+{
+	u8	tmpvalue;
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(Adapter);
+	struct pwrctrl_priv		*pwrctrlpriv = &Adapter->pwrctrlpriv;
+	
+	EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_OPT3, (u32 *)&tmpvalue);
+
+	// 2010/08/25 MH INF priority > PDN Efuse value.
+	if(tmpvalue & BIT4 && pwrctrlpriv->reg_pdnmode)
+	{
+		pHalData->pwrdown = _TRUE;
+	}
+	else
+	{
+		pHalData->pwrdown = _FALSE;
+	}
+
+	DBG_8192C("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown);
+	return pHalData->pwrdown;
+		
+}	// HalDetectPwrDownMode
+
+
+//
+// 2010/08/26 MH Add for selective suspend mode check.
+// If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and
+// slim card.
+//
+static VOID
+HalDetectSelectiveSuspendMode(
+	IN PADAPTER				Adapter
+	)
+{
+	u8	tmpvalue;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dvobj_priv	*pdvobjpriv = adapter_to_dvobj(Adapter);
+
+	// If support HW radio detect, we need to enable WOL ability, otherwise, we 
+	// can not use FW to notify host the power state switch.
+	
+	EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue);
+
+	DBG_8192C("HalDetectSelectiveSuspendMode(): SS ");
+	if(tmpvalue & BIT1)
+	{
+		DBG_8192C("Enable\n");
+	}
+	else
+	{
+		DBG_8192C("Disable\n");
+		pdvobjpriv->RegUsbSS = _FALSE;
+	}
+
+	// 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode.
+	if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData))
+	{
+		//PMGNT_INFO				pMgntInfo = &(Adapter->MgntInfo);
+
+		//if (!pMgntInfo->bRegDongleSS)	
+		//{
+		//	RT_TRACE(COMP_INIT, DBG_LOUD, ("Dongle disable SS\n"));
+			pdvobjpriv->RegUsbSS = _FALSE;
+		//}
+	}
+}	// HalDetectSelectiveSuspendMode
+/*-----------------------------------------------------------------------------
+ * Function:	HwSuspendModeEnable92Cu()
+ *
+ * Overview:	HW suspend mode switch.
+ *
+ * Input:		NONE
+ *
+ * Output:	NONE
+ *
+ * Return:	NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	08/23/2010	MHC		HW suspend mode switch test..
+ *---------------------------------------------------------------------------*/
+static VOID 
+HwSuspendModeEnable92Cu(
+	IN	PADAPTER	pAdapter,
+	IN	u8			Type
+	)
+{
+	//PRT_USB_DEVICE 		pDevice = GET_RT_USB_DEVICE(pAdapter);
+	u16	reg = rtw_read16(pAdapter, REG_GPIO_MUXCFG);	
+
+	//if (!pDevice->RegUsbSS)
+	{
+		return;
+	}
+
+	//
+	// 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW
+	// to enter suspend mode automatically. Otherwise, it will shut down major power 
+	// domain and 8051 will stop. When we try to enter selective suspend mode, we
+	// need to prevent HW to enter D2 mode aumotmatically. Another way, Host will
+	// issue a S10 signal to power domain. Then it will cleat SIC setting(from Yngli).
+	// We need to enable HW suspend mode when enter S3/S4 or disable. We need 
+	// to disable HW suspend mode for IPS/radio_off.
+	//
+	//RT_TRACE(COMP_RF, DBG_LOUD, ("HwSuspendModeEnable92Cu = %d\n", Type));
+	if (Type == _FALSE)
+	{
+		reg |= BIT14;
+		//RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg));
+		rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg);
+		reg |= BIT12;
+		//RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg));
+		rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg);
+	}
+	else
+	{
+		reg &= (~BIT12);
+		rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg);
+		reg &= (~BIT14);
+		rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg);
+	}
+	
+}	// HwSuspendModeEnable92Cu
+rt_rf_power_state RfOnOffDetect(IN	PADAPTER pAdapter )
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(pAdapter);
+	u8	val8;
+	rt_rf_power_state rfpowerstate = rf_off;
+
+	if(pAdapter->pwrctrlpriv.bHWPowerdown)
+	{
+		val8 = rtw_read8(pAdapter, REG_HSISR);
+		DBG_8192C("pwrdown, 0x5c(BIT7)=%02x\n", val8);
+		rfpowerstate = (val8 & BIT7) ? rf_off: rf_on;				
+	}
+	else // rf on/off
+	{
+		rtw_write8(	pAdapter, REG_MAC_PINMUX_CFG,rtw_read8(pAdapter, REG_MAC_PINMUX_CFG)&~(BIT3));
+		val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL);
+		DBG_8192C("GPIO_IN=%02x\n", val8);
+		rfpowerstate = (val8 & BIT3) ? rf_on : rf_off;	
+	}
+	return rfpowerstate;
+}	// HalDetectPwrDownMode
+
+void _ps_open_RF(_adapter *padapter);
+
+
+u32 rtl8192cu_hal_init(PADAPTER Adapter)
+{
+	u8	val8 = 0;
+	u32	boundary, status = _SUCCESS;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	struct pwrctrl_priv		*pwrctrlpriv = &Adapter->pwrctrlpriv;
+	struct registry_priv	*pregistrypriv = &Adapter->registrypriv;
+	u8	is92C = IS_92C_SERIAL(pHalData->VersionID);
+	rt_rf_power_state		eRfPowerStateToSet;
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+#endif
+
+	u32 init_start_time = rtw_get_current_time();
+
+
+#ifdef DBG_HAL_INIT_PROFILING
+
+	enum HAL_INIT_STAGES {
+		HAL_INIT_STAGES_BEGIN = 0,
+		HAL_INIT_STAGES_INIT_PW_ON,
+		HAL_INIT_STAGES_MISC01,
+		HAL_INIT_STAGES_DOWNLOAD_FW,
+		HAL_INIT_STAGES_INIT_LLTT,
+		HAL_INIT_STAGES_MAC,
+		HAL_INIT_STAGES_MISC02,
+		HAL_INIT_STAGES_BB,
+		HAL_INIT_STAGES_RF,
+		HAL_INIT_STAGES_TURN_ON_BLOCK,
+		HAL_INIT_STAGES_INIT_SECURITY,
+		HAL_INIT_STAGES_MISC11,
+		//HAL_INIT_STAGES_RF_PS,
+		HAL_INIT_STAGES_IQK,
+		HAL_INIT_STAGES_PW_TRACK,
+		HAL_INIT_STAGES_LCK,
+		HAL_INIT_STAGES_MISC21,
+		HAL_INIT_STAGES_INIT_PABIAS,
+		HAL_INIT_STAGES_BT_COEXIST,
+		//HAL_INIT_STAGES_ANTENNA_SEL,
+		HAL_INIT_STAGES_INIT_HAL_DM,
+		HAL_INIT_STAGES_MISC31,
+		HAL_INIT_STAGES_END,
+		HAL_INIT_STAGES_NUM
+	};
+
+	char * hal_init_stages_str[] = {
+		"HAL_INIT_STAGES_BEGIN",
+		"HAL_INIT_STAGES_INIT_PW_ON",
+		"HAL_INIT_STAGES_MISC01",
+		"HAL_INIT_STAGES_DOWNLOAD_FW",
+		"HAL_INIT_STAGES_INIT_LLTT",
+		"HAL_INIT_STAGES_MAC",
+		"HAL_INIT_STAGES_MISC02",
+		"HAL_INIT_STAGES_BB",
+		"HAL_INIT_STAGES_RF",
+		"HAL_INIT_STAGES_TURN_ON_BLOCK",
+		"HAL_INIT_STAGES_INIT_SECURITY",
+		"HAL_INIT_STAGES_MISC11",
+		//"HAL_INIT_STAGES_RF_PS",
+		"HAL_INIT_STAGES_IQK",
+		"HAL_INIT_STAGES_PW_TRACK",
+		"HAL_INIT_STAGES_LCK",
+		"HAL_INIT_STAGES_MISC21",
+		"HAL_INIT_STAGES_INIT_PABIAS",
+		"HAL_INIT_STAGES_BT_COEXIST",
+		//"HAL_INIT_STAGES_ANTENNA_SEL",
+		"HAL_INIT_STAGES_INIT_HAL_DM",
+		"HAL_INIT_STAGES_MISC31",
+		"HAL_INIT_STAGES_END",
+	};
+
+	int hal_init_profiling_i;
+	u32 hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; //used to record the time of each stage's starting point
+
+	for(hal_init_profiling_i=0;hal_init_profiling_i<HAL_INIT_STAGES_NUM;hal_init_profiling_i++)
+		hal_init_stages_timestamp[hal_init_profiling_i]=0;
+
+	#define HAL_INIT_PROFILE_TAG(stage) hal_init_stages_timestamp[(stage)]=rtw_get_current_time();
+#else
+	#define HAL_INIT_PROFILE_TAG(stage) do {} while(0)
+#endif //DBG_HAL_INIT_PROFILING
+
+
+
+_func_enter_;
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
+	if(Adapter->pwrctrlpriv.bkeepfwalive)
+	{
+		_ps_open_RF(Adapter);
+
+		if(pHalData->bIQKInitialized ){
+			rtl8192c_PHY_IQCalibrate(Adapter,_TRUE);
+		}
+		else{
+			rtl8192c_PHY_IQCalibrate(Adapter,_FALSE);
+			pHalData->bIQKInitialized = _TRUE;
+		}
+		rtl8192c_dm_CheckTXPowerTracking(Adapter);
+		rtl8192c_PHY_LCCalibrate(Adapter);
+
+		goto exit;
+	}
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
+	status = _InitPowerOn(Adapter);
+	if(status == _FAIL){
+		RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
+		goto exit;
+	}
+
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
+	_InitQueueReservedPage(Adapter);
+	_InitTxBufferBoundary(Adapter);		
+	_InitQueuePriority(Adapter);
+	_InitPageBoundary(Adapter);	
+	_InitTransferPageSize(Adapter);
+
+
+#if ENABLE_USB_DROP_INCORRECT_OUT
+	_InitHardwareDropIncorrectBulkOut(Adapter);
+#endif
+
+	if(pHalData->bRDGEnable){
+		_InitRDGSetting(Adapter);
+	}
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
+#if (1 == MP_DRIVER)
+	_InitRxSetting(Adapter);
+	// Don't Download Firmware
+	Adapter->bFWReady = _FALSE;
+#elif RTL8192CU_FW_DOWNLOAD_ENABLE
+	status = FirmwareDownload92C(Adapter,_FALSE);
+	if(status != _SUCCESS)
+	{
+		Adapter->bFWReady = _FALSE;
+		pHalData->fw_ractrl = _FALSE;
+		DBG_8192C("fw download fail!\n");
+		goto exit;
+	}	
+	else
+	{
+		Adapter->bFWReady = _TRUE;
+		pHalData->fw_ractrl = _TRUE;
+		DBG_8192C("fw download ok!\n");	
+	}
+#endif
+
+	InitializeFirmwareVars92C(Adapter);
+
+	if(pwrctrlpriv->reg_rfoff == _TRUE){
+		pwrctrlpriv->rf_pwrstate = rf_off;
+	}
+
+	// 2010/08/09 MH We need to check if we need to turnon or off RF after detecting
+	// HW GPIO pin. Before PHY_RFConfig8192C.
+	//HalDetectPwrDownMode(Adapter);
+	// 2010/08/26 MH If Efuse does not support sective suspend then disable the function.
+	//HalDetectSelectiveSuspendMode(Adapter);
+
+	// Set RF type for BB/RF configuration	
+	_InitRFType(Adapter);//->_ReadRFType()
+
+	// Save target channel
+	// <Roger_Notes> Current Channel will be updated again later.
+	pHalData->CurrentChannel = 6;//default set to 6
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
+	if(!pregistrypriv->wifi_spec){
+		boundary = TX_PAGE_BOUNDARY;
+	}
+	else{// for WMM
+		boundary = WMM_NORMAL_TX_PAGE_BOUNDARY;
+	}															
+	status =  InitLLTTable(Adapter, boundary);
+	if(status == _FAIL){
+		RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n"));
+		goto exit;
+	}
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC);
+#if (HAL_MAC_ENABLE == 1)
+	status = PHY_MACConfig8192C(Adapter);
+	if(status == _FAIL)
+	{
+		goto exit;
+	}
+#endif
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
+	// Get Rx PHY status in order to report RSSI and others.
+	_InitDriverInfoSize(Adapter, DRVINFO_SZ);
+
+	_InitInterrupt(Adapter);
+	hal_init_macaddr(Adapter);//set mac_address
+	_InitNetworkType(Adapter);//set msr	
+	_InitWMACSetting(Adapter);
+	_InitAdaptiveCtrl(Adapter);
+	_InitEDCA(Adapter);
+	_InitRateFallback(Adapter);
+	_InitRetryFunction(Adapter);
+	InitUsbAggregationSetting(Adapter);
+	_InitOperationMode(Adapter);//todo
+	_InitBeaconParameters(Adapter);
+	_InitBeaconMaxError(Adapter, _TRUE);
+
+#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI)
+
+#ifdef CONFIG_CHECK_AC_LIFETIME
+	// Enable lifetime check for the four ACs
+	rtw_write8(Adapter, REG_LIFETIME_EN, 0x0F);
+#endif	// CONFIG_CHECK_AC_LIFETIME
+
+#ifdef CONFIG_TX_MCAST2UNI
+	rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400);	// unit: 256us. 256ms
+	rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400);	// unit: 256us. 256ms
+#else	// CONFIG_TX_MCAST2UNI
+	rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000);	// unit: 256us. 3s
+	rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000);	// unit: 256us. 3s
+#endif	// CONFIG_TX_MCAST2UNI
+#endif	// CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI
+	
+
+#ifdef CONFIG_LED
+	_InitHWLed(Adapter);
+#endif //CONFIG_LED
+
+	//
+	//d. Initialize BB related configurations.
+	//
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB);
+#if (HAL_BB_ENABLE == 1)
+	status = PHY_BBConfig8192C(Adapter);
+	if(status == _FAIL)
+	{
+		goto exit;
+	}
+#endif
+
+	// 92CU use 3-wire to r/w RF
+	//pHalData->Rf_Mode = RF_OP_By_SW_3wire;
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF);
+#if (HAL_RF_ENABLE == 1)
+	status = PHY_RFConfig8192C(Adapter);	
+	if(status == _FAIL)
+	{
+		goto exit;
+	}
+
+	if(IS_VENDOR_UMC_A_CUT(pHalData->VersionID) && !IS_92C_SERIAL(pHalData->VersionID))
+	{
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_RX_G1, bMaskDWord, 0x30255);
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_RX_G2, bMaskDWord, 0x50a00);		
+	}
+#endif
+
+	//
+	// Joseph Note: Keep RfRegChnlVal for later use.
+	//
+	pHalData->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)0, RF_CHNLBW, bRFRegOffsetMask);
+	pHalData->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)1, RF_CHNLBW, bRFRegOffsetMask);
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
+	_BBTurnOnBlock(Adapter);
+	//NicIFSetMacAddress(padapter, padapter->PermanentAddress);
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
+	invalidate_cam_all(Adapter);
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
+	// 2010/12/17 MH We need to set TX power according to EFUSE content at first.
+	PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
+
+// Move by Neo for USB SS to below setp	
+//_RfPowerSave(Adapter);
+
+	if (!IS_92C_SERIAL( pHalData->VersionID) && (pHalData->AntDivCfg!=0))
+	{ //for 88CU ,1T1R
+		_InitAntenna_Selection(Adapter);
+	}
+
+
+	// 
+	// Disable BAR, suggested by Scott
+	// 2010.04.09 add by hpfan
+	//
+	rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
+
+	// HW SEQ CTRL
+	//set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM.
+	rtw_write8(Adapter,REG_HWSEQ_CTRL, 0xFF); 
+
+	if(pregistrypriv->wifi_spec)
+		rtw_write16(Adapter,REG_FAST_EDCA_CTRL ,0);
+
+	//Nav limit , suggest by scott
+	rtw_write8(Adapter, 0x652, 0x0);
+
+#if (MP_DRIVER == 1)
+	Adapter->mppriv.channel = pHalData->CurrentChannel;
+	MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel);
+#else
+	//
+	// 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status
+	// and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not 
+	// call init_adapter. May cause some problem??
+	//
+	// Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed 
+	// in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState 
+	// is the same as eRfOff, we should change it to eRfOn after we config RF parameters.
+	// Added by tynli. 2010.03.30.
+	pwrctrlpriv->rf_pwrstate = rf_on;
+
+#if 0  //to do
+	RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC);
+#if 1 //Todo
+	// 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off.
+	// 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization.
+
+	eRfPowerStateToSet = (rt_rf_power_state) RfOnOffDetect(Adapter);
+	pwrctrlpriv->rfoff_reason |= eRfPowerStateToSet==rf_on ? RF_CHANGE_BY_INIT : RF_CHANGE_BY_HW;
+	pwrctrlpriv->rfoff_reason |= (pwrctrlpriv->reg_rfoff) ? RF_CHANGE_BY_SW : 0;
+
+	if(pwrctrlpriv->rfoff_reason&RF_CHANGE_BY_HW)
+		pwrctrlpriv->b_hw_radio_off = _TRUE;
+
+	DBG_8192C("eRfPowerStateToSet=%d\n", eRfPowerStateToSet);
+	
+	if(pwrctrlpriv->reg_rfoff == _TRUE)
+	{	// User disable RF via registry.
+		DBG_8192C("InitializeAdapter8192CU(): Turn off RF for RegRfOff.\n");
+		//MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_SW, _TRUE);
+		
+		// Those action will be discard in MgntActSet_RF_State because off the same state
+		//for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+			//PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
+	}
+	else if(pwrctrlpriv->rfoff_reason > RF_CHANGE_BY_PS)
+	{	// H/W or S/W RF OFF before sleep.
+		DBG_8192C(" Turn off RF for RfOffReason(%x) ----------\n", pwrctrlpriv->rfoff_reason);
+		//pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT;
+		pwrctrlpriv->rf_pwrstate = rf_on;
+		//MgntActSet_RF_State(Adapter, rf_off, pwrctrlpriv->rfoff_reason, _TRUE);
+	}
+	else
+	{
+		// Perform GPIO polling to find out current RF state. added by Roger, 2010.04.09.
+		if(pHalData->BoardType == BOARD_MINICARD /*&& (Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)*/)
+		{
+			DBG_8192C("InitializeAdapter8192CU(): RF=%d \n", eRfPowerStateToSet);
+			if (eRfPowerStateToSet == rf_off)
+			{				
+				//MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_HW, _TRUE);
+				pwrctrlpriv->b_hw_radio_off = _TRUE;	
+			}
+			else
+			{
+				pwrctrlpriv->rf_pwrstate = rf_off;
+				pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; 
+				pwrctrlpriv->b_hw_radio_off = _FALSE;					
+				//MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE);
+			}
+		}	
+		else
+		{
+			pwrctrlpriv->rf_pwrstate = rf_off;
+			pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; 			
+			//MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE);
+		}
+	
+		pwrctrlpriv->rfoff_reason = 0; 
+		pwrctrlpriv->b_hw_radio_off = _FALSE;
+		pwrctrlpriv->rf_pwrstate = rf_on;
+		rtw_led_control(Adapter, LED_CTL_POWER_ON);
+
+	}
+
+	// 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c.
+	// Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1.
+	if(pHalData->pwrdown && eRfPowerStateToSet == rf_off)
+	{
+		// Enable register area 0x0-0xc.
+		rtw_write8(Adapter, REG_RSV_CTRL, 0x0);
+
+		//
+		// <Roger_Notes> We should configure HW PDn source for WiFi ONLY, and then
+		// our HW will be set in power-down mode if PDn source from all  functions are configured.
+		// 2010.10.06.
+		//
+		//if(IS_HARDWARE_TYPE_8723AU(Adapter))
+		//{			
+		//	u1bTmp = rtw_read8(Adapter, REG_MULTI_FUNC_CTRL);
+		//	rtw_write8(Adapter, REG_MULTI_FUNC_CTRL, (u1bTmp|WL_HWPDN_EN));
+		//}
+		//else
+		//{
+			rtw_write16(Adapter, REG_APS_FSMCO, 0x8812);
+		//}
+	}
+	//DrvIFIndicateCurrentPhyStatus(Adapter); // 2010/08/17 MH Disable to prevent BSOD.
+#endif
+#endif
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
+	// 2010/08/26 MH Merge from 8192CE.
+	if(pwrctrlpriv->rf_pwrstate == rf_on)
+	{
+		if(pHalData->bIQKInitialized ){
+			rtl8192c_PHY_IQCalibrate(Adapter,_TRUE);
+		}
+		else
+		{
+			rtl8192c_PHY_IQCalibrate(Adapter,_FALSE);
+			pHalData->bIQKInitialized = _TRUE;
+		}
+		
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
+		rtl8192c_dm_CheckTXPowerTracking(Adapter);
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
+		rtl8192c_PHY_LCCalibrate(Adapter);
+	}
+#endif /* #if (MP_DRIVER == 1) */
+
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC21);
+#if RTL8192CU_ADHOC_WORKAROUND_SETTING
+	_InitAdhocWorkaroundParams(Adapter);
+#endif
+
+
+#ifdef USB_INTERFERENCE_ISSUE
+ //fixed USB interface interference issue
+	rtw_write8(Adapter, 0xfe40, 0xe0);
+	rtw_write8(Adapter, 0xfe41, 0x8d);
+	rtw_write8(Adapter, 0xfe42, 0x80);
+	rtw_write32(Adapter,0x20c,0xfd0320);
+#if 1
+	//2011/01/07 ,suggest by Johnny,for solved the problem that too many protocol error on USB bus
+	if(!IS_VENDOR_UMC_A_CUT(pHalData->VersionID) )//&& !IS_92C_SERIAL(pHalData->VersionID))// TSMC , 8188
+	{		
+	    	// 0xE6=0x94
+	    	rtw_write8(Adapter, 0xFE40, 0xE6);
+		rtw_write8(Adapter, 0xFE41, 0x94);
+		rtw_write8(Adapter, 0xFE42, 0x80); 
+
+		// 0xE0=0x19
+		rtw_write8(Adapter, 0xFE40, 0xE0);
+		rtw_write8(Adapter, 0xFE41, 0x19);
+		rtw_write8(Adapter, 0xFE42, 0x80);
+
+		// 0xE5=0x91
+		rtw_write8(Adapter, 0xFE40, 0xE5);
+		rtw_write8(Adapter, 0xFE41, 0x91);
+		rtw_write8(Adapter, 0xFE42, 0x80); 
+
+		// 0xE2=0x81
+		rtw_write8(Adapter, 0xFE40, 0xE2);
+		rtw_write8(Adapter, 0xFE41, 0x81);
+		rtw_write8(Adapter, 0xFE42, 0x80);    
+	
+	}
+
+#endif
+#endif //USB_INTERFERENCE_ISSUE
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS);
+	_InitPABias(Adapter);
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BT_COEXIST);
+#ifdef CONFIG_BT_COEXIST
+	_InitBTCoexist(Adapter);
+#endif
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
+	rtl8192c_InitHalDm(Adapter);
+
+	// 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW enter
+	// suspend mode automatically.
+	//HwSuspendModeEnable92Cu(Adapter, _FALSE);
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC31);
+	rtw_write8(Adapter, 0x15, 0xe9);//suggest by Johnny for lower temperature
+        
+        rtw_write8(Adapter, 0xc87, 0x50);//suggest by Jackson for CCA  
+
+	//_dbg_dump_macreg(padapter);
+
+	rtw_write16(Adapter, REG_BCN_CTRL, 0x1818);	// For 2 PORT TSF SYNC
+
+
+
+#ifdef CONFIG_XMIT_ACK
+	//ack for xmit mgmt frames.
+	rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12));
+#endif //CONFIG_XMIT_ACK
+
+exit:
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
+
+	DBG_871X("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time));
+
+	#ifdef DBG_HAL_INIT_PROFILING
+	hal_init_stages_timestamp[HAL_INIT_STAGES_END]=rtw_get_current_time();
+
+	for(hal_init_profiling_i=0;hal_init_profiling_i<HAL_INIT_STAGES_NUM-1;hal_init_profiling_i++) {
+		DBG_871X("DBG_HAL_INIT_PROFILING: %35s, %u, %5u, %5u\n"
+			, hal_init_stages_str[hal_init_profiling_i]
+			, hal_init_stages_timestamp[hal_init_profiling_i]
+			, (hal_init_stages_timestamp[hal_init_profiling_i+1]-hal_init_stages_timestamp[hal_init_profiling_i])
+			, rtw_get_time_interval_ms(hal_init_stages_timestamp[hal_init_profiling_i], hal_init_stages_timestamp[hal_init_profiling_i+1])
+		);
+	}	
+	#endif
+
+
+_func_exit_;
+
+	return status;
+}
+
+
+#define SYNC_SD7_20110802_phy_SsPwrSwitch92CU
+#ifdef SYNC_SD7_20110802_phy_SsPwrSwitch92CU
+
+VOID
+phy_SsPwrSwitch92CU(
+	IN	PADAPTER			Adapter,
+	IN	rt_rf_power_state	eRFPowerState,
+	IN	int bRegSSPwrLvl
+	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u8				value8;
+	
+	switch( eRFPowerState )
+	{
+		case rf_on:								
+			if (bRegSSPwrLvl == 1)
+			{
+				// 1. Enable MAC Clock. Can not be enabled now.
+				//WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) | BIT(3));
+				
+				// 2. Force PWM, Enable SPS18_LDO_Marco_Block
+				rtw_write8(Adapter, REG_SPS0_CTRL, 
+				rtw_read8(Adapter, REG_SPS0_CTRL) | (BIT0|BIT3));
+
+				// 3. restore BB, AFE control register.
+				//RF
+				if (pHalData->rf_type ==  RF_2T2R)
+					PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 1);							
+				else								
+					PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 1);							
+				PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 1);
+				PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1, 0);
+
+				//AFE
+				//DbgPrint("0x0e70 = %x\n", Adapter->PS_BBRegBackup[PSBBREG_AFE0]);
+				//PHY_SetBBReg(Adapter, 0x0e70, bMaskDWord ,Adapter->PS_BBRegBackup[PSBBREG_AFE0] );
+				//PHY_SetBBReg(Adapter, 0x0e70, bMaskDWord ,0x631B25A0 );				
+				if (pHalData->rf_type ==  RF_2T2R)
+					PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x63DB25A0 );
+				else if (pHalData->rf_type ==  RF_1T1R)
+					PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x631B25A0 );
+
+				// 4. issue 3-wire command that RF set to Rx idle mode. This is used to re-write the RX idle mode.
+				// We can only prvide a usual value instead and then HW will modify the value by itself.
+				PHY_SetRFReg(Adapter,RF_PATH_A, 0, bRFRegOffsetMask,0x32D95);
+				if (pHalData->rf_type ==  RF_2T2R)
+				{
+					PHY_SetRFReg(Adapter,RF_PATH_B, 0, bRFRegOffsetMask,0x32D95);
+				}
+			}	
+			else		// Level 2 or others.
+			{
+				//h.	AFE_PLL_CTRL 0x28[7:0] = 0x80			//disable AFE PLL
+				rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x81);
+				
+				// i.	AFE_XTAL_CTRL 0x24[15:0] = 0x880F		//gated AFE DIG_CLOCK
+				rtw_write16(Adapter, REG_AFE_XTAL_CTRL, 0x800F);
+				rtw_mdelay_os(1);
+				
+				// 1. Enable MAC Clock. Can not be enabled now.
+				//WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) | BIT(3));
+				
+				// 2. Force PWM, Enable SPS18_LDO_Marco_Block
+				rtw_write8(Adapter, REG_SPS0_CTRL, 
+				rtw_read8(Adapter, REG_SPS0_CTRL) | (BIT0|BIT3));
+
+				// 3. restore BB, AFE control register.
+				//RF
+				if (pHalData->rf_type ==  RF_2T2R)
+					PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 1);							
+				else								
+					PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 1);							
+				PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 1);
+				PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1, 0);
+
+				//AFE
+				if (pHalData->rf_type ==  RF_2T2R)
+					PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x63DB25A0 );
+				else if (pHalData->rf_type ==  RF_1T1R)
+					PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x631B25A0 );
+
+				// 4. issue 3-wire command that RF set to Rx idle mode. This is used to re-write the RX idle mode.
+				// We can only prvide a usual value instead and then HW will modify the value by itself.
+				PHY_SetRFReg(Adapter,RF_PATH_A, 0, bRFRegOffsetMask,0x32D95);
+				if (pHalData->rf_type ==  RF_2T2R)
+				{
+					PHY_SetRFReg(Adapter,RF_PATH_B, 0, bRFRegOffsetMask,0x32D95);
+				}
+
+				// 5. gated MAC Clock
+				//WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3)));
+				//PlatformEFIOWrite1Byte(Adapter, REG_SYS_CLKR+1, PlatformEFIORead1Byte(Adapter, REG_SYS_CLKR+1)|(BIT3));
+
+				{
+					//u8 			eRFPath = RF_PATH_A,value8 = 0, retry = 0;
+					u8		bytetmp;
+					//PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0);
+					// 2010/08/12 MH Add for B path under SS test. 
+					//if (pHalData->RF_Type ==  RF_2T2R)
+						//PHY_SetRFReg(Adapter, RF_PATH_B, 0x0, bMaskByte0, 0x0);
+
+					bytetmp = rtw_read8(Adapter, REG_APSD_CTRL);
+					rtw_write8(Adapter, REG_APSD_CTRL, bytetmp & ~BIT6);
+				
+					rtw_mdelay_os(10);
+
+					// Set BB reset at first
+					rtw_write8(Adapter, REG_SYS_FUNC_EN, 0x17 );//0x16		
+					//undo clock gated
+					rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)&(~BIT31));
+					// Enable TX
+					rtw_write8(Adapter, REG_TXPAUSE, 0x0);
+				}
+				//Adapter->HalFunc.InitializeAdapterHandler(Adapter, Adapter->MgntInfo.dot11CurrentChannelNumber);
+				//CardSelectiveSuspendLeave(Adapter);
+			}
+
+			break;
+	   
+		case rf_sleep:
+		case rf_off:
+				value8 = rtw_read8(Adapter, REG_SPS0_CTRL) ;
+				if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
+					value8 &= ~(BIT0);
+				else
+					value8 &= ~(BIT0|BIT3);
+				if (bRegSSPwrLvl == 1)
+				{
+					//RT_TRACE(COMP_POWER, DBG_LOUD, ("SS LVL1\n"));
+					// Disable RF and BB only for SelectSuspend.
+					
+					// 1. Set BB/RF to shutdown.
+					//	(1) Reg878[5:3]= 0 	// RF rx_code for preamble power saving
+					//	(2)Reg878[21:19]= 0	//Turn off RF-B
+					//	(3) RegC04[7:4]= 0 	// turn off all paths for packet detection
+					//	(4) Reg800[1] = 1 		// enable preamble power saving
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF0] = PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter, bMaskDWord);
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF1] = PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskDWord);
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF2] = PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord);
+					if (pHalData->rf_type ==  RF_2T2R)
+					{
+						PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 0);							
+					}
+					else if (pHalData->rf_type ==  RF_1T1R)
+					{
+						PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 0);							
+					}
+					PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 0);						
+					PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1,1);
+					
+					// 2 .AFE control register to power down. bit[30:22]
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_AFE0] = PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord);	
+					if (pHalData->rf_type ==  RF_2T2R)
+						PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x00DB25A0);
+					else if (pHalData->rf_type ==  RF_1T1R)
+						PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x001B25A0);
+					
+					// 3. issue 3-wire command that RF set to power down.
+					PHY_SetRFReg(Adapter,RF_PATH_A, 0, bRFRegOffsetMask,0);
+					if (pHalData->rf_type ==  RF_2T2R)
+					{
+						PHY_SetRFReg(Adapter,RF_PATH_B, 0, bRFRegOffsetMask,0);
+					}
+
+					// 4. Force PFM , disable SPS18_LDO_Marco_Block					
+					rtw_write8(Adapter, REG_SPS0_CTRL, value8);
+
+					// 5. gated MAC Clock
+					//WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3)));
+				}
+				else	// Level 2 or others.
+				{
+					//RT_TRACE(COMP_POWER, DBG_LOUD, ("SS LVL2\n"));
+					{
+						u8 			eRFPath = RF_PATH_A,value8 = 0;
+						rtw_write8(Adapter, REG_TXPAUSE, 0xFF);
+						PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0);
+						// 2010/08/12 MH Add for B path under SS test. 
+						//if (pHalData->RF_Type ==  RF_2T2R)
+							//PHY_SetRFReg(Adapter, RF_PATH_B, 0x0, bMaskByte0, 0x0);
+
+						value8 |= APSDOFF;
+						rtw_write8(Adapter, REG_APSD_CTRL, value8);//0x40
+
+						// After switch APSD, we need to delay for stability
+						rtw_mdelay_os(10);
+						//before BB reset should do clock gated
+						rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)|(BIT31));
+						// Set BB reset at first
+						value8 = 0 ; 
+						value8 |=( FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn);
+						rtw_write8(Adapter, REG_SYS_FUNC_EN,value8 );//0x16			
+					}
+
+					// Disable RF and BB only for SelectSuspend.
+
+					// 1. Set BB/RF to shutdown.
+					//	(1) Reg878[5:3]= 0 	// RF rx_code for preamble power saving
+					//	(2)Reg878[21:19]= 0	//Turn off RF-B
+					//	(3) RegC04[7:4]= 0 	// turn off all paths for packet detection
+					//	(4) Reg800[1] = 1 		// enable preamble power saving
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF0] = PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter, bMaskDWord);
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF1] = PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskDWord);
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF2] = PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord);
+					if (pHalData->rf_type ==  RF_2T2R)
+					{
+						PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 0);							
+					}
+					else if (pHalData->rf_type ==  RF_1T1R)
+					{
+						PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 0);							
+					}
+					PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 0);						
+					PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1,1);
+					
+					// 2 .AFE control register to power down. bit[30:22]
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_AFE0] = PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord);	
+					if (pHalData->rf_type ==  RF_2T2R)
+						PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x00DB25A0);
+					else if (pHalData->rf_type ==  RF_1T1R)
+						PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x001B25A0);
+					
+					// 3. issue 3-wire command that RF set to power down.
+					PHY_SetRFReg(Adapter,RF_PATH_A, 0, bRFRegOffsetMask,0);
+					if (pHalData->rf_type ==  RF_2T2R)
+					{
+						PHY_SetRFReg(Adapter,RF_PATH_B, 0, bRFRegOffsetMask,0);
+					}
+
+					// 4. Force PFM , disable SPS18_LDO_Marco_Block
+					rtw_write8(Adapter, REG_SPS0_CTRL, value8);
+
+					// 2010/10/13 MH/Isaachsu exchange sequence.
+					//h.	AFE_PLL_CTRL 0x28[7:0] = 0x80			//disable AFE PLL
+					rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x80);
+					rtw_mdelay_os(1);
+
+					// i.	AFE_XTAL_CTRL 0x24[15:0] = 0x880F		//gated AFE DIG_CLOCK
+					rtw_write16(Adapter, REG_AFE_XTAL_CTRL, 0xA80F);
+
+					// 5. gated MAC Clock
+					//WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3)));
+					//PlatformEFIOWrite1Byte(Adapter, REG_SYS_CLKR+1, PlatformEFIORead1Byte(Adapter, REG_SYS_CLKR+1)& ~(BIT3))
+					
+					//CardSelectiveSuspendEnter(Adapter);
+				}
+
+			break;
+
+		default:
+			break;
+	} 
+	
+}	// phy_PowerSwitch92CU
+
+void _ps_open_RF(_adapter *padapter) {
+	//here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified
+	phy_SsPwrSwitch92CU(padapter, rf_on, 1);
+}
+
+void _ps_close_RF(_adapter *padapter){
+	//here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified
+	phy_SsPwrSwitch92CU(padapter, rf_off, 1);
+}
+#endif //SYNC_SD7_20110802_phy_SsPwrSwitch92CU
+
+
+
+static VOID 
+_DisableGPIO(
+	IN	PADAPTER	Adapter
+	)
+{
+/***************************************
+j. GPIO_PIN_CTRL 0x44[31:0]=0x000		// 
+k. Value = GPIO_PIN_CTRL[7:0]
+l.  GPIO_PIN_CTRL 0x44[31:0] = 0x00FF0000 | (value <<8); //write external PIN level
+m. GPIO_MUXCFG 0x42 [15:0] = 0x0780
+n. LEDCFG 0x4C[15:0] = 0x8080
+***************************************/
+	u8	value8;
+	u16	value16;
+	u32	value32;
+
+	//1. Disable GPIO[7:0]
+	rtw_write16(Adapter, REG_GPIO_PIN_CTRL+2, 0x0000);
+    	value32 = rtw_read32(Adapter, REG_GPIO_PIN_CTRL) & 0xFFFF00FF;  
+	value8 = (u8) (value32&0x000000FF);
+	value32 |= ((value8<<8) | 0x00FF0000);
+	rtw_write32(Adapter, REG_GPIO_PIN_CTRL, value32);
+	      
+	//2. Disable GPIO[10:8]          
+	rtw_write8(Adapter, REG_GPIO_MUXCFG+3, 0x00);
+	    value16 = rtw_read16(Adapter, REG_GPIO_MUXCFG+2) & 0xFF0F;  
+	value8 = (u8) (value16&0x000F);
+	value16 |= ((value8<<4) | 0x0780);
+	rtw_write16(Adapter, REG_GPIO_MUXCFG+2, value16);
+
+	//3. Disable LED0 & 1
+	rtw_write16(Adapter, REG_LEDCFG0, 0x8080);
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable GPIO and LED.\n"));
+ 
+} //end of _DisableGPIO()
+
+static VOID
+_ResetFWDownloadRegister(
+	IN PADAPTER			Adapter
+	)
+{
+	u32	value32;
+
+	value32 = rtw_read32(Adapter, REG_MCUFWDL);
+	value32 &= ~(MCUFWDL_EN | MCUFWDL_RDY);
+	rtw_write32(Adapter, REG_MCUFWDL, value32);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset FW download register.\n"));
+}
+
+
+static int
+_DisableRF_AFE(
+	IN PADAPTER			Adapter
+	)
+{
+	int		rtStatus = _SUCCESS;
+	u32			pollingCount = 0;
+	u8			value8;
+	
+	//disable RF/ AFE AD/DA
+	value8 = APSDOFF;
+	rtw_write8(Adapter, REG_APSD_CTRL, value8);
+
+
+#if (RTL8192CU_ASIC_VERIFICATION)
+
+	do
+	{
+		if(rtw_read8(Adapter, REG_APSD_CTRL) & APSDOFF_STATUS){
+			//RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable RF, AFE, AD, DA Done!\n"));
+			break;
+		}
+
+		if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){
+			//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Failed to polling APSDOFF_STATUS done!\n"));
+			return _FAIL;
+		}
+				
+	}while(_TRUE);
+	
+#endif
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable RF, AFE,AD, DA.\n"));
+	return rtStatus;
+
+}
+
+static VOID
+_ResetBB(
+	IN PADAPTER			Adapter
+	)
+{
+	u16	value16;
+	
+	//before BB reset should do clock gated
+	rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)|(BIT31));
+	//reset BB
+	value16 = rtw_read16(Adapter, REG_SYS_FUNC_EN);
+	value16 &= ~(FEN_BBRSTB | FEN_BB_GLB_RSTn);
+	rtw_write16(Adapter, REG_SYS_FUNC_EN, value16);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset BB.\n"));
+}
+
+static VOID
+_ResetMCU(
+	IN PADAPTER			Adapter
+	)
+{
+	u16	value16;
+	
+	// reset MCU
+	value16 = rtw_read16(Adapter, REG_SYS_FUNC_EN);
+	value16 &= ~FEN_CPUEN;
+	rtw_write16(Adapter, REG_SYS_FUNC_EN, value16);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset MCU.\n"));
+}
+
+static VOID
+_DisableMAC_AFE_PLL(
+	IN PADAPTER			Adapter
+	)
+{
+	u32	value32;
+	
+	//disable MAC/ AFE PLL
+	value32 = rtw_read32(Adapter, REG_APS_FSMCO);
+	value32 |= APDM_MAC;
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+	
+	value32 |= APFM_OFF;
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable MAC, AFE PLL.\n"));
+}
+
+static VOID
+_AutoPowerDownToHostOff(
+	IN	PADAPTER		Adapter
+	)
+{
+	u32			value32;
+	rtw_write8(Adapter, REG_SPS0_CTRL, 0x22);
+
+	value32 = rtw_read32(Adapter, REG_APS_FSMCO);	
+	
+	value32 |= APDM_HOST;//card disable
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Auto Power Down to Host-off state.\n"));
+
+	// set USB suspend
+	value32 = rtw_read32(Adapter, REG_APS_FSMCO);
+	value32 &= ~AFSM_PCIE;
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+
+}
+
+static VOID
+_SetUsbSuspend(
+	IN PADAPTER			Adapter
+	)
+{
+	u32			value32;
+
+	value32 = rtw_read32(Adapter, REG_APS_FSMCO);
+	
+	// set USB suspend
+	value32 |= AFSM_HSUS;
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+
+	//RT_ASSERT(0 == (rtw_read32(Adapter, REG_APS_FSMCO) & BIT(12)),(""));
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Set USB suspend.\n"));
+	
+}
+
+static VOID
+_DisableRFAFEAndResetBB(
+	IN PADAPTER			Adapter
+	)
+{
+/**************************************
+a.	TXPAUSE 0x522[7:0] = 0xFF             //Pause MAC TX queue
+b.	RF path 0 offset 0x00 = 0x00            // disable RF
+c. 	APSD_CTRL 0x600[7:0] = 0x40
+d.	SYS_FUNC_EN 0x02[7:0] = 0x16		//reset BB state machine
+e.	SYS_FUNC_EN 0x02[7:0] = 0x14		//reset BB state machine
+***************************************/
+	u8 eRFPath = 0,value8 = 0;
+	rtw_write8(Adapter, REG_TXPAUSE, 0xFF);
+	PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0);
+
+	value8 |= APSDOFF;
+	rtw_write8(Adapter, REG_APSD_CTRL, value8);//0x40
+	//before BB reset should do clock gated
+	rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)|(BIT31));
+	value8 = 0 ; 
+	value8 |=( FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn);
+	rtw_write8(Adapter, REG_SYS_FUNC_EN,value8 );//0x16		
+	
+	value8 &=( ~FEN_BB_GLB_RSTn );
+	rtw_write8(Adapter, REG_SYS_FUNC_EN, value8); //0x14		
+	
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> RF off and reset BB.\n"));
+}
+
+static VOID
+_ResetDigitalProcedure1(
+	IN 	PADAPTER			Adapter,
+	IN	BOOLEAN				bWithoutHWSM	
+	)
+{
+
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
+
+	if(pHalData->FirmwareVersion <=  0x20){
+		#if 0
+		/*****************************
+		f.	SYS_FUNC_EN 0x03[7:0]=0x54		// reset MAC register, DCORE
+		g.	MCUFWDL 0x80[7:0]=0				// reset MCU ready status
+		******************************/
+		u4Byte	value32 = 0;
+		PlatformIOWrite1Byte(Adapter, REG_SYS_FUNC_EN+1, 0x54);
+		PlatformIOWrite1Byte(Adapter, REG_MCUFWDL, 0);	
+		#else
+		/*****************************
+		f.	MCUFWDL 0x80[7:0]=0				// reset MCU ready status
+		g.	SYS_FUNC_EN 0x02[10]= 0			// reset MCU register, (8051 reset)
+		h.	SYS_FUNC_EN 0x02[15-12]= 5		// reset MAC register, DCORE
+		i.     SYS_FUNC_EN 0x02[10]= 1			// enable MCU register, (8051 enable)
+		******************************/
+			u16 valu16 = 0;
+			rtw_write8(Adapter, REG_MCUFWDL, 0);
+
+			valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN);	
+			rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 & (~FEN_CPUEN)));//reset MCU ,8051
+
+			valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN)&0x0FFF;	
+			rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 |(FEN_HWPDN|FEN_ELDR)));//reset MAC
+			
+			#ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+			{
+				u8 val;
+				if( (val=rtw_read8(Adapter, REG_MCUFWDL)))
+					DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val);
+			}
+			#endif
+
+			
+			valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN);	
+			rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 | FEN_CPUEN));//enable MCU ,8051	
+
+		
+		#endif
+	}
+	else{
+		u8 retry_cnts = 0;	
+		
+		if(rtw_read8(Adapter, REG_MCUFWDL) & BIT1)
+		{ //IF fw in RAM code, do reset 
+
+			rtw_write8(Adapter, REG_MCUFWDL, 0);
+			if(Adapter->bFWReady){
+				// 2010/08/25 MH Accordign to RD alfred's suggestion, we need to disable other
+				// HRCV INT to influence 8051 reset.
+				rtw_write8(Adapter, REG_FWIMR, 0x20);
+				
+				rtw_write8(Adapter, REG_HMETFR+3, 0x20);//8051 reset by self
+
+				while( (retry_cnts++ <100) && (FEN_CPUEN &rtw_read16(Adapter, REG_SYS_FUNC_EN)))
+				{					
+					rtw_udelay_os(50);//PlatformStallExecution(50);//us
+				}
+
+				if(retry_cnts >= 100){
+					DBG_8192C("%s #####=> 8051 reset failed!.........................\n", __FUNCTION__);
+					// if 8051 reset fail we trigger GPIO 0 for LA
+					//PlatformEFIOWrite4Byte(	Adapter, 
+					//						REG_GPIO_PIN_CTRL, 
+					//						0x00010100);
+					// 2010/08/31 MH According to Filen's info, if 8051 reset fail, reset MAC directly.
+					rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x50);	//Reset MAC and Enable 8051
+					rtw_mdelay_os(10);
+				}
+				else {
+					//DBG_871X("%s =====> 8051 reset success (%d) .\n", __FUNCTION__, retry_cnts);
+				}
+			}
+			else {
+				DBG_871X("%s =====> 8051 in RAM but !Adapter->bFWReady\n", __FUNCTION__);	
+			}
+		}
+		else{
+			//DBG_871X("%s =====> 8051 in ROM.\n", __FUNCTION__);
+		}	
+		
+		#ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+		{
+			u8 val;
+			if( (val=rtw_read8(Adapter, REG_MCUFWDL)))
+				DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val);
+		}
+		#endif
+		
+		rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x54);	//Reset MAC and Enable 8051
+	}
+
+	// Clear rpwm value for initial toggle bit trigger.
+	rtw_write8(Adapter, REG_USB_HRPWM, 0x00);
+
+	if(bWithoutHWSM){
+	/*****************************
+		Without HW auto state machine
+	g.	SYS_CLKR 0x08[15:0] = 0x30A3			//disable MAC clock
+	h.	AFE_PLL_CTRL 0x28[7:0] = 0x80			//disable AFE PLL
+	i.	AFE_XTAL_CTRL 0x24[15:0] = 0x880F		//gated AFE DIG_CLOCK
+	j.	SYS_ISO_CTRL 0x00[7:0] = 0xF9			// isolated digital to PON
+	******************************/	
+		//rtw_write16(Adapter, REG_SYS_CLKR, 0x30A3);
+		rtw_write16(Adapter, REG_SYS_CLKR, 0x70A3);//modify to 0x70A3 by Scott.
+		rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x80);		
+		rtw_write16(Adapter, REG_AFE_XTAL_CTRL, 0x880F);
+		rtw_write8(Adapter, REG_SYS_ISO_CTRL, 0xF9);		
+	}
+	else
+	{		
+		// Disable all RF/BB power 
+		rtw_write8(Adapter, REG_RF_CTRL, 0x00);
+	}
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Reset Digital.\n"));
+
+}
+
+static VOID
+_ResetDigitalProcedure2(
+	IN 	PADAPTER			Adapter
+)
+{
+/*****************************
+k.	SYS_FUNC_EN 0x03[7:0] = 0x44			// disable ELDR runction
+l.	SYS_CLKR 0x08[15:0] = 0x3083			// disable ELDR clock
+m.	SYS_ISO_CTRL 0x01[7:0] = 0x83			// isolated ELDR to PON
+******************************/
+	//rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x44);//marked by Scott.
+	//rtw_write16(Adapter, REG_SYS_CLKR, 0x3083);
+	//rtw_write8(Adapter, REG_SYS_ISO_CTRL+1, 0x83);
+
+ 	rtw_write16(Adapter, REG_SYS_CLKR, 0x70a3); //modify to 0x70a3 by Scott.
+ 	rtw_write8(Adapter, REG_SYS_ISO_CTRL+1, 0x82); //modify to 0x82 by Scott.
+}
+
+static VOID
+_DisableAnalog(
+	IN PADAPTER			Adapter,
+	IN BOOLEAN			bWithoutHWSM	
+	)
+{
+	u16 value16 = 0;
+	u8 value8=0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	if(bWithoutHWSM){
+	/*****************************
+	n.	LDOA15_CTRL 0x20[7:0] = 0x04		// disable A15 power
+	o.	LDOV12D_CTRL 0x21[7:0] = 0x54		// disable digital core power
+	r.	When driver call disable, the ASIC will turn off remaining clock automatically 
+	******************************/
+	
+		rtw_write8(Adapter, REG_LDOA15_CTRL, 0x04);
+		//PlatformIOWrite1Byte(Adapter, REG_LDOV12D_CTRL, 0x54);		
+		
+		value8 = rtw_read8(Adapter, REG_LDOV12D_CTRL);		
+		value8 &= (~LDV12_EN);
+		rtw_write8(Adapter, REG_LDOV12D_CTRL, value8);	
+		//RT_TRACE(COMP_INIT, DBG_LOUD, (" REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",value8));
+	}
+	
+/*****************************
+h.	SPS0_CTRL 0x11[7:0] = 0x23			//enter PFM mode
+i.	APS_FSMCO 0x04[15:0] = 0x4802		// set USB suspend 
+******************************/	
+
+
+	value8 = 0x23;
+	if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
+		value8 |= BIT3;
+
+	rtw_write8(Adapter, REG_SPS0_CTRL, value8);
+
+
+	if(bWithoutHWSM)
+	{			
+		//value16 |= (APDM_HOST | /*AFSM_HSUS |*/PFM_ALDN);
+		// 2010/08/31 According to Filen description, we need to use HW to shut down 8051 automatically.
+		// Becasue suspend operatione need the asistance of 8051 to wait for 3ms.
+		value16 |= (APDM_HOST | AFSM_HSUS |PFM_ALDN);
+	}
+	else
+	{			
+		value16 |= (APDM_HOST | AFSM_HSUS |PFM_ALDN);
+	}
+
+	rtw_write16(Adapter, REG_APS_FSMCO,value16 );//0x4802 
+
+	rtw_write8(Adapter, REG_RSV_CTRL, 0x0e);
+
+ #if 0
+ 	//tynli_test for suspend mode.
+	if(!bWithoutHWSM){
+ 		rtw_write8(Adapter, 0xfe10, 0x19);
+	} 
+#endif
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable Analog Reg0x04:0x%04x.\n",value16));
+}
+
+static int	
+CardDisableHWSM( // HW Auto state machine
+	IN	PADAPTER		Adapter,
+	IN	BOOLEAN			resetMCU
+	)
+{
+	int		rtStatus = _SUCCESS;
+	if(Adapter->bSurpriseRemoved){
+		return rtStatus;
+	}
+#if 1
+	//==== RF Off Sequence ====
+	_DisableRFAFEAndResetBB(Adapter);
+
+	//  ==== Reset digital sequence   ======
+	_ResetDigitalProcedure1(Adapter, _FALSE);
+	
+	//  ==== Pull GPIO PIN to balance level and LED control ======
+	_DisableGPIO(Adapter);
+
+	//  ==== Disable analog sequence ===
+	_DisableAnalog(Adapter, _FALSE);
+
+	RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("======> Card disable finished.\n"));
+#else
+	_DisableGPIO(Adapter);
+	
+	//reset FW download register
+	_ResetFWDownloadRegister(Adapter);
+
+
+	//disable RF/ AFE AD/DA
+	rtStatus = _DisableRF_AFE(Adapter);
+	if(RT_STATUS_SUCCESS != rtStatus){
+		RT_TRACE(COMP_INIT, DBG_SERIOUS, ("_DisableRF_AFE failed!\n"));
+		goto Exit;
+	}
+	_ResetBB(Adapter);
+
+	if(resetMCU){
+		_ResetMCU(Adapter);
+	}
+
+	_AutoPowerDownToHostOff(Adapter);
+	//_DisableMAC_AFE_PLL(Adapter);
+	
+	_SetUsbSuspend(Adapter);
+Exit:
+#endif
+	return rtStatus;
+	
+}
+
+static int	
+CardDisableWithoutHWSM( // without HW Auto state machine
+	IN	PADAPTER		Adapter	
+	)
+{
+	int		rtStatus = _SUCCESS;
+
+	if(Adapter->bSurpriseRemoved){
+		return rtStatus;
+	}
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Card Disable Without HWSM .\n"));
+	//==== RF Off Sequence ====
+	_DisableRFAFEAndResetBB(Adapter);
+
+	//  ==== Reset digital sequence   ======
+	_ResetDigitalProcedure1(Adapter, _TRUE);
+
+	//  ==== Pull GPIO PIN to balance level and LED control ======
+	_DisableGPIO(Adapter);
+
+	//  ==== Reset digital sequence   ======
+	_ResetDigitalProcedure2(Adapter);
+
+	//  ==== Disable analog sequence ===
+	_DisableAnalog(Adapter, _TRUE);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("<====== Card Disable Without HWSM .\n"));
+	return rtStatus;
+}
+
+static void rtl8192cu_hw_power_down(_adapter *padapter)
+{
+	// 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c.
+	// Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1.
+		
+	// Enable register area 0x0-0xc.
+	rtw_write8(padapter,REG_RSV_CTRL, 0x0);			
+	rtw_write16(padapter, REG_APS_FSMCO, 0x8812);
+}
+
+u32 rtl8192cu_hal_deinit(PADAPTER Adapter)
+ {
+
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+   	DBG_8192C("==> %s \n",__FUNCTION__);
+	// 2011/02/18 To Fix RU LNA  power leakage problem. We need to execute below below in
+	// Adapter init and halt sequence. Accordingto EEchou's opinion, we can enable the ability for all
+	// IC. Accord to johnny's opinion, only RU need the support.
+	if (IS_HARDWARE_TYPE_8192C(Adapter)  && (pHalData->BoardType == BOARD_USB_High_PA))
+		rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)|BIT1);
+
+ #ifdef SUPPORT_HW_RFOFF_DETECTED
+ 	DBG_8192C("bkeepfwalive(%x)\n",Adapter->pwrctrlpriv.bkeepfwalive);
+ 	if(Adapter->pwrctrlpriv.bkeepfwalive)
+ 	{
+		_ps_close_RF(Adapter);		
+		if((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))		
+			rtl8192cu_hw_power_down(Adapter);
+ 	}
+	else
+#endif
+	{
+		if( Adapter->bCardDisableWOHSM == _FALSE)
+		{
+			DBG_8192C("card disble HWSM...........\n");
+			CardDisableHWSM(Adapter, _FALSE);
+		}
+		else
+		{
+			DBG_8192C("card disble without HWSM...........\n");
+			CardDisableWithoutHWSM(Adapter); // without HW Auto state machine		
+
+			if((Adapter->pwrctrlpriv.bHWPwrPindetect ) && (Adapter->pwrctrlpriv.bHWPowerdown))		
+				rtl8192cu_hw_power_down(Adapter);
+		}
+	}
+	
+	return _SUCCESS;
+ }
+
+
+unsigned int rtl8192cu_inirp_init(PADAPTER Adapter)
+{	
+	u8 i;	
+	struct recv_buf *precvbuf;
+	uint	status;
+	struct dvobj_priv *pdev = adapter_to_dvobj(Adapter);
+	struct intf_hdl * pintfhdl=&Adapter->iopriv.intf;
+	struct recv_priv *precvpriv = &(Adapter->recvpriv);
+	u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+	u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);
+#endif
+
+_func_enter_;
+
+	_read_port = pintfhdl->io_ops._read_port;
+
+	status = _SUCCESS;
+
+	RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("===> usb_inirp_init \n"));	
+		
+	precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
+
+	//issue Rx irp to receive data	
+	precvbuf = (struct recv_buf *)precvpriv->precv_buf;	
+	for(i=0; i<NR_RECVBUFF; i++)
+	{
+		if(_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE )
+		{
+			RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_port error \n"));
+			status = _FAIL;
+			goto exit;
+		}
+		
+		precvbuf++;		
+		precvpriv->free_recv_buf_queue_cnt--;
+	}
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+	_read_interrupt = pintfhdl->io_ops._read_interrupt;
+	if(_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE )
+	{
+		RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_interrupt error \n"));
+		status = _FAIL;
+	}
+#endif
+
+exit:
+	
+	RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("<=== usb_inirp_init \n"));
+
+_func_exit_;
+
+	return status;
+
+}
+
+unsigned int rtl8192cu_inirp_deinit(PADAPTER Adapter)
+{	
+	RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit \n"));
+	
+	rtw_read_port_cancel(Adapter);
+
+	RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n <=== usb_rx_deinit \n"));
+
+	return _SUCCESS;
+}
+
+
+//-------------------------------------------------------------------------
+//
+//	EEPROM Power index mapping
+//
+//-------------------------------------------------------------------------
+
+ static VOID
+_ReadPowerValueFromPROM(
+	IN	PTxPowerInfo	pwrInfo,
+	IN	u8*			PROMContent,
+	IN	BOOLEAN			AutoLoadFail
+	)
+{
+	u32 rfPath, eeAddr, group;
+
+	_rtw_memset(pwrInfo, 0, sizeof(TxPowerInfo));
+
+	if(AutoLoadFail){		
+		for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){
+			for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
+				pwrInfo->CCKIndex[rfPath][group]		= EEPROM_Default_TxPowerLevel;	
+				pwrInfo->HT40_1SIndex[rfPath][group]	= EEPROM_Default_TxPowerLevel;
+				pwrInfo->HT40_2SIndexDiff[rfPath][group]= EEPROM_Default_HT40_2SDiff;
+				pwrInfo->HT20IndexDiff[rfPath][group]	= EEPROM_Default_HT20_Diff;
+				pwrInfo->OFDMIndexDiff[rfPath][group]	= EEPROM_Default_LegacyHTTxPowerDiff;
+				pwrInfo->HT40MaxOffset[rfPath][group]	= EEPROM_Default_HT40_PwrMaxOffset;		
+				pwrInfo->HT20MaxOffset[rfPath][group]	= EEPROM_Default_HT20_PwrMaxOffset;
+			}
+		}
+
+		pwrInfo->TSSI_A = EEPROM_Default_TSSI;
+		pwrInfo->TSSI_B = EEPROM_Default_TSSI;
+		
+		return;
+	}
+	
+	for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
+		for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){
+			eeAddr = EEPROM_CCK_TX_PWR_INX + (rfPath * 3) + group;
+			pwrInfo->CCKIndex[rfPath][group] = PROMContent[eeAddr];
+
+			eeAddr = EEPROM_HT40_1S_TX_PWR_INX + (rfPath * 3) + group;
+			pwrInfo->HT40_1SIndex[rfPath][group] = PROMContent[eeAddr];
+		}
+	}
+
+	for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){
+		for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
+			pwrInfo->HT40_2SIndexDiff[rfPath][group] = 
+			(PROMContent[EEPROM_HT40_2S_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF;
+
+#if 1
+			pwrInfo->HT20IndexDiff[rfPath][group] =
+			(PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF;
+			if(pwrInfo->HT20IndexDiff[rfPath][group] & BIT3)	//4bit sign number to 8 bit sign number
+				pwrInfo->HT20IndexDiff[rfPath][group] |= 0xF0;
+#else
+			pwrInfo->HT20IndexDiff[rfPath][group] =
+			(PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF;
+#endif
+
+			pwrInfo->OFDMIndexDiff[rfPath][group] =
+			(PROMContent[EEPROM_OFDM_TX_PWR_INX_DIFF+ group] >> (rfPath * 4)) & 0xF;
+
+			pwrInfo->HT40MaxOffset[rfPath][group] =
+			(PROMContent[EEPROM_HT40_MAX_PWR_OFFSET+ group] >> (rfPath * 4)) & 0xF;
+
+			pwrInfo->HT20MaxOffset[rfPath][group] =
+			(PROMContent[EEPROM_HT20_MAX_PWR_OFFSET+ group] >> (rfPath * 4)) & 0xF;
+		}
+	}
+
+	pwrInfo->TSSI_A = PROMContent[EEPROM_TSSI_A];
+	pwrInfo->TSSI_B = PROMContent[EEPROM_TSSI_B];
+
+}
+
+
+static u32
+_GetChannelGroup(
+	IN	u32	channel
+	)
+{
+	//RT_ASSERT((channel < 14), ("Channel %d no is supported!\n"));
+
+	if(channel < 3){ 	// Channel 1~3
+		return 0;
+	}
+	else if(channel < 9){ // Channel 4~9
+		return 1;
+	}
+
+	return 2;				// Channel 10~14	
+}
+
+
+static VOID
+ReadTxPowerInfo(
+	IN	PADAPTER 		Adapter,
+	IN	u8*			PROMContent,
+	IN	BOOLEAN			AutoLoadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	TxPowerInfo		pwrInfo;
+	u32			rfPath, ch, group;
+	u8			pwr, diff;
+
+	_ReadPowerValueFromPROM(&pwrInfo, PROMContent, AutoLoadFail);
+
+	if(!AutoLoadFail)
+		pHalData->bTXPowerDataReadFromEEPORM = _TRUE;
+
+	for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
+		for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+			group = _GetChannelGroup(ch);
+
+			pHalData->TxPwrLevelCck[rfPath][ch]		= pwrInfo.CCKIndex[rfPath][group];
+			pHalData->TxPwrLevelHT40_1S[rfPath][ch]	= pwrInfo.HT40_1SIndex[rfPath][group];
+
+			pHalData->TxPwrHt20Diff[rfPath][ch]		= pwrInfo.HT20IndexDiff[rfPath][group];
+			pHalData->TxPwrLegacyHtDiff[rfPath][ch]	= pwrInfo.OFDMIndexDiff[rfPath][group];
+			pHalData->PwrGroupHT20[rfPath][ch]		= pwrInfo.HT20MaxOffset[rfPath][group];
+			pHalData->PwrGroupHT40[rfPath][ch]		= pwrInfo.HT40MaxOffset[rfPath][group];
+
+			pwr		= pwrInfo.HT40_1SIndex[rfPath][group];
+			diff	= pwrInfo.HT40_2SIndexDiff[rfPath][group];
+
+			pHalData->TxPwrLevelHT40_2S[rfPath][ch]  = (pwr > diff) ? (pwr - diff) : 0;
+		}
+	}
+
+#if DBG
+
+	for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
+		for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+			RTPRINT(FINIT, INIT_TxPower, 
+				("RF(%d)-Ch(%d) [CCK / HT40_1S / HT40_2S] = [0x%x / 0x%x / 0x%x]\n", 
+				rfPath, ch, pHalData->TxPwrLevelCck[rfPath][ch], 
+				pHalData->TxPwrLevelHT40_1S[rfPath][ch], 
+				pHalData->TxPwrLevelHT40_2S[rfPath][ch]));
+
+		}
+	}
+
+	for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+		RTPRINT(FINIT, INIT_TxPower, ("RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF_PATH_A][ch]));
+	}
+
+	for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+		RTPRINT(FINIT, INIT_TxPower, ("RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF_PATH_A][ch]));
+	}
+	
+	for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+		RTPRINT(FINIT, INIT_TxPower, ("RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF_PATH_B][ch]));
+	}
+	
+	for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+		RTPRINT(FINIT, INIT_TxPower, ("RF-B Legacy to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF_PATH_B][ch]));
+	}
+	
+#endif
+	// 2010/10/19 MH Add Regulator recognize for CU.
+	if(!AutoLoadFail)
+	{
+		pHalData->EEPROMRegulatory = (PROMContent[RF_OPTION1]&0x7);	//bit0~2
+	}
+	else
+	{
+		pHalData->EEPROMRegulatory = 0;
+	}
+	DBG_8192C("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
+
+}
+
+
+//-------------------------------------------------------------------
+//
+//	EEPROM/EFUSE Content Parsing
+//
+//-------------------------------------------------------------------
+static void
+_ReadIDs(
+	IN	PADAPTER	Adapter,
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	if(_FALSE == AutoloadFail){
+		// VID, PID 
+		pHalData->EEPROMVID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_VID]);
+		pHalData->EEPROMPID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_PID]);
+		
+		// Customer ID, 0x00 and 0xff are reserved for Realtek. 		
+		pHalData->EEPROMCustomerID = *(u8 *)&PROMContent[EEPROM_CUSTOMER_ID];
+		pHalData->EEPROMSubCustomerID = *(u8 *)&PROMContent[EEPROM_SUBCUSTOMER_ID];
+
+	}
+	else{
+		pHalData->EEPROMVID	 = EEPROM_Default_VID;
+		pHalData->EEPROMPID	 = EEPROM_Default_PID;
+
+		// Customer ID, 0x00 and 0xff are reserved for Realtek. 		
+		pHalData->EEPROMCustomerID	= EEPROM_Default_CustomerID;
+		pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
+
+	}
+
+	// For customized behavior.
+	if((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629))// HP Lite-On for RTL8188CUS Slim Combo.
+		pHalData->CustomerID = RT_CID_819x_HP;
+
+	//	Decide CustomerID according to VID/DID or EEPROM
+	switch(pHalData->EEPROMCustomerID)
+	{
+		case EEPROM_CID_DEFAULT:
+			if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308))
+				pHalData->CustomerID = RT_CID_DLINK;
+			else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309))
+				pHalData->CustomerID = RT_CID_DLINK;
+			else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a))
+				pHalData->CustomerID = RT_CID_DLINK;
+			break;
+		case EEPROM_CID_WHQL:
+/*			
+			Adapter->bInHctTest = TRUE;
+
+			pMgntInfo->bSupportTurboMode = FALSE;
+			pMgntInfo->bAutoTurboBy8186 = FALSE;
+
+			pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
+			pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
+			pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
+				
+			pMgntInfo->keepAliveLevel = 0;
+
+			Adapter->bUnloadDriverwhenS3S4 = FALSE;
+*/				
+			break;
+		default:
+			pHalData->CustomerID = RT_CID_DEFAULT;
+			break;
+			
+	}
+
+	MSG_8192C("EEPROMVID = 0x%04x\n", pHalData->EEPROMVID);
+	MSG_8192C("EEPROMPID = 0x%04x\n", pHalData->EEPROMPID);
+	MSG_8192C("EEPROMCustomerID : 0x%02x\n", pHalData->EEPROMCustomerID);
+	MSG_8192C("EEPROMSubCustomerID: 0x%02x\n", pHalData->EEPROMSubCustomerID);
+
+	MSG_8192C("RT_CustomerID: 0x%02x\n", pHalData->CustomerID);
+
+}
+
+
+static VOID
+_ReadMACAddress(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+
+	if(_FALSE == AutoloadFail){
+		//Read Permanent MAC address and set value to hardware
+		_rtw_memcpy(pEEPROM->mac_addr, &PROMContent[EEPROM_MAC_ADDR], ETH_ALEN);		
+	}
+	else{
+		//Random assigh MAC address
+		u8 sMacAddr[MAC_ADDR_LEN] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
+		//sMacAddr[5] = (u8)GetRandomNumber(1, 254);		
+		_rtw_memcpy(pEEPROM->mac_addr, sMacAddr, ETH_ALEN);	
+	}
+	DBG_8192C("%s MAC Address from EFUSE = "MAC_FMT"\n",__FUNCTION__, MAC_ARG(pEEPROM->mac_addr));
+	//NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
+	//RT_PRINT_ADDR(COMP_INIT|COMP_EFUSE, DBG_LOUD, "MAC Addr: %s", Adapter->PermanentAddress);
+
+}
+
+static VOID
+_ReadBoardType(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u32			value32;
+	u8			boardType = BOARD_USB_DONGLE;
+
+	if(AutoloadFail){
+		if(IS_8723_SERIES(pHalData->VersionID))
+			pHalData->rf_type = RF_1T1R;
+		else
+		        pHalData->rf_type = RF_2T2R;
+
+		pHalData->BluetoothCoexist = _FALSE;
+		pHalData->BoardType = boardType;
+		return;
+	}
+
+	boardType = PROMContent[EEPROM_NORMAL_BoardType];
+	boardType &= BOARD_TYPE_NORMAL_MASK;//bit[7:5]
+	boardType >>= 5;
+
+	pHalData->BoardType = boardType;
+	MSG_8192C("_ReadBoardType(%x)\n",pHalData->BoardType);
+
+	if (boardType == BOARD_USB_High_PA)
+		pHalData->ExternalPA = 1;
+}
+
+
+static VOID
+_ReadLEDSetting(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	struct led_priv *pledpriv = &(Adapter->ledpriv);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+#ifdef CONFIG_SW_LED
+	pledpriv->bRegUseLed = _TRUE;
+
+	//
+	// Led mode
+	//
+	switch(pHalData->CustomerID)
+	{
+		case RT_CID_DEFAULT:
+			pledpriv->LedStrategy = SW_LED_MODE1;
+			pledpriv->bRegUseLed = _TRUE;
+			break;
+
+		case RT_CID_819x_HP:
+			pledpriv->LedStrategy = SW_LED_MODE6;
+			break;
+
+		default:
+			pledpriv->LedStrategy = SW_LED_MODE1;
+			break;
+	}
+
+	if( BOARD_MINICARD == pHalData->BoardType )
+	{
+		pledpriv->LedStrategy = SW_LED_MODE6;
+	}
+	pHalData->bLedOpenDrain = _TRUE;// Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16.
+#else // HW LED
+	pledpriv->LedStrategy = HW_LED;
+#endif //CONFIG_SW_LED
+}
+
+static VOID
+_ReadThermalMeter(
+	IN	PADAPTER	Adapter,	
+	IN	u8* 	PROMContent,
+	IN	BOOLEAN 	AutoloadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	tempval;
+
+	//
+	// ThermalMeter from EEPROM
+	//
+	if(!AutoloadFail)	
+		tempval = PROMContent[EEPROM_THERMAL_METER];
+	else
+		tempval = EEPROM_Default_ThermalMeter;
+	
+	pHalData->EEPROMThermalMeter = (tempval&0x1f);	//[4:0]
+
+	if(pHalData->EEPROMThermalMeter == 0x1f || AutoloadFail)
+		pdmpriv->bAPKThermalMeterIgnore = _TRUE;
+
+#if 0
+	if(pHalData->EEPROMThermalMeter < 0x06 || pHalData->EEPROMThermalMeter > 0x1c)
+		pHalData->EEPROMThermalMeter = 0x12;
+#endif
+
+	pdmpriv->ThermalMeter[0] = pHalData->EEPROMThermalMeter;
+	
+	//RTPRINT(FINIT, INIT_TxPower, ("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter));
+	
+}
+
+static VOID
+_ReadRFSetting(
+	IN	PADAPTER	Adapter,	
+	IN	u8* 	PROMContent,
+	IN	BOOLEAN 	AutoloadFail
+	)
+{
+}
+
+static void
+_ReadPROMVersion(
+	IN	PADAPTER	Adapter,	
+	IN	u8* 	PROMContent,
+	IN	BOOLEAN 	AutoloadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	if(AutoloadFail){
+		pHalData->EEPROMVersion = EEPROM_Default_Version;		
+	}
+	else{
+		pHalData->EEPROMVersion = *(u8 *)&PROMContent[EEPROM_VERSION];
+	}
+}
+
+static VOID
+readAntennaDiversity(
+	IN	PADAPTER	pAdapter,
+	IN	u8			*hwinfo,
+	IN	BOOLEAN		AutoLoadFail
+	)
+{
+
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct registry_priv	*registry_par = &pAdapter->registrypriv;
+
+	if(!AutoLoadFail)
+	{
+		// Antenna Diversity setting. 
+		if(registry_par->antdiv_cfg == 2) // 2: From Efuse
+			pHalData->AntDivCfg = (hwinfo[EEPROM_RF_OPT1]&0x18)>>3;
+		else
+			pHalData->AntDivCfg = registry_par->antdiv_cfg ;  // 0:OFF , 1:ON,
+
+		DBG_8192C("### AntDivCfg(%x)\n",pHalData->AntDivCfg);	
+
+		//if(pHalData->EEPROMBluetoothCoexist!=0 && pHalData->EEPROMBluetoothAntNum==Ant_x1)
+		//	pHalData->AntDivCfg = 0;
+	}
+	else
+	{
+		pHalData->AntDivCfg = 0;
+	}
+
+}
+
+static VOID
+hal_InitPGData(
+	IN	PADAPTER	pAdapter,
+	IN	OUT	u8		*PROMContent
+	)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	u32	i;
+	u16	value16;
+
+	if(_FALSE == pEEPROM->bautoload_fail_flag)
+	{ // autoload OK.
+		if (_TRUE == pEEPROM->EepromOrEfuse)
+		{
+			// Read all Content from EEPROM or EFUSE.
+			for(i = 0; i < HWSET_MAX_SIZE; i += 2)
+			{
+				//value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1)));
+				//*((u16 *)(&PROMContent[i])) = value16; 				
+			}
+		}
+		else
+		{
+			// Read EFUSE real map to shadow.
+			EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE);
+			_rtw_memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE);
+		}
+	}
+	else
+	{//autoload fail
+		//RT_TRACE(COMP_INIT, DBG_LOUD, ("AutoLoad Fail reported from CR9346!!\n")); 
+		pEEPROM->bautoload_fail_flag = _TRUE;
+		//update to default value 0xFF
+		if (_FALSE == pEEPROM->EepromOrEfuse)		
+		EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE);	
+	}
+}
+// Read HW power down mode selection 
+static void _ReadPSSetting(IN PADAPTER Adapter,IN u8*PROMContent,IN u8	AutoloadFail)
+{
+	if(AutoloadFail){
+		Adapter->pwrctrlpriv.bHWPowerdown = _FALSE;
+		Adapter->pwrctrlpriv.bSupportRemoteWakeup = _FALSE;
+	}
+	else	{
+		//if(SUPPORT_HW_RADIO_DETECT(Adapter))
+			Adapter->pwrctrlpriv.bHWPwrPindetect = Adapter->registrypriv.hwpwrp_detect;
+		//else
+			//Adapter->pwrctrlpriv.bHWPwrPindetect = _FALSE;//dongle not support new
+			
+			
+		//hw power down mode selection , 0:rf-off / 1:power down
+
+		if(Adapter->registrypriv.hwpdn_mode==2)
+			Adapter->pwrctrlpriv.bHWPowerdown = (PROMContent[EEPROM_RF_OPT3] & BIT4);
+		else
+			Adapter->pwrctrlpriv.bHWPowerdown = Adapter->registrypriv.hwpdn_mode;
+#ifdef CONFIG_WOWLAN			
+		// decide hw if support remote wakeup function
+		// if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume
+		Adapter->pwrctrlpriv.bSupportRemoteWakeup = (PROMContent[EEPROM_TEST_USB_OPT] & BIT1)?_TRUE :_FALSE;
+#endif //CONFIG_WOWLAN
+
+		//if(SUPPORT_HW_RADIO_DETECT(Adapter))	
+			//Adapter->registrypriv.usbss_enable = Adapter->pwrctrlpriv.bSupportRemoteWakeup ;
+		
+		DBG_8192C("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__FUNCTION__,
+		Adapter->pwrctrlpriv.bHWPwrPindetect,Adapter->pwrctrlpriv.bHWPowerdown ,Adapter->pwrctrlpriv.bSupportRemoteWakeup);
+
+		DBG_8192C("### PS params=>  power_mgnt(%x),usbss_enable(%x) ###\n",Adapter->registrypriv.power_mgnt,Adapter->registrypriv.usbss_enable);
+		
+	}
+	
+}
+
+static VOID
+readAdapterInfo_8192CU(
+	IN	PADAPTER	Adapter
+	)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
+	u8	PROMContent[HWSET_MAX_SIZE]={0};
+
+	hal_InitPGData(Adapter, PROMContent);
+	rtl8192c_EfuseParseIDCode(Adapter, PROMContent);
+	
+	_ReadPROMVersion(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	_ReadIDs(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	_ReadMACAddress(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);	
+	ReadTxPowerInfo(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	_ReadBoardType(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+
+#ifdef CONFIG_BT_COEXIST
+	//
+	// Read Bluetooth co-exist and initialize
+	//
+	rtl8192c_ReadBluetoothCoexistInfo(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+#endif
+	
+	rtl8192c_EfuseParseChnlPlan(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	_ReadThermalMeter(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	_ReadLEDSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);	
+	_ReadRFSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	_ReadPSSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	readAntennaDiversity(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+
+	//hal_CustomizedBehavior_8723U(Adapter);
+
+	Adapter->bDongle = (PROMContent[EEPROM_EASY_REPLACEMENT] == 1)? 0: 1;
+	DBG_8192C("%s(): REPLACEMENT = %x\n",__FUNCTION__,Adapter->bDongle);
+#ifdef CONFIG_INTEL_PROXIM	
+		/* for intel proximity */
+	if (pHalData->rf_type== RF_1T1R) {
+		Adapter->proximity.proxim_support = _TRUE;
+	} else if (pHalData->rf_type== RF_2T2R) {
+		if ((pHalData->EEPROMPID == 0x8186) &&
+			(pHalData->EEPROMVID== 0x0bda))
+		Adapter->proximity.proxim_support = _TRUE;
+	} else {
+		Adapter->proximity.proxim_support = _FALSE;
+	}
+#endif //CONFIG_INTEL_PROXIM		
+}
+
+static void _ReadPROMContent(
+	IN PADAPTER 		Adapter
+	)
+{	
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			PROMContent[HWSET_MAX_SIZE]={0};
+	u8			eeValue;
+	u32			i;
+	u16			value16;
+
+	eeValue = rtw_read8(Adapter, REG_9346CR);
+	// To check system boot selection.
+	pEEPROM->EepromOrEfuse		= (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE;
+	pEEPROM->bautoload_fail_flag	= (eeValue & EEPROM_EN) ? _FALSE : _TRUE;
+
+
+	DBG_8192C("Boot from %s, Autoload %s !\n", (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"),
+				(pEEPROM->bautoload_fail_flag ? "Fail" : "OK") );
+
+	//pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE;
+
+	//if(IS_HARDWARE_TYPE_8723A(Adapter))
+	//	readAdapterInfo_8723U(Adapter);
+	//else
+		readAdapterInfo_8192CU(Adapter);
+}
+
+
+static VOID
+_InitOtherVariable(
+	IN PADAPTER 		Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);	
+
+
+	//if(Adapter->bInHctTest){
+	//	pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
+	//	pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
+	//	pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
+	//	pMgntInfo->keepAliveLevel = 0;
+	//}
+
+	// 2009/06/10 MH For 92S 1*1=1R/ 1*2&2*2 use 2R. We default set 1*1 use radio A
+	// So if you want to use radio B. Please modify RF path enable bit for correct signal
+	// strength calculate.
+	if (pHalData->rf_type == RF_1T1R){
+		pHalData->bRFPathRxEnable[0] = _TRUE;
+	}
+	else{
+		pHalData->bRFPathRxEnable[0] = pHalData->bRFPathRxEnable[1] = _TRUE;
+	}
+
+}
+
+static VOID
+_ReadRFType(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+#if DISABLE_BB_RF
+	pHalData->rf_chip = RF_PSEUDO_11N;
+#else
+	pHalData->rf_chip = RF_6052;
+#endif
+}
+
+void _ReadSilmComboMode(PADAPTER Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	pHalData->SlimComboDbg = _FALSE;	// Default is not debug mode.
+
+	// 2010/11/22 MH We need to enter debug mode for TSMA and UMC A cut
+	if ((Adapter->chip_type == RTL8188C_8192C) && 
+		(pHalData->BoardType == BOARD_USB_COMBO))
+	{			
+		switch (pHalData->VersionID)
+		{
+			case	VERSION_NORMAL_TSMC_CHIP_88C:
+			case	VERSION_NORMAL_TSMC_CHIP_92C:
+			case	VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
+			case	VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
+			case	VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
+			case	VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
+				if ((rtw_read8(Adapter, REG_SYS_CFG+3) &0xF0) == 0x20)
+					pHalData->SlimComboDbg = _TRUE;
+				
+				break;
+
+			case	VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
+			case	VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
+			case	VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
+				// 2011/02/15 MH UNC-B cut ECO fail, we need to support slim combo debug mode.
+				if ((rtw_read8(Adapter, REG_SYS_CFG+3) &0xF0) == 0x20)
+					pHalData->SlimComboDbg = _TRUE;
+				break;
+				
+			default:
+				break;
+		}		
+		
+	}
+	
+}
+static int _ReadAdapterInfo8192CU(PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32 start=rtw_get_current_time();
+	
+	MSG_8192C("====> ReadAdapterInfo8192C\n");
+
+	//Efuse_InitSomeVar(Adapter);
+
+	//if(IS_HARDWARE_TYPE_8723A(Adapter))
+	//	_EfuseCellSel(Adapter);
+
+	_ReadRFType(Adapter);//rf_chip -> _InitRFType()
+	_ReadPROMContent(Adapter);
+
+	// 2010/10/25 MH THe function must be called after borad_type & IC-Version recognize.
+	_ReadSilmComboMode(Adapter);
+
+	_InitOtherVariable(Adapter);
+
+	//MSG_8192C("%s()(done), rf_chip=0x%x, rf_type=0x%x\n",  __FUNCTION__, pHalData->rf_chip, pHalData->rf_type);
+
+	MSG_8192C("<==== ReadAdapterInfo8192C in %d ms\n", rtw_get_passing_time_ms(start));
+
+	return _SUCCESS;
+}
+
+
+static void ReadAdapterInfo8192CU(PADAPTER Adapter)
+{
+	// Read EEPROM size before call any EEPROM function
+	//Adapter->EepromAddressSize=Adapter->HalFunc.GetEEPROMSizeHandler(Adapter);
+	Adapter->EepromAddressSize = GetEEPROMSize8192C(Adapter);
+	
+	_ReadAdapterInfo8192CU(Adapter);
+}
+
+
+#define GPIO_DEBUG_PORT_NUM 0
+static void rtl8192cu_trigger_gpio_0(_adapter *padapter)
+{
+
+	u32 gpioctrl;
+	DBG_8192C("==> trigger_gpio_0...\n");
+	rtw_write16_async(padapter,REG_GPIO_PIN_CTRL,0);
+	rtw_write8_async(padapter,REG_GPIO_PIN_CTRL+2,0xFF);
+	gpioctrl = (BIT(GPIO_DEBUG_PORT_NUM)<<24 )|(BIT(GPIO_DEBUG_PORT_NUM)<<16);
+	rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl);
+	gpioctrl |= (BIT(GPIO_DEBUG_PORT_NUM)<<8);
+	rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl);
+	DBG_8192C("<=== trigger_gpio_0...\n");
+
+}
+
+static void ResumeTxBeacon(_adapter *padapter)
+{
+	HAL_DATA_TYPE*	pHalData = GET_HAL_DATA(padapter);	
+
+	// 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value
+	// which should be read from register to a global variable.
+
+	rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6);
+	pHalData->RegFwHwTxQCtrl |= BIT6;	 
+}
+
+static void StopTxBeacon(_adapter *padapter)
+{
+	HAL_DATA_TYPE*	pHalData = GET_HAL_DATA(padapter);
+
+	// 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value
+	// which should be read from register to a global variable.
+
+	rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6));
+	pHalData->RegFwHwTxQCtrl &= (~BIT6);
+
+	 //todo: CheckFwRsvdPageContent(Adapter);  // 2010.06.23. Added by tynli.
+
+}
+
+u16 CRC16(u8 data,u16 CRC)
+{
+	unsigned char shift_in,CRC_BIT15,DataBit,CRC_BIT11,CRC_BIT4 ;
+	int index;
+	unsigned short CRC_Result;
+
+	for(index=0;index<8;index++)
+	{
+		CRC_BIT15=((CRC&BIT15) ? 1:0);
+		DataBit  =(data&(BIT0<<index) ? 1:0);
+		shift_in=CRC_BIT15^DataBit;
+		//printf("CRC_BIT15=%d, DataBit=%d, shift_in=%d \n",CRC_BIT15,DataBit,shift_in);
+		
+		CRC_Result=CRC<<1;
+		//set BIT0 
+		//	printf("CRC =%x\n",CRC_Result);
+		//CRC bit 0 =shift_in,
+		if(shift_in==0)
+		{
+			CRC_Result&=(~BIT0); 
+		}
+		else
+		{
+			CRC_Result|=BIT0;
+		}
+		//printf("CRC =%x\n",CRC_Result);
+
+		CRC_BIT11 = ((CRC&BIT11) ? 1:0)^shift_in;
+		if(CRC_BIT11==0)
+		{
+			CRC_Result&=(~BIT12); 
+		}
+		else
+		{
+			CRC_Result|=BIT12;
+		}
+		//printf("bit12 CRC =%x\n",CRC_Result);
+
+		CRC_BIT4 = ((CRC&BIT4) ? 1:0)^shift_in;
+		if(CRC_BIT4==0)
+		{
+			CRC_Result&=(~BIT5); 
+		}
+		else
+		{
+			CRC_Result|=BIT5;
+		}
+		//printf("bit5 CRC =%x\n",CRC_Result);
+
+		CRC=CRC_Result; //­«½Æ¨Ï¥Î¤W¤@¦¸ªºµ²ªG
+	}
+
+	return CRC;
+	
+}
+
+
+/////////////////////////////////////////////////
+//
+//function name :calc_crc
+//
+//input         : char* pattern , pattern size
+//
+//////////////////////////////////////////////////
+u16 calc_crc(u8 * pdata,int length)
+{
+//    unsigned char data[2]={0xC6,0xAA};
+	u16 CRC=0xffff;
+	int i;
+	
+	for(i=0;i<length;i++)
+	{
+		CRC=CRC16(pdata[i],CRC);
+	}
+
+	CRC=~CRC;                  //¨ú¸É¼Æ
+	printk("CRC =%x\n",CRC);
+	return CRC;
+}
+
+static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8* val)
+{
+	u8	val8;
+	u8	mode = *((u8 *)val);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if(Adapter->iface_type == IFACE_PORT1)
+	{
+		// disable Port1 TSF update
+		rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4));
+		
+		// set net_type
+		val8 = rtw_read8(Adapter, MSR)&0x03;
+		val8 |= (mode<<2);
+		rtw_write8(Adapter, MSR, val8);
+		
+		//reset TSF1	
+		rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1));
+		
+		DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode);
+	
+		if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_))
+		{
+			if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE))			
+			{
+				StopTxBeacon(Adapter);
+			}
+			
+			rtw_write8(Adapter,REG_BCN_CTRL_1, 0x19);//disable atim wnd
+			//rtw_write8(Adapter,REG_BCN_CTRL_1, 0x18);
+		}
+		else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/)
+		{
+			ResumeTxBeacon(Adapter);
+			rtw_write8(Adapter,REG_BCN_CTRL_1, 0x1a);
+		}
+		else if(mode == _HW_STATE_AP_)
+		{
+			ResumeTxBeacon(Adapter);
+					
+			rtw_write8(Adapter, REG_BCN_CTRL_1, 0x12);
+					
+			//Set RCR
+			//rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0
+			rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0
+			//enable to rx data frame				
+			rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
+			//enable to rx ps-poll
+			rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400);
+
+			//Beacon Control related register for first time 
+			rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms		
+			rtw_write8(Adapter, REG_DRVERLYINT, 0x05);// 5ms
+			//rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);
+			rtw_write8(Adapter, REG_ATIMWND_1, 0x0a); // 10ms for port1
+			rtw_write16(Adapter, REG_BCNTCFG, 0x00);
+			rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
+			rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms)
+	
+
+		       	//enable BCN1 Function for if2
+			//don't enable update TSF1 for if2 (due to TSF update when beacon/probe rsp are received)
+			rtw_write8(Adapter, REG_BCN_CTRL_1, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1)));
+
+#ifdef CONFIG_CONCURRENT_MODE
+			if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE))
+				rtw_write8(Adapter, REG_BCN_CTRL, 
+					rtw_read8(Adapter, REG_BCN_CTRL) & ~EN_BCN_FUNCTION);
+#endif
+
+			DBG_871X("%s()-%d: REG_BCN_CTRL_1 = %02x\n", __FUNCTION__, __LINE__, rtw_read8(Adapter, REG_BCN_CTRL_1));
+			
+                        //BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked
+			//rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(5));
+			//rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3));
+					
+			//dis BCN0 ATIM  WND if if1 is station
+			rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(0));
+#ifdef CONFIG_TSF_RESET_OFFLOAD
+			// Reset TSF for STA+AP concurrent mode
+			if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) {
+				if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE)
+					DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n",
+						__FUNCTION__, __LINE__);
+			}
+#endif	// CONFIG_TSF_RESET_OFFLOAD
+		}
+
+	}
+	else	// (Adapter->iface_type == IFACE_PORT1)
+#endif //CONFIG_CONCURRENT_MODE
+	{
+		// disable Port0 TSF update
+		rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
+		
+		// set net_type
+		val8 = rtw_read8(Adapter, MSR)&0x0c;
+		val8 |= mode;
+		rtw_write8(Adapter, MSR, val8);
+		
+		//reset TSF0	
+		rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
+
+		DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode);
+		
+		if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_))
+		{
+#ifdef CONFIG_CONCURRENT_MODE
+			if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE))		
+#endif //CONFIG_CONCURRENT_MODE
+			{
+				StopTxBeacon(Adapter);
+			}
+			
+			rtw_write8(Adapter,REG_BCN_CTRL, 0x19);//disable atim wnd
+			//rtw_write8(Adapter,REG_BCN_CTRL, 0x18);
+		}		
+		else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/)
+		{
+			ResumeTxBeacon(Adapter);
+			rtw_write8(Adapter,REG_BCN_CTRL, 0x1a);
+		}
+		else if(mode == _HW_STATE_AP_)
+		{
+			ResumeTxBeacon(Adapter);
+					
+			rtw_write8(Adapter, REG_BCN_CTRL, 0x12);
+					
+			//Set RCR
+			//write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0
+			rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0
+			//enable to rx data frame				
+			rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
+			//enable to rx ps-poll
+			rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400);
+
+			//Beacon Control related register for first time 
+
+			rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms		
+			rtw_write8(Adapter, REG_DRVERLYINT, 0x05);// 5ms
+
+			//write8(Adapter, REG_BCN_MAX_ERR, 0xFF);
+			rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms for port0
+			rtw_write16(Adapter, REG_BCNTCFG, 0x00);
+			rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
+			rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms)
+	
+		        //enable BCN0 Function for if1
+			//don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received)
+			rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1)));
+					
+#ifdef CONFIG_CONCURRENT_MODE
+			if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE))
+				rtw_write8(Adapter, REG_BCN_CTRL_1, 
+					rtw_read8(Adapter, REG_BCN_CTRL_1) & ~EN_BCN_FUNCTION);
+#endif
+			//BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked
+			//only interface 2 as AP MODE need to sync
+			//rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(5));
+			
+							
+			//dis BCN1 ATIM  WND if if2 is station
+			rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(0));
+#ifdef CONFIG_TSF_RESET_OFFLOAD
+			// Reset TSF for STA+AP concurrent mode
+			if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) {
+				if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE)
+					DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n",
+						__FUNCTION__, __LINE__);
+			}
+#endif	// CONFIG_TSF_RESET_OFFLOAD			
+					
+		}
+
+
+	}
+
+}
+
+static void hw_var_set_macaddr(PADAPTER Adapter, u8 variable, u8* val)
+{
+	u8 idx = 0;
+	u32 reg_macid;
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if(Adapter->iface_type == IFACE_PORT1)
+	{
+		reg_macid = REG_MACID1;
+	}
+	else
+#endif
+	{
+		reg_macid = REG_MACID;
+	}
+
+	for(idx = 0 ; idx < 6; idx++)
+	{
+		rtw_write8(Adapter, (reg_macid+idx), val[idx]);
+	}
+	
+}
+
+static void hw_var_set_bssid(PADAPTER Adapter, u8 variable, u8* val)
+{
+	u8	idx = 0;
+	u32 reg_bssid;
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if(Adapter->iface_type == IFACE_PORT1)
+	{
+		reg_bssid = REG_BSSID1;
+	}
+	else
+#endif
+	{
+		reg_bssid = REG_BSSID;
+	}
+
+	for(idx = 0 ; idx < 6; idx++)
+	{
+		rtw_write8(Adapter, (reg_bssid+idx), val[idx]);
+	}
+
+}
+
+static void hw_var_set_bcn_func(PADAPTER Adapter, u8 variable, u8* val)
+{
+	u32 bcn_ctrl_reg;
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if(Adapter->iface_type == IFACE_PORT1)
+	{
+		bcn_ctrl_reg = REG_BCN_CTRL_1;
+
+		if(*((u8 *)val))
+		{
+			rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
+		}
+		else
+		{
+			rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
+		}
+	}	
+	else
+#endif		
+	{		
+		bcn_ctrl_reg = REG_BCN_CTRL;
+		if(*((u8 *)val))
+		{
+			rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
+		}
+		else
+		{
+			//rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
+			rtw_write8(Adapter, bcn_ctrl_reg, (rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_TXBCN_RPT))) | DIS_TSF_UDT0_NORMAL_CHIP);
+		}
+	}
+	
+
+}
+
+#ifdef CONFIG_WOWLAN
+static int rtw_wowlan_set_pattern(_adapter *padapter ,u8* pbuf){
+	struct pwrctrl_priv *pwrpriv=&padapter->pwrctrlpriv;
+	int res=0,crc_idx;
+	u32 content=0,cmd=0;
+	u32 *pdata;
+	u8 config,crc,mc,bc,uc,idx,pattern_len,packet[200],packet_len,valid;
+	u16 crc_val=0,i;
+
+	config=pbuf[0];
+	bc=config & BIT(3)?1:0;
+	mc=config & BIT(4)?1:0;
+	uc=config & BIT(5)?1:0;
+	idx=config & 0x7;
+	crc=config & BIT(6)?1:0;
+	valid=config & BIT(7)?1:0;
+	pattern_len=pbuf[1];
+	packet_len=pattern_len*8;
+	pdata=(u32 *)pbuf;
+
+	// Write to the Wakeup CAM
+	//offset 0
+	if(pattern_len>=4){
+		content=pdata[1];
+	}
+	else{	
+		content=0;
+	}
+	DBG_8192C("\nrtw_wowlan_set_pattern offset[0]  content  0x%x  [cpu_to_le32  0x%x]\n", content,__cpu_to_le32(content));
+	//rtw_write32(padapter, REG_WKFMCAM_RWD, __cpu_to_le32(content));
+	pwrpriv->wowlan_pattern_context[idx][0]= __cpu_to_le32(content);
+	//cmd=BIT(31)|BIT(16)|(idx+0);
+	//rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+	//offset 4
+	if(pattern_len>=8){
+		content=pdata[2];
+	}
+	else{	
+		content=0;
+	}
+	DBG_8192C("rtw_wowlan_set_pattern offset[4]  content  0x%x  [cpu_to_le32  0x%x]\n", content,__cpu_to_le32(content));
+	//rtw_write32(padapter, REG_WKFMCAM_RWD, __cpu_to_le32(content));
+	pwrpriv->wowlan_pattern_context[idx][1]= __cpu_to_le32(content);
+
+	//cmd=BIT(31)|BIT(16)|(idx+1);
+	//rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+	//offset 8
+	if(pattern_len>=12){
+		content=pdata[3];
+	}
+	else{	
+		content=0;
+	}
+	DBG_8192C("rtw_wowlan_set_pattern offset[8]  content  0x%x  [cpu_to_le32  0x%x]\n", content,__cpu_to_le32(content));
+	//rtw_write32(padapter, REG_WKFMCAM_RWD, __cpu_to_le32(content));
+	pwrpriv->wowlan_pattern_context[idx][2]= __cpu_to_le32(content);
+	//cmd=BIT(31)|BIT(16)|(idx+2);
+	//rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+	//offset 12
+	if(pattern_len>=16){
+		content=pdata[4];
+	}
+	else{	
+		content=0;
+	}
+	DBG_8192C("rtw_wowlan_set_pattern offset[12]  content  0x%x  [cpu_to_le32  0x%x]\n", content,__cpu_to_le32(content));
+	//rtw_write32(padapter, REG_WKFMCAM_RWD, __cpu_to_le32(content));
+	pwrpriv->wowlan_pattern_context[idx][3]= __cpu_to_le32(content);
+	//cmd=BIT(31)|BIT(16)|(idx+3);
+	//rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+
+	if(crc){
+		// Have the CRC value
+		crc_val=*(u16 *)(&pbuf[2]);
+		DBG_8192C("rtw_wowlan_set_pattern crc_val  0x%x  \n", crc_val);
+		crc_val=__cpu_to_le16(crc_val);
+		DBG_8192C("rtw_wowlan_set_pattern crc_val  after 0x%x  \n", crc_val);
+	}
+	else{
+		DBG_8192C("+rtw_wowlan_set_pattern   crc=0[%x]  Should calculate the CRC\n", crc);
+		// calculate the CRC the write to the Wakeup CAM
+		crc_idx=0;
+		for(i=0;i<packet_len;i++){
+			if(pbuf[4+(i/8)]&(0x01<<(i%8)))
+			{
+				packet[crc_idx++]=pbuf[20+i];
+		//		printk("\n i=%d packet[i]=%x pbuf[20+i(%d)]=%x \n",i,packet[i],20+i,pbuf[20+i]);
+			}
+		}
+		crc_val=calc_crc(packet, crc_idx);
+		printk("+rtw_wowlan_set_pattern   crc_val=0x%.8x \n", crc_val);
+
+	}
+
+	//offset 16
+	content=(valid<<31)| (bc<<26)|(mc<<25)|(uc<<24) |crc_val;
+	printk("rtw_wowlan_set_pattern offset[16]  content  0x%x \n", content);
+	rtw_write32(padapter, REG_WKFMCAM_RWD,content);
+	pwrpriv->wowlan_pattern_context[idx][4]= content;
+	//cmd=BIT(31)|BIT(16)|(idx+4);
+	//rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+	pwrpriv->wowlan_pattern_idx|=BIT(idx);
+	
+_rtw_wowlan_set_pattern_exit:
+	return res;
+}
+
+
+
+void rtw_wowlan_reload_pattern(_adapter *padapter){
+	struct pwrctrl_priv *pwrpriv=&padapter->pwrctrlpriv;
+	u32 content=0,cmd=0;
+	u8 idx;
+
+	for (idx=0;idx<8;idx ++){
+		if(pwrpriv->wowlan_pattern_idx & BIT(idx)){
+			//offset 0
+			rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][0]);
+			cmd=BIT(31)|BIT(16)|(idx+0);
+			rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+
+			//offset 4
+			rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][1]);
+			cmd=BIT(31)|BIT(16)|(idx+1);
+			rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+
+			//offset 8
+			rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][2]);
+			cmd=BIT(31)|BIT(16)|(idx+2);
+			rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+
+			//offset 12
+			rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][3]);
+			cmd=BIT(31)|BIT(16)|(idx+3);
+			rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+
+			//offset 16
+			rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][4]);
+			cmd=BIT(31)|BIT(16)|(idx+4);
+			rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+
+		}
+		printk("print WOWCAM  idx =%d\n",idx);
+		cmd=BIT(31)|(idx+0);
+		rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+		printk("print WOWCAM  offset[0]  =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD));
+		cmd=BIT(31)|(idx+1);
+		rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+		printk("print WOWCAM  offset[1]  =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD));
+		cmd=BIT(31)|(idx+2);
+		rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+		printk("print WOWCAM  offset[2]  =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD));
+		cmd=BIT(31)|(idx+3);
+		rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+		printk("print WOWCAM  offset[3]  =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD));		
+		cmd=BIT(31)|(idx+4);
+		rtw_write32(padapter, REG_WKFMCAM_CMD, cmd);
+		printk("print WOWCAM  offset[4]  =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD));
+
+
+	}
+}
+#endif //CONFIG_WOWLAN
+
+static void hw_var_set_correct_tsf(PADAPTER Adapter, u8 variable, u8* val)
+{
+#ifdef CONFIG_CONCURRENT_MODE
+	u64	tsf;
+	struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us
+	tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us
+
+	if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+	{				
+		//pHalData->RegTxPause |= STOP_BCNQ;BIT(6)
+		//rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6)));
+		StopTxBeacon(Adapter);
+	}
+
+	if(Adapter->iface_type == IFACE_PORT1)
+	{
+		//disable related TSF function
+		rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3)));
+							
+		rtw_write32(Adapter, REG_TSFTR1, tsf);
+		rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32);
+
+		//enable related TSF function
+		rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3));
+
+
+#ifdef CONFIG_TSF_RESET_OFFLOAD
+		// Update buddy port's TSF(TBTT) if it is SoftAP for beacon TX issue!
+		if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE
+			&& check_buddy_fwstate(Adapter, WIFI_AP_STATE) ) { 
+			if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE)
+				DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n",
+					__FUNCTION__, __LINE__);
+		}
+#endif	// CONFIG_TSF_RESET_OFFLOAD
+
+	}
+	else	// Adapter->iface_type == IFACE_PORT1
+	{
+		//disable related TSF function
+		rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
+		// disable TSF update instead! May induce burst beacon TX
+		//rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
+							
+		rtw_write32(Adapter, REG_TSFTR, tsf);
+		rtw_write32(Adapter, REG_TSFTR+4, tsf>>32);
+
+		//enable related TSF function
+		rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3));
+		//rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));		
+		
+		// Update buddy port's TSF if it is SoftAP for beacon TX issue!
+		if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE
+			&& check_buddy_fwstate(Adapter, WIFI_AP_STATE)
+		) { 
+			//disable related TSF function
+			rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3)));
+			// disable TSF update instead!
+			//rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4));
+
+			rtw_write32(Adapter, REG_TSFTR1, tsf);
+			rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32);
+
+			//enable related TSF function
+			rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3));
+			//rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4)));
+		}		
+#ifdef CONFIG_TSF_RESET_OFFLOAD
+		// Update buddy port's TSF if it is SoftAP for beacon TX issue!
+		if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE
+			&& check_buddy_fwstate(Adapter, WIFI_AP_STATE) ) {
+			if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE)
+				DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n",
+					__FUNCTION__, __LINE__);
+		}
+#endif	// CONFIG_TSF_RESET_OFFLOAD
+	}
+
+	if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+	{
+		//pHalData->RegTxPause  &= (~STOP_BCNQ);
+		//rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6))));
+		ResumeTxBeacon(Adapter);
+	}
+#endif	// CONFIG_CONCURRENT_MODE
+}
+
+static void hw_var_set_mlme_disconnect(PADAPTER Adapter, u8 variable, u8* val)
+{
+#ifdef CONFIG_CONCURRENT_MODE
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
+
+				
+	if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_))	
+		rtw_write16(Adapter, REG_RXFLTMAP2, 0x00);
+	
+
+	if(Adapter->iface_type == IFACE_PORT1)
+	{
+		int i;
+		u8 reg_bcn_ctrl_1;
+
+	   	// a.Driver set 0x422 bit 6 =0
+		rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6));
+		pHalData->RegFwHwTxQCtrl &= (~BIT6);
+
+
+#ifdef CONFIG_BEACON_DISABLE_OFFLOAD
+		u8 reg_bcn_disable_cnt = rtw_read8(Adapter, REG_FW_BCN_DIS_CNT);
+		DBG_871X("%s()-%d: reg_bcn_disable_cnt=%02x\n", __FUNCTION__, __LINE__, reg_bcn_disable_cnt);
+	   	
+		reg_bcn_ctrl_1 = rtw_read8(Adapter, REG_BCN_CTRL_1); 
+		DBG_871X("%s()-%d: reg_bcn_ctrl_1=%02x\n", __FUNCTION__, __LINE__, reg_bcn_ctrl_1);
+
+	   	// b. driver set h2c cmd
+	   	rtl8192c_dis_beacon_fun_cmd(Adapter);	   
+	 
+		/*
+			// FW Job for port 0
+			
+		   c. 8051 set nettype to ap
+		   d. 8051 check dma_int
+		   e. 8051 set nettype to no_link
+		   f.8051 dis_tsf_update   0x550 bit 4
+		   g.8051 reset  beacon function test count   0x553 bit0.
+		   h.8051 disable beacon function   0x550  bit3
+		   i. 8051 sent ready to driver
+
+	 	*/
+	 	
+	 	// The worst case is 100 + 15 ms
+		rtw_msleep_os(120);
+		
+		for (i=0; i< 10; i++) {
+			reg_bcn_ctrl_1 = rtw_read8(Adapter, REG_BCN_CTRL_1); 
+			if ( (reg_bcn_ctrl_1 & BIT(3)) == 0 ) {
+				//DBG_871X("%s()-%d: BEACON_DISABLE_OFFLOAD finished! reg=%02x\n", __FUNCTION__, __LINE__, reg);
+				break;
+			}
+			DBG_871X("%s()-%d: BEACON_DISABLE_OFFLOAD not finished! REG_BCN_CTRL_1=%02x\n", __FUNCTION__, __LINE__, reg_bcn_ctrl_1);
+			DBG_871X("%s()-%d: reg_bcn_disable_cnt=%02x\n", __FUNCTION__, __LINE__, rtw_read8(Adapter, REG_FW_BCN_DIS_CNT));
+			DBG_871X("%s()-%d: REG_BCN_CTRL=%02x\n", __FUNCTION__, __LINE__, rtw_read8(Adapter, REG_BCN_CTRL));
+			DBG_871X("%s()-%d: FWISR=%08x\n", __FUNCTION__, __LINE__, rtw_read32(Adapter, REG_FWISR));
+			rtw_msleep_os(100);
+		}
+		DBG_871X("%s()-%d: reg_bcn_disable_cnt=%02x\n", __FUNCTION__, __LINE__, rtw_read8(Adapter, REG_FW_BCN_DIS_CNT));
+		DBG_871X("%s()-%d: reg_bcn_ctrl_1=%02x\n", __FUNCTION__, __LINE__, reg_bcn_ctrl_1);
+
+#else   // CONFIG_BEACON_DISABLE_OFFLOAD
+
+		//disable update TSF1
+		rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4));
+
+		//reset TSF1
+		rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1));
+
+		// disable Port1's beacon function
+		rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3)));
+
+#endif  // CONFIG_BEACON_DISABLE_OFFLOAD
+	 	
+		// j, Driver set 0x422 bit 6 =1
+		rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6);
+		pHalData->RegFwHwTxQCtrl |= BIT6;
+
+		// k. re_download beacon pkt 
+		if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE))	
+			set_tx_beacon_cmd(pbuddy_adapter);
+		   
+
+	}
+	else	// (Adapter->iface_type == IFACE_PORT1)
+	{
+		//disable update TSF
+		rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
+
+		//reset TSF
+		rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
+
+		// Can't disable Port0's beacon function due to it is used by RA
+	}
+#endif
+}
+
+static void hw_var_set_mlme_sitesurvey(PADAPTER Adapter, u8 variable, u8* val)
+{
+	u32	value_rcr, rcr_clear_bit, reg_bcn_ctl;
+	u16	value_rxfltmap2;
+	struct mlme_priv *pmlmepriv=&(Adapter->mlmepriv);
+
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if(Adapter->iface_type == IFACE_PORT1)
+		reg_bcn_ctl = REG_BCN_CTRL_1;
+	else
+#endif
+		reg_bcn_ctl = REG_BCN_CTRL;
+
+#ifdef CONFIG_FIND_BEST_CHANNEL
+
+	if( (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+#ifdef CONFIG_CONCURRENT_MODE
+		|| (check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE)
+#endif
+#ifdef CONFIG_TDLS
+		// TDLS will clear RCR_CBSSID_DATA bit for connection.
+		|| ( Adapter->tdlsinfo.setup_state & TDLS_LINKED_STATE )
+#endif // CONFIG_TDLS
+		)
+	{
+		rcr_clear_bit = RCR_CBSSID_BCN;
+	}
+	else
+	{
+		rcr_clear_bit = (RCR_CBSSID_BCN | RCR_CBSSID_DATA);
+	}
+
+	// Recieve all data frames
+	value_rxfltmap2 = 0xFFFF;
+
+#else /* CONFIG_FIND_BEST_CHANNEL */
+
+	rcr_clear_bit = RCR_CBSSID_BCN;
+
+	//config RCR to receive different BSSID & not to receive data frame
+	value_rxfltmap2 = 0;
+
+#endif /* CONFIG_FIND_BEST_CHANNEL */
+
+	value_rcr = rtw_read32(Adapter, REG_RCR);
+
+	if(*((u8 *)val))//under sitesurvey
+	{
+		value_rcr &= ~(rcr_clear_bit);
+		rtw_write32(Adapter, REG_RCR, value_rcr);
+
+		rtw_write16(Adapter, REG_RXFLTMAP2, value_rxfltmap2);
+
+		if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE |WIFI_ADHOC_MASTER_STATE)) {
+			//disable update TSF
+			rtw_write8(Adapter, reg_bcn_ctl, rtw_read8(Adapter, reg_bcn_ctl)|BIT(4));
+		}
+
+#ifdef CONFIG_CONCURRENT_MODE
+		if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) &&
+			check_buddy_fwstate(Adapter, _FW_LINKED))
+		{
+			StopTxBeacon(Adapter);
+		}
+#endif
+	}
+	else//sitesurvey done
+	{
+		if(check_fwstate(pmlmepriv, _FW_LINKED) || check_fwstate(pmlmepriv, WIFI_AP_STATE)
+#ifdef CONFIG_CONCURRENT_MODE
+			|| check_buddy_fwstate(Adapter, _FW_LINKED) || check_buddy_fwstate(Adapter, WIFI_AP_STATE)
+#endif
+			)
+		{
+			//enable to rx data frame
+			rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
+		}
+
+		if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE |WIFI_ADHOC_MASTER_STATE)) {
+			//enable update TSF
+			rtw_write8(Adapter, reg_bcn_ctl, rtw_read8(Adapter, reg_bcn_ctl)&(~BIT(4)));
+		}
+
+		value_rcr |= rcr_clear_bit;
+		rtw_write32(Adapter, REG_RCR, value_rcr);
+
+#ifdef CONFIG_CONCURRENT_MODE
+		if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) &&
+			check_buddy_fwstate(Adapter, _FW_LINKED))
+		{
+			ResumeTxBeacon(Adapter);			
+		}
+#endif
+	}
+}
+
+static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8* val)
+{
+#ifdef CONFIG_CONCURRENT_MODE
+	u8	RetryLimit = 0x30;
+	u8	type = *((u8 *)val);
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv	*pmlmepriv = &Adapter->mlmepriv;
+
+	if(type == 0) // prepare to join
+	{		
+		if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) &&
+			check_buddy_fwstate(Adapter, _FW_LINKED))		
+		{
+			StopTxBeacon(Adapter);
+		}
+	
+		//enable to rx data frame.Accept all data frame
+		//rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF);
+		rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
+
+		if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE))
+			rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
+		else
+			rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+
+		if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+		{
+			RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48;
+		}
+		else // Ad-hoc Mode
+		{
+			RetryLimit = 0x7;
+		}
+	}
+	else if(type == 1) //joinbss_event call back when join res < 0
+	{		
+		if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_))		
+			rtw_write16(Adapter, REG_RXFLTMAP2,0x00);
+
+		if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) &&
+			check_buddy_fwstate(Adapter, _FW_LINKED))
+		{
+			ResumeTxBeacon(Adapter);			
+			
+			//reset TSF 1/2 after ResumeTxBeacon
+			//rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0));	
+			
+		}
+	}
+	else if(type == 2) //sta add event call back
+	{
+	 
+		//enable update TSF
+		if(Adapter->iface_type == IFACE_PORT1)
+			rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4)));
+		else
+			rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
+		 
+	
+		if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
+		{
+			//fixed beacon issue for 8191su...........
+			rtw_write8(Adapter,0x542 ,0x02);
+			RetryLimit = 0x7;
+		}
+
+
+		if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) &&
+			check_buddy_fwstate(Adapter, _FW_LINKED))
+		{
+			ResumeTxBeacon(Adapter);
+			
+			//reset TSF 1/2 after ResumeTxBeacon
+			//rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0));
+		}
+		
+	}
+
+	rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
+	
+#endif
+}
+
+void SetHwReg8192CU(PADAPTER Adapter, u8 variable, u8* val)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+_func_enter_;
+
+	switch(variable)
+	{
+		case HW_VAR_MEDIA_STATUS:
+			{
+				u8 val8;
+
+				val8 = rtw_read8(Adapter, MSR)&0x0c;
+				val8 |= *((u8 *)val);
+				rtw_write8(Adapter, MSR, val8);
+			}
+			break;
+		case HW_VAR_MEDIA_STATUS1:
+			{
+				u8 val8;
+				
+				val8 = rtw_read8(Adapter, MSR)&0x03;
+				val8 |= *((u8 *)val) <<2;
+				rtw_write8(Adapter, MSR, val8);
+			}
+			break;
+		case HW_VAR_SET_OPMODE:
+			hw_var_set_opmode(Adapter, variable, val);
+			break;
+		case HW_VAR_MAC_ADDR:
+			hw_var_set_macaddr(Adapter, variable, val);			
+			break;
+		case HW_VAR_BSSID:
+			hw_var_set_bssid(Adapter, variable, val);
+			break;
+		case HW_VAR_BASIC_RATE:
+			{
+				u16			BrateCfg = 0;
+				u8			RateIndex = 0;
+				
+				// 2007.01.16, by Emily
+				// Select RRSR (in Legacy-OFDM and CCK)
+				// For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate.
+				// We do not use other rates.
+				HalSetBrateCfg( Adapter, val, &BrateCfg );
+
+				//2011.03.30 add by Luke Lee
+				//CCK 2M ACK should be disabled for some BCM and Atheros AP IOT
+				//because CCK 2M has poor TXEVM
+				//CCK 5.5M & 11M ACK should be enabled for better performance
+
+				pHalData->BasicRateSet = BrateCfg = (BrateCfg |0xd) & 0x15d;
+
+				BrateCfg |= 0x01; // default enable 1M ACK rate
+
+				DBG_8192C("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
+				
+				// Set RRSR rate table.
+				rtw_write8(Adapter, REG_RRSR, BrateCfg&0xff);
+				rtw_write8(Adapter, REG_RRSR+1, (BrateCfg>>8)&0xff);
+				rtw_write8(Adapter, REG_RRSR+2, rtw_read8(Adapter, REG_RRSR+2)&0xf0);
+
+				// Set RTS initial rate
+				while(BrateCfg > 0x1)
+				{
+					BrateCfg = (BrateCfg>> 1);
+					RateIndex++;
+				}
+				// Ziv - Check
+				rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
+			}
+			break;
+		case HW_VAR_TXPAUSE:
+			rtw_write8(Adapter, REG_TXPAUSE, *((u8 *)val));	
+			break;
+		case HW_VAR_BCN_FUNC:
+			hw_var_set_bcn_func(Adapter, variable, val);
+			break;
+		case HW_VAR_CORRECT_TSF:
+#ifdef CONFIG_CONCURRENT_MODE
+			hw_var_set_correct_tsf(Adapter, variable, val);
+#else			
+			{
+				u64	tsf;
+				struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+				struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+				//tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us
+				tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us
+
+				if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+				{				
+					//pHalData->RegTxPause |= STOP_BCNQ;BIT(6)
+					//rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6)));
+					StopTxBeacon(Adapter);
+				}
+
+				//disable related TSF function
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
+							
+				rtw_write32(Adapter, REG_TSFTR, tsf);
+				rtw_write32(Adapter, REG_TSFTR+4, tsf>>32);
+
+				//enable related TSF function
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3));
+				
+							
+				if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+				{
+					//pHalData->RegTxPause  &= (~STOP_BCNQ);
+					//rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6))));
+					ResumeTxBeacon(Adapter);
+				}
+			}
+#endif
+			break;
+		case HW_VAR_CHECK_BSSID:
+			if(*((u8 *)val))
+			{
+				rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+			}
+			else
+			{
+				u32	val32;
+
+				val32 = rtw_read32(Adapter, REG_RCR);
+				val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
+				rtw_write32(Adapter, REG_RCR, val32);
+			}
+			break;
+		case HW_VAR_MLME_DISCONNECT:
+#ifdef CONFIG_CONCURRENT_MODE
+			hw_var_set_mlme_disconnect(Adapter, variable, val);
+#else
+			{
+				//Set RCR to not to receive data frame when NO LINK state
+				//rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR) & ~RCR_ADF);
+				//reject all data frames
+				rtw_write16(Adapter, REG_RXFLTMAP2,0x00);
+
+				//reset TSF
+				rtw_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
+
+				//disable update TSF
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
+			}
+#endif
+			break;
+		case HW_VAR_MLME_SITESURVEY:
+			hw_var_set_mlme_sitesurvey(Adapter, variable,  val);	
+			break;
+		case HW_VAR_MLME_JOIN:
+#ifdef CONFIG_CONCURRENT_MODE
+			hw_var_set_mlme_join(Adapter, variable,  val);
+#else
+			{
+				u8	RetryLimit = 0x30;
+				u8	type = *((u8 *)val);
+				struct mlme_priv	*pmlmepriv = &Adapter->mlmepriv;
+
+				if(type == 0) // prepare to join
+				{
+					//enable to rx data frame.Accept all data frame
+					//rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF);
+					rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
+
+					rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+
+					if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+					{
+						RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48;
+					}
+					else // Ad-hoc Mode
+					{
+						RetryLimit = 0x7;
+					}
+				}
+				else if(type == 1) //joinbss_event call back when join res < 0
+				{
+					rtw_write16(Adapter, REG_RXFLTMAP2,0x00);
+				}
+				else if(type == 2) //sta add event call back
+				{
+					//enable update TSF
+					rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
+
+					if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
+					{
+						//fixed beacon issue for 8191su...........
+						rtw_write8(Adapter,0x542 ,0x02);
+						RetryLimit = 0x7;
+					}
+				}
+
+				rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
+			}
+#endif
+			break;
+
+		case HW_VAR_ON_RCR_AM:
+			rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_AM);
+			DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR));
+			break;
+		case HW_VAR_OFF_RCR_AM:
+			rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)& (~RCR_AM));
+			DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR));
+			break;
+
+		case HW_VAR_BEACON_INTERVAL:
+			rtw_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
+			break;
+		case HW_VAR_SLOT_TIME:
+			{
+				u8	u1bAIFS, aSifsTime;
+				struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+				struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+				
+				rtw_write8(Adapter, REG_SLOT, val[0]);
+
+				if(pmlmeinfo->WMM_enable == 0)
+				{
+					if( pmlmeext->cur_wireless_mode == WIRELESS_11B)
+						aSifsTime = 10;
+					else
+						aSifsTime = 16;
+					
+					u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
+					
+					// <Roger_EXP> Temporary removed, 2008.06.20.
+					rtw_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
+					rtw_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
+					rtw_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
+					rtw_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
+				}
+			}
+			break;
+		case HW_VAR_RESP_SIFS:
+			{
+#if 0			
+				// SIFS for OFDM Data ACK
+				rtw_write8(Adapter, REG_SIFS_CTX+1, val[0]);
+				// SIFS for OFDM consecutive tx like CTS data!
+				rtw_write8(Adapter, REG_SIFS_TRX+1, val[1]);
+				
+				rtw_write8(Adapter,REG_SPEC_SIFS+1, val[0]);
+				rtw_write8(Adapter,REG_MAC_SPEC_SIFS+1, val[0]);
+
+				// 20100719 Joseph: Revise SIFS setting due to Hardware register definition change.
+				rtw_write8(Adapter, REG_R2T_SIFS+1, val[0]); //0x08 - CCK
+				rtw_write8(Adapter, REG_T2T_SIFS+1, val[0]); //0x0e - OFDM
+#else
+				//SIFS_Timer = 0x0a0a0808;
+				//RESP_SIFS for CCK
+				rtw_write8(Adapter, REG_R2T_SIFS, val[0]); // SIFS_T2T_CCK (0x08)
+				rtw_write8(Adapter, REG_R2T_SIFS+1, val[1]); //SIFS_R2T_CCK(0x08)
+				//RESP_SIFS for OFDM
+				rtw_write8(Adapter, REG_T2T_SIFS, val[2]); //SIFS_T2T_OFDM (0x0a)
+				rtw_write8(Adapter, REG_T2T_SIFS+1, val[3]); //SIFS_R2T_OFDM(0x0a)
+#endif
+			}
+			break;
+		case HW_VAR_ACK_PREAMBLE:
+			{
+				u8	regTmp;
+				u8	bShortPreamble = *( (PBOOLEAN)val );
+				// Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily)
+				regTmp = (pHalData->nCur40MhzPrimeSC)<<5;
+				//regTmp = 0;
+				if(bShortPreamble)
+					regTmp |= 0x80;
+
+				rtw_write8(Adapter, REG_RRSR+2, regTmp);
+			}
+			break;
+		case HW_VAR_SEC_CFG:
+#ifdef CONFIG_CONCURRENT_MODE
+			rtw_write8(Adapter, REG_SECCFG, 0x0c|BIT(5));// enable tx enc and rx dec engine, and no key search for MC/BC				
+#else
+			rtw_write8(Adapter, REG_SECCFG, *((u8 *)val));
+#endif
+			break;
+		case HW_VAR_DM_FLAG:
+			pdmpriv->DMFlag = *((u8 *)val);
+			break;
+		case HW_VAR_DM_FUNC_OP:
+			if(val[0])
+			{// save dm flag
+				pdmpriv->DMFlag_tmp = pdmpriv->DMFlag;
+			}
+			else
+			{// restore dm flag
+				pdmpriv->DMFlag = pdmpriv->DMFlag_tmp;
+			}
+			break;
+		case HW_VAR_DM_FUNC_SET:
+			pdmpriv->DMFlag |= *((u8 *)val);
+			break;
+		case HW_VAR_DM_FUNC_CLR:
+			pdmpriv->DMFlag &= *((u8 *)val);
+			break;
+		case HW_VAR_CAM_EMPTY_ENTRY:
+			{
+				u8	ucIndex = *((u8 *)val);
+				u8	i;
+				u32	ulCommand=0;
+				u32	ulContent=0;
+				u32	ulEncAlgo=CAM_AES;
+
+				for(i=0;i<CAM_CONTENT_COUNT;i++)
+				{
+					// filled id in CAM config 2 byte
+					if( i == 0)
+					{
+						ulContent |=(ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2);
+						//ulContent |= CAM_VALID;
+					}
+					else
+					{
+						ulContent = 0;
+					}
+					// polling bit, and No Write enable, and address
+					ulCommand= CAM_CONTENT_COUNT*ucIndex+i;
+					ulCommand= ulCommand | CAM_POLLINIG|CAM_WRITE;
+					// write content 0 is equall to mark invalid
+					rtw_write32(Adapter, WCAMI, ulContent);  //delay_ms(40);
+					//RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A4: %lx \n",ulContent));
+					rtw_write32(Adapter, RWCAM, ulCommand);  //delay_ms(40);
+					//RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A0: %lx \n",ulCommand));
+				}
+			}
+			break;
+		case HW_VAR_CAM_INVALID_ALL:
+			rtw_write32(Adapter, RWCAM, BIT(31)|BIT(30));
+			break;
+		case HW_VAR_CAM_WRITE:
+			{
+				u32	cmd;
+				u32	*cam_val = (u32 *)val;
+				rtw_write32(Adapter, WCAMI, cam_val[0]);
+				
+				cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
+				rtw_write32(Adapter, RWCAM, cmd);
+			}
+			break;
+		case HW_VAR_AC_PARAM_VO:
+			rtw_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
+			break;
+		case HW_VAR_AC_PARAM_VI:
+			rtw_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
+			break;
+		case HW_VAR_AC_PARAM_BE:
+			pHalData->AcParam_BE = ((u32 *)(val))[0];
+			rtw_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
+			break;
+		case HW_VAR_AC_PARAM_BK:
+			rtw_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
+			break;
+		case HW_VAR_ACM_CTRL:
+			{
+				u8	acm_ctrl = *((u8 *)val);
+				u8	AcmCtrl = rtw_read8( Adapter, REG_ACMHWCTRL);
+
+				if(acm_ctrl > 1)
+					AcmCtrl = AcmCtrl | 0x1;
+
+				if(acm_ctrl & BIT(3))
+					AcmCtrl |= AcmHw_VoqEn;
+				else
+					AcmCtrl &= (~AcmHw_VoqEn);
+
+				if(acm_ctrl & BIT(2))
+					AcmCtrl |= AcmHw_ViqEn;
+				else
+					AcmCtrl &= (~AcmHw_ViqEn);
+
+				if(acm_ctrl & BIT(1))
+					AcmCtrl |= AcmHw_BeqEn;
+				else
+					AcmCtrl &= (~AcmHw_BeqEn);
+
+				DBG_871X("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl );
+				rtw_write8(Adapter, REG_ACMHWCTRL, AcmCtrl );
+			}
+			break;
+		case HW_VAR_AMPDU_MIN_SPACE:
+			{
+				u8	MinSpacingToSet;
+				u8	SecMinSpace;
+
+				MinSpacingToSet = *((u8 *)val);
+				if(MinSpacingToSet <= 7)
+				{
+					switch(Adapter->securitypriv.dot11PrivacyAlgrthm)
+					{
+						case _NO_PRIVACY_:
+						case _AES_:
+							SecMinSpace = 0;
+							break;
+
+						case _WEP40_:
+						case _WEP104_:
+						case _TKIP_:
+						case _TKIP_WTMIC_:
+							SecMinSpace = 6;
+							break;
+						default:
+							SecMinSpace = 7;
+							break;
+					}
+
+					if(MinSpacingToSet < SecMinSpace){
+						MinSpacingToSet = SecMinSpace;
+					}
+
+					//RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", Adapter->MgntInfo.MinSpaceCfg));
+					rtw_write8(Adapter, REG_AMPDU_MIN_SPACE, (rtw_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
+				}
+			}
+			break;
+		case HW_VAR_AMPDU_FACTOR:
+			{
+				u8	RegToSet_Normal[4]={0x41,0xa8,0x72, 0xb9};
+				u8	RegToSet_BT[4]={0x31,0x74,0x42, 0x97};
+				u8	FactorToSet;
+				u8	*pRegToSet;
+				u8	index = 0;
+
+#ifdef CONFIG_BT_COEXIST
+				if(	(pHalData->bt_coexist.BT_Coexist) &&
+					(pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) )
+					pRegToSet = RegToSet_BT; // 0x97427431;
+				else
+#endif
+					pRegToSet = RegToSet_Normal; // 0xb972a841;
+
+				FactorToSet = *((u8 *)val);
+				if(FactorToSet <= 3)
+				{
+					FactorToSet = (1<<(FactorToSet + 2));
+					if(FactorToSet>0xf)
+						FactorToSet = 0xf;
+
+					for(index=0; index<4; index++)
+					{
+						if((pRegToSet[index] & 0xf0) > (FactorToSet<<4))
+							pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4);
+					
+						if((pRegToSet[index] & 0x0f) > FactorToSet)
+							pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
+						
+						rtw_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]);
+					}
+
+					//RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet));
+				}
+			}
+			break;
+		case HW_VAR_RXDMA_AGG_PG_TH:
+			#ifdef CONFIG_USB_RX_AGGREGATION
+			{
+				u8	threshold = *((u8 *)val);
+				if( threshold == 0)
+				{
+					threshold = pHalData->UsbRxAggPageCount;
+				}
+				rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
+			}
+			#endif
+			break;
+		case HW_VAR_SET_RPWM:
+			rtw_write8(Adapter, REG_USB_HRPWM, *((u8 *)val));
+			break;
+		case HW_VAR_H2C_FW_PWRMODE:
+			{
+				u8	psmode = (*(u8 *)val);
+			
+				// Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power
+				// saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang.
+				if( (psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(pHalData->VersionID)))
+				{
+					rtl8192c_dm_RF_Saving(Adapter, _TRUE);
+				}
+				rtl8192c_set_FwPwrMode_cmd(Adapter, psmode);
+			}
+			break;
+		case HW_VAR_H2C_FW_JOINBSSRPT:
+			{
+				u8	mstatus = (*(u8 *)val);
+				rtl8192c_set_FwJoinBssReport_cmd(Adapter, mstatus);
+			}
+			break;
+#ifdef CONFIG_P2P_PS
+		case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
+			{
+				u8	p2p_ps_state = (*(u8 *)val);
+				rtl8192c_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state);
+			}
+			break;
+#endif // CONFIG_P2P_PS
+#ifdef CONFIG_TDLS
+		case HW_VAR_TDLS_WRCR:
+			rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)&(~ BIT(6) ));
+			break;
+		case HW_VAR_TDLS_INIT_CH_SEN:
+			{
+				rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)&(~ BIT(6) )&(~ BIT(7) ));
+				rtw_write16(Adapter, REG_RXFLTMAP2,0xffff);
+
+				//disable update TSF
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
+			}
+			break;
+		case HW_VAR_TDLS_DONE_CH_SEN:
+			{
+				//enable update TSF
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~ BIT(4)));
+				rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|(BIT(7) ));
+			}
+			break;
+		case HW_VAR_TDLS_RS_RCR:
+			rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|(BIT(6)));
+			break;
+#endif //CONFIG_TDLS
+		case HW_VAR_INITIAL_GAIN:
+			{
+				DIG_T	*pDigTable = &pdmpriv->DM_DigTable;					
+				u32 		rx_gain = ((u32 *)(val))[0];
+				
+				if(rx_gain == 0xff){//restore rx gain
+					pDigTable->CurIGValue = pDigTable->BackupIGValue;
+					PHY_SetBBReg(Adapter, rOFDM0_XAAGCCore1, 0x7f,pDigTable->CurIGValue );
+					PHY_SetBBReg(Adapter, rOFDM0_XBAGCCore1, 0x7f,pDigTable->CurIGValue);
+				}
+				else{
+					pDigTable->BackupIGValue = pDigTable->CurIGValue;					
+					PHY_SetBBReg(Adapter, rOFDM0_XAAGCCore1, 0x7f,rx_gain );
+					PHY_SetBBReg(Adapter, rOFDM0_XBAGCCore1, 0x7f,rx_gain);
+					pDigTable->CurIGValue = (u8)rx_gain;
+				}
+			}
+			break;
+		case HW_VAR_TRIGGER_GPIO_0:
+			rtl8192cu_trigger_gpio_0(Adapter);
+			break;
+#ifdef CONFIG_BT_COEXIST
+		case HW_VAR_BT_SET_COEXIST:
+			{
+				u8	bStart = (*(u8 *)val);
+				rtl8192c_set_dm_bt_coexist(Adapter, bStart);
+			}
+			break;
+		case HW_VAR_BT_ISSUE_DELBA:
+			{
+				u8	dir = (*(u8 *)val);
+				rtl8192c_issue_delete_ba(Adapter, dir);
+			}
+			break;
+#endif
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+
+		case HW_VAR_ANTENNA_DIVERSITY_LINK:
+			SwAntDivRestAfterLink8192C(Adapter);
+			break;
+		case HW_VAR_ANTENNA_DIVERSITY_SELECT:
+			{
+				u8	Optimum_antenna = (*(u8 *)val);
+				//switch antenna to Optimum_antenna
+		//		DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B");
+				if(pHalData->CurAntenna !=  Optimum_antenna)		
+				{
+					PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, Optimum_antenna);
+					pHalData->CurAntenna = Optimum_antenna ;
+					//DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B");
+				}
+			}
+			break;
+#endif
+		case HW_VAR_EFUSE_BYTES: // To set EFUE total used bytes, added by Roger, 2008.12.22.
+			pHalData->EfuseUsedBytes = *((u16 *)val);			
+			break;
+		case HW_VAR_FIFO_CLEARN_UP:
+			{
+				#define RW_RELEASE_EN		BIT18
+				#define RXDMA_IDLE			BIT17
+				
+				struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
+				u8 trycnt = 100;	
+				
+				//pause tx
+				rtw_write8(Adapter,REG_TXPAUSE,0xff);
+			
+				//keep sn
+				Adapter->xmitpriv.nqos_ssn = rtw_read16(Adapter,REG_NQOS_SEQ);
+
+				if(pwrpriv->bkeepfwalive != _TRUE)
+				{
+					//RX DMA stop
+					rtw_write32(Adapter,REG_RXPKT_NUM,(rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN));
+					do{
+						if(!(rtw_read32(Adapter,REG_RXPKT_NUM)&RXDMA_IDLE))
+							break;
+					}while(trycnt--);
+					if(trycnt ==0)
+						DBG_8192C("Stop RX DMA failed...... \n");
+
+					//RQPN Load 0
+					rtw_write16(Adapter,REG_RQPN_NPQ,0x0);
+					rtw_write32(Adapter,REG_RQPN,0x80000000);
+					rtw_mdelay_os(10);
+				}
+			}
+			break;
+			case HW_VAR_WOWLAN:
+#ifdef CONFIG_WOWLAN			
+			{
+				struct wowlan_ioctl_param *poidparam;
+
+				int res;
+
+				poidparam = (struct wowlan_ioctl_param *)val;
+				switch (poidparam->subcode){
+					case WOWLAN_PATTERN_MATCH:
+						//Turn on the Pattern Match feature
+						DBG_8192C("\n PATTERN_MATCH poidparam->subcode_value=%d\n",poidparam->subcode_value);
+						if(poidparam->subcode_value==1){
+							//rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)|BIT(1)));
+							Adapter->pwrctrlpriv.wowlan_pattern=_TRUE; 
+							DBG_8192C("%s Adapter->pwrctrlpriv.wowlan_pattern=%x\n",__FUNCTION__,Adapter->pwrctrlpriv.wowlan_pattern); 
+						}
+						else{
+							//rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)&~BIT(1)));
+							Adapter->pwrctrlpriv.wowlan_pattern=_FALSE; 
+						}
+						break;
+					case WOWLAN_MAGIC_PACKET:
+						//Turn on the Magic Packet feature
+						DBG_8192C("\n MAGIC_PACKET poidparam->subcode_value=%d\n",poidparam->subcode_value);
+						if(poidparam->subcode_value==1){
+							//rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)|BIT(2)));
+							Adapter->pwrctrlpriv.wowlan_magic=_TRUE; 
+							DBG_8192C("%s Adapter->pwrctrlpriv.wowlan_magic=%x\n",__FUNCTION__,Adapter->pwrctrlpriv.wowlan_magic); 
+						}
+						else{
+							//rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)&~BIT(2)));
+							Adapter->pwrctrlpriv.wowlan_magic=_FALSE; 
+						}
+						break;
+					case WOWLAN_UNICAST:
+						//Turn on the Unicast wakeup feature
+						if(poidparam->subcode_value==1){
+							//rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)|BIT(3)));
+							Adapter->pwrctrlpriv.wowlan_unicast=_TRUE; 
+						}
+						else{
+							//rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)&~BIT(3)));
+							Adapter->pwrctrlpriv.wowlan_unicast=_FALSE; 
+							DBG_8192C("%s Adapter->pwrctrlpriv.wowlan_unicast=%x\n",__FUNCTION__,Adapter->pwrctrlpriv.wowlan_unicast); 
+						}
+						break;
+					case WOWLAN_SET_PATTERN:
+						//Setting the Pattern for wowlan
+						res=rtw_wowlan_set_pattern(Adapter,poidparam->pattern);
+						if(res)
+							DBG_8192C("rtw_wowlan_set_pattern retern value=0x%x",res);
+						break;
+					case WOWLAN_DUMP_REG:
+						//dump the WKFMCAM and WOW_CTRL register
+						/*DBG_8192C("\n\n\n\n rtw_wowlan_ctrl: WOW_CTRL=0x%x \n",rtw_read8(Adapter, REG_WOW_CTRL));
+						DBG_8192C("print WKFMCAM index =%d ",poidparam->data[0]);
+						{	int cmd=0,offset=0;
+							for(offset=0;offset<5;offset++){
+								cmd=BIT(31)|(poidparam->data[0]+offset);
+								rtw_write32(Adapter, REG_WKFMCAM_CMD, cmd);
+								DBG_8192C("offset[%d]=0x%.8x  ",offset,rtw_read32(Adapter, REG_WKFMCAM_RWD));
+								DBG_8192C("offset[%d]=MSB 0x%x:0x%x:0x%x:0x%x  ",offset,rtw_read8(Adapter, REG_WKFMCAM_RWD+3),rtw_read8(Adapter, REG_WKFMCAM_RWD+2),rtw_read8(Adapter, REG_WKFMCAM_RWD+1),rtw_read8(Adapter, REG_WKFMCAM_RWD));
+							}
+						}*/
+					
+						break;
+					case WOWLAN_ENABLE:
+						SetFwRelatedForWoWLAN8192CU(Adapter, _TRUE);
+						//Set Pattern
+						if(Adapter->pwrctrlpriv.wowlan_pattern==_TRUE)
+							rtw_wowlan_reload_pattern(Adapter);
+						rtl8192c_set_wowlan_cmd(Adapter);
+						rtw_write8(Adapter, 0x6, rtw_read8(Adapter, 0x6)|BIT(3));
+						rtw_msleep_os(10);
+						//DBG_8192C(" \n REG_WOW_CTRL=0x%x \n",rtw_read8(Adapter, REG_WOW_CTRL));
+//						if(rtw_read8(Adapter, REG_WOW_CTRL)==0)
+//							rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)|BIT(1)|BIT(2)|BIT(3)));
+						//DBG_8192C(" \n REG_WOW_CTRL=0x%x \n",rtw_read8(Adapter, REG_WOW_CTRL));
+						break;
+	
+					case WOWLAN_DISABLE:
+						Adapter->pwrctrlpriv.wowlan_mode=_FALSE;
+						rtl8192c_set_wowlan_cmd(Adapter);
+						rtw_msleep_os(10);
+						break;
+					
+					case WOWLAN_STATUS:
+						poidparam->wakeup_reason = rtw_read8(Adapter, REG_WOWLAN_REASON);
+						DBG_8192C("wake on wlan reason 0x%02x\n", poidparam->wakeup_reason);
+						break;
+	
+					default:
+						break;
+				}
+				if (Adapter->pwrctrlpriv.wowlan_unicast||Adapter->pwrctrlpriv.wowlan_magic || Adapter->pwrctrlpriv.wowlan_pattern)
+					Adapter->pwrctrlpriv.wowlan_mode =_TRUE;
+				else
+					Adapter->pwrctrlpriv.wowlan_mode =_FALSE;
+			}
+
+			break;
+#endif //CONFIG_WOWLAN
+		case HW_VAR_CHECK_TXBUF:
+#ifdef CONFIG_CONCURRENT_MODE				
+			{
+				int i;
+				u8	RetryLimit = 0x01;
+				
+				//rtw_write16(Adapter, REG_RL,0x0101);
+				rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
+		
+				for(i=0;i<1000;i++)
+				{
+					if(rtw_read32(Adapter, 0x200) != rtw_read32(Adapter, 0x204))
+					{
+						//DBG_871X("packet in tx packet buffer - 0x204=%x, 0x200=%x (%d)\n", rtw_read32(Adapter, 0x204), rtw_read32(Adapter, 0x200), i);
+						rtw_msleep_os(10);
+					}
+					else
+					{
+						DBG_871X("no packet in tx packet buffer (%d)\n", i);
+						break;
+					}
+				}
+
+				RetryLimit = 0x30;	
+				rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
+		
+			}
+#endif
+			break;
+		case HW_VAR_BCN_VALID:
+			//BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw
+			rtw_write8(Adapter, REG_TDECTRL+2, rtw_read8(Adapter, REG_TDECTRL+2) | BIT0); 
+			break;
+		default:
+			break;
+	}
+
+_func_exit_;
+}
+
+void GetHwReg8192CU(PADAPTER Adapter, u8 variable, u8* val)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+_func_enter_;
+
+	switch(variable)
+	{
+		case HW_VAR_BASIC_RATE:
+			*((u16 *)(val)) = pHalData->BasicRateSet;
+		case HW_VAR_TXPAUSE:
+			val[0] = rtw_read8(Adapter, REG_TXPAUSE);
+			break;
+		case HW_VAR_BCN_VALID:
+			//BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2
+			val[0] = (BIT0 & rtw_read8(Adapter, REG_TDECTRL+2))?_TRUE:_FALSE;
+			break;
+		case HW_VAR_DM_FLAG:
+			val[0] = pHalData->dmpriv.DMFlag;
+			break;
+		case HW_VAR_RF_TYPE:
+			val[0] = pHalData->rf_type;
+			break;
+		case HW_VAR_FWLPS_RF_ON:
+			{
+				//When we halt NIC, we should check if FW LPS is leave.
+				u32	valRCR;
+				
+				if(Adapter->pwrctrlpriv.rf_pwrstate == rf_off)
+				{
+					// If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave,
+					// because Fw is unload.
+					val[0] = _TRUE;
+				}
+				else
+				{
+					valRCR = rtw_read32(Adapter, REG_RCR);
+					valRCR &= 0x00070000;
+					if(valRCR)
+						val[0] = _FALSE;
+					else
+						val[0] = _TRUE;
+				}
+			}
+			break;
+#ifdef CONFIG_ANTENNA_DIVERSITY
+		case HW_VAR_CURRENT_ANTENNA:
+			val[0] = pHalData->CurAntenna;
+			break;
+#endif
+		case HW_VAR_EFUSE_BYTES: // To get EFUE total used bytes, added by Roger, 2008.12.22.
+			*((u16 *)(val)) = pHalData->EfuseUsedBytes;	
+			break;
+		case HW_VAR_VID:
+			*((u16 *)(val)) = pHalData->EEPROMVID;
+			break;
+		case HW_VAR_PID:
+			*((u16 *)(val)) = pHalData->EEPROMPID;
+			break;
+		default:
+			break;
+	}
+
+_func_exit_;
+}
+
+//
+//	Description: 
+//		Query setting of specified variable.
+//
+u8
+GetHalDefVar8192CUsb(
+	IN	PADAPTER				Adapter,
+	IN	HAL_DEF_VARIABLE		eVariable,
+	IN	PVOID					pValue
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			bResult = _TRUE;
+
+	switch(eVariable)
+	{
+		case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
+#if 0 //trunk
+			{
+				struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
+				struct sta_priv * pstapriv = &Adapter->stapriv;
+				struct sta_info * psta;
+				psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
+				if(psta)
+				{
+					*((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB;     
+				}
+			}
+#else //v4 branch
+				//if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){
+			*((int *)pValue) = pHalData->dmpriv.UndecoratedSmoothedPWDB;
+				//}
+				//else{
+    
+				//}
+#endif
+			break;
+		case HAL_DEF_IS_SUPPORT_ANT_DIV:
+			#ifdef CONFIG_ANTENNA_DIVERSITY
+			*((u8 *)pValue) = (IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))?_FALSE:_TRUE;
+			#endif
+			break;			
+		case HAL_DEF_CURRENT_ANTENNA:
+			#ifdef CONFIG_ANTENNA_DIVERSITY
+			*(( u8*)pValue) = pHalData->CurAntenna;			
+			#endif
+			break;
+		case HAL_DEF_DRVINFO_SZ:
+			*(( u32*)pValue) = DRVINFO_SZ;
+			break;
+		case HAL_DEF_MAX_RECVBUF_SZ:
+			*(( u32*)pValue) = MAX_RECVBUF_SZ;
+			break;
+		case HAL_DEF_RX_PACKET_OFFSET:
+			*(( u32*)pValue) = RXDESC_SIZE + DRVINFO_SZ;
+			break;
+		case HAL_DEF_DBG_DUMP_RXPKT:
+			*(( u8*)pValue) = pHalData->bDumpRxPkt;
+			break;
+		case HAL_DEF_DBG_DM_FUNC:
+			*(( u8*)pValue) = pHalData->dmpriv.DMFlag;
+			break;
+		default:
+			//RT_TRACE(COMP_INIT, DBG_WARNING, ("GetHalDefVar8192CUsb(): Unkown variable: %d!\n", eVariable));
+			bResult = _FALSE;
+			break;
+	}
+
+	return bResult;
+}
+
+
+
+
+//
+//	Description:
+//		Change default setting of specified variable.
+//
+u8
+SetHalDefVar8192CUsb(
+	IN	PADAPTER				Adapter,
+	IN	HAL_DEF_VARIABLE		eVariable,
+	IN	PVOID					pValue
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			bResult = _TRUE;
+
+	switch(eVariable)
+	{
+		case HAL_DEF_DBG_DUMP_RXPKT:
+			pHalData->bDumpRxPkt = *(( u8*)pValue);
+			break;
+		case HAL_DEF_DBG_DM_FUNC:
+			{
+				u8 dm_func = *(( u8*)pValue);
+				struct dm_priv	*pdmpriv = &pHalData->dmpriv;	
+				
+				if(dm_func == 0){ //disable all dynamic func
+					pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
+					DBG_8192C("==> Disable all dynamic function...\n");
+				}
+				else if(dm_func == 1){//disable DIG
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_DIG);
+					DBG_8192C("==> Disable DIG...\n");
+				}
+				else if(dm_func == 2){//disable High power
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_HP);
+				}
+				else if(dm_func == 3){//disable tx power tracking
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_SS);
+					DBG_8192C("==> Disable tx power tracking...\n");
+				}
+				else if(dm_func == 4){//disable BT coexistence
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_BT);
+				}
+				else if(dm_func == 5){//disable antenna diversity
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_ANT_DIV);
+				}				
+				else if(dm_func == 6){//turn on all dynamic func
+					if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_DIG))
+					{
+						struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+						DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+						pDigTable->PreIGValue = rtw_read8(Adapter,0xc50);	
+					}
+						
+					pdmpriv->DMFlag |= (DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS|
+						DYNAMIC_FUNC_BT|DYNAMIC_FUNC_ANT_DIV) ;
+					DBG_8192C("==> Turn on all dynamic function...\n");
+				}			
+			}
+			break;
+		default:
+			//RT_TRACE(COMP_INIT, DBG_TRACE, ("SetHalDefVar819xUsb(): Unkown variable: %d!\n", eVariable));
+			bResult = _FALSE;
+			break;
+	}
+
+	return bResult;
+}
+
+u32  _update_92cu_basic_rate(_adapter *padapter, unsigned int mask)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+#endif
+	unsigned int BrateCfg = 0;
+
+#ifdef CONFIG_BT_COEXIST
+	if(	(pbtpriv->BT_Coexist) &&	(pbtpriv->BT_CoexistType == BT_CSR_BC4)	)
+	{
+		BrateCfg = mask  & 0x151;
+		//DBG_8192C("BT temp disable cck 2/5.5/11M, (0x%x = 0x%x)\n", REG_RRSR, BrateCfg & 0x151);
+	}
+	else
+#endif
+	{
+		if(pHalData->VersionID != VERSION_TEST_CHIP_88C)
+			BrateCfg = mask  & 0x15F;
+		else	//for 88CU 46PING setting, Disable CCK 2M, 5.5M, Others must tuning
+			BrateCfg = mask  & 0x159;
+	}
+
+	BrateCfg |= 0x01; // default enable 1M ACK rate					
+
+	return BrateCfg;
+}
+
+void _update_response_rate(_adapter *padapter,unsigned int mask)
+{
+	u8	RateIndex = 0;
+	// Set RRSR rate table.
+	rtw_write8(padapter, REG_RRSR, mask&0xff);
+	rtw_write8(padapter,REG_RRSR+1, (mask>>8)&0xff);
+	
+
+	// Set RTS initial rate
+	while(mask > 0x1)
+	{
+		mask = (mask>> 1);
+		RateIndex++;
+	}
+	rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex);
+}
+
+void UpdateHalRAMask8192CUsb(PADAPTER padapter, u32 mac_id)
+{
+	//volatile unsigned int result;
+	u8	init_rate=0;
+	u8	networkType, raid;	
+	u32	mask;
+	u8	shortGIrate = _FALSE;
+	int	supportRateNum = 0;
+	struct sta_info	*psta;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+#endif
+
+	if (mac_id >= NUM_STA) //CAM_SIZE
+	{
+		return;
+	}
+
+	psta = pmlmeinfo->FW_sta_info[mac_id].psta;
+	if(psta == NULL)
+	{
+		return;
+	}
+
+	switch (mac_id)
+	{
+		case 0:// for infra mode
+#ifdef CONFIG_CONCURRENT_MODE
+		case 2:// first station uses macid=0, second station uses macid=2
+#endif
+			supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
+			networkType = judge_network_type(padapter, cur_network->SupportedRates, supportRateNum) & 0xf;
+			//pmlmeext->cur_wireless_mode = networkType;
+			raid = networktype_to_raid(networkType);
+						
+			mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
+			mask |= (pmlmeinfo->HT_enable)? update_MSC_rate(&(pmlmeinfo->HT_caps)): 0;
+			mask |= ((raid<<28)&0xf0000000);
+			
+			if (support_short_GI(padapter, &(pmlmeinfo->HT_caps)))
+			{
+				shortGIrate = _TRUE;
+			}
+			
+			break;
+
+		case 1://for broadcast/multicast
+			supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
+			if(pmlmeext->cur_wireless_mode & WIRELESS_11B)
+				networkType = WIRELESS_11B;
+			else
+				networkType = WIRELESS_11G;
+			raid = networktype_to_raid(networkType);
+
+			mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
+			mask |= ((raid<<28)&0xf0000000);
+
+			break;
+
+		default: //for each sta in IBSS
+#ifdef CONFIG_TDLS
+			if(psta->tdls_sta_state & TDLS_LINKED_STATE)
+			{
+				shortGIrate = update_sgi_tdls(padapter, psta);
+				mask = update_mask_tdls(padapter, psta);
+				raid = mask>>28;
+				break;
+			}
+			else
+#endif //CONFIG_TDLS
+			{
+				supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
+				networkType = judge_network_type(padapter, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
+				//pmlmeext->cur_wireless_mode = networkType;
+				raid = networktype_to_raid(networkType);
+				
+				mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
+				mask |= ((raid<<28)&0xf0000000);
+
+				//todo: support HT in IBSS
+				
+				break;
+			}
+	}
+	
+#ifdef CONFIG_BT_COEXIST
+	if( (pbtpriv->BT_Coexist) &&
+		(pbtpriv->BT_CoexistType == BT_CSR_BC4) &&
+		(pbtpriv->BT_CUR_State) &&
+		(pbtpriv->BT_Ant_isolation) &&
+		((pbtpriv->BT_Service==BT_SCO)||
+		(pbtpriv->BT_Service==BT_Busy)) )
+		mask &= 0xffffcfc0;
+	else		
+#endif
+		mask &=0xffffffff;
+	
+	
+	init_rate = get_highest_rate_idx(mask)&0x3f;
+	
+	if(pHalData->fw_ractrl == _TRUE)
+	{
+		u8 arg = 0;
+
+		//arg = (cam_idx-4)&0x1f;//MACID
+		arg = mac_id&0x1f;//MACID
+		
+		arg |= BIT(7);
+		
+		if (shortGIrate==_TRUE)
+			arg |= BIT(5);
+
+		DBG_871X("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg);
+		psta->ra_mask=mask;
+#ifdef CONFIG_INTEL_PROXIM
+		if(padapter->proximity.proxim_on ==_TRUE){
+			arg &= ~BIT(6);
+		}
+		else {
+			arg |= BIT(6);
+		}
+#endif //CONFIG_INTEL_PROXIM
+		rtl8192c_set_raid_cmd(padapter, mask, arg);	
+		
+	}
+	else
+	{
+		if (shortGIrate==_TRUE)
+			init_rate |= BIT(6);
+
+		rtw_write8(padapter, (REG_INIDATA_RATE_SEL+mac_id), init_rate);		
+	}
+
+
+	//set ra_id
+	psta->raid = raid;
+	psta->init_rate = init_rate;
+
+	//set correct initial date rate for each mac_id
+	pdmpriv->INIDATA_RATE[mac_id] = init_rate;
+}
+
+void SetBeaconRelatedRegisters8192CUsb(PADAPTER padapter)
+{
+	u32	value32;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//reset TSF, enable update TSF, correcting TSF On Beacon 
+	
+	//REG_BCN_INTERVAL
+	//REG_BCNDMATIM
+	//REG_ATIMWND
+	//REG_TBTT_PROHIBIT
+	//REG_DRVERLYINT
+	//REG_BCN_MAX_ERR	
+	//REG_BCNTCFG //(0x510)
+	//REG_DUAL_TSF_RST
+	//REG_BCN_CTRL //(0x550) 
+
+	//BCN interval
+	rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
+	rtw_write8(padapter, REG_ATIMWND, 0x02);// 2ms
+
+	_InitBeaconParameters(padapter);
+
+	rtw_write8(padapter, REG_SLOT, 0x09);
+
+	value32 =rtw_read32(padapter, REG_TCR); 
+	value32 &= ~TSFRST;
+	rtw_write32(padapter,  REG_TCR, value32); 
+
+	value32 |= TSFRST;
+	rtw_write32(padapter, REG_TCR, value32); 
+
+	// NOTE: Fix test chip's bug (about contention windows's randomness)
+	rtw_write8(padapter,  REG_RXTSF_OFFSET_CCK, 0x50);
+	rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50);
+
+	_BeaconFunctionEnable(padapter, _TRUE, _TRUE);
+
+	ResumeTxBeacon(padapter);
+
+	//rtw_write8(padapter, 0x422, rtw_read8(padapter, 0x422)|BIT(6));
+	
+	//rtw_write8(padapter, 0x541, 0xff);
+
+	//rtw_write8(padapter, 0x542, rtw_read8(padapter, 0x541)|BIT(0));
+
+	rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(1));
+
+}
+
+static void rtl8192cu_init_default_value(_adapter * padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	i;
+
+	//init default value
+	pHalData->fw_ractrl = _FALSE;	
+	pHalData->bIQKInitialized = _FALSE;
+	if(!pwrctrlpriv->bkeepfwalive)
+		pHalData->LastHMEBoxNum = 0;
+	
+	pHalData->bIQKInitialized = _FALSE;
+	//init dm default value
+	pdmpriv->TM_Trigger = 0;
+	pdmpriv->binitialized = _FALSE;
+	pdmpriv->prv_traffic_idx = 3;
+	pdmpriv->initialize = 0;
+
+	pdmpriv->ThermalValue_HP_index = 0;
+	for(i = 0; i < HP_THERMAL_NUM; i++)
+		pdmpriv->ThermalValue_HP[i] = 0;
+}
+
+static u8 rtl8192cu_ps_func(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8 *val)
+{	
+	u8 bResult = _TRUE;
+	switch(efunc_id){
+
+		#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED)
+		case HAL_USB_SELECT_SUSPEND:
+			{
+				u8 bfwpoll = *(( u8*)val);
+				rtl8192c_set_FwSelectSuspend_cmd(Adapter,bfwpoll ,500);//note fw to support hw power down ping detect
+			}
+			break;
+		#endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED
+
+		default:
+			break;
+	}
+	return bResult;
+}
+
+void rtl8192cu_set_hal_ops(_adapter * padapter)
+{
+	struct hal_ops	*pHalFunc = &padapter->HalFunc;
+
+_func_enter_;
+
+	padapter->HalData = rtw_zmalloc(sizeof(HAL_DATA_TYPE));
+	if(padapter->HalData == NULL){
+		DBG_8192C("cant not alloc memory for HAL DATA \n");
+	}
+	//_rtw_memset(padapter->HalData, 0, sizeof(HAL_DATA_TYPE));
+	padapter->hal_data_sz = sizeof(HAL_DATA_TYPE);
+
+	pHalFunc->hal_init = &rtl8192cu_hal_init;
+	pHalFunc->hal_deinit = &rtl8192cu_hal_deinit;
+
+	//pHalFunc->free_hal_data = &rtl8192c_free_hal_data;
+
+	pHalFunc->inirp_init = &rtl8192cu_inirp_init;
+	pHalFunc->inirp_deinit = &rtl8192cu_inirp_deinit;
+
+	pHalFunc->init_xmit_priv = &rtl8192cu_init_xmit_priv;
+	pHalFunc->free_xmit_priv = &rtl8192cu_free_xmit_priv;
+
+	pHalFunc->init_recv_priv = &rtl8192cu_init_recv_priv;
+	pHalFunc->free_recv_priv = &rtl8192cu_free_recv_priv;
+#ifdef CONFIG_SW_LED
+	pHalFunc->InitSwLeds = &rtl8192cu_InitSwLeds;
+	pHalFunc->DeInitSwLeds = &rtl8192cu_DeInitSwLeds;
+#else //case of hw led or no led
+	pHalFunc->InitSwLeds = NULL;
+	pHalFunc->DeInitSwLeds = NULL;	
+#endif//CONFIG_SW_LED
+
+	//pHalFunc->dm_init = &rtl8192c_init_dm_priv;
+	//pHalFunc->dm_deinit = &rtl8192c_deinit_dm_priv;
+
+	pHalFunc->init_default_value = &rtl8192cu_init_default_value;
+	pHalFunc->intf_chip_configure = &rtl8192cu_interface_configure;
+	pHalFunc->read_adapter_info = &ReadAdapterInfo8192CU;
+
+	//pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C;
+	//pHalFunc->set_channel_handler = &PHY_SwChnl8192C;
+
+	//pHalFunc->hal_dm_watchdog = &rtl8192c_HalDmWatchDog;
+
+	pHalFunc->SetHwRegHandler = &SetHwReg8192CU;
+	pHalFunc->GetHwRegHandler = &GetHwReg8192CU;
+  	pHalFunc->GetHalDefVarHandler = &GetHalDefVar8192CUsb;
+ 	pHalFunc->SetHalDefVarHandler = &SetHalDefVar8192CUsb;
+
+	pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8192CUsb;
+	pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8192CUsb;
+
+	//pHalFunc->Add_RateATid = &rtl8192c_Add_RateATid;
+
+//#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	//pHalFunc->AntDivBeforeLinkHandler = &SwAntDivBeforeLink8192C;
+	//pHalFunc->AntDivCompareHandler = &SwAntDivCompare8192C;
+//#endif
+
+	pHalFunc->hal_xmit = &rtl8192cu_hal_xmit;
+	pHalFunc->mgnt_xmit = &rtl8192cu_mgnt_xmit;
+
+	//pHalFunc->read_bbreg = &rtl8192c_PHY_QueryBBReg;
+	//pHalFunc->write_bbreg = &rtl8192c_PHY_SetBBReg;
+	//pHalFunc->read_rfreg = &rtl8192c_PHY_QueryRFReg;
+	//pHalFunc->write_rfreg = &rtl8192c_PHY_SetRFReg;
+
+#ifdef CONFIG_HOSTAPD_MLME
+	pHalFunc->hostap_mgnt_xmit_entry = &rtl8192cu_hostap_mgnt_xmit_entry;
+#endif
+	pHalFunc->interface_ps_func = &rtl8192cu_ps_func;
+
+	rtl8192c_set_hal_ops(pHalFunc);
+_func_exit_;
+
+}
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/usb_ops_ce.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/usb_ops_ce.c
new file mode 100755
index 00000000..95233376
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/usb_ops_ce.c
@@ -0,0 +1,1207 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _HCI_OPS_OS_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+
+#ifndef PLATFORM_OS_CE
+    #error "PLATFORM_OS_CE shall be set \n"
+#endif
+
+#ifndef CONFIG_USB_HCI
+	#error "CONFIG_USB_HCI shall be on!\n"
+#endif
+
+#include <usb_ops.h>
+#include <recv_osdep.h>
+
+#include <circ_buf.h>
+
+
+struct zero_bulkout_context
+{
+	void *pbuf;
+	void *purb;
+	void *pirp;
+	void *padapter;
+};
+
+
+
+#define PUSB_ERROR LPDWORD
+#define USBD_HALTED(Status) ((ULONG)(Status) >> 30 == 3)
+
+
+USB_PIPE ffaddr2pipehdl(struct dvobj_priv *pNdisCEDvice, u32 addr);
+
+
+static NTSTATUS usb_async_interrupt_in_complete( LPVOID Context );
+static NTSTATUS usb_async_interrupt_out_complete( LPVOID Context );
+
+DWORD usb_write_port_complete( LPVOID Context );
+DWORD usb_read_port_complete( LPVOID Context );
+
+void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{
+_func_enter_;
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+_func_exit_;
+}
+
+
+
+BOOL
+CloseTransferHandle(
+    LPCUSB_FUNCS   pUsbFuncs,
+    USB_TRANSFER   hTransfer
+    )
+{
+    BOOL bRc = TRUE;
+
+    // This assert may fail on suprise remove,
+    // but should pass during normal I/O.
+    // ASSERT( pUsbFuncs->lpIsTransferComplete(hTransfer) ); 
+
+    // CloseTransfer aborts any pending transfers
+    if ( !pUsbFuncs->lpCloseTransfer(hTransfer) ) {
+     
+	RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("*** CloseTransfer ERROR:%d ***\n", GetLastError()));	
+        bRc = FALSE;
+    }
+
+    return bRc;
+}
+
+
+BOOL
+GetTransferStatus(
+    LPCUSB_FUNCS   pUsbFuncs,
+    USB_TRANSFER   hTransfer,
+    LPDWORD        pBytesTransferred , // OPTIONAL returns number of bytes transferred
+    PUSB_ERROR     pUsbError  	 // returns USB error code
+    )
+{
+
+    BOOL bRc = TRUE;
+
+    if ( pUsbFuncs->lpGetTransferStatus(hTransfer, pBytesTransferred, pUsbError) ) {
+        if ( USB_NO_ERROR != *pUsbError ) {
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("*** CloseTransfer ERROR:%d ***\n", GetLastError()));		
+            RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("GetTransferStatus (BytesTransferred:%d, UsbError:0x%x)\n", pBytesTransferred?*pBytesTransferred:-1, pUsbError?*pUsbError:-1 )); 
+        }
+    } else {
+        RT_TRACE( _module_hci_ops_os_c_, _drv_err_,("*** GetTransferStatus ERROR:%d ***\n", GetLastError())); 
+        *pUsbError = USB_CANCELED_ERROR;
+        bRc = FALSE;
+    }
+
+    return bRc;
+}
+
+
+// The driver should never read RxCmd register. We have to set
+// RCR CMDHAT0 (bit6) to append Rx status before the Rx frame.
+//
+// |<--------  pBulkUrb->TransferBufferLength  ------------>|
+// +------------------+-------------------+------------+
+//  | Rx status (16 bytes)  | Rx frame .....             | CRC(4 bytes) |
+// +------------------+-------------------+------------+
+// ^
+// ^pRfd->Buffer.VirtualAddress
+//
+/*! \brief USB RX IRP Complete Routine.
+	@param Context pointer of RT_RFD
+*/
+u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{
+    struct intf_priv	*pintfpriv		= pintfhdl->pintfpriv;
+    struct dvobj_priv	*pdvobj_priv	= (struct dvobj_priv*)pintfpriv->intf_dev;
+    _adapter			*adapter		= (_adapter *)pdvobj_priv->padapter;
+
+	struct recv_priv	*precvpriv	= &adapter->recvpriv;
+
+	struct recv_buf		*precvbuf	= (struct recv_buf *)rmem;
+	DWORD dwErr = ERROR_SUCCESS ;
+	DWORD dwBytesTransferred = 0 ;
+	USB_TRANSFER hTransfer = NULL;
+	USB_PIPE	hPipe;
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
+
+_func_enter_;
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port(%u)\n", __LINE__));
+
+#if (CONFIG_PWRCTRL == 1)
+    if (adapter->pwrctrlpriv.pnp_bstop_trx)
+	{
+        return _FALSE;
+    }
+#endif
+
+	if(adapter->bDriverStopped || adapter->bSurpriseRemoved) 
+	{
+		RT_TRACE(_module_hci_ops_os_c_, _drv_info_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved)!!!\n"));
+		return _FALSE;
+	}
+
+	if(precvbuf !=NULL)
+	{
+
+		// get a recv buffer
+		rtl8192cu_init_recvbuf(adapter, precvbuf);
+	
+
+
+		_rtw_spinlock(&precvpriv->lock);
+		precvpriv->rx_pending_cnt++;
+		precvbuf->irp_pending = _TRUE;
+		_rtw_spinunlock(&precvpriv->lock);
+
+
+		//translate DMA FIFO addr to pipehandle
+		hPipe = ffaddr2pipehdl(pdvobj_priv, addr);
+		
+
+		RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port(%u)\n", __LINE__));
+
+		precvbuf->usb_transfer_read_port = (*usb_funcs_vp->lpIssueBulkTransfer)(
+			hPipe,
+			usb_read_port_complete,
+			precvbuf,
+			USB_IN_TRANSFER|USB_SHORT_TRANSFER_OK,
+			MAX_RECVBUF_SZ,
+			precvbuf->pbuf,
+			0);
+
+
+		if(precvbuf->usb_transfer_read_port)
+		{
+			
+		//	  GetTransferStatus(usb_funcs_vp, hTransfer, &dwBytesTransferred,&UsbRc);
+
+		//	  CloseTransferHandle(usb_funcs_vp, hTransfer);
+
+		}
+		else
+		{
+
+			dwErr = GetLastError();
+			//RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port ERROR : %d\n", dwErr));		 
+
+		}
+
+//	 	if (  USB_NO_ERROR != UsbRc && ERROR_SUCCESS == dwErr) {
+//	        dwErr = ERROR_GEN_FAILURE;
+//	    }
+
+
+		if ( ERROR_SUCCESS != dwErr ) {
+
+			SetLastError(dwErr);
+			RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port ERROR : %d\n", dwErr));	
+		}
+	
+		RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_read_port(%u)\n", __LINE__));
+
+	}
+	else // if(precvbuf !=NULL)
+	{
+		
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precv_frame ==NULL\n"));
+	}
+
+	return _TRUE;
+
+}
+
+DWORD usb_read_port_complete( PVOID context )
+{
+	struct recv_buf 	*precvbuf	= (struct recv_buf *)context;
+	_adapter			*adapter	= (_adapter *)precvbuf->adapter;
+	struct recv_priv	*precvpriv	= &adapter->recvpriv;
+
+
+	struct intf_hdl		*pintfhdl = &adapter->pio_queue->intf;
+    struct intf_priv	*pintfpriv    = pintfhdl->pintfpriv;
+    struct dvobj_priv	*pdvobj_priv  = (struct dvobj_priv*)pintfpriv->intf_dev;
+
+
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
+
+    DWORD dwBytesTransferred    = 0;
+    DWORD dwErr                 = USB_CANCELED_ERROR;
+
+	uint isevt, *pbuf;
+	int fComplete =_FALSE;
+
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port_complete(%u)\n", __LINE__));
+
+_func_enter_;
+
+
+	_rtw_spinlock_ex(&precvpriv->lock);
+	precvbuf->irp_pending=_FALSE;
+	precvpriv->rx_pending_cnt --;
+	_rtw_spinunlock_ex(&precvpriv->lock);	
+
+
+#if 1
+		
+	(*usb_funcs_vp->lpGetTransferStatus)(precvbuf->usb_transfer_read_port, &dwBytesTransferred, &dwErr);
+	fComplete = (*usb_funcs_vp->lpIsTransferComplete)(precvbuf->usb_transfer_read_port);
+	if(fComplete!=_TRUE)
+	{
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete CloseTransfer before complete\n"));
+	}
+	(*usb_funcs_vp->lpCloseTransfer)(precvbuf->usb_transfer_read_port);
+	
+	
+#endif
+
+
+	if(USB_NO_ERROR != dwErr)
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete Fail :%d\n",dwErr));
+	
+	{
+
+		if ( dwBytesTransferred > MAX_RECVBUF_SZ || dwBytesTransferred < RXDESC_SIZE )
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,
+				("\n usb_read_port_complete: (pbulkurb->TransferBufferLength > MAX_RECVBUF_SZ) || (pbulkurb->TransferBufferLength < RXDESC_SIZE): %d\n",dwBytesTransferred));
+			rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+
+    	    //usb_read_port(pintfhdl, 0, 0, (unsigned char *)precvframe);
+    	}
+		else
+		{
+			precvbuf->transfer_len = dwBytesTransferred;
+
+			pbuf = (uint*)precvbuf->pbuf;
+
+			if((isevt = *(pbuf+1)&0x1ff) == 0x1ff)
+			{
+				RT_TRACE(_module_hci_ops_os_c_,_drv_info_,
+					("\n usb_read_port_complete: get a event\n"));
+				rxcmd_event_hdl(adapter, pbuf);//rx c2h events
+
+				rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+			}
+			else
+			{
+				if(recvbuf2recvframe(adapter, precvbuf)==_FAIL)//rx packets
+				{
+					//precvbuf->reuse = _TRUE;		
+					rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+				}
+			}
+	    }
+	}
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_read_port_complete(%u)\n", __LINE__));
+
+_func_exit_;
+	return ERROR_SUCCESS;
+//	return STATUS_MORE_PROCESSING_REQUIRED;
+}
+
+void usb_read_port_cancel(_adapter *padapter){
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port_cancel(%u)\n",__FUNCTION__, __LINE__));
+}
+
+DWORD usb_write_mem_complete( LPVOID Context )
+{
+	int fComplete =_FALSE;
+	DWORD	dwBytes 	= 0;
+	DWORD	dwErr		= USB_CANCELED_ERROR;
+
+	_irqL irqL;
+	_list	*head;
+	_list *plist;
+	struct io_req	*pio_req;	
+	struct io_queue *pio_q = (struct io_queue *) Context;
+	struct intf_hdl *pintf = &(pio_q->intf);	
+	struct intf_priv *pintfpriv = pintf->pintfpriv;	
+	_adapter *padapter = (_adapter *)pintf->adapter;
+	NTSTATUS status = STATUS_SUCCESS;
+    struct xmit_priv * pxmitpriv	= &padapter->xmitpriv;
+
+	struct dvobj_priv * pdvobj_priv	= (struct dvobj_priv*)pintfpriv->intf_dev;
+
+    USB_HANDLE		usbHandle		= pdvobj_priv->usb_extension._hDevice;
+    LPCUSB_FUNCS	usb_funcs_vp	= pdvobj_priv->usb_extension._lpUsbFuncs;
+
+	// get the head from the processing io_queue
+	head = &(pio_q->processing);
+	
+_func_enter_;
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("+usb_write_mem_complete %p\n", Context));
+
+#if 1
+	_enter_critical_bh(&(pio_q->lock), &irqL);
+	
+
+	//free irp in processing list...	
+	while(rtw_is_list_empty(head) != _TRUE)
+	{
+		plist = get_next(head);	
+		rtw_list_delete(plist);
+		pio_req = LIST_CONTAINOR(plist, struct io_req, list);
+		_rtw_up_sema(&pio_req->sema);
+	}
+
+	_exit_critical_bh(&(pio_q->lock), &irqL);
+#endif
+
+
+#if 1
+		
+	(*usb_funcs_vp->lpGetTransferStatus)(pio_req->usb_transfer_write_mem , &dwBytes, &dwErr);
+	fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pio_req->usb_transfer_write_mem);
+	if(fComplete!=_TRUE)
+	{
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_mem_complete CloseTransfer before complete\n"));
+	}
+	(*usb_funcs_vp->lpCloseTransfer)(pio_req->usb_transfer_write_mem );
+	
+#endif
+	
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_write_mem_complete\n"));
+
+_func_exit_;
+
+
+	return STATUS_MORE_PROCESSING_REQUIRED;
+
+}
+
+
+void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{
+
+	NTSTATUS NtStatus = STATUS_SUCCESS;
+    USB_PIPE	hPipe;
+	_irqL	irqL;
+
+	int 	fComplete	= _FALSE;
+	DWORD	dwBytes 	= 0;
+	DWORD	dwErr		= USB_CANCELED_ERROR;
+
+
+	struct io_req 		*pio_req;
+
+	_adapter 			*adapter 	= (_adapter *)pintfhdl->adapter;
+	struct intf_priv 	*pintfpriv	= pintfhdl->pintfpriv;
+	struct dvobj_priv   * pdvobj_priv   = (struct dvobj_priv*)pintfpriv->intf_dev;
+
+	 
+    struct xmit_priv	*pxmitpriv	= &adapter->xmitpriv;
+	struct io_queue 	*pio_queue 	= (struct io_queue *)adapter->pio_queue; 
+
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
+
+
+_func_enter_;
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_write_mem(%u) pintfhdl %p wmem %p\n", __LINE__, pintfhdl, wmem));
+
+	// fetch a io_request from the io_queue
+	pio_req = alloc_ioreq(pio_queue);
+		
+	if ((pio_req == NULL)||(adapter->bSurpriseRemoved))
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("async_irp_write32 : pio_req =0x%x adapter->bSurpriseRemoved=0x%x",pio_req,adapter->bSurpriseRemoved ));
+		goto exit;
+	}	
+
+	_enter_critical_bh(&(pio_queue->lock), &irqL);
+
+
+	// insert the io_request into processing io_queue
+	rtw_list_insert_tail(&(pio_req->list),&(pio_queue->processing));
+	
+	
+	if((adapter->bDriverStopped) || (adapter->bSurpriseRemoved) ||(adapter->pwrctrlpriv.pnp_bstop_trx)) 
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\npadapter->pwrctrlpriv.pnp_bstop_trx==_TRUE\n"));
+		goto exit;
+	}
+	
+	//translate DMA FIFO addr to pipehandle
+	hPipe = ffaddr2pipehdl(pdvobj_priv, addr);	
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_,("usb_write_mem(%u)\n",__LINE__));
+
+	pio_req->usb_transfer_write_mem = (*usb_funcs_vp->lpIssueBulkTransfer)(
+		hPipe,
+		usb_write_mem_complete, 
+		pio_queue,
+		USB_OUT_TRANSFER,
+		cnt,
+		wmem,
+		0);
+
+#if 0
+
+	(*usb_funcs_vp->lpGetTransferStatus)(pio_req->usb_transfer_write_mem , &dwBytes, &dwErr);
+
+	while( fComplete != _TRUE)
+	{
+		fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pio_req->usb_transfer_write_mem);
+		if(fComplete==_TRUE)
+		{
+			(*usb_funcs_vp->lpCloseTransfer)(pio_req->usb_transfer_write_mem );
+			RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_mem finished\n"));
+			break;
+		}
+		else
+		{
+			RT_TRACE( _module_hci_ops_os_c_, _drv_err_, 
+				("usb_write_mem not yet finished %X\n", 
+				pio_req->usb_transfer_write_mem));
+			rtw_msleep_os(10);
+		}
+		
+	}
+
+#endif
+
+
+//	_rtw_down_sema(&pio_req->sema);	
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_write_mem(%X)\n",pio_req->usb_transfer_write_mem));
+
+	_exit_critical_bh(&(pio_queue->lock), &irqL);
+
+	_rtw_down_sema(&pio_req->sema); 
+	free_ioreq(pio_req, pio_queue);
+
+exit:
+_func_exit_;
+	return;
+}
+
+u32 usb_write_cnt=0;
+u32 usb_complete_cnt=0;
+
+USB_PIPE ffaddr2pipehdl(struct dvobj_priv *pNdisCEDvice, u32 addr)
+{
+	USB_PIPE	PipeHandle = NULL;
+	_adapter	*padapter = pNdisCEDvice->padapter;
+
+	
+	if(pNdisCEDvice->nr_endpoint == 11)
+	{		
+		switch(addr)
+		{	    
+	     		case RTL8712_DMA_BEQ:
+		 		PipeHandle= padapter->halpriv.pipehdls_r8712[3] ; 
+				break;
+	     		case RTL8712_DMA_BKQ:
+			 	PipeHandle=  padapter->halpriv.pipehdls_r8712[4]; 
+				break;
+	     		case RTL8712_DMA_VIQ:
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[2]; 
+				break;
+	    		case RTL8712_DMA_VOQ:
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[1]; 
+				break;					
+                     case RTL8712_DMA_BCNQ:	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[6]; 
+				break;	 	
+			case RTL8712_DMA_BMCQ:	//HI Queue
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[7]; 
+				break;	
+			case RTL8712_DMA_MGTQ:				
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[8]; 
+				break;
+                     case RTL8712_DMA_RX0FF:
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[0]; 
+				break;	 	
+			case RTL8712_DMA_C2HCMD:		 	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[5]; 
+				break;
+			case RTL8712_DMA_H2CCMD:
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[9]; 
+				break;	
+				
+		}
+
+	}
+	else if(pNdisCEDvice->nr_endpoint == 6)
+	{
+		switch(addr)
+		{	    
+			case RTL8712_DMA_BEQ:
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[3]; 
+				break;
+	     	case RTL8712_DMA_BKQ:
+			 	PipeHandle=  padapter->halpriv.pipehdls_r8712[4]; 
+				break;
+	     	case RTL8712_DMA_VIQ:
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[2]; 
+				break;
+	    	case RTL8712_DMA_VOQ:                   		
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[1]; 
+				break;
+			case RTL8712_DMA_RX0FF:
+			case RTL8712_DMA_C2HCMD:		 	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[0]; 
+				break;
+			case RTL8712_DMA_H2CCMD:
+			case RTL8712_DMA_BCNQ:					
+			case RTL8712_DMA_BMCQ:	
+			case RTL8712_DMA_MGTQ:			
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[5]; 
+				break;	
+				
+		}
+
+	}
+	else if(pNdisCEDvice->nr_endpoint == 4)
+	{
+		switch(addr)
+		{	    
+	     	case RTL8712_DMA_BEQ:
+		 	case RTL8712_DMA_BKQ:
+			 	PipeHandle=  padapter->halpriv.pipehdls_r8712[2]; 
+				break;
+     		case RTL8712_DMA_VIQ:
+		 	case RTL8712_DMA_VOQ:					
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[1]; 
+				break;
+			case RTL8712_DMA_RX0FF:
+			case RTL8712_DMA_C2HCMD:		 	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[0]; 
+				break;
+			case RTL8712_DMA_H2CCMD:	
+			case RTL8712_DMA_BCNQ:					
+			case RTL8712_DMA_BMCQ:	
+			case RTL8712_DMA_MGTQ:				
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[3]; 
+				break;	
+		}
+	
+	}
+	else
+	{
+	   RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ffaddr2pipehdl():nr_endpoint=%d error!\n", pNdisCEDvice->nr_endpoint));	   
+	}
+		
+	return PipeHandle;
+
+}
+
+DWORD usb_bulkout_zero_complete( LPVOID pZeroContext )
+{
+	struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)pZeroContext;
+	_adapter * padapter = pcontext->padapter;
+    struct dvobj_priv *	pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv;
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
+	struct xmit_priv  * pxmitpriv	= &padapter->xmitpriv;
+
+	int 	fComplete			=_FALSE;
+	DWORD	dwBytesTransferred	= 0;
+	DWORD	dwErr				= USB_CANCELED_ERROR;
+
+_func_enter_;
+
+#if 1
+				
+	(*usb_funcs_vp->lpGetTransferStatus)(pxmitpriv->usb_transfer_write_port, &dwBytesTransferred, &dwErr);
+	fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port);
+	if(fComplete!=_TRUE)
+	{
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_bulkout_zero_complete CloseTransfer before complete\n"));
+	}
+	(*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port);
+	
+#endif
+
+	if(pcontext)
+	{
+		if(pcontext->pbuf)
+		{			
+			rtw_mfree(pcontext->pbuf, sizeof(int));	
+		}	
+
+		rtw_mfree((u8*)pcontext, sizeof(struct zero_bulkout_context));	
+	}	
+
+_func_exit_;
+
+	return ERROR_SUCCESS;
+	
+
+}
+
+u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr)
+{	
+	struct zero_bulkout_context *pcontext;
+	unsigned char *pbuf;
+	u8 len = 0 ;
+	_adapter *padapter = (_adapter *)pintfhdl->adapter;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;	
+	struct xmit_priv	* pxmitpriv     = &padapter->xmitpriv;
+     
+
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj->usb_extension._lpUsbFuncs;
+
+	USB_PIPE	hPipe;
+
+_func_enter_;
+
+	if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{		
+		return _FAIL;
+	}
+
+
+	pcontext = (struct zero_bulkout_context *)rtw_zmalloc(sizeof(struct zero_bulkout_context));
+
+	pbuf = (unsigned char *)rtw_zmalloc(sizeof(int));	
+
+	len = 0;
+	
+	pcontext->pbuf = pbuf;
+	pcontext->purb = NULL;
+	pcontext->pirp = NULL;
+	pcontext->padapter = padapter;
+                    
+
+//translate DMA FIFO addr to pipehandle
+	hPipe = ffaddr2pipehdl(pdvobj, addr);
+
+
+
+
+	pxmitpriv->usb_transfer_write_port = (*usb_funcs_vp->lpIssueBulkTransfer)(
+						        hPipe, usb_bulkout_zero_complete, 
+						        pcontext, USB_OUT_TRANSFER,
+					    	    len, pbuf, 0);
+
+	
+_func_exit_;
+	
+	return _SUCCESS;
+
+}
+
+u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{
+
+    u32	i, bwritezero = _FALSE;
+	u32	ac_tag = addr;
+
+    u8*	ptr;
+
+	struct intf_priv    * pintfpriv     = pintfhdl->pintfpriv;
+	struct dvobj_priv   * pdvobj_priv   = (struct dvobj_priv*)pintfpriv->intf_dev;
+	_adapter            * padapter      = pdvobj_priv->padapter;
+
+    struct xmit_priv	* pxmitpriv     = &padapter->xmitpriv;
+    struct xmit_frame   * pxmitframe    = (struct xmit_frame *)wmem;
+
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
+
+    USB_PIPE	hPipe;
+
+	u32			bResult = _FALSE;
+
+_func_enter_;
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("+usb_write_port\n"));
+
+#if (CONFIG_PWRCTRL == 1)
+    if(padapter->pwrctrlpriv.pnp_bstop_trx==_TRUE){
+       	RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("\npadapter->pwrctrlpriv.pnp_bstop_trx==_TRUE\n"));
+
+    }
+#endif
+
+	if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		bResult = _FALSE;
+		goto exit;
+	}
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_write_port(%u)\n", __LINE__));
+
+	for(i=0; i<8; i++)
+	{
+		if(pxmitframe->bpending[i] == _FALSE)
+		{
+			_rtw_spinlock(&pxmitpriv->lock);	
+			pxmitpriv->txirp_cnt++;
+			pxmitframe->bpending[i]  = _TRUE;
+			_rtw_spinunlock(&pxmitpriv->lock);
+			
+			pxmitframe->sz[i] = cnt;
+			pxmitframe->ac_tag[i] = ac_tag;
+
+			break;
+		}
+	}	
+
+
+	//TODO:
+	if (pdvobj_priv->ishighspeed)
+	{
+		if(cnt> 0 && cnt%512 == 0)
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ishighspeed, cnt=%d\n", cnt));
+		//	cnt=cnt+1;
+			bwritezero = _TRUE;
+
+		}	
+	}
+	else
+	{
+		if(cnt > 0 && cnt%64 == 0)
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("cnt=%d\n", cnt));
+		//	cnt=cnt+1;
+			bwritezero = _TRUE;
+
+		}	
+	}
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_write_port: pipe handle convert\n"));
+
+	//translate DMA FIFO addr to pipehandle
+	hPipe = ffaddr2pipehdl(pdvobj_priv, addr);
+
+
+#if 0
+	// for tx fifo, the maximum payload number is 8,
+	// we workaround this issue here by separate whole fifo into 8 segments.
+	if (cnt <= 500)
+		cnt = 500;
+#endif
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_,
+		("usb_write_port(%u): pxmitframe %X  pxmitframe->padapter %X\n",__LINE__, pxmitframe, pxmitframe->padapter));
+
+	pxmitpriv->usb_transfer_write_port = (*usb_funcs_vp->lpIssueBulkTransfer)(
+						        hPipe, usb_write_port_complete, 
+						        pxmitframe, USB_OUT_TRANSFER,
+					    	    cnt, pxmitframe->mem_addr, 0);
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+
+	ptr=(u8 *)&pxmitframe->mem;
+
+#if 0
+	if (pdvobj_priv->ishighspeed)
+	{
+		ptr=ptr+512;
+	}
+	else
+	{
+		ptr=ptr+64;
+
+	}
+#endif
+	if(bwritezero == _TRUE)
+	{
+		usb_bulkout_zero(pintfhdl, addr);
+	}
+
+//	if (!pxmitframe->usb_transfer_xmit)
+//	    padapter->bSurpriseRemoved=_TRUE;
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	bResult = _SUCCESS;
+
+exit:
+_func_exit_;
+	return bResult;
+}
+
+DWORD usb_write_port_complete( LPVOID Context )
+{
+
+//    u8 *ptr;
+
+    struct xmit_frame *	pxmitframe  = (struct xmit_frame *) Context;
+    _adapter          * padapter    = pxmitframe->padapter;
+    struct dvobj_priv *	pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv;
+	struct xmit_priv  * pxmitpriv   = &padapter->xmitpriv;
+	struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
+
+	int		fComplete			=_FALSE;
+	DWORD	dwBytesTransferred	= 0;
+	DWORD	dwErr				= USB_CANCELED_ERROR;
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u), pxmitframe %X\n",__FUNCTION__, __LINE__, Context));
+
+_func_enter_;
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("+usb_write_port_complete\n"));
+
+	_rtw_spinlock_ex(&pxmitpriv->lock);	
+	pxmitpriv->txirp_cnt--;
+	_rtw_spinunlock_ex(&pxmitpriv->lock);
+
+	if(pxmitpriv->txirp_cnt==0){
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n"));		
+		_rtw_up_sema(&(pxmitpriv->tx_retevt));
+	}
+
+
+	//not to consider tx fragment
+	rtw_free_xmitframe(pxmitpriv, pxmitframe);		
+
+
+#if 1
+			
+	(*usb_funcs_vp->lpGetTransferStatus)(pxmitpriv->usb_transfer_write_port, &dwBytesTransferred, &dwErr);
+	fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port);
+	if(fComplete!=_TRUE)
+	{
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_port_complete CloseTransfer before complete\n"));
+	}
+	(*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port);
+
+#else
+
+	if((*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port))
+	{
+		(*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port);
+	}
+
+#endif
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, 
+		("%s(%u): pxmitpriv %X pxmitpriv->free_xmitframe_cnt %X pxmitframe->padapter %X pxmitframe->padapter %X\n", 
+		__LINE__, pxmitpriv, pxmitpriv->free_xmitframe_cnt, pxmitframe->padapter));
+
+    rtl8192cu_xmitframe_complete(padapter, pxmitpriv, pxmitbuf);
+
+_func_exit_;
+
+    return STATUS_SUCCESS;
+}
+
+DWORD usb_write_scsi_complete(LPVOID pTxContext) 
+{
+#ifndef PLATFORM_OS_CE
+	struct SCSI_BUFFER_ENTRY *psb_entry = (struct SCSI_BUFFER_ENTRY *)pTxContext;
+	_adapter 				 *padapter 	= psb_entry->padapter;
+	struct SCSI_BUFFER 		 *psb 		= padapter->pscsi_buf;
+	struct xmit_priv 		 *pxmitpriv = &(padapter->xmitpriv);
+    struct dvobj_priv 		*pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv;
+	LPCUSB_FUNCS 		  	 lpUsbFuncs = pdvobj_priv->pUsbExtension->_lpUsbFuncs;
+
+	int 	fComplete			=_FALSE;
+	DWORD	dwBytesTransferred	= 0;
+	DWORD	dwErr				= USB_CANCELED_ERROR;
+
+_func_enter_;
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u): circ_space = %d\n",__FUNCTION__, __LINE__, CIRC_SPACE( psb->head,psb->tail,  SCSI_BUFFER_NUMBER)));
+
+#if 1
+				
+	(*lpUsbFuncs->lpGetTransferStatus)(psb_entry->usb_transfer_scsi_txcmd, &dwBytesTransferred, &dwErr);
+	fComplete = (*lpUsbFuncs->lpIsTransferComplete)(psb_entry->usb_transfer_scsi_txcmd);
+	if(fComplete!=_TRUE)
+	{
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_scsi_complete CloseTransfer before complete\n"));
+	}
+	(*lpUsbFuncs->lpCloseTransfer)(psb_entry->usb_transfer_scsi_txcmd);
+	
+#else
+
+	if((*lpUsbFuncs->lpIsTransferComplete)(psb_entry->usb_transfer_scsi_txcmd))
+		(*lpUsbFuncs->lpCloseTransfer)(psb_entry->usb_transfer_scsi_txcmd);
+#endif
+
+	memset(psb_entry->entry_memory, 0, 8);
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	if((psb->tail+1)==SCSI_BUFFER_NUMBER)
+		psb->tail=0;
+	else 
+		psb->tail++;
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	if(CIRC_CNT(psb->head,psb->tail,SCSI_BUFFER_NUMBER)==0){
+		RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("write_txcmd_scsififo_callback: up_sema\n"));
+		_rtw_up_sema(&pxmitpriv->xmit_sema);
+	}
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	if(padapter->bSurpriseRemoved) {
+		return STATUS_MORE_PROCESSING_REQUIRED;
+	}
+
+_func_exit_;
+#endif
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	return STATUS_MORE_PROCESSING_REQUIRED;
+}
+
+uint usb_write_scsi(struct intf_hdl *pintfhdl, u32 cnt, u8 *wmem)
+{
+
+#ifndef PLATFORM_OS_CE
+
+	_adapter 		  *padapter = (_adapter *)pintfhdl->adapter;
+	struct dvobj_priv *pdev 	= (struct dvobj_priv*)&padapter->dvobjpriv;
+
+	struct SCSI_BUFFER       *psb      =padapter->pscsi_buf;
+	struct SCSI_BUFFER_ENTRY *psb_entry=LIST_CONTAINOR(wmem,struct SCSI_BUFFER_ENTRY,entry_memory);
+
+_func_enter_;
+	if(padapter->bSurpriseRemoved||padapter->bDriverStopped)
+		return 0;
+	
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	psb_entry->usb_transfer_scsi_txcmd=pdev->pUsbExtension->_lpUsbFuncs->lpIssueBulkTransfer(
+			pdev->scsi_out_pipehandle,
+			usb_write_scsi_complete,
+			psb_entry,
+			USB_OUT_TRANSFER,
+			cnt,
+			wmem,
+			0);
+	
+_func_exit_;
+#endif
+
+   return _SUCCESS;  
+}
+
+
+/*
+ */
+uint usb_init_intf_priv(struct intf_priv *pintfpriv)
+{
+	// get the dvobj_priv object
+	struct dvobj_priv * pNdisCEDvice = (struct dvobj_priv *) pintfpriv->intf_dev;
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	// set init intf_priv init status as _IOREADY
+	pintfpriv->intf_status = _IOREADY;
+
+	//  determine the max io size by dvobj_priv.ishighspeed
+	if(pNdisCEDvice->ishighspeed)
+		pintfpriv->max_iosz =  128;
+	else
+		pintfpriv->max_iosz =  64;
+
+	//  read/write size set as 0
+	pintfpriv->io_wsz = 0;
+	pintfpriv->io_rsz = 0;
+
+	//  init io_rwmem buffer
+	pintfpriv->allocated_io_rwmem = rtw_zmalloc(pintfpriv->max_iosz +4);
+	if (pintfpriv->allocated_io_rwmem == NULL)
+	{
+		rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz +4);
+		return _FAIL;
+	}
+	else
+	{
+		// word align the io_rwmem
+		pintfpriv->io_rwmem = pintfpriv->allocated_io_rwmem + 4 - ( (u32)(pintfpriv->allocated_io_rwmem) & 3);
+	}
+
+#ifndef PLATFORM_OS_CE
+
+	//  init io_r_mem buffer
+	pintfpriv->allocated_io_r_mem = rtw_zmalloc(pintfpriv->max_iosz +4);
+	if (pintfpriv->allocated_io_r_mem == NULL)
+	{
+		rtw_mfree((u8 *)(pintfpriv->allocated_io_r_mem), pintfpriv->max_iosz +4);
+		return _FAIL;
+	}
+	else
+	{
+		// word align the io_rwmem
+		pintfpriv->io_r_mem = pintfpriv->allocated_io_r_mem + 4 - ( (u32)(pintfpriv->allocated_io_r_mem) & 3);
+	}
+#endif
+
+	return _SUCCESS;
+}
+
+void usb_unload_intf_priv(struct intf_priv *pintfpriv)
+{
+#ifndef PLATFORM_OS_CE
+
+	rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz+4);
+	rtw_mfree((u8 *)(pintfpriv->allocated_io_r_mem), pintfpriv->max_iosz+4);
+#endif
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+}
+
+
+
+void usb_write_port_cancel(_adapter *padapter)
+{
+
+	sint i,j;
+	struct dvobj_priv   *pdev = &padapter->dvobjpriv;
+	struct xmit_priv *pxmitpriv=&padapter->xmitpriv;
+	struct xmit_frame *pxmitframe;
+
+	_rtw_spinlock(&pxmitpriv->lock);
+	pxmitpriv->txirp_cnt--; //decrease 1 for Initialize ++
+	_rtw_spinunlock(&pxmitpriv->lock);
+	
+	if (pxmitpriv->txirp_cnt) 
+	{
+		// Canceling Pending Recv Irp
+		pxmitframe= (struct xmit_frame *)pxmitpriv->pxmit_frame_buf;
+		
+		for( i = 0; i < NR_XMITFRAME; i++ )
+		{
+			for(j=0;j<8;j++)
+			{
+				if (pxmitframe->bpending[j]==_TRUE)
+				{			
+
+					RT_TRACE(_module_hci_ops_os_c_,_drv_err_,(" usb_write_port_cancel() :IoCancelIrp\n"));
+
+				}
+			}
+			
+			pxmitframe++;
+		}
+
+		_rtw_down_sema(&(pxmitpriv->tx_retevt));
+		
+	}
+
+}
+
+DWORD usbctrl_vendorreq_complete(LPVOID lpvNotifyParameter)
+{
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv*)lpvNotifyParameter;
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("+usbctrl_vendorreq_complete\n"));
+	
+    return STATUS_SUCCESS;
+}
+
+
+int usbctrl_vendorreq(struct intf_priv *pintfpriv, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
+{
+	u8			ret=_TRUE;
+//	NTSTATUS	ntstatus;
+//	int 		fComplete;
+//	LPCUSB_DEVICE		lpDeviceInfo;
+
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfpriv->intf_dev;   
+
+    USB_TRANSFER        usbTrans;
+    USB_DEVICE_REQUEST  usb_device_req;
+    USB_HANDLE      usbHandle   = pdvobjpriv->usb_extension._hDevice;
+    LPCUSB_FUNCS    usbFuncs    = pdvobjpriv->usb_extension._lpUsbFuncs;
+
+	u32	transfer_flags = 0;
+
+	_func_enter_;
+
+    memset( &usb_device_req, 0, sizeof( USB_DEVICE_REQUEST ) );
+
+    if( 0x01 == requesttype )
+	{
+        usb_device_req.bmRequestType = USB_REQUEST_DEVICE_TO_HOST | USB_REQUEST_VENDOR | USB_REQUEST_FOR_DEVICE;
+    }
+	else
+    {
+        usb_device_req.bmRequestType = USB_REQUEST_HOST_TO_DEVICE | USB_REQUEST_VENDOR | USB_REQUEST_FOR_DEVICE;
+    }
+
+	usb_device_req.bRequest 		= request;
+	usb_device_req.wValue 			= value;
+	usb_device_req.wIndex 	    	= index;
+	usb_device_req.wLength 	    	= len;    
+
+	if (requesttype == 0x01)
+	{
+		transfer_flags = USB_IN_TRANSFER;//read_in
+	}
+	else
+	{
+		transfer_flags= USB_OUT_TRANSFER;//write_out
+	}
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("+usbctrl_vendorreq\n",__FUNCTION__,__LINE__));
+
+#if 0
+	// Remember to add callback for sync
+	usbTrans = (*usbFuncs->lpIssueVendorTransfer)(usbHandle, 
+							usbctrl_vendorreq_complete, pdvobjpriv, 
+							transfer_flags, &usb_device_req, pdata, 0);
+#else
+	// Remember to add callback for sync
+	usbTrans = (*usbFuncs->lpIssueVendorTransfer)(usbHandle, 
+							NULL, 0, 
+							transfer_flags, &usb_device_req, pdata, 0);
+#endif
+
+//	rtw_usleep_os(10);
+
+	if ( usbTrans )
+	{
+		DWORD	dwBytes 	= 0;
+		DWORD	dwErr		= USB_CANCELED_ERROR;
+		int 	fComplete;
+
+		(*usbFuncs->lpGetTransferStatus)(usbTrans, &dwBytes, &dwErr);
+
+		fComplete = (*usbFuncs->lpIsTransferComplete)(usbTrans);
+
+		if (fComplete== _TRUE)
+		{
+			(*usbFuncs->lpCloseTransfer)(usbTrans);
+			RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("usbctrl_vendorreq lpCloseTransfer\n"));
+		}
+
+		if ( dwErr != USB_NO_ERROR || fComplete != _TRUE)
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq lpCloseTransfer without complete\n"));
+			ret = _FALSE;
+			goto exit;
+		}
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq without usbTrans\n"));
+		ret = _FALSE;
+		goto exit;
+
+	}
+
+exit:
+	RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("-usbctrl_vendorreq\n"));
+_func_exit_;
+	
+	return ret;	
+
+}
+
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/usb_ops_linux.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/usb_ops_linux.c
new file mode 100755
index 00000000..2a1bfe27
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/usb_ops_linux.c
@@ -0,0 +1,1543 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _HCI_OPS_OS_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+#include <usb_ops.h>
+#include <circ_buf.h>
+#include <recv_osdep.h>
+#include <rtl8192c_hal.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
+{
+	_adapter *padapter = pintfhdl->padapter;
+	struct dvobj_priv  *pdvobjpriv = adapter_to_dvobj(padapter); 
+	struct usb_device *udev = pdvobjpriv->pusbdev;
+
+	unsigned int pipe;
+	int status = 0;
+	u32 tmp_buflen=0;
+	u8 reqtype;
+	u8 *pIo_buf;
+	int vendorreq_times = 0;
+
+	#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
+	u8 *tmp_buf;
+	#else // use stack memory
+	u8 tmp_buf[MAX_USB_IO_CTL_SIZE];
+	#endif
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if(padapter->adapter_type > PRIMARY_ADAPTER)
+	{
+		padapter = padapter->pbuddy_adapter;
+		pdvobjpriv = adapter_to_dvobj(padapter);
+		udev = pdvobjpriv->pusbdev;
+	}
+#endif
+
+
+	//DBG_871X("%s %s:%d\n",__FUNCTION__, current->comm, current->pid);
+
+	if((padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)){
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq:(padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		status = -EPERM; 
+		goto exit;
+	}	
+
+	if(len>MAX_VENDOR_REQ_CMD_SIZE){
+		DBG_8192C( "[%s] Buffer len error ,vendor request failed\n", __FUNCTION__ );
+		status = -EINVAL;
+		goto exit;
+	}	
+
+	#ifdef CONFIG_USB_VENDOR_REQ_MUTEX
+	_enter_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL);
+	#endif
+	
+	
+	// Acquire IO memory for vendorreq
+#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+	pIo_buf = pdvobjpriv->usb_vendor_req_buf;
+#else
+	#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
+	tmp_buf = rtw_malloc( (u32) len + ALIGNMENT_UNIT);
+	tmp_buflen =  (u32)len + ALIGNMENT_UNIT;
+	#else // use stack memory
+	tmp_buflen = MAX_USB_IO_CTL_SIZE;
+	#endif
+
+	// Added by Albert 2010/02/09
+	// For mstar platform, mstar suggests the address for USB IO should be 16 bytes alignment.
+	// Trying to fix it here.
+	pIo_buf = (tmp_buf==NULL)?NULL:tmp_buf + ALIGNMENT_UNIT -((SIZE_PTR)(tmp_buf) & 0x0f );	
+#endif
+
+	if ( pIo_buf== NULL) {
+		DBG_8192C( "[%s] pIo_buf == NULL \n", __FUNCTION__ );
+		status = -ENOMEM;
+		goto release_mutex;
+	}
+	
+	while(++vendorreq_times<= MAX_USBCTRL_VENDORREQ_TIMES)
+	{
+		_rtw_memset(pIo_buf, 0, len);
+		
+		if (requesttype == 0x01)
+		{
+			pipe = usb_rcvctrlpipe(udev, 0);//read_in
+			reqtype =  REALTEK_USB_VENQT_READ;		
+		} 
+		else 
+		{
+			pipe = usb_sndctrlpipe(udev, 0);//write_out
+			reqtype =  REALTEK_USB_VENQT_WRITE;		
+			_rtw_memcpy( pIo_buf, pdata, len);
+		}		
+	
+		#if 0
+		//timeout test for firmware downloading
+		status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len
+			, ((value >= FW_8192C_START_ADDRESS && value <= FW_8192C_END_ADDRESS) ||value!=0x1000) ?RTW_USB_CONTROL_MSG_TIMEOUT : RTW_USB_CONTROL_MSG_TIMEOUT_TEST
+		);
+		#else
+		status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT);
+		#endif
+	
+		if ( status == len)   // Success this control transfer.
+		{
+			rtw_reset_continual_urb_error(pdvobjpriv);
+			if ( requesttype == 0x01 )
+			{   // For Control read transfer, we have to copy the read data from pIo_buf to pdata.
+				_rtw_memcpy( pdata, pIo_buf,  len );
+			}
+		}
+		else { // error cases
+			DBG_8192C("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n"
+				, value,(requesttype == 0x01)?"read":"write" , len, status, *(u32*)pdata, vendorreq_times);
+			
+			if (status < 0) {
+				if(status == (-ESHUTDOWN)	|| status == -ENODEV	)
+				{			
+					padapter->bSurpriseRemoved = _TRUE;
+				} else {
+					#ifdef DBG_CONFIG_ERROR_DETECT
+					{
+						HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+						pHalData->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL;
+					}
+					#endif
+				}
+			}
+			else // status != len && status >= 0
+			{
+				if(status > 0) {
+					if ( requesttype == 0x01 )
+					{   // For Control read transfer, we have to copy the read data from pIo_buf to pdata.
+						_rtw_memcpy( pdata, pIo_buf,  len );
+					}
+				}
+			}
+
+			if(rtw_inc_and_chk_continual_urb_error(pdvobjpriv) == _TRUE ){
+				padapter->bSurpriseRemoved = _TRUE;
+				break;
+			}
+	
+		}
+	
+		// firmware download is checksumed, don't retry
+		if( (value >= FW_8192C_START_ADDRESS && value <= FW_8192C_END_ADDRESS) || status == len )
+			break;
+	
+	}
+	
+	// release IO memory used by vendorreq
+	#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
+	rtw_mfree(tmp_buf, tmp_buflen);
+	#endif
+
+release_mutex:
+	#ifdef CONFIG_USB_VENDOR_REQ_MUTEX
+	_exit_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL);
+	#endif
+exit:
+	return status;
+
+}
+
+static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data=0; 
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x01;//read_in
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 1;	
+	
+	usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
+
+	_func_exit_;
+
+	return (u8)(le32_to_cpu(data)&0x0ff);
+		
+}
+
+static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr)
+{       
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data=0;
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x01;//read_in
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 2;	
+	
+	usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
+
+	_func_exit_;
+
+	return (u16)(le32_to_cpu(data)&0xffff);
+	
+}
+
+static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data=0;
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x01;//read_in
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 4;	
+	
+	usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
+
+	_func_exit_;
+
+	return le32_to_cpu(data);
+	
+}
+
+static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data;
+	int ret;
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x00;//write_out
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 1;
+	
+	data = val;
+	data = cpu_to_le32(data&0x000000ff);
+	
+	ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+
+static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
+{	
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data;
+	int ret;
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x00;//write_out
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 2;
+	
+	data = val;
+	data = cpu_to_le32(data&0x0000ffff);
+	
+	ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+
+static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data;
+	int ret;
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x00;//write_out
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 4;
+	data = cpu_to_le32(val);	
+	
+
+	ret =usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+
+static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u8 buf[VENDOR_CMD_MAX_DATA_LEN]={0};
+	int ret;
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x00;//write_out
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = length;
+	 _rtw_memcpy(buf, pdata, len );
+	
+	ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, buf, len, requesttype);
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs)
+{
+	int	err;
+	_adapter		*padapter = (_adapter	 *)purb->context;
+
+	if(purb->status==0)//SUCCESS
+	{
+		if (purb->actual_length > sizeof(INTERRUPT_MSG_FORMAT_EX))
+		{
+			DBG_8192C("usb_read_interrupt_complete: purb->actual_length > sizeof(INTERRUPT_MSG_FORMAT_EX) \n");
+		}
+
+		err = usb_submit_urb(purb, GFP_ATOMIC);
+		if((err) && (err != (-EPERM)))
+		{
+			DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, purb->status);
+		}
+	}
+	else
+	{
+		DBG_8192C("###=> usb_read_interrupt_complete => urb status(%d)\n", purb->status);
+
+		switch(purb->status) {
+			case -EINVAL:
+			case -EPIPE:			
+			case -ENODEV:
+			case -ESHUTDOWN:
+				//padapter->bSurpriseRemoved=_TRUE;
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
+			case -ENOENT:
+				padapter->bDriverStopped=_TRUE;			
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
+				break;
+			case -EPROTO:
+				break;
+			case -EINPROGRESS:
+				DBG_8192C("ERROR: URB IS IN PROGRESS!/n");
+				break;
+			default:
+				break;				
+		}
+	}	
+
+}
+
+static u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr)
+{
+	int	err;
+	unsigned int pipe;
+	u32	ret = _SUCCESS;
+	_adapter			*adapter = pintfhdl->padapter;
+	struct dvobj_priv	*pdvobj = adapter_to_dvobj(adapter);
+	struct recv_priv	*precvpriv = &adapter->recvpriv;
+	struct usb_device	*pusbd = pdvobj->pusbdev;
+
+_func_enter_;
+
+	//translate DMA FIFO addr to pipehandle
+	pipe = ffaddr2pipehdl(pdvobj, addr);
+
+	usb_fill_int_urb(precvpriv->int_in_urb, pusbd, pipe, 
+					precvpriv->int_in_buf,
+            				sizeof(INTERRUPT_MSG_FORMAT_EX),
+            				usb_read_interrupt_complete,
+            				adapter,
+            				1);
+
+	err = usb_submit_urb(precvpriv->int_in_urb, GFP_ATOMIC);
+	if((err) && (err != (-EPERM)))
+	{
+		DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, precvpriv->int_in_urb->status);
+		ret = _FAIL;
+	}
+
+_func_exit_;
+
+	return ret;
+}
+#endif
+
+static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxstat, struct phy_stat *pphy_info)
+{	
+	s32 ret=_SUCCESS;
+#ifdef CONFIG_CONCURRENT_MODE	
+	u8 *primary_myid, *secondary_myid, *paddr1;
+	union recv_frame	*precvframe_if2 = NULL;
+	_adapter *primary_padapter = precvframe->u.hdr.adapter;
+	_adapter *secondary_padapter = primary_padapter->pbuddy_adapter;
+	struct recv_priv *precvpriv = &primary_padapter->recvpriv;
+	_queue *pfree_recv_queue = &precvpriv->free_recv_queue;
+	u8	*pbuf = precvframe->u.hdr.rx_data;
+	
+	if(!secondary_padapter)
+		return ret;
+	
+	paddr1 = GetAddr1Ptr(precvframe->u.hdr.rx_data);		
+
+	if(IS_MCAST(paddr1) == _FALSE)//unicast packets
+	{
+		//primary_myid = myid(&primary_padapter->eeprompriv);
+		secondary_myid = myid(&secondary_padapter->eeprompriv);
+
+		if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN))
+		{			
+			//change to secondary interface
+			precvframe->u.hdr.adapter = secondary_padapter;
+		}	
+
+		//ret = recv_entry(precvframe);
+
+	}
+	else // Handle BC/MC Packets	
+	{
+		
+		u8 clone = _TRUE;
+#if 0		
+		u8 type, subtype, *paddr2, *paddr3;
+	
+		type =  GetFrameType(pbuf);
+		subtype = GetFrameSubType(pbuf); //bit(7)~bit(2)
+		
+		switch (type)
+		{
+			case WIFI_MGT_TYPE: //Handle BC/MC mgnt Packets
+				if(subtype == WIFI_BEACON)
+				{
+					paddr3 = GetAddr3Ptr(precvframe->u.hdr.rx_data);
+				
+					if (check_fwstate(&secondary_padapter->mlmepriv, _FW_LINKED) &&
+						_rtw_memcmp(paddr3, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN))
+					{
+						//change to secondary interface
+						precvframe->u.hdr.adapter = secondary_padapter;
+						clone = _FALSE;
+					}
+
+					if(check_fwstate(&primary_padapter->mlmepriv, _FW_LINKED) &&
+						_rtw_memcmp(paddr3, get_bssid(&primary_padapter->mlmepriv), ETH_ALEN))
+					{
+						if(clone==_FALSE)
+						{
+							clone = _TRUE;									
+						}	
+						else
+						{
+							clone = _FALSE;
+						}
+
+						precvframe->u.hdr.adapter = primary_padapter;	
+					}
+
+					if(check_fwstate(&primary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) ||
+						check_fwstate(&secondary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING))
+					{
+						clone = _TRUE;
+						precvframe->u.hdr.adapter = primary_padapter;	
+					}
+				
+				}
+				else if(subtype == WIFI_PROBEREQ)
+				{
+					//probe req frame is only for interface2
+					//change to secondary interface
+					precvframe->u.hdr.adapter = secondary_padapter;
+					clone = _FALSE;
+				}			
+				break;
+			case WIFI_CTRL_TYPE: // Handle BC/MC ctrl Packets
+			
+				break;
+			case WIFI_DATA_TYPE: //Handle BC/MC data Packets
+					//Notes: AP MODE never rx BC/MC data packets
+			
+				paddr2 = GetAddr2Ptr(precvframe->u.hdr.rx_data);
+
+				if(_rtw_memcmp(paddr2, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN))
+				{
+					//change to secondary interface
+					precvframe->u.hdr.adapter = secondary_padapter;
+					clone = _FALSE;
+				}
+
+				break;
+			default:
+			
+				break;			
+		}
+#endif
+
+		if(_TRUE == clone)
+		{
+			//clone/copy to if2
+			u8 shift_sz = 0;
+			u32 alloc_sz, skb_len;
+			_pkt	 *pkt_copy = NULL;
+			struct rx_pkt_attrib *pattrib = NULL;
+		
+			precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue);
+			if(precvframe_if2)
+			{
+				precvframe_if2->u.hdr.adapter = secondary_padapter;
+		
+				_rtw_init_listhead(&precvframe_if2->u.hdr.list);	
+				precvframe_if2->u.hdr.precvbuf = NULL;	//can't access the precvbuf for new arch.
+				precvframe_if2->u.hdr.len=0;
+
+				_rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib));
+
+				pattrib = &precvframe_if2->u.hdr.attrib;
+
+				//	Modified by Albert 20101213
+				//	For 8 bytes IP header alignment.
+				if (pattrib->qos)	//	Qos data, wireless lan header length is 26
+				{
+					shift_sz = 6;
+				}
+				else
+				{
+					shift_sz = 0;
+				}
+
+				skb_len = pattrib->pkt_len;
+
+				// for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet.
+				// modify alloc_sz for recvive crc error packet by thomas 2011-06-02
+				if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){
+					//alloc_sz = 1664;	//1664 is 128 alignment.
+					if(skb_len <= 1650)
+						alloc_sz = 1664;
+					else
+						alloc_sz = skb_len + 14;
+				}
+				else {
+					alloc_sz = skb_len;
+					//	6 is for IP header 8 bytes alignment in QoS packet case.
+					//	8 is for skb->data 4 bytes alignment.
+					alloc_sz += 14;
+				}
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+				pkt_copy = dev_alloc_skb(alloc_sz);
+#else			
+				pkt_copy = netdev_alloc_skb(secondary_padapter->pnetdev, alloc_sz);
+#endif		
+				if(pkt_copy)
+				{
+					pkt_copy->dev = secondary_padapter->pnetdev;
+					precvframe_if2->u.hdr.pkt = pkt_copy;
+					precvframe_if2->u.hdr.rx_head = pkt_copy->data;
+					precvframe_if2->u.hdr.rx_end = pkt_copy->data + alloc_sz;
+					skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address
+					skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz.
+					_rtw_memcpy(pkt_copy->data, pbuf, skb_len);
+					precvframe_if2->u.hdr.rx_data = precvframe_if2->u.hdr.rx_tail = pkt_copy->data;
+					
+			
+					recvframe_put(precvframe_if2, skb_len);
+					//recvframe_pull(precvframe_if2, drvinfo_sz + RXDESC_SIZE);
+
+					rtl8192c_translate_rx_signal_stuff(precvframe_if2, pphy_info);
+	
+					ret = rtw_recv_entry(precvframe_if2);
+
+				} else {
+					rtw_free_recvframe(precvframe_if2, pfree_recv_queue);
+					DBG_8192C("%s()-%d: alloc_skb() failed!\n", __FUNCTION__, __LINE__);	
+				}
+
+			}
+			
+		}
+		
+	}
+
+	rtl8192c_translate_rx_signal_stuff(precvframe, pphy_info);
+
+	ret = rtw_recv_entry(precvframe);
+
+#endif
+
+	return ret;
+
+}
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
+static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
+{
+	u8	*pbuf;
+	u8	shift_sz = 0;
+	u16	pkt_cnt, drvinfo_sz;
+	u32	pkt_offset, skb_len, alloc_sz;
+	s32	transfer_len;
+	struct recv_stat	*prxstat;
+	struct phy_stat	*pphy_info = NULL;
+	_pkt				*pkt_copy = NULL;
+	union recv_frame	*precvframe = NULL;
+	struct rx_pkt_attrib	*pattrib = NULL;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	_queue			*pfree_recv_queue = &precvpriv->free_recv_queue;
+
+
+	transfer_len = (s32)precvbuf->transfer_len;	
+	pbuf = precvbuf->pbuf;
+
+	prxstat = (struct recv_stat *)pbuf;	
+	pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
+	
+#if 0 //temp remove when disable usb rx aggregation
+	if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len<RXDESC_SIZE) ||(pkt_len<=0))
+	{		
+		return _FAIL;
+	}
+#endif
+	
+	do{		
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
+			 ("recvbuf2recvframe: rxdesc=offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n",
+			  prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4));
+
+		prxstat = (struct recv_stat *)pbuf;
+
+		precvframe = rtw_alloc_recvframe(pfree_recv_queue);
+		if(precvframe==NULL)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n"));
+			DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__);	
+			goto _exit_recvbuf2recvframe;
+		}
+
+		_rtw_init_listhead(&precvframe->u.hdr.list);	
+		precvframe->u.hdr.precvbuf = NULL;	//can't access the precvbuf for new arch.
+		precvframe->u.hdr.len=0;
+
+		rtl8192c_query_rx_desc_status(precvframe, prxstat);
+
+		pattrib = &precvframe->u.hdr.attrib;
+		if(pattrib->physt)
+		{
+			pphy_info = (struct phy_stat *)(pbuf + RXDESC_OFFSET);
+		}
+
+		pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len;
+
+		if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len))
+		{	
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n"));
+			DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__);	
+			rtw_free_recvframe(precvframe, pfree_recv_queue);
+			goto _exit_recvbuf2recvframe;
+		}
+
+		//	Modified by Albert 20101213
+		//	For 8 bytes IP header alignment.
+		if (pattrib->qos)	//	Qos data, wireless lan header length is 26
+		{
+			shift_sz = 6;
+		}
+		else
+		{
+			shift_sz = 0;
+		}
+
+		skb_len = pattrib->pkt_len;
+
+		// for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet.
+		// modify alloc_sz for recvive crc error packet by thomas 2011-06-02
+		if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){
+			//alloc_sz = 1664;	//1664 is 128 alignment.
+			if(skb_len <= 1650)
+				alloc_sz = 1664;
+			else
+				alloc_sz = skb_len + 14;
+		}
+		else {
+			alloc_sz = skb_len;
+			//	6 is for IP header 8 bytes alignment in QoS packet case.
+			//	8 is for skb->data 4 bytes alignment.
+			alloc_sz += 14;
+		}
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+		pkt_copy = dev_alloc_skb(alloc_sz);
+#else			
+		pkt_copy = netdev_alloc_skb(padapter->pnetdev, alloc_sz);
+#endif		
+		if(pkt_copy)
+		{
+			pkt_copy->dev = padapter->pnetdev;
+			precvframe->u.hdr.pkt = pkt_copy;
+			precvframe->u.hdr.rx_head = pkt_copy->data;
+			precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz;
+			skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address
+			skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz.
+			_rtw_memcpy(pkt_copy->data, (pbuf + pattrib->shift_sz + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len);
+			precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data;
+		}
+		else
+		{
+			DBG_8192C("recvbuf2recvframe:can not allocate memory for skb copy\n");
+			//precvframe->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC);
+			//precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf;
+			//precvframe->u.hdr.rx_end = pbuf + (pkt_offset>1612?pkt_offset:1612);
+
+			precvframe->u.hdr.pkt = NULL;
+			rtw_free_recvframe(precvframe, pfree_recv_queue);
+
+			goto _exit_recvbuf2recvframe;
+		}
+
+		recvframe_put(precvframe, skb_len);
+		//recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE);	
+
+#ifdef CONFIG_USB_RX_AGGREGATION
+		switch(pHalData->UsbRxAggMode)
+		{
+			case USB_RX_AGG_DMA:
+			case USB_RX_AGG_MIX:
+				pkt_offset = (u16)_RND128(pkt_offset);
+				break;
+				case USB_RX_AGG_USB:
+				pkt_offset = (u16)_RND4(pkt_offset);
+				break;
+			case USB_RX_AGG_DISABLE:			
+			default:				
+				break;
+		}
+#endif
+
+#ifdef CONFIG_CONCURRENT_MODE
+		if(rtw_buddy_adapter_up(padapter))
+		{
+			if(pre_recv_entry(precvframe, prxstat, pphy_info) != _SUCCESS)
+			{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n"));
+			}
+		}
+		else
+		{
+			rtl8192c_translate_rx_signal_stuff(precvframe, pphy_info);
+			if(rtw_recv_entry(precvframe) != _SUCCESS)
+			{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
+			}
+		}
+	
+#else
+		rtl8192c_translate_rx_signal_stuff(precvframe, pphy_info);
+		if(rtw_recv_entry(precvframe) != _SUCCESS)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
+		}
+#endif
+
+		pkt_cnt--;
+		transfer_len -= pkt_offset;
+		pbuf += pkt_offset;	
+		precvframe = NULL;
+		pkt_copy = NULL;
+
+		if(transfer_len>0 && pkt_cnt==0)
+			pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
+
+	}while((transfer_len>0) && (pkt_cnt>0));
+
+_exit_recvbuf2recvframe:
+
+	return _SUCCESS;
+}
+
+void rtl8192cu_recv_tasklet(void *priv)
+{	
+	struct recv_buf *precvbuf = NULL;
+	_adapter	*padapter = (_adapter*)priv;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+
+	while (NULL != (precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue)))
+	{
+		if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE))
+		{
+			DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n");
+			
+			break;
+		}
+		
+
+		recvbuf2recvframe(padapter, precvbuf);
+
+		rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+	}	
+	
+}
+
+static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
+{	
+	struct recv_buf	*precvbuf = (struct recv_buf *)purb->context;	
+	_adapter 			*padapter =(_adapter *)precvbuf->adapter;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n"));
+	
+	precvpriv->rx_pending_cnt --;
+		
+	if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved));		
+
+		goto exit;
+	}
+
+	if(purb->status==0)//SUCCESS
+	{
+		if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE))
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n"));
+
+			rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+		}
+		else 
+		{			
+			rtw_reset_continual_urb_error(adapter_to_dvobj(padapter));
+			
+			precvbuf->transfer_len = purb->actual_length;	
+
+			//rtw_enqueue_rx_transfer_buffer(precvpriv, rx_transfer_buf);			
+			rtw_enqueue_recvbuf(precvbuf, &precvpriv->recv_buf_pending_queue);
+
+			tasklet_schedule(&precvpriv->recv_tasklet);			
+		}		
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status));
+	
+		DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
+
+		if(rtw_inc_and_chk_continual_urb_error(adapter_to_dvobj(padapter)) == _TRUE ){
+			padapter->bSurpriseRemoved = _TRUE;
+		}
+
+		switch(purb->status) {
+			case -EINVAL:
+			case -EPIPE:			
+			case -ENODEV:
+			case -ESHUTDOWN:
+				//padapter->bSurpriseRemoved=_TRUE;
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
+			case -ENOENT:
+				padapter->bDriverStopped=_TRUE;			
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
+				break;
+			case -EPROTO:
+			case -EOVERFLOW:
+				#ifdef DBG_CONFIG_ERROR_DETECT	
+				{	
+					HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+					pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL;			
+				}
+				#endif
+				rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);			
+				break;
+			case -EINPROGRESS:
+				DBG_8192C("ERROR: URB IS IN PROGRESS!/n");
+				break;
+			default:
+				break;				
+		}
+		
+	}	
+
+exit:	
+	
+_func_exit_;
+	
+}
+
+static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{		
+	int err;
+	unsigned int pipe;
+	u32 ret = _SUCCESS;
+	PURB purb = NULL;
+	struct recv_buf	*precvbuf = (struct recv_buf *)rmem;
+	_adapter *adapter = pintfhdl->padapter;
+	struct dvobj_priv	*pdvobj = adapter_to_dvobj(adapter);
+	struct recv_priv	*precvpriv = &adapter->recvpriv;
+	struct usb_device	*pusbd = pdvobj->pusbdev;
+
+_func_enter_;
+	
+	if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		return _FAIL;
+	}
+
+	if(precvbuf !=NULL)
+	{	
+		rtl8192cu_init_recvbuf(adapter, precvbuf);
+
+		if(precvbuf->pbuf)
+		{			
+			precvpriv->rx_pending_cnt++;
+		
+			purb = precvbuf->purb;		
+
+			//translate DMA FIFO addr to pipehandle
+			pipe = ffaddr2pipehdl(pdvobj, addr);	
+
+			usb_fill_bulk_urb(purb, pusbd, pipe, 
+						precvbuf->pbuf,
+                				MAX_RECVBUF_SZ,
+                				usb_read_port_complete,
+                				precvbuf);//context is precvbuf
+
+			purb->transfer_dma = precvbuf->dma_transfer_addr;
+			purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;								
+
+			err = usb_submit_urb(purb, GFP_ATOMIC);	
+			if((err) && (err != (-EPERM)))
+			{
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status));
+				DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status);
+				ret = _FAIL;
+			}
+			
+		}
+			
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n"));
+		ret = _FAIL;
+	}
+
+_func_exit_;
+
+	return ret;
+}
+#else	// CONFIG_USE_USB_BUFFER_ALLOC_RX
+static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
+{
+	u8	*pbuf;
+	u8	shift_sz = 0;
+	u16	pkt_cnt;
+	u32	pkt_offset, skb_len, alloc_sz;
+	s32	transfer_len;
+	struct recv_stat	*prxstat;
+	struct phy_stat	*pphy_info = NULL;
+	_pkt				*pkt_copy = NULL;
+	union recv_frame	*precvframe = NULL;
+	struct rx_pkt_attrib	*pattrib = NULL;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	_queue			*pfree_recv_queue = &precvpriv->free_recv_queue;
+
+
+	transfer_len = (s32)pskb->len;	
+	pbuf = pskb->data;
+
+	prxstat = (struct recv_stat *)pbuf;	
+	pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
+
+#if 0 //temp remove when disable usb rx aggregation
+	if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len<RXDESC_SIZE) ||(pkt_len<=0))
+	{		
+		return _FAIL;
+	}
+#endif
+
+	do{		
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
+			 ("recvbuf2recvframe: rxdesc=offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n",
+			  prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4));
+
+		prxstat = (struct recv_stat *)pbuf;
+
+		precvframe = rtw_alloc_recvframe(pfree_recv_queue);
+		if(precvframe==NULL)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n"));
+			DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__);	
+			goto _exit_recvbuf2recvframe;
+		}
+
+		_rtw_init_listhead(&precvframe->u.hdr.list);	
+		precvframe->u.hdr.precvbuf = NULL;	//can't access the precvbuf for new arch.
+		precvframe->u.hdr.len=0;
+
+		rtl8192c_query_rx_desc_status(precvframe, prxstat);
+
+		pattrib = &precvframe->u.hdr.attrib;
+		if(pattrib->physt)
+		{
+			pphy_info = (struct phy_stat *)(pbuf + RXDESC_OFFSET);
+		}
+
+		pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len;
+
+		if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len))
+		{	
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n"));
+			DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__);	
+			rtw_free_recvframe(precvframe, pfree_recv_queue);
+			goto _exit_recvbuf2recvframe;
+		}
+
+		//	Modified by Albert 20101213
+		//	For 8 bytes IP header alignment.
+		if (pattrib->qos)	//	Qos data, wireless lan header length is 26
+		{
+			shift_sz = 6;
+		}
+		else
+		{
+			shift_sz = 0;
+		}
+
+		skb_len = pattrib->pkt_len;
+
+		// for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet.
+		// modify alloc_sz for recvive crc error packet by thomas 2011-06-02
+		if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){
+			//alloc_sz = 1664;	//1664 is 128 alignment.
+			if(skb_len <= 1650)
+				alloc_sz = 1664;
+			else
+				alloc_sz = skb_len + 14;
+		}
+		else {
+			alloc_sz = skb_len;
+			//	6 is for IP header 8 bytes alignment in QoS packet case.
+			//	8 is for skb->data 4 bytes alignment.
+			alloc_sz += 14;
+		}
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+		pkt_copy = dev_alloc_skb(alloc_sz);
+#else			
+		pkt_copy = netdev_alloc_skb(padapter->pnetdev, alloc_sz);
+#endif		
+		if(pkt_copy)
+		{
+			pkt_copy->dev = padapter->pnetdev;
+			precvframe->u.hdr.pkt = pkt_copy;
+			precvframe->u.hdr.rx_head = pkt_copy->data;
+			precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz;
+			skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address
+			skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz.
+			_rtw_memcpy(pkt_copy->data, (pbuf + pattrib->shift_sz + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len);
+			precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data;
+			
+		}
+		else
+		{
+			precvframe->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC);
+			if(pkt_copy)
+			{
+				precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf;
+				precvframe->u.hdr.rx_end = pbuf + alloc_sz;
+			}
+			else
+			{
+				DBG_8192C("recvbuf2recvframe: skb_clone fail\n");
+				rtw_free_recvframe(precvframe, pfree_recv_queue);
+				goto _exit_recvbuf2recvframe;
+			}
+		}
+
+		recvframe_put(precvframe, skb_len);
+		//recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE);	
+
+#ifdef CONFIG_USB_RX_AGGREGATION
+		switch(pHalData->UsbRxAggMode)
+		{
+			case USB_RX_AGG_DMA:
+			case USB_RX_AGG_MIX:
+				pkt_offset = (u16)_RND128(pkt_offset);
+				break;
+				case USB_RX_AGG_USB:
+				pkt_offset = (u16)_RND4(pkt_offset);
+				break;
+			case USB_RX_AGG_DISABLE:			
+			default:				
+				break;
+		}
+#endif
+
+#ifdef CONFIG_CONCURRENT_MODE
+		if(rtw_buddy_adapter_up(padapter))
+		{
+			if(pre_recv_entry(precvframe, prxstat, pphy_info) != _SUCCESS)
+			{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n"));
+			}
+		}
+		else
+		{
+			rtl8192c_translate_rx_signal_stuff(precvframe, pphy_info);
+			if(rtw_recv_entry(precvframe) != _SUCCESS)
+			{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
+			}
+		}
+	
+#else
+		rtl8192c_translate_rx_signal_stuff(precvframe, pphy_info);
+		if(rtw_recv_entry(precvframe) != _SUCCESS)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
+		}
+#endif		
+
+		pkt_cnt--;
+		transfer_len -= pkt_offset;
+		pbuf += pkt_offset;	
+		precvframe = NULL;
+		pkt_copy = NULL;
+
+		if(transfer_len>0 && pkt_cnt==0)
+			pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
+
+	}while((transfer_len>0) && (pkt_cnt>0));
+
+_exit_recvbuf2recvframe:
+
+	return _SUCCESS;	
+}
+
+void rtl8192cu_recv_tasklet(void *priv)
+{
+	_pkt			*pskb;
+	_adapter		*padapter = (_adapter*)priv;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	
+	while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue)))
+	{
+		if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE))
+		{
+			DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n");
+			dev_kfree_skb_any(pskb);
+			break;
+		}
+	
+		recvbuf2recvframe(padapter, pskb);
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+
+		skb_reset_tail_pointer(pskb);
+
+		pskb->len = 0;
+		
+		skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
+		
+#else
+		dev_kfree_skb_any(pskb);
+#endif
+				
+	}
+	
+}
+
+
+static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
+{
+	_irqL irqL;
+	uint isevt, *pbuf;
+	struct recv_buf	*precvbuf = (struct recv_buf *)purb->context;	
+	_adapter 			*padapter =(_adapter *)precvbuf->adapter;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;	
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n"));
+	
+	//_enter_critical(&precvpriv->lock, &irqL);
+	//precvbuf->irp_pending=_FALSE;
+	//precvpriv->rx_pending_cnt --;
+	//_exit_critical(&precvpriv->lock, &irqL);
+		
+	precvpriv->rx_pending_cnt --;
+		
+	//if(precvpriv->rx_pending_cnt== 0)
+	//{		
+	//	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n"));
+	//	_rtw_up_sema(&precvpriv->allrxreturnevt);	
+	//}
+
+	if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved));		
+		
+	#ifdef CONFIG_PREALLOC_RECV_SKB
+		precvbuf->reuse = _TRUE;
+	#else
+		if(precvbuf->pskb){
+			DBG_8192C("==> free skb(%p)\n",precvbuf->pskb);
+			dev_kfree_skb_any(precvbuf->pskb);				
+		}	
+	#endif
+		DBG_8192C("%s()-%d: RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n", 
+		__FUNCTION__, __LINE__,padapter->bDriverStopped, padapter->bSurpriseRemoved,padapter->bReadPortCancel);	
+		goto exit;
+	}
+
+	if(purb->status==0)//SUCCESS
+	{
+		if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE))
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n"));
+			precvbuf->reuse = _TRUE;
+			rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+			DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__);	
+		}
+		else 
+		{	
+			rtw_reset_continual_urb_error(adapter_to_dvobj(padapter));
+			
+			precvbuf->transfer_len = purb->actual_length;			
+			skb_put(precvbuf->pskb, purb->actual_length);	
+			skb_queue_tail(&precvpriv->rx_skb_queue, precvbuf->pskb);
+
+			if (skb_queue_len(&precvpriv->rx_skb_queue)<=1)
+				tasklet_schedule(&precvpriv->recv_tasklet);
+
+			precvbuf->pskb = NULL;
+			precvbuf->reuse = _FALSE;
+			rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);			
+		}		
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status));
+	
+		DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
+
+		if(rtw_inc_and_chk_continual_urb_error(adapter_to_dvobj(padapter)) == _TRUE ){
+			padapter->bSurpriseRemoved = _TRUE;
+		}
+
+		switch(purb->status) {
+			case -EINVAL:
+			case -EPIPE:			
+			case -ENODEV:
+			case -ESHUTDOWN:
+				//padapter->bSurpriseRemoved=_TRUE;
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
+			case -ENOENT:
+				padapter->bDriverStopped=_TRUE;			
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
+				break;
+			case -EPROTO:
+			case -EOVERFLOW:
+				#ifdef DBG_CONFIG_ERROR_DETECT	
+				{	
+					HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+					pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL;			
+				}
+				#endif
+				precvbuf->reuse = _TRUE;
+				rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);			
+				break;
+			case -EINPROGRESS:
+				precvpriv->read_port_complete_EINPROGRESS_cnt++;
+				DBG_8192C("ERROR: URB IS IN PROGRESS!/n");
+				break;
+			default:
+				precvpriv->read_port_complete_other_urb_err_cnt++;
+				break;				
+		}
+		
+	}	
+
+exit:	
+	
+_func_exit_;
+	
+}
+
+static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{	
+	_irqL irqL;
+	int err;
+	unsigned int pipe;
+	SIZE_PTR tmpaddr=0;
+	SIZE_PTR alignment=0;
+	u32 ret = _SUCCESS;
+	PURB purb = NULL;
+	struct recv_buf	*precvbuf = (struct recv_buf *)rmem;
+	_adapter		*adapter = pintfhdl->padapter;
+	struct dvobj_priv	*pdvobj = adapter_to_dvobj(adapter);
+	struct recv_priv	*precvpriv = &adapter->recvpriv;
+	struct usb_device	*pusbd = pdvobj->pusbdev;
+	
+_func_enter_;
+	
+	if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		return _FAIL;
+	}
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+	if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL))
+	{
+		if (NULL != (precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue)))
+		{
+			precvbuf->reuse = _TRUE;
+		}
+	}
+#endif
+	
+
+	if(precvbuf !=NULL)
+	{	
+		rtl8192cu_init_recvbuf(adapter, precvbuf);		
+
+		//re-assign for linux based on skb
+		if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL))
+		{
+			//precvbuf->pskb = alloc_skb(MAX_RECVBUF_SZ, GFP_ATOMIC);//don't use this after v2.6.25
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+			precvbuf->pskb = dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+#else			
+			precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+#endif			
+			if(precvbuf->pskb == NULL)		
+			{
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("init_recvbuf(): alloc_skb fail!\n"));
+				precvpriv->recvbuf_skb_alloc_fail_cnt++;
+				return _FAIL;
+			}	
+
+			tmpaddr = (SIZE_PTR)precvbuf->pskb->data;
+	        	alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
+			skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment));
+
+			precvbuf->phead = precvbuf->pskb->head;
+		   	precvbuf->pdata = precvbuf->pskb->data;
+			precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
+			precvbuf->pend = skb_end_pointer(precvbuf->pskb);
+			precvbuf->pbuf = precvbuf->pskb->data;
+		}	
+		else//reuse skb
+		{
+			precvbuf->phead = precvbuf->pskb->head;
+			precvbuf->pdata = precvbuf->pskb->data;
+			precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
+			precvbuf->pend = skb_end_pointer(precvbuf->pskb);
+       		precvbuf->pbuf = precvbuf->pskb->data;
+
+			precvbuf->reuse = _FALSE;
+		}
+
+		//_enter_critical(&precvpriv->lock, &irqL);
+		//precvpriv->rx_pending_cnt++;
+		//precvbuf->irp_pending = _TRUE;
+		//_exit_critical(&precvpriv->lock, &irqL);
+
+		precvpriv->rx_pending_cnt++;
+
+		purb = precvbuf->purb;
+
+		//translate DMA FIFO addr to pipehandle
+		pipe = ffaddr2pipehdl(pdvobj, addr);
+
+		usb_fill_bulk_urb(purb, pusbd, pipe, 
+						precvbuf->pbuf,
+                				MAX_RECVBUF_SZ,
+                				usb_read_port_complete,
+                				precvbuf);//context is precvbuf
+
+		err = usb_submit_urb(purb, GFP_ATOMIC);
+		if((err) && (err != (-EPERM)))
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status));
+			DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status);
+			ret = _FAIL;
+		}
+	}
+	else
+	{
+		precvpriv->recvbuf_null_cnt++;
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n"));
+		ret = _FAIL;
+	}
+
+_func_exit_;
+
+	return ret;
+}
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_RX
+
+void rtl8192cu_xmit_tasklet(void *priv)
+{	
+	int ret = _FALSE;
+	_adapter *padapter = (_adapter*)priv;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+
+	if(check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE)
+		return;
+
+	while(1)
+	{
+		if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE) || (padapter->bWritePortCancel == _TRUE))
+		{
+			DBG_8192C("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n");
+			break;
+		}
+
+		ret = rtl8192cu_xmitframe_complete(padapter, pxmitpriv, NULL);
+
+		if(ret==_FALSE)
+			break;
+		
+	}
+	
+}
+
+void rtl8192cu_set_intf_ops(struct _io_ops	*pops)
+{
+	_func_enter_;
+	
+	_rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops));	
+
+	pops->_read8 = &usb_read8;
+	pops->_read16 = &usb_read16;
+	pops->_read32 = &usb_read32;
+	pops->_read_mem = &usb_read_mem;
+	pops->_read_port = &usb_read_port;	
+	
+	pops->_write8 = &usb_write8;
+	pops->_write16 = &usb_write16;
+	pops->_write32 = &usb_write32;
+	pops->_writeN = &usb_writeN;
+	
+#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ	
+	pops->_write8_async= &usb_async_write8;
+	pops->_write16_async = &usb_async_write16;
+	pops->_write32_async = &usb_async_write32;
+#endif	
+	pops->_write_mem = &usb_write_mem;
+	pops->_write_port = &usb_write_port;
+
+	pops->_read_port_cancel = &usb_read_port_cancel;
+	pops->_write_port_cancel = &usb_write_port_cancel;
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+	pops->_read_interrupt = &usb_read_interrupt;
+#endif
+
+	_func_exit_;
+
+}
+
diff --git a/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/usb_ops_xp.c b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/usb_ops_xp.c
new file mode 100755
index 00000000..32ff645a
--- /dev/null
+++ b/drivers/net/wireless/rtl8188C_8192C/hal/rtl8192c/usb/usb_ops_xp.c
@@ -0,0 +1,1265 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _HCI_OPS_OS_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+#include <circ_buf.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+	#error "Shall be Linux or Windows, but not both!\n"
+#endif
+
+#ifndef CONFIG_USB_HCI
+	#error "CONFIG_USB_HCI shall be on!\n"
+#endif
+
+
+#include <usb.h>
+#include <usbdlib.h>
+#include <usbioctl.h>
+
+#include <usb_ops.h>
+#include <recv_osdep.h>
+
+#include <usb_osintf.h>
+
+
+struct zero_bulkout_context
+{
+	void *pbuf;
+	void *purb;
+	void *pirp;
+	void *padapter;
+};
+
+#define usb_write_cmd usb_write_mem 
+#define usb_read_cmd usb_read_mem
+#define usb_write_cmd_complete usb_write_mem_complete
+//#define usb_read_cmd_complete usb_read_mem_complete
+
+
+
+uint usb_init_intf_priv(struct intf_priv *pintfpriv)
+{
+	        
+	PURB	piorw_urb;
+	u8		NextDeviceStackSize;
+	struct dvobj_priv   *pdev = (struct dvobj_priv   *)pintfpriv->intf_dev;
+	_adapter * padapter=pdev->padapter;
+
+_func_enter_;
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("\n +usb_init_intf_priv\n"));
+
+	pintfpriv->intf_status = _IOREADY;
+
+       if(pdev->ishighspeed) pintfpriv->max_iosz =  128;
+	else pintfpriv->max_iosz =  64;	
+
+
+	_init_timer(&pintfpriv->io_timer, padapter->hndis_adapter, io_irp_timeout_handler, pintfpriv);
+
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("usb_init_intf_priv:pintfpriv->max_iosz:%d\n",pintfpriv->max_iosz));
+
+	pintfpriv->io_wsz = 0;
+	pintfpriv->io_rsz = 0;	
+	
+ 	pintfpriv->allocated_io_rwmem = rtw_zmalloc(pintfpriv->max_iosz +4); 
+	
+   	if (pintfpriv->allocated_io_rwmem == NULL){
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_init_intf_priv:pintfpriv->allocated_io_rwmem == NULL\n"));
+    		goto usb_init_intf_priv_fail;
+   	}
+
+	pintfpriv->io_rwmem = pintfpriv->allocated_io_rwmem +  4 \
+					-( (u32)(pintfpriv->allocated_io_rwmem) & 3);
+	
+
+     
+     NextDeviceStackSize = (u8)pdev->nextdevstacksz;//pintfpriv->pUsbDevObj->StackSize + 1; 
+
+      piorw_urb = (PURB)ExAllocatePool(NonPagedPool, sizeof(URB) ); 
+      if(piorw_urb == NULL) 
+	  goto usb_init_intf_priv_fail;
+	  
+      pintfpriv->piorw_urb = piorw_urb;
+
+      pintfpriv->piorw_irp = IoAllocateIrp(NextDeviceStackSize , FALSE);	 
+    
+
+      pintfpriv->io_irp_cnt=1;
+      pintfpriv->bio_irp_pending=_FALSE;
+	 
+     _rtw_init_sema(&(pintfpriv->io_retevt), 0);//NdisInitializeEvent(&pintfpriv->io_irp_return_evt);
+
+_func_exit_;
+	return _SUCCESS;
+
+usb_init_intf_priv_fail:
+
+	if (pintfpriv->allocated_io_rwmem)
+		rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz +4);
+	
+	if(piorw_urb)
+		ExFreePool(piorw_urb);	
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("\n -usb_init_intf_priv(usb_init_intf_priv_fail)\n"));
+
+_func_exit_;	
+	return _FAIL;
+		
+}
+
+void usb_unload_intf_priv(struct intf_priv *pintfpriv)
+{
+
+_func_enter_;
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n+usb_unload_intf_priv\n"));
+	
+	rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz+4);
+	
+#ifdef PLATFORM_WINDOWS
+	if(pintfpriv->piorw_urb)
+		ExFreePool(pintfpriv->piorw_urb);	
+
+	if(pintfpriv->piorw_irp)
+		IoFreeIrp(pintfpriv->piorw_irp);
+#endif		
+
+
+#ifdef PLATFORM_LINUX
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\npintfpriv->io_irp_cnt=%d\n",pintfpriv->io_irp_cnt));
+	pintfpriv->io_irp_cnt--;
+	if(pintfpriv->io_irp_cnt){
+		if(pintfpriv->bio_irp_pending==_TRUE){
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\nkill iorw_urb\n"));
+		usb_kill_urb(pintfpriv->piorw_urb);
+		}
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n wait io_retevt\n"));
+		_rtw_down_sema(&(pintfpriv->io_retevt));
+	}
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n cancel io_urb ok\n"));
+#endif
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n-usb_unload_intf_priv\n"));
+
+_func_exit_;
+	
+}
+
+void *ffaddr2pipehdl(struct dvobj_priv *pNdisCEDvice, u32 addr)
+{
+	HANDLE PipeHandle = NULL;
+	_adapter	*padapter = pNdisCEDvice->padapter;
+
+	
+	if(pNdisCEDvice->nr_endpoint == 11)
+	{		
+		switch(addr)
+		{	    
+	     		case RTL8712_DMA_BEQ:
+		 		PipeHandle= padapter->halpriv.pipehdls_r8712[3] ; 
+				break;
+	     		case RTL8712_DMA_BKQ:
+			 	PipeHandle=  padapter->halpriv.pipehdls_r8712[4]; 
+				break;
+	     		case RTL8712_DMA_VIQ:
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[2]; 
+				break;
+	    		case RTL8712_DMA_VOQ:
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[1]; 
+				break;					
+                     case RTL8712_DMA_BCNQ:	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[6]; 
+				break;	 	
+			case RTL8712_DMA_BMCQ:	//HI Queue
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[7]; 
+				break;	
+			case RTL8712_DMA_MGTQ:				
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[8]; 
+				break;
+                     case RTL8712_DMA_RX0FF:
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[0]; 
+				break;	 	
+			case RTL8712_DMA_C2HCMD:		 	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[5]; 
+				break;
+			case RTL8712_DMA_H2CCMD:
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[9]; 
+				break;	
+				
+		}
+
+	}
+	else if(pNdisCEDvice->nr_endpoint == 6)
+	{
+		switch(addr)
+		{	    
+	     		case RTL8712_DMA_BEQ:
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[3]; 
+				break;
+	     		case RTL8712_DMA_BKQ:
+			 	PipeHandle=  padapter->halpriv.pipehdls_r8712[4]; 
+				break;
+	     		case RTL8712_DMA_VIQ:
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[2]; 
+				break;
+	    		case RTL8712_DMA_VOQ:                   		
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[1]; 
+				break;
+                     case RTL8712_DMA_RX0FF:
+			case RTL8712_DMA_C2HCMD:		 	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[0]; 
+				break;
+			case RTL8712_DMA_H2CCMD:
+			case RTL8712_DMA_BCNQ:					
+			case RTL8712_DMA_BMCQ:	
+			case RTL8712_DMA_MGTQ:			
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[5]; 
+				break;	
+				
+		}
+
+	}
+	else if(pNdisCEDvice->nr_endpoint == 4)
+	{
+		switch(addr)
+		{		
+	     		case RTL8712_DMA_BEQ:
+		 	//case RTL8712_DMA_BKQ:
+			 	PipeHandle=  padapter->halpriv.pipehdls_r8712[2]; 
+				break;
+	     		//case RTL8712_DMA_VIQ:
+		 	case RTL8712_DMA_VOQ:					
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[1]; 
+				break;
+			case RTL8712_DMA_RX0FF:
+			case RTL8712_DMA_C2HCMD:		 	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[0]; 
+				break;
+			case RTL8712_DMA_H2CCMD:	
+			case RTL8712_DMA_BCNQ:					
+			case RTL8712_DMA_BMCQ:	
+			case RTL8712_DMA_MGTQ:				
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[3]; 
+				break;	
+		}
+	
+	}
+	else
+	{
+	   RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ffaddr2pipehdl():nr_endpoint=%d error!\n", pNdisCEDvice->nr_endpoint));	   
+	}
+		
+	return PipeHandle;
+
+}
+
+
+NTSTATUS usb_bulkout_zero_complete(
+	PDEVICE_OBJECT	pUsbDevObj, 
+	PIRP		pIrp, void*	pZeroContext)
+{	
+	struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)pZeroContext;
+			   
+_func_enter_;
+
+	if(pcontext)
+	{
+		if(pcontext->pbuf)
+		{
+			ExFreePool(pcontext->pbuf);	  
+		}	
+
+		if(pcontext->purb)
+		{
+			ExFreePool(pcontext->purb);	
+		}
+
+		if(pcontext->pirp && (pIrp ==pcontext->pirp))
+		{			
+			IoFreeIrp(pIrp);
+		}
+
+		ExFreePool(pcontext);	
+	}	
+
+_func_exit_;
+
+	return STATUS_MORE_PROCESSING_REQUIRED;
+	
+
+}
+
+u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr)
+{	
+	struct zero_bulkout_context *pcontext;
+	unsigned char *pbuf;
+	char NextDeviceStackSize, len;
+	PIO_STACK_LOCATION	nextStack;
+	USBD_STATUS		usbdstatus;
+	HANDLE				PipeHandle;	
+	PIRP					pirp = NULL;
+	PURB				purb = NULL;	
+	NDIS_STATUS			ndisStatus = NDIS_STATUS_SUCCESS;
+	_adapter *padapter = (_adapter *)pintfhdl->adapter;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;	
+
+
+_func_enter_;
+
+	if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{		
+		return _FAIL;
+	}
+
+	len = 0;
+	NextDeviceStackSize = (char)pdvobj->nextdevstacksz;
+
+	pcontext = (struct zero_bulkout_context *)ExAllocatePool(NonPagedPool, sizeof(struct zero_bulkout_context));
+	pbuf = (unsigned char *)ExAllocatePool(NonPagedPool, sizeof(int));	
+    	purb = (PURB)ExAllocatePool(NonPagedPool, sizeof(URB));
+      	pirp = IoAllocateIrp(NextDeviceStackSize, FALSE);
+
+	pcontext->pbuf = pbuf;
+	pcontext->purb = purb;
+	pcontext->pirp = pirp;
+	pcontext->padapter = padapter;
+                    
+	//translate DMA FIFO addr to pipehandle
+	PipeHandle = ffaddr2pipehdl(pdvobj, addr);	
+
+
+	// Build our URB for USBD
+	UsbBuildInterruptOrBulkTransferRequest(
+				purb,
+				sizeof(struct _URB_BULK_OR_INTERRUPT_TRANSFER),
+				PipeHandle,
+				pbuf, 
+				NULL, 
+				len, 
+				0, 
+				NULL);
+	
+	//
+	// call the calss driver to perform the operation
+	// pass the URB to the USB driver stack
+	//
+	nextStack = IoGetNextIrpStackLocation(pirp);
+	nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL;
+	nextStack->Parameters.Others.Argument1 = purb;
+	nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB;
+
+	//Set Completion Routine
+	IoSetCompletionRoutine(pirp,					// irp to use
+				               usb_bulkout_zero_complete,	// callback routine
+				               pcontext,				// context 
+				               TRUE,					// call on success
+				               TRUE,					// call on error
+				               TRUE);					// call on cancel
+
+	
+	// Call IoCallDriver to send the irp to the usb bus driver
+	//
+	ndisStatus = IoCallDriver(pdvobj->pnextdevobj, pirp);
+	usbdstatus = URB_STATUS(purb);
+
+	if( USBD_HALTED(usbdstatus) )
+	{		
+		padapter->bDriverStopped=_TRUE;
+		padapter->bSurpriseRemoved=_TRUE;
+	}
+
+	//
+	// The usb bus driver should always return STATUS_PENDING when bulk out irp async
+	//
+	if ( ndisStatus != STATUS_PENDING )
+	{		
+		return _FAIL;
+	} 	
+	
+_func_exit_;
+	
+	return _SUCCESS;
+
+}
+
+void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{
+	_func_enter_;
+	
+
+	
+	_func_exit_;
+}
+
+NTSTATUS usb_write_mem_complete(PDEVICE_OBJECT	pUsbDevObj, PIRP piowrite_irp, PVOID pusb_cnxt)
+{
+		
+	_irqL irqL;
+	_list	*head, *plist;
+	struct io_req	*pio_req;	
+	struct io_queue *pio_q = (struct io_queue *) pusb_cnxt;
+	struct intf_hdl *pintf = &(pio_q->intf);	
+	struct intf_priv *pintfpriv = pintf->pintfpriv;	
+	_adapter *padapter = (_adapter *)pintf->adapter;
+	NTSTATUS status = STATUS_SUCCESS;
+
+	head = &(pio_q->processing);
+	
+	_func_enter_;
+	
+	_enter_critical_bh(&(pio_q->lock), &irqL);
+	
+	pintfpriv->io_irp_cnt--;
+	if(pintfpriv->io_irp_cnt ==0){		
+		_rtw_up_sema(&(pintfpriv->io_retevt));
+	}	
+	
+	pintfpriv->bio_irp_pending=_FALSE;
+	
+	switch(piowrite_irp->IoStatus.Status)
+	{		
+		case STATUS_SUCCESS:
+			break;
+			
+		default:
+			padapter->bSurpriseRemoved=_TRUE;
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usbAsynIntOutComplete:pioread_irp->IoStatus.Status !=STATUS_SUCCESS\n"));
+			break;
+	}				
+
+	//free irp in processing list...	
+	while(rtw_is_list_empty(head) != _TRUE)
+	{
+		plist = get_next(head);	
+		rtw_list_delete(plist);
+		pio_req = LIST_CONTAINOR(plist, struct io_req, list);
+		_rtw_up_sema(&pio_req->sema);
+	}	
+						
+	_exit_critical_bh(&(pio_q->lock), &irqL);
+
+	_func_exit_;
+	
+	return STATUS_MORE_PROCESSING_REQUIRED;
+
+}
+
+void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{
+	u32 bwritezero;
+	_irqL	irqL;
+	USBD_STATUS			usbdstatus;		
+	PIO_STACK_LOCATION		nextStack;
+	HANDLE				PipeHandle;	
+	struct io_req *pio_req;
+	
+	_adapter *adapter = (_adapter *)pintfhdl->adapter;
+	struct intf_priv *pintfpriv = pintfhdl->pintfpriv;
+	struct dvobj_priv   *pdev = (struct dvobj_priv   *)pintfpriv->intf_dev;      
+	PURB	piorw_urb = pintfpriv->piorw_urb;
+	PIRP		piorw_irp  = pintfpriv->piorw_irp; 	
+	struct io_queue	*pio_queue = (struct io_queue *)adapter->pio_queue;	
+	NTSTATUS NtStatus = STATUS_SUCCESS;	
+	
+	_func_enter_;	
+
+	pio_req = alloc_ioreq(pio_queue);
+	
+	if ((pio_req == NULL)||(adapter->bSurpriseRemoved)){
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("async_irp_write32 : pio_req =0x%x adapter->bSurpriseRemoved=0x%x",pio_req,adapter->bSurpriseRemoved ));
+		goto exit;
+	}	
+	
+	_enter_critical_bh(&(pio_queue->lock), &irqL);
+	
+	rtw_list_insert_tail(&(pio_req->list),&(pio_queue->processing));
+
+
+#ifdef NDIS51_MINIPORT
+	IoReuseIrp(piorw_irp, STATUS_SUCCESS);
+#else
+	piorw_irp->Cancel = _FALSE;
+#endif
+
+	if((adapter->bDriverStopped) || (adapter->bSurpriseRemoved) ||(adapter->pwrctrlpriv.pnp_bstop_trx))	
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\npadapter->pwrctrlpriv.pnp_bstop_trx==_TRUE\n"));
+		_func_exit_;
+		return;
+	}
+
+	//translate DMA FIFO addr to pipehandle
+	PipeHandle = ffaddr2pipehdl(pdev, addr);	
+
+	
+	pintfpriv->io_irp_cnt++;
+	pintfpriv->bio_irp_pending=_TRUE;	
+	// Build our URB for USBD
+	UsbBuildInterruptOrBulkTransferRequest(
+				piorw_urb,
+				sizeof(struct _URB_BULK_OR_INTERRUPT_TRANSFER),
+				PipeHandle,
+				(PVOID)wmem,
+				NULL, 
+				cnt, 
+				0, 
+				NULL);  
+
+	//
+	// call the calss driver to perform the operation
+	// pass the URB to the USB driver stack
+	//
+	nextStack = IoGetNextIrpStackLocation(piorw_irp);
+	nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL;
+	nextStack->Parameters.Others.Argument1 = (PURB)piorw_urb;
+	nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB;
+
+	IoSetCompletionRoutine(
+				piorw_irp,				// irp to use				
+				usb_write_mem_complete,		// routine to call when irp is done
+				pio_queue,				// context to pass routine
+				TRUE,					// call on success
+				TRUE,					// call on error
+				TRUE);					// call on cancel
+	
+	// 
+	// Call IoCallDriver to send the irp to the usb port
+	//
+	NtStatus	= IoCallDriver(pdev->pnextdevobj, piorw_irp);
+	usbdstatus = URB_STATUS(piorw_urb);
+
+	//
+	// The USB driver should always return STATUS_PENDING when
+	// it receives a write irp
+	//
+	if ((NtStatus != STATUS_PENDING) || USBD_HALTED(usbdstatus) ) {
+
+		if( USBD_HALTED(usbdstatus) ) {
+
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_mem():USBD_HALTED(usbdstatus)=%X!\n",USBD_HALTED(usbdstatus)) );
+		}
+		_func_exit_;
+		return;//STATUS_UNSUCCESSFUL;
+	}
+
+	_exit_critical_bh(&(pio_queue->lock), &irqL);
+	
+	_rtw_down_sema(&pio_req->sema);	
+	free_ioreq(pio_req, pio_queue);
+	
+
+	bwritezero = _FALSE;
+       if (pdev->ishighspeed)
+	{
+		if(cnt> 0 && cnt%512 == 0)
+			bwritezero = _TRUE;
+			
+	}
+	else
+	{
+		if(cnt > 0 && cnt%64 == 0)
+			bwritezero = _TRUE;		
+	}
+
+	
+	if(bwritezero == _TRUE)
+	{
+		usb_bulkout_zero(pintfhdl, addr);
+	}
+	
+exit:
+	
+	_func_exit_;
+	
+}
+
+NTSTATUS usb_read_port_complete(PDEVICE_OBJECT pUsbDevObj, PIRP pIrp, PVOID context)
+{	
+	uint isevt, *pbuf;
+	struct _URB_BULK_OR_INTERRUPT_TRANSFER	*pbulkurb;
+	USBD_STATUS		usbdstatus;	
+	struct recv_buf		*precvbuf = (struct recv_buf *)context;	
+	_adapter 				*adapter =(_adapter *)precvbuf->adapter;
+	struct recv_priv		*precvpriv = &adapter->recvpriv;
+	struct dvobj_priv   	*dev = (struct dvobj_priv   *)&adapter->dvobjpriv;
+	PURB				purb = precvbuf->purb;
+	struct intf_hdl 		*pintfhdl = &adapter->pio_queue->intf;
+	
+	//RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n"));
+
+	usbdstatus = URB_STATUS(purb);
+	
+	_rtw_spinlock_ex(&precvpriv->lock);
+	precvbuf->irp_pending=_FALSE;
+	precvpriv->rx_pending_cnt --;
+	_rtw_spinunlock_ex(&precvpriv->lock);	
+	
+	if(precvpriv->rx_pending_cnt== 0) {		
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n"));
+		_rtw_up_sema(&precvpriv->allrxreturnevt);	
+	}
+
+
+	if( pIrp->Cancel == _TRUE ) {
+		
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: One IRP has been cancelled succesfully\n"));
+		return STATUS_MORE_PROCESSING_REQUIRED;
+	}
+	if(adapter->bSurpriseRemoved) {
+
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved));
+		return STATUS_MORE_PROCESSING_REQUIRED;
+	}
+
+	switch(pIrp->IoStatus.Status) 
+	{
+		case STATUS_SUCCESS:
+			
+			pbulkurb = &(precvbuf->purb)->UrbBulkOrInterruptTransfer;
+			if((pbulkurb->TransferBufferLength >(MAX_RECVBUF_SZ)) || (pbulkurb->TransferBufferLength < RXDESC_SIZE) ) 
+			{								
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port_complete: (pbulkurb->TransferBufferLength > MAX_RECVBUF_SZ) || (pbulkurb->TransferBufferLength < RXDESC_SIZE)\n"));
+				rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+			}
+			else 
+			{	
+			       precvbuf->transfer_len = pbulkurb->TransferBufferLength;
+
+				pbuf = (uint*)precvbuf->pbuf;
+
+				if((isevt = *(pbuf+1)&0x1ff) == 0x1ff)
+				{								
+					rxcmd_event_hdl(adapter, pbuf);//rx c2h events
+					
+					rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+				}
+				else
+				{
+					if(recvbuf2recvframe(adapter, precvbuf)==_FAIL)//rx packets
+					{
+						//precvbuf->reuse = _TRUE;		
+						rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+					}
+				}
+				
+			}
+	
+			break;
+			
+		default:
+			
+			if( !USBD_HALTED(usbdstatus) )
+			{				
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port_complete():USBD_HALTED(usbdstatus)=%x  (need to handle ) \n",USBD_HALTED(usbdstatus)));				
+			
+			}
+			else 
+			{				
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port_complete(): USBD_HALTED(usbdstatus)=%x \n\n", USBD_HALTED(usbdstatus)) );
+				adapter->bDriverStopped = _TRUE;
+				adapter->bSurpriseRemoved = _TRUE;
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete(): USBD_HALTED(usbdstatus)=%x \n\n", USBD_HALTED(usbdstatus))) ;
+			}
+
+		      break;
+			  
+	}
+
+	return STATUS_MORE_PROCESSING_REQUIRED;
+	
+}
+
+u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{
+	u8 					*pdata;
+	u16					size;
+	PURB				purb;
+	PIRP					pirp;
+	PIO_STACK_LOCATION	nextStack;
+	NTSTATUS			ntstatus;
+	USBD_STATUS		usbdstatus;
+	HANDLE				PipeHandle;	
+	struct recv_buf		*precvbuf = (struct recv_buf *)rmem;
+	struct intf_priv		*pintfpriv = pintfhdl->pintfpriv;
+	struct dvobj_priv		*pdev = (struct dvobj_priv   *)pintfpriv->intf_dev;
+	_adapter				*adapter = (_adapter *)pdev->padapter;
+	struct recv_priv		*precvpriv = &adapter->recvpriv;
+	u32					bResult = _FALSE;
+
+_func_enter_;
+	
+	if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx) {
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		return bResult;
+	}
+
+	if(precvbuf !=NULL)
+	{
+
+		rtl8192cu_init_recvbuf(adapter, precvbuf);
+	
+		_rtw_spinlock(&precvpriv->lock);
+		precvpriv->rx_pending_cnt++;
+		precvbuf->irp_pending = _TRUE;
+		_rtw_spinunlock(&precvpriv->lock);
+
+	       pdata = (u8*)precvbuf->pbuf;
+
+		size	 = sizeof( struct _URB_BULK_OR_INTERRUPT_TRANSFER );
+		purb = precvbuf->purb;	
+
+		//translate DMA FIFO addr to pipehandle
+		PipeHandle = ffaddr2pipehdl(pdev, addr);	
+		 
+		UsbBuildInterruptOrBulkTransferRequest(
+			purb,
+			(USHORT)size,
+			PipeHandle,
+			pdata,
+			NULL, 
+			MAX_RECVBUF_SZ,
+			USBD_TRANSFER_DIRECTION_IN | USBD_SHORT_TRANSFER_OK, 
+			NULL
+			);
+
+		pirp = precvbuf->pirp;
+
+#if NDIS51_MINIPORT
+		IoReuseIrp(pirp, STATUS_SUCCESS);
+#else
+		pirp->Cancel = _FALSE;
+#endif
+
+		// call the class driver to perform the operation
+		// and pass the URB to the USB driver stack
+		nextStack = IoGetNextIrpStackLocation(pirp);
+		nextStack->Parameters.Others.Argument1 = purb;
+		nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB;
+		nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL;
+
+		IoSetCompletionRoutine(
+			pirp,					// irp to use
+			usb_read_port_complete,	// routine to call when irp is done
+			precvbuf,					// context to pass routine 
+			TRUE,					// call on success
+			TRUE,					// call on error
+			TRUE);					// call on cancel
+
+		//
+		// The IoCallDriver routine  
+		// sends an IRP to the driver associated with a specified device object.
+		//
+		ntstatus = IoCallDriver(pdev->pnextdevobj, pirp);
+		usbdstatus = URB_STATUS(purb);
+
+		if( USBD_HALTED(usbdstatus) ) {
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port(): USBD_HALTED(usbdstatus=0x%.8x)=%.8x  \n\n", usbdstatus, USBD_HALTED(usbdstatus)));
+			pdev->padapter->bDriverStopped=_TRUE;
+			pdev->padapter->bSurpriseRemoved=_TRUE;
+		}
+
+		if( ntstatus == STATUS_PENDING )
+		{ 
+			bResult = _TRUE;// The IRP is pended in USBD as we expected.
+		}
+		else {
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port(): IoCallDriver failed!!! IRP STATUS: %X\n", ntstatus));
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port(): IoCallDriver failed!!! USB STATUS: %X\n", usbdstatus));
+		}
+
+	}
+	else{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precv_frame ==NULL\n"));
+	}
+
+_func_exit_;
+	
+	return bResult;
+	
+}
+
+void usb_read_port_cancel(_adapter *padapter)
+{	
+	struct recv_buf  *precvbuf;
+	sint i;
+	struct dvobj_priv   *pdev = &padapter->dvobjpriv;
+	struct recv_priv *precvpriv=&padapter->recvpriv;	
+		
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n ==>usb_read_port_cancel\n"));
+
+	_rtw_spinlock(&precvpriv->lock);
+	precvpriv->rx_pending_cnt--; //decrease 1 for Initialize ++ 
+	_rtw_spinunlock(&precvpriv->lock);
+
+	if (precvpriv->rx_pending_cnt)
+	{
+		// Canceling Pending Recv Irp
+		precvbuf = (struct recv_buf  *)precvpriv->precv_buf;
+		
+		for( i = 0; i < NR_RECVBUFF; i++ )
+		{
+			if (precvbuf->irp_pending == _TRUE)
+			{	
+				IoCancelIrp(precvbuf->pirp);
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_cancel() :IoCancelIrp\n"));
+			}
+			
+			precvbuf++;
+		}
+		
+		_rtw_down_sema(&precvpriv->allrxreturnevt);
+		
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_cancel:down sema\n"));
+
+	}
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("<==usb_read_port_cancel\n"));
+	
+}
+
+NTSTATUS usb_write_port_complete(
+	PDEVICE_OBJECT	pUsbDevObj,
+	PIRP				pIrp,
+	PVOID			pTxContext
+) 
+{	
+	u32	i, bIrpSuccess, sz;
+	NTSTATUS	status = STATUS_SUCCESS;
+	u8 *ptr;
+	struct xmit_frame	*pxmitframe = (struct xmit_frame *) pTxContext;
+        struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
+	_adapter			*padapter = pxmitframe->padapter;
+	struct dvobj_priv	*pdev =	(struct dvobj_priv *)&padapter->dvobjpriv;	
+	struct io_queue	*pio_queue = (struct io_queue *)padapter->pio_queue;
+	struct intf_hdl	*pintfhdl = &(pio_queue->intf);
+       struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;		
+	   
+_func_enter_;
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("+usb_write_port_complete\n"));
+
+	_rtw_spinlock_ex(&pxmitpriv->lock);	
+	pxmitpriv->txirp_cnt--;
+	_rtw_spinunlock_ex(&pxmitpriv->lock);
+	
+	if(pxmitpriv->txirp_cnt==0){
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n"));		
+		_rtw_up_sema(&(pxmitpriv->tx_retevt));
+	}
+	
+	status = pIrp->IoStatus.Status;
+
+	if( status == STATUS_SUCCESS ) 
+		bIrpSuccess = _TRUE;	
+	else	
+		bIrpSuccess = _FALSE;
+	
+	if( pIrp->Cancel == _TRUE )
+	{		
+	    if(pxmitframe !=NULL)
+	    {	       
+	    		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port_complete:pIrp->Cancel == _TRUE,(pxmitframe !=NULL\n"));
+			rtw_free_xmitframe(pxmitpriv, pxmitframe);			
+	    }
+		  	 
+	     return STATUS_MORE_PROCESSING_REQUIRED;
+	}
+
+	if(padapter->bSurpriseRemoved)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved));
+		return STATUS_MORE_PROCESSING_REQUIRED;
+	}
+
+
+	//
+	// Send 0-byte here if necessary.
+	//
+	// <Note> 
+	// 1. We MUST keep at most one IRP pending in each endpoint, otherwise USB host controler driver will hang.
+	// Besides, even 0-byte IRP shall be count into #IRP sent down, so, we send 0-byte here instead of TxFillDescriptor8187().
+	// 2. If we don't count 0-byte IRP into an #IRP sent down, Tx will stuck when we download files via BT and 
+	// play online video on XP SP1 EHCU.
+	// 2005.12.26, by rcnjko.
+	//
+
+	
+	for(i=0; i< 8; i++)
+	{
+            if(pIrp == pxmitframe->pxmit_irp[i])
+            {
+		    pxmitframe->bpending[i] = _FALSE;//
+		    //ac_tag = pxmitframe->ac_tag[i];
+                  sz = pxmitframe->sz[i];
+		    break;		  
+            }
+	}
+
+#if 0	
+	pxmitframe->fragcnt--;
+	if(pxmitframe->fragcnt == 0)// if((pxmitframe->fragcnt == 0) && (pxmitframe->irpcnt == 8)){
+	{
+		//RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port_complete:pxmitframe->fragcnt == 0\n"));
+		rtw_free_xmitframe(pxmitpriv,pxmitframe);	          
+      	}
+#else	
+
+	//not to consider tx fragment
+	rtw_free_xmitframe(pxmitpriv, pxmitframe);		
+
+#endif	
+
+	rtl8192cu_xmitframe_complete(padapter, pxmitpriv, pxmitbuf);
+
+_func_exit_;
+
+	return STATUS_MORE_PROCESSING_REQUIRED;
+
+}
+
+u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{
+       u32 i, bwritezero;      	
+	u8 *ptr;
+	PIO_STACK_LOCATION	nextStack;
+	USBD_STATUS		usbdstatus;
+	HANDLE				PipeHandle;	
+	PIRP					pirp = NULL;
+	PURB				purb = NULL;	
+	NDIS_STATUS			ndisStatus = NDIS_STATUS_SUCCESS;
+	_adapter *padapter = (_adapter *)pintfhdl->adapter;
+	struct dvobj_priv	*pNdisCEDvice = (struct dvobj_priv   *)&padapter->dvobjpriv;	
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+	struct xmit_frame *pxmitframe = (struct xmit_frame *)wmem;
+
+_func_enter_;
+
+	if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		return _FAIL;
+	}
+	
+
+	for(i=0; i<8; i++)
+       {
+		if(pxmitframe->bpending[i] == _FALSE)
+		{
+			_rtw_spinlock(&pxmitpriv->lock);	
+			pxmitpriv->txirp_cnt++;
+			pxmitframe->bpending[i]  = _TRUE;
+			_rtw_spinunlock(&pxmitpriv->lock);
+			
+			pxmitframe->sz[i] = cnt;
+			purb	= pxmitframe->pxmit_urb[i];
+			pirp	= pxmitframe->pxmit_irp[i];
+			
+			//pxmitframe->ac_tag[i] = ac_tag;
+			
+			break;	 
+		}
+       }	
+
+	bwritezero = _FALSE;
+       if (pNdisCEDvice->ishighspeed)
+	{
+		if(cnt> 0 && cnt%512 == 0)
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ishighspeed, cnt=%d\n", cnt));
+			//cnt=cnt+1;
+			bwritezero = _TRUE;
+		}	
+	}
+	else
+	{
+		if(cnt > 0 && cnt%64 == 0)
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cnt=%d\n", cnt));
+			//cnt=cnt+1;
+			bwritezero = _TRUE;
+		}	
+	}
+	
+
+#ifdef NDIS51_MINIPORT
+	IoReuseIrp(pirp, STATUS_SUCCESS);
+#else
+	pirp->Cancel = _FALSE;
+#endif
+
+
+	//translate DMA FIFO addr to pipehandle
+	PipeHandle = ffaddr2pipehdl(pNdisCEDvice, addr);	
+
+
+	// Build our URB for USBD
+	UsbBuildInterruptOrBulkTransferRequest(
+				purb,
+				sizeof(struct _URB_BULK_OR_INTERRUPT_TRANSFER),
+				PipeHandle,
+				pxmitframe->mem_addr, 
+				NULL, 
+				cnt, 
+				0, 
+				NULL);
+	
+	//
+	// call the calss driver to perform the operation
+	// pass the URB to the USB driver stack
+	//
+	nextStack = IoGetNextIrpStackLocation(pirp);
+	nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL;
+	nextStack->Parameters.Others.Argument1 = purb;
+	nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB;
+
+	//Set Completion Routine
+	IoSetCompletionRoutine(pirp,					// irp to use
+				               usb_write_port_complete,	// callback routine
+				               pxmitframe,				// context 
+				               TRUE,					// call on success
+				               TRUE,					// call on error
+				               TRUE);					// call on cancel
+
+	
+	// Call IoCallDriver to send the irp to the usb bus driver
+	//
+	ndisStatus = IoCallDriver(pNdisCEDvice->pnextdevobj, pirp);
+	usbdstatus = URB_STATUS(purb);
+
+	if( USBD_HALTED(usbdstatus) )
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port(): USBD_HALTED(usbdstatus)=%x set bDriverStopped TRUE!\n\n",USBD_HALTED(usbdstatus)) );
+		padapter->bDriverStopped=_TRUE;
+		padapter->bSurpriseRemoved=_TRUE;
+	}
+
+	//
+	// The usb bus driver should always return STATUS_PENDING when bulk out irp async
+	//
+	if ( ndisStatus != STATUS_PENDING )
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port(): ndisStatus(%x) != STATUS_PENDING!\n\n", ndisStatus));
+		
+		_func_exit_;
+		
+		return _FAIL;
+	} 	
+	
+	if(bwritezero == _TRUE)
+	{
+		usb_bulkout_zero(pintfhdl, addr);
+	}
+
+	
+_func_exit_;
+	
+	return _SUCCESS;
+
+}
+
+
+void usb_write_port_cancel(_adapter *padapter)
+{
+
+	sint i,j;
+	struct dvobj_priv   *pdev = &padapter->dvobjpriv;
+	struct xmit_priv *pxmitpriv=&padapter->xmitpriv;
+	struct xmit_frame *pxmitframe;
+
+	_rtw_spinlock(&pxmitpriv->lock);
+	pxmitpriv->txirp_cnt--; //decrease 1 for Initialize ++
+	_rtw_spinunlock(&pxmitpriv->lock);
+	
+	if (pxmitpriv->txirp_cnt) 
+	{
+		// Canceling Pending Recv Irp
+		pxmitframe= (struct xmit_frame *)pxmitpriv->pxmit_frame_buf;
+		
+		for( i = 0; i < NR_XMITFRAME; i++ )
+		{
+			for(j=0;j<8;j++)
+			{
+				if (pxmitframe->bpending[j]==_TRUE)
+				{			
+					IoCancelIrp(pxmitframe->pxmit_irp[j]);		
+					RT_TRACE(_module_hci_ops_os_c_,_drv_err_,(" usb_write_port_cancel() :IoCancelIrp\n"));
+
+				}
+			}
+			
+			pxmitframe++;
+		}
+
+		_rtw_down_sema(&(pxmitpriv->tx_retevt));
+		
+	}
+
+}
+
+
+/*! \brief Wrap the pUrb to an IRP and send this IRP to Bus Driver. Then wait for this IRP completion.
+	The Caller shall be at Passive Level.
+*/
+NTSTATUS  sync_callusbd(struct dvobj_priv *pdvobjpriv, PURB purb)
+{
+
+	KEVENT					kevent;
+	PIRP						irp;
+	IO_STATUS_BLOCK		iostatusblock;
+	PIO_STACK_LOCATION		nextstack;
+	USBD_STATUS			usbdstatus;
+	LARGE_INTEGER			waittime;
+	NTSTATUS ntstatus = STATUS_SUCCESS;
+	_adapter *padapter = pdvobjpriv->padapter;
+	
+
+	_func_enter_;
+
+//	if(padapter->bDriverStopped) {
+//		goto exit;
+//	}
+	
+	KeInitializeEvent(&kevent, NotificationEvent, _FALSE);
+	irp = IoBuildDeviceIoControlRequest(
+			IOCTL_INTERNAL_USB_SUBMIT_URB,
+			pdvobjpriv->pphysdevobj,//CEdevice->pUsbDevObj, 
+			NULL, 
+			0, 
+			NULL, 
+			0, 
+			_TRUE, 
+			&kevent, 
+			&iostatusblock);
+
+	if(irp == NULL) {
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("SyncCallUSBD: memory alloc for irp failed\n"));
+		ntstatus=STATUS_INSUFFICIENT_RESOURCES;
+		goto exit;
+	}
+	
+	nextstack = IoGetNextIrpStackLocation(irp);
+	if(nextstack == NULL)	
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("IoGetNextIrpStackLocation fail\n"));
+
+	nextstack->Parameters.Others.Argument1 = purb;
+	
+	// Issue an IRP for Sync IO.
+	ntstatus = IoCallDriver(pdvobjpriv->pphysdevobj, irp);
+	usbdstatus = URB_STATUS(purb);
+
+	if(ntstatus == STATUS_PENDING)
+	{		
+		// Method 1
+		waittime.QuadPart = -10000 * 50000;
+		ntstatus = KeWaitForSingleObject(&kevent, Executive, KernelMode, _FALSE, &waittime); //8150 code
+		
+		// Method 2
+		//ntStatus = KeWaitForSingleObject(&Kevent, Executive, KernelMode, FALSE, NULL); //DDK sample
+		
+		usbdstatus = URB_STATUS(purb);
+
+		if(ntstatus == STATUS_TIMEOUT) 
+		{			
+			//usbdevice->nIoStuckCnt++;
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("SyncCallUSBD: TIMEOUT....5000ms\n"));
+
+			// Method 2
+			IoCancelIrp(irp);
+			ntstatus = KeWaitForSingleObject(&kevent, Executive, KernelMode, _FALSE, NULL); //DDK sample
+			usbdstatus = URB_STATUS(purb);
+
+			usbdstatus = USBD_STATUS_SUCCESS;
+		}
+		
+	}
+	
+exit:	
+	
+	_func_exit_;
+	
+	return ntstatus;
+	
+}
+int usbctrl_vendorreq(struct intf_priv *pintfpriv, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
+{
+	PURB			purb;
+	u8				ret;
+	unsigned long		transferflags;
+	NTSTATUS		ntstatus;
+
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfpriv->intf_dev;   
+	
+	_func_enter_;
+
+	ret=_TRUE;
+	purb = (PURB)ExAllocatePool(NonPagedPool, sizeof(struct _URB_CONTROL_VENDOR_OR_CLASS_REQUEST) );
+	if(purb == NULL) {
+		
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq(): Failed to allocate urb !!!\n"));
+		ret =_FALSE;
+		goto exit;
+	}
+
+	if (requesttype == 0x01) {
+		transferflags = USBD_TRANSFER_DIRECTION_IN;//read_in
+	} else {
+		transferflags= 0;//write_out
+	}
+
+	UsbBuildVendorRequest(
+			purb, 		//Pointer to an URB that is to be formatted as a vendor or class request. 
+			URB_FUNCTION_VENDOR_DEVICE,	//Indicates the URB is a vendor-defined request for a USB device. 
+			sizeof(struct _URB_CONTROL_VENDOR_OR_CLASS_REQUEST),  //Specifies the length, in bytes, of the URB. 
+			transferflags, 	//TransferFlags 
+			0,			//ReservedBits 
+			request, 	//Request 
+			value, 		//Value 
+			index,		//Index
+			pdata,		//TransferBuffer 
+			NULL,		//TransferBufferMDL 
+			len,			//TransferBufferLength 
+			NULL		//Link 
+	);
+
+	ntstatus = sync_callusbd(pdvobjpriv, purb);
+	if(!NT_SUCCESS(ntstatus))
+	{
+		ExFreePool(purb);
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,(" usbctrl_vendorreq() : SOMETHING WRONG\n") );
+		ret = _FALSE;
+		goto exit;
+	}
+
+	ExFreePool(purb);
+
+exit:	
+	_func_exit_;
+	
+	return ret;	
+
+}
+