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authorSrikant Patnaik2015-01-13 15:08:24 +0530
committerSrikant Patnaik2015-01-13 15:08:24 +0530
commit97327692361306d1e6259021bc425e32832fdb50 (patch)
treefe9088f3248ec61e24f404f21b9793cb644b7f01 /arch/h8300/include/asm/cachectl.h
parent2d05a8f663478a44e088d122e0d62109bbc801d0 (diff)
parenta3a8b90b61e21be3dde9101c4e86c881e0f06210 (diff)
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dirty fix to merging
Diffstat (limited to 'arch/h8300/include/asm/cachectl.h')
-rw-r--r--arch/h8300/include/asm/cachectl.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/h8300/include/asm/cachectl.h b/arch/h8300/include/asm/cachectl.h
new file mode 100644
index 00000000..c464022d
--- /dev/null
+++ b/arch/h8300/include/asm/cachectl.h
@@ -0,0 +1,14 @@
+#ifndef _H8300_CACHECTL_H
+#define _H8300_CACHECTL_H
+
+/* Definitions for the cacheflush system call. */
+
+#define FLUSH_SCOPE_LINE 0 /* Flush a cache line */
+#define FLUSH_SCOPE_PAGE 0 /* Flush a page */
+#define FLUSH_SCOPE_ALL 0 /* Flush the whole cache -- superuser only */
+
+#define FLUSH_CACHE_DATA 0 /* Writeback and flush data cache */
+#define FLUSH_CACHE_INSN 0 /* Flush instruction cache */
+#define FLUSH_CACHE_BOTH 0 /* Flush both caches */
+
+#endif /* _H8300_CACHECTL_H */