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author | Srikant Patnaik | 2015-01-11 12:28:04 +0530 |
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committer | Srikant Patnaik | 2015-01-11 12:28:04 +0530 |
commit | 871480933a1c28f8a9fed4c4d34d06c439a7a422 (patch) | |
tree | 8718f573808810c2a1e8cb8fb6ac469093ca2784 /arch/blackfin/mach-bf561/hotplug.c | |
parent | 9d40ac5867b9aefe0722bc1f110b965ff294d30d (diff) | |
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Moved, renamed, and deleted files
The original directory structure was scattered and unorganized.
Changes are basically to make it look like kernel structure.
Diffstat (limited to 'arch/blackfin/mach-bf561/hotplug.c')
-rw-r--r-- | arch/blackfin/mach-bf561/hotplug.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf561/hotplug.c b/arch/blackfin/mach-bf561/hotplug.c new file mode 100644 index 00000000..0123117b --- /dev/null +++ b/arch/blackfin/mach-bf561/hotplug.c @@ -0,0 +1,40 @@ +/* + * Copyright 2007-2009 Analog Devices Inc. + * Graff Yang <graf.yang@analog.com> + * + * Licensed under the GPL-2 or later. + */ + +#include <linux/smp.h> +#include <asm/blackfin.h> +#include <asm/cacheflush.h> +#include <mach/pll.h> + +int hotplug_coreb; + +void platform_cpu_die(void) +{ + unsigned long iwr; + + hotplug_coreb = 1; + + /* + * When CoreB wakes up, the code in _coreb_trampoline_start cannot + * turn off the data cache. This causes the CoreB failed to boot. + * As a workaround, we invalidate all the data cache before sleep. + */ + blackfin_invalidate_entire_dcache(); + + /* disable core timer */ + bfin_write_TCNTL(0); + + /* clear ipi interrupt IRQ_SUPPLE_0 of CoreB */ + bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1))); + SSYNC(); + + /* set CoreB wakeup by ipi0, iwr will be discarded */ + bfin_iwr_set_sup0(&iwr, &iwr, &iwr); + SSYNC(); + + coreb_die(); +} |