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author | Srikant Patnaik | 2015-01-13 15:08:24 +0530 |
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committer | Srikant Patnaik | 2015-01-13 15:08:24 +0530 |
commit | 97327692361306d1e6259021bc425e32832fdb50 (patch) | |
tree | fe9088f3248ec61e24f404f21b9793cb644b7f01 /arch/arm/mach-s5pv210/setup-fb-24bpp.c | |
parent | 2d05a8f663478a44e088d122e0d62109bbc801d0 (diff) | |
parent | a3a8b90b61e21be3dde9101c4e86c881e0f06210 (diff) | |
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dirty fix to merging
Diffstat (limited to 'arch/arm/mach-s5pv210/setup-fb-24bpp.c')
-rw-r--r-- | arch/arm/mach-s5pv210/setup-fb-24bpp.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/arch/arm/mach-s5pv210/setup-fb-24bpp.c new file mode 100644 index 00000000..55103c82 --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c @@ -0,0 +1,49 @@ +/* linux/arch/arm/plat-s5pv210/setup-fb-24bpp.c + * + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Base s5pv210 setup information for 24bpp LCD framebuffer + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/fb.h> +#include <linux/gpio.h> + +#include <mach/map.h> +#include <plat/fb.h> +#include <mach/regs-clock.h> +#include <plat/gpio-cfg.h> + +static void s5pv210_fb_cfg_gpios(unsigned int base, unsigned int nr) +{ + s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(2)); + + for (; nr > 0; nr--, base++) + s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); +} + + +void s5pv210_fb_gpio_setup_24bpp(void) +{ + s5pv210_fb_cfg_gpios(S5PV210_GPF0(0), 8); + s5pv210_fb_cfg_gpios(S5PV210_GPF1(0), 8); + s5pv210_fb_cfg_gpios(S5PV210_GPF2(0), 8); + s5pv210_fb_cfg_gpios(S5PV210_GPF3(0), 4); + + /* Set DISPLAY_CONTROL register for Display path selection. + * + * ouput | RGB | I80 | ITU + * ----------------------------------- + * 00 | MIE | FIMD | FIMD + * 01 | MDNIE | MDNIE | FIMD + * 10 | FIMD | FIMD | FIMD + * 11 | FIMD | FIMD | FIMD + */ + writel(0x2, S5P_MDNIE_SEL); +} |