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author | Kevin | 2014-11-15 09:58:27 +0800 |
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committer | Kevin | 2014-11-15 09:58:27 +0800 |
commit | 392e8802486cb573b916e746010e141a75f507e6 (patch) | |
tree | 50029aca02c81f087b90336e670b44e510782330 /ANDROID_3.4.5/include/linux/spi/eeprom.h | |
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init android origin source code
Diffstat (limited to 'ANDROID_3.4.5/include/linux/spi/eeprom.h')
-rw-r--r-- | ANDROID_3.4.5/include/linux/spi/eeprom.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/ANDROID_3.4.5/include/linux/spi/eeprom.h b/ANDROID_3.4.5/include/linux/spi/eeprom.h new file mode 100644 index 00000000..306e7b1c --- /dev/null +++ b/ANDROID_3.4.5/include/linux/spi/eeprom.h @@ -0,0 +1,28 @@ +#ifndef __LINUX_SPI_EEPROM_H +#define __LINUX_SPI_EEPROM_H + +#include <linux/memory.h> + +/* + * Put one of these structures in platform_data for SPI EEPROMS handled + * by the "at25" driver. On SPI, most EEPROMS understand the same core + * command set. If you need to support EEPROMs that don't yet fit, add + * flags to support those protocol options. These values all come from + * the chip datasheets. + */ +struct spi_eeprom { + u32 byte_len; + char name[10]; + u16 page_size; /* for writes */ + u16 flags; +#define EE_ADDR1 0x0001 /* 8 bit addrs */ +#define EE_ADDR2 0x0002 /* 16 bit addrs */ +#define EE_ADDR3 0x0004 /* 24 bit addrs */ +#define EE_READONLY 0x0008 /* disallow writes */ + + /* for exporting this chip's data to other kernel code */ + void (*setup)(struct memory_accessor *mem, void *context); + void *context; +}; + +#endif /* __LINUX_SPI_EEPROM_H */ |